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Add IMX123/IMX178 for Hi3516Dv100

pull/139/head
Dmitry Ermakov 2022-01-01 23:36:15 +03:00
parent a58376292f
commit feb80cde38
3 changed files with 82 additions and 271 deletions
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132
general/package/hisilicon-osdrv-hi3516av100/files/sensor/config/imx123_i2c_lvds_3M.ini
View File

@ -1,77 +1,39 @@
[sensor]
Sensor_type =imx123 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =libsns_imx123.so ;sensor lib path
Sensor_type=imx123
Mode=WDR_MODE_NONE
DllFile=libsns_imx123.so
[mode]
input_mode =1 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 1 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
input_mode=INPUT_MODE_LVDS
dev_attr=1
[lvds]
;----------only for lvds_dev---------
img_size_w = 2048 ;oringnal sensor input image size W
img_size_h = 1536 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian =1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|4|5|6|7| ;lane_id: -1 - disable
lvds_lane_num = 8 ;LVDS_LANE_NUM
wdr_vc_num = 4 ;WDR_VC_NUM
sync_code_num = 4 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_5 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_6 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_7 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
img_size_w=2048
img_size_h=1536
wdr_mode=HI_WDR_MODE_NONE
sync_mode=LVDS_SYNC_MODE_SAV
raw_data_type=2
data_endian=1
sync_code_endian=1
lane_id=0|1|2|3|4|5|6|7|
lvds_lane_num=8
wdr_vc_num=4
sync_code_num=4
sync_code_0=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_5=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_6=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_7=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =2048
Isp_H =1536
Isp_FrameRate=25
Isp_Bayer =2 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
Isp_Bayer=BAYER_GBRG
[vi_dev]
Input_mod =5 ;VI_INPUT_MODE_BT656 = 0 ;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Input_mod=VI_MODE_LVDS
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
@ -85,7 +47,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
@ -126,40 +88,10 @@ Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
DataPath=1
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=20 ;
DevRect_w=2048 ;
DevRect_h=1536 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=2048
CapRect_Height=1536
DestSize_Width=2048
DestSize_Height=1536
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
DevRect_x=0
DevRect_y=0
DevRect_w=2048
DevRect_h=1536

131
general/package/hisilicon-osdrv-hi3516av100/files/sensor/config/imx178_i2c_lvds_5M.ini
View File

@ -1,76 +1,39 @@
[sensor]
Sensor_type =imx178 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =libsns_imx178.so ;sensor lib path
Sensor_type=imx123
Mode=WDR_MODE_NONE
DllFile=libsns_imx178.so
[mode]
input_mode =1 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 1 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
input_mode=INPUT_MODE_LVDS
dev_attr=1
[lvds]
;----------only for lvds_dev---------
img_size_w = 2592 ;oringnal sensor input image size W
img_size_h = 1944 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1;HI_WDR_MODE_3F = 2;HI_WDR_MODE_4F =3
;HI_WDR_MODE_DOL_2F = 4;HI_WDR_MODE_DOL_3F = 5;HI_WDR_MODE_DOL_4F = 6
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian =1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = 8 ;LVDS_LANE_NUM
wdr_vc_num = 4 ;WDR_VC_NUM
sync_code_num = 4 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_5 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_6 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_7 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
img_size_w=2592
img_size_h=1944
wdr_mode=HI_WDR_MODE_NONE
sync_mode=LVDS_SYNC_MODE_SAV
raw_data_type=2
data_endian=1
sync_code_endian=1
lane_id=0|1|2|3|-1|-1|-1|-1|
lvds_lane_num=8
wdr_vc_num=4
sync_code_num=4
sync_code_0=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_5=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_6=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_7=0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =2592
Isp_H =1944
Isp_FrameRate=25
Isp_Bayer =2 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
Isp_Bayer=BAYER_GBRG
[vi_dev]
Input_mod =5 ;VI_INPUT_MODE_BT656 = 0 ;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Input_mod=VI_MODE_LVDS
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
@ -84,7 +47,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
@ -125,40 +88,10 @@ Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
DataPath=1
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=20 ;
DevRect_w=2592 ;
DevRect_h=1944 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=2592
CapRect_Height=1944
DestSize_Width=2592
DestSize_Height=1944
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
DevRect_x=0
DevRect_y=0
DevRect_w=2592
DevRect_h=1944

56
general/package/hisilicon-osdrv-hi3516av100/files/sensor/config/ov4689_i2c_4M.ini
View File

@ -26,47 +26,13 @@ data_type =2 ;raw data type: 8/10/12/14 bit
;RAW_DATA_14BIT = 3
lane_id = 1|0|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 2592 ;oringnal sensor input image size W
img_size_h = 1520 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1;HI_WDR_MODE_3F = 2;HI_WDR_MODE_4F =3
;HI_WDR_MODE_DOL_2F = 4;HI_WDR_MODE_DOL_3F = 5;HI_WDR_MODE_DOL_4F = 6
sync_mode = 0 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|2|-1|-1|1|3|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = 8 ;LVDS_LANE_NUM
wdr_vc_num = 4 ;WDR_VC_NUM
sync_code_num = 4 ;SYNC_CODE_NUM
sync_code_0 = 0x002|0x003|0x000|0x001|0x202|0x203|0x200|0x201|0x102|0x103|0x100|0x101|0x302|0x303|0x300|0x301|
sync_code_1 = 0x006|0x007|0x004|0x005|0x206|0x207|0x204|0x205|0x106|0x107|0x104|0x105|0x306|0x307|0x304|0x305|
sync_code_2 = 0x00a|0x00b|0x008|0x009|0x20a|0x20b|0x208|0x209|0x10a|0x10b|0x108|0x109|0x30a|0x30b|0x308|0x309|
sync_code_3 = 0x00a|0x00b|0x008|0x009|0x20a|0x20b|0x208|0x209|0x10a|0x10b|0x108|0x109|0x30a|0x30b|0x308|0x309|
sync_code_4 = 0x012|0x013|0x010|0x011|0x212|0x213|0x210|0x211|0x112|0x113|0x110|0x111|0x312|0x313|0x310|0x311|
sync_code_5 = 0x016|0x017|0x014|0x015|0x216|0x217|0x214|0x215|0x116|0x117|0x114|0x115|0x316|0x317|0x314|0x315|
sync_code_6 = 0x01a|0x01b|0x018|0x019|0x21a|0x21b|0x218|0x219|0x11a|0x11b|0x118|0x119|0x31a|0x31b|0x318|0x319|
sync_code_7 = 0x01a|0x01b|0x018|0x019|0x21a|0x21b|0x218|0x219|0x11a|0x11b|0x118|0x119|0x31a|0x31b|0x318|0x319|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =2592
Isp_H =1520
Isp_FrameRate=25
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =4 ;VI_INPUT_MODE_BT656 = 0
Input_mod =5 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
@ -140,23 +106,3 @@ DevRect_y=0 ;
DevRect_w=2592 ;
DevRect_h=1520 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=2592
CapRect_Height=1520
DestSize_Width=2592
DestSize_Height=1520
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll