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Fix init and sensors for Hi3519v101

pull/162/head
Dmitry Ermakov 2022-01-18 08:32:53 +03:00
parent 1317cca521
commit d4b1629fdb
8 changed files with 106 additions and 143 deletions
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106
general/package/hisilicon-osdrv-hi3519v101/files/script/load_hisilicon
View File

@ -372,7 +372,7 @@ insert_sns() {
spi0_4wire_pin_mux
insmod hi_ssp_sony.ko
;;
imx274_mipi)
imx274_mipi | imx334 | imx335)
tmp=0x14
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
@ -381,6 +381,54 @@ insert_sns() {
devmem 0x12010040 32 0x14 # sensor0 clk_en, 24MHz
i2c0_pin_mux
;;
imx294)
tmp=0x14
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:600M,isp0:600M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c23
devmem 0x12010054 32 0x00024041
devmem 0x12010040 32 0x14 # sensor0 clk_en, 24MHz
i2c0_pin_mux
;;
imx117)
tmp=0x11
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c21
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x11 # sensor0 clk_en, 72MHz
spi0_4wire_pin_mux
insmod extdrv/hi_ssp_sony.ko
;;
imx265)
tmp=0x18
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
#imx265: viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c21
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x18 # sensor0 clk_en, 37.125MHz
spi0_4wire_pin_mux
insmod extdrv/hi_ssp_sony.ko
;;
imx377)
tmp=0x14
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
#viu0:600M,isp0:600M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c23
devmem 0x12010054 32 0x00024041
devmem 0x12010040 32 0x14 # sensor0 clk_en, 24MHz
i2c0_pin_mux
;;
imx317)
tmp=0x11
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c21
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x11 # sensor0 clk_en, 72MHz
spi0_4wire_pin_mux
insmod extdrv/hi_ssp_sony.ko
;;
imx290)
tmp=0x18
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
@ -390,7 +438,35 @@ insert_sns() {
devmem 0x12010040 32 0x18 # sensor0 clk_en, 37.125MHz
i2c0_pin_mux
;;
imx385)
imx327)
tmp=0x18
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
#imx290:viu0:340M,isp0:214M, viu1:340M,isp1:214M
devmem 0x1201004c 32 0x00094c24
devmem 0x12010054 32 0x0004
devmem 0x12010040 32 0x18 # sensor0 clk_en, 37.125MHz
i2c0_pin_mux
;;
mn34220)
tmp=0x18
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c21
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x18 # sensor0 clk_en, 37.125MHz
i2c0_pin_mux
;;
mn34120)
tmp=0x12
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c21
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x12 # sensor0 clk_en, 54MHz
spi0_3wire_pin_mux
insmod extdrv/hi_ssp_3wire.ko
;;
imx385_lvds)
tmp=0x18
devmem 0x12010040 32 0x18
devmem 0x12040190 32 0x2
@ -412,6 +488,26 @@ insert_sns() {
devmem 0x12010040 32 0x14 # sensor0 clk_en, 24MHz
i2c0_pin_mux
;;
sc4210)
tmp=0x14
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
#ov4689: viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094c21
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x1a # sensor0 clk_en, 27MHz
i2c0_pin_mux
;;
imx185 | imx385 | imx178)
tmp=0x18
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094421
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x18 # sensor0 clk_en, 37.125MHz
i2c0_pin_mux
#spi0_4wire_pin_mux;
#insmod extdrv/hi_ssp_sony.ko;
;;
os08a10)
tmp=0x14
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
@ -792,9 +888,13 @@ if [ $b_arg_remove -eq 1 ]; then
remove_ko
fi
if [ "$SENSOR" = "unknown" ]; then
exit 1
else
if [ $b_arg_insmod -eq 1 ]; then
cd /lib/modules/3.18.20/hisilicon
insert_ko
insert_ko;
fi
fi
if [ $b_arg_restore -eq 1 ]; then

2
general/package/hisilicon-osdrv-hi3519v101/files/sensor/config/imx385_i2c_1080p.ini
View File

@ -8,7 +8,7 @@ input_mode=INPUT_MODE_MIPI
dev_attr=0
[mipi]
data_type=RAW_DATA_12BIT
data_type=RAW_DATA_10BIT
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
[isp_image]

137
general/package/hisilicon-osdrv-hi3519v101/files/sensor/config/imx385_i2c_lvds_1080p.ini
View File

@ -1,137 +0,0 @@
[sensor]
Sensor_type=stSnsImx385Obj
Mode=WDR_MODE_NONE
DllFile=/usr/lib/sensors/libsns_imx385.so
[mode]
input_mode=INPUT_MODE_LVDS
dev_attr=0
[mipi]
data_type=RAW_DATA_12BIT
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer=BAYER_RGGB
[vi_dev]
Input_mod=VI_MODE_LVDS
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=1 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
FixCode=0
FieldPolar=0
DataPath=1
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=4
DevRect_y=4
DevRect_w=1920
DevRect_h=1080
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll

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general/package/hisilicon-osdrv-hi3519v101/files/sensor/libsns_imx178.so 100755
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general/package/hisilicon-osdrv-hi3519v101/files/sensor/libsns_imx185.so 100755
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general/package/hisilicon-osdrv-hi3519v101/files/sensor/libsns_imx327.so 100755
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general/package/hisilicon-osdrv-hi3519v101/files/sensor/libsns_imx385.so
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general/package/hisilicon-osdrv-hi3519v101/files/sensor/libsns_sc4210.so 100755
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