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			Fix SDK name and disable Quad for flash
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				|  | @ -119,7 +119,7 @@ jobs: | ||||||
|         with: |         with: | ||||||
|           repo_token: ${{ secrets.GITHUB_TOKEN }} |           repo_token: ${{ secrets.GITHUB_TOKEN }} | ||||||
|           file: ${{ env.ARCHIVE_SDK }} |           file: ${{ env.ARCHIVE_SDK }} | ||||||
|           asset_name: "arm-openipc-linux-gnueabi_sdk-buildroot.tar.gz" |           asset_name: "arm-openipc-hi3516av300-linux-gnueabi_sdk-buildroot.tar.gz" | ||||||
|           tag: ${{ env.TAG_NAME }} |           tag: ${{ env.TAG_NAME }} | ||||||
|           overwrite: true |           overwrite: true | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -119,7 +119,7 @@ jobs: | ||||||
|         with: |         with: | ||||||
|           repo_token: ${{ secrets.GITHUB_TOKEN }} |           repo_token: ${{ secrets.GITHUB_TOKEN }} | ||||||
|           file: ${{ env.ARCHIVE_SDK }} |           file: ${{ env.ARCHIVE_SDK }} | ||||||
|           asset_name: "arm-openipc-linux-gnueabi_sdk-buildroot.tar.gz" |           asset_name: "arm-openipc-hi3516cv500-linux-gnueabi_sdk-buildroot.tar.gz" | ||||||
|           tag: ${{ env.TAG_NAME }} |           tag: ${{ env.TAG_NAME }} | ||||||
|           overwrite: true |           overwrite: true | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -119,7 +119,7 @@ jobs: | ||||||
|         with: |         with: | ||||||
|           repo_token: ${{ secrets.GITHUB_TOKEN }} |           repo_token: ${{ secrets.GITHUB_TOKEN }} | ||||||
|           file: ${{ env.ARCHIVE_SDK }} |           file: ${{ env.ARCHIVE_SDK }} | ||||||
|           asset_name: "arm-openipc-linux-gnueabi_sdk-buildroot.tar.gz" |           asset_name: "arm-openipc-hi3516dv300-linux-gnueabi_sdk-buildroot.tar.gz" | ||||||
|           tag: ${{ env.TAG_NAME }} |           tag: ${{ env.TAG_NAME }} | ||||||
|           overwrite: true |           overwrite: true | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
|  | @ -909,7 +909,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -909,7 +909,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -909,7 +909,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -896,7 +896,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -883,7 +883,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -896,7 +896,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -900,7 +900,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -883,7 +883,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -896,7 +896,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
|  | @ -882,7 +882,7 @@ CONFIG_MTD_SPI_NOR=y | ||||||
| # CONFIG_SPI_CADENCE_QUADSPI is not set | # CONFIG_SPI_CADENCE_QUADSPI is not set | ||||||
| CONFIG_SPI_HISI_SFC=y | CONFIG_SPI_HISI_SFC=y | ||||||
| # CONFIG_MTD_SPI_IDS is not set | # CONFIG_MTD_SPI_IDS is not set | ||||||
| # CONFIG_CLOSE_SPI_8PIN_4IO is not set | CONFIG_CLOSE_SPI_8PIN_4IO=y | ||||||
| CONFIG_HISI_SPI_BLOCK_PROTECT=y | CONFIG_HISI_SPI_BLOCK_PROTECT=y | ||||||
| CONFIG_MTD_UBI=y | CONFIG_MTD_UBI=y | ||||||
| CONFIG_MTD_UBI_WL_THRESHOLD=4096 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||||||
|  |  | ||||||
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