Fix jffs2/overlayfs file overwrite for Hi3516Cv100

br-ext-chip-hisilicon/board/hi3516cv100/kernel/hi3516cv100.generic.config

@@ -1380,11 +1380,13 @@ CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
 # CONFIG_JFFS2_FS_WBUF_VERIFY is not set
-# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
 CONFIG_JFFS2_COMPRESSION_OPTIONS=y
 CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_LZO=y
+# CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 # CONFIG_JFFS2_CMODE_NONE is not set

br-ext-chip-hisilicon/board/hi3516cv100/kernel/hi3518cv100.generic.config

@@ -1380,11 +1380,13 @@ CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
 # CONFIG_JFFS2_FS_WBUF_VERIFY is not set
-# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
 CONFIG_JFFS2_COMPRESSION_OPTIONS=y
 CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_LZO=y
+# CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 # CONFIG_JFFS2_CMODE_NONE is not set

br-ext-chip-hisilicon/board/hi3516cv100/kernel/hi3518ev100.generic.config

@@ -1380,11 +1380,13 @@ CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
 # CONFIG_JFFS2_FS_WBUF_VERIFY is not set
-# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
 CONFIG_JFFS2_COMPRESSION_OPTIONS=y
 CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_LZO=y
+# CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 # CONFIG_JFFS2_CMODE_NONE is not set

general/package/hisilicon-osdrv-hi3516cv100/files/script/load_hisilicon

@@ -240,7 +240,7 @@ sys_config() {
     clk_cfg() {
         devmem 0x2003002c 32 0x2a  # VICAP, ISP unreset & clock enable
         devmem 0x20030048 32 0x2   # VPSS unreset, code also config
-        devmem 0x20030034 32 0x510 # VDP  unreset & HD clock enable
+        devmem 0x20030034 32 0x510 # VDP  unreset & HD clock enable # XM: 0x00000043
         devmem 0x20030040 32 0x2   # VEDU unreset
         devmem 0x20030060 32 0x2   # JPEG unreset
         devmem 0x20030058 32 0x2   # TDE  unreset

general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/ov9712_i2c_dc_720p.ini

@@ -83,7 +83,7 @@ Clock_edge   =1 ;Clock edge mode (sampling on the rising or falling edge)
                 ;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
                 ;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
 Mask_num     =2 ;Component mask
-Mask_0       =0xFFC00000
+Mask_0       =0xFFC0000
 Mask_1       =0x0
 Scan_mode    = 1;VI_SCAN_INTERLACED = 0
                 ;VI_SCAN_PROGRESSIVE,

general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc1035_960p.ini

@@ -20,46 +20,6 @@ dev_attr = 2                         	;mipi_dev_attr_t = 0
                                         ;lvds_dev_attr_t = 1
                                         ;NULL =2
 
-[mipi]
-;----------only for mipi_dev---------
-data_type =-1                       	;raw data type: 8/10/12/14 bit
-                                        ;RAW_DATA_8BIT = 0
-                                        ;RAW_DATA_10BIT = 1
-                                        ;RAW_DATA_12BIT = 2
-                                        ;RAW_DATA_14BIT = 3
-lane_id = -1|-1|-1|-1|-1|-1|-1|-1|      ;lane_id: -1 - disable
-
-[lvds]
-;----------only for lvds_dev---------
-img_size_w = -1                     	;oringnal sensor input image size W
-img_size_h = -1                     	;oringnal sensor input image size H
-wdr_mode = -1                           ;HI_WDR_MODE_NONE =0
-                                        ;HI_WDR_MODE_2F = 1
-                                        ;HI_WDR_MODE_3F = 2
-                                        ;HI_WDR_MODE_4F =3
-sync_mode = -1                  	;LVDS_SYNC_MODE_SOL = 0
-                                        ;LVDS_SYNC_MODE_SAV = 1
-raw_data_type = -1                    	;RAW_DATA_8BIT = 0
-                                        ;RAW_DATA_10BIT = 1
-                                        ;RAW_DATA_12BIT = 2
-                                        ;RAW_DATA_14BIT = 3
-data_endian = -1                        ;LVDS_ENDIAN_LITTLE = 0
-                                        ;LVDS_ENDIAN_BIG = 1
-sync_code_endian =-1                    ;LVDS_ENDIAN_LITTLE = 0
-                                        ;LVDS_ENDIAN_BIG = 1
-lane_id = -1|-1|-1|-1|-1|-1|-1|-1|      ;lane_id: -1 - disable
-lvds_lane_num = -1                      ;LVDS_LANE_NUM
-wdr_vc_num = -1                         ;WDR_VC_NUM
-sync_code_num = -1                      ;SYNC_CODE_NUM
-sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
-
 [isp_image]
 Isp_x      =0
 Isp_y      =0
@@ -161,103 +121,5 @@ PixFormat    =19;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
 CompressMode =0 ;COMPRESS_MODE_NONE = 0
                 ;COMPRESS_MODE_SEG =1 ...etc
 
-;SrcFrameRate=-1 ;Source frame rate. -1: not controll
+SrcFrameRate=-1 ;Source frame rate. -1: not controll
-;FrameRate   =-1 ;Target frame rate. -1: not controll
+FrameRate   =-1 ;Target frame rate. -1: not controll
-
-SrcFrameRate=30 ;Source frame rate. -1: not controll
-FrameRate   =30 ;Target frame rate. -1: not controll
-[vpss_group]
-Vpss_DciEn  =FALSE
-Vpss_IeEn   =FALSE
-Vpss_NrEn   =TRUE
-Vpss_HistEn =FALSE
-Vpss_DieMode=1  ;Define de-interlace mode
-                ;VPSS_DIE_MODE_AUTO  = 0,
-                ;VPSS_DIE_MODE_NODIE = 1,
-                ;VPSS_DIE_MODE_DIE   = 2,
-
-[vpss_corp]
-Crop_enable =FALSE
-Coordinate  =1  ;VPSS_CROP_RATIO_COOR = 0,   /*Ratio coordinate*/
-		        ;VPSS_CROP_ABS_COOR = 1      /*Absolute coordinate*/
-Crop_X      =128
-Crop_Y      =128
-Crop_W      =1158
-Crop_H      =562
-
-[vpss_chn]
-Vpss_W    =1280
-Vpss_H    =960
-CompressMode=0  ;COMPRESS_MODE_NONE = 0
-		        ;COMPRESS_MODE_SEG =1 ...etc
-Mirror     =FALSE;Whether to mirror
-Flip       =FALSE;Whether to flip
-
-[vb_conf]
-VbCnt=5
-#VbCnt=2
-vbTimes=15
-
-[venc_comm]
-venc_chn =1     ;create venc chn number;(0,2]
-BufCnt = 1      ;network meida-trans bufcnt
-
-[venc_0]
-PicWidth  =1280
-PicHeight =720
-Profile   =2
-RcMode   =VENC_RC_MODE_H264CBR
-
-Gop    =50
-StatTime =2
-ViFrmRate  =30
-TargetFrmRate=30
-;----- only for VENC_RC_MODE_H264CBR ----------
-BitRate=2048
-FluctuateLevel=1
-;----- only for VENC_RC_MODE_H264VBR ----------
-MaxBitRate =10000
-
-MaxQp=32
-MinQp=24
-;----- only for VENC_RC_MODE_H264FIXQP ----------
-IQp=45
-
-PQp=40
-
-[venc_1]
-PicWidth  =1280
-PicHeight =720
-Profile   =2
-RcMode   =VENC_RC_MODE_H264CBR
-
-Gop    =50
-StatTime =2
-ViFrmRate  =30
-TargetFrmRate=15
-;----- only for VENC_RC_MODE_H264CBR ----------
-BitRate=2048
-FluctuateLevel=1
-;----- only for VENC_RC_MODE_H264VBR ----------
-MaxBitRate =10000
-
-MaxQp=32
-
-MinQp=24
-;----- only for VENC_RC_MODE_H264FIXQP ----------
-IQp=40
-
-PQp=45
-
-[bind]
-ViDev   =0
-ViChn   =0
-VpssGrp =0
-VpssChn = 0
-VoDev   =0
-VoChn   =0
-ViSnapChn =0
-VpssSnapGrp=0
-VpssSnapChn=1
-VencSnapGrp=1
-VencSnapChn=3