mirror of https://github.com/OpenIPC/firmware.git
Add GPIO over SYSFS for Hi3516Cv100
Dmitry Ermakov
parent
87519f0736
commit
7c8b2efef0
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@ -5,6 +5,7 @@
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CONFIG_ARM=y
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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CONFIG_HAVE_SCHED_CLOCK=y
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CONFIG_GENERIC_GPIO=y
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# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_KTIME_SCALAR=y
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@ -658,6 +659,7 @@ CONFIG_MTD_NAND=y
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# CONFIG_MTD_NAND_ECC_BCH is not set
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# CONFIG_MTD_SM_COMMON is not set
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# CONFIG_MTD_NAND_MUSEUM_IDS is not set
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# CONFIG_MTD_NAND_GPIO is not set
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# CONFIG_MTD_NAND_DISKONCHIP is not set
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# CONFIG_MTD_NAND_NANDSIM is not set
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# CONFIG_MTD_NAND_PLATFORM is not set
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@ -699,6 +701,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536
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# CONFIG_BLK_DEV_XIP is not set
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# CONFIG_CDROM_PKTCDVD is not set
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# CONFIG_ATA_OVER_ETH is not set
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# CONFIG_MG_DISK is not set
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# CONFIG_BLK_DEV_RBD is not set
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# CONFIG_SENSORS_LIS3LV02D is not set
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CONFIG_MISC_DEVICES=y
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@ -717,6 +720,7 @@ CONFIG_MISC_DEVICES=y
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#
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# Texas Instruments shared transport line discipline
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#
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# CONFIG_TI_ST is not set
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CONFIG_HAVE_IDE=y
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# CONFIG_IDE is not set
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@ -795,6 +799,7 @@ CONFIG_PHYLIB=y
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# CONFIG_MICREL_PHY is not set
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CONFIG_FIXED_PHY=y
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CONFIG_MDIO_BITBANG=y
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# CONFIG_MDIO_GPIO is not set
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CONFIG_NET_ETHERNET=y
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CONFIG_HIETH_SWITCH_FABRIC=y
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CONFIG_HIETH_TAG=0x726d6d73
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@ -997,6 +1002,36 @@ CONFIG_SERIAL_CORE_CONSOLE=y
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#
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# Enable Device Drivers -> PPS to see the PTP clock options.
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#
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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#
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# Memory mapped GPIO drivers:
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#
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# CONFIG_GPIO_BASIC_MMIO is not set
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# CONFIG_GPIO_IT8761E is not set
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CONFIG_GPIO_PL061=y
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#
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# I2C GPIO expanders:
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#
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#
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# PCI GPIO expanders:
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#
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#
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# SPI GPIO expanders:
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#
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#
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# AC97 GPIO expanders:
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#
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#
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# MODULbus GPIO expanders:
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#
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# CONFIG_W1 is not set
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# CONFIG_POWER_SUPPLY is not set
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# CONFIG_HWMON is not set
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@ -1177,6 +1212,7 @@ CONFIG_USB_STORAGE=y
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#
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# OTG and related infrastructure
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#
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# CONFIG_USB_GPIO_VBUS is not set
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# CONFIG_USB_ULPI is not set
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# CONFIG_NOP_USB_XCEIV is not set
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CONFIG_MMC=y
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@ -1217,6 +1253,8 @@ CONFIG_LEDS_CLASS=y
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#
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# LED drivers
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#
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# CONFIG_LEDS_GPIO is not set
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# CONFIG_LEDS_LT3593 is not set
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# CONFIG_LEDS_TRIGGERS is not set
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#
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@ -5,6 +5,7 @@
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CONFIG_ARM=y
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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CONFIG_HAVE_SCHED_CLOCK=y
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CONFIG_GENERIC_GPIO=y
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# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_KTIME_SCALAR=y
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@ -658,6 +659,7 @@ CONFIG_MTD_NAND=y
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# CONFIG_MTD_NAND_ECC_BCH is not set
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# CONFIG_MTD_SM_COMMON is not set
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# CONFIG_MTD_NAND_MUSEUM_IDS is not set
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# CONFIG_MTD_NAND_GPIO is not set
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# CONFIG_MTD_NAND_DISKONCHIP is not set
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# CONFIG_MTD_NAND_NANDSIM is not set
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# CONFIG_MTD_NAND_PLATFORM is not set
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@ -699,6 +701,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536
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# CONFIG_BLK_DEV_XIP is not set
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# CONFIG_CDROM_PKTCDVD is not set
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# CONFIG_ATA_OVER_ETH is not set
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# CONFIG_MG_DISK is not set
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# CONFIG_BLK_DEV_RBD is not set
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# CONFIG_SENSORS_LIS3LV02D is not set
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CONFIG_MISC_DEVICES=y
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@ -717,6 +720,7 @@ CONFIG_MISC_DEVICES=y
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#
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# Texas Instruments shared transport line discipline
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#
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# CONFIG_TI_ST is not set
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CONFIG_HAVE_IDE=y
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# CONFIG_IDE is not set
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@ -795,6 +799,7 @@ CONFIG_PHYLIB=y
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# CONFIG_MICREL_PHY is not set
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CONFIG_FIXED_PHY=y
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CONFIG_MDIO_BITBANG=y
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# CONFIG_MDIO_GPIO is not set
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CONFIG_NET_ETHERNET=y
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CONFIG_HIETH_SWITCH_FABRIC=y
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CONFIG_HIETH_TAG=0x726d6d73
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@ -997,6 +1002,36 @@ CONFIG_SERIAL_CORE_CONSOLE=y
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#
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# Enable Device Drivers -> PPS to see the PTP clock options.
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#
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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#
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# Memory mapped GPIO drivers:
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#
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# CONFIG_GPIO_BASIC_MMIO is not set
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# CONFIG_GPIO_IT8761E is not set
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CONFIG_GPIO_PL061=y
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#
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# I2C GPIO expanders:
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#
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#
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# PCI GPIO expanders:
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#
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#
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# SPI GPIO expanders:
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#
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#
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# AC97 GPIO expanders:
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#
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#
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# MODULbus GPIO expanders:
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#
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# CONFIG_W1 is not set
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# CONFIG_POWER_SUPPLY is not set
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# CONFIG_HWMON is not set
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@ -1177,6 +1212,7 @@ CONFIG_USB_STORAGE=y
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#
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# OTG and related infrastructure
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#
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# CONFIG_USB_GPIO_VBUS is not set
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# CONFIG_USB_ULPI is not set
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# CONFIG_NOP_USB_XCEIV is not set
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CONFIG_MMC=y
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@ -1217,6 +1253,8 @@ CONFIG_LEDS_CLASS=y
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#
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# LED drivers
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#
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# CONFIG_LEDS_GPIO is not set
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# CONFIG_LEDS_LT3593 is not set
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# CONFIG_LEDS_TRIGGERS is not set
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#
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@ -5,6 +5,7 @@
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CONFIG_ARM=y
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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CONFIG_HAVE_SCHED_CLOCK=y
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CONFIG_GENERIC_GPIO=y
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# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_KTIME_SCALAR=y
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@ -658,6 +659,7 @@ CONFIG_MTD_NAND=y
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# CONFIG_MTD_NAND_ECC_BCH is not set
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# CONFIG_MTD_SM_COMMON is not set
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# CONFIG_MTD_NAND_MUSEUM_IDS is not set
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# CONFIG_MTD_NAND_GPIO is not set
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# CONFIG_MTD_NAND_DISKONCHIP is not set
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# CONFIG_MTD_NAND_NANDSIM is not set
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# CONFIG_MTD_NAND_PLATFORM is not set
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@ -699,6 +701,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536
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# CONFIG_BLK_DEV_XIP is not set
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# CONFIG_CDROM_PKTCDVD is not set
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# CONFIG_ATA_OVER_ETH is not set
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# CONFIG_MG_DISK is not set
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# CONFIG_BLK_DEV_RBD is not set
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# CONFIG_SENSORS_LIS3LV02D is not set
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CONFIG_MISC_DEVICES=y
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@ -717,6 +720,7 @@ CONFIG_MISC_DEVICES=y
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#
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# Texas Instruments shared transport line discipline
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#
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# CONFIG_TI_ST is not set
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CONFIG_HAVE_IDE=y
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# CONFIG_IDE is not set
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@ -795,6 +799,7 @@ CONFIG_PHYLIB=y
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# CONFIG_MICREL_PHY is not set
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CONFIG_FIXED_PHY=y
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CONFIG_MDIO_BITBANG=y
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# CONFIG_MDIO_GPIO is not set
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CONFIG_NET_ETHERNET=y
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CONFIG_HIETH_SWITCH_FABRIC=y
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CONFIG_HIETH_TAG=0x726d6d73
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@ -997,6 +1002,36 @@ CONFIG_SERIAL_CORE_CONSOLE=y
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#
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# Enable Device Drivers -> PPS to see the PTP clock options.
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#
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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#
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# Memory mapped GPIO drivers:
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#
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# CONFIG_GPIO_BASIC_MMIO is not set
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# CONFIG_GPIO_IT8761E is not set
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CONFIG_GPIO_PL061=y
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#
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# I2C GPIO expanders:
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#
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#
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# PCI GPIO expanders:
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#
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#
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# SPI GPIO expanders:
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#
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#
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# AC97 GPIO expanders:
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#
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#
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# MODULbus GPIO expanders:
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#
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# CONFIG_W1 is not set
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# CONFIG_POWER_SUPPLY is not set
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# CONFIG_HWMON is not set
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@ -1177,6 +1212,7 @@ CONFIG_USB_STORAGE=y
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#
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# OTG and related infrastructure
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#
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# CONFIG_USB_GPIO_VBUS is not set
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# CONFIG_USB_ULPI is not set
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# CONFIG_NOP_USB_XCEIV is not set
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CONFIG_MMC=y
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@ -1217,6 +1253,8 @@ CONFIG_LEDS_CLASS=y
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#
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# LED drivers
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#
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# CONFIG_LEDS_GPIO is not set
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# CONFIG_LEDS_LT3593 is not set
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# CONFIG_LEDS_TRIGGERS is not set
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#
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@ -0,0 +1,330 @@
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diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
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index bbb69e4..6956c1e 100644
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -953,6 +953,7 @@ config ARCH_HI3518
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select HAVE_SCHED_CLOCK
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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+ select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARCH_HAS_CPUFREQ
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help
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This enables support for Hisilicon hi3518 platform.
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diff --git a/arch/arm/Makefile b/arch/arm/Makefile
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index c3ec52c..c81e1a5 100644
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--- a/arch/arm/Makefile
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+++ b/arch/arm/Makefile
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@@ -21,6 +21,10 @@ GZFLAGS :=-9
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# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
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KBUILD_CFLAGS +=$(call cc-option,-marm,)
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+# Disable reading and writing of 16- and 32- bit values from address that
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+# are not 16- or 32- bit aligned
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+KBUILD_CFLAGS += $(call cc-option,-mno-unaligned-access)
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+
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# Never generate .eh_frame
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KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm)
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diff --git a/arch/arm/mach-hi3518/core.c b/arch/arm/mach-hi3518/core.c
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index 0196da1..ee31515 100644
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--- a/arch/arm/mach-hi3518/core.c
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+++ b/arch/arm/mach-hi3518/core.c
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@@ -6,6 +6,7 @@
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#include <linux/interrupt.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/clcd.h>
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+#include <linux/amba/pl061.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/cnt32_to_63.h>
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@@ -347,19 +348,115 @@ struct sys_timer hi3518_timer = {
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}, \
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.res = { \
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.start = base##_BASE, \
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- .end = base##_BASE + 0x10000 - 1, \
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+ .end = base##_BASE + 0x1000 - 1, \
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.flags = IORESOURCE_IO, \
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}, \
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.dma_mask = ~0, \
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.irq = { base##_IRQ, NO_IRQ } \
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}
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-HIL_AMBA_DEVICE(uart0, "uart:0", UART0, NULL);
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-HIL_AMBA_DEVICE(uart1, "uart:1", UART1, NULL);
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+#if defined(CONFIG_GPIO_PL061) || defined(CONFIG_GPIO_PL061_MODULE)
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+static struct pl061_platform_data gpio0_plat_data = {
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+ .gpio_base = 0,
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+ .irq_base = GPIO0_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio1_plat_data = {
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+ .gpio_base = 8,
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+ .irq_base = GPIO1_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio2_plat_data = {
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+ .gpio_base = 16,
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+ .irq_base = GPIO2_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio3_plat_data = {
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+ .gpio_base = 24,
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+ .irq_base = GPIO3_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio4_plat_data = {
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+ .gpio_base = 32,
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+ .irq_base = GPIO4_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio5_plat_data = {
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+ .gpio_base = 40,
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+ .irq_base = GPIO5_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio6_plat_data = {
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+ .gpio_base = 48,
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+ .irq_base = GPIO6_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio7_plat_data = {
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+ .gpio_base = 56,
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+ .irq_base = GPIO7_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio8_plat_data = {
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+ .gpio_base = 64,
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+ .irq_base = GPIO8_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio9_plat_data = {
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+ .gpio_base = 72,
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+ .irq_base = GPIO9_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio10_plat_data = {
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+ .gpio_base = 80,
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+ .irq_base = GPIO10_IRQ_START,
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+};
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+
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+static struct pl061_platform_data gpio11_plat_data = {
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+ .gpio_base = 88,
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+ .irq_base = GPIO11_IRQ_START,
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+};
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+#endif
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+
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+HIL_AMBA_DEVICE(uart0, "uart:0", UART0, NULL);
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+HIL_AMBA_DEVICE(uart1, "uart:1", UART1, NULL);
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+#if defined(CONFIG_ARM_SP805_WATCHDOG) || defined(CONFIG_ARM_SP805_WATCHDOG_MODULE)
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+HIL_AMBA_DEVICE(wdog, "dev:wdog", WDG, NULL);
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+#endif
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+#if defined(CONFIG_GPIO_PL061) || defined(CONFIG_GPIO_PL061_MODULE)
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+HIL_AMBA_DEVICE(gpio0, "dev:gpio0", GPIO0, &gpio0_plat_data);
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+HIL_AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
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+HIL_AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
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+HIL_AMBA_DEVICE(gpio3, "dev:gpio3", GPIO3, &gpio3_plat_data);
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+HIL_AMBA_DEVICE(gpio4, "dev:gpio4", GPIO4, &gpio4_plat_data);
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+HIL_AMBA_DEVICE(gpio5, "dev:gpio5", GPIO5, &gpio5_plat_data);
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+HIL_AMBA_DEVICE(gpio6, "dev:gpio6", GPIO6, &gpio6_plat_data);
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+HIL_AMBA_DEVICE(gpio7, "dev:gpio7", GPIO7, &gpio7_plat_data);
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+HIL_AMBA_DEVICE(gpio8, "dev:gpio8", GPIO8, &gpio8_plat_data);
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+HIL_AMBA_DEVICE(gpio9, "dev:gpio9", GPIO9, &gpio9_plat_data);
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+HIL_AMBA_DEVICE(gpio10, "dev:gpio10", GPIO10, &gpio10_plat_data);
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+HIL_AMBA_DEVICE(gpio11, "dev:gpio11", GPIO11, &gpio11_plat_data);
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+#endif
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static struct amba_device *amba_devs[] __initdata = {
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&HIL_AMBADEV_NAME(uart0),
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&HIL_AMBADEV_NAME(uart1),
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+#if defined(CONFIG_ARM_SP805_WATCHDOG) || defined(CONFIG_ARM_SP805_WATCHDOG_MODULE)
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+ &HIL_AMBADEV_NAME(wdog),
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+#endif
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+#if defined(CONFIG_GPIO_PL061) || defined(CONFIG_GPIO_PL061_MODULE)
|
||||
+ &HIL_AMBADEV_NAME(gpio0),
|
||||
+ &HIL_AMBADEV_NAME(gpio1),
|
||||
+ &HIL_AMBADEV_NAME(gpio2),
|
||||
+ &HIL_AMBADEV_NAME(gpio3),
|
||||
+ &HIL_AMBADEV_NAME(gpio4),
|
||||
+ &HIL_AMBADEV_NAME(gpio5),
|
||||
+ &HIL_AMBADEV_NAME(gpio6),
|
||||
+ &HIL_AMBADEV_NAME(gpio7),
|
||||
+ &HIL_AMBADEV_NAME(gpio8),
|
||||
+ &HIL_AMBADEV_NAME(gpio9),
|
||||
+ &HIL_AMBADEV_NAME(gpio10),
|
||||
+ &HIL_AMBADEV_NAME(gpio11),
|
||||
+#endif
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -369,6 +466,18 @@ static struct clk uart_clk = {
|
||||
.rate = 3000000,
|
||||
};
|
||||
|
||||
+#if defined(CONFIG_ARM_SP805_WATCHDOG) || defined(CONFIG_ARM_SP805_WATCHDOG_MODULE)
|
||||
+static struct clk wdog_clk = {
|
||||
+ .rate = 3000000,
|
||||
+};
|
||||
+#endif
|
||||
+
|
||||
+#if defined(CONFIG_GPIO_PL061) || defined(CONFIG_GPIO_PL061_MODULE)
|
||||
+static struct clk gpio_clk = {
|
||||
+ .rate = CONFIG_DEFAULT_BUSCLK,
|
||||
+};
|
||||
+#endif
|
||||
+
|
||||
static struct clk_lookup lookups[] = {
|
||||
{ /* UART0 */
|
||||
.dev_id = "uart:0",
|
||||
@@ -378,6 +487,62 @@ static struct clk_lookup lookups[] = {
|
||||
.dev_id = "uart:1",
|
||||
.clk = &uart_clk,
|
||||
},
|
||||
+#if defined(CONFIG_ARM_SP805_WATCHDOG) || defined(CONFIG_ARM_SP805_WATCHDOG_MODULE)
|
||||
+ { /* WDOG */
|
||||
+ .dev_id = "dev:wdog",
|
||||
+ .clk = &wdog_clk,
|
||||
+ },
|
||||
+#endif
|
||||
+#if defined(CONFIG_GPIO_PL061) || defined(CONFIG_GPIO_PL061_MODULE)
|
||||
+ { /* GPIO0 */
|
||||
+ .dev_id = "dev:gpio0",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO1 */
|
||||
+ .dev_id = "dev:gpio1",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO2 */
|
||||
+ .dev_id = "dev:gpio2",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO3 */
|
||||
+ .dev_id = "dev:gpio3",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO4 */
|
||||
+ .dev_id = "dev:gpio4",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO5 */
|
||||
+ .dev_id = "dev:gpio5",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO6 */
|
||||
+ .dev_id = "dev:gpio6",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO7 */
|
||||
+ .dev_id = "dev:gpio7",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO8 */
|
||||
+ .dev_id = "dev:gpio8",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO9 */
|
||||
+ .dev_id = "dev:gpio9",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO10 */
|
||||
+ .dev_id = "dev:gpio10",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+ { /* GPIO11 */
|
||||
+ .dev_id = "dev:gpio11",
|
||||
+ .clk = &gpio_clk,
|
||||
+ },
|
||||
+#endif
|
||||
};
|
||||
|
||||
void __init hi3518_init(void)
|
||||
diff --git a/arch/arm/mach-hi3518/include/mach/irqs.h b/arch/arm/mach-hi3518/include/mach/irqs.h
|
||||
index d1c9b09..3d6a2f2 100644
|
||||
--- a/arch/arm/mach-hi3518/include/mach/irqs.h
|
||||
+++ b/arch/arm/mach-hi3518/include/mach/irqs.h
|
||||
@@ -3,12 +3,52 @@
|
||||
|
||||
#define HI3518_IRQ_START (0)
|
||||
|
||||
+#define WDG_IRQ (HI3518_IRQ_START + 1)
|
||||
+#define RTC_IRQ (HI3518_IRQ_START + 2)
|
||||
#define TIMER01_IRQ (HI3518_IRQ_START + 3)
|
||||
#define TIMER23_IRQ (HI3518_IRQ_START + 4)
|
||||
#define UART0_IRQ (HI3518_IRQ_START + 5)
|
||||
#define UART1_IRQ (HI3518_IRQ_START + 5)
|
||||
+#define DMAC_IRQ (HI3518_IRQ_START + 14)
|
||||
#define UART2_IRQ (HI3518_IRQ_START + 25)
|
||||
+#define GPIO0_IRQ (HI3518_IRQ_START + 29)
|
||||
+#define GPIO1_IRQ (HI3518_IRQ_START + 29)
|
||||
+#define GPIO2_IRQ (HI3518_IRQ_START + 29)
|
||||
+#define GPIO3_IRQ (HI3518_IRQ_START + 30)
|
||||
+#define GPIO4_IRQ (HI3518_IRQ_START + 30)
|
||||
+#define GPIO5_IRQ (HI3518_IRQ_START + 30)
|
||||
+#define GPIO6_IRQ (HI3518_IRQ_START + 31)
|
||||
+#define GPIO7_IRQ (HI3518_IRQ_START + 31)
|
||||
+#define GPIO8_IRQ (HI3518_IRQ_START + 31)
|
||||
+#define GPIO9_IRQ (HI3518_IRQ_START + 31)
|
||||
+#define GPIO10_IRQ (HI3518_IRQ_START + 30)
|
||||
+#define GPIO11_IRQ (HI3518_IRQ_START + 29)
|
||||
|
||||
-#define NR_IRQS (HI3518_IRQ_START + 32)
|
||||
+#define GPIO0_IRQ_START (HI3518_IRQ_START + 32)
|
||||
+#define GPIO0_IRQ_END (GPIO0_IRQ_START + 7)
|
||||
+#define GPIO1_IRQ_START (GPIO0_IRQ_END + 1)
|
||||
+#define GPIO1_IRQ_END (GPIO1_IRQ_START + 7)
|
||||
+#define GPIO2_IRQ_START (GPIO1_IRQ_END + 1)
|
||||
+#define GPIO2_IRQ_END (GPIO2_IRQ_START + 7)
|
||||
+#define GPIO3_IRQ_START (GPIO2_IRQ_END + 1)
|
||||
+#define GPIO3_IRQ_END (GPIO3_IRQ_START + 7)
|
||||
+#define GPIO4_IRQ_START (GPIO3_IRQ_END + 1)
|
||||
+#define GPIO4_IRQ_END (GPIO4_IRQ_START + 7)
|
||||
+#define GPIO5_IRQ_START (GPIO4_IRQ_END + 1)
|
||||
+#define GPIO5_IRQ_END (GPIO5_IRQ_START + 7)
|
||||
+#define GPIO6_IRQ_START (GPIO5_IRQ_END + 1)
|
||||
+#define GPIO6_IRQ_END (GPIO6_IRQ_START + 7)
|
||||
+#define GPIO7_IRQ_START (GPIO6_IRQ_END + 1)
|
||||
+#define GPIO7_IRQ_END (GPIO7_IRQ_START + 7)
|
||||
+#define GPIO8_IRQ_START (GPIO7_IRQ_END + 1)
|
||||
+#define GPIO8_IRQ_END (GPIO8_IRQ_START + 7)
|
||||
+#define GPIO9_IRQ_START (GPIO8_IRQ_END + 1)
|
||||
+#define GPIO9_IRQ_END (GPIO9_IRQ_START + 7)
|
||||
+#define GPIO10_IRQ_START (GPIO9_IRQ_END + 1)
|
||||
+#define GPIO10_IRQ_END (GPIO10_IRQ_START + 7)
|
||||
+#define GPIO11_IRQ_START (GPIO10_IRQ_END + 1)
|
||||
+#define GPIO11_IRQ_END (GPIO11_IRQ_START + 7)
|
||||
+
|
||||
+#define NR_IRQS (GPIO11_IRQ_END + 1)
|
||||
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-hi3518/include/mach/platform.h b/arch/arm/mach-hi3518/include/mach/platform.h
|
||||
index 45ae3df..227a9c7 100644
|
||||
--- a/arch/arm/mach-hi3518/include/mach/platform.h
|
||||
+++ b/arch/arm/mach-hi3518/include/mach/platform.h
|
||||
@@ -4,6 +4,18 @@
|
||||
#include <mach/io.h>
|
||||
|
||||
#define DDR_BASE 0x80000000
|
||||
+#define GPIO11_BASE 0x201F0000
|
||||
+#define GPIO10_BASE 0x201E0000
|
||||
+#define GPIO9_BASE 0x201D0000
|
||||
+#define GPIO8_BASE 0x201C0000
|
||||
+#define GPIO7_BASE 0x201B0000
|
||||
+#define GPIO6_BASE 0x201A0000
|
||||
+#define GPIO5_BASE 0x20190000
|
||||
+#define GPIO4_BASE 0x20180000
|
||||
+#define GPIO3_BASE 0x20170000
|
||||
+#define GPIO2_BASE 0x20160000
|
||||
+#define GPIO1_BASE 0x20150000
|
||||
+#define GPIO0_BASE 0x20140000
|
||||
#define DDRC_BASE 0x20110000
|
||||
#define IOCONFIG_BASE 0x200F0000
|
||||
#define UART2_BASE 0x200A0000
|
||||
--- a/arch/arm/mach-hi3518/include/mach/gpio.h
|
||||
+++ b/arch/arm/mach-hi3518/include/mach/gpio.h
|
||||
@@ -0,0 +1,6 @@
|
||||
+#include <asm-generic/gpio.h>
|
||||
+
|
||||
+#define gpio_get_value __gpio_get_value
|
||||
+#define gpio_set_value __gpio_set_value
|
||||
+#define gpio_cansleep __gpio_cansleep
|
||||
+#define gpio_to_irq __gpio_to_irq
|
||||
Loading…
Reference in New Issue