mirror of https://github.com/OpenIPC/firmware.git
183 lines
6.4 KiB
Diff
183 lines
6.4 KiB
Diff
diff -drupN a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
|
|
--- a/arch/arm/kernel/topology.c 2018-08-06 17:23:04.000000000 +0300
|
|
+++ b/arch/arm/kernel/topology.c 2022-06-12 05:28:14.000000000 +0300
|
|
@@ -42,7 +42,7 @@
|
|
*/
|
|
static DEFINE_PER_CPU(unsigned long, cpu_scale) = SCHED_CAPACITY_SCALE;
|
|
|
|
-unsigned long arch_scale_cpu_capacity(struct sched_domain *sd, int cpu)
|
|
+unsigned long scale_cpu_capacity(struct sched_domain *sd, int cpu)
|
|
{
|
|
return per_cpu(cpu_scale, cpu);
|
|
}
|
|
@@ -153,6 +153,8 @@ static void __init parse_dt_topology(voi
|
|
|
|
}
|
|
|
|
+static const struct sched_group_energy * const cpu_core_energy(int cpu);
|
|
+
|
|
/*
|
|
* Look for a customed capacity of a CPU in the cpu_capacity table during the
|
|
* boot. The update of all CPUs is in O(n^2) for heteregeneous system but the
|
|
@@ -160,10 +162,14 @@ static void __init parse_dt_topology(voi
|
|
*/
|
|
static void update_cpu_capacity(unsigned int cpu)
|
|
{
|
|
- if (!cpu_capacity(cpu))
|
|
- return;
|
|
+ unsigned long capacity = SCHED_CAPACITY_SCALE;
|
|
|
|
- set_capacity_scale(cpu, cpu_capacity(cpu) / middle_capacity);
|
|
+ if (cpu_core_energy(cpu)) {
|
|
+ int max_cap_idx = cpu_core_energy(cpu)->nr_cap_states - 1;
|
|
+ capacity = cpu_core_energy(cpu)->cap_states[max_cap_idx].cap;
|
|
+ }
|
|
+
|
|
+ set_capacity_scale(cpu, capacity);
|
|
|
|
pr_info("CPU%u: update cpu_capacity %lu\n",
|
|
cpu, arch_scale_cpu_capacity(NULL, cpu));
|
|
@@ -275,17 +281,138 @@ void store_cpu_topology(unsigned int cpu
|
|
cpu_topology[cpuid].socket_id, mpidr);
|
|
}
|
|
|
|
+/*
|
|
+ * ARM TC2 specific energy cost model data. There are no unit requirements for
|
|
+ * the data. Data can be normalized to any reference point, but the
|
|
+ * normalization must be consistent. That is, one bogo-joule/watt must be the
|
|
+ * same quantity for all data, but we don't care what it is.
|
|
+ */
|
|
+static struct idle_state idle_states_cluster_a7[] = {
|
|
+ { .power = 25 }, /* arch_cpu_idle() (active idle) = WFI */
|
|
+ { .power = 25 }, /* WFI */
|
|
+ { .power = 10 }, /* cluster-sleep-l */
|
|
+ };
|
|
+
|
|
+static struct idle_state idle_states_cluster_a15[] = {
|
|
+ { .power = 70 }, /* arch_cpu_idle() (active idle) = WFI */
|
|
+ { .power = 70 }, /* WFI */
|
|
+ { .power = 25 }, /* cluster-sleep-b */
|
|
+ };
|
|
+
|
|
+static struct capacity_state cap_states_cluster_a7[] = {
|
|
+ /* Cluster only power */
|
|
+ { .cap = 150, .power = 2967, }, /* 350 MHz */
|
|
+ { .cap = 172, .power = 2792, }, /* 400 MHz */
|
|
+ { .cap = 215, .power = 2810, }, /* 500 MHz */
|
|
+ { .cap = 258, .power = 2815, }, /* 600 MHz */
|
|
+ { .cap = 301, .power = 2919, }, /* 700 MHz */
|
|
+ { .cap = 344, .power = 2847, }, /* 800 MHz */
|
|
+ { .cap = 387, .power = 3917, }, /* 900 MHz */
|
|
+ { .cap = 430, .power = 4905, }, /* 1000 MHz */
|
|
+ };
|
|
+
|
|
+static struct capacity_state cap_states_cluster_a15[] = {
|
|
+ /* Cluster only power */
|
|
+ { .cap = 426, .power = 7920, }, /* 500 MHz */
|
|
+ { .cap = 512, .power = 8165, }, /* 600 MHz */
|
|
+ { .cap = 597, .power = 8172, }, /* 700 MHz */
|
|
+ { .cap = 682, .power = 8195, }, /* 800 MHz */
|
|
+ { .cap = 768, .power = 8265, }, /* 900 MHz */
|
|
+ { .cap = 853, .power = 8446, }, /* 1000 MHz */
|
|
+ { .cap = 938, .power = 11426, }, /* 1100 MHz */
|
|
+ { .cap = 1024, .power = 15200, }, /* 1200 MHz */
|
|
+ };
|
|
+
|
|
+static struct sched_group_energy energy_cluster_a7 = {
|
|
+ .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a7),
|
|
+ .idle_states = idle_states_cluster_a7,
|
|
+ .nr_cap_states = ARRAY_SIZE(cap_states_cluster_a7),
|
|
+ .cap_states = cap_states_cluster_a7,
|
|
+};
|
|
+
|
|
+static struct sched_group_energy energy_cluster_a15 = {
|
|
+ .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a15),
|
|
+ .idle_states = idle_states_cluster_a15,
|
|
+ .nr_cap_states = ARRAY_SIZE(cap_states_cluster_a15),
|
|
+ .cap_states = cap_states_cluster_a15,
|
|
+};
|
|
+
|
|
+static struct idle_state idle_states_core_a7[] = {
|
|
+ { .power = 0 }, /* arch_cpu_idle (active idle) = WFI */
|
|
+ { .power = 0 }, /* WFI */
|
|
+ { .power = 0 }, /* cluster-sleep-l */
|
|
+ };
|
|
+
|
|
+static struct idle_state idle_states_core_a15[] = {
|
|
+ { .power = 0 }, /* arch_cpu_idle (active idle) = WFI */
|
|
+ { .power = 0 }, /* WFI */
|
|
+ { .power = 0 }, /* cluster-sleep-b */
|
|
+ };
|
|
+
|
|
+static struct capacity_state cap_states_core_a7[] = {
|
|
+ /* Power per cpu */
|
|
+ { .cap = 150, .power = 187, }, /* 350 MHz */
|
|
+ { .cap = 172, .power = 275, }, /* 400 MHz */
|
|
+ { .cap = 215, .power = 334, }, /* 500 MHz */
|
|
+ { .cap = 258, .power = 407, }, /* 600 MHz */
|
|
+ { .cap = 301, .power = 447, }, /* 700 MHz */
|
|
+ { .cap = 344, .power = 549, }, /* 800 MHz */
|
|
+ { .cap = 387, .power = 761, }, /* 900 MHz */
|
|
+ { .cap = 430, .power = 1024, }, /* 1000 MHz */
|
|
+ };
|
|
+
|
|
+static struct capacity_state cap_states_core_a15[] = {
|
|
+ /* Power per cpu */
|
|
+ { .cap = 426, .power = 2021, }, /* 500 MHz */
|
|
+ { .cap = 512, .power = 2312, }, /* 600 MHz */
|
|
+ { .cap = 597, .power = 2756, }, /* 700 MHz */
|
|
+ { .cap = 682, .power = 3125, }, /* 800 MHz */
|
|
+ { .cap = 768, .power = 3524, }, /* 900 MHz */
|
|
+ { .cap = 853, .power = 3846, }, /* 1000 MHz */
|
|
+ { .cap = 938, .power = 5177, }, /* 1100 MHz */
|
|
+ { .cap = 1024, .power = 6997, }, /* 1200 MHz */
|
|
+ };
|
|
+
|
|
+static struct sched_group_energy energy_core_a7 = {
|
|
+ .nr_idle_states = ARRAY_SIZE(idle_states_core_a7),
|
|
+ .idle_states = idle_states_core_a7,
|
|
+ .nr_cap_states = ARRAY_SIZE(cap_states_core_a7),
|
|
+ .cap_states = cap_states_core_a7,
|
|
+};
|
|
+
|
|
+static struct sched_group_energy energy_core_a15 = {
|
|
+ .nr_idle_states = ARRAY_SIZE(idle_states_core_a15),
|
|
+ .idle_states = idle_states_core_a15,
|
|
+ .nr_cap_states = ARRAY_SIZE(cap_states_core_a15),
|
|
+ .cap_states = cap_states_core_a15,
|
|
+};
|
|
+
|
|
+/* sd energy functions */
|
|
+static inline
|
|
+const struct sched_group_energy * const cpu_cluster_energy(int cpu)
|
|
+{
|
|
+ return cpu_topology[cpu].socket_id ? &energy_cluster_a7 :
|
|
+ &energy_cluster_a15;
|
|
+}
|
|
+
|
|
+static inline
|
|
+const struct sched_group_energy * const cpu_core_energy(int cpu)
|
|
+{
|
|
+ return cpu_topology[cpu].socket_id ? &energy_core_a7 :
|
|
+ &energy_core_a15;
|
|
+}
|
|
+
|
|
static inline int cpu_corepower_flags(void)
|
|
{
|
|
- return SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN;
|
|
+ return SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN | \
|
|
+ SD_SHARE_CAP_STATES;
|
|
}
|
|
|
|
static struct sched_domain_topology_level arm_topology[] = {
|
|
#ifdef CONFIG_SCHED_MC
|
|
- { cpu_corepower_mask, cpu_corepower_flags, SD_INIT_NAME(GMC) },
|
|
- { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
|
|
+ { cpu_coregroup_mask, cpu_corepower_flags, cpu_core_energy, SD_INIT_NAME(MC) },
|
|
#endif
|
|
- { cpu_cpu_mask, SD_INIT_NAME(DIE) },
|
|
+ { cpu_cpu_mask, NULL, cpu_cluster_energy, SD_INIT_NAME(DIE) },
|
|
{ NULL, },
|
|
};
|
|
|