mirror of https://github.com/OpenIPC/firmware.git
505 lines
18 KiB
C
505 lines
18 KiB
C
/******************************************************************************
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Copyright (C), 2015-2020, XM. Co., Ltd.
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******************************************************************************
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File Name : xm520_isp.h
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Version : Initial Draft
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Author : XM Isp software group
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Created : 2016/6/18
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Description : The common data type defination
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Function List :
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History :
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1.Date : 2016/6/18
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Author : Ganwencao
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Modification : creat
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******************************************************************************/
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#ifndef _XM520_REG_
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#define _XM520_REG_
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#define DDR_BASE_ADDR (0x80000000)
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//pre_video
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#define VIDOEMODE_BASE 0x40000000
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#define VIDOEMODE_DECODE_SEL (VIDOEMODE_BASE+0x000)
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#define VIDOEMODE_SLA_MAT_SEL (VIDOEMODE_BASE+0x004)
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#define VIDOEMODE_DEC_DATA_SEL (VIDOEMODE_BASE+0x008)
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// DPC
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#define SDPC_BASE 0x40003000
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#define SDPC_CLK_SW (SDPC_BASE+0x000)
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#define SDPC_SRAMADDR_CLR (SDPC_BASE+0x004)
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#define SDPC_SRAMADDR_DAT (SDPC_BASE+0x008)
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#define SDPC_TEST_ENABLE (SDPC_BASE+0x00C)
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#define DDPC_BASE 0x40023000
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#define DDPC_MAX_THD (DDPC_BASE+0x000)
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#define DDPC_MIN_THD (DDPC_BASE+0x004)
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#define DDPC_DIFF_THD1 (DDPC_BASE+0x008)
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#define DDPC_DIFF_THD2 (DDPC_BASE+0x00C)
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// BlackLevel
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#define BLACKLEVEL_BASE 0x40004000
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#define BLACKLEVEL_OFFSET_R (BLACKLEVEL_BASE+0x000)
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#define BLACKLEVEL_OFFSET_G (BLACKLEVEL_BASE+0x004)
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#define BLACKLEVEL_OFFSET_B (BLACKLEVEL_BASE+0x008)
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#define BLACKLEVEL_RGB_MAX (BLACKLEVEL_BASE+0x00C)
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#define BLACKLEVEL_RGB_MIN (BLACKLEVEL_BASE+0x010)
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// DIGTAL_GAIN
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#define DIGITAL_GAIN (0x40005000+0x000)
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//LSC
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#define LSC_BASE 0x40006000
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#define LSC_CTRL (LSC_BASE+0x000)
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//AWB
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#define AWB_BASE (0x40010000)
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#define AWB_FRONTGAIN_R (AWB_BASE+0x0000)
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#define AWB_FRONTGAIN_G (AWB_BASE+0x0004)
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#define AWB_FRONTGAIN_B (AWB_BASE+0x0008)
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#define AWB_RGBMAX_REG (AWB_BASE+0x000C)
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#define AWB_RGBMIN_REG (AWB_BASE+0x0010)
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#define AWB_WDW_PIXL0 (AWB_BASE+0x1000)
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#define AWB_WDW_PIXL1 (AWB_BASE+0x1004)
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#define AWB_WDW_PIXL2 (AWB_BASE+0x1008)
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#define AWB_WDW_PIXL3 (AWB_BASE+0x100C)
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#define AWB_WDW_PIXL4 (AWB_BASE+0x1010)
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#define AWB_WDW_PIXL5 (AWB_BASE+0x1014)
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#define AWB_WDW_PIXL6 (AWB_BASE+0x1018)
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#define AWB_WDW_PIXL7 (AWB_BASE+0x101C)
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#define AWB_WDW_PIXL8 (AWB_BASE+0x1020)
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#define AWB_WDW_PIXL9 (AWB_BASE+0x1024)
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#define AWB_WDW_PIXL10 (AWB_BASE+0x1028)
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#define AWB_WDW_PIXL11 (AWB_BASE+0x102C)
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#define AWB_WDW_PIXL12 (AWB_BASE+0x1030)
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#define AWB_WDW_PIXL13 (AWB_BASE+0x1034)
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#define AWB_WDW_PIXL14 (AWB_BASE+0x1038)
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#define AWB_WDW_PIXL15 (AWB_BASE+0x103C)
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#define AWB_WDW_PIXL16 (AWB_BASE+0x1040)
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#define AWB_WDW_PIXL17 (AWB_BASE+0x1044)
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#define AWB_WDW_PIXL18 (AWB_BASE+0x1048)
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#define AWB_WDW_PIXL19 (AWB_BASE+0x104C)
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#define AWB_WDW_PIXL20 (AWB_BASE+0x1050)
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#define AWB_WDW_PIXL21 (AWB_BASE+0x1054)
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#define AWB_WDW_PIXL22 (AWB_BASE+0x1058)
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#define AWB_WDW_PIXL23 (AWB_BASE+0x105C)
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#define AWB_WDW_PIXL24 (AWB_BASE+0x1060)
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#define AWB_WDW_PIXL25 (AWB_BASE+0x1064)
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#define AWB_WDW_PIXL26 (AWB_BASE+0x1068)
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#define AWB_WDW_PIXL27 (AWB_BASE+0x106C)
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#define AWB_WDW_PIXL28 (AWB_BASE+0x1070)
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#define AWB_WDW_PIXL29 (AWB_BASE+0x1074)
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#define AWB_WDW_PIXL30 (AWB_BASE+0x1078)
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#define AWB_WDW_PIXL31 (AWB_BASE+0x107C)
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#define AWB_WDW_PIXL32 (AWB_BASE+0x1080)
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#define AWB_WDW_LINE0 (AWB_BASE+0x10C0)
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#define AWB_WDW_LINE1 (AWB_BASE+0x10C4)
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#define AWB_WDW_LINE2 (AWB_BASE+0x10C8)
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#define AWB_WDW_LINE3 (AWB_BASE+0x10CC)
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#define AWB_WDW_LINE4 (AWB_BASE+0x10D0)
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#define AWB_WDW_LINE5 (AWB_BASE+0x10D4)
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#define AWB_WDW_LINE6 (AWB_BASE+0x10D8)
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#define AWB_WDW_LINE7 (AWB_BASE+0x10DC)
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#define AWB_WDW_LINE8 (AWB_BASE+0x10E0)
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#define AWB_WDW_LINE9 (AWB_BASE+0x10E4)
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#define AWB_WDW_LINE10 (AWB_BASE+0x10E8)
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#define AWB_WDW_LINE11 (AWB_BASE+0x10EC)
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#define AWB_WDW_LINE12 (AWB_BASE+0x10F0)
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#define AWB_WDW_LINE13 (AWB_BASE+0x10F4)
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#define AWB_WDW_LINE14 (AWB_BASE+0x10F8)
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#define AWB_WDW_LINE15 (AWB_BASE+0x10FC)
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#define AWB_WDW_LINE16 (AWB_BASE+0x1100)
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#define AWB_SRAM_ADDR_RC (AWB_BASE+0x1140)
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#define AWB_SRAM_RD_EN (AWB_BASE+0x1144)
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#define AWB_R_INTG (AWB_BASE+0x1148)
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#define AWB_G_INTG (AWB_BASE+0x114C)
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#define AWB_B_INTG (AWB_BASE+0x1150)
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#define AWB_HIST_RGB_SEL (AWB_BASE+0x2000)
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#define AWB_HIST_CNT0 (AWB_BASE+0x2040)
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#define AWB_HIST_CNT1 (AWB_BASE+0x2044)
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#define AWB_HIST_CNT2 (AWB_BASE+0x2048)
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#define AWB_HIST_CNT3 (AWB_BASE+0x204C)
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#define AWB_HIST_CNT4 (AWB_BASE+0x2050)
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#define AWB_HIST_CNT5 (AWB_BASE+0x2054)
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#define AWB_HIST_CNT6 (AWB_BASE+0x2058)
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#define AWB_HIST_CNT7 (AWB_BASE+0x205C)
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#define AWB_HIST_CNT8 (AWB_BASE+0x2060)
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#define AWB_HIST_CNT9 (AWB_BASE+0x2064)
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#define AWB_HIST_CNT10 (AWB_BASE+0x2068)
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#define AWB_HIST_CNT11 (AWB_BASE+0x206C)
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#define AWB_HIST_CNT12 (AWB_BASE+0x2070)
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#define AWB_HIST_CNT13 (AWB_BASE+0x2074)
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#define AWB_HIST_CNT14 (AWB_BASE+0x2078)
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#define AWB_HIST_CNT15 (AWB_BASE+0x207C)
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#define AWB_HIST_CNT16 (AWB_BASE+0x2080)
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#define AWB_HIST_CNT17 (AWB_BASE+0x2084)
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#define AWB_HIST_CNT18 (AWB_BASE+0x2088)
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#define AWB_HIST_CNT19 (AWB_BASE+0x208C)
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#define AWB_HIST_CNT20 (AWB_BASE+0x2090)
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#define AWB_HIST_CNT21 (AWB_BASE+0x2094)
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#define AWB_HIST_CNT22 (AWB_BASE+0x2098)
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#define AWB_HIST_CNT23 (AWB_BASE+0x209C)
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#define AWB_HIST_CNT24 (AWB_BASE+0x20A0)
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#define AWB_HIST_CNT25 (AWB_BASE+0x20A4)
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#define AWB_HIST_CNT26 (AWB_BASE+0x20A8)
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#define AWB_HIST_CNT27 (AWB_BASE+0x20AC)
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#define AWB_HIST_CNT28 (AWB_BASE+0x20B0)
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#define AWB_HIST_CNT29 (AWB_BASE+0x20B4)
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#define AWB_HIST_CNT30 (AWB_BASE+0x20B8)
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#define AWB_HIST_CNT31 (AWB_BASE+0x20BC)
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//NR_2D
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#define NR_2D_BASE 0x40020000
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#define NR_2D_THDL_REG (NR_2D_BASE + 0x000)
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#define NR_2D_THDH_REG (NR_2D_BASE + 0x004)
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#define NR_2D_COEF_REG (NR_2D_BASE + 0x008)
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#define NR_2D_GMIN_REG (NR_2D_BASE + 0x00C)
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#define NR_2D_DELTA_THD (NR_2D_BASE + 0x010)
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#define NR_2D_G_COEF1 (NR_2D_BASE + 0x014)
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#define NR_2D_G_COEF2 (NR_2D_BASE + 0x018)
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#define NR_2D_G_COEF3 (NR_2D_BASE + 0x01C)
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#define NR_2D_G_COEF4 (NR_2D_BASE + 0x020)
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#define NR_2D_RB_COEF1 (NR_2D_BASE + 0x024)
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#define NR_2D_RB_COEF2 (NR_2D_BASE + 0x028)
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#define NR_2D_RB_COEF3 (NR_2D_BASE + 0x02C)
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#define NR_2D_H_SEL (NR_2D_BASE + 0x030)
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#define NR_2D_FLT_EN (NR_2D_BASE + 0x034)
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//AF
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#define AF_BASE 0x40021000
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#define AF_WDW0_VBEGIN (AF_BASE + 0x000)
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#define AF_WDW0_VEND (AF_BASE + 0x004)
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#define AF_WDW0_HBEGIN (AF_BASE + 0x008)
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#define AF_WDW0_HEND (AF_BASE + 0x00C)
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#define AF_WDW0_HZ (AF_BASE + 0x094)
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#if 1 //XM520
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//NR_3D
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#define NR_3D_BASE 0x40040000
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#define NR_3D_DENOSIE_CTL (NR_3D_BASE + 0x000)
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#define NR_3D_ERR_SFT (NR_3D_BASE + 0x014)
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#define NR_3D_YFLD_SPACE (NR_3D_BASE + 0x030)
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#define NR_3D_BFLD_SPACE (NR_3D_BASE + 0x034)
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#define NR_3D_DFT_YSADDR0 (NR_3D_BASE + 0x038)
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#define NR_3D_DFT_ESADDR0 (NR_3D_BASE + 0x03C)
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#define NR_3D_DIG_E1 (NR_3D_BASE + 0x020)
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#define NR_3D_DIG_E2 (NR_3D_BASE + 0x024)
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#define NR_3D_DIG_E3 (NR_3D_BASE + 0x028)
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#define NR_3D_ERR_PAR (NR_3D_BASE + 0x040)
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#define NR_3D_BAYER_PAR (NR_3D_BASE + 0x050)
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#define NR_3D_DFT_BSADDR0 (NR_3D_BASE + 0x0A0)
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#define NR_3D_DFT_BSADDR1 (NR_3D_BASE + 0x0A4)
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#define NR_3D_DFT_BSADDR2 (NR_3D_BASE + 0x0A8)
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#define NR_3D_DFT_BSADDR3 (NR_3D_BASE + 0x0AC)
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#define NR_3D_DFT_BSADDR4 (NR_3D_BASE + 0x0B0)
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#define NR_3D_DFT_BSADDR5 (NR_3D_BASE + 0x0B4)
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#define NR_3D_DFT_BSADDR6 (NR_3D_BASE + 0x0B8)
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#define NR_3D_DFT_BSADDR7 (NR_3D_BASE + 0x0BC)
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#define NR_3D_DDR_BHNUM (NR_3D_BASE + 0x0C8)
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#define NR_3D_DDR_YHNUM (NR_3D_BASE + 0x0CC)
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#define NR_3D_DDR_EHNUM (NR_3D_BASE + 0x0D0)
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#define NR_3D_ACTIVE_HNUM (NR_3D_BASE + 0x0D4)
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#define NR_3D_ACTIVE_VNUM (NR_3D_BASE + 0x0D8)
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#define NR_3D_WINERR_HBEGIN (NR_3D_BASE + 0x120)
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#define NR_3D_WINERR_HEND (NR_3D_BASE + 0x124)
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#define NR_3D_WINERR_VBEGIN (NR_3D_BASE + 0x128)
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#define NR_3D_WINERR_VEND (NR_3D_BASE + 0x12C)
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#define NR_3D_WINERR_RSHIFT (NR_3D_BASE + 0x140)
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#define NR_3D_WINERR_LEVEL (NR_3D_BASE + 0x144)
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#define NR_3D_CHANGE_POINT (NR_3D_BASE + 0x148)
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#define NR_3D_FLT2D_PAR (NR_3D_BASE + 0x14C)
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#else// This is XM510 code,just for test
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//NR_3D
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#define NR_3D_BASE 0x40040000
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#define NR_3D_DENOSIE_CTL (NR_3D_BASE + 0x000)
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#define NR_3D_ERR_SFT (NR_3D_BASE + 0x014)
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#define NR_3D_NR_LEVEL (NR_3D_BASE + 0x018)
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#define NR_3D_YFLD_SPACE (NR_3D_BASE + 0x030)
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#define NR_3D_BFLD_SPACE (NR_3D_BASE + 0x034)
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#define NR_3D_DFT_YSADDR0 (NR_3D_BASE + 0x038)
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#define NR_3D_DFT_ESADDR0 (NR_3D_BASE + 0x03C)
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#define NR_3D_DIG_E1 (NR_3D_BASE + 0x020)
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#define NR_3D_DIG_E2 (NR_3D_BASE + 0x024)
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#define NR_3D_DIG_E3 (NR_3D_BASE + 0x028)
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#define NR_3D_ERR_PAR (NR_3D_BASE + 0x040)
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#define NR_3D_BAYER_PAR (NR_3D_BASE + 0x050)
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#define NR_3D_DDR_HNUM (NR_3D_BASE + 0x0D0)
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#define NR_3D_ACTIVE_HNUM (NR_3D_BASE + 0x0D4)
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#define NR_3D_YCTRL_ERR70 (NR_3D_BASE + 0x0D8)
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#define NR_3D_YCTRL_ERRF8 (NR_3D_BASE + 0x0DC)
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#define NR_3D_DFT_BSADDR0 (NR_3D_BASE + 0x0A0)
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#define NR_3D_DFT_BSADDR1 (NR_3D_BASE + 0x0A4)
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#define NR_3D_DFT_BSADDR2 (NR_3D_BASE + 0x0A8)
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#define NR_3D_DFT_BSADDR3 (NR_3D_BASE + 0x0AC)
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#define NR_3D_DFT_BSADDR4 (NR_3D_BASE + 0x0B0)
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#define NR_3D_DFT_BSADDR5 (NR_3D_BASE + 0x0B4)
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#define NR_3D_DFT_BSADDR6 (NR_3D_BASE + 0x0B8)
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#define NR_3D_DFT_BSADDR7 (NR_3D_BASE + 0x0BC)
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#define NR_3D_WINERR_HBEGIN (NR_3D_BASE + 0x120)
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#define NR_3D_WINERR_HEND (NR_3D_BASE + 0x124)
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#define NR_3D_WINERR_VBEGIN (NR_3D_BASE + 0x128)
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#define NR_3D_WINERR_VEND (NR_3D_BASE + 0x12C)
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#define NR_3D_WINERR_RSHIFT (NR_3D_BASE + 0x140)
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#define NR_3D_WINERR_LEVEL (NR_3D_BASE + 0x144)
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#define NR_3D_CHANGE_POINT (NR_3D_BASE + 0x148)
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#define NR_3D_FLT2D_PAR (NR_3D_BASE + 0x14C)
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#endif
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// Demosaic
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#define DEMOSAIC_BASE 0x40052000
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#define DEMOSAIC_G_HOFST (DEMOSAIC_BASE + 0x000)
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#define DEMOSAIC_DHV_OFST (DEMOSAIC_BASE + 0x004)
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#define DEMOSAIC_DHV_K (DEMOSAIC_BASE + 0x008)
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// CSM
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#define CSM_BASE 0x40060000
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#define CSM_RGB_MAX (CSM_BASE+0x000)
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#define CSM_RGB_MIN (CSM_BASE+0x004)
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#define CSM_R_OFST_REG (CSM_BASE+0x040)
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#define CSM_R1_COEF_REG (CSM_BASE+0x044)
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#define CSM_R2_COEF_REG (CSM_BASE+0x048)
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#define CSM_R3_COEF_REG (CSM_BASE+0x04C)
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#define CSM_G_OFST_REG (CSM_BASE+0x050)
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#define CSM_G1_COEF_REG (CSM_BASE+0x054)
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#define CSM_G2_COEF_REG (CSM_BASE+0x058)
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#define CSM_G3_COEF_REG (CSM_BASE+0x05C)
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#define CSM_B_OFST_REG (CSM_BASE+0x060)
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#define CSM_B1_COEF_REG (CSM_BASE+0x064)
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#define CSM_B2_COEF_REG (CSM_BASE+0x068)
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#define CSM_B3_COEF_REG (CSM_BASE+0x06C)
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// Gamma60
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#define GAMMA60_BASE 0x40061000
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#define GAMMA60_BUF_SW (GAMMA60_BASE+0x000)
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#define GAMMA60_BUF_SW_STATE (GAMMA60_BASE+0x004)
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#define GAMMA60_LINE0_DAT0 (GAMMA60_BASE+0x040)
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#define GAMMA60_LINE1_DAT0 (GAMMA60_BASE+0x140)
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// RGB2YC
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#define RGB2YC_BASE 0x00A62000
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// Demoire
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#define DEMOIRE_BASE 0x40063000
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#define DEMOIRE_V_THD (DEMOIRE_BASE+0x000)
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#define DEMOIRE_KV (DEMOIRE_BASE+0x004)
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#define DEMOIRE_DF_THD_MAX (DEMOIRE_BASE+0x008)
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#define DEMOIRE_DF_THD_MIN (DEMOIRE_BASE+0x00C)
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#define DEMOIRE_GAIN_MIN (DEMOIRE_BASE+0x010)
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#define DEMOIRE_KC (DEMOIRE_BASE+0x014)
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#define DEMOIRE_BYPASS (DEMOIRE_BASE+0x018)
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// CC
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#define CC_BASE 0x40071000
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#define CC_EN_REG (CC_BASE+0x000)
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#define CC_HUE_OFST (CC_BASE+0x018)
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#define CC_HS_TRAN_DAT0 (CC_BASE+0x0E4)
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#define CC_HS_TRAN_DAT1 (CC_BASE+0x0E8)
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#define CC_HH_H1_SATRT (CC_BASE+0x200)
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#define CC_HH_H1_END (CC_BASE+0x204)
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#define CC_HH_H1_MAX1 (CC_BASE+0x208)
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#define CC_HH_H1_MAX2 (CC_BASE+0x20C)
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#define CC_HH_H1_DMAX (CC_BASE+0x210)
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#define CC_HH_H1_K1 (CC_BASE+0x214)
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#define CC_HH_H1_K2 (CC_BASE+0x218)
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#define CC_HH_H2_SATRT (CC_BASE+0x21C)
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#define CC_HH_H2_END (CC_BASE+0x220)
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#define CC_HH_H2_MAX1 (CC_BASE+0x224)
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#define CC_HH_H2_MAX2 (CC_BASE+0x228)
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#define CC_HH_H2_DMAX (CC_BASE+0x22C)
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#define CC_HH_H2_K1 (CC_BASE+0x230)
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#define CC_HH_H2_K2 (CC_BASE+0x234)
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#define CC_HH_H3_SATRT (CC_BASE+0x240)
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#define CC_HH_H3_END (CC_BASE+0x244)
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#define CC_HH_H3_MAX1 (CC_BASE+0x248)
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#define CC_HH_H3_MAX2 (CC_BASE+0x24C)
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#define CC_HH_H3_DMAX (CC_BASE+0x250)
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#define CC_HH_H3_K1 (CC_BASE+0x254)
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#define CC_HH_H3_K2 (CC_BASE+0x258)
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#define CC_HH_H4_SATRT (CC_BASE+0x25C)
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#define CC_HH_H4_END (CC_BASE+0x260)
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#define CC_HH_H4_MAX1 (CC_BASE+0x264)
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#define CC_HH_H4_MAX2 (CC_BASE+0x268)
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#define CC_HH_H4_DMAX (CC_BASE+0x26C)
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#define CC_HH_H4_K1 (CC_BASE+0x270)
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#define CC_HH_H4_K2 (CC_BASE+0x274)
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#define CC_HH_H5_SATRT (CC_BASE+0x280)
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#define CC_HH_H5_END (CC_BASE+0x284)
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#define CC_HH_H5_MAX1 (CC_BASE+0x288)
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#define CC_HH_H5_MAX2 (CC_BASE+0x28C)
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#define CC_HH_H5_DMAX (CC_BASE+0x290)
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#define CC_HH_H5_K1 (CC_BASE+0x294)
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#define CC_HH_H5_K2 (CC_BASE+0x298)
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#define CC_HH_H6_SATRT (CC_BASE+0x29C)
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#define CC_HH_H6_END (CC_BASE+0x2A0)
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#define CC_HH_H6_MAX1 (CC_BASE+0x2A4)
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#define CC_HH_H6_MAX2 (CC_BASE+0x2A8)
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#define CC_HH_H6_DMAX (CC_BASE+0x2AC)
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#define CC_HH_H6_K1 (CC_BASE+0x2B0)
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#define CC_HH_H6_K2 (CC_BASE+0x2B4)
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// Y_Gamma
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#define YGAMMA_BASE 0x40072000
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#define YGAMMA_BUF_SW (YGAMMA_BASE+0x000)
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#define YGAMMA_BUF_SW_STATE (YGAMMA_BASE+0x004)
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#define YGAMMA_LINE0_DAT0 (YGAMMA_BASE+0x040)
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#define YGAMMA_LINE1_DAT0 (YGAMMA_BASE+0x180)
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//Y_hist
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#define YHIST_BASE (0x40073000)
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#define YHIST_CNT0 (YHIST_BASE+0x000)
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//C_tran
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#define CTRAN_BASE 0x40074000
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#define CTRAN_BUF_SW (CTRAN_BASE+0x000)
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#define CTRAN_BUF_SW_STATE (CTRAN_BASE+0x004)
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#define TRAN_LINE0_DAT0 (CTRAN_BASE+0x040)
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#define TRAN_LINE1_DAT0 (CTRAN_BASE+0x080)
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// Sharpness
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#define SHARPEN_BASE 0x40075000
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#define SHARPEN_YMTH1 (SHARPEN_BASE+0x000)
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#define SHARPEN_YMTH2 (SHARPEN_BASE+0x004)
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#define SHARPEN_YM_K (SHARPEN_BASE+0x008)
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#define SHARPEN_KM0 (SHARPEN_BASE+0x00C)
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#define SHARPEN_WM0 (SHARPEN_BASE+0x010)
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#define SHARPEN_WM1 (SHARPEN_BASE+0x014)
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#define SHARPEN_WM2 (SHARPEN_BASE+0x018)
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#define SHARPEN_WM3 (SHARPEN_BASE+0x01C)
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#define SHARPEN_WM4 (SHARPEN_BASE+0x020)
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#define SHARPEN_WM5 (SHARPEN_BASE+0x024)
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#define SHARPEN_YMDTH1 (SHARPEN_BASE+0x040)
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#define SHARPEN_YMDTH2 (SHARPEN_BASE+0x044)
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#define SHARPEN_YMD_K (SHARPEN_BASE+0x048)
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#define SHARPEN_KMD_MAX (SHARPEN_BASE+0x04C)
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#define SHARPEN_WMD0 (SHARPEN_BASE+0x050)
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#define SHARPEN_WMD1 (SHARPEN_BASE+0x054)
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#define SHARPEN_WMD2 (SHARPEN_BASE+0x058)
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#define SHARPEN_WMD3 (SHARPEN_BASE+0x05C)
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#define SHARPEN_WMD4 (SHARPEN_BASE+0x060)
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#define SHARPEN_WMD5 (SHARPEN_BASE+0x064)
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#define SHARPEN_YHTH1 (SHARPEN_BASE+0x080)
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#define SHARPEN_YHTH2 (SHARPEN_BASE+0x084)
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#define SHARPEN_YH_K (SHARPEN_BASE+0x088)
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#define SHARPEN_KH0 (SHARPEN_BASE+0x08C)
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#define SHARPEN_WH0 (SHARPEN_BASE+0x090)
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#define SHARPEN_WH1 (SHARPEN_BASE+0x094)
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#define SHARPEN_WH2 (SHARPEN_BASE+0x098)
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#define SHARPEN_WH3 (SHARPEN_BASE+0x09C)
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#define SHARPEN_WH4 (SHARPEN_BASE+0x0A0)
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#define SHARPEN_WH5 (SHARPEN_BASE+0x0A4)
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#define SHARPEN_YHDTH1 (SHARPEN_BASE+0x0C0)
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#define SHARPEN_YHDTH2 (SHARPEN_BASE+0x0C4)
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#define SHARPEN_YHD_K (SHARPEN_BASE+0x0C8)
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#define SHARPEN_KHD_MAX (SHARPEN_BASE+0x0CC)
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#define SHARPEN_WHD0 (SHARPEN_BASE+0x0D0)
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#define SHARPEN_WHD1 (SHARPEN_BASE+0x0D4)
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#define SHARPEN_WHD2 (SHARPEN_BASE+0x0D8)
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#define SHARPEN_WHD3 (SHARPEN_BASE+0x0DC)
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#define SHARPEN_WHD4 (SHARPEN_BASE+0x0E0)
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#define SHARPEN_WHD5 (SHARPEN_BASE+0x0E4)
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#define SHARPEN_KH00 (SHARPEN_BASE+0x100)
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#define SHARPEN_KH01 (SHARPEN_BASE+0x104)
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#define SHARPEN_KL00 (SHARPEN_BASE+0x108)
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#define SHARPEN_KL01 (SHARPEN_BASE+0x10C)
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#define SHARPEN_KH1 (SHARPEN_BASE+0x110)
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#define SHARPEN_KL1 (SHARPEN_BASE+0x114)
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#define SHARPEN_DLTMAX (SHARPEN_BASE+0x118)
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#define SHARPEN_DFKD (SHARPEN_BASE+0x11C)
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#define SHARPEN_DFMAX (SHARPEN_BASE+0x120)
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#define SHARPEN_ENH_STREN (SHARPEN_BASE+0x130)
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#define SHARPEN_ENH_THR (SHARPEN_BASE+0x134)
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#define SHARPEN_ENH_GMAX (SHARPEN_BASE+0x138)
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#define SHARPEN_TRAN_DAT0 (SHARPEN_BASE+0x140)
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//#define SHARPEN_C_KR1 (SHARPEN_BASE+0x1C0)
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//#define SHARPEN_C_KR2 (SHARPEN_BASE+0x1C4)
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//#define SHARPEN_C_KG1 (SHARPEN_BASE+0x1C8)
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//#define SHARPEN_C_KG2 (SHARPEN_BASE+0x1CC)
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//#define SHARPEN_C_KB1 (SHARPEN_BASE+0x1D0)
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//#define SHARPEN_C_KB2 (SHARPEN_BASE+0x1D4)
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//#define SHARPEN_C_ZONE_EN (SHARPEN_BASE+0x1D8)
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//#define SHARPEN_C_COEF1 (SHARPEN_BASE+0x1DC)
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//#define SHARPEN_C_COEF2 (SHARPEN_BASE+0x1E0)
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//#define SHARPEN_C_COEF3 (SHARPEN_BASE+0x1E4)
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//#define SHARPEN_C_SAT_DAT0 (SHARPEN_BASE+0x200)
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#define SHARPEN_EN (SHARPEN_BASE+0x240)
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// YC_Gain
|
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#define YC_GAIN_BASE 0x40076000
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#define Y_GAIN (YC_GAIN_BASE+(0x000))
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#define CB_GAIN (YC_GAIN_BASE+(0x004))
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#define CR_GAIN (YC_GAIN_BASE+(0x008))
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#define Y_OFST (YC_GAIN_BASE+(0x00C))
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#define Y_MAX_THD (YC_GAIN_BASE+(0x010))
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#define Y_MIN_THD (YC_GAIN_BASE+(0x014))
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//PLL use to upscaler
|
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#define PLL_BASE 0x20000000
|
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#define PLL_SYSCTRLREG_LOCK (PLL_BASE+0x002C)
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|
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#define PLLB1_CTRL (PLL_BASE+0x000C)
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#define PLLB2_CTRL (PLL_BASE+0x0010)
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#define PLLB_CTRL (PLL_BASE+0x0014)
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#endif
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