mirror of https://github.com/OpenIPC/firmware.git
187 lines
4.8 KiB
C
187 lines
4.8 KiB
C
#ifndef _ISP_PRIVATE_H_
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#define _ISP_PRIVATE_H_
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#include "xm_comm_3a.h"
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#if (defined SOC_ALIOS) || (defined SOC_SYSTEM)
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#include <pthread.h>
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#endif
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typedef struct _dpc_info_
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{
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XM_BOOL bEnableStatic;
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XM_BOOL bEnableDetect;
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ISP_STATIC_DP_TYPE_E enStaticDPType; /* Select static bright/dark defect-pixel calibration. */
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ISP_TRIGGER_STATUS_E enTriggerStatus; /*status of bad pixel trigger*/
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XM_U16 u16BadPixelThreshMin; /*RW, Range: [0, 0xFFF] */
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XM_U16 u16BadPixelThreshMax; /*RW, Range: [0, 0xFFF] */
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XM_U16 u16BadPixelThresh; /*R Range: [0, 0xFFF] */
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XM_U16 u16BadPixelCountMax; /*RW, limit of max number of bad pixel, Range: [0, 0x3FF] */
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XM_U16 u16BadPixelCount; /*RW, limit of min number of bad pixel, Range: [0, 0x3FF]*/
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XM_U16 u16BadPixelTriggerTime; /*RW, time limit for bad pixel trigger, in frame number ,Range: [0x0, 0x640]*/
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ISP_DYDPC_ATTR_S stDyDpc;
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}ISP_DPC_INFO;
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typedef struct _isp_frame
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{
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XM_U32 way;
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}ISP_FRAME;
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typedef struct _reg_data_
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{
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XM_U32 reg_addr;
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XM_U32 reg_data;
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ISP_FRAME isp_frame;
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}REG_DATA_S;
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typedef struct _mem_info_
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{
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XM_U32 u32PhyAddr;
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XM_VOID *pVirAddr;
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XM_U32 u32Size;
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XM_U8 u8Id;
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}MEM_INFO;
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typedef struct xmISP_API_ATTR_S
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{
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ISP_PUB_ATTR_S stPubAttr;
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ISP_CHN_ATTR_S stChnAttr;
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XM_U8 u8StatusFlag;
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ISP_GAMMA_ATTR_S stGamma;
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ISP_BLACKLVL_ATTR_S stBlc;
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ISP_SATURATION_ATTR_S stSat;
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ISP_SHARPEN_ATTR_S stSharpen;
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ISP_SHARPENV2_ATTR_S stSharpenV2;
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ISP_2DNR_ATTR_S stNr2D;
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ISP_3DNR_ATTR_S stNr3D;
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ISP_3DNRV2_ATTR_S stNr3DV2;
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ISP_ANTI_FALSECOLOR_S stAntiFalseColor;
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// ISP_DP_ATTR_S stDpc;
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ISP_DPC_INFO stDpc;
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ISP_CSC_ATTR_S stCsc;
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ISP_CHROMA_ATTR_S stChromaAttr;
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ISP_DRC_ATTR_S stDrcAttr;
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ISP_DEFOG_ATTR_S stDefogAttr;
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ISP_DCI_ATTR_S stDciAttr;
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ISP_MODULE_CTRL_U stModuleCtrl;
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} ISP_API_ATTR_S;
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#define ISPDEV_NAME "/dev/isp"
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#define ISP_CMD 'I'
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#define CMD_REG_WRITE _IOW(ISP_CMD,1,REG_DATA_S)
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#define CMD_REG_READ _IOW(ISP_CMD,2,REG_DATA_S)
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#define CMD_REG_READS _IOW(ISP_CMD,3,REG_DATA_S)
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#define CMD_IRQ_READ _IOW(ISP_CMD,4,REG_DATA_S)
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#define CMD_AUDIO_READ _IO(ISP_CMD,5)
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#define CMD_MIPI_CHECK_INIT _IOW(ISP_CMD,6,MIPI_CK_CMD)
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#define CMD_MIPI_CHECK_RUN _IO(ISP_CMD,7)
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#define ISP_STATUS_UN 0
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#define ISP_STATUS_PUBINIT 1
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#define ISP_STATUS_INIT 2
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#define ISP_STATUS_RUN 3
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#define ISP_STATUS_EXIT 4
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//ISP_MODULE_CTRL_U
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#define ISP_MODULE_VIDEOTEST (1<<0)
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#define ISP_MODULE_DPC (1<<1)
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#define ISP_MODULE_BLC (1<<2)
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#define ISP_MODULE_GAMMAFE (1<<3)
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#define ISP_MODULE_SHANDING (1<<4)
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#define ISP_MODULE_WBGAIN (1<<5)
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#define ISP_MODULE_NR2D (1<<6)
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#define ISP_MODULE_NR3D (1<<7)
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#define ISP_MODULE_DRC (1<<8)
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#define ISP_MODULE_CCM (1<<9)
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#define ISP_MODULE_GAMMA (1<<10)
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#define ISP_MODULE_DEMOIRE (1<<11)
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#define ISP_MODULE_CC (1<<12)
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#define ISP_MODULE_SHARPNESS (1<<13)
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#define ISP_MODULE_RSV (1<<14)
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#define ISP_MODULE_ALL (1<<31)
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extern ISP_AE_REGISTER_S gAlgAeFun;
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extern ISP_AWB_REGISTER_S gAlgAwbFun;
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extern ISP_API_ATTR_S *pstIspApiAttr;
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#ifdef SOC_SYSTEM
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extern pthread_mutex_t gIspMutex;
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extern pthread_mutex_t gIspMutex3;
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extern pthread_mutex_t gIspMutex4;
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extern XM_S32 gIspDevFd;
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XM_S32 Open_IspDev(XM_VOID);
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XM_S32 Close_IspDev(XM_VOID);
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// <20>źų<C5BA>ʼ<EFBFBD><CABC>
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XM_S32 IspIrqSignal_Init();
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XM_S32 IspPthradMutex_lock(pthread_mutex_t *mutex);
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XM_S32 IspPthradMutex_unLock(pthread_mutex_t *mutex);
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XM_S32 Write_IspReg(XM_U32 u32Addr, XM_U32 u32Value);
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XM_S32 Read_IspReg(XM_U32 u32Addr);
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#elif (defined SOC_ALIOS)
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extern pthread_mutex_t gIspMutex;
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extern pthread_mutex_t gIspMutex3;
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extern pthread_mutex_t gIspMutex4;
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XM_S32 IspIrqSignal_Init();
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XM_S32 IspPthradMutex_lock(pthread_mutex_t *mutex);
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XM_S32 IspPthradMutex_unLock(pthread_mutex_t *mutex);
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XM_S32 Write_IspReg(XM_U32 u32Addr, XM_U32 u32Value);
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XM_S32 Read_IspReg(XM_U32 u32Addr);
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#elif (defined SOC_NONE)
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extern XM_S32 gIspMutex;
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extern XM_S32 gIspMutex4;
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XM_S32 IspPthradMutex_lock(XM_S32 *mutex);
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XM_S32 IspPthradMutex_unLock(XM_S32 *mutex);
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#define Write_IspReg(u32Addr, u32Value) (*((volatile unsigned long *)(u32Addr)) = (u32Value))
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#define Read_IspReg(u32Addr) (*((volatile unsigned long *)(u32Addr)))
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#endif
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XM_VOID* IspMmap(XM_U32 u32PhyAddr, XM_U32 u32Size);
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XM_S32 IspMunmap(XM_VOID* pVirAddr, XM_U32 u32Size);
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XM_S32 IspDPCScan(XM_U16 *pu16Addr,ISP_STDPC_ATTR_S *pstStDPAttr);
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XM_VOID IspAutoScaneTask();
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XM_S32 IspAePhyStatWinInit(XM_U16 u16TotalH, XM_U16 u16TotalV);
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XM_S32 ispMemnCpy(XM_S8 *pSrc,XM_S8 *pDst, XM_U32 u32Num);
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XM_S32 ispMemnSet(XM_S8 *pSrc,XM_S8 pDat, XM_U32 u32Num);
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XM_S32 IspInit(XM_U32 u32SizeH, XM_U32 u32SizeV);
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// Awb
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XM_VOID IspAwbInit(ISP_AWB_WDW_ATTR_S *pstWinAttr);
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XM_S32 IspAwbRsltSet(ISP_AWB_RESULT_S* const pstAwbRslt);
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#endif
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