firmware/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-spi-nor-Kcon...

38 lines
1.4 KiB
Diff

--- linux-4.9.37/drivers/mtd/spi-nor/Kconfig 2017-07-12 16:42:41.000000000 +0300
+++ linux-4.9.y/drivers/mtd/spi-nor/Kconfig 2021-06-07 13:01:33.000000000 +0300
@@ -65,6 +65,34 @@
help
This enables support for hisilicon SPI-NOR flash controller.
+config SPI_GOKE_SFC
+ tristate "Goke FMCV100 SPI-NOR Flash Controller(SFC)"
+ depends on ARCH_GOKE || ARCH_GOKE || COMPILE_TEST
+ depends on HAS_IOMEM && HAS_DMA
+ help
+ This enables support for goke flash memory contrller ver100
+ (FMCV100)- SPI-NOR flash controller.
+
+config CLOSE_SPI_8PIN_4IO
+ bool "Close SPI device Quad SPI mode for some 8PIN chip"
+ default y if ARCH_GOKE
+ help
+ fmcv100 and sfcv350 support Quad SPI mode and Quad&addr SPI mode.
+ But some 8PIN chip does not support this mode when HOLD/IO3 PIN
+ was used by reset operation.
+ Usually, your should not config this option.
+
+config GOKE_SPI_BLOCK_PROTECT
+ bool "Goke Spi Nor Device BP(Block Protect) Support"
+ depends on SPI_GOKE_SFC
+ default y if SPI_GOKE_SFC
+ help
+ GOKE SFC supports BP(Block Protect) feature to preestablish a series
+ area to avoid writing and erasing, except to reading. With this macro
+ definition we can get the BP info which was setted before. The
+ BOTTOM/TOP bit is setted to BOTTOM, it means the lock area starts
+ from 0 address.
+
config SPI_NXP_SPIFI
tristate "NXP SPI Flash Interface (SPIFI)"
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)