mirror of https://github.com/OpenIPC/firmware.git
123 lines
3.1 KiB
Diff
123 lines
3.1 KiB
Diff
diff -drupN a/drivers/crypto/ingenic-hash.h b/drivers/crypto/ingenic-hash.h
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--- a/drivers/crypto/ingenic-hash.h 1970-01-01 03:00:00.000000000 +0300
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+++ b/drivers/crypto/ingenic-hash.h 2022-06-09 05:02:28.000000000 +0300
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@@ -0,0 +1,118 @@
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+#ifndef __INGENIC_HASH_H__
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+#define __INGENIC_HASH_H__
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+
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+#define ENTER()
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+#define EXIT()
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+
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+#define INGENIC_HASH_QUEUE_LENGTH (50)
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+#define INGENIC_HASH_CACHE_PAGE_SHIFT (0)
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+#define DMA_MIN 4
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+#define HASH_BUFFER_LEN (PAGE_SIZE << INGENIC_HASH_CACHE_PAGE_SHIFT)
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+
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+/* HASH flags */
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+#define HASH_FLAGS_BUSY BIT(0)
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+#define HASH_FLAGS_FINAL BIT(1)
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+#define HASH_FLAGS_DMA_ACTIVE BIT(2)
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+#define HASH_FLAGS_OUTPUT_READY BIT(3)
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+#define HASH_FLAGS_INIT BIT(4)
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+#define HASH_FLAGS_CPU BIT(5)
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+#define HASH_FLAGS_DMA_READY BIT(6)
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+
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+#define HASH_FLAGS_FINUP BIT(16)
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+#define HASH_FLAGS_SG BIT(17)
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+#define HASH_FLAGS_MD5 BIT(18)
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+#define HASH_FLAGS_SHA1 BIT(19)
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+#define HASH_FLAGS_SHA224 BIT(20)
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+#define HASH_FLAGS_SHA256 BIT(21)
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+#define HASH_FLAGS_SHA384 BIT(22)
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+#define HASH_FLAGS_SHA512 BIT(23)
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+#define HASH_FLAGS_ERROR BIT(24)
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+#define HASH_FLAGS_PAD BIT(25)
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+
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+#define HASH_OP_UPDATE 1
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+#define HASH_OP_FINAL 2
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+
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+
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+#define INGENIC_HASH_DMA_THRESHOLD 56
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+
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+#define MD5_DIGEST_SIZE 16
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+#define MD5_BLOCK_SIZE 64
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+
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+#define SHA1_DIGEST_SIZE 20
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+#define SHA1_BLOCK_SIZE 64
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+
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+#define SHA224_DIGEST_SIZE 28
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+#define SHA224_BLOCK_SIZE 64
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+
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+#define SHA256_DIGEST_SIZE 32
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+#define SHA256_BLOCK_SIZE 64
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+
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+#define SHA384_DIGEST_SIZE 48
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+#define SHA384_BLOCK_SIZE 128
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+
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+#define SHA512_DIGEST_SIZE 64
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+#define SHA512_BLOCK_SIZE 128
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+
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+#define HASH_HSCR 0
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+#define HASH_HSSR 4
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+#define HASH_HSINTM 8
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+#define HASH_HSSA 0xc
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+#define HASH_HSTC 0x10
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+#define HASH_HSDI 0x14
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+#define HASH_HSDO 0x18
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+
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+
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+struct ingenic_hash_reqctx {
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+ struct ingenic_hash_dev *hash;
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+ unsigned long flags;
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+ unsigned long op;
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+
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+ u8 digest[SHA512_DIGEST_SIZE] __aligned(sizeof(u32));
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+ u64 digcnt[2];
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+ size_t bufcnt;
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+ size_t buflen;
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+ dma_addr_t dma_addr;
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+
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+ /* walk state */
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+ struct scatterlist *sg;
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+ unsigned int offset; /* offset in current sg */
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+ unsigned int total; /* total request */
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+
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+ size_t block_size;
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+ u8 buffer[0] __aligned(8);
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+
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+};
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+
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+struct ingenic_hash_ctx {
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+ struct ingenic_hash_dev *hash;
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+ unsigned long flags;
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+ /* fallback stuff */
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+ struct crypto_shash *fallback;
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+};
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+
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+struct ingenic_hash_pdata {
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+ struct ahash_alg *algs_list;
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+ unsigned int size;
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+ unsigned int registered;
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+};
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+
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+struct ingenic_hash_dev {
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+ struct list_head list;
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+ void __iomem *io_base;
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+ int irq;
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+ struct clk *clk_gate;
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+ struct ingenic_hash_ctx *ctx;
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+ struct device *dev;
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+ unsigned long flags;
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+ spinlock_t lock;
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+ struct crypto_queue queue;
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+ struct ahash_request *req;
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+ struct ingenic_hash_pdata *pdata;
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+};
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+
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+#define MCU_BOOT 0xb3422000
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+
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+#define DMCS 0xb3421030
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+#define boot_up_mcu() *(volatile unsigned int *)(DMCS) = 0;
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+
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+#endif /*__INGENIC_HASH_H__*/
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