firmware/br-ext-chip-ingenic/board/t40/kernel/patches/00000-tools_pm-sleep_start.S.patch

diff -drupN a/tools/pm-sleep/start.S b/tools/pm-sleep/start.S
--- a/tools/pm-sleep/start.S	1970-01-01 03:00:00.000000000 +0300
+++ b/tools/pm-sleep/start.S	2022-06-09 05:02:37.000000000 +0300
@@ -0,0 +1,189 @@
+#define zero	$0	/* wired zero */
+#define AT	$1	/* assembler temp  - uppercase because of ".set at" */
+#define v0	$2	/* return value */
+#define v1	$3
+#define a0	$4	/* argument registers */
+#define a1	$5
+#define a2	$6
+#define a3	$7
+#define t0	$8	/* caller saved */
+#define t1	$9
+#define t2	$10
+#define t3	$11
+#define t4	$12
+#define t5	$13
+#define t6	$14
+#define t7	$15
+#define s0	$16	/* callee saved */
+#define s1	$17
+#define s2	$18
+#define s3	$19
+#define s4	$20
+#define s5	$21
+#define s6	$22
+#define s7	$23
+#define t8	$24	/* caller saved */
+#define t9	$25
+#define jp	$25	/* PIC jump register */
+#define k0	$26	/* kernel scratch */
+#define k1	$27
+#define gp	$28	/* global pointer */
+#define sp	$29	/* stack pointer */
+#define fp	$30	/* frame pointer */
+#define s8	$30	/* same like fp! */
+#define ra	$31	/* return address */
+
+	.set noreorder
+	.section _start_section
+	.text
+	.globl _start
+	.ent _start
+_start:
+	//--------  a0 <- load address
+	//-------   -T 0
+	addu     sp,sp,-12
+	sw 	gp,0(sp)
+	sw	ra,4(sp)
+	sw  	t9,8(sp)
+	/* Initialize $gp */
+	bal	1f
+	nop
+	.word	_gp
+	.word	__rel_dyn_end
+	.word	__rel_dyn_start
+	.word	__image_copy_end
+	.word	_GLOBAL_OFFSET_TABLE_
+	.word	num_got_entries
+
+1:
+	lw	gp, 0(ra)
+	addu     gp,gp,a0
+	//----------------------------------------------------------------------
+	lw	t3, 20(ra)		# t3 <-- num_got_entries
+	lw	t4, 16(ra)		# t4 <-- _GLOBAL_OFFSET_TABLE_
+	addu	t4, a0,t4		# t4 now holds relocated _G_O_T_
+	addi	t4, t4, 8		# skipping first two entries
+	li	t2, 2
+1:
+	lw	t1, 0(t4)
+	addu	t1, a0
+	sw	t1, 0(t4)
+2:
+	addi	t2, 1
+	blt	t2, t3, 1b
+	addi	t4, 4
+	//----------------------------------------------------------------------
+	lw	t2, 4(ra)   // <-  __rel_dyn_end
+	lw	t1, 8(ra)   // <- __rel_dyn_start
+
+	addu    t2,t2,a0
+	addu    t1,t1,a0
+
+	b	2f			# skip first reserved entry
+	addi	t1, 8
+
+1:
+	lw	t3, -4(t1)		# t3 <-- relocation info
+
+	sub	t3, 3
+	bnez	t3, 2f			# skip non R_MIPS_REL32 entries
+	 nop
+
+	lw	t3, -8(t1)		# t3 <-- location to fix up in FLASH
+	addu	t3, a0			# t3 <-- location to fix up in RAM
+
+	lw	t4, 0(t3)		# t4 <-- original pointer
+	addu	t4, a0			# t4 <-- adjusted pointer
+	sw	t4, 0(t3)
+
+2:
+	blt	t1, t2, 1b
+	addi	t1, 8			# each rel.dyn entry is 8 bytes
+
+
+	la	t1, __bss_start		# t1 <-- __bss_start
+	la	t2, __bss_end		# t2 <-- __bss_end
+1:
+	sw	zero, 0(t1)
+	blt	t1, t2, 1b
+	addi	t1, 4
+
+	la      t0,extern_func
+	sw	a1,0(t0)
+
+	move    t3,a0
+	la  	t0,p_slp_param
+	sw	t3,0(t0)
+	la	t2,sleep_pm_enter
+	sw      t2,0(t3)
+
+	addu    t3,t3,4
+	la	t2,0xffffffff
+	addi    t1,t3,0x40
+1:
+	sw	t2,0(t3)
+	addu    t3,t3,4
+	bne	t1,t3,1b
+	nop
+
+	lw	gp,0(sp)
+	lw	ra,4(sp)
+	lw      t9,8(sp)
+	addu     sp,sp,12
+	jr     ra
+	nop
+	.end _start
+
+	.space  256
+	.globl	sleep_pm_enter
+sleep_pm_enter:
+	.ent	sleep_pm_enter
+	.type   sleep_pm_enter,@function
+	.set    noreorder
+	bal   1f
+	nop
+1:
+	addu   t9,ra,4
+	.cpload t9
+	addiu    sp,ra,-4
+	la	t9,core_sleep_enter
+	jr	t9
+	nop
+	.end sleep_pm_enter
+
+sleep_pm_exit:
+	.globl	sleep_pm_exit
+	.ent	sleep_pm_exit
+	.set    noreorder
+	bal   1f
+	nop
+1:
+	addu   t9,ra,4
+	.cpload t9
+	//set sp
+	addiu    sp,ra,-16
+	la	t9,core_sleep_restore
+	jr      t9
+	nop
+	.end sleep_pm_exit
+
+call_function:
+	.globl	call_function
+	.ent	call_function
+	.set    noreorder
+	addu    sp,sp,-16
+	sw	gp,0(sp)
+	sw	ra,4(sp)
+	sw	t9,8(sp)
+	move t9,a0
+	move a0,a1
+
+	jalr    t9
+	nop
+	lw	gp,0(sp)
+	lw 	ra,4(sp)
+	lw	t9,8(sp)
+	addu    sp,sp,16
+	jr	ra
+	nop
+	.end call_function