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firmware
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firmware/br-ext-chip-ingenic/board/t31/kernel/patches/0012-wfb-ath9k_unlocked_fre...

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diff -Naur a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c 2023-02-17 19:23:40.559618818 +0200
@@ -18,6 +18,9 @@
#include "hw.h"
#include "ar9002_phy.h"
+extern u8 tx_power_man;
+extern u8 thresh62_man;
+
static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
{
return ((ah->eeprom.map4k.baseEepHeader.version >> 12) & 0xF);
@@ -681,7 +684,10 @@
return;
for (i = 0; i < Ar5416RateSize; i++)
- ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
+ //ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
+ ratesArray[i] = tx_power_man;
+
+ printk("ATH: TX Power set: %d\n",tx_power_man);
ENABLE_REGWRITE_BUFFER(ah);
@@ -1018,10 +1024,8 @@
if (AR_SREV_9271_10(ah))
REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
pModal->txEndToRxOn);
- REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
- pModal->thresh62);
- REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
- pModal->thresh62);
+ REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62, thresh62_man);
+ REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, thresh62_man);
if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
AR5416_EEP_MINOR_VER_2) {
diff -Naur a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c 2023-02-17 19:28:18.994342197 +0200
@@ -18,6 +18,8 @@
#include "hw.h"
#include "ar9002_phy.h"
+extern u8 tx_power_man;
+
#define SIZE_EEPROM_AR9287 (sizeof(struct ar9287_eeprom) / sizeof(u16))
static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah)
@@ -799,8 +801,10 @@
return;
for (i = 0; i < Ar5416RateSize; i++)
- ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
+ //ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
+ ratesArray[i] = tx_power_man;
+ printk("ATH: TX Power set: %d\n",tx_power_man);
ENABLE_REGWRITE_BUFFER(ah);
/* OFDM power per rate */
diff -Naur a/drivers/net/wireless/ath/ath9k/hif_usb.h b/drivers/net/wireless/ath/ath9k/hif_usb.h
--- a/drivers/net/wireless/ath/ath9k/hif_usb.h 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/hif_usb.h 2023-02-17 19:29:03.261158446 +0200
@@ -43,7 +43,7 @@
#define MAX_PKT_NUM_IN_TRANSFER 10
#define MAX_REG_OUT_URB_NUM 1
-#define MAX_REG_IN_URB_NUM 64
+#define MAX_REG_IN_URB_NUM 8
#define MAX_REG_IN_BUF_SIZE 64
diff -Naur a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c 2023-02-17 19:39:56.867254378 +0200
@@ -37,17 +37,38 @@
#define CHAN2G(_freq, _idx) { \
.center_freq = (_freq), \
.hw_value = (_idx), \
- .max_power = 20, \
+ .max_power = 30, \
}
#define CHAN5G(_freq, _idx) { \
.band = IEEE80211_BAND_5GHZ, \
.center_freq = (_freq), \
.hw_value = (_idx), \
- .max_power = 20, \
+ .max_power = 30, \
}
static struct ieee80211_channel ath9k_2ghz_channels[] = {
+ CHAN2G(2312, 34), /* Channel XX */
+ CHAN2G(2317, 35), /* Channel XX */
+ CHAN2G(2322, 36), /* Channel XX */
+ CHAN2G(2327, 37), /* Channel XX */
+ CHAN2G(2332, 38), /* Channel XX */
+ CHAN2G(2337, 39), /* Channel XX */
+ CHAN2G(2342, 40), /* Channel XX */
+ CHAN2G(2347, 41), /* Channel XX */
+ CHAN2G(2352, 42), /* Channel XX */
+ CHAN2G(2357, 43), /* Channel XX */
+ CHAN2G(2362, 44), /* Channel XX */
+ CHAN2G(2367, 45), /* Channel XX */
+ CHAN2G(2372, 46), /* Channel XX */
+ CHAN2G(2377, 47), /* Channel XX */
+ CHAN2G(2382, 48), /* Channel XX */
+ CHAN2G(2387, 49), /* Channel XX */
+ CHAN2G(2392, 50), /* Channel XX */
+ CHAN2G(2397, 51), /* Channel XX */
+ CHAN2G(2402, 52), /* Channel XX */
+ CHAN2G(2407, 53), /* Channel XX */
+
CHAN2G(2412, 0), /* Channel 1 */
CHAN2G(2417, 1), /* Channel 2 */
CHAN2G(2422, 2), /* Channel 3 */
@@ -61,38 +82,68 @@
CHAN2G(2462, 10), /* Channel 11 */
CHAN2G(2467, 11), /* Channel 12 */
CHAN2G(2472, 12), /* Channel 13 */
- CHAN2G(2484, 13), /* Channel 14 */
+ //CHAN2G(2484, 13), /* Channel 14 */
+
+ CHAN2G(2477, 13), /* Channel XX */
+ CHAN2G(2478, 14), /* Channel XX */
+ CHAN2G(2482, 15), /* Channel XX */
+
+ CHAN2G(2484, 16), /* Channel 14 */
+
+ CHAN2G(2487, 17), /* Channel XX */
+ CHAN2G(2489, 18), /* Channel XX */
+ CHAN2G(2492, 19), /* Channel XX */
+ CHAN2G(2494, 20), /* Channel XX */
+ CHAN2G(2497, 21), /* Channel XX */
+ CHAN2G(2499, 22), /* Channel XX */
+ CHAN2G(2512, 23), /* Channel XX */
+ CHAN2G(2532, 24), /* Channel XX */
+ CHAN2G(2572, 25), /* Channel XX */
+ CHAN2G(2592, 26), /* Channel XX */
+ CHAN2G(2612, 27), /* Channel XX */
+ CHAN2G(2632, 28), /* Channel XX */
+ CHAN2G(2652, 29), /* Channel XX */
+ CHAN2G(2672, 30), /* Channel XX */
+ CHAN2G(2692, 31), /* Channel XX */
+ CHAN2G(2712, 32), /* Channel XX */
+ CHAN2G(2732, 33), /* Channel XX */
+
};
static struct ieee80211_channel ath9k_5ghz_channels[] = {
+ CHAN5G(4920, 54), /* Channel XX */
+ CHAN5G(4940, 55), /* Channel XX */
+ CHAN5G(4960, 56), /* Channel XX */
+ CHAN5G(4980, 57), /* Channel XX */
+
/* _We_ call this UNII 1 */
- CHAN5G(5180, 14), /* Channel 36 */
- CHAN5G(5200, 15), /* Channel 40 */
- CHAN5G(5220, 16), /* Channel 44 */
- CHAN5G(5240, 17), /* Channel 48 */
+ CHAN5G(5180, 58), /* Channel 36 */
+ CHAN5G(5200, 59), /* Channel 40 */
+ CHAN5G(5220, 60), /* Channel 44 */
+ CHAN5G(5240, 61), /* Channel 48 */
/* _We_ call this UNII 2 */
- CHAN5G(5260, 18), /* Channel 52 */
- CHAN5G(5280, 19), /* Channel 56 */
- CHAN5G(5300, 20), /* Channel 60 */
- CHAN5G(5320, 21), /* Channel 64 */
+ CHAN5G(5260, 62), /* Channel 52 */
+ CHAN5G(5280, 63), /* Channel 56 */
+ CHAN5G(5300, 64), /* Channel 60 */
+ CHAN5G(5320, 65), /* Channel 64 */
/* _We_ call this "Middle band" */
- CHAN5G(5500, 22), /* Channel 100 */
- CHAN5G(5520, 23), /* Channel 104 */
- CHAN5G(5540, 24), /* Channel 108 */
- CHAN5G(5560, 25), /* Channel 112 */
- CHAN5G(5580, 26), /* Channel 116 */
- CHAN5G(5600, 27), /* Channel 120 */
- CHAN5G(5620, 28), /* Channel 124 */
- CHAN5G(5640, 29), /* Channel 128 */
- CHAN5G(5660, 30), /* Channel 132 */
- CHAN5G(5680, 31), /* Channel 136 */
- CHAN5G(5700, 32), /* Channel 140 */
+ CHAN5G(5500, 66), /* Channel 100 */
+ CHAN5G(5520, 67), /* Channel 104 */
+ CHAN5G(5540, 68), /* Channel 108 */
+ CHAN5G(5560, 69), /* Channel 112 */
+ CHAN5G(5580, 70), /* Channel 116 */
+ CHAN5G(5600, 71), /* Channel 120 */
+ CHAN5G(5620, 72), /* Channel 124 */
+ CHAN5G(5640, 73), /* Channel 128 */
+ CHAN5G(5660, 74), /* Channel 132 */
+ CHAN5G(5680, 75), /* Channel 136 */
+ CHAN5G(5700, 76), /* Channel 140 */
/* _We_ call this UNII 3 */
- CHAN5G(5745, 33), /* Channel 149 */
- CHAN5G(5765, 34), /* Channel 153 */
- CHAN5G(5785, 35), /* Channel 157 */
- CHAN5G(5805, 36), /* Channel 161 */
- CHAN5G(5825, 37), /* Channel 165 */
+ CHAN5G(5745, 77), /* Channel 149 */
+ CHAN5G(5765, 78), /* Channel 153 */
+ CHAN5G(5785, 79), /* Channel 157 */
+ CHAN5G(5805, 80), /* Channel 161 */
+ CHAN5G(5825, 81), /* Channel 165 */
};
/* Atheros hardware rate code addition for short premble */
diff -Naur a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
--- a/drivers/net/wireless/ath/ath9k/hw.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/hw.c 2023-02-17 19:48:47.787252400 +0200
@@ -35,6 +35,40 @@
MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
MODULE_LICENSE("Dual BSD/GPL");
+u8 tx_power_man = 58; //manual power
+u8 cwmin_man = 7;
+u8 cwmax_man = 15;
+u8 aifs_man = 2;
+u8 cck_sifs_man = 10;
+u8 ofdm_sifs_man = 16;
+u8 slottime_man = 9;
+u8 thresh62_man = 28;
+
+module_param_named(txpower,tx_power_man,byte,0444);
+MODULE_PARM_DESC(txpower,"Manual TX power setting, default 58, max 63");
+
+module_param_named(cwmin,cwmin_man,byte,0444);
+MODULE_PARM_DESC(cwmin,"CWMIN setting, 0-255, default 7");
+
+module_param_named(cwmax,cwmax_man,byte,0444);
+MODULE_PARM_DESC(cwmax,"CWMAX setting, 0-255, default 15");
+
+module_param_named(aifs,aifs_man,byte,0444);
+MODULE_PARM_DESC(aifs,"AIFS setting, default 2");
+
+module_param_named(cck_sifs,cck_sifs_man,byte,0444);
+MODULE_PARM_DESC(cck_sifs,"CCK SIFS setting, default 10");
+
+module_param_named(ofdm_sifs,ofdm_sifs_man,byte,0444);
+MODULE_PARM_DESC(ofdm_sifs,"OFDM SIFS setting, default 16");
+
+module_param_named(slottime,slottime_man,byte,0444);
+MODULE_PARM_DESC(slottime,"Slottime setting, default 9");
+
+module_param_named(thresh62,thresh62_man,byte,0444);
+MODULE_PARM_DESC(thresh62,"CCA THRESH62 setting, default 28");
+
+
static int __init ath9k_init(void)
{
return 0;
@@ -1100,7 +1134,8 @@
}
/* As defined by IEEE 802.11-2007 17.3.8.6 */
- slottime += 3 * ah->coverage_class;
+ //slottime += 3 * ah->coverage_class;
+ slottime = slottime_man;
acktimeout = slottime + sifstime + ack_offset;
ctstimeout = acktimeout;
diff -Naur a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
--- a/drivers/net/wireless/ath/ath9k/hw.h 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/hw.h 2023-02-17 19:32:07.103600256 +0200
@@ -69,7 +69,7 @@
#define ATH9K_RSSI_BAD -128
-#define ATH9K_NUM_CHANNELS 38
+#define ATH9K_NUM_CHANNELS 82
/* Register read/write primitives */
#define REG_WRITE(_ah, _reg, _val) \
diff -Naur a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
--- a/drivers/net/wireless/ath/ath9k/init.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/init.c 2023-02-17 19:45:32.152850755 +0200
@@ -63,14 +63,14 @@
.band = IEEE80211_BAND_2GHZ, \
.center_freq = (_freq), \
.hw_value = (_idx), \
- .max_power = 20, \
+ .max_power = 30, \
}
#define CHAN5G(_freq, _idx) { \
.band = IEEE80211_BAND_5GHZ, \
.center_freq = (_freq), \
.hw_value = (_idx), \
- .max_power = 20, \
+ .max_power = 30, \
}
/* Some 2 GHz radios are actually tunable on 2312-2732
@@ -78,6 +78,28 @@
* we have calibration data for all cards though to make
* this static */
static const struct ieee80211_channel ath9k_2ghz_chantable[] = {
+
+CHAN2G(2312, 34), /* Channel XX */
+ CHAN2G(2317, 35), /* Channel XX */
+ CHAN2G(2322, 36), /* Channel XX */
+ CHAN2G(2327, 37), /* Channel XX */
+ CHAN2G(2332, 38), /* Channel XX */
+ CHAN2G(2337, 39), /* Channel XX */
+ CHAN2G(2342, 40), /* Channel XX */
+ CHAN2G(2347, 41), /* Channel XX */
+ CHAN2G(2352, 42), /* Channel XX */
+ CHAN2G(2357, 43), /* Channel XX */
+ CHAN2G(2362, 44), /* Channel XX */
+ CHAN2G(2367, 45), /* Channel XX */
+ CHAN2G(2372, 46), /* Channel XX */
+ CHAN2G(2377, 47), /* Channel XX */
+ CHAN2G(2382, 48), /* Channel XX */
+ CHAN2G(2387, 49), /* Channel XX */
+ CHAN2G(2392, 50), /* Channel XX */
+ CHAN2G(2397, 51), /* Channel XX */
+ CHAN2G(2402, 52), /* Channel XX */
+ CHAN2G(2407, 53), /* Channel XX */
+
CHAN2G(2412, 0), /* Channel 1 */
CHAN2G(2417, 1), /* Channel 2 */
CHAN2G(2422, 2), /* Channel 3 */
@@ -91,7 +113,32 @@
CHAN2G(2462, 10), /* Channel 11 */
CHAN2G(2467, 11), /* Channel 12 */
CHAN2G(2472, 12), /* Channel 13 */
- CHAN2G(2484, 13), /* Channel 14 */
+ //CHAN2G(2484, 13), /* Channel 14 */
+
+ CHAN2G(2477, 13), /* Channel XX */
+ CHAN2G(2478, 14), /* Channel XX */
+ CHAN2G(2482, 15), /* Channel XX */
+
+ CHAN2G(2484, 16), /* Channel 14 */
+
+ CHAN2G(2487, 17), /* Channel XX */
+ CHAN2G(2489, 18), /* Channel XX */
+ CHAN2G(2492, 19), /* Channel XX */
+ CHAN2G(2494, 20), /* Channel XX */
+ CHAN2G(2497, 21), /* Channel XX */
+ CHAN2G(2499, 22), /* Channel XX */
+ CHAN2G(2512, 23), /* Channel XX */
+ CHAN2G(2532, 24), /* Channel XX */
+ CHAN2G(2572, 25), /* Channel XX */
+ CHAN2G(2592, 26), /* Channel XX */
+ CHAN2G(2612, 27), /* Channel XX */
+ CHAN2G(2632, 28), /* Channel XX */
+ CHAN2G(2652, 29), /* Channel XX */
+ CHAN2G(2672, 30), /* Channel XX */
+ CHAN2G(2692, 31), /* Channel XX */
+ CHAN2G(2712, 32), /* Channel XX */
+ CHAN2G(2732, 33), /* Channel XX */
+
};
/* Some 5 GHz radios are actually tunable on XXXX-YYYY
@@ -99,34 +146,39 @@
* we have calibration data for all cards though to make
* this static */
static const struct ieee80211_channel ath9k_5ghz_chantable[] = {
+ CHAN5G(4920, 54), /* Channel XX */
+ CHAN5G(4940, 55), /* Channel XX */
+ CHAN5G(4960, 56), /* Channel XX */
+ CHAN5G(4980, 57), /* Channel XX */
+
/* _We_ call this UNII 1 */
- CHAN5G(5180, 14), /* Channel 36 */
- CHAN5G(5200, 15), /* Channel 40 */
- CHAN5G(5220, 16), /* Channel 44 */
- CHAN5G(5240, 17), /* Channel 48 */
+ CHAN5G(5180, 58), /* Channel 36 */
+ CHAN5G(5200, 59), /* Channel 40 */
+ CHAN5G(5220, 60), /* Channel 44 */
+ CHAN5G(5240, 61), /* Channel 48 */
/* _We_ call this UNII 2 */
- CHAN5G(5260, 18), /* Channel 52 */
- CHAN5G(5280, 19), /* Channel 56 */
- CHAN5G(5300, 20), /* Channel 60 */
- CHAN5G(5320, 21), /* Channel 64 */
+ CHAN5G(5260, 62), /* Channel 52 */
+ CHAN5G(5280, 63), /* Channel 56 */
+ CHAN5G(5300, 64), /* Channel 60 */
+ CHAN5G(5320, 65), /* Channel 64 */
/* _We_ call this "Middle band" */
- CHAN5G(5500, 22), /* Channel 100 */
- CHAN5G(5520, 23), /* Channel 104 */
- CHAN5G(5540, 24), /* Channel 108 */
- CHAN5G(5560, 25), /* Channel 112 */
- CHAN5G(5580, 26), /* Channel 116 */
- CHAN5G(5600, 27), /* Channel 120 */
- CHAN5G(5620, 28), /* Channel 124 */
- CHAN5G(5640, 29), /* Channel 128 */
- CHAN5G(5660, 30), /* Channel 132 */
- CHAN5G(5680, 31), /* Channel 136 */
- CHAN5G(5700, 32), /* Channel 140 */
+ CHAN5G(5500, 66), /* Channel 100 */
+ CHAN5G(5520, 67), /* Channel 104 */
+ CHAN5G(5540, 68), /* Channel 108 */
+ CHAN5G(5560, 69), /* Channel 112 */
+ CHAN5G(5580, 70), /* Channel 116 */
+ CHAN5G(5600, 71), /* Channel 120 */
+ CHAN5G(5620, 72), /* Channel 124 */
+ CHAN5G(5640, 73), /* Channel 128 */
+ CHAN5G(5660, 74), /* Channel 132 */
+ CHAN5G(5680, 75), /* Channel 136 */
+ CHAN5G(5700, 76), /* Channel 140 */
/* _We_ call this UNII 3 */
- CHAN5G(5745, 33), /* Channel 149 */
- CHAN5G(5765, 34), /* Channel 153 */
- CHAN5G(5785, 35), /* Channel 157 */
- CHAN5G(5805, 36), /* Channel 161 */
- CHAN5G(5825, 37), /* Channel 165 */
+ CHAN5G(5745, 77), /* Channel 149 */
+ CHAN5G(5765, 78), /* Channel 153 */
+ CHAN5G(5785, 79), /* Channel 157 */
+ CHAN5G(5805, 80), /* Channel 161 */
+ CHAN5G(5825, 81), /* Channel 165 */
};
/* Atheros hardware rate code addition for short premble */
diff -Naur a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
--- a/drivers/net/wireless/ath/ath9k/mac.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/ath9k/mac.c 2023-02-17 19:50:43.485002190 +0200
@@ -18,6 +18,12 @@
#include "hw-ops.h"
#include <linux/export.h>
+extern u8 cwmin_man;
+extern u8 cwmax_man;
+extern u8 aifs_man;
+extern u8 cck_sifs;
+extern u8 ofdm_sifs;
+
static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah,
struct ath9k_tx_queue_info *qi)
{
@@ -216,7 +222,9 @@
if (qinfo->tqi_aifs != ATH9K_TXQ_USEDEFAULT)
qi->tqi_aifs = min(qinfo->tqi_aifs, 255U);
else
- qi->tqi_aifs = INIT_AIFS;
+ //qi->tqi_aifs = INIT_AIFS;
+ qi->tqi_aifs = aifs_man;
+
if (qinfo->tqi_cwmin != ATH9K_TXQ_USEDEFAULT) {
cw = min(qinfo->tqi_cwmin, 1024U);
qi->tqi_cwmin = 1;
diff -Naur a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c
--- a/drivers/net/wireless/ath/regd.c 2013-10-01 19:18:05.000000000 +0300
+++ b/drivers/net/wireless/ath/regd.c 2023-02-17 19:08:53.671454735 +0200
@@ -33,21 +33,16 @@
*/
/* Only these channels all allow active scan on all world regulatory domains */
-#define ATH9K_2GHZ_CH01_11 REG_RULE(2412-10, 2462+10, 40, 0, 20, 0)
+#define ATH9K_2GHZ_CH01_11 REG_RULE(2312-10, 2462+10, 40, 0, 30, 0) //tisho
/* We enable active scan on these a case by case basis by regulatory domain */
-#define ATH9K_2GHZ_CH12_13 REG_RULE(2467-10, 2472+10, 40, 0, 20,\
- NL80211_RRF_PASSIVE_SCAN)
-#define ATH9K_2GHZ_CH14 REG_RULE(2484-10, 2484+10, 40, 0, 20,\
- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_OFDM)
+#define ATH9K_2GHZ_CH12_13 REG_RULE(2467-10, 2472+10, 40, 0, 30, 0)
+#define ATH9K_2GHZ_CH14 REG_RULE(2484-10, 2732+10, 40, 0, 30, 0)
/* We allow IBSS on these on a case by case basis by regulatory domain */
-#define ATH9K_5GHZ_5150_5350 REG_RULE(5150-10, 5350+10, 40, 0, 30,\
- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
-#define ATH9K_5GHZ_5470_5850 REG_RULE(5470-10, 5850+10, 40, 0, 30,\
- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
-#define ATH9K_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 40, 0, 30,\
- NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
+#define ATH9K_5GHZ_5150_5350 REG_RULE(4920-10, 5350+10, 80, 0, 30, 0)
+#define ATH9K_5GHZ_5470_5850 REG_RULE(5470-10, 6100+10, 80, 0, 30, 0)
+#define ATH9K_5GHZ_5725_5850 REG_RULE(5725-10, 6100+10, 80, 0, 30, 0)
#define ATH9K_2GHZ_ALL ATH9K_2GHZ_CH01_11, \
ATH9K_2GHZ_CH12_13, \
@@ -76,9 +71,8 @@
.n_reg_rules = 4,
.alpha2 = "99",
.reg_rules = {
- ATH9K_2GHZ_CH01_11,
- ATH9K_2GHZ_CH12_13,
- ATH9K_5GHZ_NO_MIDBAND,
+ ATH9K_2GHZ_ALL,
+ ATH9K_5GHZ_ALL,
}
};
@@ -87,8 +81,8 @@
.n_reg_rules = 3,
.alpha2 = "99",
.reg_rules = {
- ATH9K_2GHZ_CH01_11,
- ATH9K_5GHZ_NO_MIDBAND,
+ ATH9K_2GHZ_ALL,
+ ATH9K_5GHZ_ALL,
}
};
@@ -97,7 +91,7 @@
.n_reg_rules = 3,
.alpha2 = "99",
.reg_rules = {
- ATH9K_2GHZ_CH01_11,
+ ATH9K_2GHZ_ALL,
ATH9K_5GHZ_ALL,
}
};
@@ -107,8 +101,7 @@
.n_reg_rules = 4,
.alpha2 = "99",
.reg_rules = {
- ATH9K_2GHZ_CH01_11,
- ATH9K_2GHZ_CH12_13,
+ ATH9K_2GHZ_ALL,
ATH9K_5GHZ_ALL,
}
};
@@ -174,7 +167,8 @@
/* Frequency is one where radar detection is required */
static bool ath_is_radar_freq(u16 center_freq)
{
- return (center_freq >= 5260 && center_freq <= 5700);
+// return (center_freq >= 5260 && center_freq <= 5700);
+ return 0;
}
@@ -196,6 +190,8 @@
struct ieee80211_channel *ch;
unsigned int i;
+ return;
+
for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
if (!wiphy->bands[band])
@@ -250,6 +246,7 @@
struct ieee80211_channel *ch;
const struct ieee80211_reg_rule *reg_rule;
+return;
sband = wiphy->bands[IEEE80211_BAND_2GHZ];
if (!sband)
return;
@@ -299,6 +296,7 @@
struct ieee80211_channel *ch;
unsigned int i;
+return;
if (!wiphy->bands[IEEE80211_BAND_5GHZ])
return;
@@ -503,6 +501,8 @@
{
const struct ieee80211_regdomain *regd;
+return 0;
+
wiphy->reg_notifier = reg_notifier;
wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY;
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