OpenIPC
/
firmware
mirror of https://github.com/OpenIPC/firmware.git
1
0
Fork 0
Code Activity
firmware/br-ext-chip-ti/board/dm36x/kernel/patches/0000-ti-dm36x-3.9.0.patch

156151 lines
4.3 MiB
Raw Blame History

This file contains ambiguous Unicode characters!

This file contains ambiguous Unicode characters that may be confused with others in your current locale. If your use case is intentional and legitimate, you can safely ignore this warning. Use the Escape button to highlight these characters.

diff --git a/Documentation/DocBook/device-drivers.tmpl b/Documentation/DocBook/device-drivers.tmpl
index c36892c0..7514dbf0 100644
--- a/Documentation/DocBook/device-drivers.tmpl
+++ b/Documentation/DocBook/device-drivers.tmpl
@@ -227,7 +227,7 @@ X!Isound/sound_firmware.c
<chapter id="uart16x50">
<title>16x50 UART Driver</title>
!Edrivers/tty/serial/serial_core.c
-!Edrivers/tty/serial/8250/8250_core.c
+!Edrivers/tty/serial/8250/8250.c
</chapter>
<chapter id="fbdev">
diff --git a/Documentation/devicetree/bindings/mmc/davinci_mmc.txt b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
new file mode 100644
index 00000000..e5a0140b
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
@@ -0,0 +1,33 @@
+* TI Highspeed MMC host controller for DaVinci
+
+The Highspeed MMC Host Controller on TI DaVinci family
+provides an interface for MMC, SD and SDIO types of memory cards.
+
+This file documents the properties used by the davinci_mmc driver.
+
+Required properties:
+- compatible:
+ Should be "ti,da830-mmc": for da830, da850, dm365
+ Should be "ti,dm355-mmc": for dm355, dm644x
+
+Optional properties:
+- bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
+- max-frequency: Maximum operating clock frequency, default 25MHz.
+- dmas: List of DMA specifiers with the controller specific format
+ as described in the generic DMA client binding. A tx and rx
+ specifier is required.
+- dma-names: RX and TX DMA request names. These strings correspond
+ 1:1 with the DMA specifiers listed in dmas.
+
+Example:
+mmc0: mmc@1c40000 {
+ compatible = "ti,da830-mmc",
+ reg = <0x40000 0x1000>;
+ interrupts = <16>;
+ status = "okay";
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ dmas = <&edma 16
+ &edma 17>;
+ dma-names = "rx", "tx";
+};
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 8ccbf27a..4609e81d 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -596,6 +596,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
is selected automatically. Check
Documentation/kdump/kdump.txt for further details.
+ crashkernel_low=size[KMG]
+ [KNL, x86] parts under 4G.
+
crashkernel=range1:size1[,range2:size2,...][@offset]
[KNL] Same as above, but depends on the memory
in the running system. The syntax of range is
@@ -603,26 +606,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
a memory unit (amount[KMG]). See also
Documentation/kdump/kdump.txt for an example.
- crashkernel=size[KMG],high
- [KNL, x86_64] range could be above 4G. Allow kernel
- to allocate physical memory region from top, so could
- be above 4G if system have more than 4G ram installed.
- Otherwise memory region will be allocated below 4G, if
- available.
- It will be ignored if crashkernel=X is specified.
- crashkernel=size[KMG],low
- [KNL, x86_64] range under 4G. When crashkernel=X,high
- is passed, kernel could allocate physical memory region
- above 4G, that cause second kernel crash on system
- that require some amount of low memory, e.g. swiotlb
- requires at least 64M+32K low memory. Kernel would
- try to allocate 72M below 4G automatically.
- This one let user to specify own low range under 4G
- for second kernel instead.
- 0: to disable low allocation.
- It will be ignored when crashkernel=X,high is not used
- or memory reserved is below 4G.
-
cs89x0_dma= [HW,NET]
Format: <dma>
@@ -805,12 +788,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
edd= [EDD]
Format: {"off" | "on" | "skip[mbr]"}
- efi_no_storage_paranoia [EFI; X86]
- Using this parameter you can use more than 50% of
- your efi variable storage. Use this parameter only if
- you are really sure that your UEFI does sane gc and
- fulfills the spec otherwise your board may brick.
-
eisa_irq_edge= [PARISC,HW]
See header of drivers/parisc/eisa.c.
diff --git a/Documentation/scsi/LICENSE.qla2xxx b/Documentation/scsi/LICENSE.qla2xxx
index 5020b7b5..27a91cf4 100644
--- a/Documentation/scsi/LICENSE.qla2xxx
+++ b/Documentation/scsi/LICENSE.qla2xxx
@@ -1,4 +1,4 @@
-Copyright (c) 2003-2013 QLogic Corporation
+Copyright (c) 2003-2012 QLogic Corporation
QLogic Linux FC-FCoE Driver
This program includes a device driver for Linux 3.x.
diff --git a/Documentation/v2r/ppmsum.txt b/Documentation/v2r/ppmsum.txt
new file mode 100644
index 00000000..bd0d0168
--- /dev/null
+++ b/Documentation/v2r/ppmsum.txt
@@ -0,0 +1,54 @@
+Драйвер ppmsum. Драйвер работает с ядром из ветки RTO!
+
+Загрузка драйвера может осуществлятся с необязательными параметрами:
+
+insmod ppmsum_mod.ko channels=6 ns=1
+
+
+channels - означает количество каналов ppmsum, выдаваемых драйвером (по умолчанию 8)
+
+ns - если значение не равно нулю, то значения каждого канала передаются в наносекундах,
+иначе в тиках таймера, который работает на частоте 24 МГц. По умолчанию значение передаётся в тиках таймера
+
+Во время загрузки выводятся значения, которые загруженны по умолчанию (в тиках таймера):
+
+[ 361.987033] pbuf[0]=9480 (395 ns)
+[ 361.995022] pbuf[1]=520 (21 ns)
+[ 362.003025] pbuf[2]=9480 (395 ns)
+[ 362.011023] pbuf[3]=10520 (438 ns)
+[ 362.019026] pbuf[4]=9480 (395 ns)
+[ 362.027022] pbuf[5]=20520 (855 ns)
+[ 362.035024] pbuf[6]=9480 (395 ns)
+[ 362.047010] pbuf[7]=30520 (1271 ns)
+[ 362.055024] pbuf[8]=9480 (395 ns)
+[ 362.063024] pbuf[9]=40520 (1688 ns)
+[ 362.071030] pbuf[10]=9480 (395 ns)
+[ 362.079021] pbuf[11]=50520 (2105 ns)
+[ 362.088024] pbuf[12]=9480 (395 ns)
+[ 362.096032] pbuf[13]=60520 (2521 ns)
+[ 362.104028] pbuf[14]=9480 (395 ns)
+[ 362.116018] pbuf[15]=70520 (2938 ns)
+[ 362.124027] pbuf[16]=9480 (395 ns)
+[ 362.132023] pbuf[17]=110520 (4605 ns)
+[ 362.141024] sum=480000 frame= 480000 (20000 ns)
+
+
+
+После загрузки драйвера, запуск ppmsum осуществляется записью команды start в файл /dev/ppmsum
+
+echo "start" > /dev/ppmsum
+
+Смена интервала по каналу осуществляется записью в файл /dev/ppmsum значения соответствующего канала
+в тиках таймера (если ns=0), или в наносекундах (если ns!=0). Например:
+
+echo "ch0=1000 ch1=1000 ch2=1000 ch3=1000 ch4=1000 ch5=1000 ch6=1000 ch7=1000 " > /dev/ppmsum
+
+Порядок ввода каналов произвольный. Так же ввод может заканчиватся командой start
+
+Ширина импульса меняется записью слова pulse в файл /dev/ppmsum, например
+
+echo "pulse=9000" > /dev/ppmsum
+
+Существует ещё команда stop, но лучше её пока не запускать. Выгрузка драйвера работает, но нестабильно. В принципе можно использовать пока её вместо stop, но лучше делать reboot.
+
+
diff --git a/MAINTAINERS b/MAINTAINERS
index 8bdd7a7e..836a6183 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4941,12 +4941,6 @@ W: logfs.org
S: Maintained
F: fs/logfs/
-LPC32XX MACHINE SUPPORT
-M: Roland Stigge <stigge@antcom.de>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-F: arch/arm/mach-lpc32xx/
-
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Nagalakshmi Nandigama <Nagalakshmi.Nandigama@lsi.com>
M: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
@@ -6631,7 +6625,7 @@ S: Supported
F: fs/reiserfs/
REGISTER MAP ABSTRACTION
-M: Mark Brown <broonie@kernel.org>
+M: Mark Brown <broonie@opensource.wolfsonmicro.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
S: Supported
F: drivers/base/regmap/
@@ -6957,6 +6951,7 @@ F: drivers/scsi/st*
SCTP PROTOCOL
M: Vlad Yasevich <vyasevich@gmail.com>
+M: Sridhar Samudrala <sri@us.ibm.com>
M: Neil Horman <nhorman@tuxdriver.com>
L: linux-sctp@vger.kernel.org
W: http://lksctp.sourceforge.net
@@ -7379,7 +7374,7 @@ F: sound/
SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
M: Liam Girdwood <lgirdwood@gmail.com>
-M: Mark Brown <broonie@kernel.org>
+M: Mark Brown <broonie@opensource.wolfsonmicro.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
W: http://alsa-project.org/main/index.php/ASoC
@@ -7468,7 +7463,7 @@ F: drivers/clk/spear/
SPI SUBSYSTEM
M: Grant Likely <grant.likely@secretlab.ca>
-M: Mark Brown <broonie@kernel.org>
+M: Mark Brown <broonie@opensource.wolfsonmicro.com>
L: spi-devel-general@lists.sourceforge.net
Q: http://patchwork.kernel.org/project/spi-devel-general/list/
T: git git://git.secretlab.ca/git/linux-2.6.git
@@ -8713,7 +8708,7 @@ F: drivers/scsi/vmw_pvscsi.h
VOLTAGE AND CURRENT REGULATOR FRAMEWORK
M: Liam Girdwood <lrg@ti.com>
-M: Mark Brown <broonie@kernel.org>
+M: Mark Brown <broonie@opensource.wolfsonmicro.com>
W: http://opensource.wolfsonmicro.com/node/15
W: http://www.slimlogic.co.uk/?p=48
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lrg/regulator.git
diff --git a/Makefile b/Makefile
index 8fe69916..6db672b1 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 9
SUBLEVEL = 0
-EXTRAVERSION =
+EXTRAVERSION = -rc6
NAME = Unicycling Gorilla
# *DOCUMENTATION*
@@ -513,8 +513,7 @@ ifeq ($(KBUILD_EXTMOD),)
# Carefully list dependencies so we do not try to build scripts twice
# in parallel
PHONY += scripts
-scripts: scripts_basic include/config/auto.conf include/config/tristate.conf \
- asm-generic
+scripts: scripts_basic include/config/auto.conf include/config/tristate.conf
$(Q)$(MAKE) $(build)=$(@)
# Objects we will link into vmlinux / subdirs we need to visit
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1cacda42..910d57a4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -956,8 +956,10 @@ config ARCH_DAVINCI
select GENERIC_IRQ_CHIP
select HAVE_IDE
select NEED_MACH_GPIO_H
+ select TI_PRIV_EDMA
select USE_OF
select ZONE_DMA
+ select FIQ
help
Support for TI's DaVinci platform.
@@ -1031,120 +1033,9 @@ endmenu
# Kconfigs may be included either alphabetically (according to the
# plat- suffix) or along side the corresponding mach-* source.
#
-source "arch/arm/mach-mvebu/Kconfig"
-
-source "arch/arm/mach-at91/Kconfig"
-
-source "arch/arm/mach-bcm/Kconfig"
-
-source "arch/arm/mach-clps711x/Kconfig"
-
-source "arch/arm/mach-cns3xxx/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
-source "arch/arm/mach-dove/Kconfig"
-
-source "arch/arm/mach-ep93xx/Kconfig"
-
-source "arch/arm/mach-footbridge/Kconfig"
-
-source "arch/arm/mach-gemini/Kconfig"
-
-source "arch/arm/mach-h720x/Kconfig"
-
-source "arch/arm/mach-highbank/Kconfig"
-
-source "arch/arm/mach-integrator/Kconfig"
-
-source "arch/arm/mach-iop32x/Kconfig"
-
-source "arch/arm/mach-iop33x/Kconfig"
-
-source "arch/arm/mach-iop13xx/Kconfig"
-
-source "arch/arm/mach-ixp4xx/Kconfig"
-
-source "arch/arm/mach-kirkwood/Kconfig"
-
-source "arch/arm/mach-ks8695/Kconfig"
-
-source "arch/arm/mach-msm/Kconfig"
-
-source "arch/arm/mach-mv78xx0/Kconfig"
-
-source "arch/arm/mach-imx/Kconfig"
-
-source "arch/arm/mach-mxs/Kconfig"
-
-source "arch/arm/mach-netx/Kconfig"
-
-source "arch/arm/mach-nomadik/Kconfig"
-
-source "arch/arm/plat-omap/Kconfig"
-
-source "arch/arm/mach-omap1/Kconfig"
-
-source "arch/arm/mach-omap2/Kconfig"
-
-source "arch/arm/mach-orion5x/Kconfig"
-
-source "arch/arm/mach-picoxcell/Kconfig"
-
-source "arch/arm/mach-pxa/Kconfig"
-source "arch/arm/plat-pxa/Kconfig"
-
-source "arch/arm/mach-mmp/Kconfig"
-
-source "arch/arm/mach-realview/Kconfig"
-
-source "arch/arm/mach-sa1100/Kconfig"
-
-source "arch/arm/plat-samsung/Kconfig"
-
-source "arch/arm/mach-socfpga/Kconfig"
-
-source "arch/arm/plat-spear/Kconfig"
-
-source "arch/arm/mach-s3c24xx/Kconfig"
-
-if ARCH_S3C64XX
-source "arch/arm/mach-s3c64xx/Kconfig"
-endif
-
-source "arch/arm/mach-s5p64x0/Kconfig"
-
-source "arch/arm/mach-s5pc100/Kconfig"
-
-source "arch/arm/mach-s5pv210/Kconfig"
-
-source "arch/arm/mach-exynos/Kconfig"
-
-source "arch/arm/mach-shmobile/Kconfig"
-
-source "arch/arm/mach-sunxi/Kconfig"
-
-source "arch/arm/mach-prima2/Kconfig"
-
-source "arch/arm/mach-tegra/Kconfig"
-
-source "arch/arm/mach-u300/Kconfig"
-
-source "arch/arm/mach-ux500/Kconfig"
-
-source "arch/arm/mach-versatile/Kconfig"
-
-source "arch/arm/mach-vexpress/Kconfig"
-source "arch/arm/plat-versatile/Kconfig"
-
-source "arch/arm/mach-virt/Kconfig"
-
-source "arch/arm/mach-vt8500/Kconfig"
-
-source "arch/arm/mach-w90x900/Kconfig"
-
-source "arch/arm/mach-zynq/Kconfig"
-
# Definitions to make life easier
config ARCH_ACORN
bool
@@ -1182,18 +1073,6 @@ config ARM_NR_BANKS
default 16 if ARCH_EP93XX
default 8
-config IWMMXT
- bool "Enable iWMMXt support" if !CPU_PJ4
- depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
- default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
- help
- Enable support for iWMMXt context switching at run time if
- running on a CPU that supports it.
-
-config XSCALE_PMU
- bool
- depends on CPU_XSCALE
- default y
config MULTI_IRQ_HANDLER
bool
@@ -1627,7 +1506,7 @@ config PAGE_OFFSET
hex
default 0x40000000 if VMSPLIT_1G
default 0x80000000 if VMSPLIT_2G
- default 0xC0000000
+ default 0x80000000
config NR_CPUS
int "Maximum number of CPUs (2-32)"
@@ -1668,11 +1547,6 @@ config LOCAL_TIMERS
# selected platforms.
config ARCH_NR_GPIO
int
- default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
- default 512 if SOC_OMAP5
- default 355 if ARCH_U8500
- default 288 if ARCH_VT8500 || ARCH_SUNXI
- default 264 if MACH_H4700
default 0
help
Maximum number of GPIOs in the system.
@@ -1683,11 +1557,7 @@ source kernel/Kconfig.preempt
config HZ
int
- default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
- ARCH_S5PV210 || ARCH_EXYNOS4
- default AT91_TIMER_HZ if ARCH_AT91
- default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
- default 100
+ default 1000
config SCHED_HRTICK
def_bool HIGH_RES_TIMERS
@@ -1819,9 +1689,6 @@ source "mm/Kconfig"
config FORCE_MAX_ZONEORDER
int "Maximum zone order" if ARCH_SHMOBILE
- range 11 64 if ARCH_SHMOBILE
- default "12" if SOC_AM33XX
- default "9" if SA1111
default "11"
help
The kernel memory allocator divides physically contiguous memory
@@ -2159,89 +2026,6 @@ endmenu
menu "CPU Power Management"
-if ARCH_HAS_CPUFREQ
-
-source "drivers/cpufreq/Kconfig"
-
-config CPU_FREQ_IMX
- tristate "CPUfreq driver for i.MX CPUs"
- depends on ARCH_MXC && CPU_FREQ
- select CPU_FREQ_TABLE
- help
- This enables the CPUfreq driver for i.MX CPUs.
-
-config CPU_FREQ_SA1100
- bool
-
-config CPU_FREQ_SA1110
- bool
-
-config CPU_FREQ_INTEGRATOR
- tristate "CPUfreq driver for ARM Integrator CPUs"
- depends on ARCH_INTEGRATOR && CPU_FREQ
- default y
- help
- This enables the CPUfreq driver for ARM Integrator CPUs.
-
- For details, take a look at <file:Documentation/cpu-freq>.
-
- If in doubt, say Y.
-
-config CPU_FREQ_PXA
- bool
- depends on CPU_FREQ && ARCH_PXA && PXA25x
- default y
- select CPU_FREQ_DEFAULT_GOV_USERSPACE
- select CPU_FREQ_TABLE
-
-config CPU_FREQ_S3C
- bool
- help
- Internal configuration node for common cpufreq on Samsung SoC
-
-config CPU_FREQ_S3C24XX
- bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
- depends on ARCH_S3C24XX && CPU_FREQ
- select CPU_FREQ_S3C
- help
- This enables the CPUfreq driver for the Samsung S3C24XX family
- of CPUs.
-
- For details, take a look at <file:Documentation/cpu-freq>.
-
- If in doubt, say N.
-
-config CPU_FREQ_S3C24XX_PLL
- bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
- depends on CPU_FREQ_S3C24XX
- help
- Compile in support for changing the PLL frequency from the
- S3C24XX series CPUfreq driver. The PLL takes time to settle
- after a frequency change, so by default it is not enabled.
-
- This also means that the PLL tables for the selected CPU(s) will
- be built which may increase the size of the kernel image.
-
-config CPU_FREQ_S3C24XX_DEBUG
- bool "Debug CPUfreq Samsung driver core"
- depends on CPU_FREQ_S3C24XX
- help
- Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
-
-config CPU_FREQ_S3C24XX_IODEBUG
- bool "Debug CPUfreq Samsung driver IO timing"
- depends on CPU_FREQ_S3C24XX
- help
- Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
-
-config CPU_FREQ_S3C24XX_DEBUGFS
- bool "Export debugfs for CPUFreq"
- depends on CPU_FREQ_S3C24XX && DEBUG_FS
- help
- Export status information via debugfs.
-
-endif
-
source "drivers/cpuidle/Kconfig"
endmenu
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9c625588..a7176449 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -34,8 +34,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
-dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
- da850-evm.dtb
+#dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
+# da850-evm.dtb
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
dove-dove-db.dtb
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index f712fb60..c5834a6c 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -35,14 +35,84 @@
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
+
+ tps: tps@48 {
+ reg = <0x48>;
+ };
};
wdt: wdt@1c21000 {
status = "okay";
};
+ mmc0: mmc@1c40000 {
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ };
};
nand_cs3@62000000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_cs3_pins>;
};
+ vbat: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ };
+};
+
+/include/ "tps6507x.dtsi"
+
+&tps {
+ vdcdc1_2-supply = <&vbat>;
+ vdcdc3-supply = <&vbat>;
+ vldo1_2-supply = <&vbat>;
+
+ regulators {
+ vdcdc1_reg: regulator@0 {
+ regulator-name = "VDCDC1_3.3V";
+ regulator-min-microvolt = <3150000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdcdc2_reg: regulator@1 {
+ regulator-name = "VDCDC2_3.3V";
+ regulator-min-microvolt = <1710000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,defdcdc_default = <1>;
+ };
+
+ vdcdc3_reg: regulator@2 {
+ regulator-name = "VDCDC3_1.2V";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,defdcdc_default = <1>;
+ };
+
+ ldo1_reg: regulator@3 {
+ regulator-name = "LDO1_1.8V";
+ regulator-min-microvolt = <1710000>;
+ regulator-max-microvolt = <1890000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ regulator-name = "LDO2_1.2V";
+ regulator-min-microvolt = <1140000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
deleted file mode 100644
index 3ec1bda6..00000000
--- a/arch/arm/boot/dts/da850.dtsi
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright 2012 DENX Software Engineering GmbH
- * Heiko Schocher <hs@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-/include/ "skeleton.dtsi"
-
-/ {
- arm {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- intc: interrupt-controller {
- compatible = "ti,cp-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- ti,intc-size = <100>;
- reg = <0xfffee000 0x2000>;
- };
- };
- soc {
- compatible = "simple-bus";
- model = "da850";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x01c00000 0x400000>;
- interrupt-parent = <&intc>;
-
- pmx_core: pinmux@1c14120 {
- compatible = "pinctrl-single";
- reg = <0x14120 0x50>;
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-single,bit-per-mux;
- pinctrl-single,register-width = <32>;
- pinctrl-single,function-mask = <0xffffffff>;
- status = "disabled";
-
- nand_cs3_pins: pinmux_nand_pins {
- pinctrl-single,bits = <
- /* EMA_OE, EMA_WE */
- 0x1c 0x00110000 0x00ff0000
- /* EMA_CS[4],EMA_CS[3]*/
- 0x1c 0x00000110 0x00000ff0
- /*
- * EMA_D[0], EMA_D[1], EMA_D[2],
- * EMA_D[3], EMA_D[4], EMA_D[5],
- * EMA_D[6], EMA_D[7]
- */
- 0x24 0x11111111 0xffffffff
- /* EMA_A[1], EMA_A[2] */
- 0x30 0x01100000 0x0ff00000
- >;
- };
- i2c0_pins: pinmux_i2c0_pins {
- pinctrl-single,bits = <
- /* I2C0_SDA,I2C0_SCL */
- 0x10 0x00002200 0x0000ff00
- >;
- };
- };
- serial0: serial@1c42000 {
- compatible = "ns16550a";
- reg = <0x42000 0x100>;
- clock-frequency = <150000000>;
- reg-shift = <2>;
- interrupts = <25>;
- status = "disabled";
- };
- serial1: serial@1d0c000 {
- compatible = "ns16550a";
- reg = <0x10c000 0x100>;
- clock-frequency = <150000000>;
- reg-shift = <2>;
- interrupts = <53>;
- status = "disabled";
- };
- serial2: serial@1d0d000 {
- compatible = "ns16550a";
- reg = <0x10d000 0x100>;
- clock-frequency = <150000000>;
- reg-shift = <2>;
- interrupts = <61>;
- status = "disabled";
- };
- rtc0: rtc@1c23000 {
- compatible = "ti,da830-rtc";
- reg = <0x23000 0x1000>;
- interrupts = <19
- 19>;
- status = "disabled";
- };
- i2c0: i2c@1c22000 {
- compatible = "ti,davinci-i2c";
- reg = <0x22000 0x1000>;
- interrupts = <15>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
- wdt: wdt@1c21000 {
- compatible = "ti,davinci-wdt";
- reg = <0x21000 0x1000>;
- status = "disabled";
- };
- };
- nand_cs3@62000000 {
- compatible = "ti,davinci-nand";
- reg = <0x62000000 0x807ff
- 0x68000000 0x8000>;
- ti,davinci-chipselect = <1>;
- ti,davinci-mask-ale = <0>;
- ti,davinci-mask-cle = <0>;
- ti,davinci-mask-chipsel = <0>;
- ti,davinci-ecc-mode = "hw";
- ti,davinci-ecc-bits = <4>;
- ti,davinci-nand-use-bbt;
- status = "disabled";
- };
-};
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index fd36e1cc..6ce3d17c 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -152,6 +152,7 @@
i2c0: i2c@80058000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
+ clock-frequency = <400000>;
status = "okay";
sgtl5000: codec@0a {
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
index 6c6a5442..e6cde8aa 100644
--- a/arch/arm/boot/dts/imx28-sps1.dts
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -70,6 +70,7 @@
i2c0: i2c@80058000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
+ clock-frequency = <400000>;
status = "okay";
rtc: rtc@51 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 281a2235..06ec460b 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -91,7 +91,6 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0x00a00600 0x20>;
interrupts = <1 13 0xf01>;
- clocks = <&clks 15>;
};
L2: l2-cache@00a02000 {
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 3694e94f..93c3afbe 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -96,11 +96,11 @@
marvell,function = "gpio";
};
pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
- marvell,pins = "mpp46";
+ marvell,pins = "mpp44";
marvell,function = "gpio";
};
pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
- marvell,pins = "mpp47";
+ marvell,pins = "mpp45";
marvell,function = "gpio";
};
@@ -157,14 +157,14 @@
gpios = <&gpio0 16 0>;
linux,default-trigger = "default-on";
};
- rebuild_led {
- label = "status:white:rebuild_led";
- gpios = <&gpio1 4 0>;
- };
- health_led {
+ health_led1 {
label = "status:red:health_led";
gpios = <&gpio1 5 0>;
};
+ health_led2 {
+ label = "status:white:health_led";
+ gpios = <&gpio1 4 0>;
+ };
backup_led {
label = "status:blue:backup_led";
gpios = <&gpio0 15 0>;
diff --git a/arch/arm/boot/dts/tps6507x.dtsi b/arch/arm/boot/dts/tps6507x.dtsi
new file mode 100644
index 00000000..4c326e59
--- /dev/null
+++ b/arch/arm/boot/dts/tps6507x.dtsi
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Integrated Power Management Chip
+ * http://www.ti.com/lit/ds/symlink/tps65070.pdf
+ */
+
+&tps {
+ compatible = "ti,tps6507x";
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vdcdc1_reg: regulator@0 {
+ reg = <0>;
+ regulator-compatible = "VDCDC1";
+ };
+
+ vdcdc2_reg: regulator@1 {
+ reg = <1>;
+ regulator-compatible = "VDCDC2";
+ };
+
+ vdcdc3_reg: regulator@2 {
+ reg = <2>;
+ regulator-compatible = "VDCDC3";
+ };
+
+ ldo1_reg: regulator@3 {
+ reg = <3>;
+ regulator-compatible = "LDO1";
+ };
+
+ ldo2_reg: regulator@4 {
+ reg = <4>;
+ regulator-compatible = "LDO2";
+ };
+
+ };
+};
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 9353184d..c3a4e9ce 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -17,3 +17,6 @@ config SHARP_PARAM
config SHARP_SCOOP
bool
+
+config TI_PRIV_EDMA
+ bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index dc8dd0de..9643c504 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
+obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
similarity index 92%
rename from arch/arm/mach-davinci/dma.c
rename to arch/arm/common/edma.c
index 45b7c71d..00e47e23 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/common/edma.c
@@ -24,8 +24,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/edma.h>
-#include <mach/edma.h>
+
+#include <linux/platform_data/edma.h>
/* Offsets matching "struct edmacc_param" */
#define PARM_OPT 0x00
@@ -95,7 +97,13 @@
#define PARM_OFFSET(param_no) (EDMA_PARM + ((param_no) << 5))
#define EDMA_DCHMAP 0x0100 /* 64 registers */
-#define CHMAP_EXIST BIT(24)
+
+/* CCCFG register */
+#define GET_NUM_DMACH(x) (x & 0x7) /* bits 0-2 */
+#define GET_NUM_PAENTRY(x) ((x & 0x7000) >> 12) /* bits 12-14 */
+#define GET_NUM_EVQUE(x) ((x & 0x70000) >> 16) /* bits 16-18 */
+#define GET_NUM_REGN(x) ((x & 0x300000) >> 20) /* bits 20-21 */
+#define CHMAP_EXIST BIT(24)
#define EDMA_MAX_DMACH 64
#define EDMA_MAX_PARAMENTRY 512
@@ -392,7 +400,7 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
BIT(slot));
if (edma_cc[ctlr]->intr_data[channel].callback)
edma_cc[ctlr]->intr_data[channel].callback(
- channel, DMA_COMPLETE,
+ channel, EDMA_DMA_COMPLETE,
edma_cc[ctlr]->intr_data[channel].data);
}
} while (sh_ipr);
@@ -447,7 +455,7 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
callback) {
edma_cc[ctlr]->intr_data[k].
callback(k,
- DMA_CC_ERROR,
+ EDMA_DMA_CC_ERROR,
edma_cc[ctlr]->intr_data
[k].data);
}
@@ -494,26 +502,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
return IRQ_HANDLED;
}
-/******************************************************************************
- *
- * Transfer controller error interrupt handlers
- *
- *****************************************************************************/
-
-#define tc_errs_handled false /* disabled as long as they're NOPs */
-
-static irqreturn_t dma_tc0err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc0err_handler\n");
- return IRQ_HANDLED;
-}
-
-static irqreturn_t dma_tc1err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc1err_handler\n");
- return IRQ_HANDLED;
-}
-
static int reserve_contiguous_slots(int ctlr, unsigned int id,
unsigned int num_slots,
unsigned int start_slot)
@@ -986,21 +974,17 @@ EXPORT_SYMBOL(edma_set_dest);
* Returns current source and destination addresses for a particular
* parameter RAM slot. Its channel should not be active when this is called.
*/
-void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst)
+dma_addr_t edma_get_position(unsigned slot, bool dst)
{
- struct edmacc_param temp;
- unsigned ctlr;
+ u32 offs, ctlr = EDMA_CTLR(slot);
- ctlr = EDMA_CTLR(slot);
slot = EDMA_CHAN_SLOT(slot);
- edma_read_slot(EDMA_CTLR_CHAN(ctlr, slot), &temp);
- if (src != NULL)
- *src = temp.src;
- if (dst != NULL)
- *dst = temp.dst;
+ offs = PARM_OFFSET(slot);
+ offs += dst ? PARM_DST : PARM_SRC;
+
+ return edma_read(ctlr, offs);
}
-EXPORT_SYMBOL(edma_get_position);
/**
* edma_set_src_index - configure DMA source address indexing
@@ -1248,6 +1232,23 @@ void edma_resume(unsigned channel)
}
EXPORT_SYMBOL(edma_resume);
+int edma_trigger_channel(unsigned channel)
+{
+ unsigned ctlr;
+ unsigned int mask;
+
+ ctlr = EDMA_CTLR(channel);
+ channel = EDMA_CHAN_SLOT(channel);
+ mask = BIT(channel & 0x1f);
+
+ edma_shadow0_write_array(ctlr, SH_ESR, (channel >> 5), mask);
+
+ pr_debug("EDMA: ESR%d %08x\n", (channel >> 5),
+ edma_shadow0_read_array(ctlr, SH_ESR, (channel >> 5)));
+ return 0;
+}
+EXPORT_SYMBOL(edma_trigger_channel);
+
/**
* edma_start - start dma on a channel
* @channel: channel being activated
@@ -1388,12 +1389,104 @@ void edma_clear_event(unsigned channel)
}
EXPORT_SYMBOL(edma_clear_event);
-/*-----------------------------------------------------------------------*/
+/*
+ * edma_assign_channel_eventq - move given channel to desired eventq
+ * Arguments:
+ * channel - channel number
+ * eventq_no - queue to move the channel
+ *
+ * Can be used to move a channel to a selected event queue.
+ */
+void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no)
+{
+ unsigned ctlr;
+ ctlr = EDMA_CTLR(channel);
+ channel = EDMA_CHAN_SLOT(channel);
+
+ if (channel >= edma_cc[ctlr]->num_channels)
+ return;
+
+ /* default to low priority queue */
+ if (eventq_no == EVENTQ_DEFAULT)
+ eventq_no = edma_cc[ctlr]->default_queue;
+ if (eventq_no >= edma_cc[ctlr]->num_tc)
+ return;
+
+ map_dmach_queue(ctlr, channel, eventq_no);
+}
+EXPORT_SYMBOL(edma_assign_channel_eventq);
+
+static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
+ struct edma *edma_cc, int cc_id)
+{
+ int i;
+ u32 value, cccfg;
+ s8 (*queue_priority_map)[2];
+ /* Decode the eDMA3 configuration from CCCFG register */
+ cccfg = edma_read(cc_id, EDMA_CCCFG);
+
+ value = GET_NUM_REGN(cccfg);
+ edma_cc->num_region = BIT(value);
+
+ value = GET_NUM_DMACH(cccfg);
+ edma_cc->num_channels = BIT(value + 1);
+
+ value = GET_NUM_PAENTRY(cccfg);
+ edma_cc->num_slots = BIT(value + 4);
+
+ value = GET_NUM_EVQUE(cccfg);
+ edma_cc->num_tc = value + 1;
+
+ dev_dbg(dev, "eDMA3 CC%d HW configuration (cccfg: 0x%08x):\n", cc_id,
+ cccfg);
+ dev_dbg(dev, "num_region: %u\n", edma_cc->num_region);
+ dev_dbg(dev, "num_channel: %u\n", edma_cc->num_channels);
+ dev_dbg(dev, "num_slot: %u\n", edma_cc->num_slots);
+ dev_dbg(dev, "num_tc: %u\n", edma_cc->num_tc);
+
+ /* Nothing need to be done if queue priority is provided */
+ if (pdata->queue_priority_mapping)
+ return 0;
+
+ /*
+ * Configure TC/queue priority as follows:
+ * Q0 - priority 0
+ * Q1 - priority 1
+ * Q2 - priority 2
+ * ...
+ * The meaning of priority numbers: 0 highest priority, 7 lowest
+ * priority. So Q0 is the highest priority queue and the last queue has
+ * the lowest priority.
+ */
+ queue_priority_map = devm_kzalloc(dev,
+ (edma_cc->num_tc + 1) * sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_priority_map)
+ return -ENOMEM;
+
+ for (i = 0; i < edma_cc->num_tc; i++) {
+ queue_priority_map[i][0] = i;
+ queue_priority_map[i][1] = i;
+ }
+ queue_priority_map[i][0] = -1;
+ queue_priority_map[i][1] = -1;
+
+ pdata->queue_priority_mapping = queue_priority_map;
+ /* Default queue has the lowest priority */
+ pdata->default_queue = i - 1;
+
+ return 0;
+}
+static struct edma_soc_info *edma_setup_info_from_dt(struct device *dev,
+ struct device_node *node)
+{
+ return (void*)-ENOSYS;
+}
static int __init edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
- const s8 (*queue_priority_mapping)[2];
+ /*const */s8 (*queue_priority_mapping)[2];
const s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
int status = -1;
@@ -1541,23 +1634,6 @@ static int __init edma_probe(struct platform_device *pdev)
arch_num_cc++;
}
- if (tc_errs_handled) {
- status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0,
- "edma_tc0", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
- IRQ_TCERRINT0, status);
- return status;
- }
- status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0,
- "edma_tc1", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d --> %d\n",
- IRQ_TCERRINT, status);
- return status;
- }
- }
-
return 0;
fail:
diff --git a/arch/arm/configs/acs5k_defconfig b/arch/arm/configs/acs5k_defconfig
deleted file mode 100644
index 92b0f90d..00000000
--- a/arch/arm/configs/acs5k_defconfig
+++ /dev/null
@@ -1,86 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_KS8695=y
-CONFIG_MACH_KS8695=y
-CONFIG_MACH_DSM320=y
-CONFIG_MACH_ACS5K=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_PCI=y
-CONFIG_PCI_DEBUG=y
-CONFIG_PCCARD=y
-CONFIG_YENTA=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_ARM_KS8695_ETHER=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PRISM54=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_KS8695=y
-CONFIG_SERIAL_KS8695_CONSOLE=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_WATCHDOG=y
-CONFIG_KS8695_WATCHDOG=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/acs5k_tiny_defconfig b/arch/arm/configs/acs5k_tiny_defconfig
deleted file mode 100644
index 2a27a147..00000000
--- a/arch/arm/configs/acs5k_tiny_defconfig
+++ /dev/null
@@ -1,80 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_KS8695=y
-CONFIG_MACH_ACS5K=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyAM0,115200 init=/bin/sh"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_ARM_KS8695_ETHER=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_KS8695=y
-CONFIG_SERIAL_KS8695_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PCA953X=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_KS8695_WATCHDOG=y
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_SQUASHFS=y
-# CONFIG_NETWORK_FILESYSTEMS is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/ag5evm_defconfig b/arch/arm/configs/ag5evm_defconfig
deleted file mode 100644
index 212ead35..00000000
--- a/arch/arm/configs/ag5evm_defconfig
+++ /dev/null
@@ -1,83 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_SH73A0=y
-CONFIG_MACH_AG5EVM=y
-CONFIG_MEMORY_SIZE=0x10000000
-CONFIG_CPU_BPREDICT_DISABLE=y
-CONFIG_ARM_ERRATA_430973=y
-CONFIG_ARM_ERRATA_458693=y
-CONFIG_NO_HZ=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty0 console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
-CONFIG_CMDLINE_FORCE=y
-CONFIG_KEXEC=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM=y
-# CONFIG_SUSPEND is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_BLK_DEV is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-CONFIG_INPUT_SPARSEKMAP=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=9
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_SH_MOBILE=y
-# CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
-CONFIG_FB=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_FTRACE is not set
diff --git a/arch/arm/configs/am200epdkit_defconfig b/arch/arm/configs/am200epdkit_defconfig
deleted file mode 100644
index f0dea52e..00000000
--- a/arch/arm/configs/am200epdkit_defconfig
+++ /dev/null
@@ -1,108 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="gum"
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_EPOLL is not set
-# CONFIG_SHMEM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_ARCH_GUMSTIX=y
-CONFIG_PCCARD=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200n8 root=1f01 rootfstype=jffs2"
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=m
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=m
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FB_PXA=y
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_FB_MBX=m
-CONFIG_FB_VIRTUAL=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_PXA2XX_AC97=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_PXA=y
-# CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_ARC4=m
diff --git a/arch/arm/configs/ap4evb_defconfig b/arch/arm/configs/ap4evb_defconfig
deleted file mode 100644
index 66894f73..00000000
--- a/arch/arm/configs/ap4evb_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_SH7372=y
-CONFIG_MACH_AP4EVB=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=sh-sci.0,115200"
-CONFIG_KEXEC=y
-CONFIG_PM=y
-# CONFIG_SUSPEND is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
deleted file mode 100644
index 0b98100d..00000000
--- a/arch/arm/configs/armadillo800eva_defconfig
+++ /dev/null
@@ -1,147 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_R8A7740=y
-CONFIG_MACH_ARMADILLO800EVA=y
-# CONFIG_SH_TIMER_TMU is not set
-CONFIG_ARM_THUMB=y
-CONFIG_CPU_BPREDICT_DISABLE=y
-CONFIG_CACHE_L2X0=y
-CONFIG_ARM_ERRATA_430973=y
-CONFIG_ARM_ERRATA_458693=y
-CONFIG_ARM_ERRATA_460075=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_ARM_ERRATA_743622=y
-CONFIG_ARM_ERRATA_751472=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_FORCE_MAX_ZONEORDER=13
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_KEXEC=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-CONFIG_SH_ETH=y
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ST1232=y
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_I2C_SH_MOBILE=y
-# CONFIG_HWMON is not set
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_MT9T112=y
-CONFIG_VIDEO_SH_MOBILE_CEU=y
-CONFIG_FB=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_FB_SH_MOBILE_HDMI=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_SOC_SH4_FSI=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_RENESAS_USBHS=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_RENESAS_USBHS_UDC=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHI=y
-CONFIG_MMC_SH_MMCIF=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_S35390A=y
-CONFIG_DMADEVICES=y
-CONFIG_SH_DMAE=y
-CONFIG_UIO=y
-CONFIG_UIO_PDRV_GENIRQ=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
-CONFIG_XZ_DEC=y
diff --git a/arch/arm/configs/assabet_defconfig b/arch/arm/configs/assabet_defconfig
deleted file mode 100644
index 558ecd8f..00000000
--- a/arch/arm/configs/assabet_defconfig
+++ /dev/null
@@ -1,60 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_ASSABET=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=32M console=ttySA0,38400n8 initrd=0xc0800000,3M root=/dev/ram"
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_SA1100_FIR=m
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
deleted file mode 100644
index 1ea95901..00000000
--- a/arch/arm/configs/at91_dt_defconfig
+++ /dev/null
@@ -1,198 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_SOC_AT91SAM9260=y
-CONFIG_SOC_AT91SAM9263=y
-CONFIG_SOC_AT91SAM9G45=y
-CONFIG_SOC_AT91SAM9X5=y
-CONFIG_SOC_AT91SAM9N12=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_AT91_TIMER_HZ=128
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
-CONFIG_KEXEC=y
-CONFIG_AUTO_ZRELADDR=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-CONFIG_IPV6_SIT_6RD=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_93CX6=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_DAVICOM_PHY=y
-CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=4
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-CONFIG_PINCTRL_AT91=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_SSB=m
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_AT91=m
-CONFIG_USB_ATMEL_USBA=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_DMADEVICES=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ARC4=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_CRC_ITU_T=m
-CONFIG_CRC7=m
-CONFIG_AVERAGE=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
deleted file mode 100644
index 4ae57a34..00000000
--- a/arch/arm/configs/at91rm9200_defconfig
+++ /dev/null
@@ -1,323 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91RM9200=y
-CONFIG_MACH_ONEARM=y
-CONFIG_ARCH_AT91RM9200DK=y
-CONFIG_MACH_AT91RM9200EK=y
-CONFIG_MACH_CSB337=y
-CONFIG_MACH_CSB637=y
-CONFIG_MACH_CARMEVA=y
-CONFIG_MACH_ATEB9200=y
-CONFIG_MACH_KB9200=y
-CONFIG_MACH_PICOTUX2XX=y
-CONFIG_MACH_KAFA=y
-CONFIG_MACH_ECBAT91=y
-CONFIG_MACH_YL9200=y
-CONFIG_MACH_CPUAT91=y
-CONFIG_MACH_ECO920=y
-CONFIG_MTD_AT91_DATAFLASH_CARD=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_AT91_TIMER_HZ=100
-# CONFIG_ARM_THUMB is not set
-CONFIG_PCCARD=y
-CONFIG_AT91_CF=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x10000000
-CONFIG_ZBOOT_ROM_BSS=0x20040000
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPIP=m
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_BT=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_AFS_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PLATRAM=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=m
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_TUN=m
-CONFIG_ARM_AT91_ETHER=y
-CONFIG_PHYLIB=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_SMSC_PHY=y
-CONFIG_MICREL_PHY=y
-CONFIG_PPP=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=y
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_RTL8150=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_NET_DM9601=m
-CONFIG_USB_NET_GL620A=m
-CONFIG_USB_NET_PLUSB=m
-CONFIG_USB_NET_RNDIS_HOST=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_LEGACY_PTY_COUNT=32
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-CONFIG_SPI_BITBANG=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HWMON=m
-CONFIG_SENSORS_ADM1021=m
-CONFIG_SENSORS_ADM1025=m
-CONFIG_SENSORS_ADM1026=m
-CONFIG_SENSORS_ADM1029=m
-CONFIG_SENSORS_ADM1031=m
-CONFIG_SENSORS_ADM9240=m
-CONFIG_SENSORS_DS1621=m
-CONFIG_SENSORS_GL518SM=m
-CONFIG_SENSORS_GL520SM=m
-CONFIG_SENSORS_IT87=m
-CONFIG_SENSORS_LM63=m
-CONFIG_SENSORS_LM73=m
-CONFIG_SENSORS_LM75=m
-CONFIG_SENSORS_LM77=m
-CONFIG_SENSORS_LM78=m
-CONFIG_SENSORS_LM80=m
-CONFIG_SENSORS_LM83=m
-CONFIG_SENSORS_LM85=m
-CONFIG_SENSORS_LM87=m
-CONFIG_SENSORS_LM90=m
-CONFIG_SENSORS_LM92=m
-CONFIG_SENSORS_MAX1619=m
-CONFIG_SENSORS_PCF8591=m
-CONFIG_SENSORS_SMSC47B397=m
-CONFIG_SENSORS_W83781D=m
-CONFIG_SENSORS_W83791D=m
-CONFIG_SENSORS_W83792D=m
-CONFIG_SENSORS_W83793=m
-CONFIG_SENSORS_W83L785TS=m
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91RM9200_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FB_S1D13XXX=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_DISPLAY_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_CONSOLE=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_KEYSPAN=y
-CONFIG_USB_SERIAL_KEYSPAN_MPR=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19=y
-CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
-CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
-CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
-CONFIG_USB_SERIAL_MCT_U232=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_REISERFS_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=m
-CONFIG_TMPFS=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=y
-CONFIG_MINIX_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_FTRACE is not set
-CONFIG_CRYPTO_PCBC=y
-CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91sam9260_defconfig b/arch/arm/configs/at91sam9260_defconfig
deleted file mode 100644
index 0ea5d2c9..00000000
--- a/arch/arm/configs/at91sam9260_defconfig
+++ /dev/null
@@ -1,91 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_ARCH_AT91SAM9260_SAM9XE=y
-CONFIG_MACH_AT91SAM9260EK=y
-CONFIG_MACH_CAM60=y
-CONFIG_MACH_SAM9_L9260=y
-CONFIG_MACH_AFEB9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_MACH_CPU9260=y
-CONFIG_MACH_FLEXIBITY=y
-CONFIG_MACH_SNAPPER_9260=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/at91sam9261_defconfig b/arch/arm/configs/at91sam9261_defconfig
deleted file mode 100644
index c87beb97..00000000
--- a/arch/arm/configs/at91sam9261_defconfig
+++ /dev/null
@@ -1,158 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZMA=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9261=y
-CONFIG_MACH_AT91SAM9261EK=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_CFG80211=y
-CONFIG_LIB80211=y
-CONFIG_MAC80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_MISC_DEVICES=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_ATMEL_SSC=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_USB_ZD1201=m
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_USB=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_LIBERTAS_SPI=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_POLLDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_AT73C213=y
-CONFIG_SND_USB_AUDIO=m
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_LZO=y
-CONFIG_SQUASHFS_XZ=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_FTRACE=y
-CONFIG_CRC_CCITT=m
diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig
deleted file mode 100644
index 36fed66b..00000000
--- a/arch/arm/configs/at91sam9263_defconfig
+++ /dev/null
@@ -1,166 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZMA=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9263=y
-CONFIG_MACH_AT91SAM9263EK=y
-CONFIG_MACH_USB_A9263=y
-CONFIG_MTD_AT91_DATAFLASH_CARD=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_NFTL=y
-CONFIG_NFTL_RW=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_MISC_DEVICES=y
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_USB_ZD1201=m
-CONFIG_INPUT_POLLDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_LEGACY_PTY_COUNT=4
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_ATMEL_AC97C=y
-# CONFIG_SND_SPI is not set
-CONFIG_SND_USB_AUDIO=m
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_MMC=y
-CONFIG_SDIO_UART=m
-CONFIG_MMC_ATMELMCI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_ATMEL_PWM=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_FTRACE=y
-CONFIG_DEBUG_USER=y
-CONFIG_XZ_DEC=y
diff --git a/arch/arm/configs/at91sam9g20_defconfig b/arch/arm/configs/at91sam9g20_defconfig
deleted file mode 100644
index 3b188103..00000000
--- a/arch/arm/configs/at91sam9g20_defconfig
+++ /dev/null
@@ -1,127 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G20=y
-CONFIG_MACH_AT91SAM9G20EK=y
-CONFIG_MACH_AT91SAM9G20EK_2MMC=y
-CONFIG_MACH_CPU9G20=y
-CONFIG_MACH_ACMENETUSFOXG20=y
-CONFIG_MACH_PORTUXG20=y
-CONFIG_MACH_STAMP9G20=y
-CONFIG_MACH_PCONTROL_G20=y
-CONFIG_MACH_GSIA18S=y
-CONFIG_MACH_USB_A9G20=y
-CONFIG_MACH_SNAPPER_9260=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-CONFIG_SPI_SPIDEV=y
-# CONFIG_HWMON is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-CONFIG_SND_SEQUENCER_OSS=y
-# CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_RV3029C2=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
deleted file mode 100644
index 606d48f3..00000000
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ /dev/null
@@ -1,211 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G45=y
-CONFIG_MACH_AT91SAM9M10G45EK=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_AT91_SLOW_CLOCK=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x71100000,25165824 root=/dev/ram0 rw"
-CONFIG_AUTO_ZRELADDR=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-CONFIG_IPV6_SIT_6RD=y
-CONFIG_CFG80211=y
-CONFIG_LIB80211=y
-CONFIG_MAC80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_MISC_DEVICES=y
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_LIBERTAS_THINFIRM=m
-CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_AT76C50X_USB=m
-CONFIG_USB_ZD1201=m
-CONFIG_RTL8187=m
-CONFIG_ATH_COMMON=m
-CONFIG_ATH9K=m
-CONFIG_CARL9170=m
-CONFIG_B43=m
-CONFIG_B43_PHY_N=y
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_USB=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_LIBERTAS_SPI=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RT2800USB_RT53XX=y
-CONFIG_RT2800USB_UNKNOWN=y
-CONFIG_RTL8192CU=m
-CONFIG_WL1251=m
-CONFIG_WL1251_SDIO=m
-CONFIG_WL12XX_MENU=m
-CONFIG_WL12XX=m
-CONFIG_WL12XX_SDIO=m
-CONFIG_ZD1211RW=m
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_INPUT_POLLDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_QT1070=m
-CONFIG_KEYBOARD_QT2160=m
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ATMEL_MXT=m
-CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=4
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_FB_UDL=m
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_ATMEL_AC97C=y
-# CONFIG_SND_SPI is not set
-CONFIG_SND_USB_AUDIO=m
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ATMEL_USBA=m
-CONFIG_USB_ZERO=m
-CONFIG_USB_AUDIO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_EEM=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_SDIO_UART=m
-CONFIG_MMC_ATMELMCI=y
-CONFIG_MMC_ATMELMCI_DMA=y
-CONFIG_LEDS_ATMEL_PWM=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_DMADEVICES=y
-CONFIG_AT_HDMAC=y
-CONFIG_DMATEST=m
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_CRAMFS=m
-CONFIG_SQUASHFS=m
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_STRIP_ASM_SYMS=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_ECB=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/at91sam9rl_defconfig b/arch/arm/configs/at91sam9rl_defconfig
deleted file mode 100644
index 7cf87856..00000000
--- a/arch/arm/configs/at91sam9rl_defconfig
+++ /dev/null
@@ -1,79 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9RL=y
-CONFIG_MACH_AT91SAM9RLEK=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,17105363 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_BLK_DEV_RAM_SIZE=24576
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/at91x40_defconfig b/arch/arm/configs/at91x40_defconfig
deleted file mode 100644
index c55e9212..00000000
--- a/arch/arm/configs/at91x40_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_ELF_CORE is not set
-# CONFIG_FUTEX is not set
-# CONFIG_TIMERFD is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_MMU is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91X40=y
-CONFIG_MACH_AT91EB01=y
-CONFIG_AT91_EARLY_USART0=y
-CONFIG_CPU_ARM7TDMI=y
-CONFIG_SET_MEM_PARAM=y
-CONFIG_DRAM_BASE=0x01000000
-CONFIG_DRAM_SIZE=0x00400000
-CONFIG_FLASH_MEM_BASE=0x01400000
-CONFIG_PROCESSOR_ID=0x14000040
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_BINFMT_FLAT=y
-# CONFIG_SUSPEND is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_ROM=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_DEVKMEM is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_ROMFS_FS=y
-# CONFIG_ENABLE_MUST_CHECK is not set
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
deleted file mode 100644
index 5b54abbe..00000000
--- a/arch/arm/configs/badge4_defconfig
+++ /dev/null
@@ -1,122 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_BADGE4=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_ARTHUR=m
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=y
-CONFIG_IRLAN=y
-CONFIG_IRCOMM=y
-CONFIG_IRDA_ULTRA=y
-CONFIG_SA1100_FIR=y
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIVHCI=m
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_PARPORT=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-CONFIG_USB_KC2190=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_ELEKTOR=m
-CONFIG_WATCHDOG=y
-CONFIG_SOFT_WATCHDOG=m
-CONFIG_SA1100_WATCHDOG=m
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_USS720=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_WHITEHEAT=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_XIRCOM=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_USB_RIO500=m
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_MINIX_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig
deleted file mode 100644
index af472e4e..00000000
--- a/arch/arm/configs/bcm2835_defconfig
+++ /dev/null
@@ -1,116 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_FHANDLE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_LOG_BUF_SHIFT=18
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CPUSETS=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_PERF=y
-CONFIG_CFS_BANDWIDTH=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_NAMESPACES=y
-CONFIG_SCHED_AUTOGROUP=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_RD_BZIP2=y
-CONFIG_RD_LZMA=y
-CONFIG_RD_XZ=y
-CONFIG_RD_LZO=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_JUMP_LABEL=y
-CONFIG_ARCH_BCM2835=y
-CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_AEABI=y
-CONFIG_KSM=y
-CONFIG_CLEANCACHE=y
-CONFIG_SECCOMP=y
-CONFIG_CC_STACKPROTECTOR=y
-CONFIG_KEXEC=y
-CONFIG_CRASH_DUMP=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_SUSPEND is not set
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_NETWORK_SECMARK=y
-# CONFIG_WIRELESS is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_TTY_PRINTK=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_BCM2835=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_BCM2835=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_FANOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFSD=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_PRINTK_TIME=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_UNUSED_SYMBOLS=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_MEMORY_INIT=y
-CONFIG_BOOT_PRINTK_DELAY=y
-CONFIG_SCHED_TRACER=y
-CONFIG_STACK_TRACER=y
-CONFIG_FUNCTION_PROFILER=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_KGDB=y
-CONFIG_KGDB_KDB=y
-CONFIG_TEST_KSTRTOX=y
-CONFIG_STRICT_DEVMEM=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_XZ_DEC_X86 is not set
-# CONFIG_XZ_DEC_POWERPC is not set
-# CONFIG_XZ_DEC_IA64 is not set
-# CONFIG_XZ_DEC_ARM is not set
-# CONFIG_XZ_DEC_ARMTHUMB is not set
-# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
deleted file mode 100644
index e3bf2d65..00000000
--- a/arch/arm/configs/bcm_defconfig
+++ /dev/null
@@ -1,114 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=19
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_BLK_CGROUP=y
-CONFIG_NAMESPACES=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_EFI_PARTITION=y
-CONFIG_ARCH_BCM=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_ARM_ERRATA_743622=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-# CONFIG_COMPACTION is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_CMDLINE="console=ttyS0,115200n8 mem=128M"
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_PROC_DEVICETREE=y
-# CONFIG_BLK_DEV is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_INPUT_FF_MEMLESS=y
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-# CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_USB_SUPPORT is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=110
-CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_LL=y
-CONFIG_CRC_CCITT=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRC7=y
-CONFIG_XZ_DEC=y
-CONFIG_AVERAGE=y
diff --git a/arch/arm/configs/bonito_defconfig b/arch/arm/configs/bonito_defconfig
deleted file mode 100644
index 54571082..00000000
--- a/arch/arm/configs/bonito_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_R8A7740=y
-CONFIG_MACH_BONITO=y
-# CONFIG_SH_TIMER_TMU is not set
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_FORCE_MAX_ZONEORDER=12
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySC5,115200 earlyprintk=sh-sci.5,115200 ignore_loglevel"
-CONFIG_KEXEC=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_SUSPEND is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_ARM_INTEGRATOR=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=9
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SH_MOBILE=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_UIO=y
-CONFIG_UIO_PDRV=y
-CONFIG_UIO_PDRV_GENIRQ=y
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_ARM_UNWIND is not set
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig
deleted file mode 100644
index dce912d1..00000000
--- a/arch/arm/configs/cerfcube_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_CERF=y
-CONFIG_SA1100_CERF_FLASH_16MB=y
-CONFIG_PCCARD=m
-CONFIG_PCMCIA_SA1100=m
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySA0,38400 root=/dev/mtdblock3 rootfstype=jffs2 rw mem=32M init=/linuxrc"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_FPE_FASTFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V4=y
-CONFIG_SMB_FS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/clps711x_defconfig b/arch/arm/configs/clps711x_defconfig
deleted file mode 100644
index 1cd94c36..00000000
--- a/arch/arm/configs/clps711x_defconfig
+++ /dev/null
@@ -1,90 +0,0 @@
-CONFIG_KERNEL_LZMA=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
-CONFIG_SLOB=y
-CONFIG_JUMP_LABEL=y
-# CONFIG_LBDAF is not set
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_CLPS711X=y
-CONFIG_ARCH_AUTCPU12=y
-CONFIG_ARCH_CDB89712=y
-CONFIG_ARCH_CLEP7312=y
-CONFIG_ARCH_EDB7211=y
-CONFIG_ARCH_P720T=y
-CONFIG_ARCH_FORTUNET=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-# CONFIG_COREDUMP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=y
-CONFIG_IRTTY_SIR=y
-CONFIG_EP7211_DONGLE=y
-# CONFIG_WIRELESS is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_AUTCPU12=y
-CONFIG_MTD_PLATRAM=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPIO=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_CADENCE is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-CONFIG_CS89x0=y
-CONFIG_CS89x0_PLATFORM=y
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_CLPS711X_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_SPI=y
-CONFIG_GPIO_GENERIC_PLATFORM=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_CLPS711X=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_PLATFORM=y
-# CONFIG_USB_SUPPORT is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_MINIX_FS=y
-# CONFIG_NETWORK_FILESYSTEMS is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/cm_x2xx_defconfig b/arch/arm/configs/cm_x2xx_defconfig
deleted file mode 100644
index a93ff8da..00000000
--- a/arch/arm/configs/cm_x2xx_defconfig
+++ /dev/null
@@ -1,189 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_ARMCORE=y
-CONFIG_PCI=y
-CONFIG_PCCARD=m
-CONFIG_YENTA=m
-# CONFIG_YENTA_O2 is not set
-# CONFIG_YENTA_RICOH is not set
-# CONFIG_YENTA_ENE_TUNE is not set
-# CONFIG_YENTA_TOSHIBA is not set
-CONFIG_PCMCIA_PXA2XX=m
-CONFIG_NO_HZ=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=1f03 mem=32M"
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_APM_EMULATION=m
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_LIB80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPIO=m
-CONFIG_MTD_NAND_CM_X270=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=m
-# CONFIG_SATA_PMP is not set
-CONFIG_PATA_PCMCIA=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-CONFIG_DM9000_DEBUGLEVEL=1
-CONFIG_NET_PCI=y
-CONFIG_8139TOO=m
-# CONFIG_8139TOO_PIO is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_PXA27x=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_UCB1400=m
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=m
-# CONFIG_HWMON is not set
-CONFIG_UCB1400_CORE=m
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_FB_MBX=m
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_PCI is not set
-CONFIG_SND_PXA2XX_AC97=m
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-# CONFIG_SND_PCMCIA is not set
-CONFIG_HID_A4TECH=y
-CONFIG_HID_APPLE=y
-CONFIG_HID_BELKIN=y
-CONFIG_HID_CHERRY=y
-CONFIG_HID_CHICONY=y
-CONFIG_HID_CYPRESS=y
-CONFIG_HID_EZKEY=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_LOGITECH=y
-CONFIG_HID_MICROSOFT=y
-CONFIG_HID_MONTEREY=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=m
-CONFIG_MMC_PXA=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_V3020=y
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=m
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_UTF8=m
-CONFIG_FRAME_WARN=0
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig
deleted file mode 100644
index f4b76725..00000000
--- a/arch/arm/configs/cm_x300_defconfig
+++ /dev/null
@@ -1,178 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-cm-x300"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=18
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_MACH_CM_X300=y
-CONFIG_NO_HZ=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_LIB80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PXA3xx=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-CONFIG_DM9000_DEBUGLEVEL=0
-CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_PXA27x=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_DA9034 is not set
-CONFIG_TOUCHSCREEN_WM97XX=m
-# CONFIG_TOUCHSCREEN_WM9705 is not set
-# CONFIG_TOUCHSCREEN_WM9713 is not set
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_GPIO=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-CONFIG_PMIC_DA903X=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DA903X=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_TDO24M=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_DA903X=m
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_6x11=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_PXA2XX_SOC=m
-CONFIG_SND_PXA2XX_SOC_EM_X270=m
-CONFIG_HID_DRAGONRISE=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_TWINHAN=y
-CONFIG_HID_NTRIG=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_HID_GREENASIA=y
-CONFIG_HID_SMARTJOYPLUS=y
-CONFIG_HID_TOPSEED=y
-CONFIG_HID_THRUSTMASTER=y
-CONFIG_HID_ZEROPLUS=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=m
-CONFIG_MMC_PXA=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_V3020=y
-CONFIG_RTC_DRV_PXA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_CIFS=m
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_AES=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_T10DIF=y
diff --git a/arch/arm/configs/cns3420vb_defconfig b/arch/arm/configs/cns3420vb_defconfig
deleted file mode 100644
index 313627ad..00000000
--- a/arch/arm/configs/cns3420vb_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_PERF_EVENTS is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_IOSCHED_CFQ=m
-CONFIG_ARCH_CNS3XXX=y
-CONFIG_MACH_CNS3420VB=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,38400 mem=128M root=/dev/mmcblk0p1 ro rootwait"
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=20000
-# CONFIG_MISC_DEVICES is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-# CONFIG_SATA_PMP is not set
-# CONFIG_ATA_SFF is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FSCACHE=y
-CONFIG_TMPFS=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/colibri_pxa270_defconfig b/arch/arm/configs/colibri_pxa270_defconfig
deleted file mode 100644
index 2ef2c5e8..00000000
--- a/arch/arm/configs/colibri_pxa270_defconfig
+++ /dev/null
@@ -1,180 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_COLIBRI=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_IRTTY_SIR=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_CFG80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_CONNECTOR=y
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_LE_BYTE_SWAP=y
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_DISKONCHIP=y
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y
-CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
-CONFIG_MTD_ONENAND=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=8
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_PHYLIB=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_HOSTAP=y
-CONFIG_HOSTAP_FIRMWARE=y
-CONFIG_HOSTAP_FIRMWARE_NVRAM=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_ATKBD=m
-# CONFIG_MOUSE_PS2 is not set
-CONFIG_MOUSE_SERIAL=m
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SERIAL=m
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_DUMMY_HCD=y
-CONFIG_MMC=y
-CONFIG_NEW_LEDS=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_RTC_DRV_PCF8583=m
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
-CONFIG_TMPFS=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=1
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V4=y
-CONFIG_NLS_DEFAULT="iso8859-15"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_SHA1=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_DEFLATE=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
-CONFIG_CRC16=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/colibri_pxa300_defconfig b/arch/arm/configs/colibri_pxa300_defconfig
deleted file mode 100644
index b985334e..00000000
--- a/arch/arm/configs/colibri_pxa300_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_COLIBRI300=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="console=ttyS0,115200 rw"
-CONFIG_CPU_IDLE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_AX88796=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_DEBUG_GPIO=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_PXA=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ARC4=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig
deleted file mode 100644
index 6c56ad08..00000000
--- a/arch/arm/configs/collie_defconfig
+++ /dev/null
@@ -1,94 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_BASE_FULL is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLOB=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_COLLIE=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_PCMCIA_DEBUG=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="noinitrd root=/dev/mtdblock2 rootfstype=jffs2 fbcon=rotate:1"
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
-# CONFIG_MTD_CFI_I1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_I4=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=1024
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_LOCOMO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CS=y
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HWMON is not set
-CONFIG_MCP_SA11X0=y
-CONFIG_MCP_UCB1200=y
-CONFIG_MCP_UCB1200_TS=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_SA1100=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_LOCOMO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_IDE_DISK=y
-# CONFIG_DNOTIFY is not set
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
deleted file mode 100644
index 1fd1d1de..00000000
--- a/arch/arm/configs/corgi_defconfig
+++ /dev/null
@@ -1,273 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_PXA_SHARPSL=y
-CONFIG_MACH_POODLE=y
-CONFIG_MACH_CORGI=y
-CONFIG_MACH_SHEPHERD=y
-CONFIG_MACH_HUSKY=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_PXA2XX=y
-CONFIG_PREEMPT=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 debug"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_PXA_FICP=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_HCIDTL1=m
-CONFIG_BT_HCIBT3C=m
-CONFIG_BT_HCIBLUECARD=m
-CONFIG_BT_HCIBTUART=m
-CONFIG_BT_HCIVHCI=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_ROM=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_SHARPSL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_RTL8150=m
-CONFIG_USB_USBNET=m
-# CONFIG_USB_NET_CDC_SUBSET is not set
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_INPUT_FF_MEMLESS=m
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_8250_CS=m
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_I2C=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_FB=y
-CONFIG_FB_W100=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_CORGI=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-CONFIG_HID_A4TECH=m
-CONFIG_HID_APPLE=m
-CONFIG_HID_BELKIN=m
-CONFIG_HID_CHERRY=m
-CONFIG_HID_CHICONY=m
-CONFIG_HID_CYPRESS=m
-CONFIG_HID_EZKEY=m
-CONFIG_HID_GYRATION=m
-CONFIG_HID_LOGITECH=m
-CONFIG_HID_MICROSOFT=m
-CONFIG_HID_MONTEREY=m
-CONFIG_HID_PANTHERLORD=m
-CONFIG_HID_PETALYNX=m
-CONFIG_HID_SAMSUNG=m
-CONFIG_HID_SONY=m
-CONFIG_HID_SUNPLUS=m
-CONFIG_USB=m
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=m
-CONFIG_USB_SL811_HCD=m
-CONFIG_USB_SL811_CS=m
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=m
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_CYPRESS_M8=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IPAQ=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_EDGEPORT_TI=m
-CONFIG_USB_SERIAL_GARMIN=m
-CONFIG_USB_SERIAL_IPW=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_KLSI=m
-CONFIG_USB_SERIAL_KOBIL_SCT=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_SAFE=m
-CONFIG_USB_SERIAL_TI=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_XIRCOM=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_USB_EMI62=m
-CONFIG_USB_EMI26=m
-CONFIG_USB_RIO500=m
-CONFIG_USB_LEGOTOWER=m
-CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
-CONFIG_USB_CYTHERM=m
-CONFIG_USB_IDMOUSE=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_MMC=y
-CONFIG_MMC_PXA=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_SMB_FS=m
-CONFIG_SMB_NLS_DEFAULT=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
-CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
deleted file mode 100644
index 9aaad36a..00000000
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ /dev/null
@@ -1,136 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_DAVINCI=y
-CONFIG_ARCH_DAVINCI_DA830=y
-CONFIG_ARCH_DAVINCI_DA850=y
-CONFIG_MACH_DA8XX_DT=y
-CONFIG_MACH_MITYOMAPL138=y
-CONFIG_MACH_OMAPL138_HAWKBOARD=y
-CONFIG_DAVINCI_RESET_CLOCKS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_LEDS=y
-CONFIG_USE_OF=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=m
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=m
-CONFIG_CPU_IDLE=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_LRO is not set
-CONFIG_NETFILTER=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FW_LOADER is not set
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=1
-CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_EEPROM_AT24=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_NETDEVICES=y
-CONFIG_TUN=m
-CONFIG_LXT_PHY=y
-CONFIG_LSI_ET1011C_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_TI_DAVINCI_EMAC=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_NETCONSOLE=y
-CONFIG_NETPOLL_TRAP=y
-CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=m
-CONFIG_KEYBOARD_ATKBD=m
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_XTKBD=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DAVINCI=y
-CONFIG_PINCTRL_SINGLE=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DUMMY=y
-CONFIG_REGULATOR_TPS6507X=y
-CONFIG_FB=y
-CONFIG_FB_DA8XX=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_SOC=m
-CONFIG_SND_DAVINCI_SOC=m
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_XFS_FS=m
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_MINIX_FS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_SMB_FS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=m
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_CRC_T10DIF=m
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 3edc78a4..2647c539 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -1,197 +1,3081 @@
-CONFIG_EXPERIMENTAL=y
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm 3.9.0-rc6 Kernel Configuration
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_FIQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_NEED_MACH_GPIO_H=y
+CONFIG_PHYS_OFFSET=0x80000000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+
+#
+# General setup
+#
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION="-virt2real"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_XZ is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="virt2real"
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_FHANDLE is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+# CONFIG_ALWAYS_USE_PERSISTENT_CLOCK is not set
+CONFIG_KTIME_SCALAR=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TINY_PREEMPT_RCU=y
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_STALL_COMMON is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_RCU_BOOST=y
+CONFIG_RCU_BOOST_PRIO=1
+CONFIG_RCU_BOOST_DELAY=500
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+# CONFIG_USER_NS is not set
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_UIDGID_CONVERTED=y
+# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
CONFIG_EXPERT=y
+CONFIG_HAVE_UID16=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OLD_SIGACTION=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_MODULE_SIG is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_MULTIPLATFORM is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCM2835 is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_SIRF is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C24XX is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P64X0 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_PLAT_SPEAR is not set
CONFIG_ARCH_DAVINCI=y
-CONFIG_ARCH_DAVINCI_DM644x=y
-CONFIG_ARCH_DAVINCI_DM355=y
-CONFIG_ARCH_DAVINCI_DM646x=y
+# CONFIG_ARCH_OMAP1 is not set
+CONFIG_AINTC=y
+CONFIG_ARCH_DAVINCI_DMx=y
+
+#
+# TI DaVinci Implementations
+#
+
+#
+# DaVinci Core Type
+#
CONFIG_ARCH_DAVINCI_DM365=y
-CONFIG_MACH_SFFSDR=y
-CONFIG_MACH_NEUROS_OSD2=y
-CONFIG_MACH_DM355_LEOPARD=y
-CONFIG_DAVINCI_MUX_DEBUG=y
-CONFIG_DAVINCI_MUX_WARNINGS=y
+
+#
+# DaVinci Board Type
+#
+CONFIG_MACH_DAVINCI_DM365_EVM=y
+CONFIG_DAVINCI_MUX=y
+# CONFIG_DAVINCI_MUX_DEBUG is not set
+# CONFIG_DAVINCI_MUX_WARNINGS is not set
CONFIG_DAVINCI_RESET_CLOCKS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_USE_DOMAINS=y
+
+#
+# Processor Features
+#
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_NR_BANKS=8
+CONFIG_TI_PRIV_EDMA=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_VMSPLIT_3G is not set
+# CONFIG_VMSPLIT_2G is not set
+CONFIG_VMSPLIT_1G=y
+CONFIG_PAGE_OFFSET=0x40000000
+CONFIG_ARCH_NR_GPIO=0
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_HZ=1000
+CONFIG_SCHED_HRTICK=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
-CONFIG_LEDS=y
+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HAVE_ARCH_PFN_VALID=y
+# CONFIG_HIGHMEM is not set
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_MEMORY_ISOLATION=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_COMPACTION is not set
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+
+#
+# Boot options
+#
+CONFIG_USE_OF=y
+CONFIG_ATAGS=y
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
+# CONFIG_ARM_APPENDED_DTB is not set
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_AUTO_ZRELADDR=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_COREDUMP=y
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+CONFIG_PM_WAKELOCKS_GC=y
CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_PM_CLK=y
+CONFIG_CPU_PM=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM_CPU_SUSPEND=y
CONFIG_NET=y
+
+#
+# Networking options
+#
CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_FIB_TRIE_STATS=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_LRO is not set
-CONFIG_NETFILTER=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_TCP_CONG_CUBIC is not set
+CONFIG_TCP_CONG_WESTWOOD=y
+# CONFIG_TCP_CONG_HTCP is not set
+CONFIG_TCP_CONG_HSTCP=y
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+CONFIG_TCP_CONG_LP=y
+CONFIG_TCP_CONG_VENO=y
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+# CONFIG_DEFAULT_VENO is not set
+CONFIG_DEFAULT_WESTWOOD=y
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="westwood"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_L2TP=y
+CONFIG_L2TP_DEBUGFS=y
+CONFIG_L2TP_V3=y
+# CONFIG_L2TP_IP is not set
+# CONFIG_L2TP_ETH is not set
+CONFIG_STP=y
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_VLAN_8021Q=y
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_VLAN_8021Q_MVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+CONFIG_BQL=y
+# CONFIG_BPF_JIT is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_GW=m
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=m
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_LEDS is not set
+# CONFIG_CAN_MCP251X is not set
+# CONFIG_CAN_GRCAN is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+# CONFIG_CAN_CC770 is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_KVASER_USB is not set
+# CONFIG_CAN_PEAK_USB is not set
+# CONFIG_CAN_8DEV_USB is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+# CONFIG_BT_RFCOMM_TTY is not set
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+# CONFIG_BT_HCIVHCI is not set
+CONFIG_BT_MRVL=m
+# CONFIG_BT_MRVL_SDIO is not set
+CONFIG_BT_ATH3K=m
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+# CONFIG_CFG80211_DEFAULT_PS is not set
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_WEP=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_PID=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_MESSAGE_TRACING is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+CONFIG_RFKILL_LEDS=y
+CONFIG_RFKILL_INPUT=y
+# CONFIG_RFKILL_GPIO is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+CONFIG_HAVE_BPF_JIT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=m
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=m
-CONFIG_MTD_CFI=m
-CONFIG_MTD_CFI_INTELEXT=m
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_MTD_PHYSMAP=m
-CONFIG_MTD_NAND=m
-CONFIG_MTD_NAND_DAVINCI=m
-CONFIG_BLK_DEV_LOOP=m
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_FW_LOADER_USER_HELPER=y
+# CONFIG_DEBUG_DRIVER is not set
+CONFIG_DEBUG_DEVRES=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_SPI=y
+CONFIG_DMA_SHARED_BUFFER=y
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_CMA_AREAS=7
+
+#
+# Bus devices
+#
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_OF_PARTS is not set
+CONFIG_MTD_AR7_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_DOCG3 is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_DENALI is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_DOCG4 is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_DAVINCI=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+
+#
+# Device Tree and Open Firmware support
+#
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_OF_SELFTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=1
CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
+
+#
+# Misc devices
+#
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_BMP085_I2C is not set
+# CONFIG_BMP085_SPI is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
CONFIG_EEPROM_AT24=y
-CONFIG_IDE=m
-CONFIG_BLK_DEV_PALMCHIP_BK3710=m
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+CONFIG_EEPROM_93CX6=y
+# CONFIG_EEPROM_93XX46 is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_SCSI_UFSHCD is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
CONFIG_NETDEVICES=y
-CONFIG_TUN=m
-CONFIG_LXT_PHY=y
-CONFIG_LSI_ET1011C_PHY=y
-CONFIG_NET_ETHERNET=y
+CONFIG_NET_CORE=y
+CONFIG_BONDING=m
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_MII=y
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+CONFIG_ETHERNET=y
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_CALXEDA_XGMAC is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_DM9000 is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+CONFIG_NET_VENDOR_MICREL=y
+# CONFIG_KS8842 is not set
+CONFIG_KS8851=y
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_ETHOC is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_SMC91X=y
+CONFIG_SMC911X=y
+# CONFIG_SMSC911X is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_NET_VENDOR_TI=y
CONFIG_TI_DAVINCI_EMAC=y
-CONFIG_DM9000=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_NETCONSOLE=y
-CONFIG_NETPOLL_TRAP=y
+CONFIG_TI_DAVINCI_MDIO=y
+CONFIG_TI_DAVINCI_CPDMA=y
+# CONFIG_TI_CPSW is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_AT803X_PHY is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MICREL_KS8995MA is not set
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=y
+# CONFIG_PPPOL2TP is not set
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_AX88179_178A=m
+CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_CDC_EEM is not set
+CONFIG_USB_NET_CDC_NCM=m
+# CONFIG_USB_NET_CDC_MBIM is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC75XX is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+# CONFIG_USB_ALI_M5632 is not set
+# CONFIG_USB_AN2720 is not set
+# CONFIG_USB_BELKIN is not set
+# CONFIG_USB_ARMLINUX is not set
+# CONFIG_USB_EPSON2888 is not set
+# CONFIG_USB_KC2190 is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_USB_NET_CX82310_ETH is not set
+# CONFIG_USB_NET_KALMIA is not set
+# CONFIG_USB_NET_QMI_WWAN is not set
+CONFIG_USB_HSO=m
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_USB_SIERRA_NET is not set
+# CONFIG_USB_VL600 is not set
+CONFIG_WLAN=y
+CONFIG_LIBERTAS_THINFIRM=m
+# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
+CONFIG_LIBERTAS_THINFIRM_SDIO=m
+# CONFIG_LIBERTAS_THINFIRM_USB is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_RTL8187=m
+CONFIG_RTL8187_LEDS=y
+# CONFIG_MAC80211_HWSIM is not set
+CONFIG_ATH_COMMON=m
+CONFIG_ATH_CARDS=m
+# CONFIG_ATH_DEBUG is not set
+CONFIG_ATH9K_HW=m
+CONFIG_ATH9K_COMMON=m
+# CONFIG_ATH9K_BTCOEX_SUPPORT is not set
+CONFIG_ATH9K=m
+CONFIG_ATH9K_AHB=y
+# CONFIG_ATH9K_DEBUGFS is not set
+CONFIG_ATH9K_RATE_CONTROL=y
+CONFIG_ATH9K_HTC=m
+# CONFIG_ATH9K_HTC_DEBUGFS is not set
+CONFIG_CARL9170=m
+CONFIG_CARL9170_LEDS=y
+CONFIG_CARL9170_DEBUGFS=y
+CONFIG_CARL9170_WPC=y
+CONFIG_CARL9170_HWRNG=y
+# CONFIG_ATH6KL is not set
+CONFIG_AR5523=m
+CONFIG_B43=m
+CONFIG_B43_SSB=y
+# CONFIG_B43_SDIO is not set
+CONFIG_B43_PIO=y
+CONFIG_B43_PHY_N=y
+CONFIG_B43_PHY_LP=y
+CONFIG_B43_PHY_HT=y
+CONFIG_B43_LEDS=y
+CONFIG_B43_HWRNG=y
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43LEGACY=m
+CONFIG_B43LEGACY_LEDS=y
+CONFIG_B43LEGACY_HWRNG=y
+CONFIG_B43LEGACY_DEBUG=y
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_PIO=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+# CONFIG_B43LEGACY_PIO_MODE is not set
+# CONFIG_BRCMFMAC is not set
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_SPI is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_LIBERTAS_MESH is not set
+# CONFIG_P54_COMMON is not set
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT33XX=y
+CONFIG_RT2800USB_RT35XX=y
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RT2800_LIB=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_LEDS=y
+CONFIG_RT2X00_LIB_DEBUGFS=y
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_RTLWIFI=m
+# CONFIG_RTLWIFI_DEBUG is not set
+CONFIG_RTL8192CU=m
+CONFIG_RTL8192C_COMMON=m
+CONFIG_SD8686_UAP=m
+# CONFIG_WL_TI is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_MWIFIEX is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=y
+CONFIG_INPUT_POLLDEV=m
+# CONFIG_INPUT_SPARSEKMAP is not set
+CONFIG_INPUT_MATRIXKMAP=m
+
+#
+# Userland interfaces
+#
# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=m
-CONFIG_KEYBOARD_ATKBD=m
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_XTKBD=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_GPIO_POLLED=m
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+CONFIG_KEYBOARD_MATRIX=m
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+CONFIG_KEYBOARD_DAVINCI=m
+# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+CONFIG_JOYSTICK_GUILLEMOT=m
+# CONFIG_JOYSTICK_INTERACT is not set
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_USB=y
+# CONFIG_JOYSTICK_IFORCE_232 is not set
+CONFIG_JOYSTICK_WARRIOR=m
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+# CONFIG_JOYSTICK_AS5011 is not set
+# CONFIG_JOYSTICK_JOYDUMP is not set
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
CONFIG_INPUT_MISC=y
-CONFIG_INPUT_DM355EVM=m
-CONFIG_SERIO_LIBPS2=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_MMA8450 is not set
+# CONFIG_INPUT_MPU3050 is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_DM365EVM is not set
+CONFIG_INPUT_ADXL34X=m
+CONFIG_INPUT_ADXL34X_I2C=m
+# CONFIG_INPUT_ADXL34X_SPI is not set
+CONFIG_INPUT_ADXL34X_ALLOW_POLLING=y
+# CONFIG_INPUT_CMA3000 is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=m
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+CONFIG_GAMEPORT=m
+# CONFIG_GAMEPORT_NS558 is not set
+# CONFIG_GAMEPORT_L4 is not set
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+CONFIG_DEVKMEM=y
+
+#
+# Serial drivers
+#
CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-# CONFIG_HW_RANDOM is not set
+CONFIG_SERIAL_8250_DMA=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_DW is not set
+# CONFIG_SERIAL_8250_EM is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_TIMERIOMEM=y
+# CONFIG_HW_RANDOM_ATMEL is not set
+# CONFIG_HW_RANDOM_EXYNOS is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DM365_IPIPE=y
+CONFIG_IMP_PREVIEWER=y
+CONFIG_IMP_RESIZER=y
+# CONFIG_IMP_DEBUG is not set
CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CBUS_GPIO is not set
CONFIG_I2C_DAVINCI=y
-CONFIG_GPIO_PCF857X=y
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_DAVINCI=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+# CONFIG_PTP_1588_CLOCK is not set
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+# CONFIG_PTP_1588_CLOCK_PCH is not set
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIOLIB=y
+CONFIG_OF_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+# CONFIG_GPIO_EM is not set
+# CONFIG_GPIO_TS5500 is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+
+#
+# USB GPIO expanders:
+#
+CONFIG_W1=m
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+CONFIG_W1_MASTER_GPIO=m
+
+#
+# 1-wire Slaves
+#
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W1_SLAVE_SMEM=m
+# CONFIG_W1_SLAVE_DS2408 is not set
+# CONFIG_W1_SLAVE_DS2413 is not set
+# CONFIG_W1_SLAVE_DS2423 is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_DS2780 is not set
+# CONFIG_W1_SLAVE_DS2781 is not set
+# CONFIG_W1_SLAVE_DS28E04 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GOLDFISH is not set
+# CONFIG_POWER_RESET is not set
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_AVS is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
CONFIG_WATCHDOG=y
-CONFIG_DAVINCI_WATCHDOG=m
-CONFIG_MFD_DM355EVM_MSP=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_DW_WATCHDOG is not set
+CONFIG_DAVINCI_WATCHDOG=y
+# CONFIG_MAX63XX_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=m
+CONFIG_SSB_BLOCKIO=y
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+# CONFIG_SSB_SDIOHOST is not set
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+# CONFIG_SSB_DRIVER_GPIO is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+CONFIG_MFD_DAVINCI_VOICECODEC=y
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+# CONFIG_MEDIA_RADIO_SUPPORT is not set
+# CONFIG_MEDIA_RC_SUPPORT is not set
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEO_V4L2=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_VMALLOC=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
+# CONFIG_TTPCI_EEPROM is not set
+
+#
+# Media drivers
+#
+# CONFIG_MEDIA_USB_SUPPORT is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_DM365_3A_HW=y
+CONFIG_VIDEO_DM365_AF=y
+CONFIG_VIDEO_DM365_AEW=y
+CONFIG_VIDEO_VPSS_SYSTEM=y
+CONFIG_VIDEO_VPFE_CAPTURE=y
+CONFIG_VIDEO_YCBCR=y
+CONFIG_VIDEO_DM365_ISIF=y
+CONFIG_VIDEO_ISIF=y
+CONFIG_VIDEO_DM644X_VPBE=y
+CONFIG_VIDEO_DAVINCI_DISPLAY=y
+CONFIG_DAVINCI_ENC_MNGR=y
+CONFIG_ENC_MNGR_MAX_CHANNELS=2
+CONFIG_DAVINCI_OSD=y
+CONFIG_DAVINCI_VPBE_ENCODER=y
+# CONFIG_VIDEO_TIMBERDALE is not set
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, frontends)
+#
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_ADV7183 is not set
+# CONFIG_VIDEO_ADV7604 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_ADV7393 is not set
+# CONFIG_VIDEO_AD9389B is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_OV9650 is not set
+# CONFIG_VIDEO_VS6624 is not set
+# CONFIG_VIDEO_MT9M032 is not set
+# CONFIG_VIDEO_MT9P031 is not set
+CONFIG_VIDEO_OV2643=y
+# CONFIG_VIDEO_MT9T001 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_MT9V032 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+# CONFIG_VIDEO_M5MOLS is not set
+# CONFIG_VIDEO_S5K6AA is not set
+# CONFIG_VIDEO_S5K4ECGX is not set
+# CONFIG_VIDEO_SMIAPP is not set
+# CONFIG_VIDEO_S5C73M3 is not set
+
+#
+# Flash devices
+#
+# CONFIG_VIDEO_ADP1653 is not set
+# CONFIG_VIDEO_AS3645A is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+
+#
+# Sensors used on soc_camera driver
+#
+
+#
+# Customise DVB Frontends
+#
+CONFIG_DVB_AU8522=m
+CONFIG_DVB_AU8522_V4L=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_DIB0090=m
+
+#
+# Tools to develop new frontends
+#
+# CONFIG_DVB_DUMMY_FE is not set
+
+#
+# Graphics support
+#
+CONFIG_DRM=y
+# CONFIG_DRM_UDL is not set
+# CONFIG_DRM_TILCDC is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_DISPLAY_TIMING=y
+CONFIG_VIDEOMODE=y
+CONFIG_OF_DISPLAY_TIMING=y
+CONFIG_OF_VIDEOMODE=y
+CONFIG_HDMI=y
CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+CONFIG_FB_DAVINCI=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_GOLDFISH is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_AUO_K190X is not set
+# CONFIG_EXYNOS_VIDEO is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_SOC=m
-CONFIG_SND_DAVINCI_SOC=m
-CONFIG_SND_DAVINCI_SOC_EVM=m
-CONFIG_SND_DM6467_SOC_EVM=m
-CONFIG_HID=m
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_FB_SSD1307 is not set
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_COMPRESS_OFFLOAD=y
+CONFIG_SND_JACK=y
+CONFIG_SND_SEQUENCER=y
+# CONFIG_SND_SEQ_DUMMY is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_SEQUENCER_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_RAWMIDI_SEQ=m
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_ATMEL_SOC is not set
+CONFIG_SND_DAVINCI_SOC=y
+CONFIG_SND_DAVINCI_SOC_I2S=y
+CONFIG_SND_DAVINCI_SOC_VCIF=y
+CONFIG_SND_DAVINCI_SOC_EVM=y
+# CONFIG_SND_DM365_AIC3X_CODEC is not set
+CONFIG_SND_DM365_VOICE_CODEC=y
+# CONFIG_SND_DM365_VOICE_CODEC_8KHZ is not set
+CONFIG_SND_DM365_VOICE_CODEC_16KHZ=y
+CONFIG_SND_DM365_SHOWFREQ=y
+# CONFIG_SND_DESIGNWARE_I2S is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_CQ0093VC=y
+CONFIG_SND_SOC_TLV320AIC3X=y
+CONFIG_SND_SIMPLE_CARD=y
+# CONFIG_SOUND_PRIME is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
CONFIG_HID_A4TECH=m
+# CONFIG_HID_ACRUX is not set
CONFIG_HID_APPLE=m
-CONFIG_HID_BELKIN=m
-CONFIG_HID_CHERRY=m
-CONFIG_HID_CHICONY=m
-CONFIG_HID_CYPRESS=m
-CONFIG_HID_EZKEY=m
-CONFIG_HID_GYRATION=m
+# CONFIG_HID_AUREAL is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_PRODIKEYS is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LENOVO_TPKBD is not set
CONFIG_HID_LOGITECH=m
+CONFIG_HID_LOGITECH_DJ=m
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_LOGIWHEELS_FF=y
+CONFIG_HID_MAGICMOUSE=m
CONFIG_HID_MICROSOFT=m
-CONFIG_HID_MONTEREY=m
-CONFIG_HID_PANTHERLORD=m
-CONFIG_HID_PETALYNX=m
-CONFIG_HID_SAMSUNG=m
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PRIMAX is not set
+CONFIG_HID_PS3REMOTE=m
+# CONFIG_HID_ROCCAT is not set
+CONFIG_HID_SAITEK=m
+# CONFIG_HID_SAMSUNG is not set
CONFIG_HID_SONY=m
-CONFIG_HID_SUNPLUS=m
-CONFIG_USB=m
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=m
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THINGM is not set
+CONFIG_HID_THRUSTMASTER=m
+CONFIG_THRUSTMASTER_FF=y
+# CONFIG_HID_WACOM is not set
+CONFIG_HID_WIIMOTE=m
+CONFIG_HID_WIIMOTE_EXT=y
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+CONFIG_HID_PID=y
+# CONFIG_USB_HIDDEV is not set
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_ARCH_HAS_XHCI is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DYNAMIC_MINORS=y
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HCD_SSB is not set
CONFIG_USB_MUSB_HDRC=m
-CONFIG_USB_MUSB_PERIPHERAL=y
-CONFIG_USB_GADGET_MUSB_HDRC=y
-CONFIG_MUSB_PIO_ONLY=y
-CONFIG_USB_STORAGE=m
-CONFIG_USB_TEST=m
+CONFIG_USB_MUSB_DAVINCI=m
+CONFIG_USB_MUSB_SOC=m
+# CONFIG_USB_MUSB_TUSB6010 is not set
+CONFIG_USB_TI_CPPI_DMA=y
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_RENESAS_USBHS is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=y
+# CONFIG_USB_PRINTER is not set
+CONFIG_USB_WDM=y
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=m
+CONFIG_REALTEK_AUTOPM=y
+CONFIG_USB_STORAGE_DATAFAB=m
+CONFIG_USB_STORAGE_FREECOM=m
+CONFIG_USB_STORAGE_ISD200=m
+CONFIG_USB_STORAGE_USBAT=m
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
+CONFIG_USB_STORAGE_JUMPSHOT=m
+CONFIG_USB_STORAGE_ALAUDA=m
+CONFIG_USB_STORAGE_ONETOUCH=m
+CONFIG_USB_STORAGE_KARMA=m
+CONFIG_USB_STORAGE_CYPRESS_ATACB=m
+CONFIG_USB_STORAGE_ENE_UB6250=m
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CONSOLE=y
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=y
+CONFIG_USB_SERIAL_CP210X=y
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=y
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_F81232 is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_METRO is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=y
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+CONFIG_USB_SERIAL_WWAN=y
+CONFIG_USB_SERIAL_OPTION=y
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
+# CONFIG_USB_SERIAL_XSENS_MT is not set
+# CONFIG_USB_SERIAL_ZIO is not set
+# CONFIG_USB_SERIAL_ZTE is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_QT2 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_EZUSB_FX2=y
+# CONFIG_USB_HSIC_USB3503 is not set
+
+#
+# USB Physical Layer drivers
+#
+# CONFIG_OMAP_USB3 is not set
+# CONFIG_OMAP_CONTROL_USB is not set
+# CONFIG_USB_ISP1301 is not set
+# CONFIG_USB_RCAR_PHY is not set
CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ZERO=m
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+
+#
+# USB Peripheral Controller
+#
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_MV_UDC is not set
+CONFIG_USB_GADGET_MUSB_HDRC=m
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_DUMMY_HCD is not set
+CONFIG_USB_LIBCOMPOSITE=m
+CONFIG_USB_F_ACM=m
+CONFIG_USB_U_SERIAL=m
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_AUDIO=m
+CONFIG_GADGET_UAC1=y
CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_G_NCM is not set
CONFIG_USB_GADGETFS=m
+CONFIG_USB_FUNCTIONFS=m
+CONFIG_USB_FUNCTIONFS_ETH=y
+CONFIG_USB_FUNCTIONFS_RNDIS=y
+CONFIG_USB_FUNCTIONFS_GENERIC=y
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
-CONFIG_USB_G_PRINTER=m
+CONFIG_USB_MIDI_GADGET=m
+# CONFIG_USB_G_PRINTER is not set
CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_MMC=m
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_DAVINCI=m
+CONFIG_USB_G_ACM_MS=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_RNDIS=y
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_G_HID=m
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+CONFIG_USB_GPIO_VBUS=y
+# CONFIG_USB_ULPI is not set
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_SDHCI_PXAV3 is not set
+# CONFIG_MMC_SDHCI_PXAV2 is not set
+CONFIG_MMC_DAVINCI=y
+CONFIG_MMC_DONT_POLL_FOR_REMOVAL=y
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA9633 is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_RENESAS_TPU is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_OT200 is not set
+# CONFIG_LEDS_BLINKM is not set
CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_DAVINCI=y
+# CONFIG_RTC_DRV_SNVS is not set
+
+#
+# HID Sensor RTC drivers
+#
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+# CONFIG_DW_DMAC is not set
+# CONFIG_TIMB_DMA is not set
+CONFIG_TI_EDMA=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DMA_OF=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# Virtio drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+CONFIG_STAGING=y
+# CONFIG_USBIP_CORE is not set
+CONFIG_W35UND=m
+CONFIG_PRISM2_USB=m
+# CONFIG_ECHO is not set
+# CONFIG_COMEDI is not set
+# CONFIG_ASUS_OLED is not set
+CONFIG_RTLLIB=m
+CONFIG_RTLLIB_CRYPTO_CCMP=m
+CONFIG_RTLLIB_CRYPTO_TKIP=m
+CONFIG_RTLLIB_CRYPTO_WEP=m
+CONFIG_R8712U=m
+# CONFIG_RTS5139 is not set
+# CONFIG_TRANZPORT is not set
+# CONFIG_LINE6_USB is not set
+# CONFIG_USB_SERIAL_QUATECH2 is not set
+# CONFIG_VT6656 is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16201 is not set
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16204 is not set
+# CONFIG_ADIS16209 is not set
+# CONFIG_ADIS16220 is not set
+# CONFIG_ADIS16240 is not set
+# CONFIG_LIS3L02DQ is not set
+# CONFIG_SCA3000 is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7291 is not set
+# CONFIG_AD7606 is not set
+# CONFIG_AD799X is not set
+# CONFIG_AD7780 is not set
+# CONFIG_AD7816 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_ADT7410 is not set
+# CONFIG_AD7280 is not set
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7152 is not set
+# CONFIG_AD7746 is not set
+
+#
+# Direct Digital Synthesis
+#
+# CONFIG_AD5930 is not set
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+# CONFIG_AD9850 is not set
+# CONFIG_AD9852 is not set
+# CONFIG_AD9910 is not set
+# CONFIG_AD9951 is not set
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16060 is not set
+# CONFIG_ADIS16130 is not set
+# CONFIG_ADIS16260 is not set
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+
+#
+# Light sensors
+#
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2x7x is not set
+
+#
+# Magnetometer sensors
+#
+# CONFIG_SENSORS_AK8975 is not set
+# CONFIG_SENSORS_HMC5843 is not set
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7753 is not set
+# CONFIG_ADE7754 is not set
+# CONFIG_ADE7758 is not set
+# CONFIG_ADE7759 is not set
+# CONFIG_ADE7854 is not set
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S90 is not set
+# CONFIG_AD2S1200 is not set
+# CONFIG_AD2S1210 is not set
+
+#
+# Triggers - standalone
+#
+# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
+# CONFIG_IIO_GPIO_TRIGGER is not set
+# CONFIG_IIO_SYSFS_TRIGGER is not set
+# CONFIG_IIO_SIMPLE_DUMMY is not set
+# CONFIG_ZSMALLOC is not set
+# CONFIG_USB_ENESTORAGE is not set
+# CONFIG_BCM_WIMAX is not set
+# CONFIG_FT1000 is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+# CONFIG_STAGING_MEDIA is not set
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+# CONFIG_USB_WPAN_HCD is not set
+# CONFIG_WIMAX_GDM72XX is not set
+# CONFIG_CSR_WIFI is not set
+# CONFIG_CED1401 is not set
+# CONFIG_DGRP is not set
+CONFIG_CLKDEV_LOOKUP=y
+
+#
+# Hardware Spinlock drivers
+#
+# CONFIG_MAILBOX is not set
+# CONFIG_IOMMU_SUPPORT is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_STE_MODEM_RPROC is not set
+
+#
+# Rpmsg drivers
+#
+# CONFIG_VIRT_DRIVERS is not set
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+# CONFIG_IIO_BUFFER_CB is not set
+CONFIG_IIO_KFIFO_BUF=m
+CONFIG_IIO_TRIGGERED_BUFFER=m
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+
+#
+# Accelerometers
+#
+# CONFIG_KXSD9 is not set
+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7266 is not set
+# CONFIG_AD7298 is not set
+# CONFIG_AD7791 is not set
+# CONFIG_AD7793 is not set
+# CONFIG_AD7476 is not set
+# CONFIG_AD7887 is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_TI_ADC081C is not set
+
+#
+# Amplifiers
+#
+# CONFIG_AD8366 is not set
+
+#
+# Hid Sensor IIO Common
+#
+CONFIG_IIO_ST_SENSORS_I2C=m
+CONFIG_IIO_ST_SENSORS_SPI=m
+CONFIG_IIO_ST_SENSORS_CORE=m
+
+#
+# Digital to analog converters
+#
+# CONFIG_AD5064 is not set
+# CONFIG_AD5360 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5421 is not set
+# CONFIG_AD5624R_SPI is not set
+# CONFIG_AD5446 is not set
+# CONFIG_AD5449 is not set
+# CONFIG_AD5504 is not set
+# CONFIG_AD5755 is not set
+# CONFIG_AD5764 is not set
+# CONFIG_AD5791 is not set
+# CONFIG_AD5686 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MCP4725 is not set
+
+#
+# Frequency Synthesizers DDS/PLL
+#
+
+#
+# Clock Generator/Distribution
+#
+# CONFIG_AD9523 is not set
+
+#
+# Phase-Locked Loop (PLL) frequency synthesizers
+#
+# CONFIG_ADF4350 is not set
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16080 is not set
+# CONFIG_ADIS16136 is not set
+# CONFIG_ADXRS450 is not set
+# CONFIG_IIO_ST_GYRO_3AXIS is not set
+# CONFIG_ITG3200 is not set
+
+#
+# Inertial measurement units
+#
+# CONFIG_ADIS16400 is not set
+# CONFIG_ADIS16480 is not set
+CONFIG_INV_MPU6050_IIO=m
+
+#
+# Light sensors
+#
+# CONFIG_ADJD_S311 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_VCNL4000 is not set
+
+#
+# Magnetometer sensors
+#
+CONFIG_IIO_ST_MAGN_3AXIS=m
+CONFIG_IIO_ST_MAGN_I2C_3AXIS=m
+CONFIG_IIO_ST_MAGN_SPI_3AXIS=m
+# CONFIG_PWM is not set
+CONFIG_IRQCHIP=y
+# CONFIG_IPACK_BUS is not set
+CONFIG_V2R_DRIVERS=y
+CONFIG_V2R_IMU_DRIVERS=y
+CONFIG_V2R_BMA180=m
+CONFIG_V2R_BMP085=m
+CONFIG_V2R_HMC5843=m
+CONFIG_V2R_ITG3200=m
+CONFIG_V2R_INIT=y
+CONFIG_V2R_PARSE_CMDLINE=y
+CONFIG_V2R_VIDEOOUTALWAYSON=y
+# CONFIG_V2R_DEBUG is not set
+CONFIG_V2R_ADC=y
+CONFIG_V2R_PINS=y
+CONFIG_V2R_GPIO=y
+CONFIG_V2R_GPIOEVENT=y
+CONFIG_V2R_EXTPWM=y
+CONFIG_V2R_SWPWM=m
+# CONFIG_V2R_SWPWM_DEBUG is not set
+CONFIG_V2R_PPMSUM=m
+CONFIG_V2R_IRSEND=m
+
+#
+# File systems
+#
CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
-CONFIG_XFS_FS=m
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS4_FS=m
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+# CONFIG_FSCACHE_STATS is not set
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_CRAMFS=y
-CONFIG_MINIX_FS=m
+# CONFIG_TMPFS_POSIX_ACL is not set
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_F2FS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
+CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_SMB_FS=m
-CONFIG_PARTITION_ADVANCED=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_SWAP is not set
+# CONFIG_NFS_V4_1 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFS_FSCACHE is not set
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_DEBUG is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+CONFIG_NLS_ISO8859_5=y
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_READABLE_ASM is not set
+# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_DEBUG_KERNEL=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_PROVE_RCU_DELAY is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_STRICT_DEVMEM is not set
# CONFIG_ARM_UNWIND is not set
CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_LL is not set
+CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_CRC32=y
+CONFIG_CRYPTO_GHASH=y
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA1_ARM is not set
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES_ARM=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_BLOWFISH_COMMON=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_T10DIF=m
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=y
+CONFIG_CRC8=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_AVERAGE=y
+# CONFIG_CORDIC is not set
+# CONFIG_DDR is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/arm/configs/davinci_v2r_defconfig b/arch/arm/configs/davinci_v2r_defconfig
new file mode 100644
index 00000000..2647c539
--- /dev/null
+++ b/arch/arm/configs/davinci_v2r_defconfig
@@ -0,0 +1,3081 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm 3.9.0-rc6 Kernel Configuration
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_FIQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_NEED_MACH_GPIO_H=y
+CONFIG_PHYS_OFFSET=0x80000000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+
+#
+# General setup
+#
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION="-virt2real"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_XZ is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="virt2real"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_FHANDLE is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+# CONFIG_ALWAYS_USE_PERSISTENT_CLOCK is not set
+CONFIG_KTIME_SCALAR=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TINY_PREEMPT_RCU=y
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_STALL_COMMON is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_RCU_BOOST=y
+CONFIG_RCU_BOOST_PRIO=1
+CONFIG_RCU_BOOST_DELAY=500
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+# CONFIG_USER_NS is not set
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_UIDGID_CONVERTED=y
+# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_HAVE_UID16=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OLD_SIGACTION=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_MODULE_SIG is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_MULTIPLATFORM is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCM2835 is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_SIRF is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C24XX is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P64X0 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_PLAT_SPEAR is not set
+CONFIG_ARCH_DAVINCI=y
+# CONFIG_ARCH_OMAP1 is not set
+CONFIG_AINTC=y
+CONFIG_ARCH_DAVINCI_DMx=y
+
+#
+# TI DaVinci Implementations
+#
+
+#
+# DaVinci Core Type
+#
+CONFIG_ARCH_DAVINCI_DM365=y
+
+#
+# DaVinci Board Type
+#
+CONFIG_MACH_DAVINCI_DM365_EVM=y
+CONFIG_DAVINCI_MUX=y
+# CONFIG_DAVINCI_MUX_DEBUG is not set
+# CONFIG_DAVINCI_MUX_WARNINGS is not set
+CONFIG_DAVINCI_RESET_CLOCKS=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_USE_DOMAINS=y
+
+#
+# Processor Features
+#
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_NR_BANKS=8
+CONFIG_TI_PRIV_EDMA=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_VMSPLIT_3G is not set
+# CONFIG_VMSPLIT_2G is not set
+CONFIG_VMSPLIT_1G=y
+CONFIG_PAGE_OFFSET=0x40000000
+CONFIG_ARCH_NR_GPIO=0
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_HZ=1000
+CONFIG_SCHED_HRTICK=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HAVE_ARCH_PFN_VALID=y
+# CONFIG_HIGHMEM is not set
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_MEMORY_ISOLATION=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_COMPACTION is not set
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+
+#
+# Boot options
+#
+CONFIG_USE_OF=y
+CONFIG_ATAGS=y
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+# CONFIG_ARM_APPENDED_DTB is not set
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_AUTO_ZRELADDR=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_COREDUMP=y
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+CONFIG_PM_WAKELOCKS_GC=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_PM_CLK=y
+CONFIG_CPU_PM=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
+CONFIG_UNIX=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_FIB_TRIE_STATS=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_TCP_CONG_CUBIC is not set
+CONFIG_TCP_CONG_WESTWOOD=y
+# CONFIG_TCP_CONG_HTCP is not set
+CONFIG_TCP_CONG_HSTCP=y
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+CONFIG_TCP_CONG_LP=y
+CONFIG_TCP_CONG_VENO=y
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+# CONFIG_DEFAULT_VENO is not set
+CONFIG_DEFAULT_WESTWOOD=y
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="westwood"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_L2TP=y
+CONFIG_L2TP_DEBUGFS=y
+CONFIG_L2TP_V3=y
+# CONFIG_L2TP_IP is not set
+# CONFIG_L2TP_ETH is not set
+CONFIG_STP=y
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_VLAN_8021Q=y
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_VLAN_8021Q_MVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+CONFIG_BQL=y
+# CONFIG_BPF_JIT is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_GW=m
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=m
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_LEDS is not set
+# CONFIG_CAN_MCP251X is not set
+# CONFIG_CAN_GRCAN is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+# CONFIG_CAN_CC770 is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_KVASER_USB is not set
+# CONFIG_CAN_PEAK_USB is not set
+# CONFIG_CAN_8DEV_USB is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+# CONFIG_BT_RFCOMM_TTY is not set
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+# CONFIG_BT_HCIVHCI is not set
+CONFIG_BT_MRVL=m
+# CONFIG_BT_MRVL_SDIO is not set
+CONFIG_BT_ATH3K=m
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+# CONFIG_CFG80211_DEFAULT_PS is not set
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_WEP=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_PID=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_MESSAGE_TRACING is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+CONFIG_RFKILL_LEDS=y
+CONFIG_RFKILL_INPUT=y
+# CONFIG_RFKILL_GPIO is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+CONFIG_HAVE_BPF_JIT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_FW_LOADER_USER_HELPER=y
+# CONFIG_DEBUG_DRIVER is not set
+CONFIG_DEBUG_DEVRES=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_SPI=y
+CONFIG_DMA_SHARED_BUFFER=y
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_CMA_AREAS=7
+
+#
+# Bus devices
+#
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_OF_PARTS is not set
+CONFIG_MTD_AR7_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_DOCG3 is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_DENALI is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_DOCG4 is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_DAVINCI=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+
+#
+# Device Tree and Open Firmware support
+#
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_OF_SELFTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
+
+#
+# Misc devices
+#
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_BMP085_I2C is not set
+# CONFIG_BMP085_SPI is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+CONFIG_EEPROM_93CX6=y
+# CONFIG_EEPROM_93XX46 is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_SCSI_UFSHCD is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_CORE=y
+CONFIG_BONDING=m
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_MII=y
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+CONFIG_ETHERNET=y
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_CALXEDA_XGMAC is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_DM9000 is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+CONFIG_NET_VENDOR_MICREL=y
+# CONFIG_KS8842 is not set
+CONFIG_KS8851=y
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_ETHOC is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_SMC91X=y
+CONFIG_SMC911X=y
+# CONFIG_SMSC911X is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_NET_VENDOR_TI=y
+CONFIG_TI_DAVINCI_EMAC=y
+CONFIG_TI_DAVINCI_MDIO=y
+CONFIG_TI_DAVINCI_CPDMA=y
+# CONFIG_TI_CPSW is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_AT803X_PHY is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MICREL_KS8995MA is not set
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=y
+# CONFIG_PPPOL2TP is not set
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_AX88179_178A=m
+CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_CDC_EEM is not set
+CONFIG_USB_NET_CDC_NCM=m
+# CONFIG_USB_NET_CDC_MBIM is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC75XX is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+# CONFIG_USB_ALI_M5632 is not set
+# CONFIG_USB_AN2720 is not set
+# CONFIG_USB_BELKIN is not set
+# CONFIG_USB_ARMLINUX is not set
+# CONFIG_USB_EPSON2888 is not set
+# CONFIG_USB_KC2190 is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_USB_NET_CX82310_ETH is not set
+# CONFIG_USB_NET_KALMIA is not set
+# CONFIG_USB_NET_QMI_WWAN is not set
+CONFIG_USB_HSO=m
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_USB_SIERRA_NET is not set
+# CONFIG_USB_VL600 is not set
+CONFIG_WLAN=y
+CONFIG_LIBERTAS_THINFIRM=m
+# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
+CONFIG_LIBERTAS_THINFIRM_SDIO=m
+# CONFIG_LIBERTAS_THINFIRM_USB is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_RTL8187=m
+CONFIG_RTL8187_LEDS=y
+# CONFIG_MAC80211_HWSIM is not set
+CONFIG_ATH_COMMON=m
+CONFIG_ATH_CARDS=m
+# CONFIG_ATH_DEBUG is not set
+CONFIG_ATH9K_HW=m
+CONFIG_ATH9K_COMMON=m
+# CONFIG_ATH9K_BTCOEX_SUPPORT is not set
+CONFIG_ATH9K=m
+CONFIG_ATH9K_AHB=y
+# CONFIG_ATH9K_DEBUGFS is not set
+CONFIG_ATH9K_RATE_CONTROL=y
+CONFIG_ATH9K_HTC=m
+# CONFIG_ATH9K_HTC_DEBUGFS is not set
+CONFIG_CARL9170=m
+CONFIG_CARL9170_LEDS=y
+CONFIG_CARL9170_DEBUGFS=y
+CONFIG_CARL9170_WPC=y
+CONFIG_CARL9170_HWRNG=y
+# CONFIG_ATH6KL is not set
+CONFIG_AR5523=m
+CONFIG_B43=m
+CONFIG_B43_SSB=y
+# CONFIG_B43_SDIO is not set
+CONFIG_B43_PIO=y
+CONFIG_B43_PHY_N=y
+CONFIG_B43_PHY_LP=y
+CONFIG_B43_PHY_HT=y
+CONFIG_B43_LEDS=y
+CONFIG_B43_HWRNG=y
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43LEGACY=m
+CONFIG_B43LEGACY_LEDS=y
+CONFIG_B43LEGACY_HWRNG=y
+CONFIG_B43LEGACY_DEBUG=y
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_PIO=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+# CONFIG_B43LEGACY_PIO_MODE is not set
+# CONFIG_BRCMFMAC is not set
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_SPI is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_LIBERTAS_MESH is not set
+# CONFIG_P54_COMMON is not set
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT33XX=y
+CONFIG_RT2800USB_RT35XX=y
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RT2800_LIB=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_LEDS=y
+CONFIG_RT2X00_LIB_DEBUGFS=y
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_RTLWIFI=m
+# CONFIG_RTLWIFI_DEBUG is not set
+CONFIG_RTL8192CU=m
+CONFIG_RTL8192C_COMMON=m
+CONFIG_SD8686_UAP=m
+# CONFIG_WL_TI is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_MWIFIEX is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=y
+CONFIG_INPUT_POLLDEV=m
+# CONFIG_INPUT_SPARSEKMAP is not set
+CONFIG_INPUT_MATRIXKMAP=m
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_GPIO_POLLED=m
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+CONFIG_KEYBOARD_MATRIX=m
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+CONFIG_KEYBOARD_DAVINCI=m
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+CONFIG_JOYSTICK_GUILLEMOT=m
+# CONFIG_JOYSTICK_INTERACT is not set
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_USB=y
+# CONFIG_JOYSTICK_IFORCE_232 is not set
+CONFIG_JOYSTICK_WARRIOR=m
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+# CONFIG_JOYSTICK_AS5011 is not set
+# CONFIG_JOYSTICK_JOYDUMP is not set
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_MMA8450 is not set
+# CONFIG_INPUT_MPU3050 is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_DM365EVM is not set
+CONFIG_INPUT_ADXL34X=m
+CONFIG_INPUT_ADXL34X_I2C=m
+# CONFIG_INPUT_ADXL34X_SPI is not set
+CONFIG_INPUT_ADXL34X_ALLOW_POLLING=y
+# CONFIG_INPUT_CMA3000 is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=m
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+CONFIG_GAMEPORT=m
+# CONFIG_GAMEPORT_NS558 is not set
+# CONFIG_GAMEPORT_L4 is not set
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+CONFIG_DEVKMEM=y
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_DMA=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_DW is not set
+# CONFIG_SERIAL_8250_EM is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_TIMERIOMEM=y
+# CONFIG_HW_RANDOM_ATMEL is not set
+# CONFIG_HW_RANDOM_EXYNOS is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DM365_IPIPE=y
+CONFIG_IMP_PREVIEWER=y
+CONFIG_IMP_RESIZER=y
+# CONFIG_IMP_DEBUG is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CBUS_GPIO is not set
+CONFIG_I2C_DAVINCI=y
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_DAVINCI=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+# CONFIG_PTP_1588_CLOCK is not set
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+# CONFIG_PTP_1588_CLOCK_PCH is not set
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIOLIB=y
+CONFIG_OF_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+# CONFIG_GPIO_EM is not set
+# CONFIG_GPIO_TS5500 is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+
+#
+# USB GPIO expanders:
+#
+CONFIG_W1=m
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+CONFIG_W1_MASTER_GPIO=m
+
+#
+# 1-wire Slaves
+#
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W1_SLAVE_SMEM=m
+# CONFIG_W1_SLAVE_DS2408 is not set
+# CONFIG_W1_SLAVE_DS2413 is not set
+# CONFIG_W1_SLAVE_DS2423 is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_DS2780 is not set
+# CONFIG_W1_SLAVE_DS2781 is not set
+# CONFIG_W1_SLAVE_DS28E04 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GOLDFISH is not set
+# CONFIG_POWER_RESET is not set
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_AVS is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_DW_WATCHDOG is not set
+CONFIG_DAVINCI_WATCHDOG=y
+# CONFIG_MAX63XX_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=m
+CONFIG_SSB_BLOCKIO=y
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+# CONFIG_SSB_SDIOHOST is not set
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+# CONFIG_SSB_DRIVER_GPIO is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+CONFIG_MFD_DAVINCI_VOICECODEC=y
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+# CONFIG_MEDIA_RADIO_SUPPORT is not set
+# CONFIG_MEDIA_RC_SUPPORT is not set
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEO_V4L2=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_VMALLOC=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
+# CONFIG_TTPCI_EEPROM is not set
+
+#
+# Media drivers
+#
+# CONFIG_MEDIA_USB_SUPPORT is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_DM365_3A_HW=y
+CONFIG_VIDEO_DM365_AF=y
+CONFIG_VIDEO_DM365_AEW=y
+CONFIG_VIDEO_VPSS_SYSTEM=y
+CONFIG_VIDEO_VPFE_CAPTURE=y
+CONFIG_VIDEO_YCBCR=y
+CONFIG_VIDEO_DM365_ISIF=y
+CONFIG_VIDEO_ISIF=y
+CONFIG_VIDEO_DM644X_VPBE=y
+CONFIG_VIDEO_DAVINCI_DISPLAY=y
+CONFIG_DAVINCI_ENC_MNGR=y
+CONFIG_ENC_MNGR_MAX_CHANNELS=2
+CONFIG_DAVINCI_OSD=y
+CONFIG_DAVINCI_VPBE_ENCODER=y
+# CONFIG_VIDEO_TIMBERDALE is not set
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, frontends)
+#
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_ADV7183 is not set
+# CONFIG_VIDEO_ADV7604 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_ADV7393 is not set
+# CONFIG_VIDEO_AD9389B is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_OV9650 is not set
+# CONFIG_VIDEO_VS6624 is not set
+# CONFIG_VIDEO_MT9M032 is not set
+# CONFIG_VIDEO_MT9P031 is not set
+CONFIG_VIDEO_OV2643=y
+# CONFIG_VIDEO_MT9T001 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_MT9V032 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+# CONFIG_VIDEO_M5MOLS is not set
+# CONFIG_VIDEO_S5K6AA is not set
+# CONFIG_VIDEO_S5K4ECGX is not set
+# CONFIG_VIDEO_SMIAPP is not set
+# CONFIG_VIDEO_S5C73M3 is not set
+
+#
+# Flash devices
+#
+# CONFIG_VIDEO_ADP1653 is not set
+# CONFIG_VIDEO_AS3645A is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+
+#
+# Sensors used on soc_camera driver
+#
+
+#
+# Customise DVB Frontends
+#
+CONFIG_DVB_AU8522=m
+CONFIG_DVB_AU8522_V4L=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_DIB0090=m
+
+#
+# Tools to develop new frontends
+#
+# CONFIG_DVB_DUMMY_FE is not set
+
+#
+# Graphics support
+#
+CONFIG_DRM=y
+# CONFIG_DRM_UDL is not set
+# CONFIG_DRM_TILCDC is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_DISPLAY_TIMING=y
+CONFIG_VIDEOMODE=y
+CONFIG_OF_DISPLAY_TIMING=y
+CONFIG_OF_VIDEOMODE=y
+CONFIG_HDMI=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+CONFIG_FB_DAVINCI=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_GOLDFISH is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_AUO_K190X is not set
+# CONFIG_EXYNOS_VIDEO is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_FB_SSD1307 is not set
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_COMPRESS_OFFLOAD=y
+CONFIG_SND_JACK=y
+CONFIG_SND_SEQUENCER=y
+# CONFIG_SND_SEQ_DUMMY is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_SEQUENCER_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_RAWMIDI_SEQ=m
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_ATMEL_SOC is not set
+CONFIG_SND_DAVINCI_SOC=y
+CONFIG_SND_DAVINCI_SOC_I2S=y
+CONFIG_SND_DAVINCI_SOC_VCIF=y
+CONFIG_SND_DAVINCI_SOC_EVM=y
+# CONFIG_SND_DM365_AIC3X_CODEC is not set
+CONFIG_SND_DM365_VOICE_CODEC=y
+# CONFIG_SND_DM365_VOICE_CODEC_8KHZ is not set
+CONFIG_SND_DM365_VOICE_CODEC_16KHZ=y
+CONFIG_SND_DM365_SHOWFREQ=y
+# CONFIG_SND_DESIGNWARE_I2S is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_CQ0093VC=y
+CONFIG_SND_SOC_TLV320AIC3X=y
+CONFIG_SND_SIMPLE_CARD=y
+# CONFIG_SOUND_PRIME is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=m
+# CONFIG_HID_ACRUX is not set
+CONFIG_HID_APPLE=m
+# CONFIG_HID_AUREAL is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_PRODIKEYS is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LENOVO_TPKBD is not set
+CONFIG_HID_LOGITECH=m
+CONFIG_HID_LOGITECH_DJ=m
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_LOGIWHEELS_FF=y
+CONFIG_HID_MAGICMOUSE=m
+CONFIG_HID_MICROSOFT=m
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PRIMAX is not set
+CONFIG_HID_PS3REMOTE=m
+# CONFIG_HID_ROCCAT is not set
+CONFIG_HID_SAITEK=m
+# CONFIG_HID_SAMSUNG is not set
+CONFIG_HID_SONY=m
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THINGM is not set
+CONFIG_HID_THRUSTMASTER=m
+CONFIG_THRUSTMASTER_FF=y
+# CONFIG_HID_WACOM is not set
+CONFIG_HID_WIIMOTE=m
+CONFIG_HID_WIIMOTE_EXT=y
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+CONFIG_HID_PID=y
+# CONFIG_USB_HIDDEV is not set
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_ARCH_HAS_XHCI is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DYNAMIC_MINORS=y
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HCD_SSB is not set
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_DAVINCI=m
+CONFIG_USB_MUSB_SOC=m
+# CONFIG_USB_MUSB_TUSB6010 is not set
+CONFIG_USB_TI_CPPI_DMA=y
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_RENESAS_USBHS is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=y
+# CONFIG_USB_PRINTER is not set
+CONFIG_USB_WDM=y
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=m
+CONFIG_REALTEK_AUTOPM=y
+CONFIG_USB_STORAGE_DATAFAB=m
+CONFIG_USB_STORAGE_FREECOM=m
+CONFIG_USB_STORAGE_ISD200=m
+CONFIG_USB_STORAGE_USBAT=m
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
+CONFIG_USB_STORAGE_JUMPSHOT=m
+CONFIG_USB_STORAGE_ALAUDA=m
+CONFIG_USB_STORAGE_ONETOUCH=m
+CONFIG_USB_STORAGE_KARMA=m
+CONFIG_USB_STORAGE_CYPRESS_ATACB=m
+CONFIG_USB_STORAGE_ENE_UB6250=m
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CONSOLE=y
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=y
+CONFIG_USB_SERIAL_CP210X=y
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=y
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_F81232 is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_METRO is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=y
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+CONFIG_USB_SERIAL_WWAN=y
+CONFIG_USB_SERIAL_OPTION=y
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
+# CONFIG_USB_SERIAL_XSENS_MT is not set
+# CONFIG_USB_SERIAL_ZIO is not set
+# CONFIG_USB_SERIAL_ZTE is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_QT2 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_EZUSB_FX2=y
+# CONFIG_USB_HSIC_USB3503 is not set
+
+#
+# USB Physical Layer drivers
+#
+# CONFIG_OMAP_USB3 is not set
+# CONFIG_OMAP_CONTROL_USB is not set
+# CONFIG_USB_ISP1301 is not set
+# CONFIG_USB_RCAR_PHY is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+CONFIG_USB_GADGET_DEBUG_FILES=y
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+
+#
+# USB Peripheral Controller
+#
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_MV_UDC is not set
+CONFIG_USB_GADGET_MUSB_HDRC=m
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_DUMMY_HCD is not set
+CONFIG_USB_LIBCOMPOSITE=m
+CONFIG_USB_F_ACM=m
+CONFIG_USB_U_SERIAL=m
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_AUDIO=m
+CONFIG_GADGET_UAC1=y
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_G_NCM is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FUNCTIONFS=m
+CONFIG_USB_FUNCTIONFS_ETH=y
+CONFIG_USB_FUNCTIONFS_RNDIS=y
+CONFIG_USB_FUNCTIONFS_GENERIC=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_MIDI_GADGET=m
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_ACM_MS=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_RNDIS=y
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_G_HID=m
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+CONFIG_USB_GPIO_VBUS=y
+# CONFIG_USB_ULPI is not set
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_SDHCI_PXAV3 is not set
+# CONFIG_MMC_SDHCI_PXAV2 is not set
+CONFIG_MMC_DAVINCI=y
+CONFIG_MMC_DONT_POLL_FOR_REMOVAL=y
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA9633 is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_RENESAS_TPU is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_OT200 is not set
+# CONFIG_LEDS_BLINKM is not set
+CONFIG_LEDS_TRIGGERS=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_DAVINCI=y
+# CONFIG_RTC_DRV_SNVS is not set
+
+#
+# HID Sensor RTC drivers
+#
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+# CONFIG_DW_DMAC is not set
+# CONFIG_TIMB_DMA is not set
+CONFIG_TI_EDMA=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DMA_OF=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# Virtio drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+CONFIG_STAGING=y
+# CONFIG_USBIP_CORE is not set
+CONFIG_W35UND=m
+CONFIG_PRISM2_USB=m
+# CONFIG_ECHO is not set
+# CONFIG_COMEDI is not set
+# CONFIG_ASUS_OLED is not set
+CONFIG_RTLLIB=m
+CONFIG_RTLLIB_CRYPTO_CCMP=m
+CONFIG_RTLLIB_CRYPTO_TKIP=m
+CONFIG_RTLLIB_CRYPTO_WEP=m
+CONFIG_R8712U=m
+# CONFIG_RTS5139 is not set
+# CONFIG_TRANZPORT is not set
+# CONFIG_LINE6_USB is not set
+# CONFIG_USB_SERIAL_QUATECH2 is not set
+# CONFIG_VT6656 is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16201 is not set
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16204 is not set
+# CONFIG_ADIS16209 is not set
+# CONFIG_ADIS16220 is not set
+# CONFIG_ADIS16240 is not set
+# CONFIG_LIS3L02DQ is not set
+# CONFIG_SCA3000 is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7291 is not set
+# CONFIG_AD7606 is not set
+# CONFIG_AD799X is not set
+# CONFIG_AD7780 is not set
+# CONFIG_AD7816 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_ADT7410 is not set
+# CONFIG_AD7280 is not set
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7152 is not set
+# CONFIG_AD7746 is not set
+
+#
+# Direct Digital Synthesis
+#
+# CONFIG_AD5930 is not set
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+# CONFIG_AD9850 is not set
+# CONFIG_AD9852 is not set
+# CONFIG_AD9910 is not set
+# CONFIG_AD9951 is not set
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16060 is not set
+# CONFIG_ADIS16130 is not set
+# CONFIG_ADIS16260 is not set
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+
+#
+# Light sensors
+#
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2x7x is not set
+
+#
+# Magnetometer sensors
+#
+# CONFIG_SENSORS_AK8975 is not set
+# CONFIG_SENSORS_HMC5843 is not set
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7753 is not set
+# CONFIG_ADE7754 is not set
+# CONFIG_ADE7758 is not set
+# CONFIG_ADE7759 is not set
+# CONFIG_ADE7854 is not set
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S90 is not set
+# CONFIG_AD2S1200 is not set
+# CONFIG_AD2S1210 is not set
+
+#
+# Triggers - standalone
+#
+# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
+# CONFIG_IIO_GPIO_TRIGGER is not set
+# CONFIG_IIO_SYSFS_TRIGGER is not set
+# CONFIG_IIO_SIMPLE_DUMMY is not set
+# CONFIG_ZSMALLOC is not set
+# CONFIG_USB_ENESTORAGE is not set
+# CONFIG_BCM_WIMAX is not set
+# CONFIG_FT1000 is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+# CONFIG_STAGING_MEDIA is not set
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+# CONFIG_USB_WPAN_HCD is not set
+# CONFIG_WIMAX_GDM72XX is not set
+# CONFIG_CSR_WIFI is not set
+# CONFIG_CED1401 is not set
+# CONFIG_DGRP is not set
+CONFIG_CLKDEV_LOOKUP=y
+
+#
+# Hardware Spinlock drivers
+#
+# CONFIG_MAILBOX is not set
+# CONFIG_IOMMU_SUPPORT is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_STE_MODEM_RPROC is not set
+
+#
+# Rpmsg drivers
+#
+# CONFIG_VIRT_DRIVERS is not set
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+# CONFIG_IIO_BUFFER_CB is not set
+CONFIG_IIO_KFIFO_BUF=m
+CONFIG_IIO_TRIGGERED_BUFFER=m
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+
+#
+# Accelerometers
+#
+# CONFIG_KXSD9 is not set
+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7266 is not set
+# CONFIG_AD7298 is not set
+# CONFIG_AD7791 is not set
+# CONFIG_AD7793 is not set
+# CONFIG_AD7476 is not set
+# CONFIG_AD7887 is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_TI_ADC081C is not set
+
+#
+# Amplifiers
+#
+# CONFIG_AD8366 is not set
+
+#
+# Hid Sensor IIO Common
+#
+CONFIG_IIO_ST_SENSORS_I2C=m
+CONFIG_IIO_ST_SENSORS_SPI=m
+CONFIG_IIO_ST_SENSORS_CORE=m
+
+#
+# Digital to analog converters
+#
+# CONFIG_AD5064 is not set
+# CONFIG_AD5360 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5421 is not set
+# CONFIG_AD5624R_SPI is not set
+# CONFIG_AD5446 is not set
+# CONFIG_AD5449 is not set
+# CONFIG_AD5504 is not set
+# CONFIG_AD5755 is not set
+# CONFIG_AD5764 is not set
+# CONFIG_AD5791 is not set
+# CONFIG_AD5686 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MCP4725 is not set
+
+#
+# Frequency Synthesizers DDS/PLL
+#
+
+#
+# Clock Generator/Distribution
+#
+# CONFIG_AD9523 is not set
+
+#
+# Phase-Locked Loop (PLL) frequency synthesizers
+#
+# CONFIG_ADF4350 is not set
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16080 is not set
+# CONFIG_ADIS16136 is not set
+# CONFIG_ADXRS450 is not set
+# CONFIG_IIO_ST_GYRO_3AXIS is not set
+# CONFIG_ITG3200 is not set
+
+#
+# Inertial measurement units
+#
+# CONFIG_ADIS16400 is not set
+# CONFIG_ADIS16480 is not set
+CONFIG_INV_MPU6050_IIO=m
+
+#
+# Light sensors
+#
+# CONFIG_ADJD_S311 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_VCNL4000 is not set
+
+#
+# Magnetometer sensors
+#
+CONFIG_IIO_ST_MAGN_3AXIS=m
+CONFIG_IIO_ST_MAGN_I2C_3AXIS=m
+CONFIG_IIO_ST_MAGN_SPI_3AXIS=m
+# CONFIG_PWM is not set
+CONFIG_IRQCHIP=y
+# CONFIG_IPACK_BUS is not set
+CONFIG_V2R_DRIVERS=y
+CONFIG_V2R_IMU_DRIVERS=y
+CONFIG_V2R_BMA180=m
+CONFIG_V2R_BMP085=m
+CONFIG_V2R_HMC5843=m
+CONFIG_V2R_ITG3200=m
+CONFIG_V2R_INIT=y
+CONFIG_V2R_PARSE_CMDLINE=y
+CONFIG_V2R_VIDEOOUTALWAYSON=y
+# CONFIG_V2R_DEBUG is not set
+CONFIG_V2R_ADC=y
+CONFIG_V2R_PINS=y
+CONFIG_V2R_GPIO=y
+CONFIG_V2R_GPIOEVENT=y
+CONFIG_V2R_EXTPWM=y
+CONFIG_V2R_SWPWM=m
+# CONFIG_V2R_SWPWM_DEBUG is not set
+CONFIG_V2R_PPMSUM=m
+CONFIG_V2R_IRSEND=m
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+# CONFIG_FSCACHE_STATS is not set
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_F2FS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V2=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_SWAP is not set
+# CONFIG_NFS_V4_1 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFS_FSCACHE is not set
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_DEBUG is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+CONFIG_NLS_ISO8859_5=y
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_READABLE_ASM is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_PROVE_RCU_DELAY is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_STRICT_DEVMEM is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_LL is not set
+CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_CRC32=y
+CONFIG_CRYPTO_GHASH=y
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA1_ARM is not set
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES_ARM=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_BLOWFISH_COMMON=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=y
+CONFIG_CRC8=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_AVERAGE=y
+# CONFIG_CORDIC is not set
+# CONFIG_DDR is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig
deleted file mode 100644
index 3fe8dae8..00000000
--- a/arch/arm/configs/dove_defconfig
+++ /dev/null
@@ -1,139 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_ARCH_DOVE=y
-CONFIG_MACH_DOVE_DB=y
-CONFIG_MACH_CM_A510=y
-CONFIG_MACH_DOVE_DT=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=1
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_ATA=y
-CONFIG_SATA_MV=y
-CONFIG_NETDEVICES=y
-CONFIG_MV643XX_ETH=y
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_MOUSE_PS2 is not set
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_SPI=y
-CONFIG_SPI_ORION=y
-# CONFIG_HWMON is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_DOVE=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_MV=y
-CONFIG_DMADEVICES=y
-CONFIG_MV_XOR=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_UTF8=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TEA=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_MV_CESA=y
-CONFIG_CRC_CCITT=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/ebsa110_defconfig b/arch/arm/configs/ebsa110_defconfig
deleted file mode 100644
index 14559dbb..00000000
--- a/arch/arm/configs/ebsa110_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_MODULES=y
-CONFIG_ARCH_EBSA110=y
-CONFIG_PCCARD=m
-CONFIG_I82365=m
-CONFIG_LEDS=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rw mem=16M console=ttyS1,38400n8"
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_FASTFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_SYN_COOKIES=y
-CONFIG_IPV6=y
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_MATCH_ECN=y
-CONFIG_IP_NF_MATCH_TTL=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_TARGET_LOG=y
-CONFIG_IP_NF_MANGLE=y
-CONFIG_IP_NF_TARGET_ECN=y
-CONFIG_IP6_NF_IPTABLES=y
-CONFIG_IP6_NF_MATCH_FRAG=y
-CONFIG_IP6_NF_MATCH_OPTS=y
-CONFIG_IP6_NF_MATCH_HL=y
-CONFIG_IP6_NF_MATCH_RT=y
-CONFIG_IP6_NF_FILTER=y
-CONFIG_IP6_NF_MANGLE=y
-CONFIG_FW_LOADER=m
-CONFIG_PARPORT=y
-CONFIG_PARPORT_PC=y
-CONFIG_PARPORT_PC_FIFO=y
-CONFIG_PARPORT_1284=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_ARM_AM79C961A=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_CS=m
-CONFIG_PRINTER=m
-CONFIG_WATCHDOG=y
-CONFIG_SOFT_WATCHDOG=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_MINIX_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_MSDOS_PARTITION is not set
diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig
deleted file mode 100644
index 60a21e01..00000000
--- a/arch/arm/configs/em_x270_defconfig
+++ /dev/null
@@ -1,194 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_EM_X270=y
-CONFIG_MACH_EXEDA=y
-CONFIG_NO_HZ=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=1f03 mem=32M"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_LIB80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-CONFIG_DM9000_DEBUGLEVEL=1
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_APMPOWER=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_PXA27x=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_DA9034 is not set
-CONFIG_TOUCHSCREEN_WM97XX=m
-# CONFIG_TOUCHSCREEN_WM9705 is not set
-# CONFIG_TOUCHSCREEN_WM9713 is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_BATTERY_DA9030=y
-# CONFIG_HWMON is not set
-CONFIG_PMIC_DA903X=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DA903X=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_FB_MBX=m
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_TDO24M=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_DA903X=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_PXA2XX_SOC=m
-CONFIG_SND_PXA2XX_SOC_EM_X270=m
-CONFIG_HID_A4TECH=y
-CONFIG_HID_APPLE=y
-CONFIG_HID_BELKIN=y
-CONFIG_HID_CHERRY=y
-CONFIG_HID_CHICONY=y
-CONFIG_HID_CYPRESS=y
-CONFIG_HID_EZKEY=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_LOGITECH=y
-CONFIG_HID_MICROSOFT=y
-CONFIG_HID_MONTEREY=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=m
-CONFIG_MMC_PXA=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_DA903X=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_V3020=y
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=m
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_UTF8=m
-CONFIG_FRAME_WARN=0
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_ARC4=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig
deleted file mode 100644
index 806005a4..00000000
--- a/arch/arm/configs/ep93xx_defconfig
+++ /dev/null
@@ -1,123 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_EP93XX=y
-CONFIG_CRUNCH=y
-CONFIG_MACH_ADSSPHERE=y
-CONFIG_MACH_EDB9301=y
-CONFIG_MACH_EDB9302=y
-CONFIG_MACH_EDB9307=y
-CONFIG_MACH_EDB9312=y
-CONFIG_MACH_EDB9315=y
-CONFIG_MACH_GESBC9312=y
-CONFIG_MACH_MICRO9H=y
-CONFIG_MACH_MICRO9L=y
-CONFIG_MACH_TS72XX=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyAM0,115200 root=/dev/nfs ip=bootp"
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-# CONFIG_IPV6_SIT is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_ROM=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_EEPROM_LEGACY=y
-CONFIG_SCSI=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_EP93XX_ETH=y
-CONFIG_USB_RTL8150=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_AMBA_PL010=y
-CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DEBUG_CORE=y
-CONFIG_I2C_DEBUG_ALGO=y
-CONFIG_I2C_DEBUG_BUS=y
-CONFIG_WATCHDOG=y
-CONFIG_EP93XX_WATCHDOG=y
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_CONSOLE=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_M48T86=y
-CONFIG_RTC_DRV_EP93XX=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SLAB=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig
deleted file mode 100644
index d68ac67c..00000000
--- a/arch/arm/configs/eseries_pxa_defconfig
+++ /dev/null
@@ -1,118 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_ARCH_PXA_ESERIES=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_IWMMXT=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA=m
-CONFIG_PCMCIA_PXA2XX=m
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=y
-CONFIG_IRLAN=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_PXA_FICP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-# CONFIG_MAC80211_RC_MINSTREL is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-CONFIG_MTD=m
-CONFIG_MTD_NAND=m
-CONFIG_MTD_NAND_TMIO=m
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=m
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_ATA=m
-# CONFIG_SATA_PMP is not set
-CONFIG_PATA_PCMCIA=m
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_HERMES=m
-CONFIG_PCMCIA_HERMES=m
-CONFIG_NET_PCMCIA=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=m
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_WM97XX=m
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-CONFIG_MFD_T7L66XB=y
-CONFIG_MFD_TC6387XB=y
-CONFIG_MFD_TC6393XB=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_FB_W100=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_SOUND=y
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_DYNAMIC_MINORS=y
-CONFIG_SND_VERBOSE_PRINTK=y
-# CONFIG_SND_PCMCIA is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_PXA2XX_SOC=m
-CONFIG_SND_PXA2XX_SOC_E800=m
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_MMC_TMIO=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig
deleted file mode 100644
index bffe68e1..00000000
--- a/arch/arm/configs/exynos4_defconfig
+++ /dev/null
@@ -1,68 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_EXYNOS=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDKC210=y
-CONFIG_MACH_ARMLEX4210=y
-CONFIG_MACH_UNIVERSAL_C210=y
-CONFIG_MACH_NURI=y
-CONFIG_MACH_ORIGEN=y
-CONFIG_MACH_SMDK4412=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-# CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
deleted file mode 100644
index e40b435d..00000000
--- a/arch/arm/configs/exynos_defconfig
+++ /dev/null
@@ -1,92 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_EFI_PARTITION=y
-CONFIG_ARCH_EXYNOS=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_S3C24XX_PWM=y
-CONFIG_ARCH_EXYNOS5=y
-CONFIG_MACH_EXYNOS4_DT=y
-CONFIG_MACH_EXYNOS5_DT=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_RFKILL_REGULATOR=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC911X=y
-CONFIG_USB_USBNET=y
-CONFIG_USB_NET_SMSC75XX=y
-CONFIG_USB_NET_SMSC95XX=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-# CONFIG_HWMON is not set
-CONFIG_MFD_TPS65090=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_GPIO=y
-CONFIG_REGULATOR_TPS65090=y
-CONFIG_FB=y
-CONFIG_EXYNOS_VIDEO=y
-CONFIG_EXYNOS_MIPI_DSI=y
-CONFIG_EXYNOS_DP=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_7x14=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT4_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
deleted file mode 100644
index d95763d5..00000000
--- a/arch/arm/configs/ezx_defconfig
+++ /dev/null
@@ -1,420 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-ezx200910312315"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_RD_BZIP2=y
-CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_PXA_EZX=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEBUG=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=m
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
-CONFIG_CPU_IDLE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_NETFILTER=y
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_NF_NAT_SNMP_BASIC=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_TARGET_LOG=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_BRIDGE=m
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=y
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIBTSDIO=m
-CONFIG_BT_HCIUART=y
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_HCIVHCI=m
-CONFIG_BT_MRVL=m
-CONFIG_BT_MRVL_SDIO=m
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_FW_LOADER=m
-CONFIG_CONNECTOR=m
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_OTP=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_PXA27x=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_PCAP=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_INPUT_PCAP=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=8
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_POWER_SUPPLY=y
-# CONFIG_HWMON is not set
-CONFIG_EZX_PCAP=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DEBUG=y
-CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
-CONFIG_REGULATOR_USERSPACE_CONSUMER=y
-CONFIG_REGULATOR_PCAP=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_MEDIA_TUNER_CUSTOMISE=y
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_MT9M111=y
-CONFIG_VIDEO_PXA27x=y
-# CONFIG_V4L_USB_DRIVERS is not set
-CONFIG_RADIO_TEA5764=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_FB_PXA_OVERLAY=y
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_PXA2XX_SOC=y
-# CONFIG_USB_HID is not set
-CONFIG_HID_APPLE=m
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_PXA27X=y
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=m
-CONFIG_MMC_PXA=y
-CONFIG_MMC_SPI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_LP3944=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PCAP=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-CONFIG_XFS_FS=m
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_CUSE=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=m
-CONFIG_SQUASHFS=m
-CONFIG_ROMFS_FS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V3_ACL=y
-CONFIG_SMB_FS=m
-CONFIG_CIFS=m
-CONFIG_CIFS_STATS=y
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_PROVE_LOCKING=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_CRYPTD=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_XTS=m
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_VMAC=m
-CONFIG_CRYPTO_GHASH=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SEED=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/footbridge_defconfig b/arch/arm/configs/footbridge_defconfig
deleted file mode 100644
index 038518ab..00000000
--- a/arch/arm/configs/footbridge_defconfig
+++ /dev/null
@@ -1,127 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-CONFIG_MODULES=y
-CONFIG_ARCH_FOOTBRIDGE=y
-CONFIG_ARCH_CATS=y
-CONFIG_ARCH_PERSONAL_SERVER=y
-CONFIG_ARCH_EBSA285_HOST=y
-CONFIG_ARCH_NETWINDER=y
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_ATM=y
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_IRDA_DEBUG=y
-CONFIG_WINBOND_FIR=m
-CONFIG_PARPORT=y
-CONFIG_PARPORT_PC=y
-CONFIG_PARPORT_PC_FIFO=y
-CONFIG_PARPORT_1284=y
-CONFIG_PNP=y
-CONFIG_ISAPNP=y
-CONFIG_PARIDE=m
-CONFIG_PARIDE_PD=m
-CONFIG_PARIDE_PCD=m
-CONFIG_PARIDE_PF=m
-CONFIG_PARIDE_PT=m
-CONFIG_PARIDE_PG=m
-CONFIG_PARIDE_ATEN=m
-CONFIG_PARIDE_BPCK=m
-CONFIG_PARIDE_COMM=m
-CONFIG_PARIDE_DSTR=m
-CONFIG_PARIDE_FIT2=m
-CONFIG_PARIDE_FIT3=m
-CONFIG_PARIDE_EPAT=m
-CONFIG_PARIDE_EPIA=m
-CONFIG_PARIDE_FRIQ=m
-CONFIG_PARIDE_FRPW=m
-CONFIG_PARIDE_KBIC=m
-CONFIG_PARIDE_KTTI=m
-CONFIG_PARIDE_ON20=m
-CONFIG_PARIDE_ON26=m
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_VENDOR_3COM=y
-CONFIG_VORTEX=y
-CONFIG_NET_PCI=y
-CONFIG_NE2K_PCI=y
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPPOE=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
-CONFIG_SERIAL_NONSTANDARD=y
-CONFIG_SERIAL_21285=y
-CONFIG_SERIAL_21285_CONSOLE=y
-CONFIG_PRINTER=m
-CONFIG_DS1620=y
-CONFIG_NWBUTTON=y
-CONFIG_NWBUTTON_REBOOT=y
-CONFIG_NWFLASH=m
-CONFIG_I2C=m
-CONFIG_WATCHDOG=y
-CONFIG_SOFT_WATCHDOG=y
-CONFIG_21285_WATCHDOG=m
-CONFIG_977_WATCHDOG=m
-CONFIG_FB=y
-CONFIG_FB_CYBER2000=y
-CONFIG_SOUND=m
-# CONFIG_USB_HID is not set
-CONFIG_USB=m
-CONFIG_USB_DEBUG=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=m
-CONFIG_USB_PRINTER=m
-CONFIG_EXT2_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_ADFS_FS=m
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_ACORN_PARTITION=y
-CONFIG_ACORN_PARTITION_ADFS=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/h3600_defconfig b/arch/arm/configs/h3600_defconfig
deleted file mode 100644
index 317960f1..00000000
--- a/arch/arm/configs/h3600_defconfig
+++ /dev/null
@@ -1,79 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_H3600=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-# CONFIG_CPU_FREQ_STAT is not set
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_SA1100_FIR=m
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=y
-CONFIG_NFSD=m
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
diff --git a/arch/arm/configs/h5000_defconfig b/arch/arm/configs/h5000_defconfig
deleted file mode 100644
index 37903e3f..00000000
--- a/arch/arm/configs/h5000_defconfig
+++ /dev/null
@@ -1,82 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_UID16 is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_H5000=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="keepinitrd"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=32
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-# CONFIG_NETWORK_FILESYSTEMS is not set
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_FTRACE is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/h7201_defconfig b/arch/arm/configs/h7201_defconfig
deleted file mode 100644
index bee94d29..00000000
--- a/arch/arm/configs/h7201_defconfig
+++ /dev/null
@@ -1,27 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_ARCH_H720X=y
-CONFIG_ARCH_H7201=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_EXT2_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/h7202_defconfig b/arch/arm/configs/h7202_defconfig
deleted file mode 100644
index e16d3f37..00000000
--- a/arch/arm/configs/h7202_defconfig
+++ /dev/null
@@ -1,47 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MODULES=y
-CONFIG_ARCH_H720X=y
-CONFIG_ARCH_H7202=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,19200"
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_H720X=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_USB_GADGET=m
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_EXT2_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig
deleted file mode 100644
index bed80472..00000000
--- a/arch/arm/configs/hackkit_defconfig
+++ /dev/null
@@ -1,49 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_HACKKIT=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySA0,115200 root=/dev/ram0 initrd=0xc0400000,8M init=/rootshell"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
deleted file mode 100644
index fd996bb1..00000000
--- a/arch/arm/configs/imote2_defconfig
+++ /dev/null
@@ -1,392 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_RD_BZIP2=y
-CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_INTELMOTE2=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS2,115200 mem=32M"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_NETFILTER=y
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_NF_NAT_SNMP_BASIC=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_TARGET_LOG=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_BRIDGE=m
-# CONFIG_BRIDGE_IGMP_SNOOPING is not set
-CONFIG_IEEE802154=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_CONNECTOR=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_AFS_PARTS=y
-CONFIG_MTD_AR7_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_OTP=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_PXA27x=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=8
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_POWER_SUPPLY=y
-# CONFIG_HWMON is not set
-CONFIG_PMIC_DA903X=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DEBUG=y
-CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
-CONFIG_REGULATOR_USERSPACE_CONSUMER=y
-CONFIG_REGULATOR_DA903X=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_MEDIA_TUNER_CUSTOMISE=y
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_MT9M111=y
-CONFIG_VIDEO_PXA27x=y
-# CONFIG_V4L_USB_DRIVERS is not set
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_FB_PXA_OVERLAY=y
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_PXA2XX_SOC=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_PXA27X=y
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=m
-CONFIG_MMC_PXA=y
-CONFIG_MMC_SPI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_LP3944=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PXA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_CUSE=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=m
-CONFIG_SQUASHFS=m
-CONFIG_ROMFS_FS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V3_ACL=y
-CONFIG_SMB_FS=m
-CONFIG_CIFS=m
-CONFIG_CIFS_STATS=y
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_PROVE_LOCKING=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_CRYPTD=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_XTS=m
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_VMAC=m
-CONFIG_CRYPTO_GHASH=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SEED=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC16=y
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
deleted file mode 100644
index 02c657af..00000000
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ /dev/null
@@ -1,199 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_EXPERT=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MULTI_V4T=y
-CONFIG_ARCH_MULTI_V5=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MX1ADS=y
-CONFIG_MACH_SCB9328=y
-CONFIG_MACH_APF9328=y
-CONFIG_MACH_MX21ADS=y
-CONFIG_MACH_MX25_3DS=y
-CONFIG_MACH_EUKREA_CPUIMX25SD=y
-CONFIG_MACH_MX27ADS=y
-CONFIG_MACH_PCM038=y
-CONFIG_MACH_CPUIMX27=y
-CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2=y
-CONFIG_MACH_EUKREA_CPUIMX27_USEUART4=y
-CONFIG_MACH_MX27_3DS=y
-CONFIG_MACH_IMX27_VISSTRIM_M10=y
-CONFIG_MACH_IMX27LITE=y
-CONFIG_MACH_PCA100=y
-CONFIG_MACH_MXT_TD60=y
-CONFIG_MACH_IMX27IPCAM=y
-CONFIG_MACH_IMX27_DT=y
-CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_MXC_PWM=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_ATA=y
-CONFIG_PATA_IMX=y
-CONFIG_NETDEVICES=y
-CONFIG_CS89x0=y
-CONFIG_CS89x0_PLATFORM=y
-CONFIG_DM9000=y
-CONFIG_SMC91X=y
-CONFIG_SMC911X=y
-CONFIG_SMSC911X=y
-CONFIG_SMSC_PHY=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_IMX=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=m
-CONFIG_TOUCHSCREEN_MC13783=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_W1=y
-CONFIG_W1_MASTER_MXC=y
-CONFIG_W1_SLAVE_THERM=y
-CONFIG_HWMON=m
-CONFIG_SENSORS_MC13783_ADC=m
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_MC13XXX_SPI=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_MC13783=y
-CONFIG_REGULATOR_MC13892=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_OV2640=y
-CONFIG_VIDEO_MX2=y
-CONFIG_V4L_MEM2MEM_DRIVERS=y
-CONFIG_VIDEO_CODA=y
-CONFIG_FB=y
-CONFIG_FB_IMX=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_L4F00242T03=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_IMX_SOC=y
-CONFIG_SND_SOC_MX27VIS_AIC32X4=y
-CONFIG_SND_SOC_PHYCORE_AC97=y
-CONFIG_SND_SOC_EUKREA_TLV320=y
-CONFIG_SND_SOC_IMX_SGTL5000=y
-CONFIG_SND_SOC_IMX_MC13783=y
-CONFIG_USB_HID=m
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ULPI=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_MXC=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_MC13783=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_RTC_DRV_IMXDI=y
-CONFIG_RTC_DRV_MC13XXX=y
-CONFIG_RTC_DRV_MXC=y
-CONFIG_DMADEVICES=y
-CONFIG_IMX_SDMA=y
-CONFIG_IMX_DMA=y
-CONFIG_COMMON_CLK_DEBUG=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT4_FS=y
-# CONFIG_DNOTIFY is not set
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
deleted file mode 100644
index e36b0102..00000000
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ /dev/null
@@ -1,259 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZO=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=18
-CONFIG_CGROUPS=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MULTI_V6=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_MACH_IMX31_DT=y
-CONFIG_MACH_MX31LILLY=y
-CONFIG_MACH_MX31LITE=y
-CONFIG_MACH_PCM037=y
-CONFIG_MACH_PCM037_EET=y
-CONFIG_MACH_MX31_3DS=y
-CONFIG_MACH_MX31MOBOARD=y
-CONFIG_MACH_QONG=y
-CONFIG_MACH_ARMADILLO5X0=y
-CONFIG_MACH_KZM_ARM11_01=y
-CONFIG_MACH_PCM043=y
-CONFIG_MACH_MX35_3DS=y
-CONFIG_MACH_VPR200=y
-CONFIG_MACH_IMX51_DT=y
-CONFIG_MACH_EUKREA_CPUIMX51SD=y
-CONFIG_SOC_IMX53=y
-CONFIG_SOC_IMX6Q=y
-CONFIG_MXC_PWM=y
-CONFIG_SMP=y
-CONFIG_VMSPLIT_2G=y
-CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PM_DEBUG=y
-CONFIG_PM_TEST_SUSPEND=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-CONFIG_NETFILTER=y
-# CONFIG_WIRELESS is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-CONFIG_CONNECTOR=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_ATA=y
-CONFIG_PATA_IMX=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-CONFIG_CS89x0=y
-CONFIG_CS89x0_PLATFORM=y
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-CONFIG_SMC91X=y
-CONFIG_SMC911X=y
-CONFIG_SMSC911X=y
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_IMX=y
-CONFIG_MOUSE_PS2=m
-CONFIG_MOUSE_PS2_ELANTECH=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_MC13783=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_MMA8450=y
-CONFIG_SERIO_SERPORT=m
-CONFIG_VT_HW_CONSOLE_BINDING=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_MXC_RNGA=y
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_ALGOBIT=m
-CONFIG_I2C_ALGOPCF=m
-CONFIG_I2C_ALGOPCA=m
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_MC9S08DZ60=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_DA9052_I2C=y
-CONFIG_MFD_MC13XXX_SPI=y
-CONFIG_MFD_MC13XXX_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_DA9052=y
-CONFIG_REGULATOR_ANATOP=y
-CONFIG_REGULATOR_MC13783=y
-CONFIG_REGULATOR_MC13892=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_SOC_CAMERA=y
-CONFIG_SOC_CAMERA_OV2640=y
-CONFIG_DRM=y
-CONFIG_VIDEO_MX3=y
-CONFIG_FB=y
-CONFIG_LCD_PLATFORM=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_L4F00242T03=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SOC=y
-CONFIG_SND_IMX_SOC=y
-CONFIG_SND_SOC_PHYCORE_AC97=y
-CONFIG_SND_SOC_EUKREA_TLV320=y
-CONFIG_SND_SOC_IMX_SGTL5000=y
-CONFIG_SND_SOC_IMX_MC13783=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-CONFIG_RTC_DRV_MC13XXX=y
-CONFIG_RTC_DRV_MXC=y
-CONFIG_RTC_DRV_SNVS=y
-CONFIG_DMADEVICES=y
-CONFIG_IMX_SDMA=y
-CONFIG_MXS_DMA=y
-CONFIG_STAGING=y
-CONFIG_DRM_IMX=y
-CONFIG_DRM_IMX_IPUV3_CORE=y
-CONFIG_DRM_IMX_IPUV3=y
-CONFIG_COMMON_CLK_DEBUG=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_QUOTA=y
-CONFIG_QUOTA_NETLINK_INTERFACE=y
-# CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CONFIGFS_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_SECURITYFS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC7=m
-CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig
deleted file mode 100644
index a8314c3e..00000000
--- a/arch/arm/configs/integrator_defconfig
+++ /dev/null
@@ -1,90 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_TINY_RCU=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_ARCH_INTEGRATOR=y
-CONFIG_ARCH_INTEGRATOR_AP=y
-CONFIG_ARCH_INTEGRATOR_CP=y
-CONFIG_CPU_ARM720T=y
-CONFIG_CPU_ARM920T=y
-CONFIG_CPU_ARM922T=y
-CONFIG_CPU_ARM926T=y
-CONFIG_CPU_ARM1020=y
-CONFIG_CPU_ARM1022=y
-CONFIG_CPU_ARM1026=y
-CONFIG_PCI=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_AFS_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_E100=y
-CONFIG_SMC91X=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_AMBA_PL010=y
-CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FB_MATROX=y
-CONFIG_FB_MATROX_MILLENIUM=y
-CONFIG_FB_MATROX_MYSTIQUE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PL030=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/configs/iop13xx_defconfig b/arch/arm/configs/iop13xx_defconfig
deleted file mode 100644
index 4fa94a1f..00000000
--- a/arch/arm/configs/iop13xx_defconfig
+++ /dev/null
@@ -1,124 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_IOP13XX=y
-CONFIG_MACH_IQ81340SC=y
-CONFIG_MACH_IQ81340MC=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="ip=bootp root=nfs console=ttyS0,115200 nfsroot=,tcp,v3,wsize=8192,rsize=8192"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-# CONFIG_IPV6_SIT is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_ISCSI_ATTRS=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
-CONFIG_MD_RAID10=y
-CONFIG_MD_RAID456=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_NETDEVICES=y
-CONFIG_E1000=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_IOP3XX=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DMADEVICES=y
-CONFIG_INTEL_IOP_ADMA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_ECRYPT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_SMB_FS=m
-CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS=y
-CONFIG_DEBUG_USER=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_LRW=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_XCBC=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_TGR192=y
-CONFIG_CRYPTO_WP512=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ANUBIS=y
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_CAST5=y
-CONFIG_CRYPTO_CAST6=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_KHAZAD=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_TEA=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRC_CCITT=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/iop32x_defconfig b/arch/arm/configs/iop32x_defconfig
deleted file mode 100644
index 4f2ec3ac..00000000
--- a/arch/arm/configs/iop32x_defconfig
+++ /dev/null
@@ -1,135 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_IOP32X=y
-CONFIG_MACH_GLANTANK=y
-CONFIG_ARCH_IQ80321=y
-CONFIG_ARCH_IQ31244=y
-CONFIG_MACH_N2100=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp cachepolicy=writealloc"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-# CONFIG_IPV6_SIT is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_ATA=y
-CONFIG_SATA_SIL=y
-CONFIG_SATA_VITESSE=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
-CONFIG_MD_RAID10=y
-CONFIG_MD_RAID456=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_E100=y
-CONFIG_E1000=y
-CONFIG_R8169=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IOP3XX=y
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_EHCI_TT_NEWSCHED=y
-CONFIG_USB_UHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_RS5C372=y
-CONFIG_DMADEVICES=y
-CONFIG_INTEL_IOP_ADMA=y
-CONFIG_NET_DMA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_ECRYPT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_LRW=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_XCBC=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_TGR192=y
-CONFIG_CRYPTO_WP512=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ANUBIS=y
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_CAST5=y
-CONFIG_CRYPTO_CAST6=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_KHAZAD=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_TEA=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/iop33x_defconfig b/arch/arm/configs/iop33x_defconfig
deleted file mode 100644
index aa36128a..00000000
--- a/arch/arm/configs/iop33x_defconfig
+++ /dev/null
@@ -1,91 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_IOP33X=y
-CONFIG_ARCH_IQ80331=y
-CONFIG_MACH_IQ80332=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp cachepolicy=writealloc iop3xx_init_atu=y"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-# CONFIG_IPV6_SIT is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_LINEAR=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
-CONFIG_MD_RAID456=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_NETDEVICES=y
-CONFIG_E1000=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IOP3XX=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DMADEVICES=y
-CONFIG_INTEL_IOP_ADMA=y
-CONFIG_NET_DMA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig
deleted file mode 100644
index 063e2ab2..00000000
--- a/arch/arm/configs/ixp4xx_defconfig
+++ /dev/null
@@ -1,205 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_IXP4XX=y
-CONFIG_MACH_NSLU2=y
-CONFIG_MACH_AVILA=y
-CONFIG_MACH_LOFT=y
-CONFIG_ARCH_ADI_COYOTE=y
-CONFIG_MACH_GATEWAY7001=y
-CONFIG_MACH_WG302V2=y
-CONFIG_ARCH_IXDP425=y
-CONFIG_MACH_IXDPG425=y
-CONFIG_MACH_IXDP465=y
-CONFIG_MACH_KIXRP435=y
-CONFIG_ARCH_PRPMC1100=y
-CONFIG_MACH_NAS100D=y
-CONFIG_MACH_DSMG600=y
-CONFIG_MACH_FSG=y
-CONFIG_MACH_GTWX5715=y
-CONFIG_IXP4XX_QMGR=y
-CONFIG_IXP4XX_NPE=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 ip=bootp root=/dev/nfs"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPGRE=m
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_IP_VS=m
-CONFIG_IP_VS_DEBUG=y
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_ATM=y
-CONFIG_ATM_CLIP=y
-CONFIG_ATM_LANE=m
-CONFIG_ATM_MPOA=m
-CONFIG_ATM_BR2684=m
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_IPX=m
-CONFIG_ATALK=m
-CONFIG_DEV_APPLETALK=m
-CONFIG_IPDDP=m
-CONFIG_IPDDP_ENCAP=y
-CONFIG_IPDDP_DECAP=y
-CONFIG_X25=m
-CONFIG_LAPB=m
-CONFIG_ECONET=m
-CONFIG_ECONET_AUNUDP=y
-CONFIG_ECONET_NATIVE=y
-CONFIG_WAN_ROUTER=m
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_CBQ=m
-CONFIG_NET_SCH_HTB=m
-CONFIG_NET_SCH_PRIO=m
-CONFIG_NET_SCH_RED=m
-CONFIG_NET_SCH_SFQ=m
-CONFIG_NET_SCH_TEQL=m
-CONFIG_NET_SCH_TBF=m
-CONFIG_NET_SCH_GRED=m
-CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_INGRESS=m
-CONFIG_NET_CLS_TCINDEX=m
-CONFIG_NET_CLS_ROUTE4=m
-CONFIG_NET_CLS_FW=m
-CONFIG_NET_CLS_U32=m
-CONFIG_NET_CLS_RSVP=m
-CONFIG_NET_CLS_RSVP6=m
-CONFIG_NET_CLS_ACT=y
-CONFIG_NET_ACT_POLICE=y
-CONFIG_NET_PKTGEN=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_IXP4XX=y
-CONFIG_MTD_NAND=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_EEPROM_LEGACY=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_CMD64X=y
-CONFIG_BLK_DEV_HPT366=y
-CONFIG_BLK_DEV_PDC202XX_NEW=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_ATA=y
-CONFIG_SATA_VIA=y
-CONFIG_PATA_ARTOP=y
-CONFIG_PATA_IXP4XX_CF=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_IXP4XX_ETH=y
-CONFIG_NET_PCI=y
-CONFIG_WAN=y
-CONFIG_HDLC=m
-CONFIG_HDLC_RAW=m
-CONFIG_HDLC_CISCO=m
-CONFIG_HDLC_FR=m
-CONFIG_HDLC_PPP=m
-CONFIG_HDLC_X25=m
-CONFIG_DLCI=m
-CONFIG_WAN_ROUTER_DRIVERS=m
-CONFIG_ATM_TCP=m
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_IXP4XX_BEEPER=y
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SENSORS_W83781D=y
-CONFIG_WATCHDOG=y
-CONFIG_IXP4XX_WATCHDOG=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_UHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_FSG=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_IDE_DISK=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_ISL1208=y
-CONFIG_RTC_DRV_X1205=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig
deleted file mode 100644
index ea80e7e8..00000000
--- a/arch/arm/configs/jornada720_defconfig
+++ /dev/null
@@ -1,112 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_MODULES=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_JORNADA720=y
-CONFIG_SA1100_JORNADA720_SSP=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRCOMM=m
-CONFIG_SA1100_FIR=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_NET_PCMCIA=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_HP7XX=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_HP7XX=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=32
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_S1D13XXX=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_NETWORK_FILESYSTEMS is not set
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
deleted file mode 100644
index 13482ea5..00000000
--- a/arch/arm/configs/kirkwood_defconfig
+++ /dev/null
@@ -1,196 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=19
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_KIRKWOOD=y
-CONFIG_MACH_DB88F6281_BP=y
-CONFIG_MACH_RD88F6192_NAS=y
-CONFIG_MACH_RD88F6281=y
-CONFIG_MACH_MV88F6281GTW_GE=y
-CONFIG_MACH_SHEEVAPLUG=y
-CONFIG_MACH_ESATA_SHEEVAPLUG=y
-CONFIG_MACH_GURUPLUG=y
-CONFIG_MACH_DREAMPLUG_DT=y
-CONFIG_MACH_ICONNECT_DT=y
-CONFIG_MACH_DLINK_KIRKWOOD_DT=y
-CONFIG_MACH_IB62X0_DT=y
-CONFIG_MACH_TS219_DT=y
-CONFIG_MACH_DOCKSTAR_DT=y
-CONFIG_MACH_GOFLEXNET_DT=y
-CONFIG_MACH_LSXL_DT=y
-CONFIG_MACH_IOMEGA_IX2_200_DT=y
-CONFIG_MACH_KM_KIRKWOOD_DT=y
-CONFIG_MACH_INETSPACE_V2_DT=y
-CONFIG_MACH_MPLCEC4_DT=y
-CONFIG_MACH_NETSPACE_V2_DT=y
-CONFIG_MACH_NETSPACE_MAX_V2_DT=y
-CONFIG_MACH_NETSPACE_LITE_V2_DT=y
-CONFIG_MACH_NETSPACE_MINI_V2_DT=y
-CONFIG_MACH_OPENBLOCKS_A6_DT=y
-CONFIG_MACH_TOPKICK_DT=y
-CONFIG_MACH_TS219=y
-CONFIG_MACH_TS41X=y
-CONFIG_MACH_DOCKSTAR=y
-CONFIG_MACH_OPENRD_BASE=y
-CONFIG_MACH_OPENRD_CLIENT=y
-CONFIG_MACH_OPENRD_ULTIMATE=y
-CONFIG_MACH_NETSPACE_V2=y
-CONFIG_MACH_INETSPACE_V2=y
-CONFIG_MACH_NETSPACE_MAX_V2=y
-CONFIG_MACH_D2NET_V2=y
-CONFIG_MACH_NET2BIG_V2=y
-CONFIG_MACH_NET5BIG_V2=y
-CONFIG_MACH_T5325=y
-CONFIG_MACH_NSA310_DT=y
-# CONFIG_CPU_FEROCEON_OLD_ID is not set
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_KIRKWOOD=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_NET_DSA=y
-CONFIG_NET_PKTGEN=m
-CONFIG_CFG80211=y
-CONFIG_MAC80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ORION=y
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
-CONFIG_SATA_MV=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_NET_DSA_MV88E6123_61_65=y
-CONFIG_MV643XX_ETH=y
-CONFIG_MARVELL_PHY=y
-CONFIG_LIBERTAS=y
-CONFIG_LIBERTAS_SDIO=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_SPI=y
-CONFIG_SPI_ORION=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_ORION_WATCHDOG=y
-CONFIG_HID_DRAGONRISE=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_TWINHAN=y
-CONFIG_HID_NTRIG=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_HID_GREENASIA=y
-CONFIG_HID_SMARTJOYPLUS=y
-CONFIG_HID_TOPSEED=y
-CONFIG_HID_THRUSTMASTER=y
-CONFIG_HID_ZEROPLUS=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_MMC=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_MVSDIO=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_S35390A=y
-CONFIG_RTC_DRV_MV=y
-CONFIG_DMADEVICES=y
-CONFIG_MV_XOR=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_MV_CESA=y
-CONFIG_CRC_CCITT=y
-CONFIG_CRC16=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/kota2_defconfig b/arch/arm/configs/kota2_defconfig
deleted file mode 100644
index 57ad3d47..00000000
--- a/arch/arm/configs/kota2_defconfig
+++ /dev/null
@@ -1,121 +0,0 @@
-# CONFIG_ARM_PATCH_PHYS_VIRT is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_CGROUPS=y
-CONFIG_CPUSETS=y
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_KEYBOARD_GPIO_POLLED=y
-CONFIG_ARCH_SH73A0=y
-CONFIG_MACH_KOTA2=y
-CONFIG_MEMORY_SIZE=0x1e000000
-# CONFIG_SH_TIMER_TMU is not set
-# CONFIG_SWP_EMULATE is not set
-CONFIG_CPU_BPREDICT_DISABLE=y
-CONFIG_ARM_ERRATA_460075=y
-CONFIG_ARM_ERRATA_742230=y
-CONFIG_ARM_ERRATA_742231=y
-CONFIG_PL310_ERRATA_588369=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_PL310_ERRATA_727915=y
-CONFIG_ARM_ERRATA_743622=y
-CONFIG_ARM_ERRATA_751472=y
-CONFIG_PL310_ERRATA_753970=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_PL310_ERRATA_769419=y
-CONFIG_NO_HZ=y
-CONFIG_SMP=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
-CONFIG_CMDLINE_FORCE=y
-CONFIG_KEXEC=y
-CONFIG_CPU_IDLE=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_CFG80211=y
-CONFIG_WIRELESS_EXT_SYSFS=y
-CONFIG_MAC80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_BLK_DEV is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-CONFIG_SMSC911X=y
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_B43=y
-CONFIG_B43_PHY_N=y
-CONFIG_B43_DEBUG=y
-CONFIG_INPUT_SPARSEKMAP=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_SH_KEYSC=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=9
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C_SH_MOBILE=y
-# CONFIG_HWMON is not set
-CONFIG_BCMA=y
-CONFIG_BCMA_DEBUG=y
-CONFIG_FB=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_LCD_PLATFORM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_SDHI=y
-CONFIG_MMC_SH_MMCIF=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_RENESAS_TPU=y
-CONFIG_LEDS_TRIGGERS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_INFO_REDUCED=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/ks8695_defconfig b/arch/arm/configs/ks8695_defconfig
deleted file mode 100644
index 47c48837..00000000
--- a/arch/arm/configs/ks8695_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_KS8695=y
-CONFIG_MACH_KS8695=y
-CONFIG_MACH_DSM320=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_PCI=y
-CONFIG_PCI_DEBUG=y
-CONFIG_PCCARD=y
-CONFIG_YENTA=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PRISM54=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_KS8695=y
-CONFIG_SERIAL_KS8695_CONSOLE=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
deleted file mode 100644
index 6c37f4a9..00000000
--- a/arch/arm/configs/kzm9d_defconfig
+++ /dev/null
@@ -1,88 +0,0 @@
-# CONFIG_ARM_PATCH_PHYS_VIRT is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_EMEV2=y
-CONFIG_MACH_KZM9D=y
-CONFIG_MEMORY_START=0x40000000
-CONFIG_MEMORY_SIZE=0x10000000
-# CONFIG_SH_TIMER_TMU is not set
-# CONFIG_SWP_EMULATE is not set
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_HOTPLUG_CPU=y
-# CONFIG_LOCAL_TIMERS is not set
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-# CONFIG_CROSS_MEMORY_ATTACH is not set
-CONFIG_FORCE_MAX_ZONEORDER=13
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_BLK_DEV is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-CONFIG_SMSC911X=y
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_EM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_EM=y
-# CONFIG_HWMON is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-# CONFIG_FTRACE is not set
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
deleted file mode 100644
index 670c3b60..00000000
--- a/arch/arm/configs/kzm9g_defconfig
+++ /dev/null
@@ -1,151 +0,0 @@
-# CONFIG_ARM_PATCH_PHYS_VIRT is not set
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_NET_NS is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_SH73A0=y
-CONFIG_MACH_KZM9G=y
-CONFIG_MEMORY_START=0x41000000
-CONFIG_MEMORY_SIZE=0x1f000000
-CONFIG_ARM_ERRATA_743622=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_SCHED_MC=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_KEXEC=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=y
-CONFIG_SH_IRDA=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC911X=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_SPARSEKMAP=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ST1232=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_ADXL34X=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=9
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SH_MOBILE=y
-CONFIG_GPIO_PCF857X=y
-# CONFIG_HWMON is not set
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DUMMY=y
-CONFIG_FB=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_FB_SH_MOBILE_MERAM=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_SH4_FSI=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_R8A66597_HCD=y
-CONFIG_USB_RENESAS_USBHS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_RENESAS_USBHS_UDC=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_SDHI=y
-CONFIG_MMC_SH_MMCIF=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_RS5C372=y
-CONFIG_DMADEVICES=y
-CONFIG_SH_DMAE=y
-CONFIG_ASYNC_TX_DMA=y
-CONFIG_STAGING=y
-CONFIG_SENSORS_AK8975=y
-CONFIG_IIO=y
-# CONFIG_DNOTIFY is not set
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRC16=y
diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig
deleted file mode 100644
index faa28656..00000000
--- a/arch/arm/configs/lart_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_LART=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySA0,9600 root=/dev/ram"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_DEBUG=y
-CONFIG_SA1100_FIR=m
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=1
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_LART=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_FS_DEBUG=1
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_DEBUG_USER=y
-CONFIG_CRC32=m
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
deleted file mode 100644
index 92386b20..00000000
--- a/arch/arm/configs/lpc32xx_defconfig
+++ /dev/null
@@ -1,194 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_ARCH_LPC32XX=y
-CONFIG_KEYBOARD_GPIO_POLLED=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="console=ttyS0,115200n81 root=/dev/ram0"
-CONFIG_CPU_IDLE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_IPV6_PRIVACY=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MUSEUM_IDS=y
-CONFIG_MTD_NAND_SLC_LPC32XX=y
-CONFIG_MTD_NAND_MLC_LPC32XX=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=1
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-CONFIG_LPC_ENET=y
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_SMSC_PHY=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_MATRIXKMAP=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_LPC32XX=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_LPC32XX=y
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_HS_LPC32XX=y
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_PNX=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_SENSORS_DS620=y
-CONFIG_SENSORS_MAX6639=y
-CONFIG_WATCHDOG=y
-CONFIG_PNX4008_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-CONFIG_SND_SEQUENCER_OSS=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_DEBUG=y
-CONFIG_SND_DEBUG_VERBOSE=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-CONFIG_SND_SOC=y
-CONFIG_USB=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_LPC32XX=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_ARMMMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_PCA9532=y
-CONFIG_LEDS_PCA9532_GPIO=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_PWM=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-CONFIG_RTC_DRV_DS1374=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_RTC_DRV_LPC32XX=y
-CONFIG_DMADEVICES=y
-CONFIG_AMBA_PL08X=y
-CONFIG_STAGING=y
-CONFIG_LPC32XX_ADC=y
-CONFIG_IIO=y
-CONFIG_MAX517=y
-CONFIG_PWM=y
-CONFIG_PWM_LPC32XX=y
-CONFIG_EXT2_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_FTRACE is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig
deleted file mode 100644
index 1c8c9ee7..00000000
--- a/arch/arm/configs/lpd270_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_LOGICPD_PXA270=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-# CONFIG_IPV6_SIT is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-CONFIG_SND_PXA2XX_AC97=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/lubbock_defconfig b/arch/arm/configs/lubbock_defconfig
deleted file mode 100644
index c4ba2745..00000000
--- a/arch/arm/configs/lubbock_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MODULES=y
-CONFIG_ARCH_PXA=y
-CONFIG_ARCH_LUBBOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_PXA2XX=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_SA1111=y
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_USB_GADGET=y
-CONFIG_USB_G_SERIAL=m
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
deleted file mode 100644
index 7594b3af..00000000
--- a/arch/arm/configs/mackerel_defconfig
+++ /dev/null
@@ -1,152 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_NET_NS is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_SH7372=y
-CONFIG_MACH_MACKEREL=y
-CONFIG_MEMORY_SIZE=0x10000000
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_FORCE_MAX_ZONEORDER=15
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_KEXEC=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_ARM_INTEGRATOR=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_SH_MOBILE=y
-# CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_FB_SH_MOBILE_HDMI=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_SOC_SH4_FSI=y
-CONFIG_USB=y
-CONFIG_USB_RENESAS_USBHS_HCD=y
-CONFIG_USB_RENESAS_USBHS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_RENESAS_USBHS_UDC=y
-CONFIG_DMADEVICES=y
-CONFIG_SH_DMAE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=y
-CONFIG_NLS_CODEPAGE_775=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_855=y
-CONFIG_NLS_CODEPAGE_857=y
-CONFIG_NLS_CODEPAGE_860=y
-CONFIG_NLS_CODEPAGE_861=y
-CONFIG_NLS_CODEPAGE_862=y
-CONFIG_NLS_CODEPAGE_863=y
-CONFIG_NLS_CODEPAGE_864=y
-CONFIG_NLS_CODEPAGE_865=y
-CONFIG_NLS_CODEPAGE_866=y
-CONFIG_NLS_CODEPAGE_869=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_3=y
-CONFIG_NLS_ISO8859_4=y
-CONFIG_NLS_ISO8859_5=y
-CONFIG_NLS_ISO8859_6=y
-CONFIG_NLS_ISO8859_7=y
-CONFIG_NLS_ISO8859_9=y
-CONFIG_NLS_ISO8859_13=y
-CONFIG_NLS_ISO8859_14=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_KOI8_R=y
-CONFIG_NLS_KOI8_U=y
-CONFIG_NLS_UTF8=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
deleted file mode 100644
index 557dd291..00000000
--- a/arch/arm/configs/magician_defconfig
+++ /dev/null
@@ -1,182 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_UID16 is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_H4700=y
-CONFIG_MACH_MAGICIAN=y
-CONFIG_NO_HZ=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="keepinitrd"
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_IRDA_DEBUG=y
-CONFIG_IRTTY_SIR=m
-CONFIG_PXA_FICP=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_MPPE=m
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_SERIO is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_PXA=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_PXA=y
-CONFIG_W1_MASTER_DS1WM=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_PDA_POWER=y
-CONFIG_BATTERY_DS2760=y
-# CONFIG_HWMON is not set
-CONFIG_MFD_ASIC3=y
-CONFIG_HTC_EGPIO=y
-CONFIG_HTC_PASIC3=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_GPIO=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_FB_PXA_OVERLAY=y
-CONFIG_FB_W100=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_DISPLAY_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_SOUND=y
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_PXA2XX_SOC=m
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=m
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_VBUS_DRAW=500
-CONFIG_USB_PXA27X=y
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_GPIO_VBUS=y
-CONFIG_MMC=y
-CONFIG_SDIO_UART=m
-CONFIG_MMC_PXA=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DEBUG=y
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/mainstone_defconfig b/arch/arm/configs/mainstone_defconfig
deleted file mode 100644
index 04efa1b3..00000000
--- a/arch/arm/configs/mainstone_defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MODULES=y
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_MAINSTONE=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
deleted file mode 100644
index afb17d63..00000000
--- a/arch/arm/configs/marzen_defconfig
+++ /dev/null
@@ -1,105 +0,0 @@
-# CONFIG_ARM_PATCH_PHYS_VIRT is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_KERNEL_LZMA=y
-CONFIG_NO_HZ=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
-CONFIG_ARCH_R8A7779=y
-CONFIG_MACH_MARZEN=y
-CONFIG_MEMORY_START=0x60000000
-CONFIG_MEMORY_SIZE=0x10000000
-CONFIG_SHMOBILE_TIMER_HZ=1024
-# CONFIG_SH_TIMER_CMT is not set
-# CONFIG_SWP_EMULATE is not set
-CONFIG_ARM_ERRATA_430973=y
-CONFIG_ARM_ERRATA_458693=y
-CONFIG_ARM_ERRATA_460075=y
-CONFIG_ARM_ERRATA_743622=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_SMP=y
-# CONFIG_ARM_CPU_TOPOLOGY is not set
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"
-CONFIG_CMDLINE_FORCE=y
-CONFIG_KEXEC=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-CONFIG_SMC911X=y
-CONFIG_SMSC911X=y
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_VT is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=6
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_RCAR=y
-CONFIG_SPI=y
-CONFIG_SPI_SH_HSPI=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-CONFIG_THERMAL=y
-CONFIG_RCAR_THERMAL=y
-CONFIG_SSB=y
-CONFIG_USB=y
-CONFIG_USB_RCAR_PHY=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHI=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PLATFORM=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_STORAGE=y
-CONFIG_UIO=y
-CONFIG_UIO_PDRV_GENIRQ=y
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_INFO_REDUCED=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_AVERAGE=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
deleted file mode 100644
index a07948a8..00000000
--- a/arch/arm/configs/mini2440_defconfig
+++ /dev/null
@@ -1,385 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_RELAY=y
-CONFIG_UTS_NS=y
-CONFIG_IPC_NS=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_BLK_DEV_INTEGRITY=y
-CONFIG_ARCH_S3C24XX=y
-# CONFIG_CPU_S3C2410 is not set
-CONFIG_CPU_S3C2440=y
-CONFIG_S3C_ADC=y
-CONFIG_S3C24XX_PWM=y
-CONFIG_MACH_MINI2440=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_KEXEC=y
-CONFIG_CPU_IDLE=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-CONFIG_INET_DIAG=m
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_VLAN_8021Q_GVRP=y
-CONFIG_NET_PKTGEN=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIBTSDIO=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIUART_LL=y
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_HCIVHCI=m
-CONFIG_CFG80211=m
-CONFIG_CFG80211_REG_DEBUG=y
-CONFIG_MAC80211=m
-CONFIG_MAC80211_MESH=y
-CONFIG_MAC80211_LEDS=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_CONNECTOR=m
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-CONFIG_NFTL=y
-CONFIG_NFTL_RW=y
-CONFIG_INFTL=y
-CONFIG_RFD_FTL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_ROM=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_S3C2410=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_MTD_LPDDR=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_CDROM_PKTCDVD=m
-CONFIG_SENSORS_TSL2550=m
-CONFIG_SCSI=m
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=m
-CONFIG_CHR_DEV_SG=m
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_TUN=m
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_HOSTAP=m
-CONFIG_HOSTAP_FIRMWARE=y
-CONFIG_HOSTAP_FIRMWARE_NVRAM=y
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_ZD1211RW=m
-CONFIG_ZD1211RW_DEBUG=y
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_MPPE=m
-CONFIG_INPUT_FF_MEMLESS=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIO_RAW=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=128
-CONFIG_IPMI_HANDLER=m
-CONFIG_IPMI_DEVICE_INTERFACE=m
-CONFIG_IPMI_SI=m
-CONFIG_IPMI_WATCHDOG=m
-CONFIG_IPMI_POWEROFF=m
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_S3C2410=y
-CONFIG_I2C_SIMTEC=y
-CONFIG_SPI=y
-CONFIG_SPI_S3C24XX=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_SENSORS_LM75=y
-CONFIG_THERMAL=m
-CONFIG_WATCHDOG=y
-CONFIG_S3C2410_WATCHDOG=y
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FB_S3C2410=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_PLATFORM=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_DISPLAY_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_SEQ_DUMMY=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_DYNAMIC_MINORS=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_USB_CAIAQ=m
-CONFIG_SND_USB_CAIAQ_INPUT=y
-CONFIG_SND_SOC=y
-CONFIG_SND_S3C24XX_SOC=y
-CONFIG_HIDRAW=y
-CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_NTRIG=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_HID_TOPSEED=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=m
-CONFIG_USB_WDM=m
-CONFIG_USB_STORAGE=m
-CONFIG_USB_STORAGE_DATAFAB=m
-CONFIG_USB_STORAGE_ISD200=m
-CONFIG_USB_STORAGE_USBAT=m
-CONFIG_USB_STORAGE_SDDR09=m
-CONFIG_USB_STORAGE_SDDR55=m
-CONFIG_USB_STORAGE_JUMPSHOT=m
-CONFIG_USB_STORAGE_ALAUDA=m
-CONFIG_USB_LIBUSUAL=y
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_CP210X=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_SPCP8X5=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_S3C2410=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_MMC=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SPI=y
-CONFIG_MMC_S3C=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_S3C24XX=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-CONFIG_RTC_DRV_S3C=y
-CONFIG_DMADEVICES=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_ROMFS_BACKED_BY_BOTH=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_MINIX_SUBPARTITION=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_LDM_PARTITION=y
-CONFIG_EFI_PARTITION=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_KEYS=y
-CONFIG_CRYPTO_FIPS=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_CRYPTD=m
-CONFIG_CRYPTO_AUTHENC=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_CCM=m
-CONFIG_CRYPTO_GCM=m
-CONFIG_CRYPTO_CTS=m
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_XTS=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_RMD128=m
-CONFIG_CRYPTO_RMD160=m
-CONFIG_CRYPTO_RMD256=m
-CONFIG_CRYPTO_RMD320=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAMELLIA=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SALSA20=m
-CONFIG_CRYPTO_SEED=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_ZLIB=m
-CONFIG_CRYPTO_LZO=m
-CONFIG_CRC_T10DIF=y
-CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig
deleted file mode 100644
index f1cb95e5..00000000
--- a/arch/arm/configs/mmp2_defconfig
+++ /dev/null
@@ -1,98 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_MMP=y
-CONFIG_MACH_BROWNSTONE=y
-CONFIG_MACH_FLINT=y
-CONFIG_MACH_MARVELL_JASPER=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=128M user_debug=255 earlyprintk"
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_ONENAND=y
-CONFIG_MTD_ONENAND_GENERIC=y
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_PXA=y
-# CONFIG_HWMON is not set
-CONFIG_MFD_MAX8925=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_MAX8649=y
-CONFIG_REGULATOR_MAX8925=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_MAX8925=y
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_MAX8925=y
-CONFIG_MMC=y
-# CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT4_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_DYNAMIC_DEBUG is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_MMP_UART3=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
deleted file mode 100644
index 2b8f7aff..00000000
--- a/arch/arm/configs/msm_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MSM=y
-CONFIG_MACH_HALIBUT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyMSM,115200n8"
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_PPP=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_MSM=y
-CONFIG_SERIAL_MSM_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FB_MSM=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_SCHEDSTATS=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
deleted file mode 100644
index e31d4423..00000000
--- a/arch/arm/configs/multi_v7_defconfig
+++ /dev/null
@@ -1,60 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_ARCH_MVEBU=y
-CONFIG_MACH_ARMADA_370=y
-CONFIG_MACH_ARMADA_XP=y
-CONFIG_ARCH_HIGHBANK=y
-CONFIG_ARCH_SOCFPGA=y
-CONFIG_ARCH_SUNXI=y
-# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
-CONFIG_ARCH_ZYNQ=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_SMP=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_HIGHPTE=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_NET=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-CONFIG_SATA_HIGHBANK=y
-CONFIG_SATA_MV=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_CALXEDA_XGMAC=y
-CONFIG_SMSC911X=y
-CONFIG_STMMAC_ETH=y
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_IPMI_HANDLER=y
-CONFIG_IPMI_SI=y
-CONFIG_I2C=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_USB=y
-CONFIG_USB_ISP1760_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
-CONFIG_EDAC_HIGHBANK_MC=y
-CONFIG_EDAC_HIGHBANK_L2=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_DMADEVICES=y
-CONFIG_PL330_DMA=y
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
deleted file mode 100644
index 1f08219c..00000000
--- a/arch/arm/configs/mv78xx0_defconfig
+++ /dev/null
@@ -1,139 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_MV78XX0=y
-CONFIG_MACH_DB78X00_BP=y
-CONFIG_MACH_RD78X00_MASA=y
-CONFIG_MACH_TERASTATION_WXL=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_NET_PKTGEN=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ORION=y
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_ATA=y
-CONFIG_SATA_MV=y
-CONFIG_NETDEVICES=y
-CONFIG_MARVELL_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_NET_PCI=y
-CONFIG_MV643XX_ETH=y
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_PCI is not set
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_EHCI_TT_NEWSCHED=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_RS5C372=y
-CONFIG_RTC_DRV_M41T80=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=m
-CONFIG_INOTIFY=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_SCHEDSTATS=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
deleted file mode 100644
index 2ec8119c..00000000
--- a/arch/arm/configs/mvebu_defconfig
+++ /dev/null
@@ -1,91 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_ARCH_MVEBU=y
-CONFIG_MACH_ARMADA_370=y
-CONFIG_MACH_ARMADA_XP=y
-# CONFIG_CACHE_L2X0 is not set
-# CONFIG_SWP_EMULATE is not set
-CONFIG_SMP=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-# CONFIG_COMPACTION is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_INET=y
-CONFIG_BT=y
-CONFIG_BT_MRVL=y
-CONFIG_BT_MRVL_SDIO=y
-CONFIG_CFG80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-CONFIG_SATA_MV=y
-CONFIG_NETDEVICES=y
-CONFIG_MVNETA=y
-CONFIG_MARVELL_PHY=y
-CONFIG_MWIFIEX=y
-CONFIG_MWIFIEX_SDIO=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_I2C=y
-CONFIG_SPI=y
-CONFIG_SPI_ORION=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_M25P80=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_MMC=y
-CONFIG_MMC_MVSDIO=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_S35390A=y
-CONFIG_RTC_DRV_MV=y
-CONFIG_DMADEVICES=y
-CONFIG_MV_XOR=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
deleted file mode 100644
index 6a99e30f..00000000
--- a/arch/arm/configs/mxs_defconfig
+++ /dev/null
@@ -1,186 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_NET_NS is not set
-CONFIG_PERF_EVENTS=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_BLK_DEV_INTEGRITY=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MXS=y
-CONFIG_MACH_MXS_DT=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_AEABI=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_FLEXCAN=m
-# CONFIG_WIRELESS is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_M25P80=y
-# CONFIG_M25PXX_USE_FAST_READ is not set
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_UBI=y
-# CONFIG_BLK_DEV is not set
-CONFIG_EEPROM_AT24=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_ENC28J60=y
-CONFIG_USB_USBNET=y
-CONFIG_USB_NET_SMSC95XX=y
-CONFIG_SMSC_PHY=y
-CONFIG_ICPLUS_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=m
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_TSC2007=m
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_MXS_AUART=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MXS=y
-CONFIG_SPI=y
-CONFIG_SPI_GPIO=m
-CONFIG_SPI_MXS=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_FB=y
-CONFIG_FB_MXS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SOC=y
-CONFIG_SND_MXS_SOC=y
-CONFIG_SND_SOC_MXS_SGTL5000=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_MMC=y
-CONFIG_MMC_MXS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=m
-CONFIG_RTC_DRV_STMP=y
-CONFIG_DMADEVICES=y
-CONFIG_MXS_DMA=y
-CONFIG_STAGING=y
-CONFIG_MXS_LRADC=y
-CONFIG_IIO_SYSFS_TRIGGER=y
-CONFIG_COMMON_CLK_DEBUG=y
-CONFIG_IIO=y
-CONFIG_PWM=y
-CONFIG_PWM_MXS=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT4_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_FSCACHE=m
-CONFIG_FSCACHE_STATS=y
-CONFIG_CACHEFILES=m
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_PRINTK_TIME=y
-CONFIG_FRAME_WARN=2048
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_UNUSED_SYMBOLS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_TIMER_STATS=y
-CONFIG_PROVE_LOCKING=y
-CONFIG_DEBUG_INFO=y
-CONFIG_BLK_DEV_IO_TRACE=y
-CONFIG_STRICT_DEVMEM=y
-CONFIG_DEBUG_USER=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_ITU_T=m
-CONFIG_CRC7=m
diff --git a/arch/arm/configs/neponset_defconfig b/arch/arm/configs/neponset_defconfig
deleted file mode 100644
index d7dc9922..00000000
--- a/arch/arm/configs/neponset_defconfig
+++ /dev/null
@@ -1,90 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_ASSABET=y
-CONFIG_ASSABET_NEPONSET=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_PCMCIA_SA1111=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x80000
-CONFIG_ZBOOT_ROM_BSS=0xc1000000
-CONFIG_ZBOOT_ROM=y
-CONFIG_CMDLINE="console=ttySA0,38400n8 cpufreq=221200 rw root=/dev/mtdblock2 mtdparts=sa1100:512K(boot),1M(kernel),2560K(initrd),4M(root) load_ramdisk=1 prompt_ramdisk=0 mem=32M noinitrd initrd=0xc0800000,3M"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_VENDOR_SMC=y
-CONFIG_SMC9194=y
-CONFIG_SMC91X=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIO_SERPORT=m
-CONFIG_SERIO_SA1111=y
-CONFIG_SERIAL_NONSTANDARD=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CS=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=64
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=m
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=m
-CONFIG_USB_DEBUG=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=m
-CONFIG_USB_OHCI_HCD=m
-CONFIG_USB_STORAGE=m
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_MSDOS_PARTITION is not set
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/netwinder_defconfig b/arch/arm/configs/netwinder_defconfig
deleted file mode 100644
index 25ed772d..00000000
--- a/arch/arm/configs/netwinder_defconfig
+++ /dev/null
@@ -1,87 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_ARCH_FOOTBRIDGE=y
-CONFIG_ARCH_NETWINDER=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=0x301"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_PARPORT=y
-CONFIG_PARPORT_PC=y
-CONFIG_PARPORT_PC_SUPERIO=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_SL82C105=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_NET_TULIP=y
-CONFIG_TULIP=y
-CONFIG_TULIP_MMIO=y
-CONFIG_NET_PCI=y
-CONFIG_NE2K_PCI=y
-CONFIG_MOUSE_SERIAL=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_PRINTER=y
-CONFIG_DS1620=y
-CONFIG_NWBUTTON=y
-CONFIG_NWBUTTON_REBOOT=y
-CONFIG_NWFLASH=y
-CONFIG_WATCHDOG=y
-CONFIG_977_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_CYBER2000=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-CONFIG_SOUND_OSS=y
-CONFIG_SOUND_TRACEINIT=y
-CONFIG_SOUND_DMAP=y
-CONFIG_SOUND_YM3812=y
-CONFIG_SOUND_WAVEARTIST=y
-CONFIG_EXT2_FS=y
-CONFIG_AUTOFS_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_SMB_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig
deleted file mode 100644
index 9c0ad799..00000000
--- a/arch/arm/configs/netx_defconfig
+++ /dev/null
@@ -1,86 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_ARCH_NETX=y
-CONFIG_MACH_NXDKN=y
-CONFIG_MACH_NXDB500=y
-CONFIG_MACH_NXEB500HMI=y
-CONFIG_PREEMPT=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySMX0,115200"
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_NET_IPGRE=m
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=y
-CONFIG_INET_ESP=y
-CONFIG_INET_IPCOMP=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_NET_PKTGEN=m
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PLATRAM=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_NETX=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_NETX=y
-CONFIG_SERIAL_NETX_CONSOLE=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_RTC_CLASS=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRC_CCITT=m
-CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
deleted file mode 100644
index 86cfd295..00000000
--- a/arch/arm/configs/nhk8815_defconfig
+++ /dev/null
@@ -1,132 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_NOMADIK=y
-CONFIG_MACH_NOMADIK_8815NHK=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPIP=y
-CONFIG_NET_IPGRE=y
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIVHCI=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_TESTS=m
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC_SMC=y
-CONFIG_MTD_NAND_FSMC=y
-CONFIG_MTD_ONENAND=y
-CONFIG_MTD_ONENAND_VERIFY_WRITE=y
-CONFIG_MTD_ONENAND_GENERIC=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_TUN=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_MPPE=m
-CONFIG_PPPOE=m
-CONFIG_NETCONSOLE=m
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_MOUSE_PS2 is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_PINCTRL_NOMADIK=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_RTC_CLASS=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_FUSE_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_ROOT_NFS=y
-CONFIG_SMB_FS=m
-CONFIG_CIFS=m
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/nuc910_defconfig b/arch/arm/configs/nuc910_defconfig
deleted file mode 100644
index 10180cfd..00000000
--- a/arch/arm/configs/nuc910_defconfig
+++ /dev/null
@@ -1,60 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_RELAY=y
-CONFIG_USER_NS=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_ARCH_W90X900=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=1
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_STORAGE=y
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/nuc950_defconfig b/arch/arm/configs/nuc950_defconfig
deleted file mode 100644
index 27aa8731..00000000
--- a/arch/arm/configs/nuc950_defconfig
+++ /dev/null
@@ -1,76 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_RELAY=y
-CONFIG_USER_NS=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_ARCH_W90X900=y
-# CONFIG_MACH_W90P910EVB is not set
-CONFIG_MACH_W90P950EVB=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_MISC=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=1
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_NUC900=y
-CONFIG_GPM1040A0_320X240=y
-CONFIG_FB_NUC900_DEBUG=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_STORAGE=y
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
diff --git a/arch/arm/configs/nuc960_defconfig b/arch/arm/configs/nuc960_defconfig
deleted file mode 100644
index 56fd7ad0..00000000
--- a/arch/arm/configs/nuc960_defconfig
+++ /dev/null
@@ -1,66 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_RELAY=y
-CONFIG_USER_NS=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_ARCH_W90X900=y
-# CONFIG_MACH_W90P910EVB is not set
-CONFIG_MACH_W90N960EVB=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_MISC=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=1
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_STORAGE=y
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
deleted file mode 100644
index 42eab9a2..00000000
--- a/arch/arm/configs/omap1_defconfig
+++ /dev/null
@@ -1,278 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_ELF_CORE is not set
-# CONFIG_BASE_FULL is not set
-# CONFIG_SHMEM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_SLOB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_OMAP=y
-CONFIG_ARCH_OMAP1=y
-CONFIG_OMAP_RESET_CLOCKS=y
-# CONFIG_OMAP_MUX is not set
-CONFIG_OMAP_MBOX_FWK=y
-CONFIG_OMAP_32K_TIMER=y
-CONFIG_OMAP_DM_TIMER=y
-CONFIG_ARCH_OMAP730=y
-CONFIG_ARCH_OMAP850=y
-CONFIG_ARCH_OMAP16XX=y
-CONFIG_MACH_OMAP_INNOVATOR=y
-CONFIG_MACH_OMAP_H2=y
-CONFIG_MACH_OMAP_H3=y
-CONFIG_MACH_OMAP_HTCWIZARD=y
-CONFIG_MACH_HERALD=y
-CONFIG_MACH_OMAP_OSK=y
-CONFIG_MACH_OMAP_PERSEUS2=y
-CONFIG_MACH_OMAP_FSAMPLE=y
-CONFIG_MACH_VOICEBLUE=y
-CONFIG_MACH_OMAP_PALMTE=y
-CONFIG_MACH_OMAP_PALMZ71=y
-CONFIG_MACH_OMAP_PALMTT=y
-CONFIG_MACH_SX1=y
-CONFIG_MACH_NOKIA770=y
-CONFIG_MACH_AMS_DELTA=y
-CONFIG_MACH_OMAP_GENERIC=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_PCCARD=y
-CONFIG_OMAP_CF=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=1f03 rootfstype=jffs2"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM=y
-# CONFIG_SUSPEND is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_NETFILTER=y
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_HIDP=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_CONNECTOR=y
-# CONFIG_PROC_EVENTS is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_NAND=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_SCSI=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_TUN=y
-CONFIG_PHYLIB=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_USB_CATC=y
-CONFIG_USB_KAWETH=y
-CONFIG_USB_PEGASUS=y
-CONFIG_USB_RTL8150=y
-CONFIG_USB_USBNET=y
-# CONFIG_USB_NET_AX8817X is not set
-# CONFIG_USB_NET_CDC_SUBSET is not set
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_SLIP=y
-CONFIG_SLIP_COMPRESSED=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-CONFIG_SERIAL_8250_RUNTIME_UARTS=3
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_OMAP_UWIRE=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_OMAP_WATCHDOG=y
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_VIRTUAL=y
-CONFIG_FB_OMAP=y
-CONFIG_FB_OMAP_LCDC_EXTERNAL=y
-CONFIG_FB_OMAP_LCDC_HWA742=y
-CONFIG_FB_OMAP_MANUAL_UPDATE=y
-CONFIG_FB_OMAP_LCD_MIPID=y
-CONFIG_FB_OMAP_BOOTLOADER_INIT=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_FONT_6x11=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_DUMMY=y
-CONFIG_SND_USB_AUDIO=y
-CONFIG_SND_SOC=y
-CONFIG_SND_OMAP_SOC=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_CONSOLE=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_TEST=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_OMAP=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_OMAP=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=866
-CONFIG_FAT_DEFAULT_IOCHARSET="koi8-r"
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_866=y
-CONFIG_NLS_CODEPAGE_1251=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_5=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_KOI8_R=y
-CONFIG_NLS_UTF8=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_PCBC=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_ZLIB=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
deleted file mode 100644
index bd07864f..00000000
--- a/arch/arm/configs/omap2plus_defconfig
+++ /dev/null
@@ -1,281 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_OMAP_RESET_CLOCKS=y
-CONFIG_OMAP_MUX_DEBUG=y
-CONFIG_ARCH_VEXPRESS_CA9X4=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_ARM_ERRATA_411920=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_LEDS=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_C_CAN=m
-CONFIG_CAN_C_CAN_PLATFORM=m
-CONFIG_BT=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIUART_LL=y
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_MAC80211_RC_DEFAULT_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_CMA=y
-CONFIG_CONNECTOR=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_OOPS=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_OMAP2=y
-CONFIG_MTD_ONENAND=y
-CONFIG_MTD_ONENAND_VERIFY_WRITE=y
-CONFIG_MTD_ONENAND_OMAP2=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_SENSORS_LIS3LV02D=m
-CONFIG_SENSORS_TSL2550=m
-CONFIG_SENSORS_LIS3_I2C=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_MD=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_SMSC911X=y
-CONFIG_KS8851=y
-CONFIG_KS8851_MLL=y
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_USB=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_LIBERTAS_DEBUG=y
-CONFIG_USB_USBNET=y
-CONFIG_USB_NET_SMSC95XX=y
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-CONFIG_USB_KC2190=y
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_MATRIX=m
-CONFIG_KEYBOARD_TWL4030=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_TWL4030_PWRBUTTON=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=32
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_OMAP24XX=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_TWL4030=y
-CONFIG_W1=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_SENSORS_LM75=m
-CONFIG_WATCHDOG=y
-CONFIG_OMAP_WATCHDOG=y
-CONFIG_TWL4030_WATCHDOG=y
-CONFIG_MFD_TPS65217=y
-CONFIG_MFD_TPS65910=y
-CONFIG_REGULATOR_TWL4030=y
-CONFIG_REGULATOR_TPS65023=y
-CONFIG_REGULATOR_TPS6507X=y
-CONFIG_REGULATOR_TPS65217=y
-CONFIG_REGULATOR_TPS65910=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FB_OMAP_LCD_VGA=y
-CONFIG_OMAP2_DSS=m
-CONFIG_OMAP2_DSS_RFBI=y
-CONFIG_OMAP2_DSS_SDI=y
-CONFIG_OMAP2_DSS_DSI=y
-CONFIG_FB_OMAP2=m
-CONFIG_PANEL_GENERIC_DPI=m
-CONFIG_PANEL_TFP410=m
-CONFIG_PANEL_SHARP_LS037V7DW01=m
-CONFIG_PANEL_NEC_NL8048HL11_01B=m
-CONFIG_PANEL_TAAL=m
-CONFIG_PANEL_TPO_TD043MTEA1=m
-CONFIG_PANEL_ACX565AKM=m
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_PLATFORM=y
-CONFIG_DISPLAY_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_VERBOSE_PRINTK=y
-CONFIG_SND_DEBUG=y
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_SOC=m
-CONFIG_SND_OMAP_SOC=m
-CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
-CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_MON=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_LIBUSUAL=y
-CONFIG_USB_TEST=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ZERO=m
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_MMC_OMAP=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_TWL92330=y
-CONFIG_RTC_DRV_TWL4030=y
-CONFIG_RTC_DRV_OMAP=y
-CONFIG_DMADEVICES=y
-CONFIG_DMA_OMAP=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=y
-CONFIG_QUOTA=y
-CONFIG_QFMT_V2=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_UBIFS_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_PROVE_LOCKING=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRC7=y
-CONFIG_LIBCRC32C=y
-CONFIG_SOC_OMAP5=y
-CONFIG_TI_DAVINCI_MDIO=y
-CONFIG_TI_DAVINCI_CPDMA=y
-CONFIG_TI_CPSW=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
deleted file mode 100644
index 952430d9..00000000
--- a/arch/arm/configs/orion5x_defconfig
+++ /dev/null
@@ -1,164 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_ARCH_ORION5X=y
-CONFIG_MACH_DB88F5281=y
-CONFIG_MACH_RD88F5182=y
-CONFIG_MACH_KUROBOX_PRO=y
-CONFIG_MACH_DNS323=y
-CONFIG_MACH_TS209=y
-CONFIG_MACH_TERASTATION_PRO2=y
-CONFIG_MACH_LINKSTATION_PRO=y
-CONFIG_MACH_LINKSTATION_MINI=y
-CONFIG_MACH_LINKSTATION_LS_HGL=y
-CONFIG_MACH_TS409=y
-CONFIG_MACH_WRT350N_V2=y
-CONFIG_MACH_TS78XX=y
-CONFIG_MACH_MV2120=y
-CONFIG_MACH_EDMINI_V2_DT=y
-CONFIG_MACH_D2NET=y
-CONFIG_MACH_BIGDISK=y
-CONFIG_MACH_NET2BIG=y
-CONFIG_MACH_MSS2=y
-CONFIG_MACH_WNR854T=y
-CONFIG_MACH_RD88F5181L_GE=y
-CONFIG_MACH_RD88F5181L_FXO=y
-CONFIG_MACH_RD88F6183AP_GE=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_FPE_NWFPE=y
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_NET_DSA=y
-CONFIG_NET_PKTGEN=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_MTD_NAND_ORION=y
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_ATA=y
-CONFIG_SATA_MV=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_NET_DSA_MV88E6131=y
-CONFIG_NET_DSA_MV88E6123_61_65=y
-CONFIG_MV643XX_ETH=y
-CONFIG_MARVELL_PHY=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_PCI is not set
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_HW_RANDOM_TIMERIOMEM=m
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_SENSORS_LM75=y
-# CONFIG_VGA_ARB is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_RS5C372=y
-CONFIG_RTC_DRV_PCF8563=y
-CONFIG_RTC_DRV_M41T80=y
-CONFIG_RTC_DRV_S35390A=y
-CONFIG_RTC_DRV_M48T86=y
-CONFIG_DMADEVICES=y
-CONFIG_MV_XOR=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_LATENCYTOP=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_MV_CESA=y
-CONFIG_CRC_T10DIF=y
diff --git a/arch/arm/configs/palmz72_defconfig b/arch/arm/configs/palmz72_defconfig
deleted file mode 100644
index 4baa83c1..00000000
--- a/arch/arm/configs/palmz72_defconfig
+++ /dev/null
@@ -1,85 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_ARCH_PXA_PALM=y
-# CONFIG_MACH_PALMTX is not set
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0"
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_PXA27x=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_PDA_POWER=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_DISPLAY_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_DEBUG=y
-CONFIG_MMC_PXA=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=866
-CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
-CONFIG_TMPFS=y
-# CONFIG_NETWORK_FILESYSTEMS is not set
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_866=y
-CONFIG_NLS_UTF8=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_CRC_T10DIF=y
diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig
deleted file mode 100644
index 2f136c30..00000000
--- a/arch/arm/configs/pcm027_defconfig
+++ /dev/null
@@ -1,102 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_PCM027=y
-CONFIG_MACH_PCM990_BASEBOARD=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_PXA=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-CONFIG_SND_PXA2XX_AC97=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_PXA=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PCF8563=m
-CONFIG_RTC_DRV_SA1100=m
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-# CONFIG_DNOTIFY is not set
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_CODEPAGE=850
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_DEFAULT="iso8859-15"
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig
deleted file mode 100644
index cb08cc56..00000000
--- a/arch/arm/configs/pleb_defconfig
+++ /dev/null
@@ -1,57 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_SHMEM is not set
-CONFIG_MODULES=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_PLEB=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySA0,9600 mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0400000,4M"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NLS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/configs/prima2_defconfig b/arch/arm/configs/prima2_defconfig
deleted file mode 100644
index 002a1cea..00000000
--- a/arch/arm/configs/prima2_defconfig
+++ /dev/null
@@ -1,70 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_ARCH_SIRF=y
-# CONFIG_SWP_EMULATE is not set
-CONFIG_SMP=y
-CONFIG_SCHED_MC=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_KEXEC=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM_RUNTIME=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_SIRFSOC=y
-CONFIG_SERIAL_SIRFSOC_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SIRF=y
-CONFIG_SPI=y
-CONFIG_SPI_SIRF=y
-CONFIG_SPI_SPIDEV=y
-# CONFIG_HWMON is not set
-CONFIG_USB_GADGET=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_DMADEVICES=y
-CONFIG_DMADEVICES_DEBUG=y
-CONFIG_DMADEVICES_VDEBUG=y
-CONFIG_SIRF_DMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_SECTION_MISMATCH=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_INFO=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
deleted file mode 100644
index 74d7e010..00000000
--- a/arch/arm/configs/pxa168_defconfig
+++ /dev/null
@@ -1,70 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_MMP=y
-CONFIG_MACH_ASPENITE=y
-CONFIG_MACH_ZYLONITE2=y
-CONFIG_MACH_AVENGERS_LITE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.2.100:/nfsroot/ ip=192.168.2.101:192.168.2.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/pxa255-idp_defconfig b/arch/arm/configs/pxa255-idp_defconfig
deleted file mode 100644
index 917a070b..00000000
--- a/arch/arm/configs/pxa255-idp_defconfig
+++ /dev/null
@@ -1,59 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MODULES=y
-CONFIG_ARCH_PXA=y
-CONFIG_ARCH_PXA_IDP=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs ip=dhcp console=ttyS0,115200 mem=64M"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_IDE=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/pxa3xx_defconfig b/arch/arm/configs/pxa3xx_defconfig
deleted file mode 100644
index 60e31383..00000000
--- a/arch/arm/configs/pxa3xx_defconfig
+++ /dev/null
@@ -1,133 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=18
-CONFIG_SYSFS_DEPRECATED_V2=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_KALLSYMS_ALL=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_LITTLETON=y
-CONFIG_MACH_TAVOREVB=y
-CONFIG_MACH_SAAR=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=64M debug"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PXA3xx=y
-CONFIG_MTD_NAND_PXA3xx_BUILTIN=y
-CONFIG_MTD_ONENAND=y
-CONFIG_MTD_ONENAND_VERIFY_WRITE=y
-CONFIG_MTD_ONENAND_GENERIC=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_PXA27x=y
-CONFIG_KEYBOARD_PXA930_ROTARY=y
-CONFIG_MOUSE_PXA930_TRKBALL=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_GPIO_MAX732X=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_GPIO_PCF857X=y
-CONFIG_GPIO_MAX7301=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_POWER_SUPPLY_DEBUG=y
-CONFIG_PDA_POWER=y
-CONFIG_BATTERY_DA9030=y
-# CONFIG_HWMON is not set
-CONFIG_PMIC_DA903X=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DEBUG=y
-CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
-CONFIG_REGULATOR_DA903X=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_TDO24M=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_DA903X=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_6x11=y
-CONFIG_LOGO=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_PXA=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_DA903X=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
-CONFIG_LEDS_TRIGGER_BACKLIGHT=m
-CONFIG_LEDS_TRIGGER_GPIO=m
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SHIRQ=y
-CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig
deleted file mode 100644
index 3bb7771d..00000000
--- a/arch/arm/configs/pxa910_defconfig
+++ /dev/null
@@ -1,80 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_MMP=y
-CONFIG_MACH_TAVOREVB=y
-CONFIG_MACH_TTC_DKB=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.2.100:/nfsroot/ ip=192.168.2.101:192.168.2.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M earlyprintk"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_FB=y
-CONFIG_MMP_DISP=y
-CONFIG_MMP_DISP_CONTROLLER=y
-CONFIG_MMP_SPI=y
-CONFIG_MMP_PANEL_TPOHVGA=y
-CONFIG_MMP_FB=y
-CONFIG_LOGO=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_MMP_UART2=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/raumfeld_defconfig b/arch/arm/configs/raumfeld_defconfig
deleted file mode 100644
index f7caa909..00000000
--- a/arch/arm/configs/raumfeld_defconfig
+++ /dev/null
@@ -1,208 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_RAUMFELD_RC=y
-CONFIG_MACH_RAUMFELD_CONNECTOR=y
-CONFIG_MACH_RAUMFELD_SPEAKER=y
-CONFIG_NO_HZ=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_CMDLINE="console=ttyS0,115200 rw"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_IDLE=y
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-CONFIG_CFG80211=y
-CONFIG_CFG80211_REG_DEBUG=y
-CONFIG_MAC80211=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_NFTL=y
-CONFIG_NFTL_RW=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PXA3xx=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_ISL29003=y
-CONFIG_TI_DAC7512=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_LIBERTAS=y
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_USB_USBNET=y
-# CONFIG_USB_NET_AX8817X is not set
-# CONFIG_USB_NET_NET1080 is not set
-CONFIG_USB_NET_MCS7830=y
-# CONFIG_USB_NET_CDC_SUBSET is not set
-# CONFIG_USB_NET_ZAURUS is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_EETI=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_DEBUG=y
-CONFIG_SPI_GPIO=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_W1_MASTER_GPIO=m
-CONFIG_POWER_SUPPLY=y
-CONFIG_PDA_POWER=y
-CONFIG_BATTERY_DS2760=m
-CONFIG_SENSORS_LIS3_SPI=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DEBUG=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_MAX8660=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_PXA2XX_SOC=y
-CONFIG_SND_SOC_RAUMFELD=y
-CONFIG_HID_DRAGONRISE=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_TWINHAN=y
-CONFIG_HID_NTRIG=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_HID_GREENASIA=y
-CONFIG_HID_SMARTJOYPLUS=y
-CONFIG_HID_TOPSEED=y
-CONFIG_HID_THRUSTMASTER=y
-CONFIG_HID_ZEROPLUS=y
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_MMC=y
-CONFIG_MMC_PXA=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_LT3593=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PXA=y
-CONFIG_DMADEVICES=y
-CONFIG_UIO=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_FSCACHE=y
-CONFIG_FSCACHE_STATS=y
-CONFIG_CACHEFILES=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFS_FSCACHE=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=y
-CONFIG_NLS_CODEPAGE_775=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_855=y
-CONFIG_NLS_CODEPAGE_857=y
-CONFIG_NLS_CODEPAGE_860=y
-CONFIG_NLS_CODEPAGE_861=y
-CONFIG_NLS_CODEPAGE_862=y
-CONFIG_NLS_CODEPAGE_863=y
-CONFIG_NLS_CODEPAGE_864=y
-CONFIG_NLS_CODEPAGE_865=y
-CONFIG_NLS_CODEPAGE_866=y
-CONFIG_NLS_CODEPAGE_869=y
-CONFIG_NLS_CODEPAGE_936=y
-CONFIG_NLS_CODEPAGE_950=y
-CONFIG_NLS_CODEPAGE_932=y
-CONFIG_NLS_CODEPAGE_949=y
-CONFIG_NLS_CODEPAGE_874=y
-CONFIG_NLS_ISO8859_8=y
-CONFIG_NLS_CODEPAGE_1250=y
-CONFIG_NLS_CODEPAGE_1251=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_3=y
-CONFIG_NLS_ISO8859_4=y
-CONFIG_NLS_ISO8859_5=y
-CONFIG_NLS_ISO8859_6=y
-CONFIG_NLS_ISO8859_7=y
-CONFIG_NLS_ISO8859_9=y
-CONFIG_NLS_ISO8859_13=y
-CONFIG_NLS_ISO8859_14=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_KOI8_R=y
-CONFIG_NLS_KOI8_U=y
-CONFIG_NLS_UTF8=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig
deleted file mode 100644
index abe61bf3..00000000
--- a/arch/arm/configs/realview-smp_defconfig
+++ /dev/null
@@ -1,101 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_REALVIEW=y
-CONFIG_MACH_REALVIEW_EB=y
-CONFIG_REALVIEW_EB_ARM11MP=y
-CONFIG_MACH_REALVIEW_PB11MP=y
-CONFIG_SMP=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_ARM_CHARLCD=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_VERSATILE=y
-CONFIG_SPI=y
-CONFIG_GPIOLIB=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_DRIVERS is not set
-CONFIG_SND_ARMAACI=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig
deleted file mode 100644
index 7079cbe8..00000000
--- a/arch/arm/configs/realview_defconfig
+++ /dev/null
@@ -1,100 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_REALVIEW=y
-CONFIG_MACH_REALVIEW_EB=y
-CONFIG_REALVIEW_EB_ARM11MP=y
-CONFIG_MACH_REALVIEW_PB11MP=y
-CONFIG_MACH_REALVIEW_PB1176=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
-CONFIG_VFP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_ARM_CHARLCD=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_VERSATILE=y
-CONFIG_SPI=y
-CONFIG_GPIOLIB=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_DRIVERS is not set
-CONFIG_SND_ARMAACI=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/rpc_defconfig b/arch/arm/configs/rpc_defconfig
deleted file mode 100644
index 00515ef9..00000000
--- a/arch/arm/configs/rpc_defconfig
+++ /dev/null
@@ -1,133 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_RPC=y
-CONFIG_CPU_SA110=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-CONFIG_PARPORT=y
-CONFIG_PARPORT_PC=y
-CONFIG_PARPORT_PC_FIFO=y
-CONFIG_BLK_DEV_FD=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_ARXESCSI=m
-CONFIG_SCSI_CUMANA_2=m
-CONFIG_SCSI_EESOXSCSI=m
-CONFIG_SCSI_POWERTECSCSI=y
-CONFIG_SCSI_CUMANA_1=m
-CONFIG_SCSI_OAK1=m
-CONFIG_ATA=y
-CONFIG_PATA_ICSIDE=y
-CONFIG_PATA_PLATFORM=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_ARM_ETHER1=y
-CONFIG_ARM_ETHER3=y
-CONFIG_ARM_ETHERH=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_PPP=m
-CONFIG_PPPOE=m
-CONFIG_INPUT_EVDEV=y
-# CONFIG_MOUSE_PS2 is not set
-CONFIG_MOUSE_RISCPC=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=16
-CONFIG_SERIAL_8250_RUNTIME_UARTS=8
-CONFIG_SERIAL_8250_ACORN=y
-CONFIG_LEGACY_PTY_COUNT=64
-CONFIG_PRINTER=m
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ACORN=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x16=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SOUND_PRIME=m
-CONFIG_SOUND_OSS=m
-CONFIG_SOUND_VIDC=m
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PCF8583=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_ADFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION_CUMANA is not set
-# CONFIG_ACORN_PARTITION_EESOX is not set
-CONFIG_BSD_DISKLABEL=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
deleted file mode 100644
index 193448f3..00000000
--- a/arch/arm/configs/s3c2410_defconfig
+++ /dev/null
@@ -1,468 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=m
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_ARCH_S3C24XX=y
-CONFIG_S3C_BOOT_ERROR_RESET=y
-CONFIG_S3C_ADC=y
-CONFIG_S3C24XX_PWM=y
-CONFIG_CPU_S3C2412=y
-CONFIG_CPU_S3C2416=y
-CONFIG_CPU_S3C2440=y
-CONFIG_CPU_S3C2442=y
-CONFIG_CPU_S3C2443=y
-CONFIG_MACH_AML_M5900=y
-CONFIG_ARCH_BAST=y
-CONFIG_ARCH_H1940=y
-CONFIG_MACH_N30=y
-CONFIG_MACH_OTOM=y
-CONFIG_MACH_QT2410=y
-CONFIG_ARCH_SMDK2410=y
-CONFIG_MACH_TCT_HAMMER=y
-CONFIG_MACH_VR1000=y
-CONFIG_MACH_JIVE=y
-CONFIG_MACH_SMDK2412=y
-CONFIG_MACH_VSTMS=y
-CONFIG_MACH_SMDK2416=y
-CONFIG_MACH_ANUBIS=y
-CONFIG_MACH_AT2440EVB=y
-CONFIG_MACH_MINI2440=y
-CONFIG_MACH_NEXCODER_2440=y
-CONFIG_MACH_OSIRIS=y
-CONFIG_MACH_OSIRIS_DVS=m
-CONFIG_MACH_RX3715=y
-CONFIG_ARCH_S3C2440=y
-CONFIG_MACH_NEO1973_GTA02=y
-CONFIG_MACH_RX1950=y
-CONFIG_SMDK2440_CPU2442=y
-CONFIG_MACH_SMDK2443=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0"
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_APM_EMULATION=m
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPIP=m
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
-# CONFIG_INET_LRO is not set
-CONFIG_TCP_CONG_ADVANCED=y
-CONFIG_TCP_CONG_HSTCP=m
-CONFIG_TCP_CONG_HYBLA=m
-CONFIG_TCP_CONG_SCALABLE=m
-CONFIG_TCP_CONG_LP=m
-CONFIG_TCP_CONG_VENO=m
-CONFIG_TCP_CONG_YEAH=m
-CONFIG_TCP_CONG_ILLINOIS=m
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_DCCP=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_IP_VS=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_TARGET_LOG=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIUART_LL=y
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_HCIVHCI=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_MESH=y
-CONFIG_MAC80211_LEDS=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_ROM=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_S3C2410=y
-CONFIG_PARPORT=y
-CONFIG_PARPORT_PC=m
-CONFIG_PARPORT_AX88796=m
-CONFIG_PARPORT_1284=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_UB=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_ATA_OVER_ETH=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_IDETAPE=m
-CONFIG_BLK_DEV_PLATFORM=y
-CONFIG_SCSI=y
-CONFIG_SCSI_TGT=m
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_DM9000=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_MOUSE_APPLETOUCH=m
-CONFIG_MOUSE_BCM5974=m
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_JOYSTICK_ANALOG=m
-CONFIG_JOYSTICK_A3D=m
-CONFIG_JOYSTICK_ADI=m
-CONFIG_JOYSTICK_COBRA=m
-CONFIG_JOYSTICK_GF2K=m
-CONFIG_JOYSTICK_GRIP=m
-CONFIG_JOYSTICK_GRIP_MP=m
-CONFIG_JOYSTICK_GUILLEMOT=m
-CONFIG_JOYSTICK_INTERACT=m
-CONFIG_JOYSTICK_SIDEWINDER=m
-CONFIG_JOYSTICK_TMDC=m
-CONFIG_JOYSTICK_IFORCE=m
-CONFIG_JOYSTICK_MAGELLAN=m
-CONFIG_JOYSTICK_SPACEORB=m
-CONFIG_JOYSTICK_SPACEBALL=m
-CONFIG_JOYSTICK_STINGER=m
-CONFIG_JOYSTICK_TWIDJOY=m
-CONFIG_JOYSTICK_ZHENHUA=m
-CONFIG_JOYSTICK_DB9=m
-CONFIG_JOYSTICK_GAMECON=m
-CONFIG_JOYSTICK_TURBOGRAFX=m
-CONFIG_JOYSTICK_JOYDUMP=m
-CONFIG_JOYSTICK_XPAD=m
-CONFIG_JOYSTICK_XPAD_FF=y
-CONFIG_JOYSTICK_XPAD_LEDS=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_ATI_REMOTE2=m
-CONFIG_INPUT_KEYSPAN_REMOTE=m
-CONFIG_INPUT_POWERMATE=m
-CONFIG_INPUT_YEALINK=m
-CONFIG_INPUT_CM109=m
-CONFIG_INPUT_UINPUT=m
-CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
-CONFIG_SERIAL_NONSTANDARD=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=8
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_PRINTER=y
-CONFIG_PPDEV=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_S3C2410=y
-CONFIG_I2C_SIMTEC=y
-CONFIG_SPI=y
-CONFIG_SPI_GPIO=m
-CONFIG_SPI_S3C24XX=m
-CONFIG_SPI_SPIDEV=m
-CONFIG_SPI_TLE62X0=m
-CONFIG_SENSORS_LM75=m
-CONFIG_SENSORS_LM78=m
-CONFIG_SENSORS_LM85=m
-CONFIG_WATCHDOG=y
-CONFIG_S3C2410_WATCHDOG=y
-CONFIG_MFD_SM501=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_S3C2410=y
-CONFIG_FB_SM501=y
-CONFIG_BACKLIGHT_PWM=m
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_VERBOSE_PRINTK=y
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_USB_CAIAQ=m
-CONFIG_SND_SOC=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_WDM=m
-CONFIG_USB_STORAGE=m
-CONFIG_USB_STORAGE_DATAFAB=m
-CONFIG_USB_STORAGE_FREECOM=m
-CONFIG_USB_STORAGE_ISD200=m
-CONFIG_USB_STORAGE_USBAT=m
-CONFIG_USB_STORAGE_SDDR09=m
-CONFIG_USB_STORAGE_SDDR55=m
-CONFIG_USB_STORAGE_JUMPSHOT=m
-CONFIG_USB_STORAGE_ALAUDA=m
-CONFIG_USB_STORAGE_ONETOUCH=m
-CONFIG_USB_STORAGE_KARMA=m
-CONFIG_USB_STORAGE_CYPRESS_ATACB=m
-CONFIG_USB_LIBUSUAL=y
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_USS720=m
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_NAVMAN=m
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_SERIAL_OPTION=m
-CONFIG_USB_EMI62=m
-CONFIG_USB_EMI26=m
-CONFIG_USB_ADUTUX=m
-CONFIG_USB_SEVSEG=m
-CONFIG_USB_RIO500=m
-CONFIG_USB_LEGOTOWER=m
-CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
-CONFIG_USB_CYPRESS_CY7C63=m
-CONFIG_USB_CYTHERM=m
-CONFIG_USB_IDMOUSE=m
-CONFIG_USB_FTDI_ELAN=m
-CONFIG_USB_APPLEDISPLAY=m
-CONFIG_USB_LD=m
-CONFIG_USB_TRANCEVIBRATOR=m
-CONFIG_USB_IOWARRIOR=m
-CONFIG_USB_TEST=m
-CONFIG_MMC=y
-CONFIG_SDIO_UART=m
-CONFIG_MMC_TEST=m
-CONFIG_MMC_SDHCI=m
-CONFIG_MMC_SPI=m
-CONFIG_MMC_S3C=y
-CONFIG_LEDS_S3C24XX=m
-CONFIG_LEDS_PCA9532=m
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_PCA955X=m
-CONFIG_LEDS_DAC124S085=m
-CONFIG_LEDS_PWM=m
-CONFIG_LEDS_BD2802=m
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
-CONFIG_LEDS_TRIGGER_GPIO=m
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_S3C=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT4_FS=m
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_FUSE_FS=m
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=m
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_CRAMFS=y
-CONFIG_SQUASHFS=m
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_CIFS=m
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
deleted file mode 100644
index 3a186d65..00000000
--- a/arch/arm/configs/s3c6400_defconfig
+++ /dev/null
@@ -1,96 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S3C64XX=y
-CONFIG_S3C_BOOT_ERROR_RESET=y
-CONFIG_MACH_SMDK6400=y
-CONFIG_MACH_ANW6410=y
-CONFIG_MACH_MINI6410=y
-CONFIG_MACH_REAL6410=y
-CONFIG_MACH_SMDK6410=y
-CONFIG_MACH_NCP=y
-CONFIG_MACH_HMT=y
-CONFIG_MACH_SMARTQ5=y
-CONFIG_MACH_SMARTQ7=y
-CONFIG_MACH_WLF_CRAGG_6410=y
-CONFIG_CPU_32v6K=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144"
-CONFIG_VFP=y
-CONFIG_PM=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_S3C2410=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_EEPROM_AT24=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_S3C2410=y
-CONFIG_SPI=y
-CONFIG_SPI_GPIO=m
-CONFIG_SPI_S3C64XX=m
-CONFIG_FB=y
-CONFIG_FB_S3C=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_LTV350QV=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SOC=m
-CONFIG_SND_S3C24XX_SOC=m
-CONFIG_SND_SOC_SMDK_WM9713=m
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_MMC=y
-CONFIG_MMC_DEBUG=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_S3C=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_S3C=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/s5p64x0_defconfig b/arch/arm/configs/s5p64x0_defconfig
deleted file mode 100644
index ad6b61b0..00000000
--- a/arch/arm/configs/s5p64x0_defconfig
+++ /dev/null
@@ -1,68 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5P64X0=y
-CONFIG_S3C_BOOT_ERROR_RESET=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDK6440=y
-CONFIG_MACH_SMDK6450=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_CPU_32v6K=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-CONFIG_DISPLAY_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/s5pc100_defconfig b/arch/arm/configs/s5pc100_defconfig
deleted file mode 100644
index 41bafc94..00000000
--- a/arch/arm/configs/s5pc100_defconfig
+++ /dev/null
@@ -1,49 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5PC100=y
-CONFIG_MACH_SMDKC100=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M"
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_EEPROM_AT24=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_MMC=y
-CONFIG_MMC_DEBUG=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_SDHCI=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
deleted file mode 100644
index fa989902..00000000
--- a/arch/arm/configs/s5pv210_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5PV210=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_S3C_DEV_FB=y
-CONFIG_S5PV210_SETUP_FB_24BPP=y
-CONFIG_MACH_AQUILA=y
-CONFIG_MACH_GONI=y
-CONFIG_MACH_SMDKC110=y
-CONFIG_MACH_SMDKV210=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_VMSPLIT_2G=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/shannon_defconfig b/arch/arm/configs/shannon_defconfig
deleted file mode 100644
index b0b96942..00000000
--- a/arch/arm/configs/shannon_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SHANNON=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySA0,9600 console=tty1 root=/dev/mtdblock2 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_IDE=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_PCMCIA_SMC91C92=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_MINIX_FS=y
-CONFIG_NFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/shark_defconfig b/arch/arm/configs/shark_defconfig
deleted file mode 100644
index e319b2c5..00000000
--- a/arch/arm/configs/shark_defconfig
+++ /dev/null
@@ -1,80 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_SHARK=y
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_PARPORT=m
-CONFIG_PARPORT_PC=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_CS89x0=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_PRINTER=m
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_CYBER2000=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-CONFIG_SOUND_PRIME=m
-CONFIG_SOUND_OSS=m
-CONFIG_SOUND_SB=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_CMOS=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFSD=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig
deleted file mode 100644
index d3358155..00000000
--- a/arch/arm/configs/simpad_defconfig
+++ /dev/null
@@ -1,111 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="oe1"
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_MODULES=y
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SIMPAD=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_PREEMPT=y
-CONFIG_LEDS=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mtdparts=sa1100:512k(boot),1m(kernel),-(root) console=ttySA0 root=1f02 noinitrd mem=64M jffs2_orphaned_inodes=delete rootfstype=jffs2"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRTTY_SIR=m
-CONFIG_SA1100_FIR=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-CONFIG_PCMCIA_3C574=m
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PCMCIA_SMC91C92=m
-CONFIG_PCMCIA_XIRC2PS=m
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPPOE=m
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO=m
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_FB=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
deleted file mode 100644
index 4e1ce211..00000000
--- a/arch/arm/configs/socfpga_defconfig
+++ /dev/null
@@ -1,84 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_CPUSETS=y
-CONFIG_NAMESPACES=y
-CONFIG_EMBEDDED=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SOCFPGA=y
-CONFIG_MACH_SOCFPGA_CYCLONE5=y
-CONFIG_ARM_THUMBEE=y
-# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE=""
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_STMMAC_ETH=y
-# CONFIG_STMMAC_PHY_ID_ZERO_WORKAROUND is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_DW=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=y
-CONFIG_NTFS_RW=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_ENABLE_DEFAULT_TRACERS=y
-CONFIG_DEBUG_USER=y
-CONFIG_XZ_DEC=y
diff --git a/arch/arm/configs/spear13xx_defconfig b/arch/arm/configs/spear13xx_defconfig
deleted file mode 100644
index 1fdb8269..00000000
--- a/arch/arm/configs/spear13xx_defconfig
+++ /dev/null
@@ -1,95 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_PLAT_SPEAR=y
-CONFIG_ARCH_SPEAR13XX=y
-CONFIG_MACH_SPEAR1310=y
-CONFIG_MACH_SPEAR1340=y
-# CONFIG_SWP_EMULATE is not set
-CONFIG_SMP=y
-# CONFIG_SMP_ON_UP is not set
-# CONFIG_ARM_CPU_TOPOLOGY is not set
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_OF_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSMC=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_ATA=y
-# CONFIG_SATA_PMP is not set
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_PATA_ARASAN_CF=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-CONFIG_STMMAC_ETH=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_SPEAR=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_RAW_DRIVER=y
-CONFIG_MAX_RAW_DEVS=8192
-CONFIG_I2C=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PL061=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_MPCORE_WATCHDOG=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SPEAR=y
-CONFIG_RTC_CLASS=y
-CONFIG_DMADEVICES=y
-CONFIG_DW_DMAC=y
-CONFIG_DMATEST=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_INFO=y
diff --git a/arch/arm/configs/spear3xx_defconfig b/arch/arm/configs/spear3xx_defconfig
deleted file mode 100644
index 865980c5..00000000
--- a/arch/arm/configs/spear3xx_defconfig
+++ /dev/null
@@ -1,87 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_PLAT_SPEAR=y
-CONFIG_MACH_SPEAR300=y
-CONFIG_MACH_SPEAR310=y
-CONFIG_MACH_SPEAR320=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_OF_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSMC=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-CONFIG_STMMAC_ETH=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_SPEAR=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_RAW_DRIVER=y
-CONFIG_MAX_RAW_DEVS=8192
-CONFIG_I2C=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PL061=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_ARM_SP805_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SPEAR=y
-CONFIG_RTC_CLASS=y
-CONFIG_DMADEVICES=y
-CONFIG_AMBA_PL08X=y
-CONFIG_DMATEST=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_INFO=y
diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
deleted file mode 100644
index a2a1265f..00000000
--- a/arch/arm/configs/spear6xx_defconfig
+++ /dev/null
@@ -1,77 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_PLAT_SPEAR=y
-CONFIG_ARCH_SPEAR6XX=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_OF_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSMC=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-CONFIG_STMMAC_ETH=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_RAW_DRIVER=y
-CONFIG_MAX_RAW_DEVS=8192
-CONFIG_I2C=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PL061=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_ARM_SP805_WATCHDOG=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_RTC_CLASS=y
-CONFIG_DMADEVICES=y
-CONFIG_AMBA_PL08X=y
-CONFIG_DMATEST=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_INFO=y
diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig
deleted file mode 100644
index 2e0419d1..00000000
--- a/arch/arm/configs/spitz_defconfig
+++ /dev/null
@@ -1,274 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_PXA=y
-CONFIG_PXA_SHARPSL=y
-CONFIG_MACH_AKITA=y
-CONFIG_MACH_BORZOI=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_PXA2XX=y
-CONFIG_PREEMPT=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 debug"
-CONFIG_FPE_NWFPE=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_PXA_FICP=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_HCIDTL1=m
-CONFIG_BT_HCIBT3C=m
-CONFIG_BT_HCIBLUECARD=m
-CONFIG_BT_HCIBTUART=m
-CONFIG_BT_HCIVHCI=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_ROM=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_SHARPSL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_RTL8150=m
-CONFIG_USB_USBNET=m
-# CONFIG_USB_NET_CDC_SUBSET is not set
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_INPUT_FF_MEMLESS=m
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_8250_CS=m
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_FB=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_CORGI=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-CONFIG_HID_A4TECH=m
-CONFIG_HID_APPLE=m
-CONFIG_HID_BELKIN=m
-CONFIG_HID_CHERRY=m
-CONFIG_HID_CHICONY=m
-CONFIG_HID_CYPRESS=m
-CONFIG_HID_EZKEY=m
-CONFIG_HID_GYRATION=m
-CONFIG_HID_LOGITECH=m
-CONFIG_HID_MICROSOFT=m
-CONFIG_HID_MONTEREY=m
-CONFIG_HID_PANTHERLORD=m
-CONFIG_HID_PETALYNX=m
-CONFIG_HID_SAMSUNG=m
-CONFIG_HID_SONY=m
-CONFIG_HID_SUNPLUS=m
-CONFIG_USB=m
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=m
-CONFIG_USB_OHCI_HCD=m
-CONFIG_USB_SL811_HCD=m
-CONFIG_USB_SL811_CS=m
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=m
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_CYPRESS_M8=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IPAQ=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_EDGEPORT_TI=m
-CONFIG_USB_SERIAL_GARMIN=m
-CONFIG_USB_SERIAL_IPW=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_KLSI=m
-CONFIG_USB_SERIAL_KOBIL_SCT=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_SAFE=m
-CONFIG_USB_SERIAL_TI=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_XIRCOM=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_USB_EMI62=m
-CONFIG_USB_EMI26=m
-CONFIG_USB_RIO500=m
-CONFIG_USB_LEGOTOWER=m
-CONFIG_USB_LCD=m
-CONFIG_USB_LED=m
-CONFIG_USB_CYTHERM=m
-CONFIG_USB_IDMOUSE=m
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_DUMMY_HCD=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_MMC=y
-CONFIG_MMC_PXA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_SMB_FS=m
-CONFIG_SMB_NLS_DEFAULT=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
-CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig
deleted file mode 100644
index 71277a15..00000000
--- a/arch/arm/configs/tct_hammer_defconfig
+++ /dev/null
@@ -1,70 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_BUGVERBOSE is not set
-# CONFIG_ELF_CORE is not set
-# CONFIG_SHMEM is not set
-CONFIG_SLOB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S3C24XX=y
-CONFIG_MACH_TCT_HAMMER=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M root=/dev/ram0 init=/linuxrc rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=10240
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_S3C2410=y
-CONFIG_USB_ETH=m
-CONFIG_EXT2_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_SYSCTL is not set
-CONFIG_JFFS2_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
deleted file mode 100644
index aba4881d..00000000
--- a/arch/arm/configs/tegra_defconfig
+++ /dev/null
@@ -1,252 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_DEBUG=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_ELF_CORE is not set
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_TEGRA=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_ARCH_TEGRA_2x_SOC=y
-CONFIG_ARCH_TEGRA_3x_SOC=y
-CONFIG_TEGRA_PCI=y
-CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA=y
-CONFIG_TEGRA_EMC_SCALING_ENABLE=y
-CONFIG_SMP=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_INET_ESP=y
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=y
-CONFIG_INET6_ESP=y
-CONFIG_INET6_IPCOMP=y
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_TUNNEL=y
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_BT=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_HIDP=y
-CONFIG_BT_HCIBTUSB=m
-CONFIG_CFG80211=y
-CONFIG_MAC80211=y
-CONFIG_RFKILL=y
-CONFIG_RFKILL_INPUT=y
-CONFIG_RFKILL_GPIO=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_CMA=y
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_M25P80=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_AD525X_DPOT=y
-CONFIG_AD525X_DPOT_I2C=y
-CONFIG_ICS932S401=y
-CONFIG_APDS9802ALS=y
-CONFIG_ISL29003=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_R8169=y
-CONFIG_USB_PEGASUS=y
-CONFIG_USB_USBNET=y
-CONFIG_USB_NET_SMSC75XX=y
-CONFIG_USB_NET_SMSC95XX=y
-CONFIG_BRCMFMAC=m
-CONFIG_RT2X00=y
-CONFIG_RT2800USB=m
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_TEGRA=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_MPU3050=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_TEGRA=y
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_MUX=y
-CONFIG_I2C_MUX_PINCTRL=y
-CONFIG_I2C_TEGRA=y
-CONFIG_SPI=y
-CONFIG_SPI_TEGRA20_SFLASH=y
-CONFIG_SPI_TEGRA20_SLINK=y
-CONFIG_GPIO_PCA953X_IRQ=y
-CONFIG_GPIO_TPS6586X=y
-CONFIG_GPIO_TPS65910=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_BATTERY_SBS=y
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_SENSORS_LM90=y
-CONFIG_MFD_TPS6586X=y
-CONFIG_MFD_TPS65910=y
-CONFIG_MFD_MAX8907=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
-CONFIG_REGULATOR_GPIO=y
-CONFIG_REGULATOR_MAX8907=y
-CONFIG_REGULATOR_TPS62360=y
-CONFIG_REGULATOR_TPS6586X=y
-CONFIG_REGULATOR_TPS65910=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_DRM=y
-CONFIG_DRM_TEGRA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_TEGRA=y
-CONFIG_SND_SOC_TEGRA_WM8753=y
-CONFIG_SND_SOC_TEGRA_WM8903=y
-CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
-CONFIG_SND_SOC_TEGRA_ALC5632=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_TEGRA=y
-CONFIG_USB_ACM=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK_MINORS=16
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_TEGRA=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_DRV_MAX8907=y
-CONFIG_RTC_DRV_TPS6586X=y
-CONFIG_RTC_DRV_TPS65910=y
-CONFIG_RTC_DRV_EM3027=y
-CONFIG_RTC_DRV_TEGRA=y
-CONFIG_DMADEVICES=y
-CONFIG_TEGRA20_APB_DMA=y
-CONFIG_STAGING=y
-CONFIG_SENSORS_ISL29018=y
-CONFIG_SENSORS_ISL29028=y
-CONFIG_SENSORS_AK8975=y
-CONFIG_MFD_NVEC=y
-CONFIG_KEYBOARD_NVEC=y
-CONFIG_SERIO_NVEC_PS2=y
-CONFIG_NVEC_POWER=y
-CONFIG_NVEC_PAZ00=y
-CONFIG_TEGRA_IOMMU_GART=y
-CONFIG_TEGRA_IOMMU_SMMU=y
-CONFIG_MEMORY=y
-CONFIG_IIO=y
-CONFIG_PWM=y
-CONFIG_PWM_TEGRA=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_LZO=y
-CONFIG_SQUASHFS_XZ=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_SLAB=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_VM=y
-CONFIG_DEBUG_SG=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_TEGRA_AES=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig
deleted file mode 100644
index 3162173f..00000000
--- a/arch/arm/configs/trizeps4_defconfig
+++ /dev/null
@@ -1,226 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_ARCH_PXA=y
-CONFIG_TRIZEPS_PXA=y
-CONFIG_MACH_TRIZEPS4=y
-CONFIG_PCCARD=y
-# CONFIG_PCMCIA_LOAD_CIS is not set
-CONFIG_PCMCIA_PXA2XX=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=fe01 console=ttyS0,38400n8 loglevel=5"
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_IRTTY_SIR=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_CFG80211=y
-CONFIG_CONNECTOR=y
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_LE_BYTE_SWAP=y
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_DOC2000=y
-CONFIG_MTD_DOC2001=y
-CONFIG_MTD_DOC2001PLUS=y
-CONFIG_MTD_DOCPROBE_ADVANCED=y
-CONFIG_MTD_DOCPROBE_ADDRESS=0x4000000
-CONFIG_MTD_DOCPROBE_HIGH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_DISKONCHIP=y
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000
-CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y
-CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
-CONFIG_MTD_ONENAND=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=8
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_ATA=m
-CONFIG_PATA_PCMCIA=m
-CONFIG_PATA_PLATFORM=m
-CONFIG_NETDEVICES=y
-CONFIG_PHYLIB=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-CONFIG_HOSTAP=y
-CONFIG_HOSTAP_FIRMWARE=y
-CONFIG_HOSTAP_FIRMWARE_NVRAM=y
-CONFIG_HOSTAP_CS=y
-CONFIG_HERMES=y
-CONFIG_PCMCIA_HERMES=y
-CONFIG_PCMCIA_SPECTRUM=y
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_MPPE=m
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_ATKBD=m
-# CONFIG_MOUSE_PS2 is not set
-CONFIG_MOUSE_SERIAL=m
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_PXA=y
-CONFIG_I2C_PXA_SLAVE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_PXA=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-CONFIG_SND_VERBOSE_PRINTK=y
-CONFIG_SND_DEBUG=y
-CONFIG_SND_PXA2XX_AC97=y
-CONFIG_SND_USB_AUDIO=m
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_DUMMY_HCD=y
-CONFIG_MMC=y
-CONFIG_MMC_PXA=y
-CONFIG_NEW_LEDS=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_RTC_DRV_PCF8583=m
-CONFIG_RTC_DRV_SA1100=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V4=y
-CONFIG_SMB_FS=m
-CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_LDM_PARTITION=y
-CONFIG_NLS_DEFAULT="iso8859-15"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_USER=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRC_CCITT=y
-CONFIG_CRC16=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
deleted file mode 100644
index 374000ec..00000000
--- a/arch/arm/configs/u300_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_AIO is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_U300=y
-CONFIG_MACH_U300=y
-CONFIG_MACH_U300_BS335=y
-CONFIG_MACH_U300_SPIDUMMY=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
-CONFIG_CPU_IDLE=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_SUSPEND is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSMC=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_FB=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_CLKGATE=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_RTC_DRV_COH901331=y
-CONFIG_DMADEVICES=y
-CONFIG_COH901318=y
-# CONFIG_DNOTIFY is not set
-CONFIG_FUSE_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
deleted file mode 100644
index 426270fe..00000000
--- a/arch/arm/configs/u8500_defconfig
+++ /dev/null
@@ -1,122 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_U8500=y
-CONFIG_MACH_HREFV60=y
-CONFIG_MACH_SNOWBALL=y
-CONFIG_MACH_U5500=y
-CONFIG_MACH_UX500_DT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_NETFILTER=y
-CONFIG_PHONET=y
-# CONFIG_WIRELESS is not set
-CONFIG_CAIF=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_AB8500_PWM=y
-CONFIG_SENSORS_BH1780=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC911X=y
-CONFIG_SMSC_PHY=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_NOMADIK=y
-CONFIG_KEYBOARD_STMPE=y
-CONFIG_KEYBOARD_TC3589X=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_BU21013=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_AB8500_PONKEY=y
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_NOMADIK=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_GPIO_STMPE=y
-CONFIG_GPIO_TC3589X=y
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_AB8500_BM is not set
-# CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL is not set
-CONFIG_THERMAL=y
-CONFIG_CPU_THERMAL=y
-CONFIG_MFD_STMPE=y
-CONFIG_MFD_TC3589X=y
-CONFIG_AB5500_CORE=y
-CONFIG_AB8500_CORE=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_AB8500=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_GPIO=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB_GADGET=y
-CONFIG_AB8500_USB=y
-CONFIG_MMC=y
-CONFIG_MMC_CLKGATE=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_LM3530=y
-CONFIG_LEDS_LP5521=y
-CONFIG_LEDS_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AB8500=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_DMADEVICES=y
-CONFIG_STE_DMA40=y
-CONFIG_STAGING=y
-CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
-CONFIG_HSEM_U8500=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=m
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig
deleted file mode 100644
index 2ba9e63d..00000000
--- a/arch/arm/configs/versatile_defconfig
+++ /dev/null
@@ -1,85 +0,0 @@
-CONFIG_ARCH_VERSATILE=y
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MACH_VERSATILE_AB=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=1f03 mem=32M"
-CONFIG_FPE_NWFPE=y
-CONFIG_VFP=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_EEPROM_LEGACY=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=m
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_SOUND=y
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_ARMAACI=m
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=m
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_MINIX_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig
deleted file mode 100644
index f2de51f0..00000000
--- a/arch/arm/configs/vexpress_defconfig
+++ /dev/null
@@ -1,140 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_CPUSETS=y
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_NET_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_VEXPRESS=y
-CONFIG_ARCH_VEXPRESS_CA9X4=y
-# CONFIG_SWP_EMULATE is not set
-CONFIG_SMP=y
-CONFIG_VMSPLIT_2G=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_ARM_INTEGRATOR=y
-CONFIG_MISC_DEVICES=y
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_ATA=y
-# CONFIG_SATA_PMP is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_MIXER_OSS=y
-CONFIG_SND_PCM_OSS=y
-# CONFIG_SND_DRIVERS is not set
-CONFIG_SND_ARMAACI=y
-CONFIG_HID_DRAGONRISE=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_TWINHAN=y
-CONFIG_HID_NTRIG=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_HID_GREENASIA=y
-CONFIG_HID_SMARTJOYPLUS=y
-CONFIG_HID_TOPSEED=y
-CONFIG_HID_THRUSTMASTER=y
-CONFIG_HID_ZEROPLUS=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_ISP1760_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig
deleted file mode 100644
index d36e0d3c..00000000
--- a/arch/arm/configs/viper_defconfig
+++ /dev/null
@@ -1,174 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=13
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
-# CONFIG_ELF_CORE is not set
-# CONFIG_SHMEM is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_ARCH_VIPER=y
-CONFIG_IWMMXT=y
-CONFIG_PCCARD=m
-CONFIG_PCMCIA_PXA2XX=m
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=m
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
-CONFIG_FPE_FASTFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=m
-CONFIG_ATA=m
-# CONFIG_SATA_PMP is not set
-CONFIG_PATA_PCMCIA=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_USBNET=m
-# CONFIG_USB_NET_CDC_SUBSET is not set
-CONFIG_NET_PCMCIA=y
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_INPUT_MOUSEDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=m
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_FUJITSU=m
-CONFIG_TOUCHSCREEN_ELO=m
-CONFIG_TOUCHSCREEN_MTOUCH=m
-CONFIG_TOUCHSCREEN_INEXIO=m
-CONFIG_TOUCHSCREEN_HTCPEN=m
-CONFIG_TOUCHSCREEN_PENMOUNT=m
-CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
-CONFIG_TOUCHSCREEN_TOUCHWIN=m
-CONFIG_TOUCHSCREEN_TOUCHIT213=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_CONSOLE_TRANSLATIONS is not set
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_8250_NR_UARTS=5
-CONFIG_SERIAL_8250_RUNTIME_UARTS=5
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_PXA=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_PXA=m
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_BACKLIGHT_PWM=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=m
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_PXA2XX_AC97=m
-CONFIG_USB=m
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_ISP116X_HCD=m
-CONFIG_USB_SL811_HCD=m
-CONFIG_USB_R8A66597_HCD=m
-CONFIG_USB_ACM=m
-CONFIG_USB_STORAGE=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_GADGET=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_G_PRINTER=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=m
-CONFIG_RTC_DRV_SA1100=m
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRC_T10DIF=m
diff --git a/arch/arm/configs/xcep_defconfig b/arch/arm/configs/xcep_defconfig
deleted file mode 100644
index 721832ff..00000000
--- a/arch/arm/configs/xcep_defconfig
+++ /dev/null
@@ -1,99 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION=".xcep-itech"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_UID16 is not set
-# CONFIG_SHMEM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLOB=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLOCK is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_XCEP=y
-CONFIG_IWMMXT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=mtd4 rootfstype=jffs2 ro console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PXA2XX=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_PXA=m
-CONFIG_HWMON=m
-CONFIG_SENSORS_ADM1021=m
-CONFIG_SENSORS_MAX6650=m
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SA1100=m
-CONFIG_DMADEVICES=y
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_UTF8=m
-CONFIG_PRINTK_TIME=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_FTRACE is not set
-# CONFIG_ARM_UNWIND is not set
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_LIBCRC32C=m
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
deleted file mode 100644
index 731d4f98..00000000
--- a/arch/arm/configs/zeus_defconfig
+++ /dev/null
@@ -1,189 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=13
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_PXA=y
-CONFIG_MACH_ARCOM_ZEUS=y
-CONFIG_PCCARD=m
-CONFIG_PCMCIA_PXA2XX=m
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200"
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=m
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_APM_EMULATION=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_LIB80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PXA2XX=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_EEPROM_AT24=m
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=m
-CONFIG_ATA=m
-# CONFIG_SATA_PMP is not set
-CONFIG_PATA_PCMCIA=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_DM9000=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_HERMES=m
-CONFIG_PCMCIA_HERMES=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_NET_PCMCIA=y
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=m
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_FUJITSU=m
-CONFIG_TOUCHSCREEN_ELO=m
-CONFIG_TOUCHSCREEN_MTOUCH=m
-CONFIG_TOUCHSCREEN_INEXIO=m
-CONFIG_TOUCHSCREEN_HTCPEN=m
-CONFIG_TOUCHSCREEN_PENMOUNT=m
-CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
-CONFIG_TOUCHSCREEN_TOUCHWIN=m
-CONFIG_TOUCHSCREEN_TOUCHIT213=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=7
-CONFIG_SERIAL_8250_RUNTIME_UARTS=7
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_GPIO=y
-CONFIG_I2C_PXA=y
-CONFIG_SPI=y
-CONFIG_SPI_PXA2XX=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_SENSORS_LM75=m
-CONFIG_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_PXA=m
-CONFIG_FB_PXA_PARAMETERS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=m
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_SUPPORT_OLD_API is not set
-CONFIG_SND_PXA2XX_AC97=m
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_PCMCIA is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_PXA2XX_SOC=m
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=m
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_OHCI_HCD=m
-CONFIG_USB_ACM=m
-CONFIG_USB_STORAGE=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_GADGET=m
-CONFIG_USB_PXA27X=y
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_G_PRINTER=m
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_PXA=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
-CONFIG_LEDS_TRIGGER_BACKLIGHT=m
-CONFIG_LEDS_TRIGGER_GPIO=m
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_ISL1208=m
-CONFIG_RTC_DRV_PXA=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_T10DIF=m
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index ea289e14..cca9f157 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -19,6 +19,14 @@
#undef _CACHE
#undef MULTI_CACHE
+#if defined(CONFIG_CPU_CACHE_V3)
+# ifdef _CACHE
+# define MULTI_CACHE 1
+# else
+# define _CACHE v3
+# endif
+#endif
+
#if defined(CONFIG_CPU_CACHE_V4)
# ifdef _CACHE
# define MULTI_CACHE 1
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index ed94b1a3..02fe2fbe 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -37,7 +37,7 @@ extern int iop3xx_get_init_atu(void);
* IOP3XX processor registers
*/
#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000
-#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfedfe000
+#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000
#define IOP3XX_PERIPHERAL_SIZE 0x00002000
#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
IOP3XX_PERIPHERAL_SIZE - 1)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 652b5608..d751d79b 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -399,3 +399,5 @@ extern void register_isa_ports(unsigned int mmio, unsigned int io,
#endif /* __KERNEL__ */
#endif /* __ASM_ARM_IO_H */
+
+#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index 86b8fe39..6ef8afd1 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -111,7 +111,7 @@
#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
-#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
+#define L_PTE_S2_RDWR (_AT(pteval_t, 2) << 6) /* HAP[2:1] */
/*
* Hyp-mode PL2 PTE definitions for LPAE.
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index ab865e65..9e9c0413 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -14,6 +14,7 @@
#include <asm/glue.h>
+#define TLB_V3_PAGE (1 << 0)
#define TLB_V4_U_PAGE (1 << 1)
#define TLB_V4_D_PAGE (1 << 2)
#define TLB_V4_I_PAGE (1 << 3)
@@ -21,6 +22,7 @@
#define TLB_V6_D_PAGE (1 << 5)
#define TLB_V6_I_PAGE (1 << 6)
+#define TLB_V3_FULL (1 << 8)
#define TLB_V4_U_FULL (1 << 9)
#define TLB_V4_D_FULL (1 << 10)
#define TLB_V4_I_FULL (1 << 11)
@@ -50,6 +52,7 @@
* =============
*
* We have the following to choose from:
+ * v3 - ARMv3
* v4 - ARMv4 without write buffer
* v4wb - ARMv4 with write buffer without I TLB flush entry instruction
* v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
@@ -327,6 +330,7 @@ static inline void local_flush_tlb_all(void)
if (tlb_flag(TLB_WB))
dsb();
+ tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
@@ -347,8 +351,9 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
if (tlb_flag(TLB_WB))
dsb();
- if (possible_tlb_flags & (TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
+ if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
+ tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
@@ -380,8 +385,9 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
if (tlb_flag(TLB_WB))
dsb();
- if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
+ if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
+ tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
@@ -412,6 +418,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
if (tlb_flag(TLB_WB))
dsb();
+ tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
diff --git a/arch/arm/kernel/head.txt b/arch/arm/kernel/head.txt
new file mode 100644
index 00000000..f3a06d24
--- /dev/null
+++ b/arch/arm/kernel/head.txt
@@ -0,0 +1,251 @@
+
+head.o: file format elf32-littlearm
+
+
+Disassembly of section .text:
+
+00000000 <__do_fixup_smp_on_up>:
+ 0: e1540005 cmp r4, r5
+ 4: 21a0f00e movcs pc, lr
+ 8: e8b40041 ldm r4!, {r0, r6}
+ c: e7806003 str r6, [r0, r3]
+ 10: eafffffa b 0 <__do_fixup_smp_on_up>
+
+00000014 <fixup_smp>:
+ 14: e92d4070 push {r4, r5, r6, lr}
+ 18: e1a04000 mov r4, r0
+ 1c: e0805001 add r5, r0, r1
+ 20: e3a03000 mov r3, #0
+ 24: ebfffff5 bl 0 <__do_fixup_smp_on_up>
+ 28: e8bd8070 pop {r4, r5, r6, pc}
+
+0000002c <__fixup_a_pv_table>:
+ 2c: ea000003 b 40 <__fixup_a_pv_table+0x14>
+ 30: e797c003 ldr ip, [r7, r3]
+ 34: e3ccc0ff bic ip, ip, #255 ; 0xff
+ 38: e18cc006 orr ip, ip, r6
+ 3c: e787c003 str ip, [r7, r3]
+ 40: e1540005 cmp r4, r5
+ 44: 34947004 ldrcc r7, [r4], #4
+ 48: 3afffff8 bcc 30 <__fixup_a_pv_table+0x4>
+ 4c: e1a0f00e mov pc, lr
+
+00000050 <fixup_pv_table>:
+ 50: e92d40f0 push {r4, r5, r6, r7, lr}
+ 54: e59f2014 ldr r2, [pc, #20] ; 70 <fixup_pv_table+0x20>
+ 58: e3a03000 mov r3, #0
+ 5c: e1a04000 mov r4, r0
+ 60: e0805001 add r5, r0, r1
+ 64: e5926004 ldr r6, [r2, #4]
+ 68: ebffffef bl 2c <__fixup_a_pv_table>
+ 6c: e8bd80f0 pop {r4, r5, r6, r7, pc}
+ 70: 00000000 .word 0x00000000
+
+Disassembly of section .head.text:
+
+00000000 <stext>:
+ 0: e321f0d3 msr CPSR_c, #211 ; 0xd3
+ 4: ee109f10 mrc 15, 0, r9, cr0, cr0, {0}
+ 8: ebfffffe bl 0 <stext>
+ c: e1b0a005 movs sl, r5
+ 10: 0afffffe beq 44 <stext+0x44>
+ 14: e28f302c add r3, pc, #44 ; 0x2c
+ 18: e8930110 ldm r3, {r4, r8}
+ 1c: e0434004 sub r4, r3, r4
+ 20: e0888004 add r8, r8, r4
+ 24: eb00004d bl 160 <__vet_atags>
+ 28: eb00003c bl 120 <__fixup_pv_table>
+ 2c: eb000007 bl 50 <__create_page_tables>
+ 30: e59fd00c ldr sp, [pc, #12] ; 44 <stext+0x44>
+ 34: e28fe004 add lr, pc, #4
+ 38: e1a08004 mov r8, r4
+ 3c: e28af010 add pc, sl, #16
+ 40: ea00002d b fc <__enable_mmu>
+ 44: 00000000 .word 0x00000000
+ 48: 00000048 .word 0x00000048
+ 4c: 80000000 .word 0x80000000
+
+00000050 <__create_page_tables>:
+ 50: e2884901 add r4, r8, #16384 ; 0x4000
+ 54: e1a00004 mov r0, r4
+ 58: e3a03000 mov r3, #0
+ 5c: e2806901 add r6, r0, #16384 ; 0x4000
+ 60: e4803004 str r3, [r0], #4
+ 64: e4803004 str r3, [r0], #4
+ 68: e4803004 str r3, [r0], #4
+ 6c: e4803004 str r3, [r0], #4
+ 70: e1300006 teq r0, r6
+ 74: 1afffff9 bne 60 <__create_page_tables+0x10>
+ 78: e59a7008 ldr r7, [sl, #8]
+ 7c: e28f006c add r0, pc, #108 ; 0x6c
+ 80: e8900068 ldm r0, {r3, r5, r6}
+ 84: e0400003 sub r0, r0, r3
+ 88: e0855000 add r5, r5, r0
+ 8c: e0866000 add r6, r6, r0
+ 90: e1a05a25 lsr r5, r5, #20
+ 94: e1a06a26 lsr r6, r6, #20
+ 98: e1873a05 orr r3, r7, r5, lsl #20
+ 9c: e7843105 str r3, [r4, r5, lsl #2]
+ a0: e1550006 cmp r5, r6
+ a4: 32855001 addcc r5, r5, #1
+ a8: 3afffffa bcc 98 <__create_page_tables+0x48>
+ ac: e2840a02 add r0, r4, #8192 ; 0x2000
+ b0: e59f6034 ldr r6, [pc, #52] ; ec <__create_page_tables+0x9c>
+ b4: e1883007 orr r3, r8, r7
+ b8: e0846926 add r6, r4, r6, lsr #18
+ bc: e4803004 str r3, [r0], #4
+ c0: e2833601 add r3, r3, #1048576 ; 0x100000
+ c4: e1500006 cmp r0, r6
+ c8: 9afffffb bls bc <__create_page_tables+0x6c>
+ cc: e1a00a22 lsr r0, r2, #20
+ d0: e1b00a00 lsls r0, r0, #20
+ d4: 10403008 subne r3, r0, r8
+ d8: 12833102 addne r3, r3, #-2147483648 ; 0x80000000
+ dc: 10843923 addne r3, r4, r3, lsr #18
+ e0: 11876000 orrne r6, r7, r0
+ e4: 15836000 strne r6, [r3]
+ e8: e1a0f00e mov pc, lr
+ ec: ffffffff .word 0xffffffff
+
+000000f0 <__turn_mmu_on_loc>:
+ f0: 000000f0 .word 0x000000f0
+ f4: 00000000 .word 0x00000000
+ f8: 00000018 .word 0x00000018
+
+000000fc <__enable_mmu>:
+ fc: e3800002 orr r0, r0, #2
+ 100: e3a0501f mov r5, #31
+ 104: ee035f10 mcr 15, 0, r5, cr3, cr0, {0}
+ 108: ee024f10 mcr 15, 0, r4, cr2, cr0, {0}
+ 10c: eafffffe b 0 <stext>
+ 110: e1a00000 nop ; (mov r0, r0)
+ 114: e1a00000 nop ; (mov r0, r0)
+ 118: e1a00000 nop ; (mov r0, r0)
+ 11c: e1a00000 nop ; (mov r0, r0)
+
+00000120 <__fixup_pv_table>:
+ 120: e28f0028 add r0, pc, #40 ; 0x28
+ 124: e89000b8 ldm r0, {r3, r4, r5, r7}
+ 128: e0403003 sub r3, r0, r3
+ 12c: e0844003 add r4, r4, r3
+ 130: e0855003 add r5, r5, r3
+ 134: e0877003 add r7, r7, r3
+ 138: e5878000 str r8, [r7]
+ 13c: e1a06c23 lsr r6, r3, #24
+ 140: e1330c06 teq r3, r6, lsl #24
+ 144: 1afffffe bne 44 <stext+0x44>
+ 148: e5876004 str r6, [r7, #4]
+ 14c: eafffffe b 2c <stext+0x2c>
+ 150: 00000150 .word 0x00000150
+ ...
+
+00000160 <__vet_atags>:
+ 160: e3120003 tst r2, #3
+ 164: 1a00000b bne 198 <__vet_atags+0x38>
+ 168: e5925000 ldr r5, [r2]
+ 16c: e59f602c ldr r6, [pc, #44] ; 1a0 <__vet_atags+0x40>
+ 170: e1550006 cmp r5, r6
+ 174: 0a000006 beq 194 <__vet_atags+0x34>
+ 178: e3550005 cmp r5, #5
+ 17c: 13550002 cmpne r5, #2
+ 180: 1a000004 bne 198 <__vet_atags+0x38>
+ 184: e5925004 ldr r5, [r2, #4]
+ 188: e59f6014 ldr r6, [pc, #20] ; 1a4 <__vet_atags+0x44>
+ 18c: e1550006 cmp r5, r6
+ 190: 1a000000 bne 198 <__vet_atags+0x38>
+ 194: e1a0f00e mov pc, lr
+ 198: e3a02000 mov r2, #0
+ 19c: e1a0f00e mov pc, lr
+ 1a0: edfe0dd0 .word 0xedfe0dd0
+ 1a4: 54410001 .word 0x54410001
+ 1a8: e1a00000 nop ; (mov r0, r0)
+ 1ac: e1a00000 nop ; (mov r0, r0)
+ 1b0: e1a00000 nop ; (mov r0, r0)
+ 1b4: e1a00000 nop ; (mov r0, r0)
+ 1b8: e1a00000 nop ; (mov r0, r0)
+ 1bc: e1a00000 nop ; (mov r0, r0)
+
+Disassembly of section .idmap.text:
+
+00000000 <__turn_mmu_on>:
+ 0: e1a00000 nop ; (mov r0, r0)
+ 4: ee010f10 mcr 15, 0, r0, cr1, cr0, {0}
+ 8: ee103f10 mrc 15, 0, r3, cr0, cr0, {0}
+ c: e1a03003 mov r3, r3
+ 10: e1a0300d mov r3, sp
+ 14: e1a0f003 mov pc, r3
+
+Disassembly of section .init.text:
+
+00000000 <__mmap_switched>:
+ 0: e59f3004 ldr r3, [pc, #4] ; c <__mmap_switched+0xc>
+ 4: e3a02038 mov r2, #56 ; 0x38
+ 8: e5832000 str r2, [r3]
+ c: 01c20000 .word 0x01c20000
+ 10: e59f3004 ldr r3, [pc, #4] ; 1c <__mmap_switched+0x1c>
+ 14: e3a02038 mov r2, #56 ; 0x38
+ 18: e5832000 str r2, [r3]
+ 1c: fec20000 .word 0xfec20000
+ 20: e28f3064 add r3, pc, #100 ; 0x64
+ 24: e8b300f0 ldm r3!, {r4, r5, r6, r7}
+ 28: e1540005 cmp r4, r5
+ 2c: 11550006 cmpne r5, r6
+ 30: 1494b004 ldrne fp, [r4], #4
+ 34: 1485b004 strne fp, [r5], #4
+ 38: 1afffffb bne 2c <__mmap_switched+0x2c>
+ 3c: e3a0b000 mov fp, #0
+ 40: e1560007 cmp r6, r7
+ 44: 3486b004 strcc fp, [r6], #4
+ 48: 3afffffc bcc 40 <__mmap_switched+0x40>
+ 4c: e89320f0 ldm r3, {r4, r5, r6, r7, sp}
+ 50: e5849000 str r9, [r4]
+ 54: e5851000 str r1, [r5]
+ 58: e5862000 str r2, [r6]
+ 5c: e3c04002 bic r4, r0, #2
+ 60: e8870011 stm r7, {r0, r4}
+ 64: e59f3004 ldr r3, [pc, #4] ; 70 <__mmap_switched+0x70>
+ 68: e3a02038 mov r2, #56 ; 0x38
+ 6c: e5832000 str r2, [r3]
+ 70: 01c20000 .word 0x01c20000
+ 74: e59f3004 ldr r3, [pc, #4] ; 80 <__mmap_switched+0x80>
+ 78: e3a02038 mov r2, #56 ; 0x38
+ 7c: e5832000 str r2, [r3]
+ 80: fec20000 .word 0xfec20000
+ 84: e28f3000 add r3, pc, #0
+ 88: eafffffe b 0 <start_kernel>
+
+0000008c <__mmap_switched_data>:
+ ...
+ ac: 00001ff8 ....
+
+000000b0 <lookup_processor_type>:
+ b0: e92d4270 push {r4, r5, r6, r9, lr}
+ b4: e1a09000 mov r9, r0
+ b8: ebfffffe bl 0 <__mmap_switched>
+ bc: e1a00005 mov r0, r5
+ c0: e8bd8270 pop {r4, r5, r6, r9, pc}
+
+Disassembly of section .cpuinit.text:
+
+00000000 <__lookup_processor_type>:
+ 0: e28f3030 add r3, pc, #48 ; 0x30
+ 4: e8930070 ldm r3, {r4, r5, r6}
+ 8: e0433004 sub r3, r3, r4
+ c: e0855003 add r5, r5, r3
+ 10: e0866003 add r6, r6, r3
+ 14: e8950018 ldm r5, {r3, r4}
+ 18: e0044009 and r4, r4, r9
+ 1c: e1330004 teq r3, r4
+ 20: 0a000003 beq 34 <__lookup_processor_type+0x34>
+ 24: e2855034 add r5, r5, #52 ; 0x34
+ 28: e1550006 cmp r5, r6
+ 2c: 3afffff8 bcc 14 <__lookup_processor_type+0x14>
+ 30: e3a05000 mov r5, #0
+ 34: e1a0f00e mov pc, lr
+
+00000038 <__lookup_processor_type_data>:
+ 38: 00000038 00000000 00000000 8...........
+
+00000044 <__error>:
+ 44: e1a00000 nop ; (mov r0, r0)
+ 48: eafffffd b 44 <__error>
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 1fd749ee..5dc1aa6f 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1043,7 +1043,7 @@ static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
return NOTIFY_OK;
}
-static struct notifier_block dbg_cpu_pm_nb = {
+static struct notifier_block __cpuinitdata dbg_cpu_pm_nb = {
.notifier_call = dbg_cpu_pm_notify,
};
diff --git a/arch/arm/kernel/objcopy.sh b/arch/arm/kernel/objcopy.sh
new file mode 100644
index 00000000..c8094c15
--- /dev/null
+++ b/arch/arm/kernel/objcopy.sh
@@ -0,0 +1,3 @@
+export PATH=/opt/codesourcery/arm-2010q1/bin:./../uboot/tools:$PATH
+echo $PATH
+arm-none-linux-gnueabi-objdump -d head.o > head.txt
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 8c3094d0..146157df 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -253,10 +253,7 @@ validate_event(struct pmu_hw_events *hw_events,
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
struct pmu *leader_pmu = event->group_leader->pmu;
- if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
- return 1;
-
- if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
+ if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
return 1;
return armpmu->get_event_idx(hw_events, event) >= 0;
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 59d2adb7..bd6f56b9 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -45,12 +45,12 @@ static u32 notrace jiffy_sched_clock_read(void)
static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
-static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
{
return (cyc * mult) >> shift;
}
-static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
+static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
{
u64 epoch_ns;
u32 epoch_cyc;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 234e3391..d343a6c3 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -56,6 +56,7 @@
#include <asm/virt.h>
#include "atags.h"
+#include "tcm.h"
#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
@@ -797,6 +798,8 @@ void __init setup_arch(char **cmdline_p)
reserve_crashkernel();
+ tcm_init();
+
#ifdef CONFIG_MULTI_IRQ_HANDLER
handle_arch_irq = mdesc->handle_irq;
#endif
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index f50f19e5..30ae6bb4 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -17,6 +17,7 @@
#include <asm/mach/map.h>
#include <asm/memory.h>
#include <asm/system_info.h>
+#include "tcm.h"
static struct gen_pool *tcm_pool;
static bool dtcm_present;
diff --git a/arch/arm/mm/tcm.h b/arch/arm/kernel/tcm.h
similarity index 100%
rename from arch/arm/mm/tcm.h
rename to arch/arm/kernel/tcm.h
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index c1fe4989..5a936988 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -201,7 +201,6 @@ int kvm_dev_ioctl_check_extension(long ext)
break;
case KVM_CAP_ARM_SET_DEVICE_ADDR:
r = 1;
- break;
case KVM_CAP_NR_VCPUS:
r = num_online_cpus();
break;
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 7bed7556..4ea9a982 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -79,11 +79,11 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
u32 val;
int cpu;
+ cpu = get_cpu();
+
if (!p->is_write)
return read_from_write_only(vcpu, p);
- cpu = get_cpu();
-
cpumask_setall(&vcpu->arch.require_dcache_flush);
cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush);
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index a075b3e0..dd1887ec 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -15,113 +15,13 @@ menu "TI DaVinci Implementations"
comment "DaVinci Core Type"
-config ARCH_DAVINCI_DM644x
- bool "DaVinci 644x based system"
- select AINTC
- select ARCH_DAVINCI_DMx
-
-config ARCH_DAVINCI_DM355
- bool "DaVinci 355 based system"
- select AINTC
- select ARCH_DAVINCI_DMx
-
-config ARCH_DAVINCI_DM646x
- bool "DaVinci 646x based system"
- select AINTC
- select ARCH_DAVINCI_DMx
-
-config ARCH_DAVINCI_DA830
- bool "DA830/OMAP-L137/AM17x based system"
- select ARCH_DAVINCI_DA8XX
- select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
- select CP_INTC
-
-config ARCH_DAVINCI_DA850
- bool "DA850/OMAP-L138/AM18x based system"
- select ARCH_DAVINCI_DA8XX
- select ARCH_HAS_CPUFREQ
- select CP_INTC
-
-config ARCH_DAVINCI_DA8XX
- bool
- select CPU_ARM926T
-
config ARCH_DAVINCI_DM365
bool "DaVinci 365 based system"
select AINTC
select ARCH_DAVINCI_DMx
-config ARCH_DAVINCI_TNETV107X
- bool "TNETV107X based system"
- select CPU_V6
- select CP_INTC
-
comment "DaVinci Board Type"
-config MACH_DA8XX_DT
- bool "Support DA8XX platforms using device tree"
- default y
- depends on ARCH_DAVINCI_DA8XX
- select PINCTRL
- help
- Say y here to include support for TI DaVinci DA850 based using
- Flattened Device Tree. More information at Documentation/devicetree
-
-config MACH_DAVINCI_EVM
- bool "TI DM644x EVM"
- default ARCH_DAVINCI_DM644x
- depends on ARCH_DAVINCI_DM644x
- select EEPROM_AT24
- select I2C
- help
- Configure this option to specify the whether the board used
- for development is a DM644x EVM
-
-config MACH_SFFSDR
- bool "Lyrtech SFFSDR"
- depends on ARCH_DAVINCI_DM644x
- select EEPROM_AT24
- select I2C
- help
- Say Y here to select the Lyrtech Small Form Factor
- Software Defined Radio (SFFSDR) board.
-
-config MACH_NEUROS_OSD2
- bool "Neuros OSD2 Open Television Set Top Box"
- depends on ARCH_DAVINCI_DM644x
- help
- Configure this option to specify the whether the board used
- for development is a Neuros OSD2 Open Set Top Box.
-
-config MACH_DAVINCI_DM355_EVM
- bool "TI DM355 EVM"
- default ARCH_DAVINCI_DM355
- depends on ARCH_DAVINCI_DM355
- help
- Configure this option to specify the whether the board used
- for development is a DM355 EVM
-
-config MACH_DM355_LEOPARD
- bool "DM355 Leopard board"
- depends on ARCH_DAVINCI_DM355
- help
- Configure this option to specify the whether the board used
- for development is a DM355 Leopard board.
-
-config MACH_DAVINCI_DM6467_EVM
- bool "TI DM6467 EVM"
- default ARCH_DAVINCI_DM646x
- depends on ARCH_DAVINCI_DM646x
- select EEPROM_AT24
- select I2C
- select MACH_DAVINCI_DM6467TEVM
- help
- Configure this option to specify the whether the board used
- for development is a DM6467 EVM
-
-config MACH_DAVINCI_DM6467TEVM
- bool
-
config MACH_DAVINCI_DM365_EVM
bool "TI DM365 EVM"
default ARCH_DAVINCI_DM365
@@ -132,119 +32,6 @@ config MACH_DAVINCI_DM365_EVM
Configure this option to specify whether the board used
for development is a DM365 EVM
-config MACH_DAVINCI_DA830_EVM
- bool "TI DA830/OMAP-L137/AM17x Reference Platform"
- default ARCH_DAVINCI_DA830
- depends on ARCH_DAVINCI_DA830
- select EEPROM_AT24
- select GPIO_PCF857X
- select I2C
- help
- Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
-
-choice
- prompt "Select DA830/OMAP-L137/AM17x UI board peripheral"
- depends on MACH_DAVINCI_DA830_EVM
- help
- The presence of UI card on the DA830/OMAP-L137/AM17x EVM is
- detected automatically based on successful probe of the I2C
- based GPIO expander on that board. This option selected in this
- menu has an effect only in case of a successful UI card detection.
-
-config DA830_UI_LCD
- bool "LCD"
- help
- Say Y here to use the LCD as a framebuffer or simple character
- display.
-
-config DA830_UI_NAND
- bool "NAND flash"
- help
- Say Y here to use the NAND flash. Do not forget to setup
- the switch correctly.
-endchoice
-
-config MACH_DAVINCI_DA850_EVM
- bool "TI DA850/OMAP-L138/AM18x Reference Platform"
- default ARCH_DAVINCI_DA850
- depends on ARCH_DAVINCI_DA850
- help
- Say Y here to select the TI DA850/OMAP-L138/AM18x Evaluation Module.
-
-choice
- prompt "Select peripherals connected to expander on UI board"
- depends on MACH_DAVINCI_DA850_EVM
- help
- The presence of User Interface (UI) card on the DA850/OMAP-L138/AM18x
- EVM is detected automatically based on successful probe of the I2C
- based GPIO expander on that card. This option selected in this
- menu has an effect only in case of a successful UI card detection.
-
-config DA850_UI_NONE
- bool "No peripheral is enabled"
- help
- Say Y if you do not want to enable any of the peripherals connected
- to TCA6416 expander on DA850/OMAP-L138/AM18x EVM UI card
-
-config DA850_UI_RMII
- bool "RMII Ethernet PHY"
- help
- Say Y if you want to use the RMII PHY on the DA850/OMAP-L138/AM18x
- EVM. This PHY is found on the UI daughter card that is supplied with
- the EVM.
- NOTE: Please take care while choosing this option, MII PHY will
- not be functional if RMII mode is selected.
-
-config DA850_UI_SD_VIDEO_PORT
- bool "Video Port Interface"
- help
- Say Y if you want to use Video Port Interface (VPIF) on the
- DA850/OMAP-L138 EVM. The Video decoders/encoders are found on the
- UI daughter card that is supplied with the EVM.
-
-endchoice
-
-config DA850_WL12XX
- bool "AM18x wl1271 daughter board"
- depends on MACH_DAVINCI_DA850_EVM
- help
- The wl1271 daughter card for AM18x EVMs is a combo wireless
- connectivity add-on card, based on the LS Research TiWi module with
- Texas Instruments' wl1271 solution.
- Say Y if you want to use a wl1271 expansion card connected to the
- AM18x EVM.
-
-config GPIO_PCA953X
- default MACH_DAVINCI_DA850_EVM
-
-config KEYBOARD_GPIO_POLLED
- default MACH_DAVINCI_DA850_EVM
-
-config MACH_TNETV107X
- bool "TI TNETV107X Reference Platform"
- default ARCH_DAVINCI_TNETV107X
- depends on ARCH_DAVINCI_TNETV107X
- help
- Say Y here to select the TI TNETV107X Evaluation Module.
-
-config MACH_MITYOMAPL138
- bool "Critical Link MityDSP-L138/MityARM-1808 SoM"
- depends on ARCH_DAVINCI_DA850
- select EEPROM_AT24
- select I2C
- help
- Say Y here to select the Critical Link MityDSP-L138/MityARM-1808
- System on Module. Information on this SoM may be found at
- http://www.mitydsp.com
-
-config MACH_OMAPL138_HAWKBOARD
- bool "TI AM1808 / OMAPL-138 Hawkboard platform"
- depends on ARCH_DAVINCI_DA850
- help
- Say Y here to select the TI AM1808 / OMAPL-138 Hawkboard platform .
- Information of this board may be found at
- http://www.hawkboard.org/
-
config DAVINCI_MUX
bool "DAVINCI multiplexing support"
depends on ARCH_DAVINCI
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index fb5c1aa9..61169e99 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
# Common objects
obj-y := time.o clock.o serial.o psc.o \
- dma.o usb.o common.o sram.o aemif.o
+ usb.o common.o sram.o aemif.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
@@ -29,7 +29,7 @@ obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o
obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o
obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o
obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o cdce949.o
-obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o
+obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o dm365_spi.o
obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o
obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
deleted file mode 100644
index 6da25eeb..00000000
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ /dev/null
@@ -1,692 +0,0 @@
-/*
- * TI DA830/OMAP L137 EVM board
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
- *
- * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/interrupt.h>
-#include <linux/gpio.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pcf857x.h>
-#include <linux/i2c/at24.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/cp_intc.h>
-#include <mach/mux.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <mach/da8xx.h>
-#include <linux/platform_data/usb-davinci.h>
-#include <linux/platform_data/mtd-davinci-aemif.h>
-#include <linux/platform_data/spi-davinci.h>
-
-#define DA830_EVM_PHY_ID ""
-/*
- * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
- */
-#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
-#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
-
-static const short da830_evm_usb11_pins[] = {
- DA830_GPIO1_15, DA830_GPIO2_4,
- -1
-};
-
-static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
-
-static int da830_evm_usb_set_power(unsigned port, int on)
-{
- gpio_set_value(ON_BD_USB_DRV, on);
- return 0;
-}
-
-static int da830_evm_usb_get_power(unsigned port)
-{
- return gpio_get_value(ON_BD_USB_DRV);
-}
-
-static int da830_evm_usb_get_oci(unsigned port)
-{
- return !gpio_get_value(ON_BD_USB_OVC);
-}
-
-static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
-
-static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
-{
- int irq = gpio_to_irq(ON_BD_USB_OVC);
- int error = 0;
-
- if (handler != NULL) {
- da830_evm_usb_ocic_handler = handler;
-
- error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
- IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- "OHCI over-current indicator", NULL);
- if (error)
- printk(KERN_ERR "%s: could not request IRQ to watch "
- "over-current indicator changes\n", __func__);
- } else
- free_irq(irq, NULL);
-
- return error;
-}
-
-static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
- .set_power = da830_evm_usb_set_power,
- .get_power = da830_evm_usb_get_power,
- .get_oci = da830_evm_usb_get_oci,
- .ocic_notify = da830_evm_usb_ocic_notify,
-
- /* TPS2065 switch @ 5V */
- .potpgt = (3 + 1) / 2, /* 3 ms max */
-};
-
-static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
-{
- da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
- return IRQ_HANDLED;
-}
-
-static __init void da830_evm_usb_init(void)
-{
- u32 cfgchip2;
- int ret;
-
- /*
- * Set up USB clock/mode in the CFGCHIP2 register.
- * FYI: CFGCHIP2 is 0x0000ef00 initially.
- */
- cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
- /* USB2.0 PHY reference clock is 24 MHz */
- cfgchip2 &= ~CFGCHIP2_REFFREQ;
- cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
-
- /*
- * Select internal reference clock for USB 2.0 PHY
- * and use it as a clock source for USB 1.1 PHY
- * (this is the default setting anyway).
- */
- cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
- cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
-
- /*
- * We have to override VBUS/ID signals when MUSB is configured into the
- * host-only mode -- ID pin will float if no cable is connected, so the
- * controller won't be able to drive VBUS thinking that it's a B-device.
- * Otherwise, we want to use the OTG mode and enable VBUS comparators.
- */
- cfgchip2 &= ~CFGCHIP2_OTGMODE;
-#ifdef CONFIG_USB_MUSB_HOST
- cfgchip2 |= CFGCHIP2_FORCE_HOST;
-#else
- cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
-#endif
-
- __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
- /* USB_REFCLKIN is not used. */
- ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
- if (ret)
- pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
- __func__, ret);
- else {
- /*
- * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
- * with the power on to power good time of 3 ms.
- */
- ret = da8xx_register_usb20(1000, 3);
- if (ret)
- pr_warning("%s: USB 2.0 registration failed: %d\n",
- __func__, ret);
- }
-
- ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
- if (ret) {
- pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
- __func__, ret);
- return;
- }
-
- ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
- if (ret) {
- printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
- "power control: %d\n", __func__, ret);
- return;
- }
- gpio_direction_output(ON_BD_USB_DRV, 0);
-
- ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
- if (ret) {
- printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
- "over-current indicator: %d\n", __func__, ret);
- return;
- }
- gpio_direction_input(ON_BD_USB_OVC);
-
- ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
- if (ret)
- pr_warning("%s: USB 1.1 registration failed: %d\n",
- __func__, ret);
-}
-
-static struct davinci_uart_config da830_evm_uart_config __initdata = {
- .enabled_uarts = 0x7,
-};
-
-static const short da830_evm_mcasp1_pins[] = {
- DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
- DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
- DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
- DA830_AXR1_11,
- -1
-};
-
-static u8 da830_iis_serializer_direction[] = {
- RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
- INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
- INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
-};
-
-static struct snd_platform_data da830_evm_snd_data = {
- .tx_dma_offset = 0x2000,
- .rx_dma_offset = 0x2000,
- .op_mode = DAVINCI_MCASP_IIS_MODE,
- .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
- .tdm_slots = 2,
- .serial_dir = da830_iis_serializer_direction,
- .asp_chan_q = EVENTQ_0,
- .version = MCASP_VERSION_2,
- .txnumevt = 1,
- .rxnumevt = 1,
-};
-
-/*
- * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
- */
-static const short da830_evm_mmc_sd_pins[] = {
- DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
- DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
- DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
- DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
- -1
-};
-
-#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
-#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
-
-static int da830_evm_mmc_get_ro(int index)
-{
- return gpio_get_value(DA830_MMCSD_WP_PIN);
-}
-
-static int da830_evm_mmc_get_cd(int index)
-{
- return !gpio_get_value(DA830_MMCSD_CD_PIN);
-}
-
-static struct davinci_mmc_config da830_evm_mmc_config = {
- .get_ro = da830_evm_mmc_get_ro,
- .get_cd = da830_evm_mmc_get_cd,
- .wires = 8,
- .max_freq = 50000000,
- .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
- .version = MMC_CTLR_VERSION_2,
-};
-
-static inline void da830_evm_init_mmc(void)
-{
- int ret;
-
- ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
- if (ret) {
- pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
- ret);
- return;
- }
-
- ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
- if (ret) {
- pr_warning("da830_evm_init: can not open GPIO %d\n",
- DA830_MMCSD_WP_PIN);
- return;
- }
- gpio_direction_input(DA830_MMCSD_WP_PIN);
-
- ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
- if (ret) {
- pr_warning("da830_evm_init: can not open GPIO %d\n",
- DA830_MMCSD_CD_PIN);
- return;
- }
- gpio_direction_input(DA830_MMCSD_CD_PIN);
-
- ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
- if (ret) {
- pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
- ret);
- gpio_free(DA830_MMCSD_WP_PIN);
- }
-}
-
-/*
- * UI board NAND/NOR flashes only use 8-bit data bus.
- */
-static const short da830_evm_emif25_pins[] = {
- DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
- DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
- DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
- DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
- DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
- DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
- DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
- -1
-};
-
-#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
-#define HAS_MMC 1
-#else
-#define HAS_MMC 0
-#endif
-
-#ifdef CONFIG_DA830_UI_NAND
-static struct mtd_partition da830_evm_nand_partitions[] = {
- /* bootloader (U-Boot, etc) in first sector */
- [0] = {
- .name = "bootloader",
- .offset = 0,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- /* bootloader params in the next sector */
- [1] = {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- /* kernel */
- [2] = {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_2M,
- .mask_flags = 0,
- },
- /* file system */
- [3] = {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
-};
-
-/* flash bbt decriptors */
-static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
-static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
-
-static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
- .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
- NAND_BBT_WRITE | NAND_BBT_2BIT |
- NAND_BBT_VERSION | NAND_BBT_PERCHIP,
- .offs = 2,
- .len = 4,
- .veroffs = 16,
- .maxblocks = 4,
- .pattern = da830_evm_nand_bbt_pattern
-};
-
-static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
- .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
- NAND_BBT_WRITE | NAND_BBT_2BIT |
- NAND_BBT_VERSION | NAND_BBT_PERCHIP,
- .offs = 2,
- .len = 4,
- .veroffs = 16,
- .maxblocks = 4,
- .pattern = da830_evm_nand_mirror_pattern
-};
-
-static struct davinci_aemif_timing da830_evm_nandflash_timing = {
- .wsetup = 24,
- .wstrobe = 21,
- .whold = 14,
- .rsetup = 19,
- .rstrobe = 50,
- .rhold = 0,
- .ta = 20,
-};
-
-static struct davinci_nand_pdata da830_evm_nand_pdata = {
- .parts = da830_evm_nand_partitions,
- .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
- .ecc_bits = 4,
- .bbt_options = NAND_BBT_USE_FLASH,
- .bbt_td = &da830_evm_nand_bbt_main_descr,
- .bbt_md = &da830_evm_nand_bbt_mirror_descr,
- .timing = &da830_evm_nandflash_timing,
-};
-
-static struct resource da830_evm_nand_resources[] = {
- [0] = { /* First memory resource is NAND I/O window */
- .start = DA8XX_AEMIF_CS3_BASE,
- .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = { /* Second memory resource is AEMIF control registers */
- .start = DA8XX_AEMIF_CTL_BASE,
- .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da830_evm_nand_device = {
- .name = "davinci_nand",
- .id = 1,
- .dev = {
- .platform_data = &da830_evm_nand_pdata,
- },
- .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
- .resource = da830_evm_nand_resources,
-};
-
-static inline void da830_evm_init_nand(int mux_mode)
-{
- int ret;
-
- if (HAS_MMC) {
- pr_warning("WARNING: both MMC/SD and NAND are "
- "enabled, but they share AEMIF pins.\n"
- "\tDisable MMC/SD for NAND support.\n");
- return;
- }
-
- ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
- if (ret)
- pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
- ret);
-
- ret = platform_device_register(&da830_evm_nand_device);
- if (ret)
- pr_warning("da830_evm_init: NAND device not registered.\n");
-
- gpio_direction_output(mux_mode, 1);
-}
-#else
-static inline void da830_evm_init_nand(int mux_mode) { }
-#endif
-
-#ifdef CONFIG_DA830_UI_LCD
-static inline void da830_evm_init_lcdc(int mux_mode)
-{
- int ret;
-
- ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
- if (ret)
- pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
- ret);
-
- ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
- if (ret)
- pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
-
- gpio_direction_output(mux_mode, 0);
-}
-#else
-static inline void da830_evm_init_lcdc(int mux_mode) { }
-#endif
-
-static struct at24_platform_data da830_evm_i2c_eeprom_info = {
- .byte_len = SZ_256K / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
-};
-
-static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
- int gpio, unsigned ngpio, void *context)
-{
- gpio_request(gpio + 6, "UI MUX_MODE");
-
- /* Drive mux mode low to match the default without UI card */
- gpio_direction_output(gpio + 6, 0);
-
- da830_evm_init_lcdc(gpio + 6);
-
- da830_evm_init_nand(gpio + 6);
-
- return 0;
-}
-
-static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
- unsigned ngpio, void *context)
-{
- gpio_free(gpio + 6);
- return 0;
-}
-
-static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
- .gpio_base = DAVINCI_N_GPIO,
- .setup = da830_evm_ui_expander_setup,
- .teardown = da830_evm_ui_expander_teardown,
-};
-
-static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
- {
- I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &da830_evm_i2c_eeprom_info,
- },
- {
- I2C_BOARD_INFO("tlv320aic3x", 0x18),
- },
- {
- I2C_BOARD_INFO("pcf8574", 0x3f),
- .platform_data = &da830_evm_ui_expander_info,
- },
-};
-
-static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
- .bus_freq = 100, /* kHz */
- .bus_delay = 0, /* usec */
-};
-
-/*
- * The following EDMA channels/slots are not being used by drivers (for
- * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
- * they are being reserved for codecs on the DSP side.
- */
-static const s16 da830_dma_rsv_chans[][2] = {
- /* (offset, number) */
- { 8, 2},
- {12, 2},
- {24, 4},
- {30, 2},
- {-1, -1}
-};
-
-static const s16 da830_dma_rsv_slots[][2] = {
- /* (offset, number) */
- { 8, 2},
- {12, 2},
- {24, 4},
- {30, 26},
- {-1, -1}
-};
-
-static struct edma_rsv_info da830_edma_rsv[] = {
- {
- .rsv_chans = da830_dma_rsv_chans,
- .rsv_slots = da830_dma_rsv_slots,
- },
-};
-
-static struct mtd_partition da830evm_spiflash_part[] = {
- [0] = {
- .name = "DSP-UBL",
- .offset = 0,
- .size = SZ_8K,
- .mask_flags = MTD_WRITEABLE,
- },
- [1] = {
- .name = "ARM-UBL",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_16K + SZ_8K,
- .mask_flags = MTD_WRITEABLE,
- },
- [2] = {
- .name = "U-Boot",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_256K - SZ_32K,
- .mask_flags = MTD_WRITEABLE,
- },
- [3] = {
- .name = "U-Boot-Environment",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_16K,
- .mask_flags = 0,
- },
- [4] = {
- .name = "Kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- },
-};
-
-static struct flash_platform_data da830evm_spiflash_data = {
- .name = "m25p80",
- .parts = da830evm_spiflash_part,
- .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
- .type = "w25x32",
-};
-
-static struct davinci_spi_config da830evm_spiflash_cfg = {
- .io_type = SPI_IO_TYPE_DMA,
- .c2tdelay = 8,
- .t2cdelay = 8,
-};
-
-static struct spi_board_info da830evm_spi_info[] = {
- {
- .modalias = "m25p80",
- .platform_data = &da830evm_spiflash_data,
- .controller_data = &da830evm_spiflash_cfg,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 0,
- .chip_select = 0,
- },
-};
-
-static __init void da830_evm_init(void)
-{
- struct davinci_soc_info *soc_info = &davinci_soc_info;
- int ret;
-
- ret = da830_register_edma(da830_edma_rsv);
- if (ret)
- pr_warning("da830_evm_init: edma registration failed: %d\n",
- ret);
-
- ret = davinci_cfg_reg_list(da830_i2c0_pins);
- if (ret)
- pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
- ret);
-
- ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
- if (ret)
- pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
- ret);
-
- da830_evm_usb_init();
-
- soc_info->emac_pdata->rmii_en = 1;
- soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
-
- ret = davinci_cfg_reg_list(da830_cpgmac_pins);
- if (ret)
- pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
- ret);
-
- ret = da8xx_register_emac();
- if (ret)
- pr_warning("da830_evm_init: emac registration failed: %d\n",
- ret);
-
- ret = da8xx_register_watchdog();
- if (ret)
- pr_warning("da830_evm_init: watchdog registration failed: %d\n",
- ret);
-
- davinci_serial_init(&da830_evm_uart_config);
- i2c_register_board_info(1, da830_evm_i2c_devices,
- ARRAY_SIZE(da830_evm_i2c_devices));
-
- ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
- if (ret)
- pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
- ret);
-
- da8xx_register_mcasp(1, &da830_evm_snd_data);
-
- da830_evm_init_mmc();
-
- ret = da8xx_register_rtc();
- if (ret)
- pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
-
- ret = spi_register_board_info(da830evm_spi_info,
- ARRAY_SIZE(da830evm_spi_info));
- if (ret)
- pr_warn("%s: spi info registration failed: %d\n", __func__,
- ret);
-
- ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
- if (ret)
- pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
- ret);
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static int __init da830_evm_console_init(void)
-{
- if (!machine_is_davinci_da830_evm())
- return 0;
-
- return add_preferred_console("ttyS", 2, "115200");
-}
-console_initcall(da830_evm_console_init);
-#endif
-
-static void __init da830_evm_map_io(void)
-{
- da830_init();
-}
-
-MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
- .atag_offset = 0x100,
- .map_io = da830_evm_map_io,
- .init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
- .init_machine = da830_evm_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = da8xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
deleted file mode 100644
index c2dfe065..00000000
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ /dev/null
@@ -1,1609 +0,0 @@
-/*
- * TI DA850/OMAP-L138 EVM board
- *
- * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Derived from: arch/arm/mach-davinci/board-da830-evm.c
- * Original Copyrights follow:
- *
- * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/gpio_keys.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/i2c.h>
-#include <linux/i2c/at24.h>
-#include <linux/i2c/pca953x.h>
-#include <linux/input.h>
-#include <linux/input/tps6507x-ts.h>
-#include <linux/mfd/tps6507x.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <linux/platform_data/mtd-davinci-aemif.h>
-#include <linux/platform_data/spi-davinci.h>
-#include <linux/platform_data/uio_pruss.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/tps6507x.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
-#include <linux/wl12xx.h>
-
-#include <mach/cp_intc.h>
-#include <mach/da8xx.h>
-#include <mach/mux.h>
-#include <mach/sram.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/system_info.h>
-
-#include <media/tvp514x.h>
-#include <media/adv7343.h>
-
-#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
-#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
-#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
-
-#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
-#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
-
-#define DA850_WLAN_EN GPIO_TO_PIN(6, 9)
-#define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10)
-
-#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
-
-static struct mtd_partition da850evm_spiflash_part[] = {
- [0] = {
- .name = "UBL",
- .offset = 0,
- .size = SZ_64K,
- .mask_flags = MTD_WRITEABLE,
- },
- [1] = {
- .name = "U-Boot",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_512K,
- .mask_flags = MTD_WRITEABLE,
- },
- [2] = {
- .name = "U-Boot-Env",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_64K,
- .mask_flags = MTD_WRITEABLE,
- },
- [3] = {
- .name = "Kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_2M + SZ_512K,
- .mask_flags = 0,
- },
- [4] = {
- .name = "Filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
- .mask_flags = 0,
- },
- [5] = {
- .name = "MAC-Address",
- .offset = SZ_8M - SZ_64K,
- .size = SZ_64K,
- .mask_flags = MTD_WRITEABLE,
- },
-};
-
-static struct flash_platform_data da850evm_spiflash_data = {
- .name = "m25p80",
- .parts = da850evm_spiflash_part,
- .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
- .type = "m25p64",
-};
-
-static struct davinci_spi_config da850evm_spiflash_cfg = {
- .io_type = SPI_IO_TYPE_DMA,
- .c2tdelay = 8,
- .t2cdelay = 8,
-};
-
-static struct spi_board_info da850evm_spi_info[] = {
- {
- .modalias = "m25p80",
- .platform_data = &da850evm_spiflash_data,
- .controller_data = &da850evm_spiflash_cfg,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 1,
- .chip_select = 0,
- },
-};
-
-#ifdef CONFIG_MTD
-static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
-{
- char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
- size_t retlen;
-
- if (!strcmp(mtd->name, "MAC-Address")) {
- mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
- if (retlen == ETH_ALEN)
- pr_info("Read MAC addr from SPI Flash: %pM\n",
- mac_addr);
- }
-}
-
-static struct mtd_notifier da850evm_spi_notifier = {
- .add = da850_evm_m25p80_notify_add,
-};
-
-static void da850_evm_setup_mac_addr(void)
-{
- register_mtd_user(&da850evm_spi_notifier);
-}
-#else
-static void da850_evm_setup_mac_addr(void) { }
-#endif
-
-static struct mtd_partition da850_evm_norflash_partition[] = {
- {
- .name = "bootloaders + env",
- .offset = 0,
- .size = SZ_512K,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_2M,
- .mask_flags = 0,
- },
- {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- },
-};
-
-static struct physmap_flash_data da850_evm_norflash_data = {
- .width = 2,
- .parts = da850_evm_norflash_partition,
- .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
-};
-
-static struct resource da850_evm_norflash_resource[] = {
- {
- .start = DA8XX_AEMIF_CS2_BASE,
- .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da850_evm_norflash_device = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &da850_evm_norflash_data,
- },
- .num_resources = 1,
- .resource = da850_evm_norflash_resource,
-};
-
-static struct davinci_pm_config da850_pm_pdata = {
- .sleepcount = 128,
-};
-
-static struct platform_device da850_pm_device = {
- .name = "pm-davinci",
- .dev = {
- .platform_data = &da850_pm_pdata,
- },
- .id = -1,
-};
-
-/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
- * (128K blocks). It may be used instead of the (default) SPI flash
- * to boot, using TI's tools to install the secondary boot loader
- * (UBL) and U-Boot.
- */
-static struct mtd_partition da850_evm_nandflash_partition[] = {
- {
- .name = "u-boot env",
- .offset = 0,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "UBL",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "u-boot",
- .offset = MTDPART_OFS_APPEND,
- .size = 4 * SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "kernel",
- .offset = 0x200000,
- .size = SZ_2M,
- .mask_flags = 0,
- },
- {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- },
-};
-
-static struct davinci_aemif_timing da850_evm_nandflash_timing = {
- .wsetup = 24,
- .wstrobe = 21,
- .whold = 14,
- .rsetup = 19,
- .rstrobe = 50,
- .rhold = 0,
- .ta = 20,
-};
-
-static struct davinci_nand_pdata da850_evm_nandflash_data = {
- .parts = da850_evm_nandflash_partition,
- .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
- .ecc_bits = 4,
- .bbt_options = NAND_BBT_USE_FLASH,
- .timing = &da850_evm_nandflash_timing,
-};
-
-static struct resource da850_evm_nandflash_resource[] = {
- {
- .start = DA8XX_AEMIF_CS3_BASE,
- .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = DA8XX_AEMIF_CTL_BASE,
- .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da850_evm_nandflash_device = {
- .name = "davinci_nand",
- .id = 1,
- .dev = {
- .platform_data = &da850_evm_nandflash_data,
- },
- .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
- .resource = da850_evm_nandflash_resource,
-};
-
-static struct platform_device *da850_evm_devices[] = {
- &da850_evm_nandflash_device,
- &da850_evm_norflash_device,
-};
-
-#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
-#define DA8XX_AEMIF_ASIZE_16BIT 0x1
-
-static void __init da850_evm_init_nor(void)
-{
- void __iomem *aemif_addr;
-
- aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
-
- /* Configure data bus width of CS2 to 16 bit */
- writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
- DA8XX_AEMIF_ASIZE_16BIT,
- aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
-
- iounmap(aemif_addr);
-}
-
-static const short da850_evm_nand_pins[] = {
- DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
- DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
- DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
- DA850_NEMA_WE, DA850_NEMA_OE,
- -1
-};
-
-static const short da850_evm_nor_pins[] = {
- DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
- DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
- DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
- DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
- DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
- DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
- DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
- DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
- DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
- DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
- DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
- DA850_EMA_A_22, DA850_EMA_A_23,
- -1
-};
-
-#if defined(CONFIG_MMC_DAVINCI) || \
- defined(CONFIG_MMC_DAVINCI_MODULE)
-#define HAS_MMC 1
-#else
-#define HAS_MMC 0
-#endif
-
-static inline void da850_evm_setup_nor_nand(void)
-{
- int ret = 0;
-
- if (!HAS_MMC) {
- ret = davinci_cfg_reg_list(da850_evm_nand_pins);
- if (ret)
- pr_warn("%s: NAND mux setup failed: %d\n",
- __func__, ret);
-
- ret = davinci_cfg_reg_list(da850_evm_nor_pins);
- if (ret)
- pr_warn("%s: NOR mux setup failed: %d\n",
- __func__, ret);
-
- da850_evm_init_nor();
-
- platform_add_devices(da850_evm_devices,
- ARRAY_SIZE(da850_evm_devices));
- }
-}
-
-#ifdef CONFIG_DA850_UI_RMII
-static inline void da850_evm_setup_emac_rmii(int rmii_sel)
-{
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- soc_info->emac_pdata->rmii_en = 1;
- gpio_set_value_cansleep(rmii_sel, 0);
-}
-#else
-static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
-#endif
-
-
-#define DA850_KEYS_DEBOUNCE_MS 10
-/*
- * At 200ms polling interval it is possible to miss an
- * event by tapping very lightly on the push button but most
- * pushes do result in an event; longer intervals require the
- * user to hold the button whereas shorter intervals require
- * more CPU time for polling.
- */
-#define DA850_GPIO_KEYS_POLL_MS 200
-
-enum da850_evm_ui_exp_pins {
- DA850_EVM_UI_EXP_SEL_C = 5,
- DA850_EVM_UI_EXP_SEL_B,
- DA850_EVM_UI_EXP_SEL_A,
- DA850_EVM_UI_EXP_PB8,
- DA850_EVM_UI_EXP_PB7,
- DA850_EVM_UI_EXP_PB6,
- DA850_EVM_UI_EXP_PB5,
- DA850_EVM_UI_EXP_PB4,
- DA850_EVM_UI_EXP_PB3,
- DA850_EVM_UI_EXP_PB2,
- DA850_EVM_UI_EXP_PB1,
-};
-
-static const char const *da850_evm_ui_exp[] = {
- [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
- [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
- [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
- [DA850_EVM_UI_EXP_PB8] = "pb8",
- [DA850_EVM_UI_EXP_PB7] = "pb7",
- [DA850_EVM_UI_EXP_PB6] = "pb6",
- [DA850_EVM_UI_EXP_PB5] = "pb5",
- [DA850_EVM_UI_EXP_PB4] = "pb4",
- [DA850_EVM_UI_EXP_PB3] = "pb3",
- [DA850_EVM_UI_EXP_PB2] = "pb2",
- [DA850_EVM_UI_EXP_PB1] = "pb1",
-};
-
-#define DA850_N_UI_PB 8
-
-static struct gpio_keys_button da850_evm_ui_keys[] = {
- [0 ... DA850_N_UI_PB - 1] = {
- .type = EV_KEY,
- .active_low = 1,
- .wakeup = 0,
- .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
- .code = -1, /* assigned at runtime */
- .gpio = -1, /* assigned at runtime */
- .desc = NULL, /* assigned at runtime */
- },
-};
-
-static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
- .buttons = da850_evm_ui_keys,
- .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
- .poll_interval = DA850_GPIO_KEYS_POLL_MS,
-};
-
-static struct platform_device da850_evm_ui_keys_device = {
- .name = "gpio-keys-polled",
- .id = 0,
- .dev = {
- .platform_data = &da850_evm_ui_keys_pdata
- },
-};
-
-static void da850_evm_ui_keys_init(unsigned gpio)
-{
- int i;
- struct gpio_keys_button *button;
-
- for (i = 0; i < DA850_N_UI_PB; i++) {
- button = &da850_evm_ui_keys[i];
- button->code = KEY_F8 - i;
- button->desc = (char *)
- da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
- button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
- }
-}
-
-#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
-static inline void da850_evm_setup_video_port(int video_sel)
-{
- gpio_set_value_cansleep(video_sel, 0);
-}
-#else
-static inline void da850_evm_setup_video_port(int video_sel) { }
-#endif
-
-static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
- unsigned ngpio, void *c)
-{
- int sel_a, sel_b, sel_c, ret;
-
- sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
- sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
- sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
-
- ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
- if (ret) {
- pr_warn("Cannot open UI expander pin %d\n", sel_a);
- goto exp_setup_sela_fail;
- }
-
- ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
- if (ret) {
- pr_warn("Cannot open UI expander pin %d\n", sel_b);
- goto exp_setup_selb_fail;
- }
-
- ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
- if (ret) {
- pr_warn("Cannot open UI expander pin %d\n", sel_c);
- goto exp_setup_selc_fail;
- }
-
- /* deselect all functionalities */
- gpio_direction_output(sel_a, 1);
- gpio_direction_output(sel_b, 1);
- gpio_direction_output(sel_c, 1);
-
- da850_evm_ui_keys_init(gpio);
- ret = platform_device_register(&da850_evm_ui_keys_device);
- if (ret) {
- pr_warn("Could not register UI GPIO expander push-buttons");
- goto exp_setup_keys_fail;
- }
-
- pr_info("DA850/OMAP-L138 EVM UI card detected\n");
-
- da850_evm_setup_nor_nand();
-
- da850_evm_setup_emac_rmii(sel_a);
-
- da850_evm_setup_video_port(sel_c);
-
- return 0;
-
-exp_setup_keys_fail:
- gpio_free(sel_c);
-exp_setup_selc_fail:
- gpio_free(sel_b);
-exp_setup_selb_fail:
- gpio_free(sel_a);
-exp_setup_sela_fail:
- return ret;
-}
-
-static int da850_evm_ui_expander_teardown(struct i2c_client *client,
- unsigned gpio, unsigned ngpio, void *c)
-{
- platform_device_unregister(&da850_evm_ui_keys_device);
-
- /* deselect all functionalities */
- gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
- gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
- gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
-
- gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
- gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
- gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
-
- return 0;
-}
-
-/* assign the baseboard expander's GPIOs after the UI board's */
-#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
-#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
-
-enum da850_evm_bb_exp_pins {
- DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
- DA850_EVM_BB_EXP_SW_RST,
- DA850_EVM_BB_EXP_TP_23,
- DA850_EVM_BB_EXP_TP_22,
- DA850_EVM_BB_EXP_TP_21,
- DA850_EVM_BB_EXP_USER_PB1,
- DA850_EVM_BB_EXP_USER_LED2,
- DA850_EVM_BB_EXP_USER_LED1,
- DA850_EVM_BB_EXP_USER_SW1,
- DA850_EVM_BB_EXP_USER_SW2,
- DA850_EVM_BB_EXP_USER_SW3,
- DA850_EVM_BB_EXP_USER_SW4,
- DA850_EVM_BB_EXP_USER_SW5,
- DA850_EVM_BB_EXP_USER_SW6,
- DA850_EVM_BB_EXP_USER_SW7,
- DA850_EVM_BB_EXP_USER_SW8
-};
-
-static const char const *da850_evm_bb_exp[] = {
- [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
- [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
- [DA850_EVM_BB_EXP_TP_23] = "tp_23",
- [DA850_EVM_BB_EXP_TP_22] = "tp_22",
- [DA850_EVM_BB_EXP_TP_21] = "tp_21",
- [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
- [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
- [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
- [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
- [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
- [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
- [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
- [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
- [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
- [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
- [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
-};
-
-#define DA850_N_BB_USER_SW 8
-
-static struct gpio_keys_button da850_evm_bb_keys[] = {
- [0] = {
- .type = EV_KEY,
- .active_low = 1,
- .wakeup = 0,
- .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
- .code = KEY_PROG1,
- .desc = NULL, /* assigned at runtime */
- .gpio = -1, /* assigned at runtime */
- },
- [1 ... DA850_N_BB_USER_SW] = {
- .type = EV_SW,
- .active_low = 1,
- .wakeup = 0,
- .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
- .code = -1, /* assigned at runtime */
- .desc = NULL, /* assigned at runtime */
- .gpio = -1, /* assigned at runtime */
- },
-};
-
-static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
- .buttons = da850_evm_bb_keys,
- .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
- .poll_interval = DA850_GPIO_KEYS_POLL_MS,
-};
-
-static struct platform_device da850_evm_bb_keys_device = {
- .name = "gpio-keys-polled",
- .id = 1,
- .dev = {
- .platform_data = &da850_evm_bb_keys_pdata
- },
-};
-
-static void da850_evm_bb_keys_init(unsigned gpio)
-{
- int i;
- struct gpio_keys_button *button;
-
- button = &da850_evm_bb_keys[0];
- button->desc = (char *)
- da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
- button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
-
- for (i = 0; i < DA850_N_BB_USER_SW; i++) {
- button = &da850_evm_bb_keys[i + 1];
- button->code = SW_LID + i;
- button->desc = (char *)
- da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
- button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
- }
-}
-
-#define DA850_N_BB_USER_LED 2
-
-static struct gpio_led da850_evm_bb_leds[] = {
- [0 ... DA850_N_BB_USER_LED - 1] = {
- .active_low = 1,
- .gpio = -1, /* assigned at runtime */
- .name = NULL, /* assigned at runtime */
- },
-};
-
-static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
- .leds = da850_evm_bb_leds,
- .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
-};
-
-static struct platform_device da850_evm_bb_leds_device = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &da850_evm_bb_leds_pdata
- }
-};
-
-static void da850_evm_bb_leds_init(unsigned gpio)
-{
- int i;
- struct gpio_led *led;
-
- for (i = 0; i < DA850_N_BB_USER_LED; i++) {
- led = &da850_evm_bb_leds[i];
-
- led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
- led->name =
- da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
- }
-}
-
-static int da850_evm_bb_expander_setup(struct i2c_client *client,
- unsigned gpio, unsigned ngpio,
- void *c)
-{
- int ret;
-
- /*
- * Register the switches and pushbutton on the baseboard as a gpio-keys
- * device.
- */
- da850_evm_bb_keys_init(gpio);
- ret = platform_device_register(&da850_evm_bb_keys_device);
- if (ret) {
- pr_warn("Could not register baseboard GPIO expander keys");
- goto io_exp_setup_sw_fail;
- }
-
- da850_evm_bb_leds_init(gpio);
- ret = platform_device_register(&da850_evm_bb_leds_device);
- if (ret) {
- pr_warn("Could not register baseboard GPIO expander LEDs");
- goto io_exp_setup_leds_fail;
- }
-
- return 0;
-
-io_exp_setup_leds_fail:
- platform_device_unregister(&da850_evm_bb_keys_device);
-io_exp_setup_sw_fail:
- return ret;
-}
-
-static int da850_evm_bb_expander_teardown(struct i2c_client *client,
- unsigned gpio, unsigned ngpio, void *c)
-{
- platform_device_unregister(&da850_evm_bb_leds_device);
- platform_device_unregister(&da850_evm_bb_keys_device);
-
- return 0;
-}
-
-static struct pca953x_platform_data da850_evm_ui_expander_info = {
- .gpio_base = DAVINCI_N_GPIO,
- .setup = da850_evm_ui_expander_setup,
- .teardown = da850_evm_ui_expander_teardown,
- .names = da850_evm_ui_exp,
-};
-
-static struct pca953x_platform_data da850_evm_bb_expander_info = {
- .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
- .setup = da850_evm_bb_expander_setup,
- .teardown = da850_evm_bb_expander_teardown,
- .names = da850_evm_bb_exp,
-};
-
-static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
- {
- I2C_BOARD_INFO("tlv320aic3x", 0x18),
- },
- {
- I2C_BOARD_INFO("tca6416", 0x20),
- .platform_data = &da850_evm_ui_expander_info,
- },
- {
- I2C_BOARD_INFO("tca6416", 0x21),
- .platform_data = &da850_evm_bb_expander_info,
- },
-};
-
-static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
- .bus_freq = 100, /* kHz */
- .bus_delay = 0, /* usec */
-};
-
-static struct davinci_uart_config da850_evm_uart_config __initdata = {
- .enabled_uarts = 0x7,
-};
-
-/* davinci da850 evm audio machine driver */
-static u8 da850_iis_serializer_direction[] = {
- INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
- INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
- INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
- RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
-};
-
-static struct snd_platform_data da850_evm_snd_data = {
- .tx_dma_offset = 0x2000,
- .rx_dma_offset = 0x2000,
- .op_mode = DAVINCI_MCASP_IIS_MODE,
- .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
- .tdm_slots = 2,
- .serial_dir = da850_iis_serializer_direction,
- .asp_chan_q = EVENTQ_0,
- .ram_chan_q = EVENTQ_1,
- .version = MCASP_VERSION_2,
- .txnumevt = 1,
- .rxnumevt = 1,
- .sram_size_playback = SZ_8K,
- .sram_size_capture = SZ_8K,
-};
-
-static const short da850_evm_mcasp_pins[] __initconst = {
- DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
- DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
- DA850_AXR_11, DA850_AXR_12,
- -1
-};
-
-static int da850_evm_mmc_get_ro(int index)
-{
- return gpio_get_value(DA850_MMCSD_WP_PIN);
-}
-
-static int da850_evm_mmc_get_cd(int index)
-{
- return !gpio_get_value(DA850_MMCSD_CD_PIN);
-}
-
-static struct davinci_mmc_config da850_mmc_config = {
- .get_ro = da850_evm_mmc_get_ro,
- .get_cd = da850_evm_mmc_get_cd,
- .wires = 4,
- .max_freq = 50000000,
- .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
- .version = MMC_CTLR_VERSION_2,
-};
-
-static const short da850_evm_mmcsd0_pins[] __initconst = {
- DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
- DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
- DA850_GPIO4_0, DA850_GPIO4_1,
- -1
-};
-
-static void da850_panel_power_ctrl(int val)
-{
- /* lcd backlight */
- gpio_set_value(DA850_LCD_BL_PIN, val);
-
- /* lcd power */
- gpio_set_value(DA850_LCD_PWR_PIN, val);
-}
-
-static int da850_lcd_hw_init(void)
-{
- int status;
-
- status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
- if (status < 0)
- return status;
-
- status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
- if (status < 0) {
- gpio_free(DA850_LCD_BL_PIN);
- return status;
- }
-
- gpio_direction_output(DA850_LCD_BL_PIN, 0);
- gpio_direction_output(DA850_LCD_PWR_PIN, 0);
-
- /* Switch off panel power and backlight */
- da850_panel_power_ctrl(0);
-
- /* Switch on panel power and backlight */
- da850_panel_power_ctrl(1);
-
- return 0;
-}
-
-/* TPS65070 voltage regulator support */
-
-/* 3.3V */
-static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
- {
- .supply = "usb0_vdda33",
- },
- {
- .supply = "usb1_vdda33",
- },
-};
-
-/* 3.3V or 1.8V */
-static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
- {
- .supply = "dvdd3318_a",
- },
- {
- .supply = "dvdd3318_b",
- },
- {
- .supply = "dvdd3318_c",
- },
-};
-
-/* 1.2V */
-static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
- {
- .supply = "cvdd",
- },
-};
-
-/* 1.8V LDO */
-static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
- {
- .supply = "sata_vddr",
- },
- {
- .supply = "usb0_vdda18",
- },
- {
- .supply = "usb1_vdda18",
- },
- {
- .supply = "ddr_dvdd18",
- },
-};
-
-/* 1.2V LDO */
-static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
- {
- .supply = "sata_vdd",
- },
- {
- .supply = "pll0_vdda",
- },
- {
- .supply = "pll1_vdda",
- },
- {
- .supply = "usbs_cvdd",
- },
- {
- .supply = "vddarnwa1",
- },
-};
-
-/* We take advantage of the fact that both defdcdc{2,3} are tied high */
-static struct tps6507x_reg_platform_data tps6507x_platform_data = {
- .defdcdc_default = true,
-};
-
-static struct regulator_init_data tps65070_regulator_data[] = {
- /* dcdc1 */
- {
- .constraints = {
- .min_uV = 3150000,
- .max_uV = 3450000,
- .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS),
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
- .consumer_supplies = tps65070_dcdc1_consumers,
- },
-
- /* dcdc2 */
- {
- .constraints = {
- .min_uV = 1710000,
- .max_uV = 3450000,
- .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS),
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
- .consumer_supplies = tps65070_dcdc2_consumers,
- .driver_data = &tps6507x_platform_data,
- },
-
- /* dcdc3 */
- {
- .constraints = {
- .min_uV = 950000,
- .max_uV = 1350000,
- .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS),
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
- .consumer_supplies = tps65070_dcdc3_consumers,
- .driver_data = &tps6507x_platform_data,
- },
-
- /* ldo1 */
- {
- .constraints = {
- .min_uV = 1710000,
- .max_uV = 1890000,
- .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS),
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
- .consumer_supplies = tps65070_ldo1_consumers,
- },
-
- /* ldo2 */
- {
- .constraints = {
- .min_uV = 1140000,
- .max_uV = 1320000,
- .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS),
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
- .consumer_supplies = tps65070_ldo2_consumers,
- },
-};
-
-static struct touchscreen_init_data tps6507x_touchscreen_data = {
- .poll_period = 30, /* ms between touch samples */
- .min_pressure = 0x30, /* minimum pressure to trigger touch */
- .vref = 0, /* turn off vref when not using A/D */
- .vendor = 0, /* /sys/class/input/input?/id/vendor */
- .product = 65070, /* /sys/class/input/input?/id/product */
- .version = 0x100, /* /sys/class/input/input?/id/version */
-};
-
-static struct tps6507x_board tps_board = {
- .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
- .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
-};
-
-static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
- {
- I2C_BOARD_INFO("tps6507x", 0x48),
- .platform_data = &tps_board,
- },
-};
-
-static int __init pmic_tps65070_init(void)
-{
- return i2c_register_board_info(1, da850_evm_tps65070_info,
- ARRAY_SIZE(da850_evm_tps65070_info));
-}
-
-static const short da850_evm_lcdc_pins[] = {
- DA850_GPIO2_8, DA850_GPIO2_15,
- -1
-};
-
-static const short da850_evm_mii_pins[] = {
- DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
- DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
- DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
- DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
- DA850_MDIO_D,
- -1
-};
-
-static const short da850_evm_rmii_pins[] = {
- DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
- DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
- DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
- DA850_MDIO_D,
- -1
-};
-
-static int __init da850_evm_config_emac(void)
-{
- void __iomem *cfg_chip3_base;
- int ret;
- u32 val;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
- u8 rmii_en = soc_info->emac_pdata->rmii_en;
-
- if (!machine_is_davinci_da850_evm())
- return 0;
-
- cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
-
- val = __raw_readl(cfg_chip3_base);
-
- if (rmii_en) {
- val |= BIT(8);
- ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
- pr_info("EMAC: RMII PHY configured, MII PHY will not be"
- " functional\n");
- } else {
- val &= ~BIT(8);
- ret = davinci_cfg_reg_list(da850_evm_mii_pins);
- pr_info("EMAC: MII PHY configured, RMII PHY will not be"
- " functional\n");
- }
-
- if (ret)
- pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n",
- __func__, ret);
-
- /* configure the CFGCHIP3 register for RMII or MII */
- __raw_writel(val, cfg_chip3_base);
-
- ret = davinci_cfg_reg(DA850_GPIO2_6);
- if (ret)
- pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
-
- ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
- if (ret) {
- pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN);
- return ret;
- }
-
- /* Enable/Disable MII MDIO clock */
- gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
-
- soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
-
- ret = da8xx_register_emac();
- if (ret)
- pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
-
- return 0;
-}
-device_initcall(da850_evm_config_emac);
-
-/*
- * The following EDMA channels/slots are not being used by drivers (for
- * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
- * they are being reserved for codecs on the DSP side.
- */
-static const s16 da850_dma0_rsv_chans[][2] = {
- /* (offset, number) */
- { 8, 6},
- {24, 4},
- {30, 2},
- {-1, -1}
-};
-
-static const s16 da850_dma0_rsv_slots[][2] = {
- /* (offset, number) */
- { 8, 6},
- {24, 4},
- {30, 50},
- {-1, -1}
-};
-
-static const s16 da850_dma1_rsv_chans[][2] = {
- /* (offset, number) */
- { 0, 28},
- {30, 2},
- {-1, -1}
-};
-
-static const s16 da850_dma1_rsv_slots[][2] = {
- /* (offset, number) */
- { 0, 28},
- {30, 90},
- {-1, -1}
-};
-
-static struct edma_rsv_info da850_edma_cc0_rsv = {
- .rsv_chans = da850_dma0_rsv_chans,
- .rsv_slots = da850_dma0_rsv_slots,
-};
-
-static struct edma_rsv_info da850_edma_cc1_rsv = {
- .rsv_chans = da850_dma1_rsv_chans,
- .rsv_slots = da850_dma1_rsv_slots,
-};
-
-static struct edma_rsv_info *da850_edma_rsv[2] = {
- &da850_edma_cc0_rsv,
- &da850_edma_cc1_rsv,
-};
-
-#ifdef CONFIG_CPU_FREQ
-static __init int da850_evm_init_cpufreq(void)
-{
- switch (system_rev & 0xF) {
- case 3:
- da850_max_speed = 456000;
- break;
- case 2:
- da850_max_speed = 408000;
- break;
- case 1:
- da850_max_speed = 372000;
- break;
- }
-
- return da850_register_cpufreq("pll0_sysclk3");
-}
-#else
-static __init int da850_evm_init_cpufreq(void) { return 0; }
-#endif
-
-#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
-
-#define TVP5147_CH0 "tvp514x-0"
-#define TVP5147_CH1 "tvp514x-1"
-
-/* VPIF capture configuration */
-static struct tvp514x_platform_data tvp5146_pdata = {
- .clk_polarity = 0,
- .hs_polarity = 1,
- .vs_polarity = 1,
-};
-
-#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
-
-static const struct vpif_input da850_ch0_inputs[] = {
- {
- .input = {
- .index = 0,
- .name = "Composite",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .capabilities = V4L2_IN_CAP_STD,
- .std = TVP514X_STD_ALL,
- },
- .input_route = INPUT_CVBS_VI2B,
- .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- .subdev_name = TVP5147_CH0,
- },
-};
-
-static const struct vpif_input da850_ch1_inputs[] = {
- {
- .input = {
- .index = 0,
- .name = "S-Video",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .capabilities = V4L2_IN_CAP_STD,
- .std = TVP514X_STD_ALL,
- },
- .input_route = INPUT_SVIDEO_VI2C_VI1C,
- .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- .subdev_name = TVP5147_CH1,
- },
-};
-
-static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
- {
- .name = TVP5147_CH0,
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5d),
- .platform_data = &tvp5146_pdata,
- },
- },
- {
- .name = TVP5147_CH1,
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5c),
- .platform_data = &tvp5146_pdata,
- },
- },
-};
-
-static struct vpif_capture_config da850_vpif_capture_config = {
- .subdev_info = da850_vpif_capture_sdev_info,
- .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
- .chan_config[0] = {
- .inputs = da850_ch0_inputs,
- .input_count = ARRAY_SIZE(da850_ch0_inputs),
- .vpif_if = {
- .if_type = VPIF_IF_BT656,
- .hd_pol = 1,
- .vd_pol = 1,
- .fid_pol = 0,
- },
- },
- .chan_config[1] = {
- .inputs = da850_ch1_inputs,
- .input_count = ARRAY_SIZE(da850_ch1_inputs),
- .vpif_if = {
- .if_type = VPIF_IF_BT656,
- .hd_pol = 1,
- .vd_pol = 1,
- .fid_pol = 0,
- },
- },
- .card_name = "DA850/OMAP-L138 Video Capture",
-};
-
-/* VPIF display configuration */
-
-static struct adv7343_platform_data adv7343_pdata = {
- .mode_config = {
- .dac_3 = 1,
- .dac_2 = 1,
- .dac_1 = 1,
- },
- .sd_config = {
- .sd_dac_out1 = 1,
- },
-};
-
-static struct vpif_subdev_info da850_vpif_subdev[] = {
- {
- .name = "adv7343",
- .board_info = {
- I2C_BOARD_INFO("adv7343", 0x2a),
- .platform_data = &adv7343_pdata,
- },
- },
-};
-
-static const struct vpif_output da850_ch0_outputs[] = {
- {
- .output = {
- .index = 0,
- .name = "Composite",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_STD,
- .std = V4L2_STD_ALL,
- },
- .subdev_name = "adv7343",
- .output_route = ADV7343_COMPOSITE_ID,
- },
- {
- .output = {
- .index = 1,
- .name = "S-Video",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_STD,
- .std = V4L2_STD_ALL,
- },
- .subdev_name = "adv7343",
- .output_route = ADV7343_SVIDEO_ID,
- },
-};
-
-static struct vpif_display_config da850_vpif_display_config = {
- .subdevinfo = da850_vpif_subdev,
- .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
- .chan_config[0] = {
- .outputs = da850_ch0_outputs,
- .output_count = ARRAY_SIZE(da850_ch0_outputs),
- },
- .card_name = "DA850/OMAP-L138 Video Display",
-};
-
-static __init void da850_vpif_init(void)
-{
- int ret;
-
- ret = da850_register_vpif();
- if (ret)
- pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
-
- ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
- if (ret)
- pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
- ret);
-
- ret = da850_register_vpif_capture(&da850_vpif_capture_config);
- if (ret)
- pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
-
- ret = davinci_cfg_reg_list(da850_vpif_display_pins);
- if (ret)
- pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
- ret);
-
- ret = da850_register_vpif_display(&da850_vpif_display_config);
- if (ret)
- pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
-}
-
-#else
-static __init void da850_vpif_init(void) {}
-#endif
-
-#ifdef CONFIG_DA850_WL12XX
-
-static void wl12xx_set_power(int index, bool power_on)
-{
- static bool power_state;
-
- pr_debug("Powering %s wl12xx", power_on ? "on" : "off");
-
- if (power_on == power_state)
- return;
- power_state = power_on;
-
- if (power_on) {
- /* Power up sequence required for wl127x devices */
- gpio_set_value(DA850_WLAN_EN, 1);
- usleep_range(15000, 15000);
- gpio_set_value(DA850_WLAN_EN, 0);
- usleep_range(1000, 1000);
- gpio_set_value(DA850_WLAN_EN, 1);
- msleep(70);
- } else {
- gpio_set_value(DA850_WLAN_EN, 0);
- }
-}
-
-static struct davinci_mmc_config da850_wl12xx_mmc_config = {
- .set_power = wl12xx_set_power,
- .wires = 4,
- .max_freq = 25000000,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
- MMC_CAP_POWER_OFF_CARD,
- .version = MMC_CTLR_VERSION_2,
-};
-
-static const short da850_wl12xx_pins[] __initconst = {
- DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
- DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
- DA850_GPIO6_9, DA850_GPIO6_10,
- -1
-};
-
-static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
- .irq = -1,
- .board_ref_clock = WL12XX_REFCLOCK_38,
- .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
-};
-
-static __init int da850_wl12xx_init(void)
-{
- int ret;
-
- ret = davinci_cfg_reg_list(da850_wl12xx_pins);
- if (ret) {
- pr_err("wl12xx/mmc mux setup failed: %d\n", ret);
- goto exit;
- }
-
- ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config);
- if (ret) {
- pr_err("wl12xx/mmc registration failed: %d\n", ret);
- goto exit;
- }
-
- ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en");
- if (ret) {
- pr_err("Could not request wl12xx enable gpio: %d\n", ret);
- goto exit;
- }
-
- ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq");
- if (ret) {
- pr_err("Could not request wl12xx irq gpio: %d\n", ret);
- goto free_wlan_en;
- }
-
- da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
-
- ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data);
- if (ret) {
- pr_err("Could not set wl12xx data: %d\n", ret);
- goto free_wlan_irq;
- }
-
- return 0;
-
-free_wlan_irq:
- gpio_free(DA850_WLAN_IRQ);
-
-free_wlan_en:
- gpio_free(DA850_WLAN_EN);
-
-exit:
- return ret;
-}
-
-#else /* CONFIG_DA850_WL12XX */
-
-static __init int da850_wl12xx_init(void)
-{
- return 0;
-}
-
-#endif /* CONFIG_DA850_WL12XX */
-
-#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
-
-static __init void da850_evm_init(void)
-{
- int ret;
-
- ret = pmic_tps65070_init();
- if (ret)
- pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret);
-
- ret = da850_register_edma(da850_edma_rsv);
- if (ret)
- pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
-
- ret = davinci_cfg_reg_list(da850_i2c0_pins);
- if (ret)
- pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret);
-
- ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
- if (ret)
- pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret);
-
-
- ret = da8xx_register_watchdog();
- if (ret)
- pr_warn("%s: watchdog registration failed: %d\n",
- __func__, ret);
-
- if (HAS_MMC) {
- ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
- if (ret)
- pr_warn("%s: MMCSD0 mux setup failed: %d\n",
- __func__, ret);
-
- ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
- if (ret)
- pr_warn("%s: can not open GPIO %d\n",
- __func__, DA850_MMCSD_CD_PIN);
- gpio_direction_input(DA850_MMCSD_CD_PIN);
-
- ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
- if (ret)
- pr_warn("%s: can not open GPIO %d\n",
- __func__, DA850_MMCSD_WP_PIN);
- gpio_direction_input(DA850_MMCSD_WP_PIN);
-
- ret = da8xx_register_mmcsd0(&da850_mmc_config);
- if (ret)
- pr_warn("%s: MMCSD0 registration failed: %d\n",
- __func__, ret);
-
- ret = da850_wl12xx_init();
- if (ret)
- pr_warn("%s: WL12xx initialization failed: %d\n",
- __func__, ret);
- }
-
- davinci_serial_init(&da850_evm_uart_config);
-
- i2c_register_board_info(1, da850_evm_i2c_devices,
- ARRAY_SIZE(da850_evm_i2c_devices));
-
- /*
- * shut down uart 0 and 1; they are not used on the board and
- * accessing them causes endless "too much work in irq53" messages
- * with arago fs
- */
- __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
- __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
-
- ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
- if (ret)
- pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret);
-
- da850_evm_snd_data.sram_pool = sram_get_gen_pool();
- da8xx_register_mcasp(0, &da850_evm_snd_data);
-
- ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
- if (ret)
- pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret);
-
- ret = da8xx_register_uio_pruss();
- if (ret)
- pr_warn("da850_evm_init: pruss initialization failed: %d\n",
- ret);
-
- /* Handle board specific muxing for LCD here */
- ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
- if (ret)
- pr_warn("%s: EVM specific LCD mux setup failed: %d\n",
- __func__, ret);
-
- ret = da850_lcd_hw_init();
- if (ret)
- pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
-
- sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
- ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
- if (ret)
- pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
-
- ret = da8xx_register_rtc();
- if (ret)
- pr_warn("%s: RTC setup failed: %d\n", __func__, ret);
-
- ret = da850_evm_init_cpufreq();
- if (ret)
- pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret);
-
- ret = da8xx_register_cpuidle();
- if (ret)
- pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret);
-
- ret = da850_register_pm(&da850_pm_device);
- if (ret)
- pr_warn("%s: suspend registration failed: %d\n", __func__, ret);
-
- da850_vpif_init();
-
- ret = spi_register_board_info(da850evm_spi_info,
- ARRAY_SIZE(da850evm_spi_info));
- if (ret)
- pr_warn("%s: spi info registration failed: %d\n", __func__,
- ret);
-
- ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
- if (ret)
- pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret);
-
- ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
- if (ret)
- pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
-
- da850_evm_setup_mac_addr();
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static int __init da850_evm_console_init(void)
-{
- if (!machine_is_davinci_da850_evm())
- return 0;
-
- return add_preferred_console("ttyS", 2, "115200");
-}
-console_initcall(da850_evm_console_init);
-#endif
-
-static void __init da850_evm_map_io(void)
-{
- da850_init();
-}
-
-MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
- .atag_offset = 0x100,
- .map_io = da850_evm_map_io,
- .init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
- .init_machine = da850_evm_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = da8xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
deleted file mode 100644
index 147b8e1a..00000000
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * TI DaVinci EVM board support
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/nand.h>
-#include <linux/i2c.h>
-#include <linux/gpio.h>
-#include <linux/clk.h>
-#include <linux/videodev2.h>
-#include <media/tvp514x.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/eeprom.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <linux/platform_data/mmc-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
-
-#include "davinci.h"
-
-/* NOTE: this is geared for the standard config, with a socketed
- * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
- * swap chips, maybe with a different block size, partitioning may
- * need to be changed.
- */
-#define NAND_BLOCK_SIZE SZ_128K
-
-static struct mtd_partition davinci_nand_partitions[] = {
- {
- /* UBL (a few copies) plus U-Boot */
- .name = "bootloader",
- .offset = 0,
- .size = 15 * NAND_BLOCK_SIZE,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- /* U-Boot environment */
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 1 * NAND_BLOCK_SIZE,
- .mask_flags = 0,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
- .mask_flags = 0,
- }, {
- .name = "filesystem1",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_512M,
- .mask_flags = 0,
- }, {
- .name = "filesystem2",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
- /* two blocks with bad block table (and mirror) at the end */
-};
-
-static struct davinci_nand_pdata davinci_nand_data = {
- .mask_chipsel = BIT(14),
- .parts = davinci_nand_partitions,
- .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
- .bbt_options = NAND_BBT_USE_FLASH,
- .ecc_bits = 4,
-};
-
-static struct resource davinci_nand_resources[] = {
- {
- .start = DM355_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = DM355_ASYNC_EMIF_CONTROL_BASE,
- .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device davinci_nand_device = {
- .name = "davinci_nand",
- .id = 0,
-
- .num_resources = ARRAY_SIZE(davinci_nand_resources),
- .resource = davinci_nand_resources,
-
- .dev = {
- .platform_data = &davinci_nand_data,
- },
-};
-
-static struct davinci_i2c_platform_data i2c_pdata = {
- .bus_freq = 400 /* kHz */,
- .bus_delay = 0 /* usec */,
- .sda_pin = 15,
- .scl_pin = 14,
-};
-
-static struct snd_platform_data dm355_evm_snd_data;
-
-static int dm355evm_mmc_gpios = -EINVAL;
-
-static void dm355evm_mmcsd_gpios(unsigned gpio)
-{
- gpio_request(gpio + 0, "mmc0_ro");
- gpio_request(gpio + 1, "mmc0_cd");
- gpio_request(gpio + 2, "mmc1_ro");
- gpio_request(gpio + 3, "mmc1_cd");
-
- /* we "know" these are input-only so we don't
- * need to call gpio_direction_input()
- */
-
- dm355evm_mmc_gpios = gpio;
-}
-
-static struct i2c_board_info dm355evm_i2c_info[] = {
- { I2C_BOARD_INFO("dm355evm_msp", 0x25),
- .platform_data = dm355evm_mmcsd_gpios,
- },
- /* { plus irq }, */
- { I2C_BOARD_INFO("tlv320aic33", 0x1b), },
-};
-
-static void __init evm_init_i2c(void)
-{
- davinci_init_i2c(&i2c_pdata);
-
- gpio_request(5, "dm355evm_msp");
- gpio_direction_input(5);
- dm355evm_i2c_info[0].irq = gpio_to_irq(5);
-
- i2c_register_board_info(1, dm355evm_i2c_info,
- ARRAY_SIZE(dm355evm_i2c_info));
-}
-
-static struct resource dm355evm_dm9000_rsrc[] = {
- {
- /* addr */
- .start = 0x04014000,
- .end = 0x04014001,
- .flags = IORESOURCE_MEM,
- }, {
- /* data */
- .start = 0x04014002,
- .end = 0x04014003,
- .flags = IORESOURCE_MEM,
- }, {
- .flags = IORESOURCE_IRQ
- | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
- },
-};
-
-static struct platform_device dm355evm_dm9000 = {
- .name = "dm9000",
- .id = -1,
- .resource = dm355evm_dm9000_rsrc,
- .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc),
-};
-
-static struct tvp514x_platform_data tvp5146_pdata = {
- .clk_polarity = 0,
- .hs_polarity = 1,
- .vs_polarity = 1
-};
-
-#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
-/* Inputs available at the TVP5146 */
-static struct v4l2_input tvp5146_inputs[] = {
- {
- .index = 0,
- .name = "Composite",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .std = TVP514X_STD_ALL,
- },
- {
- .index = 1,
- .name = "S-Video",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .std = TVP514X_STD_ALL,
- },
-};
-
-/*
- * this is the route info for connecting each input to decoder
- * ouput that goes to vpfe. There is a one to one correspondence
- * with tvp5146_inputs
- */
-static struct vpfe_route tvp5146_routes[] = {
- {
- .input = INPUT_CVBS_VI2B,
- .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
- {
- .input = INPUT_SVIDEO_VI2C_VI1C,
- .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
-};
-
-static struct vpfe_subdev_info vpfe_sub_devs[] = {
- {
- .name = "tvp5146",
- .grp_id = 0,
- .num_inputs = ARRAY_SIZE(tvp5146_inputs),
- .inputs = tvp5146_inputs,
- .routes = tvp5146_routes,
- .can_route = 1,
- .ccdc_if_params = {
- .if_type = VPFE_BT656,
- .hdpol = VPFE_PINPOL_POSITIVE,
- .vdpol = VPFE_PINPOL_POSITIVE,
- },
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5d),
- .platform_data = &tvp5146_pdata,
- },
- }
-};
-
-static struct vpfe_config vpfe_cfg = {
- .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
- .i2c_adapter_id = 1,
- .sub_devs = vpfe_sub_devs,
- .card_name = "DM355 EVM",
- .ccdc = "DM355 CCDC",
-};
-
-static struct platform_device *davinci_evm_devices[] __initdata = {
- &dm355evm_dm9000,
- &davinci_nand_device,
-};
-
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
-
-static void __init dm355_evm_map_io(void)
-{
- /* setup input configuration for VPFE input devices */
- dm355_set_vpfe_config(&vpfe_cfg);
- dm355_init();
-}
-
-static int dm355evm_mmc_get_cd(int module)
-{
- if (!gpio_is_valid(dm355evm_mmc_gpios))
- return -ENXIO;
- /* low == card present */
- return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1);
-}
-
-static int dm355evm_mmc_get_ro(int module)
-{
- if (!gpio_is_valid(dm355evm_mmc_gpios))
- return -ENXIO;
- /* high == card's write protect switch active */
- return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0);
-}
-
-static struct davinci_mmc_config dm355evm_mmc_config = {
- .get_cd = dm355evm_mmc_get_cd,
- .get_ro = dm355evm_mmc_get_ro,
- .wires = 4,
- .max_freq = 50000000,
- .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
- .version = MMC_CTLR_VERSION_1,
-};
-
-/* Don't connect anything to J10 unless you're only using USB host
- * mode *and* have to do so with some kind of gender-bender. If
- * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
- * the ID pin won't need any help.
- */
-#ifdef CONFIG_USB_MUSB_PERIPHERAL
-#define USB_ID_VALUE 0 /* ID pulled high; *should* float */
-#else
-#define USB_ID_VALUE 1 /* ID pulled low */
-#endif
-
-static struct spi_eeprom at25640a = {
- .byte_len = SZ_64K / 8,
- .name = "at25640a",
- .page_size = 32,
- .flags = EE_ADDR2,
-};
-
-static struct spi_board_info dm355_evm_spi_info[] __initconst = {
- {
- .modalias = "at25",
- .platform_data = &at25640a,
- .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */
- .bus_num = 0,
- .chip_select = 0,
- .mode = SPI_MODE_0,
- },
-};
-
-static __init void dm355_evm_init(void)
-{
- struct clk *aemif;
-
- gpio_request(1, "dm9000");
- gpio_direction_input(1);
- dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
-
- aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
- if (IS_ERR(aemif))
- WARN("%s: unable to get AEMIF clock\n", __func__);
- else
- clk_prepare_enable(aemif);
-
- platform_add_devices(davinci_evm_devices,
- ARRAY_SIZE(davinci_evm_devices));
- evm_init_i2c();
- davinci_serial_init(&uart_config);
-
- /* NOTE: NAND flash timings set by the UBL are slower than
- * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
- * but could be 0x0400008c for about 25% faster page reads.
- */
-
- gpio_request(2, "usb_id_toggle");
- gpio_direction_output(2, USB_ID_VALUE);
- /* irlml6401 switches over 1A in under 8 msec */
- davinci_setup_usb(1000, 8);
-
- davinci_setup_mmc(0, &dm355evm_mmc_config);
- davinci_setup_mmc(1, &dm355evm_mmc_config);
-
- dm355_init_spi0(BIT(0), dm355_evm_spi_info,
- ARRAY_SIZE(dm355_evm_spi_info));
-
- /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */
- dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data);
-}
-
-MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
- .atag_offset = 0x100,
- .map_io = dm355_evm_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = dm355_evm_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
deleted file mode 100644
index dff4ddc5..00000000
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * DM355 leopard board support
- *
- * Based on board-dm355-evm.c
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/nand.h>
-#include <linux/i2c.h>
-#include <linux/gpio.h>
-#include <linux/clk.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/eeprom.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <linux/platform_data/mmc-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
-
-#include "davinci.h"
-
-/* NOTE: this is geared for the standard config, with a socketed
- * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
- * swap chips, maybe with a different block size, partitioning may
- * need to be changed.
- */
-#define NAND_BLOCK_SIZE SZ_128K
-
-static struct mtd_partition davinci_nand_partitions[] = {
- {
- /* UBL (a few copies) plus U-Boot */
- .name = "bootloader",
- .offset = 0,
- .size = 15 * NAND_BLOCK_SIZE,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- /* U-Boot environment */
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 1 * NAND_BLOCK_SIZE,
- .mask_flags = 0,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
- .mask_flags = 0,
- }, {
- .name = "filesystem1",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_512M,
- .mask_flags = 0,
- }, {
- .name = "filesystem2",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
- /* two blocks with bad block table (and mirror) at the end */
-};
-
-static struct davinci_nand_pdata davinci_nand_data = {
- .mask_chipsel = BIT(14),
- .parts = davinci_nand_partitions,
- .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_ECC_HW_SYNDROME,
- .bbt_options = NAND_BBT_USE_FLASH,
-};
-
-static struct resource davinci_nand_resources[] = {
- {
- .start = DM355_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = DM355_ASYNC_EMIF_CONTROL_BASE,
- .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device davinci_nand_device = {
- .name = "davinci_nand",
- .id = 0,
-
- .num_resources = ARRAY_SIZE(davinci_nand_resources),
- .resource = davinci_nand_resources,
-
- .dev = {
- .platform_data = &davinci_nand_data,
- },
-};
-
-static struct davinci_i2c_platform_data i2c_pdata = {
- .bus_freq = 400 /* kHz */,
- .bus_delay = 0 /* usec */,
-};
-
-static int leopard_mmc_gpio = -EINVAL;
-
-static void dm355leopard_mmcsd_gpios(unsigned gpio)
-{
- gpio_request(gpio + 0, "mmc0_ro");
- gpio_request(gpio + 1, "mmc0_cd");
- gpio_request(gpio + 2, "mmc1_ro");
- gpio_request(gpio + 3, "mmc1_cd");
-
- /* we "know" these are input-only so we don't
- * need to call gpio_direction_input()
- */
-
- leopard_mmc_gpio = gpio;
-}
-
-static struct i2c_board_info dm355leopard_i2c_info[] = {
- { I2C_BOARD_INFO("dm355leopard_msp", 0x25),
- .platform_data = dm355leopard_mmcsd_gpios,
- /* plus irq */ },
- /* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
- /* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
-};
-
-static void __init leopard_init_i2c(void)
-{
- davinci_init_i2c(&i2c_pdata);
-
- gpio_request(5, "dm355leopard_msp");
- gpio_direction_input(5);
- dm355leopard_i2c_info[0].irq = gpio_to_irq(5);
-
- i2c_register_board_info(1, dm355leopard_i2c_info,
- ARRAY_SIZE(dm355leopard_i2c_info));
-}
-
-static struct resource dm355leopard_dm9000_rsrc[] = {
- {
- /* addr */
- .start = 0x04000000,
- .end = 0x04000001,
- .flags = IORESOURCE_MEM,
- }, {
- /* data */
- .start = 0x04000016,
- .end = 0x04000017,
- .flags = IORESOURCE_MEM,
- }, {
- .flags = IORESOURCE_IRQ
- | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
- },
-};
-
-static struct platform_device dm355leopard_dm9000 = {
- .name = "dm9000",
- .id = -1,
- .resource = dm355leopard_dm9000_rsrc,
- .num_resources = ARRAY_SIZE(dm355leopard_dm9000_rsrc),
-};
-
-static struct platform_device *davinci_leopard_devices[] __initdata = {
- &dm355leopard_dm9000,
- &davinci_nand_device,
-};
-
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
-
-static void __init dm355_leopard_map_io(void)
-{
- dm355_init();
-}
-
-static int dm355leopard_mmc_get_cd(int module)
-{
- if (!gpio_is_valid(leopard_mmc_gpio))
- return -ENXIO;
- /* low == card present */
- return !gpio_get_value_cansleep(leopard_mmc_gpio + 2 * module + 1);
-}
-
-static int dm355leopard_mmc_get_ro(int module)
-{
- if (!gpio_is_valid(leopard_mmc_gpio))
- return -ENXIO;
- /* high == card's write protect switch active */
- return gpio_get_value_cansleep(leopard_mmc_gpio + 2 * module + 0);
-}
-
-static struct davinci_mmc_config dm355leopard_mmc_config = {
- .get_cd = dm355leopard_mmc_get_cd,
- .get_ro = dm355leopard_mmc_get_ro,
- .wires = 4,
- .max_freq = 50000000,
- .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
-};
-
-/* Don't connect anything to J10 unless you're only using USB host
- * mode *and* have to do so with some kind of gender-bender. If
- * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
- * the ID pin won't need any help.
- */
-#ifdef CONFIG_USB_MUSB_PERIPHERAL
-#define USB_ID_VALUE 0 /* ID pulled high; *should* float */
-#else
-#define USB_ID_VALUE 1 /* ID pulled low */
-#endif
-
-static struct spi_eeprom at25640a = {
- .byte_len = SZ_64K / 8,
- .name = "at25640a",
- .page_size = 32,
- .flags = EE_ADDR2,
-};
-
-static struct spi_board_info dm355_leopard_spi_info[] __initconst = {
- {
- .modalias = "at25",
- .platform_data = &at25640a,
- .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */
- .bus_num = 0,
- .chip_select = 0,
- .mode = SPI_MODE_0,
- },
-};
-
-static __init void dm355_leopard_init(void)
-{
- struct clk *aemif;
-
- gpio_request(9, "dm9000");
- gpio_direction_input(9);
- dm355leopard_dm9000_rsrc[2].start = gpio_to_irq(9);
-
- aemif = clk_get(&dm355leopard_dm9000.dev, "aemif");
- if (IS_ERR(aemif))
- WARN("%s: unable to get AEMIF clock\n", __func__);
- else
- clk_prepare_enable(aemif);
-
- platform_add_devices(davinci_leopard_devices,
- ARRAY_SIZE(davinci_leopard_devices));
- leopard_init_i2c();
- davinci_serial_init(&uart_config);
-
- /* NOTE: NAND flash timings set by the UBL are slower than
- * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
- * but could be 0x0400008c for about 25% faster page reads.
- */
-
- gpio_request(2, "usb_id_toggle");
- gpio_direction_output(2, USB_ID_VALUE);
- /* irlml6401 switches over 1A in under 8 msec */
- davinci_setup_usb(1000, 8);
-
- davinci_setup_mmc(0, &dm355leopard_mmc_config);
- davinci_setup_mmc(1, &dm355leopard_mmc_config);
-
- dm355_init_spi0(BIT(0), dm355_leopard_spi_info,
- ARRAY_SIZE(dm355_leopard_spi_info));
-}
-
-MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
- .atag_offset = 0x100,
- .map_io = dm355_leopard_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = dm355_leopard_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index c2d4958a..afdc23ce 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -22,11 +22,13 @@
#include <linux/leds.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
#include <linux/slab.h>
#include <linux/mtd/nand.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
+#include <linux/delay.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -38,112 +40,160 @@
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/keyscan-davinci.h>
-
-#include <media/tvp514x.h>
+#include <linux/platform_data/usb-davinci.h>
+#include <mach/time.h>
+#include <mach/gpio.h>
+#include <mach/rto.h>
#include "davinci.h"
+#include "dm365_spi.h"
+
+bool lan0_run; // LAN init flag
+bool lan1_run; // EMAC LAN init flag
+
+bool wlan_run; // WLAN init flag
+bool spi0_run; // SPI0 init flag
+bool camera_run; // camera init flag
+bool uart1_run; // UART1 init flag
+
+static void v2r_parse_cmdline(char * string);
+
+static struct i2c_board_info i2c_info[] = {
+
+};
+
+static struct davinci_i2c_platform_data i2c_pdata = {
+ .bus_freq = 100 /* kHz */, //was 400
+ .bus_delay = 0 /* usec */,
+ .sda_pin = 21,
+ .scl_pin = 20,
+};
+
+/* Input available at the ov7690 */
+static struct v4l2_input ov2643_inputs[] = {
+ {
+ .index = 0,
+ .name = "Camera",
+ .type = V4L2_INPUT_TYPE_CAMERA,
+ }
+};
+
+
+static struct vpfe_subdev_info vpfe_sub_devs[] = {
+ {
+ .module_name = "ov2643",
+ .is_camera = 1,
+ .grp_id = VPFE_SUBDEV_OV2643,
+ .num_inputs = ARRAY_SIZE(ov2643_inputs),
+ .inputs = ov2643_inputs,
+ .ccdc_if_params = {
+#ifdef CONFIG_VIDEO_YCBCR
+ .if_type = VPFE_YCBCR_SYNC_8,
+#else
+ .if_type = VPFE_RAW_BAYER,
+#endif
+ .hdpol = VPFE_PINPOL_POSITIVE,
+ .vdpol = VPFE_PINPOL_POSITIVE,
+ },
+ .board_info = {
+ I2C_BOARD_INFO("ov2643", 0x30),
+ /* this is for PCLK rising edge */
+ .platform_data = (void *)1,
+ },
+ }
+};
+
+static struct vpfe_config vpfe_cfg = {
+ .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
+ .sub_devs = vpfe_sub_devs,
+ .card_name = "DM365 Leopard",
+ .ccdc = "DM365 ISIF",
+ .num_clocks = 1,
+ .clocks = {"vpss_master"},
+};
+
+static void w1_enable_external_pullup(int enable);
static inline int have_imager(void)
{
- /* REVISIT when it's supported, trigger via Kconfig */
+#if defined(CONFIG_SOC_CAMERA_OV2643) || \
+ defined(CONFIG_SOC_CAMERA_OV2643_MODULE)
+ return 1;
+#else
return 0;
+#endif
}
-static inline int have_tvp7002(void)
-{
- /* REVISIT when it's supported, trigger via Kconfig */
- return 0;
+static void dm365_camera_configure(void){
+ davinci_cfg_reg(DM365_CAM_OFF);
+ gpio_request(98, "CAMERA_OFF");
+ gpio_direction_output(98, 0);
+ davinci_cfg_reg(DM365_CAM_RESET);
+ gpio_request(99, "CAMERA_RESET");
+ gpio_direction_output(99, 1);
+ davinci_cfg_reg(DM365_GPIO37);
+ davinci_cfg_reg(DM365_EXTCLK);
}
-#define DM365_EVM_PHY_ID "davinci_mdio-0:01"
-/*
- * A MAX-II CPLD is used for various board control functions.
- */
-#define CPLD_OFFSET(a13a8,a2a1) (((a13a8) << 10) + ((a2a1) << 3))
-
-#define CPLD_VERSION CPLD_OFFSET(0,0) /* r/o */
-#define CPLD_TEST CPLD_OFFSET(0,1)
-#define CPLD_LEDS CPLD_OFFSET(0,2)
-#define CPLD_MUX CPLD_OFFSET(0,3)
-#define CPLD_SWITCH CPLD_OFFSET(1,0) /* r/o */
-#define CPLD_POWER CPLD_OFFSET(1,1)
-#define CPLD_VIDEO CPLD_OFFSET(1,2)
-#define CPLD_CARDSTAT CPLD_OFFSET(1,3) /* r/o */
-
-#define CPLD_DILC_OUT CPLD_OFFSET(2,0)
-#define CPLD_DILC_IN CPLD_OFFSET(2,1) /* r/o */
-
-#define CPLD_IMG_DIR0 CPLD_OFFSET(2,2)
-#define CPLD_IMG_MUX0 CPLD_OFFSET(2,3)
-#define CPLD_IMG_MUX1 CPLD_OFFSET(3,0)
-#define CPLD_IMG_DIR1 CPLD_OFFSET(3,1)
-#define CPLD_IMG_MUX2 CPLD_OFFSET(3,2)
-#define CPLD_IMG_MUX3 CPLD_OFFSET(3,3)
-#define CPLD_IMG_DIR2 CPLD_OFFSET(4,0)
-#define CPLD_IMG_MUX4 CPLD_OFFSET(4,1)
-#define CPLD_IMG_MUX5 CPLD_OFFSET(4,2)
-
-#define CPLD_RESETS CPLD_OFFSET(4,3)
-
-#define CPLD_CCD_DIR1 CPLD_OFFSET(0x3e,0)
-#define CPLD_CCD_IO1 CPLD_OFFSET(0x3e,1)
-#define CPLD_CCD_DIR2 CPLD_OFFSET(0x3e,2)
-#define CPLD_CCD_IO2 CPLD_OFFSET(0x3e,3)
-#define CPLD_CCD_DIR3 CPLD_OFFSET(0x3f,0)
-#define CPLD_CCD_IO3 CPLD_OFFSET(0x3f,1)
-
-static void __iomem *cpld;
-
-
/* NOTE: this is geared for the standard config, with a socketed
* 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
* swap chips with a different block size, partitioning will
* need to be changed. This NAND chip MT29F16G08FAA is the default
* NAND shipped with the Spectrum Digital DM365 EVM
*/
-#define NAND_BLOCK_SIZE SZ_128K
+/*define NAND_BLOCK_SIZE SZ_128K*/
+
+/* For Samsung 4K NAND (K9KAG08U0M) with 256K sectors */
+/*#define NAND_BLOCK_SIZE SZ_256K*/
+
+/* For Micron 4K NAND with 512K sectors */
+#define NAND_BLOCK_SIZE SZ_512K
+
+#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000
static struct mtd_partition davinci_nand_partitions[] = {
{
- /* UBL (a few copies) plus U-Boot */
- .name = "bootloader",
+ .name = "uboot",
.offset = 0,
- .size = 30 * NAND_BLOCK_SIZE,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- /* U-Boot environment */
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 2 * NAND_BLOCK_SIZE,
+ .size = 0x100000,
.mask_flags = 0,
- }, {
+ },
+ {
+ .name = "wtf",
+ .offset = 0x200000,
+ .size = 0x100000,
+ .mask_flags = 0,
+ },
+ {
.name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
+ .offset = 0x300000,
+ .size = 0x300000,
.mask_flags = 0,
}, {
- .name = "filesystem1",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_512M,
+ .name = "rootfs",
+ .offset = 0x600000,
+ .size = 0x500000,
.mask_flags = 0,
}, {
- .name = "filesystem2",
- .offset = MTDPART_OFS_APPEND,
+ .name = "rootfs_data",
+ .offset = 0xb00000,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0,
}
- /* two blocks with bad block table (and mirror) at the end */
};
static struct davinci_nand_pdata davinci_nand_data = {
- .mask_chipsel = BIT(14),
- .parts = davinci_nand_partitions,
- .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
+ .mask_chipsel = 0,
+// .parts = davinci_nand_partitions,
+// .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
.ecc_mode = NAND_ECC_HW,
.bbt_options = NAND_BBT_USE_FLASH,
- .ecc_bits = 4,
+ // .ecc_bits = 4,
};
+#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
+
static struct resource davinci_nand_resources[] = {
{
.start = DM365_ASYNC_EMIF_DATA_CE0_BASE,
@@ -166,94 +216,70 @@ static struct platform_device davinci_nand_device = {
},
};
-static struct at24_platform_data eeprom_info = {
- .byte_len = (256*1024) / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
-};
-
-static struct snd_platform_data dm365_evm_snd_data = {
- .asp_chan_q = EVENTQ_3,
+static struct physmap_flash_data davinci_nor_data = {
+ .width = 2,
};
-static struct i2c_board_info i2c_info[] = {
+static struct resource davinci_nor_resources[] = {
{
- I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &eeprom_info,
- },
- {
- I2C_BOARD_INFO("tlv320aic3x", 0x18),
+ .start = DM365_ASYNC_EMIF_DATA_CE0_BASE,
+ .end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = DM365_ASYNC_EMIF_CONTROL_BASE,
+ .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
},
};
-static struct davinci_i2c_platform_data i2c_pdata = {
- .bus_freq = 400 /* kHz */,
- .bus_delay = 0 /* usec */,
+static struct platform_device davinci_nor_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(davinci_nor_resources),
+ .dev = {
+ .platform_data = &davinci_nor_data,
+ },
+ .resource = &davinci_nor_resources,
};
-static int dm365evm_keyscan_enable(struct device *dev)
-{
- return davinci_cfg_reg(DM365_KEYSCAN);
-}
-
-static unsigned short dm365evm_keymap[] = {
- KEY_KP2,
- KEY_LEFT,
- KEY_EXIT,
- KEY_DOWN,
- KEY_ENTER,
- KEY_UP,
- KEY_KP1,
- KEY_RIGHT,
- KEY_MENU,
- KEY_RECORD,
- KEY_REWIND,
- KEY_KPMINUS,
- KEY_STOP,
- KEY_FASTFORWARD,
- KEY_KPPLUS,
- KEY_PLAYPAUSE,
- 0
+static struct snd_platform_data dm365_evm_snd_data = {
+ .asp_chan_q = EVENTQ_3,
+ .ram_chan_q = EVENTQ_3,
+ //.sram_size_capture = 0x100000000, /* CMEM/H.264 uses TCM from 0x1000 */
};
-static struct davinci_ks_platform_data dm365evm_ks_data = {
- .device_enable = dm365evm_keyscan_enable,
- .keymap = dm365evm_keymap,
- .keymapsize = ARRAY_SIZE(dm365evm_keymap),
- .rep = 1,
- /* Scan period = strobe + interval */
- .strobe = 0x5,
- .interval = 0x2,
- .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4,
-};
-static int cpld_mmc_get_cd(int module)
-{
- if (!cpld)
- return -ENXIO;
- /* low == card present */
- return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0));
+//SD card configuration functions
+//May be used dynamically
+static int mmc_get_cd(int module)
+{
+ //1 = card present
+ //0 = card not present
+ return 1;
}
-static int cpld_mmc_get_ro(int module)
+static int mmc_get_ro(int module)
{
- if (!cpld)
- return -ENXIO;
-
- /* high == card's write protect switch active */
- return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1));
+ //1 = device is read-only
+ //0 = device is mot read only
+ return 0;
}
static struct davinci_mmc_config dm365evm_mmc_config = {
- .get_cd = cpld_mmc_get_cd,
- .get_ro = cpld_mmc_get_ro,
+ .get_cd = mmc_get_cd,
+ .get_ro = mmc_get_ro,
.wires = 4,
.max_freq = 50000000,
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
- .version = MMC_CTLR_VERSION_2,
+};
+
+static struct davinci_mmc_config dm365evm_mmc1_config = {
+ //.get_cd = mmc_get_cd,
+ //.get_ro = mmc_get_ro,
+ .wires = 4,
+ .max_freq = 50000000,
+ .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_BUS_WIDTH_4 | MMC_CAP_NONREMOVABLE | MMC_CAP_4_BIT_DATA,
};
static void dm365evm_emac_configure(void)
@@ -290,6 +316,15 @@ static void dm365evm_emac_configure(void)
davinci_cfg_reg(DM365_INT_EMAC_RXPULSE);
davinci_cfg_reg(DM365_INT_EMAC_TXPULSE);
davinci_cfg_reg(DM365_INT_EMAC_MISCPULSE);
+
+ davinci_cfg_reg(DM365_GPIO29);
+ printk("reseting EMAC\n");
+ gpio_request(29, "emac-reset");
+ gpio_direction_output(29, 1);
+ msleep(20);
+ gpio_direction_output(29, 0);
+ msleep(100);
+ gpio_direction_output(29, 1);
}
static void dm365evm_mmc_configure(void)
@@ -307,75 +342,29 @@ static void dm365evm_mmc_configure(void)
davinci_cfg_reg(DM365_SD1_DATA0);
}
-static struct tvp514x_platform_data tvp5146_pdata = {
- .clk_polarity = 0,
- .hs_polarity = 1,
- .vs_polarity = 1
-};
-
-#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
-/* Inputs available at the TVP5146 */
-static struct v4l2_input tvp5146_inputs[] = {
- {
- .index = 0,
- .name = "Composite",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .std = TVP514X_STD_ALL,
- },
- {
- .index = 1,
- .name = "S-Video",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .std = TVP514X_STD_ALL,
- },
-};
-
-/*
- * this is the route info for connecting each input to decoder
- * ouput that goes to vpfe. There is a one to one correspondence
- * with tvp5146_inputs
- */
-static struct vpfe_route tvp5146_routes[] = {
- {
- .input = INPUT_CVBS_VI2B,
- .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
+__init static void dm365_usb_configure(void)
{
- .input = INPUT_SVIDEO_VI2C_VI1C,
- .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
-};
+ davinci_cfg_reg(DM365_GPIO66);
+ gpio_request(66, "usb");
+ gpio_direction_output(66, 1);
+ davinci_setup_usb(500, 8);
+}
-static struct vpfe_subdev_info vpfe_sub_devs[] = {
- {
- .name = "tvp5146",
- .grp_id = 0,
- .num_inputs = ARRAY_SIZE(tvp5146_inputs),
- .inputs = tvp5146_inputs,
- .routes = tvp5146_routes,
- .can_route = 1,
- .ccdc_if_params = {
- .if_type = VPFE_BT656,
- .hdpol = VPFE_PINPOL_POSITIVE,
- .vdpol = VPFE_PINPOL_POSITIVE,
- },
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5d),
- .platform_data = &tvp5146_pdata,
- },
- },
-};
-static struct vpfe_config vpfe_cfg = {
- .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
- .sub_devs = vpfe_sub_devs,
- .i2c_adapter_id = 1,
- .card_name = "DM365 EVM",
- .ccdc = "ISIF",
-};
+static void dm365_ks8851_init(void){
+ gpio_request(0, "KSZ8851");
+ gpio_direction_input(0);
+ davinci_cfg_reg(DM365_INT_SPI3);
+ davinci_cfg_reg(DM365_EVT18_SPI3_TX);
+ davinci_cfg_reg(DM365_EVT19_SPI3_RX);
+}
-static void __init evm_init_i2c(void)
+static void __init init_i2c(void)
{
+ davinci_cfg_reg(DM365_GPIO20);
+ gpio_request(20, "i2c-scl");
+ gpio_direction_output(20, 0);
+ davinci_cfg_reg(DM365_I2C_SCL);
davinci_init_i2c(&i2c_pdata);
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}
@@ -384,236 +373,211 @@ static struct platform_device *dm365_evm_nand_devices[] __initdata = {
&davinci_nand_device,
};
-static inline int have_leds(void)
+static struct platform_device *dm365_evm_nor_devices[] __initdata = {
+ &davinci_nor_device,
+};
+
+static struct davinci_uart_config uart_config __initdata = {
+ .enabled_uarts = (1 << 0) | (1 << 1),
+};
+
+static void __init dm365_evm_map_io(void)
{
-#ifdef CONFIG_LEDS_CLASS
- return 1;
-#else
- return 0;
-#endif
+ /* setup input configuration for VPFE input devices */
+ dm365_set_vpfe_config(&vpfe_cfg);
+ dm365_init();
}
-struct cpld_led {
- struct led_classdev cdev;
- u8 mask;
+static struct davinci_spi_config ksz8851_mcspi_config = {
+ .io_type = SPI_IO_TYPE_DMA,
+ .c2tdelay = 0,
+ .t2cdelay = 0
};
-static const struct {
- const char *name;
- const char *trigger;
-} cpld_leds[] = {
- { "dm365evm::ds2", },
- { "dm365evm::ds3", },
- { "dm365evm::ds4", },
- { "dm365evm::ds5", },
- { "dm365evm::ds6", "nand-disk", },
- { "dm365evm::ds7", "mmc1", },
- { "dm365evm::ds8", "mmc0", },
- { "dm365evm::ds9", "heartbeat", },
+static struct spi_board_info ksz8851_snl_info[] __initdata = {
+ {
+ .modalias = "ks8851",
+ .bus_num = 3,
+ .chip_select = 0,
+ .max_speed_hz = 40000000,
+ .controller_data = &ksz8851_mcspi_config,
+ .irq = IRQ_DM365_GPIO0
+ }
};
-static void cpld_led_set(struct led_classdev *cdev, enum led_brightness b)
-{
- struct cpld_led *led = container_of(cdev, struct cpld_led, cdev);
- u8 reg = __raw_readb(cpld + CPLD_LEDS);
-
- if (b != LED_OFF)
- reg &= ~led->mask;
- else
- reg |= led->mask;
- __raw_writeb(reg, cpld + CPLD_LEDS);
-}
+static struct davinci_spi_unit_desc dm365_evm_spi_udesc_KSZ8851 = {
+ .spi_hwunit = 3,
+ .chipsel = BIT(0),
+ .irq = IRQ_DM365_SPIINT3_0,
+ .dma_tx_chan = 18,
+ .dma_rx_chan = 19,
+ .dma_evtq = EVENTQ_3,
+ .pdata = {
+ .version = SPI_VERSION_1,
+ .num_chipselect = 2,
+ .intr_line = 0,
+ .chip_sel = 0,
+ .cshold_bug = 0,
+ .dma_event_q = EVENTQ_3,
+ }
+};
-static enum led_brightness cpld_led_get(struct led_classdev *cdev)
+static __init void dm365_evm_init(void)
{
- struct cpld_led *led = container_of(cdev, struct cpld_led, cdev);
- u8 reg = __raw_readb(cpld + CPLD_LEDS);
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+ struct clk *aemif_clk;
- return (reg & led->mask) ? LED_OFF : LED_FULL;
-}
+ lan0_run = 0;
+ lan1_run = 1;
+ wlan_run = 0;
+ spi0_run = 0;
+ camera_run = 0;
+ uart1_run = 0;
-static int __init cpld_leds_init(void)
-{
- int i;
+ v2r_parse_cmdline(saved_command_line);
- if (!have_leds() || !cpld)
- return 0;
+ aemif_clk = clk_get(NULL, "aemif");
+ if (IS_ERR(aemif_clk)) return;
+ clk_prepare_enable(aemif_clk);
- /* setup LEDs */
- __raw_writeb(0xff, cpld + CPLD_LEDS);
- for (i = 0; i < ARRAY_SIZE(cpld_leds); i++) {
- struct cpld_led *led;
+ // NAND & NOR init
+ platform_add_devices(dm365_evm_nand_devices, ARRAY_SIZE(dm365_evm_nand_devices));
+ //platform_add_devices(dm365_evm_nor_devices, ARRAY_SIZE(dm365_evm_nor_devices));
- led = kzalloc(sizeof(*led), GFP_KERNEL);
- if (!led)
- break;
+ init_i2c();
- led->cdev.name = cpld_leds[i].name;
- led->cdev.brightness_set = cpld_led_set;
- led->cdev.brightness_get = cpld_led_get;
- led->cdev.default_trigger = cpld_leds[i].trigger;
- led->mask = BIT(i);
+ // try to init camera
+ if (camera_run) dm365_camera_configure();
- if (led_classdev_register(NULL, &led->cdev) < 0) {
- kfree(led);
- break;
- }
+ // set up UART1 GPIO
+ if (uart1_run) {
+ davinci_cfg_reg(DM365_UART1_RXD);
+ davinci_cfg_reg(DM365_UART1_TXD);
}
- return 0;
-}
-/* run after subsys_initcall() for LEDs */
-fs_initcall(cpld_leds_init);
-
+ // try to init UARTs
+ davinci_serial_init(&uart_config);
-static void __init evm_init_cpld(void)
-{
- u8 mux, resets;
- const char *label;
- struct clk *aemif_clk;
+ //dm365evm_mmc_configure();
- /* Make sure we can configure the CPLD through CS1. Then
- * leave it on for later access to MMC and LED registers.
- */
- aemif_clk = clk_get(NULL, "aemif");
- if (IS_ERR(aemif_clk))
- return;
- clk_prepare_enable(aemif_clk);
+ // try to init MMC0 (microSD)
+ davinci_setup_mmc(0, &dm365evm_mmc_config);
- if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,
- "cpld") == NULL)
- goto fail;
- cpld = ioremap(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE);
- if (!cpld) {
- release_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE,
- SECTION_SIZE);
-fail:
- pr_err("ERROR: can't map CPLD\n");
- clk_disable_unprepare(aemif_clk);
- return;
- }
+ // try to init VoiceCodec
+ dm365_init_vc(&dm365_evm_snd_data);
- /* External muxing for some signals */
- mux = 0;
+ // try to init USB
+ dm365_usb_configure();
- /* Read SW5 to set up NAND + keypad _or_ OneNAND (sync read).
- * NOTE: SW4 bus width setting must match!
- */
- if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) {
- /* external keypad mux */
- mux |= BIT(7);
-
- platform_add_devices(dm365_evm_nand_devices,
- ARRAY_SIZE(dm365_evm_nand_devices));
- } else {
- /* no OneNAND support yet */
+ // try to init LAN module
+ if (lan0_run) {
+ dm365_ks8851_init();
+ davinci_init_spi(&dm365_evm_spi_udesc_KSZ8851, ARRAY_SIZE(ksz8851_snl_info), ksz8851_snl_info);
}
- /* Leave external chips in reset when unused. */
- resets = BIT(3) | BIT(2) | BIT(1) | BIT(0);
+ dm365evm_emac_configure();
- /* Static video input config with SN74CBT16214 1-of-3 mux:
- * - port b1 == tvp7002 (mux lowbits == 1 or 6)
- * - port b2 == imager (mux lowbits == 2 or 7)
- * - port b3 == tvp5146 (mux lowbits == 5)
- *
- * Runtime switching could work too, with limitations.
- */
- if (have_imager()) {
- label = "HD imager";
- mux |= 2;
-
- /* externally mux MMC1/ENET/AIC33 to imager */
- mux |= BIT(6) | BIT(5) | BIT(3);
- } else {
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- /* we can use MMC1 ... */
- dm365evm_mmc_configure();
- davinci_setup_mmc(1, &dm365evm_mmc_config);
-
- /* ... and ENET ... */
- dm365evm_emac_configure();
- soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID;
- resets &= ~BIT(3);
-
- /* ... and AIC33 */
- resets &= ~BIT(1);
-
- if (have_tvp7002()) {
- mux |= 1;
- resets &= ~BIT(2);
- label = "tvp7002 HD";
- } else {
- /* default to tvp5146 */
- mux |= 5;
- resets &= ~BIT(0);
- label = "tvp5146 SD";
- }
+ // try to init wlan
+ if (wlan_run) {
+ gpio_request(59, "wlan-pwdn");
+ gpio_direction_output(59, 1);
+ msleep(20);
+ gpio_request(59, "wlan-reset");
+ gpio_direction_output(60, 1);
+ msleep(20);
+ gpio_direction_output(60, 0);
+ msleep(1000);
+ gpio_direction_output(60, 1);
+ davinci_setup_mmc(1, &dm365evm_mmc1_config);
}
- __raw_writeb(mux, cpld + CPLD_MUX);
- __raw_writeb(resets, cpld + CPLD_RESETS);
- pr_info("EVM: %s video input\n", label);
- /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */
-}
+ // set USB prioruty,
+ // see http://e2e.ti.com/support/embedded/linux/f/354/t/94930.aspx
+ // and http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/100/t/150995.aspx
+ // davinci_writel(0x0, 0x1c40040); //master priority1 register1 - to set USB
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
+ return;
+}
-static void __init dm365_evm_map_io(void)
+static void v2r_parse_cmdline(char * string)
{
- /* setup input configuration for VPFE input devices */
- dm365_set_vpfe_config(&vpfe_cfg);
- dm365_init();
-}
-static struct spi_eeprom at25640 = {
- .byte_len = SZ_64K / 8,
- .name = "at25640",
- .page_size = 32,
- .flags = EE_ADDR2,
-};
+ char *p;
+ char *temp_string;
+ char *temp_param;
+ char *param_name;
+ char *param_value;
+ printk(KERN_INFO "Parse kernel cmdline:\n");
+ temp_string = kstrdup(string, GFP_KERNEL);
+
+ do
+ {
+ p = strsep(&temp_string, " ");
+ if (p) {
+ // split param string into two parts
+ temp_param = kstrdup(p, GFP_KERNEL);
+ param_name = strsep(&temp_param, "=");
+ if (!param_name) continue;
+ param_value = strsep(&temp_param, " ");
+ if (!param_value) continue;
+
+
+ if (!strcmp(param_name, "wifi")) {
+ if (!strcmp(param_value, "on")) {
+ printk(KERN_INFO "Wi-Fi board enabled\n");
+ wlan_run = 1;
+ }
+ }
-static struct spi_board_info dm365_evm_spi_info[] __initconst = {
- {
- .modalias = "at25",
- .platform_data = &at25640,
- .max_speed_hz = 10 * 1000 * 1000,
- .bus_num = 0,
- .chip_select = 0,
- .mode = SPI_MODE_0,
- },
-};
+ if (!strcmp(param_name, "lan0")) {
+ if (!strcmp(param_value, "on")) {
+ printk(KERN_INFO "LAN enabled\n");
+ lan0_run = 1;
+ }
+ }
-static __init void dm365_evm_init(void)
-{
- evm_init_i2c();
- davinci_serial_init(&uart_config);
+ if (!strcmp(param_name, "spi0")) {
+ if (!strcmp(param_value, "on")) {
+ printk(KERN_INFO "SPI0 enabled\n");
+ spi0_run = 1;
+ }
+ }
- dm365evm_emac_configure();
- dm365evm_mmc_configure();
+ if (!strcmp(param_name, "uart1")) {
+ if (!strcmp(param_value, "on")) {
+ printk(KERN_INFO "UART1 enabled\n");
+ uart1_run = 1;
+ }
+ }
- davinci_setup_mmc(0, &dm365evm_mmc_config);
+ if (!strcmp(param_name, "camera")) {
+ if (!strcmp(param_value, "ov2643")) {
+ printk(KERN_INFO "Use camera OmniVision OV2643\n");
+ camera_run = 1;
+ }
+ if (!strcmp(param_value, "ov5642")) {
+ printk(KERN_INFO "Use camera OmniVision OV5642\n");
+ camera_run = 1;
+ }
+ if (!strcmp(param_value, "ov7675")) {
+ printk(KERN_INFO "Use camera OmniVision OV7675\n");
+ camera_run = 1;
+ }
+ if (!strcmp(param_value, "ov9710")) {
+ printk(KERN_INFO "Use camera OmniVision OV9710\n");
+ camera_run = 1;
+ }
+ }
- /* maybe setup mmc1/etc ... _after_ mmc0 */
- evm_init_cpld();
+ }
-#ifdef CONFIG_SND_DM365_AIC3X_CODEC
- dm365_init_asp(&dm365_evm_snd_data);
-#elif defined(CONFIG_SND_DM365_VOICE_CODEC)
- dm365_init_vc(&dm365_evm_snd_data);
-#endif
- dm365_init_rtc();
- dm365_init_ks(&dm365evm_ks_data);
+ } while(p);
- dm365_init_spi0(BIT(0), dm365_evm_spi_info,
- ARRAY_SIZE(dm365_evm_spi_info));
}
MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
+ .nr = 0x00000793,
.map_io = dm365_evm_map_io,
.init_irq = davinci_irq_init,
.init_time = davinci_timer_init,
@@ -622,4 +586,3 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.dma_zone_size = SZ_128M,
.restart = davinci_restart,
MACHINE_END
-
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
deleted file mode 100644
index 71735e77..00000000
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ /dev/null
@@ -1,833 +0,0 @@
-/*
- * TI DaVinci EVM board support
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pcf857x.h>
-#include <linux/i2c/at24.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-#include <linux/phy.h>
-#include <linux/clk.h>
-#include <linux/videodev2.h>
-#include <linux/v4l2-dv-timings.h>
-#include <linux/export.h>
-
-#include <media/tvp514x.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/common.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
-#include <mach/mux.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <linux/platform_data/mmc-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
-#include <linux/platform_data/mtd-davinci-aemif.h>
-
-#include "davinci.h"
-
-#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
-#define LXT971_PHY_ID (0x001378e2)
-#define LXT971_PHY_MASK (0xfffffff0)
-
-static struct mtd_partition davinci_evm_norflash_partitions[] = {
- /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
- {
- .name = "bootloader",
- .offset = 0,
- .size = 5 * SZ_64K,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- /* bootloader params in the next 1 sectors */
- {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_64K,
- .mask_flags = 0,
- },
- /* kernel */
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_2M,
- .mask_flags = 0
- },
- /* file system */
- {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0
- }
-};
-
-static struct physmap_flash_data davinci_evm_norflash_data = {
- .width = 2,
- .parts = davinci_evm_norflash_partitions,
- .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
-};
-
-/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
- * limits addresses to 16M, so using addresses past 16M will wrap */
-static struct resource davinci_evm_norflash_resource = {
- .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device davinci_evm_norflash_device = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &davinci_evm_norflash_data,
- },
- .num_resources = 1,
- .resource = &davinci_evm_norflash_resource,
-};
-
-/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
- * It may used instead of the (default) NOR chip to boot, using TI's
- * tools to install the secondary boot loader (UBL) and U-Boot.
- */
-static struct mtd_partition davinci_evm_nandflash_partition[] = {
- /* Bootloader layout depends on whose u-boot is installed, but we
- * can hide all the details.
- * - block 0 for u-boot environment ... in mainline u-boot
- * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
- * - blocks 6...? for u-boot
- * - blocks 16..23 for u-boot environment ... in TI's u-boot
- */
- {
- .name = "bootloader",
- .offset = 0,
- .size = SZ_256K + SZ_128K,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- /* Kernel */
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
- .mask_flags = 0,
- },
- /* File system (older GIT kernels started this on the 5MB mark) */
- {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
- /* A few blocks at end hold a flash BBT ... created by TI's CCS
- * using flashwriter_nand.out, but ignored by TI's versions of
- * Linux and u-boot. We boot faster by using them.
- */
-};
-
-static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
- .wsetup = 20,
- .wstrobe = 40,
- .whold = 20,
- .rsetup = 10,
- .rstrobe = 40,
- .rhold = 10,
- .ta = 40,
-};
-
-static struct davinci_nand_pdata davinci_evm_nandflash_data = {
- .parts = davinci_evm_nandflash_partition,
- .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
- .bbt_options = NAND_BBT_USE_FLASH,
- .timing = &davinci_evm_nandflash_timing,
-};
-
-static struct resource davinci_evm_nandflash_resource[] = {
- {
- .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
- .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device davinci_evm_nandflash_device = {
- .name = "davinci_nand",
- .id = 0,
- .dev = {
- .platform_data = &davinci_evm_nandflash_data,
- },
- .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
- .resource = davinci_evm_nandflash_resource,
-};
-
-static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device davinci_fb_device = {
- .name = "davincifb",
- .id = -1,
- .dev = {
- .dma_mask = &davinci_fb_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = 0,
-};
-
-static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
- .clk_polarity = 0,
- .hs_polarity = 1,
- .vs_polarity = 1
-};
-
-#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
-/* Inputs available at the TVP5146 */
-static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
- {
- .index = 0,
- .name = "Composite",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .std = TVP514X_STD_ALL,
- },
- {
- .index = 1,
- .name = "S-Video",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .std = TVP514X_STD_ALL,
- },
-};
-
-/*
- * this is the route info for connecting each input to decoder
- * ouput that goes to vpfe. There is a one to one correspondence
- * with tvp5146_inputs
- */
-static struct vpfe_route dm644xevm_tvp5146_routes[] = {
- {
- .input = INPUT_CVBS_VI2B,
- .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
- {
- .input = INPUT_SVIDEO_VI2C_VI1C,
- .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
-};
-
-static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
- {
- .name = "tvp5146",
- .grp_id = 0,
- .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
- .inputs = dm644xevm_tvp5146_inputs,
- .routes = dm644xevm_tvp5146_routes,
- .can_route = 1,
- .ccdc_if_params = {
- .if_type = VPFE_BT656,
- .hdpol = VPFE_PINPOL_POSITIVE,
- .vdpol = VPFE_PINPOL_POSITIVE,
- },
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5d),
- .platform_data = &dm644xevm_tvp5146_pdata,
- },
- },
-};
-
-static struct vpfe_config dm644xevm_capture_cfg = {
- .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
- .i2c_adapter_id = 1,
- .sub_devs = dm644xevm_vpfe_sub_devs,
- .card_name = "DM6446 EVM",
- .ccdc = "DM6446 CCDC",
-};
-
-static struct platform_device rtc_dev = {
- .name = "rtc_davinci_evm",
- .id = -1,
-};
-
-static struct snd_platform_data dm644x_evm_snd_data;
-
-/*----------------------------------------------------------------------*/
-
-/*
- * I2C GPIO expanders
- */
-
-#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
-
-
-/* U2 -- LEDs */
-
-static struct gpio_led evm_leds[] = {
- { .name = "DS8", .active_low = 1,
- .default_trigger = "heartbeat", },
- { .name = "DS7", .active_low = 1, },
- { .name = "DS6", .active_low = 1, },
- { .name = "DS5", .active_low = 1, },
- { .name = "DS4", .active_low = 1, },
- { .name = "DS3", .active_low = 1, },
- { .name = "DS2", .active_low = 1,
- .default_trigger = "mmc0", },
- { .name = "DS1", .active_low = 1,
- .default_trigger = "ide-disk", },
-};
-
-static const struct gpio_led_platform_data evm_led_data = {
- .num_leds = ARRAY_SIZE(evm_leds),
- .leds = evm_leds,
-};
-
-static struct platform_device *evm_led_dev;
-
-static int
-evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
-{
- struct gpio_led *leds = evm_leds;
- int status;
-
- while (ngpio--) {
- leds->gpio = gpio++;
- leds++;
- }
-
- /* what an extremely annoying way to be forced to handle
- * device unregistration ...
- */
- evm_led_dev = platform_device_alloc("leds-gpio", 0);
- platform_device_add_data(evm_led_dev,
- &evm_led_data, sizeof evm_led_data);
-
- evm_led_dev->dev.parent = &client->dev;
- status = platform_device_add(evm_led_dev);
- if (status < 0) {
- platform_device_put(evm_led_dev);
- evm_led_dev = NULL;
- }
- return status;
-}
-
-static int
-evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
-{
- if (evm_led_dev) {
- platform_device_unregister(evm_led_dev);
- evm_led_dev = NULL;
- }
- return 0;
-}
-
-static struct pcf857x_platform_data pcf_data_u2 = {
- .gpio_base = PCF_Uxx_BASE(0),
- .setup = evm_led_setup,
- .teardown = evm_led_teardown,
-};
-
-
-/* U18 - A/V clock generator and user switch */
-
-static int sw_gpio;
-
-static ssize_t
-sw_show(struct device *d, struct device_attribute *a, char *buf)
-{
- char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
-
- strcpy(buf, s);
- return strlen(s);
-}
-
-static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
-
-static int
-evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
-{
- int status;
-
- /* export dip switch option */
- sw_gpio = gpio + 7;
- status = gpio_request(sw_gpio, "user_sw");
- if (status == 0)
- status = gpio_direction_input(sw_gpio);
- if (status == 0)
- status = device_create_file(&client->dev, &dev_attr_user_sw);
- else
- gpio_free(sw_gpio);
- if (status != 0)
- sw_gpio = -EINVAL;
-
- /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
- gpio_request(gpio + 3, "pll_fs2");
- gpio_direction_output(gpio + 3, 0);
-
- gpio_request(gpio + 2, "pll_fs1");
- gpio_direction_output(gpio + 2, 0);
-
- gpio_request(gpio + 1, "pll_sr");
- gpio_direction_output(gpio + 1, 0);
-
- return 0;
-}
-
-static int
-evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
-{
- gpio_free(gpio + 1);
- gpio_free(gpio + 2);
- gpio_free(gpio + 3);
-
- if (sw_gpio > 0) {
- device_remove_file(&client->dev, &dev_attr_user_sw);
- gpio_free(sw_gpio);
- }
- return 0;
-}
-
-static struct pcf857x_platform_data pcf_data_u18 = {
- .gpio_base = PCF_Uxx_BASE(1),
- .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
- .setup = evm_u18_setup,
- .teardown = evm_u18_teardown,
-};
-
-
-/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
-
-static int
-evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
-{
- /* p0 = nDRV_VBUS (initial: don't supply it) */
- gpio_request(gpio + 0, "nDRV_VBUS");
- gpio_direction_output(gpio + 0, 1);
-
- /* p1 = VDDIMX_EN */
- gpio_request(gpio + 1, "VDDIMX_EN");
- gpio_direction_output(gpio + 1, 1);
-
- /* p2 = VLYNQ_EN */
- gpio_request(gpio + 2, "VLYNQ_EN");
- gpio_direction_output(gpio + 2, 1);
-
- /* p3 = n3V3_CF_RESET (initial: stay in reset) */
- gpio_request(gpio + 3, "nCF_RESET");
- gpio_direction_output(gpio + 3, 0);
-
- /* (p4 unused) */
-
- /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
- gpio_request(gpio + 5, "WLAN_RESET");
- gpio_direction_output(gpio + 5, 1);
-
- /* p6 = nATA_SEL (initial: select) */
- gpio_request(gpio + 6, "nATA_SEL");
- gpio_direction_output(gpio + 6, 0);
-
- /* p7 = nCF_SEL (initial: deselect) */
- gpio_request(gpio + 7, "nCF_SEL");
- gpio_direction_output(gpio + 7, 1);
-
- return 0;
-}
-
-static int
-evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
-{
- gpio_free(gpio + 7);
- gpio_free(gpio + 6);
- gpio_free(gpio + 5);
- gpio_free(gpio + 3);
- gpio_free(gpio + 2);
- gpio_free(gpio + 1);
- gpio_free(gpio + 0);
- return 0;
-}
-
-static struct pcf857x_platform_data pcf_data_u35 = {
- .gpio_base = PCF_Uxx_BASE(2),
- .setup = evm_u35_setup,
- .teardown = evm_u35_teardown,
-};
-
-/*----------------------------------------------------------------------*/
-
-/* Most of this EEPROM is unused, but U-Boot uses some data:
- * - 0x7f00, 6 bytes Ethernet Address
- * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
- * - ... newer boards may have more
- */
-
-static struct at24_platform_data eeprom_info = {
- .byte_len = (256*1024) / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
-};
-
-/*
- * MSP430 supports RTC, card detection, input from IR remote, and
- * a bit more. It triggers interrupts on GPIO(7) from pressing
- * buttons on the IR remote, and for card detect switches.
- */
-static struct i2c_client *dm6446evm_msp;
-
-static int dm6446evm_msp_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
-{
- dm6446evm_msp = client;
- return 0;
-}
-
-static int dm6446evm_msp_remove(struct i2c_client *client)
-{
- dm6446evm_msp = NULL;
- return 0;
-}
-
-static const struct i2c_device_id dm6446evm_msp_ids[] = {
- { "dm6446evm_msp", 0, },
- { /* end of list */ },
-};
-
-static struct i2c_driver dm6446evm_msp_driver = {
- .driver.name = "dm6446evm_msp",
- .id_table = dm6446evm_msp_ids,
- .probe = dm6446evm_msp_probe,
- .remove = dm6446evm_msp_remove,
-};
-
-static int dm6444evm_msp430_get_pins(void)
-{
- static const char txbuf[2] = { 2, 4, };
- char buf[4];
- struct i2c_msg msg[2] = {
- {
- .flags = 0,
- .len = 2,
- .buf = (void __force *)txbuf,
- },
- {
- .flags = I2C_M_RD,
- .len = 4,
- .buf = buf,
- },
- };
- int status;
-
- if (!dm6446evm_msp)
- return -ENXIO;
-
- msg[0].addr = dm6446evm_msp->addr;
- msg[1].addr = dm6446evm_msp->addr;
-
- /* Command 4 == get input state, returns port 2 and port3 data
- * S Addr W [A] len=2 [A] cmd=4 [A]
- * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
- */
- status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
- if (status < 0)
- return status;
-
- dev_dbg(&dm6446evm_msp->dev,
- "PINS: %02x %02x %02x %02x\n",
- buf[0], buf[1], buf[2], buf[3]);
-
- return (buf[3] << 8) | buf[2];
-}
-
-static int dm6444evm_mmc_get_cd(int module)
-{
- int status = dm6444evm_msp430_get_pins();
-
- return (status < 0) ? status : !(status & BIT(1));
-}
-
-static int dm6444evm_mmc_get_ro(int module)
-{
- int status = dm6444evm_msp430_get_pins();
-
- return (status < 0) ? status : status & BIT(6 + 8);
-}
-
-static struct davinci_mmc_config dm6446evm_mmc_config = {
- .get_cd = dm6444evm_mmc_get_cd,
- .get_ro = dm6444evm_mmc_get_ro,
- .wires = 4,
- .version = MMC_CTLR_VERSION_1
-};
-
-static struct i2c_board_info __initdata i2c_info[] = {
- {
- I2C_BOARD_INFO("dm6446evm_msp", 0x23),
- },
- {
- I2C_BOARD_INFO("pcf8574", 0x38),
- .platform_data = &pcf_data_u2,
- },
- {
- I2C_BOARD_INFO("pcf8574", 0x39),
- .platform_data = &pcf_data_u18,
- },
- {
- I2C_BOARD_INFO("pcf8574", 0x3a),
- .platform_data = &pcf_data_u35,
- },
- {
- I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &eeprom_info,
- },
- {
- I2C_BOARD_INFO("tlv320aic33", 0x1b),
- },
-};
-
-/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
- * which requires 100 usec of idle bus after i2c writes sent to it.
- */
-static struct davinci_i2c_platform_data i2c_pdata = {
- .bus_freq = 20 /* kHz */,
- .bus_delay = 100 /* usec */,
- .sda_pin = 44,
- .scl_pin = 43,
-};
-
-static void __init evm_init_i2c(void)
-{
- davinci_init_i2c(&i2c_pdata);
- i2c_add_driver(&dm6446evm_msp_driver);
- i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
-}
-
-#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
-
-/* venc standard timings */
-static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
- {
- .name = "ntsc",
- .timings_type = VPBE_ENC_STD,
- .std_id = V4L2_STD_525_60,
- .interlaced = 1,
- .xres = 720,
- .yres = 480,
- .aspect = {11, 10},
- .fps = {30000, 1001},
- .left_margin = 0x79,
- .upper_margin = 0x10,
- },
- {
- .name = "pal",
- .timings_type = VPBE_ENC_STD,
- .std_id = V4L2_STD_625_50,
- .interlaced = 1,
- .xres = 720,
- .yres = 576,
- .aspect = {54, 59},
- .fps = {25, 1},
- .left_margin = 0x7e,
- .upper_margin = 0x16,
- },
-};
-
-/* venc dv preset timings */
-static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
- {
- .name = "480p59_94",
- .timings_type = VPBE_ENC_CUSTOM_TIMINGS,
- .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
- .interlaced = 0,
- .xres = 720,
- .yres = 480,
- .aspect = {1, 1},
- .fps = {5994, 100},
- .left_margin = 0x80,
- .upper_margin = 0x20,
- },
- {
- .name = "576p50",
- .timings_type = VPBE_ENC_CUSTOM_TIMINGS,
- .dv_timings = V4L2_DV_BT_CEA_720X576P50,
- .interlaced = 0,
- .xres = 720,
- .yres = 576,
- .aspect = {1, 1},
- .fps = {50, 1},
- .left_margin = 0x7e,
- .upper_margin = 0x30,
- },
-};
-
-/*
- * The outputs available from VPBE + encoders. Keep the order same
- * as that of encoders. First those from venc followed by that from
- * encoders. Index in the output refers to index on a particular encoder.
- * Driver uses this index to pass it to encoder when it supports more
- * than one output. Userspace applications use index of the array to
- * set an output.
- */
-static struct vpbe_output dm644xevm_vpbe_outputs[] = {
- {
- .output = {
- .index = 0,
- .name = "Composite",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .std = VENC_STD_ALL,
- .capabilities = V4L2_OUT_CAP_STD,
- },
- .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
- .default_mode = "ntsc",
- .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
- .modes = dm644xevm_enc_std_timing,
- },
- {
- .output = {
- .index = 1,
- .name = "Component",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
- },
- .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
- .default_mode = "480p59_94",
- .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
- .modes = dm644xevm_enc_preset_timing,
- },
-};
-
-static struct vpbe_config dm644xevm_display_cfg = {
- .module_name = "dm644x-vpbe-display",
- .i2c_adapter_id = 1,
- .osd = {
- .module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
- },
- .venc = {
- .module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
- },
- .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
- .outputs = dm644xevm_vpbe_outputs,
-};
-
-static struct platform_device *davinci_evm_devices[] __initdata = {
- &davinci_fb_device,
- &rtc_dev,
-};
-
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
-
-static void __init
-davinci_evm_map_io(void)
-{
- dm644x_init();
-}
-
-static int davinci_phy_fixup(struct phy_device *phydev)
-{
- unsigned int control;
- /* CRITICAL: Fix for increasing PHY signal drive strength for
- * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
- * signal strength was low causing TX to fail randomly. The
- * fix is to Set bit 11 (Increased MII drive strength) of PHY
- * register 26 (Digital Config register) on this phy. */
- control = phy_read(phydev, 26);
- phy_write(phydev, 26, (control | 0x800));
- return 0;
-}
-
-#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
- defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
-#define HAS_ATA 1
-#else
-#define HAS_ATA 0
-#endif
-
-#if defined(CONFIG_MTD_PHYSMAP) || \
- defined(CONFIG_MTD_PHYSMAP_MODULE)
-#define HAS_NOR 1
-#else
-#define HAS_NOR 0
-#endif
-
-#if defined(CONFIG_MTD_NAND_DAVINCI) || \
- defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
-#define HAS_NAND 1
-#else
-#define HAS_NAND 0
-#endif
-
-static __init void davinci_evm_init(void)
-{
- struct clk *aemif_clk;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- aemif_clk = clk_get(NULL, "aemif");
- clk_prepare_enable(aemif_clk);
-
- if (HAS_ATA) {
- if (HAS_NAND || HAS_NOR)
- pr_warning("WARNING: both IDE and Flash are "
- "enabled, but they share AEMIF pins.\n"
- "\tDisable IDE for NAND/NOR support.\n");
- davinci_init_ide();
- } else if (HAS_NAND || HAS_NOR) {
- davinci_cfg_reg(DM644X_HPIEN_DISABLE);
- davinci_cfg_reg(DM644X_ATAEN_DISABLE);
-
- /* only one device will be jumpered and detected */
- if (HAS_NAND) {
- platform_device_register(&davinci_evm_nandflash_device);
- evm_leds[7].default_trigger = "nand-disk";
- if (HAS_NOR)
- pr_warning("WARNING: both NAND and NOR flash "
- "are enabled; disable one of them.\n");
- } else if (HAS_NOR)
- platform_device_register(&davinci_evm_norflash_device);
- }
-
- platform_add_devices(davinci_evm_devices,
- ARRAY_SIZE(davinci_evm_devices));
- evm_init_i2c();
-
- davinci_setup_mmc(0, &dm6446evm_mmc_config);
- dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
-
- davinci_serial_init(&uart_config);
- dm644x_init_asp(&dm644x_evm_snd_data);
-
- /* irlml6401 switches over 1A, in under 8 msec */
- davinci_setup_usb(1000, 8);
-
- soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
- /* Register the fixup for PHY on DaVinci */
- phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
- davinci_phy_fixup);
-
-}
-
-MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
- /* Maintainer: MontaVista Software <source@mvista.com> */
- .atag_offset = 0x100,
- .map_io = davinci_evm_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = davinci_evm_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
deleted file mode 100644
index de7adff3..00000000
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ /dev/null
@@ -1,838 +0,0 @@
-/*
- * TI DaVinci DM646X EVM board
- *
- * Derived from: arch/arm/mach-davinci/board-evm.c
- * Copyright (C) 2006 Texas Instruments.
- *
- * (C) 2007-2008, MontaVista Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- *
- */
-
-/**************************************************************************
- * Included Files
- **************************************************************************/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/leds.h>
-#include <linux/gpio.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-#include <linux/i2c/at24.h>
-#include <linux/i2c/pcf857x.h>
-
-#include <media/tvp514x.h>
-#include <media/adv7343.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-#include <linux/clk.h>
-#include <linux/export.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/common.h>
-#include <mach/serial.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <mach/clock.h>
-#include <mach/cdce949.h>
-#include <linux/platform_data/mtd-davinci-aemif.h>
-
-#include "davinci.h"
-#include "clock.h"
-
-#define NAND_BLOCK_SIZE SZ_128K
-
-/* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
- * and U-Boot environment this avoids dependency on any particular combination
- * of UBL, U-Boot or flashing tools etc.
- */
-static struct mtd_partition davinci_nand_partitions[] = {
- {
- /* UBL, U-Boot with environment */
- .name = "bootloader",
- .offset = MTDPART_OFS_APPEND,
- .size = 16 * NAND_BLOCK_SIZE,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
- .mask_flags = 0,
- }, {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
-};
-
-static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
- .wsetup = 29,
- .wstrobe = 24,
- .whold = 14,
- .rsetup = 19,
- .rstrobe = 33,
- .rhold = 0,
- .ta = 29,
-};
-
-static struct davinci_nand_pdata davinci_nand_data = {
- .mask_cle = 0x80000,
- .mask_ale = 0x40000,
- .parts = davinci_nand_partitions,
- .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
- .options = 0,
-};
-
-static struct resource davinci_nand_resources[] = {
- {
- .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
- .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
- .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device davinci_nand_device = {
- .name = "davinci_nand",
- .id = 0,
-
- .num_resources = ARRAY_SIZE(davinci_nand_resources),
- .resource = davinci_nand_resources,
-
- .dev = {
- .platform_data = &davinci_nand_data,
- },
-};
-
-#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
- defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
-#define HAS_ATA 1
-#else
-#define HAS_ATA 0
-#endif
-
-/* CPLD Register 0 bits to control ATA */
-#define DM646X_EVM_ATA_RST BIT(0)
-#define DM646X_EVM_ATA_PWD BIT(1)
-
-/* CPLD Register 0 Client: used for I/O Control */
-static int cpld_reg0_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
-{
- if (HAS_ATA) {
- u8 data;
- struct i2c_msg msg[2] = {
- {
- .addr = client->addr,
- .flags = I2C_M_RD,
- .len = 1,
- .buf = &data,
- },
- {
- .addr = client->addr,
- .flags = 0,
- .len = 1,
- .buf = &data,
- },
- };
-
- /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
- i2c_transfer(client->adapter, msg, 1);
- data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
- i2c_transfer(client->adapter, msg + 1, 1);
- }
-
- return 0;
-}
-
-static const struct i2c_device_id cpld_reg_ids[] = {
- { "cpld_reg0", 0, },
- { },
-};
-
-static struct i2c_driver dm6467evm_cpld_driver = {
- .driver.name = "cpld_reg0",
- .id_table = cpld_reg_ids,
- .probe = cpld_reg0_probe,
-};
-
-/* LEDS */
-
-static struct gpio_led evm_leds[] = {
- { .name = "DS1", .active_low = 1, },
- { .name = "DS2", .active_low = 1, },
- { .name = "DS3", .active_low = 1, },
- { .name = "DS4", .active_low = 1, },
-};
-
-static const struct gpio_led_platform_data evm_led_data = {
- .num_leds = ARRAY_SIZE(evm_leds),
- .leds = evm_leds,
-};
-
-static struct platform_device *evm_led_dev;
-
-static int evm_led_setup(struct i2c_client *client, int gpio,
- unsigned int ngpio, void *c)
-{
- struct gpio_led *leds = evm_leds;
- int status;
-
- while (ngpio--) {
- leds->gpio = gpio++;
- leds++;
- }
-
- evm_led_dev = platform_device_alloc("leds-gpio", 0);
- platform_device_add_data(evm_led_dev, &evm_led_data,
- sizeof(evm_led_data));
-
- evm_led_dev->dev.parent = &client->dev;
- status = platform_device_add(evm_led_dev);
- if (status < 0) {
- platform_device_put(evm_led_dev);
- evm_led_dev = NULL;
- }
- return status;
-}
-
-static int evm_led_teardown(struct i2c_client *client, int gpio,
- unsigned ngpio, void *c)
-{
- if (evm_led_dev) {
- platform_device_unregister(evm_led_dev);
- evm_led_dev = NULL;
- }
- return 0;
-}
-
-static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
-
-static int evm_sw_setup(struct i2c_client *client, int gpio,
- unsigned ngpio, void *c)
-{
- int status;
- int i;
- char label[10];
-
- for (i = 0; i < 4; ++i) {
- snprintf(label, 10, "user_sw%d", i);
- status = gpio_request(gpio, label);
- if (status)
- goto out_free;
- evm_sw_gpio[i] = gpio++;
-
- status = gpio_direction_input(evm_sw_gpio[i]);
- if (status) {
- gpio_free(evm_sw_gpio[i]);
- evm_sw_gpio[i] = -EINVAL;
- goto out_free;
- }
-
- status = gpio_export(evm_sw_gpio[i], 0);
- if (status) {
- gpio_free(evm_sw_gpio[i]);
- evm_sw_gpio[i] = -EINVAL;
- goto out_free;
- }
- }
- return status;
-out_free:
- for (i = 0; i < 4; ++i) {
- if (evm_sw_gpio[i] != -EINVAL) {
- gpio_free(evm_sw_gpio[i]);
- evm_sw_gpio[i] = -EINVAL;
- }
- }
- return status;
-}
-
-static int evm_sw_teardown(struct i2c_client *client, int gpio,
- unsigned ngpio, void *c)
-{
- int i;
-
- for (i = 0; i < 4; ++i) {
- if (evm_sw_gpio[i] != -EINVAL) {
- gpio_unexport(evm_sw_gpio[i]);
- gpio_free(evm_sw_gpio[i]);
- evm_sw_gpio[i] = -EINVAL;
- }
- }
- return 0;
-}
-
-static int evm_pcf_setup(struct i2c_client *client, int gpio,
- unsigned int ngpio, void *c)
-{
- int status;
-
- if (ngpio < 8)
- return -EINVAL;
-
- status = evm_sw_setup(client, gpio, 4, c);
- if (status)
- return status;
-
- return evm_led_setup(client, gpio+4, 4, c);
-}
-
-static int evm_pcf_teardown(struct i2c_client *client, int gpio,
- unsigned int ngpio, void *c)
-{
- BUG_ON(ngpio < 8);
-
- evm_sw_teardown(client, gpio, 4, c);
- evm_led_teardown(client, gpio+4, 4, c);
-
- return 0;
-}
-
-static struct pcf857x_platform_data pcf_data = {
- .gpio_base = DAVINCI_N_GPIO+1,
- .setup = evm_pcf_setup,
- .teardown = evm_pcf_teardown,
-};
-
-/* Most of this EEPROM is unused, but U-Boot uses some data:
- * - 0x7f00, 6 bytes Ethernet Address
- * - ... newer boards may have more
- */
-
-static struct at24_platform_data eeprom_info = {
- .byte_len = (256*1024) / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
-};
-
-static u8 dm646x_iis_serializer_direction[] = {
- TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
-};
-
-static u8 dm646x_dit_serializer_direction[] = {
- TX_MODE,
-};
-
-static struct snd_platform_data dm646x_evm_snd_data[] = {
- {
- .tx_dma_offset = 0x400,
- .rx_dma_offset = 0x400,
- .op_mode = DAVINCI_MCASP_IIS_MODE,
- .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
- .tdm_slots = 2,
- .serial_dir = dm646x_iis_serializer_direction,
- .asp_chan_q = EVENTQ_0,
- },
- {
- .tx_dma_offset = 0x400,
- .rx_dma_offset = 0,
- .op_mode = DAVINCI_MCASP_DIT_MODE,
- .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
- .tdm_slots = 32,
- .serial_dir = dm646x_dit_serializer_direction,
- .asp_chan_q = EVENTQ_0,
- },
-};
-
-static struct i2c_client *cpld_client;
-
-static int cpld_video_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
-{
- cpld_client = client;
- return 0;
-}
-
-static int cpld_video_remove(struct i2c_client *client)
-{
- cpld_client = NULL;
- return 0;
-}
-
-static const struct i2c_device_id cpld_video_id[] = {
- { "cpld_video", 0 },
- { }
-};
-
-static struct i2c_driver cpld_video_driver = {
- .driver = {
- .name = "cpld_video",
- },
- .probe = cpld_video_probe,
- .remove = cpld_video_remove,
- .id_table = cpld_video_id,
-};
-
-static void evm_init_cpld(void)
-{
- i2c_add_driver(&cpld_video_driver);
-}
-
-static struct i2c_board_info __initdata i2c_info[] = {
- {
- I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &eeprom_info,
- },
- {
- I2C_BOARD_INFO("pcf8574a", 0x38),
- .platform_data = &pcf_data,
- },
- {
- I2C_BOARD_INFO("cpld_reg0", 0x3a),
- },
- {
- I2C_BOARD_INFO("tlv320aic33", 0x18),
- },
- {
- I2C_BOARD_INFO("cpld_video", 0x3b),
- },
- {
- I2C_BOARD_INFO("cdce949", 0x6c),
- },
-};
-
-static struct davinci_i2c_platform_data i2c_pdata = {
- .bus_freq = 100 /* kHz */,
- .bus_delay = 0 /* usec */,
-};
-
-#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
-#define VCH2CLK_SYSCLK8 (BIT(9))
-#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
-#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
-#define VCH3CLK_SYSCLK8 (BIT(13))
-#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
-
-#define VIDCH2CLK (BIT(10))
-#define VIDCH3CLK (BIT(11))
-#define VIDCH1CLK (BIT(4))
-#define TVP7002_INPUT (BIT(4))
-#define TVP5147_INPUT (~BIT(4))
-#define VPIF_INPUT_ONE_CHANNEL (BIT(5))
-#define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
-#define TVP5147_CH0 "tvp514x-0"
-#define TVP5147_CH1 "tvp514x-1"
-
-/* spin lock for updating above registers */
-static spinlock_t vpif_reg_lock;
-
-static int set_vpif_clock(int mux_mode, int hd)
-{
- unsigned long flags;
- unsigned int value;
- int val = 0;
- int err = 0;
-
- if (!cpld_client)
- return -ENXIO;
-
- /* disable the clock */
- spin_lock_irqsave(&vpif_reg_lock, flags);
- value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
- value |= (VIDCH3CLK | VIDCH2CLK);
- __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
- spin_unlock_irqrestore(&vpif_reg_lock, flags);
-
- val = i2c_smbus_read_byte(cpld_client);
- if (val < 0)
- return val;
-
- if (mux_mode == 1)
- val &= ~0x40;
- else
- val |= 0x40;
-
- err = i2c_smbus_write_byte(cpld_client, val);
- if (err)
- return err;
-
- value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
- value &= ~(VCH2CLK_MASK);
- value &= ~(VCH3CLK_MASK);
-
- if (hd >= 1)
- value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
- else
- value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
-
- __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
-
- spin_lock_irqsave(&vpif_reg_lock, flags);
- value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
- /* enable the clock */
- value &= ~(VIDCH3CLK | VIDCH2CLK);
- __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
- spin_unlock_irqrestore(&vpif_reg_lock, flags);
-
- return 0;
-}
-
-static struct vpif_subdev_info dm646x_vpif_subdev[] = {
- {
- .name = "adv7343",
- .board_info = {
- I2C_BOARD_INFO("adv7343", 0x2a),
- },
- },
- {
- .name = "ths7303",
- .board_info = {
- I2C_BOARD_INFO("ths7303", 0x2c),
- },
- },
-};
-
-static const struct vpif_output dm6467_ch0_outputs[] = {
- {
- .output = {
- .index = 0,
- .name = "Composite",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_STD,
- .std = V4L2_STD_ALL,
- },
- .subdev_name = "adv7343",
- .output_route = ADV7343_COMPOSITE_ID,
- },
- {
- .output = {
- .index = 1,
- .name = "Component",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS,
- },
- .subdev_name = "adv7343",
- .output_route = ADV7343_COMPONENT_ID,
- },
- {
- .output = {
- .index = 2,
- .name = "S-Video",
- .type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_STD,
- .std = V4L2_STD_ALL,
- },
- .subdev_name = "adv7343",
- .output_route = ADV7343_SVIDEO_ID,
- },
-};
-
-static struct vpif_display_config dm646x_vpif_display_config = {
- .set_clock = set_vpif_clock,
- .subdevinfo = dm646x_vpif_subdev,
- .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
- .chan_config[0] = {
- .outputs = dm6467_ch0_outputs,
- .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
- },
- .card_name = "DM646x EVM",
-};
-
-/**
- * setup_vpif_input_path()
- * @channel: channel id (0 - CH0, 1 - CH1)
- * @sub_dev_name: ptr sub device name
- *
- * This will set vpif input to capture data from tvp514x or
- * tvp7002.
- */
-static int setup_vpif_input_path(int channel, const char *sub_dev_name)
-{
- int err = 0;
- int val;
-
- /* for channel 1, we don't do anything */
- if (channel != 0)
- return 0;
-
- if (!cpld_client)
- return -ENXIO;
-
- val = i2c_smbus_read_byte(cpld_client);
- if (val < 0)
- return val;
-
- if (!strcmp(sub_dev_name, TVP5147_CH0) ||
- !strcmp(sub_dev_name, TVP5147_CH1))
- val &= TVP5147_INPUT;
- else
- val |= TVP7002_INPUT;
-
- err = i2c_smbus_write_byte(cpld_client, val);
- if (err)
- return err;
- return 0;
-}
-
-/**
- * setup_vpif_input_channel_mode()
- * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
- *
- * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
- */
-static int setup_vpif_input_channel_mode(int mux_mode)
-{
- unsigned long flags;
- int err = 0;
- int val;
- u32 value;
-
- if (!cpld_client)
- return -ENXIO;
-
- val = i2c_smbus_read_byte(cpld_client);
- if (val < 0)
- return val;
-
- spin_lock_irqsave(&vpif_reg_lock, flags);
- value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
- if (mux_mode) {
- val &= VPIF_INPUT_TWO_CHANNEL;
- value |= VIDCH1CLK;
- } else {
- val |= VPIF_INPUT_ONE_CHANNEL;
- value &= ~VIDCH1CLK;
- }
- __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
- spin_unlock_irqrestore(&vpif_reg_lock, flags);
-
- err = i2c_smbus_write_byte(cpld_client, val);
- if (err)
- return err;
-
- return 0;
-}
-
-static struct tvp514x_platform_data tvp5146_pdata = {
- .clk_polarity = 0,
- .hs_polarity = 1,
- .vs_polarity = 1
-};
-
-#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
-
-static struct vpif_subdev_info vpif_capture_sdev_info[] = {
- {
- .name = TVP5147_CH0,
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5d),
- .platform_data = &tvp5146_pdata,
- },
- },
- {
- .name = TVP5147_CH1,
- .board_info = {
- I2C_BOARD_INFO("tvp5146", 0x5c),
- .platform_data = &tvp5146_pdata,
- },
- },
-};
-
-static const struct vpif_input dm6467_ch0_inputs[] = {
- {
- .input = {
- .index = 0,
- .name = "Composite",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .capabilities = V4L2_IN_CAP_STD,
- .std = TVP514X_STD_ALL,
- },
- .subdev_name = TVP5147_CH0,
- .input_route = INPUT_CVBS_VI2B,
- .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
-};
-
-static const struct vpif_input dm6467_ch1_inputs[] = {
- {
- .input = {
- .index = 0,
- .name = "S-Video",
- .type = V4L2_INPUT_TYPE_CAMERA,
- .capabilities = V4L2_IN_CAP_STD,
- .std = TVP514X_STD_ALL,
- },
- .subdev_name = TVP5147_CH1,
- .input_route = INPUT_SVIDEO_VI2C_VI1C,
- .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
- },
-};
-
-static struct vpif_capture_config dm646x_vpif_capture_cfg = {
- .setup_input_path = setup_vpif_input_path,
- .setup_input_channel_mode = setup_vpif_input_channel_mode,
- .subdev_info = vpif_capture_sdev_info,
- .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
- .chan_config[0] = {
- .inputs = dm6467_ch0_inputs,
- .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
- .vpif_if = {
- .if_type = VPIF_IF_BT656,
- .hd_pol = 1,
- .vd_pol = 1,
- .fid_pol = 0,
- },
- },
- .chan_config[1] = {
- .inputs = dm6467_ch1_inputs,
- .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
- .vpif_if = {
- .if_type = VPIF_IF_BT656,
- .hd_pol = 1,
- .vd_pol = 1,
- .fid_pol = 0,
- },
- },
-};
-
-static void __init evm_init_video(void)
-{
- spin_lock_init(&vpif_reg_lock);
-
- dm646x_setup_vpif(&dm646x_vpif_display_config,
- &dm646x_vpif_capture_cfg);
-}
-
-static void __init evm_init_i2c(void)
-{
- davinci_init_i2c(&i2c_pdata);
- i2c_add_driver(&dm6467evm_cpld_driver);
- i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
- evm_init_cpld();
- evm_init_video();
-}
-
-#define CDCE949_XIN_RATE 27000000
-
-/* CDCE949 support - "lpsc" field is overridden to work as clock number */
-static struct clk cdce_clk_in = {
- .name = "cdce_xin",
- .rate = CDCE949_XIN_RATE,
-};
-
-static struct clk_lookup cdce_clks[] = {
- CLK(NULL, "xin", &cdce_clk_in),
- CLK(NULL, NULL, NULL),
-};
-
-static void __init cdce_clk_init(void)
-{
- struct clk_lookup *c;
- struct clk *clk;
-
- for (c = cdce_clks; c->clk; c++) {
- clk = c->clk;
- clkdev_add(c);
- clk_register(clk);
- }
-}
-
-#define DM6467T_EVM_REF_FREQ 33000000
-
-static void __init davinci_map_io(void)
-{
- dm646x_init();
-
- if (machine_is_davinci_dm6467tevm())
- davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
-
- cdce_clk_init();
-}
-
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
-
-#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
-/*
- * The following EDMA channels/slots are not being used by drivers (for
- * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
- * reserved for codecs on the DSP side.
- */
-static const s16 dm646x_dma_rsv_chans[][2] = {
- /* (offset, number) */
- { 0, 4},
- {13, 3},
- {24, 4},
- {30, 2},
- {54, 3},
- {-1, -1}
-};
-
-static const s16 dm646x_dma_rsv_slots[][2] = {
- /* (offset, number) */
- { 0, 4},
- {13, 3},
- {24, 4},
- {30, 2},
- {54, 3},
- {128, 384},
- {-1, -1}
-};
-
-static struct edma_rsv_info dm646x_edma_rsv[] = {
- {
- .rsv_chans = dm646x_dma_rsv_chans,
- .rsv_slots = dm646x_dma_rsv_slots,
- },
-};
-
-static __init void evm_init(void)
-{
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- evm_init_i2c();
- davinci_serial_init(&uart_config);
- dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
- dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
-
- if (machine_is_davinci_dm6467tevm())
- davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
-
- platform_device_register(&davinci_nand_device);
-
- dm646x_init_edma(dm646x_edma_rsv);
-
- if (HAS_ATA)
- davinci_init_ide();
-
- soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
-}
-
-MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
- .atag_offset = 0x100,
- .map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = evm_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
-
-MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
- .atag_offset = 0x100,
- .map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = evm_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
deleted file mode 100644
index 9549d53a..00000000
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ /dev/null
@@ -1,583 +0,0 @@
-/*
- * Critical Link MityOMAP-L138 SoM
- *
- * Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of
- * any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/regulator/machine.h>
-#include <linux/i2c.h>
-#include <linux/i2c/at24.h>
-#include <linux/etherdevice.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
-
-#include <asm/io.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/common.h>
-#include <mach/cp_intc.h>
-#include <mach/da8xx.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <mach/mux.h>
-#include <linux/platform_data/spi-davinci.h>
-
-#define MITYOMAPL138_PHY_ID ""
-
-#define FACTORY_CONFIG_MAGIC 0x012C0138
-#define FACTORY_CONFIG_VERSION 0x00010001
-
-/* Data Held in On-Board I2C device */
-struct factory_config {
- u32 magic;
- u32 version;
- u8 mac[6];
- u32 fpga_type;
- u32 spare;
- u32 serialnumber;
- char partnum[32];
-};
-
-static struct factory_config factory_config;
-
-struct part_no_info {
- const char *part_no; /* part number string of interest */
- int max_freq; /* khz */
-};
-
-static struct part_no_info mityomapl138_pn_info[] = {
- {
- .part_no = "L138-C",
- .max_freq = 300000,
- },
- {
- .part_no = "L138-D",
- .max_freq = 375000,
- },
- {
- .part_no = "L138-F",
- .max_freq = 456000,
- },
- {
- .part_no = "1808-C",
- .max_freq = 300000,
- },
- {
- .part_no = "1808-D",
- .max_freq = 375000,
- },
- {
- .part_no = "1808-F",
- .max_freq = 456000,
- },
- {
- .part_no = "1810-D",
- .max_freq = 375000,
- },
-};
-
-#ifdef CONFIG_CPU_FREQ
-static void mityomapl138_cpufreq_init(const char *partnum)
-{
- int i, ret;
-
- for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) {
- /*
- * the part number has additional characters beyond what is
- * stored in the table. This information is not needed for
- * determining the speed grade, and would require several
- * more table entries. Only check the first N characters
- * for a match.
- */
- if (!strncmp(partnum, mityomapl138_pn_info[i].part_no,
- strlen(mityomapl138_pn_info[i].part_no))) {
- da850_max_speed = mityomapl138_pn_info[i].max_freq;
- break;
- }
- }
-
- ret = da850_register_cpufreq("pll0_sysclk3");
- if (ret)
- pr_warning("cpufreq registration failed: %d\n", ret);
-}
-#else
-static void mityomapl138_cpufreq_init(const char *partnum) { }
-#endif
-
-static void read_factory_config(struct memory_accessor *a, void *context)
-{
- int ret;
- const char *partnum = NULL;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
- if (ret != sizeof(struct factory_config)) {
- pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
- ret);
- goto bad_config;
- }
-
- if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
- pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
- factory_config.magic);
- goto bad_config;
- }
-
- if (factory_config.version != FACTORY_CONFIG_VERSION) {
- pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
- factory_config.version);
- goto bad_config;
- }
-
- pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
- if (is_valid_ether_addr(factory_config.mac))
- memcpy(soc_info->emac_pdata->mac_addr,
- factory_config.mac, ETH_ALEN);
- else
- pr_warning("MityOMAPL138: Invalid MAC found "
- "in factory config block\n");
-
- partnum = factory_config.partnum;
- pr_info("MityOMAPL138: Part Number = %s\n", partnum);
-
-bad_config:
- /* default maximum speed is valid for all platforms */
- mityomapl138_cpufreq_init(partnum);
-}
-
-static struct at24_platform_data mityomapl138_fd_chip = {
- .byte_len = 256,
- .page_size = 8,
- .flags = AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
- .setup = read_factory_config,
- .context = NULL,
-};
-
-static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = {
- .bus_freq = 100, /* kHz */
- .bus_delay = 0, /* usec */
-};
-
-/* TPS65023 voltage regulator support */
-/* 1.2V Core */
-static struct regulator_consumer_supply tps65023_dcdc1_consumers[] = {
- {
- .supply = "cvdd",
- },
-};
-
-/* 1.8V */
-static struct regulator_consumer_supply tps65023_dcdc2_consumers[] = {
- {
- .supply = "usb0_vdda18",
- },
- {
- .supply = "usb1_vdda18",
- },
- {
- .supply = "ddr_dvdd18",
- },
- {
- .supply = "sata_vddr",
- },
-};
-
-/* 1.2V */
-static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = {
- {
- .supply = "sata_vdd",
- },
- {
- .supply = "usb_cvdd",
- },
- {
- .supply = "pll0_vdda",
- },
- {
- .supply = "pll1_vdda",
- },
-};
-
-/* 1.8V Aux LDO, not used */
-static struct regulator_consumer_supply tps65023_ldo1_consumers[] = {
- {
- .supply = "1.8v_aux",
- },
-};
-
-/* FPGA VCC Aux (2.5 or 3.3) LDO */
-static struct regulator_consumer_supply tps65023_ldo2_consumers[] = {
- {
- .supply = "vccaux",
- },
-};
-
-static struct regulator_init_data tps65023_regulator_data[] = {
- /* dcdc1 */
- {
- .constraints = {
- .min_uV = 1150000,
- .max_uV = 1350000,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS,
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers),
- .consumer_supplies = tps65023_dcdc1_consumers,
- },
- /* dcdc2 */
- {
- .constraints = {
- .min_uV = 1800000,
- .max_uV = 1800000,
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers),
- .consumer_supplies = tps65023_dcdc2_consumers,
- },
- /* dcdc3 */
- {
- .constraints = {
- .min_uV = 1200000,
- .max_uV = 1200000,
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers),
- .consumer_supplies = tps65023_dcdc3_consumers,
- },
- /* ldo1 */
- {
- .constraints = {
- .min_uV = 1800000,
- .max_uV = 1800000,
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers),
- .consumer_supplies = tps65023_ldo1_consumers,
- },
- /* ldo2 */
- {
- .constraints = {
- .min_uV = 2500000,
- .max_uV = 3300000,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
- REGULATOR_CHANGE_STATUS,
- .boot_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers),
- .consumer_supplies = tps65023_ldo2_consumers,
- },
-};
-
-static struct i2c_board_info __initdata mityomap_tps65023_info[] = {
- {
- I2C_BOARD_INFO("tps65023", 0x48),
- .platform_data = &tps65023_regulator_data[0],
- },
- {
- I2C_BOARD_INFO("24c02", 0x50),
- .platform_data = &mityomapl138_fd_chip,
- },
-};
-
-static int __init pmic_tps65023_init(void)
-{
- return i2c_register_board_info(1, mityomap_tps65023_info,
- ARRAY_SIZE(mityomap_tps65023_info));
-}
-
-/*
- * SPI Devices:
- * SPI1_CS0: 8M Flash ST-M25P64-VME6G
- */
-static struct mtd_partition spi_flash_partitions[] = {
- [0] = {
- .name = "ubl",
- .offset = 0,
- .size = SZ_64K,
- .mask_flags = MTD_WRITEABLE,
- },
- [1] = {
- .name = "u-boot",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_512K,
- .mask_flags = MTD_WRITEABLE,
- },
- [2] = {
- .name = "u-boot-env",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_64K,
- .mask_flags = MTD_WRITEABLE,
- },
- [3] = {
- .name = "periph-config",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_64K,
- .mask_flags = MTD_WRITEABLE,
- },
- [4] = {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_256K + SZ_64K,
- },
- [5] = {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_2M + SZ_1M,
- },
- [6] = {
- .name = "fpga",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_2M,
- },
- [7] = {
- .name = "spare",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
-static struct flash_platform_data mityomapl138_spi_flash_data = {
- .name = "m25p80",
- .parts = spi_flash_partitions,
- .nr_parts = ARRAY_SIZE(spi_flash_partitions),
- .type = "m24p64",
-};
-
-static struct davinci_spi_config spi_eprom_config = {
- .io_type = SPI_IO_TYPE_DMA,
- .c2tdelay = 8,
- .t2cdelay = 8,
-};
-
-static struct spi_board_info mityomapl138_spi_flash_info[] = {
- {
- .modalias = "m25p80",
- .platform_data = &mityomapl138_spi_flash_data,
- .controller_data = &spi_eprom_config,
- .mode = SPI_MODE_0,
- .max_speed_hz = 30000000,
- .bus_num = 1,
- .chip_select = 0,
- },
-};
-
-/*
- * MityDSP-L138 includes a 256 MByte large-page NAND flash
- * (128K blocks).
- */
-static struct mtd_partition mityomapl138_nandflash_partition[] = {
- {
- .name = "rootfs",
- .offset = 0,
- .size = SZ_128M,
- .mask_flags = 0, /* MTD_WRITEABLE, */
- },
- {
- .name = "homefs",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- },
-};
-
-static struct davinci_nand_pdata mityomapl138_nandflash_data = {
- .parts = mityomapl138_nandflash_partition,
- .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
- .bbt_options = NAND_BBT_USE_FLASH,
- .options = NAND_BUSWIDTH_16,
- .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
-};
-
-static struct resource mityomapl138_nandflash_resource[] = {
- {
- .start = DA8XX_AEMIF_CS3_BASE,
- .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = DA8XX_AEMIF_CTL_BASE,
- .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device mityomapl138_nandflash_device = {
- .name = "davinci_nand",
- .id = 1,
- .dev = {
- .platform_data = &mityomapl138_nandflash_data,
- },
- .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource),
- .resource = mityomapl138_nandflash_resource,
-};
-
-static struct platform_device *mityomapl138_devices[] __initdata = {
- &mityomapl138_nandflash_device,
-};
-
-static void __init mityomapl138_setup_nand(void)
-{
- platform_add_devices(mityomapl138_devices,
- ARRAY_SIZE(mityomapl138_devices));
-}
-
-static struct davinci_uart_config mityomapl138_uart_config __initdata = {
- .enabled_uarts = 0x7,
-};
-
-static const short mityomap_mii_pins[] = {
- DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
- DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
- DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
- DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
- DA850_MDIO_D,
- -1
-};
-
-static const short mityomap_rmii_pins[] = {
- DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
- DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
- DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
- DA850_MDIO_D,
- -1
-};
-
-static void __init mityomapl138_config_emac(void)
-{
- void __iomem *cfg_chip3_base;
- int ret;
- u32 val;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */
-
- cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
- val = __raw_readl(cfg_chip3_base);
-
- if (soc_info->emac_pdata->rmii_en) {
- val |= BIT(8);
- ret = davinci_cfg_reg_list(mityomap_rmii_pins);
- pr_info("RMII PHY configured\n");
- } else {
- val &= ~BIT(8);
- ret = davinci_cfg_reg_list(mityomap_mii_pins);
- pr_info("MII PHY configured\n");
- }
-
- if (ret) {
- pr_warning("mii/rmii mux setup failed: %d\n", ret);
- return;
- }
-
- /* configure the CFGCHIP3 register for RMII or MII */
- __raw_writel(val, cfg_chip3_base);
-
- soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID;
-
- ret = da8xx_register_emac();
- if (ret)
- pr_warning("emac registration failed: %d\n", ret);
-}
-
-static struct davinci_pm_config da850_pm_pdata = {
- .sleepcount = 128,
-};
-
-static struct platform_device da850_pm_device = {
- .name = "pm-davinci",
- .dev = {
- .platform_data = &da850_pm_pdata,
- },
- .id = -1,
-};
-
-static void __init mityomapl138_init(void)
-{
- int ret;
-
- /* for now, no special EDMA channels are reserved */
- ret = da850_register_edma(NULL);
- if (ret)
- pr_warning("edma registration failed: %d\n", ret);
-
- ret = da8xx_register_watchdog();
- if (ret)
- pr_warning("watchdog registration failed: %d\n", ret);
-
- davinci_serial_init(&mityomapl138_uart_config);
-
- ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
- if (ret)
- pr_warning("i2c0 registration failed: %d\n", ret);
-
- ret = pmic_tps65023_init();
- if (ret)
- pr_warning("TPS65023 PMIC init failed: %d\n", ret);
-
- mityomapl138_setup_nand();
-
- ret = spi_register_board_info(mityomapl138_spi_flash_info,
- ARRAY_SIZE(mityomapl138_spi_flash_info));
- if (ret)
- pr_warn("spi info registration failed: %d\n", ret);
-
- ret = da8xx_register_spi_bus(1,
- ARRAY_SIZE(mityomapl138_spi_flash_info));
- if (ret)
- pr_warning("spi 1 registration failed: %d\n", ret);
-
- mityomapl138_config_emac();
-
- ret = da8xx_register_rtc();
- if (ret)
- pr_warning("rtc setup failed: %d\n", ret);
-
- ret = da8xx_register_cpuidle();
- if (ret)
- pr_warning("cpuidle registration failed: %d\n", ret);
-
- ret = da850_register_pm(&da850_pm_device);
- if (ret)
- pr_warning("da850_evm_init: suspend registration failed: %d\n",
- ret);
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static int __init mityomapl138_console_init(void)
-{
- if (!machine_is_mityomapl138())
- return 0;
-
- return add_preferred_console("ttyS", 1, "115200");
-}
-console_initcall(mityomapl138_console_init);
-#endif
-
-static void __init mityomapl138_map_io(void)
-{
- da850_init();
-}
-
-MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
- .atag_offset = 0x100,
- .map_io = mityomapl138_map_io,
- .init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
- .init_machine = mityomapl138_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = da8xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
deleted file mode 100644
index 1c981075..00000000
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * Neuros Technologies OSD2 board support
- *
- * Modified from original 644X-EVM board support.
- * 2008 (c) Neuros Technology, LLC.
- * 2009 (c) Jorge Luis Zapata Muga <jorgeluis.zapata@gmail.com>
- * 2009 (c) Andrey A. Porodko <Andrey.Porodko@gmail.com>
- *
- * The Neuros OSD 2.0 is the hardware component of the Neuros Open
- * Internet Television Platform. Hardware is very close to TI
- * DM644X-EVM board. It has:
- * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
- * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
- * Additionally realtime clock, IR remote control receiver,
- * IR Blaster based on MSP430 (firmware although is different
- * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
- * with PATA interface, two muxed red-green leds.
- *
- * For more information please refer to
- * http://wiki.neurostechnology.com/index.php/OSD_2.0_HD
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/common.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
-#include <mach/mux.h>
-#include <linux/platform_data/mtd-davinci.h>
-#include <linux/platform_data/mmc-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
-
-#include "davinci.h"
-
-#define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
-#define LXT971_PHY_ID 0x001378e2
-#define LXT971_PHY_MASK 0xfffffff0
-
-#define NTOSD2_AUDIOSOC_I2C_ADDR 0x18
-#define NTOSD2_MSP430_I2C_ADDR 0x59
-#define NTOSD2_MSP430_IRQ 2
-
-/* Neuros OSD2 has a Samsung 256 MByte NAND flash (Dev ID of 0xAA,
- * 2048 blocks in the device, 64 pages per block, 2048 bytes per
- * page.
- */
-
-#define NAND_BLOCK_SIZE SZ_128K
-
-static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
- {
- /* UBL (a few copies) plus U-Boot */
- .name = "bootloader",
- .offset = 0,
- .size = 15 * NAND_BLOCK_SIZE,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- /* U-Boot environment */
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 1 * NAND_BLOCK_SIZE,
- .mask_flags = 0,
- }, {
- /* Kernel */
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4M,
- .mask_flags = 0,
- }, {
- /* File System */
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
- /* A few blocks at end hold a flash Bad Block Table. */
-};
-
-static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
- .parts = davinci_ntosd2_nandflash_partition,
- .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
- .bbt_options = NAND_BBT_USE_FLASH,
-};
-
-static struct resource davinci_ntosd2_nandflash_resource[] = {
- {
- .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
- .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device davinci_ntosd2_nandflash_device = {
- .name = "davinci_nand",
- .id = 0,
- .dev = {
- .platform_data = &davinci_ntosd2_nandflash_data,
- },
- .num_resources = ARRAY_SIZE(davinci_ntosd2_nandflash_resource),
- .resource = davinci_ntosd2_nandflash_resource,
-};
-
-static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device davinci_fb_device = {
- .name = "davincifb",
- .id = -1,
- .dev = {
- .dma_mask = &davinci_fb_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = 0,
-};
-
-static struct snd_platform_data dm644x_ntosd2_snd_data;
-
-static struct gpio_led ntosd2_leds[] = {
- { .name = "led1_green", .gpio = GPIO(10), },
- { .name = "led1_red", .gpio = GPIO(11), },
- { .name = "led2_green", .gpio = GPIO(12), },
- { .name = "led2_red", .gpio = GPIO(13), },
-};
-
-static struct gpio_led_platform_data ntosd2_leds_data = {
- .num_leds = ARRAY_SIZE(ntosd2_leds),
- .leds = ntosd2_leds,
-};
-
-static struct platform_device ntosd2_leds_dev = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &ntosd2_leds_data,
- },
-};
-
-
-static struct platform_device *davinci_ntosd2_devices[] __initdata = {
- &davinci_fb_device,
- &ntosd2_leds_dev,
-};
-
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
-
-static void __init davinci_ntosd2_map_io(void)
-{
- dm644x_init();
-}
-
-static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
- .wires = 4,
- .version = MMC_CTLR_VERSION_1
-};
-
-
-#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
- defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
-#define HAS_ATA 1
-#else
-#define HAS_ATA 0
-#endif
-
-#if defined(CONFIG_MTD_NAND_DAVINCI) || \
- defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
-#define HAS_NAND 1
-#else
-#define HAS_NAND 0
-#endif
-
-static __init void davinci_ntosd2_init(void)
-{
- struct clk *aemif_clk;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- aemif_clk = clk_get(NULL, "aemif");
- clk_prepare_enable(aemif_clk);
-
- if (HAS_ATA) {
- if (HAS_NAND)
- pr_warning("WARNING: both IDE and Flash are "
- "enabled, but they share AEMIF pins.\n"
- "\tDisable IDE for NAND/NOR support.\n");
- davinci_init_ide();
- } else if (HAS_NAND) {
- davinci_cfg_reg(DM644X_HPIEN_DISABLE);
- davinci_cfg_reg(DM644X_ATAEN_DISABLE);
-
- /* only one device will be jumpered and detected */
- if (HAS_NAND)
- platform_device_register(
- &davinci_ntosd2_nandflash_device);
- }
-
- platform_add_devices(davinci_ntosd2_devices,
- ARRAY_SIZE(davinci_ntosd2_devices));
-
- davinci_serial_init(&uart_config);
- dm644x_init_asp(&dm644x_ntosd2_snd_data);
-
- soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
-
- davinci_setup_usb(1000, 8);
- /*
- * Mux the pins to be GPIOs, VLYNQEN is already done at startup.
- * The AEAWx are five new AEAW pins that can be muxed by separately.
- * They are a bitmask for GPIO management. According TI
- * documentation (http://www.ti.com/lit/gpn/tms320dm6446) to employ
- * gpio(10,11,12,13) for leds any combination of bits works except
- * four last. So we are to reset all five.
- */
- davinci_cfg_reg(DM644X_AEAW0);
- davinci_cfg_reg(DM644X_AEAW1);
- davinci_cfg_reg(DM644X_AEAW2);
- davinci_cfg_reg(DM644X_AEAW3);
- davinci_cfg_reg(DM644X_AEAW4);
-
- davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
-}
-
-MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
- /* Maintainer: Neuros Technologies <neuros@groups.google.com> */
- .atag_offset = 0x100,
- .map_io = davinci_ntosd2_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = davinci_ntosd2_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
deleted file mode 100644
index 5a2bd44d..00000000
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/*
- * Hawkboard.org based on TI's OMAP-L138 Platform
- *
- * Initial code: Syed Mohammed Khasim
- *
- * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of
- * any kind, whether express or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/gpio.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/cp_intc.h>
-#include <mach/da8xx.h>
-#include <mach/mux.h>
-
-#define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
-#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
-#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
-
-#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
-#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
-
-static short omapl138_hawk_mii_pins[] __initdata = {
- DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
- DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
- DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
- DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
- DA850_MDIO_D,
- -1
-};
-
-static __init void omapl138_hawk_config_emac(void)
-{
- void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
- int ret;
- u32 val;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- val = __raw_readl(cfgchip3);
- val &= ~BIT(8);
- ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins);
- if (ret) {
- pr_warn("%s: CPGMAC/MII mux setup failed: %d\n", __func__, ret);
- return;
- }
-
- /* configure the CFGCHIP3 register for MII */
- __raw_writel(val, cfgchip3);
- pr_info("EMAC: MII PHY configured\n");
-
- soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID;
-
- ret = da8xx_register_emac();
- if (ret)
- pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
-}
-
-/*
- * The following EDMA channels/slots are not being used by drivers (for
- * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
- * hence they are being reserved for codecs on the DSP side.
- */
-static const s16 da850_dma0_rsv_chans[][2] = {
- /* (offset, number) */
- { 8, 6},
- {24, 4},
- {30, 2},
- {-1, -1}
-};
-
-static const s16 da850_dma0_rsv_slots[][2] = {
- /* (offset, number) */
- { 8, 6},
- {24, 4},
- {30, 50},
- {-1, -1}
-};
-
-static const s16 da850_dma1_rsv_chans[][2] = {
- /* (offset, number) */
- { 0, 28},
- {30, 2},
- {-1, -1}
-};
-
-static const s16 da850_dma1_rsv_slots[][2] = {
- /* (offset, number) */
- { 0, 28},
- {30, 90},
- {-1, -1}
-};
-
-static struct edma_rsv_info da850_edma_cc0_rsv = {
- .rsv_chans = da850_dma0_rsv_chans,
- .rsv_slots = da850_dma0_rsv_slots,
-};
-
-static struct edma_rsv_info da850_edma_cc1_rsv = {
- .rsv_chans = da850_dma1_rsv_chans,
- .rsv_slots = da850_dma1_rsv_slots,
-};
-
-static struct edma_rsv_info *da850_edma_rsv[2] = {
- &da850_edma_cc0_rsv,
- &da850_edma_cc1_rsv,
-};
-
-static const short hawk_mmcsd0_pins[] = {
- DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
- DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
- DA850_GPIO3_12, DA850_GPIO3_13,
- -1
-};
-
-static int da850_hawk_mmc_get_ro(int index)
-{
- return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN);
-}
-
-static int da850_hawk_mmc_get_cd(int index)
-{
- return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN);
-}
-
-static struct davinci_mmc_config da850_mmc_config = {
- .get_ro = da850_hawk_mmc_get_ro,
- .get_cd = da850_hawk_mmc_get_cd,
- .wires = 4,
- .max_freq = 50000000,
- .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
- .version = MMC_CTLR_VERSION_2,
-};
-
-static __init void omapl138_hawk_mmc_init(void)
-{
- int ret;
-
- ret = davinci_cfg_reg_list(hawk_mmcsd0_pins);
- if (ret) {
- pr_warn("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret);
- return;
- }
-
- ret = gpio_request_one(DA850_HAWK_MMCSD_CD_PIN,
- GPIOF_DIR_IN, "MMC CD");
- if (ret < 0) {
- pr_warn("%s: can not open GPIO %d\n",
- __func__, DA850_HAWK_MMCSD_CD_PIN);
- return;
- }
-
- ret = gpio_request_one(DA850_HAWK_MMCSD_WP_PIN,
- GPIOF_DIR_IN, "MMC WP");
- if (ret < 0) {
- pr_warn("%s: can not open GPIO %d\n",
- __func__, DA850_HAWK_MMCSD_WP_PIN);
- goto mmc_setup_wp_fail;
- }
-
- ret = da8xx_register_mmcsd0(&da850_mmc_config);
- if (ret) {
- pr_warn("%s: MMC/SD0 registration failed: %d\n", __func__, ret);
- goto mmc_setup_mmcsd_fail;
- }
-
- return;
-
-mmc_setup_mmcsd_fail:
- gpio_free(DA850_HAWK_MMCSD_WP_PIN);
-mmc_setup_wp_fail:
- gpio_free(DA850_HAWK_MMCSD_CD_PIN);
-}
-
-static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id);
-static da8xx_ocic_handler_t hawk_usb_ocic_handler;
-
-static const short da850_hawk_usb11_pins[] = {
- DA850_GPIO2_4, DA850_GPIO6_13,
- -1
-};
-
-static int hawk_usb_set_power(unsigned port, int on)
-{
- gpio_set_value(DA850_USB1_VBUS_PIN, on);
- return 0;
-}
-
-static int hawk_usb_get_power(unsigned port)
-{
- return gpio_get_value(DA850_USB1_VBUS_PIN);
-}
-
-static int hawk_usb_get_oci(unsigned port)
-{
- return !gpio_get_value(DA850_USB1_OC_PIN);
-}
-
-static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler)
-{
- int irq = gpio_to_irq(DA850_USB1_OC_PIN);
- int error = 0;
-
- if (handler != NULL) {
- hawk_usb_ocic_handler = handler;
-
- error = request_irq(irq, omapl138_hawk_usb_ocic_irq,
- IRQF_DISABLED | IRQF_TRIGGER_RISING |
- IRQF_TRIGGER_FALLING,
- "OHCI over-current indicator", NULL);
- if (error)
- pr_err("%s: could not request IRQ to watch "
- "over-current indicator changes\n", __func__);
- } else {
- free_irq(irq, NULL);
- }
- return error;
-}
-
-static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
- .set_power = hawk_usb_set_power,
- .get_power = hawk_usb_get_power,
- .get_oci = hawk_usb_get_oci,
- .ocic_notify = hawk_usb_ocic_notify,
- /* TPS2087 switch @ 5V */
- .potpgt = (3 + 1) / 2, /* 3 ms max */
-};
-
-static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
-{
- hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1);
- return IRQ_HANDLED;
-}
-
-static __init void omapl138_hawk_usb_init(void)
-{
- int ret;
- u32 cfgchip2;
-
- ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
- if (ret) {
- pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
- return;
- }
-
- /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */
-
- cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
- cfgchip2 &= ~CFGCHIP2_REFFREQ;
- cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
- __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
- ret = gpio_request_one(DA850_USB1_VBUS_PIN,
- GPIOF_DIR_OUT, "USB1 VBUS");
- if (ret < 0) {
- pr_err("%s: failed to request GPIO for USB 1.1 port "
- "power control: %d\n", __func__, ret);
- return;
- }
-
- ret = gpio_request_one(DA850_USB1_OC_PIN,
- GPIOF_DIR_IN, "USB1 OC");
- if (ret < 0) {
- pr_err("%s: failed to request GPIO for USB 1.1 port "
- "over-current indicator: %d\n", __func__, ret);
- goto usb11_setup_oc_fail;
- }
-
- ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
- if (ret) {
- pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
- goto usb11_setup_fail;
- }
-
- return;
-
-usb11_setup_fail:
- gpio_free(DA850_USB1_OC_PIN);
-usb11_setup_oc_fail:
- gpio_free(DA850_USB1_VBUS_PIN);
-}
-
-static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
- .enabled_uarts = 0x7,
-};
-
-static __init void omapl138_hawk_init(void)
-{
- int ret;
-
- davinci_serial_init(&omapl138_hawk_uart_config);
-
- omapl138_hawk_config_emac();
-
- ret = da850_register_edma(da850_edma_rsv);
- if (ret)
- pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
-
- omapl138_hawk_mmc_init();
-
- omapl138_hawk_usb_init();
-
- ret = da8xx_register_watchdog();
- if (ret)
- pr_warn("%s: watchdog registration failed: %d\n",
- __func__, ret);
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static int __init omapl138_hawk_console_init(void)
-{
- if (!machine_is_omapl138_hawkboard())
- return 0;
-
- return add_preferred_console("ttyS", 2, "115200");
-}
-console_initcall(omapl138_hawk_console_init);
-#endif
-
-static void __init omapl138_hawk_map_io(void)
-{
- da850_init();
-}
-
-MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
- .atag_offset = 0x100,
- .map_io = omapl138_hawk_map_io,
- .init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
- .init_machine = omapl138_hawk_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = da8xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
deleted file mode 100644
index 739be7e7..00000000
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * Lyrtech SFFSDR board support.
- *
- * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
- * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
- *
- * Based on DV-EVM platform, original copyright follows:
- *
- * Copyright (C) 2007 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-#include <linux/i2c/at24.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-
-#include <mach/common.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
-#include <mach/mux.h>
-#include <linux/platform_data/usb-davinci.h>
-
-#include "davinci.h"
-
-#define SFFSDR_PHY_ID "davinci_mdio-0:01"
-static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
- /* U-Boot Environment: Block 0
- * UBL: Block 1
- * U-Boot: Blocks 6-7 (256 kb)
- * Integrity Kernel: Blocks 8-31 (3 Mb)
- * Integrity Data: Blocks 100-END
- */
- {
- .name = "Linux Kernel",
- .offset = 32 * SZ_128K,
- .size = 16 * SZ_128K, /* 2 Mb */
- .mask_flags = MTD_WRITEABLE, /* Force read-only */
- },
- {
- .name = "Linux ROOT",
- .offset = MTDPART_OFS_APPEND,
- .size = 256 * SZ_128K, /* 32 Mb */
- .mask_flags = 0, /* R/W */
- },
-};
-
-static struct flash_platform_data davinci_sffsdr_nandflash_data = {
- .parts = davinci_sffsdr_nandflash_partition,
- .nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition),
-};
-
-static struct resource davinci_sffsdr_nandflash_resource[] = {
- {
- .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
- .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device davinci_sffsdr_nandflash_device = {
- .name = "davinci_nand", /* Name of driver */
- .id = 0,
- .dev = {
- .platform_data = &davinci_sffsdr_nandflash_data,
- },
- .num_resources = ARRAY_SIZE(davinci_sffsdr_nandflash_resource),
- .resource = davinci_sffsdr_nandflash_resource,
-};
-
-static struct at24_platform_data eeprom_info = {
- .byte_len = (64*1024) / 8,
- .page_size = 32,
- .flags = AT24_FLAG_ADDR16,
-};
-
-static struct i2c_board_info __initdata i2c_info[] = {
- {
- I2C_BOARD_INFO("24lc64", 0x50),
- .platform_data = &eeprom_info,
- },
- /* Other I2C devices:
- * MSP430, addr 0x23 (not used)
- * PCA9543, addr 0x70 (setup done by U-Boot)
- * ADS7828, addr 0x48 (ADC for voltage monitoring.)
- */
-};
-
-static struct davinci_i2c_platform_data i2c_pdata = {
- .bus_freq = 20 /* kHz */,
- .bus_delay = 100 /* usec */,
-};
-
-static void __init sffsdr_init_i2c(void)
-{
- davinci_init_i2c(&i2c_pdata);
- i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
-}
-
-static struct platform_device *davinci_sffsdr_devices[] __initdata = {
- &davinci_sffsdr_nandflash_device,
-};
-
-static struct davinci_uart_config uart_config __initdata = {
- .enabled_uarts = (1 << 0),
-};
-
-static void __init davinci_sffsdr_map_io(void)
-{
- dm644x_init();
-}
-
-static __init void davinci_sffsdr_init(void)
-{
- struct davinci_soc_info *soc_info = &davinci_soc_info;
-
- platform_add_devices(davinci_sffsdr_devices,
- ARRAY_SIZE(davinci_sffsdr_devices));
- sffsdr_init_i2c();
- davinci_serial_init(&uart_config);
- soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID;
- davinci_setup_usb(0, 0); /* We support only peripheral mode. */
-
- /* mux VLYNQ pins */
- davinci_cfg_reg(DM644X_VLYNQEN);
- davinci_cfg_reg(DM644X_VLYNQWD);
-}
-
-MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
- /* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
- .atag_offset = 0x100,
- .map_io = davinci_sffsdr_map_io,
- .init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
- .init_machine = davinci_sffsdr_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = davinci_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
deleted file mode 100644
index 4f416023..00000000
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ /dev/null
@@ -1,288 +0,0 @@
-/*
- * Texas Instruments TNETV107X EVM Board Support
- *
- * Copyright (C) 2010 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/dma-mapping.h>
-#include <linux/interrupt.h>
-#include <linux/gpio.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/ratelimit.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/input.h>
-#include <linux/input/matrix_keypad.h>
-#include <linux/spi/spi.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/irqs.h>
-#include <mach/edma.h>
-#include <mach/mux.h>
-#include <mach/cp_intc.h>
-#include <mach/tnetv107x.h>
-
-#define EVM_MMC_WP_GPIO 21
-#define EVM_MMC_CD_GPIO 24
-#define EVM_SPI_CS_GPIO 54
-
-static int initialize_gpio(int gpio, char *desc)
-{
- int ret;
-
- ret = gpio_request(gpio, desc);
- if (ret < 0) {
- pr_err_ratelimited("cannot open %s gpio\n", desc);
- return -ENOSYS;
- }
- gpio_direction_input(gpio);
- return gpio;
-}
-
-static int mmc_get_cd(int index)
-{
- static int gpio;
-
- if (!gpio)
- gpio = initialize_gpio(EVM_MMC_CD_GPIO, "mmc card detect");
-
- if (gpio < 0)
- return gpio;
-
- return gpio_get_value(gpio) ? 0 : 1;
-}
-
-static int mmc_get_ro(int index)
-{
- static int gpio;
-
- if (!gpio)
- gpio = initialize_gpio(EVM_MMC_WP_GPIO, "mmc write protect");
-
- if (gpio < 0)
- return gpio;
-
- return gpio_get_value(gpio) ? 1 : 0;
-}
-
-static struct davinci_mmc_config mmc_config = {
- .get_cd = mmc_get_cd,
- .get_ro = mmc_get_ro,
- .wires = 4,
- .max_freq = 50000000,
- .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
- .version = MMC_CTLR_VERSION_1,
-};
-
-static const short sdio1_pins[] __initconst = {
- TNETV107X_SDIO1_CLK_1, TNETV107X_SDIO1_CMD_1,
- TNETV107X_SDIO1_DATA0_1, TNETV107X_SDIO1_DATA1_1,
- TNETV107X_SDIO1_DATA2_1, TNETV107X_SDIO1_DATA3_1,
- TNETV107X_GPIO21, TNETV107X_GPIO24,
- -1
-};
-
-static const short uart1_pins[] __initconst = {
- TNETV107X_UART1_RD, TNETV107X_UART1_TD,
- -1
-};
-
-static const short ssp_pins[] __initconst = {
- TNETV107X_SSP0_0, TNETV107X_SSP0_1, TNETV107X_SSP0_2,
- TNETV107X_SSP1_0, TNETV107X_SSP1_1, TNETV107X_SSP1_2,
- TNETV107X_SSP1_3, -1
-};
-
-static struct mtd_partition nand_partitions[] = {
- /* bootloader (U-Boot, etc) in first 12 sectors */
- {
- .name = "bootloader",
- .offset = 0,
- .size = (12*SZ_128K),
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- /* bootloader params in the next sector */
- {
- .name = "params",
- .offset = MTDPART_OFS_NXTBLK,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- /* kernel */
- {
- .name = "kernel",
- .offset = MTDPART_OFS_NXTBLK,
- .size = SZ_4M,
- .mask_flags = 0,
- },
- /* file system */
- {
- .name = "filesystem",
- .offset = MTDPART_OFS_NXTBLK,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = 0,
- }
-};
-
-static struct davinci_nand_pdata nand_config = {
- .mask_cle = 0x4000,
- .mask_ale = 0x2000,
- .parts = nand_partitions,
- .nr_parts = ARRAY_SIZE(nand_partitions),
- .ecc_mode = NAND_ECC_HW,
- .bbt_options = NAND_BBT_USE_FLASH,
- .ecc_bits = 1,
-};
-
-static struct davinci_uart_config serial_config __initconst = {
- .enabled_uarts = BIT(1),
-};
-
-static const uint32_t keymap[] = {
- KEY(0, 0, KEY_NUMERIC_1),
- KEY(0, 1, KEY_NUMERIC_2),
- KEY(0, 2, KEY_NUMERIC_3),
- KEY(0, 3, KEY_FN_F1),
- KEY(0, 4, KEY_MENU),
-
- KEY(1, 0, KEY_NUMERIC_4),
- KEY(1, 1, KEY_NUMERIC_5),
- KEY(1, 2, KEY_NUMERIC_6),
- KEY(1, 3, KEY_UP),
- KEY(1, 4, KEY_FN_F2),
-
- KEY(2, 0, KEY_NUMERIC_7),
- KEY(2, 1, KEY_NUMERIC_8),
- KEY(2, 2, KEY_NUMERIC_9),
- KEY(2, 3, KEY_LEFT),
- KEY(2, 4, KEY_ENTER),
-
- KEY(3, 0, KEY_NUMERIC_STAR),
- KEY(3, 1, KEY_NUMERIC_0),
- KEY(3, 2, KEY_NUMERIC_POUND),
- KEY(3, 3, KEY_DOWN),
- KEY(3, 4, KEY_RIGHT),
-
- KEY(4, 0, KEY_FN_F3),
- KEY(4, 1, KEY_FN_F4),
- KEY(4, 2, KEY_MUTE),
- KEY(4, 3, KEY_HOME),
- KEY(4, 4, KEY_BACK),
-
- KEY(5, 0, KEY_VOLUMEDOWN),
- KEY(5, 1, KEY_VOLUMEUP),
- KEY(5, 2, KEY_F1),
- KEY(5, 3, KEY_F2),
- KEY(5, 4, KEY_F3),
-};
-
-static const struct matrix_keymap_data keymap_data = {
- .keymap = keymap,
- .keymap_size = ARRAY_SIZE(keymap),
-};
-
-static struct matrix_keypad_platform_data keypad_config = {
- .keymap_data = &keymap_data,
- .num_row_gpios = 6,
- .num_col_gpios = 5,
- .debounce_ms = 0, /* minimum */
- .active_low = 0, /* pull up realization */
- .no_autorepeat = 0,
-};
-
-static void spi_select_device(int cs)
-{
- static int gpio;
-
- if (!gpio) {
- int ret;
- ret = gpio_request(EVM_SPI_CS_GPIO, "spi chipsel");
- if (ret < 0) {
- pr_err("cannot open spi chipsel gpio\n");
- gpio = -ENOSYS;
- return;
- } else {
- gpio = EVM_SPI_CS_GPIO;
- gpio_direction_output(gpio, 0);
- }
- }
-
- if (gpio < 0)
- return;
-
- return gpio_set_value(gpio, cs ? 1 : 0);
-}
-
-static struct ti_ssp_spi_data spi_master_data = {
- .num_cs = 2,
- .select = spi_select_device,
- .iosel = SSP_PIN_SEL(0, SSP_CLOCK) | SSP_PIN_SEL(1, SSP_DATA) |
- SSP_PIN_SEL(2, SSP_CHIPSEL) | SSP_PIN_SEL(3, SSP_IN) |
- SSP_INPUT_SEL(3),
-};
-
-static struct ti_ssp_data ssp_config = {
- .out_clock = 250 * 1000,
- .dev_data = {
- [1] = {
- .dev_name = "ti-ssp-spi",
- .pdata = &spi_master_data,
- .pdata_size = sizeof(spi_master_data),
- },
- },
-};
-
-static struct tnetv107x_device_info evm_device_info __initconst = {
- .serial_config = &serial_config,
- .mmc_config[1] = &mmc_config, /* controller 1 */
- .nand_config[0] = &nand_config, /* chip select 0 */
- .keypad_config = &keypad_config,
- .ssp_config = &ssp_config,
-};
-
-static struct spi_board_info spi_info[] __initconst = {
-};
-
-static __init void tnetv107x_evm_board_init(void)
-{
- davinci_cfg_reg_list(sdio1_pins);
- davinci_cfg_reg_list(uart1_pins);
- davinci_cfg_reg_list(ssp_pins);
-
- tnetv107x_devices_init(&evm_device_info);
-
- spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static int __init tnetv107x_evm_console_init(void)
-{
- return add_preferred_console("ttyS", 0, "115200");
-}
-console_initcall(tnetv107x_evm_console_init);
-#endif
-
-MACHINE_START(TNETV107X, "TNETV107X EVM")
- .atag_offset = 0x100,
- .map_io = tnetv107x_init,
- .init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
- .init_machine = tnetv107x_evm_board_init,
- .init_late = davinci_init_late,
- .dma_zone_size = SZ_128M,
- .restart = tnetv107x_restart,
-MACHINE_END
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index d458558e..dc9a470f 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -35,19 +35,26 @@ static void __clk_enable(struct clk *clk)
{
if (clk->parent)
__clk_enable(clk->parent);
- if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
- davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
- true, clk->flags);
+ if (clk->usecount++ == 0) {
+ if (clk->flags & CLK_PSC)
+ davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
+ true, clk->flags);
+ else if (clk->clk_enable)
+ clk->clk_enable(clk);
+ }
}
static void __clk_disable(struct clk *clk)
{
if (WARN_ON(clk->usecount == 0))
return;
- if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) &&
- (clk->flags & CLK_PSC))
- davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
- false, clk->flags);
+ if (--clk->usecount == 0) {
+ if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
+ davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
+ false, clk->flags);
+ else if (clk->clk_disable)
+ clk->clk_disable(clk);
+ }
if (clk->parent)
__clk_disable(clk->parent);
}
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 8694b395..1e4e8361 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -104,6 +104,8 @@ struct clk {
int (*set_rate) (struct clk *clk, unsigned long rate);
int (*round_rate) (struct clk *clk, unsigned long rate);
int (*reset) (struct clk *clk, bool reset);
+ void (*clk_enable) (struct clk *clk);
+ void (*clk_disable) (struct clk *clk);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
deleted file mode 100644
index 678a54a6..00000000
--- a/arch/arm/mach-davinci/da830.c
+++ /dev/null
@@ -1,1212 +0,0 @@
-/*
- * TI DA830/OMAP L137 chip specific setup
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2009 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/psc.h>
-#include <mach/irqs.h>
-#include <mach/cputype.h>
-#include <mach/common.h>
-#include <mach/time.h>
-#include <mach/da8xx.h>
-#include <mach/gpio-davinci.h>
-
-#include "clock.h"
-#include "mux.h"
-
-/* Offsets of the 8 compare registers on the da830 */
-#define DA830_CMP12_0 0x60
-#define DA830_CMP12_1 0x64
-#define DA830_CMP12_2 0x68
-#define DA830_CMP12_3 0x6c
-#define DA830_CMP12_4 0x70
-#define DA830_CMP12_5 0x74
-#define DA830_CMP12_6 0x78
-#define DA830_CMP12_7 0x7c
-
-#define DA830_REF_FREQ 24000000
-
-static struct pll_data pll0_data = {
- .num = 1,
- .phys_base = DA8XX_PLL0_BASE,
- .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
- .name = "ref_clk",
- .rate = DA830_REF_FREQ,
-};
-
-static struct clk pll0_clk = {
- .name = "pll0",
- .parent = &ref_clk,
- .pll_data = &pll0_data,
- .flags = CLK_PLL,
-};
-
-static struct clk pll0_aux_clk = {
- .name = "pll0_aux_clk",
- .parent = &pll0_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk2 = {
- .name = "pll0_sysclk2",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
- .name = "pll0_sysclk3",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
-};
-
-static struct clk pll0_sysclk4 = {
- .name = "pll0_sysclk4",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
- .name = "pll0_sysclk5",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
- .name = "pll0_sysclk6",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
- .name = "pll0_sysclk7",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV7,
-};
-
-static struct clk i2c0_clk = {
- .name = "i2c0",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
- .name = "timer0",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
- .name = "timer1",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk arm_rom_clk = {
- .name = "arm_rom",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk scr0_ss_clk = {
- .name = "scr0_ss",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_SCR0_SS,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk scr1_ss_clk = {
- .name = "scr1_ss",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_SCR1_SS,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk scr2_ss_clk = {
- .name = "scr2_ss",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_SCR2_SS,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk dmax_clk = {
- .name = "dmax",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_PRUSS,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc_clk = {
- .name = "tpcc",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPCC,
- .flags = ALWAYS_ENABLED | CLK_PSC,
-};
-
-static struct clk tptc0_clk = {
- .name = "tptc0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPTC0,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tptc1_clk = {
- .name = "tptc1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPTC1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk mmcsd_clk = {
- .name = "mmcsd",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_MMC_SD,
-};
-
-static struct clk uart0_clk = {
- .name = "uart0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_UART0,
-};
-
-static struct clk uart1_clk = {
- .name = "uart1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_UART1,
- .gpsc = 1,
-};
-
-static struct clk uart2_clk = {
- .name = "uart2",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_UART2,
- .gpsc = 1,
-};
-
-static struct clk spi0_clk = {
- .name = "spi0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_SPI0,
-};
-
-static struct clk spi1_clk = {
- .name = "spi1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_SPI1,
- .gpsc = 1,
-};
-
-static struct clk ecap0_clk = {
- .name = "ecap0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_ECAP,
- .gpsc = 1,
-};
-
-static struct clk ecap1_clk = {
- .name = "ecap1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_ECAP,
- .gpsc = 1,
-};
-
-static struct clk ecap2_clk = {
- .name = "ecap2",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_ECAP,
- .gpsc = 1,
-};
-
-static struct clk pwm0_clk = {
- .name = "pwm0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_PWM,
- .gpsc = 1,
-};
-
-static struct clk pwm1_clk = {
- .name = "pwm1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_PWM,
- .gpsc = 1,
-};
-
-static struct clk pwm2_clk = {
- .name = "pwm2",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_PWM,
- .gpsc = 1,
-};
-
-static struct clk eqep0_clk = {
- .name = "eqep0",
- .parent = &pll0_sysclk2,
- .lpsc = DA830_LPSC1_EQEP,
- .gpsc = 1,
-};
-
-static struct clk eqep1_clk = {
- .name = "eqep1",
- .parent = &pll0_sysclk2,
- .lpsc = DA830_LPSC1_EQEP,
- .gpsc = 1,
-};
-
-static struct clk lcdc_clk = {
- .name = "lcdc",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_LCDC,
- .gpsc = 1,
-};
-
-static struct clk mcasp0_clk = {
- .name = "mcasp0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_McASP0,
- .gpsc = 1,
-};
-
-static struct clk mcasp1_clk = {
- .name = "mcasp1",
- .parent = &pll0_sysclk2,
- .lpsc = DA830_LPSC1_McASP1,
- .gpsc = 1,
-};
-
-static struct clk mcasp2_clk = {
- .name = "mcasp2",
- .parent = &pll0_sysclk2,
- .lpsc = DA830_LPSC1_McASP2,
- .gpsc = 1,
-};
-
-static struct clk usb20_clk = {
- .name = "usb20",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_USB20,
- .gpsc = 1,
-};
-
-static struct clk aemif_clk = {
- .name = "aemif",
- .parent = &pll0_sysclk3,
- .lpsc = DA8XX_LPSC0_EMIF25,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk aintc_clk = {
- .name = "aintc",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC0_AINTC,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk secu_mgr_clk = {
- .name = "secu_mgr",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC0_SECU_MGR,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk emac_clk = {
- .name = "emac",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_CPGMAC,
- .gpsc = 1,
-};
-
-static struct clk gpio_clk = {
- .name = "gpio",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_GPIO,
- .gpsc = 1,
-};
-
-static struct clk i2c1_clk = {
- .name = "i2c1",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_I2C,
- .gpsc = 1,
-};
-
-static struct clk usb11_clk = {
- .name = "usb11",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_USB11,
- .gpsc = 1,
-};
-
-static struct clk emif3_clk = {
- .name = "emif3",
- .parent = &pll0_sysclk5,
- .lpsc = DA8XX_LPSC1_EMIF3C,
- .gpsc = 1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk arm_clk = {
- .name = "arm",
- .parent = &pll0_sysclk6,
- .lpsc = DA8XX_LPSC0_ARM,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk rmii_clk = {
- .name = "rmii",
- .parent = &pll0_sysclk7,
-};
-
-static struct clk_lookup da830_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("watchdog", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "scr0_ss", &scr0_ss_clk),
- CLK(NULL, "scr1_ss", &scr1_ss_clk),
- CLK(NULL, "scr2_ss", &scr2_ss_clk),
- CLK(NULL, "dmax", &dmax_clk),
- CLK(NULL, "tpcc", &tpcc_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK(NULL, "ecap0", &ecap0_clk),
- CLK(NULL, "ecap1", &ecap1_clk),
- CLK(NULL, "ecap2", &ecap2_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK("eqep.0", NULL, &eqep0_clk),
- CLK("eqep.1", NULL, &eqep1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
- CLK(NULL, "usb20", &usb20_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "secu_mgr", &secu_mgr_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "usb11", &usb11_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK(NULL, NULL, NULL),
-};
-
-/*
- * Device specific mux setup
- *
- * soc description mux mode mode mux dbg
- * reg offset mask mode
- */
-static const struct mux_config da830_pins[] = {
-#ifdef CONFIG_DAVINCI_MUX
- MUX_CFG(DA830, GPIO7_14, 0, 0, 0xf, 1, false)
- MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false)
- MUX_CFG(DA830, EMB_SDCKE, 0, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_CLK_GLUE, 0, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_CLK, 0, 12, 0xf, 2, false)
- MUX_CFG(DA830, NEMB_CS_0, 0, 16, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_CAS, 0, 20, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_RAS, 0, 24, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_WE, 0, 28, 0xf, 1, false)
- MUX_CFG(DA830, EMB_BA_1, 1, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMB_BA_0, 1, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_0, 1, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_1, 1, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_2, 1, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_3, 1, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_4, 1, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_5, 1, 28, 0xf, 1, false)
- MUX_CFG(DA830, GPIO7_0, 1, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_1, 1, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_2, 1, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_3, 1, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_4, 1, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_5, 1, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_6, 1, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_7, 1, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMB_A_6, 2, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_7, 2, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_8, 2, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_9, 2, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_10, 2, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_11, 2, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMB_A_12, 2, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_31, 2, 28, 0xf, 1, false)
- MUX_CFG(DA830, GPIO7_8, 2, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_9, 2, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_10, 2, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_11, 2, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_12, 2, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO7_13, 2, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_13, 2, 24, 0xf, 8, false)
- MUX_CFG(DA830, EMB_D_30, 3, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_29, 3, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_28, 3, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_27, 3, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_26, 3, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_25, 3, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_24, 3, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_23, 3, 28, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_22, 4, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_21, 4, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_20, 4, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_19, 4, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_18, 4, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_17, 4, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_16, 4, 24, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_WE_DQM_3, 4, 28, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_WE_DQM_2, 5, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_0, 5, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_1, 5, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_2, 5, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_3, 5, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_4, 5, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_5, 5, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_6, 5, 28, 0xf, 1, false)
- MUX_CFG(DA830, GPIO6_0, 5, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_1, 5, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_2, 5, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_3, 5, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_4, 5, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_5, 5, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_6, 5, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMB_D_7, 6, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_8, 6, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_9, 6, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_10, 6, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_11, 6, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_12, 6, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_13, 6, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMB_D_14, 6, 28, 0xf, 1, false)
- MUX_CFG(DA830, GPIO6_7, 6, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_8, 6, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_9, 6, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_10, 6, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_11, 6, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_12, 6, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_13, 6, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO6_14, 6, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMB_D_15, 7, 0, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_WE_DQM_1, 7, 4, 0xf, 1, false)
- MUX_CFG(DA830, NEMB_WE_DQM_0, 7, 8, 0xf, 1, false)
- MUX_CFG(DA830, SPI0_SOMI_0, 7, 12, 0xf, 1, false)
- MUX_CFG(DA830, SPI0_SIMO_0, 7, 16, 0xf, 1, false)
- MUX_CFG(DA830, SPI0_CLK, 7, 20, 0xf, 1, false)
- MUX_CFG(DA830, NSPI0_ENA, 7, 24, 0xf, 1, false)
- MUX_CFG(DA830, NSPI0_SCS_0, 7, 28, 0xf, 1, false)
- MUX_CFG(DA830, EQEP0I, 7, 12, 0xf, 2, false)
- MUX_CFG(DA830, EQEP0S, 7, 16, 0xf, 2, false)
- MUX_CFG(DA830, EQEP1I, 7, 20, 0xf, 2, false)
- MUX_CFG(DA830, NUART0_CTS, 7, 24, 0xf, 2, false)
- MUX_CFG(DA830, NUART0_RTS, 7, 28, 0xf, 2, false)
- MUX_CFG(DA830, EQEP0A, 7, 24, 0xf, 4, false)
- MUX_CFG(DA830, EQEP0B, 7, 28, 0xf, 4, false)
- MUX_CFG(DA830, GPIO6_15, 7, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_14, 7, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_15, 7, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_0, 7, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_1, 7, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_2, 7, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_3, 7, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_4, 7, 28, 0xf, 8, false)
- MUX_CFG(DA830, SPI1_SOMI_0, 8, 0, 0xf, 1, false)
- MUX_CFG(DA830, SPI1_SIMO_0, 8, 4, 0xf, 1, false)
- MUX_CFG(DA830, SPI1_CLK, 8, 8, 0xf, 1, false)
- MUX_CFG(DA830, UART0_RXD, 8, 12, 0xf, 1, false)
- MUX_CFG(DA830, UART0_TXD, 8, 16, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_10, 8, 20, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_11, 8, 24, 0xf, 1, false)
- MUX_CFG(DA830, NSPI1_ENA, 8, 28, 0xf, 1, false)
- MUX_CFG(DA830, I2C1_SCL, 8, 0, 0xf, 2, false)
- MUX_CFG(DA830, I2C1_SDA, 8, 4, 0xf, 2, false)
- MUX_CFG(DA830, EQEP1S, 8, 8, 0xf, 2, false)
- MUX_CFG(DA830, I2C0_SDA, 8, 12, 0xf, 2, false)
- MUX_CFG(DA830, I2C0_SCL, 8, 16, 0xf, 2, false)
- MUX_CFG(DA830, UART2_RXD, 8, 28, 0xf, 2, false)
- MUX_CFG(DA830, TM64P0_IN12, 8, 12, 0xf, 4, false)
- MUX_CFG(DA830, TM64P0_OUT12, 8, 16, 0xf, 4, false)
- MUX_CFG(DA830, GPIO5_5, 8, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_6, 8, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_7, 8, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_8, 8, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_9, 8, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_10, 8, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_11, 8, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO5_12, 8, 28, 0xf, 8, false)
- MUX_CFG(DA830, NSPI1_SCS_0, 9, 0, 0xf, 1, false)
- MUX_CFG(DA830, USB0_DRVVBUS, 9, 4, 0xf, 1, false)
- MUX_CFG(DA830, AHCLKX0, 9, 8, 0xf, 1, false)
- MUX_CFG(DA830, ACLKX0, 9, 12, 0xf, 1, false)
- MUX_CFG(DA830, AFSX0, 9, 16, 0xf, 1, false)
- MUX_CFG(DA830, AHCLKR0, 9, 20, 0xf, 1, false)
- MUX_CFG(DA830, ACLKR0, 9, 24, 0xf, 1, false)
- MUX_CFG(DA830, AFSR0, 9, 28, 0xf, 1, false)
- MUX_CFG(DA830, UART2_TXD, 9, 0, 0xf, 2, false)
- MUX_CFG(DA830, AHCLKX2, 9, 8, 0xf, 2, false)
- MUX_CFG(DA830, ECAP0_APWM0, 9, 12, 0xf, 2, false)
- MUX_CFG(DA830, RMII_MHZ_50_CLK, 9, 20, 0xf, 2, false)
- MUX_CFG(DA830, ECAP1_APWM1, 9, 24, 0xf, 2, false)
- MUX_CFG(DA830, USB_REFCLKIN, 9, 8, 0xf, 4, false)
- MUX_CFG(DA830, GPIO5_13, 9, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_15, 9, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_11, 9, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_12, 9, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_13, 9, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_14, 9, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_15, 9, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_12, 9, 28, 0xf, 8, false)
- MUX_CFG(DA830, AMUTE0, 10, 0, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_0, 10, 4, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_1, 10, 8, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_2, 10, 12, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_3, 10, 16, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_4, 10, 20, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_5, 10, 24, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_6, 10, 28, 0xf, 1, false)
- MUX_CFG(DA830, RMII_TXD_0, 10, 4, 0xf, 2, false)
- MUX_CFG(DA830, RMII_TXD_1, 10, 8, 0xf, 2, false)
- MUX_CFG(DA830, RMII_TXEN, 10, 12, 0xf, 2, false)
- MUX_CFG(DA830, RMII_CRS_DV, 10, 16, 0xf, 2, false)
- MUX_CFG(DA830, RMII_RXD_0, 10, 20, 0xf, 2, false)
- MUX_CFG(DA830, RMII_RXD_1, 10, 24, 0xf, 2, false)
- MUX_CFG(DA830, RMII_RXER, 10, 28, 0xf, 2, false)
- MUX_CFG(DA830, AFSR2, 10, 4, 0xf, 4, false)
- MUX_CFG(DA830, ACLKX2, 10, 8, 0xf, 4, false)
- MUX_CFG(DA830, AXR2_3, 10, 12, 0xf, 4, false)
- MUX_CFG(DA830, AXR2_2, 10, 16, 0xf, 4, false)
- MUX_CFG(DA830, AXR2_1, 10, 20, 0xf, 4, false)
- MUX_CFG(DA830, AFSX2, 10, 24, 0xf, 4, false)
- MUX_CFG(DA830, ACLKR2, 10, 28, 0xf, 4, false)
- MUX_CFG(DA830, NRESETOUT, 10, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_0, 10, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_1, 10, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_2, 10, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_3, 10, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_4, 10, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_5, 10, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_6, 10, 28, 0xf, 8, false)
- MUX_CFG(DA830, AXR0_7, 11, 0, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_8, 11, 4, 0xf, 1, false)
- MUX_CFG(DA830, UART1_RXD, 11, 8, 0xf, 1, false)
- MUX_CFG(DA830, UART1_TXD, 11, 12, 0xf, 1, false)
- MUX_CFG(DA830, AXR0_11, 11, 16, 0xf, 1, false)
- MUX_CFG(DA830, AHCLKX1, 11, 20, 0xf, 1, false)
- MUX_CFG(DA830, ACLKX1, 11, 24, 0xf, 1, false)
- MUX_CFG(DA830, AFSX1, 11, 28, 0xf, 1, false)
- MUX_CFG(DA830, MDIO_CLK, 11, 0, 0xf, 2, false)
- MUX_CFG(DA830, MDIO_D, 11, 4, 0xf, 2, false)
- MUX_CFG(DA830, AXR0_9, 11, 8, 0xf, 2, false)
- MUX_CFG(DA830, AXR0_10, 11, 12, 0xf, 2, false)
- MUX_CFG(DA830, EPWM0B, 11, 20, 0xf, 2, false)
- MUX_CFG(DA830, EPWM0A, 11, 24, 0xf, 2, false)
- MUX_CFG(DA830, EPWMSYNCI, 11, 28, 0xf, 2, false)
- MUX_CFG(DA830, AXR2_0, 11, 16, 0xf, 4, false)
- MUX_CFG(DA830, EPWMSYNC0, 11, 28, 0xf, 4, false)
- MUX_CFG(DA830, GPIO3_7, 11, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_8, 11, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_9, 11, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_10, 11, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_11, 11, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_14, 11, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO3_15, 11, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_10, 11, 28, 0xf, 8, false)
- MUX_CFG(DA830, AHCLKR1, 12, 0, 0xf, 1, false)
- MUX_CFG(DA830, ACLKR1, 12, 4, 0xf, 1, false)
- MUX_CFG(DA830, AFSR1, 12, 8, 0xf, 1, false)
- MUX_CFG(DA830, AMUTE1, 12, 12, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_0, 12, 16, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_1, 12, 20, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_2, 12, 24, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_3, 12, 28, 0xf, 1, false)
- MUX_CFG(DA830, ECAP2_APWM2, 12, 4, 0xf, 2, false)
- MUX_CFG(DA830, EHRPWMGLUETZ, 12, 12, 0xf, 2, false)
- MUX_CFG(DA830, EQEP1A, 12, 28, 0xf, 2, false)
- MUX_CFG(DA830, GPIO4_11, 12, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_12, 12, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_13, 12, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_14, 12, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_0, 12, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_1, 12, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_2, 12, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_3, 12, 28, 0xf, 8, false)
- MUX_CFG(DA830, AXR1_4, 13, 0, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_5, 13, 4, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_6, 13, 8, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_7, 13, 12, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_8, 13, 16, 0xf, 1, false)
- MUX_CFG(DA830, AXR1_9, 13, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_0, 13, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_1, 13, 28, 0xf, 1, false)
- MUX_CFG(DA830, EQEP1B, 13, 0, 0xf, 2, false)
- MUX_CFG(DA830, EPWM2B, 13, 4, 0xf, 2, false)
- MUX_CFG(DA830, EPWM2A, 13, 8, 0xf, 2, false)
- MUX_CFG(DA830, EPWM1B, 13, 12, 0xf, 2, false)
- MUX_CFG(DA830, EPWM1A, 13, 16, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_0, 13, 24, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_1, 13, 28, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_0, 13, 24, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HD_1, 13, 28, 0xf, 4, false)
- MUX_CFG(DA830, GPIO4_4, 13, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_5, 13, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_6, 13, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_7, 13, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_8, 13, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO4_9, 13, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_0, 13, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_1, 13, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMA_D_2, 14, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_3, 14, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_4, 14, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_5, 14, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_6, 14, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_7, 14, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_8, 14, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_9, 14, 28, 0xf, 1, false)
- MUX_CFG(DA830, MMCSD_DAT_2, 14, 0, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_3, 14, 4, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_4, 14, 8, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_5, 14, 12, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_6, 14, 16, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_DAT_7, 14, 20, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_8, 14, 24, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_9, 14, 28, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_2, 14, 0, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HD_3, 14, 4, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HD_4, 14, 8, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HD_5, 14, 12, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HD_6, 14, 16, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HD_7, 14, 20, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_8, 14, 24, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_9, 14, 28, 0xf, 4, false)
- MUX_CFG(DA830, GPIO0_2, 14, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_3, 14, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_4, 14, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_5, 14, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_6, 14, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_7, 14, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_8, 14, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_9, 14, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMA_D_10, 15, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_11, 15, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_12, 15, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_13, 15, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_14, 15, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMA_D_15, 15, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_0, 15, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_1, 15, 28, 0xf, 1, false)
- MUX_CFG(DA830, UHPI_HD_10, 15, 0, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_11, 15, 4, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_12, 15, 8, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_13, 15, 12, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_14, 15, 16, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HD_15, 15, 20, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_7, 15, 24, 0xf, 2, false)
- MUX_CFG(DA830, MMCSD_CLK, 15, 28, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_10, 15, 0, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_11, 15, 4, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_12, 15, 8, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_13, 15, 12, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_14, 15, 16, 0xf, 4, false)
- MUX_CFG(DA830, LCD_D_15, 15, 20, 0xf, 4, false)
- MUX_CFG(DA830, UHPI_HCNTL0, 15, 28, 0xf, 4, false)
- MUX_CFG(DA830, GPIO0_10, 15, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_11, 15, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_12, 15, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_13, 15, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_14, 15, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO0_15, 15, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_0, 15, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_1, 15, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMA_A_2, 16, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_3, 16, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_4, 16, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_5, 16, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_6, 16, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_7, 16, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_8, 16, 24, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_9, 16, 28, 0xf, 1, false)
- MUX_CFG(DA830, MMCSD_CMD, 16, 0, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_6, 16, 4, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_3, 16, 8, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_2, 16, 12, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_1, 16, 16, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_0, 16, 20, 0xf, 2, false)
- MUX_CFG(DA830, LCD_PCLK, 16, 24, 0xf, 2, false)
- MUX_CFG(DA830, LCD_HSYNC, 16, 28, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HCNTL1, 16, 0, 0xf, 4, false)
- MUX_CFG(DA830, GPIO1_2, 16, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_3, 16, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_4, 16, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_5, 16, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_6, 16, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_7, 16, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_8, 16, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_9, 16, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMA_A_10, 17, 0, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_11, 17, 4, 0xf, 1, false)
- MUX_CFG(DA830, EMA_A_12, 17, 8, 0xf, 1, false)
- MUX_CFG(DA830, EMA_BA_1, 17, 12, 0xf, 1, false)
- MUX_CFG(DA830, EMA_BA_0, 17, 16, 0xf, 1, false)
- MUX_CFG(DA830, EMA_CLK, 17, 20, 0xf, 1, false)
- MUX_CFG(DA830, EMA_SDCKE, 17, 24, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_CAS, 17, 28, 0xf, 1, false)
- MUX_CFG(DA830, LCD_VSYNC, 17, 0, 0xf, 2, false)
- MUX_CFG(DA830, NLCD_AC_ENB_CS, 17, 4, 0xf, 2, false)
- MUX_CFG(DA830, LCD_MCLK, 17, 8, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_5, 17, 12, 0xf, 2, false)
- MUX_CFG(DA830, LCD_D_4, 17, 16, 0xf, 2, false)
- MUX_CFG(DA830, OBSCLK, 17, 20, 0xf, 2, false)
- MUX_CFG(DA830, NEMA_CS_4, 17, 28, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HHWIL, 17, 12, 0xf, 4, false)
- MUX_CFG(DA830, AHCLKR2, 17, 20, 0xf, 4, false)
- MUX_CFG(DA830, GPIO1_10, 17, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_11, 17, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_12, 17, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_13, 17, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_14, 17, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO1_15, 17, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_0, 17, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_1, 17, 28, 0xf, 8, false)
- MUX_CFG(DA830, NEMA_RAS, 18, 0, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_WE, 18, 4, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_CS_0, 18, 8, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_CS_2, 18, 12, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_CS_3, 18, 16, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_OE, 18, 20, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_WE_DQM_1, 18, 24, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_WE_DQM_0, 18, 28, 0xf, 1, false)
- MUX_CFG(DA830, NEMA_CS_5, 18, 0, 0xf, 2, false)
- MUX_CFG(DA830, UHPI_HRNW, 18, 4, 0xf, 2, false)
- MUX_CFG(DA830, NUHPI_HAS, 18, 8, 0xf, 2, false)
- MUX_CFG(DA830, NUHPI_HCS, 18, 12, 0xf, 2, false)
- MUX_CFG(DA830, NUHPI_HDS1, 18, 20, 0xf, 2, false)
- MUX_CFG(DA830, NUHPI_HDS2, 18, 24, 0xf, 2, false)
- MUX_CFG(DA830, NUHPI_HINT, 18, 28, 0xf, 2, false)
- MUX_CFG(DA830, AXR0_12, 18, 4, 0xf, 4, false)
- MUX_CFG(DA830, AMUTE2, 18, 16, 0xf, 4, false)
- MUX_CFG(DA830, AXR0_13, 18, 20, 0xf, 4, false)
- MUX_CFG(DA830, AXR0_14, 18, 24, 0xf, 4, false)
- MUX_CFG(DA830, AXR0_15, 18, 28, 0xf, 4, false)
- MUX_CFG(DA830, GPIO2_2, 18, 0, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_3, 18, 4, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_4, 18, 8, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_5, 18, 12, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_6, 18, 16, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_7, 18, 20, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_8, 18, 24, 0xf, 8, false)
- MUX_CFG(DA830, GPIO2_9, 18, 28, 0xf, 8, false)
- MUX_CFG(DA830, EMA_WAIT_0, 19, 0, 0xf, 1, false)
- MUX_CFG(DA830, NUHPI_HRDY, 19, 0, 0xf, 2, false)
- MUX_CFG(DA830, GPIO2_10, 19, 0, 0xf, 8, false)
-#endif
-};
-
-const short da830_emif25_pins[] __initconst = {
- DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
- DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
- DA830_EMA_D_8, DA830_EMA_D_9, DA830_EMA_D_10, DA830_EMA_D_11,
- DA830_EMA_D_12, DA830_EMA_D_13, DA830_EMA_D_14, DA830_EMA_D_15,
- DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
- DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
- DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
- DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_EMA_CLK,
- DA830_EMA_SDCKE, DA830_NEMA_CS_4, DA830_NEMA_CS_5, DA830_NEMA_WE,
- DA830_NEMA_CS_0, DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE,
- DA830_NEMA_WE_DQM_1, DA830_NEMA_WE_DQM_0, DA830_EMA_WAIT_0,
- -1
-};
-
-const short da830_spi0_pins[] __initconst = {
- DA830_SPI0_SOMI_0, DA830_SPI0_SIMO_0, DA830_SPI0_CLK, DA830_NSPI0_ENA,
- DA830_NSPI0_SCS_0,
- -1
-};
-
-const short da830_spi1_pins[] __initconst = {
- DA830_SPI1_SOMI_0, DA830_SPI1_SIMO_0, DA830_SPI1_CLK, DA830_NSPI1_ENA,
- DA830_NSPI1_SCS_0,
- -1
-};
-
-const short da830_mmc_sd_pins[] __initconst = {
- DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
- DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
- DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
- DA830_MMCSD_CMD,
- -1
-};
-
-const short da830_uart0_pins[] __initconst = {
- DA830_NUART0_CTS, DA830_NUART0_RTS, DA830_UART0_RXD, DA830_UART0_TXD,
- -1
-};
-
-const short da830_uart1_pins[] __initconst = {
- DA830_UART1_RXD, DA830_UART1_TXD,
- -1
-};
-
-const short da830_uart2_pins[] __initconst = {
- DA830_UART2_RXD, DA830_UART2_TXD,
- -1
-};
-
-const short da830_usb20_pins[] __initconst = {
- DA830_USB0_DRVVBUS, DA830_USB_REFCLKIN,
- -1
-};
-
-const short da830_usb11_pins[] __initconst = {
- DA830_USB_REFCLKIN,
- -1
-};
-
-const short da830_uhpi_pins[] __initconst = {
- DA830_UHPI_HD_0, DA830_UHPI_HD_1, DA830_UHPI_HD_2, DA830_UHPI_HD_3,
- DA830_UHPI_HD_4, DA830_UHPI_HD_5, DA830_UHPI_HD_6, DA830_UHPI_HD_7,
- DA830_UHPI_HD_8, DA830_UHPI_HD_9, DA830_UHPI_HD_10, DA830_UHPI_HD_11,
- DA830_UHPI_HD_12, DA830_UHPI_HD_13, DA830_UHPI_HD_14, DA830_UHPI_HD_15,
- DA830_UHPI_HCNTL0, DA830_UHPI_HCNTL1, DA830_UHPI_HHWIL, DA830_UHPI_HRNW,
- DA830_NUHPI_HAS, DA830_NUHPI_HCS, DA830_NUHPI_HDS1, DA830_NUHPI_HDS2,
- DA830_NUHPI_HINT, DA830_NUHPI_HRDY,
- -1
-};
-
-const short da830_cpgmac_pins[] __initconst = {
- DA830_RMII_TXD_0, DA830_RMII_TXD_1, DA830_RMII_TXEN, DA830_RMII_CRS_DV,
- DA830_RMII_RXD_0, DA830_RMII_RXD_1, DA830_RMII_RXER, DA830_MDIO_CLK,
- DA830_MDIO_D,
- -1
-};
-
-const short da830_emif3c_pins[] __initconst = {
- DA830_EMB_SDCKE, DA830_EMB_CLK_GLUE, DA830_EMB_CLK, DA830_NEMB_CS_0,
- DA830_NEMB_CAS, DA830_NEMB_RAS, DA830_NEMB_WE, DA830_EMB_BA_1,
- DA830_EMB_BA_0, DA830_EMB_A_0, DA830_EMB_A_1, DA830_EMB_A_2,
- DA830_EMB_A_3, DA830_EMB_A_4, DA830_EMB_A_5, DA830_EMB_A_6,
- DA830_EMB_A_7, DA830_EMB_A_8, DA830_EMB_A_9, DA830_EMB_A_10,
- DA830_EMB_A_11, DA830_EMB_A_12, DA830_NEMB_WE_DQM_3,
- DA830_NEMB_WE_DQM_2, DA830_EMB_D_0, DA830_EMB_D_1, DA830_EMB_D_2,
- DA830_EMB_D_3, DA830_EMB_D_4, DA830_EMB_D_5, DA830_EMB_D_6,
- DA830_EMB_D_7, DA830_EMB_D_8, DA830_EMB_D_9, DA830_EMB_D_10,
- DA830_EMB_D_11, DA830_EMB_D_12, DA830_EMB_D_13, DA830_EMB_D_14,
- DA830_EMB_D_15, DA830_EMB_D_16, DA830_EMB_D_17, DA830_EMB_D_18,
- DA830_EMB_D_19, DA830_EMB_D_20, DA830_EMB_D_21, DA830_EMB_D_22,
- DA830_EMB_D_23, DA830_EMB_D_24, DA830_EMB_D_25, DA830_EMB_D_26,
- DA830_EMB_D_27, DA830_EMB_D_28, DA830_EMB_D_29, DA830_EMB_D_30,
- DA830_EMB_D_31, DA830_NEMB_WE_DQM_1, DA830_NEMB_WE_DQM_0,
- -1
-};
-
-const short da830_mcasp0_pins[] __initconst = {
- DA830_AHCLKX0, DA830_ACLKX0, DA830_AFSX0,
- DA830_AHCLKR0, DA830_ACLKR0, DA830_AFSR0, DA830_AMUTE0,
- DA830_AXR0_0, DA830_AXR0_1, DA830_AXR0_2, DA830_AXR0_3,
- DA830_AXR0_4, DA830_AXR0_5, DA830_AXR0_6, DA830_AXR0_7,
- DA830_AXR0_8, DA830_AXR0_9, DA830_AXR0_10, DA830_AXR0_11,
- DA830_AXR0_12, DA830_AXR0_13, DA830_AXR0_14, DA830_AXR0_15,
- -1
-};
-
-const short da830_mcasp1_pins[] __initconst = {
- DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1,
- DA830_AHCLKR1, DA830_ACLKR1, DA830_AFSR1, DA830_AMUTE1,
- DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_3,
- DA830_AXR1_4, DA830_AXR1_5, DA830_AXR1_6, DA830_AXR1_7,
- DA830_AXR1_8, DA830_AXR1_9, DA830_AXR1_10, DA830_AXR1_11,
- -1
-};
-
-const short da830_mcasp2_pins[] __initconst = {
- DA830_AHCLKX2, DA830_ACLKX2, DA830_AFSX2,
- DA830_AHCLKR2, DA830_ACLKR2, DA830_AFSR2, DA830_AMUTE2,
- DA830_AXR2_0, DA830_AXR2_1, DA830_AXR2_2, DA830_AXR2_3,
- -1
-};
-
-const short da830_i2c0_pins[] __initconst = {
- DA830_I2C0_SDA, DA830_I2C0_SCL,
- -1
-};
-
-const short da830_i2c1_pins[] __initconst = {
- DA830_I2C1_SCL, DA830_I2C1_SDA,
- -1
-};
-
-const short da830_lcdcntl_pins[] __initconst = {
- DA830_LCD_D_0, DA830_LCD_D_1, DA830_LCD_D_2, DA830_LCD_D_3,
- DA830_LCD_D_4, DA830_LCD_D_5, DA830_LCD_D_6, DA830_LCD_D_7,
- DA830_LCD_D_8, DA830_LCD_D_9, DA830_LCD_D_10, DA830_LCD_D_11,
- DA830_LCD_D_12, DA830_LCD_D_13, DA830_LCD_D_14, DA830_LCD_D_15,
- DA830_LCD_PCLK, DA830_LCD_HSYNC, DA830_LCD_VSYNC, DA830_NLCD_AC_ENB_CS,
- DA830_LCD_MCLK,
- -1
-};
-
-const short da830_pwm_pins[] __initconst = {
- DA830_ECAP0_APWM0, DA830_ECAP1_APWM1, DA830_EPWM0B, DA830_EPWM0A,
- DA830_EPWMSYNCI, DA830_EPWMSYNC0, DA830_ECAP2_APWM2, DA830_EHRPWMGLUETZ,
- DA830_EPWM2B, DA830_EPWM2A, DA830_EPWM1B, DA830_EPWM1A,
- -1
-};
-
-const short da830_ecap0_pins[] __initconst = {
- DA830_ECAP0_APWM0,
- -1
-};
-
-const short da830_ecap1_pins[] __initconst = {
- DA830_ECAP1_APWM1,
- -1
-};
-
-const short da830_ecap2_pins[] __initconst = {
- DA830_ECAP2_APWM2,
- -1
-};
-
-const short da830_eqep0_pins[] __initconst = {
- DA830_EQEP0I, DA830_EQEP0S, DA830_EQEP0A, DA830_EQEP0B,
- -1
-};
-
-const short da830_eqep1_pins[] __initconst = {
- DA830_EQEP1I, DA830_EQEP1S, DA830_EQEP1A, DA830_EQEP1B,
- -1
-};
-
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA830_MPUERR] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA830_EHRPWM2] = 7,
- [IRQ_DA830_EHRPWM2TZ] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA830_EQEP0] = 7,
- [IRQ_DA830_EQEP1] = 7,
- [IRQ_DA830_T12CMPINT0_0] = 7,
- [IRQ_DA830_T12CMPINT1_0] = 7,
- [IRQ_DA830_T12CMPINT2_0] = 7,
- [IRQ_DA830_T12CMPINT3_0] = 7,
- [IRQ_DA830_T12CMPINT4_0] = 7,
- [IRQ_DA830_T12CMPINT5_0] = 7,
- [IRQ_DA830_T12CMPINT6_0] = 7,
- [IRQ_DA830_T12CMPINT7_0] = 7,
- [IRQ_DA830_T12CMPINT0_1] = 7,
- [IRQ_DA830_T12CMPINT1_1] = 7,
- [IRQ_DA830_T12CMPINT2_1] = 7,
- [IRQ_DA830_T12CMPINT3_1] = 7,
- [IRQ_DA830_T12CMPINT4_1] = 7,
- [IRQ_DA830_T12CMPINT5_1] = 7,
- [IRQ_DA830_T12CMPINT6_1] = 7,
- [IRQ_DA830_T12CMPINT7_1] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
-static struct map_desc da830_io_desc[] = {
- {
- .virtual = IO_VIRT,
- .pfn = __phys_to_pfn(IO_PHYS),
- .length = IO_SIZE,
- .type = MT_DEVICE
- },
- {
- .virtual = DA8XX_CP_INTC_VIRT,
- .pfn = __phys_to_pfn(DA8XX_CP_INTC_BASE),
- .length = DA8XX_CP_INTC_SIZE,
- .type = MT_DEVICE
- },
-};
-
-static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
-
-/* Contents of JTAG ID register used to identify exact cpu type */
-static struct davinci_id da830_ids[] = {
- {
- .variant = 0x0,
- .part_no = 0xb7df,
- .manufacturer = 0x017, /* 0x02f >> 1 */
- .cpu_id = DAVINCI_CPU_ID_DA830,
- .name = "da830/omap-l137 rev1.0",
- },
- {
- .variant = 0x8,
- .part_no = 0xb7df,
- .manufacturer = 0x017,
- .cpu_id = DAVINCI_CPU_ID_DA830,
- .name = "da830/omap-l137 rev1.1",
- },
- {
- .variant = 0x9,
- .part_no = 0xb7df,
- .manufacturer = 0x017,
- .cpu_id = DAVINCI_CPU_ID_DA830,
- .name = "da830/omap-l137 rev2.0",
- },
-};
-
-static struct davinci_timer_instance da830_timer_instance[2] = {
- {
- .base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
- .cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_0,
- },
- {
- .base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
- .cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_1,
- },
-};
-
-/*
- * T0_BOT: Timer 0, bottom : Used for clock_event & clocksource
- * T0_TOP: Timer 0, top : Used by DSP
- * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
- */
-static struct davinci_timer_info da830_timer_info = {
- .timers = da830_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_BOT,
-};
-
-static struct davinci_soc_info davinci_soc_info_da830 = {
- .io_desc = da830_io_desc,
- .io_desc_num = ARRAY_SIZE(da830_io_desc),
- .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
- .ids = da830_ids,
- .ids_num = ARRAY_SIZE(da830_ids),
- .cpu_clks = da830_clks,
- .psc_bases = da830_psc_bases,
- .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
- .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
- .pinmux_pins = da830_pins,
- .pinmux_pins_num = ARRAY_SIZE(da830_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
- .intc_irq_prios = da830_default_priorities,
- .intc_irq_num = DA830_N_CP_INTC_IRQ,
- .timer_info = &da830_timer_info,
- .gpio_type = GPIO_TYPE_DAVINCI,
- .gpio_base = DA8XX_GPIO_BASE,
- .gpio_num = 128,
- .gpio_irq = IRQ_DA8XX_GPIO0,
- .serial_dev = &da8xx_serial_device,
- .emac_pdata = &da8xx_emac_pdata,
-};
-
-void __init da830_init(void)
-{
- davinci_common_init(&davinci_soc_info_da830);
-
- da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
- WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
-}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
deleted file mode 100644
index 0c4a26dd..00000000
--- a/arch/arm/mach-davinci/da850.c
+++ /dev/null
@@ -1,1296 +0,0 @@
-/*
- * TI DA850/OMAP-L138 chip specific setup
- *
- * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Derived from: arch/arm/mach-davinci/da830.c
- * Original Copyrights follow:
- *
- * 2009 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/cpufreq.h>
-#include <linux/regulator/consumer.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/psc.h>
-#include <mach/irqs.h>
-#include <mach/cputype.h>
-#include <mach/common.h>
-#include <mach/time.h>
-#include <mach/da8xx.h>
-#include <mach/cpufreq.h>
-#include <mach/pm.h>
-#include <mach/gpio-davinci.h>
-
-#include "clock.h"
-#include "mux.h"
-
-/* SoC specific clock flags */
-#define DA850_CLK_ASYNC3 BIT(16)
-
-#define DA850_PLL1_BASE 0x01e1a000
-#define DA850_TIMER64P2_BASE 0x01f0c000
-#define DA850_TIMER64P3_BASE 0x01f0d000
-
-#define DA850_REF_FREQ 24000000
-
-#define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
-#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5)
-#define CFGCHIP0_PLL_MASTER_LOCK BIT(4)
-
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
- .num = 1,
- .phys_base = DA8XX_PLL0_BASE,
- .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
- .name = "ref_clk",
- .rate = DA850_REF_FREQ,
- .set_rate = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
- .name = "pll0",
- .parent = &ref_clk,
- .pll_data = &pll0_data,
- .flags = CLK_PLL,
- .set_rate = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
- .name = "pll0_aux_clk",
- .parent = &pll0_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
- .name = "pll0_sysclk1",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
- .name = "pll0_sysclk2",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
- .name = "pll0_sysclk3",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
- .set_rate = davinci_set_sysclk_rate,
- .maxrate = 100000000,
-};
-
-static struct clk pll0_sysclk4 = {
- .name = "pll0_sysclk4",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
- .name = "pll0_sysclk5",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
- .name = "pll0_sysclk6",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
- .name = "pll0_sysclk7",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
- .num = 2,
- .phys_base = DA850_PLL1_BASE,
- .flags = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
- .name = "pll1",
- .parent = &ref_clk,
- .pll_data = &pll1_data,
- .flags = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
- .name = "pll1_aux_clk",
- .parent = &pll1_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk2 = {
- .name = "pll1_sysclk2",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
- .name = "pll1_sysclk3",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
-};
-
-static struct clk i2c0_clk = {
- .name = "i2c0",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
- .name = "timer0",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
- .name = "timer1",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk arm_rom_clk = {
- .name = "arm_rom",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc0_clk = {
- .name = "tpcc0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPCC,
- .flags = ALWAYS_ENABLED | CLK_PSC,
-};
-
-static struct clk tptc0_clk = {
- .name = "tptc0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPTC0,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tptc1_clk = {
- .name = "tptc1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPTC1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc1_clk = {
- .name = "tpcc1",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_TPCC1,
- .gpsc = 1,
- .flags = CLK_PSC | ALWAYS_ENABLED,
-};
-
-static struct clk tptc2_clk = {
- .name = "tptc2",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_TPTC2,
- .gpsc = 1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk pruss_clk = {
- .name = "pruss",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_PRUSS,
-};
-
-static struct clk uart0_clk = {
- .name = "uart0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_UART0,
-};
-
-static struct clk uart1_clk = {
- .name = "uart1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_UART1,
- .gpsc = 1,
- .flags = DA850_CLK_ASYNC3,
-};
-
-static struct clk uart2_clk = {
- .name = "uart2",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_UART2,
- .gpsc = 1,
- .flags = DA850_CLK_ASYNC3,
-};
-
-static struct clk aintc_clk = {
- .name = "aintc",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC0_AINTC,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk gpio_clk = {
- .name = "gpio",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_GPIO,
- .gpsc = 1,
-};
-
-static struct clk i2c1_clk = {
- .name = "i2c1",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_I2C,
- .gpsc = 1,
-};
-
-static struct clk emif3_clk = {
- .name = "emif3",
- .parent = &pll0_sysclk5,
- .lpsc = DA8XX_LPSC1_EMIF3C,
- .gpsc = 1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk arm_clk = {
- .name = "arm",
- .parent = &pll0_sysclk6,
- .lpsc = DA8XX_LPSC0_ARM,
- .flags = ALWAYS_ENABLED,
- .set_rate = da850_set_armrate,
- .round_rate = da850_round_armrate,
-};
-
-static struct clk rmii_clk = {
- .name = "rmii",
- .parent = &pll0_sysclk7,
-};
-
-static struct clk emac_clk = {
- .name = "emac",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_CPGMAC,
- .gpsc = 1,
-};
-
-static struct clk mcasp_clk = {
- .name = "mcasp",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_McASP0,
- .gpsc = 1,
- .flags = DA850_CLK_ASYNC3,
-};
-
-static struct clk lcdc_clk = {
- .name = "lcdc",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_LCDC,
- .gpsc = 1,
-};
-
-static struct clk mmcsd0_clk = {
- .name = "mmcsd0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_MMC_SD,
-};
-
-static struct clk mmcsd1_clk = {
- .name = "mmcsd1",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_MMC_SD1,
- .gpsc = 1,
-};
-
-static struct clk aemif_clk = {
- .name = "aemif",
- .parent = &pll0_sysclk3,
- .lpsc = DA8XX_LPSC0_EMIF25,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk usb11_clk = {
- .name = "usb11",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_USB11,
- .gpsc = 1,
-};
-
-static struct clk usb20_clk = {
- .name = "usb20",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_USB20,
- .gpsc = 1,
-};
-
-static struct clk spi0_clk = {
- .name = "spi0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_SPI0,
-};
-
-static struct clk spi1_clk = {
- .name = "spi1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_SPI1,
- .gpsc = 1,
- .flags = DA850_CLK_ASYNC3,
-};
-
-static struct clk vpif_clk = {
- .name = "vpif",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_VPIF,
- .gpsc = 1,
-};
-
-static struct clk sata_clk = {
- .name = "sata",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_SATA,
- .gpsc = 1,
- .flags = PSC_FORCE,
-};
-
-static struct clk dsp_clk = {
- .name = "dsp",
- .parent = &pll0_sysclk1,
- .domain = DAVINCI_GPSC_DSPDOMAIN,
- .lpsc = DA8XX_LPSC0_GEM,
- .flags = PSC_LRST | PSC_FORCE,
-};
-
-static struct clk_lookup da850_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("watchdog", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "tpcc0", &tpcc0_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK(NULL, "tpcc1", &tpcc1_clk),
- CLK(NULL, "tptc2", &tptc2_clk),
- CLK("pruss_uio", "pruss", &pruss_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
- CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "usb11", &usb11_clk),
- CLK(NULL, "usb20", &usb20_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("vpif", NULL, &vpif_clk),
- CLK("ahci", NULL, &sata_clk),
- CLK("davinci-rproc.0", NULL, &dsp_clk),
- CLK(NULL, NULL, NULL),
-};
-
-/*
- * Device specific mux setup
- *
- * soc description mux mode mode mux dbg
- * reg offset mask mode
- */
-static const struct mux_config da850_pins[] = {
-#ifdef CONFIG_DAVINCI_MUX
- /* UART0 function */
- MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
- MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
- MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
- MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
- /* UART1 function */
- MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false)
- MUX_CFG(DA850, UART1_TXD, 4, 28, 15, 2, false)
- /* UART2 function */
- MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false)
- MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, false)
- /* I2C1 function */
- MUX_CFG(DA850, I2C1_SCL, 4, 16, 15, 4, false)
- MUX_CFG(DA850, I2C1_SDA, 4, 20, 15, 4, false)
- /* I2C0 function */
- MUX_CFG(DA850, I2C0_SDA, 4, 12, 15, 2, false)
- MUX_CFG(DA850, I2C0_SCL, 4, 8, 15, 2, false)
- /* EMAC function */
- MUX_CFG(DA850, MII_TXEN, 2, 4, 15, 8, false)
- MUX_CFG(DA850, MII_TXCLK, 2, 8, 15, 8, false)
- MUX_CFG(DA850, MII_COL, 2, 12, 15, 8, false)
- MUX_CFG(DA850, MII_TXD_3, 2, 16, 15, 8, false)
- MUX_CFG(DA850, MII_TXD_2, 2, 20, 15, 8, false)
- MUX_CFG(DA850, MII_TXD_1, 2, 24, 15, 8, false)
- MUX_CFG(DA850, MII_TXD_0, 2, 28, 15, 8, false)
- MUX_CFG(DA850, MII_RXCLK, 3, 0, 15, 8, false)
- MUX_CFG(DA850, MII_RXDV, 3, 4, 15, 8, false)
- MUX_CFG(DA850, MII_RXER, 3, 8, 15, 8, false)
- MUX_CFG(DA850, MII_CRS, 3, 12, 15, 8, false)
- MUX_CFG(DA850, MII_RXD_3, 3, 16, 15, 8, false)
- MUX_CFG(DA850, MII_RXD_2, 3, 20, 15, 8, false)
- MUX_CFG(DA850, MII_RXD_1, 3, 24, 15, 8, false)
- MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false)
- MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false)
- MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
- MUX_CFG(DA850, RMII_TXD_0, 14, 12, 15, 8, false)
- MUX_CFG(DA850, RMII_TXD_1, 14, 8, 15, 8, false)
- MUX_CFG(DA850, RMII_TXEN, 14, 16, 15, 8, false)
- MUX_CFG(DA850, RMII_CRS_DV, 15, 4, 15, 8, false)
- MUX_CFG(DA850, RMII_RXD_0, 14, 24, 15, 8, false)
- MUX_CFG(DA850, RMII_RXD_1, 14, 20, 15, 8, false)
- MUX_CFG(DA850, RMII_RXER, 14, 28, 15, 8, false)
- MUX_CFG(DA850, RMII_MHZ_50_CLK, 15, 0, 15, 0, false)
- /* McASP function */
- MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false)
- MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false)
- MUX_CFG(DA850, AFSR, 0, 8, 15, 1, false)
- MUX_CFG(DA850, AFSX, 0, 12, 15, 1, false)
- MUX_CFG(DA850, AHCLKR, 0, 16, 15, 1, false)
- MUX_CFG(DA850, AHCLKX, 0, 20, 15, 1, false)
- MUX_CFG(DA850, AMUTE, 0, 24, 15, 1, false)
- MUX_CFG(DA850, AXR_15, 1, 0, 15, 1, false)
- MUX_CFG(DA850, AXR_14, 1, 4, 15, 1, false)
- MUX_CFG(DA850, AXR_13, 1, 8, 15, 1, false)
- MUX_CFG(DA850, AXR_12, 1, 12, 15, 1, false)
- MUX_CFG(DA850, AXR_11, 1, 16, 15, 1, false)
- MUX_CFG(DA850, AXR_10, 1, 20, 15, 1, false)
- MUX_CFG(DA850, AXR_9, 1, 24, 15, 1, false)
- MUX_CFG(DA850, AXR_8, 1, 28, 15, 1, false)
- MUX_CFG(DA850, AXR_7, 2, 0, 15, 1, false)
- MUX_CFG(DA850, AXR_6, 2, 4, 15, 1, false)
- MUX_CFG(DA850, AXR_5, 2, 8, 15, 1, false)
- MUX_CFG(DA850, AXR_4, 2, 12, 15, 1, false)
- MUX_CFG(DA850, AXR_3, 2, 16, 15, 1, false)
- MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false)
- MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false)
- MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false)
- /* LCD function */
- MUX_CFG(DA850, LCD_D_7, 16, 8, 15, 2, false)
- MUX_CFG(DA850, LCD_D_6, 16, 12, 15, 2, false)
- MUX_CFG(DA850, LCD_D_5, 16, 16, 15, 2, false)
- MUX_CFG(DA850, LCD_D_4, 16, 20, 15, 2, false)
- MUX_CFG(DA850, LCD_D_3, 16, 24, 15, 2, false)
- MUX_CFG(DA850, LCD_D_2, 16, 28, 15, 2, false)
- MUX_CFG(DA850, LCD_D_1, 17, 0, 15, 2, false)
- MUX_CFG(DA850, LCD_D_0, 17, 4, 15, 2, false)
- MUX_CFG(DA850, LCD_D_15, 17, 8, 15, 2, false)
- MUX_CFG(DA850, LCD_D_14, 17, 12, 15, 2, false)
- MUX_CFG(DA850, LCD_D_13, 17, 16, 15, 2, false)
- MUX_CFG(DA850, LCD_D_12, 17, 20, 15, 2, false)
- MUX_CFG(DA850, LCD_D_11, 17, 24, 15, 2, false)
- MUX_CFG(DA850, LCD_D_10, 17, 28, 15, 2, false)
- MUX_CFG(DA850, LCD_D_9, 18, 0, 15, 2, false)
- MUX_CFG(DA850, LCD_D_8, 18, 4, 15, 2, false)
- MUX_CFG(DA850, LCD_PCLK, 18, 24, 15, 2, false)
- MUX_CFG(DA850, LCD_HSYNC, 19, 0, 15, 2, false)
- MUX_CFG(DA850, LCD_VSYNC, 19, 4, 15, 2, false)
- MUX_CFG(DA850, NLCD_AC_ENB_CS, 19, 24, 15, 2, false)
- /* MMC/SD0 function */
- MUX_CFG(DA850, MMCSD0_DAT_0, 10, 8, 15, 2, false)
- MUX_CFG(DA850, MMCSD0_DAT_1, 10, 12, 15, 2, false)
- MUX_CFG(DA850, MMCSD0_DAT_2, 10, 16, 15, 2, false)
- MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false)
- MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false)
- MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false)
- /* MMC/SD1 function */
- MUX_CFG(DA850, MMCSD1_DAT_0, 18, 8, 15, 2, false)
- MUX_CFG(DA850, MMCSD1_DAT_1, 19, 16, 15, 2, false)
- MUX_CFG(DA850, MMCSD1_DAT_2, 19, 12, 15, 2, false)
- MUX_CFG(DA850, MMCSD1_DAT_3, 19, 8, 15, 2, false)
- MUX_CFG(DA850, MMCSD1_CLK, 18, 12, 15, 2, false)
- MUX_CFG(DA850, MMCSD1_CMD, 18, 16, 15, 2, false)
- /* EMIF2.5/EMIFA function */
- MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false)
- MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false)
- MUX_CFG(DA850, EMA_D_5, 9, 8, 15, 1, false)
- MUX_CFG(DA850, EMA_D_4, 9, 12, 15, 1, false)
- MUX_CFG(DA850, EMA_D_3, 9, 16, 15, 1, false)
- MUX_CFG(DA850, EMA_D_2, 9, 20, 15, 1, false)
- MUX_CFG(DA850, EMA_D_1, 9, 24, 15, 1, false)
- MUX_CFG(DA850, EMA_D_0, 9, 28, 15, 1, false)
- MUX_CFG(DA850, EMA_A_1, 12, 24, 15, 1, false)
- MUX_CFG(DA850, EMA_A_2, 12, 20, 15, 1, false)
- MUX_CFG(DA850, NEMA_CS_3, 7, 4, 15, 1, false)
- MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false)
- MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false)
- MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false)
- MUX_CFG(DA850, EMA_A_0, 12, 28, 15, 1, false)
- MUX_CFG(DA850, EMA_A_3, 12, 16, 15, 1, false)
- MUX_CFG(DA850, EMA_A_4, 12, 12, 15, 1, false)
- MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false)
- MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false)
- MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false)
- MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false)
- MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false)
- MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false)
- MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false)
- MUX_CFG(DA850, EMA_A_12, 11, 12, 15, 1, false)
- MUX_CFG(DA850, EMA_A_13, 11, 8, 15, 1, false)
- MUX_CFG(DA850, EMA_A_14, 11, 4, 15, 1, false)
- MUX_CFG(DA850, EMA_A_15, 11, 0, 15, 1, false)
- MUX_CFG(DA850, EMA_A_16, 10, 28, 15, 1, false)
- MUX_CFG(DA850, EMA_A_17, 10, 24, 15, 1, false)
- MUX_CFG(DA850, EMA_A_18, 10, 20, 15, 1, false)
- MUX_CFG(DA850, EMA_A_19, 10, 16, 15, 1, false)
- MUX_CFG(DA850, EMA_A_20, 10, 12, 15, 1, false)
- MUX_CFG(DA850, EMA_A_21, 10, 8, 15, 1, false)
- MUX_CFG(DA850, EMA_A_22, 10, 4, 15, 1, false)
- MUX_CFG(DA850, EMA_A_23, 10, 0, 15, 1, false)
- MUX_CFG(DA850, EMA_D_8, 8, 28, 15, 1, false)
- MUX_CFG(DA850, EMA_D_9, 8, 24, 15, 1, false)
- MUX_CFG(DA850, EMA_D_10, 8, 20, 15, 1, false)
- MUX_CFG(DA850, EMA_D_11, 8, 16, 15, 1, false)
- MUX_CFG(DA850, EMA_D_12, 8, 12, 15, 1, false)
- MUX_CFG(DA850, EMA_D_13, 8, 8, 15, 1, false)
- MUX_CFG(DA850, EMA_D_14, 8, 4, 15, 1, false)
- MUX_CFG(DA850, EMA_D_15, 8, 0, 15, 1, false)
- MUX_CFG(DA850, EMA_BA_1, 5, 24, 15, 1, false)
- MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false)
- MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
- MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
- /* GPIO function */
- MUX_CFG(DA850, GPIO2_4, 6, 12, 15, 8, false)
- MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
- MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
- MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
- MUX_CFG(DA850, GPIO3_12, 7, 12, 15, 8, false)
- MUX_CFG(DA850, GPIO3_13, 7, 8, 15, 8, false)
- MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
- MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false)
- MUX_CFG(DA850, GPIO6_9, 13, 24, 15, 8, false)
- MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false)
- MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false)
- MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
- /* VPIF Capture */
- MUX_CFG(DA850, VPIF_DIN0, 15, 4, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN1, 15, 0, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN2, 14, 28, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN3, 14, 24, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN4, 14, 20, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN5, 14, 16, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN6, 14, 12, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN7, 14, 8, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN8, 16, 4, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN9, 16, 0, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN10, 15, 28, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN11, 15, 24, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN12, 15, 20, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN13, 15, 16, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN14, 15, 12, 15, 1, false)
- MUX_CFG(DA850, VPIF_DIN15, 15, 8, 15, 1, false)
- MUX_CFG(DA850, VPIF_CLKIN0, 14, 0, 15, 1, false)
- MUX_CFG(DA850, VPIF_CLKIN1, 14, 4, 15, 1, false)
- MUX_CFG(DA850, VPIF_CLKIN2, 19, 8, 15, 1, false)
- MUX_CFG(DA850, VPIF_CLKIN3, 19, 16, 15, 1, false)
- /* VPIF Display */
- MUX_CFG(DA850, VPIF_DOUT0, 17, 4, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT1, 17, 0, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT2, 16, 28, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT3, 16, 24, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT4, 16, 20, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT5, 16, 16, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT6, 16, 12, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT7, 16, 8, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT8, 18, 4, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT9, 18, 0, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT10, 17, 28, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT11, 17, 24, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT12, 17, 20, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT13, 17, 16, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT14, 17, 12, 15, 1, false)
- MUX_CFG(DA850, VPIF_DOUT15, 17, 8, 15, 1, false)
- MUX_CFG(DA850, VPIF_CLKO2, 19, 12, 15, 1, false)
- MUX_CFG(DA850, VPIF_CLKO3, 19, 20, 15, 1, false)
-#endif
-};
-
-const short da850_i2c0_pins[] __initconst = {
- DA850_I2C0_SDA, DA850_I2C0_SCL,
- -1
-};
-
-const short da850_i2c1_pins[] __initconst = {
- DA850_I2C1_SCL, DA850_I2C1_SDA,
- -1
-};
-
-const short da850_lcdcntl_pins[] __initconst = {
- DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3,
- DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7,
- DA850_LCD_D_8, DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11,
- DA850_LCD_D_12, DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15,
- DA850_LCD_PCLK, DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS,
- -1
-};
-
-const short da850_vpif_capture_pins[] __initdata = {
- DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3,
- DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7,
- DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11,
- DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15,
- DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2,
- DA850_VPIF_CLKIN3,
- -1
-};
-
-const short da850_vpif_display_pins[] __initdata = {
- DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3,
- DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7,
- DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10,
- DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13,
- DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2,
- DA850_VPIF_CLKO3,
- -1
-};
-
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA850_MPUADDRERR0] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA850_SATAINT] = 7,
- [IRQ_DA850_TINTALL_2] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA850_MMCSDINT0_1] = 7,
- [IRQ_DA850_MMCSDINT1_1] = 7,
- [IRQ_DA850_T12CMPINT0_2] = 7,
- [IRQ_DA850_T12CMPINT1_2] = 7,
- [IRQ_DA850_T12CMPINT2_2] = 7,
- [IRQ_DA850_T12CMPINT3_2] = 7,
- [IRQ_DA850_T12CMPINT4_2] = 7,
- [IRQ_DA850_T12CMPINT5_2] = 7,
- [IRQ_DA850_T12CMPINT6_2] = 7,
- [IRQ_DA850_T12CMPINT7_2] = 7,
- [IRQ_DA850_T12CMPINT0_3] = 7,
- [IRQ_DA850_T12CMPINT1_3] = 7,
- [IRQ_DA850_T12CMPINT2_3] = 7,
- [IRQ_DA850_T12CMPINT3_3] = 7,
- [IRQ_DA850_T12CMPINT4_3] = 7,
- [IRQ_DA850_T12CMPINT5_3] = 7,
- [IRQ_DA850_T12CMPINT6_3] = 7,
- [IRQ_DA850_T12CMPINT7_3] = 7,
- [IRQ_DA850_RPIINT] = 7,
- [IRQ_DA850_VPIFINT] = 7,
- [IRQ_DA850_CCINT1] = 7,
- [IRQ_DA850_CCERRINT1] = 7,
- [IRQ_DA850_TCERRINT2] = 7,
- [IRQ_DA850_TINTALL_3] = 7,
- [IRQ_DA850_MCBSP0RINT] = 7,
- [IRQ_DA850_MCBSP0XINT] = 7,
- [IRQ_DA850_MCBSP1RINT] = 7,
- [IRQ_DA850_MCBSP1XINT] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
-static struct map_desc da850_io_desc[] = {
- {
- .virtual = IO_VIRT,
- .pfn = __phys_to_pfn(IO_PHYS),
- .length = IO_SIZE,
- .type = MT_DEVICE
- },
- {
- .virtual = DA8XX_CP_INTC_VIRT,
- .pfn = __phys_to_pfn(DA8XX_CP_INTC_BASE),
- .length = DA8XX_CP_INTC_SIZE,
- .type = MT_DEVICE
- },
-};
-
-static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
-
-/* Contents of JTAG ID register used to identify exact cpu type */
-static struct davinci_id da850_ids[] = {
- {
- .variant = 0x0,
- .part_no = 0xb7d1,
- .manufacturer = 0x017, /* 0x02f >> 1 */
- .cpu_id = DAVINCI_CPU_ID_DA850,
- .name = "da850/omap-l138",
- },
- {
- .variant = 0x1,
- .part_no = 0xb7d1,
- .manufacturer = 0x017, /* 0x02f >> 1 */
- .cpu_id = DAVINCI_CPU_ID_DA850,
- .name = "da850/omap-l138/am18x",
- },
-};
-
-static struct davinci_timer_instance da850_timer_instance[4] = {
- {
- .base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
- },
- {
- .base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
- },
- {
- .base = DA850_TIMER64P2_BASE,
- .bottom_irq = IRQ_DA850_TINT12_2,
- .top_irq = IRQ_DA850_TINT34_2,
- },
- {
- .base = DA850_TIMER64P3_BASE,
- .bottom_irq = IRQ_DA850_TINT12_3,
- .top_irq = IRQ_DA850_TINT34_3,
- },
-};
-
-/*
- * T0_BOT: Timer 0, bottom : Used for clock_event
- * T0_TOP: Timer 0, top : Used for clocksource
- * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
- */
-static struct davinci_timer_info da850_timer_info = {
- .timers = da850_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
-};
-
-static void da850_set_async3_src(int pllnum)
-{
- struct clk *clk, *newparent = pllnum ? &pll1_sysclk2 : &pll0_sysclk2;
- struct clk_lookup *c;
- unsigned int v;
- int ret;
-
- for (c = da850_clks; c->clk; c++) {
- clk = c->clk;
- if (clk->flags & DA850_CLK_ASYNC3) {
- ret = clk_set_parent(clk, newparent);
- WARN(ret, "DA850: unable to re-parent clock %s",
- clk->name);
- }
- }
-
- v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
- if (pllnum)
- v |= CFGCHIP3_ASYNC3_CLKSRC;
- else
- v &= ~CFGCHIP3_ASYNC3_CLKSRC;
- __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
-}
-
-#ifdef CONFIG_CPU_FREQ
-/*
- * Notes:
- * According to the TRM, minimum PLLM results in maximum power savings.
- * The OPP definitions below should keep the PLLM as low as possible.
- *
- * The output of the PLLM must be between 300 to 600 MHz.
- */
-struct da850_opp {
- unsigned int freq; /* in KHz */
- unsigned int prediv;
- unsigned int mult;
- unsigned int postdiv;
- unsigned int cvdd_min; /* in uV */
- unsigned int cvdd_max; /* in uV */
-};
-
-static const struct da850_opp da850_opp_456 = {
- .freq = 456000,
- .prediv = 1,
- .mult = 19,
- .postdiv = 1,
- .cvdd_min = 1300000,
- .cvdd_max = 1350000,
-};
-
-static const struct da850_opp da850_opp_408 = {
- .freq = 408000,
- .prediv = 1,
- .mult = 17,
- .postdiv = 1,
- .cvdd_min = 1300000,
- .cvdd_max = 1350000,
-};
-
-static const struct da850_opp da850_opp_372 = {
- .freq = 372000,
- .prediv = 2,
- .mult = 31,
- .postdiv = 1,
- .cvdd_min = 1200000,
- .cvdd_max = 1320000,
-};
-
-static const struct da850_opp da850_opp_300 = {
- .freq = 300000,
- .prediv = 1,
- .mult = 25,
- .postdiv = 2,
- .cvdd_min = 1200000,
- .cvdd_max = 1320000,
-};
-
-static const struct da850_opp da850_opp_200 = {
- .freq = 200000,
- .prediv = 1,
- .mult = 25,
- .postdiv = 3,
- .cvdd_min = 1100000,
- .cvdd_max = 1160000,
-};
-
-static const struct da850_opp da850_opp_96 = {
- .freq = 96000,
- .prediv = 1,
- .mult = 20,
- .postdiv = 5,
- .cvdd_min = 1000000,
- .cvdd_max = 1050000,
-};
-
-#define OPP(freq) \
- { \
- .index = (unsigned int) &da850_opp_##freq, \
- .frequency = freq * 1000, \
- }
-
-static struct cpufreq_frequency_table da850_freq_table[] = {
- OPP(456),
- OPP(408),
- OPP(372),
- OPP(300),
- OPP(200),
- OPP(96),
- {
- .index = 0,
- .frequency = CPUFREQ_TABLE_END,
- },
-};
-
-#ifdef CONFIG_REGULATOR
-static int da850_set_voltage(unsigned int index);
-static int da850_regulator_init(void);
-#endif
-
-static struct davinci_cpufreq_config cpufreq_info = {
- .freq_table = da850_freq_table,
-#ifdef CONFIG_REGULATOR
- .init = da850_regulator_init,
- .set_voltage = da850_set_voltage,
-#endif
-};
-
-#ifdef CONFIG_REGULATOR
-static struct regulator *cvdd;
-
-static int da850_set_voltage(unsigned int index)
-{
- struct da850_opp *opp;
-
- if (!cvdd)
- return -ENODEV;
-
- opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
-
- return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max);
-}
-
-static int da850_regulator_init(void)
-{
- cvdd = regulator_get(NULL, "cvdd");
- if (WARN(IS_ERR(cvdd), "Unable to obtain voltage regulator for CVDD;"
- " voltage scaling unsupported\n")) {
- return PTR_ERR(cvdd);
- }
-
- return 0;
-}
-#endif
-
-static struct platform_device da850_cpufreq_device = {
- .name = "cpufreq-davinci",
- .dev = {
- .platform_data = &cpufreq_info,
- },
- .id = -1,
-};
-
-unsigned int da850_max_speed = 300000;
-
-int da850_register_cpufreq(char *async_clk)
-{
- int i;
-
- /* cpufreq driver can help keep an "async" clock constant */
- if (async_clk)
- clk_add_alias("async", da850_cpufreq_device.name,
- async_clk, NULL);
- for (i = 0; i < ARRAY_SIZE(da850_freq_table); i++) {
- if (da850_freq_table[i].frequency <= da850_max_speed) {
- cpufreq_info.freq_table = &da850_freq_table[i];
- break;
- }
- }
-
- return platform_device_register(&da850_cpufreq_device);
-}
-
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
-{
- int i, ret = 0, diff;
- unsigned int best = (unsigned int) -1;
- struct cpufreq_frequency_table *table = cpufreq_info.freq_table;
-
- rate /= 1000; /* convert to kHz */
-
- for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
- diff = table[i].frequency - rate;
- if (diff < 0)
- diff = -diff;
-
- if (diff < best) {
- best = diff;
- ret = table[i].frequency;
- }
- }
-
- return ret * 1000;
-}
-
-static int da850_set_armrate(struct clk *clk, unsigned long index)
-{
- struct clk *pllclk = &pll0_clk;
-
- return clk_set_rate(pllclk, index);
-}
-
-static int da850_set_pll0rate(struct clk *clk, unsigned long index)
-{
- unsigned int prediv, mult, postdiv;
- struct da850_opp *opp;
- struct pll_data *pll = clk->pll_data;
- int ret;
-
- opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
- prediv = opp->prediv;
- mult = opp->mult;
- postdiv = opp->postdiv;
-
- ret = davinci_set_pllrate(pll, prediv, mult, postdiv);
- if (WARN_ON(ret))
- return ret;
-
- return 0;
-}
-#else
-int __init da850_register_cpufreq(char *async_clk)
-{
- return 0;
-}
-
-static int da850_set_armrate(struct clk *clk, unsigned long rate)
-{
- return -EINVAL;
-}
-
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate)
-{
- return -EINVAL;
-}
-
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
-{
- return clk->rate;
-}
-#endif
-
-int __init da850_register_pm(struct platform_device *pdev)
-{
- int ret;
- struct davinci_pm_config *pdata = pdev->dev.platform_data;
-
- ret = davinci_cfg_reg(DA850_RTC_ALARM);
- if (ret)
- return ret;
-
- pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr();
- pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
- pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C;
-
- pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
- if (!pdata->cpupll_reg_base)
- return -ENOMEM;
-
- pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
- if (!pdata->ddrpll_reg_base) {
- ret = -ENOMEM;
- goto no_ddrpll_mem;
- }
-
- pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
- if (!pdata->ddrpsc_reg_base) {
- ret = -ENOMEM;
- goto no_ddrpsc_mem;
- }
-
- return platform_device_register(pdev);
-
-no_ddrpsc_mem:
- iounmap(pdata->ddrpll_reg_base);
-no_ddrpll_mem:
- iounmap(pdata->cpupll_reg_base);
- return ret;
-}
-
-/* VPIF resource, platform data */
-static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
-
-static struct resource da850_vpif_resource[] = {
- {
- .start = DA8XX_VPIF_BASE,
- .end = DA8XX_VPIF_BASE + 0xfff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device da850_vpif_dev = {
- .name = "vpif",
- .id = -1,
- .dev = {
- .dma_mask = &da850_vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = da850_vpif_resource,
- .num_resources = ARRAY_SIZE(da850_vpif_resource),
-};
-
-static struct resource da850_vpif_display_resource[] = {
- {
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da850_vpif_display_dev = {
- .name = "vpif_display",
- .id = -1,
- .dev = {
- .dma_mask = &da850_vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = da850_vpif_display_resource,
- .num_resources = ARRAY_SIZE(da850_vpif_display_resource),
-};
-
-static struct resource da850_vpif_capture_resource[] = {
- {
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da850_vpif_capture_dev = {
- .name = "vpif_capture",
- .id = -1,
- .dev = {
- .dma_mask = &da850_vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = da850_vpif_capture_resource,
- .num_resources = ARRAY_SIZE(da850_vpif_capture_resource),
-};
-
-int __init da850_register_vpif(void)
-{
- return platform_device_register(&da850_vpif_dev);
-}
-
-int __init da850_register_vpif_display(struct vpif_display_config
- *display_config)
-{
- da850_vpif_display_dev.dev.platform_data = display_config;
- return platform_device_register(&da850_vpif_display_dev);
-}
-
-int __init da850_register_vpif_capture(struct vpif_capture_config
- *capture_config)
-{
- da850_vpif_capture_dev.dev.platform_data = capture_config;
- return platform_device_register(&da850_vpif_capture_dev);
-}
-
-static struct davinci_soc_info davinci_soc_info_da850 = {
- .io_desc = da850_io_desc,
- .io_desc_num = ARRAY_SIZE(da850_io_desc),
- .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
- .ids = da850_ids,
- .ids_num = ARRAY_SIZE(da850_ids),
- .cpu_clks = da850_clks,
- .psc_bases = da850_psc_bases,
- .psc_bases_num = ARRAY_SIZE(da850_psc_bases),
- .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
- .pinmux_pins = da850_pins,
- .pinmux_pins_num = ARRAY_SIZE(da850_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
- .intc_irq_prios = da850_default_priorities,
- .intc_irq_num = DA850_N_CP_INTC_IRQ,
- .timer_info = &da850_timer_info,
- .gpio_type = GPIO_TYPE_DAVINCI,
- .gpio_base = DA8XX_GPIO_BASE,
- .gpio_num = 144,
- .gpio_irq = IRQ_DA8XX_GPIO0,
- .serial_dev = &da8xx_serial_device,
- .emac_pdata = &da8xx_emac_pdata,
- .sram_dma = DA8XX_SHARED_RAM_BASE,
- .sram_len = SZ_128K,
-};
-
-void __init da850_init(void)
-{
- unsigned int v;
-
- davinci_common_init(&davinci_soc_info_da850);
-
- da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
- if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"))
- return;
-
- da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K);
- if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module"))
- return;
-
- /*
- * Move the clock source of Async3 domain to PLL1 SYSCLK2.
- * This helps keeping the peripherals on this domain insulated
- * from CPU frequency changes caused by DVFS. The firmware sets
- * both PLL0 and PLL1 to the same frequency so, there should not
- * be any noticeable change even in non-DVFS use cases.
- */
- da850_set_async3_src(1);
-
- /* Unlock writing to PLL0 registers */
- v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG));
- v &= ~CFGCHIP0_PLL_MASTER_LOCK;
- __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG));
-
- /* Unlock writing to PLL1 registers */
- v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
- v &= ~CFGCHIP3_PLL1_MASTER_LOCK;
- __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
-}
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
deleted file mode 100644
index 6b7a0a27..00000000
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Modified from mach-omap/omap2/board-generic.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/io.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <linux/irqdomain.h>
-
-#include <asm/mach/arch.h>
-
-#include <mach/common.h>
-#include <mach/cp_intc.h>
-#include <mach/da8xx.h>
-
-#define DA8XX_NUM_UARTS 3
-
-void __init da8xx_uart_clk_enable(void)
-{
- int i;
- for (i = 0; i < DA8XX_NUM_UARTS; i++)
- davinci_serial_setup_clk(i, NULL);
-}
-
-static struct of_device_id da8xx_irq_match[] __initdata = {
- { .compatible = "ti,cp-intc", .data = cp_intc_of_init, },
- { }
-};
-
-static void __init da8xx_init_irq(void)
-{
- of_irq_init(da8xx_irq_match);
-}
-
-struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
- OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
- OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL),
- {}
-};
-
-#ifdef CONFIG_ARCH_DAVINCI_DA850
-
-static void __init da850_init_machine(void)
-{
- of_platform_populate(NULL, of_default_bus_match_table,
- da850_auxdata_lookup, NULL);
-
- da8xx_uart_clk_enable();
-}
-
-static const char *da850_boards_compat[] __initdata = {
- "enbw,cmc",
- "ti,da850-evm",
- "ti,da850",
- NULL,
-};
-
-DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
- .map_io = da850_init,
- .init_irq = da8xx_init_irq,
- .init_time = davinci_timer_init,
- .init_machine = da850_init_machine,
- .dt_compat = da850_boards_compat,
- .init_late = davinci_init_late,
- .restart = da8xx_restart,
-MACHINE_END
-
-#endif
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544be..e85d7cce 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -23,25 +23,30 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/keyscan-davinci.h>
#include <mach/hardware.h>
-#include <mach/edma.h>
+#include <media/davinci/vpfe_types.h>
#include <media/davinci/vpfe_capture.h>
-#include <media/davinci/vpif_types.h>
-#include <media/davinci/vpss.h>
-#include <media/davinci/vpbe_types.h>
-#include <media/davinci/vpbe_venc.h>
-#include <media/davinci/vpbe.h>
-#include <media/davinci/vpbe_osd.h>
-
-#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
+#include <video/davinci_osd.h>
+#include <video/davinci_vpbe.h>
+
+
+//#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
+#define SYSMOD_VDAC_CONFIG 0x2c
#define SYSMOD_VIDCLKCTL 0x38
#define SYSMOD_VPSS_CLKCTL 0x44
#define SYSMOD_VDD3P3VPWDN 0x48
#define SYSMOD_VSCLKDIS 0x6c
#define SYSMOD_PUPDCTL1 0x7c
+/* VPSS CLKCTL bit definitions */
+#define VPSS_MUXSEL_EXTCLK_ENABLE BIT(1)
+#define VPSS_VENCCLKEN_ENABLE BIT(3)
+#define VPSS_DACCLKEN_ENABLE BIT(4)
+#define VPSS_PLLC2SYSCLK5_ENABLE BIT(5)
+
extern void __iomem *davinci_sysmod_base;
#define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x))
void davinci_map_sysmod(void);
@@ -58,45 +63,17 @@ void davinci_map_sysmod(void);
#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
-/* DM644x base addresses */
-#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000
-#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
-#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
-#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
-/* DM646x base addresses */
-#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
-#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
-/* DM355 function declarations */
-void __init dm355_init(void);
-void dm355_init_spi0(unsigned chipselect_mask,
- const struct spi_board_info *info, unsigned len);
-void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
-void dm355_set_vpfe_config(struct vpfe_config *cfg);
+
/* DM365 function declarations */
void __init dm365_init(void);
void __init dm365_init_asp(struct snd_platform_data *pdata);
void __init dm365_init_vc(struct snd_platform_data *pdata);
-void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
void __init dm365_init_rtc(void);
-void dm365_init_spi0(unsigned chipselect_mask,
- const struct spi_board_info *info, unsigned len);
-void dm365_set_vpfe_config(struct vpfe_config *cfg);
-/* DM644x function declarations */
-void __init dm644x_init(void);
-void __init dm644x_init_asp(struct snd_platform_data *pdata);
-int __init dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
-
-/* DM646x function declarations */
-void __init dm646x_init(void);
-void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
-void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
-int __init dm646x_init_edma(struct edma_rsv_info *rsv);
-void dm646x_video_init(void);
-void dm646x_setup_vpif(struct vpif_display_config *,
- struct vpif_capture_config *);
-#endif /*__DAVINCI_H */
+
+void dm365_set_vpfe_config(struct vpfe_config *cfg);
+void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms);
+#endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
deleted file mode 100644
index fc50243b..00000000
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ /dev/null
@@ -1,1013 +0,0 @@
-/*
- * DA8XX/OMAP L1XX platform device data
- *
- * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
- * Derived from code that was:
- * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/serial_8250.h>
-#include <linux/ahci_platform.h>
-#include <linux/clk.h>
-
-#include <mach/cputype.h>
-#include <mach/common.h>
-#include <mach/time.h>
-#include <mach/da8xx.h>
-#include <mach/cpuidle.h>
-#include <mach/sram.h>
-
-#include "clock.h"
-#include "asp.h"
-
-#define DA8XX_TPCC_BASE 0x01c00000
-#define DA8XX_TPTC0_BASE 0x01c08000
-#define DA8XX_TPTC1_BASE 0x01c08400
-#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
-#define DA8XX_I2C0_BASE 0x01c22000
-#define DA8XX_RTC_BASE 0x01c23000
-#define DA8XX_PRUSS_MEM_BASE 0x01c30000
-#define DA8XX_MMCSD0_BASE 0x01c40000
-#define DA8XX_SPI0_BASE 0x01c41000
-#define DA830_SPI1_BASE 0x01e12000
-#define DA8XX_LCD_CNTRL_BASE 0x01e13000
-#define DA850_SATA_BASE 0x01e18000
-#define DA850_MMCSD1_BASE 0x01e1b000
-#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
-#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
-#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
-#define DA8XX_EMAC_MDIO_BASE 0x01e24000
-#define DA8XX_I2C1_BASE 0x01e28000
-#define DA850_TPCC1_BASE 0x01e30000
-#define DA850_TPTC2_BASE 0x01e38000
-#define DA850_SPI1_BASE 0x01f0e000
-#define DA8XX_DDR2_CTL_BASE 0xb0000000
-
-#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
-#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
-#define DA8XX_EMAC_RAM_OFFSET 0x0000
-#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
-
-#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
-#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
-#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
-#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
-#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
-#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
-#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
-#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
-
-void __iomem *da8xx_syscfg0_base;
-void __iomem *da8xx_syscfg1_base;
-
-static struct plat_serial8250_port da8xx_serial_pdata[] = {
- {
- .mapbase = DA8XX_UART0_BASE,
- .irq = IRQ_DA8XX_UARTINT0,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM,
- .regshift = 2,
- },
- {
- .mapbase = DA8XX_UART1_BASE,
- .irq = IRQ_DA8XX_UARTINT1,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM,
- .regshift = 2,
- },
- {
- .mapbase = DA8XX_UART2_BASE,
- .irq = IRQ_DA8XX_UARTINT2,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM,
- .regshift = 2,
- },
- {
- .flags = 0,
- },
-};
-
-struct platform_device da8xx_serial_device = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev = {
- .platform_data = da8xx_serial_pdata,
- },
-};
-
-static const s8 da8xx_queue_tc_mapping[][2] = {
- /* {event queue no, TC no} */
- {0, 0},
- {1, 1},
- {-1, -1}
-};
-
-static const s8 da8xx_queue_priority_mapping[][2] = {
- /* {event queue no, Priority} */
- {0, 3},
- {1, 7},
- {-1, -1}
-};
-
-static const s8 da850_queue_tc_mapping[][2] = {
- /* {event queue no, TC no} */
- {0, 0},
- {-1, -1}
-};
-
-static const s8 da850_queue_priority_mapping[][2] = {
- /* {event queue no, Priority} */
- {0, 3},
- {-1, -1}
-};
-
-static struct edma_soc_info da830_edma_cc0_info = {
- .n_channel = 32,
- .n_region = 4,
- .n_slot = 128,
- .n_tc = 2,
- .n_cc = 1,
- .queue_tc_mapping = da8xx_queue_tc_mapping,
- .queue_priority_mapping = da8xx_queue_priority_mapping,
- .default_queue = EVENTQ_1,
-};
-
-static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
- &da830_edma_cc0_info,
-};
-
-static struct edma_soc_info da850_edma_cc_info[] = {
- {
- .n_channel = 32,
- .n_region = 4,
- .n_slot = 128,
- .n_tc = 2,
- .n_cc = 1,
- .queue_tc_mapping = da8xx_queue_tc_mapping,
- .queue_priority_mapping = da8xx_queue_priority_mapping,
- .default_queue = EVENTQ_1,
- },
- {
- .n_channel = 32,
- .n_region = 4,
- .n_slot = 128,
- .n_tc = 1,
- .n_cc = 1,
- .queue_tc_mapping = da850_queue_tc_mapping,
- .queue_priority_mapping = da850_queue_priority_mapping,
- .default_queue = EVENTQ_0,
- },
-};
-
-static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
- &da850_edma_cc_info[0],
- &da850_edma_cc_info[1],
-};
-
-static struct resource da830_edma_resources[] = {
- {
- .name = "edma_cc0",
- .start = DA8XX_TPCC_BASE,
- .end = DA8XX_TPCC_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc0",
- .start = DA8XX_TPTC0_BASE,
- .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc1",
- .start = DA8XX_TPTC1_BASE,
- .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma0",
- .start = IRQ_DA8XX_CCINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma0_err",
- .start = IRQ_DA8XX_CCERRINT,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct resource da850_edma_resources[] = {
- {
- .name = "edma_cc0",
- .start = DA8XX_TPCC_BASE,
- .end = DA8XX_TPCC_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc0",
- .start = DA8XX_TPTC0_BASE,
- .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc1",
- .start = DA8XX_TPTC1_BASE,
- .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_cc1",
- .start = DA850_TPCC1_BASE,
- .end = DA850_TPCC1_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc2",
- .start = DA850_TPTC2_BASE,
- .end = DA850_TPTC2_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma0",
- .start = IRQ_DA8XX_CCINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma0_err",
- .start = IRQ_DA8XX_CCERRINT,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma1",
- .start = IRQ_DA850_CCINT1,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma1_err",
- .start = IRQ_DA850_CCERRINT1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da830_edma_device = {
- .name = "edma",
- .id = -1,
- .dev = {
- .platform_data = da830_edma_info,
- },
- .num_resources = ARRAY_SIZE(da830_edma_resources),
- .resource = da830_edma_resources,
-};
-
-static struct platform_device da850_edma_device = {
- .name = "edma",
- .id = -1,
- .dev = {
- .platform_data = da850_edma_info,
- },
- .num_resources = ARRAY_SIZE(da850_edma_resources),
- .resource = da850_edma_resources,
-};
-
-int __init da830_register_edma(struct edma_rsv_info *rsv)
-{
- da830_edma_cc0_info.rsv = rsv;
-
- return platform_device_register(&da830_edma_device);
-}
-
-int __init da850_register_edma(struct edma_rsv_info *rsv[2])
-{
- if (rsv) {
- da850_edma_cc_info[0].rsv = rsv[0];
- da850_edma_cc_info[1].rsv = rsv[1];
- }
-
- return platform_device_register(&da850_edma_device);
-}
-
-static struct resource da8xx_i2c_resources0[] = {
- {
- .start = DA8XX_I2C0_BASE,
- .end = DA8XX_I2C0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DA8XX_I2CINT0,
- .end = IRQ_DA8XX_I2CINT0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da8xx_i2c_device0 = {
- .name = "i2c_davinci",
- .id = 1,
- .num_resources = ARRAY_SIZE(da8xx_i2c_resources0),
- .resource = da8xx_i2c_resources0,
-};
-
-static struct resource da8xx_i2c_resources1[] = {
- {
- .start = DA8XX_I2C1_BASE,
- .end = DA8XX_I2C1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DA8XX_I2CINT1,
- .end = IRQ_DA8XX_I2CINT1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da8xx_i2c_device1 = {
- .name = "i2c_davinci",
- .id = 2,
- .num_resources = ARRAY_SIZE(da8xx_i2c_resources1),
- .resource = da8xx_i2c_resources1,
-};
-
-int __init da8xx_register_i2c(int instance,
- struct davinci_i2c_platform_data *pdata)
-{
- struct platform_device *pdev;
-
- if (instance == 0)
- pdev = &da8xx_i2c_device0;
- else if (instance == 1)
- pdev = &da8xx_i2c_device1;
- else
- return -EINVAL;
-
- pdev->dev.platform_data = pdata;
- return platform_device_register(pdev);
-}
-
-static struct resource da8xx_watchdog_resources[] = {
- {
- .start = DA8XX_WDOG_BASE,
- .end = DA8XX_WDOG_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da8xx_wdt_device = {
- .name = "watchdog",
- .id = -1,
- .num_resources = ARRAY_SIZE(da8xx_watchdog_resources),
- .resource = da8xx_watchdog_resources,
-};
-
-void da8xx_restart(char mode, const char *cmd)
-{
- struct device *dev;
-
- dev = bus_find_device_by_name(&platform_bus_type, NULL, "watchdog");
- if (!dev) {
- pr_err("%s: failed to find watchdog device\n", __func__);
- return;
- }
-
- davinci_watchdog_reset(to_platform_device(dev));
-}
-
-int __init da8xx_register_watchdog(void)
-{
- return platform_device_register(&da8xx_wdt_device);
-}
-
-static struct resource da8xx_emac_resources[] = {
- {
- .start = DA8XX_EMAC_CPPI_PORT_BASE,
- .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
- .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_C0_RX_PULSE,
- .end = IRQ_DA8XX_C0_RX_PULSE,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_C0_TX_PULSE,
- .end = IRQ_DA8XX_C0_TX_PULSE,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_C0_MISC_PULSE,
- .end = IRQ_DA8XX_C0_MISC_PULSE,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct emac_platform_data da8xx_emac_pdata = {
- .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET,
- .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET,
- .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET,
- .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE,
- .version = EMAC_VERSION_2,
-};
-
-static struct platform_device da8xx_emac_device = {
- .name = "davinci_emac",
- .id = 1,
- .dev = {
- .platform_data = &da8xx_emac_pdata,
- },
- .num_resources = ARRAY_SIZE(da8xx_emac_resources),
- .resource = da8xx_emac_resources,
-};
-
-static struct resource da8xx_mdio_resources[] = {
- {
- .start = DA8XX_EMAC_MDIO_BASE,
- .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da8xx_mdio_device = {
- .name = "davinci_mdio",
- .id = 0,
- .num_resources = ARRAY_SIZE(da8xx_mdio_resources),
- .resource = da8xx_mdio_resources,
-};
-
-int __init da8xx_register_emac(void)
-{
- int ret;
-
- ret = platform_device_register(&da8xx_mdio_device);
- if (ret < 0)
- return ret;
- ret = platform_device_register(&da8xx_emac_device);
- if (ret < 0)
- return ret;
- ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
- NULL, &da8xx_emac_device.dev);
- return ret;
-}
-
-static struct resource da830_mcasp1_resources[] = {
- {
- .name = "mcasp1",
- .start = DAVINCI_DA830_MCASP1_REG_BASE,
- .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
- .flags = IORESOURCE_MEM,
- },
- /* TX event */
- {
- .start = DAVINCI_DA830_DMA_MCASP1_AXEVT,
- .end = DAVINCI_DA830_DMA_MCASP1_AXEVT,
- .flags = IORESOURCE_DMA,
- },
- /* RX event */
- {
- .start = DAVINCI_DA830_DMA_MCASP1_AREVT,
- .end = DAVINCI_DA830_DMA_MCASP1_AREVT,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device da830_mcasp1_device = {
- .name = "davinci-mcasp",
- .id = 1,
- .num_resources = ARRAY_SIZE(da830_mcasp1_resources),
- .resource = da830_mcasp1_resources,
-};
-
-static struct resource da850_mcasp_resources[] = {
- {
- .name = "mcasp",
- .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
- .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
- .flags = IORESOURCE_MEM,
- },
- /* TX event */
- {
- .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
- .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
- .flags = IORESOURCE_DMA,
- },
- /* RX event */
- {
- .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
- .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device da850_mcasp_device = {
- .name = "davinci-mcasp",
- .id = 0,
- .num_resources = ARRAY_SIZE(da850_mcasp_resources),
- .resource = da850_mcasp_resources,
-};
-
-void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
-{
- /* DA830/OMAP-L137 has 3 instances of McASP */
- if (cpu_is_davinci_da830() && id == 1) {
- da830_mcasp1_device.dev.platform_data = pdata;
- platform_device_register(&da830_mcasp1_device);
- } else if (cpu_is_davinci_da850()) {
- da850_mcasp_device.dev.platform_data = pdata;
- platform_device_register(&da850_mcasp_device);
- }
-}
-
-static struct resource da8xx_pruss_resources[] = {
- {
- .start = DA8XX_PRUSS_MEM_BASE,
- .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DA8XX_EVTOUT0,
- .end = IRQ_DA8XX_EVTOUT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT1,
- .end = IRQ_DA8XX_EVTOUT1,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT2,
- .end = IRQ_DA8XX_EVTOUT2,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT3,
- .end = IRQ_DA8XX_EVTOUT3,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT4,
- .end = IRQ_DA8XX_EVTOUT4,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT5,
- .end = IRQ_DA8XX_EVTOUT5,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT6,
- .end = IRQ_DA8XX_EVTOUT6,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DA8XX_EVTOUT7,
- .end = IRQ_DA8XX_EVTOUT7,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct uio_pruss_pdata da8xx_uio_pruss_pdata = {
- .pintc_base = 0x4000,
-};
-
-static struct platform_device da8xx_uio_pruss_dev = {
- .name = "pruss_uio",
- .id = -1,
- .num_resources = ARRAY_SIZE(da8xx_pruss_resources),
- .resource = da8xx_pruss_resources,
- .dev = {
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &da8xx_uio_pruss_pdata,
- }
-};
-
-int __init da8xx_register_uio_pruss(void)
-{
- da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool();
- return platform_device_register(&da8xx_uio_pruss_dev);
-}
-
-static struct lcd_ctrl_config lcd_cfg = {
- .panel_shade = COLOR_ACTIVE,
- .bpp = 16,
-};
-
-struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
- .manu_name = "sharp",
- .controller_data = &lcd_cfg,
- .type = "Sharp_LCD035Q3DG01",
-};
-
-struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
- .manu_name = "sharp",
- .controller_data = &lcd_cfg,
- .type = "Sharp_LK043T1DG01",
-};
-
-static struct resource da8xx_lcdc_resources[] = {
- [0] = { /* registers */
- .start = DA8XX_LCD_CNTRL_BASE,
- .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = { /* interrupt */
- .start = IRQ_DA8XX_LCDINT,
- .end = IRQ_DA8XX_LCDINT,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da8xx_lcdc_device = {
- .name = "da8xx_lcdc",
- .id = 0,
- .num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
- .resource = da8xx_lcdc_resources,
-};
-
-int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
-{
- da8xx_lcdc_device.dev.platform_data = pdata;
- return platform_device_register(&da8xx_lcdc_device);
-}
-
-static struct resource da8xx_mmcsd0_resources[] = {
- { /* registers */
- .start = DA8XX_MMCSD0_BASE,
- .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- { /* interrupt */
- .start = IRQ_DA8XX_MMCSDINT0,
- .end = IRQ_DA8XX_MMCSDINT0,
- .flags = IORESOURCE_IRQ,
- },
- { /* DMA RX */
- .start = DA8XX_DMA_MMCSD0_RX,
- .end = DA8XX_DMA_MMCSD0_RX,
- .flags = IORESOURCE_DMA,
- },
- { /* DMA TX */
- .start = DA8XX_DMA_MMCSD0_TX,
- .end = DA8XX_DMA_MMCSD0_TX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device da8xx_mmcsd0_device = {
- .name = "davinci_mmc",
- .id = 0,
- .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources),
- .resource = da8xx_mmcsd0_resources,
-};
-
-int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
-{
- da8xx_mmcsd0_device.dev.platform_data = config;
- return platform_device_register(&da8xx_mmcsd0_device);
-}
-
-#ifdef CONFIG_ARCH_DAVINCI_DA850
-static struct resource da850_mmcsd1_resources[] = {
- { /* registers */
- .start = DA850_MMCSD1_BASE,
- .end = DA850_MMCSD1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- { /* interrupt */
- .start = IRQ_DA850_MMCSDINT0_1,
- .end = IRQ_DA850_MMCSDINT0_1,
- .flags = IORESOURCE_IRQ,
- },
- { /* DMA RX */
- .start = DA850_DMA_MMCSD1_RX,
- .end = DA850_DMA_MMCSD1_RX,
- .flags = IORESOURCE_DMA,
- },
- { /* DMA TX */
- .start = DA850_DMA_MMCSD1_TX,
- .end = DA850_DMA_MMCSD1_TX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device da850_mmcsd1_device = {
- .name = "davinci_mmc",
- .id = 1,
- .num_resources = ARRAY_SIZE(da850_mmcsd1_resources),
- .resource = da850_mmcsd1_resources,
-};
-
-int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
-{
- da850_mmcsd1_device.dev.platform_data = config;
- return platform_device_register(&da850_mmcsd1_device);
-}
-#endif
-
-static struct resource da8xx_rtc_resources[] = {
- {
- .start = DA8XX_RTC_BASE,
- .end = DA8XX_RTC_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- { /* timer irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
- .flags = IORESOURCE_IRQ,
- },
- { /* alarm irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device da8xx_rtc_device = {
- .name = "da830-rtc",
- .id = -1,
- .num_resources = ARRAY_SIZE(da8xx_rtc_resources),
- .resource = da8xx_rtc_resources,
-};
-
-int da8xx_register_rtc(void)
-{
- int ret;
-
- ret = platform_device_register(&da8xx_rtc_device);
- if (!ret)
- /* Atleast on DA850, RTC is a wakeup source */
- device_init_wakeup(&da8xx_rtc_device.dev, true);
-
- return ret;
-}
-
-static void __iomem *da8xx_ddr2_ctlr_base;
-void __iomem * __init da8xx_get_mem_ctlr(void)
-{
- if (da8xx_ddr2_ctlr_base)
- return da8xx_ddr2_ctlr_base;
-
- da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
- if (!da8xx_ddr2_ctlr_base)
- pr_warn("%s: Unable to map DDR2 controller", __func__);
-
- return da8xx_ddr2_ctlr_base;
-}
-
-static struct resource da8xx_cpuidle_resources[] = {
- {
- .start = DA8XX_DDR2_CTL_BASE,
- .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-/* DA8XX devices support DDR2 power down */
-static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
- .ddr2_pdown = 1,
-};
-
-
-static struct platform_device da8xx_cpuidle_device = {
- .name = "cpuidle-davinci",
- .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources),
- .resource = da8xx_cpuidle_resources,
- .dev = {
- .platform_data = &da8xx_cpuidle_pdata,
- },
-};
-
-int __init da8xx_register_cpuidle(void)
-{
- da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
-
- return platform_device_register(&da8xx_cpuidle_device);
-}
-
-static struct resource da8xx_spi0_resources[] = {
- [0] = {
- .start = DA8XX_SPI0_BASE,
- .end = DA8XX_SPI0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_DA8XX_SPINT0,
- .end = IRQ_DA8XX_SPINT0,
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- .start = DA8XX_DMA_SPI0_RX,
- .end = DA8XX_DMA_SPI0_RX,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .start = DA8XX_DMA_SPI0_TX,
- .end = DA8XX_DMA_SPI0_TX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct resource da8xx_spi1_resources[] = {
- [0] = {
- .start = DA830_SPI1_BASE,
- .end = DA830_SPI1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_DA8XX_SPINT1,
- .end = IRQ_DA8XX_SPINT1,
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- .start = DA8XX_DMA_SPI1_RX,
- .end = DA8XX_DMA_SPI1_RX,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .start = DA8XX_DMA_SPI1_TX,
- .end = DA8XX_DMA_SPI1_TX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct davinci_spi_platform_data da8xx_spi_pdata[] = {
- [0] = {
- .version = SPI_VERSION_2,
- .intr_line = 1,
- .dma_event_q = EVENTQ_0,
- },
- [1] = {
- .version = SPI_VERSION_2,
- .intr_line = 1,
- .dma_event_q = EVENTQ_0,
- },
-};
-
-static struct platform_device da8xx_spi_device[] = {
- [0] = {
- .name = "spi_davinci",
- .id = 0,
- .num_resources = ARRAY_SIZE(da8xx_spi0_resources),
- .resource = da8xx_spi0_resources,
- .dev = {
- .platform_data = &da8xx_spi_pdata[0],
- },
- },
- [1] = {
- .name = "spi_davinci",
- .id = 1,
- .num_resources = ARRAY_SIZE(da8xx_spi1_resources),
- .resource = da8xx_spi1_resources,
- .dev = {
- .platform_data = &da8xx_spi_pdata[1],
- },
- },
-};
-
-int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
-{
- if (instance < 0 || instance > 1)
- return -EINVAL;
-
- da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
-
- if (instance == 1 && cpu_is_davinci_da850()) {
- da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
- da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
- }
-
- return platform_device_register(&da8xx_spi_device[instance]);
-}
-
-#ifdef CONFIG_ARCH_DAVINCI_DA850
-
-static struct resource da850_sata_resources[] = {
- {
- .start = DA850_SATA_BASE,
- .end = DA850_SATA_BASE + 0x1fff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DA850_SATAINT,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-/* SATA PHY Control Register offset from AHCI base */
-#define SATA_P0PHYCR_REG 0x178
-
-#define SATA_PHY_MPY(x) ((x) << 0)
-#define SATA_PHY_LOS(x) ((x) << 6)
-#define SATA_PHY_RXCDR(x) ((x) << 10)
-#define SATA_PHY_RXEQ(x) ((x) << 13)
-#define SATA_PHY_TXSWING(x) ((x) << 19)
-#define SATA_PHY_ENPLL(x) ((x) << 31)
-
-static struct clk *da850_sata_clk;
-static unsigned long da850_sata_refclkpn;
-
-/* Supported DA850 SATA crystal frequencies */
-#define KHZ_TO_HZ(freq) ((freq) * 1000)
-static unsigned long da850_sata_xtal[] = {
- KHZ_TO_HZ(300000),
- KHZ_TO_HZ(250000),
- 0, /* Reserved */
- KHZ_TO_HZ(187500),
- KHZ_TO_HZ(150000),
- KHZ_TO_HZ(125000),
- KHZ_TO_HZ(120000),
- KHZ_TO_HZ(100000),
- KHZ_TO_HZ(75000),
- KHZ_TO_HZ(60000),
-};
-
-static int da850_sata_init(struct device *dev, void __iomem *addr)
-{
- int i, ret;
- unsigned int val;
-
- da850_sata_clk = clk_get(dev, NULL);
- if (IS_ERR(da850_sata_clk))
- return PTR_ERR(da850_sata_clk);
-
- ret = clk_prepare_enable(da850_sata_clk);
- if (ret)
- goto err0;
-
- /* Enable SATA clock receiver */
- val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
- val &= ~BIT(0);
- __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
-
- /* Get the multiplier needed for 1.5GHz PLL output */
- for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++)
- if (da850_sata_xtal[i] == da850_sata_refclkpn)
- break;
-
- if (i == ARRAY_SIZE(da850_sata_xtal)) {
- ret = -EINVAL;
- goto err1;
- }
-
- val = SATA_PHY_MPY(i + 1) |
- SATA_PHY_LOS(1) |
- SATA_PHY_RXCDR(4) |
- SATA_PHY_RXEQ(1) |
- SATA_PHY_TXSWING(3) |
- SATA_PHY_ENPLL(1);
-
- __raw_writel(val, addr + SATA_P0PHYCR_REG);
-
- return 0;
-
-err1:
- clk_disable_unprepare(da850_sata_clk);
-err0:
- clk_put(da850_sata_clk);
- return ret;
-}
-
-static void da850_sata_exit(struct device *dev)
-{
- clk_disable_unprepare(da850_sata_clk);
- clk_put(da850_sata_clk);
-}
-
-static struct ahci_platform_data da850_sata_pdata = {
- .init = da850_sata_init,
- .exit = da850_sata_exit,
-};
-
-static u64 da850_sata_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device da850_sata_device = {
- .name = "ahci",
- .id = -1,
- .dev = {
- .platform_data = &da850_sata_pdata,
- .dma_mask = &da850_sata_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(da850_sata_resources),
- .resource = da850_sata_resources,
-};
-
-int __init da850_register_sata(unsigned long refclkpn)
-{
- da850_sata_refclkpn = refclkpn;
- if (!da850_sata_refclkpn)
- return -EINVAL;
-
- return platform_device_register(&da850_sata_device);
-}
-#endif
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
deleted file mode 100644
index 773ab07a..00000000
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ /dev/null
@@ -1,409 +0,0 @@
-/*
- * Texas Instruments TNETV107X SoC devices
- *
- * Copyright (C) 2010 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/clk.h>
-#include <linux/slab.h>
-
-#include <mach/common.h>
-#include <mach/irqs.h>
-#include <mach/edma.h>
-#include <mach/tnetv107x.h>
-
-#include "clock.h"
-
-/* Base addresses for on-chip devices */
-#define TNETV107X_TPCC_BASE 0x01c00000
-#define TNETV107X_TPTC0_BASE 0x01c10000
-#define TNETV107X_TPTC1_BASE 0x01c10400
-#define TNETV107X_WDOG_BASE 0x08086700
-#define TNETV107X_TSC_BASE 0x08088500
-#define TNETV107X_SDIO0_BASE 0x08088700
-#define TNETV107X_SDIO1_BASE 0x08088800
-#define TNETV107X_KEYPAD_BASE 0x08088a00
-#define TNETV107X_SSP_BASE 0x08088c00
-#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000
-#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
-#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000
-#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000
-#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000
-
-/* TNETV107X specific EDMA3 information */
-#define EDMA_TNETV107X_NUM_DMACH 64
-#define EDMA_TNETV107X_NUM_TCC 64
-#define EDMA_TNETV107X_NUM_PARAMENTRY 128
-#define EDMA_TNETV107X_NUM_EVQUE 2
-#define EDMA_TNETV107X_NUM_TC 2
-#define EDMA_TNETV107X_CHMAP_EXIST 0
-#define EDMA_TNETV107X_NUM_REGIONS 4
-#define TNETV107X_DMACH2EVENT_MAP0 0x3C0CE000u
-#define TNETV107X_DMACH2EVENT_MAP1 0x000FFFFFu
-
-#define TNETV107X_DMACH_SDIO0_RX 26
-#define TNETV107X_DMACH_SDIO0_TX 27
-#define TNETV107X_DMACH_SDIO1_RX 28
-#define TNETV107X_DMACH_SDIO1_TX 29
-
-static const s8 edma_tc_mapping[][2] = {
- /* event queue no TC no */
- { 0, 0 },
- { 1, 1 },
- { -1, -1 }
-};
-
-static const s8 edma_priority_mapping[][2] = {
- /* event queue no Prio */
- { 0, 3 },
- { 1, 7 },
- { -1, -1 }
-};
-
-static struct edma_soc_info edma_cc0_info = {
- .n_channel = EDMA_TNETV107X_NUM_DMACH,
- .n_region = EDMA_TNETV107X_NUM_REGIONS,
- .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
- .n_tc = EDMA_TNETV107X_NUM_TC,
- .n_cc = 1,
- .queue_tc_mapping = edma_tc_mapping,
- .queue_priority_mapping = edma_priority_mapping,
- .default_queue = EVENTQ_1,
-};
-
-static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
-static struct resource edma_resources[] = {
- {
- .name = "edma_cc0",
- .start = TNETV107X_TPCC_BASE,
- .end = TNETV107X_TPCC_BASE + SZ_32K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc0",
- .start = TNETV107X_TPTC0_BASE,
- .end = TNETV107X_TPTC0_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc1",
- .start = TNETV107X_TPTC1_BASE,
- .end = TNETV107X_TPTC1_BASE + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma0",
- .start = IRQ_TNETV107X_TPCC,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma0_err",
- .start = IRQ_TNETV107X_TPCC_ERR,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device edma_device = {
- .name = "edma",
- .id = -1,
- .num_resources = ARRAY_SIZE(edma_resources),
- .resource = edma_resources,
- .dev.platform_data = tnetv107x_edma_info,
-};
-
-static struct plat_serial8250_port serial_data[] = {
- {
- .mapbase = TNETV107X_UART0_BASE,
- .irq = IRQ_TNETV107X_UART0,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_FIXED_TYPE | UPF_IOREMAP,
- .type = PORT_AR7,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- },
- {
- .mapbase = TNETV107X_UART1_BASE,
- .irq = IRQ_TNETV107X_UART1,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_FIXED_TYPE | UPF_IOREMAP,
- .type = PORT_AR7,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- },
- {
- .mapbase = TNETV107X_UART2_BASE,
- .irq = IRQ_TNETV107X_UART2,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_FIXED_TYPE | UPF_IOREMAP,
- .type = PORT_AR7,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- },
- {
- .flags = 0,
- },
-};
-
-struct platform_device tnetv107x_serial_device = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev.platform_data = serial_data,
-};
-
-static struct resource mmc0_resources[] = {
- { /* Memory mapped registers */
- .start = TNETV107X_SDIO0_BASE,
- .end = TNETV107X_SDIO0_BASE + 0x0ff,
- .flags = IORESOURCE_MEM
- },
- { /* MMC interrupt */
- .start = IRQ_TNETV107X_MMC0,
- .flags = IORESOURCE_IRQ
- },
- { /* SDIO interrupt */
- .start = IRQ_TNETV107X_SDIO0,
- .flags = IORESOURCE_IRQ
- },
- { /* DMA RX */
- .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
- .flags = IORESOURCE_DMA
- },
- { /* DMA TX */
- .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
- .flags = IORESOURCE_DMA
- },
-};
-
-static struct resource mmc1_resources[] = {
- { /* Memory mapped registers */
- .start = TNETV107X_SDIO1_BASE,
- .end = TNETV107X_SDIO1_BASE + 0x0ff,
- .flags = IORESOURCE_MEM
- },
- { /* MMC interrupt */
- .start = IRQ_TNETV107X_MMC1,
- .flags = IORESOURCE_IRQ
- },
- { /* SDIO interrupt */
- .start = IRQ_TNETV107X_SDIO1,
- .flags = IORESOURCE_IRQ
- },
- { /* DMA RX */
- .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
- .flags = IORESOURCE_DMA
- },
- { /* DMA TX */
- .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
- .flags = IORESOURCE_DMA
- },
-};
-
-static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
-static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device mmc_devices[2] = {
- {
- .name = "davinci_mmc",
- .id = 0,
- .dev = {
- .dma_mask = &mmc0_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(mmc0_resources),
- .resource = mmc0_resources
- },
- {
- .name = "davinci_mmc",
- .id = 1,
- .dev = {
- .dma_mask = &mmc1_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(mmc1_resources),
- .resource = mmc1_resources
- },
-};
-
-static const u32 emif_windows[] = {
- TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
- TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
-};
-
-static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };
-
-static struct resource wdt_resources[] = {
- {
- .start = TNETV107X_WDOG_BASE,
- .end = TNETV107X_WDOG_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device tnetv107x_wdt_device = {
- .name = "tnetv107x_wdt",
- .id = 0,
- .num_resources = ARRAY_SIZE(wdt_resources),
- .resource = wdt_resources,
-};
-
-static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
-{
- struct resource res[2];
- struct platform_device *pdev;
- u32 range;
- int ret;
-
- /* Figure out the resource range from the ale/cle masks */
- range = max(data->mask_cle, data->mask_ale);
- range = PAGE_ALIGN(range + 4) - 1;
-
- if (range >= emif_window_sizes[chipsel])
- return -EINVAL;
-
- pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
- if (!pdev)
- return -ENOMEM;
-
- pdev->name = "davinci_nand";
- pdev->id = chipsel;
- pdev->dev.platform_data = data;
-
- memset(res, 0, sizeof(res));
-
- res[0].start = emif_windows[chipsel];
- res[0].end = res[0].start + range;
- res[0].flags = IORESOURCE_MEM;
-
- res[1].start = TNETV107X_ASYNC_EMIF_CNTRL_BASE;
- res[1].end = res[1].start + SZ_4K - 1;
- res[1].flags = IORESOURCE_MEM;
-
- ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
- if (ret < 0) {
- kfree(pdev);
- return ret;
- }
-
- return platform_device_register(pdev);
-}
-
-static struct resource keypad_resources[] = {
- {
- .start = TNETV107X_KEYPAD_BASE,
- .end = TNETV107X_KEYPAD_BASE + 0xff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_TNETV107X_KEYPAD,
- .flags = IORESOURCE_IRQ,
- .name = "press",
- },
- {
- .start = IRQ_TNETV107X_KEYPAD_FREE,
- .flags = IORESOURCE_IRQ,
- .name = "release",
- },
-};
-
-static struct platform_device keypad_device = {
- .name = "tnetv107x-keypad",
- .num_resources = ARRAY_SIZE(keypad_resources),
- .resource = keypad_resources,
-};
-
-static struct resource tsc_resources[] = {
- {
- .start = TNETV107X_TSC_BASE,
- .end = TNETV107X_TSC_BASE + 0xff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_TNETV107X_TSC,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device tsc_device = {
- .name = "tnetv107x-ts",
- .num_resources = ARRAY_SIZE(tsc_resources),
- .resource = tsc_resources,
-};
-
-static struct resource ssp_resources[] = {
- {
- .start = TNETV107X_SSP_BASE,
- .end = TNETV107X_SSP_BASE + 0x1ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_TNETV107X_SSP,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device ssp_device = {
- .name = "ti-ssp",
- .id = -1,
- .num_resources = ARRAY_SIZE(ssp_resources),
- .resource = ssp_resources,
-};
-
-void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
-{
- int i, error;
- struct clk *tsc_clk;
-
- /*
- * The reset defaults for tnetv107x tsc clock divider is set too high.
- * This forces the clock down to a range that allows the ADC to
- * complete sample conversion in time.
- */
- tsc_clk = clk_get(NULL, "sys_tsc_clk");
- if (!IS_ERR(tsc_clk)) {
- error = clk_set_rate(tsc_clk, 5000000);
- WARN_ON(error < 0);
- clk_put(tsc_clk);
- }
-
- platform_device_register(&edma_device);
- platform_device_register(&tnetv107x_wdt_device);
- platform_device_register(&tsc_device);
-
- if (info->serial_config)
- davinci_serial_init(info->serial_config);
-
- for (i = 0; i < 2; i++)
- if (info->mmc_config[i]) {
- mmc_devices[i].dev.platform_data = info->mmc_config[i];
- platform_device_register(&mmc_devices[i]);
- }
-
- for (i = 0; i < 4; i++)
- if (info->nand_config[i])
- nand_init(i, info->nand_config[i]);
-
- if (info->keypad_config) {
- keypad_device.dev.platform_data = info->keypad_config;
- platform_device_register(&keypad_device);
- }
-
- if (info->ssp_config) {
- ssp_device.dev.platform_data = info->ssp_config;
- platform_device_register(&ssp_device);
- }
-}
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 4c48a36e..a9ef7b68 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -19,9 +19,10 @@
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <mach/edma.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
+#include <linux/platform_data/edma.h>
+
#include "davinci.h"
#include "clock.h"
@@ -34,6 +35,9 @@
#define DM365_MMCSD0_BASE 0x01D11000
#define DM365_MMCSD1_BASE 0x01D00000
+#define DAVINCI_DMA_MMCRXEVT 26
+#define DAVINCI_DMA_MMCTXEVT 27
+
void __iomem *davinci_sysmod_base;
void davinci_map_sysmod(void)
@@ -119,7 +123,7 @@ void __init davinci_init_ide(void)
platform_device_register(&ide_device);
}
-#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
+#if IS_ENABLED(CONFIG_MMC_DAVINCI)
static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
@@ -150,7 +154,7 @@ static struct resource mmcsd0_resources[] = {
};
static struct platform_device davinci_mmcsd0_device = {
- .name = "davinci_mmc",
+ .name = "dm6441-mmc",
.id = 0,
.dev = {
.dma_mask = &mmcsd0_dma_mask,
@@ -187,7 +191,7 @@ static struct resource mmcsd1_resources[] = {
};
static struct platform_device davinci_mmcsd1_device = {
- .name = "davinci_mmc",
+ .name = "dm6441-mmc",
.id = 1,
.dev = {
.dma_mask = &mmcsd1_dma_mask,
@@ -235,6 +239,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
SZ_4K - 1;
mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
+ davinci_mmcsd1_device.name = "dm365-mmc";
} else
break;
@@ -256,6 +261,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
SZ_4K - 1;
mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
+ davinci_mmcsd0_device.name = "dm365-mmc";
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
/* Power-on 3.3V IO cells */
@@ -311,6 +317,15 @@ static void davinci_init_wdt(void)
platform_device_register(&davinci_wdt_device);
}
+struct platform_device davinci_pcm_device = {
+ .name = "davinci-pcm-audio",
+ .id = -1,
+};
+
+static void davinci_init_pcm(void)
+{
+ platform_device_register(&davinci_pcm_device);
+}
/*-------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------*/
@@ -335,6 +350,7 @@ static int __init davinci_init_devices(void)
/* please keep these calls, and their implementations above,
* in alphabetical order so they're easier to sort through.
*/
+ davinci_init_pcm();
davinci_init_wdt();
return 0;
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
deleted file mode 100644
index b49c3b77..00000000
--- a/arch/arm/mach-davinci/dm355.c
+++ /dev/null
@@ -1,887 +0,0 @@
-/*
- * TI DaVinci DM355 chip specific setup
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/serial_8250.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-
-#include <linux/spi/spi.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/cputype.h>
-#include <mach/edma.h>
-#include <mach/psc.h>
-#include <mach/mux.h>
-#include <mach/irqs.h>
-#include <mach/time.h>
-#include <mach/serial.h>
-#include <mach/common.h>
-#include <linux/platform_data/spi-davinci.h>
-#include <mach/gpio-davinci.h>
-
-#include "davinci.h"
-#include "clock.h"
-#include "mux.h"
-#include "asp.h"
-
-#define DM355_UART2_BASE (IO_PHYS + 0x206000)
-
-/*
- * Device specific clocks
- */
-#define DM355_REF_FREQ 24000000 /* 24 or 36 MHz */
-
-static struct pll_data pll1_data = {
- .num = 1,
- .phys_base = DAVINCI_PLL1_BASE,
- .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct pll_data pll2_data = {
- .num = 2,
- .phys_base = DAVINCI_PLL2_BASE,
- .flags = PLL_HAS_PREDIV,
-};
-
-static struct clk ref_clk = {
- .name = "ref_clk",
- /* FIXME -- crystal rate is board-specific */
- .rate = DM355_REF_FREQ,
-};
-
-static struct clk pll1_clk = {
- .name = "pll1",
- .parent = &ref_clk,
- .flags = CLK_PLL,
- .pll_data = &pll1_data,
-};
-
-static struct clk pll1_aux_clk = {
- .name = "pll1_aux_clk",
- .parent = &pll1_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
- .name = "pll1_sysclk1",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
- .name = "pll1_sysclk2",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
- .name = "pll1_sysclk3",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
- .name = "pll1_sysclk4",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV4,
-};
-
-static struct clk pll1_sysclkbp = {
- .name = "pll1_sysclkbp",
- .parent = &pll1_clk,
- .flags = CLK_PLL | PRE_PLL,
- .div_reg = BPDIV
-};
-
-static struct clk vpss_dac_clk = {
- .name = "vpss_dac",
- .parent = &pll1_sysclk3,
- .lpsc = DM355_LPSC_VPSS_DAC,
-};
-
-static struct clk vpss_master_clk = {
- .name = "vpss_master",
- .parent = &pll1_sysclk4,
- .lpsc = DAVINCI_LPSC_VPSSMSTR,
- .flags = CLK_PSC,
-};
-
-static struct clk vpss_slave_clk = {
- .name = "vpss_slave",
- .parent = &pll1_sysclk4,
- .lpsc = DAVINCI_LPSC_VPSSSLV,
-};
-
-static struct clk clkout1_clk = {
- .name = "clkout1",
- .parent = &pll1_aux_clk,
- /* NOTE: clkout1 can be externally gated by muxing GPIO-18 */
-};
-
-static struct clk clkout2_clk = {
- .name = "clkout2",
- .parent = &pll1_sysclkbp,
-};
-
-static struct clk pll2_clk = {
- .name = "pll2",
- .parent = &ref_clk,
- .flags = CLK_PLL,
- .pll_data = &pll2_data,
-};
-
-static struct clk pll2_sysclk1 = {
- .name = "pll2_sysclk1",
- .parent = &pll2_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV1,
-};
-
-static struct clk pll2_sysclkbp = {
- .name = "pll2_sysclkbp",
- .parent = &pll2_clk,
- .flags = CLK_PLL | PRE_PLL,
- .div_reg = BPDIV
-};
-
-static struct clk clkout3_clk = {
- .name = "clkout3",
- .parent = &pll2_sysclkbp,
- /* NOTE: clkout3 can be externally gated by muxing GPIO-16 */
-};
-
-static struct clk arm_clk = {
- .name = "arm_clk",
- .parent = &pll1_sysclk1,
- .lpsc = DAVINCI_LPSC_ARM,
- .flags = ALWAYS_ENABLED,
-};
-
-/*
- * NOT LISTED below, and not touched by Linux
- * - in SyncReset state by default
- * .lpsc = DAVINCI_LPSC_TPCC,
- * .lpsc = DAVINCI_LPSC_TPTC0,
- * .lpsc = DAVINCI_LPSC_TPTC1,
- * .lpsc = DAVINCI_LPSC_DDR_EMIF, .parent = &sysclk2_clk,
- * .lpsc = DAVINCI_LPSC_MEMSTICK,
- * - in Enabled state by default
- * .lpsc = DAVINCI_LPSC_SYSTEM_SUBSYS,
- * .lpsc = DAVINCI_LPSC_SCR2, // "bus"
- * .lpsc = DAVINCI_LPSC_SCR3, // "bus"
- * .lpsc = DAVINCI_LPSC_SCR4, // "bus"
- * .lpsc = DAVINCI_LPSC_CROSSBAR, // "emulation"
- * .lpsc = DAVINCI_LPSC_CFG27, // "test"
- * .lpsc = DAVINCI_LPSC_CFG3, // "test"
- * .lpsc = DAVINCI_LPSC_CFG5, // "test"
- */
-
-static struct clk mjcp_clk = {
- .name = "mjcp",
- .parent = &pll1_sysclk1,
- .lpsc = DAVINCI_LPSC_IMCOP,
-};
-
-static struct clk uart0_clk = {
- .name = "uart0",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
- .name = "uart1",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_UART1,
-};
-
-static struct clk uart2_clk = {
- .name = "uart2",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_UART2,
-};
-
-static struct clk i2c_clk = {
- .name = "i2c",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_I2C,
-};
-
-static struct clk asp0_clk = {
- .name = "asp0",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_McBSP,
-};
-
-static struct clk asp1_clk = {
- .name = "asp1",
- .parent = &pll1_sysclk2,
- .lpsc = DM355_LPSC_McBSP1,
-};
-
-static struct clk mmcsd0_clk = {
- .name = "mmcsd0",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_MMC_SD,
-};
-
-static struct clk mmcsd1_clk = {
- .name = "mmcsd1",
- .parent = &pll1_sysclk2,
- .lpsc = DM355_LPSC_MMC_SD1,
-};
-
-static struct clk spi0_clk = {
- .name = "spi0",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_SPI,
-};
-
-static struct clk spi1_clk = {
- .name = "spi1",
- .parent = &pll1_sysclk2,
- .lpsc = DM355_LPSC_SPI1,
-};
-
-static struct clk spi2_clk = {
- .name = "spi2",
- .parent = &pll1_sysclk2,
- .lpsc = DM355_LPSC_SPI2,
-};
-
-static struct clk gpio_clk = {
- .name = "gpio",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_GPIO,
-};
-
-static struct clk aemif_clk = {
- .name = "aemif",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_AEMIF,
-};
-
-static struct clk pwm0_clk = {
- .name = "pwm0",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_PWM0,
-};
-
-static struct clk pwm1_clk = {
- .name = "pwm1",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_PWM1,
-};
-
-static struct clk pwm2_clk = {
- .name = "pwm2",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_PWM2,
-};
-
-static struct clk pwm3_clk = {
- .name = "pwm3",
- .parent = &pll1_aux_clk,
- .lpsc = DM355_LPSC_PWM3,
-};
-
-static struct clk timer0_clk = {
- .name = "timer0",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_TIMER0,
-};
-
-static struct clk timer1_clk = {
- .name = "timer1",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_TIMER1,
-};
-
-static struct clk timer2_clk = {
- .name = "timer2",
- .parent = &pll1_aux_clk,
- .lpsc = DAVINCI_LPSC_TIMER2,
- .usecount = 1, /* REVISIT: why can't this be disabled? */
-};
-
-static struct clk timer3_clk = {
- .name = "timer3",
- .parent = &pll1_aux_clk,
- .lpsc = DM355_LPSC_TIMER3,
-};
-
-static struct clk rto_clk = {
- .name = "rto",
- .parent = &pll1_aux_clk,
- .lpsc = DM355_LPSC_RTO,
-};
-
-static struct clk usb_clk = {
- .name = "usb",
- .parent = &pll1_sysclk2,
- .lpsc = DAVINCI_LPSC_USB,
-};
-
-static struct clk_lookup dm355_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK(NULL, "vpss_master", &vpss_master_clk),
- CLK(NULL, "vpss_slave", &vpss_slave_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "clkout2", &clkout2_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "clkout3", &clkout3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci-mcbsp.0", NULL, &asp0_clk),
- CLK("davinci-mcbsp.1", NULL, &asp1_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
- CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("watchdog", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, NULL, NULL),
-};
-
-/*----------------------------------------------------------------------*/
-
-static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32);
-
-static struct resource dm355_spi0_resources[] = {
- {
- .start = 0x01c66000,
- .end = 0x01c667ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DM355_SPINT0_0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = 17,
- .flags = IORESOURCE_DMA,
- },
- {
- .start = 16,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct davinci_spi_platform_data dm355_spi0_pdata = {
- .version = SPI_VERSION_1,
- .num_chipselect = 2,
- .cshold_bug = true,
- .dma_event_q = EVENTQ_1,
-};
-static struct platform_device dm355_spi0_device = {
- .name = "spi_davinci",
- .id = 0,
- .dev = {
- .dma_mask = &dm355_spi0_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &dm355_spi0_pdata,
- },
- .num_resources = ARRAY_SIZE(dm355_spi0_resources),
- .resource = dm355_spi0_resources,
-};
-
-void __init dm355_init_spi0(unsigned chipselect_mask,
- const struct spi_board_info *info, unsigned len)
-{
- /* for now, assume we need MISO */
- davinci_cfg_reg(DM355_SPI0_SDI);
-
- /* not all slaves will be wired up */
- if (chipselect_mask & BIT(0))
- davinci_cfg_reg(DM355_SPI0_SDENA0);
- if (chipselect_mask & BIT(1))
- davinci_cfg_reg(DM355_SPI0_SDENA1);
-
- spi_register_board_info(info, len);
-
- platform_device_register(&dm355_spi0_device);
-}
-
-/*----------------------------------------------------------------------*/
-
-#define INTMUX 0x18
-#define EVTMUX 0x1c
-
-/*
- * Device specific mux setup
- *
- * soc description mux mode mode mux dbg
- * reg offset mask mode
- */
-static const struct mux_config dm355_pins[] = {
-#ifdef CONFIG_DAVINCI_MUX
-MUX_CFG(DM355, MMCSD0, 4, 2, 1, 0, false)
-
-MUX_CFG(DM355, SD1_CLK, 3, 6, 1, 1, false)
-MUX_CFG(DM355, SD1_CMD, 3, 7, 1, 1, false)
-MUX_CFG(DM355, SD1_DATA3, 3, 8, 3, 1, false)
-MUX_CFG(DM355, SD1_DATA2, 3, 10, 3, 1, false)
-MUX_CFG(DM355, SD1_DATA1, 3, 12, 3, 1, false)
-MUX_CFG(DM355, SD1_DATA0, 3, 14, 3, 1, false)
-
-MUX_CFG(DM355, I2C_SDA, 3, 19, 1, 1, false)
-MUX_CFG(DM355, I2C_SCL, 3, 20, 1, 1, false)
-
-MUX_CFG(DM355, MCBSP0_BDX, 3, 0, 1, 1, false)
-MUX_CFG(DM355, MCBSP0_X, 3, 1, 1, 1, false)
-MUX_CFG(DM355, MCBSP0_BFSX, 3, 2, 1, 1, false)
-MUX_CFG(DM355, MCBSP0_BDR, 3, 3, 1, 1, false)
-MUX_CFG(DM355, MCBSP0_R, 3, 4, 1, 1, false)
-MUX_CFG(DM355, MCBSP0_BFSR, 3, 5, 1, 1, false)
-
-MUX_CFG(DM355, SPI0_SDI, 4, 1, 1, 0, false)
-MUX_CFG(DM355, SPI0_SDENA0, 4, 0, 1, 0, false)
-MUX_CFG(DM355, SPI0_SDENA1, 3, 28, 1, 1, false)
-
-INT_CFG(DM355, INT_EDMA_CC, 2, 1, 1, false)
-INT_CFG(DM355, INT_EDMA_TC0_ERR, 3, 1, 1, false)
-INT_CFG(DM355, INT_EDMA_TC1_ERR, 4, 1, 1, false)
-
-EVT_CFG(DM355, EVT8_ASP1_TX, 0, 1, 0, false)
-EVT_CFG(DM355, EVT9_ASP1_RX, 1, 1, 0, false)
-EVT_CFG(DM355, EVT26_MMC0_RX, 2, 1, 0, false)
-
-MUX_CFG(DM355, VOUT_FIELD, 1, 18, 3, 1, false)
-MUX_CFG(DM355, VOUT_FIELD_G70, 1, 18, 3, 0, false)
-MUX_CFG(DM355, VOUT_HVSYNC, 1, 16, 1, 0, false)
-MUX_CFG(DM355, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false)
-MUX_CFG(DM355, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false)
-
-MUX_CFG(DM355, VIN_PCLK, 0, 14, 1, 1, false)
-MUX_CFG(DM355, VIN_CAM_WEN, 0, 13, 1, 1, false)
-MUX_CFG(DM355, VIN_CAM_VD, 0, 12, 1, 1, false)
-MUX_CFG(DM355, VIN_CAM_HD, 0, 11, 1, 1, false)
-MUX_CFG(DM355, VIN_YIN_EN, 0, 10, 1, 1, false)
-MUX_CFG(DM355, VIN_CINL_EN, 0, 0, 0xff, 0x55, false)
-MUX_CFG(DM355, VIN_CINH_EN, 0, 8, 3, 3, false)
-#endif
-};
-
-static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
- [IRQ_DM355_CCDC_VDINT0] = 2,
- [IRQ_DM355_CCDC_VDINT1] = 6,
- [IRQ_DM355_CCDC_VDINT2] = 6,
- [IRQ_DM355_IPIPE_HST] = 6,
- [IRQ_DM355_H3AINT] = 6,
- [IRQ_DM355_IPIPE_SDR] = 6,
- [IRQ_DM355_IPIPEIFINT] = 6,
- [IRQ_DM355_OSDINT] = 7,
- [IRQ_DM355_VENCINT] = 6,
- [IRQ_ASQINT] = 6,
- [IRQ_IMXINT] = 6,
- [IRQ_USBINT] = 4,
- [IRQ_DM355_RTOINT] = 4,
- [IRQ_DM355_UARTINT2] = 7,
- [IRQ_DM355_TINT6] = 7,
- [IRQ_CCINT0] = 5, /* dma */
- [IRQ_CCERRINT] = 5, /* dma */
- [IRQ_TCERRINT0] = 5, /* dma */
- [IRQ_TCERRINT] = 5, /* dma */
- [IRQ_DM355_SPINT2_1] = 7,
- [IRQ_DM355_TINT7] = 4,
- [IRQ_DM355_SDIOINT0] = 7,
- [IRQ_MBXINT] = 7,
- [IRQ_MBRINT] = 7,
- [IRQ_MMCINT] = 7,
- [IRQ_DM355_MMCINT1] = 7,
- [IRQ_DM355_PWMINT3] = 7,
- [IRQ_DDRINT] = 7,
- [IRQ_AEMIFINT] = 7,
- [IRQ_DM355_SDIOINT1] = 4,
- [IRQ_TINT0_TINT12] = 2, /* clockevent */
- [IRQ_TINT0_TINT34] = 2, /* clocksource */
- [IRQ_TINT1_TINT12] = 7, /* DSP timer */
- [IRQ_TINT1_TINT34] = 7, /* system tick */
- [IRQ_PWMINT0] = 7,
- [IRQ_PWMINT1] = 7,
- [IRQ_PWMINT2] = 7,
- [IRQ_I2C] = 3,
- [IRQ_UARTINT0] = 3,
- [IRQ_UARTINT1] = 3,
- [IRQ_DM355_SPINT0_0] = 3,
- [IRQ_DM355_SPINT0_1] = 3,
- [IRQ_DM355_GPIO0] = 3,
- [IRQ_DM355_GPIO1] = 7,
- [IRQ_DM355_GPIO2] = 4,
- [IRQ_DM355_GPIO3] = 4,
- [IRQ_DM355_GPIO4] = 7,
- [IRQ_DM355_GPIO5] = 7,
- [IRQ_DM355_GPIO6] = 7,
- [IRQ_DM355_GPIO7] = 7,
- [IRQ_DM355_GPIO8] = 7,
- [IRQ_DM355_GPIO9] = 7,
- [IRQ_DM355_GPIOBNK0] = 7,
- [IRQ_DM355_GPIOBNK1] = 7,
- [IRQ_DM355_GPIOBNK2] = 7,
- [IRQ_DM355_GPIOBNK3] = 7,
- [IRQ_DM355_GPIOBNK4] = 7,
- [IRQ_DM355_GPIOBNK5] = 7,
- [IRQ_DM355_GPIOBNK6] = 7,
- [IRQ_COMMTX] = 7,
- [IRQ_COMMRX] = 7,
- [IRQ_EMUINT] = 7,
-};
-
-/*----------------------------------------------------------------------*/
-
-static const s8
-queue_tc_mapping[][2] = {
- /* {event queue no, TC no} */
- {0, 0},
- {1, 1},
- {-1, -1},
-};
-
-static const s8
-queue_priority_mapping[][2] = {
- /* {event queue no, Priority} */
- {0, 3},
- {1, 7},
- {-1, -1},
-};
-
-static struct edma_soc_info edma_cc0_info = {
- .n_channel = 64,
- .n_region = 4,
- .n_slot = 128,
- .n_tc = 2,
- .n_cc = 1,
- .queue_tc_mapping = queue_tc_mapping,
- .queue_priority_mapping = queue_priority_mapping,
- .default_queue = EVENTQ_1,
-};
-
-static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
-static struct resource edma_resources[] = {
- {
- .name = "edma_cc0",
- .start = 0x01c00000,
- .end = 0x01c00000 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc0",
- .start = 0x01c10000,
- .end = 0x01c10000 + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc1",
- .start = 0x01c10400,
- .end = 0x01c10400 + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma0",
- .start = IRQ_CCINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma0_err",
- .start = IRQ_CCERRINT,
- .flags = IORESOURCE_IRQ,
- },
- /* not using (or muxing) TC*_ERR */
-};
-
-static struct platform_device dm355_edma_device = {
- .name = "edma",
- .id = 0,
- .dev.platform_data = dm355_edma_info,
- .num_resources = ARRAY_SIZE(edma_resources),
- .resource = edma_resources,
-};
-
-static struct resource dm355_asp1_resources[] = {
- {
- .start = DAVINCI_ASP1_BASE,
- .end = DAVINCI_ASP1_BASE + SZ_8K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = DAVINCI_DMA_ASP1_TX,
- .end = DAVINCI_DMA_ASP1_TX,
- .flags = IORESOURCE_DMA,
- },
- {
- .start = DAVINCI_DMA_ASP1_RX,
- .end = DAVINCI_DMA_ASP1_RX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device dm355_asp1_device = {
- .name = "davinci-mcbsp",
- .id = 1,
- .num_resources = ARRAY_SIZE(dm355_asp1_resources),
- .resource = dm355_asp1_resources,
-};
-
-static void dm355_ccdc_setup_pinmux(void)
-{
- davinci_cfg_reg(DM355_VIN_PCLK);
- davinci_cfg_reg(DM355_VIN_CAM_WEN);
- davinci_cfg_reg(DM355_VIN_CAM_VD);
- davinci_cfg_reg(DM355_VIN_CAM_HD);
- davinci_cfg_reg(DM355_VIN_YIN_EN);
- davinci_cfg_reg(DM355_VIN_CINL_EN);
- davinci_cfg_reg(DM355_VIN_CINH_EN);
-}
-
-static struct resource dm355_vpss_resources[] = {
- {
- /* VPSS BL Base address */
- .name = "vpss",
- .start = 0x01c70800,
- .end = 0x01c70800 + 0xff,
- .flags = IORESOURCE_MEM,
- },
- {
- /* VPSS CLK Base address */
- .name = "vpss",
- .start = 0x01c70000,
- .end = 0x01c70000 + 0xf,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device dm355_vpss_device = {
- .name = "vpss",
- .id = -1,
- .dev.platform_data = "dm355_vpss",
- .num_resources = ARRAY_SIZE(dm355_vpss_resources),
- .resource = dm355_vpss_resources,
-};
-
-static struct resource vpfe_resources[] = {
- {
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
-static struct resource dm355_ccdc_resource[] = {
- /* CCDC Base address */
- {
- .flags = IORESOURCE_MEM,
- .start = 0x01c70600,
- .end = 0x01c70600 + 0x1ff,
- },
-};
-static struct platform_device dm355_ccdc_dev = {
- .name = "dm355_ccdc",
- .id = -1,
- .num_resources = ARRAY_SIZE(dm355_ccdc_resource),
- .resource = dm355_ccdc_resource,
- .dev = {
- .dma_mask = &vpfe_capture_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = dm355_ccdc_setup_pinmux,
- },
-};
-
-static struct platform_device vpfe_capture_dev = {
- .name = CAPTURE_DRV_NAME,
- .id = -1,
- .num_resources = ARRAY_SIZE(vpfe_resources),
- .resource = vpfe_resources,
- .dev = {
- .dma_mask = &vpfe_capture_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-void dm355_set_vpfe_config(struct vpfe_config *cfg)
-{
- vpfe_capture_dev.dev.platform_data = cfg;
-}
-
-/*----------------------------------------------------------------------*/
-
-static struct map_desc dm355_io_desc[] = {
- {
- .virtual = IO_VIRT,
- .pfn = __phys_to_pfn(IO_PHYS),
- .length = IO_SIZE,
- .type = MT_DEVICE
- },
-};
-
-/* Contents of JTAG ID register used to identify exact cpu type */
-static struct davinci_id dm355_ids[] = {
- {
- .variant = 0x0,
- .part_no = 0xb73b,
- .manufacturer = 0x00f,
- .cpu_id = DAVINCI_CPU_ID_DM355,
- .name = "dm355",
- },
-};
-
-static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
-
-/*
- * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
- * T0_TOP: Timer 0, top : clocksource for generic timekeeping
- * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
- * T1_TOP: Timer 1, top : <unused>
- */
-static struct davinci_timer_info dm355_timer_info = {
- .timers = davinci_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
-};
-
-static struct plat_serial8250_port dm355_serial_platform_data[] = {
- {
- .mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM,
- .regshift = 2,
- },
- {
- .mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM,
- .regshift = 2,
- },
- {
- .mapbase = DM355_UART2_BASE,
- .irq = IRQ_DM355_UARTINT2,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM,
- .regshift = 2,
- },
- {
- .flags = 0
- },
-};
-
-static struct platform_device dm355_serial_device = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev = {
- .platform_data = dm355_serial_platform_data,
- },
-};
-
-static struct davinci_soc_info davinci_soc_info_dm355 = {
- .io_desc = dm355_io_desc,
- .io_desc_num = ARRAY_SIZE(dm355_io_desc),
- .jtag_id_reg = 0x01c40028,
- .ids = dm355_ids,
- .ids_num = ARRAY_SIZE(dm355_ids),
- .cpu_clks = dm355_clks,
- .psc_bases = dm355_psc_bases,
- .psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
- .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
- .pinmux_pins = dm355_pins,
- .pinmux_pins_num = ARRAY_SIZE(dm355_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
- .intc_irq_prios = dm355_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
- .timer_info = &dm355_timer_info,
- .gpio_type = GPIO_TYPE_DAVINCI,
- .gpio_base = DAVINCI_GPIO_BASE,
- .gpio_num = 104,
- .gpio_irq = IRQ_DM355_GPIOBNK0,
- .serial_dev = &dm355_serial_device,
- .sram_dma = 0x00010000,
- .sram_len = SZ_32K,
-};
-
-void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
-{
- /* we don't use ASP1 IRQs, or we'd need to mux them ... */
- if (evt_enable & ASP1_TX_EVT_EN)
- davinci_cfg_reg(DM355_EVT8_ASP1_TX);
-
- if (evt_enable & ASP1_RX_EVT_EN)
- davinci_cfg_reg(DM355_EVT9_ASP1_RX);
-
- dm355_asp1_device.dev.platform_data = pdata;
- platform_device_register(&dm355_asp1_device);
-}
-
-void __init dm355_init(void)
-{
- davinci_common_init(&davinci_soc_info_dm355);
- davinci_map_sysmod();
-}
-
-static int __init dm355_init_devices(void)
-{
- if (!cpu_is_davinci_dm355())
- return 0;
-
- /* Add ccdc clock aliases */
- clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
- clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
- davinci_cfg_reg(DM355_INT_EDMA_CC);
- platform_device_register(&dm355_edma_device);
- platform_device_register(&dm355_vpss_device);
- platform_device_register(&dm355_ccdc_dev);
- platform_device_register(&vpfe_capture_dev);
-
- return 0;
-}
-postcore_initcall(dm355_init_devices);
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6c398054..6bb0ac18 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,11 +18,11 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
@@ -32,23 +32,21 @@
#include <linux/platform_data/keyscan-davinci.h>
#include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
-
#include "davinci.h"
+
#include "clock.h"
#include "mux.h"
#include "asp.h"
-#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */
-
-/* Base of key scan register bank */
-#define DM365_KEYSCAN_BASE 0x01c69400
+#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */
#define DM365_RTC_BASE 0x01c69000
-
+#define DM365_KEYSCAN_BASE 0x01c69400
+#define DM365_OSD_BASE 0x01c71c00
+#define DM365_VENC_BASE 0x01c71e00
#define DAVINCI_DM365_VC_BASE 0x01d0c000
#define DAVINCI_DMA_VC_TX 2
#define DAVINCI_DMA_VC_RX 3
-
#define DM365_EMAC_BASE 0x01d07000
#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000)
#define DM365_EMAC_CNTRL_OFFSET 0x0000
@@ -248,6 +246,7 @@ static struct clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_DAC_CLK,
+ .flags = ALWAYS_ENABLED,
};
static struct clk vpss_master_clk = {
@@ -257,6 +256,12 @@ static struct clk vpss_master_clk = {
.flags = CLK_PSC,
};
+/*static struct clk vpss_slave_clk = {
+ .name = "vpss_slave",
+ .parent = &pll1_sysclk5,
+ .lpsc = DAVINCI_LPSC_VPSSSLV,
+};*/
+
static struct clk arm_clk = {
.name = "arm_clk",
.parent = &pll2_sysclk2,
@@ -356,10 +361,16 @@ static struct clk pwm2_clk = {
static struct clk pwm3_clk = {
.name = "pwm3",
- .parent = &ref_clk,
+ .parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_PWM3,
};
-
+/*
+static struct clk rto_clk = {
+ .name = "rto",
+ .parent = &pll1_aux_clk,
+ .lpsc = DM365_LPSC_RTO,
+};
+*/
static struct clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
@@ -454,8 +465,8 @@ static struct clk_lookup dm365_clks[] = {
CLK(NULL, "uart0", &uart0_clk),
CLK(NULL, "uart1", &uart1_clk),
CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
- CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
+ CLK("dm365-mmc.0", NULL, &mmcsd0_clk),
+ CLK("dm365-mmc.1", NULL, &mmcsd1_clk),
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("spi_davinci.2", NULL, &spi2_clk),
@@ -467,6 +478,7 @@ static struct clk_lookup dm365_clks[] = {
CLK(NULL, "pwm1", &pwm1_clk),
CLK(NULL, "pwm2", &pwm2_clk),
CLK(NULL, "pwm3", &pwm3_clk),
+ //CLK(NULL, "rto", &rto_clk),
CLK(NULL, "timer0", &timer0_clk),
CLK(NULL, "timer1", &timer1_clk),
CLK("watchdog", NULL, &timer2_clk),
@@ -482,6 +494,11 @@ static struct clk_lookup dm365_clks[] = {
/*----------------------------------------------------------------------*/
+#define PINMUX0 0x00
+#define PINMUX1 0x04
+#define PINMUX2 0x08
+#define PINMUX3 0x0c
+#define PINMUX4 0x10
#define INTMUX 0x18
#define EVTMUX 0x1c
@@ -500,21 +517,9 @@ MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false)
MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false)
MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false)
-MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false)
-MUX_CFG(DM365, AEMIF_AR_BA0, 2, 0, 3, 2, false)
-MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false)
-MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false)
-MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false)
MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false)
-MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false)
-MUX_CFG(DM365, AEMIF_WE_OE, 2, 9, 1, 0, false)
+MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false)
-MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false)
-MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false)
-MUX_CFG(DM365, MCBSP0_BFSX, 0, 21, 1, 1, false)
-MUX_CFG(DM365, MCBSP0_BDR, 0, 20, 1, 1, false)
-MUX_CFG(DM365, MCBSP0_R, 0, 19, 1, 1, false)
-MUX_CFG(DM365, MCBSP0_BFSR, 0, 18, 1, 1, false)
MUX_CFG(DM365, SPI0_SCLK, 3, 28, 1, 1, false)
MUX_CFG(DM365, SPI0_SDI, 3, 26, 3, 1, false)
@@ -547,8 +552,6 @@ MUX_CFG(DM365, EMAC_CRS, 3, 2, 1, 1, false)
MUX_CFG(DM365, EMAC_MDIO, 3, 1, 1, 1, false)
MUX_CFG(DM365, EMAC_MDCLK, 3, 0, 1, 1, false)
-MUX_CFG(DM365, KEYSCAN, 2, 0, 0x3f, 0x3f, false)
-
MUX_CFG(DM365, PWM0, 1, 0, 3, 2, false)
MUX_CFG(DM365, PWM0_G23, 3, 26, 3, 3, false)
MUX_CFG(DM365, PWM1, 1, 2, 3, 2, false)
@@ -583,31 +586,146 @@ MUX_CFG(DM365, SPI3_SDENA1, 0, 6, 3, 3, false)
MUX_CFG(DM365, SPI4_SCLK, 4, 18, 3, 1, false)
MUX_CFG(DM365, SPI4_SDI, 4, 14, 3, 1, false)
MUX_CFG(DM365, SPI4_SDO, 4, 16, 3, 1, false)
-MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false)
+MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 0, false)
MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false)
MUX_CFG(DM365, CLKOUT0, 4, 20, 3, 3, false)
+MUX_CFG(DM365, GPIO37, 4, 20, 0, 0, false)
MUX_CFG(DM365, CLKOUT1, 4, 16, 3, 3, false)
MUX_CFG(DM365, CLKOUT2, 4, 8, 3, 3, false)
+// added by Gol
+MUX_CFG(DM365, GPIO1, 3, 0, 1, 0, false)
+MUX_CFG(DM365, GPIO2, 3, 1, 1, 0, false)
+MUX_CFG(DM365, GPIO3, 3, 2, 1, 0, false)
+MUX_CFG(DM365, GPIO4, 3, 3, 1, 0, false)
+MUX_CFG(DM365, GPIO5, 3, 4, 1, 0, false)
+MUX_CFG(DM365, GPIO6, 3, 5, 1, 0, false)
+MUX_CFG(DM365, GPIO7, 3, 6, 1, 0, false)
+MUX_CFG(DM365, GPIO8, 3, 7, 1, 0, false)
+MUX_CFG(DM365, GPIO9, 3, 8, 1, 0, false)
+MUX_CFG(DM365, GPIO10, 3, 9, 1, 0, false)
+MUX_CFG(DM365, GPIO11, 3, 10, 1 , 0, false)
+MUX_CFG(DM365, GPIO12, 3, 11, 1, 0, false)
+MUX_CFG(DM365, GPIO13, 3, 12, 1, 0, false)
+MUX_CFG(DM365, GPIO14, 3, 13, 1, 0, false)
+MUX_CFG(DM365, GPIO15, 3, 14, 1, 0, false)
+MUX_CFG(DM365, GPIO16, 3, 15, 3, 0, false)
+MUX_CFG(DM365, GPIO17, 3, 17, 3, 0, false)
+MUX_CFG(DM365, GPIO18, 3, 19, 1, 0, false)
+MUX_CFG(DM365, GPIO19, 3, 20, 1, 0, false)
+
+MUX_CFG(DM365, GPIO21, 3, 23, 0, 0, false)
+
+MUX_CFG(DM365, GPIO36, 4, 18, 3, 0, false)
+MUX_CFG(DM365, GPIO37, 4, 20, 3, 0, false)
+MUX_CFG(DM365, GPIO38, 4, 22, 3, 0, false)
+MUX_CFG(DM365, GPIO39, 4, 24, 3, 0, false)
+MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false)
+MUX_CFG(DM365, GPIO41, 4, 28, 3, 0, false)
+MUX_CFG(DM365, GPIO42, 4, 30, 3, 0, false)
+MUX_CFG(DM365, GPIO43, 0, 16, 3, 0, false)
+
+MUX_CFG(DM365, GPIO52, 2, 10, 1, 0, false)
+MUX_CFG(DM365, GPIO53, 2, 9, 1, 0, false)
+MUX_CFG(DM365, GPIO54, 2, 9, 1, 0, false)
+MUX_CFG(DM365, GPIO55, 2, 8, 1, 0, false)
+MUX_CFG(DM365, GPIO56, 2, 7, 1, 0, false)
+
+MUX_CFG(DM365, GPIO57, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO58, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO59, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO60, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO61, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO62, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO63, 0, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO64, 0, 0, 0, 0, false) // unknown
+
+MUX_CFG(DM365, GPIO65, 0, 0, 0, 0, false) // unknown
+
+MUX_CFG(DM365, GPIO68, 2, 2, 0, 0, false)
+MUX_CFG(DM365, GPIO69, 2, 0, 0, 0, false)
+MUX_CFG(DM365, GPIO70, 2, 0, 0, 0, false)
+MUX_CFG(DM365, GPIO71, 2, 0, 0, 0, false)
+
+MUX_CFG(DM365, GPIO72, 2, 4, 0, 0, false)
+
+MUX_CFG(DM365, GPIO73, 2, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO74, 2, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO75, 2, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO76, 2, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO77, 2, 0, 0, 0, false) // unknown
+MUX_CFG(DM365, GPIO78, 2, 0, 0, 0, false) // unknown
+
+MUX_CFG(DM365, GPIO93, 0, 14, 1, 0, false)
+MUX_CFG(DM365, GPIO94, 0, 13, 1, 0, false)
+MUX_CFG(DM365, GPIO95, 0, 12, 1, 0, false)
+MUX_CFG(DM365, GPIO96, 0, 11, 1, 0, false)
+MUX_CFG(DM365, GPIO97, 0, 10, 1, 0, false)
+MUX_CFG(DM365, GPIO98, 0, 9, 1, 0, false)
+MUX_CFG(DM365, GPIO99, 0, 8, 1, 0, false)
+
+
+
+// end added by Gol
+
MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false)
-MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false)
-MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false)
-MUX_CFG(DM365, GPIO32, 4, 10, 3, 0, false)
-MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false)
-MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false)
-MUX_CFG(DM365, GPIO64_57, 2, 6, 1, 0, false)
-
-MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false)
-MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false)
-MUX_CFG(DM365, VOUT_HVSYNC, 1, 16, 1, 0, false)
-MUX_CFG(DM365, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false)
-MUX_CFG(DM365, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false)
-MUX_CFG(DM365, VIN_CAM_WEN, 0, 14, 3, 0, false)
+MUX_CFG(DM365, GPIO22, 3, 25, 1, 0, false)
+MUX_CFG(DM365, GPIO23, 3, 26, 3, 0, false)
+MUX_CFG(DM365, GPIO24, 3, 28, 1, 0, false)
+MUX_CFG(DM365, GPIO25, 3, 29, 3, 0, false)
+MUX_CFG(DM365, GPIO26, 3, 31, 1, 0, false)
+MUX_CFG(DM365, GPIO27, 4, 0, 3, 0, false)
+MUX_CFG(DM365, GPIO28, 4, 2, 3, 0, false)
+MUX_CFG(DM365, GPIO29, 4, 4, 3, 0, false)
+MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false)
+MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false)
+MUX_CFG(DM365, GPIO32, 4, 10, 3, 0, false)
+MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false)
+MUX_CFG(DM365, GPIO34, 4, 14, 3, 0, false)
+MUX_CFG(DM365, GPIO35, 4, 16, 3, 0, false)
+MUX_CFG(DM365, GPIO44, 0, 18, 1, 0, false)
+MUX_CFG(DM365, GPIO45, 0, 19, 1, 0, false)
+MUX_CFG(DM365, GPIO46, 0, 20, 1, 0, false)
+MUX_CFG(DM365, GPIO47, 0, 21, 1, 0, false)
+MUX_CFG(DM365, GPIO48, 0, 22, 1, 0, false)
+MUX_CFG(DM365, GPIO49, 0, 23, 1, 0, false)
+MUX_CFG(DM365, GPIO50, 2, 12, 1, 1, false)
+MUX_CFG(DM365, GPIO51, 2, 11, 1, 1, false)
+MUX_CFG(DM365, GPIO66, 2, 0, 3, 0, false)
+MUX_CFG(DM365, GPIO67, 2, 0, 3, 0, false)
+MUX_CFG(DM365, GPIO79, 1, 22, 1, 1, false)
+MUX_CFG(DM365, GPIO80, 1, 20, 3, 0, false)
+MUX_CFG(DM365, GPIO81, 1, 18, 3, 0, false)
+MUX_CFG(DM365, GPIO82, 1, 17, 1, 1, false)
+MUX_CFG(DM365, GPIO83, 1, 16, 1, 1, false)
+MUX_CFG(DM365, GPIO84, 1, 16, 1, 1, false)
+MUX_CFG(DM365, GPIO85, 1, 14, 3, 0, false)
+MUX_CFG(DM365, GPIO86, 1, 12, 3, 0, false)
+MUX_CFG(DM365, GPIO87, 1, 10, 3, 0, false)
+MUX_CFG(DM365, GPIO88, 1, 8, 3, 0, false)
+MUX_CFG(DM365, GPIO89, 1, 6, 3, 0, false)
+
+MUX_CFG(DM365, GPIO90, 1, 4, 3, 0, false)
+//added by dlinyj
+//(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)
+MUX_CFG(DM365, RTO0, 1, 4, 3, 3, false)
+MUX_CFG(DM365, RTO1, 1, 6, 3, 3, false)
+MUX_CFG(DM365, RTO2, 1, 8, 3, 3, false)
+MUX_CFG(DM365, RTO3, 1, 10, 3, 3, false)
+//end added by dlinyj
+MUX_CFG(DM365, GPIO91, 1, 2, 3, 0, false)
+MUX_CFG(DM365, GPIO92, 1, 0, 3, 0, false)
+MUX_CFG(DM365, GPIO100, 0, 6, 3, 1, false)
+MUX_CFG(DM365, GPIO101, 0, 4, 3, 1, false)
+MUX_CFG(DM365, GPIO102, 0, 2, 3, 1, false)
+MUX_CFG(DM365, GPIO103, 0, 0, 3, 1, false)
+
MUX_CFG(DM365, VIN_CAM_VD, 0, 13, 1, 0, false)
MUX_CFG(DM365, VIN_CAM_HD, 0, 12, 1, 0, false)
-MUX_CFG(DM365, VIN_YIN4_7_EN, 0, 0, 0xff, 0, false)
-MUX_CFG(DM365, VIN_YIN0_3_EN, 0, 8, 0xf, 0, false)
+MUX_CFG(DM365, EXTCLK, 0, 14, 0x03, 2, false)//GPIO93 - CAMERA CLK
+MUX_CFG(DM365, CAM_OFF, 0, 9, 1, 1, false)
+MUX_CFG(DM365, CAM_RESET, 0, 8, 1, 1, false)
INT_CFG(DM365, INT_EDMA_CC, 2, 1, 1, false)
INT_CFG(DM365, INT_EDMA_TC0_ERR, 3, 1, 1, false)
@@ -627,71 +745,19 @@ INT_CFG(DM365, INT_IMX1_ENABLE, 24, 1, 1, false)
INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false)
INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false)
INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false)
+INT_CFG(DM365, INT_VCIF_ENABLE, 7, 1, 1, false)
+INT_CFG(DM365, INT_VCIF_DISABLE, 7, 1, 0, false)
+INT_CFG(DM365, INT_SPI3, 13, 1, 1, false)
EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false)
EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false)
EVT_CFG(DM365, EVT2_VC_TX, 0, 1, 1, false)
EVT_CFG(DM365, EVT3_VC_RX, 1, 1, 1, false)
+EVT_CFG(DM365, EVT18_SPI3_TX, 3, 1, 1, false)
+EVT_CFG(DM365, EVT19_SPI3_RX, 4, 1, 1, false)
#endif
};
-static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
-
-static struct davinci_spi_platform_data dm365_spi0_pdata = {
- .version = SPI_VERSION_1,
- .num_chipselect = 2,
- .dma_event_q = EVENTQ_3,
-};
-
-static struct resource dm365_spi0_resources[] = {
- {
- .start = 0x01c66000,
- .end = 0x01c667ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DM365_SPIINT0_0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = 17,
- .flags = IORESOURCE_DMA,
- },
- {
- .start = 16,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device dm365_spi0_device = {
- .name = "spi_davinci",
- .id = 0,
- .dev = {
- .dma_mask = &dm365_spi0_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &dm365_spi0_pdata,
- },
- .num_resources = ARRAY_SIZE(dm365_spi0_resources),
- .resource = dm365_spi0_resources,
-};
-
-void __init dm365_init_spi0(unsigned chipselect_mask,
- const struct spi_board_info *info, unsigned len)
-{
- davinci_cfg_reg(DM365_SPI0_SCLK);
- davinci_cfg_reg(DM365_SPI0_SDI);
- davinci_cfg_reg(DM365_SPI0_SDO);
-
- /* not all slaves will be wired up */
- if (chipselect_mask & BIT(0))
- davinci_cfg_reg(DM365_SPI0_SDENA0);
- if (chipselect_mask & BIT(1))
- davinci_cfg_reg(DM365_SPI0_SDENA1);
-
- spi_register_board_info(info, len);
-
- platform_device_register(&dm365_spi0_device);
-}
static struct emac_platform_data dm365_emac_pdata = {
.ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET,
@@ -738,7 +804,6 @@ static struct platform_device dm365_emac_device = {
.num_resources = ARRAY_SIZE(dm365_emac_resources),
.resource = dm365_emac_resources,
};
-
static struct resource dm365_mdio_resources[] = {
{
.start = DM365_EMAC_MDIO_BASE,
@@ -754,6 +819,87 @@ static struct platform_device dm365_mdio_device = {
.resource = dm365_mdio_resources,
};
+
+
+/* IPIPEIF device configuration */
+static u64 dm365_ipipeif_dma_mask = DMA_BIT_MASK(32);
+static struct resource dm365_ipipeif_resources[] = {
+ {
+ .start = 0x01C71200,
+ .end = 0x01C71200 + 0x60,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device dm365_ipipeif_dev = {
+ .name = "dm3xx_ipipeif",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm365_ipipeif_resources),
+ .resource = dm365_ipipeif_resources,
+ .dev = {
+ .dma_mask = &dm365_ipipeif_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ /* For IPIPEIF device type. 1 - DM365 */
+ .platform_data = (void *)1,
+ },
+};
+
+static u64 dm365_osd_dma_mask = DMA_BIT_MASK(32);
+
+static struct davinci_osd_platform_data dm365_osd_pdata = {
+ .invert_field = false,
+};
+
+static struct resource dm365_osd_resources[] = {
+ {
+ .start = IRQ_VENCINT,
+ .end = IRQ_VENCINT,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DM365_OSD_REG_BASE,
+ .end = DM365_OSD_REG_BASE + OSD_REG_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device dm365_osd_dev = {
+ .name = "davinci_osd",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm365_osd_resources),
+ .resource = dm365_osd_resources,
+ .dev = {
+ .dma_mask = &dm365_osd_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &dm365_osd_pdata,
+ },
+};
+
+static u64 dm365_venc_dma_mask = DMA_BIT_MASK(32);
+
+
+static struct davinci_venc_platform_data dm365_venc_pdata = {
+ .invert_field = false,
+};
+static struct resource dm365_venc_resources[] = {
+ {
+ .start = DM365_VENC_REG_BASE,
+ .end = DM365_VENC_REG_BASE + 0x180,
+ .flags = IORESOURCE_MEM,
+ },
+};
+static struct platform_device dm365_venc_dev = {
+ .name = "davinci_venc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm365_venc_resources),
+ .resource = dm365_venc_resources,
+ .dev = {
+ .dma_mask = &dm365_venc_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &dm365_venc_pdata,
+ },
+};
+
static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
[IRQ_VDINT0] = 2,
[IRQ_VDINT1] = 6,
@@ -770,7 +916,8 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
[IRQ_USBINT] = 4,
[IRQ_DM365_RTOINT] = 7,
[IRQ_DM365_TINT5] = 7,
- [IRQ_DM365_TINT6] = 5,
+// [IRQ_DM365_TINT6] = 5,
+ [IRQ_DM365_TINT6] = 0,
[IRQ_CCINT0] = 5,
[IRQ_CCERRINT] = 5,
[IRQ_TCERRINT0] = 5,
@@ -832,7 +979,7 @@ dm365_queue_tc_mapping[][2] = {
{-1, -1},
};
-static const s8
+static /*const*/ s8
dm365_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 7},
@@ -985,6 +1132,12 @@ static struct map_desc dm365_io_desc[] = {
.length = IO_SIZE,
.type = MT_DEVICE
},
+ {
+ .virtual = SRAM_VIRT,
+ .pfn = __phys_to_pfn(0x00010000),
+ .length = SZ_32K,
+ .type = MT_MEMORY_NONCACHED,
+ },
};
static struct resource dm365_ks_resources[] = {
@@ -1023,7 +1176,7 @@ static struct davinci_id dm365_ids[] = {
.part_no = 0xb83e,
.manufacturer = 0x017,
.cpu_id = DAVINCI_CPU_ID_DM365,
- .name = "dm365_rev1.2",
+ .name = "dm36x_rev1.2",
},
};
@@ -1045,6 +1198,7 @@ static struct plat_serial8250_port dm365_serial_platform_data[] = {
UPF_IOREMAP,
.iotype = UPIO_MEM,
.regshift = 2,
+ .uartclk = 24000000,
},
{
.mapbase = DM365_UART1_BASE,
@@ -1053,6 +1207,7 @@ static struct plat_serial8250_port dm365_serial_platform_data[] = {
UPF_IOREMAP,
.iotype = UPIO_MEM,
.regshift = 2,
+ .uartclk = 86250000,
},
{
.flags = 0
@@ -1093,6 +1248,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
.emac_pdata = &dm365_emac_pdata,
.sram_dma = 0x00010000,
.sram_len = SZ_32K,
+ //.reset_device = &davinci_wdt_device,
};
void __init dm365_init_asp(struct snd_platform_data *pdata)
@@ -1109,10 +1265,370 @@ void __init dm365_init_asp(struct snd_platform_data *pdata)
platform_device_register(&dm365_asp_device);
}
+ void ShowClocksInfo(void) {
+ static void __iomem *SystemRegisters; //access to system registers via memory remap
+ u32 regval; //Register value
+ char str[40]; //short strings container
+ char strEn[3]; //string "en" container
+ char strDis[4]; //string "dis" container
+ char vcCfg;
+
+ u32 mCLOCKOUT0EN;
+ u32 mCLOCKOUT1EN;
+ u32 mCLOCKOUT2EN;
+ u32 mDIV1;
+ u32 mDIV2;
+ u32 mDIV3;
+ u32 mHDVICPCLKS;
+ u32 mDDRCLKS;
+ u32 mKEYSCLKS;
+ u32 mARMCLKS;
+ u32 mPRTCCLKS;
+
+ u32 mIsPLL1en;
+ u32 mPLL1PreDiv;
+ u32 mPLL1Mul;
+ u32 mPLL1PostDiv;
+ u32 mIsPLL1PostDiv;
+ u32 mPLL1Clk;
+ u32 mPLL1DIV1;
+ u32 mPLL1DIV1en;
+ u32 mPLL1DIV2;
+ u32 mPLL1DIV2en;
+ u32 mPLL1DIV3;
+ u32 mPLL1DIV3en;
+ u32 mPLL1DIV4;
+ u32 mPLL1DIV4en;
+ u32 mPLL1DIV5;
+ u32 mPLL1DIV5en;
+ u32 mPLL1DIV6;
+ u32 mPLL1DIV6en;
+ u32 mPLL1DIV7;
+ u32 mPLL1DIV7en;
+ u32 mPLL1DIV8;
+ u32 mPLL1DIV8en;
+ u32 mPLL1DIV9;
+ u32 mPLL1DIV9en;
+
+ u32 mIsPLL2en;
+ u32 mPLL2PreDiv;
+ u32 mPLL2Mul;
+ u32 mPLL2PostDiv;
+ u32 mIsPLL2PostDiv;
+ u32 mPLL2Clk;
+ u32 mPLL2DIV1;
+ u32 mPLL2DIV1en;
+ u32 mPLL2DIV2;
+ u32 mPLL2DIV2en;
+ u32 mPLL2DIV3;
+ u32 mPLL2DIV3en;
+ u32 mPLL2DIV4;
+ u32 mPLL2DIV4en;
+ u32 mPLL2DIV5;
+ u32 mPLL2DIV5en;
+
+ u32 mARMCORECLK;
+ u32 mHDVICPCORECLK;
+ u32 mDDRCORECLK;
+
+ u32 mVoiceCodecCLK;
+
+
+ #ifndef CONFIG_SND_DM365_SHOWFREQ //if undefined
+ //This is applicable only if VoiceCodec selected in Linux Config
+ //if no (for example, if AIC codec used) exit now.
+ return;
+ #endif
+
+ strcpy(str,"unknown");
+ vcCfg=0;
+
+ #ifdef CONFIG_SND_DM365_VOICE_CODEC_8KHZ
+ vcCfg=1;
+ strcpy(str,"8 kHz");
+ #endif
+
+ #ifdef CONFIG_SND_DM365_VOICE_CODEC_16KHZ
+ vcCfg=2;
+ strcpy(str,"16 kHz");
+ #endif
+
+ printk("*** VOICECODEC CONFIGURATION is %s\n",str);
+
+ if(vcCfg==0) return;
+
+ SystemRegisters=ioremap(DAVINCI_SYSTEM_MODULE_BASE,SECTION_SIZE); //try remap
+ if(!SystemRegisters) {//if bad
+ release_mem_region(DAVINCI_SYSTEM_MODULE_BASE,SECTION_SIZE);
+ pr_err("ERROR: can't map DAVINCI_SYSTEM_MODULE_BASE\n");
+ return; //EXIT
+ }//if bad
+
+ //else remap is good
+
+ if(vcCfg==1) {//if Fs=8kHz
+ // Fs ~= 8000 Hz ; Actual Fs = 594000000/29/10/256=8001 ; Err=0.013%, 125ppm
+ __raw_writel(0x801C,SystemRegisters+0xC00+0x160); //PLL2DIV4=28(29)
+ __raw_writel(0x243f04fc,SystemRegisters+0x48); //div2=9(10)
+ }//if Fs=8kHz
+
+ if(vcCfg==2) {//if Fs=16kHz
+ // Fs ~= 16000 Hz ; Actual Fs = 594000000/29/5/256=16002 ; Err=0.013%, 125ppm
+ __raw_writel(0x801C,SystemRegisters+0xC00+0x160); //PLL2DIV4=28(29)
+ __raw_writel(0x243f027c,SystemRegisters+0x48); //div2=4(5)
+ }//if Fs=16kHz
+
+ // WARNING!!! 'Fs' is derived from PLL2 Clock.
+ // It is assumed that the PLL2 frequency is equal to 594000000 Hz in your system.
+ // If not, you need to change PLL2DIV4 and div2 (see above).
+ // See "TMS320DM36x Digital Media System-on-Chip (DMSoC) ARM Subsystem User's Guide"
+ // chapter 5 "Device Clocking" and chapter 6 "PLL Controllers (PLLCs)"
+
+
+
+ strEn[0]='e'; strEn[1]='n'; strEn[2]=0; //"en"
+ strDis[0]='d'; strDis[1]='i'; strDis[2]='s'; strDis[3]=0; //"dis"
+
+ printk("*** Board Clocks:\n");
+
+ regval= __raw_readl(SystemRegisters+0x48); //Read PERI_CLKCTL
+ printk("* PERI_CLKCTL=0x%08X\n",regval);
+
+ mCLOCKOUT0EN = (regval&0x00000001)>>0;
+ mCLOCKOUT1EN = (regval&0x00000002)>>1;
+ mCLOCKOUT2EN = (regval&0x00000004)>>2;
+ mDIV1 = (regval&0x00000078)>>3;
+ mDIV2 = (regval&0x0000FF80)>>7;
+ mDIV3 = (regval&0x03FF0000)>>16;
+ mHDVICPCLKS = (regval&0x04000000)>>26;
+ mDDRCLKS = (regval&0x08000000)>>27;
+ mKEYSCLKS = (regval&0x10000000)>>28;
+ mARMCLKS = (regval&0x20000000)>>29;
+ mPRTCCLKS = (regval&0x40000000)>>30;
+
+ strcpy(str,strEn); if(mCLOCKOUT0EN!=0) strcpy(str,strDis);
+ printk("* CLOCKOUT0EN is %2d = %s\n",mCLOCKOUT0EN,str);
+
+ strcpy(str,strEn); if(mCLOCKOUT1EN!=0) strcpy(str,strDis);
+ printk("* CLOCKOUT1EN is %2d = %s\n",mCLOCKOUT1EN,str);
+
+ strcpy(str,strEn); if(mCLOCKOUT2EN!=0) strcpy(str,strDis);
+ printk("* CLOCKOUT2EN is %2d = %s\n",mCLOCKOUT2EN,str);
+
+ printk("* DIV1 is %2d = %d\n",mDIV1,mDIV1+1);
+
+ printk("* DIV2 is %2d = %d\n",mDIV2,mDIV2+1);
+
+ printk("* DIV3 is %2d = %d\n",mDIV3,mDIV3+1);
+
+ strcpy(str,"PLLC1SYSCLK2"); if(mHDVICPCLKS!=0) strcpy(str,"PLLC2SYSCLK2");
+ printk("* HDVICPCLKS is %2d = %s\n",mHDVICPCLKS,str);
+
+ strcpy(str,"PLLC1SYSCLK7"); if(mDDRCLKS!=0) strcpy(str,"PLLC2SYSCLK3");
+ printk("* DDRCLKS is %2d = %s\n",mDDRCLKS,str);
+
+ strcpy(str,"RTCXI (MXI)"); if(mKEYSCLKS!=0) strcpy(str,"PLLC1AUXCLK");
+ printk("* KEYSCLKS is %2d = %s\n",mKEYSCLKS,str);
+
+ strcpy(str,"PLLC1SYSCLK2"); if(mARMCLKS!=0) strcpy(str,"PLLC2SYSCLK2");
+ printk("* ARMCLKS is %2d = %s\n",mARMCLKS,str);
+
+ strcpy(str,"RTCXI (OSC)"); if(mPRTCCLKS!=0) strcpy(str,"PLLC1AUXCLK");
+ printk("* PRTCCLKS is %2d = %s\n",mPRTCCLKS,str);
+
+ printk("* CLKIN = %d Hz\n",DM365_REF_FREQ);
+
+ regval= __raw_readl(SystemRegisters+0x800+0x110); //Read PLL1CTL
+ mIsPLL1en = (regval&0x00000001)>>0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x114); //Read PLL1PreDiv
+ mPLL1PreDiv = (regval&0x0000001F)>>0;
+
+ printk("* PLL1PreDiv is %2d = %2d\n",mPLL1PreDiv,mPLL1PreDiv+1);
+
+ regval= __raw_readl(SystemRegisters+0x800+0x110); //Read PLL1Mul
+ mPLL1Mul = (regval&0x000003FF)>>0;
+ printk("* PLL1Mul is %4d = %4d\n",mPLL1Mul,mPLL1Mul*2);
+
+ regval= __raw_readl(SystemRegisters+0x800+0x128); //Read PLL1PostDiv
+ mPLL1PostDiv = (regval&0x0000001F)>>0;
+ mIsPLL1PostDiv = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mIsPLL1PostDiv!=0) strcpy(str,strEn);
+ printk("* PLL1PostDiv is %2d = %2d -- %s\n",mPLL1PostDiv,mPLL1PostDiv+1,str);
+ if(mIsPLL1PostDiv==0) mPLL1PostDiv=0;
+
+ strcpy(str,"bypass"); if(mIsPLL1en!=0) strcpy(str,strEn);
+ mPLL1Clk = ( (DM365_REF_FREQ / (mPLL1PreDiv+1)) * (2*mPLL1Mul) ) / (mPLL1PostDiv+1);
+ if(mIsPLL1en==0) mPLL1Clk=DM365_REF_FREQ;
+ printk("* PLL1 CLK = %d Hz -- %s\n",mPLL1Clk,str);
+
+ regval= __raw_readl(SystemRegisters+0x800+0x118); //Read PLL1DIV1
+ mPLL1DIV1 = (regval&0x0000001F)>>0;
+ mPLL1DIV1en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV1en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV1 is %2d = %2d -- %s\n",mPLL1DIV1,mPLL1DIV1+1,str);
+ if(mPLL1DIV1en==0) mPLL1DIV1=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x11C); //Read PLL1DIV2
+ mPLL1DIV2 = (regval&0x0000001F)>>0;
+ mPLL1DIV2en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV2en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV2 is %2d = %2d -- %s\n",mPLL1DIV2,mPLL1DIV2+1,str);
+ if(mPLL1DIV2en==0) mPLL1DIV2=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x120); //Read PLL1DIV3
+ mPLL1DIV3 = (regval&0x0000001F)>>0;
+ mPLL1DIV3en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV3en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV3 is %2d = %2d -- %s\n",mPLL1DIV3,mPLL1DIV3+1,str);
+ if(mPLL1DIV3en==0) mPLL1DIV3=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x160); //Read PLL1DIV4
+ mPLL1DIV4 = (regval&0x0000001F)>>0;
+ mPLL1DIV4en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV4en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV4 is %2d = %2d -- %s\n",mPLL1DIV4,mPLL1DIV4+1,str);
+ if(mPLL1DIV4en==0) mPLL1DIV4=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x164); //Read PLL1DIV5
+ mPLL1DIV5 = (regval&0x0000001F)>>0;
+ mPLL1DIV5en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV5en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV5 is %2d = %2d -- %s\n",mPLL1DIV5,mPLL1DIV5+1,str);
+ if(mPLL1DIV5en==0) mPLL1DIV5=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x168); //Read PLL1DIV6
+ mPLL1DIV6 = (regval&0x0000001F)>>0;
+ mPLL1DIV6en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV6en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV6 is %2d = %2d -- %s\n",mPLL1DIV6,mPLL1DIV6+1,str);
+ if(mPLL1DIV6en==0) mPLL1DIV6=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x16C); //Read PLL1DIV7
+ mPLL1DIV7 = (regval&0x0000001F)>>0;
+ mPLL1DIV7en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV7en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV7 is %2d = %2d -- %s\n",mPLL1DIV7,mPLL1DIV7+1,str);
+ if(mPLL1DIV7en==0) mPLL1DIV7=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x170); //Read PLL1DIV8
+ mPLL1DIV8 = (regval&0x0000001F)>>0;
+ mPLL1DIV8en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV8en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV8 is %2d = %2d -- %s\n",mPLL1DIV8,mPLL1DIV8+1,str);
+ if(mPLL1DIV8en==0) mPLL1DIV8=0;
+
+ regval= __raw_readl(SystemRegisters+0x800+0x174); //Read PLL1DIV9
+ mPLL1DIV9 = (regval&0x0000001F)>>0;
+ mPLL1DIV9en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL1DIV9en!=0) strcpy(str,strEn);
+ printk("* PLL1DIV9 is %2d = %2d -- %s\n",mPLL1DIV9,mPLL1DIV9+1,str);
+ if(mPLL1DIV9en==0) mPLL1DIV9=0;
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x110); //Read PLL2CTL
+ mIsPLL2en = (regval&0x00000001)>>0;
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x114); //Read PLL2PreDiv
+ mPLL2PreDiv = (regval&0x0000001F)>>0;
+ printk("* PLL2PreDiv is %2d = %2d\n",mPLL2PreDiv,mPLL2PreDiv+1);
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x110); //Read PLL2Mul
+ mPLL2Mul = (regval&0x000003FF)>>0;
+ printk("* PLL2Mul is %4d = %4d\n",mPLL2Mul,mPLL2Mul*2);
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x128); //Read PLL2PostDiv
+ mPLL2PostDiv = (regval&0x0000001F)>>0;
+ mIsPLL2PostDiv = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mIsPLL2PostDiv!=0) strcpy(str,strEn);
+ printk("* PLL2PostDiv is %2d = %2d -- %s\n",mPLL2PostDiv,mPLL2PostDiv+1,str);
+ if(mIsPLL2PostDiv==0) mPLL2PostDiv=0;
+
+ strcpy(str,"bypass"); if(mIsPLL2en!=0) strcpy(str,strEn);
+ mPLL2Clk = ( (DM365_REF_FREQ / (mPLL2PreDiv+1)) * (2*mPLL2Mul) ) / (mPLL2PostDiv+1);
+ if(mIsPLL2en==0) mPLL2Clk=DM365_REF_FREQ;
+ printk("* PLL2 CLK = %d Hz -- %s\n",mPLL2Clk,str);
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x118); //Read PLL2DIV1
+ mPLL2DIV1 = (regval&0x0000001F)>>0;
+ mPLL2DIV1en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL2DIV1en!=0) strcpy(str,strEn);
+ printk("* PLL2DIV1 is %2d = %2d -- %s\n",mPLL2DIV1,mPLL2DIV1+1,str);
+ if(mPLL2DIV1en==0) mPLL2DIV1=0;
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x11C); //Read PLL2DIV2
+ mPLL2DIV2 = (regval&0x0000001F)>>0;
+ mPLL2DIV2en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL2DIV2en!=0) strcpy(str,strEn);
+ printk("* PLL2DIV2 is %2d = %2d -- %s\n",mPLL2DIV2,mPLL2DIV2+1,str);
+ if(mPLL2DIV2en==0) mPLL2DIV2=0;
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x120); //Read PLL2DIV3
+ mPLL2DIV3 = (regval&0x0000001F)>>0;
+ mPLL2DIV3en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL2DIV3en!=0) strcpy(str,strEn);
+ printk("* PLL2DIV3 is %2d = %2d -- %s\n",mPLL2DIV3,mPLL2DIV3+1,str);
+ if(mPLL2DIV3en==0) mPLL2DIV3=0;
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x160); //Read PLL2DIV4
+ mPLL2DIV4 = (regval&0x0000001F)>>0;
+ mPLL2DIV4en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL2DIV4en!=0) strcpy(str,strEn);
+ printk("* PLL2DIV4 is %2d = %2d -- %s\n",mPLL2DIV4,mPLL2DIV4+1,str);
+ if(mPLL2DIV4en==0) mPLL2DIV4=0;
+
+ regval= __raw_readl(SystemRegisters+0xC00+0x164); //Read PLL2DIV5
+ mPLL2DIV5 = (regval&0x0000001F)>>0;
+ mPLL2DIV5en = (regval&0x00008000)>>15;
+ strcpy(str,strDis); if(mPLL2DIV5en!=0) strcpy(str,strEn);
+ printk("* PLL2DIV5 is %2d = %2d -- %s\n",mPLL2DIV5,mPLL2DIV5+1,str);
+ if(mPLL2DIV5en==0) mPLL2DIV5=0;
+
+ //check ARM CLOCK source
+ if(mARMCLKS==0) {
+ mARMCORECLK = mPLL1Clk / (mPLL1DIV2+1);
+ }
+ else {
+ mARMCORECLK = mPLL2Clk / (mPLL2DIV2+1);
+ }
+ printk("* ARM CORE CLK = %d Hz\n",mARMCORECLK);
+
+
+ //check HDVICP CLOCK source
+ if(mHDVICPCLKS==0) {
+ mHDVICPCORECLK = mPLL1Clk / (mPLL1DIV2+1);
+ }
+ else {
+ mHDVICPCORECLK = mPLL2Clk / (mPLL2DIV2+1);
+ }
+ printk("* HDVICP CLK = %d Hz\n",mHDVICPCORECLK);
+
+ //check DDR CLOCK source
+ if(mDDRCLKS==0) {
+ mDDRCORECLK = mPLL1Clk / (mPLL1DIV7+1);
+ }
+ else {
+ mDDRCORECLK = mPLL2Clk / (mPLL2DIV3+1);
+ }
+ printk("* DDR CLK supply for PHY = %d Hz ; Real DDR clk = %d Hz\n",mDDRCORECLK,mDDRCORECLK/2);
+
+ //calc VoiceCodec Clock
+ mVoiceCodecCLK=(mPLL2Clk/(mPLL2DIV4+1))/(mDIV2+1);
+ printk("* VoiceCodec CLK = %d Hz ; Sample Freq = %d Hz\n",mVoiceCodecCLK,mVoiceCodecCLK/256);
+
+ if(mPLL2Clk!=594000000) {
+ printk("*** WARNING!!! Your PPL2 clock is not 594Mhz. Check VoiceCodec sampling frequency (see above).\n");
+ printk("*** The VoiceCodec can work with Fs at range from 8kHz to 16kHz.\n");
+ printk("*** Maybe you need to change the divider in 'dm365.c' ('arch/arm/mach-davinci').\n");
+ }
+
+ }
+
+
void __init dm365_init_vc(struct snd_platform_data *pdata)
{
davinci_cfg_reg(DM365_EVT2_VC_TX);
davinci_cfg_reg(DM365_EVT3_VC_RX);
+ davinci_cfg_reg(DM365_INT_VCIF_ENABLE);
dm365_vc_device.dev.platform_data = pdata;
platform_device_register(&dm365_vc_device);
}
@@ -1132,13 +1648,16 @@ void __init dm365_init_rtc(void)
void __init dm365_init(void)
{
davinci_common_init(&davinci_soc_info_dm365);
+ ShowClocksInfo(); //Show Board Clocks
davinci_map_sysmod();
}
+#define DM365_ISP5_REG_BASE 0x01C70000
+
static struct resource dm365_vpss_resources[] = {
{
/* VPSS ISP5 Base address */
- .name = "isp5",
+ .name = "vpss",
.start = 0x01c70000,
.end = 0x01c70000 + 0xff,
.flags = IORESOURCE_MEM,
@@ -1153,11 +1672,11 @@ static struct resource dm365_vpss_resources[] = {
};
static struct platform_device dm365_vpss_device = {
- .name = "vpss",
- .id = -1,
- .dev.platform_data = "dm365_vpss",
- .num_resources = ARRAY_SIZE(dm365_vpss_resources),
- .resource = dm365_vpss_resources,
+ .name = "vpss",
+ .id = -1,
+ .dev.platform_data = "dm365_vpss",
+ .num_resources = ARRAY_SIZE(dm365_vpss_resources),
+ .resource = dm365_vpss_resources,
};
static struct resource vpfe_resources[] = {
@@ -1185,15 +1704,6 @@ static struct platform_device vpfe_capture_dev = {
},
};
-static void dm365_isif_setup_pinmux(void)
-{
- davinci_cfg_reg(DM365_VIN_CAM_WEN);
- davinci_cfg_reg(DM365_VIN_CAM_VD);
- davinci_cfg_reg(DM365_VIN_CAM_HD);
- davinci_cfg_reg(DM365_VIN_YIN4_7_EN);
- davinci_cfg_reg(DM365_VIN_YIN0_3_EN);
-}
-
static struct resource isif_resource[] = {
/* ISIF Base address */
{
@@ -1215,14 +1725,13 @@ static struct resource isif_resource[] = {
},
};
static struct platform_device dm365_isif_dev = {
- .name = "isif",
+ .name = "dm365_isif",
.id = -1,
.num_resources = ARRAY_SIZE(isif_resource),
.resource = isif_resource,
.dev = {
.dma_mask = &vpfe_capture_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = dm365_isif_setup_pinmux,
},
};
@@ -1234,16 +1743,26 @@ static int __init dm365_init_devices(void)
davinci_cfg_reg(DM365_INT_EDMA_CC);
platform_device_register(&dm365_edma_device);
+ /*
+ * setup Mux configuration for vpfe input and register
+ * vpfe capture platform device
+ */
+ platform_device_register(&dm365_vpss_device);
+ platform_device_register(&dm365_ipipeif_dev);
+ platform_device_register(&dm365_isif_dev);
+ platform_device_register(&vpfe_capture_dev);
+
+ /* Register OSD device */
+ platform_device_register(&dm365_osd_dev);
+
+ /* Register VENC device */
+ platform_device_register(&dm365_venc_dev);
+
platform_device_register(&dm365_mdio_device);
platform_device_register(&dm365_emac_device);
clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev),
- NULL, &dm365_emac_device.dev);
+ NULL, &dm365_emac_device.dev);
- /* Add isif clock alias */
- clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL);
- platform_device_register(&dm365_vpss_device);
- platform_device_register(&dm365_isif_dev);
- platform_device_register(&vpfe_capture_dev);
return 0;
}
postcore_initcall(dm365_init_devices);
diff --git a/arch/arm/mach-davinci/dm365_spi.c b/arch/arm/mach-davinci/dm365_spi.c
new file mode 100644
index 00000000..a871cf25
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365_spi.c
@@ -0,0 +1,277 @@
+/*
+ * TI DaVinci DM3xx SPI setup
+ *
+ * Copyright (C) 2010 Basler Vision Technologies AG
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/ioport.h>
+#include <linux/spi/spi.h>
+#include <mach/mux.h>
+#include <mach/irqs.h>
+
+#include "dm365_spi.h"
+
+static u64 davinci_spi_dma_mask = DMA_BIT_MASK(32);
+
+enum davinci_spi_resource_index {
+ spirsrc_iomem,
+ spirsrc_irq,
+ spirsrc_rxdma,
+ spirsrc_txdma,
+ spirsrc_evqdma
+};
+
+
+static struct resource davinci_spi_resources[spirsrc_evqdma + 1][5] = {
+ {
+ [spirsrc_iomem] = {
+ .start = 0x01c66000,
+ .end = 0x01c667ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [spirsrc_irq] = {
+ .flags = IORESOURCE_IRQ,
+ },
+ [spirsrc_rxdma] = {
+ .flags = IORESOURCE_DMA | IORESOURCE_DMA_RX_CHAN,
+ },
+ [spirsrc_txdma] = {
+ .flags = IORESOURCE_DMA | IORESOURCE_DMA_TX_CHAN,
+ },
+ [spirsrc_evqdma] = {
+ .flags = IORESOURCE_DMA | IORESOURCE_DMA_EVENT_Q,
+ }
+ },
+ {
+ [spirsrc_iomem] = {
+ .start = 0x01c66800,
+ .end = 0x01c66fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [spirsrc_irq] = {
+ .flags = IORESOURCE_IRQ,
+ },
+ [spirsrc_rxdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_txdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_evqdma] = {
+ .flags = IORESOURCE_DMA
+ }
+ },
+ {
+ [spirsrc_iomem] = {
+ .start = 0x01c67800,
+ .end = 0x01c67fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [spirsrc_irq] = {
+ .flags = IORESOURCE_IRQ,
+ },
+ [spirsrc_rxdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_txdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_evqdma] = {
+ .flags = IORESOURCE_DMA
+ }
+ },
+ {
+ [spirsrc_iomem] = {
+ .start = 0x01c68000,
+ .end = 0x01c687ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [spirsrc_irq] = {
+ .flags = IORESOURCE_IRQ,
+ .start = IRQ_DM365_SPIINT3_0
+ },
+ [spirsrc_rxdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_txdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_evqdma] = {
+ .flags = IORESOURCE_DMA
+ }
+ },
+ {
+ [spirsrc_iomem] = {
+ .start = 0x01c23000,
+ .end = 0x01c237ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [spirsrc_irq] = {
+ .flags = IORESOURCE_IRQ,
+ },
+ [spirsrc_rxdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_txdma] = {
+ .flags = IORESOURCE_DMA
+ },
+ [spirsrc_evqdma] = {
+ .flags = IORESOURCE_DMA
+ }
+ }
+};
+
+static struct platform_device davinci_spi_device[] = {
+ {
+ .name = "spi_davinci",
+ .id = 0,
+ .dev = {
+ .dma_mask = &davinci_spi_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(davinci_spi_resources[0]),
+ .resource = davinci_spi_resources[0]
+ },
+ {
+ .name = "spi_davinci",
+ .id = 1,
+ .dev = {
+ .dma_mask = &davinci_spi_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(davinci_spi_resources[1]),
+ .resource = davinci_spi_resources[1]
+ },
+ {
+ .name = "spi_davinci",
+ .id = 2,
+ .dev = {
+ .dma_mask = &davinci_spi_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(davinci_spi_resources[2]),
+ .resource = davinci_spi_resources[2]
+ },
+ {
+ .name = "spi_davinci",
+ .id = 3,
+ .dev = {
+ .dma_mask = &davinci_spi_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(davinci_spi_resources[3]),
+ .resource = davinci_spi_resources[3]
+ },
+ {
+ .name = "spi_davinci",
+ .id = 4,
+ .dev = {
+ .dma_mask = &davinci_spi_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .num_resources = ARRAY_SIZE(davinci_spi_resources[4]),
+ .resource = davinci_spi_resources[4]
+ }
+};
+
+struct davinci_spi_pins {
+ int sclk;
+ int sdi;
+ int sdo;
+ int sdena0;
+ int sdena1;
+};
+
+static const struct davinci_spi_pins davinci_spi_pinmap[] __initconst = {
+ {
+ .sclk = DM365_SPI0_SCLK,
+ .sdi = DM365_SPI0_SDI,
+ .sdo = DM365_SPI0_SDO,
+ .sdena0 = DM365_SPI0_SDENA0,
+ .sdena1 = DM365_SPI0_SDENA1
+ },
+ {
+ .sclk = DM365_SPI1_SCLK,
+ .sdi = DM365_SPI1_SDI,
+ .sdo = DM365_SPI1_SDO,
+ .sdena0 = DM365_SPI1_SDENA0,
+ .sdena1 = DM365_SPI1_SDENA1
+ },
+ {
+ .sclk = DM365_SPI2_SCLK,
+ .sdi = DM365_SPI2_SDI,
+ .sdo = DM365_SPI2_SDO,
+ .sdena0 = DM365_SPI2_SDENA0,
+ .sdena1 = DM365_SPI2_SDENA1
+ },
+ {
+ .sclk = DM365_SPI3_SCLK,
+ .sdi = DM365_SPI3_SDI,
+ .sdo = DM365_SPI3_SDO,
+ .sdena0 = DM365_SPI3_SDENA0,
+ .sdena1 = DM365_SPI3_SDENA1
+ },
+ {
+ .sclk = DM365_SPI4_SCLK,
+ .sdi = DM365_SPI4_SDI,
+ .sdo = DM365_SPI4_SDO,
+ .sdena0 = DM365_SPI4_SDENA0,
+ .sdena1 = DM365_SPI4_SDENA1
+ }
+};
+
+void __init davinci_init_spi(struct davinci_spi_unit_desc *unit,
+ unsigned int ninfo,
+ const struct spi_board_info *info)
+{
+ int err;
+ const unsigned int hwunit = unit->spi_hwunit;
+ const struct davinci_spi_pins * const pins = &davinci_spi_pinmap[hwunit];
+ struct platform_device * const pdev = &davinci_spi_device[hwunit];
+ struct davinci_spi_platform_data * const pdata = &unit->pdata;
+
+ davinci_cfg_reg(pins->sclk);
+ davinci_cfg_reg(pins->sdi);
+ davinci_cfg_reg(pins->sdo);
+
+ /* not all slaves will be wired up */
+ if (unit->chipsel & BIT(0))
+ davinci_cfg_reg(pins->sdena0);
+ if (unit->chipsel & BIT(1))
+ davinci_cfg_reg(pins->sdena1);
+
+ pdev->dev.platform_data = pdata;
+
+ pdev->resource[spirsrc_irq].start =
+ pdev->resource[spirsrc_irq].end = unit->irq;
+ pdev->resource[spirsrc_rxdma].start =
+ pdev->resource[spirsrc_rxdma].end = unit->dma_rx_chan;
+ pdev->resource[spirsrc_txdma].start =
+ pdev->resource[spirsrc_txdma].end = unit->dma_tx_chan;
+ pdev->resource[spirsrc_evqdma].start =
+ pdev->resource[spirsrc_evqdma].end = unit->dma_evtq;
+
+ pr_debug("Creating SPI%u: irq = %u, dma_rx = %u, dma_tx = %u, "
+ "dma_evq = %u",
+ hwunit, unit->irq, unit->dma_rx_chan, unit->dma_tx_chan,
+ unit->dma_evtq);
+
+ err = platform_device_register(pdev);
+ if (unlikely(err))
+ pr_err("Failed to create platform device for SPI%u - error %d",
+ hwunit, err);
+
+ spi_register_board_info(info, ninfo);
+}
+
diff --git a/arch/arm/mach-davinci/dm365_spi.h b/arch/arm/mach-davinci/dm365_spi.h
new file mode 100644
index 00000000..2880144a
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365_spi.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2010 Basler Vision Technologies AG
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MACH_DAVINCI_SPI_H
+#define __MACH_DAVINCI_SPI_H
+#include <linux/platform_data/spi-davinci.h>
+
+struct davinci_spi_unit_desc {
+ unsigned int spi_hwunit;
+ unsigned int chipsel;
+ unsigned int irq;
+ unsigned int dma_tx_chan;
+ unsigned int dma_rx_chan;
+ unsigned int dma_evtq;
+ struct davinci_spi_platform_data pdata;
+};
+
+struct spi_board_info;
+
+void __init davinci_init_spi(struct davinci_spi_unit_desc *unit,
+ unsigned int ninfo,
+ const struct spi_board_info *info);
+
+
+#endif /* __MACH_DAVINCI_SPI_H */
diff --git a/arch/arm/mach-davinci/dm365pwcr.c b/arch/arm/mach-davinci/dm365pwcr.c
new file mode 100644
index 00000000..10d35f2d
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365pwcr.c
@@ -0,0 +1,70 @@
+#include <linux/io.h>
+#include "dm365pwcr.h"
+/* Alexander V. Shadrin, Virt2Real
+ * This file is intended to support PRTCSS module
+ */
+#define DM365_PRTCSS_BASE 0x01c69000
+
+#define DM365_PRTCIF_PID 0x00
+#define DM365_PRTCIF_CTLR 0x04
+#define DM365_PRTCIF_LDATA 0x08
+#define DM365_PRTCIF_UDATA 0x0C
+#define DM365_PRTCIF_INTEN 0x10
+#define DM365_PRTCIF_INTFLG 0x14
+
+
+#define DM365_PRTCSS_GO_OUT 0x00 //output pin output data register Section 4.2.1
+#define DM365_PRTCSS_GIO_OUT 0x01 // input/output pin output data register Section 4.2.2
+#define DM365_PRTCSS_GIO_DIR 0x02 //input/output pin direction register Section 4.2.3
+#define DM365_PRTCSS_GIO_IN 0x03 //input/output pin input data register Section 4.2.4
+#define DM365_PRTCSS_GIO_FUNC 0x04 //input/output pin function register
+
+/* DAVINCI_PRTCIF_CTLR bit fields */
+#define DM365_PRTCIF_CTLR_BUSY (1<<31)
+#define DM365_PRTCIF_CTLR_SIZE (1<<25)
+#define DM365_PRTCIF_CTLR_DIR (1<<24)
+#define DM365_PRTCIF_CTLR_BENU_MSB (1<<23)
+#define DM365_PRTCIF_CTLR_BENU_LSB (1<<20)
+#define DM365_PRTCIF_CTLR_BENU_MASK (0x00F00000)
+#define DM365_PRTCIF_CTLR_BENL_MSB (1<<19)
+#define DM365_PRTCIF_CTLR_BENL_LSB (1<<16)
+#define DM365_PRTCIF_CTLR_BENL_MASK (0x000F0000)
+#define DM365_PRTCSS_GO2_FUNC_32K (0x01)
+#define DM365_PRTCSS_GO2_MASK (0x07)
+
+static void prtcif_write(u32 val, u32 addr){
+ volatile void* base = (volatile void*)DM365_PRTCSS_BASE;
+ writel(val, base + addr);
+}
+
+static u32 prtcif_read(u32 addr){
+ volatile void* base = (volatile void*)DM365_PRTCSS_BASE;
+ return readl(base + addr);
+}
+
+static void prtcif_wait(void){
+ while (prtcif_read(DM365_PRTCIF_CTLR) & DM365_PRTCIF_CTLR_BUSY){};
+}
+
+static void prtcss_write(unsigned long val, u8 addr)
+{
+ prtcif_wait();
+ prtcif_write(DM365_PRTCIF_CTLR_BENL_LSB | addr, DM365_PRTCIF_CTLR);
+ prtcif_write(val, DM365_PRTCIF_LDATA);
+ prtcif_wait();
+}
+
+static inline u8 prtcss_read(u8 addr)
+{
+ prtcif_wait();
+ prtcif_write(DM365_PRTCIF_CTLR_DIR|DM365_PRTCIF_CTLR_BENL_LSB|addr, DM365_PRTCIF_CTLR);
+ prtcif_wait();
+ return prtcif_read(DM365_PRTCIF_LDATA);
+}
+
+void configure_prtcss_32k(void){
+ unsigned long go_function = prtcss_read(DM365_PRTCSS_GIO_FUNC);
+ go_function &= ~(DM365_PRTCSS_GO2_MASK); //Clear all possible go_func2 functions
+ go_function |= DM365_PRTCSS_GO2_FUNC_32K;//Setting 32K jutput
+ prtcss_write(go_function, DM365_PRTCSS_GIO_FUNC);
+}
diff --git a/arch/arm/mach-davinci/dm365pwcr.h b/arch/arm/mach-davinci/dm365pwcr.h
new file mode 100644
index 00000000..ac4a3c42
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365pwcr.h
@@ -0,0 +1,4 @@
+#ifndef __DM_365_PRTCSS__
+#define __DM_365_PRTCSS__
+void configure_prtcss_32k(void);
+#endif
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index db1dd92e..8854caaf 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,11 +12,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
@@ -310,7 +310,7 @@ static struct clk_lookup dm644x_clks[] = {
CLK("i2c_davinci.1", NULL, &i2c_clk),
CLK("palm_bk3710", NULL, &ide_clk),
CLK("davinci-mcbsp", NULL, &asp_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd_clk),
+ CLK("dm6441-mmc.0", NULL, &mmcsd_clk),
CLK(NULL, "spi", &spi_clk),
CLK(NULL, "gpio", &gpio_clk),
CLK(NULL, "usb", &usb_clk),
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
deleted file mode 100644
index ac7b431c..00000000
--- a/arch/arm/mach-davinci/dm646x.c
+++ /dev/null
@@ -1,921 +0,0 @@
-/*
- * TI DaVinci DM644x chip specific setup
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/serial_8250.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/cputype.h>
-#include <mach/edma.h>
-#include <mach/irqs.h>
-#include <mach/psc.h>
-#include <mach/mux.h>
-#include <mach/time.h>
-#include <mach/serial.h>
-#include <mach/common.h>
-#include <mach/gpio-davinci.h>
-
-#include "davinci.h"
-#include "clock.h"
-#include "mux.h"
-#include "asp.h"
-
-#define DAVINCI_VPIF_BASE (0x01C12000)
-
-#define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
- BIT_MASK(0))
-#define VSCLKDIS_MASK (BIT_MASK(11) | BIT_MASK(10) | BIT_MASK(9) |\
- BIT_MASK(8))
-
-/*
- * Device specific clocks
- */
-#define DM646X_REF_FREQ 27000000
-#define DM646X_AUX_FREQ 24000000
-
-#define DM646X_EMAC_BASE 0x01c80000
-#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
-#define DM646X_EMAC_CNTRL_OFFSET 0x0000
-#define DM646X_EMAC_CNTRL_MOD_OFFSET 0x1000
-#define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000
-#define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000
-
-static struct pll_data pll1_data = {
- .num = 1,
- .phys_base = DAVINCI_PLL1_BASE,
-};
-
-static struct pll_data pll2_data = {
- .num = 2,
- .phys_base = DAVINCI_PLL2_BASE,
-};
-
-static struct clk ref_clk = {
- .name = "ref_clk",
- .rate = DM646X_REF_FREQ,
- .set_rate = davinci_simple_set_rate,
-};
-
-static struct clk aux_clkin = {
- .name = "aux_clkin",
- .rate = DM646X_AUX_FREQ,
-};
-
-static struct clk pll1_clk = {
- .name = "pll1",
- .parent = &ref_clk,
- .pll_data = &pll1_data,
- .flags = CLK_PLL,
-};
-
-static struct clk pll1_sysclk1 = {
- .name = "pll1_sysclk1",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV1,
-};
-
-static struct clk pll1_sysclk2 = {
- .name = "pll1_sysclk2",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
- .name = "pll1_sysclk3",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
-};
-
-static struct clk pll1_sysclk4 = {
- .name = "pll1_sysclk4",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV4,
-};
-
-static struct clk pll1_sysclk5 = {
- .name = "pll1_sysclk5",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV5,
-};
-
-static struct clk pll1_sysclk6 = {
- .name = "pll1_sysclk6",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV6,
-};
-
-static struct clk pll1_sysclk8 = {
- .name = "pll1_sysclk8",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV8,
-};
-
-static struct clk pll1_sysclk9 = {
- .name = "pll1_sysclk9",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV9,
-};
-
-static struct clk pll1_sysclkbp = {
- .name = "pll1_sysclkbp",
- .parent = &pll1_clk,
- .flags = CLK_PLL | PRE_PLL,
- .div_reg = BPDIV,
-};
-
-static struct clk pll1_aux_clk = {
- .name = "pll1_aux_clk",
- .parent = &pll1_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll2_clk = {
- .name = "pll2_clk",
- .parent = &ref_clk,
- .pll_data = &pll2_data,
- .flags = CLK_PLL,
-};
-
-static struct clk pll2_sysclk1 = {
- .name = "pll2_sysclk1",
- .parent = &pll2_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV1,
-};
-
-static struct clk dsp_clk = {
- .name = "dsp",
- .parent = &pll1_sysclk1,
- .lpsc = DM646X_LPSC_C64X_CPU,
- .usecount = 1, /* REVISIT how to disable? */
-};
-
-static struct clk arm_clk = {
- .name = "arm",
- .parent = &pll1_sysclk2,
- .lpsc = DM646X_LPSC_ARM,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_cc_clk = {
- .name = "edma_cc",
- .parent = &pll1_sysclk2,
- .lpsc = DM646X_LPSC_TPCC,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc0_clk = {
- .name = "edma_tc0",
- .parent = &pll1_sysclk2,
- .lpsc = DM646X_LPSC_TPTC0,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc1_clk = {
- .name = "edma_tc1",
- .parent = &pll1_sysclk2,
- .lpsc = DM646X_LPSC_TPTC1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc2_clk = {
- .name = "edma_tc2",
- .parent = &pll1_sysclk2,
- .lpsc = DM646X_LPSC_TPTC2,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk edma_tc3_clk = {
- .name = "edma_tc3",
- .parent = &pll1_sysclk2,
- .lpsc = DM646X_LPSC_TPTC3,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk uart0_clk = {
- .name = "uart0",
- .parent = &aux_clkin,
- .lpsc = DM646X_LPSC_UART0,
-};
-
-static struct clk uart1_clk = {
- .name = "uart1",
- .parent = &aux_clkin,
- .lpsc = DM646X_LPSC_UART1,
-};
-
-static struct clk uart2_clk = {
- .name = "uart2",
- .parent = &aux_clkin,
- .lpsc = DM646X_LPSC_UART2,
-};
-
-static struct clk i2c_clk = {
- .name = "I2CCLK",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_I2C,
-};
-
-static struct clk gpio_clk = {
- .name = "gpio",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_GPIO,
-};
-
-static struct clk mcasp0_clk = {
- .name = "mcasp0",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_McASP0,
-};
-
-static struct clk mcasp1_clk = {
- .name = "mcasp1",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_McASP1,
-};
-
-static struct clk aemif_clk = {
- .name = "aemif",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_AEMIF,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk emac_clk = {
- .name = "emac",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_EMAC,
-};
-
-static struct clk pwm0_clk = {
- .name = "pwm0",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_PWM0,
- .usecount = 1, /* REVIST: disabling hangs system */
-};
-
-static struct clk pwm1_clk = {
- .name = "pwm1",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_PWM1,
- .usecount = 1, /* REVIST: disabling hangs system */
-};
-
-static struct clk timer0_clk = {
- .name = "timer0",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_TIMER0,
-};
-
-static struct clk timer1_clk = {
- .name = "timer1",
- .parent = &pll1_sysclk3,
- .lpsc = DM646X_LPSC_TIMER1,
-};
-
-static struct clk timer2_clk = {
- .name = "timer2",
- .parent = &pll1_sysclk3,
- .flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
-};
-
-
-static struct clk ide_clk = {
- .name = "ide",
- .parent = &pll1_sysclk4,
- .lpsc = DAVINCI_LPSC_ATA,
-};
-
-static struct clk vpif0_clk = {
- .name = "vpif0",
- .parent = &ref_clk,
- .lpsc = DM646X_LPSC_VPSSMSTR,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk vpif1_clk = {
- .name = "vpif1",
- .parent = &ref_clk,
- .lpsc = DM646X_LPSC_VPSSSLV,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk_lookup dm646x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "aux", &aux_clkin),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
- CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "edma_cc", &edma_cc_clk),
- CLK(NULL, "edma_tc0", &edma_tc0_clk),
- CLK(NULL, "edma_tc1", &edma_tc1_clk),
- CLK(NULL, "edma_tc2", &edma_tc2_clk),
- CLK(NULL, "edma_tc3", &edma_tc3_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("watchdog", NULL, &timer2_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK(NULL, "vpif0", &vpif0_clk),
- CLK(NULL, "vpif1", &vpif1_clk),
- CLK(NULL, NULL, NULL),
-};
-
-static struct emac_platform_data dm646x_emac_pdata = {
- .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET,
- .ctrl_mod_reg_offset = DM646X_EMAC_CNTRL_MOD_OFFSET,
- .ctrl_ram_offset = DM646X_EMAC_CNTRL_RAM_OFFSET,
- .ctrl_ram_size = DM646X_EMAC_CNTRL_RAM_SIZE,
- .version = EMAC_VERSION_2,
-};
-
-static struct resource dm646x_emac_resources[] = {
- {
- .start = DM646X_EMAC_BASE,
- .end = DM646X_EMAC_BASE + SZ_16K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DM646X_EMACRXTHINT,
- .end = IRQ_DM646X_EMACRXTHINT,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DM646X_EMACRXINT,
- .end = IRQ_DM646X_EMACRXINT,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DM646X_EMACTXINT,
- .end = IRQ_DM646X_EMACTXINT,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DM646X_EMACMISCINT,
- .end = IRQ_DM646X_EMACMISCINT,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device dm646x_emac_device = {
- .name = "davinci_emac",
- .id = 1,
- .dev = {
- .platform_data = &dm646x_emac_pdata,
- },
- .num_resources = ARRAY_SIZE(dm646x_emac_resources),
- .resource = dm646x_emac_resources,
-};
-
-static struct resource dm646x_mdio_resources[] = {
- {
- .start = DM646X_EMAC_MDIO_BASE,
- .end = DM646X_EMAC_MDIO_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device dm646x_mdio_device = {
- .name = "davinci_mdio",
- .id = 0,
- .num_resources = ARRAY_SIZE(dm646x_mdio_resources),
- .resource = dm646x_mdio_resources,
-};
-
-/*
- * Device specific mux setup
- *
- * soc description mux mode mode mux dbg
- * reg offset mask mode
- */
-static const struct mux_config dm646x_pins[] = {
-#ifdef CONFIG_DAVINCI_MUX
-MUX_CFG(DM646X, ATAEN, 0, 0, 5, 1, true)
-
-MUX_CFG(DM646X, AUDCK1, 0, 29, 1, 0, false)
-
-MUX_CFG(DM646X, AUDCK0, 0, 28, 1, 0, false)
-
-MUX_CFG(DM646X, CRGMUX, 0, 24, 7, 5, true)
-
-MUX_CFG(DM646X, STSOMUX_DISABLE, 0, 22, 3, 0, true)
-
-MUX_CFG(DM646X, STSIMUX_DISABLE, 0, 20, 3, 0, true)
-
-MUX_CFG(DM646X, PTSOMUX_DISABLE, 0, 18, 3, 0, true)
-
-MUX_CFG(DM646X, PTSIMUX_DISABLE, 0, 16, 3, 0, true)
-
-MUX_CFG(DM646X, STSOMUX, 0, 22, 3, 2, true)
-
-MUX_CFG(DM646X, STSIMUX, 0, 20, 3, 2, true)
-
-MUX_CFG(DM646X, PTSOMUX_PARALLEL, 0, 18, 3, 2, true)
-
-MUX_CFG(DM646X, PTSIMUX_PARALLEL, 0, 16, 3, 2, true)
-
-MUX_CFG(DM646X, PTSOMUX_SERIAL, 0, 18, 3, 3, true)
-
-MUX_CFG(DM646X, PTSIMUX_SERIAL, 0, 16, 3, 3, true)
-#endif
-};
-
-static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
- [IRQ_DM646X_VP_VERTINT0] = 7,
- [IRQ_DM646X_VP_VERTINT1] = 7,
- [IRQ_DM646X_VP_VERTINT2] = 7,
- [IRQ_DM646X_VP_VERTINT3] = 7,
- [IRQ_DM646X_VP_ERRINT] = 7,
- [IRQ_DM646X_RESERVED_1] = 7,
- [IRQ_DM646X_RESERVED_2] = 7,
- [IRQ_DM646X_WDINT] = 7,
- [IRQ_DM646X_CRGENINT0] = 7,
- [IRQ_DM646X_CRGENINT1] = 7,
- [IRQ_DM646X_TSIFINT0] = 7,
- [IRQ_DM646X_TSIFINT1] = 7,
- [IRQ_DM646X_VDCEINT] = 7,
- [IRQ_DM646X_USBINT] = 7,
- [IRQ_DM646X_USBDMAINT] = 7,
- [IRQ_DM646X_PCIINT] = 7,
- [IRQ_CCINT0] = 7, /* dma */
- [IRQ_CCERRINT] = 7, /* dma */
- [IRQ_TCERRINT0] = 7, /* dma */
- [IRQ_TCERRINT] = 7, /* dma */
- [IRQ_DM646X_TCERRINT2] = 7,
- [IRQ_DM646X_TCERRINT3] = 7,
- [IRQ_DM646X_IDE] = 7,
- [IRQ_DM646X_HPIINT] = 7,
- [IRQ_DM646X_EMACRXTHINT] = 7,
- [IRQ_DM646X_EMACRXINT] = 7,
- [IRQ_DM646X_EMACTXINT] = 7,
- [IRQ_DM646X_EMACMISCINT] = 7,
- [IRQ_DM646X_MCASP0TXINT] = 7,
- [IRQ_DM646X_MCASP0RXINT] = 7,
- [IRQ_AEMIFINT] = 7,
- [IRQ_DM646X_RESERVED_3] = 7,
- [IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */
- [IRQ_TINT0_TINT34] = 7, /* clocksource */
- [IRQ_TINT1_TINT12] = 7, /* DSP timer */
- [IRQ_TINT1_TINT34] = 7, /* system tick */
- [IRQ_PWMINT0] = 7,
- [IRQ_PWMINT1] = 7,
- [IRQ_DM646X_VLQINT] = 7,
- [IRQ_I2C] = 7,
- [IRQ_UARTINT0] = 7,
- [IRQ_UARTINT1] = 7,
- [IRQ_DM646X_UARTINT2] = 7,
- [IRQ_DM646X_SPINT0] = 7,
- [IRQ_DM646X_SPINT1] = 7,
- [IRQ_DM646X_DSP2ARMINT] = 7,
- [IRQ_DM646X_RESERVED_4] = 7,
- [IRQ_DM646X_PSCINT] = 7,
- [IRQ_DM646X_GPIO0] = 7,
- [IRQ_DM646X_GPIO1] = 7,
- [IRQ_DM646X_GPIO2] = 7,
- [IRQ_DM646X_GPIO3] = 7,
- [IRQ_DM646X_GPIO4] = 7,
- [IRQ_DM646X_GPIO5] = 7,
- [IRQ_DM646X_GPIO6] = 7,
- [IRQ_DM646X_GPIO7] = 7,
- [IRQ_DM646X_GPIOBNK0] = 7,
- [IRQ_DM646X_GPIOBNK1] = 7,
- [IRQ_DM646X_GPIOBNK2] = 7,
- [IRQ_DM646X_DDRINT] = 7,
- [IRQ_DM646X_AEMIFINT] = 7,
- [IRQ_COMMTX] = 7,
- [IRQ_COMMRX] = 7,
- [IRQ_EMUINT] = 7,
-};
-
-/*----------------------------------------------------------------------*/
-
-/* Four Transfer Controllers on DM646x */
-static const s8
-dm646x_queue_tc_mapping[][2] = {
- /* {event queue no, TC no} */
- {0, 0},
- {1, 1},
- {2, 2},
- {3, 3},
- {-1, -1},
-};
-
-static const s8
-dm646x_queue_priority_mapping[][2] = {
- /* {event queue no, Priority} */
- {0, 4},
- {1, 0},
- {2, 5},
- {3, 1},
- {-1, -1},
-};
-
-static struct edma_soc_info edma_cc0_info = {
- .n_channel = 64,
- .n_region = 6, /* 0-1, 4-7 */
- .n_slot = 512,
- .n_tc = 4,
- .n_cc = 1,
- .queue_tc_mapping = dm646x_queue_tc_mapping,
- .queue_priority_mapping = dm646x_queue_priority_mapping,
- .default_queue = EVENTQ_1,
-};
-
-static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = {
- &edma_cc0_info,
-};
-
-static struct resource edma_resources[] = {
- {
- .name = "edma_cc0",
- .start = 0x01c00000,
- .end = 0x01c00000 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc0",
- .start = 0x01c10000,
- .end = 0x01c10000 + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc1",
- .start = 0x01c10400,
- .end = 0x01c10400 + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc2",
- .start = 0x01c10800,
- .end = 0x01c10800 + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma_tc3",
- .start = 0x01c10c00,
- .end = 0x01c10c00 + SZ_1K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "edma0",
- .start = IRQ_CCINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "edma0_err",
- .start = IRQ_CCERRINT,
- .flags = IORESOURCE_IRQ,
- },
- /* not using TC*_ERR */
-};
-
-static struct platform_device dm646x_edma_device = {
- .name = "edma",
- .id = 0,
- .dev.platform_data = dm646x_edma_info,
- .num_resources = ARRAY_SIZE(edma_resources),
- .resource = edma_resources,
-};
-
-static struct resource dm646x_mcasp0_resources[] = {
- {
- .name = "mcasp0",
- .start = DAVINCI_DM646X_MCASP0_REG_BASE,
- .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
- .flags = IORESOURCE_MEM,
- },
- /* first TX, then RX */
- {
- .start = DAVINCI_DM646X_DMA_MCASP0_AXEVT0,
- .end = DAVINCI_DM646X_DMA_MCASP0_AXEVT0,
- .flags = IORESOURCE_DMA,
- },
- {
- .start = DAVINCI_DM646X_DMA_MCASP0_AREVT0,
- .end = DAVINCI_DM646X_DMA_MCASP0_AREVT0,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct resource dm646x_mcasp1_resources[] = {
- {
- .name = "mcasp1",
- .start = DAVINCI_DM646X_MCASP1_REG_BASE,
- .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
- .flags = IORESOURCE_MEM,
- },
- /* DIT mode, only TX event */
- {
- .start = DAVINCI_DM646X_DMA_MCASP1_AXEVT1,
- .end = DAVINCI_DM646X_DMA_MCASP1_AXEVT1,
- .flags = IORESOURCE_DMA,
- },
- /* DIT mode, dummy entry */
- {
- .start = -1,
- .end = -1,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct platform_device dm646x_mcasp0_device = {
- .name = "davinci-mcasp",
- .id = 0,
- .num_resources = ARRAY_SIZE(dm646x_mcasp0_resources),
- .resource = dm646x_mcasp0_resources,
-};
-
-static struct platform_device dm646x_mcasp1_device = {
- .name = "davinci-mcasp",
- .id = 1,
- .num_resources = ARRAY_SIZE(dm646x_mcasp1_resources),
- .resource = dm646x_mcasp1_resources,
-};
-
-static struct platform_device dm646x_dit_device = {
- .name = "spdif-dit",
- .id = -1,
-};
-
-static u64 vpif_dma_mask = DMA_BIT_MASK(32);
-
-static struct resource vpif_resource[] = {
- {
- .start = DAVINCI_VPIF_BASE,
- .end = DAVINCI_VPIF_BASE + 0x03ff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device vpif_dev = {
- .name = "vpif",
- .id = -1,
- .dev = {
- .dma_mask = &vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = vpif_resource,
- .num_resources = ARRAY_SIZE(vpif_resource),
-};
-
-static struct resource vpif_display_resource[] = {
- {
- .start = IRQ_DM646X_VP_VERTINT2,
- .end = IRQ_DM646X_VP_VERTINT2,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DM646X_VP_VERTINT3,
- .end = IRQ_DM646X_VP_VERTINT3,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device vpif_display_dev = {
- .name = "vpif_display",
- .id = -1,
- .dev = {
- .dma_mask = &vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = vpif_display_resource,
- .num_resources = ARRAY_SIZE(vpif_display_resource),
-};
-
-static struct resource vpif_capture_resource[] = {
- {
- .start = IRQ_DM646X_VP_VERTINT0,
- .end = IRQ_DM646X_VP_VERTINT0,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = IRQ_DM646X_VP_VERTINT1,
- .end = IRQ_DM646X_VP_VERTINT1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device vpif_capture_dev = {
- .name = "vpif_capture",
- .id = -1,
- .dev = {
- .dma_mask = &vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = vpif_capture_resource,
- .num_resources = ARRAY_SIZE(vpif_capture_resource),
-};
-
-/*----------------------------------------------------------------------*/
-
-static struct map_desc dm646x_io_desc[] = {
- {
- .virtual = IO_VIRT,
- .pfn = __phys_to_pfn(IO_PHYS),
- .length = IO_SIZE,
- .type = MT_DEVICE
- },
-};
-
-/* Contents of JTAG ID register used to identify exact cpu type */
-static struct davinci_id dm646x_ids[] = {
- {
- .variant = 0x0,
- .part_no = 0xb770,
- .manufacturer = 0x017,
- .cpu_id = DAVINCI_CPU_ID_DM6467,
- .name = "dm6467_rev1.x",
- },
- {
- .variant = 0x1,
- .part_no = 0xb770,
- .manufacturer = 0x017,
- .cpu_id = DAVINCI_CPU_ID_DM6467,
- .name = "dm6467_rev3.x",
- },
-};
-
-static u32 dm646x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
-
-/*
- * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
- * T0_TOP: Timer 0, top : clocksource for generic timekeeping
- * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
- * T1_TOP: Timer 1, top : <unused>
- */
-static struct davinci_timer_info dm646x_timer_info = {
- .timers = davinci_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
-};
-
-static struct plat_serial8250_port dm646x_serial_platform_data[] = {
- {
- .mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- },
- {
- .mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- },
- {
- .mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_DM646X_UARTINT2,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
- UPF_IOREMAP,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- },
- {
- .flags = 0
- },
-};
-
-static struct platform_device dm646x_serial_device = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev = {
- .platform_data = dm646x_serial_platform_data,
- },
-};
-
-static struct davinci_soc_info davinci_soc_info_dm646x = {
- .io_desc = dm646x_io_desc,
- .io_desc_num = ARRAY_SIZE(dm646x_io_desc),
- .jtag_id_reg = 0x01c40028,
- .ids = dm646x_ids,
- .ids_num = ARRAY_SIZE(dm646x_ids),
- .cpu_clks = dm646x_clks,
- .psc_bases = dm646x_psc_bases,
- .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
- .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
- .pinmux_pins = dm646x_pins,
- .pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
- .intc_irq_prios = dm646x_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
- .timer_info = &dm646x_timer_info,
- .gpio_type = GPIO_TYPE_DAVINCI,
- .gpio_base = DAVINCI_GPIO_BASE,
- .gpio_num = 43, /* Only 33 usable */
- .gpio_irq = IRQ_DM646X_GPIOBNK0,
- .serial_dev = &dm646x_serial_device,
- .emac_pdata = &dm646x_emac_pdata,
- .sram_dma = 0x10010000,
- .sram_len = SZ_32K,
-};
-
-void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
-{
- dm646x_mcasp0_device.dev.platform_data = pdata;
- platform_device_register(&dm646x_mcasp0_device);
-}
-
-void __init dm646x_init_mcasp1(struct snd_platform_data *pdata)
-{
- dm646x_mcasp1_device.dev.platform_data = pdata;
- platform_device_register(&dm646x_mcasp1_device);
- platform_device_register(&dm646x_dit_device);
-}
-
-void dm646x_setup_vpif(struct vpif_display_config *display_config,
- struct vpif_capture_config *capture_config)
-{
- unsigned int value;
-
- value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
- value &= ~VSCLKDIS_MASK;
- __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
-
- value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
- value &= ~VDD3P3V_VID_MASK;
- __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
-
- davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
- davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
- davinci_cfg_reg(DM646X_PTSOMUX_DISABLE);
- davinci_cfg_reg(DM646X_PTSIMUX_DISABLE);
-
- vpif_display_dev.dev.platform_data = display_config;
- vpif_capture_dev.dev.platform_data = capture_config;
- platform_device_register(&vpif_dev);
- platform_device_register(&vpif_display_dev);
- platform_device_register(&vpif_capture_dev);
-}
-
-int __init dm646x_init_edma(struct edma_rsv_info *rsv)
-{
- edma_cc0_info.rsv = rsv;
-
- return platform_device_register(&dm646x_edma_device);
-}
-
-void __init dm646x_init(void)
-{
- davinci_common_init(&davinci_soc_info_dm646x);
- davinci_map_sysmod();
-}
-
-static int __init dm646x_init_devices(void)
-{
- if (!cpu_is_davinci_dm646x())
- return 0;
-
- platform_device_register(&dm646x_mdio_device);
- platform_device_register(&dm646x_emac_device);
- clk_add_alias(NULL, dev_name(&dm646x_mdio_device.dev),
- NULL, &dm646x_emac_device.dev);
-
- return 0;
-}
-postcore_initcall(dm646x_init_devices);
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
new file mode 100644
index 00000000..f6ea9db1
--- /dev/null
+++ b/arch/arm/mach-davinci/gpio.c
@@ -0,0 +1,420 @@
+/*
+ * TI DaVinci GPIO Support
+ *
+ * Copyright (c) 2006-2007 David Brownell
+ * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/bitops.h>
+
+#include <mach/cputype.h>
+#include <mach/irqs.h>
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/gpio.h>
+
+#include <asm/mach/irq.h>
+
+
+static DEFINE_SPINLOCK(gpio_lock);
+
+struct davinci_gpio {
+ struct gpio_chip chip;
+ struct gpio_controller *__iomem regs;
+ int irq_base;
+};
+
+static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
+
+/* create a non-inlined version */
+static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio)
+{
+ return __gpio_to_controller(gpio);
+}
+
+static int __init davinci_gpio_irq_setup(void);
+
+/*--------------------------------------------------------------------------*/
+
+/*
+ * board setup code *MUST* set PINMUX0 and PINMUX1 as
+ * needed, and enable the GPIO clock.
+ */
+
+static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
+{
+ struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
+ struct gpio_controller *__iomem g = d->regs;
+ u32 temp;
+
+ spin_lock(&gpio_lock);
+ temp = __raw_readl(&g->dir);
+ temp |= (1 << offset);
+ __raw_writel(temp, &g->dir);
+ spin_unlock(&gpio_lock);
+
+ return 0;
+}
+
+/*
+ * Read the pin's value (works even if it's set up as output);
+ * returns zero/nonzero.
+ *
+ * Note that changes are synched to the GPIO clock, so reading values back
+ * right after you've set them may give old values.
+ */
+static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
+ struct gpio_controller *__iomem g = d->regs;
+
+ return (1 << offset) & __raw_readl(&g->in_data);
+}
+
+static int
+davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
+ struct gpio_controller *__iomem g = d->regs;
+ u32 temp;
+ u32 mask = 1 << offset;
+
+ spin_lock(&gpio_lock);
+ temp = __raw_readl(&g->dir);
+ temp &= ~mask;
+ __raw_writel(mask, value ? &g->set_data : &g->clr_data);
+ __raw_writel(temp, &g->dir);
+ spin_unlock(&gpio_lock);
+ return 0;
+}
+
+/*
+ * Assuming the pin is muxed as a gpio output, set its output value.
+ */
+static void
+davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
+ struct gpio_controller *__iomem g = d->regs;
+
+ __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
+}
+
+static int __init davinci_gpio_setup(void)
+{
+ int i, base;
+ unsigned ngpio;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ /*
+ * The gpio banks conceptually expose a segmented bitmap,
+ * and "ngpio" is one more than the largest zero-based
+ * bit index that's valid.
+ */
+ ngpio = soc_info->gpio_num;
+ if (ngpio == 0) {
+ pr_err("GPIO setup: how many GPIOs?\n");
+ return -EINVAL;
+ }
+
+ if (WARN_ON(DAVINCI_N_GPIO < ngpio))
+ ngpio = DAVINCI_N_GPIO;
+
+ for (i = 0, base = 0; base < ngpio; i++, base += 32) {
+ chips[i].chip.label = "DaVinci";
+
+ chips[i].chip.direction_input = davinci_direction_in;
+ chips[i].chip.get = davinci_gpio_get;
+ chips[i].chip.direction_output = davinci_direction_out;
+ chips[i].chip.set = davinci_gpio_set;
+
+ chips[i].chip.base = base;
+ chips[i].chip.ngpio = ngpio - base;
+ if (chips[i].chip.ngpio > 32)
+ chips[i].chip.ngpio = 32;
+
+ chips[i].regs = gpio2controller(base);
+
+ gpiochip_add(&chips[i].chip);
+ }
+
+ davinci_gpio_irq_setup();
+ return 0;
+}
+pure_initcall(davinci_gpio_setup);
+
+/*--------------------------------------------------------------------------*/
+/*
+ * We expect irqs will normally be set up as input pins, but they can also be
+ * used as output pins ... which is convenient for testing.
+ *
+ * NOTE: The first few GPIOs also have direct INTC hookups in addition
+ * to their GPIOBNK0 irq, with a bit less overhead.
+ *
+ * All those INTC hookups (direct, plus several IRQ banks) can also
+ * serve as EDMA event triggers.
+ */
+
+static void gpio_irq_disable(unsigned irq)
+{
+ struct gpio_controller *__iomem g = get_irq_chip_data(irq);
+ u32 mask = (u32) get_irq_data(irq);
+
+ __raw_writel(mask, &g->clr_falling);
+ __raw_writel(mask, &g->clr_rising);
+}
+
+static void gpio_irq_enable(unsigned irq)
+{
+ struct gpio_controller *__iomem g = get_irq_chip_data(irq);
+ u32 mask = (u32) get_irq_data(irq);
+ unsigned status = irq_desc[irq].status;
+
+ status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
+ if (!status)
+ status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
+
+ if (status & IRQ_TYPE_EDGE_FALLING)
+ __raw_writel(mask, &g->set_falling);
+ if (status & IRQ_TYPE_EDGE_RISING)
+ __raw_writel(mask, &g->set_rising);
+}
+
+static int gpio_irq_type(unsigned irq, unsigned trigger)
+{
+ struct gpio_controller *__iomem g = get_irq_chip_data(irq);
+ u32 mask = (u32) get_irq_data(irq);
+
+ if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
+ return -EINVAL;
+
+ irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
+ irq_desc[irq].status |= trigger;
+
+ /* don't enable the IRQ if it's currently disabled */
+ if (irq_desc[irq].depth == 0) {
+ __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
+ ? &g->set_falling : &g->clr_falling);
+ __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
+ ? &g->set_rising : &g->clr_rising);
+ }
+ return 0;
+}
+
+static struct irq_chip gpio_irqchip = {
+ .name = "GPIO",
+ .enable = gpio_irq_enable,
+ .disable = gpio_irq_disable,
+ .set_type = gpio_irq_type,
+};
+
+static void
+gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+ struct gpio_controller *__iomem g = get_irq_chip_data(irq);
+ u32 mask = 0xffff;
+
+ /* we only care about one bank */
+ if (irq & 1)
+ mask <<= 16;
+
+ /* temporarily mask (level sensitive) parent IRQ */
+ desc->chip->mask(irq);
+ desc->chip->ack(irq);
+ while (1) {
+ u32 status;
+ int n;
+ int res;
+
+ /* ack any irqs */
+ status = __raw_readl(&g->intstat) & mask;
+ if (!status)
+ break;
+ __raw_writel(status, &g->intstat);
+ if (irq & 1)
+ status >>= 16;
+
+ /* now demux them to the right lowlevel handler */
+ n = (int)get_irq_data(irq);
+ while (status) {
+ res = ffs(status);
+ n += res;
+ generic_handle_irq(n - 1);
+ status >>= res;
+ }
+ }
+ desc->chip->unmask(irq);
+ /* now it may re-trigger */
+}
+
+static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
+{
+ struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
+
+ if (d->irq_base >= 0)
+ return d->irq_base + offset;
+ else
+ return -ENODEV;
+}
+
+static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
+{
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ /* NOTE: we assume for now that only irqs in the first gpio_chip
+ * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs).
+ */
+ if (offset < soc_info->gpio_unbanked)
+ return soc_info->gpio_irq + offset;
+ else
+ return -ENODEV;
+}
+
+static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
+{
+ struct gpio_controller *__iomem g = get_irq_chip_data(irq);
+ u32 mask = (u32) get_irq_data(irq);
+
+ if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
+ return -EINVAL;
+
+ __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
+ ? &g->set_falling : &g->clr_falling);
+ __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
+ ? &g->set_rising : &g->clr_rising);
+
+ return 0;
+}
+
+/*
+ * NOTE: for suspend/resume, probably best to make a platform_device with
+ * suspend_late/resume_resume calls hooking into results of the set_wake()
+ * calls ... so if no gpios are wakeup events the clock can be disabled,
+ * with outputs left at previously set levels, and so that VDD3P3V.IOPWDN0
+ * (dm6446) can be set appropriately for GPIOV33 pins.
+ */
+
+static int __init davinci_gpio_irq_setup(void)
+{
+ unsigned gpio, irq, bank;
+ struct clk *clk;
+ u32 binten = 0;
+ unsigned ngpio, bank_irq;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+ struct gpio_controller *__iomem g;
+
+ ngpio = soc_info->gpio_num;
+
+ bank_irq = soc_info->gpio_irq;
+ if (bank_irq == 0) {
+ printk(KERN_ERR "Don't know first GPIO bank IRQ.\n");
+ return -EINVAL;
+ }
+
+ clk = clk_get(NULL, "gpio");
+ if (IS_ERR(clk)) {
+ printk(KERN_ERR "Error %ld getting gpio clock?\n",
+ PTR_ERR(clk));
+ return PTR_ERR(clk);
+ }
+ clk_enable(clk);
+
+ /* Arrange gpio_to_irq() support, handling either direct IRQs or
+ * banked IRQs. Having GPIOs in the first GPIO bank use direct
+ * IRQs, while the others use banked IRQs, would need some setup
+ * tweaks to recognize hardware which can do that.
+ */
+ for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) {
+ chips[bank].chip.to_irq = gpio_to_irq_banked;
+ chips[bank].irq_base = soc_info->gpio_unbanked
+ ? -EINVAL
+ : (soc_info->intc_irq_num + gpio);
+ }
+
+ /*
+ * AINTC can handle direct/unbanked IRQs for GPIOs, with the GPIO
+ * controller only handling trigger modes. We currently assume no
+ * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
+ */
+ if (soc_info->gpio_unbanked) {
+ static struct irq_chip gpio_irqchip_unbanked;
+
+ /* pass "bank 0" GPIO IRQs to AINTC */
+ chips[0].chip.to_irq = gpio_to_irq_unbanked;
+ binten = BIT(0);
+
+ /* AINTC handles mask/unmask; GPIO handles triggering */
+ irq = bank_irq;
+ gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq));
+ gpio_irqchip_unbanked.name = "GPIO-AINTC";
+ gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked;
+
+ /* default trigger: both edges */
+ g = gpio2controller(0);
+ __raw_writel(~0, &g->set_falling);
+ __raw_writel(~0, &g->set_rising);
+
+ /* set the direct IRQs up to use that irqchip */
+ for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
+ set_irq_chip(irq, &gpio_irqchip_unbanked);
+ set_irq_data(irq, (void *) __gpio_mask(gpio));
+ set_irq_chip_data(irq, g);
+ irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH;
+ }
+
+ goto done;
+ }
+
+ /*
+ * Or, AINTC can handle IRQs for banks of 16 GPIO IRQs, which we
+ * then chain through our own handler.
+ */
+ for (gpio = 0, irq = gpio_to_irq(0), bank = 0;
+ gpio < ngpio;
+ bank++, bank_irq++) {
+ unsigned i;
+
+ /* disabled by default, enabled only as needed */
+ g = gpio2controller(gpio);
+ __raw_writel(~0, &g->clr_falling);
+ __raw_writel(~0, &g->clr_rising);
+
+ /* set up all irqs in this bank */
+ set_irq_chained_handler(bank_irq, gpio_irq_handler);
+ set_irq_chip_data(bank_irq, g);
+ set_irq_data(bank_irq, (void *)irq);
+
+ for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
+ set_irq_chip(irq, &gpio_irqchip);
+ set_irq_chip_data(irq, g);
+ set_irq_data(irq, (void *) __gpio_mask(gpio));
+ set_irq_handler(irq, handle_simple_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+
+ binten |= BIT(bank);
+ }
+
+done:
+ /* BINTEN -- per-bank interrupt enable. genirq would also let these
+ * bits be set/cleared dynamically.
+ */
+ __raw_writel(binten, soc_info->gpio_base + 0x08);
+
+ printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
+
+ return 0;
+}
diff --git a/arch/arm/mach-davinci/hid_struct.h b/arch/arm/mach-davinci/hid_struct.h
new file mode 100644
index 00000000..8da078c8
--- /dev/null
+++ b/arch/arm/mach-davinci/hid_struct.h
@@ -0,0 +1,95 @@
+static struct hidg_func_descriptor my_keybord_data = {
+ .subclass = 1, // Boot device
+ .protocol = 1, // Keyboard
+ .report_length = 8,
+ .report_desc_length = 63,
+ .report_desc = {
+ 0x05, 0x01, // USAGE_PAGE (Generic Desktop)
+ 0x09, 0x06, // USAGE (Keyboard)
+ 0xa1, 0x01, // COLLECTION (Application)
+ 0x05, 0x07, // USAGE_PAGE (Keyboard)
+ 0x19, 0xe0, // USAGE_MINIMUM (Keyboard LeftControl)
+ 0x29, 0xe7, // USAGE_MAXIMUM (Keyboard Right GUI)
+ 0x15, 0x00, // LOGICAL_MINIMUM (0)
+ 0x25, 0x01, // LOGICAL_MAXIMUM (1)
+ 0x75, 0x01, // REPORT_SIZE (1)
+ 0x95, 0x08, // REPORT_COUNT (8)
+ 0x81, 0x02, // INPUT (Data,Var,Abs)
+ 0x95, 0x01, // REPORT_COUNT (1)
+ 0x75, 0x08, // REPORT_SIZE (8)
+ 0x81, 0x03, // INPUT (Cnst,Var,Abs)
+ 0x95, 0x05, // REPORT_COUNT (5)
+ 0x75, 0x01, // REPORT_SIZE (1)
+ 0x05, 0x08, // USAGE_PAGE (LEDs)
+ 0x19, 0x01, // USAGE_MINIMUM (Num Lock)
+ 0x29, 0x05, // USAGE_MAXIMUM (Kana)
+ 0x91, 0x02, // OUTPUT (Data,Var,Abs)
+ 0x95, 0x01, // REPORT_COUNT (1)
+ 0x75, 0x03, // REPORT_SIZE (3)
+ 0x91, 0x03, // OUTPUT (Cnst,Var,Abs)
+ 0x95, 0x06, // REPORT_COUNT (6)
+ 0x75, 0x08, // REPORT_SIZE (8)
+ 0x15, 0x00, // LOGICAL_MINIMUM (0)
+ 0x25, 0x65, // LOGICAL_MAXIMUM (101)
+ 0x05, 0x07, // USAGE_PAGE (Keyboard)
+ 0x19, 0x00, // USAGE_MINIMUM (Reserved)
+ 0x29, 0x65, // USAGE_MAXIMUM (Keyboard Application)
+ 0x81, 0x00, // INPUT (Data,Ary,Abs)
+ 0xc0 // END_COLLECTION
+ }
+};
+
+static struct platform_device my_keybord_hid = {
+ .name = "hidg",
+ .id = 0,
+ .num_resources = 0,
+ .resource = 0,
+ .dev = {
+ .platform_data = &my_keybord_data,
+ },
+};
+
+static struct hidg_func_descriptor my_mouse_data = {
+ .subclass = 1, // Boot device
+ .protocol = 2, // Mouse
+ .report_length = 3,
+ .report_desc_length= 50,
+ .report_desc= {
+ 0x05, 0x01, // USAGE_PAGE (Generic Desktop)
+ 0x09, 0x02, // USAGE (Mouse)
+ 0xa1, 0x01, // COLLECTION (Application)
+ 0x09, 0x01, // USAGE (Pointer)
+ 0xa1, 0x00, // COLLECTION (Physical)
+ 0x05, 0x09, // USAGE_PAGE (Button)
+ 0x19, 0x01, // USAGE_MINIMUM (Button 1)
+ 0x29, 0x03, // USAGE_MAXIMUM (Button 3)
+ 0x15, 0x00, // LOGICAL_MINIMUM (0)
+ 0x25, 0x01, // LOGICAL_MAXIMUM (1)
+ 0x95, 0x03, // REPORT_COUNT (3)
+ 0x75, 0x01, // REPORT_SIZE (1)
+ 0x81, 0x02, // INPUT (Data,Var,Abs)
+ 0x95, 0x01, // REPORT_COUNT (1)
+ 0x75, 0x05, // REPORT_SIZE (5)
+ 0x81, 0x03, // INPUT (Cnst,Var,Abs)
+ 0x05, 0x01, // USAGE_PAGE (Generic Desktop)
+ 0x09, 0x30, // USAGE (X)
+ 0x09, 0x31, // USAGE (Y)
+ 0x15, 0x81, // LOGICAL_MINIMUM (-127)
+ 0x25, 0x7f, // LOGICAL_MAXIMUM (127)
+ 0x75, 0x08, // REPORT_SIZE (8)
+ 0x95, 0x02, // REPORT_COUNT (2)
+ 0x81, 0x06, // INPUT (Data,Var,Rel)
+ 0xc0, // END_COLLECTION
+ 0xc0 // END_COLLECTION
+ }
+};
+
+static struct platform_device my_mouse_hid = {
+ .name = "hidg",
+ .id = 1,
+ .num_resources = 0,
+ .resource = 0,
+ .dev = {
+ .platform_data = &my_mouse_data,
+ },
+};
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index b124b77c..7fbf7a40 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -81,6 +81,10 @@ extern struct davinci_soc_info davinci_soc_info;
extern void davinci_common_init(struct davinci_soc_info *soc_info);
extern void davinci_init_ide(void);
+/* standard place to map on-chip SRAMs; they *may* support DMA */
+
+#define SRAM_VIRT 0xfffe0000
+
void davinci_restart(char mode, const char *cmd);
void davinci_init_late(void);
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index de439b7b..02345314 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,8 +20,8 @@
#include <linux/videodev2.h>
#include <mach/serial.h>
-#include <mach/edma.h>
#include <mach/pm.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
@@ -55,6 +55,7 @@ extern unsigned int da850_max_speed;
#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
#define DA8XX_JTAG_ID_REG 0x18
#define DA8XX_CFGCHIP0_REG 0x17c
+#define DA8XX_CFGCHIP1_REG 0x180
#define DA8XX_CFGCHIP2_REG 0x184
#define DA8XX_CFGCHIP3_REG 0x188
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index 34290d14..b18b8ebc 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -24,8 +24,6 @@
#if defined(CONFIG_DEBUG_DAVINCI_DMx_UART0)
#define UART_BASE DAVINCI_UART0_BASE
-#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART0)
-#define UART_BASE DA8XX_UART0_BASE
#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART1)
#define UART_BASE DA8XX_UART1_BASE
#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART2)
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 7e84c906..406651c3 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -151,6 +151,42 @@ struct edmacc_param {
#define DA830_DMACH2EVENT_MAP1 0x00000000u
#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
+/* DA830 specific EDMA3 Events Information */
+enum DA830_edma_ch {
+ DA830_DMACH_MCASP0_RX,
+ DA830_DMACH_MCASP0_TX,
+ DA830_DMACH_MCASP1_RX,
+ DA830_DMACH_MCASP1_TX,
+ DA830_DMACH_MCASP2_RX,
+ DA830_DMACH_MCASP2_TX,
+ DA830_DMACH_GPIO_BNK0INT,
+ DA830_DMACH_GPIO_BNK1INT,
+ DA830_DMACH_UART0_RX,
+ DA830_DMACH_UART0_TX,
+ DA830_DMACH_TMR64P0_EVTOUT12,
+ DA830_DMACH_TMR64P0_EVTOUT34,
+ DA830_DMACH_UART1_RX,
+ DA830_DMACH_UART1_TX,
+ DA830_DMACH_SPI0_RX,
+ DA830_DMACH_SPI0_TX,
+ DA830_DMACH_MMCSD_RX,
+ DA830_DMACH_MMCSD_TX,
+ DA830_DMACH_SPI1_RX,
+ DA830_DMACH_SPI1_TX,
+ DA830_DMACH_DMAX_EVTOUT6,
+ DA830_DMACH_DMAX_EVTOUT7,
+ DA830_DMACH_GPIO_BNK2INT,
+ DA830_DMACH_GPIO_BNK3INT,
+ DA830_DMACH_I2C0_RX,
+ DA830_DMACH_I2C0_TX,
+ DA830_DMACH_I2C1_RX,
+ DA830_DMACH_I2C1_TX,
+ DA830_DMACH_GPIO_BNK4INT,
+ DA830_DMACH_GPIO_BNK5INT,
+ DA830_DMACH_UART2_RX,
+ DA830_DMACH_UART2_TX
+};
+
/*ch_status paramater of callback function possible values*/
#define DMA_COMPLETE 1
#define DMA_CC_ERROR 2
@@ -194,8 +230,6 @@ enum sync_dimension {
#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
-#define EDMA_MAX_CC 2
-
/* alloc/free DMA channels and their dedicated parameter RAM slots */
int edma_alloc_channel(int channel,
void (*callback)(unsigned channel, u16 ch_status, void *data),
@@ -235,12 +269,6 @@ void edma_clear_event(unsigned channel);
void edma_pause(unsigned channel);
void edma_resume(unsigned channel);
-struct edma_rsv_info {
-
- const s16 (*rsv_chans)[2];
- const s16 (*rsv_slots)[2];
-};
-
/* platform_data for EDMA driver */
struct edma_soc_info {
@@ -250,18 +278,12 @@ struct edma_soc_info {
unsigned n_slot;
unsigned n_tc;
unsigned n_cc;
- /*
- * Default queue is expected to be a low-priority queue.
- * This way, long transfers on the default queue started
- * by the codec engine will not cause audio defects.
- */
enum dma_event_q default_queue;
- /* Resource reservation for other cores */
- struct edma_rsv_info *rsv;
-
+ const s8 (*rsv_chans)[2];
+ const s16 (*rsv_slots)[2];
const s8 (*queue_tc_mapping)[2];
- const s8 (*queue_priority_mapping)[2];
+ /*const*/ s8 (*queue_priority_mapping)[2];
};
#endif
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 16bb4229..044fce98 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -19,6 +19,12 @@
* and the chip/board init code should then explicitly include
* <chipname>.h
*/
+#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
+
+#ifndef __ASSEMBLER__
+extern void __iomem *davinci_sysmod_base;
+#define DAVINCI_SYSMODULE_VIRT(x) (davinci_sysmod_base + (x))
+#endif
/*
* I/O mapping
*/
@@ -30,4 +36,10 @@
#define __IO_ADDRESS(x) ((x) + IO_OFFSET)
#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
+#ifdef __ASSEMBLER__
+#define IOMEM(x) x
+#else
+#define IOMEM(x) ((void __force __iomem *)(x))
+#endif
+
#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 9e95b8a1..3274dc38 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -296,15 +296,121 @@ enum davinci_dm365_index {
DM365_CLKOUT2,
/* GPIO */
+ DM365_GPIO0,
+ DM365_GPIO1,
+ DM365_GPIO2,
+ DM365_GPIO3,
+ DM365_GPIO4,
+ DM365_GPIO5,
+ DM365_GPIO6,
+ DM365_GPIO7,
+ DM365_GPIO8,
+ DM365_GPIO9,
+ DM365_GPIO10,
+ DM365_GPIO11,
+ DM365_GPIO12,
+ DM365_GPIO13,
+ DM365_GPIO14,
+ DM365_GPIO15,
+ DM365_GPIO16,
+ DM365_GPIO17,
+ DM365_GPIO18,
+ DM365_GPIO19,
DM365_GPIO20,
+ DM365_GPIO21,
+ DM365_GPIO22,
+ DM365_GPIO23,
+ DM365_GPIO24,
+ DM365_GPIO25,
+ DM365_GPIO26,
+ DM365_GPIO27,
+ DM365_GPIO28,
+ DM365_GPIO29,
DM365_GPIO30,
DM365_GPIO31,
DM365_GPIO32,
DM365_GPIO33,
+ DM365_GPIO34,
+ DM365_GPIO35,
+ DM365_GPIO36,
+ DM365_GPIO37,
+ DM365_GPIO38,
+ DM365_GPIO39,
DM365_GPIO40,
+ DM365_GPIO41,
+ DM365_GPIO42,
+ DM365_GPIO43,
+ DM365_GPIO44,
+ DM365_GPIO45,
+ DM365_GPIO46,
+ DM365_GPIO47,
+ DM365_GPIO48,
+ DM365_GPIO49,
+ DM365_GPIO50,
+ DM365_GPIO51,
+ DM365_GPIO52,
+ DM365_GPIO53,
+ DM365_GPIO54,
+ DM365_GPIO55,
+ DM365_GPIO56,
+ DM365_GPIO57,
+ DM365_GPIO58,
+ DM365_GPIO59,
+ DM365_GPIO60,
+ DM365_GPIO61,
+ DM365_GPIO62,
+ DM365_GPIO63,
+ DM365_GPIO64,
+ DM365_GPIO65,
+ DM365_GPIO66,
+ DM365_GPIO67,
+ DM365_GPIO68,
+ DM365_GPIO69,
+ DM365_GPIO70,
+ DM365_GPIO71,
+ DM365_GPIO72,
+ DM365_GPIO73,
+ DM365_GPIO74,
+ DM365_GPIO75,
+ DM365_GPIO76,
+ DM365_GPIO77,
+ DM365_GPIO78,
+ DM365_GPIO79,
+ DM365_GPIO80,
+ DM365_GPIO81,
+ DM365_GPIO82,
+ DM365_GPIO83,
+ DM365_GPIO84,
+ DM365_GPIO85,
+ DM365_GPIO86,
+ DM365_GPIO87,
+ DM365_GPIO88,
+ DM365_GPIO89,
+ DM365_GPIO90,
+ DM365_GPIO91,
+ DM365_GPIO92,
+ DM365_GPIO93,
+ DM365_GPIO94,
+ DM365_GPIO95,
+ DM365_GPIO96,
+ DM365_GPIO97,
+ DM365_GPIO98,
+ DM365_GPIO99,
+ DM365_GPIO100,
+ DM365_GPIO101,
+ DM365_GPIO102,
+ DM365_GPIO103,
+
DM365_GPIO64_57,
+ /*rto*/
+ DM365_RTO0,
+ DM365_RTO1,
+ DM365_RTO2,
+ DM365_RTO3,
+
/* Video */
+ DM365_EXTCLK,
DM365_VOUT_FIELD,
DM365_VOUT_FIELD_G81,
DM365_VOUT_HVSYNC,
@@ -315,6 +421,8 @@ enum davinci_dm365_index {
DM365_VIN_CAM_HD,
DM365_VIN_YIN4_7_EN,
DM365_VIN_YIN0_3_EN,
+ DM365_CAM_RESET,
+ DM365_CAM_OFF,
/* IRQ muxing */
DM365_INT_EDMA_CC,
@@ -335,6 +443,9 @@ enum davinci_dm365_index {
DM365_INT_IMX1_DISABLE,
DM365_INT_NSF_ENABLE,
DM365_INT_NSF_DISABLE,
+ DM365_INT_VCIF_ENABLE,
+ DM365_INT_VCIF_DISABLE,
+ DM365_INT_SPI3,
/* EDMA event muxing */
DM365_EVT2_ASP_TX,
@@ -342,6 +453,8 @@ enum davinci_dm365_index {
DM365_EVT2_VC_TX,
DM365_EVT3_VC_RX,
DM365_EVT26_MMC0_RX,
+ DM365_EVT18_SPI3_TX,
+ DM365_EVT19_SPI3_RX,
};
enum da830_index {
diff --git a/arch/arm/mach-davinci/include/mach/rto.h b/arch/arm/mach-davinci/include/mach/rto.h
new file mode 100644
index 00000000..285991ad
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/rto.h
@@ -0,0 +1,35 @@
+#ifndef RTO_DAVINCI
+#define RTO_DAVINCI
+
+
+#define DAVINCI_RTO_PHIS 0x01C20C00
+typedef struct {
+ unsigned long id;
+ unsigned long ctrl_status;
+} davinci_rto;
+
+
+#define ENABLE_RTO (1<<0)
+#define SELECTBIT_RTO12 (0<<1)
+#define SELECTBIT_RTO34 (1<<1)
+#define DETECTBIT_MASK_RTO (3<<5)
+#define DETECTBIT_NE_RTO (0)
+#define DETECTBIT_RE_RTO (1<<5)
+#define DETECTBIT_FE_RTO (2<<5)
+#define DETECTBIT_BE_RTO (3<<5)
+#define OUTPUTEMODE_RTO_DIRECT (0<<7)
+#define OUTPUTEMODE_RTO_TOGGLE (1<<7)
+#define OPPATERNDATA_RTO0 (1<<8)
+#define OPPATERNDATA_RTO1 (1<<9)
+#define OPPATERNDATA_RTO2 (1<<10)
+#define OPPATERNDATA_RTO3 (1<<11)
+#define OPMASKDATA_RTO0 (1<<12)
+#define OPMASKDATA_RTO1 (1<<13)
+#define OPMASKDATA_RTO2 (1<<14)
+#define OPMASKDATA_RTO3 (1<<15)
+#define OVERRUN_RTO (1<<16)
+#define SOURCEPOLARITY_RTO (1<<17)
+
+
+
+#endif //RTO_DAVINCI
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 62ad3004..ed23ecc6 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -16,7 +16,8 @@
#include <mach/hardware.h>
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
-#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
+//#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
#define DA8XX_UART0_BASE (IO_PHYS + 0x042000)
diff --git a/arch/arm/mach-davinci/include/mach/time.h b/arch/arm/mach-davinci/include/mach/time.h
index 1c971d8d..e8f31c0f 100644
--- a/arch/arm/mach-davinci/include/mach/time.h
+++ b/arch/arm/mach-davinci/include/mach/time.h
@@ -13,6 +13,7 @@
#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
+#define DAVINCI_TIMER3_BASE (IO_PHYS + 0x20800)
#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
enum {
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index f34a8dcd..619315f9 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -55,7 +55,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
cfg = &soc_info->pinmux_pins[index];
if (cfg->name == NULL) {
- printk(KERN_ERR "No entry for the specified index\n");
+ printk(KERN_ERR "No entry for the specified index %d\n", index);
return -ENODEV;
}
diff --git a/arch/arm/mach-davinci/objcopy.sh b/arch/arm/mach-davinci/objcopy.sh
new file mode 100644
index 00000000..e92dca37
--- /dev/null
+++ b/arch/arm/mach-davinci/objcopy.sh
@@ -0,0 +1,3 @@
+export PATH=/opt/codesourcery/arm-2010q1/bin:./../uboot/tools:$PATH
+echo $PATH
+arm-none-linux-gnueabi-objdump -d serial.o > file.txt
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
deleted file mode 100644
index dc1a209b..00000000
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/*
- * Texas Instruments TNETV107X SoC Support
- *
- * Copyright (C) 2010 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/gpio.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/common.h>
-#include <mach/time.h>
-#include <mach/cputype.h>
-#include <mach/psc.h>
-#include <mach/cp_intc.h>
-#include <mach/irqs.h>
-#include <mach/hardware.h>
-#include <mach/tnetv107x.h>
-#include <mach/gpio-davinci.h>
-
-#include "clock.h"
-#include "mux.h"
-
-/* Base addresses for on-chip devices */
-#define TNETV107X_INTC_BASE 0x03000000
-#define TNETV107X_TIMER0_BASE 0x08086500
-#define TNETV107X_TIMER1_BASE 0x08086600
-#define TNETV107X_CHIP_CFG_BASE 0x08087000
-#define TNETV107X_GPIO_BASE 0x08088000
-#define TNETV107X_CLOCK_CONTROL_BASE 0x0808a000
-#define TNETV107X_PSC_BASE 0x0808b000
-
-/* Reference clock frequencies */
-#define OSC_FREQ_ONCHIP (24000 * 1000)
-#define OSC_FREQ_OFFCHIP_SYS (25000 * 1000)
-#define OSC_FREQ_OFFCHIP_ETH (25000 * 1000)
-#define OSC_FREQ_OFFCHIP_TDM (19200 * 1000)
-
-#define N_PLLS 3
-
-/* Clock Control Registers */
-struct clk_ctrl_regs {
- u32 pll_bypass;
- u32 _reserved0;
- u32 gem_lrst;
- u32 _reserved1;
- u32 pll_unlock_stat;
- u32 sys_unlock;
- u32 eth_unlock;
- u32 tdm_unlock;
-};
-
-/* SSPLL Registers */
-struct sspll_regs {
- u32 modes;
- u32 post_div;
- u32 pre_div;
- u32 mult_factor;
- u32 divider_range;
- u32 bw_divider;
- u32 spr_amount;
- u32 spr_rate_div;
- u32 diag;
-};
-
-/* Watchdog Timer Registers */
-struct wdt_regs {
- u32 kick_lock;
- u32 kick;
- u32 change_lock;
- u32 change ;
- u32 disable_lock;
- u32 disable;
- u32 prescale_lock;
- u32 prescale;
-};
-
-static struct clk_ctrl_regs __iomem *clk_ctrl_regs;
-
-static struct sspll_regs __iomem *sspll_regs[N_PLLS];
-static int sspll_regs_base[N_PLLS] = { 0x40, 0x80, 0xc0 };
-
-/* PLL bypass bit shifts in clk_ctrl_regs->pll_bypass register */
-static u32 bypass_mask[N_PLLS] = { BIT(0), BIT(2), BIT(1) };
-
-/* offchip (external) reference clock frequencies */
-static u32 pll_ext_freq[] = {
- OSC_FREQ_OFFCHIP_SYS,
- OSC_FREQ_OFFCHIP_TDM,
- OSC_FREQ_OFFCHIP_ETH
-};
-
-/* PSC control registers */
-static u32 psc_regs[] = { TNETV107X_PSC_BASE };
-
-/* Host map for interrupt controller */
-static u32 intc_host_map[] = { 0x01010000, 0x01010101, -1 };
-
-static unsigned long clk_sspll_recalc(struct clk *clk);
-
-/* Level 1 - the PLLs */
-#define define_pll_clk(cname, pll, divmask, base) \
- static struct pll_data pll_##cname##_data = { \
- .num = pll, \
- .div_ratio_mask = divmask, \
- .phys_base = base + \
- TNETV107X_CLOCK_CONTROL_BASE, \
- }; \
- static struct clk pll_##cname##_clk = { \
- .name = "pll_" #cname "_clk", \
- .pll_data = &pll_##cname##_data, \
- .flags = CLK_PLL, \
- .recalc = clk_sspll_recalc, \
- }
-
-define_pll_clk(sys, 0, 0x1ff, 0x600);
-define_pll_clk(tdm, 1, 0x0ff, 0x200);
-define_pll_clk(eth, 2, 0x0ff, 0x400);
-
-/* Level 2 - divided outputs from the PLLs */
-#define define_pll_div_clk(pll, cname, div) \
- static struct clk pll##_##cname##_clk = { \
- .name = #pll "_" #cname "_clk", \
- .parent = &pll_##pll##_clk, \
- .flags = CLK_PLL, \
- .div_reg = PLLDIV##div, \
- .set_rate = davinci_set_sysclk_rate, \
- }
-
-define_pll_div_clk(sys, arm1176, 1);
-define_pll_div_clk(sys, dsp, 2);
-define_pll_div_clk(sys, ddr, 3);
-define_pll_div_clk(sys, full, 4);
-define_pll_div_clk(sys, lcd, 5);
-define_pll_div_clk(sys, vlynq_ref, 6);
-define_pll_div_clk(sys, tsc, 7);
-define_pll_div_clk(sys, half, 8);
-
-define_pll_div_clk(eth, 5mhz, 1);
-define_pll_div_clk(eth, 50mhz, 2);
-define_pll_div_clk(eth, 125mhz, 3);
-define_pll_div_clk(eth, 250mhz, 4);
-define_pll_div_clk(eth, 25mhz, 5);
-
-define_pll_div_clk(tdm, 0, 1);
-define_pll_div_clk(tdm, extra, 2);
-define_pll_div_clk(tdm, 1, 3);
-
-
-/* Level 3 - LPSC gated clocks */
-#define __lpsc_clk(cname, _parent, mod, flg) \
- static struct clk clk_##cname = { \
- .name = #cname, \
- .parent = &_parent, \
- .lpsc = TNETV107X_LPSC_##mod,\
- .flags = flg, \
- }
-
-#define lpsc_clk_enabled(cname, parent, mod) \
- __lpsc_clk(cname, parent, mod, ALWAYS_ENABLED)
-
-#define lpsc_clk(cname, parent, mod) \
- __lpsc_clk(cname, parent, mod, 0)
-
-lpsc_clk_enabled(arm, sys_arm1176_clk, ARM);
-lpsc_clk_enabled(gem, sys_dsp_clk, GEM);
-lpsc_clk_enabled(ddr2_phy, sys_ddr_clk, DDR2_PHY);
-lpsc_clk_enabled(tpcc, sys_full_clk, TPCC);
-lpsc_clk_enabled(tptc0, sys_full_clk, TPTC0);
-lpsc_clk_enabled(tptc1, sys_full_clk, TPTC1);
-lpsc_clk_enabled(ram, sys_full_clk, RAM);
-lpsc_clk_enabled(aemif, sys_full_clk, AEMIF);
-lpsc_clk_enabled(chipcfg, sys_half_clk, CHIP_CFG);
-lpsc_clk_enabled(rom, sys_half_clk, ROM);
-lpsc_clk_enabled(secctl, sys_half_clk, SECCTL);
-lpsc_clk_enabled(keymgr, sys_half_clk, KEYMGR);
-lpsc_clk_enabled(gpio, sys_half_clk, GPIO);
-lpsc_clk_enabled(debugss, sys_half_clk, DEBUGSS);
-lpsc_clk_enabled(system, sys_half_clk, SYSTEM);
-lpsc_clk_enabled(ddr2_vrst, sys_ddr_clk, DDR2_EMIF1_VRST);
-lpsc_clk_enabled(ddr2_vctl_rst, sys_ddr_clk, DDR2_EMIF2_VCTL_RST);
-lpsc_clk_enabled(wdt_arm, sys_half_clk, WDT_ARM);
-lpsc_clk_enabled(timer1, sys_half_clk, TIMER1);
-
-lpsc_clk(mbx_lite, sys_arm1176_clk, MBX_LITE);
-lpsc_clk(ethss, eth_125mhz_clk, ETHSS);
-lpsc_clk(tsc, sys_tsc_clk, TSC);
-lpsc_clk(uart0, sys_half_clk, UART0);
-lpsc_clk(uart1, sys_half_clk, UART1);
-lpsc_clk(uart2, sys_half_clk, UART2);
-lpsc_clk(pktsec, sys_half_clk, PKTSEC);
-lpsc_clk(keypad, sys_half_clk, KEYPAD);
-lpsc_clk(mdio, sys_half_clk, MDIO);
-lpsc_clk(sdio0, sys_half_clk, SDIO0);
-lpsc_clk(sdio1, sys_half_clk, SDIO1);
-lpsc_clk(timer0, sys_half_clk, TIMER0);
-lpsc_clk(wdt_dsp, sys_half_clk, WDT_DSP);
-lpsc_clk(ssp, sys_half_clk, SSP);
-lpsc_clk(tdm0, tdm_0_clk, TDM0);
-lpsc_clk(tdm1, tdm_1_clk, TDM1);
-lpsc_clk(vlynq, sys_vlynq_ref_clk, VLYNQ);
-lpsc_clk(mcdma, sys_half_clk, MCDMA);
-lpsc_clk(usbss, sys_half_clk, USBSS);
-lpsc_clk(usb0, clk_usbss, USB0);
-lpsc_clk(usb1, clk_usbss, USB1);
-lpsc_clk(ethss_rgmii, eth_250mhz_clk, ETHSS_RGMII);
-lpsc_clk(imcop, sys_dsp_clk, IMCOP);
-lpsc_clk(spare, sys_half_clk, SPARE);
-
-/* LCD needs a full power down to clear controller state */
-__lpsc_clk(lcd, sys_lcd_clk, LCD, PSC_SWRSTDISABLE);
-
-
-/* Level 4 - leaf clocks for LPSC modules shared across drivers */
-static struct clk clk_rng = { .name = "rng", .parent = &clk_pktsec };
-static struct clk clk_pka = { .name = "pka", .parent = &clk_pktsec };
-
-static struct clk_lookup clks[] = {
- CLK(NULL, "pll_sys_clk", &pll_sys_clk),
- CLK(NULL, "pll_eth_clk", &pll_eth_clk),
- CLK(NULL, "pll_tdm_clk", &pll_tdm_clk),
- CLK(NULL, "sys_arm1176_clk", &sys_arm1176_clk),
- CLK(NULL, "sys_dsp_clk", &sys_dsp_clk),
- CLK(NULL, "sys_ddr_clk", &sys_ddr_clk),
- CLK(NULL, "sys_full_clk", &sys_full_clk),
- CLK(NULL, "sys_lcd_clk", &sys_lcd_clk),
- CLK(NULL, "sys_vlynq_ref_clk", &sys_vlynq_ref_clk),
- CLK(NULL, "sys_tsc_clk", &sys_tsc_clk),
- CLK(NULL, "sys_half_clk", &sys_half_clk),
- CLK(NULL, "eth_5mhz_clk", &eth_5mhz_clk),
- CLK(NULL, "eth_50mhz_clk", &eth_50mhz_clk),
- CLK(NULL, "eth_125mhz_clk", &eth_125mhz_clk),
- CLK(NULL, "eth_250mhz_clk", &eth_250mhz_clk),
- CLK(NULL, "eth_25mhz_clk", &eth_25mhz_clk),
- CLK(NULL, "tdm_0_clk", &tdm_0_clk),
- CLK(NULL, "tdm_extra_clk", &tdm_extra_clk),
- CLK(NULL, "tdm_1_clk", &tdm_1_clk),
- CLK(NULL, "clk_arm", &clk_arm),
- CLK(NULL, "clk_gem", &clk_gem),
- CLK(NULL, "clk_ddr2_phy", &clk_ddr2_phy),
- CLK(NULL, "clk_tpcc", &clk_tpcc),
- CLK(NULL, "clk_tptc0", &clk_tptc0),
- CLK(NULL, "clk_tptc1", &clk_tptc1),
- CLK(NULL, "clk_ram", &clk_ram),
- CLK(NULL, "clk_mbx_lite", &clk_mbx_lite),
- CLK("tnetv107x-fb.0", NULL, &clk_lcd),
- CLK(NULL, "clk_ethss", &clk_ethss),
- CLK(NULL, "aemif", &clk_aemif),
- CLK(NULL, "clk_chipcfg", &clk_chipcfg),
- CLK("tnetv107x-ts.0", NULL, &clk_tsc),
- CLK(NULL, "clk_rom", &clk_rom),
- CLK(NULL, "uart2", &clk_uart2),
- CLK(NULL, "clk_pktsec", &clk_pktsec),
- CLK("tnetv107x-rng.0", NULL, &clk_rng),
- CLK("tnetv107x-pka.0", NULL, &clk_pka),
- CLK(NULL, "clk_secctl", &clk_secctl),
- CLK(NULL, "clk_keymgr", &clk_keymgr),
- CLK("tnetv107x-keypad.0", NULL, &clk_keypad),
- CLK(NULL, "clk_gpio", &clk_gpio),
- CLK(NULL, "clk_mdio", &clk_mdio),
- CLK("davinci_mmc.0", NULL, &clk_sdio0),
- CLK(NULL, "uart0", &clk_uart0),
- CLK(NULL, "uart1", &clk_uart1),
- CLK(NULL, "timer0", &clk_timer0),
- CLK(NULL, "timer1", &clk_timer1),
- CLK("tnetv107x_wdt.0", NULL, &clk_wdt_arm),
- CLK(NULL, "clk_wdt_dsp", &clk_wdt_dsp),
- CLK("ti-ssp", NULL, &clk_ssp),
- CLK(NULL, "clk_tdm0", &clk_tdm0),
- CLK(NULL, "clk_vlynq", &clk_vlynq),
- CLK(NULL, "clk_mcdma", &clk_mcdma),
- CLK(NULL, "clk_usbss", &clk_usbss),
- CLK(NULL, "clk_usb0", &clk_usb0),
- CLK(NULL, "clk_usb1", &clk_usb1),
- CLK(NULL, "clk_tdm1", &clk_tdm1),
- CLK(NULL, "clk_debugss", &clk_debugss),
- CLK(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii),
- CLK(NULL, "clk_system", &clk_system),
- CLK(NULL, "clk_imcop", &clk_imcop),
- CLK(NULL, "clk_spare", &clk_spare),
- CLK("davinci_mmc.1", NULL, &clk_sdio1),
- CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst),
- CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst),
- CLK(NULL, NULL, NULL),
-};
-
-static const struct mux_config pins[] = {
-#ifdef CONFIG_DAVINCI_MUX
- MUX_CFG(TNETV107X, ASR_A00, 0, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO32, 0, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A01, 0, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO33, 0, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A02, 0, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO34, 0, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A03, 0, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO35, 0, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A04, 0, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO36, 0, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A05, 0, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO37, 0, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A06, 1, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO38, 1, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A07, 1, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO39, 1, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A08, 1, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO40, 1, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A09, 1, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO41, 1, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A10, 1, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO42, 1, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A11, 1, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, BOOT_STRP_0, 1, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A12, 2, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, BOOT_STRP_1, 2, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A13, 2, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO43, 2, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A14, 2, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO44, 2, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A15, 2, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO45, 2, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A16, 2, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO46, 2, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A17, 2, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO47, 2, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_A18, 3, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO48, 3, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO1_DATA3_0, 3, 0, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_A19, 3, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO49, 3, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO1_DATA2_0, 3, 5, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_A20, 3, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO50, 3, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO1_DATA1_0, 3, 10, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_A21, 3, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO51, 3, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO1_DATA0_0, 3, 15, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_A22, 3, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO52, 3, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO1_CMD_0, 3, 20, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_A23, 3, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO53, 3, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO1_CLK_0, 3, 25, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_BA_1, 4, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO54, 4, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SYS_PLL_CLK, 4, 0, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_CS0, 4, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, ASR_CS1, 4, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, ASR_CS2, 4, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM_PLL_CLK, 4, 15, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_CS3, 4, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, ETH_PHY_CLK, 4, 20, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, ASR_D00, 4, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO55, 4, 25, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D01, 5, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO56, 5, 0, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D02, 5, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO57, 5, 5, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D03, 5, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO58, 5, 10, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D04, 5, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO59_0, 5, 15, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D05, 5, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO60_0, 5, 20, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D06, 5, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO61_0, 5, 25, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D07, 6, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO62_0, 6, 0, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D08, 6, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO63_0, 6, 5, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D09, 6, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO64_0, 6, 10, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D10, 6, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SDIO1_DATA3_1, 6, 15, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D11, 6, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SDIO1_DATA2_1, 6, 20, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D12, 6, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SDIO1_DATA1_1, 6, 25, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D13, 7, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SDIO1_DATA0_1, 7, 0, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D14, 7, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SDIO1_CMD_1, 7, 5, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_D15, 7, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SDIO1_CLK_1, 7, 10, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_OE, 7, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, BOOT_STRP_2, 7, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_RNW, 7, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO29_0, 7, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_WAIT, 7, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO30_0, 7, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_WE, 8, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, BOOT_STRP_3, 8, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, ASR_WE_DQM0, 8, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO31, 8, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD17_0, 8, 5, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, ASR_WE_DQM1, 8, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, ASR_BA0_0, 8, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, VLYNQ_CLK, 9, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO14, 9, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD19_0, 9, 0, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, VLYNQ_RXD0, 9, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO15, 9, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD20_0, 9, 5, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, VLYNQ_RXD1, 9, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO16, 9, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD21_0, 9, 10, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, VLYNQ_TXD0, 9, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO17, 9, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD22_0, 9, 15, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, VLYNQ_TXD1, 9, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO18, 9, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD23_0, 9, 20, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, SDIO0_CLK, 10, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO19, 10, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO0_CMD, 10, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO20, 10, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO0_DATA0, 10, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO21, 10, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO0_DATA1, 10, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO22, 10, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO0_DATA2, 10, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO23, 10, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SDIO0_DATA3, 10, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO24, 10, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, EMU0, 11, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, EMU1, 11, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, RTCK, 12, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TRST_N, 12, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TCK, 12, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDI, 12, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDO, 12, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TMS, 12, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM1_CLK, 13, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM1_RX, 13, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM1_TX, 13, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM1_FS, 13, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R0, 14, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R1, 14, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R2, 14, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R3, 14, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R4, 14, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R5, 14, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_R6, 15, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO12, 15, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, KEYPAD_R7, 15, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO10, 15, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, KEYPAD_C0, 15, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_C1, 15, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_C2, 15, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_C3, 15, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_C4, 16, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_C5, 16, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, KEYPAD_C6, 16, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO13, 16, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, TEST_CLK_IN, 16, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, KEYPAD_C7, 16, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO11, 16, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, SSP0_0, 17, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SCC_DCLK, 17, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD20_1, 17, 0, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP0_1, 17, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SCC_CS_N, 17, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD21_1, 17, 5, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP0_2, 17, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SCC_D, 17, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD22_1, 17, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP0_3, 17, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, SCC_RESETN, 17, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, LCD_PD23_1, 17, 15, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP1_0, 18, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO25, 18, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, UART2_CTS, 18, 0, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP1_1, 18, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO26, 18, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, UART2_RD, 18, 5, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP1_2, 18, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO27, 18, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, UART2_RTS, 18, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, SSP1_3, 18, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO28, 18, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, UART2_TD, 18, 15, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, UART0_CTS, 19, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, UART0_RD, 19, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, UART0_RTS, 19, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, UART0_TD, 19, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, UART1_RD, 19, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, UART1_TD, 19, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_AC_NCS, 20, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_HSYNC_RNW, 20, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_VSYNC_A0, 20, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_MCLK, 20, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD16_0, 20, 15, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PCLK_E, 20, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD00, 20, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD01, 21, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD02, 21, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD03, 21, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD04, 21, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD05, 21, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD06, 21, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD07, 22, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD08, 22, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO59_1, 22, 5, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD09, 22, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO60_1, 22, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD10, 22, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, ASR_BA0_1, 22, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, GPIO61_1, 22, 15, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD11, 22, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO62_1, 22, 20, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD12, 22, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO63_1, 22, 25, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD13, 23, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO64_1, 23, 0, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD14, 23, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO29_1, 23, 5, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, LCD_PD15, 23, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO30_1, 23, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, EINT0, 24, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO08, 24, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, EINT1, 24, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, GPIO09, 24, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, GPIO00, 24, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD20_2, 24, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, TDM_CLK_IN_2, 24, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, GPIO01, 24, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD21_2, 24, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, 24M_CLK_OUT_1, 24, 15, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, GPIO02, 24, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD22_2, 24, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, GPIO03, 24, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD23_2, 24, 25, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, GPIO04, 25, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD16_1, 25, 0, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, USB0_RXERR, 25, 0, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, GPIO05, 25, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD17_1, 25, 5, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, TDM_CLK_IN_1, 25, 5, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, GPIO06, 25, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD18, 25, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, 24M_CLK_OUT_2, 25, 10, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, GPIO07, 25, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, LCD_PD19_1, 25, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, USB1_RXERR, 25, 15, 0x1f, 0x0c, false)
- MUX_CFG(TNETV107X, ETH_PLL_CLK, 25, 15, 0x1f, 0x1c, false)
- MUX_CFG(TNETV107X, MDIO, 26, 0, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, MDC, 26, 5, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, AIC_MUTE_STAT_N, 26, 10, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM0_CLK, 26, 10, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, AIC_HNS_EN_N, 26, 15, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM0_FS, 26, 15, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, AIC_HDS_EN_STAT_N, 26, 20, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM0_TX, 26, 20, 0x1f, 0x04, false)
- MUX_CFG(TNETV107X, AIC_HNF_EN_STAT_N, 26, 25, 0x1f, 0x00, false)
- MUX_CFG(TNETV107X, TDM0_RX, 26, 25, 0x1f, 0x04, false)
-#endif
-};
-
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 irq_prios[TNETV107X_N_CP_INTC_IRQ] = {
- /* fill in default priority 7 */
- [0 ... (TNETV107X_N_CP_INTC_IRQ - 1)] = 7,
- /* now override as needed, e.g. [xxx] = 5 */
-};
-
-/* Contents of JTAG ID register used to identify exact cpu type */
-static struct davinci_id ids[] = {
- {
- .variant = 0x0,
- .part_no = 0xb8a1,
- .manufacturer = 0x017,
- .cpu_id = DAVINCI_CPU_ID_TNETV107X,
- .name = "tnetv107x rev 1.0",
- },
- {
- .variant = 0x1,
- .part_no = 0xb8a1,
- .manufacturer = 0x017,
- .cpu_id = DAVINCI_CPU_ID_TNETV107X,
- .name = "tnetv107x rev 1.1/1.2",
- },
-};
-
-static struct davinci_timer_instance timer_instance[2] = {
- {
- .base = TNETV107X_TIMER0_BASE,
- .bottom_irq = IRQ_TNETV107X_TIMER_0_TINT12,
- .top_irq = IRQ_TNETV107X_TIMER_0_TINT34,
- },
- {
- .base = TNETV107X_TIMER1_BASE,
- .bottom_irq = IRQ_TNETV107X_TIMER_1_TINT12,
- .top_irq = IRQ_TNETV107X_TIMER_1_TINT34,
- },
-};
-
-static struct davinci_timer_info timer_info = {
- .timers = timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
-};
-
-/*
- * TNETV107X platforms do not use the static mappings from Davinci
- * IO_PHYS/IO_VIRT. This SOC's interesting MMRs are at different addresses,
- * and changing IO_PHYS would break away from existing Davinci SOCs.
- *
- * The primary impact of the current model is that IO_ADDRESS() is not to be
- * used to map registers on TNETV107X.
- *
- * 1. The first chunk is for INTC: This needs to be mapped in via iotable
- * because ioremap() does not seem to be operational at the time when
- * irqs are initialized. Without this, consistent dma init bombs.
- *
- * 2. The second chunk maps in register areas that need to be populated into
- * davinci_soc_info. Note that alignment restrictions come into play if
- * low-level debug is enabled (see note in <mach/tnetv107x.h>).
- */
-static struct map_desc io_desc[] = {
- { /* INTC */
- .virtual = IO_VIRT,
- .pfn = __phys_to_pfn(TNETV107X_INTC_BASE),
- .length = SZ_16K,
- .type = MT_DEVICE
- },
- { /* Most of the rest */
- .virtual = TNETV107X_IO_VIRT,
- .pfn = __phys_to_pfn(TNETV107X_IO_BASE),
- .length = IO_SIZE - SZ_1M,
- .type = MT_DEVICE
- },
-};
-
-static unsigned long clk_sspll_recalc(struct clk *clk)
-{
- int pll;
- unsigned long mult = 0, prediv = 1, postdiv = 1;
- unsigned long ref = OSC_FREQ_ONCHIP, ret;
- u32 tmp;
-
- if (WARN_ON(!clk->pll_data))
- return clk->rate;
-
- if (!clk_ctrl_regs) {
- void __iomem *tmp;
-
- tmp = ioremap(TNETV107X_CLOCK_CONTROL_BASE, SZ_4K);
-
- if (WARN(!tmp, "failed ioremap for clock control regs\n"))
- return clk->parent ? clk->parent->rate : 0;
-
- for (pll = 0; pll < N_PLLS; pll++)
- sspll_regs[pll] = tmp + sspll_regs_base[pll];
-
- clk_ctrl_regs = tmp;
- }
-
- pll = clk->pll_data->num;
-
- tmp = __raw_readl(&clk_ctrl_regs->pll_bypass);
- if (!(tmp & bypass_mask[pll])) {
- mult = __raw_readl(&sspll_regs[pll]->mult_factor);
- prediv = __raw_readl(&sspll_regs[pll]->pre_div) + 1;
- postdiv = __raw_readl(&sspll_regs[pll]->post_div) + 1;
- }
-
- tmp = __raw_readl(clk->pll_data->base + PLLCTL);
- if (tmp & PLLCTL_CLKMODE)
- ref = pll_ext_freq[pll];
-
- clk->pll_data->input_rate = ref;
-
- tmp = __raw_readl(clk->pll_data->base + PLLCTL);
- if (!(tmp & PLLCTL_PLLEN))
- return ref;
-
- ret = ref;
- if (mult)
- ret += ((unsigned long long)ref * mult) / 256;
-
- ret /= (prediv * postdiv);
-
- return ret;
-}
-
-static void tnetv107x_watchdog_reset(struct platform_device *pdev)
-{
- struct wdt_regs __iomem *regs;
-
- regs = ioremap(pdev->resource[0].start, SZ_4K);
-
- /* disable watchdog */
- __raw_writel(0x7777, &regs->disable_lock);
- __raw_writel(0xcccc, &regs->disable_lock);
- __raw_writel(0xdddd, &regs->disable_lock);
- __raw_writel(0, &regs->disable);
-
- /* program prescale */
- __raw_writel(0x5a5a, &regs->prescale_lock);
- __raw_writel(0xa5a5, &regs->prescale_lock);
- __raw_writel(0, &regs->prescale);
-
- /* program countdown */
- __raw_writel(0x6666, &regs->change_lock);
- __raw_writel(0xbbbb, &regs->change_lock);
- __raw_writel(1, &regs->change);
-
- /* enable watchdog */
- __raw_writel(0x7777, &regs->disable_lock);
- __raw_writel(0xcccc, &regs->disable_lock);
- __raw_writel(0xdddd, &regs->disable_lock);
- __raw_writel(1, &regs->disable);
-
- /* kick */
- __raw_writel(0x5555, &regs->kick_lock);
- __raw_writel(0xaaaa, &regs->kick_lock);
- __raw_writel(1, &regs->kick);
-}
-
-void tnetv107x_restart(char mode, const char *cmd)
-{
- tnetv107x_watchdog_reset(&tnetv107x_wdt_device);
-}
-
-static struct davinci_soc_info tnetv107x_soc_info = {
- .io_desc = io_desc,
- .io_desc_num = ARRAY_SIZE(io_desc),
- .ids = ids,
- .ids_num = ARRAY_SIZE(ids),
- .jtag_id_reg = TNETV107X_CHIP_CFG_BASE + 0x018,
- .cpu_clks = clks,
- .psc_bases = psc_regs,
- .psc_bases_num = ARRAY_SIZE(psc_regs),
- .pinmux_base = TNETV107X_CHIP_CFG_BASE + 0x150,
- .pinmux_pins = pins,
- .pinmux_pins_num = ARRAY_SIZE(pins),
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
- .intc_base = TNETV107X_INTC_BASE,
- .intc_irq_prios = irq_prios,
- .intc_irq_num = TNETV107X_N_CP_INTC_IRQ,
- .intc_host_map = intc_host_map,
- .gpio_base = TNETV107X_GPIO_BASE,
- .gpio_type = GPIO_TYPE_TNETV107X,
- .gpio_num = TNETV107X_N_GPIO,
- .timer_info = &timer_info,
- .serial_dev = &tnetv107x_serial_device,
-};
-
-void __init tnetv107x_init(void)
-{
- davinci_common_init(&tnetv107x_soc_info);
-}
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 34509ffb..b783b92e 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -17,7 +17,7 @@
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
-#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
+#if 1
static struct musb_hdrc_eps_bits musb_eps[] = {
{ "ep1_tx", 8, },
{ "ep1_rx", 8, },
@@ -40,10 +40,16 @@ static struct musb_hdrc_config musb_config = {
.ram_bits = 10,
.eps_bits = musb_eps,
};
-
+#define CONFIG_USB_MUSB_OTG
static struct musb_hdrc_platform_data usb_data = {
+#if defined(CONFIG_USB_MUSB_OTG)
/* OTG requires a Mini-AB connector */
.mode = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
+ .mode = MUSB_PERIPHERAL,
+#elif defined(CONFIG_USB_MUSB_HOST)
+ .mode = MUSB_HOST,
+#endif
.clock = "usb",
.config = &musb_config,
};
@@ -96,47 +102,12 @@ void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms)
platform_device_register(&usb_dev);
}
-#ifdef CONFIG_ARCH_DAVINCI_DA8XX
-static struct resource da8xx_usb20_resources[] = {
- {
- .start = DA8XX_USB0_BASE,
- .end = DA8XX_USB0_BASE + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = IRQ_DA8XX_USB_INT,
- .flags = IORESOURCE_IRQ,
- .name = "mc",
- },
-};
-
-int __init da8xx_register_usb20(unsigned mA, unsigned potpgt)
-{
- usb_data.clock = "usb20";
- usb_data.power = mA > 510 ? 255 : mA / 2;
- usb_data.potpgt = (potpgt + 1) / 2;
-
- usb_dev.resource = da8xx_usb20_resources;
- usb_dev.num_resources = ARRAY_SIZE(da8xx_usb20_resources);
- usb_dev.name = "musb-da8xx";
-
- return platform_device_register(&usb_dev);
-}
-#endif /* CONFIG_DAVINCI_DA8XX */
-
#else
void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms)
{
}
-#ifdef CONFIG_ARCH_DAVINCI_DA8XX
-int __init da8xx_register_usb20(unsigned mA, unsigned potpgt)
-{
- return 0;
-}
-#endif
-
#endif /* CONFIG_USB_MUSB_HDRC */
#ifdef CONFIG_ARCH_DAVINCI_DA8XX
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 4045c493..025d1732 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
depends on !MMU
select CPU_32v4T
select CPU_ABRT_LV4T
- select CPU_CACHE_V4
+ select CPU_CACHE_V3 # although the core is v4t
select CPU_CP15_MPU
select CPU_PABRT_LEGACY
help
@@ -469,6 +469,9 @@ config CPU_PABRT_V7
bool
# The cache model
+config CPU_CACHE_V3
+ bool
+
config CPU_CACHE_V4
bool
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 9e51be96..4e333fa2 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
+obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 48bc3c0a..dd3d5912 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -343,7 +343,6 @@ void __init feroceon_l2_init(int __l2_wt_override)
outer_cache.inv_range = feroceon_l2_inv_range;
outer_cache.clean_range = feroceon_l2_clean_range;
outer_cache.flush_range = feroceon_l2_flush_range;
- outer_cache.inv_all = l2_inv_all;
enable_l2();
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
new file mode 100644
index 00000000..8a3fadec
--- /dev/null
+++ b/arch/arm/mm/cache-v3.S
@@ -0,0 +1,137 @@
+/*
+ * linux/arch/arm/mm/cache-v3.S
+ *
+ * Copyright (C) 1997-2002 Russell king
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/page.h>
+#include "proc-macros.S"
+
+/*
+ * flush_icache_all()
+ *
+ * Unconditionally clean and invalidate the entire icache.
+ */
+ENTRY(v3_flush_icache_all)
+ mov pc, lr
+ENDPROC(v3_flush_icache_all)
+
+/*
+ * flush_user_cache_all()
+ *
+ * Invalidate all cache entries in a particular address
+ * space.
+ *
+ * - mm - mm_struct describing address space
+ */
+ENTRY(v3_flush_user_cache_all)
+ /* FALLTHROUGH */
+/*
+ * flush_kern_cache_all()
+ *
+ * Clean and invalidate the entire cache.
+ */
+ENTRY(v3_flush_kern_cache_all)
+ /* FALLTHROUGH */
+
+/*
+ * flush_user_cache_range(start, end, flags)
+ *
+ * Invalidate a range of cache entries in the specified
+ * address space.
+ *
+ * - start - start address (may not be aligned)
+ * - end - end address (exclusive, may not be aligned)
+ * - flags - vma_area_struct flags describing address space
+ */
+ENTRY(v3_flush_user_cache_range)
+ mov ip, #0
+ mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
+ mov pc, lr
+
+/*
+ * coherent_kern_range(start, end)
+ *
+ * Ensure coherency between the Icache and the Dcache in the
+ * region described by start. If you have non-snooping
+ * Harvard caches, you need to implement this function.
+ *
+ * - start - virtual start address
+ * - end - virtual end address
+ */
+ENTRY(v3_coherent_kern_range)
+ /* FALLTHROUGH */
+
+/*
+ * coherent_user_range(start, end)
+ *
+ * Ensure coherency between the Icache and the Dcache in the
+ * region described by start. If you have non-snooping
+ * Harvard caches, you need to implement this function.
+ *
+ * - start - virtual start address
+ * - end - virtual end address
+ */
+ENTRY(v3_coherent_user_range)
+ mov r0, #0
+ mov pc, lr
+
+/*
+ * flush_kern_dcache_area(void *page, size_t size)
+ *
+ * Ensure no D cache aliasing occurs, either with itself or
+ * the I cache
+ *
+ * - addr - kernel address
+ * - size - region size
+ */
+ENTRY(v3_flush_kern_dcache_area)
+ /* FALLTHROUGH */
+
+/*
+ * dma_flush_range(start, end)
+ *
+ * Clean and invalidate the specified virtual address range.
+ *
+ * - start - virtual start address
+ * - end - virtual end address
+ */
+ENTRY(v3_dma_flush_range)
+ mov r0, #0
+ mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
+ mov pc, lr
+
+/*
+ * dma_unmap_area(start, size, dir)
+ * - start - kernel virtual start address
+ * - size - size of region
+ * - dir - DMA direction
+ */
+ENTRY(v3_dma_unmap_area)
+ teq r2, #DMA_TO_DEVICE
+ bne v3_dma_flush_range
+ /* FALLTHROUGH */
+
+/*
+ * dma_map_area(start, size, dir)
+ * - start - kernel virtual start address
+ * - size - size of region
+ * - dir - DMA direction
+ */
+ENTRY(v3_dma_map_area)
+ mov pc, lr
+ENDPROC(v3_dma_unmap_area)
+ENDPROC(v3_dma_map_area)
+
+ .globl v3_flush_kern_cache_louis
+ .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
+
+ __INITDATA
+
+ @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
+ define_cache_functions v3
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index a7ba68f5..43e5d77b 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all)
ENTRY(v4_flush_user_cache_range)
#ifdef CONFIG_CPU_CP15
mov ip, #0
- mcr p15, 0, ip, c7, c7, 0 @ flush ID cache
+ mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache
mov pc, lr
#else
/* FALLTHROUGH */
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index a84ff763..78978945 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -34,7 +34,6 @@
#include <asm/mach/pci.h>
#include "mm.h"
-#include "tcm.h"
/*
* empty_zero_page is a special page that is used for
@@ -1278,7 +1277,6 @@ void __init paging_init(struct machine_desc *mdesc)
dma_contiguous_remap();
devicemaps_init(mdesc);
kmap_init();
- tcm_init();
top_pmd = pmd_off_k(0xffff0000);
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index fde2d2a7..dc5de5d5 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -77,27 +77,24 @@ __arm740_setup:
mcr p15, 0, r0, c6, c0 @ set area 0, default
ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
- ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
- mov r4, #10 @ 11 is the minimum (4KB)
-1: add r4, r4, #1 @ area size *= 2
- movs r3, r3, lsr #1
+ ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
+ mov r2, #10 @ 11 is the minimum (4KB)
+1: add r2, r2, #1 @ area size *= 2
+ mov r1, r1, lsr #1
bne 1b @ count not zero r-shift
- orr r0, r0, r4, lsl #1 @ the area register value
+ orr r0, r0, r2, lsl #1 @ the area register value
orr r0, r0, #1 @ set enable bit
mcr p15, 0, r0, c6, c1 @ set area 1, RAM
ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
- ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
- cmp r3, #0
- moveq r0, #0
- beq 2f
- mov r4, #10 @ 11 is the minimum (4KB)
-1: add r4, r4, #1 @ area size *= 2
- movs r3, r3, lsr #1
+ ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
+ mov r2, #10 @ 11 is the minimum (4KB)
+1: add r2, r2, #1 @ area size *= 2
+ mov r1, r1, lsr #1
bne 1b @ count not zero r-shift
- orr r0, r0, r4, lsl #1 @ the area register value
+ orr r0, r0, r2, lsl #1 @ the area register value
orr r0, r0, #1 @ set enable bit
-2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
+ mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
mov r0, #0x06
mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
@@ -140,14 +137,13 @@ __arm740_proc_info:
.long 0x41807400
.long 0xfffffff0
.long 0
- .long 0
b __arm740_setup
.long cpu_arch_name
.long cpu_elf_name
- .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
+ .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
.long cpu_arm740_name
.long arm740_processor_functions
.long 0
.long 0
- .long v4_cache_fns @ cache model
+ .long v3_cache_fns @ cache model
.size __arm740_proc_info, . - __arm740_proc_info
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2556cf1c..2c3b9421 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext)
/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
.globl cpu_arm920_suspend_size
.equ cpu_arm920_suspend_size, 4 * 3
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_arm920_do_suspend)
stmfd sp!, {r4 - r6, lr}
mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 344c8a54..f1803f7e 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -402,7 +402,7 @@ ENTRY(cpu_arm926_set_pte_ext)
/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
.globl cpu_arm926_suspend_size
.equ cpu_arm926_suspend_size, 4 * 3
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_arm926_do_suspend)
stmfd sp!, {r4 - r6, lr}
mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 0b60dd3d..82f9cdc7 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -350,7 +350,7 @@ ENTRY(cpu_mohawk_set_pte_ext)
.globl cpu_mohawk_suspend_size
.equ cpu_mohawk_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_mohawk_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index d92dfd08..3aa0da11 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -172,7 +172,7 @@ ENTRY(cpu_sa1100_set_pte_ext)
.globl cpu_sa1100_suspend_size
.equ cpu_sa1100_suspend_size, 4 * 3
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_sa1100_do_suspend)
stmfd sp!, {r4 - r6, lr}
mrc p15, 0, r4, c3, c0, 0 @ domain ID
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 054b491f..3e6210b4 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -17,9 +17,7 @@
#ifndef MULTI_CPU
EXPORT_SYMBOL(cpu_dcache_clean_area);
-#ifdef CONFIG_MMU
EXPORT_SYMBOL(cpu_set_pte_ext);
-#endif
#else
EXPORT_SYMBOL(processor);
#endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 5c07ee4f..bcaaa8de 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -138,7 +138,7 @@ ENTRY(cpu_v6_set_pte_ext)
/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
.globl cpu_v6_suspend_size
.equ cpu_v6_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_v6_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index e8efd83b..eb93d648 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -413,7 +413,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
.globl cpu_xsc3_suspend_size
.equ cpu_xsc3_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_xsc3_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index e766f889..25510361 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -528,7 +528,7 @@ ENTRY(cpu_xscale_set_pte_ext)
.globl cpu_xscale_suspend_size
.equ cpu_xscale_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_xscale_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 831e1fdf..9bf20c11 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -348,7 +348,7 @@ w90p950evb MACH_W90P950EVB W90P950EVB 1923
w90n960evb MACH_W90N960EVB W90N960EVB 1924
mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932
ncp MACH_NCP NCP 1933
-davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939
+davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 2649
centro MACH_CENTRO CENTRO 1944
nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955
omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967
diff --git a/block/blk-core.c b/block/blk-core.c
index 7c288358..074b758e 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -39,7 +39,6 @@
EXPORT_TRACEPOINT_SYMBOL_GPL(block_bio_remap);
EXPORT_TRACEPOINT_SYMBOL_GPL(block_rq_remap);
-EXPORT_TRACEPOINT_SYMBOL_GPL(block_bio_complete);
EXPORT_TRACEPOINT_SYMBOL_GPL(block_unplug);
DEFINE_IDA(blk_queue_ida);
diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c
index 5efc5a64..6206a934 100644
--- a/block/blk-sysfs.c
+++ b/block/blk-sysfs.c
@@ -229,8 +229,6 @@ queue_store_##name(struct request_queue *q, const char *page, size_t count) \
unsigned long val; \
ssize_t ret; \
ret = queue_var_store(&val, page, count); \
- if (ret < 0) \
- return ret; \
if (neg) \
val = !val; \
\
diff --git a/block/partition-generic.c b/block/partition-generic.c
index 789cdea0..ae95ee6a 100644
--- a/block/partition-generic.c
+++ b/block/partition-generic.c
@@ -257,6 +257,7 @@ void delete_partition(struct gendisk *disk, int partno)
hd_struct_put(part);
}
+EXPORT_SYMBOL(delete_partition);
static ssize_t whole_disk_show(struct device *dev,
struct device_attribute *attr, char *buf)
diff --git a/crypto/algif_hash.c b/crypto/algif_hash.c
index 0262210c..ef5356cd 100644
--- a/crypto/algif_hash.c
+++ b/crypto/algif_hash.c
@@ -161,8 +161,6 @@ static int hash_recvmsg(struct kiocb *unused, struct socket *sock,
else if (len < ds)
msg->msg_flags |= MSG_TRUNC;
- msg->msg_namelen = 0;
-
lock_sock(sk);
if (ctx->more) {
ctx->more = 0;
diff --git a/crypto/algif_skcipher.c b/crypto/algif_skcipher.c
index a1c4f0a5..6a6dfc06 100644
--- a/crypto/algif_skcipher.c
+++ b/crypto/algif_skcipher.c
@@ -432,7 +432,6 @@ static int skcipher_recvmsg(struct kiocb *unused, struct socket *sock,
long copied = 0;
lock_sock(sk);
- msg->msg_namelen = 0;
for (iov = msg->msg_iov, iovlen = msg->msg_iovlen; iovlen > 0;
iovlen--, iov++) {
unsigned long seglen = iov->iov_len;
diff --git a/crypto/gcm.c b/crypto/gcm.c
index 13ccbda3..137ad1ec 100644
--- a/crypto/gcm.c
+++ b/crypto/gcm.c
@@ -44,7 +44,6 @@ struct crypto_rfc4543_ctx {
struct crypto_rfc4543_req_ctx {
u8 auth_tag[16];
- u8 assocbuf[32];
struct scatterlist cipher[1];
struct scatterlist payload[2];
struct scatterlist assoc[2];
@@ -1134,19 +1133,9 @@ static struct aead_request *crypto_rfc4543_crypt(struct aead_request *req,
scatterwalk_crypto_chain(payload, dst, vdst == req->iv + 8, 2);
assoclen += 8 + req->cryptlen - (enc ? 0 : authsize);
- if (req->assoc->length == req->assoclen) {
- sg_init_table(assoc, 2);
- sg_set_page(assoc, sg_page(req->assoc), req->assoc->length,
- req->assoc->offset);
- } else {
- BUG_ON(req->assoclen > sizeof(rctx->assocbuf));
-
- scatterwalk_map_and_copy(rctx->assocbuf, req->assoc, 0,
- req->assoclen, 0);
-
- sg_init_table(assoc, 2);
- sg_set_buf(assoc, rctx->assocbuf, req->assoclen);
- }
+ sg_init_table(assoc, 2);
+ sg_set_page(assoc, sg_page(req->assoc), req->assoc->length,
+ req->assoc->offset);
scatterwalk_crypto_chain(assoc, payload, 0, 2);
aead_request_set_tfm(subreq, ctx->child);
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 2f48123d..ffdd32d2 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -150,7 +150,6 @@ enum piix_controller_ids {
tolapai_sata,
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
ich8_sata_snb,
- ich8_2port_sata_snb,
};
struct piix_map_db {
@@ -305,7 +304,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* SATA Controller IDE (Lynx Point) */
{ 0x8086, 0x8c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
/* SATA Controller IDE (Lynx Point) */
- { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
+ { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (Lynx Point) */
{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (Lynx Point-LP) */
@@ -440,7 +439,6 @@ static const struct piix_map_db *piix_map_db_table[] = {
[ich8m_apple_sata] = &ich8m_apple_map_db,
[tolapai_sata] = &tolapai_map_db,
[ich8_sata_snb] = &ich8_map_db,
- [ich8_2port_sata_snb] = &ich8_2port_map_db,
};
static struct pci_bits piix_enable_bits[] = {
@@ -1244,16 +1242,6 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
-
- [ich8_2port_sata_snb] =
- {
- .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR
- | PIIX_FLAG_PIO16,
- .pio_mask = ATA_PIO4,
- .mwdma_mask = ATA_MWDMA2,
- .udma_mask = ATA_UDMA6,
- .port_ops = &piix_sata_ops,
- },
};
#define AHCI_PCI_BAR 5
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 63c743ba..497adea1 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -2329,7 +2329,7 @@ int ata_dev_configure(struct ata_device *dev)
* from SATA Settings page of Identify Device Data Log.
*/
if (ata_id_has_devslp(dev->id)) {
- u8 *sata_setting = ap->sector_buf;
+ u8 sata_setting[ATA_SECT_SIZE];
int i, j;
dev->flags |= ATA_DFLAG_DEVSLP;
@@ -2439,9 +2439,6 @@ int ata_dev_configure(struct ata_device *dev)
dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
dev->max_sectors);
- if (dev->horkage & ATA_HORKAGE_MAX_SEC_LBA48)
- dev->max_sectors = ATA_MAX_SECTORS_LBA48;
-
if (ap->ops->dev_config)
ap->ops->dev_config(dev);
@@ -4103,7 +4100,6 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
/* Weird ATAPI devices */
{ "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
{ "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
- { "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
/* Devices we expect to fail diagnostics */
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index ff44787e..318b4135 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -532,8 +532,8 @@ int ata_cmd_ioctl(struct scsi_device *scsidev, void __user *arg)
struct scsi_sense_hdr sshdr;
scsi_normalize_sense(sensebuf, SCSI_SENSE_BUFFERSIZE,
&sshdr);
- if (sshdr.sense_key == RECOVERED_ERROR &&
- sshdr.asc == 0 && sshdr.ascq == 0x1d)
+ if (sshdr.sense_key == 0 &&
+ sshdr.asc == 0 && sshdr.ascq == 0)
cmd_result &= ~SAM_STAT_CHECK_CONDITION;
}
@@ -618,8 +618,8 @@ int ata_task_ioctl(struct scsi_device *scsidev, void __user *arg)
struct scsi_sense_hdr sshdr;
scsi_normalize_sense(sensebuf, SCSI_SENSE_BUFFERSIZE,
&sshdr);
- if (sshdr.sense_key == RECOVERED_ERROR &&
- sshdr.asc == 0 && sshdr.ascq == 0x1d)
+ if (sshdr.sense_key == 0 &&
+ sshdr.asc == 0 && sshdr.ascq == 0)
cmd_result &= ~SAM_STAT_CHECK_CONDITION;
}
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 58cfb323..d34adef1 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -943,8 +943,7 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,
unsigned int ival;
int val_bytes = map->format.val_bytes;
for (i = 0; i < val_len / val_bytes; i++) {
- memcpy(map->work_buf, val + (i * val_bytes), val_bytes);
- ival = map->format.parse_val(map->work_buf);
+ ival = map->format.parse_val(val + (i * val_bytes));
ret = regcache_write(map, reg + (i * map->reg_stride),
ival);
if (ret) {
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index dfe75838..2c127f9c 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -1051,12 +1051,29 @@ static int loop_clr_fd(struct loop_device *lo)
lo->lo_state = Lo_unbound;
/* This is safe: open() is still holding a reference. */
module_put(THIS_MODULE);
- if (lo->lo_flags & LO_FLAGS_PARTSCAN && bdev)
- ioctl_by_bdev(bdev, BLKRRPART, 0);
lo->lo_flags = 0;
if (!part_shift)
lo->lo_disk->flags |= GENHD_FL_NO_PART_SCAN;
mutex_unlock(&lo->lo_ctl_mutex);
+
+ /*
+ * Remove all partitions, since BLKRRPART won't remove user
+ * added partitions when max_part=0
+ */
+ if (bdev) {
+ struct disk_part_iter piter;
+ struct hd_struct *part;
+
+ mutex_lock_nested(&bdev->bd_mutex, 1);
+ invalidate_partition(bdev->bd_disk, 0);
+ disk_part_iter_init(&piter, bdev->bd_disk,
+ DISK_PITER_INCL_EMPTY);
+ while ((part = disk_part_iter_next(&piter)))
+ delete_partition(bdev->bd_disk, part->partno);
+ disk_part_iter_exit(&piter);
+ mutex_unlock(&bdev->bd_mutex);
+ }
+
/*
* Need not hold lo_ctl_mutex to fput backing file.
* Calling fput holding lo_ctl_mutex triggers a circular
diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c
index 32c67802..92250af8 100644
--- a/drivers/block/mtip32xx/mtip32xx.c
+++ b/drivers/block/mtip32xx/mtip32xx.c
@@ -81,17 +81,12 @@
/* Device instance number, incremented each time a device is probed. */
static int instance;
-struct list_head online_list;
-struct list_head removing_list;
-spinlock_t dev_lock;
-
/*
* Global variable used to hold the major block device number
* allocated in mtip_init().
*/
static int mtip_major;
static struct dentry *dfs_parent;
-static struct dentry *dfs_device_status;
static u32 cpu_use[NR_CPUS];
@@ -248,31 +243,40 @@ static inline void release_slot(struct mtip_port *port, int tag)
/*
* Reset the HBA (without sleeping)
*
+ * Just like hba_reset, except does not call sleep, so can be
+ * run from interrupt/tasklet context.
+ *
* @dd Pointer to the driver data structure.
*
* return value
* 0 The reset was successful.
* -1 The HBA Reset bit did not clear.
*/
-static int mtip_hba_reset(struct driver_data *dd)
+static int hba_reset_nosleep(struct driver_data *dd)
{
unsigned long timeout;
+ /* Chip quirk: quiesce any chip function */
+ mdelay(10);
+
/* Set the reset bit */
writel(HOST_RESET, dd->mmio + HOST_CTL);
/* Flush */
readl(dd->mmio + HOST_CTL);
- /* Spin for up to 2 seconds, waiting for reset acknowledgement */
- timeout = jiffies + msecs_to_jiffies(2000);
- do {
- mdelay(10);
- if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
- return -1;
+ /*
+ * Wait 10ms then spin for up to 1 second
+ * waiting for reset acknowledgement
+ */
+ timeout = jiffies + msecs_to_jiffies(1000);
+ mdelay(10);
+ while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
+ && time_before(jiffies, timeout))
+ mdelay(1);
- } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
- && time_before(jiffies, timeout));
+ if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
+ return -1;
if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
return -1;
@@ -477,7 +481,7 @@ static void mtip_restart_port(struct mtip_port *port)
dev_warn(&port->dd->pdev->dev,
"PxCMD.CR not clear, escalating reset\n");
- if (mtip_hba_reset(port->dd))
+ if (hba_reset_nosleep(port->dd))
dev_err(&port->dd->pdev->dev,
"HBA reset escalation failed.\n");
@@ -523,26 +527,6 @@ static void mtip_restart_port(struct mtip_port *port)
}
-static int mtip_device_reset(struct driver_data *dd)
-{
- int rv = 0;
-
- if (mtip_check_surprise_removal(dd->pdev))
- return 0;
-
- if (mtip_hba_reset(dd) < 0)
- rv = -EFAULT;
-
- mdelay(1);
- mtip_init_port(dd->port);
- mtip_start_port(dd->port);
-
- /* Enable interrupts on the HBA. */
- writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
- dd->mmio + HOST_CTL);
- return rv;
-}
-
/*
* Helper function for tag logging
*/
@@ -648,7 +632,7 @@ static void mtip_timeout_function(unsigned long int data)
if (cmdto_cnt) {
print_tags(port->dd, "timed out", tagaccum, cmdto_cnt);
if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
- mtip_device_reset(port->dd);
+ mtip_restart_port(port);
wake_up_interruptible(&port->svc_wait);
}
clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
@@ -1299,11 +1283,11 @@ static int mtip_exec_internal_command(struct mtip_port *port,
int rv = 0, ready2go = 1;
struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
unsigned long to;
- struct driver_data *dd = port->dd;
/* Make sure the buffer is 8 byte aligned. This is asic specific. */
if (buffer & 0x00000007) {
- dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
+ dev_err(&port->dd->pdev->dev,
+ "SG buffer is not 8 byte aligned\n");
return -EFAULT;
}
@@ -1316,21 +1300,23 @@ static int mtip_exec_internal_command(struct mtip_port *port,
mdelay(100);
} while (time_before(jiffies, to));
if (!ready2go) {
- dev_warn(&dd->pdev->dev,
+ dev_warn(&port->dd->pdev->dev,
"Internal cmd active. new cmd [%02X]\n", fis->command);
return -EBUSY;
}
set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
port->ic_pause_timer = 0;
- clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
- clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
+ if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
+ clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
+ else if (fis->command == ATA_CMD_DOWNLOAD_MICRO)
+ clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
if (atomic == GFP_KERNEL) {
if (fis->command != ATA_CMD_STANDBYNOW1) {
/* wait for io to complete if non atomic */
if (mtip_quiesce_io(port, 5000) < 0) {
- dev_warn(&dd->pdev->dev,
+ dev_warn(&port->dd->pdev->dev,
"Failed to quiesce IO\n");
release_slot(port, MTIP_TAG_INTERNAL);
clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
@@ -1375,84 +1361,58 @@ static int mtip_exec_internal_command(struct mtip_port *port,
/* Issue the command to the hardware */
mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
+ /* Poll if atomic, wait_for_completion otherwise */
if (atomic == GFP_KERNEL) {
/* Wait for the command to complete or timeout. */
- if (wait_for_completion_interruptible_timeout(
+ if (wait_for_completion_timeout(
&wait,
- msecs_to_jiffies(timeout)) <= 0) {
- if (rv == -ERESTARTSYS) { /* interrupted */
- dev_err(&dd->pdev->dev,
- "Internal command [%02X] was interrupted after %lu ms\n",
- fis->command, timeout);
- rv = -EINTR;
- goto exec_ic_exit;
- } else if (rv == 0) /* timeout */
- dev_err(&dd->pdev->dev,
- "Internal command did not complete [%02X] within timeout of %lu ms\n",
- fis->command, timeout);
- else
- dev_err(&dd->pdev->dev,
- "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
- fis->command, rv, timeout);
-
- if (mtip_check_surprise_removal(dd->pdev) ||
+ msecs_to_jiffies(timeout)) == 0) {
+ dev_err(&port->dd->pdev->dev,
+ "Internal command did not complete [%d] "
+ "within timeout of %lu ms\n",
+ atomic, timeout);
+ if (mtip_check_surprise_removal(port->dd->pdev) ||
test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
- &dd->dd_flag)) {
- dev_err(&dd->pdev->dev,
- "Internal command [%02X] wait returned due to SR\n",
- fis->command);
+ &port->dd->dd_flag)) {
rv = -ENXIO;
goto exec_ic_exit;
}
- mtip_device_reset(dd); /* recover from timeout issue */
rv = -EAGAIN;
- goto exec_ic_exit;
}
} else {
- u32 hba_stat, port_stat;
-
/* Spin for <timeout> checking if command still outstanding */
timeout = jiffies + msecs_to_jiffies(timeout);
while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
& (1 << MTIP_TAG_INTERNAL))
&& time_before(jiffies, timeout)) {
- if (mtip_check_surprise_removal(dd->pdev)) {
+ if (mtip_check_surprise_removal(port->dd->pdev)) {
rv = -ENXIO;
goto exec_ic_exit;
}
if ((fis->command != ATA_CMD_STANDBYNOW1) &&
test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
- &dd->dd_flag)) {
+ &port->dd->dd_flag)) {
rv = -ENXIO;
goto exec_ic_exit;
}
- port_stat = readl(port->mmio + PORT_IRQ_STAT);
- if (!port_stat)
- continue;
-
- if (port_stat & PORT_IRQ_ERR) {
- dev_err(&dd->pdev->dev,
- "Internal command [%02X] failed\n",
- fis->command);
- mtip_device_reset(dd);
- rv = -EIO;
- goto exec_ic_exit;
- } else {
- writel(port_stat, port->mmio + PORT_IRQ_STAT);
- hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
- if (hba_stat)
- writel(hba_stat,
- dd->mmio + HOST_IRQ_STAT);
+ if (readl(port->mmio + PORT_IRQ_STAT) & PORT_IRQ_ERR) {
+ atomic_inc(&int_cmd->active); /* error */
+ break;
}
- break;
}
}
+ if (atomic_read(&int_cmd->active) > 1) {
+ dev_err(&port->dd->pdev->dev,
+ "Internal command [%02X] failed\n", fis->command);
+ rv = -EIO;
+ }
if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
& (1 << MTIP_TAG_INTERNAL)) {
rv = -ENXIO;
- if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
- mtip_device_reset(dd);
+ if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
+ &port->dd->dd_flag)) {
+ mtip_restart_port(port);
rv = -EAGAIN;
}
}
@@ -1764,8 +1724,7 @@ static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
* -EINVAL Invalid parameters passed in, trim not supported
* -EIO Error submitting trim request to hw
*/
-static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
- unsigned int len)
+static int mtip_send_trim(struct driver_data *dd, unsigned int lba, unsigned int len)
{
int i, rv = 0;
u64 tlba, tlen, sect_left;
@@ -1851,6 +1810,45 @@ static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
return (bool) !!port->identify_valid;
}
+/*
+ * Reset the HBA.
+ *
+ * Resets the HBA by setting the HBA Reset bit in the Global
+ * HBA Control register. After setting the HBA Reset bit the
+ * function waits for 1 second before reading the HBA Reset
+ * bit to make sure it has cleared. If HBA Reset is not clear
+ * an error is returned. Cannot be used in non-blockable
+ * context.
+ *
+ * @dd Pointer to the driver data structure.
+ *
+ * return value
+ * 0 The reset was successful.
+ * -1 The HBA Reset bit did not clear.
+ */
+static int mtip_hba_reset(struct driver_data *dd)
+{
+ mtip_deinit_port(dd->port);
+
+ /* Set the reset bit */
+ writel(HOST_RESET, dd->mmio + HOST_CTL);
+
+ /* Flush */
+ readl(dd->mmio + HOST_CTL);
+
+ /* Wait for reset to clear */
+ ssleep(1);
+
+ /* Check the bit has cleared */
+ if (readl(dd->mmio + HOST_CTL) & HOST_RESET) {
+ dev_err(&dd->pdev->dev,
+ "Reset bit did not clear.\n");
+ return -1;
+ }
+
+ return 0;
+}
+
/*
* Display the identify command data.
*
@@ -2712,100 +2710,6 @@ static ssize_t mtip_hw_show_status(struct device *dev,
static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
-/* debugsfs entries */
-
-static ssize_t show_device_status(struct device_driver *drv, char *buf)
-{
- int size = 0;
- struct driver_data *dd, *tmp;
- unsigned long flags;
- char id_buf[42];
- u16 status = 0;
-
- spin_lock_irqsave(&dev_lock, flags);
- size += sprintf(&buf[size], "Devices Present:\n");
- list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
- if (dd->pdev) {
- if (dd->port &&
- dd->port->identify &&
- dd->port->identify_valid) {
- strlcpy(id_buf,
- (char *) (dd->port->identify + 10), 21);
- status = *(dd->port->identify + 141);
- } else {
- memset(id_buf, 0, 42);
- status = 0;
- }
-
- if (dd->port &&
- test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
- size += sprintf(&buf[size],
- " device %s %s (ftl rebuild %d %%)\n",
- dev_name(&dd->pdev->dev),
- id_buf,
- status);
- } else {
- size += sprintf(&buf[size],
- " device %s %s\n",
- dev_name(&dd->pdev->dev),
- id_buf);
- }
- }
- }
-
- size += sprintf(&buf[size], "Devices Being Removed:\n");
- list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
- if (dd->pdev) {
- if (dd->port &&
- dd->port->identify &&
- dd->port->identify_valid) {
- strlcpy(id_buf,
- (char *) (dd->port->identify+10), 21);
- status = *(dd->port->identify + 141);
- } else {
- memset(id_buf, 0, 42);
- status = 0;
- }
-
- if (dd->port &&
- test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
- size += sprintf(&buf[size],
- " device %s %s (ftl rebuild %d %%)\n",
- dev_name(&dd->pdev->dev),
- id_buf,
- status);
- } else {
- size += sprintf(&buf[size],
- " device %s %s\n",
- dev_name(&dd->pdev->dev),
- id_buf);
- }
- }
- }
- spin_unlock_irqrestore(&dev_lock, flags);
-
- return size;
-}
-
-static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
- size_t len, loff_t *offset)
-{
- int size = *offset;
- char buf[MTIP_DFS_MAX_BUF_SIZE];
-
- if (!len || *offset)
- return 0;
-
- size += show_device_status(NULL, buf);
-
- *offset = size <= len ? size : len;
- size = copy_to_user(ubuf, buf, *offset);
- if (size)
- return -EFAULT;
-
- return *offset;
-}
-
static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
size_t len, loff_t *offset)
{
@@ -2900,13 +2804,6 @@ static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
return *offset;
}
-static const struct file_operations mtip_device_status_fops = {
- .owner = THIS_MODULE,
- .open = simple_open,
- .read = mtip_hw_read_device_status,
- .llseek = no_llseek,
-};
-
static const struct file_operations mtip_regs_fops = {
.owner = THIS_MODULE,
.open = simple_open,
@@ -4264,7 +4161,6 @@ static int mtip_pci_probe(struct pci_dev *pdev,
const struct cpumask *node_mask;
int cpu, i = 0, j = 0;
int my_node = NUMA_NO_NODE;
- unsigned long flags;
/* Allocate memory for this devices private data. */
my_node = pcibus_to_node(pdev->bus);
@@ -4322,9 +4218,6 @@ static int mtip_pci_probe(struct pci_dev *pdev,
dd->pdev = pdev;
dd->numa_node = my_node;
- INIT_LIST_HEAD(&dd->online_list);
- INIT_LIST_HEAD(&dd->remove_list);
-
memset(dd->workq_name, 0, 32);
snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
@@ -4412,14 +4305,6 @@ static int mtip_pci_probe(struct pci_dev *pdev,
instance++;
if (rv != MTIP_FTL_REBUILD_MAGIC)
set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
- else
- rv = 0; /* device in rebuild state, return 0 from probe */
-
- /* Add to online list even if in ftl rebuild */
- spin_lock_irqsave(&dev_lock, flags);
- list_add(&dd->online_list, &online_list);
- spin_unlock_irqrestore(&dev_lock, flags);
-
goto done;
block_initialize_err:
@@ -4453,15 +4338,9 @@ static void mtip_pci_remove(struct pci_dev *pdev)
{
struct driver_data *dd = pci_get_drvdata(pdev);
int counter = 0;
- unsigned long flags;
set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
- spin_lock_irqsave(&dev_lock, flags);
- list_del_init(&dd->online_list);
- list_add(&dd->remove_list, &removing_list);
- spin_unlock_irqrestore(&dev_lock, flags);
-
if (mtip_check_surprise_removal(pdev)) {
while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
counter++;
@@ -4487,10 +4366,6 @@ static void mtip_pci_remove(struct pci_dev *pdev)
pci_disable_msi(pdev);
- spin_lock_irqsave(&dev_lock, flags);
- list_del_init(&dd->remove_list);
- spin_unlock_irqrestore(&dev_lock, flags);
-
kfree(dd);
pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
}
@@ -4638,11 +4513,6 @@ static int __init mtip_init(void)
pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
- spin_lock_init(&dev_lock);
-
- INIT_LIST_HEAD(&online_list);
- INIT_LIST_HEAD(&removing_list);
-
/* Allocate a major block device number to use with this driver. */
error = register_blkdev(0, MTIP_DRV_NAME);
if (error <= 0) {
@@ -4652,18 +4522,11 @@ static int __init mtip_init(void)
}
mtip_major = error;
- dfs_parent = debugfs_create_dir("rssd", NULL);
- if (IS_ERR_OR_NULL(dfs_parent)) {
- pr_warn("Error creating debugfs parent\n");
- dfs_parent = NULL;
- }
- if (dfs_parent) {
- dfs_device_status = debugfs_create_file("device_status",
- S_IRUGO, dfs_parent, NULL,
- &mtip_device_status_fops);
- if (IS_ERR_OR_NULL(dfs_device_status)) {
- pr_err("Error creating device_status node\n");
- dfs_device_status = NULL;
+ if (!dfs_parent) {
+ dfs_parent = debugfs_create_dir("rssd", NULL);
+ if (IS_ERR_OR_NULL(dfs_parent)) {
+ pr_warn("Error creating debugfs parent\n");
+ dfs_parent = NULL;
}
}
diff --git a/drivers/block/mtip32xx/mtip32xx.h b/drivers/block/mtip32xx/mtip32xx.h
index 8e8334c9..3bffff5f 100644
--- a/drivers/block/mtip32xx/mtip32xx.h
+++ b/drivers/block/mtip32xx/mtip32xx.h
@@ -129,9 +129,9 @@ enum {
MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
- MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
- (1 << MTIP_PF_EH_ACTIVE_BIT) |
- (1 << MTIP_PF_SE_ACTIVE_BIT) |
+ MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | \
+ (1 << MTIP_PF_EH_ACTIVE_BIT) | \
+ (1 << MTIP_PF_SE_ACTIVE_BIT) | \
(1 << MTIP_PF_DM_ACTIVE_BIT)),
MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
@@ -144,9 +144,9 @@ enum {
MTIP_DDF_REMOVE_PENDING_BIT = 1,
MTIP_DDF_OVER_TEMP_BIT = 2,
MTIP_DDF_WRITE_PROTECT_BIT = 3,
- MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
- (1 << MTIP_DDF_SEC_LOCK_BIT) |
- (1 << MTIP_DDF_OVER_TEMP_BIT) |
+ MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | \
+ (1 << MTIP_DDF_SEC_LOCK_BIT) | \
+ (1 << MTIP_DDF_OVER_TEMP_BIT) | \
(1 << MTIP_DDF_WRITE_PROTECT_BIT)),
MTIP_DDF_CLEANUP_BIT = 5,
@@ -180,7 +180,7 @@ struct mtip_work {
#define MTIP_TRIM_TIMEOUT_MS 240000
#define MTIP_MAX_TRIM_ENTRIES 8
-#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
+#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
struct mtip_trim_entry {
u32 lba; /* starting lba of region */
@@ -501,10 +501,6 @@ struct driver_data {
atomic_t irq_workers_active;
int isr_binding;
-
- struct list_head online_list; /* linkage for online list */
-
- struct list_head remove_list; /* linkage for removing list */
};
#endif
diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c
index b7b7a88d..f556f8a8 100644
--- a/drivers/block/rbd.c
+++ b/drivers/block/rbd.c
@@ -1742,10 +1742,9 @@ static int rbd_img_request_submit(struct rbd_img_request *img_request)
struct rbd_device *rbd_dev = img_request->rbd_dev;
struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc;
struct rbd_obj_request *obj_request;
- struct rbd_obj_request *next_obj_request;
dout("%s: img %p\n", __func__, img_request);
- for_each_obj_request_safe(img_request, obj_request, next_obj_request) {
+ for_each_obj_request(img_request, obj_request) {
int ret;
obj_request->callback = rbd_img_obj_callback;
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 3bb6fa39..fee62357 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -585,6 +585,16 @@ config DEVPORT
default y
source "drivers/s390/char/Kconfig"
+config RESIZER
+ tristate "DaVinci Resizer Driver"
+ default n
+ depends on ARCH_DAVINCI_DM646x
+ help
+ Resizer Driver for dm644x.
+
+ This driver helps user configure Resizer in a single shot mode
+ only for dm644x. Various private ioctls help user to configure
+ resizer, allocate memory for buffers etc.
config MSM_SMD_PKT
bool "Enable device interface for some SMD packet ports"
@@ -605,5 +615,57 @@ config TILE_SROM
device appear much like a simple EEPROM, and knows
how to partition a single ROM for multiple purposes.
+config VDCE
+ tristate "DaVinci VDCE Driver"
+ default n
+ depends on ARCH_DAVINCI_DM646x
+ help
+ DaVinci VDCE Driver.
+
+
+config DM365_IPIPE
+ depends on ARCH_DAVINCI && ARCH_DAVINCI_DM365
+ tristate "DM365 IPIPE"
+ help
+ DM365 IPIPE driver. This is the hardware module that
+ implements imp_hw_interface for DM365. This hardware module provides
+ previewer and resizer functionality for image processing.
+
+config IMP_PREVIEWER
+ depends on (DM355_IPIPE || DM365_IPIPE)
+ default n
+ tristate "IMP Previewer"
+ help
+ Image Pipe (IMP) Previewer Driver. This previewer
+ driver is used for converting Bayer RGB image to UYVY format. It also
+ provides image tuning functionality by using different tuning modules
+ available in the VPFE. This can be configured either in continuous
+ mode or single shot mode. In continous mode, Bayer RGB data from CCDC is
+ tuned on the fly and converted to UYVY format. In Single shot mode
+ image is first captured from CCDC to SDRAM and then given to the
+ previewer device for further processing as mentioned above.
+
+
+config IMP_RESIZER
+ depends on (DM355_IPIPE || DM365_IPIPE)
+ default n
+ tristate "IMP Resizer"
+ help
+ Image Pipe (IMP) resizer driver. This resizer driver
+ is needed to generate scaled up/down UYVY images. When chained
+ with previewer, this can resize a Bayer RGB image/UYVY image.
+ In standalone mode, this can resize only UYVY image. This device
+ can be chained with the previewer device to configure the resizer
+ at the output of the previewer hardware. This can also work in
+ continuous and single shot mode similar to the previewer.
+
+
+config IMP_DEBUG
+ depends on (DM355_IPIPE || DM365_IPIPE)
+ bool "IMP Debug support"
+ default n
+ help
+ Enable dumping of Image PIPE configuration to console
+
endmenu
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 7ff1d0d2..548fdb87 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -62,3 +62,21 @@ obj-$(CONFIG_JS_RTC) += js-rtc.o
js-rtc-y = rtc.o
obj-$(CONFIG_TILE_SROM) += tile-srom.o
+
+davinci_rsz_driver-objs := davinci_resizer_hw.o davinci_resizer.o
+obj-$(CONFIG_RESIZER) += davinci_rsz_driver.o
+
+dm355_imp-objs := dm355_ipipe.o dm355_def_para.o \
+ dm355_ipipe_hw.o
+obj-$(CONFIG_DM355_IPIPE) += dm355_imp.o
+
+dm365_imp-objs := dm365_ipipe.o dm365_def_para.o \
+ dm365_ipipe_hw.o dm3xx_ipipe.o
+obj-$(CONFIG_DM365_IPIPE) += dm365_imp.o
+
+imp_prev_driver-objs := imp_previewer.o
+imp_rsz_driver-objs := imp_resizer.o
+obj-$(CONFIG_DM355_IPIPE) += imp_common.o
+obj-$(CONFIG_DM365_IPIPE) += imp_common.o
+obj-$(CONFIG_IMP_PREVIEWER) += imp_prev_driver.o
+obj-$(CONFIG_IMP_RESIZER) += imp_rsz_driver.o
\ No newline at end of file
diff --git a/drivers/char/davinci_resizer.c b/drivers/char/davinci_resizer.c
new file mode 100644
index 00000000..5d3dbab2
--- /dev/null
+++ b/drivers/char/davinci_resizer.c
@@ -0,0 +1,1600 @@
+/*
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * This program is free software you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not,write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/fb.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/davinci_resizer.h>
+#include <asm/irq.h>
+#include "davinci_resizer_hw.h"
+
+#define DRIVERNAME "DaVinciResizer"
+
+MODULE_LICENSE("GPL");
+
+/* Global structute shared between all applications */
+struct device_params device_config;
+
+/* For registeration of charatcer device */
+static struct cdev c_dev;
+
+/* device structure to make entry in device */
+static dev_t dev;
+
+/* for holding device entry*/
+struct device *rsz_device;
+
+/* inline function to free reserver pages */
+inline void rsz_free_pages(unsigned long addr, unsigned long bufsize)
+{
+ unsigned long size;
+ unsigned long tempaddr;
+ tempaddr = addr;
+ if (!addr)
+ return;
+ size = PAGE_SIZE << (get_order(bufsize));
+ while (size > 0) {
+ ClearPageReserved(virt_to_page(addr));
+ addr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ free_pages(tempaddr, get_order(bufsize));
+}
+
+/*
+ * Function to allocate memory to input and output buffers
+ */
+int malloc_buff(struct rsz_reqbufs *reqbuff,
+ struct channel_config *rsz_conf_chan)
+{
+ /* For looping purpose */
+ int buf_index = ZERO;
+ /* For calculating the difference between new buffers to be allocated */
+ int diff;
+ /* for pointing to input or output buffer pointer */
+ int *buf_ptr, *buf_start;
+ /* To calculate no of max buffers; */
+ int maxbuffers;
+ /* to calculate number of buffers allocated */
+ unsigned int numbuffers = ZERO;
+ /* for storing buffer size */
+ int *buf_size;
+ /* to free the number of allocared buffers */
+ int free_index;
+ /* to make sure buffer pointer never swapped */
+ unsigned long adr;
+ unsigned long size;
+
+ /*
+ * assigning the buf_ptr to input buffer which is array of void
+ * pointer
+ */
+ if (reqbuff->buf_type == RSZ_BUF_IN) {
+ dev_dbg(rsz_device, "Input buffer requested \n");
+ buf_ptr = (int *)rsz_conf_chan->input_buffer;
+ buf_size = &rsz_conf_chan->in_bufsize;
+ maxbuffers = MAX_INPUT_BUFFERS;
+ }
+
+ /*
+ * assigning the buf_ptr to output buffer which is array of
+ * void pointer
+ */
+ else if (reqbuff->buf_type == RSZ_BUF_OUT) {
+ dev_dbg(rsz_device, "Output buffer requested \n");
+ buf_ptr = (int *)rsz_conf_chan->output_buffer;
+ buf_size = &rsz_conf_chan->out_bufsize;
+ maxbuffers = MAX_OUTPUT_BUFFERS;
+ } else {
+ dev_dbg(rsz_device, "Invalid type \n");
+ return -EINVAL;
+ }
+
+ /* Check the request for number of buffers */
+ if (reqbuff->count > maxbuffers)
+ return -EINVAL;
+
+ /* Counting the number of buffers allocated */
+ dev_dbg(rsz_device, "The requested size of buffer is %d \n",
+ reqbuff->size);
+ buf_start = buf_ptr;
+ while (*(buf_ptr) != (int)NULL && numbuffers < maxbuffers) {
+ numbuffers++;
+ buf_ptr++;
+ }
+
+ buf_ptr = buf_start;
+
+ /* Free all the buffers if the count is zero */
+ if (reqbuff->count == FREE_BUFFER) {
+ /* Free all the buffers */
+ for (buf_index = ZERO; buf_index < numbuffers; buf_index++) {
+ /* free memory allocate for the image */
+ dev_dbg(rsz_device,
+ "Free all the allocated buffers \n");
+ /* Free buffers using free_pages */
+ rsz_free_pages(*buf_ptr, *buf_size);
+
+ /* assign buffer zero to indicate its free */
+ *buf_ptr = (int)NULL;
+ buf_ptr++;
+ }
+ return SUCESS;
+ }
+
+ /* If buffers are previously allocated, size has to be same */
+ if (numbuffers) {
+
+ if (reqbuff->size != *buf_size) {
+ for (buf_index = ZERO; buf_index < numbuffers;
+ buf_index++) {
+ /* Free buffers using free_pages */
+ rsz_free_pages(*buf_ptr, *buf_size);
+
+ /* assign buffer zero to indicate its free */
+ *buf_ptr = (int)NULL;
+ buf_ptr++;
+ }
+ numbuffers = ZERO;
+ buf_ptr = buf_start;
+ }
+
+ }
+
+ /* get the difference to know how mnay buffers to allocate */
+ dev_dbg(rsz_device, "The no of requested buffers are %d \n ",
+ reqbuff->count);
+ diff = numbuffers - reqbuff->count;
+ if (diff > ZERO) {
+ buf_ptr = buf_ptr + reqbuff->count;
+ for (buf_index = reqbuff->count; buf_index < numbuffers;
+ buf_index++) {
+ /*
+ * if difference is positive than deallocate that
+ * much memory of input buff
+ */
+ rsz_free_pages(*buf_ptr, *buf_size);
+
+ /* assign buffer zero to indicate its free */
+ *buf_ptr = (int)NULL;
+ buf_ptr++;
+ }
+ } else {
+ /* make the difference positive */
+ diff = reqbuff->count - numbuffers;
+ buf_ptr = buf_ptr + numbuffers;
+ for (buf_index = numbuffers; buf_index < reqbuff->count;
+ buf_index++) {
+
+ /* assign memory to buffer */
+ *buf_ptr =
+ (int)(__get_free_pages
+ (GFP_KERNEL | GFP_DMA,
+ get_order(reqbuff->size)));
+
+ if (!(*buf_ptr)) {
+
+ buf_ptr = (buf_ptr - (buf_index - numbuffers));
+
+ for (free_index = numbuffers;
+ free_index < buf_index; free_index++) {
+
+ rsz_free_pages(*buf_ptr, *buf_size);
+ buf_ptr++;
+
+ }
+ dev_dbg(rsz_device,
+ "requestbuffer:not enough memory");
+ return -ENOMEM;
+ }
+
+ adr = *buf_ptr;
+ size = PAGE_SIZE << (get_order(reqbuff->size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers are never swapped
+ * out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ buf_ptr++;
+ }
+ }
+
+ /*
+ * set the buffer size to requested size. This will be useful only
+ * when numbuffers = 0
+ */
+ *buf_size = reqbuff->size;
+
+ return SUCESS;
+}
+
+/*
+ * Function to query the physical address of the buffer requested by index
+ */
+int get_buf_address(struct rsz_buffer *buffer,
+ struct channel_config *rsz_conf_chan)
+{
+ int buffer_index = 0;
+
+ if (buffer == NULL)
+ return -EINVAL;
+
+ if (buffer->buf_type == RSZ_BUF_IN) {
+ /* Check the request for number of input buffers */
+ if (buffer->index > MAX_INPUT_BUFFERS)
+ return -EINVAL;
+ /* count number of input buffer allocated */
+ while ((rsz_conf_chan->input_buffer[buffer_index] != NULL)
+ && (buffer_index < MAX_INPUT_BUFFERS)) {
+ buffer_index++;
+ }
+ /* checking the index requested */
+ if (buffer->index >= buffer_index) {
+ dev_dbg(rsz_device,
+ "Requested buffer not allocated \n");
+ return -EINVAL;
+ }
+
+ /*
+ * assignning the input address to offset which will be
+ * used in mmap
+ */
+ buffer->offset =
+ ((int)(rsz_conf_chan->input_buffer[buffer->index]));
+ dev_dbg(rsz_device, "The query input offset is %x",
+ buffer->offset);
+ } else if (buffer->buf_type == RSZ_BUF_OUT) {
+ /* Check the request for number of output buffers */
+ if (buffer->index > MAX_OUTPUT_BUFFERS)
+ return -EINVAL;
+
+ /* counting number of output buffers */
+ while ((rsz_conf_chan->output_buffer[buffer_index] != NULL)
+ && (buffer_index < MAX_OUTPUT_BUFFERS)) {
+ buffer_index++;
+ }
+ /* checking the index requested */
+ if (buffer->index >= buffer_index) {
+ dev_dbg(rsz_device,
+ "Requested buffer not allocated \n");
+ return -EINVAL;
+ }
+
+ /*
+ * assignning the output address to offset which will be
+ * used in mmap
+ */
+ buffer->offset =
+ ((int)(rsz_conf_chan->output_buffer[buffer->index]));
+
+ dev_dbg(rsz_device, "The query output offset is %x",
+ buffer->offset);
+ } else {
+ dev_dbg(rsz_device, " Invalid input type \n");
+ return -EINVAL;
+ }
+
+ /* look up physical address of the buffer */
+ buffer->offset = virt_to_phys((void *)buffer->offset);
+ dev_dbg(rsz_device, "the physical offset returned after query \
+ is %x", buffer->offset);
+
+ return SUCESS;
+
+}
+
+/*
+ * This function enable the resize bit after doing the hardware register
+ * configuration after which resizing will be carried on.
+ */
+int rsz_start(struct rsz_resize *resize, struct channel_config *rsz_conf_chan)
+{
+ /* Holds the input address to the resizer */
+ int in_address;
+ /* Holds the output address to resizer */
+ int out_address;
+ /* Conatains the input put and output buffer allocated size */
+ int out_bufsize, in_bufsize;
+
+ /* Conatins the pitch and vertical size of input and output image */
+ int in_vsize, in_pitch, out_vsize, out_pitch;
+ /* holds the return value; */
+ int ret;
+ /* For calculating the number of input buffers allocated */
+ int buffer_in_index = ZERO;
+
+ /* For calculating the number of output buffers allocated */
+ int buffer_out_index = ZERO;
+
+ /* checking the configuartion status */
+ if (rsz_conf_chan->config_state) {
+ dev_dbg(rsz_device, "State not configured \n");
+ return -EINVAL;
+ }
+
+ /* Taking the inpitch of the image */
+ in_pitch =
+ rsz_conf_chan->register_config.rsz_sdr_inoff
+ & ~(RSZ_SDR_INOFF_OFFSET_MASK);
+ /* Taking the out pitch of image */
+ in_vsize =
+ ((rsz_conf_chan->register_config.rsz_in_size
+ & ~(RSZ_IN_SIZE_VERT_MASK)) >> RSZ_IN_SIZE_VERT_SHIFT);
+
+ in_bufsize = in_vsize * in_pitch;
+
+ /* getting the outpitch */
+ out_pitch =
+ rsz_conf_chan->register_config.rsz_sdr_outoff
+ & ~(RSZ_SDR_OUTOFF_OFFSET_MASK);
+ /* getting the vertical size */
+ out_vsize =
+ ((rsz_conf_chan->register_config.rsz_out_size
+ & ~(RSZ_OUT_SIZE_VERT_MASK)) >> RSZ_OUT_VSIZE_SHIFT);
+
+ out_bufsize = out_vsize * out_pitch;
+
+ if (resize->in_buf.index < ZERO) {
+ /* assignning the address to the register configuration */
+ if (resize->in_buf.size >= in_bufsize) {
+ if (resize->in_buf.offset % 32)
+ return -EINVAL;
+
+ rsz_conf_chan->register_config.rsz_sdr_inadd =
+ resize->in_buf.offset;
+ } else {
+ dev_err(rsz_device, " invalid size \n");
+ return -EINVAL;
+ }
+ } else {
+ if (resize->in_buf.index > MAX_INPUT_BUFFERS)
+ return -EINVAL;
+ /* count number of input buffer allocated */
+ while ((rsz_conf_chan->input_buffer[buffer_in_index] !=
+ NULL) && (buffer_in_index < MAX_INPUT_BUFFERS)) {
+ buffer_in_index++;
+ }
+ /* checking the index requested */
+ if (resize->in_buf.index >= buffer_in_index) {
+ dev_dbg(rsz_device,
+ "Requested buffer not allocated \n");
+ return -EINVAL;
+ }
+
+ in_address = virt_to_phys(((void *)
+ rsz_conf_chan->
+ input_buffer[resize->in_buf.index]));
+
+ rsz_conf_chan->register_config.rsz_sdr_inadd = in_address;
+ }
+
+ if (resize->out_buf.index < ZERO) {
+ if (resize->out_buf.size >= out_bufsize) {
+ if (resize->out_buf.offset % 32)
+ return -EINVAL;
+
+ rsz_conf_chan->register_config.rsz_sdr_outadd =
+ resize->out_buf.offset;
+ } else {
+ dev_err(rsz_device, "Invalid output size \n");
+ return -EINVAL;
+ }
+ } else {
+ if (resize->out_buf.index > MAX_OUTPUT_BUFFERS)
+ return -EINVAL;
+ /* count number of input buffer allocated */
+ while ((rsz_conf_chan->output_buffer[buffer_out_index] !=
+ NULL) && (buffer_out_index < MAX_OUTPUT_BUFFERS)) {
+ buffer_out_index++;
+ }
+ /* checking the index requested */
+ if (resize->out_buf.index >= buffer_out_index) {
+ dev_dbg(rsz_device,
+ "Requested buffer not allocated \n");
+ return -EINVAL;
+ }
+ out_address = virt_to_phys(((void *)
+ (rsz_conf_chan->
+ output_buffer[resize->out_buf.
+ index])));
+ rsz_conf_chan->register_config.rsz_sdr_outadd = out_address;
+ }
+
+ /* Channel is busy */
+ dev_dbg(rsz_device, "\nThe physical add in rsz start is %x \n",
+ rsz_conf_chan->register_config.rsz_sdr_inadd);
+
+ rsz_conf_chan->status = CHANNEL_BUSY;
+
+ /* Function call to add the entry of application in array */
+ ret = add_to_array(rsz_conf_chan);
+
+ /* Function call to set up the hardware */
+ rsz_hardware_setup(rsz_conf_chan);
+
+ dev_dbg(rsz_device, "After Hardware Setup PCR = %x", regr(PCR));
+
+ /* Initialize the interrupt ISR to ZER0 */
+ device_config.sem_isr.done = ZERO;
+ /* Function call to enable resizer hardware */
+ ret = rsz_enable_dvrz(rsz_conf_chan);
+
+ dev_dbg(rsz_device, "After ENABLE PCR = %x", regr(PCR));
+
+ /* Waiting for resizing to be complete */
+ wait_for_completion_interruptible(&(device_config.sem_isr));
+
+ rsz_conf_chan->status = CHANNEL_FREE;
+
+ if (rsz_writebuffer_status() != 0)
+ dev_err(rsz_device, "Error: Resizer write buffer overflow: \n");
+
+ delete_from_array(rsz_conf_chan);
+
+ return ret;
+}
+
+/*
+ * Function to add the current channel configuration into array
+ * according to priority.
+ */
+int add_to_array(struct channel_config *rsz_conf_chan)
+{
+ int array_index, device_index, ret;
+
+ /* locking the configuartion aaray */
+ ret = down_interruptible(&device_config.array_sem);
+
+ /* Add configuration to the queue according to its priority */
+ if (device_config.array_count == EMPTY) {
+ /* If array empty insert at top position */
+ dev_dbg(rsz_device, "First request for resizing \n");
+ device_config.channel_configuration[device_config.array_count]
+ = rsz_conf_chan;
+ } else {
+ /*
+ * Check the priority and insert according to the priority
+ * it will start from first index
+ */
+ for (array_index = SECONDENTRY;
+ array_index < device_config.array_count; array_index++) {
+ if (device_config.
+ channel_configuration[array_index]->priority <
+ rsz_conf_chan->priority)
+ break;
+ }
+ /*
+ * Shift all the elements one step down in array. If first
+ * element and second have same prioroty than insert
+ * below first
+ */
+ for (device_index = device_config.array_count;
+ device_index > array_index; device_index--) {
+ device_config.channel_configuration[device_index] =
+ device_config.
+ channel_configuration[device_index - NEXT];
+ }
+
+ device_config.channel_configuration[array_index] =
+ rsz_conf_chan;
+ }
+
+ /* incrementing number of requests for resizing */
+ device_config.array_count++;
+ dev_dbg(rsz_device, "The total request for resizing are %d",
+ device_config.array_count);
+
+ if (device_config.array_count != SECONDENTRY) {
+ up(&device_config.array_sem);
+
+ /* if the request is pending that lock the request */
+#ifdef CONFIG_PREEMPT_RT
+ wait_for_completion_interruptible
+ (&(rsz_conf_chan->channel_sem));
+#else
+ ret = down_interruptible(&(rsz_conf_chan->channel_sem));
+#endif
+
+ } else {
+ up(&device_config.array_sem);
+ }
+
+ return SUCESS;
+}
+
+/*
+ * Function to delete the processed array entry form the array
+ */
+int delete_from_array(struct channel_config *rsz_conf_chan)
+{
+ int array_index = FIRSTENTRY, device_index, ret;
+
+ ret = down_interruptible(&(device_config.array_sem));
+
+ /* shift the entried in array */
+ if (device_config.array_count != SECONDENTRY) {
+ /* decrementing the request count */
+ device_config.array_count--;
+
+ /* Shift all the elements one step up in array */
+ for (device_index = array_index;
+ device_index < device_config.array_count; device_index++) {
+
+ device_config.channel_configuration[device_index] =
+ device_config.
+ channel_configuration[device_index + NEXT];
+ }
+ /* making last entry NULL; */
+ device_config.channel_configuration[device_index + NEXT] = NULL;
+ }
+ /* remove the top entry */
+ else {
+ dev_dbg(rsz_device, "\n Removing the first request");
+ device_config.array_count--;
+ device_config.channel_configuration[FIRSTENTRY] = NULL;
+ }
+
+ if (device_config.array_count != FIRSTENTRY) {
+ /*
+ * Get config having highest priority in array
+ * resizer_device.config and unlock config.sem of that config
+ */
+
+ dev_dbg(rsz_device,
+ "Releasing array lock of the second entry\n");
+#ifdef CONFIG_PREEMPT_RT
+ complete(&(device_config.channel_configuration
+ [FIRSTENTRY]->channel_sem));
+#else
+ up(&(device_config.channel_configuration
+ [FIRSTENTRY]->channel_sem));
+#endif
+ up(&(device_config.array_sem));
+ } else {
+ dev_dbg(rsz_device, "Releasing array lock \n");
+ up(&(device_config.array_sem));
+ }
+
+ return SUCESS;
+}
+
+int rsz_set_params(struct rsz_params *params,
+ struct channel_config *rsz_conf_chan)
+{
+ int coeffcounter;
+ int hrsz = ZERO;
+ int vrsz = ZERO;
+ int alignment = ZERO;
+ int hsize;
+ int vsize;
+
+ /* calculating the horizontal and vertical ratio */
+ vrsz = (params->in_vsize - NUM_D2TAPS) * RATIO_MULTIPLIER /
+ (params->out_vsize - 1);
+ hrsz = ((params->in_hsize - NUM_D2TAPS) * RATIO_MULTIPLIER) /
+ (params->out_hsize - 1);
+
+ /* recalculating Horizontal ratio */
+ if (hrsz <= DOWN_RSZ_RATIO) { /* 4-tap, 8-phase filter */
+ hrsz = (params->in_hsize - NUM_TAPS) * RATIO_MULTIPLIER
+ / (params->out_hsize - 1);
+ if (hrsz > DOWN_RSZ_RATIO)
+ hrsz = DOWN_RSZ_RATIO;
+ if (params->hstph > NUM_PHASES)
+ return -EINVAL;
+ } else if (hrsz >= UP_RSZ_RATIO1 && hrsz <= DOWN_RSZ_RATIO1) {
+ /* 7-tap, 4-phase filter */
+ if (params->hstph > NUM_D2PH)
+ return -EINVAL;
+ }
+
+ /* recalculating vertical ratio */
+ if (vrsz <= DOWN_RSZ_RATIO) { /* 4-tap, 8-phase filter */
+ vrsz = (params->in_vsize - NUM_TAPS) * RATIO_MULTIPLIER /
+ (params->out_vsize - 1);
+ if (vrsz > DOWN_RSZ_RATIO)
+ vrsz = DOWN_RSZ_RATIO;
+ if (params->vstph > NUM_PHASES)
+ return -EINVAL;
+ } else if (vrsz >= UP_RSZ_RATIO1 && vrsz <= DOWN_RSZ_RATIO1) {
+ if (params->vstph > NUM_D2PH)
+ return -EINVAL;
+ }
+
+ /* Fiiling the input pitch in the structure */
+ if ((params->in_pitch) % ALIGN32) {
+ dev_err(rsz_device, "Inavlid input pitch %d\n",
+ params->in_pitch);
+ return -EINVAL;
+ }
+ rsz_conf_chan->register_config.rsz_sdr_inoff =
+ ((params->in_pitch) & ~(RSZ_SDR_INOFF_OFFSET_MASK));
+
+ /* If vertical upsizing then */
+ if (vrsz < 256) {
+ /* checking for both types of format */
+ if (params->inptyp == RSZ_INTYPE_PLANAR_8BIT)
+ alignment = ALIGNMENT;
+ else if (params->inptyp == RSZ_INTYPE_YCBCR422_16BIT)
+ alignment = (ALIGNMENT / 2);
+ else
+ dev_err(rsz_device, "Invalid input type\n");
+
+ /* errror checking for output size */
+ if (!(((params->out_hsize % PIXEL_EVEN) == ZERO)
+ && (params->out_hsize % alignment) == ZERO)) {
+ dev_err(rsz_device, "wrong hsize\n");
+
+ return -EINVAL;
+ }
+ }
+ if (hrsz >= UP_RSZ_RATIO && hrsz <= DOWN_RSZ_RATIO) {
+ if (params->out_hsize > MAX_IMAGE_WIDTH) {
+ dev_err(rsz_device, "wrong width\n");
+ return -EINVAL;
+ }
+
+ } else if (hrsz >= UP_RSZ_RATIO1 && hrsz <= DOWN_RSZ_RATIO1) {
+ if (params->out_hsize > MAX_IMAGE_WIDTH_HIGH) {
+ dev_err(rsz_device, "wrong width\n");
+ return -EINVAL;
+ }
+ } else {
+ dev_err(rsz_device,
+ "horizontal scaling ratio invalid: %d, %d, %d\n",
+ hrsz, params->in_hsize, params->out_hsize);
+ return -EINVAL;
+ }
+ if (vrsz < UP_RSZ_RATIO || vrsz > DOWN_RSZ_RATIO1) {
+ dev_err(rsz_device, "vertical scaling ratio invalid:%d,%d,%d\n",
+ vrsz, params->in_vsize, params->out_vsize);
+ return -EINVAL;
+ }
+ rsz_conf_chan->register_config.rsz_out_size =
+ (params->out_hsize & ~(RSZ_OUT_SIZE_HORZ_MASK));
+
+ rsz_conf_chan->register_config.rsz_out_size |=
+ ((params->out_vsize << RSZ_OUT_VSIZE_SHIFT) &
+ ~(RSZ_OUT_SIZE_VERT_MASK));
+
+ dev_dbg(rsz_device, "The outpitch in driver is %d\n",
+ params->out_pitch);
+ if ((params->out_pitch) % ALIGN32) {
+ dev_err(rsz_device, "Inavlid output pitch\n");
+ return -EINVAL;
+ }
+ rsz_conf_chan->register_config.rsz_sdr_outoff =
+ params->out_pitch & ~(RSZ_SDR_OUTOFF_OFFSET_MASK);
+
+ rsz_conf_chan->register_config.rsz_cnt = 0;
+ /* clear the rsz_cnt register */
+
+ /* Configuring the chrominance algorithm */
+ if (params->cbilin) {
+ rsz_conf_chan->register_config.rsz_cnt =
+ BITSET(rsz_conf_chan->register_config.rsz_cnt,
+ SET_BIT_CBLIN);
+ dev_dbg(rsz_device, "Setting chrominance algorithm bit \n");
+ }
+
+ /* Configuring the input source */
+ if (INPUT_RAM) {
+ dev_dbg(rsz_device, "Setting Input source as Ram \n");
+ rsz_conf_chan->register_config.rsz_cnt =
+ BITSET(rsz_conf_chan->register_config.rsz_cnt,
+ SET_BIT_INPUTRAM);
+ }
+ /* Configuring the input type */
+ if (params->inptyp == RSZ_INTYPE_PLANAR_8BIT) {
+ dev_dbg(rsz_device, "Setting pic format as 8 bit planar \n");
+ rsz_conf_chan->register_config.rsz_cnt =
+ BITSET(rsz_conf_chan->register_config.rsz_cnt,
+ SET_BIT_INPTYP);
+ } else {
+ dev_dbg(rsz_device,
+ "Setting pic format as 16 bit color seperated\n");
+ rsz_conf_chan->register_config.rsz_cnt =
+ BITRESET(rsz_conf_chan->register_config.rsz_cnt,
+ SET_BIT_INPTYP);
+
+ /* Configuring the chrominace position type */
+ if (params->pix_fmt == RSZ_PIX_FMT_UYVY) {
+
+ rsz_conf_chan->register_config.rsz_cnt =
+ BITSET(rsz_conf_chan->register_config.rsz_cnt,
+ SET_BIT_YCPOS);
+ } else if (params->pix_fmt == RSZ_PIX_FMT_YUYV) {
+ rsz_conf_chan->register_config.rsz_cnt =
+ BITRESET(rsz_conf_chan->register_config.rsz_cnt,
+ SET_BIT_YCPOS);
+ }
+
+ }
+
+ /* checking the validity of the horizontal phase value */
+ if (hrsz >= UP_RSZ_RATIO && hrsz <= DOWN_RSZ_RATIO) {
+ if (params->hstph > NUM_PHASES)
+ return -EINVAL;
+ } else if (hrsz >= UP_RSZ_RATIO && hrsz <= DOWN_RSZ_RATIO) {
+ if (params->hstph > NUM_D2PH)
+ return -EINVAL;
+ }
+
+ rsz_conf_chan->register_config.rsz_cnt |=
+ ((params->hstph << RSZ_HSTP_SHIFT) & ~(RSZ_HSTPH_MASK));
+
+ /* checking the validity of the vertical phase value */
+ if (vrsz >= UP_RSZ_RATIO && hrsz <= DOWN_RSZ_RATIO) {
+ if (params->vstph > NUM_PHASES)
+ return -EINVAL;
+ } else if (vrsz >= UP_RSZ_RATIO && vrsz <= DOWN_RSZ_RATIO) {
+ if (params->vstph > NUM_D2PH)
+ return -EINVAL;
+ }
+
+ rsz_conf_chan->register_config.rsz_cnt |=
+ ((params->vstph << RSZ_VSTPH_SHIFT) & ~(RSZ_VSTPH_MASK));
+
+ /* if input is from ram that vertical pixel should be zero */
+ if (INPUT_RAM)
+ params->vert_starting_pixel = ZERO;
+
+ /* Configuring the starting pixel in vertical direction */
+ rsz_conf_chan->register_config.rsz_in_start =
+ (params->vert_starting_pixel << RSZ_IN_SIZE_VERT_SHIFT)
+ & ~(RSZ_IN_START_VERT_ST_MASK);
+
+ /* if input is 8 bit that start pixel should be <= to than 31 */
+ if (params->inptyp == RSZ_INTYPE_PLANAR_8BIT) {
+ if (params->horz_starting_pixel > MAX_HORZ_PIXEL_8BIT)
+ return -EINVAL;
+ }
+ /* if input is 16 bit that start pixel should be <= than 15 */
+ if (params->inptyp == RSZ_INTYPE_YCBCR422_16BIT) {
+ if (params->horz_starting_pixel > MAX_HORZ_PIXEL_16BIT)
+ return -EINVAL;
+ }
+
+ /* Configuring the starting pixel in horizontal direction */
+ rsz_conf_chan->register_config.rsz_in_start |=
+ params->horz_starting_pixel & ~(RSZ_IN_START_HORZ_ST_MASK);
+
+ for (coeffcounter = ZERO; coeffcounter < MAX_COEF_COUNTER;
+ coeffcounter++) {
+ /* Configuration of horizontal coefficients */
+ rsz_conf_chan->register_config.
+ rsz_coeff_horz[coeffcounter] =
+ (params->hfilt_coeffs[2 * coeffcounter]
+ & ~(RSZ_FILTER_COEFF0_MASK));
+
+ /* Configuration of horizontal coefficients */
+
+ rsz_conf_chan->register_config.
+ rsz_coeff_horz[coeffcounter] |=
+ ((params->hfilt_coeffs[2 * coeffcounter + NEXT]
+ << RSZ_FILTER_COEFF_SHIFT) & ~(RSZ_FILTER_COEFF1_MASK));
+
+ /* Configuration of Vertical coefficients */
+ rsz_conf_chan->register_config.
+ rsz_coeff_vert[coeffcounter] =
+ (params->
+ vfilt_coeffs[2 *
+ coeffcounter] & ~(RSZ_FILTER_COEFF0_MASK));
+
+ /* Configuration of Vertical coefficients */
+
+ rsz_conf_chan->register_config.
+ rsz_coeff_vert[coeffcounter] |=
+ ((params->
+ vfilt_coeffs[2 * coeffcounter +
+ NEXT] << RSZ_FILTER_COEFF_SHIFT) &
+ ~(RSZ_FILTER_COEFF1_MASK));
+ }
+ /* Coefficinets of parameters for luma :- algo configuration */
+ rsz_conf_chan->register_config.rsz_yehn =
+ ((params->yenh_params.type << RSZ_YENH_TYPE_SHIFT) &
+ ~(RSZ_YEHN_ALGO_MASK));
+
+ /* Coefficinets of parameters for luma :- core configuration */
+ if (params->yenh_params.type) {
+ rsz_conf_chan->register_config.rsz_yehn |=
+ params->yenh_params.core & ~(RSZ_YEHN_CORE_MASK);
+
+ /* Coefficinets of parameters for luma :- gain configuration */
+
+ rsz_conf_chan->register_config.rsz_yehn |=
+ ((params->yenh_params.gain << RSZ_YENH_GAIN_SHIFT)
+ & ~(RSZ_YEHN_GAIN_MASK));
+
+ /* Coefficinets of parameters for luma :- gain configuration */
+ rsz_conf_chan->register_config.rsz_yehn |=
+ ((params->yenh_params.slop << RSZ_YENH_SLOP_SHIFT)
+ & ~(RSZ_YEHN_SLOP_MASK));
+ }
+
+ /* Configuring the horizonatl ratio */
+ rsz_conf_chan->register_config.rsz_cnt |= ((hrsz - 1) & ~RSZ_HRSZ_MASK);
+
+ /* Configuring the vertical ratio */
+ rsz_conf_chan->register_config.rsz_cnt |=
+ (((vrsz - 1) << RSZ_VRSZ_SHIFT) & ~RSZ_VRSZ_MASK);
+
+ if (hrsz <= 512) { /* 4-tap filter */
+ hsize =
+ ((32 * params->hstph + (params->out_hsize - 1) * hrsz +
+ 16) >> 8) + 7;
+ } else {
+ hsize =
+ ((64 * params->hstph + (params->out_hsize - 1) * hrsz +
+ 32) >> 8) + 7;
+ }
+ dev_dbg(rsz_device, "hsize = %d\n", hsize);
+ if (vrsz <= 512) { /* 4-tap filter */
+ vsize =
+ ((32 * params->vstph + (params->out_vsize - 1) * vrsz +
+ 16) >> 8) + 4;
+ } else {
+ vsize =
+ ((64 * params->vstph + (params->out_vsize - 1) * vrsz +
+ 32) >> 8) + 7;
+ }
+ dev_dbg(rsz_device, "vsize = %d\n", vsize);
+ dev_dbg(rsz_device, "hrsz = %d, vrsz = %d,\n", hrsz, vrsz);
+
+ /* Configuring the Horizontal size of inputframn in MMR */
+ rsz_conf_chan->register_config.rsz_in_size = hsize;
+
+ rsz_conf_chan->register_config.rsz_in_size |=
+ ((vsize << RSZ_IN_SIZE_VERT_SHIFT)
+ & ~(RSZ_IN_SIZE_VERT_MASK));
+
+ /* Setting the configuration status */
+ dev_dbg(rsz_device, "Resizer State configured \n");
+ rsz_conf_chan->config_state = STATE_CONFIGURED;
+
+ return SUCESS;
+}
+
+/*
+ * Function to get the parameters values
+ */
+int rsz_get_params(struct rsz_params *params,
+ struct channel_config *rsz_conf_chan)
+{
+ int coeffcounter;
+
+ if (rsz_conf_chan->config_state) {
+ dev_dbg(rsz_device, " state not configured \n");
+ return -EINVAL;
+ }
+
+ /* getting the horizontal size */
+ params->in_hsize =
+ rsz_conf_chan->register_config.rsz_in_size &
+ ~(RSZ_IN_SIZE_HORZ_MASK);
+ /* getting the vertical size */
+ params->in_vsize =
+ ((rsz_conf_chan->register_config.rsz_in_size
+ & ~(RSZ_IN_SIZE_VERT_MASK)) >> RSZ_IN_SIZE_VERT_SHIFT);
+
+ /* getting the input pitch */
+ params->in_pitch =
+ rsz_conf_chan->register_config.rsz_sdr_inoff
+ & ~(RSZ_SDR_INOFF_OFFSET_MASK);
+
+ /* getting the output horizontal size */
+ params->out_hsize =
+ rsz_conf_chan->register_config.rsz_out_size
+ & ~(RSZ_OUT_SIZE_HORZ_MASK);
+
+ /* getting the vertical size */
+ params->out_vsize =
+ ((rsz_conf_chan->register_config.rsz_out_size
+ & ~(RSZ_OUT_SIZE_VERT_MASK)) >> RSZ_OUT_VSIZE_SHIFT);
+
+ /* getting the output pitch */
+ params->out_pitch =
+ rsz_conf_chan->register_config.rsz_sdr_outoff
+ & ~(RSZ_SDR_OUTOFF_OFFSET_MASK);
+
+ /* getting the chrominance algorithm */
+ params->cbilin =
+ ((rsz_conf_chan->register_config.rsz_cnt
+ & RSZ_CNT_CBILIN_MASK) >> SET_BIT_CBLIN);
+
+ /* getting the input type */
+ params->inptyp =
+ ((rsz_conf_chan->register_config.rsz_cnt
+ & RSZ_CNT_INPTYP_MASK) >> SET_BIT_INPTYP);
+ /* getting the starting pixel in horizontal direction */
+ params->horz_starting_pixel =
+ ((rsz_conf_chan->register_config.rsz_in_start
+ & ~(RSZ_IN_START_HORZ_ST_MASK)));
+ /* getting the starting pixel in vertical direction */
+ params->vert_starting_pixel =
+ ((rsz_conf_chan->register_config.rsz_in_start
+ & ~(RSZ_IN_START_VERT_ST_MASK)) >> RSZ_IN_SIZE_VERT_SHIFT);
+
+ /* getting the horizontal starting phase */
+ params->hstph =
+ ((rsz_conf_chan->register_config.rsz_cnt
+ & ~(RSZ_HSTPH_MASK) >> RSZ_HSTP_SHIFT));
+
+ /* getting the vertical starting phase */
+ params->vstph =
+ ((rsz_conf_chan->register_config.rsz_cnt
+ & ~(RSZ_VSTPH_MASK) >> RSZ_VSTPH_SHIFT));
+
+ for (coeffcounter = ZERO; coeffcounter < MAX_COEF_COUNTER;
+ coeffcounter++) {
+ /* getting the horizontal coefficients 0 */
+ params->hfilt_coeffs[2 * coeffcounter] =
+ rsz_conf_chan->register_config.rsz_coeff_horz[coeffcounter]
+ & ~(RSZ_FILTER_COEFF0_MASK);
+
+ /* getting the horizontal coefficients 1 */
+ params->hfilt_coeffs[2 * coeffcounter + NEXT] =
+ ((rsz_conf_chan->register_config.
+ rsz_coeff_horz[coeffcounter]
+ & ~(RSZ_FILTER_COEFF1_MASK)) >> RSZ_FILTER_COEFF_SHIFT);
+
+ /* getting the vertical coefficients 0 */
+ params->vfilt_coeffs[2 * coeffcounter] =
+ rsz_conf_chan->register_config.rsz_coeff_vert[coeffcounter]
+ & ~(RSZ_FILTER_COEFF0_MASK);
+
+ /* getting the vertical coefficients 1 */
+ params->vfilt_coeffs[2 * coeffcounter + NEXT] =
+ ((rsz_conf_chan->register_config.
+ rsz_coeff_vert[coeffcounter]
+ & ~(RSZ_FILTER_COEFF1_MASK)) >> RSZ_FILTER_COEFF_SHIFT);
+
+ }
+
+ /* getting the parameters for luma :- algo */
+ params->yenh_params.type =
+ ((rsz_conf_chan->register_config.rsz_yehn
+ & ~(RSZ_YEHN_ALGO_MASK)) >> RSZ_YENH_TYPE_SHIFT);
+
+ /* getting the parameters for luma :- core */
+ params->yenh_params.core =
+ (rsz_conf_chan->register_config.rsz_yehn & ~(RSZ_YEHN_CORE_MASK));
+
+ /* Coefficinets of parameters for luma :- gain */
+ params->yenh_params.gain =
+ ((rsz_conf_chan->register_config.rsz_yehn
+ & ~(RSZ_YEHN_GAIN_MASK)) >> RSZ_YENH_GAIN_SHIFT);
+
+ /* Coefficinets of parameters for luma :- SLOP configuration */
+ params->yenh_params.slop =
+ ((rsz_conf_chan->register_config.rsz_yehn
+ & ~(RSZ_YEHN_SLOP_MASK)) >> RSZ_YENH_SLOP_SHIFT);
+
+ /* getting the input type */
+ params->pix_fmt =
+ ((rsz_conf_chan->register_config.rsz_cnt
+ & RSZ_CNT_PIXFMT_MASK) >> SET_BIT_YCPOS);
+
+ if (params->pix_fmt)
+ params->pix_fmt = RSZ_PIX_FMT_UYVY;
+ else
+ params->pix_fmt = RSZ_PIX_FMT_YUYV;
+
+ return SUCESS;
+}
+
+void rsz_calculate_crop(struct channel_config *rsz_conf_chan,
+ struct rsz_cropsize *cropsize)
+{
+ int luma_enable;
+
+ cropsize->hcrop = ZERO;
+ cropsize->vcrop = ZERO;
+
+ luma_enable =
+ ((rsz_conf_chan->register_config.rsz_yehn
+ & ~(RSZ_YEHN_ALGO_MASK)) >> RSZ_YENH_TYPE_SHIFT);
+
+ /* Luma enhancement reduces image width 1 pixels from left,right */
+ if (luma_enable)
+ cropsize->hcrop += 2;
+}
+
+/*
+ * This function free the input and output buffers alloated
+ */
+int free_buff(struct channel_config *rsz_conf_chan)
+{
+ int buffercounter = ZERO;
+
+ /* Free all the input buffers */
+ while (rsz_conf_chan->input_buffer[buffercounter] != NULL
+ && buffercounter < MAX_INPUT_BUFFERS) {
+ /* free the memory */
+ rsz_free_pages((unsigned long)rsz_conf_chan->input_buffer
+ [buffercounter], rsz_conf_chan->in_bufsize);
+ /* assign buffer zero to indicate its free */
+ rsz_conf_chan->input_buffer[buffercounter] = NULL;
+ buffercounter++;
+ }
+ buffercounter = ZERO;
+ /* free all the output buffers */
+ while (rsz_conf_chan->output_buffer[buffercounter] != NULL
+ && buffercounter < MAX_INPUT_BUFFERS) {
+ /* free the memory */
+ rsz_free_pages((unsigned long)rsz_conf_chan->output_buffer
+ [buffercounter], rsz_conf_chan->out_bufsize);
+ /* assign buffer zero to indicate its free */
+ rsz_conf_chan->output_buffer[buffercounter] = NULL;
+ buffercounter++;
+ }
+
+ return SUCESS;
+}
+
+/*
+ * This function creates a channels.
+ */
+static int rsz_open(struct inode *inode, struct file *filp)
+{
+ struct channel_config *rsz_conf_chan;
+ int buffercounter, ret;
+
+ if (filp->f_flags == O_NONBLOCK)
+ return -1;
+ /*
+ * if usage counter is greater than maximum supported channels
+ * return error
+ */
+ if (device_config.module_usage_count >= MAX_CHANNELS) {
+ dev_err(rsz_device,
+ "\n modules usage count is greater than supported ");
+ return -EBUSY;
+ }
+
+ /* allocate memory for a new configuration */
+ rsz_conf_chan = kmalloc(sizeof(struct channel_config), GFP_KERNEL);
+
+ if (rsz_conf_chan == NULL) {
+ dev_err(rsz_device,
+ "\n cannot allocate memory ro channel config");
+ return -ENOMEM;
+ }
+
+ dev_dbg(rsz_device,
+ "Malloc Done for channel configuration structure\n");
+
+ /* zeroing register config */
+ memset(&(rsz_conf_chan->register_config), ZERO,
+ sizeof(struct resizer_config));
+
+ /* Lock the global variable and increment the counter */
+ ret = down_interruptible(&device_config.device_mutex);
+ device_config.module_usage_count++;
+ up(&device_config.device_mutex);
+
+ /* STATE_NOT_CONFIGURED and priority to zero */
+ rsz_conf_chan->config_state = STATE_NOT_CONFIGURED;
+
+ /* Set priority to lowest for that configuration channel */
+ rsz_conf_chan->priority = MIN_PRIORITY;
+
+ rsz_conf_chan->status = CHANNEL_FREE;
+ /*
+ * Set configuration structure's input_buffer and output_buffer
+ * pointers to NULL
+ */
+
+ /* Help to initialize the input buffer to zero */
+ for (buffercounter = ZERO; buffercounter < MAX_INPUT_BUFFERS;
+ buffercounter++) {
+ rsz_conf_chan->input_buffer[buffercounter] = NULL;
+ }
+
+ for (buffercounter = ZERO; buffercounter < MAX_OUTPUT_BUFFERS;
+ buffercounter++) {
+ /* Help to initialize the output buffer to zero */
+ rsz_conf_chan->output_buffer[buffercounter] = NULL;
+
+ }
+ dev_dbg(rsz_device, "Initializing of channel done\n");
+
+ /* Initializing of application mutex */
+
+ init_completion(&(rsz_conf_chan->channel_sem));
+ //rsz_conf_chan->channel_sem.done = 0;
+
+ sema_init(&(rsz_conf_chan->chanprotection_sem), 1);
+
+ /* taking the configuartion structure in private data */
+ filp->private_data = rsz_conf_chan;
+
+ return SUCESS;
+
+}
+
+/*
+ * The Function is used to release the number of resources occupied
+ * by the channel
+ */
+static int rsz_release(struct inode *inode, struct file *filp)
+{
+ /*
+ * get the configuratin of this channel from private_date member of
+ * file
+ */
+ int ret = 0;
+ struct channel_config *rsz_conf_chan =
+ (struct channel_config *) filp->private_data;
+
+ ret = down_trylock(&(rsz_conf_chan->chanprotection_sem));
+ if (ret != 0) {
+
+ dev_dbg(rsz_device, "Channel in use");
+ return -EBUSY;
+ }
+
+ /* It will free all the input and output buffers */
+ free_buff(rsz_conf_chan);
+
+ /* Lock the global variable and decrement variable */
+ ret = down_interruptible(&device_config.device_mutex);
+ device_config.module_usage_count--;
+ up(&device_config.device_mutex);
+
+ kfree(rsz_conf_chan);
+
+ up(&(rsz_conf_chan->chanprotection_sem));
+
+ return SUCESS;
+}
+
+/*
+ * Function to map device memory into user space
+ */
+static int rsz_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+
+ /*
+ * get the configuration of this channel from private_data
+ * member of file for looping purpose
+ */
+ int buffercounter = ZERO;
+
+ /* for checking purpose */
+ int flag = ZERO;
+ /* Hold number of input and output buffer allocated */
+ int in_numbuffers = ZERO, out_numbuffers = ZERO;
+ int buffer_offset;
+
+ unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;
+
+ struct channel_config *rsz_conf_chan =
+ (struct channel_config *) filp->private_data;
+
+ /* Count the number of input buffers allocated */
+ while ((rsz_conf_chan->input_buffer[buffercounter]) != NULL) {
+ in_numbuffers++;
+ buffercounter++;
+ }
+ buffercounter = ZERO;
+
+ /* To Count the number of output buffers allocated */
+ while ((rsz_conf_chan->output_buffer[buffercounter]) != NULL) {
+ out_numbuffers++;
+ buffercounter++;
+ }
+
+ /* Find the input address which is to be mapped */
+ for (buffercounter = ZERO; buffercounter < in_numbuffers;
+ buffercounter++) {
+ buffer_offset =
+ virt_to_phys(rsz_conf_chan->input_buffer[buffercounter]);
+ if (buffer_offset == offset) {
+ flag = ADDRESS_FOUND;
+ break;
+ }
+ }
+ /* Find the output address which is to be mapped */
+ if (flag == ZERO) {
+ for (buffercounter = ZERO; buffercounter < out_numbuffers;
+ buffercounter++) {
+ buffer_offset =
+ virt_to_phys(rsz_conf_chan->
+ output_buffer[buffercounter]);
+ if (buffer_offset == offset) {
+ flag = ADDRESS_FOUND;
+ break;
+ }
+ }
+ }
+ /* The address to be mapped is not found so return error */
+
+ if (flag == ZERO)
+ return -EAGAIN;
+
+ dev_dbg(rsz_device, "The address mapped via mmap");
+ /* map the address from user space to kernel space */
+ if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+
+ return SUCESS;
+
+}
+
+/*
+ * This function will process IOCTL commands sent by the application and
+ * control the device IO operations.
+ */
+static long rsz_ioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret = ZERO;
+ /*
+ * get the configuratin of this channel from private_data member
+ * of file
+ */
+ struct channel_config *rsz_conf_chan =
+ (struct channel_config *) file->private_data;
+
+ /* Create the structures of different parameters passed by user */
+ struct rsz_priority *prio;
+ struct rsz_status *status;
+ struct rsz_resize *resize;
+
+ printk("DaVinci ioctl\r\n");
+ rsz_conf_chan = (struct channel_config *) file->private_data;
+ printk("DaVinci ioctl2\r\n");
+
+
+
+ ret = down_trylock(&(rsz_conf_chan->chanprotection_sem));
+ if (ret != 0) {
+ dev_dbg(rsz_device, "Channel in use");
+ return -EBUSY;
+ }
+ printk("DaVinci ioctl3\r\n");
+ /* Before decoding check for correctness of cmd */
+ if (_IOC_TYPE(cmd) != RSZ_IOC_BASE) {
+ dev_err(rsz_device, "Bad command Value\n");
+ return -1;
+ }
+ printk("DaVinci ioctl4\r\n");
+ if (_IOC_NR(cmd) > RSZ_IOC_MAXNR) {
+ dev_err(rsz_device, "Bad command Value\n");
+ return -1;
+ }
+ printk("DaVinci ioctl5\r\n");
+ /* veryfying access permission of commands */
+ if (_IOC_DIR(cmd) & _IOC_READ)
+ ret = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd));
+ else if (_IOC_DIR(cmd) & _IOC_WRITE)
+ ret = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd));
+ if (ret) {
+ dev_err(rsz_device, "access denied\n");
+ return -1; /* error in access */
+ }
+
+ /* switch according value of cmd */
+ switch (cmd) {
+ /*
+ * This ioctl is used to request frame buffers to be allocated
+ * by the RSZ module. The allocated buffers are channel
+ * specific and can be addressed by indexing
+ */
+ case RSZ_REQBUF:
+
+ /* Function to allocate the memory to input or output buffer */
+ ret = malloc_buff((struct rsz_reqbufs *)arg, rsz_conf_chan);
+ break;
+
+ /*
+ * This ioctl is used to query the physical address of a
+ * particular frame buffer
+ */
+ case RSZ_QUERYBUF:
+
+ /*
+ * Function to query the physical address of the buffer
+ * requested by index
+ */
+ ret = get_buf_address((struct rsz_buffer *)arg, rsz_conf_chan);
+ break;
+
+ /*
+ * This ioctl is used to set the priority of the current
+ * logical channel. If multiple resizing tasks from multiple
+ * logical channels are currently pending, the task associated
+ * with the highest priority logical channel will be executed
+ * first
+ */
+ case RSZ_S_PRIORITY:
+
+ dev_dbg(rsz_device, "\n resizer_Priority:start");
+ prio = (struct rsz_priority *)arg;
+ /* Check the prioroty range and assign the priority */
+ if (prio->priority > MAX_PRIORITY ||
+ prio->priority < MIN_PRIORITY)
+ return -EINVAL;
+ else {
+ rsz_conf_chan->priority = prio->priority;
+ }
+ dev_dbg(rsz_device, "\n resizer_Priority:end");
+ break;
+ /*
+ * This ioctl is used to get the priority of the current
+ * logic channel
+ */
+ case RSZ_G_PRIORITY:
+
+ dev_dbg(rsz_device, "\n Get resizer_Priority:start");
+ prio = (struct rsz_priority *)arg;
+ /* Get the priority from the channel */
+ prio->priority = rsz_conf_chan->priority;
+ dev_dbg(rsz_device, "\n Get resizer_Priority:end");
+ break;
+
+ /*
+ * This ioctl is used to set the parameters of the Resizer
+ * hardware, including input and output image size, horizontal
+ * and vertical poly-phase filter coefficients,luma enchancement
+ * filter coefficients etc
+ */
+ case RSZ_S_PARAM:
+
+ /* Function to set the hardware configuration */
+ ret = rsz_set_params((struct rsz_params *)arg, rsz_conf_chan);
+ break;
+
+ /*
+ * This ioctl is used to get the Resizer hardware settings
+ * associated with the current logical channel represented
+ * by fd.
+ */
+ case RSZ_G_PARAM:
+ /* Function to get the hardware configuration */
+ ret = rsz_get_params((struct rsz_params *)arg, rsz_conf_chan);
+ break;
+
+ /*
+ * This ioctl is used to check the current status of
+ * the Resizer hardware
+ */
+ case RSZ_G_STATUS:
+ status = (struct rsz_status *) arg;
+ status->chan_busy = rsz_conf_chan->status;
+ status->hw_busy = isbusy();
+ status->src = INPUT_RAM;
+ break;
+
+ /*
+ * This ioctl submits a resizing task specified by the
+ * rsz_resize structure.The call can either be blocked until
+ * the task is completed or returned immediately based
+ * on the value of the blocking argument in the rsz_resize
+ * structure. If it is blocking, the status of the task
+ * can be checked by calling ioctl RSZ_G_STATUS. Only one task
+ * can be outstanding for each logical channel.
+ */
+ case RSZ_RESIZE:
+
+ dev_dbg(rsz_device, "Beofre rsz_resize: PCR =%x", regr(PCR));
+ resize = (struct rsz_resize *) arg;
+
+ ret = rsz_start((struct rsz_resize *) arg, rsz_conf_chan);
+ break;
+
+ case RSZ_GET_CROPSIZE:
+
+ rsz_calculate_crop(rsz_conf_chan, (struct rsz_cropsize *)arg);
+ break;
+ case RSZ_S_EXP:
+ dev_dbg(rsz_device, "Before rsz_s_exp:SDR_REQ_EXP = %x",
+ regr(SDR_REQ_EXP));
+ rsz_set_exp(*((int *)arg));
+ break;
+
+ default:
+ dev_dbg(rsz_device, "resizer_ioctl: Invalid Command Value");
+ ret = -EINVAL;
+ }
+
+ up(&(rsz_conf_chan->chanprotection_sem));
+
+ return ret;
+}
+
+static const struct file_operations rsz_fops = {
+ .owner = THIS_MODULE,
+ .open = rsz_open,
+ .release = rsz_release,
+ .mmap = rsz_mmap,
+ .unlocked_ioctl = rsz_ioctl,
+};
+
+/*
+ * Function to register the Resizer character device driver
+ */
+irqreturn_t rsz_isr(int irq, void *dev_id)
+{
+ /* to suggest that resizing has been completed */
+ complete(&(device_config.sem_isr));
+
+ return IRQ_HANDLED;
+}
+static void resizer_platform_release(struct device *device)
+{
+ /* This is called when the reference count goes to zero */
+}
+static int resizer_probe(struct device *device)
+{
+ rsz_device = device;
+ return 0;
+}
+static int resizer_remove(struct device *device)
+{
+ return 0;
+}
+static struct class *rsz_class;
+
+static struct platform_device resizer_device = {
+ .name = "davinci_resizer",
+ .id = 2,
+ .dev = {
+ .release = resizer_platform_release,
+ }
+};
+
+static struct device_driver resizer_driver = {
+ .name = "davinci_resizer",
+ .bus = &platform_bus_type,
+ .probe = resizer_probe,
+ .remove = resizer_remove,
+};
+
+/*
+ * function to register resizer character driver
+ */
+static int rsz_init(void)
+{
+ int result;
+
+ device_config.module_usage_count = ZERO;
+ device_config.array_count = ZERO;
+
+ /* Register the driver in the kernel */
+
+ result = alloc_chrdev_region(&dev, ZERO, 1, DRIVER_NAME);
+ if (result < ZERO) {
+ printk(KERN_ERR "\nDaVinciresizer: Module intialization failed.\
+ could not register character device");
+ return -ENODEV;
+ }
+ /* Initialize of character device */
+ cdev_init(&c_dev, &rsz_fops);
+ c_dev.owner = THIS_MODULE;
+ c_dev.ops = &rsz_fops;
+
+ /* addding character device */
+ result = cdev_add(&c_dev, dev, 1);
+
+ if (result) {
+ printk("NOTICE \nDaVinciresizer:Error %d adding Davinciresizer\
+ ..error no:", result);
+ unregister_chrdev_region(dev, 1);
+ return result;
+ }
+
+ /* registeration of character device */
+ register_chrdev(MAJOR(dev), DRIVER_NAME, &rsz_fops);
+
+ /* register driver as a platform driver */
+ if (driver_register(&resizer_driver) != 0) {
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ /* Register the drive as a platform device */
+ if (platform_device_register(&resizer_device) != 0) {
+ driver_unregister(&resizer_driver);
+ unregister_chrdev_region(dev, 1);
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ rsz_class = class_create(THIS_MODULE, "davinci_resizer");
+
+ if (!rsz_class) {
+ platform_device_unregister(&resizer_device);
+ cdev_del(&c_dev);
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+
+ return -EIO;
+ }
+
+ device_create(rsz_class, NULL, dev, NULL, "davinci_resizer");
+
+ init_completion(&(device_config.sem_isr));
+
+ device_config.sem_isr.done = ZERO;
+
+ /* Initialize the device mutex */
+ sema_init(&device_config.array_sem, 1);
+ sema_init(&device_config.device_mutex, 1);
+
+ /* Set up the Interrupt handler for resizer interrupt */
+ result = request_irq(IRQ_RSZINT, rsz_isr, 0,
+ "dm644xresizer", (void *)NULL);
+ if (result < ZERO) {
+ printk("Cannot initialize IRQ \n");
+ platform_device_unregister(&resizer_device);
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+ return result;
+ }
+ rsz_set_exp(0xe);
+
+ return SUCESS;
+}
+
+/*
+ * Function is called by the kernel. It unregister the device.
+ */
+static void __exit rsz_cleanup(void)
+{
+ device_destroy(rsz_class, dev);
+
+ class_destroy(rsz_class);
+
+ driver_unregister(&resizer_driver);
+
+ free_irq(IRQ_RSZINT, (void *)NULL);
+
+ platform_device_unregister(&resizer_device);
+
+ cdev_del(&c_dev);
+
+ /* unregistering the driver from the kernel */
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+
+ unregister_chrdev_region(dev, 1);
+}
+
+module_init(rsz_init);
+module_exit(rsz_cleanup);
+
diff --git a/drivers/char/davinci_resizer_hw.c b/drivers/char/davinci_resizer_hw.c
new file mode 100644
index 00000000..ea683e8c
--- /dev/null
+++ b/drivers/char/davinci_resizer_hw.c
@@ -0,0 +1,127 @@
+/* *
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * This program is free software you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/davinci_resizer.h>
+#include "davinci_resizer_hw.h"
+
+/*
+ * Function to set hardware configuration registers
+ */
+void rsz_hardware_setup(struct channel_config *rsz_conf_chan)
+{
+ /* Counter to set the value of horizonatl and vertical coeff */
+ int coeffcounter;
+ /* for getting the coefficient offset */
+ int coeffoffset = ZERO;
+
+ /* clear the VPSS_PCR register buffer overflow bits */
+ regw(0x003c0000, VPSS_PCR);
+
+ /* setting the hardware register rszcnt */
+ regw(rsz_conf_chan->register_config.rsz_cnt, RSZ_CNT);
+
+ dev_dbg(rsz_device, "RSZ CNT : %x regr = %x \n",
+ rsz_conf_chan->register_config.rsz_cnt, regr(RSZ_CNT));
+
+ /* setting the hardware register instart */
+ regw(rsz_conf_chan->register_config.rsz_in_start, IN_START);
+
+ dev_dbg(rsz_device, "In START %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_in_start, regr(IN_START));
+
+ /* setting the hardware register insize */
+ regw(rsz_conf_chan->register_config.rsz_in_size, IN_SIZE);
+
+ dev_dbg(rsz_device, "In size %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_in_size, regr(IN_SIZE));
+ /* setting the hardware register outsize */
+ regw(rsz_conf_chan->register_config.rsz_out_size, OUT_SIZE);
+
+ dev_dbg(rsz_device, "out size %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_out_size, regr(OUT_SIZE));
+
+ /* setting the hardware register inaddress */
+ regw(rsz_conf_chan->register_config.rsz_sdr_inadd, SDR_INADD);
+
+ dev_dbg(rsz_device, "in address %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_sdr_inadd, regr(SDR_INADD));
+ /* setting the hardware register in offset */
+ regw(rsz_conf_chan->register_config.rsz_sdr_inoff, SDR_INOFF);
+
+ dev_dbg(rsz_device, "in offset %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_sdr_inoff, regr(SDR_INOFF));
+ /* setting the hardware register in offset */
+ /* setting the hardware register out address */
+ regw(rsz_conf_chan->register_config.rsz_sdr_outadd, SDR_OUTADD);
+
+ dev_dbg(rsz_device, "out addrsess %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_sdr_outadd,
+ regr(SDR_OUTADD));
+
+ /* setting the hardware register in offset */
+ /* setting the hardware register out offset */
+ regw(rsz_conf_chan->register_config.rsz_sdr_outoff, SDR_OUTOFF);
+
+ dev_dbg(rsz_device, "out offset %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_sdr_outoff,
+ regr(SDR_OUTOFF));
+
+ /* setting the hardware register yehn */
+ regw(rsz_conf_chan->register_config.rsz_yehn, YENH);
+
+ dev_dbg(rsz_device, "yehn %x regr = %x\n",
+ rsz_conf_chan->register_config.rsz_yehn, regr(YENH));
+
+ /* setting the hardware registers of coefficients */
+ for (coeffcounter = ZERO; coeffcounter < MAX_COEF_COUNTER;
+ coeffcounter++) {
+ regw(rsz_conf_chan->register_config.
+ rsz_coeff_horz[coeffcounter], ((HFILT10 + coeffoffset)));
+
+ regw(rsz_conf_chan->register_config.
+ rsz_coeff_vert[coeffcounter], ((VFILT10 + coeffoffset)));
+ coeffoffset = coeffoffset + COEFF_ADDRESS_OFFSET;
+ }
+}
+
+/*
+ * Function to enable the resizer
+ */
+int rsz_enable_dvrz(struct channel_config *rsz_conf_chan)
+{
+ /* Eanbling the resizer the setting enable bit */
+ rsz_conf_chan->register_config.rsz_pcr =
+ BITSET(rsz_conf_chan->register_config.rsz_pcr, SET_ENABLE_BIT);
+
+ regw(rsz_conf_chan->register_config.rsz_pcr, PCR);
+
+ dev_dbg(rsz_device, "the value of pcr is %x \n", regr(PCR));
+
+ regw(0x003c0000, VPSS_PCR);
+
+ return SUCESS;
+}
+
+int rsz_writebuffer_status(void)
+{
+ dev_dbg(rsz_device, "VPSS_PCR: %x\n", regr(VPSS_PCR));
+ return (regr(VPSS_PCR) >> 18) & 0xF;
+}
+
diff --git a/drivers/char/davinci_resizer_hw.h b/drivers/char/davinci_resizer_hw.h
new file mode 100644
index 00000000..5f0107e4
--- /dev/null
+++ b/drivers/char/davinci_resizer_hw.h
@@ -0,0 +1,61 @@
+/* *
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DAVINCI_RESIZER_HW
+#define DAVINCI_RESIZER_HW
+
+#include <linux/davinci_resizer.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
+
+/* Register offset mapping */
+#define PID 0x0000
+#define PCR 0x0004
+#define RSZ_CNT 0x0008
+#define OUT_SIZE 0x000C
+#define IN_START 0x0010
+#define IN_SIZE 0x0014
+#define SDR_INADD 0x0018
+#define SDR_INOFF 0x001C
+#define SDR_OUTADD 0x0020
+#define SDR_OUTOFF 0x0024
+#define HFILT10 0x0028
+#define VFILT10 0x0068
+#define COEFF_ADDRESS_OFFSET 0x04
+#define YENH 0x00A8
+
+#define VPSS_PCR (0x3404-0x0C00)
+#define SDR_REQ_EXP (0x3508-0x0C00)
+
+/* Register read/write */
+#define regw(val, reg) __raw_writel(val, ((reg) + RESIZER_IOBASE_VADDR))
+#define regr(reg) __raw_readl((reg) + RESIZER_IOBASE_VADDR)
+
+/* functions definition */
+void rsz_hardware_setup(struct channel_config *rsz_conf_chan);
+int rsz_enable_dvrz(struct channel_config *rsz_conf_chan);
+
+static inline void rsz_set_exp(int exp)
+{
+ regw(((exp & 0x3ff) << 10), SDR_REQ_EXP);
+}
+
+int rsz_writebuffer_status(void);
+#endif
+
diff --git a/drivers/char/davinci_vdce.c b/drivers/char/davinci_vdce.c
new file mode 100644
index 00000000..c3fdfc1a
--- /dev/null
+++ b/drivers/char/davinci_vdce.c
@@ -0,0 +1,2800 @@
+/* *
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not,write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* davinci_vdce.c file */
+
+/*Header files*/
+#include <linux/kernel.h>
+#include <linux/fs.h> /* everything... */
+#include <linux/errno.h> /* error codes */
+#include <linux/types.h> /* size_t */
+#include <linux/cdev.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <asm/uaccess.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include "davinci_vdce_hw.h"
+#include <linux/davinci_vdce.h>
+#include <linux/init.h>
+#include <asm/cacheflush.h>
+#include <mach/edma.h>
+#define TCINTEN_SHIFT 20
+#define ITCINTEN_SHIFT 21
+
+/* edma isr status tracking variable */
+volatile static int irqraised1 = 1;
+
+unsigned int vdce_counter = 0;
+unsigned int edma_counter = 0;
+#define DRIVERNAME "DavinciHD_vdce"
+#define VDCE_INTERRUPT 12
+
+MODULE_LICENSE("GPL");
+DECLARE_TASKLET(short_tasklet, process_bottomhalf, 0);
+
+/*Global structute shared between all applications
+ struct device_params device_config;*/
+device_params_t device_config;
+/* For registeration of character device*/
+static struct cdev c_dev;
+/* device structure to make entry in device*/
+static dev_t dev;
+/* for holding device entry*/
+struct device *vdce_device = NULL;
+
+static u32 inter_bufsize = 1920 * 1080;
+module_param(inter_bufsize, uint, S_IRUGO);
+
+channel_config_t *vdce_current_chan = NULL;
+
+static int dma_ch;
+
+/* default values for various modes */
+#define COMMON_DEFAULT_PARAMS {VDCE_PROGRESSIVE, VDCE_FRAME_MODE, \
+VDCE_FRAME_MODE, VDCE_FRAME_MODE, VDCE_LUMA_CHROMA_ENABLE, \
+VDCE_TOP_BOT_ENABLE, 720, 480, 120, 60, 0, 0, 0, 0, 0, 720, 480, 0, 0, 0}
+
+#define RSZ_DEFAULT_PARAMS {VDCE_MODE_422, VDCE_CODECMODE_MPEG2_MPEG4, \
+VDCE_ALGO_TAP_4LINEAR_INTERPOLATION, VDCE_ALGO_TAP_4LINEAR_INTERPOLATION, \
+VDCE_FEATURE_DISABLE, VDCE_FEATURE_DISABLE, VDCE_ALFMODE_AUTOMATIC, 0}
+
+#define CCV_DEFAULT_PARAMS {VDCE_CCV_MODE_422_420, VDCE_CODECMODE_MPEG2_MPEG4, \
+VDCE_CODECMODE_MPEG2_MPEG4, VDCE_ALGO_TAP_4LINEAR_INTERPOLATION, \
+VDCE_ALGO_TAP_4LINEAR_INTERPOLATION }
+
+#define RMAP_DEFAULT_PARAMS {10, VDCE_FEATURE_ENABLE, 10, VDCE_FEATURE_ENABLE}
+
+#define BLEND_TABLE {0x36, 0x22, 0x91, 0xff}
+
+#define BLEND_DEFAULT_PARAMS {VDCE_MODE_422, BLEND_TABLE, BLEND_TABLE, \
+BLEND_TABLE, BLEND_TABLE}
+
+#define EPAD_DEFAULT_PARAMS {16, 8, 16, 8}
+
+#define PRECODEC_PARAMS {RSZ_DEFAULT_PARAMS, CCV_DEFAULT_PARAMS}
+
+#define POSTCODEC_PARAMS {RSZ_DEFAULT_PARAMS, RMAP_DEFAULT_PARAMS, \
+BLEND_DEFAULT_PARAMS, CCV_DEFAULT_PARAMS}
+
+#define TRANSCODEC_PARAMS {RSZ_DEFAULT_PARAMS, RMAP_DEFAULT_PARAMS, \
+BLEND_DEFAULT_PARAMS, EPAD_DEFAULT_PARAMS, CCV_DEFAULT_PARAMS}
+
+/* Default pre-codec params */
+static vdce_params_t precodec_default_params = {
+ VDCE_OPERATION_PRE_CODECMODE,
+ 0x5,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.precodec_params = PRECODEC_PARAMS
+};
+
+/* Default post-codec params */
+static vdce_params_t postcodec_default_params = {
+ VDCE_OPERATION_POST_CODECMODE,
+ 0x1,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.postcodec_params.rsz_params = RSZ_DEFAULT_PARAMS,
+ .vdce_mode_params.postcodec_params.rmap_params = RMAP_DEFAULT_PARAMS,
+ .vdce_mode_params.postcodec_params.blend_params.blend_mode =
+ VDCE_MODE_422,
+ .vdce_mode_params.postcodec_params.blend_params.bld_lut[0] =
+ BLEND_TABLE,
+ .vdce_mode_params.postcodec_params.blend_params.bld_lut[1] =
+ BLEND_TABLE,
+ .vdce_mode_params.postcodec_params.blend_params.bld_lut[2] =
+ BLEND_TABLE,
+ .vdce_mode_params.postcodec_params.blend_params.bld_lut[3] =
+ BLEND_TABLE,
+ .vdce_mode_params.postcodec_params.ccv_params = CCV_DEFAULT_PARAMS
+};
+
+/* Default trans-codec params */
+static vdce_params_t transcodec_default_params = {
+ VDCE_OPERATION_TRANS_CODECMODE,
+ 0x1,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.transcodec_params.rsz_params = RSZ_DEFAULT_PARAMS,
+ .vdce_mode_params.transcodec_params.rmap_params = RMAP_DEFAULT_PARAMS,
+ .vdce_mode_params.transcodec_params.blend_params.blend_mode =
+ VDCE_MODE_422,
+ .vdce_mode_params.transcodec_params.blend_params.bld_lut[0] =
+ BLEND_TABLE,
+ .vdce_mode_params.transcodec_params.blend_params.bld_lut[1] =
+ BLEND_TABLE,
+ .vdce_mode_params.transcodec_params.blend_params.bld_lut[2] =
+ BLEND_TABLE,
+ .vdce_mode_params.transcodec_params.blend_params.bld_lut[3] =
+ BLEND_TABLE,
+ .vdce_mode_params.transcodec_params.epad_params = EPAD_DEFAULT_PARAMS,
+ .vdce_mode_params.transcodec_params.ccv_params = CCV_DEFAULT_PARAMS
+};
+
+/* Default edgepadding params */
+static vdce_params_t epad_default_params = {
+ VDCE_OPERATION_EDGE_PADDING,
+ 0x0,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.epad_params = EPAD_DEFAULT_PARAMS
+};
+
+/* Default resising params */
+static vdce_params_t rsz_default_params = {
+ VDCE_OPERATION_RESIZING,
+ 0x0,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.rsz_params = RSZ_DEFAULT_PARAMS
+};
+
+/* Default CCV params */
+static vdce_params_t ccv_default_params = {
+ VDCE_OPERATION_CHROMINANCE_CONVERSION,
+ 0x0,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.ccv_params = CCV_DEFAULT_PARAMS
+};
+
+/* Default blending params */
+static vdce_params_t blend_default_params = {
+ VDCE_OPERATION_BLENDING,
+ 0x0,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.blend_params.blend_mode = VDCE_MODE_422,
+ .vdce_mode_params.blend_params.bld_lut[0] = BLEND_TABLE,
+ .vdce_mode_params.blend_params.bld_lut[1] = BLEND_TABLE,
+ .vdce_mode_params.blend_params.bld_lut[2] = BLEND_TABLE,
+ .vdce_mode_params.blend_params.bld_lut[3] = BLEND_TABLE
+};
+
+/* Default rangemapping params */
+static vdce_params_t rmap_default_params = {
+ VDCE_OPERATION_RANGE_MAPPING,
+ 0x0,
+ COMMON_DEFAULT_PARAMS,
+ .vdce_mode_params.rmap_params = RMAP_DEFAULT_PARAMS
+};
+static int prcs_array_value[] = { 16, 32, 64, 128, 256 };
+
+/*
+ * vdce_free_pages : Function to free memory of buffers
+ */
+inline void vdce_free_pages(unsigned long addr, unsigned long bufsize)
+{
+ unsigned long size;
+ unsigned long tempaddr = addr;
+ if (!addr)
+ return;
+ size = PAGE_SIZE << (get_order(bufsize));
+ while (size > 0) {
+ ClearPageReserved(virt_to_page(addr));
+ addr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ free_pages(tempaddr, get_order(bufsize));
+}
+
+/*
+ * vdce_uservirt_to_phys : This inline function is used to
+ * convert user space virtual address to physical address.
+ */
+static inline unsigned long vdce_uservirt_to_phys(unsigned long virtp)
+{
+ unsigned long physp = 0;
+ struct mm_struct *mm = current->mm;
+ struct vm_area_struct *vma;
+ /* For kernel direct-mapped memory, take the easy way */
+ if (virtp >= PAGE_OFFSET)
+ physp = virt_to_phys((void *)virtp);
+
+ /* this will catch, kernel-allocated, mmaped-to-usermode addresses */
+ else if ((vma = find_vma(mm, virtp)) &&
+ (vma->vm_flags & VM_IO) && (vma->vm_pgoff)) {
+ physp = (vma->vm_pgoff << PAGE_SHIFT) + (virtp - vma->vm_start);
+ }
+ /* otherwise, use get_user_pages() for general userland pages */
+ else {
+ int res, nr_pages = 1;
+ struct page *pages;
+ down_read(&current->mm->mmap_sem);
+
+ res = get_user_pages(current, current->mm,
+ virtp, nr_pages, 1, 0, &pages, NULL);
+ up_read(&current->mm->mmap_sem);
+
+ if (res == nr_pages) {
+ physp =
+ __pa(page_address(&pages[0]) +
+ (virtp & ~PAGE_MASK));
+ } else {
+ dev_err(vdce_device,
+ " Unable to find phys addr for 0x%08lx\n",
+ virtp);
+ dev_err(vdce_device,
+ "get_user_pages() failed: %d\n", res);
+ }
+ }
+ return physp;
+}
+
+/*
+ * malloc_buff : Function to allocate memory to input
+ * and output buffers
+ */
+int malloc_buff(vdce_reqbufs_t * reqbuff, channel_config_t * vdce_conf_chan)
+{
+ /* for looping purpose */
+ int i = 0;
+ /* for pointing to input output buffer or bitmap pointer */
+ int *buf_ptr;
+ /* to calculate no of max buffers; */
+ int maxbuffers;
+ /* to calculate number of buffers allocated */
+ int numbuffers = 0;
+ /* for storing buffer size */
+ int *buf_size;
+ /* Stores requested buffer size */
+ unsigned int req_buffersize = 0;
+ /* to make sure buffer pointer never swapped */
+ unsigned long adr;
+ unsigned long size;
+ int multiplier;
+
+ dev_dbg(vdce_device, " <fn> malloc_buff Entering E </fn>\n");
+
+ dev_dbg(vdce_device, "Input buffer requested \n");
+ buf_ptr =
+ (unsigned int *)vdce_conf_chan->vdce_buffer[reqbuff->
+ buf_type].buffers;
+ buf_size = &vdce_conf_chan->vdce_buffer[reqbuff->buf_type].size;
+ maxbuffers = MAX_BUFFERS;
+ numbuffers =
+ vdce_conf_chan->vdce_buffer[reqbuff->buf_type].num_allocated;
+ if (reqbuff->buf_type > VDCE_BUF_BMP) {
+ dev_dbg(vdce_device, "Invalid type \n");
+ return -EINVAL;
+ }
+ multiplier = GET_DIVIDE_FACTOR(reqbuff->image_type);
+ req_buffersize =
+ ((reqbuff->num_lines * reqbuff->bytes_per_line * multiplier) / 2);
+ /* check the request for number of buffers */
+ if (reqbuff->count > maxbuffers)
+ return -EINVAL;
+
+ /* free all the buffers if the count is zero */
+ if ((reqbuff->count == FREE_BUFFER) ||
+ ((numbuffers != 0) && (req_buffersize != *buf_size))) {
+ /* free all the buffers */
+ free_num_buffers(buf_ptr, *buf_size, numbuffers);
+ return 0;
+ }
+ dev_dbg(vdce_device,
+ "The no of requested buffers are %d \n ", reqbuff->count);
+ /* free the remainning buffers . ie total allocated is 7 requested is 5
+ than free 2 buffers */
+ if ((numbuffers - reqbuff->count) > 0) {
+ buf_ptr = buf_ptr + reqbuff->count;
+ /* free the remainning buffers */
+ free_num_buffers(buf_ptr, *buf_size,
+ (numbuffers - reqbuff->count));
+ } else {
+ buf_ptr = buf_ptr + numbuffers;
+ for (i = numbuffers; i < reqbuff->count; i++) {
+ /* assign memory to buffer */
+ *buf_ptr =
+ (int)(__get_free_pages
+ (GFP_KERNEL | GFP_DMA,
+ get_order(req_buffersize)));
+ if (!(*buf_ptr)) {
+ reqbuff->count = numbuffers + i;
+ *buf_size = req_buffersize;
+ dev_dbg(vdce_device,
+ "requestbuffer:not enough memory");
+ return -ENOMEM;
+ }
+ adr = *buf_ptr;
+ size = PAGE_SIZE << (get_order(req_buffersize));
+ while (size > 0) {
+ /* make sure the frame buffers
+ are never swapped out of memory */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ buf_ptr++;
+ }
+ }
+ reqbuff->count = numbuffers + i;
+
+ vdce_conf_chan->vdce_buffer[reqbuff->buf_type].num_allocated =
+ numbuffers + i;
+ /* set the buffer size to requested size */
+ /* this will be useful only when numbuffers = 0 */
+ *buf_size = req_buffersize;
+ dev_dbg(vdce_device, "<fn> malloc_buff Leaving </fn>\n");
+ return 0;
+}
+
+/*
+ * free_num_buffers :Function to free the number of
+ * buffers specified by count
+ */
+int free_num_buffers(int *addr, unsigned long bufsize, unsigned long count)
+{
+ int i;
+ for (i = 0; i < count; i++) {
+ /* free memory allocate for the image */
+ dev_dbg(vdce_device, "Free all the allocated buffers \n");
+ /* free buffers using free_pages */
+ vdce_free_pages((int)*addr, bufsize);
+ /* assign buffer zero to indicate its free */
+ *addr = (int)NULL;
+ addr++;
+ }
+ return 0;
+}
+
+/*
+ * get_buf_address : Function to query the physical address
+ * of the buffer requested by index
+ */
+int get_buf_address(vdce_buffer_t * buffer, channel_config_t * vdce_conf_chan)
+{
+ dev_dbg(vdce_device, "<fn>get_buf_address Entering </fn>\n");
+ if (!buffer || !vdce_conf_chan) {
+ dev_err(vdce_device, "query_buffer: error in argument\n");
+ return -EINVAL;
+ }
+ if (buffer->buf_type > VDCE_BUF_BMP) {
+ dev_dbg(vdce_device, "Invalid type \n");
+ return -EINVAL;
+ }
+ /*checking the index requested */
+ if (buffer->index >=
+ (vdce_conf_chan->vdce_buffer[buffer->buf_type].num_allocated)) {
+ dev_dbg(vdce_device, "Requested buffer not allocated \n");
+ return -EINVAL;
+ }
+ /* assignning the input address to offset which will be
+ used in mmap */
+ buffer->offset =
+ (unsigned int)vdce_conf_chan->vdce_buffer[buffer->buf_type].
+ buffers[buffer->index];
+ buffer->size = vdce_conf_chan->vdce_buffer[buffer->buf_type].size;
+ buffer->offset = virt_to_phys((void *)buffer->offset);
+
+ dev_dbg(vdce_device, "the physical offset returned after query \
+ is %x", buffer->offset);
+ dev_dbg(vdce_device, "<fn>get_buf_address Leaving </fn>\n");
+ return 0;
+}
+
+/*
+ * free_buff : This function free the input and output buffers alloated
+ */
+int free_buff(channel_config_t * vdce_conf_chan)
+{
+ int buffercounter = 0;
+ int i;
+ dev_dbg(vdce_device, " <fn>free_buff E</fn>\n");
+ /* free all the buffers */
+ for (i = 0; i < 3; i++) {
+ while ((vdce_conf_chan->vdce_buffer[i].
+ buffers[buffercounter] != NULL)
+ && buffercounter < MAX_BUFFERS) {
+ /* free the memory */
+ vdce_free_pages((unsigned long)vdce_conf_chan->
+ vdce_buffer[i].buffers[buffercounter]
+ , vdce_conf_chan->vdce_buffer[i].size);
+ /* assign buffer zero to indicate its free */
+ vdce_conf_chan->vdce_buffer[i].
+ buffers[buffercounter] = (unsigned long)NULL;
+ buffercounter++;
+ }
+ buffercounter = 0;
+ }
+ dev_dbg(vdce_device, "<fn> free_buff L</fn>\n");
+ return 0;
+}
+
+/*
+edma call back function.
+*/
+static void callback1(unsigned lch, u16 ch_status, void *data)
+{
+ switch(ch_status) {
+ case DMA_COMPLETE:
+ irqraised1 = 1;
+ break;
+ case DMA_CC_ERROR:
+ printk("Cannot Complete\n");
+ break;
+ default:
+ break;
+ }
+ if (unlikely(ch_status != DMA_COMPLETE)) {
+ printk("Cannot Complete\n");
+ }
+ irqraised1 = 1;
+ complete(&(device_config.edma_sem));
+}
+
+/* edma3 memcpy functiom which copies the luma data
+*/
+static int edma3_memcpy(int acnt, int bcnt, int ccnt,
+ vdce_address_start_t * vdce_start)
+{
+ int result = 0;
+ int i, p = 0;
+ unsigned int Istestpassed = 0u;
+ unsigned int numenabled = 0;
+ unsigned int BRCnt = 0;
+ int srcbidx = 0;
+ int desbidx = 0;
+ int srccidx = 0;
+ int descidx = 0;
+ unsigned int numtimes = 0;
+ unsigned int src_inc = 0, dst_inc = 0;
+ struct edmacc_param param_set;
+
+ /* Setting up the SRC/DES Index */
+ srcbidx = vdce_start->src_horz_pitch;
+ desbidx = vdce_start->res_horz_pitch;
+
+ if (ccnt == 2 && (((bcnt != vdce_start->buffers[1].
+ size / (vdce_start->res_horz_pitch * 4))) ||
+ ((bcnt != vdce_start->buffers[0].
+ size / (vdce_start->src_horz_pitch * 4))))) {
+
+ numtimes = 1;
+ srccidx = acnt;
+ descidx = acnt;
+ BRCnt = bcnt;
+ src_inc = 0;
+ dst_inc = 0;
+ ccnt = 1;
+ } else {
+ /* A Sync Transfer Mode */
+ srccidx = acnt;
+ descidx = acnt;
+ BRCnt = bcnt;
+ src_inc = 0;
+ dst_inc = 0;
+ numtimes = 0;
+ }
+ if (ccnt == 2 && ((bcnt == vdce_start->buffers[1].
+ size / (vdce_start->res_horz_pitch * 4)))) {
+ bcnt = bcnt * 2;
+ }
+ src_inc = 0;
+ dst_inc = 0;
+
+ for (p = 0; p <= numtimes; p++) {
+ /* Set the Source EDMA Params */
+ edma_set_src(dma_ch, (unsigned long)(vdce_start->
+ buffers[0].offset + src_inc), INCR, W8BIT);
+ /* Set the Destination EDMA Params */
+ edma_set_dest(dma_ch, (unsigned long) (vdce_start->
+ buffers[1].offset + dst_inc), INCR, W8BIT);
+ /* Set the Source Index */
+ edma_set_src_index(dma_ch, srcbidx, srccidx);
+ /* Set the Destination Index */
+ edma_set_dest_index(dma_ch, desbidx, descidx);
+ /* Set the Transfer Params */
+ edma_set_transfer_params(dma_ch, acnt, bcnt, ccnt, BRCnt,
+ ABSYNC);
+ edma_read_slot(dma_ch, &param_set);
+ param_set.opt |= (1 << ITCINTEN_SHIFT);
+ param_set.opt |= (1 << TCINTEN_SHIFT);
+ param_set.opt |= EDMA_TCC(EDMA_CHAN_SLOT(dma_ch));
+ edma_write_slot(dma_ch, &param_set);
+
+ numenabled = 1;
+
+ for (i = 0; i < numenabled; i++) {
+ irqraised1 = 0;
+
+ /*
+ * Now enable the transfer as calculated above.
+ */
+ device_config.edma_sem.done = 0;
+ result = edma_start(dma_ch);
+ if (result != 0) {
+ dev_err(vdce_device, "dma start failed \n");
+ break;
+ }
+ result = wait_for_completion_interruptible(&(device_config.edma_sem));
+ if(result) {
+ wait_for_completion(&(device_config.edma_sem));
+ }
+
+ /* Check the status of the completed transfer */
+ if (irqraised1 < 0) {
+ /* Some error occured, break from the FOR loop. */
+ edma_stop(dma_ch);
+ result = -EAGAIN;
+ break;
+ }
+ }
+ Istestpassed = 1;
+
+ src_inc = vdce_start->buffers[0].size / 4;
+ dst_inc = vdce_start->buffers[1].size / 4;
+ }
+ return result;
+}
+
+/*
+ * vdce_set_address : This function is used to set the addres register
+ */
+int vdce_set_address(vdce_address_start_t * vdce_start,
+ channel_config_t * vdce_conf_chan, int num_pass,
+ unsigned int res_size, unsigned int address,
+ unsigned int pitch)
+{
+
+ int no_of_lines = 0, no_of_lines_output = 0;
+ int divider;
+ unsigned int multiplier = 1;
+ unsigned int temp_lines = 1;
+ unsigned int src_vsp = 0;
+ unsigned int res_vsp = 0;
+ int res_mode, src_mode;
+ unsigned int src_pitch, res_pitch, src_address;
+ unsigned int flag = 0, buffer_index, res_address;
+
+ dev_dbg(vdce_device, "<fn> vdce_set_address E </fn>\n");
+ /* Top field luma address is the src starting address */
+ src_address = vdce_start->buffers[0].offset;
+ src_pitch = vdce_start->src_horz_pitch;
+ /* For resizing set source mode for second pass equals result mode */
+ src_mode = vdce_conf_chan->get_params.common_params.src_mode;
+
+ if (vdce_conf_chan->num_pass == VDCE_MULTIPASS) {
+ if (num_pass == 1 &&
+ (vdce_conf_chan->luma_chroma_phased == 0) &&
+ vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING) {
+ src_mode =
+ vdce_conf_chan->get_params.common_params.res_mode;
+ }
+ }
+ if (num_pass == 1) {
+ if (vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING) {
+ src_address = address;
+ src_pitch = vdce_start->res_horz_pitch;
+ } else {
+ src_pitch =
+ vdce_conf_chan->register_config[0].
+ vdce_res_strt_off_ytop;
+
+ src_address =
+ vdce_conf_chan->
+ register_config[0].vdce_res_strt_add_ytop;
+ }
+ }
+ vdce_conf_chan->register_config[num_pass].vdce_src_strt_add_ytop =
+ src_address +
+ (vdce_conf_chan->get_params.common_params.src_vsp_luminance *
+ vdce_start->src_horz_pitch);
+ if (vdce_conf_chan->get_params.common_params.src_mode ==
+ VDCE_FIELD_MODE) {
+ src_vsp =
+ vdce_conf_chan->get_params.common_params.
+ src_vsp_luminance * vdce_start->src_horz_pitch;
+ }
+ /* no of lines in horizonatl direction for top/bottom field data */
+ /* ie if v pitch is 48num_pass than ytop will be of 240 lines */
+ if (vdce_conf_chan->image_type_in == VDCE_IMAGE_FMT_420) {
+ vdce_start->buffers[0].size =
+ (vdce_start->buffers[0].size * 4) / 3;
+ }
+ no_of_lines = (vdce_start->buffers[0].size / (4));
+
+ if ((vdce_conf_chan->get_params.common_params.
+ src_processing_mode == VDCE_INTERLACED)
+ && (src_mode == VDCE_FRAME_MODE)) {
+ multiplier = 1;
+ }
+ /* offset would be horizontal luma size */
+ vdce_conf_chan->register_config[num_pass].vdce_src_add_ofst_ytop =
+ src_pitch * multiplier;
+ /* offset configuration */
+ vdce_conf_chan->register_config[num_pass].vdce_src_add_ofst_ybot =
+ src_pitch * multiplier;
+ vdce_conf_chan->register_config[num_pass].vdce_src_add_ofst_ctop =
+ vdce_start->src_horz_pitch * multiplier;
+ vdce_conf_chan->register_config[num_pass].vdce_src_add_ofst_cbot =
+ vdce_start->src_horz_pitch * multiplier;
+
+ /* configure bottom field luma addreess is ytop + (no_of_lines*hpitch) */
+ multiplier = src_pitch;
+ if (src_mode == VDCE_FIELD_MODE) {
+ temp_lines = no_of_lines;
+ multiplier = 1;
+ }
+ /* offset would be horizontal luma size */
+ vdce_conf_chan->register_config[num_pass].vdce_src_strt_add_ybot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_ytop + (temp_lines * multiplier));
+
+ if (num_pass == 1 && (src_mode == VDCE_FIELD_MODE)) {
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_ybot = vdce_conf_chan->
+ register_config[0].vdce_res_strt_add_ybot;
+ }
+ if (vdce_conf_chan->num_pass == VDCE_MULTIPASS) {
+ if (num_pass == 0) {
+ src_address = vdce_start->buffers[0].offset +
+ (vdce_conf_chan->get_params.common_params.src_vsp_luminance *
+ src_pitch);
+ } else {
+ src_address = vdce_start->buffers[0].offset;
+ }
+ } else {
+ src_address = vdce_start->buffers[0].offset +
+ (vdce_conf_chan->get_params.common_params.src_vsp_luminance *
+ src_pitch);
+ }
+ if (num_pass != 1) {
+ if (vdce_conf_chan->image_type_in == VDCE_IMAGE_FMT_420) {
+ src_address = vdce_start->buffers[0].offset +
+ (no_of_lines * 2) + ((vdce_conf_chan->get_params.common_params.src_vsp_luminance/2) * src_pitch);
+ }
+ else {
+ src_address = (src_address + ((no_of_lines * 2)));
+ }
+ }
+ vdce_conf_chan->register_config[num_pass].vdce_src_strt_add_ctop =
+ (src_address);
+
+ divider = GET_CHROMA_DIVIDE_FACTOR(vdce_conf_chan->image_type_in);
+ if (src_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_cbot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_ctop + vdce_start->src_horz_pitch);
+ } else {
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_cbot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_ctop + ((temp_lines * 2 / divider)));
+ }
+ /* bitmap offset configuration is bitmap hsize */
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_off_bmp_top = vdce_start->bmp_pitch;
+
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_off_bmp_bot = vdce_start->bmp_pitch;
+ /* bitmap starting address is starting address for bitmap offset */
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_bmp_top = vdce_start->buffers[2].offset;
+
+ /* bitmap bottom field starting address */
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_bmp_bot =
+ vdce_conf_chan->register_config[num_pass].
+ vdce_src_strt_add_bmp_top +
+ (vdce_conf_chan->get_params.common_params.bmp_vsize / 2);
+
+ /* result address for top field */
+ if (vdce_conf_chan->image_type_out == VDCE_IMAGE_FMT_420) {
+ vdce_start->buffers[1].size =
+ (vdce_start->buffers[1].size * 4) / 3;
+ }
+ no_of_lines_output = (vdce_start->buffers[1].size / (2));
+
+ res_mode = vdce_conf_chan->get_params.common_params.res_mode;
+ if (vdce_conf_chan->num_pass == VDCE_MULTIPASS) {
+ if (num_pass == 0 && (vdce_conf_chan->luma_chroma_phased == 0)) {
+ if (vdce_conf_chan->mode_state ==
+ VDCE_OPERATION_BLENDING) {
+ res_mode = vdce_conf_chan->
+ get_params.common_params.src_mode;
+ address = vdce_start->buffers[0].offset;
+ }
+ flag = 1;
+ }
+ }
+ buffer_index = (flag == 1) ? 0 : 1;
+ res_pitch = vdce_start->res_horz_pitch;
+ if (buffer_index == 0) {
+ res_pitch = pitch;
+
+ }
+ if (vdce_conf_chan->num_pass != VDCE_MULTIPASS) {
+ address = vdce_start->buffers[buffer_index].offset;
+ }
+
+ /* top field luma address is the src starting address */
+ vdce_conf_chan->register_config[num_pass].vdce_res_strt_add_ytop =
+ address +
+ (vdce_conf_chan->get_params.common_params.res_vsp_luminance *
+ vdce_start->res_horz_pitch);
+ if (vdce_conf_chan->get_params.common_params.res_mode ==
+ VDCE_FIELD_MODE) {
+ res_vsp =
+ vdce_conf_chan->get_params.common_params.
+ res_vsp_luminance * vdce_start->res_horz_pitch;
+ }
+ multiplier = 1;
+ /* offset would be horizontal luma size */
+ if ((vdce_conf_chan->get_params.common_params.
+ src_processing_mode == VDCE_INTERLACED)
+ && (vdce_conf_chan->get_params.common_params.res_mode ==
+ VDCE_FRAME_MODE)) {
+ multiplier = 1;
+ }
+ vdce_conf_chan->register_config[num_pass].vdce_res_strt_off_ytop =
+ res_pitch * multiplier;
+ /* offset configuration */
+ vdce_conf_chan->register_config[num_pass].vdce_res_strt_off_ybot =
+ res_pitch * multiplier;
+ vdce_conf_chan->register_config[num_pass].vdce_res_strt_off_ctop =
+ vdce_start->res_horz_pitch * multiplier;
+ vdce_conf_chan->register_config[num_pass].vdce_res_strt_off_cbot =
+ vdce_start->res_horz_pitch * multiplier;
+
+ /* no of lines in horizonatl direction for top/bottom field data */
+ /* ie if v pitch is 48num_pass than ytop will be of 24num_pass lines */
+ dev_dbg(vdce_device, "The number of lines are %d\n\n",
+ no_of_lines_output);
+
+ /* configure bottom field luma addreess */
+ if (res_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->
+ register_config[num_pass].vdce_res_strt_add_ybot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_res_strt_add_ytop + res_pitch);
+ } else {
+
+ if ((vdce_conf_chan->num_pass == VDCE_MULTIPASS) &&
+ (num_pass == 0)
+ && (vdce_conf_chan->luma_chroma_phased == 0)) {
+ if (vdce_conf_chan->mode_state ==
+ VDCE_OPERATION_BLENDING) {
+
+ vdce_conf_chan->register_config[num_pass].
+ vdce_res_strt_add_ybot =
+ vdce_conf_chan->
+ register_config[num_pass].
+ vdce_src_strt_add_ybot;
+ } else {
+ vdce_conf_chan->register_config[num_pass].
+ vdce_res_strt_add_ybot =
+ (vdce_conf_chan->
+ register_config[num_pass].
+ vdce_res_strt_add_ytop) + (res_size / 4);
+ }
+
+ } else {
+
+ vdce_conf_chan->
+ register_config[num_pass].
+ vdce_res_strt_add_ybot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_res_strt_add_ytop +
+ (((no_of_lines_output / 2))));
+ }
+ }
+ /* configure top field chroma addreess */
+ if (vdce_conf_chan->num_pass == VDCE_MULTIPASS) {
+ if (num_pass == 1) {
+ res_address = vdce_start->buffers[1].offset +
+ (vdce_conf_chan->get_params.common_params.res_vsp_luminance *
+ vdce_start->res_horz_pitch);
+ } else {
+ res_address = vdce_start->buffers[1].offset;
+ }
+ } else {
+ res_address = vdce_start->buffers[1].offset +
+ (vdce_conf_chan->get_params.common_params.res_vsp_luminance *
+ vdce_start->res_horz_pitch);
+ }
+ if (flag == 0) {
+ if (vdce_conf_chan->image_type_out == VDCE_IMAGE_FMT_420) {
+ res_address = vdce_start->buffers[1].offset +
+ no_of_lines_output + ((vdce_conf_chan->get_params.common_params.res_vsp_luminance/2) * vdce_start->res_horz_pitch);
+ } else {
+ res_address = (res_address + (no_of_lines_output));
+ }
+ }
+ vdce_conf_chan->register_config[num_pass].vdce_res_strt_add_ctop =
+ (res_address);
+
+ /* configuration of cbottom */
+ divider = GET_CHROMA_DIVIDE_FACTOR(vdce_conf_chan->image_type_out);
+ if (res_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->
+ register_config[num_pass].vdce_res_strt_add_cbot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_res_strt_add_ctop + vdce_start->res_horz_pitch);
+ } else {
+ vdce_conf_chan->
+ register_config[num_pass].vdce_res_strt_add_cbot =
+ (vdce_conf_chan->register_config[num_pass].
+ vdce_res_strt_add_ctop + ((no_of_lines_output / divider)));
+ }
+ dev_dbg(vdce_device, "<fn >Leaving out of set address </fn>\n");
+ /* configure top field chroma addreess */
+ return 0;
+}
+
+/*
+ * vdce_set_multipass_address :This function is process in 4:2:2 format for
+ * resizing and blending mode
+ */
+int vdce_set_multipass_address(vdce_address_start_t * vdce_start,
+ channel_config_t * vdce_conf_chan)
+{
+
+ static unsigned int temp_address;
+ int ret = 0;
+ int temp_size;
+ int divider = 2;
+ int req_size = 0;
+ unsigned int address = 0, pitch = 0, res_size = 0;
+ unsigned int temp_pitch;
+
+ dev_dbg(vdce_device,
+ "<fn>vdce_set_multipass_address Entering\n</fn>");
+ /* initially this first pass , so we have this flag as started */
+ /* take the offset and pitch into temporary variables */
+ req_size = (vdce_conf_chan->get_params.common_params.
+ src_hsz_luminance *
+ vdce_conf_chan->get_params.common_params.src_vsz_luminance);
+ if (device_config.inter_size < req_size) {
+ dev_err(vdce_device,
+ "intermediate buffer size is less than required\n");
+ return -EINVAL;
+ }
+ temp_address = vdce_start->buffers[1].offset;
+ address = vdce_start->buffers[1].offset;
+ if (vdce_conf_chan->mode_state == VDCE_OPERATION_BLENDING) {
+ pitch = vdce_start->src_horz_pitch;
+ } else {
+ pitch = vdce_start->res_horz_pitch;
+ }
+ temp_size = vdce_start->buffers[1].size;
+ res_size = temp_size;
+
+ vdce_start->buffers[1].size = ((device_config.inter_size * 2));
+
+ /* Since first we have to do 4:2:2 to 4:2:0 */
+ /* assign in intermediate address to output address */
+ vdce_start->buffers[1].offset =
+ virt_to_phys(((void *)device_config.inter_buffer));
+ /* change the output size */
+ vdce_conf_chan->register_config[0].res_Y_sz =
+ ((vdce_conf_chan->get_params.common_params.
+ dst_hsz_luminance << RES_Y_HSZ_SHIFT)
+ & (RES_Y_HSZ_MASK));
+ if (vdce_conf_chan->get_params.common_params.src_processing_mode ==
+ VDCE_INTERLACED) {
+ divider = 4;
+ }
+ vdce_conf_chan->register_config[0].res_C_sz |=
+ ((vdce_conf_chan->get_params.common_params.dst_vsz_luminance /
+ divider << RES_C_VSZ_SHIFT) & (RES_C_VSZ_MASK));
+ if (vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING) {
+ vdce_conf_chan->register_config[1].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[1].
+ vdce_ctrl, SET_CHROMA_ENABLE);
+ vdce_conf_chan->register_config[1].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[1].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_CHROMA_ENABLE);
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ }
+ /* assignning the address to the register configuration */
+ ret = vdce_set_address(vdce_start, vdce_conf_chan, 0,
+ res_size, address, pitch);
+
+ /* second pass. configuration */
+ vdce_start->buffers[0].offset =
+ virt_to_phys(((void *)device_config.inter_buffer));
+ /* configure input pitch */
+ vdce_start->buffers[0].size = ((device_config.inter_size * 2));
+ vdce_start->buffers[1].size = temp_size;
+ /*configure output pitch and address */
+ vdce_start->buffers[1].offset = temp_address;
+
+ /* configure the addrress */
+ temp_pitch = vdce_start->src_horz_pitch;
+ vdce_start->src_horz_pitch = vdce_start->res_horz_pitch;
+ ret = vdce_set_address(vdce_start, vdce_conf_chan, 1,
+ res_size, address, pitch);
+ vdce_start->src_horz_pitch = temp_pitch;
+
+ /* configure input and output size */
+ vdce_conf_chan->register_config[1].src_Y_sz &= ~(SRC_Y_VSZ_MASK);
+ if (vdce_conf_chan->get_params.common_params.src_processing_mode ==
+ VDCE_INTERLACED) {
+ divider = 2;
+ } else {
+ divider = 1;
+ }
+
+ vdce_conf_chan->register_config[0].res_Y_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance / divider << RES_Y_VSZ_SHIFT)
+ & (RES_Y_VSZ_MASK));
+
+ vdce_conf_chan->register_config[1].src_Y_sz =
+ ((vdce_conf_chan->get_params.common_params.dst_hsz_luminance
+ << SRC_Y_HSZ_SHIFT) & (SRC_Y_HSZ_MASK));
+
+ vdce_conf_chan->register_config[1].src_C_sz =
+ ((vdce_conf_chan->get_params.common_params.
+ dst_hsz_luminance << SRC_C_HSZ_SHIFT) & (SRC_C_HSZ_MASK));
+
+ vdce_conf_chan->register_config[1].res_Y_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_hsz_luminance << RES_Y_HSZ_SHIFT)
+ & (RES_Y_HSZ_MASK));
+
+ if (vdce_conf_chan->get_params.common_params.src_processing_mode
+ == VDCE_INTERLACED) {
+
+ vdce_conf_chan->register_config[1].res_Y_sz |=
+ (((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance / 2) << RES_Y_VSZ_SHIFT) &
+ (RES_Y_VSZ_MASK));
+ vdce_conf_chan->register_config[1].src_Y_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance / 2 << SRC_Y_VSZ_SHIFT) &
+ (SRC_Y_VSZ_MASK));
+ vdce_conf_chan->register_config[1].src_C_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance / 4 << SRC_C_VSZ_SHIFT) &
+ (SRC_C_VSZ_MASK));
+ } else {
+ vdce_conf_chan->register_config[1].res_Y_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance << RES_Y_VSZ_SHIFT) & (RES_Y_VSZ_MASK));
+ vdce_conf_chan->register_config[1].src_Y_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance << SRC_Y_VSZ_SHIFT) & (SRC_Y_VSZ_MASK));
+ vdce_conf_chan->register_config[1].src_C_sz |=
+ ((vdce_conf_chan->get_params.common_params.
+ dst_vsz_luminance / 2 << SRC_C_VSZ_SHIFT) &
+ (SRC_C_VSZ_MASK));
+ }
+ /* function to enable hardware */
+ dev_dbg(vdce_device,
+ "<fn>vdce_set_multipass_address Leaving\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_start : This function enable the resize bit after doing
+ * the hardware register configuration after which resizing
+ * will be carried on.
+ */
+int vdce_start(vdce_address_start_t * vdce_start,
+ channel_config_t * vdce_conf_chan)
+{
+ /* holds the return value; */
+ int ret = 0;
+ /* conatains the input put and output buffer allocated size */
+ int bufsize[3];
+ int divider_in, divider_out, blend_enable, i;
+ int dst_hsz_luma = 0, dst_vsz_luma = 0;
+ int ccnt = 1;
+ unsigned int ccv_only = 0, luma_status = 0;
+
+ if(vdce_conf_chan->status == VDCE_CHAN_UNINITIALISED){
+ dev_err(vdce_device, "channel un-initialized\n");
+ return -EINVAL;
+ }
+
+ if((vdce_conf_chan->channel_mode == VDCE_MODE_NON_BLOCKING)
+ && vdce_isbusy()){
+ return -EBUSY;
+ }
+
+ /* check tht hpitch and vpitch should be greater or equal
+ than hsize and vsize */
+ if (vdce_start->src_horz_pitch <
+ vdce_conf_chan->get_params.common_params.src_hsz_luminance) {
+ dev_err(vdce_device, "src horizontal pitch less than width \n");
+ return -EINVAL;
+ }
+ if (vdce_start->res_horz_pitch
+ < vdce_conf_chan->get_params.common_params.dst_hsz_luminance) {
+ dev_err(vdce_device, "horizontal pitch less than width \n");
+ return -EINVAL;
+ }
+ divider_in = GET_DIVIDE_FACTOR(vdce_conf_chan->image_type_in);
+ divider_out = GET_DIVIDE_FACTOR(vdce_conf_chan->image_type_out);
+ /* check for the 8byte alignment for input address of
+ ytop,ybot,ctop and cbot in both image format */
+
+ /* get the buffer size */
+ bufsize[VDCE_BUF_IN] =
+ (vdce_start->src_horz_pitch *
+ (vdce_conf_chan->get_params.common_params.src_vsz_luminance *
+ divider_in / 2));
+ bufsize[VDCE_BUF_OUT] =
+ (vdce_start->res_horz_pitch *
+ (vdce_conf_chan->get_params.common_params.dst_vsz_luminance *
+ divider_out) / 2);
+ if ((vdce_start->res_horz_pitch) % 0x8 != 0) {
+ dev_err(vdce_device, " invalid resultant pitch offset \n");
+ return -EINVAL;
+ }
+ if ((vdce_start->src_horz_pitch) % 0x8 != 0) {
+ dev_err(vdce_device, " invalid source pitch offset \n");
+ return -EINVAL;
+ }
+ bufsize[VDCE_BUF_BMP] =
+ (vdce_conf_chan->get_params.common_params.bmp_hsize *
+ vdce_conf_chan->get_params.common_params.bmp_vsize) / 4;
+ blend_enable =
+ BITGET(vdce_conf_chan->register_config[0].vdce_ctrl,
+ SET_BLEND_ENABLE);
+ blend_enable |=
+ BITGET(vdce_conf_chan->register_config[1].vdce_ctrl,
+ SET_BLEND_ENABLE);
+ for (i = VDCE_BUF_IN; i <= VDCE_BUF_BMP; i++) {
+ if (i == VDCE_BUF_BMP && blend_enable != 1) {
+ continue;
+ } /* user pointer case */
+ if (vdce_start->buffers[i].index < 0) {
+ /* assignning the address to the register conf */
+ if (vdce_start->buffers[i].size < bufsize[i]) {
+ dev_err(vdce_device, " invalid size \n");
+ return -EINVAL;
+ }
+ if ((void *)vdce_start->buffers[i].virt_ptr == NULL) {
+ dev_err(vdce_device, " Address is NULL \n");
+ return -EINVAL;
+ }
+ /* user virtual pointer to physical address */
+ vdce_start->buffers[i].offset =
+ vdce_uservirt_to_phys(vdce_start->buffers[i].
+ virt_ptr /*offset */ );
+ } else {
+ /*checking the index requested */
+ if ((vdce_start->buffers[i].index)
+ > ((vdce_conf_chan->vdce_buffer[i].
+ num_allocated - 1))) {
+ dev_err(vdce_device,
+ "Requested buffer not allocatedn");
+ return -EINVAL;
+ }
+ vdce_start->buffers[i].offset = virt_to_phys(((void *)
+ vdce_conf_chan->vdce_buffer[i].
+ buffers
+ [vdce_start->
+ buffers
+ [i].
+ index]));
+ vdce_start->buffers[i].size =
+ vdce_conf_chan->vdce_buffer[i].size;
+ }
+ /* check alignment for ytop */
+ if (vdce_start->buffers[i].offset % 0x8 != 0) {
+ dev_err(vdce_device, "Address not 8 byte aligned \n");
+ return -EINVAL;
+ }
+ }
+ if (blend_enable) {
+ if ((vdce_start->bmp_pitch * 4) <
+ vdce_conf_chan->get_params.common_params.bmp_hsize) {
+ dev_err(vdce_device, "bmp pitch less than width \n");
+ return -EINVAL;
+ }
+ if (vdce_start->bmp_pitch % 0x8 != 0) {
+ dev_err(vdce_device, " bmp pitch not aligned \n");
+ return -EINVAL;
+ }
+ }
+ /* check for the 8byte alignment for output address of
+ ytop,ybot,ctop and cbot in both image format */
+ if ((((vdce_start->buffers[0].size) / 4) % 0x8) != 0) {
+ dev_err(vdce_device, " invalid src address \n");
+ return -EINVAL;
+ }
+ if (((vdce_start->buffers[1].size) / 4) % 0x8) {
+ dev_err(vdce_device, " invalid resultant address \n");
+ return -EINVAL;
+ }
+
+ if ((vdce_conf_chan->num_pass == VDCE_MULTIPASS) &&
+ (vdce_conf_chan->luma_chroma_phased == 0)) {
+ ret = vdce_set_multipass_address(vdce_start, vdce_conf_chan);
+ if (ret < 0) {
+ return -EINVAL;
+ }
+ } else {
+ /* assignning the address to the register configuration */
+ ret = vdce_set_address(vdce_start, vdce_conf_chan, 0, 0, 0, 0);
+
+ if (vdce_conf_chan->luma_chroma_phased == 1) {
+ memcpy(&vdce_conf_chan->register_config[1],
+ &vdce_conf_chan->register_config[0],
+ sizeof(struct vdce_hw_config));
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_CHROMA_ENABLE);
+ vdce_conf_chan->register_config[1].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[1].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ }
+ }
+
+
+ /* Check to see if channel is busy or not */
+ if(vdce_isbusy()) {
+ while(vdce_isbusy()){
+ schedule();
+ }
+ }
+ if(irqraised1 == 0) {
+ while(irqraised1 == 0) {
+ schedule();
+ }
+ }
+
+ /* Wait for getting access to the hardware */
+ wait_for_completion(&(device_config.device_access));
+
+ vdce_current_chan = vdce_conf_chan;
+
+ /* start the process */
+ vdce_conf_chan->vdce_complete = VDCE_PASS1_STARTED;
+ if (vdce_conf_chan->mode_state ==
+ VDCE_OPERATION_CHROMINANCE_CONVERSION ||
+ vdce_conf_chan->mode_state == VDCE_OPERATION_PRE_CODECMODE ||
+ vdce_conf_chan->mode_state == VDCE_OPERATION_POST_CODECMODE ||
+ vdce_conf_chan->mode_state == VDCE_OPERATION_TRANS_CODECMODE) {
+ vdce_conf_chan->edma_operation = 1;
+
+ luma_status = vdce_conf_chan->register_config[0].vdce_ctrl;
+ if ((luma_status & 0x6) == 0x6) {
+ vdce_conf_chan->edma_operation = 1;
+ } else {
+ vdce_conf_chan->edma_operation = 0;
+ }
+ if ((vdce_conf_chan->get_params.common_params.src_mode !=
+ vdce_conf_chan->get_params.common_params.res_mode)) {
+ vdce_conf_chan->edma_operation = 0;
+ }
+ ccv_only = vdce_conf_chan->register_config[0].vdce_ctrl;
+ if (ccv_only & 0xb00) {
+ vdce_conf_chan->edma_operation = 0;
+ }
+ if (vdce_conf_chan->edma_operation == 1) {
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ }
+ }
+ vdce_hw_setup(&vdce_conf_chan->register_config[0]);
+ /*function call to enable ge hardware */
+ ret = vdce_enable(&vdce_conf_chan->register_config[0]);
+
+ if (vdce_conf_chan->edma_operation == 1) {
+ dst_hsz_luma = vdce_conf_chan->
+ get_params.common_params.dst_hsz_luminance;
+
+ dst_vsz_luma = vdce_conf_chan->
+ get_params.common_params.dst_vsz_luminance;
+ if (vdce_conf_chan->get_params.common_params.src_mode ==
+ VDCE_FIELD_MODE) {
+ ccnt = 2;
+ dst_vsz_luma = dst_vsz_luma / 2;
+ }
+ ret = edma3_memcpy(dst_hsz_luma, dst_vsz_luma,
+ ccnt, vdce_start);
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ }
+
+ /* waiting for processing to be complete */
+ ret = wait_for_completion_interruptible(
+ &(device_config.sem_isr));
+ if(ret) {
+ wait_for_completion(&(device_config.sem_isr));
+ }
+
+ /* Release access to hardware completion */
+ complete(&(device_config.device_access));
+
+ dev_dbg(vdce_device, "<fn> vdce_start L</fn>\n");
+ return ret;
+}
+
+/*
+ * vdce_check_global_params : Function to check the error conditions
+ */
+int vdce_check_common_params(vdce_params_t * params)
+{
+ int ret = 0;
+ int hrsz_mag = 0, vrsz_mag = 0;
+ int i = 0, prcs = 0;
+ dev_dbg(vdce_device, "<fn>vdce_check_global_params E</fn>\n");
+ /* Checking the validity of various enums */
+ ret = CHECK_MODE_RANGE(params->vdce_mode, VDCE_OPERATION_BLENDING);
+ if (ret) {
+ dev_err(vdce_device, "Invalid mode\n");
+ return -EINVAL;
+ }
+ /* checking validity for precodec params */
+ if (params->vdce_mode == VDCE_OPERATION_POST_CODECMODE ||
+ params->vdce_mode == VDCE_OPERATION_TRANS_CODECMODE) {
+ /* checking validity for postcodec params */
+ if ((params->modes_control & RSZ_ENABLE_MASK) ==
+ (RSZ_ENABLE_MASK)
+ && (params->modes_control & BLEND_ENABLE_MASK) ==
+ (BLEND_ENABLE_MASK)) {
+ dev_err(vdce_device,
+ "Cannot enable due to Hardware limitation \n");
+ return -EINVAL;
+
+ }
+ }
+ /* if resizing than check for resize ratio */
+ if ((params->vdce_mode == VDCE_OPERATION_RESIZING) ||
+ ((params->vdce_mode == VDCE_OPERATION_PRE_CODECMODE) &&
+ ((params->modes_control & RSZ_ENABLE_MASK) == (RSZ_ENABLE_MASK)))
+ || ((params->vdce_mode == VDCE_OPERATION_POST_CODECMODE)
+ && ((params->modes_control & RSZ_ENABLE_MASK) ==
+ (RSZ_ENABLE_MASK)))
+ || ((params->vdce_mode == VDCE_OPERATION_TRANS_CODECMODE)
+ && ((params->modes_control & RSZ_ENABLE_MASK) ==
+ (RSZ_ENABLE_MASK)))) {
+ hrsz_mag =
+ (params->common_params.src_hsz_luminance * 256) /
+ (params->common_params.dst_hsz_luminance);
+ vrsz_mag =
+ (params->common_params.src_vsz_luminance * 256) /
+ (params->common_params.dst_vsz_luminance);
+ /* checking horizontal phase */
+ if ((hrsz_mag < MIN_RSZ_MAG_RATIO) ||
+ (hrsz_mag > MAX_RSZ_MAG_RATIO)) {
+ dev_err(vdce_device, "Invalid Horizontal ratio \n");
+ return -EINVAL;
+ }
+ /* checking vertical phase */
+ if ((vrsz_mag < MIN_RSZ_MAG_RATIO)
+ || (vrsz_mag > MAX_RSZ_MAG_RATIO)) {
+ dev_err(vdce_device, "Invalid Vertical ratio \n");
+ return -EINVAL;
+ }
+ }
+ if ((params->vdce_mode == VDCE_OPERATION_RESIZING) &&
+ (params->vdce_mode_params.rsz_params.
+ rsz_op_mode == VDCE_CODECMODE_MPEG1)) {
+ dev_err(vdce_device,
+ " This facility not supported due to hardware \n\n");
+ }
+ if (params->common_params.prcs_unit_value == 0) {
+ prcs = hrsz_mag / 256;
+ for (i = 4; i >= 0; i--) {
+ if ((prcs_array_value[i] * prcs + 9) <= 256) {
+ break;
+ }
+ }
+ if (i < 0) {
+ i = 0;
+ }
+ prcs = prcs_array_value[i];
+ } else {
+ prcs = params->common_params.prcs_unit_value;
+ }
+ if (prcs > 256) {
+ return -EINVAL;
+ }
+ if (params->vdce_mode == VDCE_OPERATION_EDGE_PADDING) {
+ if ((params->vdce_mode_params.epad_params.hext_luma > prcs)
+ || (params->vdce_mode_params.epad_params.hext_chroma >
+ prcs))
+ return -EINVAL;
+ }
+ if (params->common_params.src_processing_mode == VDCE_PROGRESSIVE) {
+ if ((params->common_params.src_mode == VDCE_FIELD_MODE) ||
+ (params->common_params.res_mode == VDCE_FIELD_MODE)) {
+ dev_err(vdce_device, "Invalid Mode ratio \n");
+ return -EINVAL;
+ }
+ }
+ if (ret) {
+ dev_dbg(vdce_device, "Inavlid return \n");
+ return -EINVAL;
+ } else {
+ return 0;
+ }
+ dev_dbg(vdce_device, "<fn>vdce_check_global_params L</fn>\n");
+}
+
+/*
+ * vdce_set_size_fmt : Setting resizing parameters .
+ */
+int vdce_set_size_fmt(vdce_common_params_t * params,
+ channel_config_t * vdce_conf_chan, int num_pass)
+{
+ int ret = 0;
+ int mode;
+ int prcs_nvalue = 0, i = 0;
+ int prcs = 0;
+ vdce_image_fmt_t src_image_type, divider = 1;
+ dev_dbg(vdce_device, "<fn>vdce_set_size_fmt E</fn>\n");
+ /* setting luminance processing enable bit */
+ if (params->proc_control == VDCE_LUMA_ENABLE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ } else if (params->proc_control == VDCE_CHROMA_ENABLE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_CHROMA_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_CHROMA_ENABLE);
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_LUMA_ENABLE);
+ }
+
+ /* setting input horizontal alf enable */
+ if (params->field_status == VDCE_TOP_ENABLE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_TOP_ENABLE);
+ } else if (params->field_status == VDCE_BOTTOM_ENABLE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_BOT_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_BOT_ENABLE);
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_TOP_ENABLE);
+ }
+ /* setting src i/o mode */
+ if (params->src_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_SRC_MODE);
+ } else {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_SRC_MODE);
+ }
+ /* setting res i/o mode */
+ if (params->res_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_RES_MODE);
+ } else {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_RES_MODE);
+ }
+ if (num_pass == 1 &&
+ (vdce_conf_chan->mode_state != VDCE_OPERATION_RESIZING)) {
+ if (params->src_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_RES_MODE);
+ } else {
+
+ vdce_conf_chan->register_config[0].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[0].
+ vdce_ctrl, SET_RES_MODE);
+ }
+ }
+ if (num_pass == 1 &&
+ (vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING)) {
+ if (params->res_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->register_config[1].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[1].
+ vdce_ctrl, SET_SRC_MODE);
+ } else {
+
+ vdce_conf_chan->register_config[1].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[1].
+ vdce_ctrl, SET_SRC_MODE);
+ }
+ }
+ /* setting bmp i/o mode */
+ if (params->src_bmp_mode == VDCE_FRAME_MODE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_BMP_MODE);
+ } else {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_BMP_MODE);
+ }
+ /* setting bmp i/o mode */
+ if (params->src_processing_mode == VDCE_PROGRESSIVE) {
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_PRO_MODE);
+ } else {
+ /* atleat top field or bottom field should be configured for
+ interlaced */
+ vdce_conf_chan->register_config[num_pass].vdce_ctrl =
+ BITRESET(vdce_conf_chan->register_config[num_pass].
+ vdce_ctrl, SET_PRO_MODE);
+ }
+ vdce_conf_chan->register_config[num_pass].vdce_req_sz =
+ vdce_conf_chan->register_config[num_pass].
+ vdce_req_sz & ~(VDCE_REQ_SZ_MASK);
+
+ vdce_conf_chan->register_config[num_pass].vdce_req_sz =
+ (vdce_conf_chan->register_config[num_pass].vdce_req_sz |
+ ((256) << VDCE_REQ_SZ_SHIFT));
+
+ if (params->prcs_unit_value == 0) {
+ prcs_nvalue =
+ (params->src_hsz_luminance / (params->dst_hsz_luminance));
+ for (i = 4; i >= 0; i--) {
+ if ((prcs_array_value[i] * prcs_nvalue + 9) <= 256) {
+ break;
+ }
+ }
+ if (i < 0) {
+ i = 0;
+ }
+ prcs = prcs_array_value[i];
+ } else {
+ prcs = params->prcs_unit_value;
+ }
+ vdce_conf_chan->register_config[num_pass].vdce_prcs_unit_size =
+ prcs & (VDCE_PRCS_UNIT_SIZE_MASK);
+
+ /* Configuration of luma size */
+ vdce_conf_chan->register_config[num_pass].src_Y_sz |=
+ ((params->src_hsz_luminance << SRC_Y_HSZ_SHIFT) & (SRC_Y_HSZ_MASK));
+
+ if (params->src_processing_mode == VDCE_INTERLACED) {
+
+ vdce_conf_chan->register_config[num_pass].src_Y_sz |=
+ ((params->
+ src_vsz_luminance /
+ 2 << SRC_Y_VSZ_SHIFT) & (SRC_Y_VSZ_MASK));
+ } else {
+ vdce_conf_chan->register_config[num_pass].src_Y_sz |=
+ ((params->
+ src_vsz_luminance << SRC_Y_VSZ_SHIFT) & (SRC_Y_VSZ_MASK));
+ }
+
+ vdce_conf_chan->register_config[num_pass].res_Y_sz |=
+ ((params->dst_hsz_luminance << RES_Y_HSZ_SHIFT) & (RES_Y_HSZ_MASK));
+
+ if (params->src_processing_mode == VDCE_INTERLACED) {
+ vdce_conf_chan->register_config[num_pass].res_Y_sz |=
+ ((params->
+ dst_vsz_luminance /
+ 2 << RES_Y_VSZ_SHIFT) & (RES_Y_VSZ_MASK));
+ } else {
+ vdce_conf_chan->register_config[num_pass].res_Y_sz |=
+ ((params->
+ dst_vsz_luminance << RES_Y_VSZ_SHIFT) & (RES_Y_VSZ_MASK));
+ }
+ /* Configuration of chroma size */
+ mode = ((vdce_conf_chan->register_config[num_pass].vdce_ctrl
+ & VDCE_MODE_MASK) >> VDCE_MODE_SHIFT);
+
+ if ((vdce_conf_chan->mode_state == VDCE_OPERATION_PRE_CODECMODE) ||
+ ((vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING) &&
+ (mode == MODE_PRECODEC)) ||
+ ((vdce_conf_chan->mode_state ==
+ VDCE_OPERATION_CHROMINANCE_CONVERSION) &&
+ (mode == MODE_PRECODEC)) || (mode == MODE_PRECODEC) ||
+ (vdce_conf_chan->mode_state == VDCE_OPERATION_EDGE_PADDING)) {
+ src_image_type = VDCE_IMAGE_FMT_422;
+
+ } else {
+ src_image_type = VDCE_IMAGE_FMT_420;
+ }
+ /* mode is 420 so chroma value is reduced by 2 */
+ divider = (params->src_processing_mode == VDCE_INTERLACED) ? 4 : 2;
+ if (src_image_type == VDCE_IMAGE_FMT_420) {
+ divider = (params->
+ src_processing_mode == VDCE_INTERLACED) ? 4 : 2;
+ vdce_conf_chan->register_config[num_pass].src_C_sz |=
+ ((params->src_vsz_luminance / divider << SRC_C_VSZ_SHIFT)
+ & (SRC_C_VSZ_MASK));
+ } else if (src_image_type == VDCE_IMAGE_FMT_422) {
+ divider = (params->
+ src_processing_mode == VDCE_INTERLACED) ? 2 : 1;
+ vdce_conf_chan->register_config[num_pass].src_C_sz |=
+ vdce_conf_chan->register_config[num_pass].src_C_sz |=
+ ((params->src_vsz_luminance / divider << SRC_C_VSZ_SHIFT)
+ & (SRC_C_VSZ_MASK));
+
+ } else {
+ return -EINVAL;
+ }
+
+ vdce_conf_chan->register_config[num_pass].src_C_sz |=
+ ((params->src_hsz_luminance << SRC_C_HSZ_SHIFT) & (SRC_C_HSZ_MASK));
+
+ vdce_conf_chan->register_config[num_pass].res_C_sz |=
+ ((params->dst_hsz_luminance << RES_C_HSZ_SHIFT) & (RES_C_HSZ_MASK));
+ if ((vdce_conf_chan->mode_state == VDCE_OPERATION_PRE_CODECMODE) ||
+ (mode == MODE_TRANSCODEC) || (mode == MODE_PRECODEC)) {
+
+ divider = (params->
+ src_processing_mode == VDCE_INTERLACED) ? 4 : 2;
+
+ } else {
+ divider = (params->
+ src_processing_mode == VDCE_INTERLACED) ? 2 : 1;
+ }
+ vdce_conf_chan->register_config[num_pass].res_C_sz |=
+ ((params->
+ dst_vsz_luminance /
+ divider << RES_C_VSZ_SHIFT) & (RES_C_VSZ_MASK));
+ /* Configuration of bitmap size */
+ divider = (params->src_processing_mode == VDCE_INTERLACED) ? 2 : 1;
+ vdce_conf_chan->register_config[num_pass].src_bmp_sz |=
+ ((params->bmp_hsize << SRC_BMP_HSZ_SHIFT) & (SRC_BMP_HSZ_MASK));
+
+ vdce_conf_chan->register_config[num_pass].src_bmp_sz |=
+ ((params->
+ bmp_vsize / divider << SRC_BMP_VSZ_SHIFT) & (SRC_BMP_VSZ_MASK));
+
+ vdce_conf_chan->register_config[num_pass].src_Y_strt_ps =
+ params->src_hsp_luminance;
+ vdce_conf_chan->register_config[num_pass].res_Y_strt_ps =
+ params->res_hsp_luminance;
+ /* configuration for starting position */
+ if (vdce_conf_chan->num_pass == VDCE_MULTIPASS) {
+ if (num_pass == 1) {
+ vdce_conf_chan->register_config[num_pass].src_C_strt_ps =
+ 0;
+ vdce_conf_chan->register_config[num_pass].res_C_strt_ps =
+ params->res_hsp_luminance;
+ } else {
+ vdce_conf_chan->register_config[num_pass].src_C_strt_ps =
+ params->src_hsp_luminance;
+ vdce_conf_chan->register_config[num_pass].res_C_strt_ps =
+ 0;
+ }
+ } else {
+ vdce_conf_chan->register_config[num_pass].src_C_strt_ps =
+ params->src_hsp_luminance;
+ vdce_conf_chan->register_config[num_pass].res_C_strt_ps =
+ params->res_hsp_luminance;
+ }
+
+ vdce_conf_chan->register_config[num_pass].src_bmp_strt_ps |=
+ ((params->bmp_hsp_bitmap) & (SRC_BMP_STRT_HPS_MASK));
+
+ vdce_conf_chan->register_config[num_pass].res_bmp_strt_ps |=
+ ((params->res_hsp_bitmap) & (SRC_BMP_HSZ_MASK));
+
+ vdce_conf_chan->register_config[num_pass].res_bmp_strt_ps |=
+ ((params->res_vsp_bitmap << RES_BMP_STRT_VPS_SHIFT)
+ & (RES_BMP_STRT_VPS_MASK));
+ /* hardcoding the image format as raster scanning */
+ vdce_conf_chan->register_config[num_pass].vdce_sdr_fmt =
+ VDCE_RASTER_SCANNING;
+
+ dev_dbg(vdce_device, "<fn>vdce_set_size_fmt L\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_set_rmapparams : Setting range mapping parameters.
+ */
+int vdce_set_rmapparams(vdce_rmap_params_t * params,
+ channel_config_t * vdce_conf_chan, int index)
+{
+ int ret = 0;
+ dev_dbg(vdce_device, "<fn>vdce_set_rmmaparams E\n</fn>");
+ dev_dbg(vdce_device, "The value s %d\n", params->coeff_y);
+ if (params->rmap_yenable == VDCE_FEATURE_ENABLE) {
+ vdce_conf_chan->register_config[index].rgmp_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].
+ rgmp_ctrl, SET_RMAP_YENABLE);
+
+ dev_dbg(vdce_device, "Entering and setting value \n");
+ vdce_conf_chan->register_config[index].rgmp_ctrl |=
+ ((params->coeff_y) << RANGE_MAP_Y_SHIFT) & RANGE_MAP_Y_MASK;
+
+ } else {
+ vdce_conf_chan->register_config[index].rgmp_ctrl =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rgmp_ctrl, SET_RMAP_YENABLE);
+ }
+ if (params->rmap_cenable == VDCE_FEATURE_ENABLE) {
+ vdce_conf_chan->register_config[index].rgmp_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].
+ rgmp_ctrl, SET_RMAP_CENABLE);
+
+ vdce_conf_chan->register_config[index].rgmp_ctrl |=
+ ((params->
+ coeff_c) << (RANGE_MAP_C_SHIFT)) & RANGE_MAP_C_MASK;
+ } else {
+ vdce_conf_chan->register_config[index].rgmp_ctrl =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rgmp_ctrl, SET_RMAP_CENABLE);
+ }
+ vdce_conf_chan->register_config[index].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].vdce_ctrl,
+ SET_RMAP_ENABLE);
+ dev_dbg(vdce_device, "<fn>vdce_set_rmapparams L\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_set_rszparams : Setting resizing parameters .
+ */
+int vdce_set_rszparams(vdce_params_t * params,
+ channel_config_t * vdce_conf_chan,
+ vdce_mode_operation_t mode, int index)
+{
+ int ret = 0;
+ vdce_rsz_params_t rsz_params;
+ int hrsz_mag, vrsz_mag;
+ if (mode == VDCE_OPERATION_PRE_CODECMODE) {
+ rsz_params =
+ (params->vdce_mode_params.precodec_params.rsz_params);
+ } else if (mode == VDCE_OPERATION_POST_CODECMODE) {
+ rsz_params =
+ (params->vdce_mode_params.postcodec_params.rsz_params);
+ } else if (mode == VDCE_OPERATION_TRANS_CODECMODE) {
+ rsz_params =
+ (params->vdce_mode_params.transcodec_params.rsz_params);
+ } else if (mode == VDCE_OPERATION_RESIZING) {
+ rsz_params = (params->vdce_mode_params.rsz_params);
+ } else {
+ memset(&rsz_params, 0, sizeof(rsz_params));
+ }
+
+ dev_dbg(vdce_device, "<fn>vdce_set_rszparams E\n</fn>");
+ /* setting input horizontal alf enable */
+ if (rsz_params.hrsz_alf_enable == VDCE_FEATURE_ENABLE) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_HRSZ_ALF_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_HRSZ_ALF_ENABLE);
+ }
+ /* setting input vertical alf format */
+ if (rsz_params.vrsz_alf_enable == VDCE_FEATURE_ENABLE) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_VRSZ_ALF_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_VRSZ_ALF_ENABLE);
+ }
+ /* setting H type */
+ if (rsz_params.vrsz_mode == VDCE_ALGO_TAP_4LINEAR_INTERPOLATION) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_RSZ_V_TYPE);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_RSZ_V_TYPE);
+ }
+ /* setting V type */
+ if (rsz_params.hrsz_mode == VDCE_ALGO_TAP_4LINEAR_INTERPOLATION) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_RSZ_H_TYPE);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_RSZ_H_TYPE);
+ }
+ /* setting V type */
+ if (rsz_params.hrsz_alf_mode == VDCE_ALFMODE_MANUAL) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_RSZ_H_ALF_mode);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_RSZ_H_ALF_mode);
+ }
+ /* setting intensity of resizer */
+ if ((rsz_params.hrsz_alf_mode == VDCE_ALFMODE_MANUAL)
+ && (rsz_params.hrsz_alf_enable == VDCE_FEATURE_ENABLE)) {
+ if (rsz_params.hrsz_alf_intensity > MAX_RSZ_INTENSITY) {
+ rsz_params.hrsz_alf_intensity = MAX_RSZ_INTENSITY;
+ }
+ vdce_conf_chan->register_config[index].
+ rsz_alf_intensity |=
+ (((rsz_params.
+ hrsz_alf_intensity) << RSZ_ALF_INTENSITY_SHIFT)
+ & RSZ_ALF_INTENSITY_MASK);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_alf_intensity = 0;
+ }
+ /* if resizer used check for the params */
+ hrsz_mag =
+ (params->common_params.src_hsz_luminance *
+ 256) / (params->common_params.dst_hsz_luminance);
+ vdce_conf_chan->register_config[index].rsz_h_mag |=
+ (((hrsz_mag) << RSZ_H_MAG_SHIFT) & (RSZ_H_MAG_MASK));
+ vrsz_mag =
+ (params->common_params.src_vsz_luminance *
+ 256) / (params->common_params.dst_vsz_luminance);
+ vdce_conf_chan->register_config[index].rsz_v_mag |=
+ (((vrsz_mag) << RSZ_V_MAG_SHIFT)) & (RSZ_V_MAG_MASK);
+
+ /* setting horizontal enable bit */
+ if (hrsz_mag >= 256) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_HRSZ_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_HRSZ_ENABLE);
+ }
+ /* setting vertical enable bit */
+ if (vrsz_mag >= 256) {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITSET(vdce_conf_chan->register_config[index].rsz_mode,
+ SET_VRSZ_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[index].rsz_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ rsz_mode, SET_VRSZ_ENABLE);
+ }
+ vdce_conf_chan->register_config[index].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].vdce_ctrl,
+ SET_RSZ_ENABLE);
+ dev_dbg(vdce_device, "<fn>vdce_set_rszparams L\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_set_epadparams : Setting EPAD parameters.
+ */
+int vdce_set_epadparams(vdce_epad_params_t * params,
+ channel_config_t * vdce_conf_chan, int index)
+{
+ int ret = 0;
+ dev_dbg(vdce_device, "<fn>vdce_set_epadparams E \n</fn>");
+ /* configuring luma vertical extension value */
+ vdce_conf_chan->register_config[index].epd_luma_width |=
+ (((params->vext_luma) << EPD_Y_VEXT_SHIFT) & EPD_Y_VEXT_MASK);
+
+ /* configuring luma horizontal extension value */
+ vdce_conf_chan->register_config[index].epd_luma_width |=
+ ((params->hext_luma) << (EPD_Y_HEXT_SHIFT)) & (EPD_Y_HEXT_MASK);
+
+ /* configuring chroma vertical extension value */
+ vdce_conf_chan->register_config[index].epd_chroma_width |=
+ ((params->vext_chroma) << (EPD_C_VEXT_SHIFT)) & EPD_C_VEXT_MASK;
+
+ /* configuring chroma horizontal extension value */
+ vdce_conf_chan->register_config[index].epd_chroma_width |=
+ (((params->hext_chroma) << EPD_C_HEXT_SHIFT) & EPD_C_HEXT_MASK);
+ dev_dbg(vdce_device, "<fn>vdce_set_epadparams L\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_set_ccvparams : Setting CCV parameters.
+ */
+int vdce_set_ccvparams(vdce_ccv_params_t * params,
+ channel_config_t * vdce_conf_chan, int mode, int index)
+{
+ int ret = 0;
+ dev_dbg(vdce_device, "<fn>vdce_set_ccvparams E\n</fn>");
+ /* setting output format */
+ if (mode == MODE_PRECODEC || mode == MODE_TRANSCODEC) {
+ if (params->codec_mode_out == VDCE_CODECMODE_MPEG1) {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITSET(vdce_conf_chan->register_config[index].
+ ccv_mode, SET_CCV_OUT_MPEG1);
+
+ vdce_conf_chan->register_config[index].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].
+ vdce_ctrl, SET_CCV_ENABLE);
+
+ } else {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITRESET(vdce_conf_chan->
+ register_config[index].ccv_mode,
+ SET_CCV_OUT_MPEG1);
+ }
+ }
+ if (mode == MODE_POSTCODEC || mode == MODE_TRANSCODEC) {
+ /* setting input format */
+ if (params->codec_mode_in == VDCE_CODECMODE_MPEG1) {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITSET(vdce_conf_chan->register_config[index].
+ ccv_mode, SET_CCV_IN_MPEG1);
+ vdce_conf_chan->register_config[index].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].
+ vdce_ctrl, SET_CCV_ENABLE);
+ } else {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITRESET(vdce_conf_chan->
+ register_config[index].ccv_mode,
+ SET_CCV_IN_MPEG1);
+ }
+ }
+ /* setting H type */
+ if (params->hccv_type == VDCE_ALGO_TAP_4LINEAR_INTERPOLATION) {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITSET(vdce_conf_chan->register_config[index].ccv_mode,
+ SET_CCV_H_TYPE);
+ } else {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ ccv_mode, SET_CCV_H_TYPE);
+ }
+ /* setting V type */
+ if (params->vccv_type == VDCE_ALGO_TAP_4LINEAR_INTERPOLATION) {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITSET(vdce_conf_chan->register_config[index].ccv_mode,
+ SET_CCV_V_TYPE);
+ } else {
+ vdce_conf_chan->register_config[index].ccv_mode =
+ BITRESET(vdce_conf_chan->register_config[index].
+ ccv_mode, SET_CCV_V_TYPE);
+ }
+ vdce_conf_chan->register_config[index].vdce_ctrl |=
+ ((mode << VDCE_MODE_SHIFT) & (VDCE_MODE_MASK));
+ dev_dbg(vdce_device, "<fn>vdce_get_ccvparams L\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_set_blendparams : Setting blending parameters.
+ */
+int vdce_set_blendparams(vdce_blend_params_t * params,
+ channel_config_t * vdce_conf_chan, int mode, int index)
+{
+ int i = 0;
+ int ret = 0;
+ dev_dbg(vdce_device, "<fn>vdce_set_blendparams E\n</fn>");
+ for (i = 0; i < MAX_BLEND_TABLE; i++) {
+ /* configuring blend factor for zero blend value parameters */
+ vdce_conf_chan->register_config[index].bld_lut[i] |=
+ ((params->bld_lut[i].
+ blend_value) << BLD_LUT_FCT_SHIFT) & (BLD_LUT_FCT_MASK);
+
+ /* configuring Cr value for zero blend value parameters */
+ vdce_conf_chan->register_config[index].bld_lut[i] |=
+ ((params->bld_lut[i].blend_cr) << BLD_LUT_CR_SHIFT) &
+ (BLD_LUT_CR_MASK);
+
+ /* configuring cb value for zero blend value parameters */
+ vdce_conf_chan->register_config[index].bld_lut[i] |=
+ ((params->bld_lut[i].blend_cb) << BLD_LUT_CB_SHIFT) &
+ (BLD_LUT_CB_MASK);
+ /* configuring Y value for zero blend value parameters */
+ vdce_conf_chan->register_config[index].bld_lut[i] |=
+ ((params->bld_lut[i].blend_y) << BLD_LUT_Y_SHIFT) &
+ BLD_LUT_Y_MASK;
+ }
+ vdce_conf_chan->register_config[index].vdce_ctrl =
+ BITSET(vdce_conf_chan->register_config[index].vdce_ctrl,
+ SET_BLEND_ENABLE);
+ dev_dbg(vdce_device, "<fn>vdce_set_blendparams E\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_set_params : Function to set the ge parameters
+ */
+int vdce_set_params(vdce_params_t * params, channel_config_t * vdce_conf_chan)
+{
+ int ret = 0;
+ int pass_num = 0;
+ int mode;
+ vdce_ccv_params_t ccv_params;
+ dev_dbg(vdce_device, "<fn> vdce_set_params E\n</fn>");
+
+ memset(&(vdce_conf_chan->register_config[0]), 0,
+ sizeof(vdce_hw_config_t));
+ memset(&(vdce_conf_chan->register_config[1]), 0,
+ sizeof(vdce_hw_config_t));
+
+ vdce_conf_chan->status = VDCE_CHAN_UNINITIALISED;
+ vdce_conf_chan->mode_state = params->vdce_mode;
+ vdce_conf_chan->num_pass = VDCE_SINGLE_PASS;
+ /* configuration of Pre-codec mode */
+ if (params->vdce_mode == VDCE_OPERATION_PRE_CODECMODE) {
+ if (((params->modes_control & RSZ_ENABLE_MASK) ==
+ (RSZ_ENABLE_MASK))) {
+ ret = vdce_set_rszparams(params, vdce_conf_chan,
+ VDCE_OPERATION_PRE_CODECMODE,
+ pass_num);
+ }
+ ret = vdce_set_ccvparams(&(params->vdce_mode_params.
+ precodec_params.ccv_params),
+ vdce_conf_chan, MODE_PRECODEC,
+ pass_num);
+
+ vdce_conf_chan->register_config[pass_num].vdce_ctrl |=
+ ((MODE_PRECODEC << VDCE_MODE_SHIFT) & (VDCE_MODE_MASK));
+
+ } else if (params->vdce_mode == VDCE_OPERATION_POST_CODECMODE) {
+ /* configuration of Post-codec mode */
+ /* setting resizing params and enabling it */
+ if (((params->modes_control & RSZ_ENABLE_MASK) ==
+ (RSZ_ENABLE_MASK))) {
+ ret = vdce_set_rszparams(params, vdce_conf_chan,
+ VDCE_OPERATION_POST_CODECMODE,
+ pass_num);
+ if (params->vdce_mode_params.postcodec_params.
+ ccv_params.codec_mode_in == VDCE_CODECMODE_MPEG1) {
+ vdce_conf_chan->luma_chroma_phased = 1;
+ }
+ }
+ ret =
+ vdce_set_ccvparams(&
+ (params->vdce_mode_params.
+ postcodec_params.ccv_params),
+ vdce_conf_chan, MODE_POSTCODEC,
+ pass_num);
+ /* setting range-mapping params and enabling it */
+ if (((params->modes_control & RMAP_ENABLE_MASK) ==
+ (RMAP_ENABLE_MASK))) {
+ ret =
+ vdce_set_rmapparams(&
+ (params->vdce_mode_params.
+ postcodec_params.
+ rmap_params),
+ vdce_conf_chan, pass_num);
+ }
+ /* setting blending params and enabling it */
+ if (((params->modes_control & BLEND_ENABLE_MASK) ==
+ (BLEND_ENABLE_MASK))) {
+ ret =
+ vdce_set_blendparams(&
+ (params->vdce_mode_params.
+ postcodec_params.
+ blend_params),
+ vdce_conf_chan,
+ VDCE_OPERATION_POST_CODECMODE,
+ pass_num);
+ }
+ vdce_conf_chan->register_config[pass_num].vdce_ctrl |=
+ ((MODE_POSTCODEC << VDCE_MODE_SHIFT) & (VDCE_MODE_MASK));
+
+ } else if (params->vdce_mode == VDCE_OPERATION_TRANS_CODECMODE) {
+ /* Configuration of Trans-codec mode */
+ /* setting resizing params and enabling it */
+ if (((params->modes_control & RSZ_ENABLE_MASK) ==
+ (RSZ_ENABLE_MASK))) {
+ ret = vdce_set_rszparams(params, vdce_conf_chan,
+ VDCE_OPERATION_TRANS_CODECMODE,
+ pass_num);
+ if (params->vdce_mode_params.transcodec_params.
+ ccv_params.codec_mode_in == VDCE_CODECMODE_MPEG1) {
+ vdce_conf_chan->luma_chroma_phased = 1;
+ }
+ }
+ /* setting range-mapping params and enabling it */
+ if (((params->modes_control & RMAP_ENABLE_MASK) ==
+ (RMAP_ENABLE_MASK))) {
+ ret =
+ vdce_set_rmapparams(&
+ (params->vdce_mode_params.
+ transcodec_params.
+ rmap_params),
+ vdce_conf_chan, pass_num);
+ }
+ /* setting blend params and enabling it */
+ if (((params->modes_control & BLEND_ENABLE_MASK) ==
+ (BLEND_ENABLE_MASK))) {
+ ret =
+ vdce_set_blendparams(&
+ (params->vdce_mode_params.
+ transcodec_params.
+ blend_params),
+ vdce_conf_chan,
+ VDCE_OPERATION_TRANS_CODECMODE,
+ pass_num);
+ }
+ /* setting ccv params and enabling it */
+ if (((params->modes_control & CCV_ENABLE_MASK) ==
+ (CCV_ENABLE_MASK))) {
+ ret =
+ vdce_set_ccvparams(&
+ (params->vdce_mode_params.
+ transcodec_params.
+ ccv_params),
+ vdce_conf_chan,
+ MODE_TRANSCODEC, pass_num);
+ }
+ vdce_conf_chan->register_config[pass_num].vdce_ctrl |=
+ ((MODE_TRANSCODEC << VDCE_MODE_SHIFT) & (VDCE_MODE_MASK));
+
+ } else if (params->vdce_mode == VDCE_OPERATION_EDGE_PADDING) {
+ /* configuration of Edge-padding mode */
+ ret = vdce_set_epadparams(&(params->vdce_mode_params.
+ epad_params)
+ , vdce_conf_chan, pass_num);
+ vdce_conf_chan->register_config[pass_num].vdce_ctrl |=
+ ((MODE_EPAD << VDCE_MODE_SHIFT) & (VDCE_MODE_MASK));
+ } else if (params->vdce_mode == VDCE_OPERATION_RESIZING) {
+ /* Configuration of Resizing mode */
+ if (params->vdce_mode_params.rsz_params.rsz_mode ==
+ VDCE_MODE_422) {
+ memset(&ccv_params, 0, sizeof(vdce_ccv_params_t));
+ vdce_conf_chan->num_pass = VDCE_MULTIPASS;
+ /* set mode as pre-codec */
+ vdce_conf_chan->register_config[pass_num].
+ vdce_ctrl |=
+ ((MODE_PRECODEC << VDCE_MODE_SHIFT) &
+ (VDCE_MODE_MASK));
+ ret =
+ vdce_set_ccvparams(&ccv_params, vdce_conf_chan,
+ MODE_PRECODEC, pass_num);
+ ret =
+ vdce_set_rszparams(params, vdce_conf_chan,
+ VDCE_OPERATION_RESIZING,
+ pass_num);
+ pass_num = 1;
+ ret =
+ vdce_set_ccvparams(&ccv_params, vdce_conf_chan,
+ MODE_POSTCODEC, pass_num);
+
+ vdce_conf_chan->register_config[pass_num].
+ vdce_ctrl |=
+ ((MODE_POSTCODEC << VDCE_MODE_SHIFT) &
+ (VDCE_MODE_MASK));
+ } else {
+ vdce_conf_chan->register_config[pass_num].
+ vdce_ctrl |=
+ ((MODE_TRANSCODEC << VDCE_MODE_SHIFT) &
+ (VDCE_MODE_MASK));
+ ret = vdce_set_rszparams(params, vdce_conf_chan,
+ VDCE_OPERATION_RESIZING,
+ pass_num);
+ if (params->vdce_mode_params.rsz_params.
+ rsz_op_mode == VDCE_CODECMODE_MPEG1) {
+ vdce_conf_chan->luma_chroma_phased = 1;
+ }
+ }
+ } else if (params->vdce_mode == VDCE_OPERATION_CHROMINANCE_CONVERSION) {
+ /* Configuration of CCV mode */
+ if (params->vdce_mode_params.ccv_params.conversion_type ==
+ VDCE_CCV_MODE_420_422) {
+ ret =
+ vdce_set_ccvparams(&
+ (params->vdce_mode_params.
+ ccv_params),
+ vdce_conf_chan,
+ MODE_POSTCODEC, pass_num);
+ } else if (params->vdce_mode_params.ccv_params.
+ conversion_type == VDCE_CCV_MODE_422_420) {
+ ret =
+ vdce_set_ccvparams(&
+ (params->vdce_mode_params.
+ ccv_params),
+ vdce_conf_chan,
+ MODE_PRECODEC, pass_num);
+ } else {
+ ret =
+ vdce_set_ccvparams(&
+ (params->vdce_mode_params.
+ ccv_params),
+ vdce_conf_chan,
+ MODE_TRANSCODEC, pass_num);
+ }
+ } else if (params->vdce_mode == VDCE_OPERATION_RANGE_MAPPING) {
+ /* Configuration of Range-mapping */
+ ret = vdce_set_rmapparams(&(params->vdce_mode_params.
+ rmap_params), vdce_conf_chan,
+ pass_num);
+ vdce_conf_chan->register_config[pass_num].vdce_ctrl |=
+ ((MODE_TRANSCODEC << VDCE_MODE_SHIFT) & (VDCE_MODE_MASK));
+ } else if (params->vdce_mode == VDCE_OPERATION_BLENDING) {
+ /* Configuration of Blending mode */
+ if (params->vdce_mode_params.blend_params.blend_mode ==
+ VDCE_MODE_422) {
+ memset(&ccv_params, 0, sizeof(vdce_ccv_params_t));
+ /* set mode as pre-codec */
+ vdce_conf_chan->num_pass = VDCE_MULTIPASS;
+ ret =
+ vdce_set_ccvparams(&ccv_params, vdce_conf_chan,
+ MODE_PRECODEC, pass_num);
+ vdce_conf_chan->register_config[pass_num].
+ vdce_ctrl |=
+ ((MODE_PRECODEC << VDCE_MODE_SHIFT) &
+ (VDCE_MODE_MASK));
+ pass_num = 1;
+ ret =
+ vdce_set_blendparams(&
+ (params->vdce_mode_params.
+ blend_params),
+ vdce_conf_chan,
+ MODE_POSTCODEC, 1);
+ ret =
+ vdce_set_ccvparams(&ccv_params, vdce_conf_chan,
+ MODE_POSTCODEC, pass_num);
+
+ vdce_conf_chan->register_config[pass_num].
+ vdce_ctrl |=
+ ((MODE_POSTCODEC << VDCE_MODE_SHIFT) &
+ (VDCE_MODE_MASK));
+ } else {
+ vdce_conf_chan->register_config[pass_num].
+ vdce_ctrl |=
+ ((MODE_TRANSCODEC << VDCE_MODE_SHIFT) &
+ (VDCE_MODE_MASK));
+
+ ret =
+ vdce_set_blendparams(&
+ (params->vdce_mode_params.
+ blend_params),
+ vdce_conf_chan,
+ MODE_TRANSCODEC, 0);
+ }
+ } else {
+ /* error */
+ dev_err(vdce_device, "\n mode not supported ");
+ ret = -EINVAL;
+ }
+ if (pass_num == 0) {
+ vdce_set_size_fmt(&(params->common_params), vdce_conf_chan, 0);
+ } else {
+ vdce_set_size_fmt(&(params->common_params), vdce_conf_chan, 0);
+ vdce_set_size_fmt(&(params->common_params), vdce_conf_chan, 1);
+ }
+ mode = ((vdce_conf_chan->register_config[0].vdce_ctrl
+ & VDCE_MODE_MASK) >> VDCE_MODE_SHIFT);
+
+ if ((vdce_conf_chan->mode_state == VDCE_OPERATION_PRE_CODECMODE) ||
+ ((vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING) &&
+ (vdce_conf_chan->num_pass == VDCE_MULTIPASS)) ||
+ ((vdce_conf_chan->
+ mode_state == VDCE_OPERATION_CHROMINANCE_CONVERSION) &&
+ (vdce_conf_chan->num_pass == VDCE_MULTIPASS)) ||
+ (mode == MODE_PRECODEC) ||
+ (vdce_conf_chan->mode_state == VDCE_OPERATION_EDGE_PADDING)) {
+ vdce_conf_chan->image_type_in = VDCE_IMAGE_FMT_422;
+ } else {
+ vdce_conf_chan->image_type_in = VDCE_IMAGE_FMT_420;
+ }
+ if ((vdce_conf_chan->mode_state == VDCE_OPERATION_POST_CODECMODE)
+ || ((vdce_conf_chan->mode_state == VDCE_OPERATION_RESIZING)
+ && (vdce_conf_chan->num_pass == VDCE_MULTIPASS))
+ ||
+ ((vdce_conf_chan->mode_state ==
+ VDCE_OPERATION_CHROMINANCE_CONVERSION)
+ && (vdce_conf_chan->num_pass == VDCE_MULTIPASS))
+ ||
+ ((vdce_conf_chan->mode_state == VDCE_OPERATION_BLENDING
+ && vdce_conf_chan->num_pass == VDCE_MULTIPASS)
+ || mode == MODE_POSTCODEC)
+ || (vdce_conf_chan->mode_state == VDCE_OPERATION_EDGE_PADDING)) {
+ vdce_conf_chan->image_type_out = VDCE_IMAGE_FMT_422;
+
+ } else {
+ vdce_conf_chan->image_type_out = VDCE_IMAGE_FMT_420;
+ }
+ if (vdce_conf_chan->luma_chroma_phased == 1) {
+ if (params->common_params.proc_control ==
+ VDCE_LUMA_CHROMA_ENABLE) {
+ vdce_conf_chan->luma_chroma_phased = 1;
+ vdce_conf_chan->num_pass = VDCE_MULTIPASS;
+ } else {
+ vdce_conf_chan->luma_chroma_phased = 0;
+ vdce_conf_chan->num_pass = VDCE_SINGLE_PASS;
+ }
+
+ }
+ if (ret == 0) {
+ dev_dbg(vdce_device, "VDCE State configured \n");
+ memcpy(&vdce_conf_chan->get_params, params,
+ sizeof(vdce_params_t));
+ vdce_conf_chan->status = VDCE_CHAN_PARAMS_INITIALISED;
+ }
+ dev_dbg(vdce_device, "<fn> vdce_set_params L\n</fn>");
+ return ret;
+}
+
+/*
+ * vdce_get_Params : Function to get the parameters values
+ */
+int vdce_get_params(vdce_params_t * params, channel_config_t * vdce_conf_chan)
+{
+ if (vdce_conf_chan->status == VDCE_CHAN_UNINITIALISED) {
+ dev_err(vdce_device, "2 State not configured \n");
+ return -EINVAL;
+ }
+ memcpy(params, &vdce_conf_chan->get_params, sizeof(vdce_params_t));
+ return 0;
+}
+
+/*
+ * vdce_get_status : This function gets a status of hardware and channel.
+ */
+int vdce_get_status(vdce_hw_status_t * hw_status,
+ channel_config_t * vdce_conf_chan)
+{
+ dev_dbg(vdce_device, "<fn> vdce_Get_status E\n</fn>");
+ hw_status->chan_status = vdce_conf_chan->status;
+ dev_dbg(vdce_device, "<fn>vdce_Get_status E\n</fn>");
+ return 0;
+}
+
+/*
+ * vdce_get_status : This function used to get default params
+*/
+int vdce_get_default(vdce_params_t * def_params)
+{
+ vdce_params_t *vdce_temp_params = NULL;
+ if (def_params->vdce_mode == VDCE_OPERATION_PRE_CODECMODE) {
+ vdce_temp_params = &precodec_default_params;
+ } else if (def_params->vdce_mode == VDCE_OPERATION_POST_CODECMODE) {
+ vdce_temp_params = &postcodec_default_params;
+ } else if (def_params->vdce_mode == VDCE_OPERATION_TRANS_CODECMODE) {
+ vdce_temp_params = &transcodec_default_params;
+ } else if (def_params->vdce_mode == VDCE_OPERATION_EDGE_PADDING) {
+ vdce_temp_params = &epad_default_params;
+ } else if (def_params->vdce_mode == VDCE_OPERATION_RESIZING) {
+ vdce_temp_params = &rsz_default_params;
+ } else if (def_params->vdce_mode == VDCE_OPERATION_BLENDING) {
+ vdce_temp_params = &blend_default_params;
+ } else if (def_params->vdce_mode == VDCE_OPERATION_RANGE_MAPPING) {
+ vdce_temp_params = &rmap_default_params;
+ } else if (def_params->
+ vdce_mode == VDCE_OPERATION_CHROMINANCE_CONVERSION) {
+ vdce_temp_params = &ccv_default_params;
+ }
+ memcpy(def_params, vdce_temp_params, sizeof(vdce_params_t));
+ return 0;
+
+}
+
+/*
+ * vdce_open : This function creates a channels.
+ */
+static int vdce_open(struct inode *inode, struct file *filp)
+{
+ channel_config_t *vdce_conf_chan = NULL;
+
+ dev_dbg(vdce_device, "<fn> vdce_open E\n</fn>");
+ /* if usage counter is greater than maximum supported channels
+ return error */
+ /*if (device_config.module_usage_count >= MAX_CHANNELS) {
+ dev_err(vdce_device,
+ "\n modules usage count is greater than supported ");
+ return -EBUSY;
+ }*/
+ if (device_config.module_usage_count == 0) {
+ device_config.sem_isr.done = 0;
+ }
+ /* allocate memory for a new configuration */
+ vdce_conf_chan = kmalloc(sizeof(channel_config_t), GFP_KERNEL);
+
+ if (vdce_conf_chan == NULL) {
+ dev_err(vdce_device,
+ "cannot allocate memory ro channel config\n");
+ return -ENOMEM;
+ }
+ dev_dbg(vdce_device,
+ "Malloc Done for channel configuration structure\n");
+ if (filp->f_flags == (O_NONBLOCK | O_RDWR)) {
+ vdce_conf_chan->channel_mode = VDCE_MODE_NON_BLOCKING;
+ }
+ /* zeroing register config */
+ memset(vdce_conf_chan, 0, sizeof(channel_config_t));
+ if (filp->f_flags == (O_NONBLOCK | O_RDWR)) {
+ vdce_conf_chan->channel_mode = VDCE_MODE_NON_BLOCKING;
+ }
+ vdce_conf_chan->status = VDCE_CHAN_UNINITIALISED;
+
+ /* increment usage counter */
+ /* Lock the global variable and increment the counter */
+ device_config.module_usage_count++;
+
+ /*STATE_NOT_CONFIGURED and priority to zero */
+ vdce_conf_chan->mode_state = VDCE_CHAN_UNINITIALISED;
+
+ dev_dbg(vdce_device, "Initializing of channel done \n");
+
+ /* taking the configuartion structure in private data */
+ filp->private_data = vdce_conf_chan;
+
+ dev_dbg(vdce_device, "<fn> vdce_open L\n</fn>");
+
+ return 0;
+}
+
+/*
+ * vdce_release : The Function is used to release the number of
+ * resources occupied by the channel
+*/
+static int vdce_release(struct inode *inode, struct file *filp)
+{
+
+ /* get the configuratin of this channel from private_date member of
+ file */
+ channel_config_t *vdce_conf_chan =
+ (channel_config_t *) filp->private_data;
+
+ dev_dbg(vdce_device, "<fn> vdce_release E\n</fn>");
+
+ /* it will free all the input and output buffers */
+ free_buff(vdce_conf_chan);
+ /* decrements the module usage count; */
+ /* lock the global variable and decrement variable */
+ device_config.module_usage_count--;
+ kfree(vdce_conf_chan);
+ dev_dbg(vdce_device, "<fn> vdce_release L\n</fn>");
+ return 0;
+}
+
+/*
+ * vdce_mmap : Function to map device memory into user space
+ */
+static int vdce_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ /* get the configuratin of this channel from private_date
+ member of file */
+ /* for looping purpuse */
+ int buffercounter = 0;
+ int i;
+ /* for checking purpose */
+ int flag = 0;
+ /* hold number of input and output buffer allocated */
+ int buffer_offset = 0;
+ unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;
+
+ channel_config_t *vdce_conf_chan =
+ (channel_config_t *) filp->private_data;
+
+ dev_dbg(vdce_device, "<fn> vdce_mmap E\n</fn>");
+
+ for (i = 0; i < 3; i++) {
+ /*find the input address which is to be mapped */
+ for (buffercounter = 0; buffercounter <
+ vdce_conf_chan->vdce_buffer[i].num_allocated;
+ buffercounter++) {
+ buffer_offset =
+ virt_to_phys(vdce_conf_chan->vdce_buffer[i].
+ buffers[buffercounter]);
+ if (buffer_offset == offset) {
+ flag = 1;
+ break;
+ }
+ }
+ if (flag == 1) {
+ break;
+ }
+
+ }
+ /* the address to be mapped is not found so return error */
+ if (flag == 0)
+ return -EAGAIN;
+
+ dev_dbg(vdce_device, "The address mapped via mmap");
+ /* map the address from user space to kernel space */
+ if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+ dev_dbg(vdce_device, "<fn> vdce_mmap L\n</fn>");
+
+ return 0;
+}
+
+/*
+ * vdce_ioctl : This function will process IOCTL commands sent by
+ * the application and control .
+ */
+static int vdce_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret = 0;
+ vdce_address_start_t start;
+ vdce_params_t params;
+ vdce_buffer_t buffer;
+ vdce_reqbufs_t reqbuff;
+ /*get the configuratin of this channel from
+ private_date member of file */
+ channel_config_t *vdce_conf_chan =
+ (channel_config_t *) file->private_data;
+
+ dev_dbg(vdce_device, " vdce_ioctl E\n");
+ /* before decoding check for correctness of cmd */
+ if (_IOC_TYPE(cmd) != VDCE_IOC_BASE) {
+ dev_err(vdce_device, "Bad command Value \n");
+ return -1;
+ }
+ if (_IOC_NR(cmd) > VDCE_IOC_MAXNR) {
+ dev_err(vdce_device, "Bad Command Value\n");
+ return -1;
+ }
+ /*veryfying access permission of commands */
+ if (_IOC_DIR(cmd) & _IOC_READ) {
+
+ ret = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd));
+ } else if (_IOC_DIR(cmd) & _IOC_WRITE) {
+
+ ret = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd));
+ }
+ if (ret) {
+ dev_err(vdce_device, "access denied\n");
+ return -1; /*error in access */
+ }
+
+ /* switch according value of cmd */
+ switch (cmd) {
+ /*this ioctl is used to request frame buffers to be
+ allocated by the ge module. The allocated buffers
+ are channel specific and can be addressed
+ by indexing */
+ case VDCE_REQBUF:
+ /* function to allocate the memory to input
+ or output buffer. */
+ if (copy_from_user(&reqbuff, (vdce_reqbufs_t *) arg,
+ sizeof(vdce_reqbufs_t))) {
+ ret = -EFAULT;
+ break;
+ }
+
+ ret = malloc_buff(&reqbuff, vdce_conf_chan);
+
+ if (copy_to_user((vdce_reqbufs_t *) arg,
+ &reqbuff, sizeof(vdce_reqbufs_t)))
+ ret = -EFAULT;
+ break;
+ /*this ioctl is used to query the physical address of a
+ particular frame buffer. */
+ case VDCE_QUERYBUF:
+ if (copy_from_user(&buffer, (vdce_buffer_t *) arg,
+ sizeof(vdce_buffer_t))) {
+ ret = -EFAULT;
+ break;
+ }
+ ret = get_buf_address(&buffer, vdce_conf_chan);
+
+ if (copy_to_user((vdce_buffer_t *) arg,
+ &buffer, sizeof(vdce_buffer_t)))
+ ret = -EFAULT;
+ break;
+
+ /* this ioctl is used to set the parameters
+ of the GE hardware, parameters. */
+ case VDCE_SET_PARAMS:
+ /* function to set the hardware configuration */
+ if (copy_from_user(&params, (vdce_params_t *) arg,
+ sizeof(vdce_params_t))) {
+ ret = -EFAULT;
+ break;
+ }
+ ret = vdce_check_common_params(&params);
+ if (0 == ret) {
+ ret = vdce_set_params(&params, vdce_conf_chan);
+ } else {
+ dev_err(vdce_device, "\n VDCE wrong parameters \n");
+ }
+ break;
+ /*this ioctl is used to get the GE hardware settings
+ associated with the current logical channel represented
+ by fd. */
+ case VDCE_GET_PARAMS:
+ /* function to get the hardware configuration */
+ ret = vdce_get_params((vdce_params_t *) arg, vdce_conf_chan);
+ break;
+ case VDCE_GET_DEFAULT:
+ /* this ioctl is used to get the default parameters
+ of the ge hardware */
+ ret = vdce_get_default((vdce_params_t *) arg);
+ break;
+
+ case VDCE_START:
+ if (copy_from_user(&start, (vdce_address_start_t *) arg,
+ sizeof(vdce_address_start_t))) {
+ ret = -EFAULT;
+ break;
+ }
+
+ ret = vdce_start(&start, vdce_conf_chan);
+ break;
+ default:
+ dev_dbg(vdce_device, "VDCE_ioctl: Invalid Command Value");
+ ret = -EINVAL;
+ }
+
+ dev_dbg(vdce_device, " vdce_ioctl L\n");
+
+ return ret;
+}
+static struct file_operations vdce_fops = {
+ .owner = THIS_MODULE,
+ .open = vdce_open,
+ .release = vdce_release,
+ .mmap = vdce_mmap,
+ .ioctl = vdce_ioctl,
+};
+
+/*
+ * vdce_isr : Function to register the ge character device driver
+ */
+irqreturn_t vdce_isr(int irq, void *dev_id)
+{
+ if (((vdce_current_chan->num_pass == VDCE_MULTIPASS) &&
+ (vdce_current_chan->vdce_complete == VDCE_PASS1_STARTED))) {
+ vdce_current_chan->vdce_complete = VDCE_PASS2_STARTED;
+
+ tasklet_schedule(&short_tasklet);
+
+ } else {
+ vdce_current_chan->vdce_complete = VDCE_COMPLETED;
+
+ }
+
+ if(vdce_current_chan->vdce_complete == VDCE_COMPLETED) {
+ complete(&(device_config.sem_isr));
+ }
+ return IRQ_HANDLED;
+}
+
+/*
+ * process_nonblock : Function to process_nonblocking call
+ */
+void process_bottomhalf(unsigned long ret)
+{
+ /* codec mode used */
+ channel_config_t *vdce_conf_chan =
+ vdce_current_chan;
+ int pass_num;
+ if (vdce_conf_chan->vdce_complete == VDCE_PASS2_STARTED) {
+ /* set 2 pass register configuration */
+ pass_num = 1;
+ } else {
+ vdce_conf_chan->vdce_complete = VDCE_PASS1_STARTED;
+ /* set 1 pass register configuration */
+ pass_num = 0;
+ }
+ /*function call to set up the hardware */
+ vdce_hw_setup(&vdce_conf_chan->register_config[pass_num]);
+
+ /*function call to enable ge hardware */
+ ret = vdce_enable(&vdce_conf_chan->register_config[pass_num]);
+
+ dev_dbg(vdce_device, "<fn> process_nonblock L</fn>\n");
+}
+static void vdce_platform_release(struct device *device)
+{
+ /* this is called when the reference count goes to zero */
+}
+static int __init vdce_probe(struct device *device)
+{
+ vdce_device = device;
+ return 0;
+}
+static int vdce_remove(struct device *device)
+{
+ return 0;
+}
+static struct class *vdce_class = NULL;
+
+static struct platform_device graphics_device = {
+ .name = DRIVERNAME,
+ .id = 2,
+ .dev = {
+ .release = vdce_platform_release,
+ }
+};
+static struct device_driver vdce_driver = {
+ .name = DRIVERNAME,
+ .bus = &platform_bus_type,
+ .probe = vdce_probe,
+ .remove = vdce_remove,
+};
+
+/*
+ * vdce_init : Function to register ge character driver
+ */
+static int __init vdce_init(void)
+{
+ int result;
+ int adr;
+ int size;
+ struct device *temp =NULL;
+
+ device_config.module_usage_count = 0;
+
+ /* register the driver in the kernel */
+ result = alloc_chrdev_region(&dev, 0, 1, DRIVER_NAME);
+ if (result < 0) {
+ printk(KERN_ERR "\nDaVincige: Module intialization failed.\
+ could not register character device");
+ return -ENODEV;
+ }
+ /* initialize of character device */
+ cdev_init(&c_dev, &vdce_fops);
+ c_dev.owner = THIS_MODULE;
+ c_dev.ops = &vdce_fops;
+ /* addding character device */
+ result = cdev_add(&c_dev, dev, 1);
+ if (result) {
+ printk(KERN_ERR "NOtICE \nDaVincige:Error %d adding DavinciVDCE\
+ ..error no:", result);
+ result = -EINVAL;
+ goto label1;
+ }
+ /* registeration of character device */
+ register_chrdev(MAJOR(dev), DRIVER_NAME, &vdce_fops);
+
+ /* register driver as a platform driver */
+ if (driver_register(&vdce_driver) != 0) {
+ result = -EINVAL;
+ goto label2;
+ }
+ /* register the drive as a platform device */
+ if (platform_device_register(&graphics_device) != 0) {
+ result = -EINVAL;
+ goto label3;
+ }
+ vdce_class = class_create(THIS_MODULE, DRIVERNAME);
+ if (IS_ERR(vdce_class)) {
+ result = -EIO;
+ goto label4;
+ }
+
+ temp = device_create(vdce_class, NULL, dev, NULL, DRIVERNAME);
+ if (IS_ERR(temp)) {
+ result = -EIO;
+ goto label5;
+ }
+
+ init_completion(&(device_config.sem_isr));
+ init_completion(&(device_config.edma_sem));
+ init_completion(&(device_config.device_access));
+
+ device_config.sem_isr.done = 0;
+ device_config.edma_sem.done = 0;
+ device_config.device_access.done = 1;
+
+ /* initialize the device mutex */
+ device_config.irqlock = SPIN_LOCK_UNLOCKED;
+
+ /* set up the Interrupt handler for ge interrupt */
+ result =
+ request_irq(VDCE_INTERRUPT, vdce_isr, 0,
+ "DavinciHD_VDCE", (void *)NULL);
+ if (result < 0) {
+ printk(KERN_ERR "Cannot initialize IRQ \n");
+ result = -EINVAL;
+ goto label6;
+
+ }
+
+ device_config.inter_size = inter_bufsize;
+ if (device_config.inter_size > 0) {
+ device_config.inter_buffer =
+ (void *)(__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order((device_config.
+ inter_size))));
+ if (!(device_config.inter_buffer)) {
+ goto label6;
+ }
+
+ adr = (unsigned int)device_config.inter_buffer;
+ size = PAGE_SIZE << (get_order((device_config.inter_size)));
+ while (size > 0) {
+ /* make sure the frame buffers
+ are never swapped out of memory */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ }
+
+ result = vdce_enable_int();
+ if (result < 0) {
+ printk(KERN_ERR "Cannot init register \n");
+ result = -EINVAL;
+ goto label6;
+
+ }
+
+ /* Allocate Any EDMA Channel*/
+ dma_ch = edma_alloc_channel(EDMA_CHANNEL_ANY, callback1, NULL,
+ EVENTQ_DEFAULT);
+ if (0 > dma_ch) {
+ printk(KERN_ERR "Cannot Allocate Channel:%d\n", dma_ch);
+ goto label6;
+ }
+
+ return 0;
+
+label6:
+ device_destroy(vdce_class, dev);
+label5:
+ class_destroy(vdce_class);
+label4:
+ platform_device_unregister(&graphics_device);
+label3:
+ driver_unregister(&vdce_driver);
+label2:
+ cdev_del(&c_dev);
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+label1:
+ unregister_chrdev_region(dev, 1);
+
+ return result;
+}
+
+/*
+ * vdce_cleanup : Function is called by the kernel. It unregister
+ * the device.
+ */
+void __exit vdce_cleanup(void)
+{
+ device_destroy(vdce_class, dev);
+ if (device_config.inter_size > 0) {
+ vdce_free_pages((int)device_config.inter_buffer,
+ ((device_config.inter_size)));
+ }
+ /* disable interrupt */
+ free_irq(VDCE_INTERRUPT, (void *)NULL);
+ /* destroy simple class */
+ class_destroy(vdce_class);
+ /* remove platform device */
+ platform_device_unregister(&graphics_device);
+ /* remove platform driver */
+ driver_unregister(&vdce_driver);
+ /* unregistering the driver from the kernel */
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+
+ cdev_del(&c_dev);
+
+ edma_free_channel(dma_ch);
+
+ unregister_chrdev_region(dev, 1);
+
+}
+
+module_init(vdce_init)
+ module_exit(vdce_cleanup)
diff --git a/drivers/char/davinci_vdce_hw.c b/drivers/char/davinci_vdce_hw.c
new file mode 100644
index 00000000..95600b59
--- /dev/null
+++ b/drivers/char/davinci_vdce_hw.c
@@ -0,0 +1,320 @@
+/* *
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* davinci_vdce_hw.c file */
+
+/*Header files*/
+#include "davinci_vdce_hw.h"
+#include <linux/davinci_vdce.h>
+#include <linux/kernel.h> /* printk() */
+#include <linux/device.h>
+
+extern struct device *vdce_device;
+
+/*
+ * vdce_hardware_setup :Function to set GE hardware configuration registers
+ */
+void vdce_hw_setup(vdce_hw_config_t * register_config)
+{
+ /* all devdbg will be removed after UT */
+ int status;
+ dev_dbg(vdce_device, " vdce_hw_setup E\n");
+
+ /* setting the hardware register GE ctrl */
+ regw(register_config->vdce_ctrl, VDCE_CTRL);
+ dev_dbg(vdce_device, "GE CTRL : %x regr = %x \n",
+ register_config->vdce_ctrl, regr(VDCE_CTRL));
+
+ regw(register_config->vdce_emulation_ctrl, VDCE_EMULATION_CTRL);
+ dev_dbg(vdce_device, "VDCE_EMULATION_CTRL %x regr = %x\n",
+ register_config->vdce_emulation_ctrl,
+ regr(VDCE_EMULATION_CTRL));
+
+ /* setting the hardware register sdr_fmt */
+ regw(register_config->vdce_sdr_fmt, VDCE_SDR_FMT);
+ dev_dbg(vdce_device, "VDCE_SDR_FMT %x regr = %x\n",
+ register_config->vdce_sdr_fmt, regr(VDCE_SDR_FMT));
+
+ /* setting the hardware register req_sz */
+ regw(register_config->vdce_req_sz, VDCE_REQ_SZ);
+ dev_dbg(vdce_device, "VDCE_REQ_SZ %x regr = %x\n",
+ register_config->vdce_req_sz, regr(VDCE_REQ_SZ));
+
+ regw(register_config->vdce_prcs_unit_size, VDCE_PRCS_UNIT_SIZE);
+ dev_dbg(vdce_device, "VDCE_PRCS_UNIT_SIZE : %x regr = %x \n",
+ register_config->vdce_prcs_unit_size,
+ regr(VDCE_PRCS_UNIT_SIZE));
+
+ regw(register_config->src_Y_strt_ps, SRC_Y_STRT_PS);
+ dev_dbg(vdce_device, "SRC_Y_STRT_PS : %x regr = %x \n",
+ register_config->src_Y_strt_ps, regr(SRC_Y_STRT_PS));
+
+ regw(register_config->src_Y_sz, SRC_Y_SZ);
+ dev_dbg(vdce_device, "SRC_Y_SZ : %x regr = %x \n",
+ register_config->src_Y_sz, regr(SRC_Y_SZ));
+
+ regw(register_config->src_C_strt_ps, SRC_C_STRT_PS);
+ dev_dbg(vdce_device, "SRC_C_STRT_PS : %x regr = %x \n",
+ register_config->src_C_strt_ps, regr(SRC_C_STRT_PS));
+
+ regw(register_config->src_C_sz, SRC_C_SZ);
+ dev_dbg(vdce_device, "SRC_C_SZ : %x regr = %x \n",
+ register_config->src_C_sz, regr(SRC_C_SZ));
+
+ regw(register_config->src_bmp_strt_ps, SRC_BMP_STRT_PS);
+ dev_dbg(vdce_device, "SRC_BMP_STRT_PS : %x regr = %x \n",
+ register_config->src_bmp_strt_ps, regr(SRC_BMP_STRT_PS));
+
+ regw(register_config->src_bmp_sz, SRC_BMP_SZ);
+ dev_dbg(vdce_device, "SRC_BMP_SZ : %x regr = %x \n",
+ register_config->src_bmp_sz, regr(SRC_BMP_SZ));
+
+ regw(register_config->res_Y_strt_ps, RES_Y_STRT_PS);
+ dev_dbg(vdce_device, "RES_Y_STRT_PS : %x regr = %x \n",
+ register_config->res_Y_strt_ps, regr(RES_Y_STRT_PS));
+
+ regw(register_config->res_Y_sz, RES_Y_SZ);
+ dev_dbg(vdce_device, "RES_Y_SZ : %x regr = %x \n",
+ register_config->res_Y_sz, regr(RES_Y_SZ));
+
+ regw(register_config->res_C_strt_ps, RES_C_STRT_PS);
+ dev_dbg(vdce_device, "RES_C_STRT_PS : %x regr = %x \n",
+ register_config->res_C_strt_ps, regr(RES_C_STRT_PS));
+
+ regw(register_config->res_C_sz, RES_C_SZ);
+ dev_dbg(vdce_device, "RES_C_SZ : %x regr = %x \n",
+ register_config->res_C_sz, regr(RES_C_SZ));
+
+ regw(register_config->res_bmp_strt_ps, RES_BMP_STRT_PS);
+ dev_dbg(vdce_device, "RES_BMP_STRT_PS : %x regr = %x \n",
+ register_config->res_bmp_strt_ps, regr(RES_BMP_STRT_PS));
+
+ regw(register_config->rsz_mode, RSZ_MODE);
+ dev_dbg(vdce_device, "RSZ_MODE : %x regr = %x \n",
+ register_config->rsz_mode, regr(RSZ_MODE));
+
+ regw(register_config->rsz_h_mag, RSZ_H_MAG);
+ dev_dbg(vdce_device, "RSZ_H_MAG : %x regr = %x \n",
+ register_config->rsz_h_mag, regr(RSZ_H_MAG));
+
+ regw(register_config->rsz_v_mag, RSZ_V_MAG);
+ dev_dbg(vdce_device, "RSZ_V_MAG : %x regr = %x \n",
+ register_config->rsz_v_mag, regr(RSZ_V_MAG));
+
+ regw(register_config->rsz_h_phase, RSZ_H_PHASE);
+ dev_dbg(vdce_device, "RSZ_H_PHASE : %x regr = %x \n",
+ register_config->rsz_h_phase, regr(RSZ_H_PHASE));
+
+ regw(register_config->rsz_v_phase, RSZ_V_PHASE);
+ dev_dbg(vdce_device, "RSZ_V_PHASE : %x regr = %x \n",
+ register_config->rsz_v_phase, regr(RSZ_V_PHASE));
+
+ regw(register_config->rsz_alf_intensity, RSZ_ALF_INTENSITY);
+ dev_dbg(vdce_device, "RSZ_ALF_INTENSITY : %x regr = %x \n",
+ register_config->rsz_alf_intensity, regr(RSZ_ALF_INTENSITY));
+
+ regw(register_config->ccv_mode, CCV_MODE);
+ dev_dbg(vdce_device, "CCV_MODE : %x regr = %x \n",
+ register_config->ccv_mode, regr(CCV_MODE));
+
+ regw(register_config->bld_lut[0], BLD_LUT_00);
+ dev_dbg(vdce_device, "BLD_LUT_00 : %x regr = %x \n",
+ register_config->bld_lut[0], regr(BLD_LUT_00));
+
+ regw(register_config->bld_lut[1], BLD_LUT_01);
+ dev_dbg(vdce_device, "BLD_LUT_01 : %x regr = %x \n",
+ register_config->bld_lut[1], regr(BLD_LUT_01));
+
+ regw(register_config->bld_lut[2], BLD_LUT_02);
+ dev_dbg(vdce_device, "BLD_LUT_02 : %x regr = %x \n",
+ register_config->bld_lut[2], regr(BLD_LUT_02));
+
+ regw(register_config->bld_lut[3], BLD_LUT_03);
+ dev_dbg(vdce_device, "BLD_LUT_03 : %x regr = %x \n",
+ register_config->bld_lut[3], regr(BLD_LUT_03));
+
+ regw(register_config->rgmp_ctrl, RGMP_CTRL);
+ dev_dbg(vdce_device, "RGMP_CTRL : %x regr = %x \n",
+ register_config->rgmp_ctrl, regr(RGMP_CTRL));
+
+ regw(register_config->epd_luma_width, EPD_LUMA_WIDTH);
+ dev_dbg(vdce_device, "EPD_LUMA_WIDTH : %x regr = %x \n",
+ register_config->epd_luma_width, regr(EPD_LUMA_WIDTH));
+
+ regw(register_config->epd_chroma_width, EPD_CHROMA_WIDTH);
+ dev_dbg(vdce_device, "EPD_CHROMA_WIDTH : %x regr = %x \n",
+ register_config->epd_chroma_width, regr(EPD_CHROMA_WIDTH));
+
+ /* source addres for luma and chroma */
+ regw(register_config->vdce_src_strt_add_ytop, VDCE_SRC_STRT_ADD_YTOP);
+
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_ADD_YTOP %x regr = %x\n",
+ register_config->vdce_src_strt_add_ytop,
+ regr(VDCE_SRC_STRT_ADD_YTOP));
+
+ regw(register_config->vdce_src_strt_add_ctop, VDCE_SRC_STRT_ADD_CTOP);
+
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_ADD_CTOP %x regr = %x\n",
+ register_config->vdce_src_strt_add_ctop,
+ regr(VDCE_SRC_STRT_ADD_CTOP));
+
+ regw(register_config->vdce_src_strt_add_ybot, VDCE_SRC_STRT_ADD_YBOT);
+
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_ADD_YBOT %x regr = %x\n",
+ register_config->vdce_src_strt_add_ybot,
+ regr(VDCE_SRC_STRT_ADD_YBOT));
+
+ regw(register_config->vdce_src_strt_add_cbot, VDCE_SRC_STRT_ADD_CBOT);
+
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_ADD_CBOT %x regr = %x\n",
+ register_config->vdce_src_strt_add_cbot,
+ regr(VDCE_SRC_STRT_ADD_CBOT));
+
+ /* result address for luma and chroma */
+ regw(register_config->vdce_res_strt_add_ytop, VDCE_RES_STRT_ADD_YTOP);
+
+ dev_dbg(vdce_device, "VDCE_RES_STRT_ADD_YTOP %x regr = %x\n",
+ register_config->vdce_res_strt_add_ytop,
+ regr(VDCE_RES_STRT_ADD_YTOP));
+
+ regw(register_config->vdce_res_strt_add_ctop, VDCE_RES_STRT_ADD_CTOP);
+ dev_dbg(vdce_device, "VDCE_RES_STRT_ADD_CTOP %x regr = %x\n",
+ register_config->vdce_res_strt_add_ctop,
+ regr(VDCE_RES_STRT_ADD_CTOP));
+
+ regw(register_config->vdce_res_strt_add_ybot, VDCE_RES_STRT_ADD_YBOT);
+
+ dev_dbg(vdce_device, "VDCE_RES_STRT_ADD_YTOP %x regr = %x\n",
+ register_config->vdce_res_strt_add_ybot,
+ regr(VDCE_RES_STRT_ADD_YBOT));
+
+ regw(register_config->vdce_res_strt_add_cbot, VDCE_RES_STRT_ADD_CBOT);
+ dev_dbg(vdce_device, "VDCE_RES_STRT_ADD_CBOT %x regr = %x\n",
+ register_config->vdce_res_strt_add_cbot,
+ regr(VDCE_RES_STRT_ADD_CBOT));
+
+ /* source offset for luma and chroma */
+ regw(register_config->vdce_src_add_ofst_ytop, VDCE_SRC_STRT_OFF_YTOP);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_OFF_YTOP %x regr = %x\n",
+ register_config->vdce_src_add_ofst_ytop,
+ regr(VDCE_SRC_STRT_OFF_YTOP));
+
+ regw(register_config->vdce_src_add_ofst_ctop, VDCE_SRC_STRT_OFF_CTOP);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_OFF_CTOP %x regr = %x\n",
+ register_config->vdce_src_add_ofst_ctop,
+ regr(VDCE_SRC_STRT_OFF_CTOP));
+
+ regw(register_config->vdce_src_add_ofst_ybot, VDCE_SRC_STRT_OFF_YBOT);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_OFF_YBOT %x regr = %x\n",
+ register_config->vdce_src_add_ofst_ybot,
+ regr(VDCE_SRC_STRT_OFF_YBOT));
+
+ regw(register_config->vdce_src_add_ofst_cbot, VDCE_SRC_STRT_OFF_CBOT);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_OFF_CBOT %x regr = %x\n",
+ register_config->vdce_src_add_ofst_cbot,
+ regr(VDCE_SRC_STRT_OFF_CBOT));
+
+ /* result offset for luma and chroma */
+ regw(register_config->vdce_res_strt_off_ytop, VDCE_RES_STRT_OFF_YTOP);
+ dev_dbg(vdce_device, "VDCE_RES_STRT_OFF_YTOP %x regr = %x\n",
+ register_config->vdce_res_strt_off_ytop,
+ regr(VDCE_RES_STRT_OFF_YTOP));
+
+ regw(register_config->vdce_res_strt_off_ctop, VDCE_RES_STRT_OFF_CTOP);
+ dev_dbg(vdce_device, "VDCE_RES_STRT_OFF_CTOP %x regr = %x\n",
+ register_config->vdce_res_strt_off_ctop,
+ regr(VDCE_RES_STRT_OFF_CTOP));
+
+ regw(register_config->vdce_res_strt_off_ybot, VDCE_RES_STRT_OFF_YBOT);
+ dev_dbg(vdce_device, "VDCE_RES_STRT_OFF_YBOT %x regr = %x\n",
+ register_config->vdce_res_strt_off_ybot,
+ regr(VDCE_RES_STRT_OFF_YBOT));
+
+ regw(register_config->vdce_res_strt_off_cbot, VDCE_RES_STRT_OFF_CBOT);
+ dev_dbg(vdce_device, "VDCE_RES_STRT_OFF_CBOT %x regr = %x\n",
+ register_config->vdce_res_strt_off_cbot,
+ regr(VDCE_RES_STRT_OFF_CBOT));
+
+ /* bitmap address and offset for luma and chroma */
+ regw(register_config->vdce_src_strt_add_bmp_top,
+ VDCE_SRC_STRT_ADD_BMP_TOP);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_ADD_BMP_TOP %x regr = %x\n",
+ register_config->vdce_src_strt_add_bmp_top,
+ regr(VDCE_SRC_STRT_ADD_BMP_TOP));
+
+ regw(register_config->vdce_src_strt_add_bmp_bot,
+ VDCE_SRC_STRT_ADD_BMP_BOT);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_ADD_BMP_BOT %x regr = %x\n",
+ register_config->vdce_src_strt_add_bmp_bot,
+ regr(VDCE_SRC_STRT_ADD_BMP_BOT));
+
+ regw(register_config->vdce_src_strt_off_bmp_top,
+ VDCE_SRC_STRT_OFF_BMP_TOP);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_OFF_BMP_TOP %x regr = %x\n",
+ register_config->vdce_src_strt_off_bmp_top,
+ regr(VDCE_SRC_STRT_OFF_BMP_TOP));
+
+ regw(register_config->vdce_src_strt_off_bmp_bot,
+ VDCE_SRC_STRT_OFF_BMP_BOT);
+
+ status = regr(VDCE_STATUS);
+ dev_dbg(vdce_device, "VDCE_SRC_STRT_OFF_BMP_BOT %x regr = %x\n",
+ register_config->vdce_src_strt_off_bmp_bot,
+ regr(VDCE_SRC_STRT_OFF_BMP_BOT));
+ dev_dbg(vdce_device, "vdce_hw_setup L\n");
+}
+
+/*
+ * vdce_enable : Function to enable the ge module
+ */
+int vdce_enable(vdce_hw_config_t * register_config)
+{
+ dev_dbg(vdce_device, " vdce_enable E\n");
+ /* enabling the resizer the setting enable bit */
+ register_config->vdce_ctrl =
+ BITSET(register_config->vdce_ctrl, VDCE_ENABLE);
+
+ regw(register_config->vdce_ctrl, VDCE_CTRL);
+
+ register_config->vdce_ctrl =
+ BITRESET(register_config->vdce_ctrl, VDCE_ENABLE);
+
+ dev_dbg(vdce_device, "vdce enable L\n");
+
+ return 0;
+}
+
+/*
+ * vdce_interrupt set : Function to set interrupt
+ */
+inline int vdce_enable_int(void)
+{
+ regw(1, VDCE_INTEN);
+ regw(1, VDCE_INTEN_SET);
+ /* Disable emulation control signal */
+ regw(1, VDCE_EMULATION_CTRL);
+ return 0;
+}
+
+/*
+ * vdce_clear_status : Function to clear the status
+ */
+inline int vdce_clear_status(void)
+{
+ regw(1, VDCE_STATUS_CLR);
+ return 0;
+}
diff --git a/drivers/char/davinci_vdce_hw.h b/drivers/char/davinci_vdce_hw.h
new file mode 100644
index 00000000..5c7f3bbc
--- /dev/null
+++ b/drivers/char/davinci_vdce_hw.h
@@ -0,0 +1,260 @@
+/* *
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* davinci_vdce_hw.h file */
+#ifndef DAVINCI_VDCE_HW_H
+#define DAVINCI_VDCE_HW_H
+
+#ifdef __KERNEL__
+#include <mach/hardware.h>
+#include <asm/io.h>
+#endif
+
+#define MAX_BLEND_TABLE (4)
+
+/* Register offset mapping*/
+#ifdef __KERNEL__
+#define BITSET(variable,bit) ((variable)| (1<<bit))
+#define BITRESET(variable,bit) ((variable)& (~(0x00000001<<(bit))))
+#define BITGET(variable,bit) (((variable)& (1<<bit))>>(bit))
+
+/* Bit position for various bits . Used in BITSET */
+#define SET_CCV_V_TYPE (2)
+#define SET_CCV_H_TYPE (3)
+#define SET_CCV_IN_MPEG1 (1)
+#define SET_CCV_OUT_MPEG1 (0)
+#define SET_CCV_ENABLE (10)
+#define VDCE_RASTER_SCANNING (0)
+/* Bits position number to be used in bitset for setting various registers */
+#define SET_HRSZ_ENABLE (0)
+#define SET_VRSZ_ENABLE (4)
+#define SET_HRSZ_ALF_ENABLE (8)
+#define SET_VRSZ_ALF_ENABLE (12)
+#define SET_RSZ_H_TYPE (1)
+#define SET_RSZ_V_TYPE (5)
+#define SET_RSZ_H_ALF_mode (9)
+#define SET_LUMA_ENABLE (1)
+#define SET_CHROMA_ENABLE (2)
+#define SET_TOP_ENABLE (7)
+#define SET_BOT_ENABLE (6)
+#define SET_SRC_MODE (14)
+#define SET_RES_MODE (13)
+#define SET_BMP_MODE (15)
+#define SET_PRO_MODE (12)
+/* various modes supported in hardware. The value generated by them */
+#define MODE_PRECODEC (2)
+#define MODE_POSTCODEC (3)
+#define MODE_TRANSCODEC (1)
+#define MODE_EPAD (0)
+
+#define SET_RSZ_ENABLE (8)
+#define SET_RMAP_ENABLE (9)
+#define SET_BLEND_ENABLE (11)
+#define FOUR_TWO_TWO (1)
+#define SET_RMAP_YENABLE (3)
+#define SET_RMAP_CENABLE (11)
+
+/* various shifts and masks of register */
+#define LUMA_CHROMA_ENABLE_MASK (0x6)
+#define LUMA_CHROMA_ENABLE_SHIFT (0x1)
+#define TOP_BOTTOM_ENABLE_MASK (0xc0)
+#define TOP_BOTTOM_ENABLE_SHIFT (0x6)
+
+/* Mask and shift values for range mapping registers */
+#define RANGE_MAP_Y_SHIFT (0)
+#define RANGE_MAP_Y_MASK (0x7<<RANGE_MAP_Y_SHIFT)
+#define RANGE_MAP_C_SHIFT (8)
+#define RANGE_MAP_C_MASK (0x7<<RANGE_MAP_C_SHIFT)
+/* Mask and shift values for Blending registers */
+#define BLD_LUT_Y_SHIFT (16)
+#define BLD_LUT_Y_MASK (0xff<<BLD_LUT_Y_SHIFT)
+#define BLD_LUT_CB_SHIFT (0)
+#define BLD_LUT_CB_MASK (0xff<<BLD_LUT_CB_SHIFT)
+#define BLD_LUT_CR_SHIFT (8)
+#define BLD_LUT_CR_MASK (0xff<<BLD_LUT_CR_SHIFT)
+#define BLD_LUT_FCT_SHIFT (24)
+#define BLD_LUT_FCT_MASK (0xff<<BLD_LUT_FCT_SHIFT)
+/* Mask and shift values for Edgepadding registers */
+#define EPD_C_HEXT_SHIFT (0)
+#define EPD_C_HEXT_MASK (0x3f<<EPD_C_HEXT_SHIFT)
+#define EPD_C_VEXT_SHIFT (8)
+#define EPD_C_VEXT_MASK (0x3f<<EPD_C_VEXT_SHIFT )
+#define EPD_Y_VEXT_SHIFT (8)
+#define EPD_Y_VEXT_MASK (0x3f<<EPD_Y_VEXT_SHIFT)
+#define EPD_Y_HEXT_SHIFT (0)
+#define EPD_Y_HEXT_MASK (0x3f<<EPD_Y_HEXT_SHIFT )
+/* Mask and shift values for Resizing registers */
+#define RSZ_H_MAG_SHIFT (0)
+#define RSZ_H_MAG_MASK (0xfff<<RSZ_H_MAG_SHIFT )
+#define RSZ_V_MAG_SHIFT (0)
+#define RSZ_V_MAG_MASK (0xfff<<RSZ_V_MAG_SHIFT )
+
+#define VDCE_REQ_SZ_SHIFT (0)
+#define VDCE_REQ_SZ_MASK (0x1ff<<VDCE_REQ_SZ_SHIFT )
+#define VDCE_PRCS_UNIT_SIZE_SHIFT (0)
+#define VDCE_PRCS_UNIT_SIZE_MASK (0x1ff<<VDCE_PRCS_UNIT_SIZE_SHIFT )
+/* source and result image size shift and mask */
+#define SRC_Y_HSZ_SHIFT (0)
+#define SRC_Y_HSZ_MASK (0xfff<<SRC_Y_HSZ_SHIFT )
+#define SRC_Y_VSZ_SHIFT (16)
+#define SRC_Y_VSZ_MASK (0xfff<<SRC_Y_VSZ_SHIFT )
+#define RES_Y_HSZ_SHIFT (0)
+#define RES_Y_HSZ_MASK (0xfff<<SRC_Y_HSZ_SHIFT )
+#define RES_Y_VSZ_SHIFT (16)
+#define RES_Y_VSZ_MASK (0xfff<<RES_Y_VSZ_SHIFT )
+#define SRC_C_HSZ_SHIFT (0)
+#define SRC_C_HSZ_MASK (0xfff<<SRC_C_HSZ_SHIFT )
+#define SRC_C_VSZ_SHIFT (16)
+#define SRC_C_VSZ_MASK (0xfff<<SRC_C_VSZ_SHIFT )
+#define RES_C_HSZ_SHIFT (0)
+#define RES_C_HSZ_MASK (0xfff<<RES_C_HSZ_SHIFT )
+#define RES_C_VSZ_SHIFT (16)
+#define RES_C_VSZ_MASK (0xfff<<RES_C_VSZ_SHIFT)
+#define SRC_BMP_HSZ_SHIFT (0)
+#define SRC_BMP_HSZ_MASK (0xfff<<SRC_BMP_HSZ_SHIFT )
+#define SRC_BMP_VSZ_SHIFT (16)
+#define SRC_BMP_VSZ_MASK (0xfff<<SRC_BMP_VSZ_SHIFT )
+#define SRC_BMP_STRT_HPS_SHIFT (0)
+#define SRC_BMP_STRT_HPS_MASK (0xfff<<SRC_BMP_STRT_HPS_SHIFT)
+#define RES_BMP_STRT_VPS_SHIFT (16)
+#define RES_BMP_STRT_VPS_MASK (0xfff<<RES_BMP_STRT_VPS_SHIFT )
+
+#define VDCE_MODE_SHIFT (4)
+#define VDCE_MODE_MASK (0x3 <<VDCE_MODE_SHIFT )
+#define RSZ_ALF_INTENSITY_SHIFT (0)
+#define RSZ_ALF_INTENSITY_MASK (0xff)
+/* Base address and offset for various ge registers */
+#define VDCE_IOBASE_VADDR IO_ADDRESS(0x01c12800)
+/*#define VDCE_IOBASE_VADDR (0x01c12800)*/
+#define VDCE_ENABLE (0x0)
+#define VDCE_CTRL (0x04)
+#define VDCE_INTEN (0x08)
+#define VDCE_INTEN_SET (0x0c)
+#define VDCE_EMULATION_CTRL (0x1c)
+#define VDCE_STATUS (0x14)
+#define VDCE_STATUS_CLR (0x18)
+#define VDCE_SDR_FMT (0x20)
+#define VDCE_REQ_SZ (0x24)
+#define VDCE_PRCS_UNIT_SIZE (0x28)
+#define VDCE_SRC_STRT_ADD_YTOP (0x40)
+#define VDCE_SRC_STRT_OFF_YTOP (0x48)
+#define VDCE_SRC_STRT_ADD_YBOT (0x4c)
+#define VDCE_SRC_STRT_OFF_YBOT (0x54)
+#define VDCE_SRC_STRT_ADD_CTOP (0x58)
+#define VDCE_SRC_STRT_OFF_CTOP (0x60)
+#define VDCE_SRC_STRT_ADD_CBOT (0x64)
+#define VDCE_SRC_STRT_OFF_CBOT (0x6c)
+#define VDCE_SRC_STRT_ADD_BMP_TOP (0x70)
+#define VDCE_SRC_STRT_OFF_BMP_TOP (0x74)
+#define VDCE_SRC_STRT_ADD_BMP_BOT (0x78)
+#define VDCE_SRC_STRT_OFF_BMP_BOT (0x7c)
+#define VDCE_RES_STRT_ADD_YTOP (0x80)
+#define VDCE_RES_STRT_OFF_YTOP (0x88)
+#define VDCE_RES_STRT_ADD_YBOT (0x8c)
+#define VDCE_RES_STRT_OFF_YBOT (0x94)
+#define VDCE_RES_STRT_ADD_CTOP (0x98)
+#define VDCE_RES_STRT_OFF_CTOP (0xa0)
+#define VDCE_RES_STRT_ADD_CBOT (0xa4)
+#define VDCE_RES_STRT_OFF_CBOT (0xac)
+#define SRC_Y_STRT_PS (0xc0)
+#define SRC_Y_SZ (0xc4)
+#define SRC_C_STRT_PS (0xc8)
+#define SRC_C_SZ (0xcc)
+#define SRC_BMP_STRT_PS (0xd0)
+#define SRC_BMP_SZ (0xd4)
+#define RES_Y_STRT_PS (0xe0)
+#define RES_Y_SZ (0xe4)
+#define RES_C_STRT_PS (0xe8)
+#define RES_C_SZ (0xec)
+#define RES_BMP_STRT_PS (0xf0)
+#define RSZ_MODE (0x100)
+#define RSZ_H_MAG (0x104)
+#define RSZ_V_MAG (0x108)
+#define RSZ_H_PHASE (0x10c)
+#define RSZ_V_PHASE (0x110)
+#define RSZ_ALF_INTENSITY (0x114)
+#define CCV_MODE (0x120)
+#define BLD_LUT_00 (0x140)
+#define BLD_LUT_01 (0x144)
+#define BLD_LUT_02 (0x148)
+#define BLD_LUT_03 (0x14c)
+#define RGMP_CTRL (0x160)
+#define EPD_LUMA_WIDTH (0x184)
+#define EPD_CHROMA_WIDTH (0x188)
+/* Register read/write */
+#define regw(val,reg) __raw_writel(val,((reg)+ VDCE_IOBASE_VADDR))
+#define regr(reg) __raw_readl((reg)+VDCE_IOBASE_VADDR)
+
+#define vdce_isbusy() (regr(VDCE_CTRL) & 0x01)
+
+/* register mapping structure */
+typedef struct vdce_hw_config {
+ unsigned int vdce_ctrl;
+ unsigned int vdce_emulation_ctrl;
+ unsigned int vdce_sdr_fmt;
+ unsigned int vdce_req_sz;
+ unsigned int vdce_prcs_unit_size;
+ u32 src_Y_strt_ps;
+ u32 src_Y_sz;
+ u32 src_C_strt_ps;
+ u32 src_C_sz;
+ u32 src_bmp_strt_ps;
+ u32 src_bmp_sz;
+ u32 res_Y_strt_ps;
+ u32 res_Y_sz;
+ u32 res_C_strt_ps;
+ u32 res_C_sz;
+ u32 res_bmp_strt_ps;
+ unsigned int vdce_src_strt_add_ytop;
+ unsigned int vdce_src_strt_add_ctop;
+ unsigned int vdce_src_strt_add_ybot;
+ unsigned int vdce_src_strt_add_cbot;
+ unsigned int vdce_res_strt_add_ytop;
+ unsigned int vdce_res_strt_add_ctop;
+ unsigned int vdce_res_strt_add_ybot;
+ unsigned int vdce_res_strt_add_cbot;
+ unsigned int vdce_src_add_ofst_ytop;
+ unsigned int vdce_src_add_ofst_ctop;
+ unsigned int vdce_src_add_ofst_ybot;
+ unsigned int vdce_src_add_ofst_cbot;
+ unsigned int vdce_src_strt_add_bmp_top;
+ unsigned int vdce_src_strt_add_bmp_bot;
+ unsigned int vdce_src_strt_off_bmp_top;
+ unsigned int vdce_src_strt_off_bmp_bot;
+ unsigned int vdce_res_strt_off_ytop;
+ unsigned int vdce_res_strt_off_ctop;
+ unsigned int vdce_res_strt_off_ybot;
+ unsigned int vdce_res_strt_off_cbot;
+ u32 rsz_mode;
+ u32 rsz_h_mag;
+ u32 rsz_v_mag;
+ u32 rsz_h_phase;
+ u32 rsz_v_phase;
+ u32 rsz_alf_intensity;
+ u32 ccv_mode;
+ u32 bld_lut[MAX_BLEND_TABLE];
+ u32 rgmp_ctrl;
+ u32 epd_luma_width;
+ u32 epd_chroma_width;
+} vdce_hw_config_t;
+
+int vdce_enable_int(void);
+int vdce_clear_status(void);
+int vdce_enable(vdce_hw_config_t *);
+void vdce_hw_setup(vdce_hw_config_t *);
+#endif
+#endif
diff --git a/drivers/char/dm355_def_para.c b/drivers/char/dm355_def_para.c
new file mode 100644
index 00000000..fb531a68
--- /dev/null
+++ b/drivers/char/dm355_def_para.c
@@ -0,0 +1,361 @@
+/*
+ *
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ **************************************************************************/
+#include <media/davinci/dm355_ipipe.h>
+/* Defaults for pre-filter */
+struct prev_prefilter dm355_pf_defaults = {
+ .en = 0,
+ .en_adapt_prefilter = 1,
+ .en_adapt_dotred = 0,
+ .aver_meth_gs1 = PREV_PF_AVG4PIX,
+ .aver_meth_gs2 = PREV_PF_AVG4PIX,
+ .pre_gain = 128,
+ .pre_shf = 9,
+ .pre_thr_g = 500,
+ .pre_thr_b = 4096,
+ .pre_thr_1 = 800
+};
+
+/* Defaults for dfc */
+struct prev_dfc dm355_dfc_defaults = {
+ .en = 0,
+ .vert_copy_method = IPIPE_DFC_COPY_FROM_TOP,
+ .dfc_size = 0
+};
+
+/* Defaults for 2D - nf */
+struct prev_nf dm355_nf_defaults = {
+ .en = 0,
+ .gr_sample_meth = IPIPE_NF_BOX,
+ .shft_val = 0,
+ .spread_val = 0
+};
+
+/* Defaults for white balance */
+struct prev_wb dm355_wb_defaults = {
+ .dgn = {2, 0}, /* 512 */
+ .gain_r = {2, 0x10},
+ .gain_gr = {1, 0x70},
+ .gain_gb = {1, 0x70},
+ .gain_b = {2, 0x30}
+};
+
+/* Defaults for rgb2rgb */
+struct prev_rgb2rgb dm355_rgb2rgb_defaults = {
+ .coef_rr = {1, 0xa1}, /* 256 */
+ .coef_gr = {0xf, 0x8a},
+ .coef_br = {0xf, 0xd5},
+ .coef_rg = {0xf, 0xa1},
+ .coef_gg = {1, 0xc4}, /* 256 */
+ .coef_bg = {0xf, 0x9b},
+ .coef_rb = {0xf, 0xbd},
+ .coef_gb = {0xf, 0xb1},
+ .coef_bb = {1, 0x92}, /* 256 */
+ .out_ofst_r = 0,
+ .out_ofst_g = 0,
+ .out_ofst_b = 0
+};
+
+/* Defaults for gamma correction */
+struct prev_gamma dm355_gamma_defaults = {
+ .bypass_r = 1,
+ .bypass_b = 1,
+ .bypass_g = 1,
+ .tbl_sel = IPIPE_GAMMA_TBL_ROM
+};
+
+/* Defaults for rgb2yuv conversion */
+struct prev_rgb2yuv dm355_rgb2yuv_defaults = {
+ .coef_ry = {0, 0x4d},
+ .coef_gy = {0, 0x96},
+ .coef_by = {0, 0x1d},
+ .coef_rcb = {3, 0xD4}, /* 981 */
+ .coef_gcb = {3, 0xAC}, /* 939 */
+ .coef_bcb = {0, 0x80},
+ .coef_rcr = {0, 0x80},
+ .coef_gcr = {3, 0x95}, /* 917 */
+ .coef_bcr = {3, 0xEB}, /* 1003 */
+ .out_ofst_y = 0,
+ .out_ofst_cb = 0x80,
+ .out_ofst_cr = 0x80
+};
+
+/* Defaults for lumina adjustments */
+struct prev_lum_adj dm355_lum_adj_defaults = {
+ .brightness = 16,
+ .contast = 16
+};
+
+/* Defaults for yuv 422 conversion */
+struct prev_yuv422_conv dm355_yuv422_conv_defaults = {
+ .lum_min = 0,
+ .lum_max = 255,
+ .chrom_min = 0,
+ .chrom_max = 255,
+ .en_chrom_lpf = 0,
+ .chrom_pos = IPIPE_YUV422_CHR_POS_CENTRE
+};
+
+/* Defaults for yuv 422 conversion */
+struct prev_yee dm355_yee_defaults = {
+ .en = 0,
+ .en_emf = 0,
+ .hpf_shft = 4,
+ .hpf_coef_00 = 48,
+ .hpf_coef_01 = 12,
+ .hpf_coef_02 = 1014,
+ .hpf_coef_10 = 12,
+ .hpf_coef_11 = 0,
+ .hpf_coef_12 = 1018,
+ .hpf_coef_20 = 1014,
+ .hpf_coef_21 = 1018,
+ .hpf_coef_22 = 1022
+};
+
+/* Defaults for yuv 422 conversion */
+struct prev_fcs dm355_fcs_defaults = {
+ .en = 0,
+ .type = IPIPE_FCS_Y,
+ .hpf_shft_y = 0,
+ .gain_shft_c = 7,
+ .thr = 235,
+ .sgn = 0,
+ .lth = 0
+};
+
+#define WIDTH_I 640
+#define HEIGHT_I 480
+#define WIDTH_O 640
+#define HEIGHT_O 480
+
+struct ipipe_params dm355_ipipe_defs = {
+ .ipipeif_param = {
+ .data_shift = IPIPEIF_BITS9_0,
+ .clock_select = SDRAM_CLK,
+ .ialaw = ALAW_OFF,
+ .pack_mode = SIXTEEN_BIT,
+ .avg_filter = AVG_OFF,
+ .clk_div = IPIPEIF_DIVIDE_SIXTH,
+ .source = SDRAM_RAW,
+ .decimation = IPIPEIF_DECIMATION_OFF,
+ .mode = ONE_SHOT,
+ .glob_hor_size = WIDTH_I + 8,
+ .glob_ver_size = HEIGHT_I + 10,
+ .hnum = WIDTH_I,
+ .vnum = HEIGHT_I,
+ .adofs = WIDTH_I * 2,
+ /* resize ratio 16/rsz */
+ .rsz = 16,
+ /* U10Q9 */
+ .gain = 0x200,
+ },
+ .ipipe_mode = ONE_SHOT,
+ .ipipe_dpaths_fmt = IPIPE_RAW2YUV,
+ .ipipe_dpaths_bypass = IPIPE_BYPASS_OFF,
+ .ipipe_colpat_olop = IPIPE_GREEN_BLUE,
+ .ipipe_colpat_olep = IPIPE_BLUE,
+ .ipipe_colpat_elop = IPIPE_RED,
+ .ipipe_colpat_elep = IPIPE_GREEN_RED,
+ .ipipe_vst = 0,
+ .ipipe_vsz = HEIGHT_I - 1,
+ .ipipe_hst = 0,
+ .ipipe_hsz = WIDTH_I - 1,
+ .rsz_seq_seq = DISABLE,
+ .rsz_seq_tmm = DISABLE,
+ /* output confined mode (normal mode) */
+ .rsz_seq_hrv = DISABLE,
+ .rsz_seq_vrv = DISABLE,
+ .rsz_seq_crv = DISABLE,
+ .rsz_aal = DISABLE,
+ .rsz_rsc_param = {
+ {
+ .rsz_mode = ONE_SHOT,
+ .rsz_i_vst = 0,
+ .rsz_i_vsz = 0,
+ .rsz_i_hst = 0,
+ .rsz_o_vsz = HEIGHT_O - 1,
+ .rsz_o_hsz = WIDTH_O - 1,
+ .rsz_o_hst = 0,
+ .rsz_v_phs = 0,
+ .rsz_v_dif = 243,
+ .rsz_h_phs = 0,
+ .rsz_h_dif = 243,
+ .rsz_h_typ = RSZ_H_INTP_CUBIC,
+ .rsz_h_lse_sel = RSZ_H_LPF_LSE_INTERN,
+ .rsz_h_lpf = 0
+ },
+ {
+ ONE_SHOT,
+ 0,
+ 0,
+ 0,
+ 239,
+ 319,
+ 0,
+ 0,
+ 256,
+ 0,
+ 256,
+ RSZ_H_INTP_CUBIC,
+ RSZ_H_LPF_LSE_INTERN,
+ 0
+ }
+ },
+ .rsz2rgb = {
+ {
+ .rsz_rgb_en = DISABLE,
+ },
+ {
+ DISABLE,
+ }
+ },
+ .ext_mem_param = {
+ {
+ .rsz_sdr_bad_h = 0,
+ .rsz_sdr_bad_l = 0,
+ .rsz_sdr_sad_h = 0,
+ .rsz_sdr_sad_l = 0,
+ .rsz_sdr_oft = WIDTH_O * 2,
+ .rsz_sdr_ptr_s = 0,
+ .rsz_sdr_ptr_e = WIDTH_O
+ },
+ {
+ 0,
+ 0,
+ 0,
+ 0,
+ WIDTH_O * 2,
+ 0,
+ 8191
+ }
+ },
+ .rsz_en[0] = ENABLE,
+ .rsz_en[1] = DISABLE
+};
+
+struct prev_single_shot_config dm355_prev_ss_config_defs = {
+ .bypass = IPIPE_BYPASS_OFF,
+ .input = {
+ .image_width = WIDTH_I,
+ .image_height = HEIGHT_I,
+ .vst = 0,
+ .hst = 0,
+ .ppln = WIDTH_I + 8,
+ .lpfr = HEIGHT_I + 10,
+ .clk_div = IPIPEIF_DIVIDE_SIXTH,
+ .data_shift = IPIPEIF_BITS9_0,
+ .dec_en = 0,
+ /* resize ratio 16/rsz */
+ .rsz = 16,
+ .avg_filter_en = AVG_OFF,
+ .gain = 0x200,
+ .pix_fmt = IPIPE_BAYER,
+ .colp_olop = IPIPE_GREEN_BLUE,
+ .colp_olep = IPIPE_BLUE,
+ .colp_elop = IPIPE_RED,
+ .colp_elep = IPIPE_GREEN_RED
+ },
+ .output = {
+ .pix_fmt = IPIPE_UYVY
+ }
+};
+
+struct prev_continuous_config dm355_prev_cont_config_defs = {
+ .bypass = IPIPE_BYPASS_OFF,
+ .input = {
+ .en_df_sub = 0,
+ .dec_en = 0,
+ .rsz = 16,
+ .avg_filter_en = AVG_OFF,
+ .gain = 0x200,
+ .colp_olop = IPIPE_GREEN_BLUE,
+ .colp_olep = IPIPE_BLUE,
+ .colp_elop = IPIPE_RED,
+ .colp_elep = IPIPE_GREEN_RED
+ }
+};
+
+struct rsz_single_shot_config dm355_rsz_ss_config_defs = {
+ .input = {
+ .image_width = WIDTH_I,
+ .image_height = HEIGHT_I,
+ .vst = 0,
+ .hst = 0,
+ .ppln = WIDTH_I + 8,
+ .lpfr = HEIGHT_I + 10,
+ .clk_div = IPIPEIF_DIVIDE_SIXTH,
+ .dec_en = 0,
+ /* resize ratio 16/rsz */
+ .rsz = 16,
+ .avg_filter_en = AVG_OFF,
+ .pix_fmt = IPIPE_UYVY
+ },
+ .output1 = {
+ .enable = 1,
+ .pix_fmt = IPIPE_UYVY,
+ .width = WIDTH_O,
+ .height = HEIGHT_O,
+ .vst = 0,
+ .hst = 0,
+ .h_intp_type = RSZ_H_INTP_CUBIC,
+ .h_lpf_lse_sel = RSZ_H_LPF_LSE_INTERN,
+ .lpf_user_val = 0
+ },
+ .output1 = {
+ .enable = 1,
+ .pix_fmt = IPIPE_UYVY,
+ .width = WIDTH_O,
+ .height = HEIGHT_O,
+ .vst = 0,
+ .hst = 0,
+ .h_intp_type = RSZ_H_INTP_CUBIC,
+ .h_lpf_lse_sel = RSZ_H_LPF_LSE_INTERN,
+ .lpf_user_val = 0
+ },
+ .en_flip_vert = 0,
+ .en_flip_horz = 0,
+ .chroma_sample_even = 0,
+ .en_vaaf = 0
+};
+
+struct rsz_continuous_config dm355_rsz_cont_config_defs = {
+ .input = {
+ .dec_en = 0,
+ /* resize ratio 16/rsz */
+ .rsz = 16,
+ .avg_filter_en = AVG_OFF,
+ .gain = 0x200
+ },
+ .en_output1 = 1,
+ .output2 = {
+ .enable = 0,
+ .pix_fmt = IPIPE_UYVY,
+ .width = WIDTH_O,
+ .height = HEIGHT_O,
+ .vst = 0,
+ .hst = 0,
+ .h_intp_type = RSZ_H_INTP_CUBIC,
+ .h_lpf_lse_sel = RSZ_H_LPF_LSE_INTERN,
+ .lpf_user_val = 0
+ },
+ .en_flip_vert = 0,
+ .en_flip_horz = 0,
+ .chroma_sample_even = 0,
+ .en_vaaf = 0
+};
diff --git a/drivers/char/dm355_def_para.h b/drivers/char/dm355_def_para.h
new file mode 100644
index 00000000..1c9d2d2d
--- /dev/null
+++ b/drivers/char/dm355_def_para.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* extern variables */
+#include <media/davinci/dm355_ipipe.h>
+extern struct prev_prefilter dm355_pf_defaults;
+extern struct prev_dfc dm355_dfc_defaults;
+extern struct prev_nf dm355_nf_defaults;
+extern struct prev_wb dm355_wb_defaults;
+extern struct prev_rgb2rgb dm355_rgb2rgb_defaults;
+extern struct prev_gamma dm355_gamma_defaults;
+extern struct prev_rgb2yuv dm355_rgb2yuv_defaults;
+extern struct prev_rgb2yuv dm355_rgb2yuv_defaults;
+extern struct prev_lum_adj dm355_lum_adj_defaults;
+extern struct prev_yuv422_conv dm355_yuv422_conv_defaults;
+extern struct prev_yee dm355_yee_defaults;
+extern struct prev_fcs dm355_fcs_defaults;
+extern struct prev_single_shot_config dm355_prev_ss_config_defs;
+extern struct prev_continuous_config dm355_prev_cont_config_defs;
+extern struct rsz_single_shot_config dm355_rsz_ss_config_defs;
+extern struct rsz_continuous_config dm355_rsz_cont_config_defs;
+extern struct ipipe_params dm355_ipipe_defs;
diff --git a/drivers/char/dm355_ipipe.c b/drivers/char/dm355_ipipe.c
new file mode 100644
index 00000000..253d8be8
--- /dev/null
+++ b/drivers/char/dm355_ipipe.c
@@ -0,0 +1,2389 @@
+/*
+ * Copyright (C) 2005-2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+//#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/mutex.h>
+#include <linux/device.h>
+#include <linux/videodev2.h>
+#include <media/davinci/dm355_ipipe.h>
+#include <media/davinci/imp_hw_if.h>
+#include <media/davinci/vpss.h>
+
+#include <mach/irqs.h>
+
+#include "dm355_ipipe_hw.h"
+#include "dm355_def_para.h"
+
+/* IPIPE module operation state */
+struct ipipe_oper_state {
+ /* Operation state in continuous mode */
+ unsigned int state;
+ /* Semaphore to protect the common hardware configuration */
+ struct mutex lock;
+ /* previewer config state */
+ unsigned int prev_config_state;
+ /* Shared configuration of the hardware */
+ struct ipipe_params *shared_config_param;
+ /* shared resource in use */
+ unsigned int resource_in_use;
+ /* resizer config state */
+ unsigned int rsz_config_state;
+ /* resizer chained with previewer */
+ unsigned int rsz_chained;
+ /* CCDC API related variables */
+ /* Buffer type, interleaved or field seperated for interlaced
+ * scan
+ */
+ unsigned int buffer_type;
+ /* frame format, 0 - interlaced, 1 - progressive */
+ unsigned int frame_format;
+ /* input pixel format */
+ enum imp_pix_formats in_pixel_format;
+ /* input pixel format */
+ enum imp_pix_formats out_pixel_format;
+};
+
+/* Operation mode of image processor (imp) */
+static u32 oper_mode = IMP_MODE_SINGLE_SHOT;
+module_param(oper_mode, uint, S_IRUGO);
+/* enable or disable serializer */
+static u32 en_serializer;
+module_param(en_serializer, uint, S_IRUGO);
+
+/* ipipe module operation state & configuration */
+static struct ipipe_oper_state oper_state;
+
+/* Pre-filter data */
+static struct prev_prefilter pf;
+static int validate_pf_params(struct device *dev);
+static int set_pf_params(struct device *dev, void *param, int len);
+static int get_pf_params(struct device *dev, void *param, int len);
+
+/* Defect pixel correction data */
+static struct prev_dfc dfc;
+static int validate_dfc_params(struct device *dev);
+static int set_dfc_params(struct device *dev, void *param, int len);
+static int get_dfc_params(struct device *dev, void *param, int len);
+
+/* Noise filter */
+static struct prev_nf nf;
+static int validate_nf_params(struct device *dev);
+static int set_nf_params(struct device *dev, void *param, int len);
+static int get_nf_params(struct device *dev, void *param, int len);
+
+/* White Balance */
+static struct prev_wb wb;
+static int validate_wb_params(struct device *dev);
+static int set_wb_params(struct device *dev, void *param, int len);
+static int get_wb_params(struct device *dev, void *param, int len);
+
+/* RGB2RGB conversion */
+static struct prev_rgb2rgb rgb2rgb;
+static int validate_rgb2rgb_params(struct device *dev);
+static int set_rgb2rgb_params(struct device *dev, void *param, int len);
+static int get_rgb2rgb_params(struct device *dev, void *param, int len);
+
+/* Gamma correction */
+static struct prev_gamma gamma;
+static int validate_gamma_params(struct device *dev);
+static int set_gamma_params(struct device *dev, void *param, int len);
+static int get_gamma_params(struct device *dev, void *param, int len);
+
+/* RGB2YUV conversion */
+static struct prev_rgb2yuv rgb2yuv;
+static int validate_rgb2yuv_params(struct device *dev);
+static int set_rgb2yuv_params(struct device *dev, void *param, int len);
+static int get_rgb2yuv_params(struct device *dev, void *param, int len);
+
+/* Lumina Adjustment */
+static struct prev_lum_adj lum_adj;
+static int validate_lum_adj_params(struct device *dev);
+static int set_lum_adj_params(struct device *dev, void *param, int len);
+static int get_lum_adj_params(struct device *dev, void *param, int len);
+
+/* YUV 422 conversion */
+static struct prev_yuv422_conv yuv422_conv;
+static int validate_yuv422_conv_params(struct device *dev);
+static int set_yuv422_conv_params(struct device *dev, void *param, int len);
+static int get_yuv422_conv_params(struct device *dev, void *param, int len);
+
+/* Edge Enhancement */
+static struct prev_yee yee;
+static int validate_yee_params(struct device *dev);
+static int set_yee_params(struct device *dev, void *param, int len);
+static int get_yee_params(struct device *dev, void *param, int len);
+
+/* False Color Suppression */
+static struct prev_fcs fcs;
+static int validate_fcs_params(struct device *dev);
+static int set_fcs_params(struct device *dev, void *param, int len);
+static int get_fcs_params(struct device *dev, void *param, int len);
+
+/* Tables for various tuning modules */
+struct ipipe_dfc_entry ipipe_dfc_table[MAX_SIZE_DFC];
+struct ipipe_gamma_entry ipipe_gamma_table_r[MAX_SIZE_GAMMA];
+struct ipipe_gamma_entry ipipe_gamma_table_b[MAX_SIZE_GAMMA];
+struct ipipe_gamma_entry ipipe_gamma_table_g[MAX_SIZE_GAMMA];
+struct ipipe_gamma_entry ipipe_gamma_table_all[MAX_SIZE_GAMMA];
+short ipipe_yee_table[MAX_SIZE_EEC];
+
+static struct prev_module_if prev_modules[PREV_MAX_MODULES] = {
+ {
+ .version = "3.1",
+ .module_id = PREV_PRE_FILTER,
+ .module_name = "Pre-filter",
+ .control = 0,
+ .path = (IMP_RAW2RAW | IMP_RAW2YUV),
+ .set = set_pf_params,
+ .get = get_pf_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_DFC,
+ .module_name = "Defect correction",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_dfc_params,
+ .get = get_dfc_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_NF,
+ .module_name = "2-D Noise filter",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_nf_params,
+ .get = get_nf_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_WB,
+ .module_name = "White balance",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_wb_params,
+ .get = get_wb_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_RGB2RGB,
+ .module_name = "RGB-RGB Conversion",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_rgb2rgb_params,
+ .get = get_rgb2rgb_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_GAMMA,
+ .module_name = "Gamma Correction",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_gamma_params,
+ .get = get_gamma_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_RGB2YUV,
+ .module_name = "RGB-YCbCr conversion",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_rgb2yuv_params,
+ .get = get_rgb2yuv_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_LUM_ADJ,
+ .module_name = "Luminance Adjustment",
+ .control = 1,
+ .path = IMP_RAW2YUV,
+ .set = set_lum_adj_params,
+ .get = get_lum_adj_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_YUV422_CONV,
+ .module_name = "YUV 422 conversion",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_yuv422_conv_params,
+ .get = get_yuv422_conv_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_YEE,
+ .module_name = "Edge Enhancer",
+ .control = 1,
+ .path = IMP_YUV2YUV,
+ .set = set_yee_params,
+ .get = get_yee_params
+ },
+ {
+ .version = "3.1",
+ .module_id = PREV_FCS,
+ .module_name = "False Color Suppression",
+ .control = 1,
+ .path = IMP_YUV2YUV,
+ .set = set_fcs_params,
+ .get = get_fcs_params
+ }
+};
+
+/* function prototypes */
+static struct prev_module_if *prev_enum_preview_cap(struct device *dev,
+ int index);
+static unsigned int prev_get_oper_mode(void);
+static unsigned int ipipe_get_oper_state(void);
+static void ipipe_set_oper_state(unsigned int state);
+static unsigned int ipipe_rsz_chain_state(void);
+static void *ipipe_alloc_config_block(struct device *dev, int shared);
+static void ipipe_dealloc_config_block(struct device *dev, void *config_block);
+static void ipipe_set_user_config_defaults(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode,
+ void *config);
+static int ipipe_set_preview_config(struct device *dev,
+ unsigned int oper_mode,
+ void *user_config, void *config);
+static int ipipe_set_resize_config(struct device *dev, unsigned int oper_mode,
+ int resizer_chained,
+ void *user_config, void *config);
+
+static void ipipe_enable(unsigned char en, void *config);
+static void ipipe_get_irq(struct irq_numbers *irq);
+static unsigned int ipipe_get_rsz_config_state(void);
+static int ipipe_do_hw_setup(struct device *dev, void *config);
+static unsigned int ipipe_get_prev_config_state(void);
+static void ipipe_lock_chain(void);
+static void ipipe_unlock_chain(void);
+static void ipipe_dealloc_user_config_block(struct device *dev,
+ void *config_block);
+static void *ipipe_alloc_user_config_block(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, int *len);
+static int ipipe_update_outbuf1_address(void *config, unsigned int address);
+static int ipipe_update_outbuf2_address(void *config, unsigned int address);
+static int ipipe_set_ipipe_if_address(void *config, unsigned int address);
+
+/* IPIPE hardware limits */
+#define IPIPE_MAX_OUTPUT_WIDTH_A 1344
+#define IPIPE_MAX_OUTPUT_WIDTH_B 640
+
+/* Based on max resolution supported. QXGA */
+#define IPIPE_MAX_OUTPUT_HEIGHT_A 1536
+/* Based on max resolution supported. VGA */
+#define IPIPE_MAX_OUTPUT_HEIGHT_B 480
+#define RSZ_A 0
+#define RSZ_B 1
+
+/* Raw YUV formats */
+static u32 ipipe_raw_yuv_pix_formats[] =
+ {V4L2_PIX_FMT_UYVY};
+
+
+static int ipipe_enum_pix(u32 *pix, int i)
+{
+ if (i >= ARRAY_SIZE(ipipe_raw_yuv_pix_formats))
+ return -EINVAL;
+
+ *pix = ipipe_raw_yuv_pix_formats[i];
+ return 0;
+}
+static int ipipe_get_max_output_width(int rsz)
+{
+ if (rsz == RSZ_A)
+ return IPIPE_MAX_OUTPUT_WIDTH_A;
+ return IPIPE_MAX_OUTPUT_WIDTH_B;
+}
+
+static int ipipe_get_max_output_height(int rsz)
+{
+ if (rsz == RSZ_A)
+ return IPIPE_MAX_OUTPUT_HEIGHT_A;
+ return IPIPE_MAX_OUTPUT_HEIGHT_B;
+}
+
+static int ipipe_serialize(void)
+{
+ return en_serializer;
+}
+
+static void ipipe_dump_hw_config(void);
+/* APIs for CCDC driver */
+static int ipipe_set_input_win(struct imp_window *);
+static int ipipe_get_input_win(struct imp_window *);
+static int ipipe_set_in_pixel_format(enum imp_pix_formats);
+static int ipipe_set_out_pixel_format(enum imp_pix_formats);
+static int ipipe_set_buftype(unsigned char);
+static int ipipe_set_frame_format(unsigned char);
+static int ipipe_set_output_win(struct imp_window *win);
+static int ipipe_get_output_state(unsigned char out_sel);
+static int ipipe_get_line_length(unsigned char out_sel);
+static int ipipe_get_image_height(unsigned char out_sel);
+
+static struct imp_hw_interface dm355_ipipe_interface = {
+ .name = "DM355 IPIPE",
+ .owner = THIS_MODULE,
+ .prev_enum_modules = prev_enum_preview_cap,
+ .get_preview_oper_mode = prev_get_oper_mode,
+ .get_resize_oper_mode = prev_get_oper_mode,
+ .get_hw_state = ipipe_get_oper_state,
+ .set_hw_state = ipipe_set_oper_state,
+ .resizer_chain = ipipe_rsz_chain_state,
+ .lock_chain = ipipe_lock_chain,
+ .unlock_chain = ipipe_unlock_chain,
+ .serialize = ipipe_serialize,
+ .alloc_config_block = ipipe_alloc_config_block,
+ .dealloc_config_block = ipipe_dealloc_config_block,
+ .alloc_user_config_block = ipipe_alloc_user_config_block,
+ .dealloc_config_block = ipipe_dealloc_user_config_block,
+ .set_user_config_defaults = ipipe_set_user_config_defaults,
+ .set_preview_config = ipipe_set_preview_config,
+ .set_resizer_config = ipipe_set_resize_config,
+ .update_inbuf_address = ipipe_set_ipipe_if_address,
+ .update_outbuf1_address = ipipe_update_outbuf1_address,
+ .update_outbuf2_address = ipipe_update_outbuf2_address,
+ .enable = ipipe_enable,
+ .hw_setup = ipipe_do_hw_setup,
+ .get_preview_irq = ipipe_get_irq,
+ .get_rsz_irq = ipipe_get_irq,
+ .get_resizer_config_state = ipipe_get_rsz_config_state,
+ .get_previewer_config_state = ipipe_get_prev_config_state,
+ /* Below used by CCDC driver to set input and output params */
+ .set_input_win = ipipe_set_input_win,
+ .get_input_win = ipipe_get_input_win,
+ .set_in_pixel_format = ipipe_set_in_pixel_format,
+ .set_out_pixel_format = ipipe_set_out_pixel_format,
+ .set_buftype = ipipe_set_buftype,
+ .set_frame_format = ipipe_set_frame_format,
+ .set_output_win = ipipe_set_output_win,
+ .get_output_state = ipipe_get_output_state,
+ .get_line_length = ipipe_get_line_length,
+ .get_image_height = ipipe_get_image_height,
+ .get_max_output_width = ipipe_get_max_output_width,
+ .get_max_output_height = ipipe_get_max_output_height,
+ .enum_pix = ipipe_enum_pix,
+ /* debug function */
+ .dump_hw_config = ipipe_dump_hw_config,
+};
+
+static int ipipe_set_ipipe_if_address(void *config, unsigned int address)
+{
+ return (ipipe_set_ipipeif_address
+ ((struct ipipe_params *)config, address));
+}
+
+static void ipipe_lock_chain(void)
+{
+ mutex_lock(&oper_state.lock);
+ oper_state.resource_in_use = 1;
+ mutex_unlock(&oper_state.lock);
+}
+
+static void ipipe_unlock_chain(void)
+{
+ mutex_lock(&oper_state.lock);
+ oper_state.resource_in_use = 0;
+ oper_state.prev_config_state = STATE_NOT_CONFIGURED;
+ oper_state.rsz_config_state = STATE_NOT_CONFIGURED;
+ oper_state.rsz_chained = 0;
+ mutex_unlock(&oper_state.lock);
+}
+static int ipipe_process_pix_fmts(enum ipipe_pix_formats in_pix_fmt,
+ enum ipipe_pix_formats out_pix_fmt,
+ struct ipipe_params *param)
+{
+ enum ipipe_pix_formats temp_pix_fmt;
+ char packed = 0, a_law = 0;
+
+ if (in_pix_fmt == IPIPE_BAYER_8BIT_PACK) {
+ temp_pix_fmt = IPIPE_BAYER;
+ packed = 1;
+ } else if (in_pix_fmt == IPIPE_BAYER_8BIT_PACK_ALAW) {
+ packed = 1;
+ a_law = 1;
+ temp_pix_fmt = IPIPE_BAYER;
+ } else if (in_pix_fmt == IPIPE_BAYER)
+ temp_pix_fmt = IPIPE_BAYER;
+ else if (in_pix_fmt == IPIPE_UYVY)
+ temp_pix_fmt = IPIPE_UYVY;
+ else
+ return -1;
+
+ if (temp_pix_fmt == IPIPE_BAYER)
+ if (out_pix_fmt == IPIPE_BAYER)
+ param->ipipe_dpaths_fmt = IPIPE_RAW2RAW;
+ else if (out_pix_fmt == IPIPE_UYVY)
+ param->ipipe_dpaths_fmt = IPIPE_RAW2YUV;
+ else
+ return -1;
+ else if ((temp_pix_fmt == IPIPE_UYVY) && (out_pix_fmt == IPIPE_UYVY))
+ param->ipipe_dpaths_fmt = IPIPE_YUV2YUV;
+ else
+ return -1;
+ if (packed)
+ param->ipipeif_param.pack_mode = EIGHT_BIT;
+ if (a_law)
+ param->ipipeif_param.ialaw = ALAW_ON;
+ return 0;
+}
+
+static int ipipe_do_hw_setup(struct device *dev, void *config)
+{
+ struct ipipe_params *param = (struct ipipe_params *)config;
+ int ret = 0;
+
+ dev_dbg(dev, "ipipe_do_hw_setup\n");
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS)) {
+ param = oper_state.shared_config_param;
+ /* continuous mode setup */
+ ipipe_process_pix_fmts(oper_state.in_pixel_format,
+ oper_state.out_pixel_format,
+ param);
+ param->rsz_rsc_param[0].rsz_h_dif =
+ ((param->ipipe_hsz + 1) * 256) /
+ (param->rsz_rsc_param[0].rsz_o_hsz + 1);
+ param->rsz_rsc_param[0].rsz_v_dif =
+ ((param->ipipe_vsz + 1) * 256) /
+ (param->rsz_rsc_param[0].rsz_o_vsz + 1);
+ }
+ ret = ipipe_hw_setup(param);
+ mutex_unlock(&oper_state.lock);
+ return ret;
+}
+static void ipipe_get_irq(struct irq_numbers *irq)
+{
+ irq->sdram = IRQ_DM355_IPIPE_SDR;
+ irq->update = -1;
+}
+
+static unsigned int ipipe_rsz_chain_state(void)
+{
+ return oper_state.rsz_chained;
+}
+
+#define CHECKRANGE(val, val1, val2) \
+ { if (val < val1 || val > val2) \
+ return -1; }
+
+#define CHECKMORE(val, val1) \
+ { if (val > val1) \
+ return -1; }
+
+static int validate_pf_params(struct device *dev)
+{
+ CHECKMORE((pf.en), 1);
+ if (pf.en) {
+ CHECKMORE((pf.en_adapt_prefilter), 1);
+ CHECKMORE((pf.en_adapt_dotred), 1);
+ CHECKMORE((pf.pre_gain), 255);
+ CHECKMORE((pf.pre_shf), 15);
+ CHECKMORE((pf.pre_thr_g), 0x3fff);
+ CHECKMORE((pf.pre_thr_b), 0x3fff);
+ CHECKMORE((pf.pre_thr_1), 0x3fff);
+ }
+ return 0;
+}
+
+static int ipipe_update_outbuf1_address(void *config, unsigned int address)
+{
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS))
+ return (ipipe_set_resizer_address
+ (oper_state.shared_config_param, 0, address));
+ return (ipipe_set_resizer_address
+ ((struct ipipe_params *)config, 0, address));
+}
+
+static int ipipe_update_outbuf2_address(void *config, unsigned int address)
+{
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS))
+ return (ipipe_set_resizer_address
+ (oper_state.shared_config_param, 1, address));
+ return (ipipe_set_resizer_address
+ ((struct ipipe_params *)config, 1, address));
+}
+
+static void ipipe_enable(unsigned char en, void *config)
+{
+ unsigned char val = 0;
+
+ if (en)
+ val = 1;
+ if (en)
+ regw_ip(0xff, IRQ_EN);
+ else
+ regw_ip(0x0, IRQ_EN);
+
+ if (oper_mode == IMP_MODE_CONTINUOUS) {
+ vpss_enable_clock(VPSS_IPIPE_CLOCK, 1);
+ regw_if(val, IPIPEIF_ENABLE);
+ if (oper_state.shared_config_param->rsz_en[0])
+ rsz_enable(0, en);
+ if (oper_state.shared_config_param->rsz_en[1])
+ rsz_enable(1, en);
+ regw_ip(val, IPIPE_EN);
+ } else {
+ while (regr_ip(IPIPE_EN));
+ regw_ip(val, IPIPE_EN);
+
+ while (regr_if(IPIPEIF_ENABLE));
+ regw_if(val, IPIPEIF_ENABLE);
+ }
+}
+static int set_pf_params(struct device *dev, void *param, int len)
+{
+ struct prev_prefilter *pf_param = (struct prev_prefilter *)param;
+
+ if (ISNULL(pf_param))
+ /* Copy defaults for pf */
+ memcpy((void *)&pf,
+ (void *)&dm355_pf_defaults,
+ sizeof(struct prev_prefilter));
+ else {
+ if (copy_from_user(&pf,
+ (struct prev_prefilter *)pf_param,
+ sizeof(struct prev_prefilter))) {
+ dev_err(dev,
+ "set_pf_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_pf_params(dev) < 0)
+ return -EINVAL;
+ }
+
+ /* Now set the values in the hw */
+ return (ipipe_set_pf_regs(&pf));
+}
+static int get_pf_params(struct device *dev, void *param, int len)
+{
+ struct prev_prefilter *pf_param = (struct prev_prefilter *)param;
+
+ if (copy_to_user((struct prev_prefilter *)pf_param,
+ &pf,
+ sizeof(struct prev_prefilter))) {
+ dev_err(dev, "get_pf_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_dfc_params(struct device *dev)
+{
+ int i;
+
+ CHECKMORE(dfc.en, 1);
+ if (dfc.en) {
+ CHECKRANGE((dfc.dfc_size), 1, MAX_SIZE_DFC);
+ if ((dfc.en) && (ISNULL(dfc.table)))
+ return -1;
+ for (i = 0; i < dfc.dfc_size; i++) {
+ CHECKMORE((dfc.table[i].horz_pos), 0xfff);
+ CHECKMORE((dfc.table[i].vert_pos), 0xfff);
+ }
+ }
+ return 0;
+}
+
+static int set_dfc_params(struct device *dev, void *param, int len)
+{
+ struct prev_dfc dfc_param;
+ struct ipipe_dfc_entry *temp;
+
+ if (ISNULL(param)) {
+ /* Copy defaults for dfc */
+ temp = dfc.table;
+ memcpy((void *)&dfc,
+ (void *)&dm355_dfc_defaults,
+ sizeof(struct prev_dfc));
+ dfc.table = temp;
+ } else {
+ if (copy_from_user(&dfc_param,
+ (struct prev_dfc *)param,
+ sizeof(struct prev_dfc))) {
+ dev_err(dev,
+ "set_dfc_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+
+ dfc.dfc_size = dfc_param.dfc_size;
+ dfc.en = dfc_param.en;
+ if (dfc.en) {
+ dfc.vert_copy_method = dfc_param.vert_copy_method;
+ if (copy_from_user(dfc.table,
+ (struct ipipe_dfc_entry *)dfc_param.table,
+ (dfc.dfc_size *
+ sizeof(struct ipipe_dfc_entry)))) {
+ dev_err(dev,
+ "set_dfc_params: Error in copying "
+ "dfc table to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_dfc_params(dev) < 0)
+ return -EINVAL;
+ }
+ }
+ return (ipipe_set_dfc_regs(&dfc));
+}
+
+static int get_dfc_params(struct device *dev, void *param, int len)
+{
+ struct prev_dfc user_dfc;
+ struct prev_dfc *dfc_param = (struct prev_dfc *)param;
+
+ /* First copy to temp since we need to preserve the dfc table ptr */
+ if (copy_from_user(&user_dfc,
+ dfc_param, sizeof(struct prev_dfc))) {
+ dev_err(dev, "get_dfc_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ user_dfc.en = dfc.en;
+ if (dfc.en) {
+ user_dfc.vert_copy_method = dfc.vert_copy_method;
+ user_dfc.dfc_size = dfc.dfc_size;
+ if (ISNULL(user_dfc.table)) {
+ dev_err(dev,
+ "get_dfc_params:dfc table ptr is null."
+ " Allocate for max entry\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(user_dfc.table,
+ dfc.table,
+ (user_dfc.dfc_size *
+ sizeof(struct ipipe_dfc_entry)))) {
+ dev_err(dev,
+ "get_dfc_params: Error in copy dfc table"
+ " to user\n");
+ return -EFAULT;
+ }
+ }
+ if (copy_to_user(dfc_param,
+ &user_dfc,
+ sizeof(struct prev_dfc))) {
+ dev_err(dev, "get_dfc_params: Error in copy to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_nf_params(struct device *dev)
+{
+ int i;
+
+ CHECKMORE((nf.en), 1);
+ if (nf.en) {
+ CHECKMORE((nf.shft_val), 3);
+ CHECKMORE((nf.spread_val), 3);
+ for (i = 0; i < IPIPE_NF_THR_TABLE_SIZE; i++)
+ CHECKMORE((nf.thr[i]), 0xfff);
+ for (i = 0; i < IPIPE_NF_STR_TABLE_SIZE; i++)
+ CHECKMORE((nf.str[i]), 31);
+ }
+ return 0;
+}
+
+static int set_nf_params(struct device *dev, void *param, int len)
+{
+ struct prev_nf *nf_param = (struct prev_nf *)param;
+
+ if (ISNULL(nf_param)) {
+ /* Copy defaults for nf */
+ memcpy((void *)&nf,
+ (void *)&dm355_nf_defaults,
+ sizeof(struct prev_nf));
+ memset((void *)nf.thr, 0, IPIPE_NF_THR_TABLE_SIZE);
+ memset((void *)nf.str, 0, IPIPE_NF_THR_TABLE_SIZE);
+ } else {
+
+ if (copy_from_user(&nf,
+ nf_param,
+ sizeof(struct prev_nf))) {
+ dev_err(dev,
+ "set_nf_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_nf_params(dev) < 0)
+ return -EINVAL;
+ }
+ /* Now set the values in the hw */
+ return (ipipe_set_d2f_nf_regs(&nf));
+}
+static int get_nf_params(struct device *dev, void *param, int len)
+{
+ struct prev_nf *nf_param = (struct prev_nf *)param;
+
+ if (copy_to_user((struct prev_nf *)nf_param,
+ &nf,
+ sizeof(struct prev_nf))) {
+ dev_err(dev, "get_nf_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_wb_params(struct device *dev)
+{
+ /* U10Q8 */
+ CHECKMORE((wb.dgn.integer), 3);
+ CHECKMORE((wb.dgn.decimal), 255);
+ /* U10Q7 */
+ CHECKMORE((wb.gain_r.integer), 7);
+ CHECKMORE((wb.gain_r.decimal), 127);
+ CHECKMORE((wb.gain_gr.integer), 7);
+ CHECKMORE((wb.gain_gr.decimal), 127);
+ CHECKMORE((wb.gain_gb.integer), 7);
+ CHECKMORE((wb.gain_gb.decimal), 127);
+ CHECKMORE((wb.gain_b.integer), 7);
+ CHECKMORE((wb.gain_b.decimal), 127);
+ return 0;
+}
+static int set_wb_params(struct device *dev, void *param, int len)
+{
+ struct prev_wb *wb_param = (struct prev_wb *)param;
+
+ dev_dbg(dev, "set_wb_params");
+ if (ISNULL(wb_param))
+ /* Copy defaults for wb */
+ memcpy((void *)&wb,
+ (void *)&dm355_wb_defaults,
+ sizeof(struct prev_wb));
+ else {
+ if (copy_from_user(&wb,
+ wb_param,
+ sizeof(struct prev_wb))) {
+ dev_err(dev,
+ "set_wb_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_wb_params(dev) < 0)
+ return -EINVAL;
+ }
+
+ /* Now set the values in the hw */
+ return (ipipe_set_wb_regs(&wb));
+}
+static int get_wb_params(struct device *dev, void *param, int len)
+{
+ struct prev_wb *wb_param = (struct prev_wb *)param;
+
+ dev_dbg(dev, "get_wb_params\n");
+ if (copy_to_user((struct prev_wb *)wb_param,
+ &wb,
+ sizeof(struct prev_wb))) {
+ dev_err(dev, "get_wb_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_rgb2rgb_params(struct device *dev)
+{
+ CHECKMORE((rgb2rgb.coef_rr.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_rr.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_gr.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_gr.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_br.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_br.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_rg.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_rg.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_gg.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_gg.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_bg.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_bg.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_rb.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_rb.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_gb.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_gb.integer), 0xf);
+ CHECKMORE((rgb2rgb.coef_bb.decimal), 0xff);
+ CHECKMORE((rgb2rgb.coef_bb.integer), 0xf);
+ /* S14Q0 */
+ CHECKMORE((rgb2rgb.out_ofst_r), 0x3fff);
+ CHECKMORE((rgb2rgb.out_ofst_g), 0x3fff);
+ CHECKMORE((rgb2rgb.out_ofst_b), 0x3fff);
+ return 0;
+}
+static int set_rgb2rgb_params(struct device *dev, void *param, int len)
+{
+ struct prev_rgb2rgb *rgb2rgb_param = (struct prev_rgb2rgb *)param;
+
+ if (ISNULL(rgb2rgb_param))
+ /* Copy defaults for rgb2rgb conversion */
+ memcpy((void *)&rgb2rgb,
+ (void *)&dm355_rgb2rgb_defaults,
+ sizeof(struct prev_rgb2rgb));
+ else {
+ if (copy_from_user(&rgb2rgb,
+ rgb2rgb_param,
+ sizeof(struct prev_rgb2rgb))) {
+ dev_err(dev,
+ "set_rgb2rgb_params: Error in "
+ "copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_rgb2rgb_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_rgb2rgb_regs(&rgb2rgb));
+}
+static int get_rgb2rgb_params(struct device *dev, void *param, int len)
+{
+ struct prev_rgb2rgb *rgb2rgb_param = (struct prev_rgb2rgb *)param;
+ if (copy_to_user((struct prev_rgb2rgb *)rgb2rgb_param,
+ &rgb2rgb,
+ sizeof(struct prev_rgb2rgb))) {
+ dev_err(dev, "get_rgb2rgb_params: Error in copy to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_gamma_params(struct device *dev)
+{
+ int table_size = 0, i;
+
+ CHECKMORE((gamma.bypass_r), 1);
+ CHECKMORE((gamma.bypass_b), 1);
+ CHECKMORE((gamma.bypass_g), 1);
+ if (gamma.tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+ if (!gamma.bypass_r) {
+ if (ISNULL(gamma.table_r))
+ return -1;
+ else {
+ for (i = 0; i < table_size; i++) {
+ CHECKMORE((gamma.table_r[i].
+ slope), 0x3ff);
+ CHECKMORE((gamma.table_r[i].
+ offset), 0x3ff);
+ }
+ }
+ }
+ if (!gamma.bypass_b) {
+ if (ISNULL(gamma.table_b))
+ return -1;
+ else {
+ for (i = 0; i < table_size; i++) {
+ CHECKMORE((gamma.table_b[i].
+ slope), 0x3ff);
+ CHECKMORE((gamma.table_b[i].
+ offset), 0x3ff);
+ }
+ }
+ }
+ if (!gamma.bypass_g) {
+ if (ISNULL(gamma.table_g))
+ return -1;
+ else {
+ for (i = 0; i < table_size; i++) {
+ CHECKMORE((gamma.table_g[i].
+ slope), 0x3ff);
+ CHECKMORE((gamma.table_g[i].
+ offset), 0x3ff);
+ }
+ }
+ }
+ if (!(ISNULL(gamma.table_rgb_all))) {
+ for (i = 0; i < table_size; i++) {
+ CHECKMORE((gamma.table_g[i].slope),
+ 0x3ff);
+ CHECKMORE((gamma.table_g[i].offset),
+ 0x3ff);
+ }
+ }
+ }
+ return 0;
+}
+static int set_gamma_params(struct device *dev, void *param, int len)
+{
+ int table_size = 0;
+ struct prev_gamma user_gamma;
+ struct prev_gamma *gamma_param = (struct prev_gamma *)param;
+
+ if (ISNULL(gamma_param)) {
+ /* Copy defaults for gamma */
+ gamma.bypass_r = dm355_gamma_defaults.bypass_r;
+ gamma.bypass_g = dm355_gamma_defaults.bypass_g;
+ gamma.bypass_b = dm355_gamma_defaults.bypass_b;
+ gamma.tbl_sel = dm355_gamma_defaults.tbl_sel;
+ gamma.tbl_size = dm355_gamma_defaults.tbl_size;
+ /* By default, we bypass the gamma correction.
+ So no values by default for tables
+ */
+ } else {
+ if (copy_from_user(&user_gamma,
+ gamma_param,
+ sizeof(struct prev_gamma))) {
+ dev_err(dev,
+ "set_gamma_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ gamma.bypass_r = user_gamma.bypass_r;
+ gamma.bypass_b = user_gamma.bypass_b;
+ gamma.bypass_g = user_gamma.bypass_g;
+ gamma.tbl_sel = user_gamma.tbl_sel;
+ gamma.tbl_size = user_gamma.tbl_size;
+
+ if (user_gamma.tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+ else {
+ dev_err(dev,
+ "set_gamma_params: Invalid"
+ " table_size\n");
+ return -EINVAL;
+ }
+
+ if (!user_gamma.bypass_r) {
+ if (copy_from_user(gamma.table_r,
+ user_gamma.table_r,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: R-Error"
+ " in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+
+ if (!user_gamma.bypass_b) {
+ if (copy_from_user(gamma.table_b,
+ user_gamma.table_b,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: B-Error"
+ " in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+
+ if (!user_gamma.bypass_g) {
+ if (copy_from_user(gamma.table_g,
+ user_gamma.table_g,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: G-Error "
+ "in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+
+ if ((!ISNULL(user_gamma.table_rgb_all))) {
+ if (copy_from_user(gamma.table_rgb_all,
+ user_gamma.table_rgb_all,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: All-Error"
+ " in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+ }
+
+ if (validate_gamma_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_gamma_regs(&gamma));
+}
+static int get_gamma_params(struct device *dev, void *param, int len)
+{
+ int table_size = 0;
+ struct prev_gamma user_gamma;
+ struct prev_gamma *gamma_param = (struct prev_gamma *)param;
+
+ if (copy_from_user(&user_gamma,
+ gamma_param,
+ sizeof(struct prev_gamma))) {
+ dev_err(dev, "get_gamma_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+
+ user_gamma.bypass_r = gamma.bypass_r;
+ user_gamma.bypass_g = gamma.bypass_g;
+ user_gamma.bypass_b = gamma.bypass_b;
+ user_gamma.tbl_sel = gamma.tbl_sel;
+ user_gamma.tbl_size = gamma.tbl_size;
+ if (gamma.tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+
+ if ((!gamma.bypass_r) && ((ISNULL(user_gamma.table_r)))) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty for R\n");
+ return -EINVAL;
+ } else {
+ if (copy_to_user(user_gamma.table_r,
+ gamma.table_r,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: R-Table Error in"
+ " copy to user\n");
+ return -EFAULT;
+ }
+ }
+
+ if ((!gamma.bypass_b) && ((ISNULL(user_gamma.table_b)))) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty for B\n");
+ return -EINVAL;
+ } else {
+ if (copy_to_user(user_gamma.table_b,
+ gamma.table_b,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: B-Table Error in"
+ " copy to user\n");
+ return -EFAULT;
+ }
+ }
+
+ if ((!gamma.bypass_g) && ((ISNULL(user_gamma.table_g)))) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty for G\n");
+ return -EINVAL;
+ } else {
+ if (copy_from_user(gamma.table_g,
+ user_gamma.table_g,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: G-Table"
+ "copy error\n");
+ return -EFAULT;
+ }
+ }
+
+ if (ISNULL(user_gamma.table_rgb_all)) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty "
+ "for RGB-all\n");
+ return -EINVAL;
+ } else {
+ if (copy_from_user(user_gamma.table_rgb_all,
+ gamma.table_rgb_all,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: RGB-all Table,"
+ " copy error\n");
+ return -EFAULT;
+ }
+ }
+ }
+ if (copy_to_user(gamma_param,
+ &user_gamma,
+ sizeof(struct prev_gamma))) {
+ dev_err(dev, "get_dfc_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_rgb2yuv_params(struct device *dev)
+{
+ /* S10Q8 */
+ CHECKMORE((rgb2yuv.coef_ry.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_ry.integer), 3);
+ CHECKMORE((rgb2yuv.coef_gy.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_gy.integer), 3);
+ CHECKMORE((rgb2yuv.coef_by.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_by.integer), 3);
+ CHECKMORE((rgb2yuv.coef_rcb.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_rcb.integer), 3);
+ CHECKMORE((rgb2yuv.coef_gcb.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_gcb.integer), 3);
+ CHECKMORE((rgb2yuv.coef_bcb.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_bcb.integer), 3);
+ CHECKMORE((rgb2yuv.coef_rcr.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_rcr.integer), 3);
+ CHECKMORE((rgb2yuv.coef_gcr.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_gcr.integer), 3);
+ CHECKMORE((rgb2yuv.coef_bcr.decimal), 255);
+ CHECKMORE((rgb2yuv.coef_bcr.integer), 3);
+ /* S9Q0 */
+ CHECKMORE((rgb2yuv.out_ofst_y), 0x1ff);
+ CHECKMORE((rgb2yuv.out_ofst_cb), 0x1ff);
+ CHECKMORE((rgb2yuv.out_ofst_cr), 0x1ff);
+ return 0;
+}
+static int set_rgb2yuv_params(struct device *dev, void *param, int len)
+{
+ struct prev_rgb2yuv *rgb2yuv_param = (struct prev_rgb2yuv *)param;
+
+ if (ISNULL(rgb2yuv_param))
+ /* Copy defaults for rgb2yuv conversion */
+ memcpy((void *)&rgb2yuv,
+ (void *)&dm355_rgb2yuv_defaults,
+ sizeof(struct prev_rgb2yuv));
+ else {
+ if (copy_from_user(&rgb2yuv,
+ rgb2yuv_param,
+ sizeof(struct prev_rgb2yuv))) {
+ dev_err(dev,
+ "set_rgb2yuv_params: Error in copy from"
+ " user\n");
+ return -EFAULT;
+ }
+ if (validate_rgb2yuv_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_rgb2ycbcr_regs(&rgb2yuv));
+}
+static int get_rgb2yuv_params(struct device *dev, void *param, int len)
+{
+ struct prev_rgb2yuv *rgb2yuv_param = (struct prev_rgb2yuv *)param;
+
+ if (copy_to_user((struct prev_rgb2yuv *)rgb2yuv_param,
+ &rgb2yuv,
+ sizeof(struct prev_rgb2yuv))) {
+ dev_err(dev, "get_rgb2yuv_params: Error in"
+ " copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_lum_adj_params(struct device *dev)
+{
+ return 0;
+}
+
+static int set_lum_adj_params(struct device *dev, void *param, int len)
+{
+ struct prev_lum_adj *lum_adj_param = (struct prev_lum_adj *)param;
+
+ if (ISNULL(lum_adj_param))
+ /* Copy defaults for Luminance adjustments */
+ memcpy((void *)&lum_adj,
+ (void *)&dm355_lum_adj_defaults,
+ sizeof(struct prev_lum_adj));
+ else {
+ if (copy_from_user(&lum_adj,
+ lum_adj_param,
+ sizeof(struct prev_lum_adj))) {
+ dev_err(dev,
+ "set_lum_adj_params: Error in copy"
+ " from user\n");
+ return -EFAULT;
+ }
+ if (validate_lum_adj_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_lum_adj_regs(&lum_adj));
+}
+static int get_lum_adj_params(struct device *dev, void *param, int len)
+{
+ struct prev_lum_adj *lum_adj_param = (struct prev_lum_adj *)param;
+
+ if (copy_to_user(lum_adj_param,
+ &lum_adj,
+ sizeof(struct prev_lum_adj))) {
+ dev_err(dev, "get_lum_adj_params: Error in copy"
+ " from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_yuv422_conv_params(struct device *dev)
+{
+ CHECKMORE((yuv422_conv.en_chrom_lpf), 1);
+ return 0;
+}
+
+static int set_yuv422_conv_params(struct device *dev, void *param, int len)
+{
+ struct prev_yuv422_conv *yuv422_conv_param =
+ (struct prev_yuv422_conv *)param;
+
+ if (ISNULL(yuv422_conv_param))
+ /* Copy defaults for yuv 422 conversion */
+ memcpy((void *)&yuv422_conv,
+ (void *)&dm355_yuv422_conv_defaults,
+ sizeof(struct prev_yuv422_conv));
+ else {
+ if (copy_from_user(&yuv422_conv,
+ yuv422_conv_param,
+ sizeof(struct prev_yuv422_conv))) {
+ dev_err(dev,
+ "set_yuv422_conv_params: Error in copy"
+ " from user\n");
+ return -EFAULT;
+ }
+ if (validate_yuv422_conv_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_yuv422_conv_regs(&yuv422_conv));
+}
+static int get_yuv422_conv_params(struct device *dev, void *param, int len)
+{
+ struct prev_yuv422_conv *yuv422_conv_param =
+ (struct prev_yuv422_conv *)param;
+
+ if (copy_to_user(yuv422_conv_param,
+ &yuv422_conv,
+ sizeof(struct prev_yuv422_conv))) {
+ dev_err(dev,
+ "get_yuv422_conv_params: Error in copy"
+ " from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_yee_params(struct device *dev)
+{
+ CHECKMORE((yee.en), 1);
+ if (yee.en) {
+ CHECKMORE((yee.en_emf), 1);
+ CHECKMORE((yee.hpf_shft), 15);
+ CHECKMORE((yee.hpf_coef_00), 0x3ff);
+ CHECKMORE((yee.hpf_coef_01), 0x3ff);
+ CHECKMORE((yee.hpf_coef_02), 0x3ff);
+ CHECKMORE((yee.hpf_coef_10), 0x3ff);
+ CHECKMORE((yee.hpf_coef_11), 0x3ff);
+ CHECKMORE((yee.hpf_coef_12), 0x3ff);
+ CHECKMORE((yee.hpf_coef_20), 0x3ff);
+ CHECKMORE((yee.hpf_coef_21), 0x3ff);
+ CHECKMORE((yee.hpf_coef_22), 0x3ff);
+ if (ISNULL(yee.table)) {
+ dev_err(dev, "EE table ptr null\n");
+ return -1;
+ }
+ }
+ return 0;
+}
+static int set_yee_params(struct device *dev, void *param, int len)
+{
+ short *temp_table;
+ struct prev_yee user_yee;
+ struct prev_yee *yee_param = (struct prev_yee *)param;
+
+ if (ISNULL(yee_param)) {
+ temp_table = yee.table;
+ /* Copy defaults for ns */
+ memcpy((void *)&yee,
+ (void *)&dm355_yee_defaults,
+ sizeof(struct prev_yee));
+ yee.table = temp_table;
+ } else {
+ if (copy_from_user(&user_yee,
+ yee_param,
+ sizeof(struct prev_yee))) {
+ dev_err(dev,
+ "set_yee_params: Error in copy from user\n");
+ return -EFAULT;
+ }
+ yee.en = user_yee.en;
+ if (user_yee.en) {
+ yee.en_emf = user_yee.en_emf;
+ yee.hpf_shft = user_yee.hpf_shft;
+ yee.hpf_coef_00 = user_yee.hpf_coef_00;
+ yee.hpf_coef_01 = user_yee.hpf_coef_01;
+ yee.hpf_coef_02 = user_yee.hpf_coef_02;
+ yee.hpf_coef_10 = user_yee.hpf_coef_10;
+ yee.hpf_coef_11 = user_yee.hpf_coef_11;
+ yee.hpf_coef_12 = user_yee.hpf_coef_12;
+ yee.hpf_coef_20 = user_yee.hpf_coef_20;
+ yee.hpf_coef_21 = user_yee.hpf_coef_21;
+ yee.hpf_coef_22 = user_yee.hpf_coef_22;
+
+ if (ISNULL(user_yee.table)) {
+ dev_err(dev, "get_yee_params: yee table"
+ " ptr null\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(yee.table,
+ user_yee.table,
+ (MAX_SIZE_EEC * sizeof(short)))) {
+ dev_err(dev,
+ "set_yee_params: Error in copy"
+ " from user\n");
+ return -EFAULT;
+ }
+ }
+ if (validate_yee_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_ee_regs(&yee));
+}
+static int get_yee_params(struct device *dev, void *param, int len)
+{
+ struct prev_yee *yee_param = (struct prev_yee *)param;
+ struct prev_yee user_yee;
+
+ if (copy_from_user(&user_yee, yee_param, sizeof(struct prev_yee))) {
+ dev_err(dev, "get_yee_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (ISNULL(user_yee.table)) {
+ dev_err(dev, "get_yee_params: yee table ptr null\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(user_yee.table,
+ yee.table,
+ (MAX_SIZE_EEC * sizeof(short)))) {
+ dev_err(dev, "get_yee_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ user_yee.en = yee.en;
+ user_yee.en_emf = yee.en_emf;
+ user_yee.hpf_shft = yee.hpf_shft;
+ user_yee.hpf_coef_00 = yee.hpf_coef_00;
+ user_yee.hpf_coef_01 = yee.hpf_coef_01;
+ user_yee.hpf_coef_02 = yee.hpf_coef_02;
+ user_yee.hpf_coef_10 = yee.hpf_coef_10;
+ user_yee.hpf_coef_11 = yee.hpf_coef_11;
+ user_yee.hpf_coef_12 = yee.hpf_coef_12;
+ user_yee.hpf_coef_20 = yee.hpf_coef_20;
+ user_yee.hpf_coef_21 = yee.hpf_coef_21;
+ user_yee.hpf_coef_22 = yee.hpf_coef_22;
+
+ if (copy_to_user(yee_param,
+ &user_yee,
+ sizeof(struct prev_yee))) {
+ dev_err(dev, "get_yee_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_fcs_params(struct device *dev)
+{
+ CHECKMORE((fcs.en), 1);
+ if (fcs.en) {
+ CHECKMORE((fcs.hpf_shft_y), 3);
+ CHECKMORE((fcs.gain_shft_c), 7);
+ CHECKMORE((fcs.thr), 255);
+ CHECKMORE((fcs.sgn), 255);
+ CHECKMORE((fcs.lth), 256);
+ }
+ return 0;
+}
+static int set_fcs_params(struct device *dev, void *param, int len)
+{
+ struct prev_fcs *fcs_param = (struct prev_fcs *)param;
+
+ if (ISNULL(fcs_param))
+ /* Copy defaults for ns */
+ memcpy((void *)&fcs,
+ (void *)&dm355_fcs_defaults,
+ sizeof(struct prev_fcs));
+ else {
+ if (copy_from_user(&fcs,
+ fcs_param,
+ sizeof(struct prev_fcs))) {
+ dev_err(dev,
+ "set_fcs_params: Error in copy from user\n");
+ return -EFAULT;
+ }
+ if (validate_fcs_params(dev) < 0)
+ return -EINVAL;
+ }
+ return (ipipe_set_fcs_regs(&fcs));
+}
+static int get_fcs_params(struct device *dev, void *param, int len)
+{
+ struct prev_fcs *fcs_param = (struct prev_fcs *)param;
+
+ if (copy_to_user(fcs_param,
+ &fcs,
+ sizeof(struct prev_fcs))) {
+ dev_err(dev, "get_fcs_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static struct prev_module_if *prev_enum_preview_cap(struct device *dev,
+ int index)
+{
+ dev_dbg(dev, "prev_enum_preview_cap: index = %d\n", index);
+ if ((index + 1) > PREV_MAX_MODULES)
+ return NULL;
+
+ return (&prev_modules[index]);
+}
+
+static unsigned int prev_get_oper_mode(void)
+{
+ return oper_mode;
+}
+
+static unsigned int ipipe_get_oper_state(void)
+{
+ return oper_state.state;
+}
+
+static void ipipe_set_oper_state(unsigned int state)
+{
+ mutex_lock(&oper_state.lock);
+ oper_state.state = state;
+ mutex_unlock(&oper_state.lock);
+}
+
+static unsigned int ipipe_get_prev_config_state(void)
+{
+ return oper_state.prev_config_state;
+}
+
+static unsigned int ipipe_get_rsz_config_state(void)
+{
+ return oper_state.rsz_config_state;
+}
+
+/* Use shared to allocate exclusive blocks as required
+ * by resize applications in single shot mode
+ */
+static void *ipipe_alloc_config_block(struct device *dev, int shared)
+{
+
+ struct ipipe_params *config_block;
+
+ if (shared) {
+ /* return common data block */
+ mutex_lock(&oper_state.lock);
+ if (oper_state.resource_in_use) {
+ dev_err(dev, "Shared resource in use\n");
+ mutex_unlock(&oper_state.lock);
+ return NULL;
+ }
+ mutex_unlock(&oper_state.lock);
+ return oper_state.shared_config_param;
+ } else {
+ config_block = kmalloc(sizeof(struct ipipe_params),
+ GFP_KERNEL);
+ if (ISNULL(config_block)) {
+ dev_err(dev,
+ "imp_alloc_config_block: failed"
+ " to allocate memory\n");
+ }
+ }
+ return config_block;
+}
+
+/* Used to free only non-shared config block allocated through
+ * imp_alloc_config_block
+ */
+static void ipipe_dealloc_config_block(struct device *dev, void *config_block)
+{
+ if (config_block) {
+ if (config_block != oper_state.shared_config_param)
+ kfree(config_block);
+ else
+ dev_err(dev, "Trying to free shared config block\n");
+ }
+}
+
+static void ipipe_dealloc_user_config_block(struct device *dev,
+ void *config_block)
+{
+ kfree(config_block);
+}
+
+static void *ipipe_alloc_user_config_block(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, int *len)
+{
+ void *config = NULL;
+
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ if (chan_type == IMP_PREVIEWER) {
+ config =
+ kmalloc(sizeof(struct prev_single_shot_config),
+ GFP_KERNEL);
+ *len = sizeof(struct prev_single_shot_config);
+ } else if (chan_type == IMP_RESIZER) {
+ config =
+ kmalloc(sizeof(struct rsz_single_shot_config),
+ GFP_KERNEL);
+ *len = sizeof(struct rsz_single_shot_config);
+ }
+
+ } else {
+ if (chan_type == IMP_PREVIEWER) {
+ config =
+ kmalloc(sizeof(struct prev_continuous_config),
+ GFP_KERNEL);
+ *len = sizeof(struct prev_continuous_config);
+ } else if (chan_type == IMP_RESIZER) {
+ config =
+ kmalloc(sizeof(struct rsz_continuous_config),
+ GFP_KERNEL);
+ *len = sizeof(struct rsz_continuous_config);
+ }
+ }
+ return config;
+}
+
+static void ipipe_set_user_config_defaults(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, void *config)
+{
+ dev_dbg(dev, "ipipe_set_user_config_defaults\n");
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ if (chan_type == IMP_PREVIEWER) {
+ dev_dbg(dev, "SS-Preview\n");
+ /* preview channel in single shot mode */
+ memcpy(config,
+ (void *)&dm355_prev_ss_config_defs,
+ sizeof(struct prev_single_shot_config));
+ } else {
+ dev_dbg(dev, "SS-Resize\n");
+ /* resizer channel in single shot mode */
+ memcpy(config,
+ (void *)&dm355_rsz_ss_config_defs,
+ sizeof(struct rsz_single_shot_config));
+ }
+ } else if (oper_mode == IMP_MODE_CONTINUOUS) {
+ /* Continuous mode */
+ if (chan_type == IMP_PREVIEWER) {
+ dev_dbg(dev, "Cont Preview\n");
+ /* previewer defaults */
+ memcpy(config,
+ (void *)&dm355_prev_cont_config_defs,
+ sizeof(struct prev_continuous_config));
+ } else {
+ dev_dbg(dev, "Cont resize\n");
+ /* resizer defaults */
+ memcpy(config,
+ (void *)&dm355_rsz_cont_config_defs,
+ sizeof(struct rsz_continuous_config));
+ }
+ } else {
+ dev_err(dev, "Incorrect mode used\n");
+ }
+}
+
+static void ipipe_config_resize_out_param(struct ipipe_params *param,
+ int index,
+ struct rsz_ss_output_spec *output,
+ unsigned char flag)
+{
+ if (output->enable) {
+ param->rsz_en[index] = ENABLE;
+ param->rsz_rsc_param[index].rsz_o_vsz = output->height - 1;
+ param->rsz_rsc_param[index].rsz_o_hsz = output->width - 1;
+ param->rsz_rsc_param[index].rsz_o_hst = output->hst;
+ if (flag) {
+ param->rsz_rsc_param[index].rsz_h_typ =
+ output->h_intp_type;
+ param->rsz_rsc_param[index].rsz_h_lse_sel =
+ output->h_lpf_lse_sel;
+ param->rsz_rsc_param[index].rsz_h_lpf =
+ output->lpf_user_val;
+ }
+ if (!output->line_length)
+ param->ext_mem_param[index].rsz_sdr_oft =
+ (output->width * 2);
+ else
+ param->ext_mem_param[index].rsz_sdr_oft =
+ output->line_length;
+ /* adjust the line length to be a multiple of 32 */
+ param->ext_mem_param[index].rsz_sdr_oft =
+ ((param->ext_mem_param[index].rsz_sdr_oft + 31) & ~0x1f);
+ param->ext_mem_param[index].rsz_sdr_ptr_s = output->vst;
+ param->ext_mem_param[index].rsz_sdr_ptr_e = output->height;
+ } else
+ param->rsz_en[index] = DISABLE;
+}
+
+/* Call this after setting IPIPE input size and resizer
+ * output size
+ */
+static void ipipe_config_resize_in_param(struct ipipe_params *param, int index)
+{
+ param->rsz_rsc_param[index].rsz_i_vst = param->ipipe_vst;
+ param->rsz_rsc_param[index].rsz_i_vsz = param->ipipe_vsz;
+ param->rsz_rsc_param[index].rsz_i_hst = param->ipipe_hst;
+ param->rsz_rsc_param[index].rsz_h_dif =
+ ((param->ipipe_hsz + 1) * 256) /
+ (param->rsz_rsc_param[index].rsz_o_hsz + 1);
+ param->rsz_rsc_param[index].rsz_v_dif =
+ ((param->ipipe_vsz + 1) * 256) /
+ (param->rsz_rsc_param[index].rsz_o_vsz + 1);
+}
+
+static int ipipe_set_resize_config(struct device *dev,
+ unsigned int oper_mode,
+ int resizer_chained,
+ void *user_config, void *config)
+{
+ int ret = 0;
+ struct ipipe_params *param = (struct ipipe_params *)config;
+
+ dev_dbg(dev, "ipipe_set_resize_config\n");
+ if ((ISNULL(user_config)) || (ISNULL(config))) {
+ dev_err(dev, "Invalid user_config or config ptr\n");
+ return -EINVAL;
+ }
+
+ memcpy((void *)config,
+ (void *)&dm355_ipipe_defs,
+ sizeof(struct ipipe_params));
+
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ /* resizer in standalone mode. In this mode if serializer
+ * is enabled, we need to set config params in the hw.
+ */
+ struct rsz_single_shot_config *ss_config =
+ (struct rsz_single_shot_config *)user_config;
+
+ if (resizer_chained) {
+ /* shared block */
+ if ((!ss_config->output1.enable) &&
+ (!ss_config->output1.enable)) {
+ dev_err(dev,
+ "One of the resizer output"
+ " must be enabled\n");
+ return -EINVAL;
+ }
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (ss_config->output1.enable) {
+ if (ss_config->output1.pix_fmt != IPIPE_UYVY) {
+ dev_err(dev,
+ "output1:Only UYVY "
+ "supported\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if ((ss_config->output1.width == 0) ||
+ (ss_config->output1.height == 0)) {
+ dev_err(dev,
+ "output1:invalid width or "
+ "height\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if (ss_config->output1.width % 16) {
+ dev_err(dev,
+ "output1:width to be a "
+ "multiple of 16\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ }
+
+ if (ss_config->output2.enable) {
+ if (ss_config->output2.pix_fmt != IPIPE_UYVY) {
+ dev_err(dev,
+ "output2:Only UYVY"
+ " supported\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if ((ss_config->output2.width == 0) ||
+ (ss_config->output2.height == 0)) {
+ dev_err(dev,
+ "output2:invalid width"
+ " or height\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if (ss_config->output2.width % 16) {
+ dev_err(dev,
+ "output2:width to be a "
+ "multiple of 16\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ }
+
+ ipipe_config_resize_out_param(param, 0,
+ &ss_config->output1, 1);
+ ipipe_config_resize_out_param(param, 1,
+ &ss_config->output2, 1);
+
+ if (ss_config->en_flip_vert)
+ param->rsz_seq_vrv = ENABLE;
+ if (ss_config->en_flip_vert)
+ param->rsz_seq_hrv = ENABLE;
+ if (ss_config->chroma_sample_even)
+ param->rsz_seq_crv = ENABLE;
+ oper_state.rsz_chained = 1;
+ oper_state.rsz_config_state = STATE_CONFIGURED;
+ mutex_unlock(&oper_state.lock);
+ } else {
+ if ((ss_config->input.image_width == 0) ||
+ (ss_config->input.image_height == 0)) {
+ dev_err(dev,
+ "input image width or "
+ "height invalid\n");
+ return -EINVAL;
+ }
+ if (ss_config->input.image_width % 16) {
+ dev_err(dev,
+ "input image width to "
+ "be a multiple of 16\n");
+ return -EINVAL;
+ }
+
+ param->ipipeif_param.source = SDRAM_YUV;
+ param->ipipeif_param.hnum =
+ ss_config->input.image_width;
+ param->ipipeif_param.vnum =
+ ss_config->input.image_height;
+ param->ipipeif_param.glob_hor_size =
+ ss_config->input.ppln;
+ param->ipipeif_param.glob_ver_size =
+ ss_config->input.lpfr;
+ param->ipipeif_param.clk_div = ss_config->input.clk_div;
+ if (!ss_config->input.line_length)
+ param->ipipeif_param.adofs =
+ ss_config->input.image_width * 2;
+ else
+ param->ipipeif_param.adofs =
+ ss_config->input.line_length;
+ /* adjust the line length to be a multiple of 32 */
+ param->ipipeif_param.adofs =
+ ((param->ipipeif_param.adofs + 31) & ~0x1f);
+ param->ipipe_hsz = ss_config->input.image_width - 1;
+ if (ss_config->input.dec_en) {
+ if ((ss_config->input.rsz < 16) ||
+ (ss_config->input.rsz > 112)) {
+ dev_err(dev,
+ "rsz range is 16 to 112\n");
+ return -EINVAL;
+ }
+ param->ipipeif_param.decimation =
+ IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz = ss_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)ss_config->input.
+ avg_filter_en;
+ param->ipipe_hsz =
+ (((ss_config->input.image_width * 16) /
+ ss_config->input.rsz) - 1);
+ }
+ param->ipipe_vsz = ss_config->input.image_height - 1;
+ param->ipipe_dpaths_fmt = IPIPE_YUV2YUV;
+ /* TODO check if ipipe vsz and hsz are same as resizer
+ input sizes */
+ ipipe_config_resize_out_param(param, 0,
+ &ss_config->output1, 1);
+ ipipe_config_resize_out_param(param, 1,
+ &ss_config->output2, 1);
+ /* Setup resizer input configuration */
+ if (param->rsz_en[0])
+ ipipe_config_resize_in_param(param, 0);
+
+ if (param->rsz_en[1])
+ ipipe_config_resize_in_param(param, 1);
+
+ if (ss_config->en_flip_vert)
+ param->rsz_seq_vrv = ENABLE;
+ if (ss_config->en_flip_vert)
+ param->rsz_seq_hrv = ENABLE;
+ if (ss_config->chroma_sample_even)
+ param->rsz_seq_crv = ENABLE;
+ if (!en_serializer)
+ ret = ipipe_hw_setup(config);
+ }
+
+ } else {
+ /* Continuous mode. This is a shared config block */
+ struct rsz_continuous_config *cont_config =
+ (struct rsz_continuous_config *)user_config;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (resizer_chained) {
+ if (!cont_config->en_output1) {
+ dev_err(dev, "enable resizer - 0\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ } else {
+ param->rsz_en[0] = ENABLE;
+ param->rsz_rsc_param[0].rsz_mode = CONTINUOUS;
+ }
+ if (cont_config->output2.enable) {
+ if (cont_config->output2.pix_fmt
+ != IPIPE_UYVY) {
+ dev_err(dev, "Only UYVY supported\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if ((cont_config->output2.width == 0) ||
+ (cont_config->output2.height == 0)) {
+ dev_err(dev,
+ "output2:invalid width or"
+ " height\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if (cont_config->output2.width % 16) {
+ dev_err(dev,
+ "width to be a multiple"
+ " of 16\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ }
+ ipipe_config_resize_out_param(param, 1,
+ &cont_config->output2, 1);
+ if (cont_config->en_flip_vert)
+ param->rsz_seq_vrv = ENABLE;
+ if (cont_config->en_flip_vert)
+ param->rsz_seq_hrv = ENABLE;
+ if (cont_config->chroma_sample_even)
+ param->rsz_seq_crv = ENABLE;
+ if (cont_config->en_vaaf)
+ param->rsz_aal = ENABLE;
+ oper_state.rsz_chained = 1;
+ } else {
+ param->ipipeif_param.clock_select = PIXCEL_CLK;
+ param->ipipeif_param.source = CCDC;
+ param->ipipe_dpaths_fmt = IPIPE_YUV2YUV;
+ if (cont_config->input.dec_en) {
+ if ((cont_config->input.rsz < 16) ||
+ (cont_config->input.rsz > 112)) {
+ dev_err(dev,
+ "rsz range is 16 to 112\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipeif_param.decimation =
+ IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz =
+ cont_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)cont_config->input.
+ avg_filter_en;
+ }
+ param->ipipeif_param.mode = CONTINUOUS;
+ if (!cont_config->en_output1)
+ param->rsz_en[0] = DISABLE;
+ else
+ param->rsz_rsc_param[0].rsz_mode = CONTINUOUS;
+ if (cont_config->output2.enable) {
+ if (cont_config->output2.pix_fmt
+ != IPIPE_UYVY) {
+ dev_err(dev, "Only UYVY supported\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if ((cont_config->output2.width == 0) ||
+ (cont_config->output2.height == 0)) {
+ dev_err(dev,
+ "output2:invalid width"
+ " or height\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if (cont_config->output2.width % 16) {
+ dev_err(dev,
+ "width to be a multiple"
+ " of 16\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->rsz_rsc_param[1].rsz_mode = CONTINUOUS;
+ }
+ ipipe_config_resize_out_param(param, 1,
+ &cont_config->output2, 1);
+ if (cont_config->en_flip_vert)
+ param->rsz_seq_vrv = ENABLE;
+ if (cont_config->en_flip_vert)
+ param->rsz_seq_hrv = ENABLE;
+ if (cont_config->chroma_sample_even)
+ param->rsz_seq_crv = ENABLE;
+ if (cont_config->en_vaaf)
+ param->rsz_aal = ENABLE;
+ }
+ oper_state.rsz_config_state = STATE_CONFIGURED;
+ mutex_unlock(&oper_state.lock);
+ }
+ return ret;
+}
+
+static void ipipe_config_resizer_bypass(struct ipipe_params *param)
+{
+ param->rsz_seq_seq = DISABLE;
+ param->rsz_seq_tmm = DISABLE;
+ param->rsz_aal = DISABLE;
+ param->rsz_rsc_param[0].rsz_v_phs = 0;
+ param->rsz_rsc_param[0].rsz_h_phs = 0;
+ param->rsz_rsc_param[0].rsz_v_dif = 256;
+ param->rsz_rsc_param[0].rsz_h_dif = 256;
+ param->rsz_rsc_param[0].rsz_h_lse_sel = RSZ_H_LPF_LSE_INTERN;
+ param->rsz_en[0] = ENABLE;
+ param->rsz_en[1] = DISABLE;
+}
+
+#ifdef CONFIG_IMP_DEBUG
+static void ipipe_dump_hw_config(void)
+{
+ printk(KERN_NOTICE "IPIPE Configuration context\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ if (oper_mode == IMP_MODE_SINGLE_SHOT)
+ printk(KERN_NOTICE "Operation mode = SINGLE SHOT\n");
+ else
+ printk(KERN_NOTICE "Operation mode = CONTINUOUS\n");
+ if (oper_state.rsz_chained)
+ printk(KERN_NOTICE "Resizer chained\n");
+ else
+ printk(KERN_NOTICE "Resizer not chained\n");
+ if (en_serializer)
+ printk(KERN_NOTICE "Serializer is enabled\n");
+ else
+ printk(KERN_NOTICE "Serializer is diabled\n");
+ if (oper_mode != IMP_MODE_SINGLE_SHOT) {
+ if (oper_state.prev_config_state)
+ printk(KERN_NOTICE "Previewer is configured\n");
+ else
+ printk(KERN_NOTICE "Previewer is not configured\n");
+ }
+ if (oper_state.rsz_chained || (oper_mode != IMP_MODE_SINGLE_SHOT)) {
+ if (oper_state.rsz_config_state)
+ printk(KERN_NOTICE "Resizer is configured\n");
+ else
+ printk(KERN_NOTICE "Resizer is not configured\n");
+ }
+ ipipe_hw_dump_config();
+}
+#else
+static void ipipe_dump_hw_config(void)
+{
+}
+#endif
+static int ipipe_set_preview_config(struct device *dev,
+ unsigned int oper_mode,
+ void *user_config, void *config)
+{
+ int ret = 0;
+ struct ipipe_params *param = (struct ipipe_params *)config;
+
+ dev_err(dev, "ipipe_set_preview_config\n");
+ if ((ISNULL(user_config)) || (ISNULL(config))) {
+ dev_err(dev, "Invalid user_config or config ptr\n");
+ return -EINVAL;
+ }
+
+ if (!oper_state.rsz_chained) {
+ /* For chained resizer, defaults are set by resizer */
+ memcpy((void *)config,
+ (void *)&dm355_ipipe_defs,
+ sizeof(struct ipipe_params));
+ }
+
+ /* shared block */
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ /* previewer in standalone mode. In this mode if serializer
+ * is enabled, we need to set config params in the hw.
+ */
+ struct prev_single_shot_config *ss_config =
+ (struct prev_single_shot_config *)user_config;
+ if ((ss_config->input.image_width == 0) ||
+ (ss_config->input.image_height == 0)) {
+ dev_err(dev, "input image width or height invalid\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ if (ss_config->input.image_width % 16) {
+ dev_err(dev,
+ "input image width to be a multiple of 16\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+
+ if (ipipe_process_pix_fmts(ss_config->input.pix_fmt,
+ ss_config->output.pix_fmt,
+ param) < 0) {
+ dev_err(dev, "error in input or output pix format\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipe_dpaths_bypass = ss_config->bypass;
+ param->ipipeif_param.hnum = ss_config->input.image_width;
+ param->ipipeif_param.vnum = ss_config->input.image_height;
+ param->ipipeif_param.glob_hor_size = ss_config->input.ppln;
+ param->ipipeif_param.glob_ver_size = ss_config->input.lpfr;
+ param->ipipeif_param.clk_div = ss_config->input.clk_div;
+ if (!ss_config->input.line_length) {
+ /* Calculate the line length */
+ if ((param->ipipeif_param.ialaw) ||
+ (param->ipipeif_param.pack_mode))
+ param->ipipeif_param.adofs =
+ ss_config->input.image_width;
+ else
+ param->ipipeif_param.adofs =
+ ss_config->input.image_width * 2;
+ } else
+ param->ipipeif_param.adofs =
+ ss_config->input.line_length;
+ /* Adjust adofs to be a multiple of 32 */
+ param->ipipeif_param.adofs =
+ ((param->ipipeif_param.adofs + 31) & ~0x1f);
+ param->ipipe_vst = ss_config->input.vst;
+ param->ipipe_hst = ss_config->input.hst;
+ param->ipipe_colpat_olop = ss_config->input.colp_olop;
+ param->ipipe_colpat_olep = ss_config->input.colp_olep;
+ param->ipipe_colpat_elop = ss_config->input.colp_elop;
+ param->ipipe_colpat_elep = ss_config->input.colp_elep;
+ param->ipipe_hsz = ss_config->input.image_width - 1;
+ if (ss_config->input.dec_en) {
+ if ((ss_config->input.rsz < 16) ||
+ (ss_config->input.rsz > 112)) {
+ dev_err(dev, "rsz range is 16 to 112\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipeif_param.decimation = IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz = ss_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)ss_config->input.
+ avg_filter_en;
+ param->ipipe_hsz =
+ (((ss_config->input.image_width * 16) /
+ ss_config->input.rsz) - 1);
+ }
+ param->ipipe_vsz = ss_config->input.image_height - 1;
+ param->ipipeif_param.gain = ss_config->input.gain;
+ if (ss_config->input.pix_fmt == IPIPE_UYVY)
+ param->ipipeif_param.source = SDRAM_YUV;
+ else
+ param->ipipeif_param.source = SDRAM_RAW;
+
+ /* update the resize parameters */
+ if (oper_state.rsz_chained) {
+ if (param->rsz_en[0])
+ ipipe_config_resize_in_param(param, 0);
+ if (param->rsz_en[1])
+ ipipe_config_resize_in_param(param, 1);
+ } else {
+ /* Using IPIPE resizer as pass through */
+ param->rsz_rsc_param[0].rsz_o_vsz = param->ipipe_vsz;
+ param->rsz_rsc_param[0].rsz_o_hsz = param->ipipe_hsz;
+ param->rsz_rsc_param[0].rsz_o_hst = param->ipipe_hst;
+ param->ext_mem_param[0].rsz_sdr_oft =
+ ss_config->input.image_width * 2;
+ param->ext_mem_param[0].rsz_sdr_ptr_s =
+ param->ipipe_vst;
+ param->ext_mem_param[0].rsz_sdr_ptr_e =
+ (ss_config->input.image_height);
+ ipipe_config_resizer_bypass(param);
+ }
+ if (!en_serializer)
+ ret = ipipe_hw_setup(config);
+ } else {
+ /* continuous mode */
+ struct prev_continuous_config *cont_config =
+ (struct prev_continuous_config *)user_config;
+
+ param->ipipe_dpaths_bypass = cont_config->bypass;
+ if (cont_config->input.en_df_sub) {
+ dev_err(dev, "DF subtraction is not supported\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipeif_param.source = CCDC;
+ param->ipipeif_param.clock_select = PIXCEL_CLK;
+ param->ipipeif_param.mode = CONTINUOUS;
+ if (cont_config->input.dec_en) {
+ if ((cont_config->input.rsz < 16) ||
+ (cont_config->input.rsz > 112)) {
+ dev_err(dev, "rsz range is 16 to 112\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipeif_param.decimation = IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz = cont_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)cont_config->input.
+ avg_filter_en;
+ }
+ /* update the resize parameters */
+ param->ipipe_mode = CONTINUOUS;
+ param->ipipe_colpat_olop = cont_config->input.colp_olop;
+ param->ipipe_colpat_olep = cont_config->input.colp_olep;
+ param->ipipe_colpat_elop = cont_config->input.colp_elop;
+ param->ipipe_colpat_elep = cont_config->input.colp_elep;
+ param->ipipeif_param.gain = cont_config->input.gain;
+ if (!oper_state.rsz_chained) {
+ param->rsz_en[0] = ENABLE;
+ param->rsz_rsc_param[0].rsz_mode = CONTINUOUS;
+ param->rsz_en[1] = DISABLE;
+ }
+ oper_state.prev_config_state = STATE_CONFIGURED;
+ }
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+struct imp_hw_interface *imp_get_hw_if(void)
+{
+ return (&dm355_ipipe_interface);
+}
+EXPORT_SYMBOL(imp_get_hw_if);
+
+/* APIs for CCDC driver */
+static int ipipe_set_input_win(struct imp_window *win)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (param->ipipeif_param.decimation) {
+ param->ipipe_hsz =
+ ((win->width * 16) / param->ipipeif_param.rsz) - 1;
+ } else
+ param->ipipe_hsz = win->width - 1;
+ if (!oper_state.frame_format) {
+ param->ipipe_vsz = (win->height / 2) - 1;
+ param->ipipe_vst = (win->vst / 2);
+ } else {
+ param->ipipe_vsz = win->height - 1;
+ param->ipipe_vst = win->vst;
+ }
+ param->ipipe_hst = win->hst;
+ if (param->rsz_en[0]) {
+ param->rsz_rsc_param[0].rsz_i_vst = param->ipipe_vst;
+ param->rsz_rsc_param[0].rsz_i_vsz = param->ipipe_vsz;
+ param->rsz_rsc_param[0].rsz_i_hst = param->ipipe_hst;
+ }
+ if (param->rsz_en[1]) {
+ param->rsz_rsc_param[1].rsz_i_vst = param->ipipe_vst;
+ param->rsz_rsc_param[1].rsz_i_vsz = param->ipipe_vsz;
+ param->rsz_rsc_param[1].rsz_i_hst = param->ipipe_hst;
+ }
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+static int ipipe_get_input_win(struct imp_window *win)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (param->ipipeif_param.decimation)
+ win->width =
+ ((param->ipipe_hsz + 1) * param->ipipeif_param.rsz) / 16;
+ else
+ win->width = param->ipipe_hsz + 1;
+ if (!oper_state.frame_format) {
+ win->height = (param->ipipe_vsz + 1) * 2;
+ win->vst = (param->ipipe_vst * 2);
+ } else {
+ win->height = param->ipipe_vsz + 1;
+ win->vst = param->ipipe_vst;
+ }
+ win->hst = param->ipipe_hst;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_in_pixel_format(enum imp_pix_formats pix_fmt)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.in_pixel_format = pix_fmt;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_out_pixel_format(enum imp_pix_formats pix_fmt)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.out_pixel_format = pix_fmt;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_buftype(unsigned char buf_type)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.buffer_type = buf_type;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_frame_format(unsigned char frm_fmt)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.frame_format = frm_fmt;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_output_win(struct imp_window *win)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+ struct rsz_ss_output_spec output_specs;
+
+ if (!param->rsz_en[0]) {
+ printk(KERN_ERR "resizer output1 not enabled\n");
+ return -1;
+ }
+ output_specs.enable = 1;
+ output_specs.width = win->width;
+ /* Always set output height same as in height
+ for de-interlacing
+ */
+ output_specs.height = win->height;
+ output_specs.vst = win->vst;
+ output_specs.hst = win->hst;
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ ipipe_config_resize_out_param(param, 0, &output_specs, 0);
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+static int ipipe_get_output_state(unsigned char out_sel)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ if ((out_sel != 0) && (out_sel != 1))
+ return 0;
+ return (param->rsz_en[out_sel]);
+}
+
+/* This should be called only after setting the output
+ * window params. This also assumes the corresponding
+ * output is configured prior to calling this.
+ */
+static int ipipe_get_line_length(unsigned char out_sel)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ int line_len;
+
+ if ((out_sel != 0) && (out_sel != 1))
+ return -1;
+ /* assume output is always UYVY. Change this if we
+ * support RGB
+ */
+ if (!param->rsz_en[out_sel])
+ return -1;
+
+ line_len = (param->rsz_rsc_param[out_sel].rsz_o_hsz + 1) * 2;
+
+ /* Adjust the length to 32 byte boundary */
+ line_len = ((line_len + 31) & ~0x1F);
+ return line_len;
+}
+
+static int ipipe_get_image_height(unsigned char out_sel)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ if ((out_sel != 0) && (out_sel != 1))
+ return -1;
+ /* assume output is always UYVY. Change this if we
+ * support RGB
+ */
+ if (!param->rsz_en[out_sel])
+ return -1;
+
+ return (param->rsz_rsc_param[out_sel].rsz_o_vsz + 1);
+}
+
+static int dm355_ipipe_init(void)
+{
+ oper_state.shared_config_param =
+ kmalloc(sizeof(struct ipipe_params), GFP_KERNEL);
+ if (ISNULL(oper_state.shared_config_param)) {
+ printk(KERN_ERR
+ "dm355_ipipe_init: failed to allocate memory\n");
+ return -ENOMEM;
+ }
+ dfc.table = ipipe_dfc_table;
+ gamma.table_r = ipipe_gamma_table_r;
+ gamma.table_b = ipipe_gamma_table_b;
+ gamma.table_g = ipipe_gamma_table_g;
+ gamma.table_rgb_all = ipipe_gamma_table_all;
+ yee.table = ipipe_yee_table;
+ mutex_init(&oper_state.lock);
+ oper_state.state = CHANNEL_FREE;
+ oper_state.prev_config_state = STATE_NOT_CONFIGURED;
+ oper_state.rsz_config_state = STATE_NOT_CONFIGURED;
+ oper_state.frame_format = 1;
+ oper_state.in_pixel_format = IMP_BAYER;
+ oper_state.out_pixel_format = IMP_UYVY;
+ if (oper_mode == IMP_MODE_SINGLE_SHOT)
+ printk(KERN_NOTICE
+ "DM355 IPIPE intialized in Single Shot mode\n");
+ else
+ printk(KERN_NOTICE
+ "DM355 IPIPE intialized in Continuous mode\n");
+ return 0;
+}
+
+static void dm355_ipipe_cleanup(void)
+{
+ kfree(oper_state.shared_config_param);
+ printk(KERN_NOTICE "DM355 IPIPE harware module exited\n");
+}
+
+subsys_initcall(dm355_ipipe_init);
+module_exit(dm355_ipipe_cleanup);
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/dm355_ipipe_hw.c b/drivers/char/dm355_ipipe_hw.c
new file mode 100644
index 00000000..af5cb300
--- /dev/null
+++ b/drivers/char/dm355_ipipe_hw.c
@@ -0,0 +1,1008 @@
+/*
+ * Copyright (C) 2005-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+
+#include <media/davinci/dm355_ipipe.h>
+#include <media/davinci/vpss.h>
+
+#include "dm355_ipipe_hw.h"
+
+void ipipe_enable_reg_write(void)
+{
+ regw_ip(1, GCL_ARM);
+ /*enable the clock wb,cfa,dfc,d2f,pre modules */
+ regw_ip(0x06, GCL_CCD);
+}
+
+#ifdef CONFIG_IMP_DEBUG
+void ipipe_hw_dump_config(void)
+{
+ u32 utemp;
+ printk(KERN_NOTICE "IPIPEIF Registers\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ utemp = regr_if(IPIPEIF_ENABLE);
+ printk(KERN_NOTICE "IPIPEIF ENABLE = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_GFG);
+ printk(KERN_NOTICE "IPIPEIF CFG = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_PPLN);
+ printk(KERN_NOTICE "IPIPEIF PPLN = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_LPFR);
+ printk(KERN_NOTICE "IPIPEIF LPFR = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_HNUM);
+ printk(KERN_NOTICE "IPIPEIF HNUM = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_VNUM);
+ printk(KERN_NOTICE "IPIPEIF VNUM = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_ADDRU);
+ printk(KERN_NOTICE "IPIPEIF ADDRU = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_ADDRL);
+ printk(KERN_NOTICE "IPIPEIF ADDRL = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_ADOFS);
+ printk(KERN_NOTICE "IPIPEIF ADOFS = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_RSZ);
+ printk(KERN_NOTICE "IPIPEIF RSZ = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_GAIN);
+ printk(KERN_NOTICE "IPIPEIF GAIN = 0x%x\n", utemp);
+ printk(KERN_NOTICE "IPIPE Registers\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ utemp = regr_ip(IPIPE_EN);
+ printk(KERN_NOTICE "IPIPE ENABLE = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_MODE);
+ printk(KERN_NOTICE "IPIPE MODE = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_DPATHS);
+ printk(KERN_NOTICE "IPIPE DPATHS = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_COLPAT);
+ printk(KERN_NOTICE "IPIPE COLPAT = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_VST);
+ printk(KERN_NOTICE "IPIPE VST = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_VSZ);
+ printk(KERN_NOTICE "IPIPE VSZ = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_HST);
+ printk(KERN_NOTICE "IPIPE HST = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_HSZ);
+ printk(KERN_NOTICE "IPIPE HSZ = 0x%x\n", utemp);
+ printk(KERN_NOTICE "Resizer Registers\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ utemp = regr_ip(RSZ_EN_0);
+ printk(KERN_NOTICE "IPIPE RSZ 0 ENABLE = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_MODE));
+ printk(KERN_NOTICE "IPIPE RSZ 0 MODE = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_I_VST));
+ printk(KERN_NOTICE "IPIPE RSZ 0 I_VST = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_I_VSZ));
+ printk(KERN_NOTICE "IPIPE RSZ 0 I_VSZ = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_I_HST));
+ printk(KERN_NOTICE "IPIPE RSZ 0 I_HST = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_O_VSZ));
+ printk(KERN_NOTICE "IPIPE RSZ 0 O_VSZ = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_O_HST));
+ printk(KERN_NOTICE "IPIPE RSZ 0 O_HST = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_O_HSZ));
+ printk(KERN_NOTICE "IPIPE RSZ 0 O_HSZ = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_V_PHS));
+ printk(KERN_NOTICE "IPIPE RSZ 0 V_PHS = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_V_PHS_O));
+ printk(KERN_NOTICE "IPIPE RSZ 0 V_PHS_O = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_V_DIF));
+ printk(KERN_NOTICE "IPIPE RSZ 0 V_DIF = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_V_SIZ_O));
+ printk(KERN_NOTICE "IPIPE RSZ 0 V_SIZ_O = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_H_PHS));
+ printk(KERN_NOTICE "IPIPE RSZ 0 H_PHS = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_H_DIF));
+ printk(KERN_NOTICE "IPIPE RSZ 0 H_DIF = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_H_TYP));
+ printk(KERN_NOTICE "IPIPE RSZ 0 H_TYP = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_H_LSE));
+ printk(KERN_NOTICE "IPIPE RSZ 0 H_LSE = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_H_LPF));
+ printk(KERN_NOTICE "IPIPE RSZ 0 H_LPF = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_RGB_EN));
+ printk(KERN_NOTICE "IPIPE RSZ 0 RGB_EN = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_RGB_TYP));
+ printk(KERN_NOTICE "IPIPE RSZ 0 RGB_TYP = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_RGB_BLD));
+ printk(KERN_NOTICE "IPIPE RSZ 0 RGB_BLD = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_BAD_H));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_BAD_H = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_BAD_L));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_BAD_L = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_SAD_H));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_SAD_H = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_SAD_L));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_SAD_L = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_OFT));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_OFT = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_PTR_S));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_PTR_S = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_PTR_E));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_PTR_E = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_PTR_O));
+ printk(KERN_NOTICE "IPIPE RSZ 0 SDR_PTR_O = 0x%x\n", utemp);
+ utemp = regr_ip(RSZ_EN_1);
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ printk(KERN_NOTICE "IPIPE RSZ 1 ENABLE = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_MODE));
+ printk(KERN_NOTICE "IPIPE RSZ 1 MODE = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_I_VST));
+ printk(KERN_NOTICE "IPIPE RSZ 1 I_VST = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_I_VSZ));
+ printk(KERN_NOTICE "IPIPE RSZ 1 I_VSZ = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_I_HST));
+ printk(KERN_NOTICE "IPIPE RSZ 1 I_HST = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_O_VSZ));
+ printk(KERN_NOTICE "IPIPE RSZ 1 I_VSZ = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_O_HST));
+ printk(KERN_NOTICE "IPIPE RSZ 1 O_HST = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_O_HSZ));
+ printk(KERN_NOTICE "IPIPE RSZ 1 O_HSZ = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_V_PHS));
+ printk(KERN_NOTICE "IPIPE RSZ 1 V_PHS = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_V_PHS_O));
+ printk(KERN_NOTICE "IPIPE RSZ 1 V_PHS_O = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_V_DIF));
+ printk(KERN_NOTICE "IPIPE RSZ 1 V_DIF = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_V_SIZ_O));
+ printk(KERN_NOTICE "IPIPE RSZ 1 V_SIZ_O = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_H_PHS));
+ printk(KERN_NOTICE "IPIPE RSZ 1 H_PHS = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_H_DIF));
+ printk(KERN_NOTICE "IPIPE RSZ 1 H_DIF = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_H_TYP));
+ printk(KERN_NOTICE "IPIPE RSZ 1 H_TYP = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_H_LSE));
+ printk(KERN_NOTICE "IPIPE RSZ 1 H_LSE = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_H_LPF));
+ printk(KERN_NOTICE "IPIPE RSZ 1 H_LPF = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_RGB_EN));
+ printk(KERN_NOTICE "IPIPE RSZ 1 RGB_EN = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_RGB_TYP));
+ printk(KERN_NOTICE "IPIPE RSZ 1 RGB_TYP = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_RGB_BLD));
+ printk(KERN_NOTICE "IPIPE RSZ 1 RGB_BLD = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_BAD_H));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_BAD_H = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_BAD_L));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_BAD_L = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_SAD_H));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_SAD_H = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_SAD_L));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_SAD_L = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_OFT));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_OFT = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_PTR_S));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_PTR_S = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_PTR_E));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_PTR_E = 0x%x\n", utemp);
+ utemp = regr_ip((RSZ_EN_1 + RSZ_SDR_PTR_O));
+ printk(KERN_NOTICE "IPIPE RSZ 1 SDR_PTR_O = 0x%x\n", utemp);
+}
+#else
+void ipipe_hw_dump_config(void)
+{
+}
+#endif
+
+/* ipipe_hw_setup:It is used for Hardware Setup */
+int ipipe_hw_setup(struct ipipe_params *config)
+{
+ u32 utemp = 0;
+ u32 data_format;
+ enum ipipeif_decimation decimation_en;
+ if (!config)
+ return -EINVAL;
+
+ /*Combine all the fields to make CFG register of IPIPEIF */
+ utemp = config->ipipeif_param.mode << 0;
+ utemp |= config->ipipeif_param.decimation << 1;
+ utemp |= config->ipipeif_param.source << 2;
+ utemp |= config->ipipeif_param.clk_div << 4;
+ utemp |= config->ipipeif_param.avg_filter << 7;
+ utemp |= config->ipipeif_param.pack_mode << 8;
+ utemp |= config->ipipeif_param.ialaw << 9;
+ utemp |= config->ipipeif_param.clock_select << 10;
+ utemp |= config->ipipeif_param.data_shift << 11;
+ regw_if(utemp, IPIPEIF_GFG);
+ switch (config->ipipeif_param.source) {
+ case CCDC:
+ regw_if(config->ipipeif_param.gain, IPIPEIF_GAIN);
+ break;
+
+ case SDRAM_RAW:
+ case CCDC_DARKFM:
+ regw_if(config->ipipeif_param.gain, IPIPEIF_GAIN);
+
+ case SDRAM_YUV:
+ regw_if(config->ipipeif_param.glob_hor_size, IPIPEIF_PPLN);
+ regw_if(config->ipipeif_param.glob_ver_size, IPIPEIF_LPFR);
+ regw_if(config->ipipeif_param.hnum, IPIPEIF_HNUM);
+ regw_if(config->ipipeif_param.vnum, IPIPEIF_VNUM);
+ vpss_dm355_assign_rblctrl_master(DM355_RBLCTRL_IPIPEIF);
+ break;
+
+ }
+ /*check if decimation is enable or not */
+ decimation_en = config->ipipeif_param.decimation;
+ if (decimation_en)
+ regw_if(config->ipipeif_param.rsz, IPIPEIF_RSZ);
+
+ /*set GCL_ARM reg before writting to ipipe registers */
+ ipipe_enable_reg_write();
+
+ data_format =
+ (config->ipipe_dpaths_fmt | (config->ipipe_dpaths_bypass) << 2);
+
+ vpss_dm355_assign_wblctrl_master(DM355_WBLCTRL_IPIPE);
+
+ /*enable ipipe mode to either one shot or continuous */
+ utemp = regr_ip(IPIPE_MODE);
+ RESETBIT(utemp, 0); /*first reset mode bit and then set it by
+ config->ipipe_mode */
+ utemp |= config->ipipe_mode;
+ regw_ip(utemp, IPIPE_MODE);
+ regw_ip(data_format, IPIPE_DPATHS);
+ /*set size */
+ regw_ip(config->ipipe_vst, IPIPE_VST);
+ regw_ip(config->ipipe_hst, IPIPE_HST);
+ regw_ip(config->ipipe_vsz, IPIPE_VSZ);
+ regw_ip(config->ipipe_hsz, IPIPE_HSZ);
+ switch (data_format) {
+ case IPIPE_RAW2YUV:
+
+ /*Combine all the fields to make COLPAT register of IPIPE */
+ utemp = (config->ipipe_colpat_elep << 0);
+ utemp |= (config->ipipe_colpat_elop << 2);
+ utemp |= (config->ipipe_colpat_olep << 4);
+ utemp |= (config->ipipe_colpat_olop << 6);
+
+ regw_ip(utemp, IPIPE_COLPAT);
+ ipipe_set_rsz_regs(config); /*set RSZ_SEQ registers */
+ ipipe_set_aal_regs(config); /*set RSZ_AAL registers */
+ /*set the registers of either RSZ0 or RSZ1 */
+ ipipe_set_rsz_structs(config);
+
+ break;
+
+ case IPIPE_RAW2RAW:
+ ipipe_set_aal_regs(config); /*set RSZ_AAL registers */
+ /*set the registers of RSZ0 and RSZ1 */
+ ipipe_set_rsz_structs(config); /*...................CHECK */
+ break;
+
+ case IPIPE_YUV2YUV:
+ ipipe_set_rsz_regs(config); /*set RSZ_SEQ registers */
+ ipipe_set_aal_regs(config); /*set RSZ_AAL registers */
+ /*set the registers of either RSZ0 or RSZ1 */
+ ipipe_set_rsz_structs(config);
+ break;
+ }
+ return 0;
+}
+
+int ipipe_set_resizer_address(struct ipipe_params *params,
+ int resize_no, unsigned int address)
+{
+ unsigned int utemp;
+ unsigned int rsz_start_add;
+
+ if (ISNULL(params)) {
+ printk(KERN_ERR "null ptr for params\n");
+ return -1;
+ }
+
+ if ((resize_no != 0) && (resize_no != 1)) {
+ printk(KERN_ERR "invalid resizer number\n");
+ return -1;
+ }
+
+ if (resize_no)
+ rsz_start_add = RSZ_EN_1;
+ else
+ rsz_start_add = RSZ_EN_0;
+ utemp = address & SET_LOW_ADD;
+
+ /* resizer must be enabled */
+ regw_ip(params->rsz_en[resize_no], rsz_start_add);
+ if ((params->rsz_en[resize_no]) && (address == 0)) {
+ printk(KERN_ERR "invalid address for resizer %d\n", resize_no);
+ return -1;
+ }
+ regw_ip(params->ext_mem_param[resize_no].rsz_sdr_oft,
+ rsz_start_add + RSZ_SDR_OFT);
+
+ regw_ip(utemp, rsz_start_add + RSZ_SDR_BAD_L);
+ regw_ip(utemp, rsz_start_add + RSZ_SDR_SAD_L);
+
+ utemp = (address & SET_HIGH_ADD) >> 16;
+ regw_ip(utemp, rsz_start_add + RSZ_SDR_BAD_H);
+ regw_ip(utemp, rsz_start_add + RSZ_SDR_SAD_H);
+ return 0;
+}
+
+int ipipe_set_ipipeif_address(struct ipipe_params *params, unsigned int address)
+{
+ unsigned int utemp, utemp_h, utemp_l;
+ if (params->ipipeif_param.source != 0) {
+ regw_if(((params->ipipeif_param.adofs) >> 5), IPIPEIF_ADOFS);
+
+ /*lower sixteen bit */
+ utemp = address;
+ utemp_l = utemp >> 5;
+ regw_if(utemp_l, IPIPEIF_ADDRL);
+ /*upper next seven bit */
+ utemp_h = utemp >> 21;
+ regw_if(utemp_h, IPIPEIF_ADDRU);
+ } else {
+ return -1;
+ }
+ return 0;
+}
+
+/*default configuratins for RAW2RAW mode*/
+int ipipe_default_raw2raw(struct ipipe_params *parameter)
+{
+ u32 utemp;
+ u32 bright = 0;
+ u32 contrast = 16;
+
+ vpss_dm355_assign_dfc_memory_master(DM355_DFC_MEM_IPIPE);
+ vpss_dm355_assign_int_memory_master(DM355_INT_MEM_IPIPE);
+ vpss_dm355_ipipe_enable_any_address(1);
+ regw_ip(1, GCL_SDR);
+
+ /*set this to 0 for dafault config */
+ regw_ip(0, FCS_EN);
+ /*set this to 0 for dafault config */
+ regw_ip(0, YEE_EN);
+ /*set default brightness and contrast */
+ utemp = ((contrast << 0) | (bright << 8));
+ regw_ip(utemp, YUV_ADJ);
+
+ /*set default luminance */
+ regw_ip(0, YUV_Y_MIN);
+ regw_ip(255, YUV_Y_MAX);
+
+ /*set default chrominance */
+ regw_ip(0, YUV_C_MIN);
+ regw_ip(255, YUV_C_MAX);
+ /*default config for resizer 1 registers */
+ ipipe_default_bypass_resizer(parameter);
+ return 0;
+}
+
+/*default configuratins for RAW2RAW mode*/
+int ipipe_default_bypass_resizer(struct ipipe_params *parameter)
+{
+ u32 utemp;
+ int seq_tmm = 0;
+
+ regw_ip(1, GCL_SDR);
+
+ /*set this to 0 for dafault config */
+ utemp =
+ (parameter->rsz_seq_seq << 0) | (seq_tmm << 1) | (parameter->
+ rsz_seq_hrv << 2)
+ | (parameter->rsz_seq_vrv << 3) | (parameter->rsz_seq_crv << 4);
+ regw_ip(utemp, RSZ_SEQ);
+ /*set this to 0 for dafault config */
+ regw_ip(1, RSZ_EN_0);
+ regw_ip(0, RSZ_EN_0 + RSZ_I_HST);
+ regw_ip(0, RSZ_EN_0 + RSZ_I_VST);
+ regw_ip(0, RSZ_EN_0 + RSZ_O_HST);
+ regw_ip(0, RSZ_EN_0 + RSZ_V_PHS);
+ regw_ip(256, RSZ_EN_0 + RSZ_V_DIF);
+ regw_ip(256, RSZ_EN_0 + RSZ_H_DIF);
+ regw_ip(0, RSZ_EN_0 + RSZ_H_PHS);
+ regw_ip(0, RSZ_EN_0 + RSZ_H_TYP);
+ regw_ip(0, RSZ_EN_0 + RSZ_H_LSE);
+ regw_ip(0, RSZ_EN_0 + RSZ_H_LPF);
+ regw_ip(0, RSZ_EN_0 + RSZ_RGB_EN);
+ /*disable resizer 0 in default mode */
+ regw_ip(0, RSZ_EN_1);
+ return 0;
+}
+
+/*default configuratins for RAW2RAW_bypass mode*/
+int ipipe_default_bypass_ycbcr(struct ipipe_params *parameter)
+{
+ /*disable noise filter in default config */
+ regw_ip(0, D2F_EN);
+ /*disable defect coorection in default config */
+ regw_ip(0, DFC_EN);
+ /*disable prefilter filter in default config */
+ regw_ip(0, PRE_EN);
+ /*set default config for white balance */
+ regw_ip(256, WB2_DGN);
+ regw_ip(128, WB2_WG_R);
+ regw_ip(128, WB2_WG_GR);
+ regw_ip(128, WB2_WG_GB);
+ regw_ip(128, WB2_WG_B);
+ return 0;
+}
+
+int ipipe_set_dfc_regs(struct prev_dfc *dfc)
+{
+ u32 utemp;
+ unsigned int count;
+
+ ipipe_enable_reg_write();
+ vpss_dm355_assign_wblctrl_master(DM355_WBLCTRL_IPIPE);
+ regw_ip(dfc->en, DFC_EN); /*writting to enable register */
+ if (1 == dfc->en) {
+ regw_ip(dfc->vert_copy_method, DFC_SEL);
+ regw_ip(DEF_COR_START_ADDR, DFC_ADR);
+ regw_ip(dfc->dfc_size, DFC_SIZE);
+ vpss_dm355_assign_dfc_memory_master(DM355_DFC_MEM_IPIPE);
+
+ /* set the auto increment,write only,dfc mode in RAM_MODE */
+ regw_ip(0x0034, RAM_MODE);
+ regw_ip(0x00, RAM_ADR);
+ if (dfc->table != NULL) {
+ count = 0;
+ while (count < dfc->dfc_size) {
+ regw_ip(dfc->table[count].horz_pos, RAM_WDT);
+ printk(KERN_INFO "###RAM_WDT[%d] = %x\n", count,
+ regr_ip(RAM_WDT));
+ /*write next fifteen bit */
+ utemp =
+ (dfc->table[count].
+ vert_pos | (dfc->table[count].
+ method << 12));
+ regw_ip(utemp, RAM_WDT);
+ printk(KERN_INFO "RAM_WDT[%d] = %x\n", count,
+ regr_ip(RAM_WDT));
+ count++;
+ }
+ }
+ }
+ return 0;
+}
+
+/* 2D Noise filter */
+int ipipe_set_d2f_nf_regs(struct prev_nf *noise_filter)
+{
+ u32 utemp;
+ int count = 0;
+
+ ipipe_enable_reg_write();
+ regw_ip(noise_filter->en, D2F_EN);
+ if (1 == noise_filter->en) {
+ /*Combine all the fields to make D2F_CFG register of IPIPE */
+ utemp =
+ (noise_filter->spread_val << 0) |
+ (noise_filter->shft_val << 2) |
+ (noise_filter->gr_sample_meth << 4);
+ regw_ip(utemp, D2F_CFG);
+ count = 0;
+ while (count < IPIPE_NF_STR_TABLE_SIZE) {
+ regw_ip(noise_filter->str[count], D2F_STR + count * 4);
+ count++;
+ }
+ count = 0;
+ while (count < IPIPE_NF_THR_TABLE_SIZE) {
+ regw_ip(noise_filter->thr[count], DFC_THR + count * 4);
+ count++;
+ }
+ }
+ return 0;
+}
+
+/* Pre filter */
+int ipipe_set_pf_regs(struct prev_prefilter *pre_filter)
+{
+ u32 utemp;
+
+ ipipe_enable_reg_write();
+ regw_ip(pre_filter->en, PRE_EN);
+ if (1 == pre_filter->en) {
+ /*Combine all the fields to make PRE_EN register of IPIPE */
+ utemp = ((pre_filter->aver_meth_gs2 << 0) |
+ (pre_filter->aver_meth_gs1 << 1) |
+ (pre_filter->en_adapt_prefilter << 2) |
+ (pre_filter->en_adapt_dotred << 3));
+ regw_ip(utemp, PRE_TYP);
+ regw_ip(pre_filter->pre_shf, PRE_SHF);
+ regw_ip(pre_filter->pre_gain, PRE_GAIN);
+ regw_ip(pre_filter->pre_thr_g, PRE_THR_G);
+ regw_ip(pre_filter->pre_thr_b, PRE_THR_B);
+ regw_ip(pre_filter->pre_thr_1, PRE_THR_1);
+ }
+ return 0;
+}
+
+/* White balance */
+#define IPIPE_U10Q7(decimal,integer) \
+ (((decimal & 0x7f) | ((integer & 0x7) << 7)))
+#define IPIPE_U10Q8(decimal,integer) \
+ (((decimal & 0xff) | ((integer & 0x3) << 8)))
+int ipipe_set_wb_regs(struct prev_wb *wb)
+{
+ u32 utemp;
+
+ /* U10Q7 */
+ utemp = IPIPE_U10Q8((wb->dgn.decimal), (wb->dgn.integer));
+ ipipe_enable_reg_write();
+ regw_ip(utemp, WB2_DGN);
+ utemp = IPIPE_U10Q7((wb->gain_r.decimal), (wb->gain_r.integer));
+ regw_ip(utemp, WB2_WG_R);
+ utemp = IPIPE_U10Q7((wb->gain_gr.decimal), (wb->gain_gr.integer));
+ regw_ip(utemp, WB2_WG_GR);
+ utemp = IPIPE_U10Q7((wb->gain_gb.decimal), (wb->gain_gb.integer));
+ regw_ip(utemp, WB2_WG_GB);
+ utemp = IPIPE_U10Q7((wb->gain_b.decimal), (wb->gain_b.integer));
+ regw_ip(utemp, WB2_WG_B);
+ return 0;
+}
+
+#define IPIPE_S10Q8(decimal,integer) \
+ (((decimal & 0xff) | ((integer & 0x3) << 8)))
+/* RGB2YUV */
+int ipipe_set_rgb2ycbcr_regs(struct prev_rgb2yuv *yuv)
+{
+ u32 utemp;
+
+ /* S10Q8 */
+ ipipe_enable_reg_write();
+ utemp = IPIPE_S10Q8((yuv->coef_ry.decimal), (yuv->coef_ry.integer));
+ regw_ip(utemp, YUV_MUL_RY);
+ utemp = IPIPE_S10Q8((yuv->coef_gy.decimal), (yuv->coef_gy.integer));
+ regw_ip(utemp, YUV_MUL_GY);
+ utemp = IPIPE_S10Q8((yuv->coef_by.decimal), (yuv->coef_by.integer));
+ regw_ip(utemp, YUV_MUL_BY);
+ utemp = IPIPE_S10Q8((yuv->coef_rcb.decimal), (yuv->coef_rcb.integer));
+ regw_ip(utemp, YUV_MUL_RCB);
+ utemp = IPIPE_S10Q8((yuv->coef_gcb.decimal), (yuv->coef_gcb.integer));
+ regw_ip(utemp, YUV_MUL_GCB);
+ utemp = IPIPE_S10Q8((yuv->coef_bcb.decimal), (yuv->coef_bcb.integer));
+ regw_ip(utemp, YUV_MUL_BCB);
+ utemp = IPIPE_S10Q8((yuv->coef_rcr.decimal), (yuv->coef_rcr.integer));
+ regw_ip(utemp, YUV_MUL_RCR);
+ utemp = IPIPE_S10Q8((yuv->coef_gcr.decimal), (yuv->coef_gcr.integer));
+ regw_ip(utemp, YUV_MUL_GCR);
+ utemp = IPIPE_S10Q8((yuv->coef_bcr.decimal), (yuv->coef_bcr.integer));
+ regw_ip(utemp, YUV_MUL_BCR);
+ regw_ip(yuv->out_ofst_y, YUV_OFT_Y);
+ regw_ip(yuv->out_ofst_cb, YUV_OFT_CB);
+ regw_ip(yuv->out_ofst_cr, YUV_OFT_CR);
+ return 0;
+}
+
+/* Lumina adjustments */
+int ipipe_set_lum_adj_regs(struct prev_lum_adj *lum_adj)
+{
+ u32 utemp;
+
+ ipipe_enable_reg_write();
+ /*combine fields of YUV_ADJ to set brightness and contrast */
+ utemp = ((lum_adj->contast << 0) | (lum_adj->brightness << 8));
+ regw_ip(utemp, YUV_ADJ);
+ return 0;
+}
+
+/* YUV 422 conversion */
+int ipipe_set_yuv422_conv_regs(struct prev_yuv422_conv *conv)
+{
+ u32 utemp;
+
+ ipipe_enable_reg_write();
+ regw_ip(conv->lum_min, YUV_Y_MIN);
+ regw_ip(conv->lum_max, YUV_Y_MAX);
+ regw_ip(conv->chrom_min, YUV_C_MIN);
+ regw_ip(conv->chrom_max, YUV_C_MAX);
+ /*Combine all the fields to make YUV_PHS register of IPIPE */
+ utemp = ((conv->chrom_pos << 0) | (conv->en_chrom_lpf << 1));
+ regw_ip(utemp, YUV_PHS);
+ return 0;
+}
+
+/* rgb2rgb conversion */
+#define IPIPE_S12Q8(decimal,integer) \
+ (((decimal & 0xff) | ((integer & 0xf) << 8)))
+
+int ipipe_set_rgb2rgb_regs(struct prev_rgb2rgb *rgb)
+{
+ u32 utemp;
+
+ ipipe_enable_reg_write();
+ utemp = IPIPE_S12Q8((rgb->coef_rr.decimal), (rgb->coef_rr.integer));
+ regw_ip(utemp, RGB_MUL_RR);
+ utemp = IPIPE_S12Q8((rgb->coef_gr.decimal), (rgb->coef_gr.integer));
+ regw_ip(utemp, RGB_MUL_GR);
+ utemp = IPIPE_S12Q8((rgb->coef_br.decimal), (rgb->coef_br.integer));
+ regw_ip(utemp, RGB_MUL_BR);
+ utemp = IPIPE_S12Q8((rgb->coef_rg.decimal), (rgb->coef_rg.integer));
+ regw_ip(utemp, RGB_MUL_RG);
+ utemp = IPIPE_S12Q8((rgb->coef_gg.decimal), (rgb->coef_gg.integer));
+ regw_ip(utemp, RGB_MUL_GG);
+ utemp = IPIPE_S12Q8((rgb->coef_bg.decimal), (rgb->coef_bg.integer));
+ regw_ip(utemp, RGB_MUL_BG);
+ utemp = IPIPE_S12Q8((rgb->coef_rb.decimal), (rgb->coef_rb.integer));
+ regw_ip(utemp, RGB_MUL_RB);
+ utemp = IPIPE_S12Q8((rgb->coef_gb.decimal), (rgb->coef_gb.integer));
+ regw_ip(utemp, RGB_MUL_GB);
+ utemp = IPIPE_S12Q8((rgb->coef_bb.decimal), (rgb->coef_bb.integer));
+ regw_ip(utemp, RGB_MUL_BB);
+ regw_ip(rgb->out_ofst_r, RGB_MUL_OR);
+ regw_ip(rgb->out_ofst_g, RGB_MUL_OG);
+ regw_ip(rgb->out_ofst_b, RGB_MUL_OB);
+ return 0;
+}
+
+/* Gamma correction */
+int ipipe_set_gamma_regs(struct prev_gamma *gamma)
+{
+ u32 utemp;
+ int count, table_size = 0;
+
+ ipipe_enable_reg_write();
+ utemp = ((gamma->bypass_r << 0) |
+ (gamma->bypass_b << 1) |
+ (gamma->bypass_g << 2) |
+ (gamma->tbl_sel << 4) | (gamma->tbl_size << 5));
+
+ regw_ip(utemp, GMM_CFG);
+
+ vpss_dm355_assign_wblctrl_master(DM355_WBLCTRL_IPIPE);
+ if (gamma->tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+ if (!(gamma->bypass_r)) {
+ if (gamma->table_r != NULL) {
+ /*set the auto increment,write only, gamma
+ red mode in RAM_MODE */
+ regw_ip(0x0035, RAM_MODE);
+ /*set the starting address of gamma table */
+ regw_ip(0x00, RAM_ADR);
+
+ for (count = 0; count < table_size; count++) {
+ regw_ip(gamma->table_r[count].slope,
+ RAM_WDT);
+ regw_ip(gamma->table_r[count].offset,
+ RAM_WDT);
+ }
+ }
+ }
+ if (!(gamma->bypass_b)) {
+ if (gamma->table_b != NULL) {
+ /*set the auto increment,write only,
+ gamma red mode in RAM_MODE */
+ regw_ip(0x0036, RAM_MODE);
+ /*set the starting address of gamma table */
+ regw_ip(0x00, RAM_ADR);
+ for (count = 0; count < table_size; count++) {
+ regw_ip(gamma->table_b[count].slope,
+ RAM_WDT);
+ regw_ip(gamma->table_b[count].offset,
+ RAM_WDT);
+ }
+ }
+ }
+ if (!(gamma->bypass_g)) {
+ if (gamma->table_g != NULL) {
+ /*set the auto increment,write only, gamma red
+ mode in RAM_MODE */
+ regw_ip(0x0037, RAM_MODE);
+ /*set the starting address of gamma table */
+ regw_ip(0x00, RAM_ADR);
+ for (count = 0; count < table_size; count++) {
+ regw_ip(gamma->table_g[count].slope,
+ RAM_WDT);
+ regw_ip(gamma->table_g[count].offset,
+ RAM_WDT);
+ }
+ }
+ }
+
+ /*set the auto increment,write only, gamma red mode in
+ RAM_MODE */
+ regw_ip(0x0038, RAM_MODE);
+ /*set the starting address of gamma table */
+ regw_ip(0x00, RAM_ADR);
+ if (gamma->table_rgb_all != NULL) {
+ for (count = 0; count < table_size; count++) {
+ regw_ip(gamma->table_rgb_all[count].slope,
+ RAM_WDT);
+ regw_ip(gamma->table_rgb_all[count].offset,
+ RAM_WDT);
+ }
+ }
+ regw_ip(0x00, RAM_MODE);
+ }
+ return 0;
+}
+
+/* Edge Enhancement */
+int ipipe_set_ee_regs(struct prev_yee *ee)
+{
+ unsigned int count;
+
+ ipipe_enable_reg_write();
+ vpss_dm355_assign_wblctrl_master(DM355_WBLCTRL_IPIPE);
+ regw_ip(ee->en, YEE_EN);
+ if (1 == ee->en) {
+ regw_ip(ee->en_emf, YEE_EMF);
+ regw_ip(ee->hpf_shft, YEE_SHF);
+ regw_ip(ee->hpf_coef_00, YEE_MUL_00);
+ regw_ip(ee->hpf_coef_01, YEE_MUL_01);
+ regw_ip(ee->hpf_coef_02, YEE_MUL_02);
+ regw_ip(ee->hpf_coef_10, YEE_MUL_10);
+ regw_ip(ee->hpf_coef_11, YEE_MUL_11);
+ regw_ip(ee->hpf_coef_12, YEE_MUL_12);
+ regw_ip(ee->hpf_coef_20, YEE_MUL_20);
+ regw_ip(ee->hpf_coef_21, YEE_MUL_21);
+ regw_ip(ee->hpf_coef_22, YEE_MUL_22);
+
+ /*set the auto increment,write only,ee mode in RAM_MODE */
+ regw_ip(0x0039, RAM_MODE);
+ regw_ip(0x000 /*0x1FF */ , RAM_ADR);
+ if (ee->table != NULL) {
+ for (count = 0; count < MAX_SIZE_EEC; count++)
+ regw_ip(ee->table[count], RAM_WDT);
+ }
+ }
+ return 0;
+}
+
+/* False color suppression */
+int ipipe_set_fcs_regs(struct prev_fcs *fcs)
+{
+ ipipe_enable_reg_write();
+ regw_ip(fcs->en, FCS_EN);
+ if (1 == fcs->en) {
+ regw_ip(fcs->type, FCS_TYP);
+ regw_ip(fcs->hpf_shft_y, FCS_SHF_Y);
+ regw_ip(fcs->gain_shft_c, FCS_SHF_C);
+ regw_ip(fcs->thr, FCS_THR);
+ regw_ip(fcs->sgn, FCS_SGN);
+ regw_ip(fcs->lth, FCS_LTH);
+ }
+ return 0;
+}
+
+int ipipe_set_rsz_regs(struct ipipe_params *param_resize)
+{
+ u32 utemp;
+ ipipe_enable_reg_write();
+ /*Combine all the fields to make RSZ_SEQ register of IPIPE */
+ utemp =
+ (param_resize->rsz_seq_seq << 0) |
+ (param_resize->rsz_seq_tmm << 1) |
+ (param_resize->rsz_seq_hrv << 2) |
+ (param_resize->rsz_seq_vrv << 3) | (param_resize->rsz_seq_crv << 4);
+ regw_ip(utemp, RSZ_SEQ);
+ return 0;
+}
+
+int ipipe_set_aal_regs(struct ipipe_params *param_resize)
+{
+ regw_ip(param_resize->rsz_aal, RSZ_AAL);
+ return 0;
+}
+
+int ipipe_set_output_size(struct ipipe_params *params)
+{
+ vpss_dm355_assign_dfc_memory_master(DM355_DFC_MEM_IPIPE);
+ vpss_dm355_assign_int_memory_master(DM355_INT_MEM_IPIPE);
+ vpss_dm355_ipipe_enable_any_address(1);
+ regw_ip(1, GCL_SDR);
+ /*setting rescale parameters */
+ regw_ip(params->rsz_rsc_param[0].rsz_o_vsz, RSZ_EN_0 + RSZ_O_VSZ);
+ regw_ip(params->rsz_rsc_param[0].rsz_o_hsz, RSZ_EN_0 + RSZ_O_HSZ);
+ regw_ip(params->rsz_rsc_param[0].rsz_v_dif, RSZ_EN_0 + RSZ_V_DIF);
+ regw_ip(params->rsz_rsc_param[0].rsz_h_dif, RSZ_EN_0 + RSZ_H_DIF);
+ regw_ip(params->rsz_rsc_param[1].rsz_o_vsz, RSZ_EN_1 + RSZ_O_VSZ);
+ regw_ip(params->rsz_rsc_param[1].rsz_o_hsz, RSZ_EN_1 + RSZ_O_HSZ);
+ regw_ip(params->rsz_rsc_param[1].rsz_v_dif, RSZ_EN_1 + RSZ_V_DIF);
+ regw_ip(params->rsz_rsc_param[1].rsz_h_dif, RSZ_EN_1 + RSZ_H_DIF);
+ return 0;
+}
+
+int ipipe_set_output_offsets(int resizer, struct ipipe_params *params)
+{
+ regw_ip(1, GCL_SDR);
+ if (resizer == 0) {
+ regw_ip(params->ext_mem_param[0].rsz_sdr_oft,
+ RSZ_EN_0 + RSZ_SDR_OFT);
+ regw_ip(params->ext_mem_param[0].rsz_sdr_ptr_s,
+ RSZ_EN_0 + RSZ_SDR_PTR_S);
+ regw_ip(params->ext_mem_param[0].rsz_sdr_ptr_e,
+ RSZ_EN_0 + RSZ_SDR_PTR_E);
+
+ } else {
+ regw_ip(params->ext_mem_param[1].rsz_sdr_oft,
+ RSZ_EN_0 + RSZ_SDR_OFT);
+ regw_ip(params->ext_mem_param[0].rsz_sdr_ptr_s,
+ RSZ_EN_0 + RSZ_SDR_PTR_S);
+ regw_ip(params->ext_mem_param[0].rsz_sdr_ptr_e,
+ RSZ_EN_0 + RSZ_SDR_PTR_E);
+ }
+ return 0;
+}
+
+int rsz_enable(int rsz_id, int enable)
+{
+ if (enable != 1)
+ enable = 0;
+ switch (rsz_id) {
+ case 0:
+ regw_ip(enable, RSZ_EN_0);
+ break;
+ case 1:
+ regw_ip(enable, RSZ_EN_1);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+int ipipe_set_rsz_structs(struct ipipe_params *params)
+{ /*set the registers of either RSZ0 or RSZ1 */
+ u32 utemp;
+ u32 rsz_seq, rsz_tmm;
+
+ vpss_dm355_assign_dfc_memory_master(DM355_DFC_MEM_IPIPE);
+ vpss_dm355_assign_int_memory_master(DM355_INT_MEM_IPIPE);
+ vpss_dm355_ipipe_enable_any_address(1);
+ regw_ip(params->rsz_en[0], RSZ_EN_0);
+ if (params->rsz_en[0]) {
+ printk(KERN_DEBUG
+ "ipipe_set_rsz_structs, resizer - 0 enabled\n");
+ /*testing--- for register write */
+ utemp = regr_ip(RSZ_EN_0);
+ /*enable RSZ clock */
+ regw_ip(1, GCL_SDR);
+ /*setting rescale parameters */
+ regw_ip(params->rsz_rsc_param[0].rsz_mode, RSZ_EN_0 + RSZ_MODE);
+ regw_ip(params->rsz_rsc_param[0].rsz_i_vst,
+ RSZ_EN_0 + RSZ_I_VST);
+ regw_ip(params->rsz_rsc_param[0].rsz_i_vsz,
+ RSZ_EN_0 + RSZ_I_VSZ);
+ regw_ip(params->rsz_rsc_param[0].rsz_i_hst,
+ RSZ_EN_0 + RSZ_I_HST);
+ regw_ip(params->rsz_rsc_param[0].rsz_o_vsz,
+ RSZ_EN_0 + RSZ_O_VSZ);
+ regw_ip(params->rsz_rsc_param[0].rsz_o_hsz,
+ RSZ_EN_0 + RSZ_O_HSZ);
+ regw_ip(params->rsz_rsc_param[0].rsz_o_hst,
+ RSZ_EN_0 + RSZ_O_HST);
+ regw_ip(params->rsz_rsc_param[0].rsz_v_phs,
+ RSZ_EN_0 + RSZ_V_PHS);
+ regw_ip(params->rsz_rsc_param[0].rsz_v_dif,
+ RSZ_EN_0 + RSZ_V_DIF);
+ regw_ip(params->rsz_rsc_param[0].rsz_h_phs,
+ RSZ_EN_0 + RSZ_H_PHS);
+ regw_ip(params->rsz_rsc_param[0].rsz_h_dif,
+ RSZ_EN_0 + RSZ_H_DIF);
+ regw_ip(params->rsz_rsc_param[0].rsz_h_typ,
+ RSZ_EN_0 + RSZ_H_TYP);
+ regw_ip(params->rsz_rsc_param[0].rsz_h_lse_sel,
+ RSZ_EN_0 + RSZ_H_LSE);
+ regw_ip(params->rsz_rsc_param[0].rsz_h_lpf,
+ RSZ_EN_0 + RSZ_H_LPF);
+
+ /*seting rgb conversion parameters */
+ regw_ip(params->rsz2rgb[0].rsz_rgb_en, RSZ_EN_0 + RSZ_RGB_EN);
+ regw_ip(params->rsz2rgb[0].rsz_rgb_en, RSZ_EN_0 + RSZ_RGB_EN);
+ utemp =
+ ((params->rsz2rgb[0].rsz_rgb_typ << 0) |
+ (params->rsz2rgb[0].rsz_rgb_msk0 << 1) |
+ (params->rsz2rgb[0].rsz_rgb_msk1) << 2);
+ regw_ip(utemp, RSZ_RGB_TYP);
+ regw_ip(params->rsz2rgb[0].rsz_rgb_alpha_val,
+ RSZ_EN_0 + RSZ_RGB_BLD);
+
+ /*setting external memory parameters */
+ regw_ip(params->ext_mem_param[0].rsz_sdr_oft,
+ RSZ_EN_0 + RSZ_SDR_OFT);
+ regw_ip(params->ext_mem_param[0].rsz_sdr_ptr_s,
+ RSZ_EN_0 + RSZ_SDR_PTR_S);
+ regw_ip(params->ext_mem_param[0].rsz_sdr_ptr_e,
+ RSZ_EN_0 + RSZ_SDR_PTR_E);
+ }
+
+ regw_ip(params->rsz_en[1], RSZ_EN_1);
+ if (params->rsz_en[1]) {
+ /*testing---- for register write */
+ utemp = regr_ip(RSZ_EN_1);
+
+ /*enable RSZ clock */
+ regw_ip(1, GCL_SDR);
+ /*setting rescale parameters */
+ regw_ip(params->rsz_rsc_param[1].rsz_mode, RSZ_EN_1 + RSZ_MODE);
+ regw_ip(params->rsz_rsc_param[1].rsz_i_vst,
+ RSZ_EN_1 + RSZ_I_VST);
+ regw_ip(params->rsz_rsc_param[1].rsz_i_vsz,
+ RSZ_EN_1 + RSZ_I_VSZ);
+ regw_ip(params->rsz_rsc_param[1].rsz_i_hst,
+ RSZ_EN_1 + RSZ_I_HST);
+ regw_ip(params->rsz_rsc_param[1].rsz_o_vsz,
+ RSZ_EN_1 + RSZ_O_VSZ);
+ regw_ip(params->rsz_rsc_param[1].rsz_o_hsz,
+ RSZ_EN_1 + RSZ_O_HSZ);
+ regw_ip(params->rsz_rsc_param[1].rsz_o_hst,
+ RSZ_EN_1 + RSZ_O_HST);
+ regw_ip(params->rsz_rsc_param[1].rsz_v_phs,
+ RSZ_EN_1 + RSZ_V_PHS);
+ regw_ip(params->rsz_rsc_param[1].rsz_v_dif,
+ RSZ_EN_1 + RSZ_V_DIF);
+ regw_ip(params->rsz_rsc_param[1].rsz_h_phs,
+ RSZ_EN_1 + RSZ_H_PHS);
+ regw_ip(params->rsz_rsc_param[1].rsz_h_dif,
+ RSZ_EN_1 + RSZ_H_DIF);
+ regw_ip(params->rsz_rsc_param[1].rsz_h_typ,
+ RSZ_EN_1 + RSZ_H_TYP);
+ regw_ip(params->rsz_rsc_param[1].rsz_h_lse_sel,
+ RSZ_EN_1 + RSZ_H_LSE);
+ regw_ip(params->rsz_rsc_param[1].rsz_h_lpf,
+ RSZ_EN_1 + RSZ_H_LPF);
+
+ /*seting rgb conversion parameters */
+ regw_ip(params->rsz2rgb[1].rsz_rgb_en, RSZ_EN_1 + RSZ_RGB_EN);
+ regw_ip(params->rsz2rgb[1].rsz_rgb_en, RSZ_EN_1 + RSZ_RGB_EN);
+ utemp =
+ ((params->rsz2rgb[1].rsz_rgb_typ << 0) |
+ (params->rsz2rgb[1].rsz_rgb_msk0 << 1) |
+ (params->rsz2rgb[1].rsz_rgb_msk1) << 2);
+ regw_ip(utemp, RSZ_RGB_TYP);
+ regw_ip(params->rsz2rgb[1].rsz_rgb_alpha_val,
+ RSZ_EN_1 + RSZ_RGB_BLD);
+
+ /*setting external memory parameters */
+ regw_ip(params->ext_mem_param[1].rsz_sdr_oft,
+ RSZ_EN_1 + RSZ_SDR_OFT);
+ regw_ip(params->ext_mem_param[1].rsz_sdr_ptr_s,
+ RSZ_EN_1 + RSZ_SDR_PTR_S);
+ regw_ip(params->ext_mem_param[1].rsz_sdr_ptr_e,
+ RSZ_EN_1 + RSZ_SDR_PTR_E);
+ }
+
+ if (!params->rsz_en[0] && !params->rsz_en[1]) { /*resizer bypass mode */
+ rsz_tmm = 0;
+ rsz_seq = 0;
+ utemp =
+ (params->rsz_seq_seq << 0) |
+ (params->rsz_seq_tmm << 1) |
+ (params->rsz_seq_hrv << 2) |
+ (params->rsz_seq_vrv << 3) | (params->rsz_seq_crv << 4);
+ regw_ip(0, RSZ_AAL);
+ regw_ip(0, RSZ_EN_0 + RSZ_O_HST);
+ regw_ip(0, RSZ_EN_0 + RSZ_V_PHS);
+ regw_ip(256, RSZ_EN_0 + RSZ_V_DIF);
+ regw_ip(256, RSZ_EN_0 + RSZ_H_DIF);
+ regw_ip(0, RSZ_EN_0 + RSZ_H_LSE);
+ regw_ip(0, RSZ_EN_0 + RSZ_H_PHS);
+ regw_ip(0, RSZ_EN_1);
+ /*disable resizer clock, necessary to bypass resizer */
+ regw_ip(0, GCL_SDR);
+ }
+
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_BAD_H));
+ utemp = regr_ip((RSZ_EN_0 + RSZ_SDR_SAD_H));
+ return 0;
+}
diff --git a/drivers/char/dm355_ipipe_hw.h b/drivers/char/dm355_ipipe_hw.h
new file mode 100644
index 00000000..079422d3
--- /dev/null
+++ b/drivers/char/dm355_ipipe_hw.h
@@ -0,0 +1,341 @@
+/*
+ * Copyright (C) 2007-2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _DM355_IPIPE_HW_H
+#define _DM355_IPIPE_HW_H
+
+#ifdef __KERNEL__
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
+
+#define IPIPE_IOBASE_VADDR IO_ADDRESS(0x01C71000)
+#define IPIPEIF_IOBASE_VADDR IO_ADDRESS(0x01C70100)
+
+static inline u32 regr_ip(u32 offset)
+{
+ return __raw_readl(IPIPE_IOBASE_VADDR + offset);
+}
+
+static inline u32 regw_ip(u32 val, u32 offset)
+{
+ __raw_writel(val, IPIPE_IOBASE_VADDR + offset);
+ return val;
+}
+static inline u32 regr_if(u32 offset)
+{
+ return __raw_readl(IPIPEIF_IOBASE_VADDR + offset);
+}
+
+static inline u32 regw_if(u32 val, u32 offset)
+{
+ __raw_writel(val, IPIPEIF_IOBASE_VADDR + offset);
+ return val;
+}
+/*
+static inline u32 regr_vpss(u32 offset)
+{
+ return davinci_readl(VPSS_BL_BASE + offset);
+}
+
+static inline u32 regw_vpss(u32 val, u32 offset)
+{
+ davinci_writel(val, VPSS_BL_BASE + offset);
+ return val;
+}
+*/
+
+#define SET_LOW_ADD 0x0000FFFF
+#define SET_HIGH_ADD 0xFFFF0000
+
+
+/* macro for bit set and clear */
+#define SETBIT(reg, bit) (reg = ((reg) | ((0x00000001)<<(bit))))
+#define RESETBIT(reg, bit) (reg = ((reg) & (~(0x00000001<<(bit)))))
+/* -to set vpss reg for ipipe- */
+#define VPSS_PCR 0x0804
+#define VPSS_MEMCTL 0x0818
+#define VPSS_CLK 0x0004
+
+
+
+#define SDR_ENABLE 2/*int number for IRQ_EN*/
+/* Internal RAM table addresses for defect correction */
+#define DEF_COR_START_ADDR 0x0000
+#define DEF_COR_END_ADDR 0x07FF
+#define DEF_COR_SIZE 1024
+#define MAX_SIZE_DFC 1024
+#define MAX_SIZE_EEC 1024
+#define MAX_SIZE_GAMMA 512
+
+/* Internal RAM table addresses for gamma correction */
+#define GAMMA_START_ADDR 0x0000
+#define GAMMA_END_ADDR 0x03FF
+
+/*Internal RAM table addresses for edge enhancement correction*/
+#define EDGE_ENHANCE_START_ADDR 0x0200
+#define EDGE_ENHANCE_END_ADDR 0x01FF
+
+/* IPIPE Register Offsets from the base address */
+
+#define IPIPE_EN 0x0000
+#define IPIPE_MODE 0x0004
+#define IPIPE_DPATHS 0x0008
+#define IPIPE_COLPAT 0x000C
+#define IPIPE_VST 0x0010
+#define IPIPE_VSZ 0x0014
+#define IPIPE_HST 0x0018
+#define IPIPE_HSZ 0x001C
+/*gated clock enable*/
+#define GCL_ARM 0x0024
+#define GCL_CCD 0x0028
+#define GCL_SDR 0x002C
+/* Internal Memory Access */
+#define RAM_MODE 0x0030
+#define RAM_ADR 0x0034
+#define RAM_WDT 0x0038
+#define RAM_RDT 0x003C
+/* Interrupts */
+#define IRQ_EN 0x0040
+#define IRQ_RZA 0x0044
+#define IRQ_RZB 0x0048
+/* Defect Correction */
+#define DFC_EN 0x004C
+#define DFC_SEL 0x0050
+#define DFC_ADR 0x0054
+#define DFC_SIZE 0x0058
+/* Programmable Noise Filter */
+#define D2F_EN 0x005C
+#define D2F_CFG 0x0060
+#define D2F_THR 0x0064
+#define D2F_STR 0x00E4
+/* PreFilter */
+#define PRE_EN 0x0164
+#define PRE_TYP 0x0168
+#define PRE_SHF 0x016C
+#define PRE_GAIN 0x0170
+#define PRE_THR_G 0x0174
+#define PRE_THR_B 0x0178
+#define PRE_THR_1 0x017C
+/* White Balance */
+#define WB2_DGN 0x0180
+#define WB2_WG_R 0x0184
+#define WB2_WG_GR 0x0188
+#define WB2_WG_GB 0x018C
+#define WB2_WG_B 0x0190
+
+/* RGB to RGB conversion (include GAMMA correction) */
+#define RGB_MUL_RR 0x01F4
+
+/* Defect Correction */
+#define DFC_EN 0x004C
+#define DFC_SEL 0x0050
+#define DFC_ADR 0x0054
+#define DFC_SIZ 0x0058
+/* Programmable Noise Filter */
+#define D2F_EN 0x005C
+#define D2F_CFG 0x0060
+#define DFC_THR 0x0064
+#define D2F_STR 0x00E4
+/* PreFilter */
+#define PRE_EN 0x0164
+#define PRE_TYP 0x0168
+#define PRE_SHF 0x016C
+#define PRE_GAIN 0x0170
+#define PRE_THR_G 0x0174
+#define PRE_THR_B 0x0178
+#define PRE_THR_1 0x017C
+/* White Balance */
+#define WB2_DGN 0x0180
+#define WB2_WG_R 0x0184
+#define WB2_WG_GR 0x0188
+#define WB2_WG_GB 0x018C
+#define WB2_WG_B 0x0190
+
+/* RGB to RGB conversion (include GAMMA correction) */
+#define RGB_MUL_RR 0x01F4
+#define RGB_MUL_GR 0x01F8
+#define RGB_MUL_BR 0x01FC
+#define RGB_MUL_RG 0x0200
+#define RGB_MUL_GG 0x0204
+#define RGB_MUL_BG 0x0208
+#define RGB_MUL_RB 0x020C
+
+#define RGB_MUL_GB 0x0210
+#define RGB_MUL_BB 0x0214
+#define RGB_MUL_OR 0x0218
+#define RGB_MUL_OG 0x021C
+#define RGB_MUL_OB 0x0220
+#define GMM_CFG 0x0224
+
+/* RGB to YUV(YCbCr) conversion */
+#define YUV_ADJ 0x0228
+#define YUV_MUL_RY 0x022C
+#define YUV_MUL_GY 0x0230
+#define YUV_MUL_BY 0x0234
+#define YUV_MUL_RCB 0x0238
+#define YUV_MUL_GCB 0x023C
+#define YUV_MUL_BCB 0x0240
+#define YUV_MUL_RCR 0x0244
+#define YUV_MUL_GCR 0x0248
+#define YUV_MUL_BCR 0x024C
+#define YUV_OFT_Y 0x0250
+#define YUV_OFT_CB 0x0254
+#define YUV_OFT_CR 0x0258
+#define YUV_Y_MIN 0x025C
+#define YUV_Y_MAX 0x0260
+#define YUV_C_MIN 0x0264
+#define YUV_C_MAX 0x0268
+#define YUV_PHS 0x026C
+
+/* Edge Enhancer */
+#define YEE_EN 0x0270
+#define YEE_EMF 0x0274
+#define YEE_SHF 0x0278
+#define YEE_MUL_00 0x027C
+#define YEE_MUL_01 0x0280
+#define YEE_MUL_02 0x0284
+#define YEE_MUL_10 0x0288
+#define YEE_MUL_11 0x028C
+#define YEE_MUL_12 0x0290
+#define YEE_MUL_20 0x0294
+#define YEE_MUL_21 0x0298
+#define YEE_MUL_22 0x029C
+
+/* False Color Suppression */
+#define FCS_EN 0x02A0
+#define FCS_TYP 0x02A4
+#define FCS_SHF_Y 0x02A8
+#define FCS_SHF_C 0x02AC
+#define FCS_THR 0x02B0
+#define FCS_SGN 0x02B4
+#define FCS_LTH 0x02B8
+
+/* Resizer */
+#define RSZ_SEQ 0x02BC
+#define RSZ_AAL 0x02C0
+
+/* Resizer Rescale Parameters */
+#define RSZ_EN_0 0x02C4
+#define RSZ_EN_1 0x0334
+/* offset of the registers to be added with base register of either RSZ0 or
+ * RSZ1
+ */
+#define RSZ_MODE 0x4
+#define RSZ_I_VST 0x8
+#define RSZ_I_VSZ 0xC
+#define RSZ_I_HST 0x10
+#define RSZ_O_VSZ 0x14
+#define RSZ_O_HST 0x18
+#define RSZ_O_HSZ 0x1C
+#define RSZ_V_PHS 0x20
+#define RSZ_V_PHS_O 0x24
+#define RSZ_V_DIF 0x28
+#define RSZ_V_SIZ_O 0x2C
+#define RSZ_H_PHS 0x30
+#define RSZ_H_DIF 0x34
+#define RSZ_H_TYP 0x38
+#define RSZ_H_LSE 0x3C
+#define RSZ_H_LPF 0x40
+
+/* Resizer RGB Conversion Parameters */
+#define RSZ_RGB_EN 0x44
+#define RSZ_RGB_TYP 0x48
+#define RSZ_RGB_BLD 0x4C
+
+/* Resizer External Memory Parameters */
+#define RSZ_SDR_BAD_H 0x50
+#define RSZ_SDR_BAD_L 0x54
+#define RSZ_SDR_SAD_H 0x58
+#define RSZ_SDR_SAD_L 0x5C
+#define RSZ_SDR_OFT 0x60
+#define RSZ_SDR_PTR_S 0x64
+#define RSZ_SDR_PTR_E 0x68
+#define RSZ_SDR_PTR_O 0x6C
+
+/* Macro for resizer */
+#define IPIPE_RESIZER_0(i) (IPIPE_IOBASE_VADDR + RSZ_EN_0 + i)
+#define IPIPE_RESIZER_1(i) (IPIPE_IOBASE_VADDR + RSZ_EN_1 + i)
+
+/* Masking fields */
+#define IPIPE_MODE_WRT (1 << 1)
+#define IPIPE_DPATHS_FMT (3 << 0)
+#define IPIPE_DPATHS_BYPASS (1 << 2)
+#define IPIPE_COLPAT_ELEP (3 << 0)
+#define IPIPE_COLPAT_ELOP (3 << 2)
+#define IPIPE_COLPAT_OLEP (3 << 4)
+#define IPIPE_COLPAT_OLOP (3 << 6)
+#define IPIPE_D2F_CFG_SPR (3 << 0)
+#define IPIPE_D2F_CFG_SHF (3 << 2)
+#define IPIPE_D2F_CFG_TYP (1 << 4)
+#define IPIPE_PRE_TYP_SEL1 (1 << 1)
+#define IPIPE_PRE_TYP_EN0 (1 << 2)
+#define IPIPE_PRE_TYP_EN1 (1 << 3)
+#define IPIPE_GMM_CFG_BYPG (1 << 1)
+#define IPIPE_GMM_CFG_BYPB (1 << 2)
+#define IPIPE_GMM_CFG_TBL (1 << 4)
+#define IPIPE_GMM_CFG_SIZ (3 << 5)
+#define IPIPE_YUV_ADJ_CTR (0Xff << 0)
+#define IPIPE_YUV_ADJ_BRT (0Xff << 8)
+#define IPIPE_YUV_PHS_LPF (1 << 1)
+#define IPIPE_RSZ_SEQ_TMM (1 << 1)
+#define IPIPE_RSZ_SEQ_HRV (1 << 2)
+#define IPIPE_RSZ_SEQ_VRV (1 << 3)
+#define IPIPE_RSZ_SEQ_CRV (1 << 3)
+#define IPIPE_RSZ_RGB_TYP_MSK0 (1 << 1)
+#define IPIPE_RSZ_RGB_TYP_MSK1 (1 << 2)
+
+/* BIT FIELDS */
+
+#define IPIPE_DPATHS_BYPASS_SHIFT 2
+#define IPIPE_COLPAT_ELOP_SHIFT 2
+#define IPIPE_COLPAT_OLEP_SHIFT 4
+#define IPIPE_COLPAT_OLOP_SHIFT 6
+#define IPIPE_D2F_CFG_SHF_SHIFT 2
+#define IPIPE_D2F_CFG_TYP_SHIFT 4
+#define IPIPE_PRE_TYP_SEL1_SHIFT 1
+#define IPIPE_PRE_TYP_EN0_SHIFT 2
+#define IPIPE_PRE_TYP_EN1_SHIFT 3
+#define IPIPE_GMM_CFG_BYPG_SHIFT 1
+#define IPIPE_GMM_CFG_BYPB_SHIFT 2
+#define IPIPE_GMM_CFG_TBL_SHIFT 4
+#define IPIPE_GMM_CFG_SIZ_SHIFT 5
+#define IPIPE_YUV_ADJ_BRT_SHIFT 8
+#define IPIPE_YUV_PHS_LPF_SHIFT 1
+#define IPIPE_RSZ_SEQ_TMM_SHIFT 1
+#define IPIPE_RSZ_SEQ_HRV_SHIFT 2
+#define IPIPE_RSZ_SEQ_VRV_SHIFT 3
+#define IPIPE_RSZ_SEQ_CRV_SHIFT 3
+#define IPIPE_RSZ_RGB_TYP_MSK0_SHIFT 1
+#define IPIPE_RSZ_RGB_TYP_MSK1_SHIFT 2
+
+/* IPIPEIF Register Offsets from the base address */
+#define IPIPEIF_ENABLE 0x00
+#define IPIPEIF_GFG 0x04
+#define IPIPEIF_PPLN 0x08
+#define IPIPEIF_LPFR 0x0C
+#define IPIPEIF_HNUM 0x10
+#define IPIPEIF_VNUM 0x14
+#define IPIPEIF_ADDRU 0x18
+#define IPIPEIF_ADDRL 0x1C
+#define IPIPEIF_ADOFS 0x20
+#define IPIPEIF_RSZ 0x24
+#define IPIPEIF_GAIN 0x28
+
+#endif /* End of #ifdef __KERNEL__ */
+#endif /* End of #ifdef _DM355_IPIPE_HW_H */
diff --git a/drivers/char/dm365_def_para.c b/drivers/char/dm365_def_para.c
new file mode 100644
index 00000000..d30dddb5
--- /dev/null
+++ b/drivers/char/dm365_def_para.c
@@ -0,0 +1,496 @@
+/*
+ *
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ **************************************************************************/
+#include <media/davinci/dm365_ipipe.h>
+/* Defaults for lutdpc */
+struct prev_lutdpc dm365_lutdpc_defaults = {
+ .en = 0
+};
+
+/* Defaults for otfdpc */
+struct prev_lutdpc dm365_otfdpc_defaults = {
+ .en = 0
+};
+
+/* Defaults for 2D - nf */
+struct prev_nf dm365_nf_defaults = {
+ .en = 0
+};
+
+/* defaults for GIC */
+struct prev_gic dm365_gic_defaults = {
+ .en = 0
+};
+
+/* Defaults for white balance */
+struct prev_wb dm365_wb_defaults = {
+ .gain_r = {2, 0x00},
+ .gain_gr = {2, 0x00},
+ .gain_gb = {2, 0x00},
+ .gain_b = {2, 0x00}
+};
+
+/* Defaults for CFA */
+struct prev_cfa dm365_cfa_defaults = {
+ .alg = IPIPE_CFA_ALG_2DIRAC,
+ .hpf_thr_2dir = 0,
+ .hpf_slp_2dir = 0,
+ .hp_mix_thr_2dir = 0,
+ .hp_mix_slope_2dir = 0,
+ .dir_thr_2dir = 0,
+ .dir_slope_2dir = 0,
+ .nd_wt_2dir = 0,
+ .hue_fract_daa = 0,
+ .edge_thr_daa = 0,
+ .thr_min_daa = 0,
+ .thr_slope_daa = 0,
+ .slope_min_daa = 0,
+ .slope_slope_daa = 0,
+ .lp_wt_daa = 0
+};
+
+/* Defaults for rgb2rgb */
+struct prev_rgb2rgb dm365_rgb2rgb_defaults = {
+ .coef_rr = {1, 0}, /* 256 */
+ .coef_gr = {0, 0},
+ .coef_br = {0, 0},
+ .coef_rg = {0, 0},
+ .coef_gg = {1, 0}, /* 256 */
+ .coef_bg = {0, 0},
+ .coef_rb = {0, 0},
+ .coef_gb = {0, 0},
+ .coef_bb = {1, 0}, /* 256 */
+ .out_ofst_r = 0,
+ .out_ofst_g = 0,
+ .out_ofst_b = 0
+};
+
+/* Defaults for gamma correction */
+struct prev_gamma dm365_gamma_defaults = {
+ .bypass_r = 0,
+ .bypass_b = 0,
+ .bypass_g = 0,
+ .tbl_sel = IPIPE_GAMMA_TBL_ROM
+};
+
+/* Defaults for 3d lut */
+struct prev_3d_lut dm365_3d_lut_defaults = {
+ .en = 0
+};
+
+/* Defaults for lumina adjustments */
+struct prev_lum_adj dm365_lum_adj_defaults = {
+ .brightness = 0,
+ .contrast = 16
+};
+
+/* Defaults for rgb2yuv conversion */
+struct prev_rgb2yuv dm365_rgb2yuv_defaults = {
+ .coef_ry = {0, 0x4D},
+ .coef_gy = {0, 0x96},
+ .coef_by = {0, 0x1D},
+ .coef_rcb = {0xF, 0xD5},
+ .coef_gcb = {0xF, 0xAB},
+ .coef_bcb = {0, 0x80},
+ .coef_rcr = {0, 0x80},
+ .coef_gcr = {0xF, 0x95},
+ .coef_bcr = {0xF, 0xEB},
+ .out_ofst_y = 0,
+ .out_ofst_cb = 0x80,
+ .out_ofst_cr = 0x80
+};
+
+/* Defaults for GBCE */
+struct prev_gbce dm365_gbce_defaults = {
+ .en = 0
+};
+
+/* Defaults for yuv 422 conversion */
+struct prev_yuv422_conv dm365_yuv422_conv_defaults = {
+ .en_chrom_lpf = 0,
+ .chrom_pos = IPIPE_YUV422_CHR_POS_COSITE
+};
+
+/* Defaults for Edge Ehnancements */
+struct prev_yee dm365_yee_defaults = {
+ .en = 0,
+};
+
+/* Defaults for CAR conversion */
+struct prev_car dm365_car_defaults = {
+ .en = 0,
+};
+
+/* Defaults for CGS */
+struct prev_cgs dm365_cgs_defaults = {
+ .en = 0,
+};
+
+#define WIDTH_I 640
+#define HEIGHT_I 480
+#define WIDTH_O 640
+#define HEIGHT_O 480
+
+/* default ipipeif settings */
+struct ipipeif_5_1 ipipeif_5_1_defaults = {
+ .pack_mode = IPIPEIF_5_1_PACK_16_BIT,
+ .data_shift = IPIPEIF_BITS11_0,
+ .source1 = SRC1_PARALLEL_PORT,
+ .clk_div = {
+ .m = 1, /* clock = sdram clock * (m/n) */
+ .n = 6
+ },
+ .dpc = {
+ .en = 0,
+ },
+ .dpcm = {
+ .en = 0,
+ .type = DPCM_8BIT_12BIT,
+ .pred = DPCM_SIMPLE_PRED
+ },
+#ifdef CONFIG_VIDEO_YCBCR
+ .pix_order = IPIPEIF_Y_CBCR,
+ .isif_port = {
+ .if_type = VPFE_YCBCR_SYNC_8,
+ .hdpol = VPFE_PINPOL_POSITIVE,
+ .vdpol =VPFE_PINPOL_POSITIVE
+ },
+#else
+ .pix_order = IPIPEIF_CBCR_Y,
+ .isif_port = {
+ .if_type = VPFE_RAW_BAYER,
+ .hdpol = VPFE_PINPOL_POSITIVE,
+ .vdpol =VPFE_PINPOL_POSITIVE
+ },
+#endif
+ .clip = 4095,
+ .align_sync = 0,
+ .rsz_start = 0,
+ .df_gain_en = 0
+};
+
+struct ipipe_params dm365_ipipe_defs = {
+ .ipipeif_param = {
+ .mode = ONE_SHOT,
+ .source = SDRAM_RAW,
+ .clock_select = SDRAM_CLK,
+ .glob_hor_size = WIDTH_I + 8,
+ .glob_ver_size = HEIGHT_I + 10,
+ .hnum = WIDTH_I,
+ .vnum = HEIGHT_I,
+ .adofs = WIDTH_I * 2,
+ .rsz = 16, /* resize ratio 16/rsz */
+ .decimation = IPIPEIF_DECIMATION_OFF,
+ .avg_filter = AVG_OFF,
+ .gain = 0x200, /* U10Q9 */
+ },
+ .ipipe_mode = ONE_SHOT,
+ .ipipe_dpaths_fmt = IPIPE_RAW2YUV,
+ .ipipe_colpat_olop = IPIPE_GREEN_BLUE,
+ .ipipe_colpat_olep = IPIPE_BLUE,
+ .ipipe_colpat_elop = IPIPE_RED,
+ .ipipe_colpat_elep = IPIPE_GREEN_RED,
+ .ipipe_vps = 0,
+ .ipipe_vsz = HEIGHT_I - 1,
+ .ipipe_hps = 0,
+ .ipipe_hsz = WIDTH_I - 1,
+ .rsz_common = {
+ .vps = 0,
+ .vsz = HEIGHT_I - 1,
+ .hps = 0,
+ .hsz = WIDTH_I - 1,
+ .src_img_fmt = RSZ_IMG_422,
+ .y_c = 0,
+ .raw_flip = 1, /* flip preserve Raw format */
+ .source = IPIPE_DATA,
+ .passthrough = IPIPE_BYPASS_OFF,
+ .yuv_y_min = 0,
+ .yuv_y_max = 255,
+ .yuv_c_min = 0,
+ .yuv_c_max = 255,
+ .rsz_seq_crv = DISABLE,
+ .out_chr_pos = IPIPE_YUV422_CHR_POS_COSITE
+ },
+ .rsz_rsc_param = {
+ {
+ .mode = ONE_SHOT,
+ .h_flip = DISABLE,
+ .v_flip = DISABLE,
+ .cen = DISABLE,
+ .yen = DISABLE,
+ .i_vps = 0,
+ .i_hps = 0,
+ .o_vsz = HEIGHT_O - 1,
+ .o_hsz = WIDTH_O - 1,
+ .v_phs_y = 0,
+ .v_phs_c = 0,
+ .v_dif = 256,
+ .v_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .v_lpf_int_y = 0,
+ .v_lpf_int_c = 0,
+ .h_phs = 0,
+ .h_dif = 256,
+ .h_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .h_lpf_int_y = 0,
+ .h_lpf_int_c = 0,
+ .dscale_en = 0,
+ .h_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .v_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .f_div.en = 0
+ },
+ {
+ .mode = ONE_SHOT,
+ .h_flip = DISABLE,
+ .v_flip = DISABLE,
+ .cen = DISABLE,
+ .yen = DISABLE,
+ .i_vps = 0,
+ .i_hps = 0,
+ .o_vsz = HEIGHT_O - 1,
+ .o_hsz = WIDTH_O - 1,
+ .v_phs_y = 0,
+ .v_phs_c = 0,
+ .v_dif = 256,
+ .v_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .v_lpf_int_y = 0,
+ .v_lpf_int_c = 0,
+ .h_phs = 0,
+ .h_dif = 256,
+ .h_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .h_lpf_int_y = 0,
+ .h_lpf_int_c = 0,
+ .dscale_en = 0,
+ .h_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .v_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .f_div.en = 0
+ },
+ },
+ .rsz2rgb = {
+ {
+ .rgb_en = DISABLE
+ },
+ {
+ .rgb_en = DISABLE
+ }
+ },
+ .ext_mem_param = {
+ {
+ .rsz_sdr_oft_y = WIDTH_O << 1,
+ .rsz_sdr_ptr_s_y = 0,
+ .rsz_sdr_ptr_e_y = HEIGHT_O,
+ .rsz_sdr_oft_c = WIDTH_O,
+ .rsz_sdr_ptr_s_c = 0,
+ .rsz_sdr_ptr_e_c = HEIGHT_O >> 1,
+ .flip_ofst_y = 0,
+ .flip_ofst_c = 0,
+ .c_offset = 0,
+ .user_y_ofst = 0,
+ .user_c_ofst = 0
+ },
+ {
+ .rsz_sdr_oft_y = WIDTH_O << 1,
+ .rsz_sdr_ptr_s_y = 0,
+ .rsz_sdr_ptr_e_y = HEIGHT_O,
+ .rsz_sdr_oft_c = WIDTH_O,
+ .rsz_sdr_ptr_s_c = 0,
+ .rsz_sdr_ptr_e_c = HEIGHT_O,
+ .flip_ofst_y = 0,
+ .flip_ofst_c = 0,
+ .c_offset = 0,
+ .user_y_ofst = 0,
+ .user_c_ofst = 0
+ },
+ },
+ .rsz_en[0] = ENABLE,
+ .rsz_en[1] = DISABLE
+};
+
+struct prev_single_shot_config dm365_prev_ss_config_defs = {
+ .bypass = IPIPE_BYPASS_OFF,
+ .input = {
+ .image_width = WIDTH_I,
+ .image_height = HEIGHT_I,
+ .vst = 0,
+ .hst = 0,
+ .ppln = WIDTH_I + 8,
+ .lpfr = HEIGHT_I + 10,
+ .pred = DPCM_SIMPLE_PRED,
+ .clk_div = {1, 6},
+ .data_shift = IPIPEIF_BITS11_0,
+ .dec_en = 0,
+ .rsz = 16, /* resize ratio 16/rsz */
+ .frame_div_mode_en = 0,
+ .avg_filter_en = AVG_OFF,
+ .dpc = {0, 0},
+ .gain = 512,
+ .clip = 4095,
+ .align_sync = 0,
+ .rsz_start = 0,
+ .pix_fmt = IPIPE_BAYER,
+ .colp_olop = IPIPE_GREEN_BLUE,
+ .colp_olep = IPIPE_BLUE,
+ .colp_elop = IPIPE_RED,
+ .colp_elep = IPIPE_GREEN_RED
+ },
+ .output = {
+ .pix_fmt = IPIPE_UYVY
+ }
+};
+
+struct prev_continuous_config dm365_prev_cont_config_defs = {
+ .bypass = IPIPE_BYPASS_OFF,
+ .input = {
+ .en_df_sub = 0,
+ .dec_en = 0,
+ .rsz = 16,
+ .avg_filter_en = AVG_OFF,
+ .gain = 512,
+ .clip = 4095,
+ //YCBCR
+ .colp_olop = IPIPE_GREEN_RED,
+ .colp_olep = IPIPE_RED,
+ .colp_elop = IPIPE_BLUE,
+ .colp_elep = IPIPE_GREEN_BLUE
+ },
+};
+
+struct rsz_single_shot_config dm365_rsz_ss_config_defs = {
+ .input = {
+ .image_width = WIDTH_I,
+ .image_height = HEIGHT_I,
+ .vst = 0,
+ .hst = 0,
+ .ppln = WIDTH_I + 8,
+ .lpfr = HEIGHT_I + 10,
+ .clk_div = {1, 6},
+ .dec_en = 0,
+ .rsz = 16, /* resize ratio 16/rsz */
+ .frame_div_mode_en = 0,
+ .avg_filter_en = AVG_OFF,
+ .align_sync = 0,
+ .rsz_start = 0,
+ .pix_fmt = IPIPE_UYVY
+ },
+ .output1 = {
+ .enable = 1,
+ .pix_fmt = IPIPE_UYVY,
+ .h_flip = 0,
+ .v_flip = 0,
+ .width = WIDTH_O,
+ .height = HEIGHT_O,
+ .vst_y = 0,
+ .vst_c = 0,
+ .v_typ_y = RSZ_INTP_CUBIC,
+ .v_typ_c = RSZ_INTP_CUBIC,
+ .v_lpf_int_y = 0,
+ .v_lpf_int_c = 0,
+ .h_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .h_lpf_int_y = 0,
+ .h_lpf_int_c = 0,
+ .en_down_scale = 0,
+ .h_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .v_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .user_y_ofst = 0,
+ .user_c_ofst = 0
+ },
+ .output2 = {
+ .enable = 1,
+ .pix_fmt = IPIPE_UYVY,
+ .h_flip = 0,
+ .v_flip = 0,
+ .width = WIDTH_O,
+ .height = HEIGHT_O,
+ .vst_y = 0,
+ .vst_c = 0,
+ .v_typ_y = RSZ_INTP_CUBIC,
+ .v_typ_c = RSZ_INTP_CUBIC,
+ .v_lpf_int_y = 0,
+ .v_lpf_int_c = 0,
+ .h_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .h_lpf_int_y = 0,
+ .h_lpf_int_c = 0,
+ .en_down_scale = 0,
+ .h_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .v_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .user_y_ofst = 0,
+ .user_c_ofst = 0
+ },
+ .chroma_sample_even = 0,
+ .yuv_y_min = 0,
+ .yuv_y_max = 255,
+ .yuv_c_min = 0,
+ .yuv_c_max = 255,
+ .out_chr_pos = IPIPE_YUV422_CHR_POS_COSITE,
+};
+
+struct rsz_continuous_config dm365_rsz_cont_config_defs = {
+ .output1 = {
+ .enable = 1,
+ .h_flip = 0,
+ .v_flip = 0,
+ .v_typ_y = RSZ_INTP_CUBIC,
+ .v_typ_c = RSZ_INTP_CUBIC,
+ .v_lpf_int_y = 0,
+ .v_lpf_int_c = 0,
+ .h_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .h_lpf_int_y = 0,
+ .h_lpf_int_c = 0,
+ .en_down_scale = 0,
+ .h_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .v_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .user_y_ofst = 0,
+ .user_c_ofst = 0
+ },
+ .output2 = {
+ .enable = 1,
+ .pix_fmt = IPIPE_UYVY,
+ .h_flip = 0,
+ .v_flip = 0,
+ .width = WIDTH_O,
+ .height = HEIGHT_O,
+ .vst_y = 0,
+ .vst_c = 0,
+ .v_typ_y = RSZ_INTP_CUBIC,
+ .v_typ_c = RSZ_INTP_CUBIC,
+ .v_lpf_int_y = 0,
+ .v_lpf_int_c = 0,
+ .h_typ_y = RSZ_INTP_CUBIC,
+ .h_typ_c = RSZ_INTP_CUBIC,
+ .h_lpf_int_y = 0,
+ .h_lpf_int_c = 0,
+ .en_down_scale = 0,
+ .h_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .v_dscale_ave_sz = IPIPE_DWN_SCALE_1_OVER_2,
+ .user_y_ofst = 0,
+ .user_c_ofst = 0
+ },
+ .chroma_sample_even = 0,
+ .yuv_y_min = 0,
+ .yuv_y_max = 255,
+ .yuv_c_min = 0,
+ .yuv_c_max = 255,
+ .out_chr_pos = IPIPE_YUV422_CHR_POS_COSITE,
+};
diff --git a/drivers/char/dm365_def_para.h b/drivers/char/dm365_def_para.h
new file mode 100644
index 00000000..eecff84f
--- /dev/null
+++ b/drivers/char/dm365_def_para.h
@@ -0,0 +1,23 @@
+#include <media/davinci/dm365_ipipe.h>
+extern struct prev_lutdpc dm365_lutdpc_defaults;
+extern struct prev_otfdpc dm365_otfdpc_defaults;
+extern struct prev_nf dm365_nf_defaults;
+extern struct prev_gic dm365_gic_defaults;
+extern struct prev_wb dm365_wb_defaults;
+extern struct prev_cfa dm365_cfa_defaults;
+extern struct prev_rgb2rgb dm365_rgb2rgb_defaults;
+extern struct prev_gamma dm365_gamma_defaults;
+extern struct prev_3d_lut dm365_3d_lut_defaults;
+extern struct prev_lum_adj dm365_lum_adj_defaults;
+extern struct prev_rgb2yuv dm365_rgb2yuv_defaults;
+extern struct prev_yuv422_conv dm365_yuv422_conv_defaults;
+extern struct prev_gbce dm365_gbce_defaults;
+extern struct prev_yee dm365_yee_defaults;
+extern struct prev_car dm365_car_defaults;
+extern struct prev_cgs dm365_cgs_defaults;
+extern struct ipipe_params dm365_ipipe_defs;
+extern struct prev_single_shot_config dm365_prev_ss_config_defs;
+extern struct prev_continuous_config dm365_prev_cont_config_defs;
+extern struct rsz_single_shot_config dm365_rsz_ss_config_defs;
+extern struct rsz_continuous_config dm365_rsz_cont_config_defs;
+extern struct ipipeif_5_1 ipipeif_5_1_defaults;
diff --git a/drivers/char/dm365_ipipe.c b/drivers/char/dm365_ipipe.c
new file mode 100644
index 00000000..de870e65
--- /dev/null
+++ b/drivers/char/dm365_ipipe.c
@@ -0,0 +1,4041 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+//#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/mutex.h>
+#include <linux/device.h>
+#include <linux/videodev2.h>
+#include <media/davinci/dm365_ipipe.h>
+#include <media/davinci/imp_hw_if.h>
+
+#include <mach/irqs.h>
+
+#include "dm365_ipipe_hw.h"
+#include "dm365_def_para.h"
+
+/* IPIPE module operation state */
+struct ipipe_oper_state {
+ /* Operation state in continuous mode */
+ unsigned int state;
+ /* Semaphore to protect the common hardware configuration */
+ struct mutex lock;
+ /* previewer config state */
+ unsigned int prev_config_state;
+ /* Shared configuration of the hardware */
+ struct ipipe_params *shared_config_param;
+ /* shared resource in use */
+ unsigned int resource_in_use;
+ /* resizer config state */
+ unsigned int rsz_config_state;
+ /* resizer chained with previewer */
+ unsigned int rsz_chained;
+ /* CCDC API related variables */
+ /* Buffer type, interleaved or field seperated for interlaced
+ * scan
+ */
+ unsigned int buffer_type;
+ /* frame format, 0 - interlaced, 1 - progressive */
+ unsigned int frame_format;
+ /* input pixel format */
+ enum imp_pix_formats in_pixel_format;
+ /* input pixel format */
+ enum imp_pix_formats out_pixel_format;
+};
+
+/* Operation mode of image processor (imp) */
+static u32 oper_mode = IMP_MODE_SINGLE_SHOT;
+module_param(oper_mode, uint, S_IRUGO);
+/* enable/disable serializer */
+static u32 en_serializer;
+module_param(en_serializer, uint, S_IRUGO);
+
+#define CONFIG_IPIPE_PARAM_VALIDATION
+/* ipipe module operation state & configuration */
+static struct ipipe_oper_state oper_state;
+
+/* LUT Defect pixel correction data */
+static struct prev_lutdpc lutdpc;
+static int set_lutdpc_params(struct device *dev, void *param, int len);
+static int get_lutdpc_params(struct device *dev, void *param, int len);
+
+/* LUT Defect pixel correction data */
+static struct prev_otfdpc otfdpc;
+static int set_otfdpc_params(struct device *dev, void *param, int len);
+static int get_otfdpc_params(struct device *dev, void *param, int len);
+
+/* Noise filter */
+static struct prev_nf nf1;
+static struct prev_nf nf2;
+static int set_nf1_params(struct device *dev, void *param, int len);
+static int get_nf1_params(struct device *dev, void *param, int len);
+static int set_nf2_params(struct device *dev, void *param, int len);
+static int get_nf2_params(struct device *dev, void *param, int len);
+
+/* Green Imbalance Correction */
+static struct prev_gic gic;
+static int set_gic_params(struct device *dev, void *param, int len);
+static int get_gic_params(struct device *dev, void *param, int len);
+
+/* White Balance */
+static struct prev_wb wb;
+static int set_wb_params(struct device *dev, void *param, int len);
+static int get_wb_params(struct device *dev, void *param, int len);
+
+/* CFA */
+static struct prev_cfa cfa;
+static int set_cfa_params(struct device *dev, void *param, int len);
+static int get_cfa_params(struct device *dev, void *param, int len);
+
+/* RGB2RGB conversion */
+static struct prev_rgb2rgb rgb2rgb_1;
+static struct prev_rgb2rgb rgb2rgb_2;
+static int set_rgb2rgb_1_params(struct device *dev, void *param, int len);
+static int get_rgb2rgb_1_params(struct device *dev, void *param, int len);
+static int set_rgb2rgb_2_params(struct device *dev, void *param, int len);
+static int get_rgb2rgb_2_params(struct device *dev, void *param, int len);
+
+/* Gamma correction */
+static struct prev_gamma gamma;
+static int set_gamma_params(struct device *dev, void *param, int len);
+static int get_gamma_params(struct device *dev, void *param, int len);
+
+/* 3D LUT */
+static struct prev_3d_lut lut_3d;
+static int set_3d_lut_params(struct device *dev, void *param, int len);
+static int get_3d_lut_params(struct device *dev, void *param, int len);
+
+/* Lumina Adjustment */
+static struct prev_lum_adj lum_adj;
+static int set_lum_adj_params(struct device *dev, void *param, int len);
+static int get_lum_adj_params(struct device *dev, void *param, int len);
+
+/* RGB2YUV conversion */
+static struct prev_rgb2yuv rgb2yuv;
+static int set_rgb2yuv_params(struct device *dev, void *param, int len);
+static int get_rgb2yuv_params(struct device *dev, void *param, int len);
+
+/* YUV 422 conversion */
+static struct prev_yuv422_conv yuv422_conv;
+static int set_yuv422_conv_params(struct device *dev, void *param, int len);
+static int get_yuv422_conv_params(struct device *dev, void *param, int len);
+
+/* GBCE */
+static struct prev_gbce gbce;
+static int set_gbce_params(struct device *dev, void *param, int len);
+static int get_gbce_params(struct device *dev, void *param, int len);
+
+/* Edge Enhancement */
+static struct prev_yee yee;
+static int set_yee_params(struct device *dev, void *param, int len);
+static int get_yee_params(struct device *dev, void *param, int len);
+
+/* Chromatic Artifact Reduction, CAR */
+static struct prev_car car;
+static int set_car_params(struct device *dev, void *param, int len);
+static int get_car_params(struct device *dev, void *param, int len);
+
+/* Chromatic Artifact Reduction, CAR */
+static struct prev_cgs cgs;
+static int set_cgs_params(struct device *dev, void *param, int len);
+static int get_cgs_params(struct device *dev, void *param, int len);
+#ifdef CONFIG_VIDEO_YCBCR
+static int ipipe_set_ipipeif_addr(struct device *dev, void *config, unsigned int address);
+#endif
+/* Tables for various tuning modules */
+struct ipipe_lutdpc_entry ipipe_lutdpc_table[MAX_SIZE_DPC];
+struct ipipe_3d_lut_entry ipipe_3d_lut_table[MAX_SIZE_3D_LUT];
+unsigned short ipipe_gbce_table[MAX_SIZE_GBCE_LUT];
+struct ipipe_gamma_entry ipipe_gamma_table_r[MAX_SIZE_GAMMA];
+struct ipipe_gamma_entry ipipe_gamma_table_b[MAX_SIZE_GAMMA];
+struct ipipe_gamma_entry ipipe_gamma_table_g[MAX_SIZE_GAMMA];
+short ipipe_yee_table[MAX_SIZE_YEE_LUT];
+
+static struct prev_module_if prev_modules[PREV_MAX_MODULES] = {
+ {
+ .version = "5.1",
+ .module_id = PREV_LUTDPC,
+ .module_name = "LUT Defect Correction",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_lutdpc_params,
+ .get = get_lutdpc_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_OTFDPC,
+ .module_name = "OTF Defect Pixel Correction",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_otfdpc_params,
+ .get = get_otfdpc_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_NF1,
+ .module_name = "2-D Noise filter - 1",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_nf1_params,
+ .get = get_nf1_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_NF2,
+ .module_name = "2-D Noise filter - 2",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_nf2_params,
+ .get = get_nf2_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_GIC,
+ .module_name = "Green Imbalance Correction",
+ .control = 0,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_gic_params,
+ .get = get_gic_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_WB,
+ .module_name = "White balance",
+ .control = 1,
+ .path = IMP_RAW2RAW | IMP_RAW2YUV,
+ .set = set_wb_params,
+ .get = get_wb_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_CFA,
+ .module_name = "CFA Interpolation",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_cfa_params,
+ .get = get_cfa_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_RGB2RGB_1,
+ .module_name = "RGB-RGB Conversion - 1",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_rgb2rgb_1_params,
+ .get = get_rgb2rgb_1_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_GAMMA,
+ .module_name = "Gamma Correction",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_gamma_params,
+ .get = get_gamma_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_RGB2RGB_2,
+ .module_name = "RGB-RGB Conversion - 2",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_rgb2rgb_2_params,
+ .get = get_rgb2rgb_2_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_3D_LUT,
+ .module_name = "3D LUT",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_3d_lut_params,
+ .get = get_3d_lut_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_RGB2YUV,
+ .module_name = "RGB-YCbCr conversion",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_rgb2yuv_params,
+ .get = get_rgb2yuv_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_GBCE,
+ .module_name = "Global Brightness,Contrast Control",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_gbce_params,
+ .get = get_gbce_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_YUV422_CONV,
+ .module_name = "YUV 422 conversion",
+ .control = 0,
+ .path = IMP_RAW2YUV,
+ .set = set_yuv422_conv_params,
+ .get = get_yuv422_conv_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_LUM_ADJ,
+ .module_name = "Luminance Adjustment",
+ .control = 1,
+ .path = IMP_RAW2YUV,
+ .set = set_lum_adj_params,
+ .get = get_lum_adj_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_YEE,
+ .module_name = "Edge Enhancer",
+ .control = 1,
+ .path = IMP_RAW2YUV | IMP_YUV2YUV,
+ .set = set_yee_params,
+ .get = get_yee_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_CAR,
+ .module_name = "Chromatic Artifact Reduction",
+ .control = 1,
+ .path = IMP_RAW2YUV | IMP_YUV2YUV,
+ .set = set_car_params,
+ .get = get_car_params
+ },
+ {
+ .version = "5.1",
+ .module_id = PREV_CGS,
+ .module_name = "Chromatic Gain Suppression",
+ .control = 1,
+ .path = IMP_RAW2YUV | IMP_YUV2YUV,
+ .set = set_cgs_params,
+ .get = get_cgs_params
+ }
+};
+
+/* function prototypes */
+static struct prev_module_if *prev_enum_preview_cap(struct device *dev,
+ int index);
+static unsigned int prev_get_oper_mode(void);
+static unsigned int ipipe_get_oper_state(void);
+static void ipipe_set_oper_state(unsigned int state);
+static unsigned int ipipe_rsz_chain_state(void);
+static void *ipipe_alloc_config_block(struct device *dev, int shared);
+static void ipipe_dealloc_config_block(struct device *dev, void *config_block);
+static void ipipe_set_user_config_defaults(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode,
+ void *config);
+static int ipipe_set_preview_config(struct device *dev,
+ unsigned int oper_mode,
+ void *user_config, void *config);
+static int ipipe_set_resize_config(struct device *dev, unsigned int oper_mode,
+ int resizer_chained,
+ void *user_config, void *config);
+static int ipipe_reconfig_resizer(struct device *dev,
+ struct rsz_reconfig *reconfig,
+ void *config);
+
+static void ipipe_enable(unsigned char en, void *config);
+static void ipipe_get_irq(struct irq_numbers *irq);
+static unsigned int ipipe_get_rsz_config_state(void);
+static int ipipe_do_hw_setup(struct device *dev, void *config);
+static unsigned int ipipe_get_prev_config_state(void);
+static void ipipe_lock_chain(void);
+static void ipipe_unlock_chain(void);
+static void ipipe_dealloc_user_config_block(struct device *dev,
+ void *config_block);
+static void *ipipe_alloc_user_config_block(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, int *len);
+static int ipipe_update_outbuf1_address(void *config, unsigned int address);
+static int ipipe_update_outbuf2_address(void *config, unsigned int address);
+static int ipipe_set_ipipe_if_address(void *config, unsigned int address);
+
+/* IPIPE hardware limits */
+#define IPIPE_MAX_OUTPUT_WIDTH_A 2176
+#define IPIPE_MAX_OUTPUT_WIDTH_B 640
+
+/* Based on max resolution supported. QXGA */
+//#define IPIPE_MAX_OUTPUT_HEIGHT_A 1536
+#define IPIPE_MAX_OUTPUT_HEIGHT_A 2197
+/* Based on max resolution supported. VGA */
+#define IPIPE_MAX_OUTPUT_HEIGHT_B 480
+
+/* Raw YUV formats */
+static u32 ipipe_raw_yuv_pix_formats[] =
+ {V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_NV12};
+
+
+static int ipipe_enum_pix(u32 *pix, int i)
+{
+ if (i >= ARRAY_SIZE(ipipe_raw_yuv_pix_formats))
+ return -EINVAL;
+
+ *pix = ipipe_raw_yuv_pix_formats[i];
+ return 0;
+}
+
+static int ipipe_get_max_output_width(int rsz)
+{
+ if (rsz == RSZ_A)
+ return IPIPE_MAX_OUTPUT_WIDTH_A;
+ return IPIPE_MAX_OUTPUT_WIDTH_B;
+}
+
+static int ipipe_get_max_output_height(int rsz)
+{
+ if (rsz == RSZ_A)
+ return IPIPE_MAX_OUTPUT_HEIGHT_A;
+ return IPIPE_MAX_OUTPUT_HEIGHT_B;
+}
+
+static int ipipe_serialize(void)
+{
+ return en_serializer;
+}
+
+static void ipipe_dump_hw_config(void);
+
+/* APIs for CCDC driver */
+static int ipipe_set_input_win(struct imp_window *);
+static int ipipe_get_input_win(struct imp_window *);
+static int ipipe_set_in_pixel_format(enum imp_pix_formats);
+static int ipipe_set_out_pixel_format(enum imp_pix_formats);
+static int ipipe_set_buftype(unsigned char);
+static int ipipe_set_frame_format(unsigned char);
+static int ipipe_set_output_win(struct imp_window *win);
+static int ipipe_get_output_state(unsigned char out_sel);
+static int ipipe_get_line_length(unsigned char out_sel);
+static int ipipe_get_image_height(unsigned char out_sel);
+static int ipipe_set_hw_if_param(struct vpfe_hw_if_param *if_param);
+
+struct imp_hw_interface dm365_ipipe_interface = {
+ .name = "DM365 IPIPE",
+ .owner = THIS_MODULE,
+ .prev_enum_modules = prev_enum_preview_cap,
+ .get_preview_oper_mode = prev_get_oper_mode,
+ .get_resize_oper_mode = prev_get_oper_mode,
+ .get_hw_state = ipipe_get_oper_state,
+ .set_hw_state = ipipe_set_oper_state,
+ .resizer_chain = ipipe_rsz_chain_state,
+ .lock_chain = ipipe_lock_chain,
+ .unlock_chain = ipipe_unlock_chain,
+ .serialize = ipipe_serialize,
+ .alloc_config_block = ipipe_alloc_config_block,
+ .dealloc_config_block = ipipe_dealloc_config_block,
+ .alloc_user_config_block = ipipe_alloc_user_config_block,
+ .dealloc_user_config_block = ipipe_dealloc_user_config_block,
+ .set_user_config_defaults = ipipe_set_user_config_defaults,
+ .set_preview_config = ipipe_set_preview_config,
+ .set_resizer_config = ipipe_set_resize_config,
+ .reconfig_resizer = ipipe_reconfig_resizer,
+ .update_inbuf_address = ipipe_set_ipipe_if_address,
+ .update_outbuf1_address = ipipe_update_outbuf1_address,
+ .update_outbuf2_address = ipipe_update_outbuf2_address,
+ .enable = ipipe_enable,
+ .enable_resize = rsz_src_enable,
+ .hw_setup = ipipe_do_hw_setup,
+ .get_preview_irq = ipipe_get_irq,
+ .get_rsz_irq = ipipe_get_irq,
+ .get_resizer_config_state = ipipe_get_rsz_config_state,
+ .get_previewer_config_state = ipipe_get_prev_config_state,
+ /* Below used by CCDC driver to set input and output params */
+ .set_input_win = ipipe_set_input_win,
+ .get_input_win = ipipe_get_input_win,
+ .set_hw_if_param = ipipe_set_hw_if_param,
+ .set_in_pixel_format = ipipe_set_in_pixel_format,
+ .set_out_pixel_format = ipipe_set_out_pixel_format,
+ .set_buftype = ipipe_set_buftype,
+ .set_frame_format = ipipe_set_frame_format,
+ .set_output_win = ipipe_set_output_win,
+ .get_output_state = ipipe_get_output_state,
+ .get_line_length = ipipe_get_line_length,
+ .get_image_height = ipipe_get_image_height,
+ .get_image_height = ipipe_get_image_height,
+ .get_max_output_width = ipipe_get_max_output_width,
+ .get_max_output_height = ipipe_get_max_output_height,
+ .enum_pix = ipipe_enum_pix,
+#ifdef CONFIG_VIDEO_YCBCR
+ .set_ipipif_addr = ipipe_set_ipipeif_addr,
+#endif
+ /* debug function */
+ .dump_hw_config = ipipe_dump_hw_config,
+};
+
+static int ipipe_set_ipipe_if_address(void *config, unsigned int address)
+{
+ struct ipipeif *if_params;
+ if (ISNULL(config))
+ return -1;
+ if_params = &((struct ipipe_params *)config)->ipipeif_param;
+ return ipipeif_set_address(if_params, address);
+}
+
+static void ipipe_lock_chain(void)
+{
+ mutex_lock(&oper_state.lock);
+ oper_state.resource_in_use = 1;
+ mutex_unlock(&oper_state.lock);
+}
+
+static void ipipe_unlock_chain(void)
+{
+ mutex_lock(&oper_state.lock);
+ oper_state.resource_in_use = 0;
+ oper_state.prev_config_state = STATE_NOT_CONFIGURED;
+ oper_state.rsz_config_state = STATE_NOT_CONFIGURED;
+ oper_state.rsz_chained = 0;
+ mutex_unlock(&oper_state.lock);
+}
+static int ipipe_process_pix_fmts(enum ipipe_pix_formats in_pix_fmt,
+ enum ipipe_pix_formats out_pix_fmt,
+ struct ipipe_params *param)
+{
+ enum ipipe_pix_formats temp_pix_fmt;
+
+ switch (in_pix_fmt) {
+ case IPIPE_BAYER_8BIT_PACK:
+ {
+ temp_pix_fmt = IPIPE_BAYER;
+ param->ipipeif_param.var.if_5_1.pack_mode
+ = IPIPEIF_5_1_PACK_8_BIT;
+ break;
+ }
+ case IPIPE_BAYER_8BIT_PACK_ALAW:
+ {
+ param->ipipeif_param.var.if_5_1.pack_mode
+ = IPIPEIF_5_1_PACK_8_BIT_A_LAW;
+ temp_pix_fmt = IPIPE_BAYER;
+ break;
+ }
+ case IPIPE_BAYER_8BIT_PACK_DPCM:
+ {
+ param->ipipeif_param.var.if_5_1.pack_mode
+ = IPIPEIF_5_1_PACK_8_BIT;
+ param->ipipeif_param.var.if_5_1.dpcm.en = 1;
+ temp_pix_fmt = IPIPE_BAYER;
+ break;
+ }
+ case IPIPE_BAYER:
+ {
+ param->ipipeif_param.var.if_5_1.pack_mode
+ = IPIPEIF_5_1_PACK_16_BIT;
+ temp_pix_fmt = IPIPE_BAYER;
+ break;
+ }
+ case IPIPE_BAYER_12BIT_PACK:
+ {
+ param->ipipeif_param.var.if_5_1.pack_mode
+ = IPIPEIF_5_1_PACK_12_BIT;
+ temp_pix_fmt = IPIPE_BAYER;
+ break;
+ }
+ default:
+ {
+ temp_pix_fmt = IPIPE_UYVY;
+ }
+ }
+
+ if (temp_pix_fmt == IPIPE_BAYER)
+ if (out_pix_fmt == IPIPE_BAYER)
+ param->ipipe_dpaths_fmt = IPIPE_RAW2RAW;
+ else if ((out_pix_fmt == IPIPE_UYVY) ||
+ (out_pix_fmt == IPIPE_YUV420SP))
+ param->ipipe_dpaths_fmt = IPIPE_RAW2YUV;
+ else {
+ printk(KERN_ERR "process pix format, unknown output"
+ "format %d", out_pix_fmt);
+ return -1;
+ }
+ else if (temp_pix_fmt == IPIPE_UYVY) {
+ if (out_pix_fmt == IPIPE_UYVY)
+ param->ipipe_dpaths_fmt = IPIPE_YUV2YUV;
+ else if (out_pix_fmt == IPIPE_YUV420SP)
+ param->ipipe_dpaths_fmt = IPIPE_YUV2YUV;
+ else {
+ printk(KERN_ERR "process pix format, unknown output"
+ "format %d", out_pix_fmt);
+ return -1;
+ }
+ }
+ return 0;
+}
+
+/*
+ * calculate_resize_ratios()
+ * calculates resize ratio for resizer A or B. This is called after setting
+ * the input size or output size
+ */
+static void calculate_resize_ratios(struct ipipe_params *param, int index)
+{
+ param->rsz_rsc_param[index].h_dif =
+ ((param->ipipe_hsz + 1) * 256) /
+ (param->rsz_rsc_param[index].o_hsz + 1);
+ param->rsz_rsc_param[index].v_dif =
+ ((param->ipipe_vsz + 1) * 256) /
+ (param->rsz_rsc_param[index].o_vsz + 1);
+}
+
+static int ipipe_do_hw_setup(struct device *dev, void *config)
+{
+ struct ipipe_params *param = (struct ipipe_params *)config;
+ int ret = 0;
+
+ dev_dbg(dev, "ipipe_do_hw_setup\n");
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS)) {
+ /* continuous mode */
+ param = oper_state.shared_config_param;
+ if (param->rsz_en[RSZ_A])
+ calculate_resize_ratios(param, RSZ_A);
+ if (param->rsz_en[RSZ_B])
+ calculate_resize_ratios(param, RSZ_B);
+ ret = ipipe_hw_setup(param);
+ }
+ mutex_unlock(&oper_state.lock);
+ return ret;
+}
+#ifdef CONFIG_VIDEO_YCBCR
+static int ipipe_set_ipipeif_addr(struct device *dev, void *config, unsigned int address)
+{
+ struct ipipe_params *param = (struct ipipe_params *)config;
+ int ret = 0;
+
+ dev_dbg(dev, "ipipe_do_hw_setup\n");
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS)) {
+ /* continuous mode */
+ param = oper_state.shared_config_param;
+ ret = ipipe_hw_set_ipipeif_addr(param,address);
+ }
+ mutex_unlock(&oper_state.lock);
+ return ret;
+}
+#endif
+static void ipipe_get_irq(struct irq_numbers *irq)
+{
+ irq->sdram = IRQ_PRVUINT;
+ irq->update = 4;
+}
+
+static unsigned int ipipe_rsz_chain_state(void)
+{
+ return oper_state.rsz_chained;
+}
+
+static int ipipe_update_outbuf1_address(void *config, unsigned int address)
+{
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS))
+ return rsz_set_output_address(oper_state.shared_config_param,
+ 0,
+ address);
+ return rsz_set_output_address((struct ipipe_params *)config,
+ 0,
+ address);
+}
+
+static int ipipe_update_outbuf2_address(void *config, unsigned int address)
+{
+ if ((ISNULL(config)) && (oper_mode == IMP_MODE_CONTINUOUS))
+ return rsz_set_output_address(oper_state.shared_config_param,
+ 1,
+ address);
+ return rsz_set_output_address((struct ipipe_params *)config,
+ 1,
+ address);
+}
+
+static void ipipe_enable(unsigned char en, void *config)
+{
+ unsigned char val = 0;
+ struct ipipe_params *param = (struct ipipe_params *)config;
+
+ if (en)
+ val = 1;
+ if (oper_mode == IMP_MODE_CONTINUOUS)
+ param = oper_state.shared_config_param;
+ if (param->rsz_common.source == IPIPE_DATA)
+ regw_ip(val, IPIPE_SRC_EN);
+ else
+ regw_ip(0, IPIPE_SRC_EN);
+ if (param->rsz_en[RSZ_A])
+ rsz_enable(RSZ_A, en);
+ if (param->rsz_en[RSZ_B])
+ rsz_enable(RSZ_B, en);
+ if (oper_mode == IMP_MODE_SINGLE_SHOT)
+ ipipeif_set_enable(val, oper_mode);
+}
+
+static int validate_lutdpc_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int i;
+ if (lutdpc.en > 1 ||
+ lutdpc.repl_white > 1 ||
+ lutdpc.dpc_size > LUT_DPC_MAX_SIZE)
+ return -1;
+ if (lutdpc.en && (ISNULL(lutdpc.table)))
+ return -1;
+ for (i = 0; i < lutdpc.dpc_size; i++) {
+ if (lutdpc.table[i].horz_pos > LUT_DPC_H_POS_MASK ||
+ lutdpc.table[i].vert_pos > LUT_DPC_V_POS_MASK)
+ return -1;
+ }
+#endif
+ return 0;
+}
+
+static int set_lutdpc_params(struct device *dev, void *param, int len)
+{
+ struct prev_lutdpc dpc_param;
+ struct ipipe_lutdpc_entry *temp;
+
+ if (ISNULL(param)) {
+ /* Copy defaults for dfc */
+ temp = lutdpc.table;
+ memcpy((void *)&lutdpc,
+ (void *)&dm365_lutdpc_defaults,
+ sizeof(struct prev_lutdpc));
+ lutdpc.table = temp;
+ } else {
+ if (len != sizeof(struct prev_lutdpc)) {
+ dev_err(dev,
+ "set_lutdpc_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&dpc_param,
+ (struct prev_lutdpc *)param,
+ sizeof(struct prev_lutdpc))) {
+ dev_err(dev,
+ "set_lutdpc_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+
+ if (ISNULL(dpc_param.table)) {
+ dev_err(dev, "Invalid user dpc table ptr\n");
+ return -EINVAL;
+ }
+ lutdpc.en = dpc_param.en;
+ lutdpc.repl_white = dpc_param.repl_white;
+ lutdpc.dpc_size = dpc_param.dpc_size;
+ if (copy_from_user
+ (lutdpc.table,
+ (struct ipipe_dpc_entry *)dpc_param.table,
+ (lutdpc.dpc_size *
+ sizeof(struct ipipe_lutdpc_entry)))) {
+ dev_err(dev,
+ "set_lutdpc_params: Error in copying "
+ "dfc table to kernel\n");
+ return -EFAULT;
+ }
+
+ if (validate_lutdpc_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_lutdpc_regs(&lutdpc);
+}
+
+static int get_lutdpc_params(struct device *dev, void *param, int len)
+{
+ struct prev_lutdpc user_lutdpc;
+ struct prev_lutdpc *lut_param = (struct prev_lutdpc *)param;
+ if (ISNULL(lut_param)) {
+ dev_err(dev, "get_lutdpc_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_lutdpc)) {
+ dev_err(dev,
+ "get_lutdpc_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_lutdpc,
+ lut_param,
+ sizeof(struct prev_lutdpc))) {
+ dev_err(dev, "get_lutdpc_params: Error in copy to" " kernel\n");
+ return -EFAULT;
+ }
+
+ user_lutdpc.en = lutdpc.en;
+ user_lutdpc.repl_white = lutdpc.repl_white;
+ user_lutdpc.dpc_size = lutdpc.dpc_size;
+ if (ISNULL(user_lutdpc.table)) {
+ dev_err(dev, "get_lutdpc_params:" " Invalid table ptr");
+ return -EINVAL;
+ }
+ if (copy_to_user(user_lutdpc.table,
+ lutdpc.table,
+ (lutdpc.dpc_size *
+ sizeof(struct ipipe_lutdpc_entry)))) {
+ dev_err(dev,
+ "get_lutdpc_params:Table Error in" " copy to user\n");
+ return -EFAULT;
+ }
+
+ if (copy_to_user(lut_param,
+ &user_lutdpc,
+ sizeof(struct prev_lutdpc))) {
+ dev_err(dev, "get_lutdpc_params: Error in copy" " to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_otfdpc_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ struct prev_otfdpc *dpc_param = (struct prev_otfdpc *)&otfdpc;
+ struct prev_otfdpc_2_0 *dpc_2_0;
+ struct prev_otfdpc_3_0 *dpc_3_0;
+
+ if (dpc_param->en > 1)
+ return -1;
+ if (dpc_param->alg == IPIPE_OTFDPC_2_0) {
+ dpc_2_0 = &dpc_param->alg_cfg.dpc_2_0;
+ if (dpc_2_0->det_thr.r > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->det_thr.gr > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->det_thr.gb > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->det_thr.b > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->corr_thr.r > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->corr_thr.gr > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->corr_thr.gb > OTFDPC_DPC2_THR_MASK ||
+ dpc_2_0->corr_thr.b > OTFDPC_DPC2_THR_MASK)
+ return -1;
+ } else {
+ dpc_3_0 = &dpc_param->alg_cfg.dpc_3_0;
+ if (dpc_3_0->act_adj_shf > OTF_DPC3_0_SHF_MASK ||
+ dpc_3_0->det_thr > OTF_DPC3_0_DET_MASK ||
+ dpc_3_0->det_slp > OTF_DPC3_0_SLP_MASK ||
+ dpc_3_0->det_thr_min > OTF_DPC3_0_DET_MASK ||
+ dpc_3_0->det_thr_max > OTF_DPC3_0_DET_MASK ||
+ dpc_3_0->corr_thr > OTF_DPC3_0_CORR_MASK ||
+ dpc_3_0->corr_slp > OTF_DPC3_0_SLP_MASK ||
+ dpc_3_0->corr_thr_min > OTF_DPC3_0_CORR_MASK ||
+ dpc_3_0->corr_thr_max > OTF_DPC3_0_CORR_MASK)
+ return -1;
+ }
+#endif
+ return 0;
+}
+
+static int set_otfdpc_params(struct device *dev, void *param, int len)
+{
+ struct prev_otfdpc *dpc_param = (struct prev_otfdpc *)param;
+
+ if (ISNULL(param)) {
+ /* Copy defaults for dpc2.0 defaults */
+ memcpy((void *)&otfdpc,
+ (void *)&dm365_otfdpc_defaults,
+ sizeof(struct ipipe_otfdpc_2_0));
+ } else {
+ if (len != sizeof(struct prev_otfdpc)) {
+ dev_err(dev,
+ "set_otfdpc_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&otfdpc,
+ dpc_param,
+ sizeof(struct prev_otfdpc))) {
+ dev_err(dev,
+ "set_otfdpc_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+
+ if (validate_otfdpc_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_otfdpc_regs(&otfdpc);
+}
+
+static int get_otfdpc_params(struct device *dev, void *param, int len)
+{
+ struct prev_otfdpc *dpc_param = (struct prev_otfdpc *)param;
+
+ if (ISNULL(dpc_param)) {
+ dev_err(dev, "get_otfdpc_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_otfdpc)) {
+ dev_err(dev,
+ "get_otfdpc_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(dpc_param,
+ &otfdpc,
+ sizeof(struct prev_otfdpc))) {
+ dev_err(dev,
+ "get_otfdpc_params: Error in copy dpc table to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_nf_params(struct device *dev, unsigned int id)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int i;
+ struct prev_nf *nf_param = &nf1;
+
+ if (id)
+ nf_param = &nf2;
+ if (nf_param->en > 1 ||
+ nf_param->shft_val > D2F_SHFT_VAL_MASK ||
+ nf_param->spread_val > D2F_SPR_VAL_MASK ||
+ nf_param->apply_lsc_gain > 1 ||
+ nf_param->edge_det_min_thr > D2F_EDGE_DET_THR_MASK ||
+ nf_param->edge_det_max_thr > D2F_EDGE_DET_THR_MASK)
+ return -1;
+
+ for (i = 0; i < IPIPE_NF_THR_TABLE_SIZE; i++)
+ if (nf_param->thr[i] > D2F_THR_VAL_MASK)
+ return -1;
+ for (i = 0; i < IPIPE_NF_STR_TABLE_SIZE; i++)
+ if (nf_param->str[i] > D2F_STR_VAL_MASK)
+ return -1;
+#endif
+ return 0;
+}
+
+static int set_nf_params(struct device *dev, unsigned int id,
+ void *param, int len)
+{
+ struct prev_nf *nf_param = (struct prev_nf *)param;
+ struct prev_nf *nf = &nf1;
+
+ if (id)
+ nf = &nf2;
+
+ if (ISNULL(nf_param)) {
+ /* Copy defaults for nf */
+ memcpy((void *)nf,
+ (void *)&dm365_nf_defaults,
+ sizeof(struct prev_nf));
+ memset((void *)nf->thr, 0, IPIPE_NF_THR_TABLE_SIZE);
+ memset((void *)nf->str, 0, IPIPE_NF_THR_TABLE_SIZE);
+ } else {
+ if (len != sizeof(struct prev_nf)) {
+ dev_err(dev,
+ "set_nf_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(nf, nf_param, sizeof(struct prev_nf))) {
+ dev_err(dev,
+ "set_nf_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_nf_params(dev, id) < 0)
+ return -EINVAL;
+ }
+ /* Now set the values in the hw */
+ return ipipe_set_d2f_regs(id, nf);
+}
+
+static int set_nf1_params(struct device *dev, void *param, int len)
+{
+ return set_nf_params(dev, 0, param, len);
+}
+
+static int set_nf2_params(struct device *dev, void *param, int len)
+{
+ return set_nf_params(dev, 1, param, len);
+}
+
+static int get_nf_params(struct device *dev, unsigned int id, void *param,
+ int len)
+{
+ struct prev_nf *nf_param = (struct prev_nf *)param;
+ struct prev_nf *nf = &nf1;
+
+ if (ISNULL(nf_param)) {
+ dev_err(dev, "get_nf_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_nf)) {
+ dev_err(dev,
+ "get_nf_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (id)
+ nf = &nf2;
+ if (copy_to_user((struct prev_nf *)nf_param, nf,
+ sizeof(struct prev_nf))) {
+ dev_err(dev, "get_nf_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int get_nf1_params(struct device *dev, void *param, int len)
+{
+ return get_nf_params(dev, 0, param, len);
+}
+
+static int get_nf2_params(struct device *dev, void *param, int len)
+{
+ return get_nf_params(dev, 1, param, len);
+}
+
+static int validate_gic_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (gic.en > 1 ||
+ gic.gain > GIC_GAIN_MASK ||
+ gic.thr > GIC_THR_MASK ||
+ gic.slope > GIC_SLOPE_MASK ||
+ gic.apply_lsc_gain > 1 ||
+ gic.nf2_thr_gain.integer > GIC_NFGAN_INT_MASK ||
+ gic.nf2_thr_gain.decimal > GIC_NFGAN_DECI_MASK)
+ return -1;
+#endif
+ return 0;
+}
+
+static int set_gic_params(struct device *dev, void *param, int len)
+{
+ struct prev_gic *gic_param = (struct prev_gic *)param;
+
+ if (ISNULL(gic_param)) {
+ /* Copy defaults for nf */
+ memcpy((void *)&gic,
+ (void *)&dm365_gic_defaults,
+ sizeof(struct prev_gic));
+ } else {
+ if (len != sizeof(struct prev_gic)) {
+ dev_err(dev,
+ "set_gic_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&gic, gic_param, sizeof(struct prev_gic))) {
+ dev_err(dev,
+ "set_gic_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_gic_params(dev) < 0)
+ return -EINVAL;
+ }
+ /* Now set the values in the hw */
+ return ipipe_set_gic_regs(&gic);
+}
+
+static int get_gic_params(struct device *dev, void *param, int len)
+{
+ struct prev_gic *gic_param = (struct prev_gic *)param;
+
+ if (ISNULL(gic_param)) {
+ dev_err(dev, "get_gic_params: invalid user ptr");
+ return -EINVAL;
+ }
+
+ if (len != sizeof(struct prev_gic)) {
+ dev_err(dev,
+ "get_gic_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+
+ if (copy_to_user((struct prev_gic *)gic_param,
+ &gic,
+ sizeof(struct prev_gic))) {
+ dev_err(dev, "get_gic_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_wb_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (wb.ofst_r > WB_OFFSET_MASK ||
+ wb.ofst_gr > WB_OFFSET_MASK ||
+ wb.ofst_gb > WB_OFFSET_MASK ||
+ wb.ofst_b > WB_OFFSET_MASK ||
+ wb.gain_r.integer > WB_GAIN_INT_MASK ||
+ wb.gain_r.decimal > WB_GAIN_DECI_MASK ||
+ wb.gain_gr.integer > WB_GAIN_INT_MASK ||
+ wb.gain_gr.decimal > WB_GAIN_DECI_MASK ||
+ wb.gain_gb.integer > WB_GAIN_INT_MASK ||
+ wb.gain_gb.decimal > WB_GAIN_DECI_MASK ||
+ wb.gain_b.integer > WB_GAIN_INT_MASK ||
+ wb.gain_b.decimal > WB_GAIN_DECI_MASK)
+ return -1;
+#endif
+ return 0;
+}
+static int set_wb_params(struct device *dev, void *param, int len)
+{
+ struct prev_wb *wb_param = (struct prev_wb *)param;
+
+ dev_dbg(dev, "set_wb_params");
+ if (ISNULL(wb_param)) {
+ /* Copy defaults for wb */
+ memcpy((void *)&wb,
+ (void *)&dm365_wb_defaults,
+ sizeof(struct prev_wb));
+ } else {
+ if (len != sizeof(struct prev_wb)) {
+ dev_err(dev,
+ "set_wb_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&wb, wb_param, sizeof(struct prev_wb))) {
+ dev_err(dev,
+ "set_wb_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_wb_params(dev) < 0)
+ return -EINVAL;
+ }
+
+ /* Now set the values in the hw */
+ return ipipe_set_wb_regs(&wb);
+}
+static int get_wb_params(struct device *dev, void *param, int len)
+{
+ struct prev_wb *wb_param = (struct prev_wb *)param;
+
+ if (ISNULL(wb_param)) {
+ dev_err(dev, "get_wb_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_wb)) {
+ dev_err(dev,
+ "get_wb_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user((struct prev_wb *)wb_param,
+ &wb,
+ sizeof(struct prev_wb))) {
+ dev_err(dev, "get_wb_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_cfa_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (cfa.hpf_thr_2dir > CFA_HPF_THR_2DIR_MASK ||
+ cfa.hpf_slp_2dir > CFA_HPF_SLOPE_2DIR_MASK ||
+ cfa.hp_mix_thr_2dir > CFA_HPF_MIX_THR_2DIR_MASK ||
+ cfa.hp_mix_slope_2dir > CFA_HPF_MIX_SLP_2DIR_MASK ||
+ cfa.dir_thr_2dir > CFA_DIR_THR_2DIR_MASK ||
+ cfa.dir_slope_2dir > CFA_DIR_SLP_2DIR_MASK ||
+ cfa.nd_wt_2dir > CFA_ND_WT_2DIR_MASK ||
+ cfa.hue_fract_daa > CFA_DAA_HUE_FRA_MASK ||
+ cfa.edge_thr_daa > CFA_DAA_EDG_THR_MASK ||
+ cfa.thr_min_daa > CFA_DAA_THR_MIN_MASK ||
+ cfa.thr_slope_daa > CFA_DAA_THR_SLP_MASK ||
+ cfa.slope_min_daa > CFA_DAA_SLP_MIN_MASK ||
+ cfa.slope_slope_daa > CFA_DAA_SLP_SLP_MASK ||
+ cfa.lp_wt_daa > CFA_DAA_LP_WT_MASK)
+ return -1;
+#endif
+ return 0;
+}
+static int set_cfa_params(struct device *dev, void *param, int len)
+{
+ struct prev_cfa *cfa_param = (struct prev_cfa *)param;
+
+ dev_dbg(dev, "set_cfa_params");
+ if (ISNULL(cfa_param)) {
+ /* Copy defaults for wb */
+ memcpy((void *)&cfa,
+ (void *)&dm365_cfa_defaults,
+ sizeof(struct prev_cfa));
+ } else {
+ if (len != sizeof(struct prev_cfa)) {
+ dev_err(dev,
+ "set_cfa_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&cfa, cfa_param, sizeof(struct prev_cfa))) {
+ dev_err(dev,
+ "set_cfa_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_cfa_params(dev) < 0)
+ return -EINVAL;
+ }
+
+ /* Now set the values in the hw */
+ return ipipe_set_cfa_regs(&cfa);
+}
+static int get_cfa_params(struct device *dev, void *param, int len)
+{
+ struct prev_cfa *cfa_param = (struct prev_cfa *)param;
+ dev_dbg(dev, "get_cfa_params\n");
+ if (ISNULL(cfa_param)) {
+ dev_err(dev, "get_cfa_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_cfa)) {
+ dev_err(dev,
+ "get_cfa_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user((struct prev_cfa *)cfa_param,
+ &cfa,
+ sizeof(struct prev_cfa))) {
+ dev_err(dev, "get_cfa_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_rgb2rgb_params(struct device *dev, unsigned int id)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ struct prev_rgb2rgb *rgb2rgb = &rgb2rgb_1;
+ u32 offset_upper = RGB2RGB_1_OFST_MASK,
+ gain_int_upper = RGB2RGB_1_GAIN_INT_MASK;
+
+ if (id) {
+ rgb2rgb = &rgb2rgb_2;
+ offset_upper = RGB2RGB_2_OFST_MASK;
+ gain_int_upper = RGB2RGB_2_GAIN_INT_MASK;
+ }
+ if (rgb2rgb->coef_rr.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_rr.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_gr.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_gr.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_br.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_br.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_rg.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_rg.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_gg.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_gg.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_bg.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_bg.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_rb.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_rb.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_gb.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_gb.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->coef_bb.decimal > RGB2RGB_GAIN_DECI_MASK ||
+ rgb2rgb->coef_bb.integer > gain_int_upper)
+ return -1;
+
+ if (rgb2rgb->out_ofst_r > offset_upper ||
+ rgb2rgb->out_ofst_g > offset_upper ||
+ rgb2rgb->out_ofst_b > offset_upper)
+ return -1;
+#endif
+ return 0;
+}
+
+static int set_rgb2rgb_params(struct device *dev, unsigned int id,
+ void *param, int len)
+{
+ struct prev_rgb2rgb *rgb2rgb = &rgb2rgb_1;
+ struct prev_rgb2rgb *rgb2rgb_param = (struct prev_rgb2rgb *)param;
+
+ if (id)
+ rgb2rgb = &rgb2rgb_2;
+ if (ISNULL(rgb2rgb_param)) {
+ /* Copy defaults for rgb2rgb conversion */
+ memcpy((void *)rgb2rgb,
+ (void *)&dm365_rgb2rgb_defaults,
+ sizeof(struct prev_rgb2rgb));
+ } else {
+
+ if (len != sizeof(struct prev_rgb2rgb)) {
+ dev_err(dev,
+ "set_rgb2rgb_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+
+ if (copy_from_user(rgb2rgb,
+ rgb2rgb_param,
+ sizeof(struct prev_rgb2rgb))) {
+ dev_err(dev,
+ "set_rgb2rgb_params: Error in "
+ "copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_rgb2rgb_params(dev, id) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_rgb2rgb_regs(id, rgb2rgb);
+}
+
+static int set_rgb2rgb_1_params(struct device *dev, void *param, int len)
+{
+ return set_rgb2rgb_params(dev, 0, param, len);
+}
+
+static int set_rgb2rgb_2_params(struct device *dev, void *param, int len)
+{
+ return set_rgb2rgb_params(dev, 1, param, len);
+}
+
+static int get_rgb2rgb_params(struct device *dev, unsigned int id,
+ void *param, int len)
+{
+ struct prev_rgb2rgb *rgb2rgb_param = (struct prev_rgb2rgb *)param;
+ struct prev_rgb2rgb *rgb2rgb = &rgb2rgb_1;
+
+ if (ISNULL(rgb2rgb_param)) {
+ dev_err(dev, "get_rgb2rgb_params: invalid user ptr");
+ return -EINVAL;
+ }
+
+ if (len != sizeof(struct prev_rgb2rgb)) {
+ dev_err(dev,
+ "get_rgb2rgb_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+
+ if (id)
+ rgb2rgb = &rgb2rgb_2;
+ if (copy_to_user((struct prev_rgb2rgb *)rgb2rgb_param,
+ rgb2rgb,
+ sizeof(struct prev_rgb2rgb))) {
+ dev_err(dev, "get_rgb2rgb_params: Error in copy to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int get_rgb2rgb_1_params(struct device *dev, void *param, int len)
+{
+ return get_rgb2rgb_params(dev, 0, param, len);
+}
+
+static int get_rgb2rgb_2_params(struct device *dev, void *param, int len)
+{
+ return get_rgb2rgb_params(dev, 1, param, len);
+}
+
+static int validate_gamma_entry(struct ipipe_gamma_entry *table, int size)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int i;
+
+ if (ISNULL(table))
+ return -1;
+ else {
+ for (i = 0; i < size; i++) {
+ if (table[i].slope > GAMMA_MASK ||
+ table[i].offset > GAMMA_MASK)
+ return -1;
+ }
+ }
+#endif
+ return 0;
+}
+
+static int validate_gamma_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int table_size = 0;
+ int err = 0;
+ if (gamma.bypass_r > 1 ||
+ gamma.bypass_b > 1 ||
+ gamma.bypass_g > 1)
+ return -1;
+
+ if (gamma.tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_64)
+ table_size = 64;
+ if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+ if (!gamma.bypass_r) {
+ err = validate_gamma_entry(gamma.table_r, table_size);
+ if (err) {
+ dev_err(dev, "GAMMA R - table entry invalid\n");
+ return err;
+ }
+ }
+ if (!gamma.bypass_b) {
+ err = validate_gamma_entry(gamma.table_b, table_size);
+ if (err) {
+ dev_err(dev, "GAMMA B - table entry invalid\n");
+ return err;
+ }
+ }
+ if (!gamma.bypass_g) {
+ err = validate_gamma_entry(gamma.table_g, table_size);
+ if (err) {
+ dev_err(dev, "GAMMA G - table entry invalid\n");
+ return err;
+ }
+ }
+ }
+#endif
+ return 0;
+}
+static int set_gamma_params(struct device *dev, void *param, int len)
+{
+ int table_size = 0;
+ struct prev_gamma user_gamma;
+ struct prev_gamma *gamma_param = (struct prev_gamma *)param;
+
+ if (ISNULL(gamma_param)) {
+ /* Copy defaults for gamma */
+ gamma.bypass_r = dm365_gamma_defaults.bypass_r;
+ gamma.bypass_g = dm365_gamma_defaults.bypass_g;
+ gamma.bypass_b = dm365_gamma_defaults.bypass_b;
+ gamma.tbl_sel = dm365_gamma_defaults.tbl_sel;
+ gamma.tbl_size = dm365_gamma_defaults.tbl_size;
+ /* By default, we bypass the gamma correction.
+ * So no values by default for tables
+ */
+ } else {
+ if (len != sizeof(struct prev_gamma)) {
+ dev_err(dev,
+ "set_gamma_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_gamma, gamma_param,
+ sizeof(struct prev_gamma))) {
+ dev_err(dev,
+ "set_gamma_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ gamma.bypass_r = user_gamma.bypass_r;
+ gamma.bypass_b = user_gamma.bypass_b;
+ gamma.bypass_g = user_gamma.bypass_g;
+ gamma.tbl_sel = user_gamma.tbl_sel;
+ gamma.tbl_size = user_gamma.tbl_size;
+
+ if (user_gamma.tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_64)
+ table_size = 64;
+ else if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (user_gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+ else {
+ dev_err(dev,
+ "set_gamma_params: Invalid"
+ " table_size\n");
+ return -EINVAL;
+ }
+
+ if (!user_gamma.bypass_r) {
+ if (ISNULL(user_gamma.table_r)) {
+ dev_err(dev,
+ "set_gamma_params: Invalid"
+ " table ptr for R\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(gamma.table_r,
+ user_gamma.table_r,
+ (table_size *
+ sizeof(struct \
+ ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: R-Error"
+ " in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+
+ if (!user_gamma.bypass_b) {
+ if (ISNULL(user_gamma.table_b)) {
+ dev_err(dev,
+ "set_gamma_params: Invalid"
+ " table ptr for B\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(gamma.table_b,
+ user_gamma.table_b,
+ (table_size *
+ sizeof(struct \
+ ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: B-Error"
+ " in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+
+ if (!user_gamma.bypass_g) {
+ if (ISNULL(user_gamma.table_g)) {
+ dev_err(dev,
+ "set_gamma_params: Invalid"
+ " table ptr for G\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(gamma.table_g,
+ user_gamma.table_g,
+ (table_size *
+ sizeof(struct \
+ ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: G-Error "
+ "in copy to kernel\n");
+ return -EFAULT;
+ }
+ }
+ }
+
+ if (validate_gamma_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_gamma_regs(&gamma);
+}
+static int get_gamma_params(struct device *dev, void *param, int len)
+{
+ int table_size = 0;
+ struct prev_gamma user_gamma;
+ struct prev_gamma *gamma_param = (struct prev_gamma *)param;
+
+ if (ISNULL(gamma_param)) {
+ dev_err(dev, "get_gamma_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_gamma)) {
+ dev_err(dev,
+ "get_gamma_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_gamma,
+ gamma_param,
+ sizeof(struct prev_gamma))) {
+ dev_err(dev, "get_gamma_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+
+ user_gamma.bypass_r = gamma.bypass_r;
+ user_gamma.bypass_g = gamma.bypass_g;
+ user_gamma.bypass_b = gamma.bypass_b;
+ user_gamma.tbl_sel = gamma.tbl_sel;
+ user_gamma.tbl_size = gamma.tbl_size;
+ if (gamma.tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (gamma.tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+
+ if ((!gamma.bypass_r) && ((ISNULL(user_gamma.table_r)))) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty for R\n");
+ return -EINVAL;
+ } else {
+ if (copy_to_user(user_gamma.table_r,
+ gamma.table_r,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: R-Table Error in"
+ " copy to user\n");
+ return -EFAULT;
+ }
+ }
+
+ if ((!gamma.bypass_b) && ((ISNULL(user_gamma.table_b)))) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty for B\n");
+ return -EINVAL;
+ } else {
+ if (copy_to_user(user_gamma.table_b,
+ gamma.table_b,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: B-Table Error in"
+ " copy to user\n");
+ return -EFAULT;
+ }
+ }
+
+ if ((!gamma.bypass_g) && ((ISNULL(user_gamma.table_g)))) {
+ dev_err(dev,
+ "get_gamma_params: table ptr empty for G\n");
+ return -EINVAL;
+ } else {
+ if (copy_from_user(gamma.table_g,
+ user_gamma.table_g,
+ (table_size *
+ sizeof(struct ipipe_gamma_entry)))) {
+ dev_err(dev,
+ "set_gamma_params: G-Table"
+ "copy error\n");
+ return -EFAULT;
+ }
+ }
+
+ }
+ if (copy_to_user(gamma_param, &user_gamma, sizeof(struct prev_gamma))) {
+ dev_err(dev, "get_dfc_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_3d_lut_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int i;
+ if (lut_3d.en > 1)
+ return -1;
+ if (lut_3d.en) {
+ for (i = 0; i < MAX_SIZE_3D_LUT; i++) {
+ if (lut_3d.table[i].r > D3_LUT_ENTRY_MASK ||
+ lut_3d.table[i].g > D3_LUT_ENTRY_MASK ||
+ lut_3d.table[i].b > D3_LUT_ENTRY_MASK)
+ return -1;
+ }
+ }
+#endif
+ return 0;
+}
+static int set_3d_lut_params(struct device *dev, void *param, int len)
+{
+ struct prev_3d_lut user_3d_lut;
+ struct prev_3d_lut *lut_param = (struct prev_3d_lut *)param;
+
+ if (ISNULL(lut_param)) {
+ /* Copy defaults for gamma */
+ lut_3d.en = dm365_3d_lut_defaults.en;
+ /* By default, 3D lut is disabled
+ */
+ } else {
+ if (len != sizeof(struct prev_3d_lut)) {
+ dev_err(dev,
+ "set_3d_lut_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_3d_lut,
+ lut_param,
+ sizeof(struct prev_3d_lut))) {
+ dev_err(dev,
+ "set_3d_lut_params: Error in copy to"
+ " kernel\n");
+ return -EFAULT;
+ }
+ lut_3d.en = user_3d_lut.en;
+ if (ISNULL(user_3d_lut.table)) {
+ dev_err(dev, "set_3d_lut_params:" " Invalid table ptr");
+ return -EINVAL;
+ }
+ if (copy_from_user(lut_3d.table,
+ user_3d_lut.table,
+ (MAX_SIZE_3D_LUT *
+ sizeof(struct ipipe_3d_lut_entry)))) {
+ dev_err(dev,
+ "set_3d_lut_params:Error"
+ " in copy to kernel\n");
+ return -EFAULT;
+ }
+
+ if (validate_3d_lut_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_3d_lut_regs(&lut_3d);
+}
+static int get_3d_lut_params(struct device *dev, void *param, int len)
+{
+ struct prev_3d_lut user_3d_lut;
+ struct prev_3d_lut *lut_param = (struct prev_3d_lut *)param;
+
+ if (ISNULL(lut_param)) {
+ dev_err(dev, "get_3d_lut_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_3d_lut)) {
+ dev_err(dev,
+ "get_3d_lut_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_3d_lut,
+ lut_param,
+ sizeof(struct prev_3d_lut))) {
+ dev_err(dev, "get_3d_lut_params: Error in copy to" " kernel\n");
+ return -EFAULT;
+ }
+
+ user_3d_lut.en = lut_3d.en;
+ if (ISNULL(user_3d_lut.table)) {
+ dev_err(dev, "get_3d_lut_params:" " Invalid table ptr");
+ return -EINVAL;
+ }
+ if (copy_to_user(user_3d_lut.table, lut_3d.table,
+ (MAX_SIZE_3D_LUT *
+ sizeof(struct ipipe_3d_lut_entry)))) {
+ dev_err(dev,
+ "get_3d_lut_params:Table Error in" " copy to user\n");
+ return -EFAULT;
+ }
+
+ if (copy_to_user(lut_param, &user_3d_lut, sizeof(struct prev_3d_lut))) {
+ dev_err(dev, "get_3d_lut_params: Error in copy" " to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_lum_adj_params(struct device *dev)
+{
+ /* nothing to validate */
+ return 0;
+}
+
+static int set_lum_adj_params(struct device *dev, void *param, int len)
+{
+ struct prev_lum_adj *lum_adj_param = (struct prev_lum_adj *)param;
+
+ if (ISNULL(lum_adj_param)) {
+ /* Copy defaults for Luminance adjustments */
+ memcpy((void *)&lum_adj,
+ (void *)&dm365_lum_adj_defaults,
+ sizeof(struct prev_lum_adj));
+ } else {
+ if (len != sizeof(struct prev_lum_adj)) {
+ dev_err(dev,
+ "set_lum_adj_params: param struct length"
+ " mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&lum_adj,
+ lum_adj_param,
+ sizeof(struct prev_lum_adj))) {
+ dev_err(dev,
+ "set_lum_adj_params: Error in copy"
+ " from user\n");
+ return -EFAULT;
+ }
+ if (validate_lum_adj_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_lum_adj_regs(&lum_adj);
+}
+
+static int get_lum_adj_params(struct device *dev, void *param, int len)
+{
+ struct prev_lum_adj *lum_adj_param = (struct prev_lum_adj *)param;
+ if (ISNULL(lum_adj_param)) {
+ dev_err(dev, "get_lum_adj_params: invalid user ptr");
+ return -EINVAL;
+ }
+
+ if (len != sizeof(struct prev_lum_adj)) {
+ dev_err(dev,
+ "get_lum_adj_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+
+ if (copy_to_user(lum_adj_param,
+ &lum_adj,
+ sizeof(struct prev_lum_adj))) {
+ dev_err(dev, "get_lum_adj_params: Error in copy to" " user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_rgb2yuv_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (rgb2yuv.coef_ry.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_ry.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_gy.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_gy.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_by.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_by.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_rcb.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_rcb.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_gcb.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_gcb.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_bcb.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_bcb.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_rcr.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_rcr.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_gcr.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_gcr.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.coef_bcr.decimal > RGB2YCBCR_COEF_DECI_MASK ||
+ rgb2yuv.coef_bcr.integer > RGB2YCBCR_COEF_INT_MASK)
+ return -1;
+
+ if (rgb2yuv.out_ofst_y > RGB2YCBCR_OFST_MASK ||
+ rgb2yuv.out_ofst_cb > RGB2YCBCR_OFST_MASK ||
+ rgb2yuv.out_ofst_cr > RGB2YCBCR_OFST_MASK)
+ return -1;
+#endif
+ return 0;
+}
+static int set_rgb2yuv_params(struct device *dev, void *param, int len)
+{
+ struct prev_rgb2yuv *rgb2yuv_param = (struct prev_rgb2yuv *)param;
+
+ if (ISNULL(rgb2yuv_param)) {
+ /* Copy defaults for rgb2yuv conversion */
+ memcpy((void *)&rgb2yuv,
+ (void *)&dm365_rgb2yuv_defaults,
+ sizeof(struct prev_rgb2yuv));
+ } else {
+ if (len != sizeof(struct prev_rgb2yuv)) {
+ dev_err(dev,
+ "set_rgb2yuv_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&rgb2yuv,
+ rgb2yuv_param,
+ sizeof(struct prev_rgb2yuv))) {
+ dev_err(dev,
+ "set_rgb2yuv_params: Error in copy from"
+ " user\n");
+ return -EFAULT;
+ }
+ if (validate_rgb2yuv_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_rgb2ycbcr_regs(&rgb2yuv);
+}
+static int get_rgb2yuv_params(struct device *dev, void *param, int len)
+{
+ struct prev_rgb2yuv *rgb2yuv_param = (struct prev_rgb2yuv *)param;
+ if (ISNULL(rgb2yuv_param)) {
+ dev_err(dev, "get_rgb2yuv_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_rgb2yuv)) {
+ dev_err(dev,
+ "get_rgb2yuv_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user((struct prev_rgb2yuv *)rgb2yuv_param,
+ &rgb2yuv,
+ sizeof(struct prev_rgb2yuv))) {
+ dev_err(dev, "get_rgb2yuv_params: Error in copy from"
+ " kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_gbce_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int i;
+ u32 max = GBCE_Y_VAL_MASK;
+ if (gbce.type == IPIPE_GBCE_GAIN_TBL)
+ max = GBCE_GAIN_VAL_MASK;
+ if (gbce.en > 1)
+ return -1;
+ if (gbce.en) {
+ for (i = 0; i < MAX_SIZE_GBCE_LUT; i++)
+ if (gbce.table[i] > max)
+ return -1;
+ }
+#endif
+ return 0;
+}
+static int set_gbce_params(struct device *dev, void *param, int len)
+{
+ struct prev_gbce user_gbce;
+ struct prev_gbce *gbce_param = (struct prev_gbce *)param;
+
+ if (ISNULL(gbce_param))
+ /* Copy defaults for gamma */
+ gbce.en = dm365_gbce_defaults.en;
+ /* By default, GBCE is disabled
+ */
+ else {
+ if (len != sizeof(struct prev_gbce)) {
+ dev_err(dev,
+ "set_gbce_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_gbce,
+ gbce_param,
+ sizeof(struct prev_gbce))) {
+ dev_err(dev,
+ "set_gbce_params: Error in copy to"
+ " kernel\n");
+ return -EFAULT;
+ }
+ gbce.en = user_gbce.en;
+ gbce.type = user_gbce.type;
+ if (ISNULL(user_gbce.table)) {
+ dev_err(dev, "set_gbce_params:" " Invalid table ptr");
+ return -EINVAL;
+ }
+
+ if (copy_from_user(gbce.table,
+ user_gbce.table,
+ (MAX_SIZE_GBCE_LUT *
+ sizeof(unsigned short)))) {
+ dev_err(dev,
+ "set_gbce_params:Error" " in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (validate_gbce_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_gbce_regs(&gbce);
+}
+static int get_gbce_params(struct device *dev, void *param, int len)
+{
+ struct prev_gbce user_gbce;
+ struct prev_gbce *gbce_param = (struct prev_gbce *)param;
+
+ if (ISNULL(gbce_param)) {
+ dev_err(dev, "get_gbce_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_gbce)) {
+ dev_err(dev,
+ "get_gbce_params: param struct length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_gbce, gbce_param, sizeof(struct prev_gbce))) {
+ dev_err(dev, "get_gbce_params: Error in copy to" " kernel\n");
+ return -EFAULT;
+ }
+
+ user_gbce.en = gbce.en;
+ user_gbce.type = gbce.type;
+ if (ISNULL(user_gbce.table)) {
+ dev_err(dev, "get_gbce_params:" " Invalid table ptr");
+ return -EINVAL;
+ }
+ if (copy_to_user(user_gbce.table,
+ gbce.table,
+ (MAX_SIZE_GBCE_LUT *
+ sizeof(unsigned short)))) {
+ dev_err(dev,
+ "get_gbce_params:Table Error in" " copy to user\n");
+ return -EFAULT;
+ }
+
+ if (copy_to_user(gbce_param, &user_gbce, sizeof(struct prev_gbce))) {
+ dev_err(dev, "get_gbce_params: Error in copy" " to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_yuv422_conv_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (yuv422_conv.en_chrom_lpf > 1)
+ return -1;
+#endif
+ return 0;
+}
+
+static int set_yuv422_conv_params(struct device *dev, void *param, int len)
+{
+ struct prev_yuv422_conv *yuv422_conv_param =
+ (struct prev_yuv422_conv *)param;
+ if (ISNULL(yuv422_conv_param)) {
+ /* Copy defaults for yuv 422 conversion */
+ memcpy((void *)&yuv422_conv,
+ (void *)&dm365_yuv422_conv_defaults,
+ sizeof(struct prev_yuv422_conv));
+ } else {
+ if (len != sizeof(struct prev_yuv422_conv)) {
+ dev_err(dev,
+ "set_yuv422_conv_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&yuv422_conv,
+ yuv422_conv_param,
+ sizeof(struct prev_yuv422_conv))) {
+ dev_err(dev,
+ "set_yuv422_conv_params: Error in copy"
+ " from user\n");
+ return -EFAULT;
+ }
+ if (validate_yuv422_conv_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_yuv422_conv_regs(&yuv422_conv);
+}
+static int get_yuv422_conv_params(struct device *dev, void *param, int len)
+{
+ struct prev_yuv422_conv *yuv422_conv_param =
+ (struct prev_yuv422_conv *)param;
+
+ if (ISNULL(yuv422_conv_param)) {
+ dev_err(dev, "get_yuv422_conv_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_yuv422_conv)) {
+ dev_err(dev,
+ "get_yuv422_conv_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(yuv422_conv_param,
+ &yuv422_conv,
+ sizeof(struct prev_yuv422_conv))) {
+ dev_err(dev,
+ "get_yuv422_conv_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_yee_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ int i;
+ if (yee.en > 1 ||
+ yee.en_halo_red > 1 ||
+ yee.hpf_shft > YEE_HPF_SHIFT_MASK)
+ return -1;
+
+ if (yee.hpf_coef_00 > YEE_COEF_MASK ||
+ yee.hpf_coef_01 > YEE_COEF_MASK ||
+ yee.hpf_coef_02 > YEE_COEF_MASK ||
+ yee.hpf_coef_10 > YEE_COEF_MASK ||
+ yee.hpf_coef_11 > YEE_COEF_MASK ||
+ yee.hpf_coef_12 > YEE_COEF_MASK ||
+ yee.hpf_coef_20 > YEE_COEF_MASK ||
+ yee.hpf_coef_21 > YEE_COEF_MASK ||
+ yee.hpf_coef_22 > YEE_COEF_MASK)
+ return -1;
+
+ if (yee.yee_thr > YEE_THR_MASK ||
+ yee.es_gain > YEE_ES_GAIN_MASK ||
+ yee.es_thr1 > YEE_ES_THR1_MASK ||
+ yee.es_thr2 > YEE_THR_MASK ||
+ yee.es_gain_grad > YEE_THR_MASK ||
+ yee.es_ofst_grad > YEE_THR_MASK)
+ return -1;
+
+ for (i = 0; i < MAX_SIZE_YEE_LUT ; i++)
+ if (yee.table[i] > YEE_ENTRY_MASK)
+ return -1;
+#endif
+ return 0;
+}
+static int set_yee_params(struct device *dev, void *param, int len)
+{
+ short *temp_table;
+ struct prev_yee user_yee;
+ struct prev_yee *yee_param = (struct prev_yee *)param;
+
+ if (ISNULL(yee_param)) {
+ temp_table = yee.table;
+ /* Copy defaults for ns */
+ memcpy((void *)&yee,
+ (void *)&dm365_yee_defaults,
+ sizeof(struct prev_yee));
+ yee.table = temp_table;
+ } else {
+ if (len != sizeof(struct prev_yee)) {
+ dev_err(dev,
+ "set_yee_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_yee,
+ yee_param,
+ sizeof(struct prev_yee))) {
+ dev_err(dev,
+ "set_yee_params: Error in copy from user\n");
+ return -EFAULT;
+ }
+ if (ISNULL(user_yee.table)) {
+ dev_err(dev, "get_yee_params: yee table ptr null\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(yee.table,
+ user_yee.table,
+ (MAX_SIZE_YEE_LUT * sizeof(short)))) {
+ dev_err(dev,
+ "set_yee_params: Error in copy from user\n");
+ return -EFAULT;
+ }
+ temp_table = yee.table;
+ memcpy(&yee, &user_yee, sizeof(struct prev_yee));
+ yee.table = temp_table;
+ if (validate_yee_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_ee_regs(&yee);
+}
+static int get_yee_params(struct device *dev, void *param, int len)
+{
+ short *temp_table;
+ struct prev_yee *yee_param = (struct prev_yee *)param;
+ struct prev_yee user_yee;
+
+ if (ISNULL(yee_param)) {
+ dev_err(dev, "get_yee_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_yee)) {
+ dev_err(dev,
+ "get_yee_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&user_yee, yee_param, sizeof(struct prev_yee))) {
+ dev_err(dev, "get_yee_params: Error in copy to kernel\n");
+ return -EFAULT;
+ }
+ if (ISNULL(user_yee.table)) {
+ dev_err(dev, "get_yee_params: yee table ptr null\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(user_yee.table, yee.table,
+ (MAX_SIZE_YEE_LUT * sizeof(short)))) {
+ dev_err(dev, "get_yee_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ temp_table = user_yee.table;
+ memcpy(&user_yee, &yee, sizeof(struct prev_yee));
+ user_yee.table = temp_table;
+
+ if (copy_to_user(yee_param, &user_yee, sizeof(struct prev_yee))) {
+ dev_err(dev, "get_yee_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_car_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (car.en > 1 ||
+ car.hpf_shft > CAR_HPF_SHIFT_MASK ||
+ car.gain1.shft > CAR_GAIN1_SHFT_MASK ||
+ car.gain1.gain_min > CAR_GAIN_MIN_MASK ||
+ car.gain2.shft > CAR_GAIN2_SHFT_MASK ||
+ car.gain2.gain_min > CAR_GAIN_MIN_MASK)
+ return -1;
+#endif
+ return 0;
+}
+
+static int set_car_params(struct device *dev, void *param, int len)
+{
+ struct prev_car *car_param = (struct prev_car *)param;
+
+ if (ISNULL(car_param)) {
+ /* Copy defaults for ns */
+ memcpy((void *)&car,
+ (void *)&dm365_car_defaults,
+ sizeof(struct prev_car));
+ } else {
+ if (len != sizeof(struct prev_car)) {
+ dev_err(dev,
+ "set_car_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&car, car_param, sizeof(struct prev_car))) {
+ dev_err(dev,
+ "set_car_params: Error in copy from user\n");
+ return -EFAULT;
+ }
+ if (validate_car_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_car_regs(&car);
+}
+static int get_car_params(struct device *dev, void *param, int len)
+{
+ struct prev_car *car_param = (struct prev_car *)param;
+
+ if (ISNULL(car_param)) {
+ dev_err(dev, "get_car_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_car)) {
+ dev_err(dev,
+ "get_car_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(car_param, &car, sizeof(struct prev_car))) {
+ dev_err(dev, "get_car_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static int validate_cgs_params(struct device *dev)
+{
+#ifdef CONFIG_IPIPE_PARAM_VALIDATION
+ if (cgs.en > 1 ||
+ cgs.h_shft > CAR_SHIFT_MASK)
+ return -1;
+#endif
+ return 0;
+}
+
+static int set_cgs_params(struct device *dev, void *param, int len)
+{
+ struct prev_cgs *cgs_param = (struct prev_cgs *)param;
+
+ if (ISNULL(cgs_param)) {
+ /* Copy defaults for ns */
+ memcpy((void *)&cgs,
+ (void *)&dm365_cgs_defaults,
+ sizeof(struct prev_cgs));
+ } else {
+ if (len != sizeof(struct prev_cgs)) {
+ dev_err(dev,
+ "set_cgs_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_from_user(&cgs, cgs_param, sizeof(struct prev_cgs))) {
+ dev_err(dev,
+ "set_cgs_params: Error in copy from user\n");
+ return -EFAULT;
+ }
+ if (validate_cgs_params(dev) < 0)
+ return -EINVAL;
+ }
+ return ipipe_set_cgs_regs(&cgs);
+}
+static int get_cgs_params(struct device *dev, void *param, int len)
+{
+ struct prev_cgs *cgs_param = (struct prev_cgs *)param;
+
+ if (ISNULL(cgs_param)) {
+ dev_err(dev, "get_cgs_params: invalid user ptr");
+ return -EINVAL;
+ }
+ if (len != sizeof(struct prev_cgs)) {
+ dev_err(dev,
+ "get_cgs_params: param struct"
+ " length mismatch\n");
+ return -EINVAL;
+ }
+ if (copy_to_user(cgs_param, &cgs, sizeof(struct prev_cgs))) {
+ dev_err(dev, "get_cgs_params: Error in copy from kernel\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+static struct prev_module_if *prev_enum_preview_cap(struct device *dev,
+ int index)
+{
+ dev_dbg(dev, "prev_enum_preview_cap: index = %d\n", index);
+ if ((index + 1) > PREV_MAX_MODULES)
+ return NULL;
+
+ return &prev_modules[index];
+}
+
+static unsigned int prev_get_oper_mode(void)
+{
+ return oper_mode;
+}
+
+static unsigned int ipipe_get_oper_state(void)
+{
+ return oper_state.state;
+}
+
+static void ipipe_set_oper_state(unsigned int state)
+{
+ mutex_lock(&oper_state.lock);
+ oper_state.state = state;
+ mutex_unlock(&oper_state.lock);
+}
+
+static unsigned int ipipe_get_prev_config_state(void)
+{
+#ifndef CONFIG_VIDEO_YCBCR
+ set_rgb2rgb_params(0, 0, 0, 0);
+ set_rgb2rgb_params(0, 1, 0, 0);
+#endif
+ return oper_state.prev_config_state;
+}
+
+static unsigned int ipipe_get_rsz_config_state(void)
+{
+ return oper_state.rsz_config_state;
+}
+
+/* function: calculate_normal_f_div_param
+ * Algorithm to calculate the frame division parameters for resizer.
+ * in normal mode. Please refer the application note in DM360 functional
+ * spec for details of the algorithm
+ */
+static int calculate_normal_f_div_param(struct device *dev,
+ int input_width,
+ int output_width,
+ struct ipipe_rsz_rescale_param *param)
+{
+ /* rsz = R, input_width = H, output width = h in the equation */
+ unsigned int rsz, temp, temp1, o, h1, h2;
+ if (output_width > input_width) {
+ dev_err(dev, "frame div mode is used for scale down only\n");
+ return -1;
+ }
+
+ rsz = (input_width << 8) / output_width;
+ temp = rsz << 1;
+ temp1 = ((input_width << 8) / temp) + 1;
+ o = 14;
+ if (!(temp1 % 2)) {
+ h1 = temp1;
+ } else {
+ temp1 = (input_width << 7);
+ temp1 -= (rsz >> 1);
+ temp1 /= (rsz << 1);
+ temp1 <<= 1;
+ temp1 += 2;
+ o += ((CEIL(rsz, 1024)) << 1);
+ h1 = temp1;
+ }
+ h2 = output_width - h1;
+ /* phi */
+ temp = (h1 * rsz) - (((input_width >> 1) - o) << 8);
+ /* skip */
+ temp1 = ((temp - 1024) >> 9) << 1;
+ param->f_div.num_passes = IPIPE_MAX_PASSES;
+ param->f_div.pass[0].o_hsz = h1 - 1;
+ param->f_div.pass[0].i_hps = 0;
+ param->f_div.pass[0].h_phs = 0;
+ param->f_div.pass[0].src_hps = 0;
+ param->f_div.pass[0].src_hsz = (input_width >> 2) + o;
+ param->f_div.pass[1].o_hsz = h2 - 1;
+ param->f_div.pass[1].i_hps = temp1;
+ param->f_div.pass[1].h_phs = (temp - (temp1 << 8));
+ param->f_div.pass[1].src_hps = (input_width >> 2) - o;
+ param->f_div.pass[1].src_hsz = (input_width >> 2) + o;
+ return 0;
+}
+
+/* function: calculate_down_scale_f_div_param
+ * Algorithm to calculate the frame division parameters for resizer in
+ * downscale mode. Please refer the application note in DM360 functional
+ * spec for details of the algorithm
+ */
+static int calculate_down_scale_f_div_param(struct device *dev,
+ int input_width,
+ int output_width,
+ struct ipipe_rsz_rescale_param
+ *param)
+{
+ /* rsz = R, input_width = H, output width = h in the equation */
+ unsigned int upper_h1, upper_h2, rsz, temp, temp1, o, h1, h2, two_power,
+ n;
+
+ upper_h1 = input_width >> 1;
+ n = param->h_dscale_ave_sz;
+ /* 2 ^ (scale+1) */
+ two_power = (1 << (n + 1));
+ upper_h1 = (upper_h1 >> (n + 1)) << (n + 1);
+ upper_h2 = input_width - upper_h1;
+ if (upper_h2 % two_power) {
+ dev_err(dev, "frame halves to be a multiple of 2 power n+1 \n");
+ return -1;
+ }
+ two_power = (1 << n);
+ rsz = (input_width << 8) / output_width;
+ temp = rsz * two_power;
+ temp1 = ((upper_h1 << 8) / temp) + 1;
+ if (!(temp1 % 2))
+ h1 = temp1;
+ else {
+ temp1 = (upper_h1 << 8);
+ temp1 >>= (n + 1);
+ temp1 -= (rsz >> 1);
+ temp1 /= (rsz << 1);
+ temp1 <<= 1;
+ temp1 += 2;
+ h1 = temp1;
+ }
+ o = 10 + (two_power << 2);
+ if (((input_width << 7) / rsz) % 2)
+ o += (((CEIL(rsz, 1024)) << 1) << n);
+ h2 = output_width - h1;
+ /* phi */
+ temp = (h1 * rsz) - (((upper_h1 - (o - 10)) / two_power) << 8);
+ /* skip */
+ temp1 = ((temp - 1024) >> 9) << 1;
+ param->f_div.num_passes = IPIPE_MAX_PASSES;
+ param->f_div.pass[0].o_hsz = h1 - 1;
+ param->f_div.pass[0].i_hps = 0;
+ param->f_div.pass[0].h_phs = 0;
+ param->f_div.pass[0].src_hps = 0;
+ param->f_div.pass[0].src_hsz = upper_h1 + o;
+ param->f_div.pass[1].o_hsz = h2 - 1;
+ param->f_div.pass[1].i_hps = 10 + (temp1 * two_power);
+ param->f_div.pass[1].h_phs = (temp - (temp1 << 8));
+ param->f_div.pass[1].src_hps = (upper_h1 - o);
+ param->f_div.pass[1].src_hsz = (upper_h2 + o);
+ return 0;
+}
+
+/* update the parameter in param for a given input and output width */
+static int update_preview_f_div_params(struct device *dev,
+ int input_width,
+ int output_width,
+ struct ipipe_rsz_rescale_param *param)
+{
+ unsigned int temp;
+
+ temp = input_width >> 1;
+ if (temp < 8) {
+ dev_err(dev, "input width must me atleast 16 pixels\n");
+ return -1;
+ }
+ param->f_div.en = 1;
+ param->f_div.num_passes = IPIPE_MAX_PASSES;
+ param->f_div.pass[0].o_hsz = temp;
+ param->f_div.pass[0].i_hps = 0;
+ param->f_div.pass[0].h_phs = 0;
+ param->f_div.pass[0].src_hps = 0;
+ param->f_div.pass[0].src_hsz = temp + 10;
+ param->f_div.pass[1].o_hsz = temp;
+ param->f_div.pass[1].i_hps = 0;
+ param->f_div.pass[1].h_phs = 0;
+ param->f_div.pass[1].src_hps = temp - 8;
+ param->f_div.pass[1].src_hsz = temp + 10;
+ return 0;
+}
+
+/* Use shared to allocate exclusive blocks as required
+ * by resize applications in single shot mode
+ */
+static void *ipipe_alloc_config_block(struct device *dev, int shared)
+{
+
+ struct ipipe_params *config_block;
+ if (shared) {
+ /* return common data block */
+ mutex_lock(&oper_state.lock);
+ if (oper_state.resource_in_use) {
+ dev_err(dev, "Shared resource in use\n");
+ mutex_unlock(&oper_state.lock);
+ return NULL;
+ }
+ mutex_unlock(&oper_state.lock);
+ return oper_state.shared_config_param;
+ } else {
+ config_block = kmalloc(sizeof(struct ipipe_params), GFP_KERNEL);
+ if (ISNULL(config_block)) {
+ dev_err(dev,
+ "imp_alloc_config_block: failed"
+ " to allocate memory\n");
+ }
+ }
+ return config_block;
+}
+
+/* Used to free only non-shared config block allocated through
+ * imp_alloc_config_block
+ */
+static void ipipe_dealloc_config_block(struct device *dev, void *config_block)
+{
+ if (config_block) {
+ if (config_block != oper_state.shared_config_param)
+ kfree(config_block);
+ else
+ dev_err(dev, "Trying to free shared config block\n");
+ }
+}
+
+static void ipipe_dealloc_user_config_block(struct device *dev,
+ void *config_block)
+{
+ kfree(config_block);
+}
+
+static void *ipipe_alloc_user_config_block(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, int *len)
+{
+ void *config = NULL;
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ if (chan_type == IMP_PREVIEWER) {
+ config =
+ kmalloc(sizeof(struct prev_single_shot_config),
+ GFP_KERNEL);
+ *len = sizeof(struct prev_single_shot_config);
+ } else if (chan_type == IMP_RESIZER) {
+ config =
+ kmalloc(sizeof(struct rsz_single_shot_config),
+ GFP_KERNEL);
+ *len = sizeof(struct rsz_single_shot_config);
+ }
+
+ } else {
+ if (chan_type == IMP_PREVIEWER) {
+ config =
+ kmalloc(sizeof(struct prev_continuous_config),
+ GFP_KERNEL);
+ *len = sizeof(struct prev_continuous_config);
+ } else if (chan_type == IMP_RESIZER) {
+ config =
+ kmalloc(sizeof(struct rsz_continuous_config),
+ GFP_KERNEL);
+ *len = sizeof(struct rsz_continuous_config);
+ }
+ }
+ return config;
+}
+
+static void ipipe_set_user_config_defaults(struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, void *config)
+{
+ dev_dbg(dev, "ipipe_set_user_config_defaults\n");
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ if (chan_type == IMP_PREVIEWER) {
+ dev_dbg(dev, "SS-Preview\n");
+ /* preview channel in single shot mode */
+ memcpy(config,
+ (void *)&dm365_prev_ss_config_defs,
+ sizeof(struct prev_single_shot_config));
+ } else {
+ dev_dbg(dev, "SS-Resize\n");
+ /* resizer channel in single shot mode */
+ memcpy(config,
+ (void *)&dm365_rsz_ss_config_defs,
+ sizeof(struct rsz_single_shot_config));
+ }
+ } else if (oper_mode == IMP_MODE_CONTINUOUS) {
+ /* Continuous mode */
+ if (chan_type == IMP_PREVIEWER) {
+ dev_dbg(dev, "Cont Preview\n");
+ /* previewer defaults */
+ memcpy(config,
+ (void *)&dm365_prev_cont_config_defs,
+ sizeof(struct prev_continuous_config));
+ } else {
+ dev_dbg(dev, "Cont resize\n");
+ /* resizer defaults */
+ memcpy(config,
+ (void *)&dm365_rsz_cont_config_defs,
+ sizeof(struct rsz_continuous_config));
+ }
+ } else
+ dev_err(dev, "Incorrect mode used\n");
+}
+
+/* function :calculate_sdram_offsets()
+ * This function calculates the offsets from start of buffer for the C
+ * plane when output format is YUV420SP. It also calculates the offsets
+ * from the start of the buffer when the image is flipped vertically
+ * or horizontally for ycbcr/y/c planes
+ */
+static int calculate_sdram_offsets(struct ipipe_params *param, int index)
+{
+ int image_height, image_width, offset = 0, yuv_420 = 0,
+ bytesperline = 2;
+
+ if (!param->rsz_en[index])
+ return -1;
+
+ image_height = param->rsz_rsc_param[index].o_vsz + 1;
+ image_width = param->rsz_rsc_param[index].o_hsz + 1;
+ param->ext_mem_param[index].c_offset = 0;
+ param->ext_mem_param[index].flip_ofst_y = 0;
+ param->ext_mem_param[index].flip_ofst_c = 0;
+ if ((param->ipipe_dpaths_fmt != IPIPE_RAW2RAW) &&
+ (param->ipipe_dpaths_fmt != IPIPE_RAW2BOX)) {
+ if ((param->rsz_rsc_param[index].cen) &&
+ (param->rsz_rsc_param[index].yen)) {
+ /* YUV 420 */
+ yuv_420 = 1;
+ bytesperline = 1;
+ }
+ }
+ if (param->rsz_rsc_param[index].h_flip)
+ /* width * bytesperline - 1 */
+ offset = (image_width * bytesperline) - 1;
+ if (param->rsz_rsc_param[index].v_flip)
+ offset += ((image_height - 1) *
+ param->ext_mem_param[index].
+ rsz_sdr_oft_y);
+ param->ext_mem_param[index].flip_ofst_y = offset;
+ if (yuv_420) {
+ offset = 0;
+ /* half height for c-plane */
+ if (param->rsz_rsc_param[index].h_flip)
+ /* width * bytesperline - 1 */
+ offset = image_width - 1;
+ if (param->rsz_rsc_param[index].v_flip)
+ offset +=
+ (((image_height >> 1) - 1) *
+ param->ext_mem_param[index].
+ rsz_sdr_oft_c);
+ param->ext_mem_param[index].flip_ofst_c =
+ offset;
+ param->ext_mem_param[index].c_offset =
+ param->ext_mem_param[index].
+ rsz_sdr_oft_y * image_height;
+ }
+ return 0;
+}
+
+static void enable_422_420_conversion(struct ipipe_params *param,
+ int index, enum enable_disable_t en)
+{
+ /* Enable 422 to 420 conversion */
+ param->rsz_rsc_param[index].cen = en;
+ param->rsz_rsc_param[index].yen = en;
+}
+
+static int configure_resizer_out_params(struct ipipe_params *param,
+ int index,
+ void *output_spec,
+ unsigned char partial, unsigned flag)
+{
+ if (partial) {
+ struct rsz_part_output_spec *partial_output =
+ (struct rsz_part_output_spec *)output_spec;
+ if (partial_output->enable) {
+ param->rsz_en[index] = ENABLE;
+ param->rsz_rsc_param[index].h_flip =
+ partial_output->h_flip;
+ param->rsz_rsc_param[index].v_flip =
+ partial_output->v_flip;
+ param->rsz_rsc_param[index].v_typ_y =
+ partial_output->v_typ_y;
+ param->rsz_rsc_param[index].v_typ_c =
+ partial_output->v_typ_c;
+ param->rsz_rsc_param[index].v_lpf_int_y =
+ partial_output->v_lpf_int_y;
+ param->rsz_rsc_param[index].v_lpf_int_c =
+ partial_output->v_lpf_int_c;
+ param->rsz_rsc_param[index].h_typ_y =
+ partial_output->h_typ_y;
+ param->rsz_rsc_param[index].h_typ_c =
+ partial_output->h_typ_c;
+ param->rsz_rsc_param[index].h_lpf_int_y =
+ partial_output->h_lpf_int_y;
+ param->rsz_rsc_param[index].h_lpf_int_c =
+ partial_output->h_lpf_int_c;
+ param->rsz_rsc_param[index].dscale_en =
+ partial_output->en_down_scale;
+ param->rsz_rsc_param[index].h_dscale_ave_sz =
+ partial_output->h_dscale_ave_sz;
+ param->rsz_rsc_param[index].v_dscale_ave_sz =
+ partial_output->v_dscale_ave_sz;
+ param->ext_mem_param[index].user_y_ofst =
+ (partial_output->user_y_ofst + 31) & ~0x1F;
+ param->ext_mem_param[index].user_c_ofst =
+ (partial_output->user_c_ofst + 31) & ~0x1F;
+
+ } else
+ param->rsz_en[index] = DISABLE;
+
+ } else {
+ struct rsz_output_spec *output =
+ (struct rsz_output_spec *)output_spec;
+ if (output->enable) {
+ param->rsz_en[index] = ENABLE;
+ param->rsz_rsc_param[index].o_vsz = output->height - 1;
+ param->rsz_rsc_param[index].o_hsz = output->width - 1;
+ param->ext_mem_param[index].rsz_sdr_ptr_s_y =
+ output->vst_y;
+ param->ext_mem_param[index].rsz_sdr_ptr_e_y =
+ output->height;
+ param->ext_mem_param[index].rsz_sdr_ptr_s_c =
+ output->vst_c;
+ param->ext_mem_param[index].rsz_sdr_ptr_e_c =
+ output->height;
+
+ if (flag) {
+ /* update common parameters */
+ param->rsz_rsc_param[index].h_flip =
+ output->h_flip;
+ param->rsz_rsc_param[index].v_flip =
+ output->v_flip;
+ param->rsz_rsc_param[index].v_typ_y =
+ output->v_typ_y;
+ param->rsz_rsc_param[index].v_typ_c =
+ output->v_typ_c;
+ param->rsz_rsc_param[index].v_lpf_int_y =
+ output->v_lpf_int_y;
+ param->rsz_rsc_param[index].v_lpf_int_c =
+ output->v_lpf_int_c;
+ param->rsz_rsc_param[index].h_typ_y =
+ output->h_typ_y;
+ param->rsz_rsc_param[index].h_typ_c =
+ output->h_typ_c;
+ param->rsz_rsc_param[index].h_lpf_int_y =
+ output->h_lpf_int_y;
+ param->rsz_rsc_param[index].h_lpf_int_c =
+ output->h_lpf_int_c;
+ param->rsz_rsc_param[index].dscale_en =
+ output->en_down_scale;
+ param->rsz_rsc_param[index].h_dscale_ave_sz =
+ output->h_dscale_ave_sz;
+ param->rsz_rsc_param[index].v_dscale_ave_sz =
+ output->h_dscale_ave_sz;
+ param->ext_mem_param[index].user_y_ofst =
+ (output->user_y_ofst + 31) & ~0x1F;
+ param->ext_mem_param[index].user_c_ofst =
+ (output->user_c_ofst + 31) & ~0x1F;
+ }
+ } else
+ param->rsz_en[index] = DISABLE;
+ }
+ return 0;
+}
+
+/* function :calculate_line_length()
+ * This function calculates the line length of various image
+ * planes at the input and output
+ */
+static int calculate_line_length(enum ipipe_pix_formats pix,
+ int width,
+ int height, int *line_len, int *line_len_c)
+{
+
+ *line_len = 0;
+ *line_len_c = 0;
+
+ if ((pix == IPIPE_UYVY) || (pix == IPIPE_BAYER))
+ *line_len = width << 1;
+ else if (pix == IPIPE_420SP_Y || pix == IPIPE_420SP_C) {
+ *line_len = width;
+ *line_len_c = width;
+ }
+ else {
+ /* YUV 420 */
+ /* round width to upper 32 byte boundary */
+ *line_len = width;
+ *line_len_c = width;
+ }
+ /* adjust the line len to be a multiple of 32 */
+ *line_len += 31;
+ *line_len &= ~0x1f;
+ *line_len_c += 31;
+ *line_len_c &= ~0x1f;
+ return 0;
+}
+
+static inline int rsz_validate_input_image_format(struct device *dev,
+ enum ipipe_pix_formats pix,
+ int width,
+ int height, int *line_len)
+{
+ int temp;
+ if (pix != IPIPE_UYVY && pix != IPIPE_420SP_Y && pix != IPIPE_420SP_C) {
+ dev_err(dev,
+ "rsz_validate_out_pix_formats"
+ "pix format not supported, %d\n", pix);
+ return -EINVAL;
+ }
+
+ if (width == 0 || height == 0) {
+ dev_err(dev, "validate_line_length: invalid width or height\n");
+ return -EINVAL;
+ }
+
+ if (pix == IPIPE_420SP_C)
+ return calculate_line_length(pix,
+ width,
+ height,
+ &temp,
+ line_len);
+ else
+ return calculate_line_length(pix,
+ width,
+ height,
+ line_len,
+ &temp);
+}
+
+static inline int rsz_validate_output_image_format(struct device *dev,
+ enum ipipe_pix_formats pix,
+ int width,
+ int height,
+ int *in_line_len,
+ int *in_line_len_c)
+{
+ if (pix != IPIPE_UYVY
+ && pix != IPIPE_420SP_Y
+ && pix != IPIPE_420SP_C
+ && pix != IPIPE_YUV420SP && pix != IPIPE_BAYER) {
+ dev_err(dev,
+ "rsz_validate_out_pix_formats"
+ "pix format not supported, %d\n", pix);
+ return -EINVAL;
+ }
+
+ if (width == 0 || height == 0) {
+ dev_err(dev, "validate_line_length: invalid width or height\n");
+ return -EINVAL;
+ }
+
+ return calculate_line_length(pix,
+ width,
+ height, in_line_len, in_line_len_c);
+}
+
+static int configure_common_rsz_params(struct device *dev,
+ struct ipipe_params *param,
+ struct rsz_single_shot_config *ss_config)
+{
+ param->rsz_common.yuv_y_min = ss_config->yuv_y_min;
+ param->rsz_common.yuv_y_max = ss_config->yuv_y_max;
+ param->rsz_common.yuv_c_min = ss_config->yuv_c_min;
+ param->rsz_common.yuv_c_max = ss_config->yuv_c_max;
+ param->rsz_common.out_chr_pos = ss_config->out_chr_pos;
+ param->rsz_common.rsz_seq_crv = ss_config->chroma_sample_even;
+ return 0;
+}
+
+static int configure_common_rsz_in_params(struct device *dev,
+ struct ipipe_params *param,
+ int flag, int rsz_chained,
+ void *input_spec)
+{
+ enum ipipe_pix_formats pix;
+ if (!flag) {
+ struct prev_ss_input_spec *in_specs =
+ (struct prev_ss_input_spec *)input_spec;
+ param->rsz_common.vsz = in_specs->image_height - 1;
+ param->rsz_common.hsz = in_specs->image_width - 1;
+ pix = in_specs->pix_fmt;
+ } else {
+ struct rsz_ss_input_spec *in_specs =
+ (struct rsz_ss_input_spec *)input_spec;
+ if (!rsz_chained) {
+ param->rsz_common.vps = in_specs->vst;
+ param->rsz_common.hps = in_specs->hst;
+ }
+ param->rsz_common.vsz = in_specs->image_height - 1;
+ param->rsz_common.hsz = in_specs->image_width - 1;
+ pix = in_specs->pix_fmt;
+ }
+ switch (pix) {
+ case IPIPE_BAYER_8BIT_PACK:
+ case IPIPE_BAYER_8BIT_PACK_ALAW:
+ case IPIPE_BAYER_8BIT_PACK_DPCM:
+ case IPIPE_BAYER_12BIT_PACK:
+ case IPIPE_BAYER:
+ {
+ param->rsz_common.src_img_fmt = RSZ_IMG_422;
+ param->rsz_common.source = IPIPE_DATA;
+ break;
+ }
+ case IPIPE_UYVY:
+ {
+ param->rsz_common.src_img_fmt = RSZ_IMG_422;
+ if (rsz_chained)
+ param->rsz_common.source = IPIPE_DATA;
+ else
+ param->rsz_common.source = IPIPEIF_DATA;
+ param->rsz_common.raw_flip = 0;
+ break;
+ }
+ case IPIPE_420SP_Y:
+ {
+ param->rsz_common.src_img_fmt = RSZ_IMG_420;
+ /* Select y */
+ param->rsz_common.y_c = 0;
+ param->rsz_common.source = IPIPEIF_DATA;
+ param->rsz_common.raw_flip = 0;
+ break;
+ }
+ case IPIPE_420SP_C:
+ {
+ param->rsz_common.src_img_fmt = RSZ_IMG_420;
+ /* Select y */
+ param->rsz_common.y_c = 1;
+ param->rsz_common.source = IPIPEIF_DATA;
+ param->rsz_common.raw_flip = 0;
+ break;
+ }
+ default:
+ return -1;
+ }
+ return 0;
+}
+
+static int validate_ipipeif_decimation(struct device *dev,
+ enum ipipeif_decimation dec_en,
+ unsigned char rsz,
+ unsigned char frame_div_mode_en,
+ int width)
+{
+ if (dec_en && frame_div_mode_en) {
+ dev_err(dev,
+ "Both dec_en & frame_div_mode_en"
+ "can not enabled simultaneously\n");
+ return -EINVAL;
+ }
+ if (frame_div_mode_en) {
+ dev_err(dev, "frame_div_mode mode not supported");
+ return -EINVAL;
+ }
+ if (dec_en) {
+ if (width <= IPIPE_MAX_INPUT_WIDTH) {
+ dev_err(dev,
+ "image width to be more than"
+ " %d for decimation\n", IPIPE_MAX_INPUT_WIDTH);
+ return -EINVAL;
+ }
+ if ((rsz < IPIPEIF_RSZ_MIN) || (rsz > IPIPEIF_RSZ_MAX)) {
+ dev_err(dev, "rsz range is %d to %d\n",
+ IPIPEIF_RSZ_MIN, IPIPEIF_RSZ_MAX);
+ return -EINVAL;
+ }
+ }
+ return 0;
+}
+
+static int configure_resizer_in_ss_mode(struct device *dev,
+ void *user_config,
+ int resizer_chained,
+ struct ipipe_params *param)
+{
+ /* resizer in standalone mode. In this mode if serializer
+ * is enabled, we need to set config params in the hw.
+ */
+ struct rsz_single_shot_config *ss_config =
+ (struct rsz_single_shot_config *)user_config;
+ int ret = 0, line_len, line_len_c;
+
+ ret = rsz_validate_input_image_format(dev,
+ ss_config->input.pix_fmt,
+ ss_config->input.image_width,
+ ss_config->input.image_height,
+ &line_len);
+
+ if (ret)
+ return -EINVAL;
+
+ /* shared block */
+ if ((!ss_config->output1.enable) && (!ss_config->output2.enable)) {
+ dev_err(dev, "One of the resizer output must be enabled\n");
+ return -EINVAL;
+ }
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (!ss_config->input.line_length)
+ param->ipipeif_param.adofs = line_len;
+ else {
+ param->ipipeif_param.adofs = ss_config->input.line_length;
+ param->ipipeif_param.adofs =
+ (param->ipipeif_param.adofs + 31) & ~0x1f;
+ }
+ if (ss_config->output1.enable) {
+ param->rsz_en[RSZ_A] = ENABLE;
+ param->rsz_rsc_param[RSZ_A].mode = ONE_SHOT;
+ ret = rsz_validate_output_image_format(dev,
+ ss_config->output1.
+ pix_fmt,
+ ss_config->output1.width,
+ ss_config->output1.
+ height,
+ &line_len,
+ &line_len_c);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+ param->ext_mem_param[RSZ_A].rsz_sdr_oft_y = line_len;
+ param->ext_mem_param[RSZ_A].rsz_sdr_oft_c = line_len_c;
+ ret = configure_resizer_out_params(param,
+ RSZ_A,
+ &ss_config->output1,
+ 0,
+ 1);
+
+ if (ss_config->output1.pix_fmt == IMP_BAYER)
+ param->rsz_common.raw_flip = 1;
+ else
+ param->rsz_common.raw_flip = 0;
+
+ if (ss_config->output1.pix_fmt == IPIPE_YUV420SP)
+ enable_422_420_conversion(param, RSZ_A, ENABLE);
+ else
+ enable_422_420_conversion(param, RSZ_A,
+ DISABLE);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ dev_err(dev, "error configuring resizer output1\n");
+ return ret;
+ }
+ }
+
+ if (ss_config->output2.enable) {
+ param->rsz_en[RSZ_A] = ENABLE;
+ param->rsz_rsc_param[RSZ_B].mode = ONE_SHOT;
+ ret = rsz_validate_output_image_format(dev,
+ ss_config->output2.
+ pix_fmt,
+ ss_config->output2.width,
+ ss_config->output2.
+ height,
+ &line_len,
+ &line_len_c);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+ param->ext_mem_param[RSZ_B].rsz_sdr_oft_y = line_len;
+ param->ext_mem_param[RSZ_B].rsz_sdr_oft_c = line_len_c;
+ ret = configure_resizer_out_params(param,
+ RSZ_B,
+ &ss_config->output2,
+ 0,
+ 1);
+ if (ret) {
+ dev_err(dev,
+ "error configuring resizer output2 params\n");
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+ if (ss_config->output2.pix_fmt == IPIPE_YUV420SP)
+ enable_422_420_conversion(param, RSZ_B, ENABLE);
+ else
+ enable_422_420_conversion(param,
+ RSZ_B,
+ DISABLE);
+ }
+ configure_common_rsz_params(dev, param, ss_config);
+ if (resizer_chained) {
+ oper_state.rsz_chained = 1;
+ oper_state.rsz_config_state = STATE_CONFIGURED;
+ } else {
+ oper_state.rsz_chained = 0;
+ ret = validate_ipipeif_decimation(dev,
+ ss_config->input.dec_en,
+ ss_config->input.rsz,
+ ss_config->input.
+ frame_div_mode_en,
+ ss_config->input.image_width);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+
+ if (ipipe_process_pix_fmts(ss_config->input.pix_fmt,
+ ss_config->output1.pix_fmt,
+ param) < 0) {
+ dev_err(dev, "error in input or output pix format\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+
+ param->ipipeif_param.source = SDRAM_YUV;
+ param->ipipeif_param.glob_hor_size = ss_config->input.ppln;
+ param->ipipeif_param.glob_ver_size = ss_config->input.lpfr;
+ param->ipipeif_param.hnum = ss_config->input.image_width;
+ param->ipipeif_param.vnum = ss_config->input.image_height;
+ param->ipipeif_param.var.if_5_1.clk_div =
+ ss_config->input.clk_div;
+ if (ss_config->input.dec_en) {
+ param->ipipeif_param.decimation = IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz = ss_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)ss_config->input.
+ avg_filter_en;
+ param->ipipe_hsz =
+ (((ss_config->input.image_width *
+ IPIPEIF_RSZ_CONST) / ss_config->input.rsz) - 1);
+ }
+ if (ss_config->input.pix_fmt == IPIPE_420SP_Y
+ || ss_config->input.pix_fmt == IPIPE_420SP_C)
+ {
+ param->ipipeif_param.var.if_5_1.pack_mode
+ = IPIPEIF_5_1_PACK_8_BIT;
+ param->ipipeif_param.var.if_5_1.source1 = CCDC;
+ param->ipipeif_param.var.if_5_1.isif_port.if_type
+ = VPFE_YCBCR_SYNC_16;
+ param->ipipeif_param.var.if_5_1.data_shift
+ = IPIPEIF_5_1_BITS11_0;
+
+ param->ipipeif_param.source = SDRAM_RAW;
+
+
+ }
+ if (ss_config->input.pix_fmt == IPIPE_420SP_C)
+ param->ipipeif_param.var.if_5_1.isif_port.if_type
+ = VPFE_RAW_BAYER;
+ param->ipipe_hsz = ss_config->input.image_width - 1;
+ param->ipipe_vsz = ss_config->input.image_height - 1;
+ param->ipipe_vps = ss_config->input.vst;
+ param->ipipe_hps = ss_config->input.hst;
+ param->ipipe_dpaths_fmt = IPIPE_YUV2YUV;
+ configure_common_rsz_in_params(dev, param, 1, resizer_chained,
+ &ss_config->input);
+ if (param->rsz_en[RSZ_A]) {
+
+ calculate_resize_ratios(param, RSZ_A);
+ calculate_sdram_offsets(param, RSZ_A);
+
+ /* Overriding resize ratio calculation */
+ if (ss_config->input.pix_fmt == IPIPE_420SP_C)
+ {
+ param->rsz_rsc_param[RSZ_A].v_dif =
+ (((param->ipipe_vsz + 1) * 2) * 256) /
+ (param->rsz_rsc_param[RSZ_A].o_vsz + 1);
+ }
+ }
+
+ if (param->rsz_en[RSZ_B]) {
+ calculate_resize_ratios(param, RSZ_B);
+ calculate_sdram_offsets(param, RSZ_B);
+
+ /* Overriding resize ratio calculation */
+ if (ss_config->input.pix_fmt == IPIPE_420SP_C)
+ {
+ param->rsz_rsc_param[RSZ_B].v_dif =
+ (((param->ipipe_vsz + 1) * 2) * 256) /
+ (param->rsz_rsc_param[RSZ_B].o_vsz + 1);
+ }
+ }
+ }
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int configure_resizer_in_cont_mode(struct device *dev,
+ void *user_config,
+ int resizer_chained,
+ struct ipipe_params *param)
+{
+ /* Continuous mode. This is a shared config block */
+ struct rsz_continuous_config *cont_config =
+ (struct rsz_continuous_config *)user_config;
+ int line_len, line_len_c, ret;
+
+ if (resizer_chained) {
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (!cont_config->output1.enable) {
+ dev_err(dev, "enable resizer - 0\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->rsz_en[RSZ_A] = ENABLE;
+ param->rsz_rsc_param[RSZ_A].mode = CONTINUOUS;
+ ret = configure_resizer_out_params(param,
+ RSZ_A,
+ &cont_config->output1,
+ 1,
+ 0);
+ if (ret) {
+ dev_err(dev, "error configuring resizer output1\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->rsz_en[RSZ_B] = DISABLE;
+
+ if (cont_config->output2.enable) {
+ param->rsz_rsc_param[RSZ_B].mode = CONTINUOUS;
+ ret = rsz_validate_output_image_format(dev,
+ cont_config->output2.
+ pix_fmt,
+ cont_config->output2.
+ width,
+ cont_config->output2.
+ height,
+ &line_len,
+ &line_len_c);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+ param->ext_mem_param[RSZ_B].rsz_sdr_oft_y = line_len;
+ param->ext_mem_param[RSZ_B].rsz_sdr_oft_c = line_len_c;
+ ret = configure_resizer_out_params(param,
+ RSZ_B,
+ &cont_config->output2,
+ 0,
+ 1);
+ if (cont_config->output2.pix_fmt == IPIPE_YUV420SP)
+ enable_422_420_conversion(param,
+ RSZ_B, ENABLE);
+ else
+ enable_422_420_conversion(param,
+ RSZ_B, DISABLE);
+
+ if (ret) {
+ dev_err(dev, "error configuring resizer"
+ " output2\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ }
+ oper_state.rsz_chained = 1;
+ oper_state.rsz_config_state = STATE_CONFIGURED;
+ mutex_unlock(&oper_state.lock);
+ } else {
+ dev_err(dev, "Resizer cannot be configured in standalone"
+ "for continuous mode\n");
+ return -EINVAL;
+ }
+ return 0;
+}
+static int ipipe_set_resize_config(struct device *dev,
+ unsigned int oper_mode,
+ int resizer_chained,
+ void *user_config, void *config)
+{
+ int ret = 0;
+ struct ipipe_params *param = (struct ipipe_params *)config;
+
+ dev_dbg(dev, "ipipe_set_resize_config, resizer_chained = %d\n",
+ resizer_chained);
+ if ((ISNULL(user_config)) || (ISNULL(config))) {
+ dev_err(dev, "Invalid user_config or config ptr\n");
+ return -EINVAL;
+ }
+
+ memcpy((void *)config,
+ (void *)&dm365_ipipe_defs,
+ sizeof(struct ipipe_params));
+
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ ret = configure_resizer_in_ss_mode(dev,
+ user_config,
+ resizer_chained,
+ param);
+ if (!ret && (!en_serializer && !resizer_chained))
+ ret = ipipe_hw_setup(config);
+ } else
+ ret = configure_resizer_in_cont_mode(dev,
+ user_config,
+ resizer_chained,
+ param);
+ return ret;
+}
+
+static void configure_resize_passthru(struct ipipe_params *param, int bypass)
+{
+ param->rsz_rsc_param[RSZ_A].cen = DISABLE;
+ param->rsz_rsc_param[RSZ_A].yen = DISABLE;
+ param->rsz_rsc_param[RSZ_A].v_phs_y = 0;
+ param->rsz_rsc_param[RSZ_A].v_phs_c = 0;
+ param->rsz_rsc_param[RSZ_A].v_dif = 256;
+ param->rsz_rsc_param[RSZ_A].v_lpf_int_y = 0;
+ param->rsz_rsc_param[RSZ_A].v_lpf_int_c = 0;
+ param->rsz_rsc_param[RSZ_A].h_phs = 0;
+ param->rsz_rsc_param[RSZ_A].h_dif = 256;
+ param->rsz_rsc_param[RSZ_A].h_lpf_int_y = 0;
+ param->rsz_rsc_param[RSZ_A].h_lpf_int_c = 0;
+ param->rsz_rsc_param[RSZ_A].dscale_en = DISABLE;
+ param->rsz2rgb[RSZ_A].rgb_en = DISABLE;
+ param->rsz_en[RSZ_A] = ENABLE;
+ param->rsz_en[RSZ_B] = DISABLE;
+ if (bypass) {
+ param->rsz_rsc_param[RSZ_A].i_vps = 0;
+ param->rsz_rsc_param[RSZ_A].i_hps = 0;
+ /* Raw Bypass */
+ param->rsz_common.passthrough = IPIPE_BYPASS_ON;
+ }
+}
+
+static inline int prev_validate_output_image_format(struct device *dev,
+ enum ipipe_pix_formats pix,
+ int *line_len,
+ int in_width, int in_height)
+{
+ if (pix != IPIPE_UYVY && pix != IPIPE_BAYER) {
+ dev_err(dev,
+ "prev_validate_output_image_format"
+ "pix format not supported, %d\n", pix);
+ return -EINVAL;
+ }
+
+ if ((in_width == 0) || (in_height == 0)) {
+ dev_err(dev,
+ "prev_validate_output_image_format:"
+ " invalid width or height\n");
+ return -EINVAL;
+ }
+
+ *line_len = in_width * 2;
+
+ /* Adjust line length to be a multiple of 32 */
+ *line_len += 31;
+ *line_len &= ~0x1f;
+ return 0;
+}
+
+static inline int validate_preview_input_spec(struct device *dev,
+ enum ipipe_pix_formats pix,
+ int width,
+ int height, int *line_len)
+{
+ if (pix != IPIPE_UYVY
+ && pix != IPIPE_BAYER
+ && pix != IPIPE_BAYER_8BIT_PACK
+ && pix != IPIPE_BAYER_8BIT_PACK_ALAW
+ && pix != IPIPE_BAYER_8BIT_PACK_DPCM
+ && pix != IPIPE_BAYER_12BIT_PACK) {
+ dev_err(dev,
+ "validate_preview_input_spec:"
+ "pix format not supported, %d\n", pix);
+ return -EINVAL;
+ }
+ if (width == 0 || height == 0) {
+ dev_err(dev,
+ "rsz_validate_out_image_formats: "
+ "invalid width or height\n");
+ return -EINVAL;
+ }
+
+ if (pix == IPIPE_UYVY || pix == IPIPE_BAYER)
+ *line_len = width * 2;
+ else if (pix == IPIPE_BAYER_8BIT_PACK ||
+ pix == IPIPE_BAYER_8BIT_PACK_ALAW ||
+ pix == IPIPE_BAYER_8BIT_PACK_DPCM)
+ *line_len = width;
+ else
+ /* 12 bit */
+ *line_len = width + (width >> 1);
+ /* Adjust line length to be a multiple of 32 */
+ *line_len += 31;
+ *line_len &= ~0x1f;
+ return 0;
+}
+
+static int configure_previewer_in_cont_mode(struct device *dev,
+ void *user_config,
+ struct ipipe_params *param)
+{
+ int ret;
+ struct prev_continuous_config *cont_config =
+ (struct prev_continuous_config *)user_config;
+
+ if (cont_config->input.en_df_sub) {
+ dev_err(dev, "DF subtraction is not supported\n");
+ return -EINVAL;
+ }
+ if (cont_config->input.dec_en) {
+ if ((cont_config->input.rsz < IPIPEIF_RSZ_MIN)
+ || (cont_config->input.rsz > IPIPEIF_RSZ_MAX)) {
+ dev_err(dev, "rsz range is %d to %d\n",
+ IPIPEIF_RSZ_MIN, IPIPEIF_RSZ_MAX);
+ return -EINVAL;
+ }
+ }
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ param->rsz_common.passthrough = cont_config->bypass;
+ param->ipipeif_param.source = CCDC;
+ param->ipipeif_param.clock_select = PIXCEL_CLK;
+ param->ipipeif_param.mode = CONTINUOUS;
+ if (cont_config->input.dec_en) {
+ param->ipipeif_param.decimation = IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz = cont_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)cont_config->input.avg_filter_en;
+ }
+ /* IPIPE mode */
+ param->ipipe_mode = CONTINUOUS;
+ param->ipipe_colpat_olop = cont_config->input.colp_olop;
+ param->ipipe_colpat_olep = cont_config->input.colp_olep;
+ param->ipipe_colpat_elop = cont_config->input.colp_elop;
+ param->ipipe_colpat_elep = cont_config->input.colp_elep;
+ param->ipipeif_param.gain = cont_config->input.gain;
+ param->ipipeif_param.var.if_5_1.clip = cont_config->input.clip;
+ param->ipipeif_param.var.if_5_1.dpc = cont_config->input.dpc;
+ param->ipipeif_param.var.if_5_1.align_sync =
+ cont_config->input.align_sync;
+ param->ipipeif_param.var.if_5_1.rsz_start =
+ cont_config->input.rsz_start;
+ if (!oper_state.rsz_chained) {
+ param->rsz_rsc_param[0].mode = CONTINUOUS;
+ /* setup bypass resizer */
+ configure_resize_passthru(param, 0);
+ }
+ if (cont_config->bypass)
+ configure_resize_passthru(param, 1);
+ oper_state.prev_config_state = STATE_CONFIGURED;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int configure_previewer_in_ss_mode(struct device *dev,
+ void *user_config,
+ struct ipipe_params *param)
+{
+ int ret = 0;
+ int line_len;
+ struct prev_single_shot_config *ss_config =
+ (struct prev_single_shot_config *)user_config;
+
+ ret = validate_preview_input_spec(dev,
+ ss_config->input.pix_fmt,
+ ss_config->input.image_width,
+ ss_config->input.image_height,
+ &line_len);
+ if (ret)
+ return -EINVAL;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+
+ if (!ss_config->input.line_length)
+ param->ipipeif_param.adofs = line_len;
+ else {
+ param->ipipeif_param.adofs = ss_config->input.line_length;
+ param->ipipeif_param.adofs =
+ (param->ipipeif_param.adofs + 31) & ~0x1f;
+ }
+ if (ss_config->input.dec_en && ss_config->input.frame_div_mode_en) {
+ dev_err(dev,
+ "Both dec_en & frame_div_mode_en"
+ "can not enabled simultaneously\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+
+ ret = validate_ipipeif_decimation(dev,
+ ss_config->input.dec_en,
+ ss_config->input.rsz,
+ ss_config->input.frame_div_mode_en,
+ ss_config->input.image_width);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+
+ if (!oper_state.rsz_chained) {
+ ret = prev_validate_output_image_format(dev,
+ ss_config->output.
+ pix_fmt, &line_len,
+ ss_config->input.
+ image_width,
+ ss_config->input.
+ image_height);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ext_mem_param[RSZ_A].rsz_sdr_oft_y = line_len;
+ if (ss_config->input.frame_div_mode_en)
+ ret = update_preview_f_div_params(dev,
+ ss_config->input.
+ image_width,
+ ss_config->input.
+ image_width,
+ &param->
+ rsz_rsc_param[RSZ_A]);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ } else {
+ if (ss_config->input.frame_div_mode_en &&
+ param->rsz_en[RSZ_A]) {
+ if (!param->rsz_rsc_param[RSZ_A].dscale_en)
+ ret = calculate_normal_f_div_param(
+ dev,
+ ss_config->input.
+ image_width,
+ param->rsz_rsc_param
+ [RSZ_A].
+ o_vsz + 1,
+ &param->rsz_rsc_param
+ [RSZ_A]);
+ else
+ ret = calculate_down_scale_f_div_param(
+ dev,
+ ss_config->
+ input.image_width,
+ param->rsz_rsc_param
+ [RSZ_A].o_vsz + 1,
+ &param->rsz_rsc_param
+ [RSZ_A]);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ }
+ if (ss_config->input.frame_div_mode_en &&
+ param->rsz_en[RSZ_B]) {
+ if (!param->rsz_rsc_param[RSZ_B].dscale_en)
+ ret = calculate_normal_f_div_param(
+ dev,
+ ss_config->input.
+ image_width,
+ param->rsz_rsc_param
+ [RSZ_B].o_vsz + 1,
+ &param->rsz_rsc_param
+ [RSZ_B]);
+ else
+ ret = calculate_down_scale_f_div_param(
+ dev,
+ ss_config->input.
+ image_width,
+ param->rsz_rsc_param
+ [RSZ_B].o_vsz + 1,
+ &param->rsz_rsc_param
+ [RSZ_B]);
+ if (ret) {
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ }
+ }
+ if (ipipe_process_pix_fmts(ss_config->input.pix_fmt,
+ ss_config->output.pix_fmt,
+ param) < 0) {
+ dev_err(dev, "error in input or output pix format\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipeif_param.hnum = ss_config->input.image_width;
+ param->ipipeif_param.vnum = ss_config->input.image_height;
+ param->ipipeif_param.glob_hor_size = ss_config->input.ppln;
+ param->ipipeif_param.glob_ver_size = ss_config->input.lpfr;
+ param->ipipeif_param.var.if_5_1.clk_div = ss_config->input.clk_div;
+ param->ipipeif_param.var.if_5_1.pix_order = ss_config->input.pix_order;
+ param->ipipeif_param.var.if_5_1.align_sync =
+ ss_config->input.align_sync;
+ param->ipipeif_param.var.if_5_1.rsz_start = ss_config->input.rsz_start;
+ if (param->ipipeif_param.var.if_5_1.dpcm.en) {
+ param->ipipeif_param.var.if_5_1.dpcm.pred =
+ ss_config->input.pred;
+ param->ipipeif_param.var.if_5_1.dpcm.type = DPCM_8BIT_12BIT;
+ }
+ param->ipipeif_param.var.if_5_1.data_shift =
+ ss_config->input.data_shift;
+
+ param->ipipe_hsz = ss_config->input.image_width - 1;
+ if (ss_config->input.dec_en) {
+ if ((ss_config->input.rsz < IPIPEIF_RSZ_MIN) ||
+ (ss_config->input.rsz > IPIPEIF_RSZ_MAX)) {
+ dev_err(dev, "rsz range is %d to %d\n",
+ IPIPEIF_RSZ_MIN, IPIPEIF_RSZ_MAX);
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ param->ipipeif_param.decimation = IPIPEIF_DECIMATION_ON;
+ param->ipipeif_param.rsz = ss_config->input.rsz;
+ param->ipipeif_param.avg_filter =
+ (enum ipipeif_avg_filter)ss_config->input.avg_filter_en;
+ param->ipipe_hsz =
+ (((ss_config->input.image_width * IPIPEIF_RSZ_CONST) /
+ ss_config->input.rsz) - 1);
+ }
+ param->ipipeif_param.gain = ss_config->input.gain;
+ param->ipipeif_param.var.if_5_1.clip = ss_config->input.clip;
+ param->ipipeif_param.var.if_5_1.dpc = ss_config->input.dpc;
+ param->ipipe_colpat_olop = ss_config->input.colp_olop;
+ param->ipipe_colpat_olep = ss_config->input.colp_olep;
+ param->ipipe_colpat_elop = ss_config->input.colp_elop;
+ param->ipipe_colpat_elep = ss_config->input.colp_elep;
+ param->ipipe_vps = ss_config->input.vst;
+ param->ipipe_hps = ss_config->input.hst;
+ param->ipipe_vsz = ss_config->input.image_height - 1;
+ if (ss_config->input.pix_fmt == IPIPE_UYVY)
+ param->ipipeif_param.source = SDRAM_YUV;
+ else
+ param->ipipeif_param.source = SDRAM_RAW;
+
+ configure_common_rsz_in_params(dev, param, 1, oper_state.rsz_chained,
+ &ss_config->input);
+
+ param->rsz_common.passthrough = ss_config->bypass;
+ /* update the resize parameters */
+ if (ss_config->bypass == IPIPE_BYPASS_ON ||
+ param->ipipe_dpaths_fmt == IPIPE_RAW2RAW)
+ /* Bypass resizer */
+ configure_resize_passthru(param, 1);
+ else {
+ if (oper_state.rsz_chained) {
+ if (param->rsz_en[RSZ_A]) {
+ calculate_resize_ratios(param, RSZ_A);
+ calculate_sdram_offsets(param, RSZ_A);
+ }
+ if (param->rsz_en[RSZ_B]) {
+ calculate_resize_ratios(param, RSZ_B);
+ calculate_sdram_offsets(param, RSZ_B);
+ }
+ } else {
+ struct rsz_output_spec *output_specs =
+ kmalloc(sizeof(struct rsz_output_spec),
+ GFP_KERNEL);
+ if (ISNULL(output_specs)) {
+ dev_err(dev, "Memory Alloc failure\n");
+ mutex_unlock(&oper_state.lock);
+ return -EINVAL;
+ }
+ /* Using resizer as pass through */
+ configure_resize_passthru(param, 0);
+ memset((void *)output_specs, 0,
+ sizeof(struct rsz_output_spec));
+ output_specs->enable = 1;
+ output_specs->pix_fmt = IPIPE_UYVY;
+ output_specs->width = ss_config->input.image_width;
+ output_specs->height = ss_config->input.image_height;
+ output_specs->vst_y = ss_config->input.vst;
+ configure_resizer_out_params(param, RSZ_A,
+ output_specs, 0, 0);
+ calculate_sdram_offsets(param, RSZ_A);
+ kfree(output_specs);
+ }
+ }
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_reconfig_resizer(struct device *dev,
+ struct rsz_reconfig *reconfig,
+ void *config)
+{
+ struct ipipe_params *param = (struct ipipe_params *)config;
+ if (ISNULL(reconfig)) {
+ dev_err(dev, "Null User ptr received for reconfig");
+ return -EINVAL;
+ }
+
+ if ((reconfig->pix_format != IMP_420SP_Y) &&
+ (reconfig->pix_format != IMP_420SP_C)) {
+ dev_err(dev, "reconfig - pixel format incorrect");
+ return -EINVAL;
+ }
+ if (param->rsz_common.src_img_fmt != RSZ_IMG_420) {
+ dev_err(dev, "reconfig - source format originally"
+ "configured is not YUV420SP\n");
+ return -EINVAL;
+ }
+ if ((param->rsz_common.y_c) && (reconfig->pix_format == IMP_420SP_C)) {
+ dev_err(dev, "reconfig - channel is already configured"
+ "for YUV420SP - C data\n");
+ return -EINVAL;
+ }
+ if ((!param->rsz_common.y_c) && (reconfig->pix_format == IMP_420SP_Y)) {
+ dev_err(dev, "reconfig - channel is already configured"
+ "for YUV420SP - Y data\n");
+ return -EINVAL;
+ }
+ if (reconfig->pix_format == IMP_420SP_Y)
+ param->rsz_common.y_c = 0;
+ else
+ param->rsz_common.y_c = 1;
+ if (!en_serializer)
+ rsz_set_in_pix_format(param->rsz_common.y_c);
+ return 0;
+}
+
+#ifdef CONFIG_IMP_DEBUG
+static void ipipe_dump_hw_config(void)
+{
+ printk(KERN_NOTICE "IPIPE Configuration context\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ if (oper_mode == IMP_MODE_SINGLE_SHOT)
+ printk(KERN_NOTICE "Operation mode = SINGLE SHOT\n");
+ else
+ printk(KERN_NOTICE "Operation mode = CONTINUOUS\n");
+ if (oper_state.rsz_chained)
+ printk(KERN_NOTICE "Resizer chained\n");
+ else
+ printk(KERN_NOTICE "Resizer not chained\n");
+ if (en_serializer)
+ printk(KERN_NOTICE "Serializer is enabled\n");
+ else
+ printk(KERN_NOTICE "Serializer is disabled\n");
+ if (oper_mode != IMP_MODE_SINGLE_SHOT) {
+ if (oper_state.prev_config_state)
+ printk(KERN_NOTICE "Previewer is configured\n");
+ else
+ printk(KERN_NOTICE "Previewer is not configured\n");
+ }
+ if (oper_state.rsz_chained || (oper_mode != IMP_MODE_SINGLE_SHOT)) {
+ if (oper_state.rsz_config_state)
+ printk(KERN_NOTICE "Resizer is configured\n");
+ else
+ printk(KERN_NOTICE "Resizer is not configured\n");
+ }
+ ipipe_hw_dump_config();
+}
+#else
+static void ipipe_dump_hw_config(void)
+{
+ return ipipe_hw_dump_config();
+}
+#endif
+
+static int ipipe_set_preview_config(struct device *dev,
+ unsigned int oper_mode,
+ void *user_config, void *config)
+{
+ int ret = 0;
+ struct ipipe_params *param = (struct ipipe_params *)config;
+ dev_dbg(dev, "ipipe_set_preview_config\n");
+
+ if ((ISNULL(user_config)) || (ISNULL(config))) {
+ dev_err(dev, "Invalid user_config or config ptr\n");
+ return -EINVAL;
+ }
+
+ if (!oper_state.rsz_chained) {
+ /* For chained resizer, defaults are set by resizer */
+ memcpy((void *)config,
+ (void *)&dm365_ipipe_defs,
+ sizeof(struct ipipe_params));
+ }
+
+ /* shared block */
+ if (oper_mode == IMP_MODE_SINGLE_SHOT) {
+ /* previewer in standalone mode. In this mode if serializer
+ * is enabled, we need to set config params for hw.
+ */
+ ret = configure_previewer_in_ss_mode(dev, user_config, param);
+
+ if ((!ret) && !en_serializer)
+ ret = ipipe_hw_setup(config);
+ } else
+ ret = configure_previewer_in_cont_mode(dev, user_config, param);
+ /* continuous mode */
+ return ret;
+}
+struct imp_hw_interface *imp_get_hw_if(void)
+{
+ return &dm365_ipipe_interface;
+}
+EXPORT_SYMBOL(imp_get_hw_if);
+
+/* APIs for CCDC driver */
+static int ipipe_set_input_win(struct imp_window *win)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (param->ipipeif_param.decimation) {
+ param->ipipe_hsz =
+ ((win->width * IPIPEIF_RSZ_CONST) /
+ param->ipipeif_param.rsz) - 1;
+ } else
+ param->ipipe_hsz = win->width - 1;
+ if (!oper_state.frame_format) {
+ param->ipipe_vsz = (win->height >> 1) - 1;
+ param->ipipe_vps = (win->vst >> 1);
+ } else {
+ param->ipipe_vsz = win->height - 1;
+ param->ipipe_vps = win->vst;
+ }
+ param->ipipe_hps = win->hst;
+ param->rsz_common.vsz = param->ipipe_vsz;
+ param->rsz_common.hsz = param->ipipe_hsz;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+static int ipipe_get_input_win(struct imp_window *win)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ if (param->ipipeif_param.decimation)
+ win->width =
+ (((param->ipipe_hsz + 1) * param->ipipeif_param.rsz) >> 4);
+ else
+ win->width = param->ipipe_hsz + 1;
+ if (!oper_state.frame_format) {
+ win->height = (param->ipipe_vsz + 1) << 1;
+ win->vst = (param->ipipe_vps << 1);
+ } else {
+ win->height = param->ipipe_vsz + 1;
+ win->vst = param->ipipe_vps;
+ }
+ win->hst = param->ipipe_hps;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_in_pixel_format(enum imp_pix_formats pix_fmt)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.in_pixel_format = pix_fmt;
+ param->rsz_common.src_img_fmt = RSZ_IMG_422;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_out_pixel_format(enum imp_pix_formats pix_fmt)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ int err;
+
+ /* if image is RAW, preserve raw image format while flipping.
+ * otherwise preserve, preserve ycbcr format while flipping
+ */
+ if (pix_fmt == IMP_BAYER)
+ param->rsz_common.raw_flip = 1;
+ else
+ param->rsz_common.raw_flip = 0;
+
+ err = mutex_lock_interruptible(&oper_state.lock);
+ if (err)
+ return err;
+ oper_state.out_pixel_format = pix_fmt;
+ err = ipipe_process_pix_fmts(oper_state.in_pixel_format,
+ oper_state.out_pixel_format,
+ param);
+
+ mutex_unlock(&oper_state.lock);
+ return err;
+}
+
+static int ipipe_set_buftype(unsigned char buf_type)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.buffer_type = buf_type;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_frame_format(unsigned char frm_fmt)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ oper_state.frame_format = frm_fmt;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int ipipe_set_output_win(struct imp_window *win)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ struct rsz_output_spec output_specs;
+ int ret = -1, line_len, line_len_c;
+ if (!param->rsz_en[0]) {
+ printk(KERN_ERR "resizer output1 not enabled\n");
+ return ret;
+ }
+ output_specs.enable = 1;
+ output_specs.width = win->width;
+ /* Always set output height same as in height
+ for de-interlacing
+ */
+ output_specs.height = win->height;
+ output_specs.vst_y = win->vst;
+ if (oper_state.out_pixel_format == IPIPE_YUV420SP)
+ output_specs.vst_c = win->vst;
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ ret = configure_resizer_out_params(param, RSZ_A, &output_specs, 0, 0);
+ if (ret) {
+ printk(KERN_ERR "error in configuring output1\n");
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+ ret |= calculate_line_length(oper_state.out_pixel_format,
+ param->rsz_rsc_param[0].o_hsz + 1,
+ param->rsz_rsc_param[0].o_vsz + 1,
+ &line_len,
+ &line_len_c);
+ if (ret) {
+ printk(KERN_ERR "error in calculating line length\n");
+ mutex_unlock(&oper_state.lock);
+ return ret;
+ }
+ param->ext_mem_param[0].rsz_sdr_oft_y = line_len;
+ param->ext_mem_param[0].rsz_sdr_oft_c = line_len_c;
+ calculate_resize_ratios(param, RSZ_A);
+ if (param->rsz_en[RSZ_B])
+ calculate_resize_ratios(param, RSZ_B);
+ if (oper_state.out_pixel_format == IPIPE_YUV420SP)
+ enable_422_420_conversion(param, RSZ_A, ENABLE);
+ else
+ enable_422_420_conversion(param, RSZ_A, DISABLE);
+
+ ret = calculate_sdram_offsets(param, RSZ_A);
+ if (param->rsz_en[RSZ_B])
+ ret = calculate_sdram_offsets(param, RSZ_B);
+
+ if (ret)
+ printk(KERN_ERR "error in calculating sdram offsets\n");
+ mutex_unlock(&oper_state.lock);
+ return ret;
+}
+static int ipipe_get_output_state(unsigned char out_sel)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ if ((out_sel != RSZ_A) && (out_sel != RSZ_B))
+ return 0;
+ return param->rsz_en[out_sel];
+}
+
+/* This should be called only after setting the output
+ * window params. This also assumes the corresponding
+ * output is configured prior to calling this.
+ */
+static int ipipe_get_line_length(unsigned char out_sel)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ if ((out_sel != RSZ_A) && (out_sel != RSZ_B))
+ return -1;
+ /* assume output is always UYVY. Change this if we
+ * support RGB
+ */
+ if (!param->rsz_en[out_sel])
+ return -1;
+
+ return param->ext_mem_param[out_sel].rsz_sdr_oft_y;
+}
+
+static int ipipe_get_image_height(unsigned char out_sel)
+{
+ struct ipipe_params *param = oper_state.shared_config_param;
+ if ((out_sel != RSZ_A) && (out_sel != RSZ_B))
+ return -1;
+ if (!param->rsz_en[out_sel])
+ return -1;
+
+ return param->rsz_rsc_param[out_sel].o_vsz + 1;
+}
+
+/* Assume valid param ptr */
+int ipipe_set_hw_if_param(struct vpfe_hw_if_param *if_param)
+{
+ int ret;
+ struct ipipe_params *param = oper_state.shared_config_param;
+
+ ret = mutex_lock_interruptible(&oper_state.lock);
+ if (ret)
+ return ret;
+ param->ipipeif_param.var.if_5_1.isif_port = *if_param;
+ mutex_unlock(&oper_state.lock);
+ return 0;
+}
+
+static int dm365_ipipe_init(void)
+{
+ oper_state.shared_config_param =
+ kmalloc(sizeof(struct ipipe_params), GFP_KERNEL);
+ if (ISNULL(oper_state.shared_config_param)) {
+ printk(KERN_ERR
+ "dm365_ipipe_init: failed to allocate memory\n");
+ return -ENOMEM;
+ }
+ memcpy(&dm365_ipipe_defs.ipipeif_param.var.if_5_1,
+ &ipipeif_5_1_defaults,
+ sizeof(struct ipipeif_5_1));
+ lutdpc.table = ipipe_lutdpc_table;
+ lut_3d.table = ipipe_3d_lut_table;
+ gbce.table = ipipe_gbce_table;
+ gamma.table_r = ipipe_gamma_table_r;
+ gamma.table_b = ipipe_gamma_table_b;
+ gamma.table_g = ipipe_gamma_table_g;
+ yee.table = ipipe_yee_table;
+ mutex_init(&oper_state.lock);
+ oper_state.state = CHANNEL_FREE;
+ oper_state.prev_config_state = STATE_NOT_CONFIGURED;
+ oper_state.rsz_config_state = STATE_NOT_CONFIGURED;
+ oper_state.frame_format = 1;
+ oper_state.in_pixel_format = IMP_BAYER;
+ oper_state.out_pixel_format = IMP_UYVY;
+ if (oper_mode == IMP_MODE_SINGLE_SHOT)
+ printk(KERN_NOTICE
+ "DM365 IPIPE initialized in Single Shot mode\n");
+ else
+ printk(KERN_NOTICE
+ "DM365 IPIPE initialized in Continuous mode\n");
+ return 0;
+}
+
+static void dm365_ipipe_cleanup(void)
+{
+ kfree(oper_state.shared_config_param);
+ printk(KERN_NOTICE "DM365 IPIPE hardware module exited\n");
+}
+
+subsys_initcall(dm365_ipipe_init);
+module_exit(dm365_ipipe_cleanup);
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/dm365_ipipe_hw.c b/drivers/char/dm365_ipipe_hw.c
new file mode 100644
index 00000000..3cc23143
--- /dev/null
+++ b/drivers/char/dm365_ipipe_hw.c
@@ -0,0 +1,1217 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <media/davinci/dm365_ipipe.h>
+#include <media/davinci/dm3xx_ipipe.h>
+#include "dm365_ipipe_hw.h"
+
+//#define CONFIG_IMP_DEBUG
+static void ipipe_clock_enable(void)
+{
+ /* enable IPIPE MMR for register write access */
+ regw_ip(IPIPE_GCK_MMR_DEFAULT, IPIPE_GCK_MMR);
+ /* enable the clock wb,cfa,dfc,d2f,pre modules */
+ regw_ip(IPIPE_GCK_PIX_DEFAULT, IPIPE_GCK_PIX);
+ /* enable RSZ MMR for register write access */
+}
+
+
+#ifdef CONFIG_IMP_DEBUG
+void ipipe_hw_dump_config(void)
+{
+ u32 utemp;
+
+ ipipeif_dump_register();
+ utemp = regr_ip(IPIPE_SRC_EN);
+ printk(KERN_NOTICE "IPIPE_SRC_EN = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_MODE);
+ printk(KERN_NOTICE "IPIPE_SRC_MODE = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_FMT);
+ printk(KERN_NOTICE "IPIPE_SRC_FMT = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_COL);
+ printk(KERN_NOTICE "IPIPE_SRC_COL = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_VPS);
+ printk(KERN_NOTICE "IPIPE_SRC_VPS = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_VSZ);
+ printk(KERN_NOTICE "IPIPE_SRC_VSZ = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_HPS);
+ printk(KERN_NOTICE "IPIPE_SRC_HPS = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SRC_HSZ);
+ printk(KERN_NOTICE "IPIPE_SRC_HSZ = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_SEL_SBU);
+ printk(KERN_NOTICE "IPIPE_SEL_SBU = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_DMA_STA);
+ printk(KERN_NOTICE "IPIPE_DMA_STA = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_GCK_MMR);
+ printk(KERN_NOTICE "IPIPE_GCK_MMR = 0x%x\n", utemp);
+ utemp = regr_ip(IPIPE_GCK_PIX);
+ printk(KERN_NOTICE "IPIPE_GCK_PIX = 0x%x\n", utemp);
+ printk(KERN_NOTICE "Resizer Registers\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ utemp = regr_rsz(RSZ_SRC_EN);
+ printk(KERN_NOTICE "RSZ_SRC_EN = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_MODE);
+ printk(KERN_NOTICE "RSZ_SRC_MODE = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_FMT0);
+ printk(KERN_NOTICE "RSZ_SRC_FMT0 = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_FMT1);
+ printk(KERN_NOTICE "RSZ_SRC_FMT1 = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_VPS);
+ printk(KERN_NOTICE "RSZ_SRC_VPS = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_VSZ);
+ printk(KERN_NOTICE "RSZ_SRC_VSZ = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_HPS);
+ printk(KERN_NOTICE "RSZ_SRC_HPS = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SRC_HSZ);
+ printk(KERN_NOTICE "RSZ_SRC_HSZ = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_DMA_RZA);
+ printk(KERN_NOTICE "RSZ_DMA_RZA = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_DMA_RZB);
+ printk(KERN_NOTICE "RSZ_DMA_RZB = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_DMA_STA);
+ printk(KERN_NOTICE "RSZ_DMA_STA = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_GCK_MMR);
+ printk(KERN_NOTICE "RSZ_GCK_MMR = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_GCK_SDR);
+ printk(KERN_NOTICE "RSZ_GCK_SDR = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_IRQ_RZA);
+ printk(KERN_NOTICE "RSZ_IRQ_RZA = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_IRQ_RZB);
+ printk(KERN_NOTICE "RSZ_IRQ_RZB = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_YUV_Y_MIN);
+ printk(KERN_NOTICE "RSZ_YUV_Y_MIN = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_YUV_Y_MAX);
+ printk(KERN_NOTICE "RSZ_YUV_Y_MAX = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_YUV_C_MIN);
+ printk(KERN_NOTICE "RSZ_YUV_C_MIN = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_YUV_C_MAX);
+ printk(KERN_NOTICE "RSZ_YUV_C_MAX = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_YUV_PHS);
+ printk(KERN_NOTICE "RSZ_YUV_PHS = 0x%x\n", utemp);
+ utemp = regr_rsz(RSZ_SEQ);
+ printk(KERN_NOTICE "RSZ_SEQ = 0x%x\n", utemp);
+
+ /* Resize - A registers */
+ utemp = regr_rsz((RSZ_EN_A));
+ printk(KERN_NOTICE "RSZ A EN = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_MODE));
+ printk(KERN_NOTICE "RSZ A MODE = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_420));
+ printk(KERN_NOTICE "RSZ A 420 = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_I_VPS));
+ printk(KERN_NOTICE "RSZ A I_VPS = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_I_HPS));
+ printk(KERN_NOTICE "RSZ A I_HPS = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_O_VSZ));
+ printk(KERN_NOTICE "RSZ A O_VSZ = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_O_HSZ));
+ printk(KERN_NOTICE "RSZ A O_HSZ = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_V_PHS_Y));
+ printk(KERN_NOTICE "RSZ A V_PHS_Y = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_V_PHS_C));
+ printk(KERN_NOTICE "RSZ A V_PHS_C = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_V_DIF));
+ printk(KERN_NOTICE "RSZ A V_DIF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_V_TYP));
+ printk(KERN_NOTICE "RSZ A V_TYP = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_V_LPF));
+ printk(KERN_NOTICE "RSZ A V_LPF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_H_PHS));
+ printk(KERN_NOTICE "RSZ A H_PHS = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_H_PHS_ADJ));
+ printk(KERN_NOTICE "RSZ A H_PHS_ADJ = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_H_DIF));
+ printk(KERN_NOTICE "RSZ A H_DIF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_H_TYP));
+ printk(KERN_NOTICE "RSZ A H_TYP = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_H_LPF));
+ printk(KERN_NOTICE "RSZ A H_LPF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_DWN_EN));
+ printk(KERN_NOTICE "RSZ A DWN_EN = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_DWN_AV));
+ printk(KERN_NOTICE "RSZ A DWN_AV = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_RGB_EN));
+ printk(KERN_NOTICE "RSZ A RGB_EN = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_RGB_TYP));
+ printk(KERN_NOTICE "RSZ A RGB_TYP = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_RGB_BLD));
+ printk(KERN_NOTICE "RSZ A RGB_BLD = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_BAD_H));
+ printk(KERN_NOTICE "RSZ A SDR_Y_BAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_BAD_L));
+ printk(KERN_NOTICE "RSZ A SDR_Y_BAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_SAD_H));
+ printk(KERN_NOTICE "RSZ A SDR_Y_SAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_SAD_L));
+ printk(KERN_NOTICE "RSZ A SDR_Y_SAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_OFT));
+ printk(KERN_NOTICE "RSZ A SDR_Y_OFT = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_PTR_S));
+ printk(KERN_NOTICE "RSZ A SDR_Y_Y_PTR_S = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_Y_PTR_E));
+ printk(KERN_NOTICE "RSZ A SDR_Y_PTR_E = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_BAD_H));
+ printk(KERN_NOTICE "RSZ A SDR_C_BAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_BAD_L));
+ printk(KERN_NOTICE "RSZ A SDR_C_BAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_SAD_H));
+ printk(KERN_NOTICE "RSZ A SDR_C_SAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_SAD_L));
+ printk(KERN_NOTICE "RSZ A SDR_C_SAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_OFT));
+ printk(KERN_NOTICE "RSZ A SDR_C_OFT = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_PTR_S));
+ printk(KERN_NOTICE "RSZ A SDR_C_PTR_S = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_A + RSZ_SDR_C_PTR_E));
+ printk(KERN_NOTICE "RSZ A SDR_C_PTR_E = 0x%x\n", utemp);
+
+ /* Resize - B registers */
+ utemp = regr_rsz((RSZ_EN_B));
+ printk(KERN_NOTICE "RSZ B EN = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_MODE));
+ printk(KERN_NOTICE "RSZ B MODE = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_420));
+ printk(KERN_NOTICE "RSZ B 420 = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_I_VPS));
+ printk(KERN_NOTICE "RSZ B I_VPS = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_I_HPS));
+ printk(KERN_NOTICE "RSZ B I_HPS = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_O_VSZ));
+ printk(KERN_NOTICE "RSZ B O_VSZ = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_O_HSZ));
+ printk(KERN_NOTICE "RSZ B O_HSZ = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_V_PHS_Y));
+ printk(KERN_NOTICE "RSZ B V_PHS_Y = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_V_PHS_C));
+ printk(KERN_NOTICE "RSZ B V_PHS_C = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_V_DIF));
+ printk(KERN_NOTICE "RSZ B V_DIF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_V_TYP));
+ printk(KERN_NOTICE "RSZ B V_TYP = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_V_LPF));
+ printk(KERN_NOTICE "RSZ B V_LPF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_H_PHS));
+ printk(KERN_NOTICE "RSZ B H_PHS = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_H_PHS_ADJ));
+ printk(KERN_NOTICE "RSZ B H_PHS_ADJ = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_H_DIF));
+ printk(KERN_NOTICE "RSZ B H_DIF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_H_TYP));
+ printk(KERN_NOTICE "RSZ B H_TYP = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_H_LPF));
+ printk(KERN_NOTICE "RSZ B H_LPF = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_DWN_EN));
+ printk(KERN_NOTICE "RSZ B DWN_EN = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_DWN_AV));
+ printk(KERN_NOTICE "RSZ B DWN_AV = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_RGB_EN));
+ printk(KERN_NOTICE "RSZ B RGB_EN = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_RGB_TYP));
+ printk(KERN_NOTICE "RSZ B RGB_TYP = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_RGB_BLD));
+ printk(KERN_NOTICE "RSZ B RGB_BLD = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_BAD_H));
+ printk(KERN_NOTICE "RSZ B SDR_Y_BAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_BAD_L));
+ printk(KERN_NOTICE "RSZ B SDR_Y_BAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_SAD_H));
+ printk(KERN_NOTICE "RSZ B SDR_Y_SAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_SAD_L));
+ printk(KERN_NOTICE "RSZ B SDR_Y_SAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_OFT));
+ printk(KERN_NOTICE "RSZ B SDR_Y_OFT = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_PTR_S));
+ printk(KERN_NOTICE "RSZ B SDR_Y_Y_PTR_S = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_Y_PTR_E));
+ printk(KERN_NOTICE "RSZ B SDR_Y_PTR_E = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_BAD_H));
+ printk(KERN_NOTICE "RSZ b SDR_C_BAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_BAD_L));
+ printk(KERN_NOTICE "RSZ B SDR_C_BAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_SAD_H));
+ printk(KERN_NOTICE "RSZ B SDR_C_SAD_H = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_SAD_L));
+ printk(KERN_NOTICE "RSZ B SDR_C_SAD_L = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_OFT));
+ printk(KERN_NOTICE "RSZ B SDR_C_OFT = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_PTR_S));
+ printk(KERN_NOTICE "RSZ B SDR_C_PTR_S = 0x%x\n", utemp);
+ utemp = regr_rsz((RSZ_EN_B + RSZ_SDR_C_PTR_E));
+ printk(KERN_NOTICE "RSZ B SDR_C_PTR_E = 0x%x\n", utemp);
+}
+#else
+void ipipe_hw_dump_config(void)
+{
+}
+#endif
+
+/* Set input channel format to either 420 Y or C format */
+int rsz_set_in_pix_format(unsigned char y_c)
+{
+ u32 utemp;
+ utemp = regr_rsz(RSZ_SRC_FMT1);
+ utemp |= (y_c & 1);
+ regw_rsz(utemp, RSZ_SRC_FMT1);
+ return 0;
+}
+
+static int rsz_set_common_params(struct ipipe_params *params)
+{
+ u32 utemp;
+ struct rsz_common_params *rsz_common = &params->rsz_common;
+
+ /* Set mode */
+ regw_rsz(params->ipipe_mode, RSZ_SRC_MODE);
+
+ /* data source selection and bypass */
+ utemp = ((rsz_common->passthrough << RSZ_BYPASS_SHIFT) |
+ (rsz_common->source));
+
+ regw_rsz(utemp, RSZ_SRC_FMT0);
+ utemp = regr_rsz(RSZ_SRC_MODE);
+ /* src image selection */
+ utemp = (rsz_common->raw_flip & 1) |
+ (rsz_common->src_img_fmt << RSZ_SRC_IMG_FMT_SHIFT) |
+ ((rsz_common->y_c & 1) << RSZ_SRC_Y_C_SEL_SHIFT);
+
+ regw_rsz(utemp, RSZ_SRC_FMT1);
+ regw_rsz(rsz_common->vps & IPIPE_RSZ_VPS_MASK, RSZ_SRC_VPS);
+ regw_rsz(rsz_common->hps & IPIPE_RSZ_HPS_MASK, RSZ_SRC_HPS);
+ regw_rsz(rsz_common->vsz & IPIPE_RSZ_VSZ_MASK, RSZ_SRC_VSZ);
+ regw_rsz(rsz_common->hsz & IPIPE_RSZ_HSZ_MASK, RSZ_SRC_HSZ);
+ regw_rsz(rsz_common->yuv_y_min, RSZ_YUV_Y_MIN);
+ regw_rsz(rsz_common->yuv_y_max, RSZ_YUV_Y_MAX);
+ regw_rsz(rsz_common->yuv_c_min, RSZ_YUV_C_MIN);
+ regw_rsz(rsz_common->yuv_c_max, RSZ_YUV_C_MAX);
+ /* chromatic position */
+ regw_rsz(rsz_common->out_chr_pos, RSZ_YUV_PHS);
+ utemp = regr_rsz(RSZ_SRC_MODE);
+ return 0;
+}
+
+static void rsz_set_rsz_regs(unsigned int rsz_id, struct ipipe_params *params)
+{
+ struct ipipe_rsz_rescale_param *rsc_params;
+ struct ipipe_rsz_resize2rgb *rgb;
+ struct ipipe_ext_mem_param *ext_mem;
+ u32 utemp, reg_base;
+
+ utemp = regr_rsz(RSZ_SEQ);
+ if (rsz_id == RSZ_A) {
+ rsc_params = &params->rsz_rsc_param[RSZ_A];
+ rgb = &params->rsz2rgb[RSZ_A];
+ ext_mem = &params->ext_mem_param[RSZ_A];
+ utemp = rsc_params->h_flip << RSZA_H_FLIP_SHIFT;
+ utemp |= rsc_params->v_flip << RSZA_V_FLIP_SHIFT;
+ reg_base = RSZ_EN_A;
+ } else {
+ rsc_params = &params->rsz_rsc_param[RSZ_B];
+ rgb = &params->rsz2rgb[RSZ_B];
+ ext_mem = &params->ext_mem_param[RSZ_B];
+ utemp = rsc_params->h_flip << RSZB_H_FLIP_SHIFT;
+ utemp |= rsc_params->v_flip << RSZB_V_FLIP_SHIFT;
+ reg_base = RSZ_EN_B;
+ }
+ /* update flip settings */
+ regw_rsz(utemp, RSZ_SEQ);
+
+ regw_rsz(rsc_params->mode, reg_base + RSZ_MODE);
+ utemp = (rsc_params->cen << RSZ_CEN_SHIFT) | rsc_params->yen;
+ regw_rsz(utemp, reg_base + RSZ_420);
+ regw_rsz(rsc_params->i_vps & RSZ_VPS_MASK, reg_base + RSZ_I_VPS);
+ regw_rsz(rsc_params->i_hps & RSZ_HPS_MASK, reg_base + RSZ_I_HPS);
+ regw_rsz(rsc_params->o_vsz & RSZ_O_VSZ_MASK, reg_base + RSZ_O_VSZ);
+ regw_rsz(rsc_params->o_hsz & RSZ_O_HSZ_MASK, reg_base + RSZ_O_HSZ);
+ regw_rsz(rsc_params->v_phs_y & RSZ_V_PHS_MASK, reg_base + RSZ_V_PHS_Y);
+ regw_rsz(rsc_params->v_phs_c & RSZ_V_PHS_MASK, reg_base + RSZ_V_PHS_C);
+ /* keep this additional adjustment to zero for now */
+ regw_rsz(rsc_params->v_dif & RSZ_V_DIF_MASK, reg_base + RSZ_V_DIF);
+
+ utemp = (rsc_params->v_typ_y & 1)
+ | ((rsc_params->v_typ_c & 1) << RSZ_TYP_C_SHIFT);
+ regw_rsz(utemp, reg_base + RSZ_V_TYP);
+
+ utemp = (rsc_params->v_lpf_int_y & RSZ_LPF_INT_MASK) |
+ ((rsc_params->v_lpf_int_c & RSZ_LPF_INT_MASK) <<
+ RSZ_LPF_INT_C_SHIFT);
+ regw_rsz(utemp, reg_base + RSZ_V_LPF);
+
+ regw_rsz(rsc_params->h_phs & RSZ_H_PHS_MASK, reg_base + RSZ_H_PHS);
+ regw_rsz(0, reg_base + RSZ_H_PHS_ADJ);
+ regw_rsz(rsc_params->h_dif & RSZ_H_DIF_MASK, reg_base + RSZ_H_DIF);
+ utemp = (rsc_params->h_typ_y & 1) |
+ ((rsc_params->h_typ_c & 1) << RSZ_TYP_C_SHIFT);
+ regw_rsz(utemp, reg_base + RSZ_H_TYP);
+ utemp = (rsc_params->h_lpf_int_y & RSZ_LPF_INT_MASK) |
+ ((rsc_params->h_lpf_int_c & RSZ_LPF_INT_MASK) <<
+ RSZ_LPF_INT_C_SHIFT);
+ regw_rsz(utemp, reg_base + RSZ_H_LPF);
+
+ regw_rsz(rsc_params->dscale_en & 1, reg_base + RSZ_DWN_EN);
+ utemp = rsc_params->h_dscale_ave_sz & RSZ_DWN_SCALE_AV_SZ_MASK;
+ utemp |= ((rsc_params->v_dscale_ave_sz & RSZ_DWN_SCALE_AV_SZ_MASK) <<
+ RSZ_DWN_SCALE_AV_SZ_V_SHIFT);
+ regw_rsz(utemp, reg_base + RSZ_DWN_AV);
+
+ /* setting rgb conversion parameters */
+ regw_rsz(rgb->rgb_en, reg_base + RSZ_RGB_EN);
+ utemp = ((rgb->rgb_typ << RSZ_RGB_TYP_SHIFT) |
+ (rgb->rgb_msk0 << RSZ_RGB_MSK0_SHIFT) |
+ (rgb->rgb_msk1) << RSZ_RGB_MSK1_SHIFT);
+ regw_rsz(utemp, reg_base + RSZ_RGB_TYP);
+ regw_rsz(rgb->rgb_alpha_val & RSZ_RGB_ALPHA_MASK,
+ reg_base + RSZ_RGB_BLD);
+
+ /* setting external memory parameters */
+ regw_rsz(ext_mem->rsz_sdr_oft_y, reg_base + RSZ_SDR_Y_OFT);
+ regw_rsz(ext_mem->rsz_sdr_ptr_s_y, reg_base + RSZ_SDR_Y_PTR_S);
+ regw_rsz(ext_mem->rsz_sdr_ptr_e_y, reg_base + RSZ_SDR_Y_PTR_E);
+ regw_rsz(ext_mem->rsz_sdr_oft_c, reg_base + RSZ_SDR_C_OFT);
+ regw_rsz(ext_mem->rsz_sdr_ptr_s_c, reg_base + RSZ_SDR_C_PTR_S);
+#ifdef CONFIG_VIDEO_YCBCR
+ regw_rsz(ext_mem->rsz_sdr_ptr_e_c, reg_base + RSZ_SDR_C_PTR_E);
+#else
+ regw_rsz((ext_mem->rsz_sdr_ptr_e_c >> 1), reg_base + RSZ_SDR_C_PTR_E);
+#endif
+}
+
+static int ipipe_setup_resizer(struct ipipe_params *params)
+{ /*set the registers of either RSZ0 or RSZ1 */
+ u32 utemp;
+
+ /* enable MMR gate to write to Resizer */
+ regw_rsz(1, RSZ_GCK_MMR);
+
+ /* Enable resizer if it is not in bypass mode */
+ if (params->rsz_common.passthrough)
+ regw_rsz(0, RSZ_GCK_SDR);
+ else
+ regw_rsz(1, RSZ_GCK_SDR);
+
+ rsz_set_common_params(params);
+
+ regw_rsz(params->rsz_en[0], RSZ_EN_A);
+ if (params->rsz_en[0]) {
+ printk(KERN_DEBUG
+ "ipipe_set_resizer, resizer - A enabled\n");
+ /*setting rescale parameters */
+ rsz_set_rsz_regs(RSZ_A, params);
+ }
+
+ regw_rsz(params->rsz_en[1], RSZ_EN_B);
+ if (params->rsz_en[1]) {
+ printk(KERN_DEBUG
+ "ipipe_set_resizer, resizer - B enabled\n");
+ rsz_set_rsz_regs(RSZ_B, params);
+ }
+ utemp = regr_rsz(RSZ_SRC_MODE);
+ return 0;
+}
+
+/* ipipe_hw_setup:It is used for Hardware Setup */
+int ipipe_hw_setup(struct ipipe_params *config)
+{
+ u32 utemp = 0;
+ u32 data_format;
+
+ if (!config) {
+ printk(KERN_ERR "NULL config block received\n");
+ return -EINVAL;
+ }
+
+ if (ipipeif_hw_setup(&config->ipipeif_param) < 0) {
+ printk(KERN_ERR "Unable to configure IPIPEIF");
+ return -EINVAL;
+ }
+
+ /* enable clock to IPIPE */
+ vpss_enable_clock(VPSS_IPIPE_CLOCK, 1);
+ /* enable clock to MMR and modules before writting
+ * to ipipe registers
+ */
+ ipipe_clock_enable();
+
+ if (config->rsz_common.source == IPIPEIF_DATA) {
+ /* we need to skip configuring IPIPE */
+ regw_ip(0, IPIPE_SRC_EN);
+ } else {
+ /* enable ipipe mode to either one shot or continuous */
+ utemp = config->ipipe_mode;
+ regw_ip((utemp), IPIPE_SRC_MODE);
+#ifdef CONFIG_VIDEO_YCBCR
+ if(config->ipipe_dpaths_fmt != IPIPE_YUV2YUV)
+#endif
+ regw_ip(1, IPIPE_SRC_EN);
+ data_format = config->ipipe_dpaths_fmt;
+ regw_ip(data_format, IPIPE_SRC_FMT);
+ /* set size */
+ regw_ip(config->ipipe_vps & IPIPE_RSZ_VPS_MASK, IPIPE_SRC_VPS);
+ regw_ip(config->ipipe_hps & IPIPE_RSZ_HPS_MASK, IPIPE_SRC_HPS);
+ regw_ip(config->ipipe_vsz & IPIPE_RSZ_VSZ_MASK, IPIPE_SRC_VSZ);
+ regw_ip(config->ipipe_hsz & IPIPE_RSZ_HSZ_MASK, IPIPE_SRC_HSZ);
+
+ if ((data_format == IPIPE_RAW2YUV) ||
+ (data_format == IPIPE_RAW2RAW)) {
+ /* Combine all the fields to make COLPAT register
+ * of IPIPE
+ */
+ utemp = (config->ipipe_colpat_elep <<
+ COLPAT_EE_SHIFT);
+ utemp |= (config->ipipe_colpat_elop <<
+ COLPAT_EO_SHIFT);
+ utemp |= (config->ipipe_colpat_olep <<
+ COLPAT_OE_SHIFT);
+ utemp |= (config->ipipe_colpat_olop <<
+ COLPAT_OO_SHIFT);
+ regw_ip(utemp, IPIPE_SRC_COL);
+ }
+ }
+ return ipipe_setup_resizer(config);
+}
+#ifdef CONFIG_VIDEO_YCBCR
+int ipipe_hw_set_ipipeif_addr(struct ipipe_params *config, unsigned int address)
+{
+ if (!config) {
+ printk(KERN_ERR "NULL config block received\n");
+ return -EINVAL;
+ }
+
+ if (ipipeif_set_address(&config->ipipeif_param,address) < 0) {
+ printk(KERN_ERR "Unable to set IPIPEIF sdram addr");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+#endif
+static void rsz_set_y_address(unsigned int address, unsigned int offset)
+{
+ u32 utemp;
+ utemp = (address & SET_LOW_ADD);
+ regw_rsz(utemp, offset + RSZ_SDR_Y_BAD_L);
+ regw_rsz(utemp, offset + RSZ_SDR_Y_SAD_L);
+ utemp = (address & SET_HIGH_ADD) >> 16;
+ regw_rsz(utemp, offset + RSZ_SDR_Y_BAD_H);
+ regw_rsz(utemp, offset + RSZ_SDR_Y_SAD_H);
+}
+
+static void rsz_set_c_address(unsigned int address, unsigned int offset)
+{
+ u32 utemp;
+ utemp = (address & SET_LOW_ADD);
+
+ regw_rsz(utemp, offset + RSZ_SDR_C_BAD_L);
+ regw_rsz(utemp, offset + RSZ_SDR_C_SAD_L);
+ utemp = (address & SET_HIGH_ADD) >> 16;
+ regw_rsz(utemp, offset + RSZ_SDR_C_BAD_H);
+ regw_rsz(utemp, offset + RSZ_SDR_C_SAD_H);
+}
+
+/* Assume we get a valid params ptr and resize_no set to RSZ_A
+ * or RSZ_B. This could be called in the interrupt context and
+ * must be efficient
+ */
+int rsz_set_output_address(struct ipipe_params *params,
+ int resize_no, unsigned int address)
+{
+ unsigned int utemp;
+ unsigned int rsz_start_add;
+ struct ipipe_ext_mem_param *mem_param =
+ &params->ext_mem_param[resize_no];
+ struct rsz_common_params *rsz_common =
+ &params->rsz_common;
+ struct ipipe_rsz_rescale_param *rsc_param =
+ &params->rsz_rsc_param[resize_no];
+
+#ifdef CONFIG_V2R_DEBUG
+ printk(KERN_DEBUG "rsz_set_output_address %d\n", resize_no);
+#endif
+ if (resize_no == RSZ_A)
+ rsz_start_add = RSZ_EN_A;
+ else
+ rsz_start_add = RSZ_EN_B;
+ /* y_c = 0 for y, = 1 for c */
+ if (rsz_common->src_img_fmt == RSZ_IMG_420) {
+ if (rsz_common->y_c) {
+ /* C channel */
+ utemp = (address + mem_param->flip_ofst_c);
+ rsz_set_c_address(utemp, rsz_start_add);
+ } else {
+ utemp = (address + mem_param->flip_ofst_y);
+ rsz_set_y_address(utemp, rsz_start_add);
+ }
+ } else {
+ if (rsc_param->cen && rsc_param->yen) {
+ /* 420 */
+ utemp = (address + mem_param->c_offset);
+ utemp = (address + mem_param->c_offset
+ + mem_param->flip_ofst_c);
+ utemp += mem_param->user_y_ofst + mem_param->user_c_ofst;
+ if (resize_no == RSZ_B)
+ utemp += params->ext_mem_param[RSZ_A].user_y_ofst +
+ params->ext_mem_param[RSZ_A].user_c_ofst;
+ /* set C address */
+ rsz_set_c_address(utemp, rsz_start_add);
+ }
+ utemp = (address + mem_param->flip_ofst_y);
+ utemp += mem_param->user_y_ofst;
+ if (resize_no == RSZ_B)
+ utemp += params->ext_mem_param[RSZ_A].user_y_ofst +
+ params->ext_mem_param[RSZ_A].user_c_ofst;
+ /* set Y address */
+ rsz_set_y_address(utemp, rsz_start_add);
+ }
+ /* resizer must be enabled */
+ regw_rsz(params->rsz_en[resize_no], rsz_start_add);
+ return 0;
+}
+
+int ipipe_set_lutdpc_regs(struct prev_lutdpc *dpc)
+{
+ u32 utemp, count, lut_start_addr = DPC_TB0_START_ADDR,
+ max_tbl_size = (LUT_DPC_MAX_SIZE >> 1);
+
+ ipipe_clock_enable();
+ regw_ip(dpc->en, DPC_LUT_EN);
+ if (1 == dpc->en) {
+ utemp = LUTDPC_TBL_256_EN;
+ utemp |= (dpc->repl_white & 1);
+ regw_ip(utemp, DPC_LUT_SEL);
+
+ regw_ip(LUT_DPC_START_ADDR, DPC_LUT_ADR);
+ regw_ip(dpc->dpc_size, DPC_LUT_SIZ & LUT_DPC_SIZE_MASK);
+ if (dpc->table != NULL) {
+ count = 0;
+ while (count < dpc->dpc_size) {
+ if (count >= max_tbl_size)
+ lut_start_addr = DPC_TB1_START_ADDR;
+ utemp =
+ (dpc->table[count].horz_pos
+ & LUT_DPC_H_POS_MASK);
+ utemp |= ((dpc->table[count].vert_pos
+ & LUT_DPC_V_POS_MASK)
+ << LUT_DPC_V_POS_SHIFT);
+ utemp |= (dpc->table[count].method
+ << LUT_DPC_CORR_METH_SHIFT);
+ w_ip_table(utemp, (lut_start_addr +
+ ((count % max_tbl_size) << 2)));
+ count++;
+ }
+ }
+
+ }
+ return 0;
+}
+
+static void set_dpc_thresholds(struct prev_otfdpc_2_0 *dpc_thr)
+{
+ regw_ip((dpc_thr->corr_thr.r & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2C_THR_R);
+ regw_ip((dpc_thr->corr_thr.gr & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2C_THR_GR);
+ regw_ip((dpc_thr->corr_thr.gb & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2C_THR_GB);
+ regw_ip((dpc_thr->corr_thr.b & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2C_THR_B);
+ regw_ip((dpc_thr->det_thr.r & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2D_THR_R);
+ regw_ip((dpc_thr->det_thr.gr & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2D_THR_GR);
+ regw_ip((dpc_thr->det_thr.gb & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2D_THR_GB);
+ regw_ip((dpc_thr->det_thr.b & OTFDPC_DPC2_THR_MASK),
+ DPC_OTF_2D_THR_B);
+}
+
+int ipipe_set_otfdpc_regs(struct prev_otfdpc *otfdpc)
+{
+ u32 utemp;
+ struct prev_otfdpc_2_0 *dpc_2_0 = &otfdpc->alg_cfg.dpc_2_0;
+ struct prev_otfdpc_3_0 *dpc_3_0 = &otfdpc->alg_cfg.dpc_3_0;
+
+ ipipe_clock_enable();
+
+ regw_ip((otfdpc->en & 1), DPC_OTF_EN);
+ if (1 == otfdpc->en) {
+ utemp = (otfdpc->det_method << OTF_DET_METHOD_SHIFT);
+ utemp |= otfdpc->alg;
+ regw_ip(utemp, DPC_OTF_TYP);
+ if (otfdpc->det_method == IPIPE_DPC_OTF_MIN_MAX) {
+ /* ALG= 0, TYP = 0, DPC_OTF_2D_THR_[x]=0
+ * DPC_OTF_2C_THR_[x] = Maximum thresohld
+ * MinMax method
+ */
+ dpc_2_0->det_thr.r = dpc_2_0->det_thr.gb =
+ dpc_2_0->det_thr.gr = dpc_2_0->det_thr.b = 0;
+ set_dpc_thresholds(dpc_2_0);
+ } else {
+ /* MinMax2 */
+ if (otfdpc->alg == IPIPE_OTFDPC_2_0)
+ set_dpc_thresholds(dpc_2_0);
+ else {
+ regw_ip((dpc_3_0->act_adj_shf
+ & OTF_DPC3_0_SHF_MASK), DPC_OTF_3_SHF);
+ /* Detection thresholds */
+ regw_ip(((dpc_3_0->det_thr
+ & OTF_DPC3_0_THR_MASK) <<
+ OTF_DPC3_0_THR_SHIFT), DPC_OTF_3D_THR);
+ regw_ip((dpc_3_0->det_slp
+ & OTF_DPC3_0_SLP_MASK),
+ DPC_OTF_3D_SLP);
+ regw_ip((dpc_3_0->det_thr_min
+ & OTF_DPC3_0_DET_MASK),
+ DPC_OTF_3D_MIN);
+ regw_ip((dpc_3_0->det_thr_max
+ & OTF_DPC3_0_DET_MASK),
+ DPC_OTF_3D_MAX);
+ /* Correction thresholds */
+ regw_ip(((dpc_3_0->corr_thr
+ & OTF_DPC3_0_THR_MASK) <<
+ OTF_DPC3_0_THR_SHIFT), DPC_OTF_3C_THR);
+ regw_ip((dpc_3_0->corr_slp
+ & OTF_DPC3_0_SLP_MASK),
+ DPC_OTF_3C_SLP);
+ regw_ip((dpc_3_0->corr_thr_min
+ & OTF_DPC3_0_CORR_MASK),
+ DPC_OTF_3C_MIN);
+ regw_ip((dpc_3_0->corr_thr_max
+ & OTF_DPC3_0_CORR_MASK),
+ DPC_OTF_3C_MAX);
+ }
+ }
+ }
+ return 0;
+}
+
+/* 2D Noise filter */
+int ipipe_set_d2f_regs(unsigned int id, struct prev_nf *noise_filter)
+{
+ u32 utemp;
+ int count = 0;
+ u32 offset = D2F_1ST;
+
+ /* id = 0 , NF1 & id = 1, NF 2 */
+ if (id)
+ offset = D2F_2ND;
+ ipipe_clock_enable();
+ regw_ip(noise_filter->en & 1, offset + D2F_EN);
+ if (1 == noise_filter->en) {
+ /* Combine all the fields to make D2F_CFG register of IPIPE */
+ utemp = ((noise_filter->spread_val & D2F_SPR_VAL_MASK) <<
+ D2F_SPR_VAL_SHIFT) |
+ ((noise_filter->shft_val & D2F_SHFT_VAL_MASK) <<
+ D2F_SHFT_VAL_SHIFT) |
+ (noise_filter->gr_sample_meth <<
+ D2F_SAMPLE_METH_SHIFT) |
+ ((noise_filter->apply_lsc_gain & 1) <<
+ D2F_APPLY_LSC_GAIN_SHIFT) | D2F_USE_SPR_REG_VAL;
+
+ regw_ip(utemp, offset + D2F_TYP);
+ /* edge detection minimum */
+ regw_ip(noise_filter->edge_det_min_thr & D2F_EDGE_DET_THR_MASK,
+ offset + D2F_EDG_MIN);
+ /* edge detection maximum */
+ regw_ip(noise_filter->edge_det_max_thr & D2F_EDGE_DET_THR_MASK,
+ offset + D2F_EDG_MAX);
+ count = 0;
+ while (count < IPIPE_NF_STR_TABLE_SIZE) {
+ regw_ip((noise_filter->str[count] & D2F_STR_VAL_MASK),
+ offset + D2F_STR + count * 4);
+ count++;
+ }
+ count = 0;
+ while (count < IPIPE_NF_THR_TABLE_SIZE) {
+ regw_ip(noise_filter->thr[count] & D2F_THR_VAL_MASK,
+ offset + D2F_THR + count * 4);
+ count++;
+ }
+ }
+ return 0;
+}
+
+#define IPIPE_U8Q5(decimal, integer) \
+ (((decimal & 0x1f) | ((integer & 0x7) << 5)))
+
+/* Green Imbalance Correction */
+int ipipe_set_gic_regs(struct prev_gic *gic)
+{
+ u32 utemp;
+ ipipe_clock_enable();
+ regw_ip(gic->en & 1, GIC_EN);
+ if (gic->en) {
+ utemp = gic->wt_fn_type << GIC_TYP_SHIFT;
+ utemp |= (gic->thr_sel << GIC_THR_SEL_SHIFT);
+ utemp |= ((gic->apply_lsc_gain & 1) <<
+ GIC_APPLY_LSC_GAIN_SHIFT);
+ regw_ip(utemp, GIC_TYP);
+ regw_ip(gic->gain & GIC_GAIN_MASK, GIC_GAN);
+ if (gic->gic_alg == IPIPE_GIC_ALG_ADAPT_GAIN) {
+ if (gic->thr_sel == IPIPE_GIC_THR_REG) {
+ regw_ip(gic->thr & GIC_THR_MASK, GIC_THR);
+ regw_ip(gic->slope & GIC_SLOPE_MASK, GIC_SLP);
+ } else {
+ /* Use NF thresholds */
+ utemp = IPIPE_U8Q5(gic->nf2_thr_gain.decimal, \
+ gic->nf2_thr_gain.integer);
+ regw_ip(utemp, GIC_NFGAN);
+ }
+ } else
+ /* Constant Gain. Set threshold to maximum */
+ regw_ip(GIC_THR_MASK, GIC_THR);
+ }
+ return 0;
+}
+
+#define IPIPE_U13Q9(decimal, integer) \
+ (((decimal & 0x1ff) | ((integer & 0xf) << 9)))
+/* White balance */
+int ipipe_set_wb_regs(struct prev_wb *wb)
+{
+ u32 utemp;
+
+ ipipe_clock_enable();
+ /* Ofsets. S12 */
+ regw_ip(wb->ofst_r & WB_OFFSET_MASK, WB2_OFT_R);
+ regw_ip(wb->ofst_gr & WB_OFFSET_MASK, WB2_OFT_GR);
+ regw_ip(wb->ofst_gb & WB_OFFSET_MASK, WB2_OFT_GB);
+ regw_ip(wb->ofst_b & WB_OFFSET_MASK, WB2_OFT_B);
+
+ /* Gains. U13Q9 */
+ utemp = IPIPE_U13Q9((wb->gain_r.decimal), (wb->gain_r.integer));
+ regw_ip(utemp, WB2_WGN_R);
+ utemp = IPIPE_U13Q9((wb->gain_gr.decimal), (wb->gain_gr.integer));
+ regw_ip(utemp, WB2_WGN_GR);
+ utemp = IPIPE_U13Q9((wb->gain_gb.decimal), (wb->gain_gb.integer));
+ regw_ip(utemp, WB2_WGN_GB);
+ utemp = IPIPE_U13Q9((wb->gain_b.decimal), (wb->gain_b.integer));
+ regw_ip(utemp, WB2_WGN_B);
+ return 0;
+}
+
+/* CFA */
+int ipipe_set_cfa_regs(struct prev_cfa *cfa)
+{
+ ipipe_clock_enable();
+ regw_ip(cfa->alg, CFA_MODE);
+ regw_ip(cfa->hpf_thr_2dir & CFA_HPF_THR_2DIR_MASK, CFA_2DIR_HPF_THR);
+ regw_ip(cfa->hpf_slp_2dir & CFA_HPF_SLOPE_2DIR_MASK, CFA_2DIR_HPF_SLP);
+ regw_ip(cfa->hp_mix_thr_2dir & CFA_HPF_MIX_THR_2DIR_MASK,
+ CFA_2DIR_MIX_THR);
+ regw_ip(cfa->hp_mix_slope_2dir & CFA_HPF_MIX_SLP_2DIR_MASK,
+ CFA_2DIR_MIX_SLP);
+ regw_ip(cfa->dir_thr_2dir & CFA_DIR_THR_2DIR_MASK, CFA_2DIR_DIR_THR);
+ regw_ip(cfa->dir_slope_2dir & CFA_DIR_SLP_2DIR_MASK, CFA_2DIR_DIR_SLP);
+ regw_ip(cfa->nd_wt_2dir & CFA_ND_WT_2DIR_MASK, CFA_2DIR_NDWT);
+ regw_ip(cfa->hue_fract_daa & CFA_DAA_HUE_FRA_MASK, CFA_MONO_HUE_FRA);
+ regw_ip(cfa->edge_thr_daa & CFA_DAA_EDG_THR_MASK, CFA_MONO_EDG_THR);
+ regw_ip(cfa->thr_min_daa & CFA_DAA_THR_MIN_MASK, CFA_MONO_THR_MIN);
+ regw_ip(cfa->thr_slope_daa & CFA_DAA_THR_SLP_MASK, CFA_MONO_THR_SLP);
+ regw_ip(cfa->slope_min_daa & CFA_DAA_SLP_MIN_MASK, CFA_MONO_SLP_MIN);
+ regw_ip(cfa->slope_slope_daa & CFA_DAA_SLP_SLP_MASK, CFA_MONO_SLP_SLP);
+ regw_ip(cfa->lp_wt_daa & CFA_DAA_LP_WT_MASK, CFA_MONO_LPWT);
+ return 0;
+}
+
+int ipipe_set_rgb2rgb_regs(unsigned int id, struct prev_rgb2rgb *rgb)
+{
+ u32 utemp, offset = RGB1_MUL_BASE, offset_mask = RGB2RGB_1_OFST_MASK,
+ integ_mask = 0xf;
+
+ ipipe_clock_enable();
+
+ if (id) {
+ /* For second RGB module, gain integer is 3 bits instead
+ of 4, offset has 11 bits insread of 13 */
+ offset = RGB2_MUL_BASE;
+ integ_mask = 0x7;
+ offset_mask = RGB2RGB_2_OFST_MASK;
+ }
+ /* Gains */
+ utemp = ((rgb->coef_rr.decimal & 0xff) |
+ (((rgb->coef_rr.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_RR);
+ utemp = ((rgb->coef_gr.decimal & 0xff) |
+ (((rgb->coef_gr.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_GR);
+ utemp = ((rgb->coef_br.decimal & 0xff) |
+ (((rgb->coef_br.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_BR);
+ utemp = ((rgb->coef_rg.decimal & 0xff) |
+ (((rgb->coef_rg.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_RG);
+ utemp = ((rgb->coef_gg.decimal & 0xff) |
+ (((rgb->coef_gg.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_GG);
+ utemp = ((rgb->coef_bg.decimal & 0xff) |
+ (((rgb->coef_bg.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_BG);
+ utemp = ((rgb->coef_rb.decimal & 0xff) |
+ (((rgb->coef_rb.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_RB);
+ utemp = ((rgb->coef_gb.decimal & 0xff) |
+ (((rgb->coef_gb.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_GB);
+ utemp = ((rgb->coef_bb.decimal & 0xff) |
+ (((rgb->coef_bb.integer) & integ_mask) << 8));
+ regw_ip(utemp, offset + RGB_MUL_BB);
+
+ /* Offsets */
+ regw_ip(rgb->out_ofst_r & offset_mask, offset + RGB_OFT_OR);
+ regw_ip(rgb->out_ofst_g & offset_mask, offset + RGB_OFT_OG);
+ regw_ip(rgb->out_ofst_b & offset_mask, offset + RGB_OFT_OB);
+ return 0;
+}
+
+static void ipipe_update_gamma_tbl(struct ipipe_gamma_entry *table,
+ int size, u32 addr)
+{
+ int count;
+ u32 utemp;
+
+ for (count = 0; count < size; count++) {
+ utemp = table[count].slope & GAMMA_MASK;
+ utemp |= ((table[count].offset & GAMMA_MASK) << GAMMA_SHIFT);
+ w_ip_table(utemp, (addr + (count * 4)));
+ }
+}
+
+/* Gamma correction */
+int ipipe_set_gamma_regs(struct prev_gamma *gamma)
+{
+ u32 utemp;
+ int table_size = 0;
+
+ ipipe_clock_enable();
+ utemp = ((gamma->bypass_r << GAMMA_BYPR_SHIFT)
+ | (gamma->bypass_b << GAMMA_BYPG_SHIFT)
+ | (gamma->bypass_g << GAMMA_BYPB_SHIFT)
+ | (gamma->tbl_sel << GAMMA_TBL_SEL_SHIFT)
+ | (gamma->tbl_size << GAMMA_TBL_SIZE_SHIFT));
+
+ regw_ip(utemp, GMM_CFG);
+ if (gamma->tbl_sel == IPIPE_GAMMA_TBL_RAM) {
+ if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_64)
+ table_size = 64;
+ else if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_128)
+ table_size = 128;
+ else if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_256)
+ table_size = 256;
+ else if (gamma->tbl_size == IPIPE_GAMMA_TBL_SZ_512)
+ table_size = 512;
+ if (!(gamma->bypass_r)) {
+ if (gamma->table_r != NULL)
+ ipipe_update_gamma_tbl(gamma->table_r,
+ table_size,
+ GAMMA_R_START_ADDR);
+ }
+ if (!(gamma->bypass_b)) {
+ if (gamma->table_b != NULL)
+ ipipe_update_gamma_tbl(gamma->table_b,
+ table_size,
+ GAMMA_B_START_ADDR);
+ }
+ if (!(gamma->bypass_g)) {
+ if (gamma->table_g != NULL)
+ ipipe_update_gamma_tbl(gamma->table_g,
+ table_size,
+ GAMMA_G_START_ADDR);
+ }
+
+ }
+ return 0;
+}
+
+/* 3D LUT */
+int ipipe_set_3d_lut_regs(struct prev_3d_lut *lut_3d)
+{
+ u32 utemp, i, bnk_index, tbl_index;
+ struct ipipe_3d_lut_entry *tbl;
+
+ ipipe_clock_enable();
+ regw_ip(lut_3d->en, D3LUT_EN);
+ if (lut_3d->en) {
+ if (lut_3d->table) {
+ tbl = lut_3d->table;
+ for (i = 0 ; i < MAX_SIZE_3D_LUT; i++) {
+ /* Each entry has 0-9 (B), 10-19 (G) and
+ 20-29 R values */
+ utemp = (tbl[i].b & D3_LUT_ENTRY_MASK);
+ utemp |= ((tbl[i].g & D3_LUT_ENTRY_MASK) <<
+ D3_LUT_ENTRY_G_SHIFT);
+ utemp |= ((tbl[i].r & D3_LUT_ENTRY_MASK) <<
+ D3_LUT_ENTRY_R_SHIFT);
+ bnk_index = (i % 4);
+ tbl_index = (i >> 2);
+ tbl_index <<= 2;
+ if (bnk_index == 0)
+ w_ip_table(utemp,
+ tbl_index + D3L_TB0_START_ADDR);
+ else if (bnk_index == 1)
+ w_ip_table(utemp,
+ tbl_index + D3L_TB1_START_ADDR);
+ else if (bnk_index == 2)
+ w_ip_table(utemp,
+ tbl_index + D3L_TB2_START_ADDR);
+ else
+ w_ip_table(utemp,
+ tbl_index + D3L_TB3_START_ADDR);
+ }
+ }
+ }
+ return 0;
+}
+
+/* Lumina adjustments */
+int ipipe_set_lum_adj_regs(struct prev_lum_adj *lum_adj)
+{
+ u32 utemp;
+
+ ipipe_clock_enable();
+ /* combine fields of YUV_ADJ to set brightness and contrast */
+ utemp = ((lum_adj->contrast << LUM_ADJ_CONTR_SHIFT)
+ |(lum_adj->brightness << LUM_ADJ_BRIGHT_SHIFT));
+ regw_ip(utemp, YUV_ADJ);
+ return 0;
+}
+
+#define IPIPE_S12Q8(decimal, integer) \
+ (((decimal & 0xff) | ((integer & 0xf) << 8)))
+/* RGB2YUV */
+int ipipe_set_rgb2ycbcr_regs(struct prev_rgb2yuv *yuv)
+{
+ u32 utemp;
+
+ /* S10Q8 */
+ ipipe_clock_enable();
+ utemp = IPIPE_S12Q8((yuv->coef_ry.decimal), (yuv->coef_ry.integer));
+ regw_ip(utemp, YUV_MUL_RY);
+ utemp = IPIPE_S12Q8((yuv->coef_gy.decimal), (yuv->coef_gy.integer));
+ regw_ip(utemp, YUV_MUL_GY);
+ utemp = IPIPE_S12Q8((yuv->coef_by.decimal), (yuv->coef_by.integer));
+ regw_ip(utemp, YUV_MUL_BY);
+ utemp = IPIPE_S12Q8((yuv->coef_rcb.decimal), (yuv->coef_rcb.integer));
+ regw_ip(utemp, YUV_MUL_RCB);
+ utemp = IPIPE_S12Q8((yuv->coef_gcb.decimal), (yuv->coef_gcb.integer));
+ regw_ip(utemp, YUV_MUL_GCB);
+ utemp = IPIPE_S12Q8((yuv->coef_bcb.decimal), (yuv->coef_bcb.integer));
+ regw_ip(utemp, YUV_MUL_BCB);
+ utemp = IPIPE_S12Q8((yuv->coef_rcr.decimal), (yuv->coef_rcr.integer));
+ regw_ip(utemp, YUV_MUL_RCR);
+ utemp = IPIPE_S12Q8((yuv->coef_gcr.decimal), (yuv->coef_gcr.integer));
+ regw_ip(utemp, YUV_MUL_GCR);
+ utemp = IPIPE_S12Q8((yuv->coef_bcr.decimal), (yuv->coef_bcr.integer));
+ regw_ip(utemp, YUV_MUL_BCR);
+ regw_ip(yuv->out_ofst_y & RGB2YCBCR_OFST_MASK, YUV_OFT_Y);
+ regw_ip(yuv->out_ofst_cb & RGB2YCBCR_OFST_MASK, YUV_OFT_CB);
+ regw_ip(yuv->out_ofst_cr & RGB2YCBCR_OFST_MASK, YUV_OFT_CR);
+ return 0;
+}
+
+/* YUV 422 conversion */
+int ipipe_set_yuv422_conv_regs(struct prev_yuv422_conv *conv)
+{
+ u32 utemp;
+
+ ipipe_clock_enable();
+ /* Combine all the fields to make YUV_PHS register of IPIPE */
+ utemp = ((conv->chrom_pos << 0) | (conv->en_chrom_lpf << 1));
+ regw_ip(utemp, YUV_PHS);
+ return 0;
+}
+
+/* GBCE */
+int ipipe_set_gbce_regs(struct prev_gbce *gbce)
+{
+ unsigned int count, tbl_index;
+ u32 utemp = 0, mask = GBCE_Y_VAL_MASK;
+
+ if (gbce->type == IPIPE_GBCE_GAIN_TBL)
+ mask = GBCE_GAIN_VAL_MASK;
+
+ ipipe_clock_enable();
+ regw_ip(gbce->en & 1, GBCE_EN);
+ if (gbce->en) {
+ regw_ip(gbce->type, GBCE_TYP);
+ if (gbce->table) {
+ for (count = 0; count < MAX_SIZE_GBCE_LUT; count++) {
+ tbl_index = count >> 1;
+ tbl_index <<= 2;
+ /* Each table has 2 LUT entries, first in LS
+ * and second in MS positions
+ */
+ if (count % 2) {
+ utemp |=
+ ((gbce->table[count] & mask) <<
+ GBCE_ENTRY_SHIFT);
+ w_ip_table(utemp,
+ tbl_index + GBCE_TB_START_ADDR);
+ } else
+ utemp = gbce->table[count] & mask;
+ }
+ }
+ }
+ return 0;
+}
+/* Edge Enhancement */
+int ipipe_set_ee_regs(struct prev_yee *ee)
+{
+ unsigned int count, tbl_index;
+ u32 utemp;
+
+ ipipe_clock_enable();
+ regw_ip(ee->en, YEE_EN);
+ if (1 == ee->en) {
+ utemp = ee->en_halo_red & 1;
+ utemp |= (ee->merge_meth << YEE_HALO_RED_EN_SHIFT);
+ regw_ip(utemp, YEE_TYP);
+ regw_ip(ee->hpf_shft, YEE_SHF);
+ regw_ip(ee->hpf_coef_00 & YEE_COEF_MASK, YEE_MUL_00);
+ regw_ip(ee->hpf_coef_01 & YEE_COEF_MASK, YEE_MUL_01);
+ regw_ip(ee->hpf_coef_02 & YEE_COEF_MASK, YEE_MUL_02);
+ regw_ip(ee->hpf_coef_10 & YEE_COEF_MASK, YEE_MUL_10);
+ regw_ip(ee->hpf_coef_11 & YEE_COEF_MASK, YEE_MUL_11);
+ regw_ip(ee->hpf_coef_12 & YEE_COEF_MASK, YEE_MUL_12);
+ regw_ip(ee->hpf_coef_20 & YEE_COEF_MASK, YEE_MUL_20);
+ regw_ip(ee->hpf_coef_21 & YEE_COEF_MASK, YEE_MUL_21);
+ regw_ip(ee->hpf_coef_22 & YEE_COEF_MASK, YEE_MUL_22);
+ regw_ip(ee->yee_thr & YEE_THR_MASK, YEE_THR);
+ regw_ip(ee->es_gain & YEE_ES_GAIN_MASK, YEE_E_GAN);
+ regw_ip(ee->es_thr1 & YEE_ES_THR1_MASK, YEE_E_THR1);
+ regw_ip(ee->es_thr2 & YEE_THR_MASK, YEE_E_THR2);
+ regw_ip(ee->es_gain_grad & YEE_THR_MASK, YEE_G_GAN);
+ regw_ip(ee->es_ofst_grad & YEE_THR_MASK, YEE_G_OFT);
+
+ if (ee->table != NULL) {
+ for (count = 0; count < MAX_SIZE_YEE_LUT; count++) {
+ tbl_index = count >> 1;
+ tbl_index <<= 2;
+ /* Each table has 2 LUT entries, first in LS
+ * and second in MS positions
+ */
+ if (count % 2) {
+ utemp |= ((ee->table[count] &
+ YEE_ENTRY_MASK) <<
+ YEE_ENTRY_SHIFT);
+ w_ip_table(utemp,
+ tbl_index + YEE_TB_START_ADDR);
+ } else
+ utemp = ee->table[count] &
+ YEE_ENTRY_MASK;
+ }
+ }
+ }
+ return 0;
+}
+
+/* Chromatic Artifact Correction. CAR */
+static void ipipe_set_mf(void)
+{
+ /* typ to dynamic switch */
+ regw_ip(IPIPE_CAR_DYN_SWITCH, CAR_TYP);
+ /* Set SW0 to maximum */
+ regw_ip(CAR_MF_THR, CAR_SW);
+}
+
+static void ipipe_set_gain_ctrl(struct prev_car *car)
+{
+ regw_ip(IPIPE_CAR_CHR_GAIN_CTRL, CAR_TYP);
+ regw_ip(car->hpf, CAR_HPF_TYP);
+ regw_ip(car->hpf_shft & CAR_HPF_SHIFT_MASK, CAR_HPF_SHF);
+ regw_ip(car->hpf_thr, CAR_HPF_THR);
+ regw_ip(car->gain1.gain, CAR_GN1_GAN);
+ regw_ip(car->gain1.shft & CAR_GAIN1_SHFT_MASK, CAR_GN1_SHF);
+ regw_ip(car->gain1.gain_min & CAR_GAIN_MIN_MASK, CAR_GN1_MIN);
+ regw_ip(car->gain2.gain, CAR_GN2_GAN);
+ regw_ip(car->gain2.shft & CAR_GAIN2_SHFT_MASK, CAR_GN2_SHF);
+ regw_ip(car->gain2.gain_min & CAR_GAIN_MIN_MASK, CAR_GN2_MIN);
+}
+
+int ipipe_set_car_regs(struct prev_car *car)
+{
+ u32 utemp;
+ ipipe_clock_enable();
+ regw_ip(car->en, CAR_EN);
+ if (car->en) {
+ switch (car->meth) {
+ case IPIPE_CAR_MED_FLTR:
+ {
+ ipipe_set_mf();
+ break;
+ }
+ case IPIPE_CAR_CHR_GAIN_CTRL:
+ {
+ ipipe_set_gain_ctrl(car);
+ break;
+ }
+ default:
+ {
+ /* Dynamic switch between MF and Gain Ctrl. */
+ ipipe_set_mf();
+ ipipe_set_gain_ctrl(car);
+ /* Set the threshold for switching between
+ * the two Here we overwrite the MF SW0 value
+ */
+ regw_ip(IPIPE_CAR_DYN_SWITCH, CAR_TYP);
+ utemp = car->sw1;
+ utemp <<= CAR_SW1_SHIFT;
+ utemp |= car->sw0;
+ regw_ip(utemp, CAR_SW);
+ }
+ }
+ }
+ return 0;
+}
+
+/* Chromatic Gain Suppression */
+int ipipe_set_cgs_regs(struct prev_cgs *cgs)
+{
+ ipipe_clock_enable();
+ regw_ip(cgs->en, CGS_EN);
+ if (cgs->en) {
+ /* Set the bright side parameters */
+ regw_ip(cgs->h_thr, CGS_GN1_H_THR);
+ regw_ip(cgs->h_slope, CGS_GN1_H_GAN);
+ regw_ip(cgs->h_shft & CAR_SHIFT_MASK, CGS_GN1_H_SHF);
+ regw_ip(cgs->h_min, CGS_GN1_H_MIN);
+ }
+ return 0;
+}
+
+void rsz_src_enable(int enable)
+{
+ regw_rsz(enable, RSZ_SRC_EN);
+}
+
+int rsz_enable(int rsz_id, int enable)
+{
+ if (rsz_id == RSZ_A) {
+ regw_rsz(enable, RSZ_EN_A);
+ /* We always enable RSZ_A. RSZ_B is enable upon request from
+ * application. So enable RSZ_SRC_EN along with RSZ_A
+ */
+ regw_rsz(enable, RSZ_SRC_EN);
+ } else if (rsz_id == RSZ_B)
+ regw_rsz(enable, RSZ_EN_B);
+ else
+ return -EINVAL;
+ return 0;
+}
diff --git a/drivers/char/dm365_ipipe_hw.h b/drivers/char/dm365_ipipe_hw.h
new file mode 100644
index 00000000..46c9627c
--- /dev/null
+++ b/drivers/char/dm365_ipipe_hw.h
@@ -0,0 +1,541 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef _DM365_IPIPE_HW_H
+#define _DM365_IPIPE_HW_H
+
+#ifdef __KERNEL__
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#define IPIPE_IOBASE_VADDR IO_ADDRESS(0x01C70800)
+#define RSZ_IOBASE_VADDR IO_ADDRESS(0x01C70400)
+#define IPIPE_INT_TABLE_IOBASE_VADDR IO_ADDRESS(0x01C70000)
+
+#define SET_LOW_ADD 0x0000FFFF
+#define SET_HIGH_ADD 0xFFFF0000
+
+/* Below are the internal tables */
+#define DPC_TB0_START_ADDR (0x8000)
+#define DPC_TB1_START_ADDR (0x8400)
+
+#define GAMMA_R_START_ADDR (0xA800)
+#define GAMMA_G_START_ADDR (0xB000)
+#define GAMMA_B_START_ADDR (0xB800)
+
+/* RAM table addresses for edge enhancement correction*/
+#define YEE_TB_START_ADDR (0x8800)
+
+/* RAM table address for GBC LUT */
+#define GBCE_TB_START_ADDR (0x9000)
+
+/* RAM table for 3D NF LUT */
+#define D3L_TB0_START_ADDR (0x9800)
+#define D3L_TB1_START_ADDR (0x9C00)
+#define D3L_TB2_START_ADDR (0xA000)
+#define D3L_TB3_START_ADDR (0xA400)
+
+/* IPIPE Register Offsets from the base address */
+#define IPIPE_SRC_EN (0x0000)
+#define IPIPE_SRC_MODE (0x0004)
+#define IPIPE_SRC_FMT (0x0008)
+#define IPIPE_SRC_COL (0x000C)
+#define IPIPE_SRC_VPS (0x0010)
+#define IPIPE_SRC_VSZ (0x0014)
+#define IPIPE_SRC_HPS (0x0018)
+#define IPIPE_SRC_HSZ (0x001C)
+
+#define IPIPE_SEL_SBU (0x0020)
+
+#define IPIPE_DMA_STA (0x0024)
+#define IPIPE_GCK_MMR (0x0028)
+#define IPIPE_GCK_PIX (0x002C)
+#define IPIPE_RESERVED0 (0x0030)
+
+/* Defect Correction */
+#define DPC_LUT_EN (0x0034)
+#define DPC_LUT_SEL (0x0038)
+#define DPC_LUT_ADR (0x003C)
+#define DPC_LUT_SIZ (0x0040)
+#define DPC_OTF_EN (0x0044)
+#define DPC_OTF_TYP (0x0048)
+#define DPC_OTF_2D_THR_R (0x004C)
+#define DPC_OTF_2D_THR_GR (0x0050)
+#define DPC_OTF_2D_THR_GB (0x0054)
+#define DPC_OTF_2D_THR_B (0x0058)
+#define DPC_OTF_2C_THR_R (0x005C)
+#define DPC_OTF_2C_THR_GR (0x0060)
+#define DPC_OTF_2C_THR_GB (0x0064)
+#define DPC_OTF_2C_THR_B (0x0068)
+#define DPC_OTF_3_SHF (0x006C)
+#define DPC_OTF_3D_THR (0x0070)
+#define DPC_OTF_3D_SLP (0x0074)
+#define DPC_OTF_3D_MIN (0x0078)
+#define DPC_OTF_3D_MAX (0x007C)
+#define DPC_OTF_3C_THR (0x0080)
+#define DPC_OTF_3C_SLP (0x0084)
+#define DPC_OTF_3C_MIN (0x0088)
+#define DPC_OTF_3C_MAX (0x008C)
+
+/* Lense Shading Correction */
+#define LSC_VOFT (0x90)
+#define LSC_VA2 (0x94)
+#define LSC_VA1 (0x98)
+#define LSC_VS (0x9C)
+#define LSC_HOFT (0xA0)
+#define LSC_HA2 (0xA4)
+#define LSC_HA1 (0xA8)
+#define LSC_HS (0xAC)
+#define LSC_GAIN_R (0xB0)
+#define LSC_GAIN_GR (0xB4)
+#define LSC_GAIN_GB (0xB8)
+#define LSC_GAIN_B (0xBC)
+#define LSC_OFT_R (0xC0)
+#define LSC_OFT_GR (0xC4)
+#define LSC_OFT_GB (0xC8)
+#define LSC_OFT_B (0xCC)
+#define LSC_SHF (0xD0)
+#define LSC_MAX (0xD4)
+
+/* Noise Filter 1. Ofsets from start address given */
+#define D2F_1ST (0xD8)
+#define D2F_EN (0x0)
+#define D2F_TYP (0x4)
+#define D2F_THR (0x8)
+#define D2F_STR (0x28)
+#define D2F_SPR (0x48)
+#define D2F_EDG_MIN (0x68)
+#define D2F_EDG_MAX (0x6C)
+
+/* Noise Filter 2 */
+#define D2F_2ND (0x148)
+
+/* GIC */
+#define GIC_EN (0x1B8)
+#define GIC_TYP (0x1BC)
+#define GIC_GAN (0x1C0)
+#define GIC_NFGAN (0x1C4)
+#define GIC_THR (0x1C8)
+#define GIC_SLP (0x1CC)
+
+/* White Balance */
+#define WB2_OFT_R (0x1D0)
+#define WB2_OFT_GR (0x1D4)
+#define WB2_OFT_GB (0x1D8)
+#define WB2_OFT_B (0x1DC)
+#define WB2_WGN_R (0x1E0)
+#define WB2_WGN_GR (0x1E4)
+#define WB2_WGN_GB (0x1E8)
+#define WB2_WGN_B (0x1EC)
+
+/* CFA interpolation */
+#define CFA_MODE (0x1F0)
+#define CFA_2DIR_HPF_THR (0x1F4)
+#define CFA_2DIR_HPF_SLP (0x1F8)
+#define CFA_2DIR_MIX_THR (0x1FC)
+#define CFA_2DIR_MIX_SLP (0x200)
+#define CFA_2DIR_DIR_THR (0x204)
+#define CFA_2DIR_DIR_SLP (0x208)
+#define CFA_2DIR_NDWT (0x20C)
+#define CFA_MONO_HUE_FRA (0x210)
+#define CFA_MONO_EDG_THR (0x214)
+#define CFA_MONO_THR_MIN (0x218)
+#define CFA_MONO_THR_SLP (0x21C)
+#define CFA_MONO_SLP_MIN (0x220)
+#define CFA_MONO_SLP_SLP (0x224)
+#define CFA_MONO_LPWT (0x228)
+
+/* RGB to RGB conversiona - 1st */
+#define RGB1_MUL_BASE (0x22C)
+/* Offsets from base */
+#define RGB_MUL_RR (0x0)
+#define RGB_MUL_GR (0x4)
+#define RGB_MUL_BR (0x8)
+#define RGB_MUL_RG (0xC)
+#define RGB_MUL_GG (0x10)
+#define RGB_MUL_BG (0x14)
+#define RGB_MUL_RB (0x18)
+#define RGB_MUL_GB (0x1C)
+#define RGB_MUL_BB (0x20)
+#define RGB_OFT_OR (0x24)
+#define RGB_OFT_OG (0x28)
+#define RGB_OFT_OB (0x2C)
+
+/* Gamma */
+#define GMM_CFG (0x25C)
+
+/* RGB to RGB conversiona - 2nd */
+#define RGB2_MUL_BASE (0x260)
+
+/* 3D LUT */
+#define D3LUT_EN (0x290)
+
+/* RGB to YUV(YCbCr) conversion */
+#define YUV_ADJ (0x294)
+#define YUV_MUL_RY (0x298)
+#define YUV_MUL_GY (0x29C)
+#define YUV_MUL_BY (0x2A0)
+#define YUV_MUL_RCB (0x2A4)
+#define YUV_MUL_GCB (0x2A8)
+#define YUV_MUL_BCB (0x2AC)
+#define YUV_MUL_RCR (0x2B0)
+#define YUV_MUL_GCR (0x2B4)
+#define YUV_MUL_BCR (0x2B8)
+#define YUV_OFT_Y (0x2BC)
+#define YUV_OFT_CB (0x2C0)
+#define YUV_OFT_CR (0x2C4)
+#define YUV_PHS (0x2C8)
+
+/* Global Brightness and Contrast */
+#define GBCE_EN (0x2CC)
+#define GBCE_TYP (0x2D0)
+
+/* Edge Enhancer */
+#define YEE_EN (0x2D4)
+#define YEE_TYP (0x2D8)
+#define YEE_SHF (0x2DC)
+#define YEE_MUL_00 (0x2E0)
+#define YEE_MUL_01 (0x2E4)
+#define YEE_MUL_02 (0x2E8)
+#define YEE_MUL_10 (0x2EC)
+#define YEE_MUL_11 (0x2F0)
+#define YEE_MUL_12 (0x2F4)
+#define YEE_MUL_20 (0x2F8)
+#define YEE_MUL_21 (0x2FC)
+#define YEE_MUL_22 (0x300)
+#define YEE_THR (0x304)
+#define YEE_E_GAN (0x308)
+#define YEE_E_THR1 (0x30C)
+#define YEE_E_THR2 (0x310)
+#define YEE_G_GAN (0x314)
+#define YEE_G_OFT (0x318)
+
+/* Chroma Artifact Reduction */
+#define CAR_EN (0x31C)
+#define CAR_TYP (0x320)
+#define CAR_SW (0x324)
+#define CAR_HPF_TYP (0x328)
+#define CAR_HPF_SHF (0x32C)
+#define CAR_HPF_THR (0x330)
+#define CAR_GN1_GAN (0x334)
+#define CAR_GN1_SHF (0x338)
+#define CAR_GN1_MIN (0x33C)
+#define CAR_GN2_GAN (0x340)
+#define CAR_GN2_SHF (0x344)
+#define CAR_GN2_MIN (0x348)
+
+/* Chroma Gain Suppression */
+#define CGS_EN (0x34C)
+#define CGS_GN1_L_THR (0x350)
+#define CGS_GN1_L_GAN (0x354)
+#define CGS_GN1_L_SHF (0x358)
+#define CGS_GN1_L_MIN (0x35C)
+#define CGS_GN1_H_THR (0x360)
+#define CGS_GN1_H_GAN (0x364)
+#define CGS_GN1_H_SHF (0x368)
+#define CGS_GN1_H_MIN (0x36C)
+#define CGS_GN2_L_THR (0x370)
+#define CGS_GN2_L_GAN (0x374)
+#define CGS_GN2_L_SHF (0x378)
+#define CGS_GN2_L_MIN (0x37C)
+
+/* Resizer */
+#define RSZ_SRC_EN (0x0)
+#define RSZ_SRC_MODE (0x4)
+#define RSZ_SRC_FMT0 (0x8)
+#define RSZ_SRC_FMT1 (0xC)
+#define RSZ_SRC_VPS (0x10)
+#define RSZ_SRC_VSZ (0x14)
+#define RSZ_SRC_HPS (0x18)
+#define RSZ_SRC_HSZ (0x1C)
+#define RSZ_DMA_RZA (0x20)
+#define RSZ_DMA_RZB (0x24)
+#define RSZ_DMA_STA (0x28)
+#define RSZ_GCK_MMR (0x2C)
+#define RSZ_RESERVED0 (0x30)
+#define RSZ_GCK_SDR (0x34)
+#define RSZ_IRQ_RZA (0x38)
+#define RSZ_IRQ_RZB (0x3C)
+#define RSZ_YUV_Y_MIN (0x40)
+#define RSZ_YUV_Y_MAX (0x44)
+#define RSZ_YUV_C_MIN (0x48)
+#define RSZ_YUV_C_MAX (0x4C)
+#define RSZ_YUV_PHS (0x50)
+#define RSZ_SEQ (0x54)
+
+/* Resizer Rescale Parameters */
+#define RSZ_EN_A (0x58)
+#define RSZ_EN_B (0xE8)
+/* offset of the registers to be added with base register of
+ either RSZ0 or RSZ1
+*/
+#define RSZ_MODE (0x4)
+#define RSZ_420 (0x8)
+#define RSZ_I_VPS (0xC)
+#define RSZ_I_HPS (0x10)
+#define RSZ_O_VSZ (0x14)
+#define RSZ_O_HSZ (0x18)
+#define RSZ_V_PHS_Y (0x1C)
+#define RSZ_V_PHS_C (0x20)
+#define RSZ_V_DIF (0x24)
+#define RSZ_V_TYP (0x28)
+#define RSZ_V_LPF (0x2C)
+#define RSZ_H_PHS (0x30)
+#define RSZ_H_PHS_ADJ (0x34)
+#define RSZ_H_DIF (0x38)
+#define RSZ_H_TYP (0x3C)
+#define RSZ_H_LPF (0x40)
+#define RSZ_DWN_EN (0x44)
+#define RSZ_DWN_AV (0x48)
+
+/* Resizer RGB Conversion Parameters */
+#define RSZ_RGB_EN (0x4C)
+#define RSZ_RGB_TYP (0x50)
+#define RSZ_RGB_BLD (0x54)
+
+/* Resizer External Memory Parameters */
+#define RSZ_SDR_Y_BAD_H (0x58)
+#define RSZ_SDR_Y_BAD_L (0x5C)
+#define RSZ_SDR_Y_SAD_H (0x60)
+#define RSZ_SDR_Y_SAD_L (0x64)
+#define RSZ_SDR_Y_OFT (0x68)
+#define RSZ_SDR_Y_PTR_S (0x6C)
+#define RSZ_SDR_Y_PTR_E (0x70)
+#define RSZ_SDR_C_BAD_H (0x74)
+#define RSZ_SDR_C_BAD_L (0x78)
+#define RSZ_SDR_C_SAD_H (0x7C)
+#define RSZ_SDR_C_SAD_L (0x80)
+#define RSZ_SDR_C_OFT (0x84)
+#define RSZ_SDR_C_PTR_S (0x88)
+#define RSZ_SDR_C_PTR_E (0x8C)
+
+/* Macro for resizer */
+#define IPIPE_RESIZER_A(i) (RSZ_IOBASE_VADDR + RSZ_EN_A + i)
+#define IPIPE_RESIZER_B(i) (RSZ_IOBASE_VADDR + RSZ_EN_B + i)
+
+#define RSZ_YUV_Y_MIN (0x40)
+#define RSZ_YUV_Y_MAX (0x44)
+#define RSZ_YUV_C_MIN (0x48)
+#define RSZ_YUV_C_MAX (0x4C)
+
+#define IPIPE_GCK_MMR_DEFAULT (1)
+#define IPIPE_GCK_PIX_DEFAULT (0xE)
+#define RSZ_GCK_MMR_DEFAULT (1)
+#define RSZ_GCK_SDR_DEFAULT (1)
+
+/* Below defines for masks and shifts */
+#define COLPAT_EE_SHIFT (0)
+#define COLPAT_EO_SHIFT (2)
+#define COLPAT_OE_SHIFT (4)
+#define COLPAT_OO_SHIFT (6)
+
+/* LUTDPC */
+#define LUTDPC_TBL_256_EN (0 << 1)
+#define LUTDPC_INF_TBL_EN (1)
+#define LUT_DPC_START_ADDR (0)
+#define LUT_DPC_H_POS_MASK (0x1FFF)
+#define LUT_DPC_V_POS_MASK (0x1FFF)
+#define LUT_DPC_V_POS_SHIFT (13)
+#define LUT_DPC_CORR_METH_SHIFT (26)
+#define LUT_DPC_MAX_SIZE (256)
+#define LUT_DPC_SIZE_MASK (0x3FF)
+
+/* OTFDPC */
+#define OTFDPC_DPC2_THR_MASK (0xFFF)
+#define OTF_DET_METHOD_SHIFT (1)
+#define OTF_DPC3_0_SHF_MASK (3)
+#define OTF_DPC3_0_THR_SHIFT (6)
+#define OTF_DPC3_0_THR_MASK (0x3F)
+#define OTF_DPC3_0_SLP_MASK (0x3F)
+#define OTF_DPC3_0_DET_MASK (0xFFF)
+#define OTF_DPC3_0_CORR_MASK (0xFFF)
+
+/* NF (D2F) */
+#define D2F_SPR_VAL_MASK (0x1F)
+#define D2F_SPR_VAL_SHIFT (0)
+#define D2F_SHFT_VAL_MASK (3)
+#define D2F_SHFT_VAL_SHIFT (5)
+#define D2F_SAMPLE_METH_SHIFT (7)
+#define D2F_APPLY_LSC_GAIN_SHIFT (8)
+#define D2F_USE_SPR_REG_VAL (0 << 9)
+#define D2F_STR_VAL_MASK (0x1F)
+#define D2F_THR_VAL_MASK (0x3FF)
+#define D2F_EDGE_DET_THR_MASK (0x7FF)
+
+/* Green Imbalance Correction */
+#define GIC_TYP_SHIFT (0)
+#define GIC_THR_SEL_SHIFT (1)
+#define GIC_APPLY_LSC_GAIN_SHIFT (2)
+#define GIC_GAIN_MASK (0xFF)
+#define GIC_THR_MASK (0xFFF)
+#define GIC_SLOPE_MASK (0xFFF)
+#define GIC_NFGAN_INT_MASK (7)
+#define GIC_NFGAN_DECI_MASK (0x1F)
+
+/* WB */
+#define WB_OFFSET_MASK (0xFFF)
+#define WB_GAIN_INT_MASK (0xF)
+#define WB_GAIN_DECI_MASK (0x1FF)
+
+/* CFA */
+#define CFA_HPF_THR_2DIR_MASK (0x1FFF)
+#define CFA_HPF_SLOPE_2DIR_MASK (0x3FF)
+#define CFA_HPF_MIX_THR_2DIR_MASK (0x1FFF)
+#define CFA_HPF_MIX_SLP_2DIR_MASK (0x3FF)
+#define CFA_DIR_THR_2DIR_MASK (0x3FF)
+#define CFA_DIR_SLP_2DIR_MASK (0x7F)
+#define CFA_ND_WT_2DIR_MASK (0x3F)
+#define CFA_DAA_HUE_FRA_MASK (0x3F)
+#define CFA_DAA_EDG_THR_MASK (0xFF)
+#define CFA_DAA_THR_MIN_MASK (0x3FF)
+#define CFA_DAA_THR_SLP_MASK (0x3FF)
+#define CFA_DAA_SLP_MIN_MASK (0x3FF)
+#define CFA_DAA_SLP_SLP_MASK (0x3FF)
+#define CFA_DAA_LP_WT_MASK (0x3F)
+
+/* RGB2RGB */
+#define RGB2RGB_1_OFST_MASK (0x1FFF)
+#define RGB2RGB_1_GAIN_INT_MASK (0xF)
+#define RGB2RGB_GAIN_DECI_MASK (0xFF)
+#define RGB2RGB_2_OFST_MASK (0x7FF)
+#define RGB2RGB_2_GAIN_INT_MASK (0x7)
+
+/* Gamma */
+#define GAMMA_BYPR_SHIFT (0)
+#define GAMMA_BYPG_SHIFT (1)
+#define GAMMA_BYPB_SHIFT (2)
+#define GAMMA_TBL_SEL_SHIFT (4)
+#define GAMMA_TBL_SIZE_SHIFT (5)
+#define GAMMA_MASK (0x3FF)
+#define GAMMA_SHIFT (10)
+
+/* 3D LUT */
+#define D3_LUT_ENTRY_MASK (0x3FF)
+#define D3_LUT_ENTRY_R_SHIFT (20)
+#define D3_LUT_ENTRY_G_SHIFT (10)
+#define D3_LUT_ENTRY_B_SHIFT (0)
+
+/* Lumina adj */
+#define LUM_ADJ_CONTR_SHIFT (0)
+#define LUM_ADJ_BRIGHT_SHIFT (8)
+
+/* RGB2YCbCr */
+#define RGB2YCBCR_OFST_MASK (0x7FF)
+#define RGB2YCBCR_COEF_INT_MASK (0xF)
+#define RGB2YCBCR_COEF_DECI_MASK (0xFF)
+
+/* GBCE */
+#define GBCE_Y_VAL_MASK (0xFF)
+#define GBCE_GAIN_VAL_MASK (0x3FF)
+#define GBCE_ENTRY_SHIFT (10)
+
+/* Edge Enhancements */
+#define YEE_HALO_RED_EN_SHIFT (1)
+#define YEE_HPF_SHIFT_MASK (0xF)
+#define YEE_COEF_MASK (0x3FF)
+#define YEE_THR_MASK (0x3F)
+#define YEE_ES_GAIN_MASK (0xFFF)
+#define YEE_ES_THR1_MASK (0xFFF)
+#define YEE_ENTRY_SHIFT (9)
+#define YEE_ENTRY_MASK (0x1FF)
+
+/* CAR */
+#define CAR_MF_THR (0xFF)
+#define CAR_SW1_SHIFT (8)
+#define CAR_GAIN1_SHFT_MASK (7)
+#define CAR_GAIN_MIN_MASK (0x1FF)
+#define CAR_GAIN2_SHFT_MASK (0xF)
+#define CAR_HPF_SHIFT_MASK (3)
+
+/* CGS */
+#define CAR_SHIFT_MASK (3)
+
+/* Resizer */
+#define RSZ_BYPASS_SHIFT (1)
+#define RSZ_SRC_IMG_FMT_SHIFT (1)
+#define RSZ_SRC_Y_C_SEL_SHIFT (2)
+#define IPIPE_RSZ_VPS_MASK (0xFFFF)
+#define IPIPE_RSZ_HPS_MASK (0xFFFF)
+#define IPIPE_RSZ_VSZ_MASK (0x1FFF)
+#define IPIPE_RSZ_HSZ_MASK (0x1FFF)
+#define RSZ_HPS_MASK (0x1FFF)
+#define RSZ_VPS_MASK (0x1FFF)
+#define RSZ_O_HSZ_MASK (0x1FFF)
+#define RSZ_O_VSZ_MASK (0x1FFF)
+#define RSZ_V_PHS_MASK (0x3FFF)
+#define RSZ_V_DIF_MASK (0x3FFF)
+
+#define RSZA_H_FLIP_SHIFT (0)
+#define RSZA_V_FLIP_SHIFT (1)
+#define RSZB_H_FLIP_SHIFT (2)
+#define RSZB_V_FLIP_SHIFT (3)
+#define RSZ_A (0)
+#define RSZ_B (1)
+#define RSZ_CEN_SHIFT (1)
+#define RSZ_YEN_SHIFT (0)
+#define RSZ_TYP_Y_SHIFT (0)
+#define RSZ_TYP_C_SHIFT (1)
+#define RSZ_LPF_INT_MASK (0x3F)
+#define RSZ_LPF_INT_MASK (0x3F)
+#define RSZ_LPF_INT_C_SHIFT (6)
+#define RSZ_H_PHS_MASK (0x3FFF)
+#define RSZ_H_DIF_MASK (0x3FFF)
+#define RSZ_DIFF_DOWN_THR (256)
+#define RSZ_DWN_SCALE_AV_SZ_V_SHIFT (3)
+#define RSZ_DWN_SCALE_AV_SZ_MASK (7)
+#define RSZ_RGB_MSK1_SHIFT (2)
+#define RSZ_RGB_MSK0_SHIFT (1)
+#define RSZ_RGB_TYP_SHIFT (0)
+#define RSZ_RGB_ALPHA_MASK (0xFF)
+
+static inline u32 regr_ip(u32 offset)
+{
+ return __raw_readl(IPIPE_IOBASE_VADDR + offset);
+}
+
+static inline u32 regw_ip(u32 val, u32 offset)
+{
+ __raw_writel(val, IPIPE_IOBASE_VADDR + offset);
+ return val;
+}
+
+static inline u32 r_ip_table(u32 offset)
+{
+ return __raw_readl(IPIPE_INT_TABLE_IOBASE_VADDR + offset);
+}
+
+static inline u32 w_ip_table(u32 val, u32 offset)
+{
+ __raw_writel(val, IPIPE_INT_TABLE_IOBASE_VADDR + offset);
+ return val;
+}
+
+static inline u32 regr_rsz(u32 offset)
+{
+ return __raw_readl(RSZ_IOBASE_VADDR + offset);
+}
+
+static inline u32 regw_rsz(u32 val, u32 offset)
+{
+ __raw_writel(val, RSZ_IOBASE_VADDR + offset);
+ return val;
+}
+
+#endif /* End of #ifdef __KERNEL__ */
+#endif /* End of #ifdef _DM365_IPIPE_HW_H */
diff --git a/drivers/char/dm3xx_ipipe.c b/drivers/char/dm3xx_ipipe.c
new file mode 100644
index 00000000..e61adb87
--- /dev/null
+++ b/drivers/char/dm3xx_ipipe.c
@@ -0,0 +1,463 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * ipipe module to hold common functionality across DM355 and DM365 */
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/export.h>
+#include <media/davinci/dm3xx_ipipe.h>
+
+static void *__iomem ipipeif_base_addr;
+
+#define DM355 0
+#define DM365 1
+static int device_type;
+
+static inline u32 regr_if(u32 offset)
+{
+ return __raw_readl(ipipeif_base_addr + offset);
+}
+
+static inline void regw_if(u32 val, u32 offset)
+{
+ __raw_writel(val, ipipeif_base_addr + offset);
+}
+
+void ipipeif_set_enable(char en, unsigned int mode)
+{
+ regw_if(1, IPIPEIF_ENABLE);
+}
+
+u32 ipipeif_get_enable(void)
+{
+ return regr_if(IPIPEIF_ENABLE);
+}
+
+int ipipeif_set_address(struct ipipeif *params, unsigned int address)
+{
+ unsigned int utemp, utemp1;
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(params->source != 0 || (params->var.if_5_1.isif_port.if_type == VPFE_YCBCR_SYNC_8)) {
+#else
+ if (params->source != 0) {
+#endif
+ utemp = ((params->adofs >> 5) & IPIPEIF_ADOFS_LSB_MASK);
+ regw_if(utemp, IPIPEIF_ADOFS);
+
+ /* lower sixteen bit */
+ utemp = ((address >> IPIPEIF_ADDRL_SHIFT) & IPIPEIF_ADDRL_MASK);
+ regw_if(utemp, IPIPEIF_ADDRL);
+
+ /* upper next seven bit */
+ utemp1 =
+ ((address >> IPIPEIF_ADDRU_SHIFT) & IPIPEIF_ADDRU_MASK);
+ regw_if(utemp1, IPIPEIF_ADDRU);
+ } else
+ return -1;
+ return 0;
+}
+
+static void ipipeif_config_dpc(struct ipipeif_dpc *dpc)
+{
+ u32 utemp = 0;
+ if (dpc->en) {
+ utemp = ((dpc->en & 1) << IPIPEIF_DPC2_EN_SHIFT);
+ utemp |= (dpc->thr & IPIPEIF_DPC2_THR_MASK);
+ }
+ regw_if(utemp, IPIPEIF_DPC2);
+}
+
+/* This function sets up IPIPEIF and is called from
+ * ipipe_hw_setup()
+ */
+int ipipeif_hw_setup(struct ipipeif *params)
+{
+ unsigned int utemp = 0, utemp1 = 0x7;
+ enum vpfe_hw_if_type isif_port_if;
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(params->var.if_5_1.isif_port.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ regw_if(params->glob_hor_size, IPIPEIF_PPLN);
+ regw_if(params->glob_ver_size, IPIPEIF_LPFR);
+ regw_if(params->hnum, IPIPEIF_HNUM);
+ regw_if(params->vnum, IPIPEIF_VNUM);
+ }
+#endif
+ if (NULL == params)
+ return -1;
+ /* Enable clock to IPIPEIF and IPIPE */
+ if (device_type == DM365)
+ vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
+ /* Combine all the fields to make CFG1 register of IPIPEIF */
+ utemp = params->mode << ONESHOT_SHIFT;
+ utemp |= params->source << INPSRC_SHIFT;
+ utemp |= params->clock_select << CLKSEL_SHIFT;
+ utemp |= params->avg_filter << AVGFILT_SHIFT;
+ utemp |= params->decimation << DECIM_SHIFT;
+
+ if (device_type == DM355) {
+ utemp |= params->var.if_base.ialaw << IALAW_SHIFT;
+ utemp |= params->var.if_base.pack_mode << PACK8IN_SHIFT;
+ utemp |= params->var.if_base.clk_div << CLKDIV_SHIFT;
+ utemp |= params->var.if_base.data_shift << DATASFT_SHIFT;
+ } else {
+ /* DM365 IPIPE 5.1 */
+ utemp |= params->var.if_5_1.pack_mode << PACK8IN_SHIFT;
+ utemp |= params->var.if_5_1.source1 << INPSRC1_SHIFT;
+ if (params->source != SDRAM_YUV)
+ utemp |= params->var.if_5_1.data_shift << DATASFT_SHIFT;
+ else
+ utemp &= (~(utemp1 << DATASFT_SHIFT));
+ }
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(params->var.if_5_1.isif_port.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ utemp &= ~(3<<2);
+ utemp |= (3<<2);
+ utemp |= 1;
+ }
+#endif
+ regw_if(utemp, IPIPEIF_GFG1);
+
+ switch (params->source) {
+ case CCDC:
+ {
+ regw_if(params->gain, IPIPEIF_GAIN);
+ break;
+ }
+ case SDRAM_RAW:
+ case CCDC_DARKFM:
+ {
+ regw_if(params->gain, IPIPEIF_GAIN);
+ /* fall through */
+ }
+ case SDRAM_YUV:
+ {
+ utemp |= params->var.if_5_1.data_shift << DATASFT_SHIFT;
+ regw_if(params->glob_hor_size, IPIPEIF_PPLN);
+ regw_if(params->glob_ver_size, IPIPEIF_LPFR);
+ regw_if(params->hnum, IPIPEIF_HNUM);
+ regw_if(params->vnum, IPIPEIF_VNUM);
+ if (device_type == DM355) {
+//TODO
+#if 0
+ utemp = regr_vpss(DM355_VPSSBL_PCR);
+ /* IPIPEIF read master */
+ RESETBIT(utemp, 4);
+ RESETBIT(utemp, 5);
+ regw_vpss(utemp, DM355_VPSSBL_PCR);
+#endif
+ }
+ break;
+ }
+ default:
+ /* Do nothing */
+ ;
+ }
+
+ /*check if decimation is enable or not */
+ if (params->decimation)
+ regw_if(params->rsz, IPIPEIF_RSZ);
+ if (device_type == DM365) {
+ /* Setup sync alignment and initial rsz position */
+ utemp = params->var.if_5_1.align_sync & 1;
+ utemp <<= IPIPEIF_INIRSZ_ALNSYNC_SHIFT;
+ utemp |= (params->var.if_5_1.rsz_start & IPIPEIF_INIRSZ_MASK);
+ regw_if(utemp, IPIPEIF_INIRSZ);
+
+ /* Enable DPCM decompression */
+ switch (params->source) {
+ case SDRAM_RAW:
+ {
+ utemp = 0;
+ if (params->var.if_5_1.dpcm.en) {
+ utemp = params->var.if_5_1.dpcm.en & 1;
+ utemp |= (params->var.if_5_1.dpcm.type
+ & 1)
+ << IPIPEIF_DPCM_BITS_SHIFT;
+ utemp |=
+ (params->var.if_5_1.dpcm.pred & 1)
+ << IPIPEIF_DPCM_PRED_SHIFT;
+ }
+ regw_if(utemp, IPIPEIF_DPCM);
+
+ /* set DPC */
+ ipipeif_config_dpc(&params->var.if_5_1.dpc);
+
+ regw_if(params->var.if_5_1.clip, IPIPEIF_OCLIP);
+ /* fall through for SDRAM YUV mode */
+ isif_port_if =
+ params->var.if_5_1.isif_port.if_type;
+ /* configure CFG2 */
+ switch (isif_port_if) {
+ case VPFE_YCBCR_SYNC_16:
+ utemp |=
+ (0 <<
+ IPIPEIF_CFG2_YUV8_SHIFT);
+ utemp |=
+ (1 <<
+ IPIPEIF_CFG2_YUV16_SHIFT);
+ regw_if(utemp, IPIPEIF_CFG2);
+ break;
+ default:
+ utemp |=
+ (0 <<
+ IPIPEIF_CFG2_YUV8_SHIFT);
+ utemp |=
+ (0 <<
+ IPIPEIF_CFG2_YUV16_SHIFT);
+ regw_if(utemp, IPIPEIF_CFG2);
+ break;
+
+ }
+ }
+ case SDRAM_YUV:
+ {
+ /* Set clock divider */
+ if (params->clock_select == SDRAM_CLK) {
+ utemp |=
+ ((params->var.if_5_1.clk_div.m - 1)
+ << IPIPEIF_CLKDIV_M_SHIFT);
+ utemp |=
+ (params->var.if_5_1.clk_div.n - 1);
+ regw_if(utemp, IPIPEIF_CLKDIV);
+ }
+ break;
+ }
+ case CCDC:
+ case CCDC_DARKFM:
+ {
+ /* set DPC */
+ ipipeif_config_dpc(&params->var.if_5_1.dpc);
+
+ /* Set DF gain & threshold control */
+ utemp = 0;
+ if (params->var.if_5_1.df_gain_en) {
+ utemp = (params->var.if_5_1.df_gain_thr
+ & IPIPEIF_DF_GAIN_THR_MASK);
+ regw_if(utemp, IPIPEIF_DFSGTH);
+ utemp = ((params->var.if_5_1.df_gain_en
+ & 1)
+ << IPIPEIF_DF_GAIN_EN_SHIFT);
+ utemp |= (params->var.if_5_1.df_gain
+ & IPIPEIF_DF_GAIN_MASK);
+ }
+ regw_if(utemp, IPIPEIF_DFSGVL);
+
+ isif_port_if =
+ params->var.if_5_1.isif_port.if_type;
+ /* configure CFG2 */
+ utemp =
+ params->var.if_5_1.isif_port.hdpol
+ << IPIPEIF_CFG2_HDPOL_SHIFT;
+ utemp |=
+ params->var.if_5_1.isif_port.vdpol
+ << IPIPEIF_CFG2_VDPOL_SHIFT;
+ switch (isif_port_if) {
+ case VPFE_YCBCR_SYNC_16:
+ case VPFE_BT1120:
+ {
+ utemp |=
+ (0 <<
+ IPIPEIF_CFG2_YUV8_SHIFT);
+ utemp |=
+ (1 <<
+ IPIPEIF_CFG2_YUV16_SHIFT);
+ break;
+ }
+ case VPFE_BT656:
+ case VPFE_YCBCR_SYNC_8:
+ case VPFE_BT656_10BIT:
+ {
+ utemp |=
+ (1 <<
+ IPIPEIF_CFG2_YUV8_SHIFT);
+ utemp |=
+ (1 <<
+ IPIPEIF_CFG2_YUV16_SHIFT);
+ utemp |=
+ ((params->var.if_5_1.
+ pix_order)
+ <<
+ IPIPEIF_CFG2_YUV8P_SHIFT);
+ break;
+ }
+ default:
+ {
+ /* Bayer */
+ regw_if(params->var.if_5_1.clip,
+ IPIPEIF_OCLIP);
+ utemp |=
+ (0 <<
+ IPIPEIF_CFG2_YUV16_SHIFT);
+ }
+ }
+ regw_if(utemp, IPIPEIF_CFG2);
+#ifdef CONFIG_VIDEO_YCBCR
+ if(params->var.if_5_1.isif_port.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ utemp = ((params->var.if_5_1.clk_div.m - 1) << IPIPEIF_CLKDIV_M_SHIFT);
+ utemp |= (params->var.if_5_1.clk_div.n - 1);
+ regw_if(utemp, IPIPEIF_CLKDIV);
+ }
+#endif
+ break;
+ }
+ default:
+ /* do nothing */
+ ;
+ }
+ }
+ return 0;
+}
+
+#ifdef CONFIG_IMP_DEBUG
+void ipipeif_dump_register(void)
+{
+ u32 utemp;
+ printk(KERN_NOTICE "IPIPEIF Registers\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+ utemp = regr_if(IPIPEIF_ENABLE);
+ printk(KERN_NOTICE "IPIPEIF ENABLE = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_GFG1);
+ printk(KERN_NOTICE "IPIPEIF CFG = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_PPLN);
+ printk(KERN_NOTICE "IPIPEIF PPLN = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_LPFR);
+ printk(KERN_NOTICE "IPIPEIF LPFR = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_HNUM);
+ printk(KERN_NOTICE "IPIPEIF HNUM = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_VNUM);
+ printk(KERN_NOTICE "IPIPEIF VNUM = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_ADDRU);
+ printk(KERN_NOTICE "IPIPEIF ADDRU = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_ADDRL);
+ printk(KERN_NOTICE "IPIPEIF ADDRL = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_ADOFS);
+ printk(KERN_NOTICE "IPIPEIF ADOFS = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_RSZ);
+ printk(KERN_NOTICE "IPIPEIF RSZ = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_GAIN);
+ printk(KERN_NOTICE "IPIPEIF GAIN = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_DPCM);
+ printk(KERN_NOTICE "IPIPEIF DPCM = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_CFG2);
+ printk(KERN_NOTICE "IPIPEIF CFG2 = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_INIRSZ);
+ printk(KERN_NOTICE "IPIPEIF INIRSZ = 0x%x\n", utemp);
+ utemp = regr_if(IPIPEIF_OCLIP);
+ printk(KERN_NOTICE "IPIPEIF OCLIP = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_DTUDF);
+ printk(KERN_NOTICE "IPIPEIF DTUDF = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_CLKDIV);
+ printk(KERN_NOTICE "IPIPEIF CLKDIV = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_DPC1);
+ printk(KERN_NOTICE "IPIPEIF DPC1 = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_DPC2);
+ printk(KERN_NOTICE "IPIPEIF DPC2 = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_DFSGVL);
+ printk(KERN_NOTICE "IPIPEIF DFSGVL = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_DFSGTH);
+ printk(KERN_NOTICE "IPIPEIF DFSGTH = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_RSZ3A);
+ printk(KERN_NOTICE "IPIPEIF RSZ3A = %x\n", utemp);
+ utemp = regr_if(IPIPEIF_INIRSZ3A);
+ printk(KERN_NOTICE "IPIPEIF INIRSZ3A = %x\n", utemp);
+ printk(KERN_NOTICE "IPIPE Registers\n");
+ printk(KERN_NOTICE
+ "**************************************************\n");
+}
+#else
+void ipipeif_dump_register(void) {};
+#endif
+
+static int dm3xx_ipipeif_probe(struct platform_device *pdev)
+{
+ static resource_size_t res_len;
+ struct resource *res;
+ int status = 0;
+
+ if (NULL == pdev->dev.platform_data)
+ printk("DM355 IPIPEIF probed\n");
+ else {
+ printk("DM365 IPIPEIF probed\n");
+ device_type = DM365;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENOENT;
+
+ res_len = res->end - res->start + 1;
+
+ res = request_mem_region(res->start, res_len, res->name);
+ if (!res)
+ return -EBUSY;
+
+ ipipeif_base_addr = ioremap_nocache(res->start, res_len);
+ if (!ipipeif_base_addr) {
+ status = -EBUSY;
+ goto fail;
+ }
+ return 0;
+
+fail:
+ release_mem_region(res->start, res_len);
+ return status;
+}
+
+static int dm3xx_ipipeif_remove(struct platform_device *pdev)
+{
+ struct resource *res;
+
+ iounmap(ipipeif_base_addr);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res)
+ release_mem_region(res->start, res->end - res->start + 1);
+ return 0;
+}
+
+static struct platform_driver dm3xx_ipipeif_driver = {
+ .driver = {
+ .name = "dm3xx_ipipeif",
+ .owner = THIS_MODULE,
+ },
+ .remove = (dm3xx_ipipeif_remove),
+ .probe = dm3xx_ipipeif_probe,
+};
+
+static int dm3xx_ipipeif_init(void)
+{
+ return platform_driver_register(&dm3xx_ipipeif_driver);
+}
+
+static void dm3xx_ipipeif_exit(void)
+{
+ platform_driver_unregister(&dm3xx_ipipeif_driver);
+}
+
+module_init(dm3xx_ipipeif_init);
+module_exit(dm3xx_ipipeif_exit);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c
index d784650d..e3f9a99b 100644
--- a/drivers/char/hpet.c
+++ b/drivers/char/hpet.c
@@ -373,14 +373,26 @@ static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
struct hpet_dev *devp;
unsigned long addr;
+ if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
+ return -EINVAL;
+
devp = file->private_data;
addr = devp->hd_hpets->hp_hpet_phys;
if (addr & (PAGE_SIZE - 1))
return -ENOSYS;
+ vma->vm_flags |= VM_IO;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
- return vm_iomap_memory(vma, addr, PAGE_SIZE);
+
+ if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
+ PAGE_SIZE, vma->vm_page_prot)) {
+ printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
+ __func__);
+ return -EAGAIN;
+ }
+
+ return 0;
#else
return -ENOSYS;
#endif
diff --git a/drivers/char/imp_common.c b/drivers/char/imp_common.c
new file mode 100644
index 00000000..73570dde
--- /dev/null
+++ b/drivers/char/imp_common.c
@@ -0,0 +1,1542 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/device.h>
+#include <linux/sched.h>
+#include <asm-generic/current.h>
+
+#include <media/davinci/vpss.h>
+#include <media/davinci/imp_hw_if.h>
+
+#include <mach/cputype.h>
+
+static int serializer_initialized;
+struct imp_serializer imp_serializer_info;
+static struct imp_hw_interface *imp_hw_if;
+
+int imp_common_mmap(struct file *filp,
+ struct vm_area_struct *vma,
+ struct imp_logical_channel *channel)
+{
+ int i, flag = 0, shift;
+ /* get the page offset */
+ unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
+ shift = PAGE_SHIFT;
+ for (i = 0; i < channel->in_numbufs; i++) {
+ if (channel->in_bufs[i]->offset == offset) {
+ flag = 1;
+ break;
+ }
+ }
+
+ /* page offset passed in mmap should one from output buffers */
+ if (flag == 0) {
+ for (i = 0; i < channel->out_numbuf1s; i++) {
+ if (channel->out_buf1s[i]->offset == offset) {
+ flag = 1;
+ break;
+ }
+ }
+ }
+
+ if (flag == 0) {
+ for (i = 0; i < channel->out_numbuf2s; i++) {
+ if (channel->out_buf2s[i]->offset == offset) {
+ flag = 1;
+ break;
+ }
+ }
+ }
+ if (flag) {
+ /* map buffers address space from kernel space to user space */
+ if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot))
+ return -EAGAIN;
+ } else {
+ /* No matching buffer */
+ return -EINVAL;
+ }
+ return 0;
+}
+EXPORT_SYMBOL(imp_common_mmap);
+
+/* inline function to free reserver pages */
+static inline void imp_common_free_pages(unsigned long addr,
+ unsigned long bufsize)
+{
+ unsigned long size, ad = addr;
+ size = PAGE_SIZE << (get_order(bufsize));
+ if (!addr)
+ return;
+ while (size > 0) {
+ ClearPageReserved(virt_to_page(addr));
+ addr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ free_pages(ad, get_order(bufsize));
+}
+
+/* This function is used to free memory allocated to buffers */
+int imp_common_free_buffers(struct device *dev,
+ struct imp_logical_channel *channel)
+{
+ int i;
+ unsigned long adr;
+ if (!channel) {
+ dev_err(dev, "\nfree_buffers:error in argument");
+ return -EINVAL;
+ }
+ /* free memory allocated to in buffers */
+ for (i = 0; i < channel->in_numbufs; i++) {
+ if (channel->in_bufs[i]) {
+ adr = channel->in_bufs[i]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned long)
+ phys_to_virt(adr),
+ channel->in_bufs[i]->
+ size);
+
+ kfree(channel->in_bufs[i]);
+
+ channel->in_bufs[i] = NULL;
+ }
+ }
+ channel->in_numbufs = 0;
+ /* free memory allocated to out buffers */
+ for (i = 0; i < channel->out_numbuf1s; i++) {
+ if (channel->out_buf1s[i]) {
+ adr = channel->out_buf1s[i]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned long)
+ phys_to_virt(adr),
+ channel->out_buf1s[i]->
+ size);
+
+ kfree(channel->out_buf1s[i]);
+
+ channel->out_buf1s[i] = NULL;
+ }
+ }
+
+ channel->out_numbuf1s = 0;
+
+ /* free memory allocated to out buffers */
+ for (i = 0; i < channel->out_numbuf2s; i++) {
+ if (channel->out_buf2s[i]) {
+ adr = channel->out_buf2s[i]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned long)
+ phys_to_virt(adr),
+ channel->out_buf2s[i]->
+ size);
+
+ kfree(channel->out_buf2s[i]);
+
+ channel->out_buf2s[i] = NULL;
+ }
+ }
+
+ channel->out_numbuf2s = 0;
+ return 0;
+}
+EXPORT_SYMBOL(imp_common_free_buffers);
+
+/*
+ * This function will query the buffer's physical address
+ * whose index is passed in ipipe_buffer.
+ * It will store that address in ipipe_buffer.
+ */
+int imp_common_query_buffer(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct imp_buffer *buffer)
+{
+
+ if (!buffer || !channel) {
+ dev_err(dev, "query_buffer: error in argument\n");
+ return -EINVAL;
+ }
+
+ if (buffer->index < 0) {
+ dev_err(dev, "query_buffer: invalid index %d\n", buffer->index);
+ return -EINVAL;
+ }
+
+ if ((buffer->buf_type != IMP_BUF_IN)
+ && (buffer->buf_type != IMP_BUF_OUT1)
+ && (buffer->buf_type != IMP_BUF_OUT2)) {
+ dev_err(dev, "request_buffer: invalid buffer type\n");
+ return -EINVAL;
+ }
+ /* if buf_type is input buffer then get offset of input buffer */
+ if (buffer->buf_type == IMP_BUF_IN) {
+ /* error checking for wrong index number */
+ if (buffer->index >= channel->in_numbufs) {
+ dev_err(dev, "query_buffer: invalid index");
+ return -EINVAL;
+ }
+
+ /* get the offset and size of the buffer and store
+ it in buffer */
+ buffer->offset = channel->in_bufs[buffer->index]->offset;
+ buffer->size = channel->in_bufs[buffer->index]->size;
+ }
+ /* if buf_type is output buffer then get offset of output buffer */
+ else if (buffer->buf_type == IMP_BUF_OUT1) {
+ /* error checking for wrong index number */
+ if (buffer->index >= channel->out_numbuf1s) {
+ dev_err(dev, "query_buffer: invalid index\n");
+ return -EINVAL;
+ }
+ /* get the offset and size of the buffer and store
+ it in buffer */
+ buffer->offset = channel->out_buf1s[buffer->index]->offset;
+ buffer->size = channel->out_buf1s[buffer->index]->size;
+ }
+ /* if buf_type is output buffer then get offset of output buffer */
+ else if (buffer->buf_type == IMP_BUF_OUT2) {
+ /* error checking for wrong index number */
+ if (buffer->index >= channel->out_numbuf2s) {
+ dev_err(dev, "query_buffer: invalid index\n");
+ return -EINVAL;
+ }
+ /* get the offset and size of the buffer and store
+ it in buffer */
+ buffer->offset = channel->out_buf2s[buffer->index]->offset;
+ buffer->size = channel->out_buf2s[buffer->index]->size;
+ } else {
+ dev_err(dev, "query_buffer: invalid buffer type\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(imp_common_query_buffer);
+
+int imp_common_request_buffer(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct imp_reqbufs *reqbufs)
+{
+ struct imp_buffer *buffer = NULL;
+ int count = 0;
+ unsigned long adr;
+ u32 size;
+
+ if (!reqbufs || !channel) {
+ dev_err(dev, "request_buffer: error in argument\n");
+ return -EINVAL;
+ }
+
+ /* if number of buffers requested is more then support return error */
+ if (reqbufs->count > MAX_BUFFERS) {
+ dev_err(dev, "request_buffer: invalid buffer count\n");
+ return -EINVAL;
+ }
+
+ if ((reqbufs->buf_type != IMP_BUF_IN)
+ && (reqbufs->buf_type != IMP_BUF_OUT1)
+ && (reqbufs->buf_type != IMP_BUF_OUT2)) {
+ dev_err(dev, "request_buffer: invalid buffer type %d\n",
+ reqbufs->buf_type);
+ return -EINVAL;
+ }
+ if (reqbufs->count < 0) {
+ dev_err(dev, "request_buffer: invalid buffer count %d\n",
+ reqbufs->count);
+ return -EINVAL;
+ }
+ /* if buf_type is input then allocate buffers for input */
+ if (reqbufs->buf_type == IMP_BUF_IN) {
+ /*if buffer count is zero, free all the buffers */
+ if (reqbufs->count == 0) {
+ /* free all the buffers */
+ for (count = 0; count < channel->in_numbufs; count++) {
+ /* free memory allocate for the image */
+ if (channel->in_bufs[count]) {
+ adr =
+ (unsigned long)channel->
+ in_bufs[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ in_bufs
+ [count]->
+ size);
+
+ /* free the memory allocated
+ to ipipe_buffer */
+ kfree(channel->in_bufs[count]);
+
+ channel->in_bufs[count] = NULL;
+ }
+ }
+ channel->in_numbufs = 0;
+ return 0;
+ }
+
+ /* free the extra buffers */
+ if (channel->in_numbufs > reqbufs->count &&
+ reqbufs->size == channel->in_bufs[0]->size) {
+ for (count = reqbufs->count;
+ count < channel->in_numbufs; count++) {
+ /* free memory allocate for the image */
+ if (channel->in_bufs[count]) {
+ adr = channel->in_bufs[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ in_bufs
+ [count]->
+ size);
+
+ /* free the memory allocated
+ to ipipe_buffer */
+ kfree(channel->in_bufs[count]);
+
+ channel->in_bufs[count] = NULL;
+ }
+ }
+ channel->in_numbufs = reqbufs->count;
+ return 0;
+ }
+ /* if size requested is different from already allocated,
+ free memory of all already allocated buffers */
+ if (channel->in_numbufs) {
+ if (reqbufs->size != channel->in_bufs[0]->size) {
+ for (count = 0;
+ count < channel->in_numbufs; count++) {
+ if (channel->in_bufs[count]) {
+ adr =
+ channel->
+ in_bufs[count]->offset;
+ if (adr)
+ imp_common_free_pages(
+ (unsigned long)
+ phys_to_virt(adr),
+ channel->in_bufs
+ [count]->size);
+
+ kfree(channel->in_bufs[count]);
+
+ channel->in_bufs[count] = NULL;
+ }
+ }
+ channel->in_numbufs = 0;
+ }
+ }
+
+ /* allocate the buffer */
+ for (count = channel->in_numbufs; count < reqbufs->count;
+ count++) {
+ /* Allocate memory for struct ipipe_buffer */
+ buffer = kmalloc(sizeof(struct imp_buffer), GFP_KERNEL);
+
+ /* if memory allocation fails then return error */
+ if (!buffer) {
+ /* free all the buffers */
+ while (--count >= channel->in_numbufs) {
+ adr = channel->in_bufs[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ in_bufs
+ [count]->
+ size);
+ kfree(channel->in_bufs[count]);
+ channel->in_bufs[count] = NULL;
+ }
+ dev_err(dev,
+ "1.request_buffer:not enough memory\n");
+ return -ENOMEM;
+ }
+
+ /* assign buffer's address in configuration */
+ channel->in_bufs[count] = buffer;
+
+ /* set buffers index and buf_type,size parameters */
+ buffer->index = count;
+ buffer->buf_type = IMP_BUF_IN;
+ buffer->size = reqbufs->size;
+ /* allocate memory for buffer of size passed
+ in reqbufs */
+ buffer->offset =
+ (unsigned long)__get_free_pages(GFP_KERNEL |
+ GFP_DMA,
+ get_order
+ (reqbufs->size));
+
+ /* if memory allocation fails, return error */
+ if (!(buffer->offset)) {
+ /* free all the buffer's space */
+ kfree(buffer);
+ channel->in_bufs[count] = NULL;
+ while (--count >= channel->in_numbufs) {
+ adr = channel->in_bufs[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ in_bufs
+ [count]->
+ size);
+ kfree(channel->in_bufs[count]);
+ channel->in_bufs[count] = NULL;
+ }
+ dev_err(dev,
+ "2.request_buffer:not enough memory\n");
+
+ return -ENOMEM;
+ }
+
+ adr = (unsigned long)buffer->offset;
+ size = PAGE_SIZE << (get_order(reqbufs->size));
+ while (size > 0) {
+ /* make sure the frame buffers
+ are never swapped out of memory */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ /* convert vertual address to physical */
+ buffer->offset = (unsigned long)
+ virt_to_phys((void *)(buffer->offset));
+ }
+ channel->in_numbufs = reqbufs->count;
+ }
+ /* if buf_type is output then allocate buffers for output */
+ else if (reqbufs->buf_type == IMP_BUF_OUT1) {
+ if (reqbufs->count == 0) {
+ /* free all the buffers */
+ for (count = 0; count < channel->out_numbuf1s;
+ count++) {
+ /* free memory allocate for the image */
+ if (channel->out_buf1s[count]) {
+ adr = channel->out_buf1s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf1s
+ [count]->
+ size);
+
+ /* free the memory allocated to
+ ipipe_buffer */
+ kfree(channel->out_buf1s[count]);
+
+ channel->out_buf1s[count] = NULL;
+ }
+ }
+ channel->out_numbuf1s = 0;
+
+ return 0;
+ }
+ /* free the buffers */
+ if (channel->out_numbuf1s > reqbufs->count &&
+ reqbufs->size == channel->out_buf1s[0]->size) {
+ for (count = reqbufs->count;
+ count < channel->out_numbuf1s; count++) {
+ /* free memory allocate for the image */
+ if (channel->out_buf1s[count]) {
+ adr = channel->out_buf1s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf1s
+ [count]->
+ size);
+
+ /* free the memory allocated to
+ ipipe_buffer */
+ kfree(channel->out_buf1s[count]);
+
+ channel->out_buf1s[count] = NULL;
+ }
+ }
+ channel->out_numbuf1s = reqbufs->count;
+
+ return 0;
+ }
+ /* if size requested is different from already allocated,
+ free memory of all already allocated buffers */
+ if (channel->out_numbuf1s) {
+ if (reqbufs->size != channel->out_buf1s[0]->size) {
+ for (count = 0;
+ count < channel->out_numbuf1s; count++) {
+ if (channel->out_buf1s[count]) {
+ adr =
+ channel->
+ out_buf1s[count]->offset;
+
+ if (adr)
+ imp_common_free_pages(
+ (unsigned long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf1s
+ [count]->
+ size);
+
+ kfree(channel->
+ out_buf1s[count]);
+
+ channel->out_buf1s[count] =
+ NULL;
+ }
+ }
+ channel->out_numbuf1s = 0;
+ }
+ }
+
+ /* allocate the buffer */
+ for (count = channel->out_numbuf1s;
+ count < reqbufs->count; count++) {
+ /* Allocate memory for struct ipipe_buffer */
+ buffer = kmalloc(sizeof(struct imp_buffer), GFP_KERNEL);
+
+ /* if memory allocation fails then return error */
+ if (!buffer) {
+ /* free all the buffers */
+ while (--count >= channel->out_numbuf1s) {
+ adr = channel->out_buf1s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf1s
+ [count]->
+ size);
+ kfree(channel->out_buf1s[count]);
+ channel->out_buf1s[count] = NULL;
+ }
+
+ dev_err(dev,
+ "3.request_buffer:not enough memory\n");
+
+ return -ENOMEM;
+ }
+
+ /* assign buffer's address out configuration */
+ channel->out_buf1s[count] = buffer;
+
+ /* set buffers outdex and buf_type,size parameters */
+ buffer->index = count;
+ buffer->buf_type = IMP_BUF_OUT1;
+ buffer->size = reqbufs->size;
+ /* allocate memory for buffer of size passed
+ in reqbufs */
+ buffer->offset =
+ (unsigned long)__get_free_pages(GFP_KERNEL |
+ GFP_DMA,
+ get_order
+ (reqbufs->size));
+
+ /* if memory allocation fails, return error */
+ if (!(buffer->offset)) {
+ /* free all the buffer's space */
+ kfree(buffer);
+ channel->out_buf1s[count] = NULL;
+ while (--count >= channel->out_numbuf1s) {
+ adr = channel->out_buf1s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf1s
+ [count]->
+ size);
+ kfree(channel->out_buf1s[count]);
+ channel->out_buf1s[count] = NULL;
+ }
+ dev_err(dev,
+ "4.request_buffer:not enough memory\n");
+
+ return -ENOMEM;
+ }
+
+ adr = (unsigned long)buffer->offset;
+ size = PAGE_SIZE << (get_order(reqbufs->size));
+ while (size > 0) {
+ /* make sure the frame buffers
+ are never swapped out of memory */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ /* convert vertual address to physical */
+ buffer->offset = (unsigned long)
+ virt_to_phys((void *)(buffer->offset));
+ }
+ channel->out_numbuf1s = reqbufs->count;
+
+ } else if (reqbufs->buf_type == IMP_BUF_OUT2) {
+ if (reqbufs->count == 0) {
+ /* free all the buffers */
+ for (count = 0; count < channel->out_numbuf2s;
+ count++) {
+ /* free memory allocate for the image */
+ if (channel->out_buf2s[count]) {
+ adr = channel->out_buf2s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf2s
+ [count]->
+ size);
+
+ /* free the memory allocated to
+ ipipe_buffer */
+ kfree(channel->out_buf2s[count]);
+
+ channel->out_buf2s[count] = NULL;
+ }
+ }
+ channel->out_numbuf2s = 0;
+
+ return 0;
+ }
+ /* free the buffers */
+ if (channel->out_numbuf2s > reqbufs->count &&
+ reqbufs->size == channel->out_buf2s[0]->size) {
+ for (count = reqbufs->count;
+ count < channel->out_numbuf2s; count++) {
+ /* free memory allocate for the image */
+ if (channel->out_buf2s[count]) {
+ adr = channel->out_buf2s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf2s
+ [count]->
+ size);
+
+ /* free the memory allocated to
+ ipipe_buffer */
+ kfree(channel->out_buf2s[count]);
+
+ channel->out_buf2s[count] = NULL;
+ }
+ }
+ channel->out_numbuf2s = reqbufs->count;
+
+ return 0;
+ }
+ /* if size requested is different from already allocated,
+ free memory of all already allocated buffers */
+ if (channel->out_numbuf2s) {
+ if (reqbufs->size != channel->out_buf2s[0]->size) {
+ for (count = 0;
+ count < channel->out_numbuf2s; count++) {
+ if (channel->out_buf2s[count]) {
+ adr =
+ channel->
+ out_buf2s[count]->offset;
+
+ if (adr)
+ imp_common_free_pages(
+ (unsigned long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf2s
+ [count]->
+ size);
+
+ kfree(channel->
+ out_buf2s[count]);
+
+ channel->out_buf2s[count] =
+ NULL;
+ }
+ }
+ channel->out_numbuf2s = 0;
+ }
+ }
+
+ /* allocate the buffer */
+ for (count = channel->out_numbuf2s;
+ count < reqbufs->count; count++) {
+ /* Allocate memory for struct ipipe_buffer */
+ buffer = kmalloc(sizeof(struct imp_buffer), GFP_KERNEL);
+
+ /* if memory allocation fails then return error */
+ if (!buffer) {
+ /* free all the buffers */
+ while (--count >= channel->out_numbuf2s) {
+ adr = channel->out_buf2s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf2s
+ [count]->
+ size);
+ kfree(channel->out_buf2s[count]);
+ channel->out_buf2s[count] = NULL;
+ }
+
+ dev_err(dev,
+ "5.request_buffer:not enough memory\n");
+
+ return -ENOMEM;
+ }
+
+ /* assign buffer's address out configuration */
+ channel->out_buf2s[count] = buffer;
+
+ /* set buffers outdex and buf_type,size parameters */
+ buffer->index = count;
+ buffer->buf_type = IMP_BUF_OUT2;
+ buffer->size = reqbufs->size;
+ /* allocate memory for buffer of size passed
+ in reqbufs */
+ buffer->offset =
+ (unsigned long)__get_free_pages(GFP_KERNEL |
+ GFP_DMA,
+ get_order
+ (reqbufs->size));
+
+ /* if memory allocation fails, return error */
+ if (!(buffer->offset)) {
+ /* free all the buffer's space */
+ kfree(buffer);
+ channel->out_buf2s[count] = NULL;
+ while (--count >= channel->out_numbuf2s) {
+ adr = channel->out_buf2s[count]->offset;
+ if (adr)
+ imp_common_free_pages((unsigned
+ long)
+ phys_to_virt
+ (adr),
+ channel->
+ out_buf2s
+ [count]->
+ size);
+ kfree(channel->out_buf2s[count]);
+ channel->out_buf2s[count] = NULL;
+ }
+ dev_err(dev,
+ "6.request_buffer:not enough memory\n");
+
+ return -ENOMEM;
+ }
+
+ adr = (unsigned long)buffer->offset;
+ size = PAGE_SIZE << (get_order(reqbufs->size));
+ while (size > 0) {
+ /* make sure the frame buffers
+ are never swapped out of memory */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ /* convert vertual address to physical */
+ buffer->offset = (unsigned long)
+ virt_to_phys((void *)(buffer->offset));
+ }
+ channel->out_numbuf2s = reqbufs->count;
+
+ } else {
+ dev_err(dev, "request_buffer: invalid buffer type\n");
+
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(imp_common_request_buffer);
+
+static irqreturn_t imp_common_isr(int irq, void *device_id)
+{
+ u32 val = vpss_dma_complete_interrupt();
+
+ if (val == 0 || val == 2)
+ complete(&(imp_serializer_info.sem_isr));
+ return IRQ_HANDLED;
+}
+
+int imp_set_preview_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct prev_channel_config *chan_config)
+{
+ int ret = 0, len = 0;
+
+ if (channel->mode == IMP_MODE_INVALID) {
+ dev_err(dev, "Channel mode is not set. \n");
+ return -EINVAL;
+ }
+
+ if (channel->mode != chan_config->oper_mode) {
+ dev_err(dev,
+ "mode mis-match, chan mode = %d, config mode = %d\n",
+ channel->mode, chan_config->oper_mode);
+ return -EINVAL;
+ }
+
+ if (channel->config_state == STATE_NOT_CONFIGURED) {
+ /* for preview, always use the shared structure */
+ channel->config = imp_hw_if->alloc_config_block(dev, 1);
+ /* allocate buffer for holding user configuration */
+ channel->user_config = imp_hw_if->alloc_user_config_block(dev,
+ IMP_PREVIEWER,
+ channel->
+ mode,
+ &len);
+ if (ISNULL(channel->user_config)) {
+ dev_err(dev,
+ "memory allocate failed for user config\n");
+ return -EFAULT;
+ }
+ channel->user_config_size = len;
+ }
+
+ if (ISNULL(chan_config->config)) {
+ /* put defaults for user configuration */
+ imp_hw_if->set_user_config_defaults(dev,
+ IMP_PREVIEWER,
+ chan_config->oper_mode,
+ channel->user_config);
+ dev_dbg(dev, "imp_set_preview_config.. default \n");
+ } else {
+ dev_dbg(dev, "imp_set_preview_config.. user config\n");
+ if (copy_from_user(channel->user_config,
+ chan_config->config,
+ channel->user_config_size)) {
+ dev_err(dev, "Copy from user to kernel failed\n");
+ return -EFAULT;
+ }
+ }
+
+ /* Update the user configuration in the hw config block */
+ ret = imp_hw_if->set_preview_config(dev,
+ chan_config->oper_mode,
+ channel->user_config,
+ channel->config);
+
+ if (ret < 0)
+ dev_err(dev, "set preview config failed\n");
+
+ channel->config_state = STATE_CONFIGURED;
+ return ret;
+}
+EXPORT_SYMBOL(imp_set_preview_config);
+
+int imp_set_resizer_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct rsz_channel_config *chan_config)
+{
+ int ret = 0, len;
+
+ dev_dbg(dev, "imp_set_resizer_config. len = %d\n", chan_config->len);
+ if (channel->mode == IMP_MODE_INVALID) {
+ dev_err(dev, "Channel mode is not set. \n");
+ return -EINVAL;
+ }
+
+ if (channel->mode != chan_config->oper_mode) {
+ dev_err(dev,
+ "mode mis-match, chan mode = %d, config mode = %d\n",
+ channel->mode, chan_config->oper_mode);
+ return -EINVAL;
+ }
+
+ if ((chan_config->oper_mode == IMP_MODE_CONTINUOUS) &&
+ (!chan_config->chain)) {
+ dev_err(dev,
+ "In continuous mode, resizer can be only chained. \n");
+ return -EINVAL;
+ }
+
+ if (channel->config_state == STATE_NOT_CONFIGURED) {
+ if (chan_config->oper_mode == IMP_MODE_CONTINUOUS) {
+ /* allocate shared hw config block */
+ dev_dbg(dev, "imp_set_resizer_config-cont. \n");
+ channel->config = imp_hw_if->alloc_config_block(dev, 1);
+ } else {
+ if (chan_config->chain) {
+ dev_dbg(dev,
+ "imp_set_resizer_config-ss, chain. \n");
+ channel->config =
+ imp_hw_if->alloc_config_block(dev, 1);
+ } else {
+ dev_dbg(dev,
+ "imp_set_resizer_config-ss,"
+ " no-chain.\n");
+ channel->config =
+ imp_hw_if->alloc_config_block(dev, 0);
+ }
+ }
+ if (ISNULL(channel->config)) {
+ dev_err(dev, "memory allocation failed\n");
+ return -EFAULT;
+ }
+ /* allocate buffer for holding user configuration */
+ channel->user_config = imp_hw_if->alloc_user_config_block(dev,
+ IMP_RESIZER,
+ chan_config->
+ oper_mode,
+ &len);
+ if (ISNULL(channel->user_config)) {
+ dev_err(dev, "memory allocation failed\n");
+ if (!chan_config->chain)
+ kfree(channel->config);
+ return -EFAULT;
+ }
+ channel->user_config_size = len;
+ dev_dbg(dev, "imp_set_resizer_config, len = %d. \n", len);
+ }
+
+ if (ISNULL(chan_config->config)) {
+ /* put defaults for user configuration */
+ imp_hw_if->set_user_config_defaults(dev,
+ IMP_RESIZER,
+ chan_config->oper_mode,
+ channel->user_config);
+ dev_dbg(dev, "imp_set_resizer_config, default\n");
+ } else {
+ if (copy_from_user(channel->user_config,
+ chan_config->config,
+ channel->user_config_size)) {
+ dev_err(dev, "Copy from user to kernel failed\n");
+ return -EFAULT;
+ }
+ dev_dbg(dev, "imp_set_resizer_config, user setting\n");
+ }
+
+ /* Update the user configuration in the hw config block or
+ if chained, copy it to the shared block and allow previewer
+ to configure it */
+ ret = imp_hw_if->set_resizer_config(dev,
+ chan_config->oper_mode,
+ chan_config->chain,
+ channel->user_config,
+ channel->config);
+
+ if (ret < 0)
+ dev_err(dev, "set resizer config failed\n");
+
+ channel->chained = chan_config->chain;
+ channel->config_state = STATE_CONFIGURED;
+
+ return ret;
+}
+EXPORT_SYMBOL(imp_set_resizer_config);
+
+int imp_get_preview_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct prev_channel_config *chan_config)
+{
+ if (channel->mode == IMP_MODE_INVALID) {
+ dev_err(dev, "Channel mode is not set. \n");
+ return -EINVAL;
+ }
+
+ if (channel->mode != chan_config->oper_mode) {
+ dev_err(dev,
+ "mode mis-match, chan mode = %d, config mode = %d\n",
+ channel->mode, chan_config->oper_mode);
+ return -EINVAL;
+ }
+
+ if (channel->config_state != STATE_CONFIGURED) {
+ dev_err(dev, "channel not configured\n");
+ return -EINVAL;
+ }
+
+ if (ISNULL(chan_config->config)) {
+ dev_err(dev, "NULL ptr\n");
+ return -EINVAL;
+ }
+
+ if (copy_to_user((void *)chan_config->config,
+ (void *)channel->user_config,
+ channel->user_config_size)) {
+ dev_err(dev, "Error in copy to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+EXPORT_SYMBOL(imp_get_preview_config);
+
+int imp_get_resize_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct rsz_channel_config *chan_config)
+{
+ dev_dbg(dev, "imp_get_resize_config:\n");
+ if (channel->mode == IMP_MODE_INVALID) {
+ dev_err(dev, "Channel mode is not set. \n");
+ return -EINVAL;
+ }
+
+ if (channel->mode != chan_config->oper_mode) {
+ dev_err(dev,
+ "mode mis-match, chan mode = %d, config mode = %d\n",
+ channel->mode, chan_config->oper_mode);
+ return -EINVAL;
+ }
+
+ if (channel->config_state != STATE_CONFIGURED) {
+ dev_err(dev, "channel not configured\n");
+ return -EINVAL;
+ }
+
+ if (ISNULL(chan_config->config)) {
+ dev_err(dev, "NULL ptr\n");
+ return -EINVAL;
+ }
+
+ if (copy_to_user((void *)chan_config->config,
+ (void *)channel->user_config,
+ channel->user_config_size)) {
+ dev_err(dev, "Error in copy to user\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+EXPORT_SYMBOL(imp_get_resize_config);
+
+struct prev_module_if *imp_get_module_interface(struct device *dev,
+ unsigned short module_id)
+{
+ struct prev_module_if *module_if;
+ unsigned int index = 0;
+ while (1) {
+ module_if = imp_hw_if->prev_enum_modules(dev, index);
+ if (ISNULL(module_if))
+ break;
+ if (module_if->module_id == module_id)
+ break;
+ index++;
+ }
+ return module_if;
+}
+EXPORT_SYMBOL(imp_get_module_interface);
+
+int imp_init_serializer(void)
+{
+ if (!serializer_initialized) {
+ memset((void *)&imp_serializer_info, (char)0,
+ sizeof(struct imp_serializer));
+ init_completion(&imp_serializer_info.sem_isr);
+ imp_serializer_info.sem_isr.done = 0;
+ imp_serializer_info.array_count = 0;
+ mutex_init(&imp_serializer_info.array_sem);
+ printk(KERN_NOTICE "imp serializer initialized\n");
+ serializer_initialized = 1;
+ imp_hw_if = imp_get_hw_if();
+ }
+ return 0;
+}
+EXPORT_SYMBOL(imp_init_serializer);
+
+/*
+=====================add_to_array===========================
+ Function to add the current channel configuration into array
+according to priority.
+*/
+static int add_to_array(struct device *dev, struct imp_logical_channel *chan)
+{
+ int array_index, device_index, ret;
+
+ /* locking the configuartion aaray */
+ ret = mutex_lock_interruptible(&imp_serializer_info.array_sem);
+ if (ret < 0)
+ return ret;
+
+ /* Add configuration to the queue according to its priority */
+ if (imp_serializer_info.array_count == 0) {
+ /* If array empty insert at top position */
+ dev_dbg(dev, "First request for resizing \n");
+ imp_serializer_info.channel_config[imp_serializer_info.
+ array_count]
+ = chan;
+ } else {
+ /* Check the priority and insert according to the priority */
+ /* it will start from first index */
+ for (array_index = 1;
+ array_index < imp_serializer_info.array_count;
+ array_index++) {
+ if (imp_serializer_info.channel_config[array_index]->
+ priority < chan->priority)
+ break;
+ }
+ /* Shift all the elements one step down in array */
+ /* IF firstelement and second have same prioroty than insert */
+ /* below first */
+ for (device_index = imp_serializer_info.array_count;
+ device_index > array_index; device_index--) {
+ imp_serializer_info.channel_config[device_index] =
+ imp_serializer_info.
+ channel_config[device_index - 1];
+ }
+
+ imp_serializer_info.channel_config[array_index] = chan;
+ }
+
+ /* incrementing number of requests for resizing */
+ imp_serializer_info.array_count++;
+ dev_dbg(dev, "The total request for resizing are %d",
+ imp_serializer_info.array_count);
+
+ if (imp_serializer_info.array_count != 1) {
+ mutex_unlock(&imp_serializer_info.array_sem);
+
+ /* if the request is pending that lock the request */
+ wait_for_completion_interruptible(&(chan->channel_sem));
+
+ } else {
+ mutex_unlock(&imp_serializer_info.array_sem);
+ }
+
+ return 0;
+} /* end of function addToarray */
+
+/*
+=====================delete_from_array===========================
+ Function to delete the processed array entry form the array
+*/
+static int delete_from_array(struct device *dev,
+ struct imp_logical_channel *chan)
+{
+ int array_index = 0, device_index, ret;
+
+ ret = mutex_lock_interruptible(&(imp_serializer_info.array_sem));
+
+ if (ret < 0)
+ return ret;
+
+ /*shift the entried in array */
+ if (imp_serializer_info.array_count != 1) {
+ /* decrementing the request count */
+ imp_serializer_info.array_count--;
+
+ /* Shift all the elements one step up in array */
+ for (device_index = array_index;
+ device_index < imp_serializer_info.array_count;
+ device_index++) {
+
+ imp_serializer_info.channel_config[device_index] =
+ imp_serializer_info.
+ channel_config[device_index + 1];
+ }
+ /* making last entry NULL; */
+ imp_serializer_info.channel_config[device_index + 1] = NULL;
+ }
+ /* remove the top entry */
+ else {
+ dev_dbg(dev, "\n Removing the first request");
+ imp_serializer_info.array_count--;
+ imp_serializer_info.channel_config[0] = NULL;
+ }
+
+ if (imp_serializer_info.array_count != 0) {
+ /* Get config having highest priority in array
+ resizer_device.config
+ and unlock config.sem of that config */
+
+ dev_dbg(dev,
+ "Releasing array lock of the second entry\n");
+ complete(&(imp_serializer_info.channel_config[0]->channel_sem));
+ mutex_unlock(&(imp_serializer_info.array_sem));
+ } else {
+ dev_dbg(dev, "Releasing array lock \n");
+ mutex_unlock(&(imp_serializer_info.array_sem));
+ }
+
+ return 0;
+}
+
+/**
+ * imp_uservirt_to_phys : translate user/virtual address to phy address
+ * @virtp: user/virtual address
+ *
+ * This inline function is used to convert user space virtual address to
+ * physical address.
+ */
+static inline u32 imp_uservirt_to_phys(struct device *dev, u32 virtp)
+{
+ unsigned long physp = 0;
+ struct mm_struct *mm = current->mm;
+ struct vm_area_struct *vma;
+ /* For kernel direct-mapped memory, take the easy way */
+ if (virtp >= PAGE_OFFSET) {
+ physp = virt_to_phys((void *)virtp);
+ } else if ((vma = find_vma(mm, virtp)) && (vma->vm_flags & VM_IO) &&
+ (vma->vm_pgoff)) {
+ /**
+ * this will catch, kernel-allocated, mmaped-to-usermode
+ * addresses
+ */
+ physp = (vma->vm_pgoff << PAGE_SHIFT) + (virtp - vma->vm_start);
+ } else {
+ /* otherwise, use get_user_pages() for general userland pages */
+ int res, nr_pages = 1;
+ struct page *pages;
+ down_read(&current->mm->mmap_sem);
+
+ res = get_user_pages(current, current->mm,
+ virtp, nr_pages, 1, 0, &pages, NULL);
+ up_read(&current->mm->mmap_sem);
+
+ if (res == nr_pages)
+ physp = __pa(page_address(&pages[0]) +
+ (virtp & ~PAGE_MASK));
+ else {
+ dev_err(dev, "get_user_pages failed\n");
+ return 0;
+ }
+ }
+ return physp;
+}
+
+static int imp_common_start(struct device *dev,
+ struct imp_logical_channel *chan,
+ struct imp_convert *convert)
+{
+ int ret, prev;
+ struct irq_numbers irq;
+ unsigned int offset = 0;
+ unsigned long addr;
+ int status = 0;
+
+ if ((convert->in_buff.size == 0) || (convert->in_buff.offset == 0)) {
+ dev_err(dev, "in_buff buf size or offset invalid\n");
+ return -1;
+ }
+ if (chan->in_numbufs == 0) {
+ /* user ptr IO */
+ if (convert->in_buff.index != -1) {
+ dev_err(dev,
+ "in_buff index should be set to -1"
+ " for user ptr io\n");
+ return -1;
+ }
+ if (convert->in_buff.offset % 32) {
+ dev_err(dev, "in_buff Offset to be a multiple of 32\n");
+ return -1;
+ }
+ addr = imp_uservirt_to_phys(dev, convert->in_buff.offset);
+ if (!addr) {
+ dev_err(dev, "in_buff Offset - can't get user page\n");
+ return -1;
+ }
+ if (imp_hw_if->update_inbuf_address(chan->config, addr) < 0) {
+ dev_err(dev,
+ "Error in configuring input buffer address\n");
+ return -EINVAL;
+ }
+ } else {
+ if ((convert->in_buff.index < 0) ||
+ (convert->in_buff.index >= chan->in_numbufs)) {
+ dev_err(dev, "in_buff index is out of range\n");
+ return -1;
+ }
+ if (cpu_is_davinci_dm365()) {
+ if ((convert->in_buff.offset + convert->in_buff.size) >
+ (chan->in_bufs[convert->in_buff.index]->offset +
+ chan->in_bufs[convert->in_buff.index]->size)) {
+ dev_err(dev,
+ "in_buff offset provided "
+ " is out of range, %d:%d:%d:%d:%d\n",
+ convert->in_buff.index,
+ convert->in_buff.offset,
+ convert->in_buff.size,
+ chan->in_bufs[convert->in_buff.index]->offset,
+ chan->in_bufs[convert->in_buff.index]->size);
+ return -1;
+ }
+ } else if (convert->in_buff.offset !=
+ chan->in_bufs[convert->in_buff.index]->offset) {
+ dev_err(dev,
+ "in_buff offset provided doesn't"
+ " match, %d:%d:%d\n",
+ convert->in_buff.index,
+ convert->in_buff.offset,
+ chan->in_bufs[convert->in_buff.index]->offset);
+ return -1;
+ }
+ if (imp_hw_if->update_inbuf_address(chan->config,
+ convert->in_buff.
+ offset) < 0) {
+ dev_err(dev,
+ "Error in configuring input buffer address\n");
+ return -EINVAL;
+ }
+ }
+
+ if ((convert->out_buff1.size != 0)
+ && (convert->out_buff1.offset != 0)) {
+ if (chan->out_numbuf1s == 0) {
+ /* user ptr IO */
+ if (convert->out_buff1.index != -1) {
+ dev_err(dev,
+ "out_buff1 index should be"
+ " -1 for user ptr IO\n");
+ return -1;
+ }
+ if (convert->out_buff1.offset % 32) {
+ dev_err(dev,
+ "out_buff1 Offset to be a multiple"
+ " of 32\n");
+ return -1;
+ }
+ offset = imp_uservirt_to_phys(dev, convert->out_buff1.offset);
+ if (!offset) {
+ dev_err(dev, "out_buff1 Offset - can't get user page\n");
+ return -1;
+ }
+ status = 1;
+ } else {
+ /* memory mapped IO */
+ if ((convert->out_buff1.index < 0) ||
+ (convert->out_buff1.index >= chan->out_numbuf1s)) {
+ dev_err(dev,
+ "out_buff1, index is out of range\n");
+ return -1;
+ }
+ if (cpu_is_davinci_dm365()) {
+ if ((convert->out_buff1.offset +
+ convert->out_buff1.size) >
+ (chan->out_buf1s[convert->out_buff1.index]->offset +
+ chan->out_buf1s[convert->out_buff1.index]->size)) {
+ dev_err(dev,
+ "out_buff offset provided "
+ " is out of range, %d:%d:%d:%d:%d\n",
+ convert->out_buff1.index,
+ convert->out_buff1.offset,
+ convert->out_buff1.size,
+ chan->out_buf1s[convert->out_buff1.index]->offset,
+ chan->out_buf1s[convert->out_buff1.index]->size);
+ return -1;
+ }
+ } else if (convert->out_buff1.offset !=
+ chan->out_buf1s[convert->out_buff1.index]->offset) {
+ dev_err(dev,
+ "out_buff1 offset provided"
+ " doesn't match\n");
+ return -1;
+ }
+ offset =
+ convert->out_buff1.offset;
+ status = 1;
+ }
+ }
+
+ if (imp_hw_if->update_outbuf1_address(chan->config, offset) < 0) {
+ dev_err(dev, "Error in configuring out_buff1 address\n");
+ return -EINVAL;
+ }
+
+ offset = 0;
+ if ((convert->out_buff2.size != 0)
+ && (convert->out_buff2.offset != 0)) {
+ if (chan->out_numbuf2s == 0) {
+ /* user ptr IO */
+ if (convert->out_buff2.index != -1) {
+ dev_err(dev,
+ "out_buff2 index should be -1"
+ " for user ptr IO\n");
+ return -1;
+ }
+ if (convert->out_buff2.offset % 32) {
+ dev_err(dev,
+ "out_buff2 Offset to be a"
+ " multiple of 32\n");
+ return -1;
+ }
+ status = 1;
+ offset = imp_uservirt_to_phys(dev, convert->out_buff2.offset);
+ if (!offset) {
+ dev_err(dev, "out_buff2 Offset - can't get user page\n");
+ return -1;
+ }
+ } else {
+ /* memory mapped IO */
+ if ((convert->out_buff2.index < 0) ||
+ (convert->out_buff2.index >= chan->out_numbuf2s)) {
+ dev_err(dev,
+ "out_buff1, index is out of range\n");
+ return -1;
+ }
+ if (cpu_is_davinci_dm365()) {
+ if ((convert->out_buff2.offset + convert->out_buff2.size) >
+ (chan->out_buf2s[convert->out_buff2.index]->offset + chan->out_buf2s[convert->out_buff2.index]->size)) {
+ dev_err(dev,
+ "out_buff offset provided "
+ " is out of range, %d:%d:%d:%d:%d\n",
+ convert->out_buff2.index,
+ convert->out_buff2.offset,
+ convert->out_buff2.size,
+ chan->out_buf2s[convert->out_buff2.index]->offset,
+ chan->out_buf2s[convert->out_buff2.index]->size);
+ return -1;
+ }
+ } else if (convert->out_buff2.offset !=
+ chan->out_buf2s[convert->out_buff2.index]->offset) {
+ dev_err(dev,
+ "out_buff2 offset provided"
+ " doesn't match\n");
+ return -1;
+ }
+ offset =
+ convert->out_buff2.offset;
+ status = 1;
+ }
+ }
+
+ if (!(ISNULL(imp_hw_if->update_outbuf2_address))) {
+ if (imp_hw_if->update_outbuf2_address(
+ chan->config, offset) < 0) {
+ dev_err(dev,
+ "Error in configuring out_buff2 address\n");
+ return -EINVAL;
+ }
+ }
+
+ if (!status) {
+ dev_err(dev,
+ "either out_buff1 or out_buff2 address needed \n");
+ return -EINVAL;
+ }
+
+ ret = add_to_array(dev, chan);
+
+ if (ret < 0)
+ return ret;
+
+ if (chan->type == IMP_PREVIEWER) {
+ if (chan->chained) {
+ imp_hw_if->get_rsz_irq(&irq);
+ prev = 0;
+ } else {
+ imp_hw_if->get_preview_irq(&irq);
+ prev = 1;
+ }
+ } else {
+ /* Resizer channel */
+ imp_hw_if->get_rsz_irq(&irq);
+ prev = 0;
+ }
+
+ if (prev)
+ ret = request_irq(irq.sdram, imp_common_isr, IRQF_DISABLED,
+ "DaVinciPreviewer", (void *)NULL);
+ else
+ ret = request_irq(irq.sdram, imp_common_isr, IRQF_DISABLED,
+ "DaVinciResizer", (void *)NULL);
+ if (imp_hw_if->serialize())
+ imp_hw_if->hw_setup(dev, chan->config);
+
+ imp_hw_if->enable(1, chan->config);
+
+ /* Waiting for resizing to be complete */
+ wait_for_completion_interruptible(&(imp_serializer_info.sem_isr));
+
+ free_irq(irq.sdram, (void *)NULL);
+
+ ret = delete_from_array(dev, chan);
+
+ return ret;
+}
+
+int imp_common_start_resize(struct device *dev,
+ struct imp_logical_channel *chan,
+ struct imp_convert *convert)
+{
+ return (imp_common_start(dev, chan, convert));
+}
+EXPORT_SYMBOL(imp_common_start_resize);
+
+int imp_common_start_preview(struct device *dev,
+ struct imp_logical_channel *chan,
+ struct imp_convert *convert)
+{
+ return (imp_common_start(dev, chan, convert));
+}
+EXPORT_SYMBOL(imp_common_start_preview);
+
+int imp_common_reconfig_resizer(struct device *dev,
+ struct rsz_reconfig *reconfig,
+ struct imp_logical_channel *chan)
+{
+ if (chan->config_state != STATE_CONFIGURED) {
+ dev_err(dev, "Configure channel first before reconfig\n");
+ return -EINVAL;
+ }
+ if (ISNULL(imp_hw_if->reconfig_resizer)) {
+ dev_err(dev, "reconfig is not supported\n");
+ return -EINVAL;
+ }
+
+ return imp_hw_if->reconfig_resizer(dev, reconfig, chan->config);
+}
+EXPORT_SYMBOL(imp_common_reconfig_resizer);
+
+static __init int imp_common_init(void)
+{
+ return 0;
+}
+static void imp_cleanup(void)
+{
+}
+
+MODULE_LICENSE("GPL");
+
+module_init(imp_common_init);
+module_exit(imp_cleanup);
diff --git a/drivers/char/imp_previewer.c b/drivers/char/imp_previewer.c
new file mode 100644
index 00000000..ac798291
--- /dev/null
+++ b/drivers/char/imp_previewer.c
@@ -0,0 +1,781 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+//#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+
+#include <media/davinci/imp_hw_if.h>
+#include <media/davinci/imp_previewer.h>
+
+#include <mach/cputype.h>
+
+#define DRIVERNAME "DaVinciPreviewer"
+
+struct device *prev_dev;
+
+/* prev_device structure */
+static struct prev_device prevdevice;
+
+/* instance of the imp interface */
+static struct imp_hw_interface *imp_hw_if;
+
+/* Functions */
+int previewer_open(struct inode *inode, struct file *filp)
+{
+ struct prev_device *device = &prevdevice;
+ struct prev_fh *fh;
+ int i;
+
+ if (filp->f_flags & O_NONBLOCK) {
+ dev_err
+ (prev_dev,
+ "previewer_open: device cannot be "
+ "opened in non-blocked mode\n");
+ return -EBUSY;
+ }
+ /* allocate memory for a the file handle */
+
+ fh = kmalloc(sizeof(struct prev_fh), GFP_KERNEL);
+ if (fh == NULL)
+ return -ENOMEM;
+
+ mutex_lock(&device->lock);
+ if (!device->users) {
+ device->chan->mode = IMP_MODE_INVALID;
+ device->chan->primary_user = 0;
+ device->chan->chained = 0;
+ /* Preview channel has maximum priority
+ since it is used with a capture application
+ and needs to achieve required fps throughput
+ */
+ device->chan->config = NULL;
+ device->chan->user_config_size = 0;
+ device->chan->user_config = NULL;
+ device->chan->config_state = STATE_NOT_CONFIGURED;
+ device->chan->in_numbufs = 0;
+ device->chan->out_numbuf1s = 0;
+ device->chan->out_numbuf2s = 0;
+ for (i = 0; i < MAX_BUFFERS; i++) {
+ device->chan->in_bufs[i] = NULL;
+ device->chan->out_buf1s[i] = NULL;
+ device->chan->out_buf2s[i] = NULL;
+ }
+ device->chan->priority = MAX_PRIORITY;
+ init_completion(&(device->chan->channel_sem));
+ device->chan->channel_sem.done = 0;
+ mutex_init(&(device->chan->lock));
+ }
+ device->users++;
+ mutex_unlock(&device->lock);
+ /* store the pointer of prev_params in private_data member of file
+ and params member of prev_device */
+ filp->private_data = fh;
+ fh->chan = device->chan;
+ fh->primary_user = 0;
+
+ return 0;
+}
+
+int previewer_release(struct inode *inode, struct file *filp)
+{
+ /* get the configuratin from private_date member of file */
+ struct prev_fh *fh;
+ struct imp_logical_channel *chan;
+ struct prev_device *device = &prevdevice;
+ unsigned int state;
+ unsigned int mode;
+
+ mutex_lock(&device->lock);
+ fh = (struct prev_fh *)filp->private_data;
+ chan = fh->chan;
+
+ /* if hw is busy in continuous mode, and this is primary
+ user, we can not close the device
+ */
+ state = imp_hw_if->get_hw_state();
+ mode = imp_hw_if->get_preview_oper_mode();
+
+ if ((device->users != 1) && (fh->primary_user)) {
+ dev_err(prev_dev,
+ "Close other instances before"
+ " this primary user instance\n");
+ mutex_unlock(&device->lock);
+ return -EBUSY;
+ }
+
+ device->users--;
+ if (fh->primary_user) {
+ /* call free_buffers to free memory allocated to buffers */
+ imp_common_free_buffers(prev_dev, chan);
+ chan->primary_user = 0;
+ if (chan->config_state == STATE_CONFIGURED)
+ kfree(chan->user_config);
+ }
+
+ kfree(filp->private_data);
+ /* Assign null to private_data member of file and params
+ member of device */
+ filp->private_data = NULL;
+ mutex_unlock(&device->lock);
+ return 0;
+}
+
+int previewer_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ /* get the address of global object of prev_device structure */
+ struct prev_device *device = &prevdevice;
+ return (imp_common_mmap(filp, vma, device->chan));
+}
+
+int previewer_doioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret = 0;
+ struct prev_fh *fh = (struct prev_fh *)file->private_data;
+ struct imp_logical_channel *chan = fh->chan;
+ unsigned int mode, user_mode;
+
+ if (ISNULL(chan)) {
+ dev_err(prev_dev, "channel ptr is null\n");
+ return -EFAULT;
+ }
+
+ if (ISNULL((void *)arg)) {
+ dev_err(prev_dev, "arg ptr is null\n");
+ return -EFAULT;
+ }
+
+
+ mode = imp_hw_if->get_preview_oper_mode();
+
+ switch (cmd) {
+ case PREV_QUERYBUF:
+ case PREV_REQBUF:
+ case PREV_S_PARAM:
+ case PREV_PREVIEW:
+ case PREV_S_CONFIG:
+ {
+ if (!fh->primary_user)
+ return -EACCES;
+ }
+ break;
+ }
+
+ switch (cmd) {
+ case PREV_QUERYBUF:
+ case PREV_REQBUF:
+ case PREV_PREVIEW:
+ {
+ if (chan->mode == PREV_MODE_CONTINUOUS)
+ return -EACCES;
+ }
+ break;
+ }
+
+ /* switch according value of cmd */
+ switch (cmd) {
+
+ case PREV_S_OPER_MODE:
+ {
+ user_mode = *((unsigned long *)arg);
+ if (chan->mode != IMP_MODE_INVALID) {
+ dev_err(prev_dev,
+ "Mode set for this channel already\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ /* primary user trying to set mode */
+ if (user_mode >= IMP_MODE_INVALID) {
+ dev_err(prev_dev, "Invalid mode\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ if (user_mode != mode) {
+ dev_err(prev_dev,
+ "Operation mode doesn't match"
+ " with current hw mode\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ if (mutex_lock_interruptible(&chan->lock)) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+
+ chan->mode = mode;
+ chan->primary_user = 1;
+ fh->primary_user = 1;
+ mutex_unlock(&chan->lock);
+ dev_dbg(prev_dev,
+ "PREV_S_OPER_MODE: Operation mode set to %d\n",
+ user_mode);
+ }
+ break;
+ /* if case is to query for buffer address */
+ case PREV_G_OPER_MODE:
+ {
+ *(unsigned long *)arg = chan->mode;
+ dev_dbg(prev_dev,
+ "PREV_G_OPER_MODE: mode = %d\n", chan->mode);
+ }
+ break;
+
+ case PREV_ENUM_CAP:
+ {
+ struct prev_cap *cap = (struct prev_cap *)arg;
+ struct prev_module_if *module_if;
+ dev_dbg(prev_dev, "PREV_ENUM_CAP:\n");
+
+ module_if =
+ imp_hw_if->prev_enum_modules(prev_dev, cap->index);
+
+ if (ISNULL(module_if)) {
+ dev_dbg(prev_dev,
+ "PREV_ENUM_CAP - Last module \n");
+ ret = -EINVAL;
+ goto ERROR;
+ } else {
+ strcpy(cap->version, module_if->version);
+ cap->module_id = module_if->module_id;
+ cap->control = module_if->control;
+ cap->path = module_if->path;
+ strcpy(cap->module_name,
+ module_if->module_name);
+ }
+ }
+ break;
+
+ /* if case is to set configuration parameters */
+ case PREV_S_PARAM:
+ {
+ struct prev_module_param *module_param =
+ (struct prev_module_param *)arg;
+ struct prev_module_if *module_if;
+
+ dev_dbg(prev_dev, "PREV_S_PARAM:\n");
+
+ if (chan->config_state != STATE_CONFIGURED) {
+ dev_err(prev_dev, "Channel not configured\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ module_if =
+ imp_get_module_interface(prev_dev,
+ module_param->module_id);
+ if (ISNULL(module_if)) {
+ dev_err(prev_dev, "Invalid module id\n");
+ ret = -EINVAL;
+ goto ERROR;
+ } else {
+ if (strcmp
+ (module_if->version,
+ module_param->version)) {
+ dev_err(prev_dev,
+ "Invalid module version\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+ /* we have a valid */
+ ret = module_if->set(prev_dev,
+ module_param->
+ param, module_param->len);
+ if (ret < 0) {
+ dev_err(prev_dev,
+ "error in PREV_S_PARAM\n");
+ goto ERROR;
+ }
+ }
+ }
+ break;
+ /* if case is to get configuration parameters */
+ case PREV_G_PARAM:
+ {
+ struct prev_module_param *module_param =
+ (struct prev_module_param *)arg;
+ struct prev_module_if *module_if;
+
+ dev_dbg(prev_dev, "PREV_G_PARAM:\n");
+
+ if (ISNULL(module_param)) {
+ ret = -EINVAL;
+ goto ERROR;
+ }
+ module_if =
+ imp_get_module_interface(prev_dev,
+ module_param->module_id);
+ if (ISNULL(module_if)) {
+ dev_err(prev_dev, "Invalid module id\n");
+ ret = -EINVAL;
+ goto ERROR;
+ } else {
+ if (strcmp
+ (module_if->version,
+ module_param->version)) {
+ dev_err(prev_dev,
+ "Invalid module version\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ ret = module_if->get(prev_dev,
+ module_param->param,
+ module_param->len);
+ if (ret < 0) {
+ dev_err(prev_dev,
+ "error in PREV_G_PARAM\n");
+ goto ERROR;
+ }
+ }
+ }
+ break;
+
+ case PREV_S_CONFIG:
+ {
+ dev_dbg(prev_dev, "PREV_S_CONFIG:\n");
+ if (mutex_lock_interruptible(&(chan->lock))) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+
+ ret =
+ imp_set_preview_config(prev_dev, chan,
+ (struct prev_channel_config
+ *)arg);
+ mutex_unlock(&(chan->lock));
+ }
+ break;
+
+ case PREV_G_CONFIG:
+ {
+ struct prev_channel_config *user_config =
+ (struct prev_channel_config *)arg;
+
+ dev_dbg(prev_dev, "PREV_G_CONFIG:\n");
+ if (ISNULL(user_config->config)) {
+ ret = -EINVAL;
+ dev_err(prev_dev, "error in PREV_GET_CONFIG\n");
+ goto ERROR;
+ }
+
+ ret =
+ imp_get_preview_config(prev_dev, chan, user_config);
+ }
+ break;
+ case PREV_S_CONTROL:
+ {
+ struct prev_module_if *module_if;
+ struct prev_control *control_param =
+ (struct prev_control *)arg;
+
+ dev_dbg(prev_dev, "PREV_S_CONTROL:\n");
+ if (ISNULL(control_param)) {
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ if (chan->mode != IMP_MODE_CONTINUOUS) {
+ dev_err(prev_dev,
+ "Control operation allowed"
+ " only in continuous mode\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+ module_if =
+ imp_get_module_interface(prev_dev,
+ control_param->module_id);
+ if (ISNULL(module_if)) {
+ dev_err(prev_dev, "Invalid module id\n");
+ ret = -EINVAL;
+ goto ERROR;
+ } else {
+ if (strcmp
+ (module_if->version,
+ control_param->version)) {
+ dev_err(prev_dev,
+ "Invalid module version\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+ }
+
+ if (mutex_lock_interruptible(&chan->lock)) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+
+ ret = module_if->set(prev_dev,
+ control_param->param,
+ control_param->len);
+ if (ret < 0) {
+ dev_err(prev_dev,
+ "error in handling PREV_SET_CONTROL\n");
+ }
+ mutex_unlock(&(chan->lock));
+ }
+ break;
+ case PREV_G_CONTROL:
+ {
+ struct prev_module_if *module_if;
+ struct prev_control *control_param =
+ (struct prev_control *)arg;
+
+ dev_dbg(prev_dev, "PREV_G_CONTROL:\n");
+ if (ISNULL(control_param)) {
+ ret = -EINVAL;
+ goto ERROR;
+ }
+ module_if =
+ imp_get_module_interface(prev_dev,
+ control_param->module_id);
+ if (ISNULL(module_if)) {
+ dev_err(prev_dev, "Invalid module id\n");
+ ret = -EINVAL;
+ goto ERROR;
+ } else {
+ if (strcmp
+ (module_if->version,
+ control_param->version)) {
+ dev_err(prev_dev,
+ "Invalid module version\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+ }
+ ret = module_if->get(prev_dev,
+ control_param->param,
+ control_param->len);
+ if (ret < 0) {
+ dev_err(prev_dev,
+ "error in handling PREV_GET_CONTROL\n");
+ }
+ }
+ break;
+
+ case PREV_QUERYBUF:
+ {
+ dev_dbg(prev_dev, "PREV_QUERYBUF:\n");
+ if (mutex_lock_interruptible(&chan->lock)) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+
+ /* call query buffer which will return buffer address */
+ ret = imp_common_query_buffer(prev_dev,
+ chan,
+ (struct imp_buffer *)arg);
+ mutex_unlock(&(chan->lock));
+ }
+ break;
+
+ /* if case is to request buffers */
+ case PREV_REQBUF:
+ {
+ dev_dbg(prev_dev, "PREV_REQBUF:\n");
+ if (mutex_lock_interruptible(&chan->lock)) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+
+ /* call request buffer to allocate buffers */
+ ret = imp_common_request_buffer(prev_dev,
+ chan,
+ (struct imp_reqbufs *)
+ arg);
+ mutex_unlock(&(chan->lock));
+ }
+ break;
+
+ /* if the case is to do previewing */
+ case PREV_PREVIEW:
+ {
+ dev_dbg(prev_dev, "PREV_PREVIEW:\n");
+ if (mutex_lock_interruptible(&chan->lock)) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+ ret =
+ imp_common_start_preview(prev_dev, chan,
+ (struct imp_convert *)arg);
+ mutex_unlock(&(chan->lock));
+ }
+ break;
+#ifdef CONFIG_IMP_DEBUG
+ case PREV_DUMP_HW_CONFIG:
+ {
+ dev_dbg(prev_dev, "PREV_DUMP_HW_CONFIG:\n");
+ if (mutex_lock_interruptible(&chan->lock)) {
+ ret = -EINTR;
+ goto ERROR;
+ }
+ if (imp_hw_if->dump_hw_config)
+ imp_hw_if->dump_hw_config();
+ mutex_unlock(&(chan->lock));
+ }
+ break;
+#endif
+ default:
+ dev_err(prev_dev, "previewer_ioctl: Invalid Command Value\n");
+ ret = -EINVAL;
+ }
+
+ERROR:
+ return ret;
+}
+
+static long previewer_ioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret;
+ char sbuf[128];
+ void *mbuf = NULL;
+ void *parg = NULL;
+
+ dev_dbg(prev_dev, "Start of previewer ioctl\n");
+
+ /* Copy arguments into temp kernel buffer */
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_NONE:
+ parg = NULL;
+ break;
+ case _IOC_READ:
+ case _IOC_WRITE:
+ case (_IOC_WRITE | _IOC_READ):
+ if (_IOC_SIZE(cmd) <= sizeof(sbuf)) {
+ parg = sbuf;
+ } else {
+ /* too big to allocate from stack */
+ mbuf = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
+ if (ISNULL(mbuf))
+ return -ENOMEM;
+ parg = mbuf;
+ }
+
+ ret = -EFAULT;
+ if (_IOC_DIR(cmd) & _IOC_WRITE)
+ if (copy_from_user(parg, (void __user *)arg,
+ _IOC_SIZE(cmd)))
+ goto out;
+ break;
+ }
+
+ /* call driver */
+ ret = previewer_doioctl(file, cmd, (unsigned long)parg);
+ if (ret == -ENOIOCTLCMD)
+ ret = -EINVAL;
+
+ /* Copy results into user buffer */
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_READ:
+ case (_IOC_WRITE | _IOC_READ):
+ if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd)))
+ ret = -EFAULT;
+ break;
+ }
+out:
+ kfree(mbuf);
+
+ dev_dbg(prev_dev, "End of previewer ioctl\n");
+ return ret;
+}
+
+static void previewer_platform_release(struct device *device)
+{
+ /* This is called when the reference count goes to zero */
+}
+
+static int previewer_probe(struct device *device)
+{
+ prev_dev = device;
+ return 0;
+}
+
+static int previewer_remove(struct device *device)
+{
+ return 0;
+}
+
+/* global variable of type file_operations containing function
+pointers of file operations */
+static struct file_operations prev_fops = {
+ .owner = THIS_MODULE,
+ .open = previewer_open,
+ .release = previewer_release,
+ .mmap = previewer_mmap,
+ .unlocked_ioctl = previewer_ioctl,
+};
+
+/* global variable of type cdev to register driver to the kernel */
+static struct cdev cdev;
+
+/* global variable which keeps major and minor number of the driver in it */
+static dev_t dev;
+
+static struct class *prev_class;
+
+static struct platform_device previewer_device = {
+ .name = "davinci_previewer",
+ .id = 2,
+ .dev = {
+ .release = previewer_platform_release,
+ }
+};
+
+static struct device_driver previewer_driver = {
+ .name = "davinci_previewer",
+ .bus = &platform_bus_type,
+ .probe = previewer_probe,
+ .remove = previewer_remove
+};
+
+int __init previewer_init(void)
+{
+ int result;
+ struct imp_logical_channel *chan_config = NULL;
+
+ /* Register the driver in the kernel */
+ /* dynamically get the major number for the driver using
+ alloc_chrdev_region function */
+ result = alloc_chrdev_region(&dev, 0, 1, DRIVERNAME);
+
+ /* if it fails return error */
+ if (result < 0) {
+ printk(KERN_ERR "DaVinciPreviewer: Module intialization \
+ failed. could not register character device\n");
+ return -ENODEV;
+ }
+
+ /* initialize cdev with file operations */
+ cdev_init(&cdev, &prev_fops);
+ cdev.owner = THIS_MODULE;
+ cdev.ops = &prev_fops;
+
+ /* add cdev to the kernel */
+ result = cdev_add(&cdev, dev, 1);
+
+ if (result) {
+ unregister_chrdev_region(dev, 1);
+ printk(KERN_ERR
+ "DaVinciPreviewer: Error adding "
+ "DavinciPreviewer .. error no:%d\n",
+ result);
+ return -EINVAL;
+ }
+
+ /* register character driver to the kernel */
+ register_chrdev(MAJOR(dev), DRIVERNAME, &prev_fops);
+
+ /* register driver as a platform driver */
+ if (driver_register(&previewer_driver) != 0) {
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&cdev);
+ return -EINVAL;
+ }
+
+ /* Register the drive as a platform device */
+ if (platform_device_register(&previewer_device) != 0) {
+ driver_unregister(&previewer_driver);
+ unregister_chrdev_region(dev, 1);
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+ cdev_del(&cdev);
+ return -EINVAL;
+ }
+
+ prev_class = class_create(THIS_MODULE, "davinci_previewer");
+ if (!prev_class) {
+ printk(KERN_NOTICE
+ "previewer_init: error in creating device class\n");
+ driver_unregister(&previewer_driver);
+ platform_device_unregister(&previewer_device);
+ unregister_chrdev_region(dev, 1);
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+ cdev_del(&cdev);
+ return -EIO;
+ }
+
+ device_create(prev_class, NULL, dev, NULL, "davinci_previewer");
+
+ prevdevice.users = 0;
+ chan_config = kmalloc(sizeof(struct imp_logical_channel), GFP_KERNEL);
+ if (ISNULL(chan_config)) {
+ unregister_chrdev_region(dev, 1);
+ device_destroy(prev_class, dev);
+ class_destroy(prev_class);
+ driver_unregister(&previewer_driver);
+ platform_device_unregister(&previewer_device);
+ cdev_del(&cdev);
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+ return -ENOMEM;
+ }
+ prevdevice.chan = chan_config;
+ prevdevice.chan->priority = MAX_PRIORITY;
+ prevdevice.chan->type = IMP_PREVIEWER;
+ if (!cpu_is_davinci_dm644x())
+ imp_init_serializer();
+ /* initialize mutex to 0 */
+ mutex_init(&(prevdevice.lock));
+ mutex_init(&(prevdevice.chan->lock));
+ imp_hw_if = imp_get_hw_if();
+ printk(KERN_NOTICE "davinci_previewer initialized\n");
+ return 0;
+}
+
+void __exit previewer_cleanup(void)
+{
+ /* remove major number allocated to this driver */
+ unregister_chrdev_region(dev, 1);
+
+ /* remove simple class device */
+ device_destroy(prev_class, dev);
+
+ /* destroy simple class */
+ class_destroy(prev_class);
+
+ /* Remove platform driver */
+ driver_unregister(&previewer_driver);
+
+ /* remove platform device */
+ platform_device_unregister(&previewer_device);
+
+ cdev_del(&cdev);
+
+ /* unregistering the driver from the kernel */
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+
+ kfree(prevdevice.chan);
+}
+
+module_init(previewer_init)
+module_exit(previewer_cleanup)
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/imp_resizer.c b/drivers/char/imp_resizer.c
new file mode 100644
index 00000000..f6d6bab2
--- /dev/null
+++ b/drivers/char/imp_resizer.c
@@ -0,0 +1,614 @@
+/* *
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not,write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+//#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/fb.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <media/davinci/imp_hw_if.h>
+#include <media/davinci/imp_resizer.h>
+
+#include <mach/cputype.h>
+
+#define DRIVER_NAME "DaVinciResizer"
+
+/*device structure shared across all instances*/
+struct rsz_device rsz_dev;
+
+/* For registeration of charatcer device*/
+static struct cdev c_dev;
+/* device structure to make entry in device*/
+static dev_t dev;
+/* for holding device entry*/
+static struct device *rsz_device;
+
+/* instance of the imp interface */
+static struct imp_hw_interface *imp_hw_if;
+/*
+=====================rsz_open===========================
+This function creates a channels.
+*/
+static int rsz_open(struct inode *inode, struct file *filp)
+{
+ struct imp_logical_channel *rsz_conf_chan;
+ int i, mode, ret;
+
+ if (filp->f_flags & O_NONBLOCK) {
+ dev_err
+ (rsz_device,
+ "rsz_open: device cannot be opened in non-blocked mode\n");
+ return -EBUSY;
+ }
+
+ mode = imp_hw_if->get_resize_oper_mode();
+
+ ret = mutex_lock_interruptible(&rsz_dev.lock);
+ if (ret)
+ return ret;
+ if ((mode == IMP_MODE_CONTINUOUS) ||
+ ((mode == IMP_MODE_SINGLE_SHOT) && (!imp_hw_if->serialize()))) {
+ if (rsz_dev.users != 0) {
+ dev_err(rsz_device,
+ "\n mode doesn't allow multiple instances\n");
+ mutex_unlock(&rsz_dev.lock);
+ return -EBUSY;
+ }
+ }
+
+ /* if usage counter is greater than maximum supported channels
+ return error */
+ if (rsz_dev.users >= MAX_CHANNELS) {
+ dev_err(rsz_device,
+ "\n modules usage count is greater than supported ");
+ mutex_unlock(&rsz_dev.lock);
+ return -EBUSY;
+ }
+
+ rsz_dev.users++;
+ mutex_unlock(&rsz_dev.lock);
+ /* allocate memory for a new configuration */
+ rsz_conf_chan = kmalloc(sizeof(struct imp_logical_channel), GFP_KERNEL);
+
+ if (rsz_conf_chan == NULL) {
+ dev_err(rsz_device,
+ "\n cannot allocate memory ro channel config");
+ return -ENOMEM;
+ }
+
+ rsz_conf_chan->config_state = STATE_NOT_CONFIGURED;
+ rsz_conf_chan->mode = IMP_MODE_INVALID;
+ rsz_conf_chan->primary_user = 0;
+ rsz_conf_chan->chained = 0;
+ rsz_conf_chan->config = NULL;
+ rsz_conf_chan->user_config = NULL;
+ rsz_conf_chan->user_config_size = 0;
+
+ /* Set priority to lowest for that configuration channel */
+ rsz_conf_chan->priority = MIN_PRIORITY;
+
+ /* Set the channel type to resize */
+ rsz_conf_chan->type = IMP_RESIZER;
+
+ for (i = 0; i < MAX_BUFFERS; i++) {
+ rsz_conf_chan->in_bufs[i] = NULL;
+ rsz_conf_chan->out_buf1s[i] = NULL;
+ rsz_conf_chan->out_buf2s[i] = NULL;
+ }
+ rsz_conf_chan->in_numbufs = 0;
+ rsz_conf_chan->out_numbuf1s = 0;
+ rsz_conf_chan->out_numbuf2s = 0;
+
+ dev_dbg(rsz_device, "Initializing of channel done \n");
+
+ /* Initializing of application mutex */
+ init_completion(&(rsz_conf_chan->channel_sem));
+ rsz_conf_chan->channel_sem.done = 0;
+ mutex_init(&(rsz_conf_chan->lock));
+ /* taking the configuartion structure in private data */
+ filp->private_data = rsz_conf_chan;
+
+
+ return 0;
+
+}
+
+/*
+=====================rsz_release===========================
+ The Function is used to release the number of resources occupied
+ by the channel
+*/
+static int rsz_release(struct inode *inode, struct file *filp)
+{
+ struct imp_logical_channel *rsz_conf_chan =
+ (struct imp_logical_channel *)filp->private_data;
+
+
+ /* Lock the channel */
+ mutex_lock(&(rsz_conf_chan->lock));
+
+ /* It will free all the input and output buffers */
+ imp_common_free_buffers(rsz_device, rsz_conf_chan);
+
+ if (rsz_conf_chan->config_state == STATE_CONFIGURED) {
+ if (!rsz_conf_chan->chained) {
+ imp_hw_if->dealloc_config_block(rsz_device,
+ rsz_conf_chan->config);
+ }
+ kfree(rsz_conf_chan->user_config);
+ }
+ mutex_unlock(&(rsz_conf_chan->lock));
+ mutex_lock(&rsz_dev.lock);
+ rsz_dev.users--;
+ kfree(filp->private_data);
+ filp->private_data = NULL;
+ mutex_unlock(&rsz_dev.lock);
+ return 0;
+} /* End of function resizer_release */
+
+/*
+=====================rsz_mmap===========================
+Function to map device memory into user space
+ */
+static int rsz_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ struct imp_logical_channel *chan =
+ (struct imp_logical_channel *)filp->private_data;
+ return (imp_common_mmap(filp, vma, chan));
+} /* End of Function resizer_mmap */
+
+/*
+=====================rsz_ioctl===========================
+This function will process IOCTL commands sent by
+the application and
+control the device IO operations.
+*/
+static int rsz_doioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret = 0, prio;
+ unsigned mode, user_mode;
+ /*get the configuratin of this channel from
+ private_date member of file */
+ struct imp_logical_channel *rsz_conf_chan =
+ (struct imp_logical_channel *)file->private_data;
+
+ if (ISNULL(rsz_conf_chan)) {
+ dev_err(rsz_device, "channel ptr is null\n");
+ return -EFAULT;
+ }
+
+ if (ISNULL((void *)arg)) {
+ dev_err(rsz_device, "arg ptr is null\n");
+ return -EFAULT;
+ }
+
+ mode = imp_hw_if->get_resize_oper_mode();
+ switch (cmd) {
+ case RSZ_QUERYBUF:
+ case RSZ_REQBUF:
+ case RSZ_RESIZE:
+ case RSZ_RECONFIG:
+ {
+ if (mode == IMP_MODE_CONTINUOUS)
+ return -EACCES;
+ }
+ break;
+ }
+
+ switch (cmd) {
+ case RSZ_S_OPER_MODE:
+ {
+ dev_dbg(rsz_device, "RSZ_S_OPER_MODE:\n");
+ user_mode = *((unsigned long *)arg);
+ if (rsz_conf_chan->mode != IMP_MODE_INVALID) {
+ dev_err(rsz_device,
+ "Mode set for this channel already\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ if (user_mode >= IMP_MODE_INVALID) {
+ dev_err(rsz_device, "Invalid mode\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ if (user_mode != mode) {
+ dev_err(rsz_device,
+ "Operation mode doesn't match"
+ " with current hw mode\n");
+ ret = -EINVAL;
+ goto ERROR;
+ }
+
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ rsz_conf_chan->mode = mode;
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ dev_dbg(rsz_device,
+ "RSZ_S_OPER_MODE: Operation mode set to %d",
+ user_mode);
+ }
+ break;
+ /* if case is to query for buffer address */
+ case RSZ_G_OPER_MODE:
+ {
+ dev_dbg(rsz_device, "RSZ_G_OPER_MODE:\n");
+ *((unsigned long *)arg) = rsz_conf_chan->mode;
+ dev_dbg(rsz_device,
+ "RSZ_G_OPER_MODE: mode = %d",
+ rsz_conf_chan->mode);
+ }
+ break;
+
+ case RSZ_S_CONFIG:
+ {
+ dev_dbg(rsz_device, "RSZ_S_CONFIG:\n");
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ ret = imp_set_resizer_config(rsz_device,
+ rsz_conf_chan,
+ (struct rsz_channel_config
+ *)arg);
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ break;
+
+ case RSZ_G_CONFIG:
+ {
+ struct rsz_channel_config *user_config =
+ (struct rsz_channel_config *)arg;
+
+ dev_dbg(rsz_device, "RSZ_G_CONFIG:%d:%d:%d\n",
+ user_config->oper_mode, user_config->chain,
+ user_config->len);
+ if (ISNULL(user_config->config)) {
+ ret = -EINVAL;
+ dev_err(rsz_device,
+ "error in PREV_GET_CONFIG\n");
+ goto ERROR;
+ }
+ ret =
+ imp_get_resize_config(rsz_device, rsz_conf_chan,
+ user_config);
+ }
+ break;
+
+ case RSZ_QUERYBUF:
+ {
+ dev_dbg(rsz_device, "RSZ_QUERYBUF:\n");
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ ret = imp_common_query_buffer(rsz_device,
+ rsz_conf_chan,
+ (struct imp_buffer *)arg);
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ break;
+
+ /* if case is to request buffers */
+ case RSZ_REQBUF:
+ {
+ dev_dbg(rsz_device, "RSZ_REQBUF:\n");
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ ret = imp_common_request_buffer(rsz_device,
+ rsz_conf_chan,
+ (struct imp_reqbufs *)
+ arg);
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ break;
+ /* if the case is to do resize */
+ case RSZ_S_PRIORITY:
+ {
+ prio = *((unsigned long *)arg);
+
+ dev_dbg(rsz_device, "RSZ_S_PRIORITY: priority = %d\n",
+ prio);
+ /* Check the prioroty range and assign the priority */
+ if (prio > MAX_PRIORITY || prio < MIN_PRIORITY) {
+ ret = -EINVAL;
+ goto ERROR;
+ } else {
+ ret = mutex_lock_interruptible(
+ &(rsz_conf_chan->lock));
+ if (!ret) {
+ rsz_conf_chan->priority = prio;
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ dev_dbg(rsz_device, "\n resizer_Priority:end");
+ }
+ break;
+ /* This ioctl is used to get the priority of
+ the current logic channel */
+ case RSZ_G_PRIORITY:
+ {
+ dev_dbg(rsz_device, "RSZ_S_PRIORITY: \n");
+ /* Get the priority from the channel */
+ *((unsigned long *)arg) = rsz_conf_chan->priority;
+ }
+ break;
+
+ case RSZ_RESIZE:
+ {
+ dev_dbg(rsz_device, "RSZ_RESIZE: \n");
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ ret = imp_common_start_resize(rsz_device,
+ rsz_conf_chan,
+ (struct imp_convert *)
+ arg);
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ break;
+
+ case RSZ_RECONFIG:
+ {
+ dev_dbg(rsz_device, "RSZ_RECONFIG: \n");
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ ret = imp_common_reconfig_resizer(rsz_device,
+ (struct rsz_reconfig *)arg,
+ rsz_conf_chan);
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ break;
+
+#ifdef CONFIG_IMP_DEBUG
+ case RSZ_DUMP_HW_CONFIG:
+ {
+ dev_dbg(rsz_device, "RSZ_DUMP_HW_CONFIG: \n");
+ ret = mutex_lock_interruptible(&(rsz_conf_chan->lock));
+ if (!ret) {
+ if (imp_hw_if->dump_hw_config)
+ imp_hw_if->dump_hw_config();
+ mutex_unlock(&(rsz_conf_chan->lock));
+ }
+ }
+ break;
+#endif
+ default:
+ dev_dbg(rsz_device, "resizer_ioctl: Invalid Command Value");
+ ret = -EINVAL;
+ }
+
+ERROR:
+ return ret;
+} /*End of function IOCTL */
+
+static long rsz_ioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret;
+ char sbuf[128];
+ void *mbuf = NULL;
+ void *parg = NULL;
+
+ dev_dbg(rsz_device, "Start of resizer ioctl\n");
+
+ /* Copy arguments into temp kernel buffer */
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_NONE:
+ parg = NULL;
+ break;
+ case _IOC_READ:
+ case _IOC_WRITE:
+ case (_IOC_WRITE | _IOC_READ):
+ if (_IOC_SIZE(cmd) <= sizeof(sbuf))
+ parg = sbuf;
+ else {
+ /* too big to allocate from stack */
+ mbuf = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
+ if (ISNULL(mbuf))
+ return -ENOMEM;
+ parg = mbuf;
+ }
+
+ ret = -EFAULT;
+ if (_IOC_DIR(cmd) & _IOC_WRITE)
+ if (copy_from_user(parg, (void __user *)arg,
+ _IOC_SIZE(cmd)))
+ goto out;
+ break;
+ }
+
+ /* call driver */
+ ret = rsz_doioctl(file, cmd, (unsigned long)parg);
+ if (ret == -ENOIOCTLCMD)
+ ret = -EINVAL;
+
+ /* Copy results into user buffer */
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_READ:
+ case (_IOC_WRITE | _IOC_READ):
+ if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd)))
+ ret = -EFAULT;
+ break;
+ }
+out:
+ kfree(mbuf);
+
+ dev_dbg(rsz_device, "End of previewer ioctl\n");
+ return ret;
+}
+
+static struct file_operations rsz_fops = {
+ .owner = THIS_MODULE,
+ .open = rsz_open,
+ .release = rsz_release,
+ .mmap = rsz_mmap,
+ .unlocked_ioctl = rsz_ioctl,
+};
+
+static void resizer_platform_release(struct device *device)
+{
+ /* This is called when the reference count goes to zero */
+}
+
+static int resizer_probe(struct device *device)
+{
+ rsz_device = device;
+ return 0;
+}
+static int resizer_remove(struct device *device)
+{
+ return 0;
+}
+static struct class *rsz_class;
+
+static struct platform_device resizer_device = {
+ .name = "davinci_resizer",
+ .id = 2,
+ .dev = {
+ .release = resizer_platform_release,
+ }
+};
+
+static struct device_driver resizer_driver = {
+ .name = "davinci_resizer",
+ .bus = &platform_bus_type,
+ .probe = resizer_probe,
+ .remove = resizer_remove,
+};
+
+/*
+=====================rsz_init===========================
+function to register resizer character driver
+*/
+static __init int rsz_init(void)
+{
+
+ int result;
+
+ /* Register the driver in the kernel */
+
+ result = alloc_chrdev_region(&dev, 0, 1, DRIVER_NAME);
+ if (result < 0) {
+ printk(KERN_ERR
+ "DaVinciresizer: could not register character device");
+ return -ENODEV;
+ }
+ /* Initialize of character device */
+ cdev_init(&c_dev, &rsz_fops);
+ c_dev.owner = THIS_MODULE;
+ c_dev.ops = &rsz_fops;
+
+ /* addding character device */
+ result = cdev_add(&c_dev, dev, 1);
+
+ if (result) {
+ printk(KERN_ERR
+ "DaVinciresizer:Error %d adding"
+ " Davinciresizer ..error no:",
+ result);
+ unregister_chrdev_region(dev, 1);
+ return result;
+ }
+
+ /* registeration of character device */
+ register_chrdev(MAJOR(dev), DRIVER_NAME, &rsz_fops);
+
+ /* register driver as a platform driver */
+ if (driver_register(&resizer_driver) != 0) {
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ /* Register the drive as a platform device */
+ if (platform_device_register(&resizer_device) != 0) {
+ driver_unregister(&resizer_driver);
+ unregister_chrdev_region(dev, 1);
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ rsz_class = class_create(THIS_MODULE, "davinci_resizer");
+
+ if (!rsz_class) {
+
+ platform_device_unregister(&resizer_device);
+ cdev_del(&c_dev);
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+
+ return -EIO;
+ }
+
+ device_create(rsz_class, NULL, dev, NULL, "davinci_resizer");
+
+ rsz_dev.users = 0;
+
+ mutex_init(&rsz_dev.lock);
+ /* Initialize the serializer */
+ imp_init_serializer();
+ imp_hw_if = imp_get_hw_if();
+ printk(KERN_NOTICE "davinci_resizer initialized\n");
+ return 0;
+} /* End of function resizer_init */
+
+/*
+=====================rsz_cleanup===========================
+Function is called by the kernel. It unregister the device.
+*/
+static void __exit rsz_cleanup(void)
+{
+
+ unregister_chrdev_region(dev, 1);
+
+ device_destroy(rsz_class, dev);
+
+ class_destroy(rsz_class);
+
+ driver_unregister(&resizer_driver);
+
+ /* remove platform device */
+ platform_device_unregister(&resizer_device);
+
+ cdev_del(&c_dev);
+
+ /* unregistering the driver from the kernel */
+ unregister_chrdev(MAJOR(dev), DRIVER_NAME);
+
+} /* End of function resizer_cleanup */
+
+module_init(rsz_init);
+module_exit(rsz_cleanup);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 6133ef5c..ad729229 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -502,6 +502,7 @@ static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
sample_time = cpu->pstate_policy->sample_rate_ms;
delay = msecs_to_jiffies(sample_time);
+ delay -= jiffies % delay;
mod_timer_pinned(&cpu->timer, jiffies + delay);
}
diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c
index 22c9063e..8bc5fef0 100644
--- a/drivers/crypto/ux500/cryp/cryp_core.c
+++ b/drivers/crypto/ux500/cryp/cryp_core.c
@@ -1750,7 +1750,7 @@ static struct platform_driver cryp_driver = {
.shutdown = ux500_cryp_shutdown,
.driver = {
.owner = THIS_MODULE,
- .name = "cryp1",
+ .name = "cryp1"
.pm = &ux500_cryp_pm,
}
};
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 88cfc613..6e13f262 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -310,6 +310,8 @@ static void atc_complete_all(struct at_dma_chan *atchan)
dev_vdbg(chan2dev(&atchan->chan_common), "complete all\n");
+ BUG_ON(atc_chan_is_enabled(atchan));
+
/*
* Submit queued descriptors ASAP, i.e. before we go through
* the completed ones.
@@ -366,9 +368,6 @@ static void atc_advance_work(struct at_dma_chan *atchan)
{
dev_vdbg(chan2dev(&atchan->chan_common), "advance_work\n");
- if (atc_chan_is_enabled(atchan))
- return;
-
if (list_empty(&atchan->active_list) ||
list_is_singular(&atchan->active_list)) {
atc_complete_all(atchan);
@@ -1079,7 +1078,9 @@ static void atc_issue_pending(struct dma_chan *chan)
return;
spin_lock_irqsave(&atchan->lock, flags);
- atc_advance_work(atchan);
+ if (!atc_chan_is_enabled(atchan)) {
+ atc_advance_work(atchan);
+ }
spin_unlock_irqrestore(&atchan->lock, flags);
}
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index b2728d6b..82f34670 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -62,7 +62,12 @@
#include <linux/rculist.h>
#include <linux/idr.h>
#include <linux/slab.h>
+//#include <linux/acpi.h>
+//#include <linux/acpi_dma.h>
#include <linux/of_dma.h>
+#include <linux/mempool.h>
+
+#include <linux/err.h>
static DEFINE_MUTEX(dma_list_mutex);
static DEFINE_IDR(dma_idr);
@@ -85,7 +90,8 @@ static struct dma_chan *dev_to_dma_chan(struct device *dev)
return chan_dev->chan;
}
-static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t memcpy_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
struct dma_chan *chan;
unsigned long count = 0;
@@ -104,9 +110,10 @@ static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *at
return err;
}
+//static DEVICE_ATTR_RO(memcpy_count);
-static ssize_t show_bytes_transferred(struct device *dev, struct device_attribute *attr,
- char *buf)
+static ssize_t bytes_transferred_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
struct dma_chan *chan;
unsigned long count = 0;
@@ -125,8 +132,10 @@ static ssize_t show_bytes_transferred(struct device *dev, struct device_attribut
return err;
}
+//static DEVICE_ATTR_RO(bytes_transferred);
-static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
{
struct dma_chan *chan;
int err;
@@ -142,13 +151,17 @@ static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, ch
return err;
}
-static struct device_attribute dma_attrs[] = {
- __ATTR(memcpy_count, S_IRUGO, show_memcpy_count, NULL),
- __ATTR(bytes_transferred, S_IRUGO, show_bytes_transferred, NULL),
- __ATTR(in_use, S_IRUGO, show_in_use, NULL),
- __ATTR_NULL
-};
+/*static DEVICE_ATTR_RO(in_use);
+
+ static struct attribute *dma_dev_attrs[] = {
+ &dev_attr_memcpy_count.attr,
+ &dev_attr_bytes_transferred.attr,
+ &dev_attr_in_use.attr,
+ NULL,
+};
+ATTRIBUTE_GROUPS(dma_dev);
+*/
static void chan_dev_release(struct device *dev)
{
struct dma_chan_dev *chan_dev;
@@ -165,7 +178,7 @@ static void chan_dev_release(struct device *dev)
static struct class dma_devclass = {
.name = "dma",
- .dev_attrs = dma_attrs,
+ //.dev_groups = dma_dev_groups,
.dev_release = chan_dev_release,
};
@@ -174,7 +187,8 @@ static struct class dma_devclass = {
#define dma_device_satisfies_mask(device, mask) \
__dma_device_satisfies_mask((device), &(mask))
static int
-__dma_device_satisfies_mask(struct dma_device *device, dma_cap_mask_t *want)
+__dma_device_satisfies_mask(struct dma_device *device,
+ const dma_cap_mask_t *want)
{
dma_cap_mask_t has;
@@ -373,20 +387,30 @@ void dma_issue_pending_all(void)
EXPORT_SYMBOL(dma_issue_pending_all);
/**
- * nth_chan - returns the nth channel of the given capability
+ * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
+ */
+static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
+{
+ int node = dev_to_node(chan->device->dev);
+ return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
+}
+
+/**
+ * min_chan - returns the channel with min count and in the same numa-node as the cpu
* @cap: capability to match
- * @n: nth channel desired
+ * @cpu: cpu index which the channel should be close to
*
- * Defaults to returning the channel with the desired capability and the
- * lowest reference count when 'n' cannot be satisfied. Must be called
- * under dma_list_mutex.
+ * If some channels are close to the given cpu, the one with the lowest
+ * reference count is returned. Otherwise, cpu is ignored and only the
+ * reference count is taken into account.
+ * Must be called under dma_list_mutex.
*/
-static struct dma_chan *nth_chan(enum dma_transaction_type cap, int n)
+static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
{
struct dma_device *device;
struct dma_chan *chan;
- struct dma_chan *ret = NULL;
struct dma_chan *min = NULL;
+ struct dma_chan *localmin = NULL;
list_for_each_entry(device, &dma_device_list, global_node) {
if (!dma_has_cap(cap, device->cap_mask) ||
@@ -395,27 +419,22 @@ static struct dma_chan *nth_chan(enum dma_transaction_type cap, int n)
list_for_each_entry(chan, &device->channels, device_node) {
if (!chan->client_count)
continue;
- if (!min)
- min = chan;
- else if (chan->table_count < min->table_count)
+ if (!min || chan->table_count < min->table_count)
min = chan;
- if (n-- == 0) {
- ret = chan;
- break; /* done */
- }
+ if (dma_chan_is_local(chan, cpu))
+ if (!localmin ||
+ chan->table_count < localmin->table_count)
+ localmin = chan;
}
- if (ret)
- break; /* done */
}
- if (!ret)
- ret = min;
+ chan = localmin ? localmin : min;
- if (ret)
- ret->table_count++;
+ if (chan)
+ chan->table_count++;
- return ret;
+ return chan;
}
/**
@@ -432,7 +451,6 @@ static void dma_channel_rebalance(void)
struct dma_device *device;
int cpu;
int cap;
- int n;
/* undo the last distribution */
for_each_dma_cap_mask(cap, dma_cap_mask_all)
@@ -451,19 +469,15 @@ static void dma_channel_rebalance(void)
return;
/* redistribute available channels */
- n = 0;
for_each_dma_cap_mask(cap, dma_cap_mask_all)
for_each_online_cpu(cpu) {
- if (num_possible_cpus() > 1)
- chan = nth_chan(cap, n++);
- else
- chan = nth_chan(cap, -1);
-
+ chan = min_chan(cap, cpu);
per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
}
}
-static struct dma_chan *private_candidate(dma_cap_mask_t *mask, struct dma_device *dev,
+static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
+ struct dma_device *dev,
dma_filter_fn fn, void *fn_param)
{
struct dma_chan *chan;
@@ -500,12 +514,69 @@ static struct dma_chan *private_candidate(dma_cap_mask_t *mask, struct dma_devic
}
/**
- * dma_request_channel - try to allocate an exclusive channel
+ * dma_request_slave_channel - try to get specific channel exclusively
+ * @chan: target channel
+ */
+struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
+{
+ int err = -EBUSY;
+
+ /* lock against __dma_request_channel */
+ mutex_lock(&dma_list_mutex);
+
+ if (chan->client_count == 0) {
+ err = dma_chan_get(chan);
+ if (err)
+ pr_debug("%s: failed to get %s: (%d)\n",
+ __func__, dma_chan_name(chan), err);
+ } else
+ chan = NULL;
+
+ mutex_unlock(&dma_list_mutex);
+
+
+ return chan;
+}
+EXPORT_SYMBOL_GPL(dma_get_slave_channel);
+
+struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
+{
+ dma_cap_mask_t mask;
+ struct dma_chan *chan;
+ int err;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ /* lock against __dma_request_channel */
+ mutex_lock(&dma_list_mutex);
+
+ chan = private_candidate(&mask, device, NULL, NULL);
+ if (chan) {
+ err = dma_chan_get(chan);
+ if (err) {
+ pr_debug("%s: failed to get %s: (%d)\n",
+ __func__, dma_chan_name(chan), err);
+ chan = NULL;
+ }
+ }
+
+ mutex_unlock(&dma_list_mutex);
+
+ return chan;
+}
+EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
+
+/**
+ * __dma_request_channel - try to allocate an exclusive channel
* @mask: capabilities that the channel must satisfy
* @fn: optional callback to disposition available channels
* @fn_param: opaque parameter to pass to dma_filter_fn
+ *
+ * Returns pointer to appropriate DMA channel on success or NULL.
*/
-struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param)
+struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
+ dma_filter_fn fn, void *fn_param)
{
struct dma_device *device, *_d;
struct dma_chan *chan = NULL;
@@ -554,14 +625,40 @@ EXPORT_SYMBOL_GPL(__dma_request_channel);
* dma_request_slave_channel - try to allocate an exclusive slave channel
* @dev: pointer to client device structure
* @name: slave channel name
+ *
+ * Returns pointer to appropriate DMA channel on success or an error pointer.
*/
-struct dma_chan *dma_request_slave_channel(struct device *dev, char *name)
+
+struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
+ const char *name)
{
- /* If device-tree is present get slave info from here */
+ // If device-tree is present get slave info from here
if (dev->of_node)
return of_dma_request_slave_channel(dev->of_node, name);
- return NULL;
+ // If device was enumerated by ACPI get slave info from here
+/*
+ if (ACPI_HANDLE(dev))
+ return acpi_dma_request_slave_chan_by_name(dev, name);
+*/
+ return ERR_PTR(-ENODEV);
+}
+EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason);
+
+/**
+ * dma_request_slave_channel - try to allocate an exclusive slave channel
+ * @dev: pointer to client device structure
+ * @name: slave channel name
+ *
+ * Returns pointer to appropriate DMA channel on success or NULL.
+ */
+struct dma_chan *dma_request_slave_channel(struct device *dev,
+ const char *name)
+{
+ struct dma_chan *ch = dma_request_slave_channel_reason(dev, name);
+ if (IS_ERR(ch))
+ return NULL;
+ return ch;
}
EXPORT_SYMBOL_GPL(dma_request_slave_channel);
@@ -654,11 +751,6 @@ static bool device_has_all_tx_types(struct dma_device *device)
return false;
#endif
- #if defined(CONFIG_ASYNC_MEMSET) || defined(CONFIG_ASYNC_MEMSET_MODULE)
- if (!dma_has_cap(DMA_MEMSET, device->cap_mask))
- return false;
- #endif
-
#if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
if (!dma_has_cap(DMA_XOR, device->cap_mask))
return false;
@@ -720,8 +812,6 @@ int dma_async_device_register(struct dma_device *device)
!device->device_prep_dma_pq);
BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
!device->device_prep_dma_pq_val);
- BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
- !device->device_prep_dma_memset);
BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
!device->device_prep_dma_interrupt);
BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
@@ -868,98 +958,133 @@ void dma_async_device_unregister(struct dma_device *device)
}
EXPORT_SYMBOL(dma_async_device_unregister);
-/**
- * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
- * @chan: DMA channel to offload copy to
- * @dest: destination address (virtual)
- * @src: source address (virtual)
- * @len: length
- *
- * Both @dest and @src must be mappable to a bus address according to the
- * DMA mapping API rules for streaming mappings.
- * Both @dest and @src must stay memory resident (kernel memory or locked
- * user space pages).
- */
-dma_cookie_t
-dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
- void *src, size_t len)
-{
- struct dma_device *dev = chan->device;
- struct dma_async_tx_descriptor *tx;
- dma_addr_t dma_dest, dma_src;
- dma_cookie_t cookie;
- unsigned long flags;
+struct dmaengine_unmap_pool {
+ struct kmem_cache *cache;
+ const char *name;
+ mempool_t *pool;
+ size_t size;
+};
- dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE);
- dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE);
- flags = DMA_CTRL_ACK |
- DMA_COMPL_SRC_UNMAP_SINGLE |
- DMA_COMPL_DEST_UNMAP_SINGLE;
- tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
+#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
+static struct dmaengine_unmap_pool unmap_pool[] = {
+ __UNMAP_POOL(2),
+ #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
+ __UNMAP_POOL(16),
+ __UNMAP_POOL(128),
+ __UNMAP_POOL(256),
+ #endif
+};
- if (!tx) {
- dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
- dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
- return -ENOMEM;
+static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
+{
+ int order = get_count_order(nr);
+
+ switch (order) {
+ case 0 ... 1:
+ return &unmap_pool[0];
+ case 2 ... 4:
+ return &unmap_pool[1];
+ case 5 ... 7:
+ return &unmap_pool[2];
+ case 8:
+ return &unmap_pool[3];
+ default:
+ BUG();
+ return NULL;
}
+}
- tx->callback = NULL;
- cookie = tx->tx_submit(tx);
+static void dmaengine_unmap(struct kref *kref)
+{
+ struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
+ struct device *dev = unmap->dev;
+ int cnt, i;
+
+ cnt = unmap->to_cnt;
+ for (i = 0; i < cnt; i++)
+ dma_unmap_page(dev, unmap->addr[i], unmap->len,
+ DMA_TO_DEVICE);
+ cnt += unmap->from_cnt;
+ for (; i < cnt; i++)
+ dma_unmap_page(dev, unmap->addr[i], unmap->len,
+ DMA_FROM_DEVICE);
+ cnt += unmap->bidi_cnt;
+ for (; i < cnt; i++) {
+ if (unmap->addr[i] == 0)
+ continue;
+ dma_unmap_page(dev, unmap->addr[i], unmap->len,
+ DMA_BIDIRECTIONAL);
+ }
+ cnt = unmap->map_cnt;
+ mempool_free(unmap, __get_unmap_pool(cnt)->pool);
+}
+void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
+{
+ if (unmap)
+ kref_put(&unmap->kref, dmaengine_unmap);
+}
+EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
- preempt_disable();
- __this_cpu_add(chan->local->bytes_transferred, len);
- __this_cpu_inc(chan->local->memcpy_count);
- preempt_enable();
+static void dmaengine_destroy_unmap_pool(void)
+{
+ int i;
- return cookie;
+ for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
+ struct dmaengine_unmap_pool *p = &unmap_pool[i];
+
+ if (p->pool)
+ mempool_destroy(p->pool);
+ p->pool = NULL;
+ if (p->cache)
+ kmem_cache_destroy(p->cache);
+ p->cache = NULL;
+ }
}
-EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
-/**
- * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
- * @chan: DMA channel to offload copy to
- * @page: destination page
- * @offset: offset in page to copy to
- * @kdata: source address (virtual)
- * @len: length
- *
- * Both @page/@offset and @kdata must be mappable to a bus address according
- * to the DMA mapping API rules for streaming mappings.
- * Both @page/@offset and @kdata must stay memory resident (kernel memory or
- * locked user space pages)
- */
-dma_cookie_t
-dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
- unsigned int offset, void *kdata, size_t len)
+static int __init dmaengine_init_unmap_pool(void)
{
- struct dma_device *dev = chan->device;
- struct dma_async_tx_descriptor *tx;
- dma_addr_t dma_dest, dma_src;
- dma_cookie_t cookie;
- unsigned long flags;
+ int i;
- dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE);
- dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE);
- flags = DMA_CTRL_ACK | DMA_COMPL_SRC_UNMAP_SINGLE;
- tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
+ for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
+ struct dmaengine_unmap_pool *p = &unmap_pool[i];
+ size_t size;
- if (!tx) {
- dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
- dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
- return -ENOMEM;
+ size = sizeof(struct dmaengine_unmap_data) +
+ sizeof(dma_addr_t) * p->size;
+
+ p->cache = kmem_cache_create(p->name, size, 0,
+ SLAB_HWCACHE_ALIGN, NULL);
+ if (!p->cache)
+ break;
+ p->pool = mempool_create_slab_pool(1, p->cache);
+ if (!p->pool)
+ break;
}
- tx->callback = NULL;
- cookie = tx->tx_submit(tx);
+ if (i == ARRAY_SIZE(unmap_pool))
+ return 0;
- preempt_disable();
- __this_cpu_add(chan->local->bytes_transferred, len);
- __this_cpu_inc(chan->local->memcpy_count);
- preempt_enable();
+ dmaengine_destroy_unmap_pool();
+ return -ENOMEM;
+}
- return cookie;
+struct dmaengine_unmap_data *
+dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
+{
+ struct dmaengine_unmap_data *unmap;
+
+ unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
+ if (!unmap)
+ return NULL;
+
+ memset(unmap, 0, sizeof(*unmap));
+ kref_init(&unmap->kref);
+ unmap->dev = dev;
+ unmap->map_cnt = nr;
+
+ return unmap;
}
-EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
+EXPORT_SYMBOL(dmaengine_get_unmap_data);
/**
* dma_async_memcpy_pg_to_pg - offloaded copy from page to page
@@ -982,24 +1107,33 @@ dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
{
struct dma_device *dev = chan->device;
struct dma_async_tx_descriptor *tx;
- dma_addr_t dma_dest, dma_src;
+ struct dmaengine_unmap_data *unmap;
dma_cookie_t cookie;
unsigned long flags;
- dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE);
- dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len,
- DMA_FROM_DEVICE);
+ unmap = dmaengine_get_unmap_data(dev->dev, 2, GFP_NOWAIT);
+ if (!unmap)
+ return -ENOMEM;
+
+ unmap->to_cnt = 1;
+ unmap->from_cnt = 1;
+ unmap->addr[0] = dma_map_page(dev->dev, src_pg, src_off, len,
+ DMA_TO_DEVICE);
+ unmap->addr[1] = dma_map_page(dev->dev, dest_pg, dest_off, len,
+ DMA_FROM_DEVICE);
+ unmap->len = len;
flags = DMA_CTRL_ACK;
- tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
+ tx = dev->device_prep_dma_memcpy(chan, unmap->addr[1], unmap->addr[0],
+ len, flags);
if (!tx) {
- dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE);
- dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
+ dmaengine_unmap_put(unmap);
return -ENOMEM;
}
- tx->callback = NULL;
+ dma_set_unmap(tx, unmap);
cookie = tx->tx_submit(tx);
+ dmaengine_unmap_put(unmap);
preempt_disable();
__this_cpu_add(chan->local->bytes_transferred, len);
@@ -1010,6 +1144,52 @@ dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
}
EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
+/**
+ * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
+ * @chan: DMA channel to offload copy to
+ * @dest: destination address (virtual)
+ * @src: source address (virtual)
+ * @len: length
+ *
+ * Both @dest and @src must be mappable to a bus address according to the
+ * DMA mapping API rules for streaming mappings.
+ * Both @dest and @src must stay memory resident (kernel memory or locked
+ * user space pages).
+ */
+dma_cookie_t
+dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
+ void *src, size_t len)
+{
+ return dma_async_memcpy_pg_to_pg(chan, virt_to_page(dest),
+ (unsigned long) dest & ~PAGE_MASK,
+ virt_to_page(src),
+ (unsigned long) src & ~PAGE_MASK, len);
+}
+EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
+
+/**
+ * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
+ * @chan: DMA channel to offload copy to
+ * @page: destination page
+ * @offset: offset in page to copy to
+ * @kdata: source address (virtual)
+ * @len: length
+ *
+ * Both @page/@offset and @kdata must be mappable to a bus address according
+ * to the DMA mapping API rules for streaming mappings.
+ * Both @page/@offset and @kdata must stay memory resident (kernel memory or
+ * locked user space pages)
+ */
+dma_cookie_t
+dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
+ unsigned int offset, void *kdata, size_t len)
+{
+ return dma_async_memcpy_pg_to_pg(chan, page, offset,
+ virt_to_page(kdata),
+ (unsigned long) kdata & ~PAGE_MASK, len);
+}
+EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
+
void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
struct dma_chan *chan)
{
@@ -1029,7 +1209,7 @@ dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
if (!tx)
- return DMA_SUCCESS;
+ return DMA_COMPLETE;
while (tx->cookie == -EBUSY) {
if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
@@ -1083,6 +1263,10 @@ EXPORT_SYMBOL_GPL(dma_run_dependencies);
static int __init dma_bus_init(void)
{
+ int err = dmaengine_init_unmap_pool();
+
+ if (err)
+ return err;
return class_register(&dma_devclass);
}
arch_initcall(dma_bus_init);
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index cd7e3280..7b65633f 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -23,8 +23,9 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
+#include <linux/of.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#include "dmaengine.h"
#include "virt-dma.h"
@@ -46,17 +47,59 @@
#define EDMA_CHANS 64
#endif /* CONFIG_ARCH_DAVINCI_DA8XX */
-/* Max of 16 segments per channel to conserve PaRAM slots */
-#define MAX_NR_SG 16
+/*
+ * Max of 20 segments per channel to conserve PaRAM slots
+ * Also note that MAX_NR_SG should be atleast the no.of periods
+ * that are required for ASoC, otherwise DMA prep calls will
+ * fail. Today davinci-pcm is the only user of this driver and
+ * requires atleast 17 slots, so we setup the default to 20.
+ */
+#define MAX_NR_SG 20
#define EDMA_MAX_SLOTS MAX_NR_SG
#define EDMA_DESCRIPTORS 16
+struct edma_pset {
+ u32 len;
+ dma_addr_t addr;
+ struct edmacc_param param;
+};
+
struct edma_desc {
struct virt_dma_desc vdesc;
struct list_head node;
+ enum dma_transfer_direction direction;
+ int cyclic;
int absync;
int pset_nr;
- struct edmacc_param pset[0];
+ struct edma_chan *echan;
+ int processed;
+
+ /*
+ * The following 4 elements are used for residue accounting.
+ *
+ * - processed_stat: the number of SG elements we have traversed
+ * so far to cover accounting. This is updated directly to processed
+ * during edma_callback and is always <= processed, because processed
+ * refers to the number of pending transfer (programmed to EDMA
+ * controller), where as processed_stat tracks number of transfers
+ * accounted for so far.
+ *
+ * - residue: The amount of bytes we have left to transfer for this desc
+ *
+ * - residue_stat: The residue in bytes of data we have covered
+ * so far for accounting. This is updated directly to residue
+ * during callbacks to keep it current.
+ *
+ * - sg_len: Tracks the length of the current intermediate transfer,
+ * this is required to update the residue during intermediate transfer
+ * completion callback.
+ */
+ int processed_stat;
+ u32 sg_len;
+ u32 residue;
+ u32 residue_stat;
+
+ struct edma_pset pset[0];
};
struct edma_cc;
@@ -69,6 +112,7 @@ struct edma_chan {
int ch_num;
bool alloced;
int slot[EDMA_MAX_SLOTS];
+ int missed;
struct dma_slave_config cfg;
};
@@ -104,23 +148,37 @@ static void edma_desc_free(struct virt_dma_desc *vdesc)
/* Dispatch a queued descriptor to the controller (caller holds lock) */
static void edma_execute(struct edma_chan *echan)
{
- struct virt_dma_desc *vdesc = vchan_next_desc(&echan->vchan);
+ struct virt_dma_desc *vdesc;
struct edma_desc *edesc;
- int i;
-
- if (!vdesc) {
- echan->edesc = NULL;
- return;
+ struct device *dev = echan->vchan.chan.device->dev;
+ int i, j, left, nslots;
+
+ /* If either we processed all psets or we're still not started */
+ if (!echan->edesc ||
+ echan->edesc->pset_nr == echan->edesc->processed) {
+ /* Get next vdesc */
+ vdesc = vchan_next_desc(&echan->vchan);
+ if (!vdesc) {
+ echan->edesc = NULL;
+ return;
+ }
+ list_del(&vdesc->node);
+ echan->edesc = to_edma_desc(&vdesc->tx);
}
- list_del(&vdesc->node);
+ edesc = echan->edesc;
- echan->edesc = edesc = to_edma_desc(&vdesc->tx);
+ /* Find out how many left */
+ left = edesc->pset_nr - edesc->processed;
+ nslots = min(MAX_NR_SG, left);
+ edesc->sg_len = 0;
/* Write descriptor PaRAM set(s) */
- for (i = 0; i < edesc->pset_nr; i++) {
- edma_write_slot(echan->slot[i], &edesc->pset[i]);
- dev_dbg(echan->vchan.chan.device->dev,
+ for (i = 0; i < nslots; i++) {
+ j = i + edesc->processed;
+ edma_write_slot(echan->slot[i], &edesc->pset[j].param);
+ edesc->sg_len += edesc->pset[j].len;
+ dev_vdbg(echan->vchan.chan.device->dev,
"\n pset[%d]:\n"
" chnum\t%d\n"
" slot\t%d\n"
@@ -132,24 +190,58 @@ static void edma_execute(struct edma_chan *echan)
" bidx\t%08x\n"
" cidx\t%08x\n"
" lkrld\t%08x\n",
- i, echan->ch_num, echan->slot[i],
- edesc->pset[i].opt,
- edesc->pset[i].src,
- edesc->pset[i].dst,
- edesc->pset[i].a_b_cnt,
- edesc->pset[i].ccnt,
- edesc->pset[i].src_dst_bidx,
- edesc->pset[i].src_dst_cidx,
- edesc->pset[i].link_bcntrld);
+ j, echan->ch_num, echan->slot[i],
+ edesc->pset[j].param.opt,
+ edesc->pset[j].param.src,
+ edesc->pset[j].param.dst,
+ edesc->pset[j].param.a_b_cnt,
+ edesc->pset[j].param.ccnt,
+ edesc->pset[j].param.src_dst_bidx,
+ edesc->pset[j].param.src_dst_cidx,
+ edesc->pset[j].param.link_bcntrld);
/* Link to the previous slot if not the last set */
- if (i != (edesc->pset_nr - 1))
+ if (i != (nslots - 1))
edma_link(echan->slot[i], echan->slot[i+1]);
- /* Final pset links to the dummy pset */
+ }
+
+ edesc->processed += nslots;
+
+ /*
+ * If this is either the last set in a set of SG-list transactions
+ * then setup a link to the dummy slot, this results in all future
+ * events being absorbed and that's OK because we're done
+ */
+ if (edesc->processed == edesc->pset_nr) {
+ if (edesc->cyclic)
+ edma_link(echan->slot[nslots-1], echan->slot[1]);
else
- edma_link(echan->slot[i], echan->ecc->dummy_slot);
+ edma_link(echan->slot[nslots-1],
+ echan->ecc->dummy_slot);
}
- edma_start(echan->ch_num);
+ if (edesc->processed <= MAX_NR_SG) {
+ dev_dbg(dev, "first transfer starting on channel %d\n",
+ echan->ch_num);
+ edma_start(echan->ch_num);
+ } else {
+ dev_dbg(dev, "chan: %d: completed %d elements, resuming\n",
+ echan->ch_num, edesc->processed);
+ edma_resume(echan->ch_num);
+ }
+
+ /*
+ * This happens due to setup times between intermediate transfers
+ * in long SG lists which have to be broken up into transfers of
+ * MAX_NR_SG
+ */
+ if (echan->missed) {
+ dev_dbg(dev, "missed event on channel %d\n", echan->ch_num);
+ edma_clean_channel(echan->ch_num);
+ edma_stop(echan->ch_num);
+ edma_start(echan->ch_num);
+ edma_trigger_channel(echan->ch_num);
+ echan->missed = 0;
+ }
}
static int edma_terminate_all(struct edma_chan *echan)
@@ -165,8 +257,13 @@ static int edma_terminate_all(struct edma_chan *echan)
* echan->edesc is NULL and exit.)
*/
if (echan->edesc) {
+ int cyclic = echan->edesc->cyclic;
echan->edesc = NULL;
edma_stop(echan->ch_num);
+ /* Move the cyclic channel back to default queue */
+ if (cyclic)
+ edma_assign_channel_eventq(echan->ch_num,
+ EVENTQ_DEFAULT);
}
vchan_get_all_descriptors(&echan->vchan, &head);
@@ -188,6 +285,26 @@ static int edma_slave_config(struct edma_chan *echan,
return 0;
}
+static int edma_dma_pause(struct edma_chan *echan)
+{
+ /* Pause/Resume only allowed with cyclic mode */
+ if (!echan->edesc->cyclic)
+ return -EINVAL;
+
+ edma_pause(echan->ch_num);
+ return 0;
+}
+
+static int edma_dma_resume(struct edma_chan *echan)
+{
+ /* Pause/Resume only allowed with cyclic mode */
+ if (!echan->edesc->cyclic)
+ return -EINVAL;
+
+ edma_resume(echan->ch_num);
+ return 0;
+}
+
static int edma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
unsigned long arg)
{
@@ -203,6 +320,14 @@ static int edma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
config = (struct dma_slave_config *)arg;
ret = edma_slave_config(echan, config);
break;
+ case DMA_PAUSE:
+ ret = edma_dma_pause(echan);
+ break;
+
+ case DMA_RESUME:
+ ret = edma_dma_resume(echan);
+ break;
+
default:
ret = -ENOSYS;
}
@@ -210,6 +335,131 @@ static int edma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
return ret;
}
+/*
+ * A PaRAM set configuration abstraction used by other modes
+ * @chan: Channel who's PaRAM set we're configuring
+ * @pset: PaRAM set to initialize and setup.
+ * @src_addr: Source address of the DMA
+ * @dst_addr: Destination address of the DMA
+ * @burst: In units of dev_width, how much to send
+ * @dev_width: How much is the dev_width
+ * @dma_length: Total length of the DMA transfer
+ * @direction: Direction of the transfer
+ */
+static int edma_config_pset(struct dma_chan *chan, struct edma_pset *epset,
+ dma_addr_t src_addr, dma_addr_t dst_addr, u32 burst,
+ enum dma_slave_buswidth dev_width, unsigned int dma_length,
+ enum dma_transfer_direction direction)
+{
+ struct edma_chan *echan = to_edma_chan(chan);
+ struct device *dev = chan->device->dev;
+ struct edmacc_param *param = &epset->param;
+ int acnt, bcnt, ccnt, cidx;
+ int src_bidx, dst_bidx, src_cidx, dst_cidx;
+ int absync;
+
+ acnt = dev_width;
+
+ /* src/dst_maxburst == 0 is the same case as src/dst_maxburst == 1 */
+ if (!burst)
+ burst = 1;
+ /*
+ * If the maxburst is equal to the fifo width, use
+ * A-synced transfers. This allows for large contiguous
+ * buffer transfers using only one PaRAM set.
+ */
+ if (burst == 1) {
+ /*
+ * For the A-sync case, bcnt and ccnt are the remainder
+ * and quotient respectively of the division of:
+ * (dma_length / acnt) by (SZ_64K -1). This is so
+ * that in case bcnt over flows, we have ccnt to use.
+ * Note: In A-sync tranfer only, bcntrld is used, but it
+ * only applies for sg_dma_len(sg) >= SZ_64K.
+ * In this case, the best way adopted is- bccnt for the
+ * first frame will be the remainder below. Then for
+ * every successive frame, bcnt will be SZ_64K-1. This
+ * is assured as bcntrld = 0xffff in end of function.
+ */
+ absync = false;
+ ccnt = dma_length / acnt / (SZ_64K - 1);
+ bcnt = dma_length / acnt - ccnt * (SZ_64K - 1);
+ /*
+ * If bcnt is non-zero, we have a remainder and hence an
+ * extra frame to transfer, so increment ccnt.
+ */
+ if (bcnt)
+ ccnt++;
+ else
+ bcnt = SZ_64K - 1;
+ cidx = acnt;
+ } else {
+ /*
+ * If maxburst is greater than the fifo address_width,
+ * use AB-synced transfers where A count is the fifo
+ * address_width and B count is the maxburst. In this
+ * case, we are limited to transfers of C count frames
+ * of (address_width * maxburst) where C count is limited
+ * to SZ_64K-1. This places an upper bound on the length
+ * of an SG segment that can be handled.
+ */
+ absync = true;
+ bcnt = burst;
+ ccnt = dma_length / (acnt * bcnt);
+ if (ccnt > (SZ_64K - 1)) {
+ dev_err(dev, "Exceeded max SG segment size\n");
+ return -EINVAL;
+ }
+ cidx = acnt * bcnt;
+ }
+
+ epset->len = dma_length;
+
+ if (direction == DMA_MEM_TO_DEV) {
+ src_bidx = acnt;
+ src_cidx = cidx;
+ dst_bidx = 0;
+ dst_cidx = 0;
+ epset->addr = src_addr;
+ } else if (direction == DMA_DEV_TO_MEM) {
+ src_bidx = 0;
+ src_cidx = 0;
+ dst_bidx = acnt;
+ dst_cidx = cidx;
+ epset->addr = dst_addr;
+ } else if (direction == DMA_MEM_TO_MEM) {
+ src_bidx = acnt;
+ src_cidx = cidx;
+ dst_bidx = acnt;
+ dst_cidx = cidx;
+ } else {
+ dev_err(dev, "%s: direction not implemented yet\n", __func__);
+ return -EINVAL;
+ }
+
+ param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num));
+ /* Configure A or AB synchronized transfers */
+ if (absync)
+ param->opt |= SYNCDIM;
+
+ param->src = src_addr;
+ param->dst = dst_addr;
+
+ param->src_dst_bidx = (dst_bidx << 16) | src_bidx;
+ param->src_dst_cidx = (dst_cidx << 16) | src_cidx;
+
+ param->a_b_cnt = bcnt << 16 | acnt;
+ param->ccnt = ccnt;
+ /*
+ * Only time when (bcntrld) auto reload is required is for
+ * A-sync case, and in this case, a requirement of reload value
+ * of SZ_64K-1 only is assured. 'link' is initially set to NULL
+ * and then later will be populated by edma_execute.
+ */
+ param->link_bcntrld = 0xffffffff;
+ return absync;
+}
+
static struct dma_async_tx_descriptor *edma_prep_slave_sg(
struct dma_chan *chan, struct scatterlist *sgl,
unsigned int sg_len, enum dma_transfer_direction direction,
@@ -218,134 +468,271 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
struct edma_chan *echan = to_edma_chan(chan);
struct device *dev = chan->device->dev;
struct edma_desc *edesc;
- dma_addr_t dev_addr;
+ dma_addr_t src_addr = 0, dst_addr = 0;
enum dma_slave_buswidth dev_width;
u32 burst;
struct scatterlist *sg;
- int i;
- int acnt, bcnt, ccnt, src, dst, cidx;
- int src_bidx, dst_bidx, src_cidx, dst_cidx;
+ int i, nslots, ret;
if (unlikely(!echan || !sgl || !sg_len))
return NULL;
if (direction == DMA_DEV_TO_MEM) {
- dev_addr = echan->cfg.src_addr;
+ src_addr = echan->cfg.src_addr;
dev_width = echan->cfg.src_addr_width;
burst = echan->cfg.src_maxburst;
} else if (direction == DMA_MEM_TO_DEV) {
- dev_addr = echan->cfg.dst_addr;
+ dst_addr = echan->cfg.dst_addr;
dev_width = echan->cfg.dst_addr_width;
burst = echan->cfg.dst_maxburst;
} else {
- dev_err(dev, "%s: bad direction?\n", __func__);
+ dev_err(dev, "%s: bad direction: %d\n", __func__, direction);
return NULL;
}
if (dev_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) {
- dev_err(dev, "Undefined slave buswidth\n");
- return NULL;
- }
-
- if (sg_len > MAX_NR_SG) {
- dev_err(dev, "Exceeded max SG segments %d > %d\n",
- sg_len, MAX_NR_SG);
+ dev_err(dev, "%s: Undefined slave buswidth\n", __func__);
return NULL;
}
edesc = kzalloc(sizeof(*edesc) + sg_len *
sizeof(edesc->pset[0]), GFP_ATOMIC);
if (!edesc) {
- dev_dbg(dev, "Failed to allocate a descriptor\n");
+ dev_err(dev, "%s: Failed to allocate a descriptor\n", __func__);
return NULL;
}
edesc->pset_nr = sg_len;
+ edesc->residue = 0;
+ edesc->direction = direction;
+ edesc->echan = echan;
- for_each_sg(sgl, sg, sg_len, i) {
- /* Allocate a PaRAM slot, if needed */
+ /* Allocate a PaRAM slot, if needed */
+ nslots = min_t(unsigned, MAX_NR_SG, sg_len);
+
+ for (i = 0; i < nslots; i++) {
if (echan->slot[i] < 0) {
echan->slot[i] =
edma_alloc_slot(EDMA_CTLR(echan->ch_num),
EDMA_SLOT_ANY);
if (echan->slot[i] < 0) {
- dev_err(dev, "Failed to allocate slot\n");
+ kfree(edesc);
+ dev_err(dev, "%s: Failed to allocate slot\n",
+ __func__);
return NULL;
}
}
+ }
- acnt = dev_width;
+ /* Configure PaRAM sets for each SG */
+ for_each_sg(sgl, sg, sg_len, i) {
+ /* Get address for each SG */
+ if (direction == DMA_DEV_TO_MEM)
+ dst_addr = sg_dma_address(sg);
+ else
+ src_addr = sg_dma_address(sg);
+
+ ret = edma_config_pset(chan, &edesc->pset[i], src_addr,
+ dst_addr, burst, dev_width,
+ sg_dma_len(sg), direction);
+ if (ret < 0) {
+ kfree(edesc);
+ return NULL;
+ }
- /*
- * If the maxburst is equal to the fifo width, use
- * A-synced transfers. This allows for large contiguous
- * buffer transfers using only one PaRAM set.
- */
- if (burst == 1) {
- edesc->absync = false;
- ccnt = sg_dma_len(sg) / acnt / (SZ_64K - 1);
- bcnt = sg_dma_len(sg) / acnt - ccnt * (SZ_64K - 1);
- if (bcnt)
- ccnt++;
- else
- bcnt = SZ_64K - 1;
- cidx = acnt;
- /*
- * If maxburst is greater than the fifo address_width,
- * use AB-synced transfers where A count is the fifo
- * address_width and B count is the maxburst. In this
- * case, we are limited to transfers of C count frames
- * of (address_width * maxburst) where C count is limited
- * to SZ_64K-1. This places an upper bound on the length
- * of an SG segment that can be handled.
- */
- } else {
- edesc->absync = true;
- bcnt = burst;
- ccnt = sg_dma_len(sg) / (acnt * bcnt);
- if (ccnt > (SZ_64K - 1)) {
- dev_err(dev, "Exceeded max SG segment size\n");
+ edesc->absync = ret;
+ edesc->residue += sg_dma_len(sg);
+
+ /* If this is the last in a current SG set of transactions,
+ enable interrupts so that next set is processed */
+ if (!((i+1) % MAX_NR_SG))
+ edesc->pset[i].param.opt |= TCINTEN;
+
+ /* If this is the last set, enable completion interrupt flag */
+ if (i == sg_len - 1)
+ edesc->pset[i].param.opt |= TCINTEN;
+ }
+ edesc->residue_stat = edesc->residue;
+
+ return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
+}
+
+struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
+ struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
+ size_t len, unsigned long tx_flags)
+{
+ int ret;
+ struct edma_desc *edesc;
+ struct device *dev = chan->device->dev;
+ struct edma_chan *echan = to_edma_chan(chan);
+
+ if (unlikely(!echan || !len))
+ return NULL;
+
+ edesc = kzalloc(sizeof(*edesc) + sizeof(edesc->pset[0]), GFP_ATOMIC);
+ if (!edesc) {
+ dev_dbg(dev, "Failed to allocate a descriptor\n");
+ return NULL;
+ }
+
+ edesc->pset_nr = 1;
+
+ ret = edma_config_pset(chan, &edesc->pset[0], src, dest, 1,
+ DMA_SLAVE_BUSWIDTH_4_BYTES, len, DMA_MEM_TO_MEM);
+ if (ret < 0)
+ return NULL;
+
+ edesc->absync = ret;
+
+ /*
+ * Enable intermediate transfer chaining to re-trigger channel
+ * on completion of every TR, and enable transfer-completion
+ * interrupt on completion of the whole transfer.
+ */
+ edesc->pset[0].param.opt |= ITCCHEN;
+ edesc->pset[0].param.opt |= TCINTEN;
+
+ return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
+}
+
+static struct dma_async_tx_descriptor *edma_prep_dma_cyclic(
+ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
+ size_t period_len, enum dma_transfer_direction direction,
+ unsigned long tx_flags)
+{
+ struct edma_chan *echan = to_edma_chan(chan);
+ struct device *dev = chan->device->dev;
+ struct edma_desc *edesc;
+ dma_addr_t src_addr, dst_addr;
+ enum dma_slave_buswidth dev_width;
+ u32 burst;
+ int i, ret, nslots;
+
+ if (unlikely(!echan || !buf_len || !period_len))
+ return NULL;
+
+ if (direction == DMA_DEV_TO_MEM) {
+ src_addr = echan->cfg.src_addr;
+ dst_addr = buf_addr;
+ dev_width = echan->cfg.src_addr_width;
+ burst = echan->cfg.src_maxburst;
+ } else if (direction == DMA_MEM_TO_DEV) {
+ src_addr = buf_addr;
+ dst_addr = echan->cfg.dst_addr;
+ dev_width = echan->cfg.dst_addr_width;
+ burst = echan->cfg.dst_maxburst;
+ } else {
+ dev_err(dev, "%s: bad direction: %d\n", __func__, direction);
+ return NULL;
+ }
+
+ if (dev_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) {
+ dev_err(dev, "%s: Undefined slave buswidth\n", __func__);
+ return NULL;
+ }
+
+ if (unlikely(buf_len % period_len)) {
+ dev_err(dev, "Period should be multiple of Buffer length\n");
+ return NULL;
+ }
+
+ nslots = (buf_len / period_len) + 1;
+
+ /*
+ * Cyclic DMA users such as audio cannot tolerate delays introduced
+ * by cases where the number of periods is more than the maximum
+ * number of SGs the EDMA driver can handle at a time. For DMA types
+ * such as Slave SGs, such delays are tolerable and synchronized,
+ * but the synchronization is difficult to achieve with Cyclic and
+ * cannot be guaranteed, so we error out early.
+ */
+ if (nslots > MAX_NR_SG)
+ return NULL;
+
+ edesc = kzalloc(sizeof(*edesc) + nslots *
+ sizeof(edesc->pset[0]), GFP_ATOMIC);
+ if (!edesc) {
+ dev_err(dev, "%s: Failed to allocate a descriptor\n", __func__);
+ return NULL;
+ }
+
+ edesc->cyclic = 1;
+ edesc->pset_nr = nslots;
+ edesc->residue = edesc->residue_stat = buf_len;
+ edesc->direction = direction;
+ edesc->echan = echan;
+
+ dev_dbg(dev, "%s: channel=%d nslots=%d period_len=%zu buf_len=%zu\n",
+ __func__, echan->ch_num, nslots, period_len, buf_len);
+
+ for (i = 0; i < nslots; i++) {
+ /* Allocate a PaRAM slot, if needed */
+ if (echan->slot[i] < 0) {
+ echan->slot[i] =
+ edma_alloc_slot(EDMA_CTLR(echan->ch_num),
+ EDMA_SLOT_ANY);
+ if (echan->slot[i] < 0) {
+ kfree(edesc);
+ dev_err(dev, "%s: Failed to allocate slot\n",
+ __func__);
return NULL;
}
- cidx = acnt * bcnt;
}
- if (direction == DMA_MEM_TO_DEV) {
- src = sg_dma_address(sg);
- dst = dev_addr;
- src_bidx = acnt;
- src_cidx = cidx;
- dst_bidx = 0;
- dst_cidx = 0;
- } else {
- src = dev_addr;
- dst = sg_dma_address(sg);
- src_bidx = 0;
- src_cidx = 0;
- dst_bidx = acnt;
- dst_cidx = cidx;
+ if (i == nslots - 1) {
+ memcpy(&edesc->pset[i], &edesc->pset[0],
+ sizeof(edesc->pset[0]));
+ break;
}
- edesc->pset[i].opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num));
- /* Configure A or AB synchronized transfers */
- if (edesc->absync)
- edesc->pset[i].opt |= SYNCDIM;
- /* If this is the last set, enable completion interrupt flag */
- if (i == sg_len - 1)
- edesc->pset[i].opt |= TCINTEN;
+ ret = edma_config_pset(chan, &edesc->pset[i], src_addr,
+ dst_addr, burst, dev_width, period_len,
+ direction);
+ if (ret < 0) {
+ kfree(edesc);
+ return NULL;
+ }
- edesc->pset[i].src = src;
- edesc->pset[i].dst = dst;
+ if (direction == DMA_DEV_TO_MEM)
+ dst_addr += period_len;
+ else
+ src_addr += period_len;
- edesc->pset[i].src_dst_bidx = (dst_bidx << 16) | src_bidx;
- edesc->pset[i].src_dst_cidx = (dst_cidx << 16) | src_cidx;
+ dev_vdbg(dev, "%s: Configure period %d of buf:\n", __func__, i);
+ dev_vdbg(dev,
+ "\n pset[%d]:\n"
+ " chnum\t%d\n"
+ " slot\t%d\n"
+ " opt\t%08x\n"
+ " src\t%08x\n"
+ " dst\t%08x\n"
+ " abcnt\t%08x\n"
+ " ccnt\t%08x\n"
+ " bidx\t%08x\n"
+ " cidx\t%08x\n"
+ " lkrld\t%08x\n",
+ i, echan->ch_num, echan->slot[i],
+ edesc->pset[i].param.opt,
+ edesc->pset[i].param.src,
+ edesc->pset[i].param.dst,
+ edesc->pset[i].param.a_b_cnt,
+ edesc->pset[i].param.ccnt,
+ edesc->pset[i].param.src_dst_bidx,
+ edesc->pset[i].param.src_dst_cidx,
+ edesc->pset[i].param.link_bcntrld);
- edesc->pset[i].a_b_cnt = bcnt << 16 | acnt;
- edesc->pset[i].ccnt = ccnt;
- edesc->pset[i].link_bcntrld = 0xffffffff;
+ edesc->absync = ret;
+ /*
+ * Enable period interrupt only if it is requested
+ */
+ if (tx_flags & DMA_PREP_INTERRUPT)
+ edesc->pset[i].param.opt |= TCINTEN;
}
+ /* Place the cyclic channel to highest priority queue */
+ edma_assign_channel_eventq(echan->ch_num, EVENTQ_0);
+
return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
}
@@ -354,28 +741,76 @@ static void edma_callback(unsigned ch_num, u16 ch_status, void *data)
struct edma_chan *echan = data;
struct device *dev = echan->vchan.chan.device->dev;
struct edma_desc *edesc;
- unsigned long flags;
+ struct edmacc_param p;
- /* Stop the channel */
- edma_stop(echan->ch_num);
+ edesc = echan->edesc;
- switch (ch_status) {
- case DMA_COMPLETE:
- dev_dbg(dev, "transfer complete on channel %d\n", ch_num);
+ /* Pause the channel for non-cyclic */
+ if (!edesc || (edesc && !edesc->cyclic))
+ edma_pause(echan->ch_num);
- spin_lock_irqsave(&echan->vchan.lock, flags);
+ switch (ch_status) {
+ case EDMA_DMA_COMPLETE:
+ spin_lock(&echan->vchan.lock);
- edesc = echan->edesc;
if (edesc) {
- edma_execute(echan);
- vchan_cookie_complete(&edesc->vdesc);
+ if (edesc->cyclic) {
+ vchan_cyclic_callback(&edesc->vdesc);
+ } else if (edesc->processed == edesc->pset_nr) {
+ dev_dbg(dev, "Transfer complete, stopping channel %d\n", ch_num);
+ edesc->residue = 0;
+ edma_stop(echan->ch_num);
+ vchan_cookie_complete(&edesc->vdesc);
+ edma_execute(echan);
+ } else {
+ dev_dbg(dev, "Intermediate transfer complete on channel %d\n", ch_num);
+
+ /* Update statistics for tx_status */
+ edesc->residue -= edesc->sg_len;
+ edesc->residue_stat = edesc->residue;
+ edesc->processed_stat = edesc->processed;
+
+ edma_execute(echan);
+ }
}
- spin_unlock_irqrestore(&echan->vchan.lock, flags);
+ spin_unlock(&echan->vchan.lock);
break;
- case DMA_CC_ERROR:
- dev_dbg(dev, "transfer error on channel %d\n", ch_num);
+ case EDMA_DMA_CC_ERROR:
+ spin_lock(&echan->vchan.lock);
+
+ edma_read_slot(EDMA_CHAN_SLOT(echan->slot[0]), &p);
+
+ /*
+ * Issue later based on missed flag which will be sure
+ * to happen as:
+ * (1) we finished transmitting an intermediate slot and
+ * edma_execute is coming up.
+ * (2) or we finished current transfer and issue will
+ * call edma_execute.
+ *
+ * Important note: issuing can be dangerous here and
+ * lead to some nasty recursion when we are in a NULL
+ * slot. So we avoid doing so and set the missed flag.
+ */
+ if (p.a_b_cnt == 0 && p.ccnt == 0) {
+ dev_dbg(dev, "Error occurred, looks like slot is null, just setting miss\n");
+ echan->missed = 1;
+ } else {
+ /*
+ * The slot is already programmed but the event got
+ * missed, so its safe to issue it here.
+ */
+ dev_dbg(dev, "Error occurred but slot is non-null, TRIGGERING\n");
+ edma_clean_channel(echan->ch_num);
+ edma_stop(echan->ch_num);
+ edma_start(echan->ch_num);
+ edma_trigger_channel(echan->ch_num);
+ }
+
+ spin_unlock(&echan->vchan.lock);
+
break;
default:
break;
@@ -410,8 +845,8 @@ static int edma_alloc_chan_resources(struct dma_chan *chan)
echan->alloced = true;
echan->slot[0] = echan->ch_num;
- dev_info(dev, "allocated channel for %u:%u\n",
- EDMA_CTLR(echan->ch_num), EDMA_CHAN_SLOT(echan->ch_num));
+ dev_dbg(dev, "allocated channel %d for %u:%u\n", echan->ch_num,
+ EDMA_CTLR(echan->ch_num), EDMA_CHAN_SLOT(echan->ch_num));
return 0;
@@ -447,7 +882,7 @@ static void edma_free_chan_resources(struct dma_chan *chan)
echan->alloced = false;
}
- dev_info(dev, "freeing channel for %u\n", echan->ch_num);
+ dev_dbg(dev, "freeing channel for %u\n", echan->ch_num);
}
/* Send pending descriptor to hardware */
@@ -462,23 +897,52 @@ static void edma_issue_pending(struct dma_chan *chan)
spin_unlock_irqrestore(&echan->vchan.lock, flags);
}
-static size_t edma_desc_size(struct edma_desc *edesc)
+static u32 edma_residue(struct edma_desc *edesc)
{
+ bool dst = edesc->direction == DMA_DEV_TO_MEM;
+ struct edma_pset *pset = edesc->pset;
+ dma_addr_t done, pos;
int i;
- size_t size;
-
- if (edesc->absync)
- for (size = i = 0; i < edesc->pset_nr; i++)
- size += (edesc->pset[i].a_b_cnt & 0xffff) *
- (edesc->pset[i].a_b_cnt >> 16) *
- edesc->pset[i].ccnt;
- else
- size = (edesc->pset[0].a_b_cnt & 0xffff) *
- (edesc->pset[0].a_b_cnt >> 16) +
- (edesc->pset[0].a_b_cnt & 0xffff) *
- (SZ_64K - 1) * edesc->pset[0].ccnt;
-
- return size;
+
+ /*
+ * We always read the dst/src position from the first RamPar
+ * pset. That's the one which is active now.
+ */
+ pos = edma_get_position(edesc->echan->slot[0], dst);
+
+ /*
+ * Cyclic is simple. Just subtract pset[0].addr from pos.
+ *
+ * We never update edesc->residue in the cyclic case, so we
+ * can tell the remaining room to the end of the circular
+ * buffer.
+ */
+ if (edesc->cyclic) {
+ done = pos - pset->addr;
+ edesc->residue_stat = edesc->residue - done;
+ return edesc->residue_stat;
+ }
+
+ /*
+ * For SG operation we catch up with the last processed
+ * status.
+ */
+ pset += edesc->processed_stat;
+
+ for (i = edesc->processed_stat; i < edesc->processed; i++, pset++) {
+ /*
+ * If we are inside this pset address range, we know
+ * this is the active one. Get the current delta and
+ * stop walking the psets.
+ */
+ if (pos >= pset->addr && pos < pset->addr + pset->len)
+ return edesc->residue_stat - (pos - pset->addr);
+
+ /* Otherwise mark it done and update residue_stat. */
+ edesc->processed_stat++;
+ edesc->residue_stat -= pset->len;
+ }
+ return edesc->residue_stat;
}
/* Check request completion status */
@@ -492,19 +956,14 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
unsigned long flags;
ret = dma_cookie_status(chan, cookie, txstate);
- if (ret == DMA_SUCCESS || !txstate)
+ if (ret == DMA_COMPLETE || !txstate)
return ret;
spin_lock_irqsave(&echan->vchan.lock, flags);
- vdesc = vchan_find_desc(&echan->vchan, cookie);
- if (vdesc) {
- txstate->residue = edma_desc_size(to_edma_desc(&vdesc->tx));
- } else if (echan->edesc && echan->edesc->vdesc.tx.cookie == cookie) {
- struct edma_desc *edesc = echan->edesc;
- txstate->residue = edma_desc_size(edesc);
- } else {
- txstate->residue = 0;
- }
+ if (echan->edesc && echan->edesc->vdesc.tx.cookie == cookie)
+ txstate->residue = edma_residue(echan->edesc);
+ else if ((vdesc = vchan_find_desc(&echan->vchan, cookie)))
+ txstate->residue = to_edma_desc(&vdesc->tx)->residue;
spin_unlock_irqrestore(&echan->vchan.lock, flags);
return ret;
@@ -530,17 +989,44 @@ static void __init edma_chan_init(struct edma_cc *ecc,
}
}
+#define EDMA_DMA_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
+ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
+ BIT(DMA_SLAVE_BUSWIDTH_3_BYTES) | \
+ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES))
+
+static int edma_dma_device_slave_caps(struct dma_chan *dchan,
+ struct dma_slave_caps *caps)
+{
+ caps->src_addr_widths = EDMA_DMA_BUSWIDTHS;
+ caps->dstn_addr_widths = EDMA_DMA_BUSWIDTHS;
+ caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
+ caps->cmd_pause = true;
+ caps->cmd_terminate = true;
+ caps->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
+
+ return 0;
+}
+
static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma,
struct device *dev)
{
dma->device_prep_slave_sg = edma_prep_slave_sg;
+ dma->device_prep_dma_cyclic = edma_prep_dma_cyclic;
+ dma->device_prep_dma_memcpy = edma_prep_dma_memcpy;
dma->device_alloc_chan_resources = edma_alloc_chan_resources;
dma->device_free_chan_resources = edma_free_chan_resources;
dma->device_issue_pending = edma_issue_pending;
dma->device_tx_status = edma_tx_status;
dma->device_control = edma_control;
+ dma->device_slave_caps = edma_dma_device_slave_caps;
dma->dev = dev;
+ /*
+ * code using dma memcpy must make sure alignment of
+ * length is at dma->copy_align boundary.
+ */
+ dma->copy_align = DMA_SLAVE_BUSWIDTH_4_BYTES;
+
INIT_LIST_HEAD(&dma->channels);
}
@@ -549,6 +1035,10 @@ static int edma_probe(struct platform_device *pdev)
struct edma_cc *ecc;
int ret;
+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+ if (ret)
+ return ret;
+
ecc = devm_kzalloc(&pdev->dev, sizeof(*ecc), GFP_KERNEL);
if (!ecc) {
dev_err(&pdev->dev, "Can't allocate controller\n");
@@ -559,11 +1049,13 @@ static int edma_probe(struct platform_device *pdev)
ecc->dummy_slot = edma_alloc_slot(ecc->ctlr, EDMA_SLOT_ANY);
if (ecc->dummy_slot < 0) {
dev_err(&pdev->dev, "Can't allocate PaRAM dummy slot\n");
- return -EIO;
+ return ecc->dummy_slot;
}
dma_cap_zero(ecc->dma_slave.cap_mask);
dma_cap_set(DMA_SLAVE, ecc->dma_slave.cap_mask);
+ dma_cap_set(DMA_CYCLIC, ecc->dma_slave.cap_mask);
+ dma_cap_set(DMA_MEMCPY, ecc->dma_slave.cap_mask);
edma_dma_init(ecc, &ecc->dma_slave, &pdev->dev);
@@ -620,11 +1112,13 @@ static struct platform_device *pdev0, *pdev1;
static const struct platform_device_info edma_dev_info0 = {
.name = "edma-dma-engine",
.id = 0,
+ .dma_mask = DMA_BIT_MASK(32),
};
static const struct platform_device_info edma_dev_info1 = {
.name = "edma-dma-engine",
.id = 1,
+ .dma_mask = DMA_BIT_MASK(32),
};
static int edma_init(void)
@@ -638,19 +1132,15 @@ static int edma_init(void)
ret = PTR_ERR(pdev0);
goto out;
}
- pdev0->dev.dma_mask = &pdev0->dev.coherent_dma_mask;
- pdev0->dev.coherent_dma_mask = DMA_BIT_MASK(32);
}
- if (EDMA_CTLRS == 2) {
+ if (!of_have_populated_dt() && EDMA_CTLRS == 2) {
pdev1 = platform_device_register_full(&edma_dev_info1);
if (IS_ERR(pdev1)) {
platform_driver_unregister(&edma_driver);
platform_device_unregister(pdev0);
ret = PTR_ERR(pdev1);
}
- pdev1->dev.dma_mask = &pdev1->dev.coherent_dma_mask;
- pdev1->dev.coherent_dma_mask = DMA_BIT_MASK(32);
}
out:
@@ -667,6 +1157,6 @@ static void __exit edma_exit(void)
}
module_exit(edma_exit);
-MODULE_AUTHOR("Matt Porter <mporter@ti.com>");
+MODULE_AUTHOR("Matt Porter <matt.porter@linaro.org>");
MODULE_DESCRIPTION("TI EDMA DMA engine driver");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 08b43bf3..c4b4fd2a 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -276,20 +276,12 @@ static void omap_dma_issue_pending(struct dma_chan *chan)
spin_lock_irqsave(&c->vc.lock, flags);
if (vchan_issue_pending(&c->vc) && !c->desc) {
- /*
- * c->cyclic is used only by audio and in this case the DMA need
- * to be started without delay.
- */
- if (!c->cyclic) {
- struct omap_dmadev *d = to_omap_dma_dev(chan->device);
- spin_lock(&d->lock);
- if (list_empty(&c->node))
- list_add_tail(&c->node, &d->pending);
- spin_unlock(&d->lock);
- tasklet_schedule(&d->task);
- } else {
- omap_dma_start_desc(c);
- }
+ struct omap_dmadev *d = to_omap_dma_dev(chan->device);
+ spin_lock(&d->lock);
+ if (list_empty(&c->node))
+ list_add_tail(&c->node, &d->pending);
+ spin_unlock(&d->lock);
+ tasklet_schedule(&d->task);
}
spin_unlock_irqrestore(&c->vc.lock, flags);
}
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 5dbc5946..71815312 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -2882,7 +2882,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
{
struct dma_pl330_platdata *pdat;
struct dma_pl330_dmac *pdmac;
- struct dma_pl330_chan *pch, *_p;
+ struct dma_pl330_chan *pch;
struct pl330_info *pi;
struct dma_device *pd;
struct resource *res;
@@ -2984,16 +2984,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
ret = dma_async_device_register(pd);
if (ret) {
dev_err(&adev->dev, "unable to register DMAC\n");
- goto probe_err3;
- }
-
- if (adev->dev.of_node) {
- ret = of_dma_controller_register(adev->dev.of_node,
- of_dma_pl330_xlate, pdmac);
- if (ret) {
- dev_err(&adev->dev,
- "unable to register DMA to the generic DT DMA helpers\n");
- }
+ goto probe_err2;
}
dev_info(&adev->dev,
@@ -3004,21 +2995,16 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
pi->pcfg.data_bus_width / 8, pi->pcfg.num_chan,
pi->pcfg.num_peri, pi->pcfg.num_events);
- return 0;
-probe_err3:
- amba_set_drvdata(adev, NULL);
-
- /* Idle the DMAC */
- list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
- chan.device_node) {
+ ret = of_dma_controller_register(adev->dev.of_node,
+ of_dma_pl330_xlate, pdmac);
+ if (ret) {
+ dev_err(&adev->dev,
+ "unable to register DMA to the generic DT DMA helpers\n");
+ goto probe_err2;
+ }
- /* Remove the channel */
- list_del(&pch->chan.device_node);
+ return 0;
- /* Flush the channel */
- pl330_control(&pch->chan, DMA_TERMINATE_ALL, 0);
- pl330_free_chan_resources(&pch->chan);
- }
probe_err2:
pl330_del(pi);
probe_err1:
@@ -3037,10 +3023,8 @@ static int pl330_remove(struct amba_device *adev)
if (!pdmac)
return 0;
- if (adev->dev.of_node)
- of_dma_controller_free(adev->dev.of_node);
+ of_dma_controller_free(adev->dev.of_node);
- dma_async_device_unregister(&pdmac->ddma);
amba_set_drvdata(adev, NULL);
/* Idle the DMAC */
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index 3e532002..42c759a4 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -39,7 +39,6 @@ config FIRMWARE_MEMMAP
config EFI_VARS
tristate "EFI Variable Support via sysfs"
depends on EFI
- select UCS2_STRING
default n
help
If you say Y here, you are able to get EFI (Extensible Firmware
diff --git a/drivers/firmware/efivars.c b/drivers/firmware/efivars.c
index f4baa11d..7acafb80 100644
--- a/drivers/firmware/efivars.c
+++ b/drivers/firmware/efivars.c
@@ -80,7 +80,6 @@
#include <linux/slab.h>
#include <linux/pstore.h>
#include <linux/ctype.h>
-#include <linux/ucs2_string.h>
#include <linux/fs.h>
#include <linux/ramfs.h>
@@ -173,6 +172,51 @@ static void efivar_update_sysfs_entries(struct work_struct *);
static DECLARE_WORK(efivar_work, efivar_update_sysfs_entries);
static bool efivar_wq_enabled = true;
+/* Return the number of unicode characters in data */
+static unsigned long
+utf16_strnlen(efi_char16_t *s, size_t maxlength)
+{
+ unsigned long length = 0;
+
+ while (*s++ != 0 && length < maxlength)
+ length++;
+ return length;
+}
+
+static inline unsigned long
+utf16_strlen(efi_char16_t *s)
+{
+ return utf16_strnlen(s, ~0UL);
+}
+
+/*
+ * Return the number of bytes is the length of this string
+ * Note: this is NOT the same as the number of unicode characters
+ */
+static inline unsigned long
+utf16_strsize(efi_char16_t *data, unsigned long maxlength)
+{
+ return utf16_strnlen(data, maxlength/sizeof(efi_char16_t)) * sizeof(efi_char16_t);
+}
+
+static inline int
+utf16_strncmp(const efi_char16_t *a, const efi_char16_t *b, size_t len)
+{
+ while (1) {
+ if (len == 0)
+ return 0;
+ if (*a < *b)
+ return -1;
+ if (*a > *b)
+ return 1;
+ if (*a == 0) /* implies *b == 0 */
+ return 0;
+ a++;
+ b++;
+ len--;
+ }
+}
+
static bool
validate_device_path(struct efi_variable *var, int match, u8 *buffer,
unsigned long len)
@@ -224,7 +268,7 @@ validate_load_option(struct efi_variable *var, int match, u8 *buffer,
u16 filepathlength;
int i, desclength = 0, namelen;
- namelen = ucs2_strnlen(var->VariableName, sizeof(var->VariableName));
+ namelen = utf16_strnlen(var->VariableName, sizeof(var->VariableName));
/* Either "Boot" or "Driver" followed by four digits of hex */
for (i = match; i < match+4; i++) {
@@ -247,7 +291,7 @@ validate_load_option(struct efi_variable *var, int match, u8 *buffer,
* There's no stored length for the description, so it has to be
* found by hand
*/
- desclength = ucs2_strsize((efi_char16_t *)(buffer + 6), len - 6) + 2;
+ desclength = utf16_strsize((efi_char16_t *)(buffer + 6), len - 6) + 2;
/* Each boot entry must have a descriptor */
if (!desclength)
@@ -392,12 +436,24 @@ static efi_status_t
check_var_size_locked(struct efivars *efivars, u32 attributes,
unsigned long size)
{
+ u64 storage_size, remaining_size, max_size;
+ efi_status_t status;
const struct efivar_operations *fops = efivars->ops;
- if (!efivars->ops->query_variable_store)
+ if (!efivars->ops->query_variable_info)
return EFI_UNSUPPORTED;
- return fops->query_variable_store(attributes, size);
+ status = fops->query_variable_info(attributes, &storage_size,
+ &remaining_size, &max_size);
+
+ if (status != EFI_SUCCESS)
+ return status;
+
+ if (!storage_size || size > remaining_size || size > max_size ||
+ (remaining_size - size) < (storage_size / 2))
+ return EFI_OUT_OF_RESOURCES;
+
+ return status;
}
@@ -537,7 +593,7 @@ efivar_store_raw(struct efivar_entry *entry, const char *buf, size_t count)
spin_lock_irq(&efivars->lock);
status = check_var_size_locked(efivars, new_var->Attributes,
- new_var->DataSize + ucs2_strsize(new_var->VariableName, 1024));
+ new_var->DataSize + utf16_strsize(new_var->VariableName, 1024));
if (status == EFI_SUCCESS || status == EFI_UNSUPPORTED)
status = efivars->ops->set_variable(new_var->VariableName,
@@ -715,7 +771,7 @@ static ssize_t efivarfs_file_write(struct file *file,
* QueryVariableInfo() isn't supported by the firmware.
*/
- varsize = datasize + ucs2_strsize(var->var.VariableName, 1024);
+ varsize = datasize + utf16_strsize(var->var.VariableName, 1024);
status = check_var_size(efivars, attributes, varsize);
if (status != EFI_SUCCESS) {
@@ -1167,7 +1223,7 @@ static int efivarfs_fill_super(struct super_block *sb, void *data, int silent)
inode = NULL;
- len = ucs2_strlen(entry->var.VariableName);
+ len = utf16_strlen(entry->var.VariableName);
/* name, plus '-', plus GUID, plus NUL*/
name = kmalloc(len + 1 + GUID_LEN + 1, GFP_ATOMIC);
@@ -1425,8 +1481,8 @@ static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count,
if (efi_guidcmp(entry->var.VendorGuid, vendor))
continue;
- if (ucs2_strncmp(entry->var.VariableName, efi_name,
- ucs2_strlen(efi_name))) {
+ if (utf16_strncmp(entry->var.VariableName, efi_name,
+ utf16_strlen(efi_name))) {
/*
* Check if an old format,
* which doesn't support holding
@@ -1438,8 +1494,8 @@ static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count,
for (i = 0; i < DUMP_NAME_LEN; i++)
efi_name_old[i] = name_old[i];
- if (ucs2_strncmp(entry->var.VariableName, efi_name_old,
- ucs2_strlen(efi_name_old)))
+ if (utf16_strncmp(entry->var.VariableName, efi_name_old,
+ utf16_strlen(efi_name_old)))
continue;
}
@@ -1517,8 +1573,8 @@ static ssize_t efivar_create(struct file *filp, struct kobject *kobj,
* Does this variable already exist?
*/
list_for_each_entry_safe(search_efivar, n, &efivars->list, list) {
- strsize1 = ucs2_strsize(search_efivar->var.VariableName, 1024);
- strsize2 = ucs2_strsize(new_var->VariableName, 1024);
+ strsize1 = utf16_strsize(search_efivar->var.VariableName, 1024);
+ strsize2 = utf16_strsize(new_var->VariableName, 1024);
if (strsize1 == strsize2 &&
!memcmp(&(search_efivar->var.VariableName),
new_var->VariableName, strsize1) &&
@@ -1534,7 +1590,7 @@ static ssize_t efivar_create(struct file *filp, struct kobject *kobj,
}
status = check_var_size_locked(efivars, new_var->Attributes,
- new_var->DataSize + ucs2_strsize(new_var->VariableName, 1024));
+ new_var->DataSize + utf16_strsize(new_var->VariableName, 1024));
if (status && status != EFI_UNSUPPORTED) {
spin_unlock_irq(&efivars->lock);
@@ -1558,7 +1614,7 @@ static ssize_t efivar_create(struct file *filp, struct kobject *kobj,
/* Create the entry in sysfs. Locking is not required here */
status = efivar_create_sysfs_entry(efivars,
- ucs2_strsize(new_var->VariableName,
+ utf16_strsize(new_var->VariableName,
1024),
new_var->VariableName,
&new_var->VendorGuid);
@@ -1588,8 +1644,8 @@ static ssize_t efivar_delete(struct file *filp, struct kobject *kobj,
* Does this variable already exist?
*/
list_for_each_entry_safe(search_efivar, n, &efivars->list, list) {
- strsize1 = ucs2_strsize(search_efivar->var.VariableName, 1024);
- strsize2 = ucs2_strsize(del_var->VariableName, 1024);
+ strsize1 = utf16_strsize(search_efivar->var.VariableName, 1024);
+ strsize2 = utf16_strsize(del_var->VariableName, 1024);
if (strsize1 == strsize2 &&
!memcmp(&(search_efivar->var.VariableName),
del_var->VariableName, strsize1) &&
@@ -1628,17 +1684,16 @@ static ssize_t efivar_delete(struct file *filp, struct kobject *kobj,
return count;
}
-static bool variable_is_present(struct efivars *efivars,
- efi_char16_t *variable_name,
- efi_guid_t *vendor)
+static bool variable_is_present(efi_char16_t *variable_name, efi_guid_t *vendor)
{
struct efivar_entry *entry, *n;
+ struct efivars *efivars = &__efivars;
unsigned long strsize1, strsize2;
bool found = false;
- strsize1 = ucs2_strsize(variable_name, 1024);
+ strsize1 = utf16_strsize(variable_name, 1024);
list_for_each_entry_safe(entry, n, &efivars->list, list) {
- strsize2 = ucs2_strsize(entry->var.VariableName, 1024);
+ strsize2 = utf16_strsize(entry->var.VariableName, 1024);
if (strsize1 == strsize2 &&
!memcmp(variable_name, &(entry->var.VariableName),
strsize2) &&
@@ -1704,8 +1759,8 @@ static void efivar_update_sysfs_entries(struct work_struct *work)
if (status != EFI_SUCCESS) {
break;
} else {
- if (!variable_is_present(efivars,
- variable_name, &vendor)) {
+ if (!variable_is_present(variable_name,
+ &vendor)) {
found = true;
break;
}
@@ -2009,8 +2064,7 @@ int register_efivars(struct efivars *efivars,
* we'll ever see a different variable name,
* and may end up looping here forever.
*/
- if (variable_is_present(efivars, variable_name,
- &vendor_guid)) {
+ if (variable_is_present(variable_name, &vendor_guid)) {
dup_variable_bug(variable_name, &vendor_guid,
variable_name_size);
status = EFI_NOT_FOUND;
@@ -2077,7 +2131,7 @@ efivars_init(void)
ops.get_variable = efi.get_variable;
ops.set_variable = efi.set_variable;
ops.get_next_variable = efi.get_next_variable;
- ops.query_variable_store = efi_query_variable_store;
+ ops.query_variable_info = efi.query_variable_info;
error = register_efivars(&__efivars, &ops, efi_kobj);
if (error)
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 9391cf16..24059462 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -575,7 +575,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
chip->gpio_chip.ngpio,
irq_base,
&pca953x_irq_simple_ops,
- chip);
+ NULL);
if (!chip->domain)
return -ENODEV;
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 8325f580..9cc108d2 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -642,12 +642,7 @@ static struct platform_driver pxa_gpio_driver = {
.of_match_table = of_match_ptr(pxa_gpio_dt_ids),
},
};
-
-static int __init pxa_gpio_init(void)
-{
- return platform_driver_register(&pxa_gpio_driver);
-}
-postcore_initcall(pxa_gpio_init);
+module_platform_driver(pxa_gpio_driver);
#ifdef CONFIG_PM
static int pxa_gpio_suspend(void)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 892ff9f9..213b02fd 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -34,6 +34,7 @@
#include <linux/slab.h>
#include <linux/fb.h>
#include <linux/module.h>
+#include <linux/kgdb.h>
#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_fb_helper.h>
@@ -1544,10 +1545,10 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)
if (!fb_helper->fb)
return 0;
- mutex_lock(&fb_helper->dev->mode_config.mutex);
+ drm_modeset_lock_all(dev);
if (!drm_fb_helper_is_bound(fb_helper)) {
fb_helper->delayed_hotplug = true;
- mutex_unlock(&fb_helper->dev->mode_config.mutex);
+ drm_modeset_unlock_all(dev);
return 0;
}
DRM_DEBUG_KMS("\n");
@@ -1558,11 +1559,9 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)
count = drm_fb_helper_probe_connector_modes(fb_helper, max_width,
max_height);
- mutex_unlock(&fb_helper->dev->mode_config.mutex);
-
- drm_modeset_lock_all(dev);
drm_setup_crtcs(fb_helper);
drm_modeset_unlock_all(dev);
+
drm_fb_helper_set_par(fb_helper->fbdev);
return 0;
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 78d8e919..fe22bb78 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -751,6 +751,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
int i;
unsigned char misc = 0;
unsigned char ext_vga[6];
+ unsigned char ext_vga_index24;
+ unsigned char dac_index90 = 0;
u8 bppshift;
static unsigned char dacvalue[] = {
@@ -801,6 +803,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
option2 = 0x0000b000;
break;
case G200_ER:
+ dac_index90 = 0;
break;
}
@@ -849,8 +852,10 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG_DAC(i, dacvalue[i]);
}
- if (mdev->type == G200_ER)
- WREG_DAC(0x90, 0);
+ if (mdev->type == G200_ER) {
+ WREG_DAC(0x90, dac_index90);
+ }
+
if (option)
pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option);
@@ -947,6 +952,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (mdev->type == G200_WB)
ext_vga[1] |= 0x88;
+ ext_vga_index24 = 0x05;
+
/* Set pixel clocks */
misc = 0x2d;
WREG8(MGA_MISC_OUT, misc);
@@ -958,7 +965,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
}
if (mdev->type == G200_ER)
- WREG_ECRT(0x24, 0x5);
+ WREG_ECRT(24, ext_vga_index24);
if (mdev->type == G200_EV) {
WREG_ECRT(6, 0);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 1ddc03e5..7f0e6c3f 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -479,7 +479,7 @@ nv50_display_flip_wait(void *data)
{
struct nv50_display_flip *flip = data;
if (nouveau_bo_rd32(flip->disp->sync, flip->chan->addr / 4) ==
- flip->chan->data)
+ flip->chan->data);
return true;
usleep_range(1, 2);
return false;
diff --git a/drivers/gpu/drm/udl/udl_connector.c b/drivers/gpu/drm/udl/udl_connector.c
index b44d548c..fe5cdbcf 100644
--- a/drivers/gpu/drm/udl/udl_connector.c
+++ b/drivers/gpu/drm/udl/udl_connector.c
@@ -61,10 +61,6 @@ static int udl_get_modes(struct drm_connector *connector)
int ret;
edid = (struct edid *)udl_get_edid(udl);
- if (!edid) {
- drm_mode_connector_update_edid_property(connector, NULL);
- return 0;
- }
/*
* We only read the main block, but if the monitor reports extension
diff --git a/drivers/hwspinlock/hwspinlock_core.c b/drivers/hwspinlock/hwspinlock_core.c
index 461a0d73..db713c0d 100644
--- a/drivers/hwspinlock/hwspinlock_core.c
+++ b/drivers/hwspinlock/hwspinlock_core.c
@@ -416,8 +416,6 @@ static int __hwspin_lock_request(struct hwspinlock *hwlock)
ret = pm_runtime_get_sync(dev);
if (ret < 0) {
dev_err(dev, "%s: can't power on device\n", __func__);
- pm_runtime_put_noidle(dev);
- module_put(dev->driver->owner);
return ret;
}
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 7d1e590a..81b11f45 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -68,6 +68,11 @@
#define DAVINCI_I2C_EMDR_REG 0x2c
#define DAVINCI_I2C_PSC_REG 0x30
+#define DAVINCI_I2C_FUNC_REG 0x48
+#define DAVINCI_I2C_DIR_REG 0x4c
+#define DAVINCI_I2C_DIN_REG 0x50
+#define DAVINCI_I2C_DOUT_REG 0x54
+
#define DAVINCI_I2C_IVR_AAS 0x07
#define DAVINCI_I2C_IVR_SCD 0x06
#define DAVINCI_I2C_IVR_XRDY 0x05
@@ -136,42 +141,7 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg)
return __raw_readw(i2c_dev->base + reg);
}
-/* Generate a pulse on the i2c clock pin. */
-static void generic_i2c_clock_pulse(unsigned int scl_pin)
-{
- u16 i;
-
- if (scl_pin) {
- /* Send high and low on the SCL line */
- for (i = 0; i < 9; i++) {
- gpio_set_value(scl_pin, 0);
- udelay(20);
- gpio_set_value(scl_pin, 1);
- udelay(20);
- }
- }
-}
-/* This routine does i2c bus recovery as specified in the
- * i2c protocol Rev. 03 section 3.16 titled "Bus clear"
- */
-static void i2c_recover_bus(struct davinci_i2c_dev *dev)
-{
- u32 flag = 0;
- struct davinci_i2c_platform_data *pdata = dev->pdata;
-
- dev_err(dev->dev, "initiating i2c bus recovery\n");
- /* Send NACK to the slave */
- flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
- flag |= DAVINCI_I2C_MDR_NACK;
- /* write the data into mode register */
- davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
- generic_i2c_clock_pulse(pdata->scl_pin);
- /* Send STOP */
- flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
- flag |= DAVINCI_I2C_MDR_STP;
- davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
-}
static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,
int val)
@@ -269,6 +239,49 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
return 0;
}
+
+/* This routine does i2c bus recovery as specified in the
+ * i2c protocol Rev. 03 section 3.16 titled "Bus clear"
+ */
+static void i2c_recover_bus(struct davinci_i2c_dev *dev)
+{
+ u32 flag = 0;
+ int i;
+ struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
+ flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_DIN_REG);
+ if ((flag & 0x01) == 0)
+ dev_err(dev->dev, "SCL stuck at zero.\n");
+ dev_err(dev->dev, "initiating i2c bus recovery\n");
+ /* Disable interrupts */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, 0);
+ /* put I2C into reset */
+ davinci_i2c_reset_ctrl(dev, 0);
+ /* Set GPIO mode */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_FUNC_REG, 0x1);
+ /* Set scl=1 sda=1 */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DOUT_REG, 0x03);
+ /* Set SCL pin as output, SDA as input */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DIR_REG, 0x1);
+ /* Send up to 9 clock pulses until SDA is high */
+ for (i = 0; i < 9; ++i) {
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DOUT_REG, 0x02); /* scl=0 sda=1 */
+ udelay(10);
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DOUT_REG, 0x03);
+ udelay(10);
+ /* Register DIN reads actual state on line */
+ flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_DIN_REG);
+ if ((flag & 0x3) == 0x3) {
+ dev_info(dev->dev, "SDA and SCL high again (i=%d), resume.\n", i);
+ break;
+ }
+ }
+ /* Resume operation */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_FUNC_REG, 0x0);
+ i2c_davinci_init(dev);
+}
+
+
+
/*
* Waiting for bus not busy
*/
@@ -290,7 +303,6 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev,
} else {
to_cnt = 0;
i2c_recover_bus(dev);
- i2c_davinci_init(dev);
}
}
if (allow_sleep)
@@ -380,7 +392,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
if (r == 0) {
dev_err(dev->dev, "controller timed out\n");
i2c_recover_bus(dev);
- i2c_davinci_init(dev);
dev->buf_len = 0;
return -ETIMEDOUT;
}
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 1a38dd7d..5d667501 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -465,7 +465,6 @@ static const struct x86_cpu_id intel_idle_ids[] = {
ICPU(0x3c, idle_cpu_hsw),
ICPU(0x3f, idle_cpu_hsw),
ICPU(0x45, idle_cpu_hsw),
- ICPU(0x46, idle_cpu_hsw),
{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 259ef31a..78b5a48d 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -524,6 +524,15 @@ config INPUT_DM355EVM
To compile this driver as a module, choose M here: the
module will be called dm355evm_keys.
+config INPUT_DM365EVM
+ tristate "TI DaVinci DM365 EVM IR Remote"
+ depends on MACH_DAVINCI_DM365_EVM
+ help
+ Supports the IR remote used with the DM365 EVM board.
+
+ To compile this driver as a module, choose M here: the
+ module will be called dm365evm_keys.
+
config INPUT_BFIN_ROTARY
tristate "Blackfin Rotary support"
depends on BF54x || BF52x
@@ -590,6 +599,14 @@ config INPUT_ADXL34X_SPI
To compile this driver as a module, choose M here: the
module will be called adxl34x-spi.
+config INPUT_ADXL34X_ALLOW_POLLING
+ bool "allow to fallback to polling mode"
+ depends on INPUT_ADXL34X
+ default y
+ help
+ Say Y here if the int lines of your ADXL345/6 are unused.
+
+
config INPUT_CMA3000
tristate "VTI CMA3000 Tri-axis accelerometer"
help
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index 1f1e1b10..c2b95401 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_INPUT_COBALT_BTNS) += cobalt_btns.o
obj-$(CONFIG_INPUT_DA9052_ONKEY) += da9052_onkey.o
obj-$(CONFIG_INPUT_DA9055_ONKEY) += da9055_onkey.o
obj-$(CONFIG_INPUT_DM355EVM) += dm355evm_keys.o
+obj-$(CONFIG_INPUT_DM365EVM) += dm365evm_keys.o
obj-$(CONFIG_INPUT_GP2A) += gp2ap002a00f.o
obj-$(CONFIG_INPUT_GPIO_TILT_POLLED) += gpio_tilt_polled.o
obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o
diff --git a/drivers/input/misc/adxl34x.c b/drivers/input/misc/adxl34x.c
index 0735de3a..88efbf7b 100644
--- a/drivers/input/misc/adxl34x.c
+++ b/drivers/input/misc/adxl34x.c
@@ -99,6 +99,7 @@
/* BW_RATE Bits */
#define LOW_POWER (1 << 4)
#define RATE(x) ((x) & 0xF)
+#define RATE2USEC(x) (10240000 >> RATE(x))
/* POWER_CTL Bits */
#define PCTL_LINK (1 << 5)
@@ -207,6 +208,10 @@ struct adxl34x {
unsigned model;
unsigned int_mask;
+#if defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING)
+ struct delayed_work work;
+#endif /* defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING) */
+
const struct adxl34x_bus_ops *bops;
};
@@ -399,6 +404,36 @@ static irqreturn_t adxl34x_irq(int irq, void *handle)
return IRQ_HANDLED;
}
+#if defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING)
+static void adxl34x_poll_reschedule(struct adxl34x *ac)
+{
+ unsigned long delay_usecs;
+ unsigned long delay_jiffies;
+
+ delay_usecs = RATE2USEC(ac->pdata.data_rate);
+ delay_jiffies = usecs_to_jiffies(delay_usecs);
+ if (delay_jiffies >= HZ)
+ delay_jiffies = round_jiffies_relative(delay_jiffies);
+ schedule_delayed_work(&ac->work, delay_jiffies);
+}
+
+static void adxl34x_poll_cancel(struct adxl34x *ac)
+{
+ cancel_delayed_work(&ac->work);
+}
+
+static void adxl34x_poll(struct work_struct *work)
+{
+ struct delayed_work *dw = container_of(work, struct delayed_work, work);
+ struct adxl34x *ac = container_of(dw, struct adxl34x, work);
+
+ adxl34x_irq(ac->irq, ac);
+
+ adxl34x_poll_reschedule(ac);
+}
+#endif /* defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING) */
+
+
static void __adxl34x_disable(struct adxl34x *ac)
{
/*
@@ -672,6 +707,12 @@ static int adxl34x_input_open(struct input_dev *input)
mutex_unlock(&ac->mutex);
+#if defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING)
+ if (!ac->irq) {
+ adxl34x_poll_reschedule(ac);
+}
+#endif /* defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING) */
+
return 0;
}
@@ -687,6 +728,13 @@ static void adxl34x_input_close(struct input_dev *input)
ac->opened = false;
mutex_unlock(&ac->mutex);
+
+#if defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING)
+ if (!ac->irq) {
+ adxl34x_poll_cancel(ac);
+ }
+#endif /* defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING) */
+
}
struct adxl34x *adxl34x_probe(struct device *dev, int irq,
@@ -700,9 +748,17 @@ struct adxl34x *adxl34x_probe(struct device *dev, int irq,
unsigned char revid;
if (!irq) {
+
+#if defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING)
+ dev_dbg(dev, "no IRQ, switch to poll mode\n");
+#else
+
dev_err(dev, "no IRQ?\n");
err = -ENODEV;
goto err_out;
+
+#endif /* defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING) */
+
}
ac = kzalloc(sizeof(*ac), GFP_KERNEL);
@@ -811,13 +867,21 @@ struct adxl34x *adxl34x_probe(struct device *dev, int irq,
AC_WRITE(ac, POWER_CTL, 0);
- err = request_threaded_irq(ac->irq, NULL, adxl34x_irq,
- IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
- dev_name(dev), ac);
- if (err) {
- dev_err(dev, "irq %d busy?\n", ac->irq);
- goto err_free_mem;
+ if (ac->irq) {
+ err = request_threaded_irq(ac->irq, NULL, adxl34x_irq,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ dev_name(dev), ac);
+ if (err) {
+ dev_err(dev, "irq %d busy?\n", ac->irq);
+ goto err_free_mem;
+ }
+ }
+
+#if defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING)
+ else {
+ INIT_DELAYED_WORK(&ac->work, &adxl34x_poll);
}
+#endif /* defined(CONFIG_INPUT_ADXL34X_ALLOW_POLLING) */
err = sysfs_create_group(&dev->kobj, &adxl34x_attr_group);
if (err)
@@ -888,7 +952,8 @@ struct adxl34x *adxl34x_probe(struct device *dev, int irq,
err_remove_attr:
sysfs_remove_group(&dev->kobj, &adxl34x_attr_group);
err_free_irq:
- free_irq(ac->irq, ac);
+ if (ac->irq)
+ free_irq(ac->irq, ac);
err_free_mem:
input_free_device(input_dev);
kfree(ac);
@@ -900,7 +965,8 @@ EXPORT_SYMBOL_GPL(adxl34x_probe);
int adxl34x_remove(struct adxl34x *ac)
{
sysfs_remove_group(&ac->dev->kobj, &adxl34x_attr_group);
- free_irq(ac->irq, ac);
+ if (ac->irq)
+ free_irq(ac->irq, ac);
input_unregister_device(ac->input);
dev_dbg(ac->dev, "unregistered accelerometer\n");
kfree(ac);
diff --git a/drivers/input/misc/dm365evm_keys.c b/drivers/input/misc/dm365evm_keys.c
new file mode 100644
index 00000000..26df358b
--- /dev/null
+++ b/drivers/input/misc/dm365evm_keys.c
@@ -0,0 +1,323 @@
+/*
+ * dm365evm_keys.c - support IR remote on DM365 EVM board
+ *
+ * Copyright (c) 2009 by David Brownell
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <linux/slab.h>
+
+/*
+ * The MSP430 firmware on the DM365 EVM monitors an IR receptor used for
+ * the remote control. When any key is pressed, or its autorepeat kicks
+ * in, an event is sent. This driver read those events from the small
+ * event queue and reports them.
+ *
+ * Compared to the DM355 EVM: the MSP firmware does *only* IR. So this
+ * driver is simpler, and doesn't even need to use the MFD model.
+ *
+ * Note that physically there can only be one of these devices.
+ *
+ * This driver was tested with firmware revision 0xA1 (beta board).
+ */
+struct dm365evm_keys {
+ struct input_dev *input;
+ struct i2c_client *i2c;
+};
+
+#define DM365EVM_MSP_FIRMREV 0
+#define DM365EVM_MSP_INPUT_LOW 1
+#define DM365EVM_MSP_INPUT_HIGH 2
+#define DM365EVM_MSP_INPUT_COUNT 3
+#define DM365EVM_MSP_0x43 4
+
+#define MSP430_GPIO 0
+
+/* These initial keycodes can be remapped by dm365evm_setkeycode(). */
+static struct {
+ u16 event;
+ u16 keycode;
+} dm365evm_keys[] = {
+
+ /*
+ * IR buttons ... codes assigned to match the universal remote
+ * provided with the EVM (Philips PM4S) using DVD code 0020.
+ *
+ * These event codes match firmware documentation, but other
+ * remote controls could easily send more RC5-encoded events.
+ * The PM4S manual was used in several cases to help select
+ * a keycode reflecting the intended usage.
+ *
+ * RC5 codes are 14 bits, with two start bits (0x3 prefix)
+ * and a toggle bit (masked out below).
+ */
+ { 0x300c, KEY_POWER, }, /* NOTE: docs omit this */
+ { 0x3000, KEY_NUMERIC_0, },
+ { 0x3001, KEY_NUMERIC_1, },
+ { 0x3002, KEY_NUMERIC_2, },
+ { 0x3003, KEY_NUMERIC_3, },
+ { 0x3004, KEY_NUMERIC_4, },
+ { 0x3005, KEY_NUMERIC_5, },
+ { 0x3006, KEY_NUMERIC_6, },
+ { 0x3007, KEY_NUMERIC_7, },
+ { 0x3008, KEY_NUMERIC_8, },
+ { 0x3009, KEY_NUMERIC_9, },
+ { 0x3022, KEY_ENTER, },
+ { 0x30ec, KEY_MODE, }, /* "tv/vcr/..." */
+ { 0x300f, KEY_SELECT, }, /* "info" */
+ { 0x3020, KEY_CHANNELUP, }, /* "up" */
+ { 0x302e, KEY_MENU, }, /* "in/out" */
+ { 0x3011, KEY_VOLUMEDOWN, }, /* "left" */
+ { 0x300d, KEY_MUTE, }, /* "ok" */
+ { 0x3010, KEY_VOLUMEUP, }, /* "right" */
+ { 0x301e, KEY_SUBTITLE, }, /* "cc" */
+ { 0x3021, KEY_CHANNELDOWN, }, /* "down" */
+ { 0x3022, KEY_PREVIOUS, },
+ { 0x3026, KEY_SLEEP, },
+ { 0x3172, KEY_REWIND, },
+ { 0x3175, KEY_PLAY, },
+ { 0x3174, KEY_FASTFORWARD, },
+ { 0x3177, KEY_RECORD, },
+ { 0x3176, KEY_STOP, },
+ { 0x3169, KEY_PAUSE, },
+
+ /* NOTE: SW22, a pushbutton next to the IR sensor, is also
+ * wired to the MSP430 but is currently ignored; some other
+ * I/O pins are likewise wired but ignored.
+ */
+};
+
+static irqreturn_t dm365evm_keys_irq(int irq, void *_keys)
+{
+ struct dm365evm_keys *keys = _keys;
+
+ /* For simplicity we ignore INPUT_COUNT and just read
+ * events until the GPIO stops signaling data ready.
+ */
+ while (gpio_get_value(MSP430_GPIO) == 0) {
+ static u16 last_event;
+ u16 event;
+ int keycode;
+ int i;
+
+ /* Read low, then high bytes; reading the high byte
+ * removes an entry from the input buffer.
+ */
+ event = i2c_smbus_read_word_data(keys->i2c,
+ DM365EVM_MSP_INPUT_LOW);
+ if (event < 0) {
+ dev_dbg(&keys->i2c->dev, "input err %d\n", event);
+ break;
+ }
+ event = event;
+
+ /* Press and release a button: two events, same code.
+ * Press and hold (autorepeat), then release: N events
+ * (N > 2), same code. For RC5 buttons the toggle bits
+ * distinguish (for example) "1-autorepeat" from "1 1";
+ * but PCB buttons don't support that bit.
+ *
+ * So we must synthesize release events. We do that by
+ * mapping events to a press/release event pair; then
+ * to avoid adding extra events, skip the second event
+ * of each pair.
+ */
+ if (event == last_event) {
+ last_event = 0;
+ continue;
+ }
+ last_event = event;
+
+ /* ignore the RC5 toggle bit */
+ event &= ~0x0800;
+
+ /* find the key, or leave it as unknown */
+ keycode = KEY_UNKNOWN;
+ for (i = 0; i < ARRAY_SIZE(dm365evm_keys); i++) {
+ if (dm365evm_keys[i].event != event)
+ continue;
+ keycode = dm365evm_keys[i].keycode;
+ break;
+ }
+ dev_dbg(&keys->i2c->dev,
+ "input event 0x%04x--> keycode %d\n",
+ event, keycode);
+
+ /* report press + release */
+ input_report_key(keys->input, keycode, 1);
+ input_sync(keys->input);
+ input_report_key(keys->input, keycode, 0);
+ input_sync(keys->input);
+ }
+ return IRQ_HANDLED;
+}
+
+/*
+ * Since we talk to the MSP using I2C, we need to delegate all real
+ * IRQ handling work to some task context. We'll use an IRQ thread.
+ */
+static irqreturn_t dm365evm_keys_hardirq(int irq, void *_keys)
+{
+ return IRQ_WAKE_THREAD;
+}
+
+static int dm365evm_setkeycode(struct input_dev *dev, int index, int keycode)
+{
+ u16 old_keycode;
+ unsigned i;
+
+ if (((unsigned)index) >= ARRAY_SIZE(dm365evm_keys))
+ return -EINVAL;
+
+ old_keycode = dm365evm_keys[index].keycode;
+ dm365evm_keys[index].keycode = keycode;
+ set_bit(keycode, dev->keybit);
+
+ for (i = 0; i < ARRAY_SIZE(dm365evm_keys); i++) {
+ if (dm365evm_keys[index].keycode == old_keycode)
+ goto done;
+ }
+ clear_bit(old_keycode, dev->keybit);
+done:
+ return 0;
+}
+
+static int dm365evm_getkeycode(struct input_dev *dev, int index, int *keycode)
+{
+ if (((unsigned)index) >= ARRAY_SIZE(dm365evm_keys))
+ return -EINVAL;
+
+ return dm365evm_keys[index].keycode;
+}
+
+/*----------------------------------------------------------------------*/
+
+static int __devinit
+dm365evm_keys_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+{
+ struct dm365evm_keys *keys;
+ struct input_dev *input;
+ int status;
+ int i;
+
+ status = gpio_request(MSP430_GPIO, id->name);
+ if (status < 0)
+ return status;
+
+ status = gpio_direction_input(MSP430_GPIO);
+ if (status < 0) {
+ gpio_free(MSP430_GPIO);
+ return status;
+ }
+
+ /* allocate instance struct and input dev */
+ keys = kzalloc(sizeof *keys, GFP_KERNEL);
+ input = input_allocate_device();
+ if (!keys || !input) {
+ status = -ENOMEM;
+ goto fail1;
+ }
+
+ keys->i2c = i2c;
+ keys->input = input;
+
+ input_set_drvdata(input, keys);
+
+ input->name = "DM365 EVM Controls";
+ input->phys = "dm365evm/input0";
+ input->dev.parent = &i2c->dev;
+
+ input->id.bustype = BUS_I2C;
+ input->id.product = 0x0365;
+ input->id.version = i2c_smbus_read_byte_data(i2c,
+ DM365EVM_MSP_FIRMREV);
+
+ input->evbit[0] = BIT(EV_KEY);
+ for (i = 0; i < ARRAY_SIZE(dm365evm_keys); i++)
+ __set_bit(dm365evm_keys[i].keycode, input->keybit);
+
+ input->setkeycode = dm365evm_setkeycode;
+ input->getkeycode = dm365evm_getkeycode;
+
+ /* FIXME: flush the event queue */
+
+ status = request_threaded_irq(gpio_to_irq(MSP430_GPIO),
+ dm365evm_keys_hardirq, dm365evm_keys_irq,
+ IRQF_TRIGGER_FALLING,
+ id->name, keys);
+ if (status < 0)
+ goto fail1;
+
+ /* register */
+ status = input_register_device(input);
+ if (status < 0)
+ goto fail2;
+
+ i2c_set_clientdata(i2c, keys);
+
+ return 0;
+
+fail2:
+ free_irq(gpio_to_irq(MSP430_GPIO), keys);
+fail1:
+ input_free_device(input);
+ kfree(keys);
+ gpio_free(MSP430_GPIO);
+ dev_err(&i2c->dev, "can't register, err %d\n", status);
+
+ return status;
+}
+
+static int __devexit dm365evm_keys_remove(struct i2c_client *i2c)
+{
+ struct dm365evm_keys *keys = i2c_get_clientdata(i2c);
+
+ free_irq(gpio_to_irq(MSP430_GPIO), keys);
+ input_unregister_device(keys->input);
+ kfree(keys);
+
+ gpio_free(MSP430_GPIO);
+
+ return 0;
+}
+
+/* REVISIT: add suspend/resume when DaVinci supports it. The IRQ should
+ * be able to wake up the system. When device_may_wakeup(&i2c->dev), call
+ * enable_irq_wake() on suspend, and disable_irq_wake() on resume.
+ */
+
+static const struct i2c_device_id ids[] = {
+ { .name = "dm365evm_keys", },
+ { },
+};
+MODULE_DEVICE_TABLE(i2c, ids);
+
+static struct i2c_driver dm365evm_keys_driver = {
+ .driver.name = "dm365evm_keys",
+ .id_table = ids,
+ .probe = dm365evm_keys_probe,
+ .remove = __devexit_p(dm365evm_keys_remove),
+};
+
+static int __init dm365evm_keys_init(void)
+{
+ return i2c_add_driver(&dm365evm_keys_driver);
+}
+module_init(dm365evm_keys_init);
+
+static void __exit dm365evm_keys_exit(void)
+{
+ i2c_del_driver(&dm365evm_keys_driver);
+}
+module_exit(dm365evm_keys_exit);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index 0bfd8cf2..1daa9791 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -359,7 +359,7 @@ static int wacom_intuos_inout(struct wacom_wac *wacom)
case 0x802: /* Intuos4 General Pen */
case 0x804: /* Intuos4 Marker Pen */
case 0x40802: /* Intuos4 Classic Pen */
- case 0x18802: /* DTH2242 Grip Pen */
+ case 0x18803: /* DTH2242 Grip Pen */
case 0x022:
wacom->tool[idx] = BTN_TOOL_PEN;
break;
@@ -1912,7 +1912,7 @@ static const struct wacom_features wacom_features_0xBB =
{ "Wacom Intuos4 12x19", WACOM_PKGLEN_INTUOS, 97536, 60960, 2047,
63, INTUOS4L, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
static const struct wacom_features wacom_features_0xBC =
- { "Wacom Intuos4 WL", WACOM_PKGLEN_INTUOS, 40640, 25400, 2047,
+ { "Wacom Intuos4 WL", WACOM_PKGLEN_INTUOS, 40840, 25400, 2047,
63, INTUOS4, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
static const struct wacom_features wacom_features_0x26 =
{ "Wacom Intuos5 touch S", WACOM_PKGLEN_INTUOS, 31496, 19685, 2047,
@@ -2144,7 +2144,7 @@ const struct usb_device_id wacom_ids[] = {
{ USB_DEVICE_WACOM(0x44) },
{ USB_DEVICE_WACOM(0x45) },
{ USB_DEVICE_WACOM(0x59) },
- { USB_DEVICE_DETAILED(0x5D, USB_CLASS_HID, 0, 0) },
+ { USB_DEVICE_WACOM(0x5D) },
{ USB_DEVICE_WACOM(0xB0) },
{ USB_DEVICE_WACOM(0xB1) },
{ USB_DEVICE_WACOM(0xB2) },
@@ -2209,7 +2209,7 @@ const struct usb_device_id wacom_ids[] = {
{ USB_DEVICE_WACOM(0x47) },
{ USB_DEVICE_WACOM(0xF4) },
{ USB_DEVICE_WACOM(0xF8) },
- { USB_DEVICE_DETAILED(0xF6, USB_CLASS_HID, 0, 0) },
+ { USB_DEVICE_WACOM(0xF6) },
{ USB_DEVICE_WACOM(0xFA) },
{ USB_DEVICE_LENOVO(0x6004) },
{ }
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index fc6aebf1..a32e0d5a 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -236,8 +236,7 @@ static int gic_retrigger(struct irq_data *d)
if (gic_arch_extn.irq_retrigger)
return gic_arch_extn.irq_retrigger(d);
- /* the genirq layer expects 0 if we can't retrigger in hardware */
- return 0;
+ return -ENXIO;
}
#ifdef CONFIG_SMP
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 9a0bdad9..7e469260 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -611,7 +611,6 @@ static void dec_pending(struct dm_io *io, int error)
queue_io(md, bio);
} else {
/* done with normal IO or empty flush */
- trace_block_bio_complete(md->queue, bio, io_error);
bio_endio(bio, io_error);
}
}
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index f4e87bfc..24909eb1 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -184,8 +184,6 @@ static void return_io(struct bio *return_bi)
return_bi = bi->bi_next;
bi->bi_next = NULL;
bi->bi_size = 0;
- trace_block_bio_complete(bdev_get_queue(bi->bi_bdev),
- bi, 0);
bio_endio(bi, 0);
bi = return_bi;
}
@@ -3916,8 +3914,6 @@ static void raid5_align_endio(struct bio *bi, int error)
rdev_dec_pending(rdev, conf->mddev);
if (!error && uptodate) {
- trace_block_bio_complete(bdev_get_queue(raid_bi->bi_bdev),
- raid_bi, 0);
bio_endio(raid_bi, 0);
if (atomic_dec_and_test(&conf->active_aligned_reads))
wake_up(&conf->wait_for_stripe);
@@ -4386,8 +4382,6 @@ static void make_request(struct mddev *mddev, struct bio * bi)
if ( rw == WRITE )
md_write_end(mddev);
- trace_block_bio_complete(bdev_get_queue(bi->bi_bdev),
- bi, 0);
bio_endio(bi, 0);
}
}
@@ -4764,11 +4758,8 @@ static int retry_aligned_read(struct r5conf *conf, struct bio *raid_bio)
handled++;
}
remaining = raid5_dec_bi_active_stripes(raid_bio);
- if (remaining == 0) {
- trace_block_bio_complete(bdev_get_queue(raid_bio->bi_bdev),
- raid_bio, 0);
+ if (remaining == 0)
bio_endio(raid_bio, 0);
- }
if (atomic_dec_and_test(&conf->active_aligned_reads))
wake_up(&conf->wait_for_stripe);
return handled;
diff --git a/drivers/media/Makefile b/drivers/media/Makefile
index 620f275a..f3ab0fcb 100644
--- a/drivers/media/Makefile
+++ b/drivers/media/Makefile
@@ -11,12 +11,7 @@ media-objs := media-device.o media-devnode.o media-entity.o
obj-y += i2c/ tuners/
obj-$(CONFIG_DVB_CORE) += dvb-frontends/
-#
-# Now, let's link-in the media core
-#
-ifeq ($(CONFIG_MEDIA_CONTROLLER),y)
- obj-$(CONFIG_MEDIA_SUPPORT) += media.o
-endif
+
obj-$(CONFIG_VIDEO_DEV) += v4l2-core/
obj-$(CONFIG_DVB_CORE) += dvb-core/
diff --git a/drivers/media/dvb-frontends/mb86a20s.c b/drivers/media/dvb-frontends/mb86a20s.c
index 4faaf805..f19cd736 100644
--- a/drivers/media/dvb-frontends/mb86a20s.c
+++ b/drivers/media/dvb-frontends/mb86a20s.c
@@ -610,7 +610,7 @@ static void mb86a20s_layer_bitrate(struct dvb_frontend *fe, u32 layer,
__func__, 'A' + layer, segment * isdbt_rate[m][f][i]/1000,
rate, rate);
- state->estimated_rate[layer] = rate;
+ state->estimated_rate[i] = rate;
}
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 7b771baa..06ac1a30 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -431,6 +431,14 @@ config VIDEO_MT9P031
This is a Video4Linux2 sensor-level driver for the Aptina
(Micron) mt9p031 5 Mpixel camera.
+config VIDEO_OV2643
+ tristate "Omnivision OV2643 support"
+ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+ depends on MEDIA_CAMERA_SUPPORT
+ ---help---
+ This is a Video4Linux2 sensor-level driver for the
+ Omnivision ov2643 camera.
+
config VIDEO_MT9T001
tristate "Aptina MT9T001 support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index cfefd30c..e1873015 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o
obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o
+obj-$(CONFIG_VIDEO_OV2643) += ov2643_v2r.o
obj-$(CONFIG_VIDEO_MT9T001) += mt9t001.o
obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o
obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o
diff --git a/drivers/media/i2c/mt2643.c b/drivers/media/i2c/mt2643.c
new file mode 100644
index 00000000..fd49ad93
--- /dev/null
+++ b/drivers/media/i2c/mt2643.c
@@ -0,0 +1,619 @@
+/*
+ * Driver for MT9P031 CMOS Image Sensor from Micron, for TI Davinci platform
+ *
+ * Copyright (C) 2008, Guennadi Liakhovetski,
+ * DENX Software Engineering <lg@denx.de>
+ *
+ * Heavily based on MT9T031 driver from Guennadi Liakhovetski
+ * made changes to support TI Davinci platform
+ * Copyright (C) 2010, Leopard Imaging, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/videodev2.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/log2.h>
+#include <linux/delay.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/davinci/videohd.h>
+
+/* mt9p031 i2c address 0x5d
+ * The platform has to define i2c_board_info
+ * and call i2c_register_board_info() */
+
+/* mt9p031 selected register addresses */
+#define MT9P031_CHIP_VERSION 0x00
+#define MT9P031_ROW_START 0x01
+#define MT9P031_COLUMN_START 0x02
+#define MT9P031_WINDOW_HEIGHT 0x03
+#define MT9P031_WINDOW_WIDTH 0x04
+#define MT9P031_HORIZONTAL_BLANKING 0x05
+#define MT9P031_VERTICAL_BLANKING 0x06
+#define MT9P031_OUTPUT_CONTROL 0x07
+#define MT9P031_SHUTTER_WIDTH_UPPER 0x08
+#define MT9P031_SHUTTER_WIDTH 0x09
+#define MT9P031_PIXEL_CLOCK_CONTROL 0x0a
+#define MT9P031_FRAME_RESTART 0x0b
+#define MT9P031_SHUTTER_DELAY 0x0c
+#define MT9P031_RESET 0x0d
+#define MT9P031_READ_MODE_1 0x1e
+#define MT9P031_READ_MODE_2 0x20
+#define MT9P031_READ_MODE_3 0x21
+#define MT9P031_ROW_ADDRESS_MODE 0x22
+#define MT9P031_COLUMN_ADDRESS_MODE 0x23
+#define MT9P031_GLOBAL_GAIN 0x35
+#define MT9P031_CHIP_ENABLE 0xF8
+
+#define MT9P031_MAX_HEIGHT 1536
+#define MT9P031_MAX_WIDTH 2048
+#define MT9P031_MIN_HEIGHT 2
+#define MT9P031_MIN_WIDTH 2
+#define MT9P031_HORIZONTAL_BLANK 0
+#define MT9P031_VERTICAL_BLANK 0
+#define MT9P031_COLUMN_SKIP 32
+#define MT9P031_ROW_SKIP 20
+#define MT9P031_DEFAULT_WIDTH 1920
+#define MT9P031_DEFAULT_HEIGHT 1080
+
+#define V4L2_STD_MT9P031_STD_ALL (V4L2_STD_720P_30)
+
+#define MT9P031_BUS_PARAM (SOCAM_PCLK_SAMPLE_RISING | \
+ SOCAM_PCLK_SAMPLE_FALLING | SOCAM_HSYNC_ACTIVE_HIGH | \
+ SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH | \
+ SOCAM_MASTER | SOCAM_DATAWIDTH_10)
+
+v4l2_std_id mt9p031_cur_std = V4L2_STD_720P_30;
+/* Debug functions */
+static int debug;
+module_param(debug, bool, 0644);
+MODULE_PARM_DESC(debug, "Debug level (0-1)");
+
+static const struct v4l2_fmtdesc mt9p031_formats[] = {
+ {
+ .index = 0,
+ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
+ .description = "Bayer (sRGB) 10 bit",
+ .pixelformat = V4L2_PIX_FMT_SGRBG10,
+ },
+};
+static const unsigned int mt9p031_num_formats = ARRAY_SIZE(mt9p031_formats);
+
+static const struct v4l2_queryctrl mt9p031_controls[] = {
+ {
+ .id = V4L2_CID_VFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Vertically",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ }, {
+ .id = V4L2_CID_HFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Horizontally",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ }
+};
+static const unsigned int mt9p031_num_controls = ARRAY_SIZE(mt9p031_controls);
+
+struct mt9p031 {
+ struct v4l2_subdev sd;
+ int model; /* V4L2_IDENT_MT9P031* codes from v4l2-chip-ident.h */
+ unsigned char autoexposure;
+ u16 xskip;
+ u16 yskip;
+ u32 width;
+ u32 height;
+ unsigned short x_min; /* Camera capabilities */
+ unsigned short y_min;
+ unsigned short x_current; /* Current window location */
+ unsigned short y_current;
+ unsigned short width_min;
+ unsigned short width_max;
+ unsigned short height_min;
+ unsigned short height_max;
+ unsigned short y_skip_top; /* Lines to skip at the top */
+ unsigned short gain;
+ unsigned short exposure;
+};
+
+static inline struct mt9p031 *to_mt9p031(struct v4l2_subdev *sd)
+{
+ return container_of(sd, struct mt9p031, sd);
+}
+static int reg_read(struct i2c_client *client, const u8 reg)
+{
+ s32 data;
+ data = i2c_smbus_read_byte_data(client, reg);
+ printk("\nREAD CAMERA I2C address=0x%x, register=0x%x, res=0x%x\n", client->addr, reg, data);
+ return data;
+}
+
+static int reg_write(struct i2c_client *client, const u8 reg,
+ const u8 data)
+{
+ int ret;
+ //ret = reg_read(client, reg);
+ //printk("\n***Register:0x%x actualvalue:0x%x, Value to be write:0x%x",reg,ret,data);
+ printk("\nWRITE CAMERA I2C address=0x%x, register=0x%x, res=0x%x\n", client->addr, reg, data);
+ ret = i2c_smbus_write_byte_data(client, reg, data);
+ if (reg == 0x12) msleep(5);
+ return ret;
+}
+
+
+struct regval_list {
+ unsigned char reg_num;
+ unsigned char value;
+};
+static struct regval_list ov9710_default_regs[] =
+{
+ { 0x12, 0x80 },
+ { 0xc3, 0x1f },
+ { 0xc4, 0xff },
+ { 0x3d, 0x08 },
+ { 0xdd, 0xa5 },
+ { 0x0e, 0xb4 },
+ { 0x10, 0x0a },
+ { 0x11, 0x00 },
+ { 0x0f, 0x14 },
+ { 0x20, 0x01 },
+ { 0x21, 0x25 },
+ { 0x22, 0x00 },
+ { 0x23, 0x0c },
+ { 0x24, 0x50 },
+ { 0x26, 0x2d },
+ { 0x27, 0x04 },
+ { 0x29, 0x06 },
+ { 0x2a, 0x40 },
+ { 0x2b, 0x02 },
+ { 0x2c, 0xee },
+ { 0x1d, 0x04 },
+ { 0x25, 0x04 },
+ { 0x27, 0x04 },
+ { 0x28, 0x40 },
+ { 0x12, 0x40 },
+ { 0x39, 0x10 },
+ { 0xcd, 0x12 },
+ { 0x13, 0xff },
+ { 0x14, 0xa7 },
+ { 0x15, 0x42 },
+ { 0x3c, 0xa4 },
+ { 0x18, 0x60 },
+ { 0x19, 0x50 },
+ { 0x1a, 0xe2 },
+ { 0x37, 0xe8 },
+ { 0x16, 0x90 },
+ { 0x43, 0x00 },
+ { 0x40, 0xfb },
+ { 0xa9, 0x44 },
+ { 0x2f, 0xec },
+ { 0x35, 0x10 },
+ { 0x36, 0x10 },
+ { 0x0c, 0x00 },
+ { 0x0d, 0x00 },
+ { 0xd0, 0x93 },
+ { 0xdc, 0x2b },
+ { 0xd9, 0x41 },
+ { 0xd3, 0x02 },
+ { 0x3d, 0x08 },
+ { 0x0c, 0x00 },
+ { 0x18, 0x2c },
+ { 0x19, 0x24 },
+ { 0x1a, 0x71 },
+ { 0x9b, 0x69 },
+ { 0x9c, 0x7d },
+ { 0x9d, 0x7d },
+ { 0x9e, 0x69 },
+ { 0x35, 0x04 },
+ { 0x36, 0x04 },
+ { 0x65, 0x12 },
+ { 0x66, 0x20 },
+ { 0x67, 0x39 },
+ { 0x68, 0x4e },
+ { 0x69, 0x62 },
+ { 0x6a, 0x74 },
+ { 0x6b, 0x85 },
+ { 0x6c, 0x92 },
+ { 0x6d, 0x9e },
+ //{ 0xff, 0xff },
+ { 0x6e, 0xb2 },
+ { 0x6f, 0xc0 },
+ { 0x70, 0xcc },
+ { 0x71, 0xe0 },
+ { 0x72, 0xee },
+ { 0x73, 0xf6 },
+ { 0x74, 0x11 },
+ { 0xab, 0x20 },
+ { 0xac, 0x5b },
+ { 0xad, 0x05 },
+ { 0xae, 0x1b },
+ { 0xaf, 0x76 },
+ { 0xb0, 0x90 },
+ { 0xb1, 0x90 },
+ { 0xb2, 0x8c },
+ { 0xb3, 0x04 },
+ { 0xb4, 0x98 },
+ { 0x4c, 0x03 },
+ { 0x4d, 0x30 },
+ { 0x4e, 0x02 },
+ { 0x4f, 0x5c },
+ { 0x50, 0x56 },
+ { 0x51, 0x00 },
+ { 0x52, 0x66 },
+ { 0x53, 0x03 },
+ { 0x54, 0x30 },
+ { 0x55, 0x02 },
+ { 0x56, 0x5c },
+ { 0x57, 0x40 },
+ { 0x58, 0x00 },
+ { 0x59, 0x66 },
+ { 0x5a, 0x03 },
+ { 0x5b, 0x20 },
+ { 0x5c, 0x02 },
+ { 0x5d, 0x5c },
+ { 0x5e, 0x3a },
+ { 0x5f, 0x00 },
+ { 0x60, 0x66 },
+ { 0x41, 0x1f },
+ { 0xb5, 0x01 },
+ { 0xb6, 0x02 },
+ { 0xb9, 0x40 },
+ { 0xba, 0x28 },
+ { 0xbf, 0x0c },
+ { 0xc0, 0x3e },
+ { 0xa3, 0x0a },
+ { 0xa4, 0x0f },
+ { 0xa5, 0x09 },
+ { 0xa6, 0x16 },
+ { 0x9f, 0x0a },
+ { 0xa0, 0x0f },
+ { 0xa7, 0x0a },
+ { 0xa8, 0x0f },
+ { 0xa1, 0x10 },
+ { 0xa2, 0x04 },
+ { 0xa9, 0x04 },
+ { 0xaa, 0xa6 },
+ { 0x75, 0x6a },
+ { 0x76, 0x11 },
+ { 0x77, 0x92 },
+ { 0x78, 0x21 },
+ { 0x79, 0xe1 },
+ { 0x7a, 0x02 },
+ { 0x7c, 0x05 },
+ { 0x7d, 0x08 },
+ { 0x7e, 0x08 },
+ { 0x7f, 0x7c },
+ { 0x80, 0x58 },
+ { 0x81, 0x2a },
+ { 0x82, 0xc5 },
+ { 0x83, 0x46 },
+ { 0x84, 0x3a },
+ { 0x85, 0x54 },
+ { 0x86, 0x44 },
+ { 0x87, 0xf8 },
+ { 0x88, 0x08 },
+ { 0x89, 0x70 },
+ { 0x8a, 0xf0 },
+ { 0x8b, 0xf0 },
+ { 0x90, 0xe3 },
+ { 0x93, 0x10 },
+ { 0x94, 0x20 },
+ { 0x95, 0x10 },
+ { 0x96, 0x18 },
+ { 0xff, 0xff }, /* END MARKER */
+};
+static int ov9710_write_array(struct v4l2_subdev *sd, struct regval_list *vals)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ while (vals->reg_num != 0xff || vals->value != 0xff) {
+ int ret = reg_write(client, vals->reg_num, vals->value);
+ if (ret < 0)
+ return ret;
+ vals++;
+ }
+ return 0;
+}
+static int mt9p031_init(struct v4l2_subdev *sd, u32 val)
+{
+ return ov9710_write_array(sd, ov9710_default_regs);
+}
+
+
+static int mt9p031_s_stream(struct v4l2_subdev *sd, int enable)
+{
+ return 0;
+}
+
+
+const struct v4l2_queryctrl *mt9p031_find_qctrl(u32 id)
+{
+ int i;
+
+ for (i = 0; i < mt9p031_num_controls; i++) {
+ if (mt9p031_controls[i].id == id)
+ return &mt9p031_controls[i];
+ }
+ return NULL;
+}
+
+static int mt9p031_set_params(struct v4l2_subdev *sd,
+ struct v4l2_rect *rect, u16 xskip, u16 yskip)
+{
+ return 0;
+}
+
+static int mt9p031_get_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+{
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+
+ pix->width = 1280;
+ pix->height = 720;
+ pix->pixelformat = V4L2_PIX_FMT_SGRBG10;
+ pix->field = V4L2_FIELD_NONE;
+ pix->colorspace = V4L2_COLORSPACE_SRGB;
+ return 0;
+}
+static int mt9p031_set_fmt(struct v4l2_subdev *sd,
+ struct v4l2_format *f)
+{
+ return 0;
+}
+
+static int mt9p031_try_fmt(struct v4l2_subdev *sd,
+ struct v4l2_format *f)
+{
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+
+ if (pix->height < 0)
+ pix->height = 0;
+ if (pix->height > 720)
+ pix->height = 720;
+ if (pix->width < 0)
+ pix->width = 0;
+ if (pix->width > 1280)
+ pix->width = 1280;
+ pix->width &= ~0x01; /* has to be even */
+ pix->height &= ~0x01; /* has to be even */
+ return 0;
+}
+
+static int mt9p031_get_chip_id(struct v4l2_subdev *sd,
+ struct v4l2_dbg_chip_ident *id)
+{
+ struct mt9p031 *mt9p031 = to_mt9p031(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);;
+
+ if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
+ return -EINVAL;
+
+ if (id->match.addr != client->addr)
+ return -ENODEV;
+
+ id->ident = mt9p031->model;
+ id->revision = 0;
+
+ return 0;
+}
+
+
+
+static int mt9p031_get_control(struct v4l2_subdev *, struct v4l2_control *);
+static int mt9p031_set_control(struct v4l2_subdev *, struct v4l2_control *);
+static int mt9p031_queryctrl(struct v4l2_subdev *, struct v4l2_queryctrl *);
+static int mt9p031_querystd(struct v4l2_subdev *sd, v4l2_std_id *id);
+static int mt9p031_set_standard(struct v4l2_subdev *sd, v4l2_std_id id);
+
+static const struct v4l2_subdev_core_ops mt9p031_core_ops = {
+ .g_chip_ident = mt9p031_get_chip_id,
+ .init = mt9p031_init,
+ .queryctrl = mt9p031_queryctrl,
+ .g_ctrl = mt9p031_get_control,
+ .s_ctrl = mt9p031_set_control,
+ .s_std = mt9p031_set_standard,
+};
+
+static const struct v4l2_subdev_video_ops mt9p031_video_ops = {
+ .s_fmt = mt9p031_set_fmt,
+ .g_fmt = mt9p031_get_fmt,
+ .try_fmt = mt9p031_try_fmt,
+ .querystd = mt9p031_querystd,
+ .s_stream = mt9p031_s_stream,
+};
+
+static const struct v4l2_subdev_ops mt9p031_ops = {
+ .core = &mt9p031_core_ops,
+ .video = &mt9p031_video_ops,
+};
+
+static int mt9p031_queryctrl(struct v4l2_subdev *sd,
+ struct v4l2_queryctrl *qctrl)
+{
+ const struct v4l2_queryctrl *temp_qctrl;
+
+ temp_qctrl = mt9p031_find_qctrl(qctrl->id);
+ if (!temp_qctrl) {
+ v4l2_err(sd, "control id %d not supported", qctrl->id);
+ return -EINVAL;
+ }
+ memcpy(qctrl, temp_qctrl, sizeof(*qctrl));
+ return 0;
+}
+
+static int mt9p031_get_control(struct v4l2_subdev *sd,
+ struct v4l2_control *ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct mt9p031 *mt9p031 = to_mt9p031(sd);
+ int data;
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ ctrl->value = false;
+ break;
+ case V4L2_CID_HFLIP:
+ ctrl->value = false;
+ break;
+ };
+ return 0;
+}
+
+static int mt9p031_set_control(struct v4l2_subdev *sd,
+ struct v4l2_control *ctrl)
+{
+
+ return 0;
+}
+
+/* Function querystd not supported by mt9p031 */
+static int mt9p031_querystd(struct v4l2_subdev *sd, v4l2_std_id *id)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct mt9p031 *mt9p031 = to_mt9p031(sd);
+
+ *id = V4L2_STD_MT9P031_STD_ALL;
+
+ return 0;
+}
+
+/* Function set not supported by mt9p031 */
+static int mt9p031_set_standard(struct v4l2_subdev *sd, v4l2_std_id id)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct mt9p031 *mt9p031 = to_mt9p031(sd);
+
+ mt9p031_cur_std = id;
+
+ return 0;
+}
+#define REG_MIDH 0x1c
+#define REG_MIDL 0x1d
+#define REG_PIDH 0x0a
+#define REG_PIDL 0x0b
+/* Interface active, can use i2c. If it fails, it can indeed mean, that
+ * this wasn't our capture interface, so, we wait for the right one */
+static int mt9p031_detect(struct i2c_client *client, int *model)
+{
+ unsigned char v;
+ //v = reg_read(client, REG_MIDH);
+ //printk("\n***Detect:0x%x\n",v);
+ //if (v != 0x7F) return -ENODEV;
+ //v = reg_read(client, REG_MIDL);
+ //printk("\n***Detect:0x%x\n",v);
+ //if (v != 0xA2) return -ENODEV;
+ /*
+ * OK, we know we have an OmniVision chip...but which one?
+ */
+ v = reg_read(client, REG_PIDH);
+ printk("\n***Detect:0x%x\n",v);
+ if (v != 0x26) return -ENODEV;;
+ v = reg_read(client, REG_PIDL);
+ printk("\n***Detect:0x%x\n",v);
+ if (v != 0x43) return -ENODEV;
+ printk("\nOVM2643 successfully detected\n");
+ *model = V4L2_IDENT_MT9P031;
+ dev_info(&client->dev, "Detected a ov9710 chip ID\n");
+ return 0;
+}
+
+static int mt9p031_probe(struct i2c_client *client,
+ const struct i2c_device_id *did)
+{
+ struct mt9p031 *mt9p031;
+ struct v4l2_subdev *sd;
+ int pclk_pol;
+ int ret;
+
+ if (!client->dev.platform_data) {
+ dev_err(&client->dev, "No platform data!!\n");
+ return -ENODEV;
+ }
+
+ pclk_pol = (int)client->dev.platform_data;
+
+ mt9p031 = kzalloc(sizeof(struct mt9p031), GFP_KERNEL);
+ if (!mt9p031)
+ return -ENOMEM;
+
+ ret = mt9p031_detect(client, &mt9p031->model);
+ if (ret)
+ goto clean;
+
+ mt9p031->x_min = 0;
+ mt9p031->y_min = 0;
+ mt9p031->width = 1280;
+ mt9p031->height = 720;
+ mt9p031->x_current = 0;
+ mt9p031->y_current = 0;
+ mt9p031->width_min = 1280;
+ mt9p031->width_max = 1280;
+ mt9p031->height_min = 720;
+ mt9p031->height_max = 720;
+ mt9p031->y_skip_top = 10; //Originally it had 10, minimun value(6)which works
+ mt9p031->autoexposure = 1;
+ mt9p031->xskip = 1;
+ mt9p031->yskip = 1;
+
+ /* Register with V4L2 layer as slave device */
+ sd = &mt9p031->sd;
+ v4l2_i2c_subdev_init(sd, client, &mt9p031_ops);
+
+ ret = mt9p031_init(sd,1);
+ v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
+ return 0;
+
+clean:
+ kfree(mt9p031);
+ return ret;
+}
+static int mt9p031_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct mt9p031 *mt9p031 = to_mt9p031(sd);
+
+ v4l2_device_unregister_subdev(sd);
+
+ kfree(mt9p031);
+ return 0;
+}
+
+static const struct i2c_device_id mt9p031_id[] = {
+ { "mt9p031", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, mt9p031_id);
+
+static struct i2c_driver mt9p031_i2c_driver = {
+ .driver = {
+ .name = "mt9p031",
+ },
+ .probe = mt9p031_probe,
+ .remove = mt9p031_remove,
+ .id_table = mt9p031_id,
+};
+
+static int __init mt9p031_mod_init(void)
+{
+ return i2c_add_driver(&mt9p031_i2c_driver);
+}
+
+static void __exit mt9p031_mod_exit(void)
+{
+ i2c_del_driver(&mt9p031_i2c_driver);
+}
+
+module_init(mt9p031_mod_init);
+module_exit(mt9p031_mod_exit);
+
+MODULE_DESCRIPTION("Micron MT9P031 Camera driver");
+MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/i2c/ov2643_v2r.c b/drivers/media/i2c/ov2643_v2r.c
new file mode 100644
index 00000000..340e66e5
--- /dev/null
+++ b/drivers/media/i2c/ov2643_v2r.c
@@ -0,0 +1,894 @@
+/***************************************************************************
+ *
+ * OV OV2643 CameraCube module driver
+ *
+ * Copyright (C) VIRT@REAL <info@virt2real.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/videodev2.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/log2.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/davinci/videohd.h>
+
+
+#ifdef CONFIG_V2R_DEBUG
+ #define OV2643_DEBUG
+#endif
+
+/* OV2643 has 8 I2C registers */
+#define I2C_8BIT 1
+
+
+#define OV2643_TERM_REG 0xFF
+#define OV2643_TERM_VAL 0xFF
+
+
+
+//Camera ID
+#define OV2643_PIDH_MAGIC 0x26
+#define OV2643_PIDL_MAGIC 0x43
+
+//Camear ID registers
+#define OV2643_REG_PIDH 0x0a
+#define OV2643_REG_PIDL 0x0b
+//Camera functional registers
+#define OV2643_REG_GAIN 0x00
+#define OV2643_REG_BGAIN 0x01
+#define OV2643_REG_RGAIN 0x02
+#define OV2643_REG_GGAIN 0x03
+#define OV2643_REG_COM0C 0x0c
+ #define SWAP_YUV 0x10 /* Swap Y/UV output sequence in YUV mode */
+ #define ENABLE_OUTPUTS 0x06 /* Makes output for data and clock lines*/
+#define OV2643_REG_COM0D 0x0d
+#define OV2643_REG_COM0E 0x0e
+#define OV2643_REG_AECH 0x0f
+#define OV2643_REG_AECL 0x10
+#define OV2643_CLKRC 0x11
+#define OV2643_REG_COM12 0x12
+#define OV2643_REG_COM13 0x13
+#define OV2643_REG_COM14 0x14
+#define OV2643_REG_COM15 0x15
+#define OV2643_REG_COM16 0x16
+#define OV2643_REG_HSTART 0x17
+#define OV2643_REG_HSIZE 0x18
+#define OV2643_REG_VSTART 0x19
+#define OV2643_REG_VSIZE 0x1a
+#define OV2643_REG_VSHFT 0x1b
+#define OV2643_REG_COM20 0x20
+#define OV2643_REG_AECGM 0x21
+#define OV2643_REG_COM22 0x22
+#define OV2643_REG_WPT 0x24
+#define OV2643_REG_BPT 0x25
+#define OV2643_REG_VPT 0x26
+#define OV2643_REG_COM27 0x27
+#define OV2643_REG_COM28 0x28
+#define OV2643_REG_PLL 0x29
+#define OV2643_REG_HEXHCL 0x2a
+#define OV2643_REG_HEXHCH 0x2b
+#define OV2643_REG_DM_LN 0x2c
+#define OV2643_REG_ADVFL 0x2d
+#define OV2643_REG_ADVFH 0x2e
+
+
+/* OV2643_REG_COM14 */
+#define GAIN_2x 0x00 /* 000 : 2x */
+#define GAIN_4x 0x10 /* 001 : 4x */
+#define GAIN_8x 0x20 /* 010 : 8x */
+#define GAIN_16x 0x30 /* 011 : 16x */
+#define GAIN_32x 0x40 /* 100 : 32x */
+#define GAIN_64x 0x50 /* 101 : 64x */
+#define GAIN_128x 0x60 /* 110 : 128x */
+
+
+
+/* OV2643_REG_COM12 */
+#define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */
+#define FMT_RGB565 0x04 /* 01 : RGB 565 */
+ /* Output format control */
+#define OFMT_RGB 0x02 /* 10 : RGB */
+#define OFMT_YUV 0x00 /* 00 : YUV */
+
+/*
+ * The nominal xclk input frequency of the OV2643 is 18MHz, maximum
+ * frequency is 45MHz, and minimum frequency is 6MHz.
+ */
+#define OV2643_XCLK_MIN 6000000
+#define OV2643_XCLK_NOM 24000000
+#define OV2643_XCLK_MAX 24000000
+
+/* FPS Capabilities */
+#define OV2643_DEF_FPS 30
+
+#define I2C_RETRY_COUNT 25
+
+/* HSTART */
+#define HST_VGA 0x23
+#define HST_QVGA 0x3F
+
+/* HSIZE */
+#define HSZ_VGA 0xA0
+#define HSZ_QVGA 0x50
+
+/* VSTART */
+#define VST_VGA 0x07
+#define VST_QVGA 0x03
+
+/* VSIZE */
+#define VSZ_VGA 0xF0
+#define VSZ_QVGA 0x78
+
+/* HOUTSIZE */
+#define HOSZ_VGA 0xA0
+#define HOSZ_QVGA 0x50
+
+
+//The rest values will be declared later
+#define OV2643_IMAGE_WIDTH 640
+#define OV2643_IMAGE_HEIGHT 480
+
+#define SENSOR_DETECTED 1
+#define SENSOR_NOT_DETECTED 0
+
+/**
+ * struct ov2643_reg - ov2643 register format
+ * @reg: 8bit offset to register
+ * @val: 8bit register value
+ *
+ * Define a structure for OV2643 register initialization values
+ */
+struct ov2643_reg {
+ u8 reg;
+ u8 val;
+};
+
+/**
+ * struct capture_size - image capture size information
+ * @width: image width in pixels
+ * @height: image height in pixels
+ */
+struct capture_size {
+ unsigned long width;
+ unsigned long height;
+};
+
+/*
+ * Array of image sizes supported by OV2643. These must be ordered from
+ * smallest image size to largest.
+ */
+const static struct capture_size ov2643_sizes[] = {
+ { OV2643_IMAGE_WIDTH, OV2643_IMAGE_HEIGHT }, /* VGA */
+};
+
+#define NUM_IMAGE_SIZES ARRAY_SIZE(ov2643_sizes)
+#define NUM_FORMAT_SIZES 1
+
+
+/**
+ * struct struct frame_settings - struct for storage of sensor
+ * frame settings
+ */
+struct ov2643_frame_settings {
+ u16 frame_len_lines_min;
+ u16 frame_len_lines;
+ u16 line_len_pck;
+ u16 x_addr_start;
+ u16 x_addr_end;
+ u16 y_addr_start;
+ u16 y_addr_end;
+ u16 x_output_size;
+ u16 y_output_size;
+ u16 x_even_inc;
+ u16 x_odd_inc;
+ u16 y_even_inc;
+ u16 y_odd_inc;
+ u16 v_mode_add;
+ u16 h_mode_add;
+ u16 h_add_ave;
+};
+
+/**
+ * struct struct ov2643_sensor_settings - struct for storage of
+ * sensor settings.
+ */
+struct ov2643_sensor_settings {
+ /* struct ov2643_clk_settings clk; */
+ struct ov2643_frame_settings frame;
+};
+
+/**
+ * struct struct ov2643_clock_freq - struct for storage of sensor
+ * clock frequencies
+ */
+struct ov2643_clock_freq {
+ u32 vco_clk;
+ u32 mipi_clk;
+ u32 ddr_clk;
+ u32 vt_pix_clk;
+};
+
+#define OV2643_DRIVER_NAME "ov2643"
+#define OV2643_MOD_NAME "ov2643: "
+
+/*
+ * Our nominal (default) frame rate.
+ */
+#define OV2643_FRAME_RATE 30
+
+#define COM12_RESET (1 << 7)
+
+//Some image formats will be added
+enum image_size { VGA };
+enum pixel_format { YUV };
+
+static int debug;
+module_param(debug, bool, 0644);
+MODULE_PARM_DESC(debug, "Debug level (0-1)");
+
+const static struct ov2643_reg initial_list[] = {
+ {0x12, 0x80}, //reset
+ {0xff, 0x64}, //delay 100ms
+ {0x13, 0xff},
+ //;pclk=72mhz,30fps/pclk=36mhz,15fps
+ {0xc3, 0x1f},
+ {0xc4, 0xff},
+ {0x3d, 0x48},
+ {0xdd, 0xa5},
+ //;windows setup
+ {0x20, 0x01},
+ {0x21, 0x98},
+ {0x22, 0x00},
+ {0x23, 0x06},
+ {0x24, 0x28},//;0x280=640
+ {0x25, 0x04},
+ {0x26, 0x1e},//;0x1e0=480
+ {0x27, 0x04},
+ {0x28, 0x40},
+ //;format setting
+ {0x12, 0x09},
+ {0x39, 0xd0},
+ {0xcd, 0x13},
+ {0x3d, 0x08},
+ //;frame setting
+ {0x0e, 0x10},//clock 48Mhz PCLK
+ {0x0f, 0x14},
+ {0x10, 0x0a},
+ {0x11, 0x00},
+ {0x29, 0x07},//;dummy pixels//24.75M 0x29,0x07//24M 0x29,0x07,//->ov setting
+ {0x2a, 0x93}, //24.75M 0x2a,0xd0//24M 0x2a,0x93,//->ov setting
+ {0x2b, 0x02},//;dummy lines //24.75M 0x2b,0x02//24M 0x2b,0x02,//->ov setting
+ {0x2c, 0x6a}, //24.75M 0x2c,0x6a//24M 0x2c,0x6a,//->ov setting
+ //for 25fps 0x26a*1.2=0x2e6
+ {0x1c, 0x25},//vsync width
+ {0x1d, 0x02},
+ {0x1e, 0x00},
+ {0x1f, 0xb9},
+
+ //common part except 0x3d,0xde
+ {0x14, 0x87}, //band filter bit7: 1:50Hz 0:60Hz bit4:
+ {0x15, 0x42},
+ {0x3c, 0xa4},
+ {0x18, 0x78},//set to default then set to csi_ae value to wake up quickly
+ {0x19, 0x68},//
+ {0x1a, 0x71},
+ {0x37, 0xe8},
+ {0x16, 0x90},
+ {0x43, 0x00},
+ {0x40, 0xfb},
+ {0xa9, 0x44},
+ {0x2f, 0xec},
+ {0x35, 0x10},
+ {0x36, 0x10},
+ {0x0c, 0x00},
+ {0x0d, 0x20},
+ {0xd0, 0x93},
+ {0xdc, 0x2b},
+ {0xd9, 0x41},
+ {0xd3, 0x02},
+ {0xde, 0x7c},
+ {0x3d, 0x08},
+ {0x0c, 0x00},
+ {0x9b, 0x69},
+ {0x9c, 0x7d},
+ {0x9d, 0x7d},
+ {0x9e, 0x69},
+ {0x35, 0x04},
+ {0x36, 0x04},
+ //;gamma
+ //normal ////enhanced////zqh3 ////zqh2 ////zqh1 ////reset //
+ {0x65, 0x04},//0x65,0x12,//0x65,0x04,//0x65,0x04,//0x65,0x07,//0x65,0x05,//
+ {0x66, 0x07},//0x66,0x20,//0x66,0x07,//0x66,0x07,//0x66,0x12,//0x66,0x0c,//
+ {0x67, 0x19},//0x67,0x39,//0x67,0x19,//0x67,0x19,//0x67,0x1f,//0x67,0x1c,//
+ {0x68, 0x34},//0x68,0x4e,//0x68,0x34,//0x68,0x34,//0x68,0x35,//0x68,0x2a,//
+ {0x69, 0x4a},//0x69,0x62,//0x69,0x4a,//0x69,0x4a,//0x69,0x4a,//0x69,0x39,//
+ {0x6a, 0x5a},//0x6a,0x74,//0x6a,0x5a,//0x6a,0x5a,//0x6a,0x5d,//0x6a,0x45,//
+ {0x6b, 0x67},//0x6b,0x85,//0x6b,0x67,//0x6b,0x6b,//0x6b,0x6f,//0x6b,0x52,//
+ {0x6c, 0x71},//0x6c,0x92,//0x6c,0x71,//0x6c,0x78,//0x6c,0x7d,//0x6c,0x5d,//
+ {0x6d, 0x7c},//0x6d,0x9e,//0x6d,0x7c,//0x6d,0x84,//0x6d,0x8a,//0x6d,0x68,//
+ {0x6e, 0x8c},//0x6e,0xb2,//0x6e,0x8c,//0x6e,0x98,//0x6e,0x9f,//0x6e,0x7f,//
+ {0x6f, 0x9b},//0x6f,0xc0,//0x6f,0x9b,//0x6f,0xa6,//0x6f,0xae,//0x6f,0x91,//
+ {0x70, 0xa9},//0x70,0xcc,//0x70,0xa9,//0x70,0xb2,//0x70,0xbb,//0x70,0xa5,//
+ {0x71, 0xc0},//0x71,0xe0,//0x71,0xc0,//0x71,0xc6,//0x71,0xd0,//0x71,0xc6,//
+ {0x72, 0xd5},//0x72,0xee,//0x72,0xd5,//0x72,0xd5,//0x72,0xdf,//0x72,0xde,//
+ {0x73, 0xe8},//0x73,0xf6,//0x73,0xe8,//0x73,0xe8,//0x73,0xe8,//0x73,0xef,//
+ {0x74, 0x20},//0x74,0x11,//0x74,0x20,//0x74,0x20,//0x74,0x20,//0x74,0x16,//
+ //;color matrix
+ //ttune //ov seeting //
+ {0xab, 0x20},//0xab,0x28,//
+ {0xac, 0x5b},//0xac,0x48,//
+ {0xad, 0x05},//0xad,0x10,//
+ {0xae, 0x1b},//0xae,0x18,//
+ {0xaf, 0x76},//0xaf,0x75,//
+ {0xb0, 0x90},//0xb0,0x8c,//
+ {0xb1, 0x90},//0xb1,0x8d,//
+ {0xb2, 0x8c},//0xb2,0x8c,//
+ {0xb3, 0x04},//0xb3,0x00,//
+ {0xb4, 0x98},//0xb4,0x98,//
+ {0xb5, 0x00},//0xb5,0x00,//
+ //;lens shading
+ {0x40, 0xFB},//0x40,0x08,//
+ {0x4c, 0x03},//0x4c,0x03,//
+ {0x4d, 0x30},//0x4d,0xd0,//
+ {0x4e, 0x02},//0x4e,0x02,//
+ {0x4f, 0x5c},//0x4f,0x5c,//
+ {0x50, 0x3e},//0x50,0x3e,//
+ {0x51, 0x00},//0x51,0x00,//
+ {0x52, 0x66},//0x52,0x66,//
+ {0x53, 0x03},//0x53,0x03,//
+ {0x54, 0x30},//0x54,0xd0,//
+ {0x55, 0x02},//0x55,0x02,//
+ {0x56, 0x5c},//0x56,0x5c,//
+ {0x57, 0x47},//0x57,0x47,//
+ {0x58, 0x00},//0x58,0x00,//
+ {0x59, 0x66},//0x59,0x66,//
+ {0x5a, 0x03},//0x5a,0x03,//
+ {0x5b, 0x20},//0x5b,0xd0,//
+ {0x5c, 0x02},//0x5c,0x02,//
+ {0x5d, 0x5c},//0x5d,0x5c,/
+ {0x5e, 0x3e},//0x5e,0x3e,//
+ {0x5f, 0x00},//0x5f,0x00,//
+ {0x60, 0x66},//0x60,0x66,//
+
+ {0x41, 0x1f},
+ {0xb5, 0x01},
+ {0xb6, 0x07},
+ {0xb9, 0x3c},
+ {0xba, 0x28},
+ {0xb7, 0x90},
+ {0xb8, 0x08},
+ {0xbf, 0x0c},
+ {0xc0, 0x3e},
+ {0xa3, 0x0a},
+ {0xa4, 0x0f},
+ {0xa5, 0x09},//denoise threshold
+ {0xa6, 0x16},
+ {0x9f, 0x0a},
+ {0xa0, 0x0f},
+ {0xa7, 0x0a},
+ {0xa8, 0x0f},
+ {0xa1, 0x18},//0xa1,0x10,
+ {0xa2, 0x10},//0xa2,0x04,
+ {0xa9, 0x00},//0xa9,0x04,
+ {0xaa, 0xa6},
+ //;awb
+ {0x75, 0x68},//0x75,0x6a,//
+ {0x76, 0x11},//0x76,0x11,//
+ {0x77, 0x92},//0x77,0x92,//
+ {0x78, 0xa1},//0x78,0xa1,//
+ {0x79, 0xe1},//0x79,0xe1,//
+ {0x7a, 0x02},//0x7a,0x02,//
+ {0x7c, 0x0e},//0x7c,0x05,//
+ {0x7d, 0x12},//0x7d,0x08,//
+ {0x7e, 0x12},//0x7e,0x08,//
+ {0x7f, 0x54},//0x7f,0x7c,//
+ {0x80, 0x78},//0x80,0x58,//
+ {0x81, 0xa2},//0x81,0x2a,//
+ {0x82, 0x80},//0x82,0xc5,//
+ {0x83, 0x4e},//0x83,0x46,//
+ {0x84, 0x40},//0x84,0x3a,//
+ {0x85, 0x4c},//0x85,0x54,//
+ {0x86, 0x43},//0x86,0x44,//
+ {0x87, 0xf8},//0x87,0xf8,//
+ {0x88, 0x08},//0x88,0x08,//
+ {0x89, 0x70},//0x89,0x70,//
+ {0x8a, 0xf0},//0x8a,0xf0,//
+ {0x8b, 0xf0},//0x8b,0xf0,//
+
+ {0x90, 0xe3},
+ {0x93, 0x10},
+ {0x94, 0x20},
+ {0x95, 0x10},
+ {0x96, 0x18},
+
+ {0xff, 250},//delay 255ms
+ {0xff, 0xff} /* END MARKER */
+};
+
+//For any sake
+static const struct ov2643_reg ov2643_YYUV_regs[] = {
+ { OV2643_TERM_REG, OV2643_TERM_VAL },
+};
+static const struct ov2643_reg ov2643_vga_regs[] = {
+ { OV2643_TERM_REG, OV2643_TERM_VAL },
+};
+
+const static struct ov2643_reg *ov2643_reg_format_init[NUM_FORMAT_SIZES] = {
+ ov2643_YYUV_regs
+};
+
+const static struct ov2643_reg *ov2643_reg_size_init[NUM_IMAGE_SIZES] = {
+ ov2643_vga_regs,
+};
+//Forward declaration of driver operations
+static int ov2643_get_control(struct v4l2_subdev *, struct v4l2_control *);
+static int ov2643_set_control(struct v4l2_subdev *, struct v4l2_control *);
+static int ov2643_query_control(struct v4l2_subdev *, struct v4l2_queryctrl *);
+
+static enum image_size ov2643_find_size(unsigned int width, unsigned int height){
+ enum image_size isize;
+ unsigned long pixels = width * height;
+#ifdef OV2643_DEBUG
+ printk("ovm2643 find size\r\n");
+#endif
+ //for (isize = QVGA; isize < VGA; isize++)
+ isize = VGA;
+ {
+ if (ov2643_sizes[isize + 1].height *
+ ov2643_sizes[isize + 1].width > pixels)
+ return isize;
+ }
+ return VGA;
+}
+
+struct ov2643 {
+ struct v4l2_subdev sd;
+ struct v4l2_pix_format pix;
+ struct v4l2_fract timeperframe;
+};
+static inline struct ov2643 *to_ov2643(struct v4l2_subdev *sd){
+ return container_of(sd, struct ov2643, sd);//Funny thing works
+}
+
+static struct i2c_driver ov2643_i2c_driver;
+static unsigned long xclk_current = OV2643_XCLK_NOM;
+
+/* list of image formats supported by ov2643 sensor */
+const static struct v4l2_fmtdesc ov2643_formats[] = {
+ {
+ .description = "YUYV 4:2:2",
+ .pixelformat = V4L2_PIX_FMT_YUYV,
+ }
+};
+
+#define NUM_CAPTURE_FORMATS ARRAY_SIZE(ov2643_formats)
+
+static int ov2643_read_reg(struct i2c_client *client, u8 reg, u8 *val){
+ int ret;
+ ret = i2c_smbus_read_byte_data(client, reg);
+ if (ret >= 0) {
+ *val = (unsigned char) ret;
+ ret = 0;
+ }
+#ifdef OV2643_DEBUG
+ printk("ov2643 read reg: client: %x, addr: %x, reg: %x, val: %x, ret: %x\r\n", (unsigned int)client->adapter, client->addr, reg, *val, ret);
+#endif
+ return ret;
+}
+
+static int ov2643_write_reg(struct i2c_client *client, u8 reg, u8 val){
+ int ret = 0;
+ if (!client->adapter) return -ENODEV;
+#ifdef OV2643_DEBUG
+ printk("ov2643 write reg: client: %x, addr: %x, reg: %x, val: %x\r\n", (unsigned int)client->adapter, client->addr, reg, val);
+#endif
+ if (reg == OV2643_TERM_REG){
+ if (val == OV2643_TERM_VAL) return 0;
+ }
+ ret = i2c_smbus_write_byte_data(client, reg, val);
+ if (reg == OV2643_REG_COM12 && (val & COM12_RESET)) msleep(5); /* Wait for reset to run */
+ if (reg == OV2643_TERM_REG){
+ msleep(val);
+ }
+ return ret;
+}
+
+static int ov2643_write_regs(struct v4l2_subdev *sd, struct ov2643_reg *vals){
+ int err = 0;
+ const struct ov2643_reg *list = vals;
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ while (!((list->reg == OV2643_TERM_REG) && (list->val == OV2643_TERM_VAL))) {
+ err = ov2643_write_reg(client, list->reg,list->val);
+ if (err) return err;
+ msleep(1);
+ list++;
+ }
+ return 0;
+}
+
+static unsigned long ov2643sensor_calc_xclk(void){
+ xclk_current = OV2643_XCLK_NOM;
+ return xclk_current;
+}
+
+static int ov2643_configure(struct v4l2_subdev *sd){
+ struct ov2643 *ov2643 = to_ov2643(sd);
+ struct v4l2_pix_format *pix = &ov2643->pix;
+ enum image_size isize;
+ int err = 0;
+ enum pixel_format pfmt = YUV;
+ unsigned long xclk;
+#ifdef OV2643_DEBUG
+ printk("Configuring ov2643 camera chip\n");
+#endif
+#if 0 //Just for initial driver version
+ switch (pix->pixelformat) {
+ case V4L2_PIX_FMT_RGB565:
+ case V4L2_PIX_FMT_RGB565X:
+ pfmt = RGB565;
+ break;
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_UYVY:
+ default:
+ pfmt = YUV;
+ break;
+ }
+ xclk = ov2643sensor_calc_xclk();
+ isize = ov2643_find_size(pix->width, pix->height);
+ /* configure pixel format */
+ err = ov2643_write_regs(sd, (struct ov2643_reg *)(ov2643_reg_format_init[pfmt]) );
+ if (err){
+ printk("Configure made error1 %d\r\n", err);
+ return err;
+ }
+ /* configure size */
+ err = ov2643_write_regs(sd, (struct ov2643_reg *)(ov2643_reg_size_init[isize]) );
+ if (err){
+ printk("Configure made error2 %d\r\n", err);
+ return err;
+ }
+#endif
+ return 0;
+}
+
+static int ov2643_init(struct v4l2_subdev *sd, u32 val){
+ /* Reset and wait two milliseconds */
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+#ifdef OV2643_DEBUG
+ printk("ov2643 initialization function\r\n");
+#endif
+ ov2643_write_reg(client, OV2643_REG_COM12, COM12_RESET);
+ msleep(5);
+ return ov2643_write_regs(sd, (struct ov2643_reg *)initial_list );
+}
+
+//All that clear about controls
+static int ov2643_query_control(struct v4l2_subdev *sd, struct v4l2_queryctrl *qctr){
+#if 0
+ printk("ov2643 ioctl_queryctrl dummy method\r\n");
+ printk("Def val %x\r\n",qctr->default_value);
+ printk("Name %s\r\n", qctr->name);
+ printk("Type %d\r\n", qctr->type);
+ printk("ID 0x%08x\r\n", qctr->id);
+ //printk("", gctr->)
+#endif
+ return -EINVAL;
+}
+
+static int ov2643_get_control(struct v4l2_subdev *sd, struct v4l2_control *ctrl){
+#ifdef OV2643_DEBUG
+ printk("ov2643 ioctl_g_ctrl dummy method\r\n");
+#endif
+ return -EINVAL;
+}
+
+static int ov2643_set_control(struct v4l2_subdev *sd,struct v4l2_control *ctrl){
+ int retval = -EINVAL;
+#ifdef OV2643_DEBUG
+ printk("ov2643 ioctl_s_ctrl dummy method\r\n");
+#endif
+ return retval;
+}
+
+static int ov2643_enum_format(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt){
+ int index = fmt->index;
+ enum v4l2_buf_type type = fmt->type;
+ //
+ memset(fmt, 0, sizeof(*fmt));
+ fmt->index = index;
+ fmt->type = type;
+ //
+#ifdef OV2643_DEBUG
+ printk("%s: Enum format capability\n", __func__);
+ printk("ov2643 ioctl_enum_fmt_cap\r\n");
+#endif
+ //
+ switch (fmt->type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ if (index >= NUM_CAPTURE_FORMATS) return -EINVAL;
+ break;
+ default:
+ return -EINVAL;
+ }
+ fmt->flags = ov2643_formats[index].flags;
+ strlcpy(fmt->description, ov2643_formats[index].description, sizeof(fmt->description));
+ fmt->pixelformat = ov2643_formats[index].pixelformat;
+ return 0;
+}
+
+static int ov2643_set_stream(struct v4l2_subdev *sd, int enable){
+#ifdef OV2643_DEBUG
+ printk("OV2643 set stream - dummy method\r\n");
+#endif
+ return 0;
+}
+
+static int ov2643_try_format(struct v4l2_subdev *sd, struct v4l2_format *f){
+ enum image_size isize;
+ int ifmt;
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+ char* colorspace = 0;
+ switch(f->fmt.pix.colorspace){
+ case V4L2_COLORSPACE_SMPTE170M : colorspace = "V4L2_COLORSPACE_SMPTE170M"; break;
+ case V4L2_COLORSPACE_SMPTE240M : colorspace = "V4L2_COLORSPACE_SMPTE240M"; break;
+ case V4L2_COLORSPACE_REC709 : colorspace = "V4L2_COLORSPACE_REC709"; break;
+ case V4L2_COLORSPACE_BT878 : colorspace = "V4L2_COLORSPACE_BT878"; break;
+ case V4L2_COLORSPACE_470_SYSTEM_M : colorspace = "V4L2_COLORSPACE_470_SYSTEM_M"; break;
+ case V4L2_COLORSPACE_470_SYSTEM_BG : colorspace = "V4L2_COLORSPACE_470_SYSTEM_BG"; break;
+ case V4L2_COLORSPACE_JPEG : colorspace = "V4L2_COLORSPACE_JPEG"; break;
+ case V4L2_COLORSPACE_SRGB : colorspace = "V4L2_COLORSPACE_SRGB"; break;
+ default : colorspace = "NOT SET"; break;
+ }
+#if 0
+ printk("ov2643 try format:\r\n bytes per line: %d\r\npixelformat %c%c%c%c\r\n, colorspace %s\r\n, field %d\r\n, height %d, width %d, sizeimage %d\r\n",
+ f->fmt.pix.bytesperline,
+ ((f->fmt.pix.pixelformat)&0xff),(((f->fmt.pix.pixelformat)>>8)&0xff),(((f->fmt.pix.pixelformat)>>16)&0xff),(((f->fmt.pix.pixelformat)>>24)&0xff),
+ colorspace,
+ f->fmt.pix.field,
+ f->fmt.pix.height,
+ f->fmt.pix.width,
+ f->fmt.pix.sizeimage
+ );
+#endif
+ isize = ov2643_find_size(pix->width, pix->height);
+ pix->width = ov2643_sizes[isize].width;
+ pix->height = ov2643_sizes[isize].height;
+#ifdef OV2643_DEBUG
+ printk("%s: Trying format\n", __func__);
+#endif
+ for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) {
+ if (pix->pixelformat == ov2643_formats[ifmt].pixelformat) break;
+ }
+
+ if (ifmt == NUM_CAPTURE_FORMATS) ifmt = 0;
+
+ pix->pixelformat = ov2643_formats[ifmt].pixelformat;
+ pix->field = V4L2_FIELD_NONE;
+ pix->bytesperline = pix->width * 2;
+ pix->sizeimage = pix->bytesperline * pix->height;
+ pix->priv = 0;
+ switch (pix->pixelformat) {
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_UYVY:
+ default:
+ pix->colorspace = V4L2_COLORSPACE_JPEG;
+ break;
+ case V4L2_PIX_FMT_RGB565:
+ case V4L2_PIX_FMT_RGB565X:
+ pix->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ }
+ return 0;
+}
+
+static int ov2643_set_format(struct v4l2_subdev *sd, struct v4l2_format *f){
+ struct ov2643 *ov2643 = to_ov2643(sd);
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+ int rval;
+#ifdef OV2643_DEBUG
+ printk("ov2643 set format\r\n");
+#endif
+ rval = ov2643_try_format(sd, f);
+ if (rval) {
+ printk("%s: Error trying format\n", __func__);
+ return rval;
+ }
+ rval = ov2643_configure(sd);
+ if (!rval) {
+ ov2643->pix = *pix;
+ } else {
+ printk("%s: Error configure format %d\n", __func__, rval);
+ }
+ return rval;
+}
+
+static int ov2643_get_format(struct v4l2_subdev *sd, struct v4l2_format *f){
+ struct ov2643 *ov2643 = to_ov2643(sd);
+ f->fmt.pix = ov2643->pix;
+#ifdef OV2643_DEBUG
+ printk("ov2643 ioctl_g_fmt_cap\r\n");
+#endif
+ return 0;
+}
+
+static int ov2643_get_param(struct v4l2_subdev *sd, struct v4l2_streamparm *a){
+ struct ov2643 *ov2643 = to_ov2643(sd);
+ struct v4l2_captureparm *cparm = &a->parm.capture;
+#ifdef OV2643_DEBUG
+ printk("ov2643 ioctl_g_parm\r\n");
+#endif
+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) return -EINVAL;
+ memset(a, 0, sizeof(*a));
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ cparm->capability = V4L2_CAP_TIMEPERFRAME;
+ cparm->timeperframe = ov2643->timeperframe;
+ return 0;
+}
+
+static int ov2643_get_chip_id(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *id){
+ struct i2c_client *client = v4l2_get_subdevdata(sd);;
+#ifdef OV2643_DEBUG
+ printk("ov2643 get chipid\r\n");
+#endif
+ if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR){
+ printk("match type fails\r\n");
+ return -EINVAL;
+ }
+ if (id->match.addr != client->addr){
+ printk("match addr fails\r\n");
+ return -ENODEV;
+ }
+ id->ident = V4L2_IDENT_OV2643;
+ id->revision = 0;
+#ifdef OV2643_DEBUG
+ printk("ov2643 chip id ok\r\n");
+#endif
+ return 0;
+}
+
+static const struct v4l2_subdev_core_ops ov2643_core_ops = {
+ .g_chip_ident = ov2643_get_chip_id,
+ .init = ov2643_init,
+ .queryctrl = ov2643_query_control,
+ .g_ctrl = ov2643_get_control,
+ .s_ctrl = ov2643_set_control,
+};
+
+static const struct v4l2_subdev_video_ops ov2643_video_ops = {
+ .s_fmt = ov2643_set_format,
+ .g_fmt = ov2643_get_format,//Check it correct
+ .try_fmt = ov2643_try_format,
+ .s_stream = ov2643_set_stream,
+ .enum_fmt = ov2643_enum_format,//Check it correct
+ .g_parm = ov2643_get_param//Check it correct
+};
+
+static const struct v4l2_subdev_ops ov2643_ops = {
+ .core = &ov2643_core_ops,
+ .video = &ov2643_video_ops,
+};
+
+static int ov2643_detect(struct i2c_client *client)
+{
+//Shadrin todo improve: may check model ID also
+ u8 pidh, pidl;
+#ifdef OV2643_DEBUG
+ printk("Detect ov2643\r\n");
+#endif
+ if (!client) return -ENODEV;
+
+ if (ov2643_read_reg(client, OV2643_REG_PIDH, &pidh)) return -ENODEV;
+ if (ov2643_read_reg(client, OV2643_REG_PIDL, &pidl)) return -ENODEV;
+
+ v4l_info(client, "model id detected 0x%02x%02x\n", pidh, pidl);
+#ifdef OV2643_DEBUG
+ printk("model id detected 0x%02x%02x\n", pidh, pidl);
+#endif
+ if ((pidh != OV2643_PIDH_MAGIC)|| (pidl != OV2643_PIDL_MAGIC)) {
+ //return -ENODEV;
+ }
+ return 0;
+}
+
+
+static int ov2643_probe(struct i2c_client *client, const struct i2c_device_id *id){
+ struct ov2643 *ov2643;
+ struct v4l2_subdev *sd;
+ int ret;
+#ifdef OV2643_DEBUG
+ printk("ov2643 probe enter\n");
+#endif
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&client->adapter->dev,"I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE_DATA\n");
+ return -EIO;
+ }
+
+ if (!client->dev.platform_data) {
+ dev_err(&client->dev, "No platform data!!\n");
+ return -ENODEV;
+ }
+ ov2643 = kzalloc(sizeof(struct ov2643), GFP_KERNEL);
+ if (!ov2643) return -ENOMEM;
+ ret = ov2643_detect(client);
+ if (ret){
+#ifdef OV2643_DEBUG
+ printk("ov2643 detection failed\r\n");
+#endif
+ goto clean;
+ }
+ //Filling ov2643 data stucture
+ ov2643->pix.width = OV2643_IMAGE_WIDTH;
+ ov2643->pix.height = OV2643_IMAGE_HEIGHT;
+ ov2643->pix.pixelformat = V4L2_PIX_FMT_YUYV;
+ ov2643->timeperframe.numerator = 1;
+ ov2643->timeperframe.denominator = OV2643_FRAME_RATE;
+
+ /* Register with V4L2 layer as slave device */
+ sd = &ov2643->sd;
+ v4l2_i2c_subdev_init(sd, client, &ov2643_ops);
+
+ ret = ov2643_init(sd,0);
+ v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
+ return 0;
+
+clean:
+ kfree(ov2643);
+ return ret;
+}
+static int ov2643_remove(struct i2c_client *client){
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov2643 *ov2643 = to_ov2643(sd);
+ v4l2_device_unregister_subdev(sd);
+ kfree(ov2643);
+ return 0;
+}
+
+static const struct i2c_device_id ov2643_id[] = {
+ { "ov2643", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ov2643_id);
+
+static struct i2c_driver ov2643_i2c_driver = {
+ .driver = {
+ .name = "ov2643",
+ },
+ .probe = ov2643_probe,
+ .remove = ov2643_remove,
+ .id_table = ov2643_id,
+};
+
+static int __init ov2643_driver_init(void){
+ int err;
+#ifdef OV2643_DEBUG
+ printk("OV2643 camera sensor init\r\n");
+#endif
+ err = i2c_add_driver(&ov2643_i2c_driver);
+ if (err) {
+ printk("Failed to register" OV2643_DRIVER_NAME ".\n");
+ return err;
+ }
+ return 0;
+}
+
+static void __exit ov2643_driver_cleanup(void){
+#ifdef OV2643_DEBUG
+ printk("OV2643 camera driver cleanup\r\n");
+#endif
+ i2c_del_driver(&ov2643_i2c_driver);
+}
+
+module_init(ov2643_driver_init);
+module_exit(ov2643_driver_cleanup);
+
+MODULE_LICENSE("GPL V2");
+MODULE_AUTHOR("Alexander V. Shadrin, alex.virt2real@gmail.com");
+MODULE_DESCRIPTION("ov2643 primitive camera sensor driver");
diff --git a/drivers/media/i2c/ov7675.c b/drivers/media/i2c/ov7675.c
new file mode 100644
index 00000000..ca335d90
--- /dev/null
+++ b/drivers/media/i2c/ov7675.c
@@ -0,0 +1,1106 @@
+/***************************************************************************
+ *
+ * OVM OV7690 CameraCube module driver
+ *
+ * Copyright (C) 2012 Alexander V. Shadrin <alex.virt2real@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#define DEBUG
+#define OV7675
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <media/ov7690.h>
+#include <media/v4l2-chip-ident.h>
+
+/* The ID values we are looking for */
+#define OV7690_MOD_ID 0x0046
+#define OV7690_MFR_ID 0x000B
+
+/* OV7690 has 8 I2C registers */
+#define I2C_8BIT 1
+
+/* Terminating list entry for reg */
+#define I2C_REG_TERM 0xFF
+/* Terminating list entry for val */
+#define I2C_VAL_TERM 0xFF
+/* Terminating list entry for len */
+#define I2C_LEN_TERM 0xFF
+
+/* terminating token for reg list */
+#define OV7690_TOK_TERM 0xFF
+
+/* delay token for reg list */
+#define OV7690_TOK_DELAY 100
+
+/* CSI2 Virtual ID */
+#define OV7690_CSI2_VIRTUAL_ID 0x0
+
+#define OV7690_MIDH_MAGIC 0x7f
+#define OV7690_MIDL_MAGIC 0xa2
+#define OV7690_PIDH_MAGIC 0x76
+
+/* Used registers */
+#define OV7690_REG_MIDH 0x1c
+#define OV7690_REG_MIDL 0x1d
+//
+#define OV7690_REG_PIDH 0x0a
+#define OV7690_REG_PIDL 0x0b
+#define OV7690_REG_GAIN 0x00
+#define OV7690_REG_BGAIN 0x01
+#define OV7690_REG_RGAIN 0x02
+#define OV7690_REG_GGAIN 0x03
+#define OV7690_REG_COM0C 0x0c
+ #define SWAP_YUV 0x10 /* Swap Y/UV output sequence in YUV mode */
+ #define ENABLE_OUTPUTS 0x06 /* Makes output for data and clock lines*/
+#define OV7690_REG_COM0D 0x0d
+#define OV7690_REG_COM0E 0x0e
+#define OV7690_REG_AECH 0x0f
+#define OV7690_REG_AECL 0x10
+#define OV7690_CLKRC 0x11
+#define OV7690_REG_COM12 0x12
+#define OV7690_REG_COM13 0x13
+#define OV7690_REG_COM14 0x14
+#define OV7690_REG_COM15 0x15
+#define OV7690_REG_COM16 0x16
+#define OV7690_REG_HSTART 0x17
+#define OV7690_REG_HSIZE 0x18
+#define OV7690_REG_VSTART 0x19
+#define OV7690_REG_VSIZE 0x1a
+#define OV7690_REG_VSHFT 0x1b
+#define OV7690_REG_COM20 0x20
+#define OV7690_REG_AECGM 0x21
+#define OV7690_REG_COM22 0x22
+#define OV7690_REG_WPT 0x24
+#define OV7690_REG_BPT 0x25
+#define OV7690_REG_VPT 0x26
+#define OV7690_REG_COM27 0x27
+#define OV7690_REG_COM28 0x28
+#define OV7690_REG_PLL 0x29
+#define OV7690_REG_HEXHCL 0x2a
+#define OV7690_REG_HEXHCH 0x2b
+#define OV7690_REG_DM_LN 0x2c
+#define OV7690_REG_ADVFL 0x2d
+#define OV7690_REG_ADVFH 0x2e
+
+
+/* OV7690_REG_COM14 */
+#define GAIN_2x 0x00 /* 000 : 2x */
+#define GAIN_4x 0x10 /* 001 : 4x */
+#define GAIN_8x 0x20 /* 010 : 8x */
+#define GAIN_16x 0x30 /* 011 : 16x */
+#define GAIN_32x 0x40 /* 100 : 32x */
+#define GAIN_64x 0x50 /* 101 : 64x */
+#define GAIN_128x 0x60 /* 110 : 128x */
+
+
+
+/* OV7690_REG_COM12 */
+#define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */
+#define FMT_RGB565 0x04 /* 01 : RGB 565 */
+ /* Output format control */
+#define OFMT_RGB 0x02 /* 10 : RGB */
+#define OFMT_YUV 0x00 /* 00 : YUV */
+
+/*
+ * The nominal xclk input frequency of the OV7690 is 18MHz, maximum
+ * frequency is 45MHz, and minimum frequency is 6MHz.
+ */
+#define OV7690_XCLK_MIN 6000000
+#define OV7690_XCLK_NOM 24000000
+#define OV7690_XCLK_MAX 24000000
+
+/* FPS Capabilities */
+#define OV7690_DEF_FPS 30
+
+#define I2C_RETRY_COUNT 25
+
+/* HSTART */
+#define HST_VGA 0x23
+#define HST_QVGA 0x3F
+
+/* HSIZE */
+#define HSZ_VGA 0xA0
+#define HSZ_QVGA 0x50
+
+/* VSTART */
+#define VST_VGA 0x07
+#define VST_QVGA 0x03
+
+/* VSIZE */
+#define VSZ_VGA 0xF0
+#define VSZ_QVGA 0x78
+
+/* HOUTSIZE */
+#define HOSZ_VGA 0xA0
+#define HOSZ_QVGA 0x50
+
+#define OV7690_IMAGE_WIDTH 640
+#define OV7690_IMAGE_HEIGHT 480
+#define OV7690_QVGA_WIDTH 320
+#define OV7690_QVGA_HEIGHT 240
+
+#define SENSOR_DETECTED 1
+#define SENSOR_NOT_DETECTED 0
+
+/**
+ * struct ov7690_reg - ov7690 register format
+ * @reg: 8bit offset to register
+ * @val: 8bit register value
+ *
+ * Define a structure for OV7690 register initialization values
+ */
+struct ov7690_reg {
+ u8 reg;
+ u8 val;
+};
+
+/**
+ * struct capture_size - image capture size information
+ * @width: image width in pixels
+ * @height: image height in pixels
+ */
+struct capture_size {
+ unsigned long width;
+ unsigned long height;
+};
+
+/*
+ * Array of image sizes supported by OV7690. These must be ordered from
+ * smallest image size to largest.
+ */
+const static struct capture_size ov7690_sizes[] = {
+ { 320, 240 }, /* QVGA */
+ { 640, 480 }, /* VGA */
+};
+
+#define NUM_IMAGE_SIZES ARRAY_SIZE(ov7690_sizes)
+#define NUM_FORMAT_SIZES 2
+
+/**
+ * struct struct mipi_settings - struct for storage of sensor
+ * mipi settings
+ */
+struct ov7690_mipi_settings {
+ u16 data_lanes;
+ u16 ths_prepare;
+ u16 ths_zero;
+ u16 ths_settle_lower;
+ u16 ths_settle_upper;
+};
+
+/**
+ * struct struct frame_settings - struct for storage of sensor
+ * frame settings
+ */
+struct ov7690_frame_settings {
+ u16 frame_len_lines_min;
+ u16 frame_len_lines;
+ u16 line_len_pck;
+ u16 x_addr_start;
+ u16 x_addr_end;
+ u16 y_addr_start;
+ u16 y_addr_end;
+ u16 x_output_size;
+ u16 y_output_size;
+ u16 x_even_inc;
+ u16 x_odd_inc;
+ u16 y_even_inc;
+ u16 y_odd_inc;
+ u16 v_mode_add;
+ u16 h_mode_add;
+ u16 h_add_ave;
+};
+
+/**
+ * struct struct ov7690_sensor_settings - struct for storage of
+ * sensor settings.
+ */
+struct ov7690_sensor_settings {
+ /* struct ov7690_clk_settings clk; */
+ struct ov7690_mipi_settings mipi;
+ struct ov7690_frame_settings frame;
+};
+
+/**
+ * struct struct ov7690_clock_freq - struct for storage of sensor
+ * clock frequencies
+ */
+struct ov7690_clock_freq {
+ u32 vco_clk;
+ u32 mipi_clk;
+ u32 ddr_clk;
+ u32 vt_pix_clk;
+};
+
+#define OV7690_DRIVER_NAME "ov7690"
+#define OV7690_MOD_NAME "ov7690: "
+
+/*
+ * Our nominal (default) frame rate.
+ */
+#define OV7690_FRAME_RATE 30
+
+#define COM12_RESET (1 << 7)
+
+enum image_size { QVGA, VGA };
+enum pixel_format { YUV, RGB565 };
+
+static int debug;
+module_param(debug, bool, 0644);
+MODULE_PARM_DESC(debug, "Debug level (0-1)");
+
+#ifndef OV7675
+const static struct ov7690_reg initial_list[] = {
+ //{ OV7690_CLKRC, 0x00 },
+ //{ OV7690_REG_PLL, 0x50 },
+ //{ OV7690_REG_HEXHCL, 0x30 },
+ //{ OV7690_REG_HEXHCH, 0x08 },
+ //{ OV7690_REG_DM_LN, 0x00 },
+ //{ OV7690_REG_COM15, 0x00 },
+ //{ OV7690_REG_ADVFL, 0x00 },
+ //{ OV7690_REG_ADVFH, 0x00 },
+ //{ I2C_REG_TERM, I2C_VAL_TERM },
+ {OV7690_REG_COM12, COM12_RESET},
+#if 0
+ {OV7690_REG_COM0C, ENABLE_OUTPUTS|SWAP_YUV},
+#else
+ {OV7690_REG_COM0C, ENABLE_OUTPUTS},
+#endif
+#if 0
+ {0x48, 0x42},//Magic reserved bits
+ {0x27, 0x80},//Dark sun enable ???
+ {0x64, 0x10},//Magic reserved bits
+ {0x68, 0xb4},//BLC target offset
+ {0x69, 0x12},//Magic reserved bits
+ {0x2f, 0x60},//Magic reserved bits
+ {0x41, 0x43},//Magic reserved bits
+ {0x44, 0x24},//Magic reserved bits
+ {0x4b, 0x0e},//Magic reserved bits
+ {0x4c, 0x7b},//Magic reserved bits
+ {0x4d, 0x0a},//Magic reserved bits
+ {OV7690_REG_PLL, 0x50},
+ {OV7690_REG_VSHFT, 0x19},//Pixel shift
+ {0x39, 0x80},//Magic reserved bits
+ {0x80, 0x7f},//Automatic modes - WB, lens correction and so on
+ {0x81, 0xff},//Automatic modes special digital effects and so on
+ {0x91, 0x20},//AWB control registers
+ {OV7690_REG_AECGM, 0x44},//AECGM
+ {OV7690_CLKRC, 0x01},
+ {OV7690_REG_COM12, OFMT_YUV},
+ {0x82, 0x03},//Setting YUV422 format
+ {0xd0, 0x248},//Boundary offset
+ {OV7690_REG_HEXHCH, 0x38},//dummy pixels in h-direction h-byte
+ {OV7690_REG_COM15, 0x14},//Auto frame rate????
+ {OV7690_REG_COM16, 0x03},
+ {OV7690_REG_HSTART, 0x69},
+ {OV7690_REG_HSIZE, 0xa4},
+ {OV7690_REG_VSTART, 0x0c},
+ {OV7690_REG_VSIZE, 0xf6},
+ {0x3e, 0x30},//PCLK settings ???
+ {0xc8, 0x02},//horizontal input size msb
+ {0xc9, 0x80},//horizontal input size lsb
+ {0xca, 0x01},//vertical input size msb
+ {0xcb, 0xe0},//vertical input size lsb
+ {0xcc, 0x02},//horizontal output size msb
+ {0xcd, 0x80},//horizontal output size lsb
+ {0xce, 0x01},//vertical output size msb
+ {0xcf, 0xe0},//vertical output size lsb
+ {0x80, 0x7F},////Automatic modes - WB, lens correction and so on again
+ {0x85, 0x10},//LENC gain enable
+ {0x86, 0x00},//radius of circle where no compensation is applid
+ {0x87, 0x00},//x-coordinate for lens correction
+ {0x88, 0x00},//y-coordinate for lens correction
+ //{0x89, 0x35},//r-channel comp coeff
+ //{0x8a, 0x30},//g-channel comp coeff
+ //{0x8b, 0x33},//b=channel comp coeff
+ //{0xbb, 0xbe},//color matrix coeff 1
+ //{0xbc, 0xc0},//color matrix coeff 2
+ //{0xbd, 0x02},//color matrix coeff 3
+ //{0xbe, 0x16},//color matrix coeff 4
+ //{0xbf, 0xc2},//color matrix coeff 5
+ //{0xc0, 0xd9},//color matrix coeff 6
+ {0xc1, 0x1e},//regc1 - default value
+ {0xb4, 0x36},//strange description
+ {0xb5, 0x06},//DNS_TH_MAN ???
+ {0xb7, 0x00},//OFFSET???
+ {0x8f, 0x19},//AWB Control registers
+ {0x90, 0x50},//AWB Control registers
+ {0x91, 0x21},//AWB Control registers
+ {0x92, 0x9c},//AWB Control registers
+ {0x93, 0x9b},//AWB Control registers
+ {0x94, 0x0c},//AWB Control registers
+ {0x95, 0x0d},//AWB Control registers
+ {0x96, 0xff},//AWB Control registers
+ {0x97, 0x00},//AWB Control registers
+ {0x98, 0x3f},//AWB Control registers
+ {0x99, 0x30},//AWB Control registers
+ {0x9a, 0x4d},//AWB Control registers
+ {0x9b, 0x3d},//AWB Control registers
+ {0x9c, 0xf0},//AWB Control registers
+ {0x9d, 0xf0},//AWB Control registers
+ {0x9e, 0xf0},//AWB Control registers
+ {0x9f, 0xff},//AWB Control registers
+ {0xa0, 0x5f},//AWB Control registers
+ {0xa1, 0x61},//AWB Control registers
+ {0xa2, 0x0c},//AWB Control registers
+ //here we set 30fps
+ {OV7690_REG_COM14, 0x21},//Automatic gain 16X, 50Hz filter
+ {OV7690_REG_COM13, 0xf7},//AEC full enable
+ {OV7690_CLKRC, 0x00},//Internal clock prescaler to 1
+ {OV7690_REG_PLL, 0x50},//???
+ {OV7690_REG_HEXHCL, 0x30},
+ {OV7690_REG_HEXHCH, 0x08},
+ {OV7690_REG_DM_LN, 0x00},
+ {OV7690_REG_COM15, 0x00},//Auto frema rate off
+ {OV7690_REG_ADVFL, 0x00},//
+ {OV7690_REG_ADVFH, 0x00},
+#endif
+ {0xff, 0xff} /* END MARKER */
+};
+#else
+const static struct ov7690_reg initial_list[] = {
+ {OV7690_REG_COM12, COM12_RESET},
+ {0x11,0x00},
+ {0x3a,0x0C},
+ {0x3D,0xC0},
+ {0x12,0x00},
+ {0x15,0x00},
+ {0xc1,0x7f},
+ {0x17,0x13},
+ {0x18,0x01},
+ {0x32,0xbF},
+ {0x19,0x03},
+ {0x1a,0x7c},
+ {0x03,0x0a},
+ {0x0c,0x00},
+ {0x3e,0x00},
+ {0x70,0x3a},
+ {0x71,0x35},
+ {0x72,0x11},
+ {0x73,0xf0},
+ {0xa2,0x02},
+ {0x7a,0x24},
+ {0x7b,0x04},
+ {0x7c,0x07},
+ {0x7d,0x10},
+ {0x7e,0x28},
+ {0x7f,0x36},
+ {0x80,0x44},
+ {0x81,0x52},
+ {0x82,0x60},
+ {0x83,0x6c},
+ {0x84,0x78},
+ {0x85,0x8c},
+ {0x86,0x9e},
+ {0x87,0xbb},
+ {0x88,0xd2},
+ {0x89,0xe5},
+ {0x13,0xe0},
+ {0x00,0x00},
+ {0x10,0x00},
+ {0x0d,0x50},
+ {0x42,0x40},
+ {0x14,0x38},
+ {0xa5,0x05},
+ {0xab,0x07},
+ {0x24,0x54},
+ {0x25,0x4c},
+ {0x26,0x82},
+ {0x9f,0x78},
+ {0xa0,0x68},
+ {0xa1,0x03},
+ {0xa6,0xD8},
+ {0xa7,0xD8},
+ {0xa8,0xf0},
+ {0xa9,0x90},
+ {0xaa,0x14},
+ {0x13,0xe5},
+ {0x0e,0x61},
+ {0x0f,0x4b},
+ {0x16,0x02},
+ {0x1e,0x07},
+ {0x21,0x02},
+ {0x22,0x91},
+ {0x29,0x07},
+ {0x33,0x0b},
+ {0x35,0x0b},
+ {0x37,0x1d},
+ {0x38,0x71},
+ {0x39,0x2a},
+ {0x3c,0x78},
+ {0x4d,0x40},
+ {0x4e,0x20},
+ {0x69,0x00},
+ {0x6b,0x0a},
+ {0x74,0x10},
+ {0x8d,0x4f},
+ {0x8e,0x00},
+ {0x8f,0x00},
+ {0x90,0x00},
+ {0x91,0x00},
+ {0x96,0x00},
+ {0x9a,0x80},
+ {0xb0,0x84},
+ {0xb1,0x0c},
+ {0xb2,0x0e},
+ {0xb3,0x82},
+ {0xb8,0x0a},
+ {0x43,0x0a},
+ {0x44,0xf0},
+ {0x45,0x34},
+ {0x46,0x58},
+ {0x47,0x28},
+ {0x48,0x3A},
+ {0x59,0x88},
+ {0x5a,0x88},
+ {0x5b,0xe4},
+ {0x5c,0x60},
+ {0x5d,0x49},
+ {0x5e,0x20},
+ {0x6c,0x0a},
+ {0x6d,0x55},
+ {0x6e,0x11},
+ {0x6f,0x9e},
+ {0x6a,0x40},
+ {0x01,0x56},
+ {0x02,0x44},
+ {0x13,0xe7},
+ {0x4f,0x73},
+ {0x50,0x73},
+ {0x51,0x00},
+ {0x52,0x1F},
+ {0x53,0x55},
+ {0x54,0x73},
+ {0x55,0x00},
+ {0x56,0x40},
+ {0x57,0x80},
+ {0x58,0x9e},
+ {0x3f,0x02},
+ {0x75,0x23},
+ {0x76,0xe1},
+ {0x4c,0x00},
+ {0x77,0x01},
+ {0x3D,0xC2},
+ {0x4b,0x09},
+ {0xc9,0x60},
+ {0x41,0x38},
+ {0x56,0x40},
+ {0x34,0x11},
+ {0x3b,0x0a},
+ {0xa4,0x89},
+ {0x96,0x00},
+ {0x97,0x30},
+ {0x98,0x20},
+ {0x99,0x30},
+ {0x9a,0x84},
+ {0x9b,0x29},
+ {0x9c,0x03},
+ {0x9d,0x4c},
+ {0x9e,0x3f},
+ {0x78,0x04},
+ {0x79,0x01},
+ {0xc8,0xf0},
+ {0x79,0x0f},
+ {0xc8,0x00},
+ {0x79,0x10},
+ {0xc8,0x7e},
+ {0x79,0x0a},
+ {0xc8,0x80},
+ {0x79,0x0b},
+ {0xc8,0x01},
+ {0x79,0x0c},
+ {0xc8,0x0f},
+ {0x79,0x0d},
+ {0xc8,0x20},
+ {0x79,0x09},
+ {0xc8,0x80},
+ {0x79,0x02},
+ {0xc8,0xc0},
+ {0x79,0x03},
+ {0xc8,0x40},
+ {0x79,0x05},
+ {0xc8,0x30},
+ {0x79,0x26},
+ {0x62,0x00},
+ {0x63,0x00},
+ {0x64,0x10},
+ {0x65,0x00},
+ {0x66,0x05},
+ {0x94,0x10},
+ {0x95,0x13},
+ {0xbb, 0xa1},
+ {0x7a, 0x28},
+ {0x7b, 0x04},
+ {0x7c, 0x09},
+ {0x7d, 0x16},
+ {0x7e, 0x30},
+ {0x7f, 0x3E},
+ {0x80, 0x4B},
+ {0x81, 0x59},
+ {0x82, 0x67},
+ {0x83, 0x72},
+ {0x84, 0x7c},
+ {0x85, 0x8e},
+ {0x86, 0x9e},
+ {0x87, 0xB6},
+ {0x88, 0xcc},
+ {0x89, 0xE2},
+ {0x4f, 0x96},
+ {0x50, 0x9b},
+ {0x51, 0x05},
+ {0x52, 0x1a},
+ {0x53, 0x7f},
+ {0x54, 0x99},
+ {0x58, 0x1a},
+ {0x4f, 0x7d},
+ {0x50, 0x81},
+ {0x51, 0x04},
+ {0x52, 0x23},
+ {0x53, 0x5a},
+ {0x54, 0x7d},
+ {0x58, 0x1a},
+ {0x43, 0x0a},
+ {0x44, 0xf2},
+ {0x45, 0x4a},
+ {0x46, 0x62},
+ {0x47, 0x2a},
+ {0x48, 0x3d},
+ {0x59, 0xa6},
+ {0x5a, 0xad},
+ {0x5b, 0xbb},
+ {0x5c, 0x7c},
+ {0x5d, 0x53},
+ {0x5e, 0x12},
+ {0x6c, 0x0a},
+ {0x6d, 0x65},
+ {0x6e, 0x11},
+ {0x6f, 0x94},
+ {0x62,0x00},//0x00 for ca513
+ {0x63,0x00},//0x00 for ca513
+ {0x64,0x0e},//0x0e for ca513
+ {0x65,0x00},
+ {0x66,0x05},
+ {0x94,0x0d},
+ {0x95,0x11},
+ {0x24, 0x5e},
+ {0x25, 0x54},
+ {0x26, 0x93},
+ {0x41, 0x38},
+ {0x75, 0x64},
+ {0x76, 0xe1},
+ {0x77, 0x01},
+ {0xc9, 0x30},
+ {0x61, 0x43},
+ {0x11, 0x40},
+ {0x13, 0xff},
+ {0x14, 0x58},
+ {0x75, 0x01},
+ {0xff, 0xff} /* END MARKER */
+};
+#endif
+/*
+ * register setting for color format
+ */
+static const struct ov7690_reg ov7690_RGB565_regs[] = {
+ { OV7690_REG_COM0C, ENABLE_OUTPUTS },//0x06 to enable out
+ { OV7690_REG_COM12, FMT_RGB565 | OFMT_RGB },
+ { I2C_REG_TERM, I2C_VAL_TERM },
+};
+
+static const struct ov7690_reg ov7690_YYUV_regs[] = {
+#if 0
+ { OV7690_REG_COM0C, SWAP_YUV|ENABLE_OUTPUTS },
+#else
+ //{ OV7690_REG_COM0C, ENABLE_OUTPUTS | 1},
+ { OV7690_REG_COM0C, ENABLE_OUTPUTS},
+#endif
+ { OV7690_REG_COM12, OFMT_YUV },
+ { I2C_REG_TERM, I2C_VAL_TERM },
+};
+//For any sake
+//static const struct ov7690_reg ov7690_UVYY_regs[] = {
+// { OV7690_REG_COM0C, 0x00 },
+// { OV7690_REG_COM12, OFMT_YUV },
+// { I2C_REG_TERM, I2C_VAL_TERM },
+//};
+
+static const struct ov7690_reg ov7690_qvga_regs[] = {
+ { 0x16, 0x03 },
+ { 0x17, 0x69 },
+ { 0x18, 0xa4 },
+ { 0x19, 0x06 },
+ { 0x1a, 0xf6 },
+ { 0x22, 0x10 },
+ { 0xc8, 0x02 },
+ { 0xc9, 0x80 },
+ { 0xca, 0x00 },
+ { 0xcb, 0xf0 },
+ { 0xcc, 0x01 },
+ { 0xcd, 0x40 },
+ { 0xce, 0x00 },
+ { 0xcf, 0xf0 },
+ { I2C_REG_TERM, I2C_VAL_TERM },
+};
+
+static const struct ov7690_reg ov7690_vga_regs[] = {
+ { OV7690_REG_COM16, 0x03 },//Magic reserved bits
+ {OV7690_REG_HSTART, 0x69},
+ {OV7690_REG_HSIZE, 0xa4},
+ {OV7690_REG_VSTART, 0x0c},
+ {OV7690_REG_VSIZE, 0xf6},
+ {OV7690_REG_COM22, 0x00},//Optical black ouput disable
+ { 0xc8, 0x02 },//horizontal input size msb
+ { 0xc9, 0x80 },//horizontal input size lsb
+ { 0xca, 0x01 },//vertical input size msb
+ { 0xcb, 0xe0 },//vertical input size lsb
+ { 0xcc, 0x02 },//horizontal output size msb
+ { 0xcd, 0x80 },//horizontal output size lsb
+ { 0xce, 0x01 },//vertical output size msb
+ { 0xcf, 0xe0 },//vertical output size lsb
+ { I2C_REG_TERM, I2C_VAL_TERM },
+};
+
+const static struct ov7690_reg *ov7690_reg_format_init[NUM_FORMAT_SIZES] = {
+ ov7690_YYUV_regs, ov7690_RGB565_regs,
+};
+
+const static struct ov7690_reg *ov7690_reg_size_init[NUM_IMAGE_SIZES] = {
+ ov7690_qvga_regs, ov7690_vga_regs,
+};
+//Forward declaration of driver operations
+static int ov7690_get_control(struct v4l2_subdev *, struct v4l2_control *);
+static int ov7690_set_control(struct v4l2_subdev *, struct v4l2_control *);
+static int ov7690_query_control(struct v4l2_subdev *, struct v4l2_queryctrl *);
+
+static enum image_size ov7690_find_size(unsigned int width, unsigned int height){
+ enum image_size isize;
+ unsigned long pixels = width * height;
+ printk("ovm7690 find size\r\n");
+ for (isize = QVGA; isize < VGA; isize++) {
+ if (ov7690_sizes[isize + 1].height *
+ ov7690_sizes[isize + 1].width > pixels)
+ return isize;
+ }
+ return VGA;
+}
+
+struct ov7690 {
+ struct v4l2_subdev sd;
+ struct v4l2_pix_format pix;
+ struct v4l2_fract timeperframe;
+};
+static inline struct ov7690 *to_ov7690(struct v4l2_subdev *sd){
+ return container_of(sd, struct ov7690, sd);//Funny thing works
+}
+
+static struct i2c_driver ov7690_i2c_driver;
+static unsigned long xclk_current = OV7690_XCLK_NOM;
+
+/* list of image formats supported by ov7690 sensor */
+const static struct v4l2_fmtdesc ov7690_formats[] = {
+ {
+ .description = "RGB565",
+ .pixelformat = V4L2_PIX_FMT_RGB565,
+ },
+ {
+ .description = "YUYV 4:2:2",
+ .pixelformat = V4L2_PIX_FMT_YUYV,
+ }
+};
+
+#define NUM_CAPTURE_FORMATS ARRAY_SIZE(ov7690_formats)
+
+static int ov7690_read_reg(struct i2c_client *client, u8 reg, u8 *val){
+ int ret;
+ ret = i2c_smbus_read_byte_data(client, reg);
+ if (ret >= 0) {
+ *val = (unsigned char) ret;
+ ret = 0;
+ }
+ printk("ov7690 read reg: client: %x, addr: %x, reg: %x, val: %x, ret: %x\r\n", (unsigned int)client->adapter, client->addr, reg, *val, ret);
+ return ret;
+}
+
+static int ov7690_write_reg(struct i2c_client *client, u8 reg, u8 val){
+ int ret = 0;
+ if (!client->adapter) return -ENODEV;
+ //printk("ov7690 write reg: client: %x, addr: %x, reg: %x, val: %x\r\n", (unsigned int)client->adapter, client->addr, reg, val);
+ ret = i2c_smbus_write_byte_data(client, reg, val);
+ if (reg == OV7690_REG_COM12 && (val & COM12_RESET)) msleep(5); /* Wait for reset to run */
+ return ret;
+}
+
+static int ov7690_write_regs(struct v4l2_subdev *sd, struct ov7690_reg *vals){
+ int err = 0;
+ const struct ov7690_reg *list = vals;
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ while (!((list->reg == I2C_REG_TERM) && (list->val == I2C_VAL_TERM))) {
+ err = ov7690_write_reg(client, list->reg,list->val);
+ if (err) return err;
+ msleep(1);
+ list++;
+ }
+ return 0;
+}
+
+static unsigned long ov7690sensor_calc_xclk(void){
+ xclk_current = OV7690_XCLK_NOM;
+ return xclk_current;
+}
+
+static int ov7690_configure(struct v4l2_subdev *sd){
+ struct ov7690 *ov7690 = to_ov7690(sd);
+ struct v4l2_pix_format *pix = &ov7690->pix;
+ enum image_size isize;
+ int err = 0;
+ enum pixel_format pfmt = YUV;
+ unsigned long xclk;
+
+ printk("%s: Configuring \n", __func__);
+ printk("Configuring ov7690_configure\n");
+#ifdef OV7675
+ printk("Configuring ov7695_chip\n");
+ return 0;
+#endif
+ switch (pix->pixelformat) {
+ case V4L2_PIX_FMT_RGB565:
+ case V4L2_PIX_FMT_RGB565X:
+ pfmt = RGB565;
+ break;
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_UYVY:
+ default:
+ pfmt = YUV;
+ break;
+ }
+ xclk = ov7690sensor_calc_xclk();
+ isize = ov7690_find_size(pix->width, pix->height);
+ /* configure pixel format */
+ err = ov7690_write_regs(sd, (struct ov7690_reg *)(ov7690_reg_format_init[pfmt]) );
+ if (err){
+ printk("Configure made error1 %d\r\n", err);
+ return err;
+ }
+ /* configure size */
+ err = ov7690_write_regs(sd, (struct ov7690_reg *)(ov7690_reg_size_init[isize]) );
+ if (err){
+ printk("Configure made error2 %d\r\n", err);
+ return err;
+ }
+ return 0;
+}
+
+static int ov7690_init(struct v4l2_subdev *sd, u32 val){
+ /* Reset and wait two milliseconds */
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ printk("ov7690 initialization function\r\n");
+ ov7690_write_reg(client, OV7690_REG_COM12, COM12_RESET);
+ msleep(5);
+ return ov7690_write_regs(sd, (struct ov7690_reg *)initial_list );
+}
+
+//All that clear about controls
+static int ov7690_query_control(struct v4l2_subdev *sd, struct v4l2_queryctrl *qctr){
+#if 0
+ printk("ov7690 ioctl_queryctrl dummy method\r\n");
+ printk("Def val %x\r\n",qctr->default_value);
+ printk("Name %s\r\n", qctr->name);
+ printk("Type %d\r\n", qctr->type);
+ printk("ID 0x%08x\r\n", qctr->id);
+ //printk("", gctr->)
+#endif
+ return -EINVAL;
+}
+
+static int ov7690_get_control(struct v4l2_subdev *sd, struct v4l2_control *ctrl){
+ printk("ov7690 ioctl_g_ctrl dummy method\r\n");
+ return -EINVAL;
+}
+
+static int ov7690_set_control(struct v4l2_subdev *sd,struct v4l2_control *ctrl){
+ int retval = -EINVAL;
+ printk("ov7690 ioctl_s_ctrl dummy method\r\n");
+ return retval;
+}
+
+static int ov7690_enum_format(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt){
+ int index = fmt->index;
+ enum v4l2_buf_type type = fmt->type;
+ //
+ memset(fmt, 0, sizeof(*fmt));
+ fmt->index = index;
+ fmt->type = type;
+ //
+ printk("%s: Enum format capability\n", __func__);
+ printk("ov7690 ioctl_enum_fmt_cap\r\n");
+ //
+ switch (fmt->type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ if (index >= NUM_CAPTURE_FORMATS) return -EINVAL;
+ break;
+ default:
+ return -EINVAL;
+ }
+ fmt->flags = ov7690_formats[index].flags;
+ strlcpy(fmt->description, ov7690_formats[index].description, sizeof(fmt->description));
+ fmt->pixelformat = ov7690_formats[index].pixelformat;
+ return 0;
+}
+
+static int ov7690_set_stream(struct v4l2_subdev *sd, int enable){
+ printk("OV7690 set stream - dummy method\r\n");
+ return 0;
+}
+
+static int ov7690_try_format(struct v4l2_subdev *sd, struct v4l2_format *f){
+ enum image_size isize;
+ int ifmt;
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+ char* colorspace = 0;
+ switch(f->fmt.pix.colorspace){
+ case V4L2_COLORSPACE_SMPTE170M : colorspace = "V4L2_COLORSPACE_SMPTE170M"; break;
+ case V4L2_COLORSPACE_SMPTE240M : colorspace = "V4L2_COLORSPACE_SMPTE240M"; break;
+ case V4L2_COLORSPACE_REC709 : colorspace = "V4L2_COLORSPACE_REC709"; break;
+ case V4L2_COLORSPACE_BT878 : colorspace = "V4L2_COLORSPACE_BT878"; break;
+ case V4L2_COLORSPACE_470_SYSTEM_M : colorspace = "V4L2_COLORSPACE_470_SYSTEM_M"; break;
+ case V4L2_COLORSPACE_470_SYSTEM_BG : colorspace = "V4L2_COLORSPACE_470_SYSTEM_BG"; break;
+ case V4L2_COLORSPACE_JPEG : colorspace = "V4L2_COLORSPACE_JPEG"; break;
+ case V4L2_COLORSPACE_SRGB : colorspace = "V4L2_COLORSPACE_SRGB"; break;
+ default : colorspace = "NOT SET"; break;
+ }
+#if 0
+ printk("ov7690 try format:\r\n bytes per line: %d\r\npixelformat %c%c%c%c\r\n, colorspace %s\r\n, field %d\r\n, height %d, width %d, sizeimage %d\r\n",
+ f->fmt.pix.bytesperline,
+ ((f->fmt.pix.pixelformat)&0xff),(((f->fmt.pix.pixelformat)>>8)&0xff),(((f->fmt.pix.pixelformat)>>16)&0xff),(((f->fmt.pix.pixelformat)>>24)&0xff),
+ colorspace,
+ f->fmt.pix.field,
+ f->fmt.pix.height,
+ f->fmt.pix.width,
+ f->fmt.pix.sizeimage
+ );
+#endif
+ isize = ov7690_find_size(pix->width, pix->height);
+ pix->width = ov7690_sizes[isize].width;
+ pix->height = ov7690_sizes[isize].height;
+
+ printk("%s: Trying format\n", __func__);
+
+ for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) {
+ if (pix->pixelformat == ov7690_formats[ifmt].pixelformat) break;
+ }
+
+ if (ifmt == NUM_CAPTURE_FORMATS) ifmt = 0;
+
+ pix->pixelformat = ov7690_formats[ifmt].pixelformat;
+ pix->field = V4L2_FIELD_NONE;
+ pix->bytesperline = pix->width * 2;
+ pix->sizeimage = pix->bytesperline * pix->height;
+ pix->priv = 0;
+ switch (pix->pixelformat) {
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_UYVY:
+ default:
+ pix->colorspace = V4L2_COLORSPACE_JPEG;
+ break;
+ case V4L2_PIX_FMT_RGB565:
+ case V4L2_PIX_FMT_RGB565X:
+ pix->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ }
+ return 0;
+}
+
+static int ov7690_set_format(struct v4l2_subdev *sd, struct v4l2_format *f){
+ struct ov7690 *ov7690 = to_ov7690(sd);
+ struct v4l2_pix_format *pix = &f->fmt.pix;
+ int rval;
+ printk("ov7690 set format\r\n");
+ rval = ov7690_try_format(sd, f);
+ if (rval) {
+ printk("%s: Error trying format\n", __func__);
+ return rval;
+ }
+ rval = ov7690_configure(sd);
+ if (!rval) {
+ ov7690->pix = *pix;
+ } else {
+ printk("%s: Error configure format %d\n", __func__, rval);
+ }
+ return rval;
+}
+
+static int ov7690_get_format(struct v4l2_subdev *sd, struct v4l2_format *f){
+ struct ov7690 *ov7690 = to_ov7690(sd);
+ f->fmt.pix = ov7690->pix;
+ printk("ov7690 ioctl_g_fmt_cap\r\n");
+ return 0;
+}
+
+static int ov7690_get_param(struct v4l2_subdev *sd, struct v4l2_streamparm *a){
+ struct ov7690 *ov7690 = to_ov7690(sd);
+ struct v4l2_captureparm *cparm = &a->parm.capture;
+ printk("ov7690 ioctl_g_parm\r\n");
+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) return -EINVAL;
+ memset(a, 0, sizeof(*a));
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ cparm->capability = V4L2_CAP_TIMEPERFRAME;
+ cparm->timeperframe = ov7690->timeperframe;
+ return 0;
+}
+
+static int ov7690_get_chip_id(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *id){
+ struct i2c_client *client = v4l2_get_subdevdata(sd);;
+ printk("ov7690 get chipid\r\n");
+ if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR){
+ printk("match type fails\r\n");
+ return -EINVAL;
+ }
+ if (id->match.addr != client->addr){
+ printk("match addr fails\r\n");
+ return -ENODEV;
+ }
+ id->ident = V4L2_IDENT_OV7690;
+ id->revision = 0;
+ printk("ov7690 chip id ok\r\n");
+ return 0;
+}
+
+static const struct v4l2_subdev_core_ops ov7690_core_ops = {
+ .g_chip_ident = ov7690_get_chip_id,
+ .init = ov7690_init,
+ .queryctrl = ov7690_query_control,
+ .g_ctrl = ov7690_get_control,
+ .s_ctrl = ov7690_set_control,
+};
+
+static const struct v4l2_subdev_video_ops ov7690_video_ops = {
+ .s_fmt = ov7690_set_format,
+ .g_fmt = ov7690_get_format,//Check it correct
+ .try_fmt = ov7690_try_format,
+ .s_stream = ov7690_set_stream,
+ .enum_fmt = ov7690_enum_format,//Check it correct
+ .g_parm = ov7690_get_param//Check it correct
+};
+
+static const struct v4l2_subdev_ops ov7690_ops = {
+ .core = &ov7690_core_ops,
+ .video = &ov7690_video_ops,
+};
+
+static int ov7690_detect(struct i2c_client *client)
+{
+//Shadrin todo improve: may check model ID also
+ u8 midh, midl;
+ printk("Detect ov7690\r\n");
+ if (!client) return -ENODEV;
+
+ if (ov7690_read_reg(client, OV7690_REG_MIDH, &midh)) return -ENODEV;
+ if (ov7690_read_reg(client, OV7690_REG_MIDL, &midl)) return -ENODEV;
+
+ v4l_info(client, "model id detected 0x%02x%02x\n", midh, midl);
+ printk("model id detected 0x%02x%02x\n", midh, midl);
+ if ((midh != OV7690_MIDH_MAGIC)|| (midl != OV7690_MIDL_MAGIC)) {
+ return -ENODEV;
+ }
+ return 0;
+}
+
+static int ov7690_probe(struct i2c_client *client, const struct i2c_device_id *id){
+ struct ov7690 *ov7690;
+ struct v4l2_subdev *sd;
+ int ret;
+ printk("ov7690 probing\n");
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&client->adapter->dev,"I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE_DATA\n");
+ printk("OV7690 failed to check i2c func\r\n");
+ return -EIO;
+ }
+
+ if (!client->dev.platform_data) {
+ dev_err(&client->dev, "No platform data!!\n");
+ printk("OV7690 no platform data\r\n");
+ return -ENODEV;
+ }
+ ov7690 = kzalloc(sizeof(struct ov7690), GFP_KERNEL);
+ if (!ov7690) return -ENOMEM;
+ ret = ov7690_detect(client);
+ if (ret){
+ printk("OV7690 detection failed\r\n");
+ goto clean;
+ }
+ //Filling ov7690 data stucture
+ ov7690->pix.width = OV7690_IMAGE_WIDTH;
+ ov7690->pix.height = OV7690_IMAGE_HEIGHT;
+ ov7690->pix.pixelformat = V4L2_PIX_FMT_YUYV;
+ ov7690->timeperframe.numerator = 1;
+ ov7690->timeperframe.denominator = OV7690_FRAME_RATE;
+ //Register at V4L2 as subdevice
+ sd = &ov7690->sd;
+ //
+ v4l2_i2c_subdev_init(sd, client, &ov7690_ops);
+ //
+ ret = ov7690_init(sd,0);//Last parameter is just dummy value
+ ov7690_configure(sd);//set initial parameters for sensor
+ printk("%s decoder driver registered !!\r\n", sd->name);
+ return 0;
+clean:
+ kfree(ov7690);
+ printk("OV7690 probe failed\r\n");
+ return ret;
+}
+
+static int ov7690_remove(struct i2c_client *client){
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov7690 *ov7690 = to_ov7690(sd);
+ printk("OVM7690 Camera Cube driver remove\r\n");
+ v4l2_device_unregister_subdev(sd);
+ kfree(ov7690);
+ return 0;
+}
+
+static const struct i2c_device_id ov7690_id[] = {
+ { OV7690_DRIVER_NAME, 0 },
+ { },
+};
+MODULE_DEVICE_TABLE(i2c, ov7690_id);
+
+static struct i2c_driver ov7690_i2c_driver = {
+ .driver = {
+ .name = OV7690_DRIVER_NAME,
+ },
+ .probe = ov7690_probe,
+ .remove = ov7690_remove,
+ .id_table = ov7690_id,
+};
+
+static int __init ov7690driver_init(void){
+ int err;
+ printk("OVM7690 Camera Cube secsor init\r\n");
+ err = i2c_add_driver(&ov7690_i2c_driver);
+ if (err) {
+ printk("Failed to register" OV7690_DRIVER_NAME ".\n");
+ return err;
+ }
+ return 0;
+}
+
+static void __exit ov7690driver_cleanup(void){
+ printk("OVM7690 Camera Cube driver cleanup\r\n");
+ i2c_del_driver(&ov7690_i2c_driver);
+}
+
+module_init(ov7690driver_init);
+module_exit(ov7690driver_cleanup);
+
+MODULE_LICENSE("GPL V2");
+MODULE_AUTHOR("Alexander V. Shadrin, alex.virt2real@gmail.com");
+MODULE_DESCRIPTION("ov7690 camera sensor driver");
diff --git a/drivers/media/media-device.c b/drivers/media/media-device.c
deleted file mode 100644
index d01fcb7e..00000000
--- a/drivers/media/media-device.c
+++ /dev/null
@@ -1,384 +0,0 @@
-/*
- * Media device
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-#include <linux/media.h>
-#include <linux/export.h>
-
-#include <media/media-device.h>
-#include <media/media-devnode.h>
-#include <media/media-entity.h>
-
-/* -----------------------------------------------------------------------------
- * Userspace API
- */
-
-static int media_device_open(struct file *filp)
-{
- return 0;
-}
-
-static int media_device_close(struct file *filp)
-{
- return 0;
-}
-
-static int media_device_get_info(struct media_device *dev,
- struct media_device_info __user *__info)
-{
- struct media_device_info info;
-
- memset(&info, 0, sizeof(info));
-
- strlcpy(info.driver, dev->dev->driver->name, sizeof(info.driver));
- strlcpy(info.model, dev->model, sizeof(info.model));
- strlcpy(info.serial, dev->serial, sizeof(info.serial));
- strlcpy(info.bus_info, dev->bus_info, sizeof(info.bus_info));
-
- info.media_version = MEDIA_API_VERSION;
- info.hw_revision = dev->hw_revision;
- info.driver_version = dev->driver_version;
-
- if (copy_to_user(__info, &info, sizeof(*__info)))
- return -EFAULT;
- return 0;
-}
-
-static struct media_entity *find_entity(struct media_device *mdev, u32 id)
-{
- struct media_entity *entity;
- int next = id & MEDIA_ENT_ID_FLAG_NEXT;
-
- id &= ~MEDIA_ENT_ID_FLAG_NEXT;
-
- spin_lock(&mdev->lock);
-
- media_device_for_each_entity(entity, mdev) {
- if ((entity->id == id && !next) ||
- (entity->id > id && next)) {
- spin_unlock(&mdev->lock);
- return entity;
- }
- }
-
- spin_unlock(&mdev->lock);
-
- return NULL;
-}
-
-static long media_device_enum_entities(struct media_device *mdev,
- struct media_entity_desc __user *uent)
-{
- struct media_entity *ent;
- struct media_entity_desc u_ent;
-
- if (copy_from_user(&u_ent.id, &uent->id, sizeof(u_ent.id)))
- return -EFAULT;
-
- ent = find_entity(mdev, u_ent.id);
-
- if (ent == NULL)
- return -EINVAL;
-
- u_ent.id = ent->id;
- u_ent.name[0] = '\0';
- if (ent->name)
- strlcpy(u_ent.name, ent->name, sizeof(u_ent.name));
- u_ent.type = ent->type;
- u_ent.revision = ent->revision;
- u_ent.flags = ent->flags;
- u_ent.group_id = ent->group_id;
- u_ent.pads = ent->num_pads;
- u_ent.links = ent->num_links - ent->num_backlinks;
- memcpy(&u_ent.raw, &ent->info, sizeof(ent->info));
- if (copy_to_user(uent, &u_ent, sizeof(u_ent)))
- return -EFAULT;
- return 0;
-}
-
-static void media_device_kpad_to_upad(const struct media_pad *kpad,
- struct media_pad_desc *upad)
-{
- upad->entity = kpad->entity->id;
- upad->index = kpad->index;
- upad->flags = kpad->flags;
-}
-
-static long media_device_enum_links(struct media_device *mdev,
- struct media_links_enum __user *ulinks)
-{
- struct media_entity *entity;
- struct media_links_enum links;
-
- if (copy_from_user(&links, ulinks, sizeof(links)))
- return -EFAULT;
-
- entity = find_entity(mdev, links.entity);
- if (entity == NULL)
- return -EINVAL;
-
- if (links.pads) {
- unsigned int p;
-
- for (p = 0; p < entity->num_pads; p++) {
- struct media_pad_desc pad;
- media_device_kpad_to_upad(&entity->pads[p], &pad);
- if (copy_to_user(&links.pads[p], &pad, sizeof(pad)))
- return -EFAULT;
- }
- }
-
- if (links.links) {
- struct media_link_desc __user *ulink;
- unsigned int l;
-
- for (l = 0, ulink = links.links; l < entity->num_links; l++) {
- struct media_link_desc link;
-
- /* Ignore backlinks. */
- if (entity->links[l].source->entity != entity)
- continue;
-
- media_device_kpad_to_upad(entity->links[l].source,
- &link.source);
- media_device_kpad_to_upad(entity->links[l].sink,
- &link.sink);
- link.flags = entity->links[l].flags;
- if (copy_to_user(ulink, &link, sizeof(*ulink)))
- return -EFAULT;
- ulink++;
- }
- }
- if (copy_to_user(ulinks, &links, sizeof(*ulinks)))
- return -EFAULT;
- return 0;
-}
-
-static long media_device_setup_link(struct media_device *mdev,
- struct media_link_desc __user *_ulink)
-{
- struct media_link *link = NULL;
- struct media_link_desc ulink;
- struct media_entity *source;
- struct media_entity *sink;
- int ret;
-
- if (copy_from_user(&ulink, _ulink, sizeof(ulink)))
- return -EFAULT;
-
- /* Find the source and sink entities and link.
- */
- source = find_entity(mdev, ulink.source.entity);
- sink = find_entity(mdev, ulink.sink.entity);
-
- if (source == NULL || sink == NULL)
- return -EINVAL;
-
- if (ulink.source.index >= source->num_pads ||
- ulink.sink.index >= sink->num_pads)
- return -EINVAL;
-
- link = media_entity_find_link(&source->pads[ulink.source.index],
- &sink->pads[ulink.sink.index]);
- if (link == NULL)
- return -EINVAL;
-
- /* Setup the link on both entities. */
- ret = __media_entity_setup_link(link, ulink.flags);
-
- if (copy_to_user(_ulink, &ulink, sizeof(ulink)))
- return -EFAULT;
-
- return ret;
-}
-
-static long media_device_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- struct media_devnode *devnode = media_devnode_data(filp);
- struct media_device *dev = to_media_device(devnode);
- long ret;
-
- switch (cmd) {
- case MEDIA_IOC_DEVICE_INFO:
- ret = media_device_get_info(dev,
- (struct media_device_info __user *)arg);
- break;
-
- case MEDIA_IOC_ENUM_ENTITIES:
- ret = media_device_enum_entities(dev,
- (struct media_entity_desc __user *)arg);
- break;
-
- case MEDIA_IOC_ENUM_LINKS:
- mutex_lock(&dev->graph_mutex);
- ret = media_device_enum_links(dev,
- (struct media_links_enum __user *)arg);
- mutex_unlock(&dev->graph_mutex);
- break;
-
- case MEDIA_IOC_SETUP_LINK:
- mutex_lock(&dev->graph_mutex);
- ret = media_device_setup_link(dev,
- (struct media_link_desc __user *)arg);
- mutex_unlock(&dev->graph_mutex);
- break;
-
- default:
- ret = -ENOIOCTLCMD;
- }
-
- return ret;
-}
-
-static const struct media_file_operations media_device_fops = {
- .owner = THIS_MODULE,
- .open = media_device_open,
- .ioctl = media_device_ioctl,
- .release = media_device_close,
-};
-
-/* -----------------------------------------------------------------------------
- * sysfs
- */
-
-static ssize_t show_model(struct device *cd,
- struct device_attribute *attr, char *buf)
-{
- struct media_device *mdev = to_media_device(to_media_devnode(cd));
-
- return sprintf(buf, "%.*s\n", (int)sizeof(mdev->model), mdev->model);
-}
-
-static DEVICE_ATTR(model, S_IRUGO, show_model, NULL);
-
-/* -----------------------------------------------------------------------------
- * Registration/unregistration
- */
-
-static void media_device_release(struct media_devnode *mdev)
-{
-}
-
-/**
- * media_device_register - register a media device
- * @mdev: The media device
- *
- * The caller is responsible for initializing the media device before
- * registration. The following fields must be set:
- *
- * - dev must point to the parent device
- * - model must be filled with the device model name
- */
-int __must_check media_device_register(struct media_device *mdev)
-{
- int ret;
-
- if (WARN_ON(mdev->dev == NULL || mdev->model[0] == 0))
- return -EINVAL;
-
- mdev->entity_id = 1;
- INIT_LIST_HEAD(&mdev->entities);
- spin_lock_init(&mdev->lock);
- mutex_init(&mdev->graph_mutex);
-
- /* Register the device node. */
- mdev->devnode.fops = &media_device_fops;
- mdev->devnode.parent = mdev->dev;
- mdev->devnode.release = media_device_release;
- ret = media_devnode_register(&mdev->devnode);
- if (ret < 0)
- return ret;
-
- ret = device_create_file(&mdev->devnode.dev, &dev_attr_model);
- if (ret < 0) {
- media_devnode_unregister(&mdev->devnode);
- return ret;
- }
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(media_device_register);
-
-/**
- * media_device_unregister - unregister a media device
- * @mdev: The media device
- *
- */
-void media_device_unregister(struct media_device *mdev)
-{
- struct media_entity *entity;
- struct media_entity *next;
-
- list_for_each_entry_safe(entity, next, &mdev->entities, list)
- media_device_unregister_entity(entity);
-
- device_remove_file(&mdev->devnode.dev, &dev_attr_model);
- media_devnode_unregister(&mdev->devnode);
-}
-EXPORT_SYMBOL_GPL(media_device_unregister);
-
-/**
- * media_device_register_entity - Register an entity with a media device
- * @mdev: The media device
- * @entity: The entity
- */
-int __must_check media_device_register_entity(struct media_device *mdev,
- struct media_entity *entity)
-{
- /* Warn if we apparently re-register an entity */
- WARN_ON(entity->parent != NULL);
- entity->parent = mdev;
-
- spin_lock(&mdev->lock);
- if (entity->id == 0)
- entity->id = mdev->entity_id++;
- else
- mdev->entity_id = max(entity->id + 1, mdev->entity_id);
- list_add_tail(&entity->list, &mdev->entities);
- spin_unlock(&mdev->lock);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(media_device_register_entity);
-
-/**
- * media_device_unregister_entity - Unregister an entity
- * @entity: The entity
- *
- * If the entity has never been registered this function will return
- * immediately.
- */
-void media_device_unregister_entity(struct media_entity *entity)
-{
- struct media_device *mdev = entity->parent;
-
- if (mdev == NULL)
- return;
-
- spin_lock(&mdev->lock);
- list_del(&entity->list);
- spin_unlock(&mdev->lock);
- entity->parent = NULL;
-}
-EXPORT_SYMBOL_GPL(media_device_unregister_entity);
diff --git a/drivers/media/media-devnode.c b/drivers/media/media-devnode.c
deleted file mode 100644
index 023b2a1c..00000000
--- a/drivers/media/media-devnode.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * Media device node
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Based on drivers/media/video/v4l2_dev.c code authored by
- * Mauro Carvalho Chehab <mchehab@infradead.org> (version 2)
- * Alan Cox, <alan@lxorguk.ukuu.org.uk> (version 1)
- *
- * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * --
- *
- * Generic media device node infrastructure to register and unregister
- * character devices using a dynamic major number and proper reference
- * counting.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/kmod.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/uaccess.h>
-
-#include <media/media-devnode.h>
-
-#define MEDIA_NUM_DEVICES 256
-#define MEDIA_NAME "media"
-
-static dev_t media_dev_t;
-
-/*
- * Active devices
- */
-static DEFINE_MUTEX(media_devnode_lock);
-static DECLARE_BITMAP(media_devnode_nums, MEDIA_NUM_DEVICES);
-
-/* Called when the last user of the media device exits. */
-static void media_devnode_release(struct device *cd)
-{
- struct media_devnode *mdev = to_media_devnode(cd);
-
- mutex_lock(&media_devnode_lock);
-
- /* Delete the cdev on this minor as well */
- cdev_del(&mdev->cdev);
-
- /* Mark device node number as free */
- clear_bit(mdev->minor, media_devnode_nums);
-
- mutex_unlock(&media_devnode_lock);
-
- /* Release media_devnode and perform other cleanups as needed. */
- if (mdev->release)
- mdev->release(mdev);
-}
-
-static struct bus_type media_bus_type = {
- .name = MEDIA_NAME,
-};
-
-static ssize_t media_read(struct file *filp, char __user *buf,
- size_t sz, loff_t *off)
-{
- struct media_devnode *mdev = media_devnode_data(filp);
-
- if (!mdev->fops->read)
- return -EINVAL;
- if (!media_devnode_is_registered(mdev))
- return -EIO;
- return mdev->fops->read(filp, buf, sz, off);
-}
-
-static ssize_t media_write(struct file *filp, const char __user *buf,
- size_t sz, loff_t *off)
-{
- struct media_devnode *mdev = media_devnode_data(filp);
-
- if (!mdev->fops->write)
- return -EINVAL;
- if (!media_devnode_is_registered(mdev))
- return -EIO;
- return mdev->fops->write(filp, buf, sz, off);
-}
-
-static unsigned int media_poll(struct file *filp,
- struct poll_table_struct *poll)
-{
- struct media_devnode *mdev = media_devnode_data(filp);
-
- if (!media_devnode_is_registered(mdev))
- return POLLERR | POLLHUP;
- if (!mdev->fops->poll)
- return DEFAULT_POLLMASK;
- return mdev->fops->poll(filp, poll);
-}
-
-static long media_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- struct media_devnode *mdev = media_devnode_data(filp);
-
- if (!mdev->fops->ioctl)
- return -ENOTTY;
-
- if (!media_devnode_is_registered(mdev))
- return -EIO;
-
- return mdev->fops->ioctl(filp, cmd, arg);
-}
-
-/* Override for the open function */
-static int media_open(struct inode *inode, struct file *filp)
-{
- struct media_devnode *mdev;
- int ret;
-
- /* Check if the media device is available. This needs to be done with
- * the media_devnode_lock held to prevent an open/unregister race:
- * without the lock, the device could be unregistered and freed between
- * the media_devnode_is_registered() and get_device() calls, leading to
- * a crash.
- */
- mutex_lock(&media_devnode_lock);
- mdev = container_of(inode->i_cdev, struct media_devnode, cdev);
- /* return ENXIO if the media device has been removed
- already or if it is not registered anymore. */
- if (!media_devnode_is_registered(mdev)) {
- mutex_unlock(&media_devnode_lock);
- return -ENXIO;
- }
- /* and increase the device refcount */
- get_device(&mdev->dev);
- mutex_unlock(&media_devnode_lock);
-
- filp->private_data = mdev;
-
- if (mdev->fops->open) {
- ret = mdev->fops->open(filp);
- if (ret) {
- put_device(&mdev->dev);
- return ret;
- }
- }
-
- return 0;
-}
-
-/* Override for the release function */
-static int media_release(struct inode *inode, struct file *filp)
-{
- struct media_devnode *mdev = media_devnode_data(filp);
- int ret = 0;
-
- if (mdev->fops->release)
- mdev->fops->release(filp);
-
- /* decrease the refcount unconditionally since the release()
- return value is ignored. */
- put_device(&mdev->dev);
- filp->private_data = NULL;
- return ret;
-}
-
-static const struct file_operations media_devnode_fops = {
- .owner = THIS_MODULE,
- .read = media_read,
- .write = media_write,
- .open = media_open,
- .unlocked_ioctl = media_ioctl,
- .release = media_release,
- .poll = media_poll,
- .llseek = no_llseek,
-};
-
-/**
- * media_devnode_register - register a media device node
- * @mdev: media device node structure we want to register
- *
- * The registration code assigns minor numbers and registers the new device node
- * with the kernel. An error is returned if no free minor number can be found,
- * or if the registration of the device node fails.
- *
- * Zero is returned on success.
- *
- * Note that if the media_devnode_register call fails, the release() callback of
- * the media_devnode structure is *not* called, so the caller is responsible for
- * freeing any data.
- */
-int __must_check media_devnode_register(struct media_devnode *mdev)
-{
- int minor;
- int ret;
-
- /* Part 1: Find a free minor number */
- mutex_lock(&media_devnode_lock);
- minor = find_next_zero_bit(media_devnode_nums, MEDIA_NUM_DEVICES, 0);
- if (minor == MEDIA_NUM_DEVICES) {
- mutex_unlock(&media_devnode_lock);
- pr_err("could not get a free minor\n");
- return -ENFILE;
- }
-
- set_bit(minor, media_devnode_nums);
- mutex_unlock(&media_devnode_lock);
-
- mdev->minor = minor;
-
- /* Part 2: Initialize and register the character device */
- cdev_init(&mdev->cdev, &media_devnode_fops);
- mdev->cdev.owner = mdev->fops->owner;
-
- ret = cdev_add(&mdev->cdev, MKDEV(MAJOR(media_dev_t), mdev->minor), 1);
- if (ret < 0) {
- pr_err("%s: cdev_add failed\n", __func__);
- goto error;
- }
-
- /* Part 3: Register the media device */
- mdev->dev.bus = &media_bus_type;
- mdev->dev.devt = MKDEV(MAJOR(media_dev_t), mdev->minor);
- mdev->dev.release = media_devnode_release;
- if (mdev->parent)
- mdev->dev.parent = mdev->parent;
- dev_set_name(&mdev->dev, "media%d", mdev->minor);
- ret = device_register(&mdev->dev);
- if (ret < 0) {
- pr_err("%s: device_register failed\n", __func__);
- goto error;
- }
-
- /* Part 4: Activate this minor. The char device can now be used. */
- set_bit(MEDIA_FLAG_REGISTERED, &mdev->flags);
-
- return 0;
-
-error:
- cdev_del(&mdev->cdev);
- clear_bit(mdev->minor, media_devnode_nums);
- return ret;
-}
-
-/**
- * media_devnode_unregister - unregister a media device node
- * @mdev: the device node to unregister
- *
- * This unregisters the passed device. Future open calls will be met with
- * errors.
- *
- * This function can safely be called if the device node has never been
- * registered or has already been unregistered.
- */
-void media_devnode_unregister(struct media_devnode *mdev)
-{
- /* Check if mdev was ever registered at all */
- if (!media_devnode_is_registered(mdev))
- return;
-
- mutex_lock(&media_devnode_lock);
- clear_bit(MEDIA_FLAG_REGISTERED, &mdev->flags);
- mutex_unlock(&media_devnode_lock);
- device_unregister(&mdev->dev);
-}
-
-/*
- * Initialise media for linux
- */
-static int __init media_devnode_init(void)
-{
- int ret;
-
- pr_info("Linux media interface: v0.10\n");
- ret = alloc_chrdev_region(&media_dev_t, 0, MEDIA_NUM_DEVICES,
- MEDIA_NAME);
- if (ret < 0) {
- pr_warn("unable to allocate major\n");
- return ret;
- }
-
- ret = bus_register(&media_bus_type);
- if (ret < 0) {
- unregister_chrdev_region(media_dev_t, MEDIA_NUM_DEVICES);
- pr_warn("bus_register failed\n");
- return -EIO;
- }
-
- return 0;
-}
-
-static void __exit media_devnode_exit(void)
-{
- bus_unregister(&media_bus_type);
- unregister_chrdev_region(media_dev_t, MEDIA_NUM_DEVICES);
-}
-
-subsys_initcall(media_devnode_init);
-module_exit(media_devnode_exit)
-
-MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
-MODULE_DESCRIPTION("Device node registration for media drivers");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/media-entity.c b/drivers/media/media-entity.c
deleted file mode 100644
index e1cd1328..00000000
--- a/drivers/media/media-entity.c
+++ /dev/null
@@ -1,593 +0,0 @@
-/*
- * Media entity
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <media/media-entity.h>
-#include <media/media-device.h>
-
-/**
- * media_entity_init - Initialize a media entity
- *
- * @num_pads: Total number of sink and source pads.
- * @extra_links: Initial estimate of the number of extra links.
- * @pads: Array of 'num_pads' pads.
- *
- * The total number of pads is an intrinsic property of entities known by the
- * entity driver, while the total number of links depends on hardware design
- * and is an extrinsic property unknown to the entity driver. However, in most
- * use cases the entity driver can guess the number of links which can safely
- * be assumed to be equal to or larger than the number of pads.
- *
- * For those reasons the links array can be preallocated based on the entity
- * driver guess and will be reallocated later if extra links need to be
- * created.
- *
- * This function allocates a links array with enough space to hold at least
- * 'num_pads' + 'extra_links' elements. The media_entity::max_links field will
- * be set to the number of allocated elements.
- *
- * The pads array is managed by the entity driver and passed to
- * media_entity_init() where its pointer will be stored in the entity structure.
- */
-int
-media_entity_init(struct media_entity *entity, u16 num_pads,
- struct media_pad *pads, u16 extra_links)
-{
- struct media_link *links;
- unsigned int max_links = num_pads + extra_links;
- unsigned int i;
-
- links = kzalloc(max_links * sizeof(links[0]), GFP_KERNEL);
- if (links == NULL)
- return -ENOMEM;
-
- entity->group_id = 0;
- entity->max_links = max_links;
- entity->num_links = 0;
- entity->num_backlinks = 0;
- entity->num_pads = num_pads;
- entity->pads = pads;
- entity->links = links;
-
- for (i = 0; i < num_pads; i++) {
- pads[i].entity = entity;
- pads[i].index = i;
- }
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(media_entity_init);
-
-void
-media_entity_cleanup(struct media_entity *entity)
-{
- kfree(entity->links);
-}
-EXPORT_SYMBOL_GPL(media_entity_cleanup);
-
-/* -----------------------------------------------------------------------------
- * Graph traversal
- */
-
-static struct media_entity *
-media_entity_other(struct media_entity *entity, struct media_link *link)
-{
- if (link->source->entity == entity)
- return link->sink->entity;
- else
- return link->source->entity;
-}
-
-/* push an entity to traversal stack */
-static void stack_push(struct media_entity_graph *graph,
- struct media_entity *entity)
-{
- if (graph->top == MEDIA_ENTITY_ENUM_MAX_DEPTH - 1) {
- WARN_ON(1);
- return;
- }
- graph->top++;
- graph->stack[graph->top].link = 0;
- graph->stack[graph->top].entity = entity;
-}
-
-static struct media_entity *stack_pop(struct media_entity_graph *graph)
-{
- struct media_entity *entity;
-
- entity = graph->stack[graph->top].entity;
- graph->top--;
-
- return entity;
-}
-
-#define stack_peek(en) ((en)->stack[(en)->top - 1].entity)
-#define link_top(en) ((en)->stack[(en)->top].link)
-#define stack_top(en) ((en)->stack[(en)->top].entity)
-
-/**
- * media_entity_graph_walk_start - Start walking the media graph at a given entity
- * @graph: Media graph structure that will be used to walk the graph
- * @entity: Starting entity
- *
- * This function initializes the graph traversal structure to walk the entities
- * graph starting at the given entity. The traversal structure must not be
- * modified by the caller during graph traversal. When done the structure can
- * safely be freed.
- */
-void media_entity_graph_walk_start(struct media_entity_graph *graph,
- struct media_entity *entity)
-{
- graph->top = 0;
- graph->stack[graph->top].entity = NULL;
- stack_push(graph, entity);
-}
-EXPORT_SYMBOL_GPL(media_entity_graph_walk_start);
-
-/**
- * media_entity_graph_walk_next - Get the next entity in the graph
- * @graph: Media graph structure
- *
- * Perform a depth-first traversal of the given media entities graph.
- *
- * The graph structure must have been previously initialized with a call to
- * media_entity_graph_walk_start().
- *
- * Return the next entity in the graph or NULL if the whole graph have been
- * traversed.
- */
-struct media_entity *
-media_entity_graph_walk_next(struct media_entity_graph *graph)
-{
- if (stack_top(graph) == NULL)
- return NULL;
-
- /*
- * Depth first search. Push entity to stack and continue from
- * top of the stack until no more entities on the level can be
- * found.
- */
- while (link_top(graph) < stack_top(graph)->num_links) {
- struct media_entity *entity = stack_top(graph);
- struct media_link *link = &entity->links[link_top(graph)];
- struct media_entity *next;
-
- /* The link is not enabled so we do not follow. */
- if (!(link->flags & MEDIA_LNK_FL_ENABLED)) {
- link_top(graph)++;
- continue;
- }
-
- /* Get the entity in the other end of the link . */
- next = media_entity_other(entity, link);
-
- /* Was it the entity we came here from? */
- if (next == stack_peek(graph)) {
- link_top(graph)++;
- continue;
- }
-
- /* Push the new entity to stack and start over. */
- link_top(graph)++;
- stack_push(graph, next);
- }
-
- return stack_pop(graph);
-}
-EXPORT_SYMBOL_GPL(media_entity_graph_walk_next);
-
-/* -----------------------------------------------------------------------------
- * Pipeline management
- */
-
-/**
- * media_entity_pipeline_start - Mark a pipeline as streaming
- * @entity: Starting entity
- * @pipe: Media pipeline to be assigned to all entities in the pipeline.
- *
- * Mark all entities connected to a given entity through enabled links, either
- * directly or indirectly, as streaming. The given pipeline object is assigned to
- * every entity in the pipeline and stored in the media_entity pipe field.
- *
- * Calls to this function can be nested, in which case the same number of
- * media_entity_pipeline_stop() calls will be required to stop streaming. The
- * pipeline pointer must be identical for all nested calls to
- * media_entity_pipeline_start().
- */
-__must_check int media_entity_pipeline_start(struct media_entity *entity,
- struct media_pipeline *pipe)
-{
- struct media_device *mdev = entity->parent;
- struct media_entity_graph graph;
- struct media_entity *entity_err = entity;
- int ret;
-
- mutex_lock(&mdev->graph_mutex);
-
- media_entity_graph_walk_start(&graph, entity);
-
- while ((entity = media_entity_graph_walk_next(&graph))) {
- unsigned int i;
-
- entity->stream_count++;
- WARN_ON(entity->pipe && entity->pipe != pipe);
- entity->pipe = pipe;
-
- /* Already streaming --- no need to check. */
- if (entity->stream_count > 1)
- continue;
-
- if (!entity->ops || !entity->ops->link_validate)
- continue;
-
- for (i = 0; i < entity->num_links; i++) {
- struct media_link *link = &entity->links[i];
-
- /* Is this pad part of an enabled link? */
- if (!(link->flags & MEDIA_LNK_FL_ENABLED))
- continue;
-
- /* Are we the sink or not? */
- if (link->sink->entity != entity)
- continue;
-
- ret = entity->ops->link_validate(link);
- if (ret < 0 && ret != -ENOIOCTLCMD)
- goto error;
- }
- }
-
- mutex_unlock(&mdev->graph_mutex);
-
- return 0;
-
-error:
- /*
- * Link validation on graph failed. We revert what we did and
- * return the error.
- */
- media_entity_graph_walk_start(&graph, entity_err);
-
- while ((entity_err = media_entity_graph_walk_next(&graph))) {
- entity_err->stream_count--;
- if (entity_err->stream_count == 0)
- entity_err->pipe = NULL;
-
- /*
- * We haven't increased stream_count further than this
- * so we quit here.
- */
- if (entity_err == entity)
- break;
- }
-
- mutex_unlock(&mdev->graph_mutex);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(media_entity_pipeline_start);
-
-/**
- * media_entity_pipeline_stop - Mark a pipeline as not streaming
- * @entity: Starting entity
- *
- * Mark all entities connected to a given entity through enabled links, either
- * directly or indirectly, as not streaming. The media_entity pipe field is
- * reset to NULL.
- *
- * If multiple calls to media_entity_pipeline_start() have been made, the same
- * number of calls to this function are required to mark the pipeline as not
- * streaming.
- */
-void media_entity_pipeline_stop(struct media_entity *entity)
-{
- struct media_device *mdev = entity->parent;
- struct media_entity_graph graph;
-
- mutex_lock(&mdev->graph_mutex);
-
- media_entity_graph_walk_start(&graph, entity);
-
- while ((entity = media_entity_graph_walk_next(&graph))) {
- entity->stream_count--;
- if (entity->stream_count == 0)
- entity->pipe = NULL;
- }
-
- mutex_unlock(&mdev->graph_mutex);
-}
-EXPORT_SYMBOL_GPL(media_entity_pipeline_stop);
-
-/* -----------------------------------------------------------------------------
- * Module use count
- */
-
-/*
- * media_entity_get - Get a reference to the parent module
- * @entity: The entity
- *
- * Get a reference to the parent media device module.
- *
- * The function will return immediately if @entity is NULL.
- *
- * Return a pointer to the entity on success or NULL on failure.
- */
-struct media_entity *media_entity_get(struct media_entity *entity)
-{
- if (entity == NULL)
- return NULL;
-
- if (entity->parent->dev &&
- !try_module_get(entity->parent->dev->driver->owner))
- return NULL;
-
- return entity;
-}
-EXPORT_SYMBOL_GPL(media_entity_get);
-
-/*
- * media_entity_put - Release the reference to the parent module
- * @entity: The entity
- *
- * Release the reference count acquired by media_entity_get().
- *
- * The function will return immediately if @entity is NULL.
- */
-void media_entity_put(struct media_entity *entity)
-{
- if (entity == NULL)
- return;
-
- if (entity->parent->dev)
- module_put(entity->parent->dev->driver->owner);
-}
-EXPORT_SYMBOL_GPL(media_entity_put);
-
-/* -----------------------------------------------------------------------------
- * Links management
- */
-
-static struct media_link *media_entity_add_link(struct media_entity *entity)
-{
- if (entity->num_links >= entity->max_links) {
- struct media_link *links = entity->links;
- unsigned int max_links = entity->max_links + 2;
- unsigned int i;
-
- links = krealloc(links, max_links * sizeof(*links), GFP_KERNEL);
- if (links == NULL)
- return NULL;
-
- for (i = 0; i < entity->num_links; i++)
- links[i].reverse->reverse = &links[i];
-
- entity->max_links = max_links;
- entity->links = links;
- }
-
- return &entity->links[entity->num_links++];
-}
-
-int
-media_entity_create_link(struct media_entity *source, u16 source_pad,
- struct media_entity *sink, u16 sink_pad, u32 flags)
-{
- struct media_link *link;
- struct media_link *backlink;
-
- BUG_ON(source == NULL || sink == NULL);
- BUG_ON(source_pad >= source->num_pads);
- BUG_ON(sink_pad >= sink->num_pads);
-
- link = media_entity_add_link(source);
- if (link == NULL)
- return -ENOMEM;
-
- link->source = &source->pads[source_pad];
- link->sink = &sink->pads[sink_pad];
- link->flags = flags;
-
- /* Create the backlink. Backlinks are used to help graph traversal and
- * are not reported to userspace.
- */
- backlink = media_entity_add_link(sink);
- if (backlink == NULL) {
- source->num_links--;
- return -ENOMEM;
- }
-
- backlink->source = &source->pads[source_pad];
- backlink->sink = &sink->pads[sink_pad];
- backlink->flags = flags;
-
- link->reverse = backlink;
- backlink->reverse = link;
-
- sink->num_backlinks++;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(media_entity_create_link);
-
-static int __media_entity_setup_link_notify(struct media_link *link, u32 flags)
-{
- int ret;
-
- /* Notify both entities. */
- ret = media_entity_call(link->source->entity, link_setup,
- link->source, link->sink, flags);
- if (ret < 0 && ret != -ENOIOCTLCMD)
- return ret;
-
- ret = media_entity_call(link->sink->entity, link_setup,
- link->sink, link->source, flags);
- if (ret < 0 && ret != -ENOIOCTLCMD) {
- media_entity_call(link->source->entity, link_setup,
- link->source, link->sink, link->flags);
- return ret;
- }
-
- link->flags = flags;
- link->reverse->flags = link->flags;
-
- return 0;
-}
-
-/**
- * __media_entity_setup_link - Configure a media link
- * @link: The link being configured
- * @flags: Link configuration flags
- *
- * The bulk of link setup is handled by the two entities connected through the
- * link. This function notifies both entities of the link configuration change.
- *
- * If the link is immutable or if the current and new configuration are
- * identical, return immediately.
- *
- * The user is expected to hold link->source->parent->mutex. If not,
- * media_entity_setup_link() should be used instead.
- */
-int __media_entity_setup_link(struct media_link *link, u32 flags)
-{
- const u32 mask = MEDIA_LNK_FL_ENABLED;
- struct media_device *mdev;
- struct media_entity *source, *sink;
- int ret = -EBUSY;
-
- if (link == NULL)
- return -EINVAL;
-
- /* The non-modifiable link flags must not be modified. */
- if ((link->flags & ~mask) != (flags & ~mask))
- return -EINVAL;
-
- if (link->flags & MEDIA_LNK_FL_IMMUTABLE)
- return link->flags == flags ? 0 : -EINVAL;
-
- if (link->flags == flags)
- return 0;
-
- source = link->source->entity;
- sink = link->sink->entity;
-
- if (!(link->flags & MEDIA_LNK_FL_DYNAMIC) &&
- (source->stream_count || sink->stream_count))
- return -EBUSY;
-
- mdev = source->parent;
-
- if ((flags & MEDIA_LNK_FL_ENABLED) && mdev->link_notify) {
- ret = mdev->link_notify(link->source, link->sink,
- MEDIA_LNK_FL_ENABLED);
- if (ret < 0)
- return ret;
- }
-
- ret = __media_entity_setup_link_notify(link, flags);
- if (ret < 0)
- goto err;
-
- if (!(flags & MEDIA_LNK_FL_ENABLED) && mdev->link_notify)
- mdev->link_notify(link->source, link->sink, 0);
-
- return 0;
-
-err:
- if ((flags & MEDIA_LNK_FL_ENABLED) && mdev->link_notify)
- mdev->link_notify(link->source, link->sink, 0);
-
- return ret;
-}
-
-int media_entity_setup_link(struct media_link *link, u32 flags)
-{
- int ret;
-
- mutex_lock(&link->source->entity->parent->graph_mutex);
- ret = __media_entity_setup_link(link, flags);
- mutex_unlock(&link->source->entity->parent->graph_mutex);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(media_entity_setup_link);
-
-/**
- * media_entity_find_link - Find a link between two pads
- * @source: Source pad
- * @sink: Sink pad
- *
- * Return a pointer to the link between the two entities. If no such link
- * exists, return NULL.
- */
-struct media_link *
-media_entity_find_link(struct media_pad *source, struct media_pad *sink)
-{
- struct media_link *link;
- unsigned int i;
-
- for (i = 0; i < source->entity->num_links; ++i) {
- link = &source->entity->links[i];
-
- if (link->source->entity == source->entity &&
- link->source->index == source->index &&
- link->sink->entity == sink->entity &&
- link->sink->index == sink->index)
- return link;
- }
-
- return NULL;
-}
-EXPORT_SYMBOL_GPL(media_entity_find_link);
-
-/**
- * media_entity_remote_source - Find the source pad at the remote end of a link
- * @pad: Sink pad at the local end of the link
- *
- * Search for a remote source pad connected to the given sink pad by iterating
- * over all links originating or terminating at that pad until an enabled link
- * is found.
- *
- * Return a pointer to the pad at the remote end of the first found enabled
- * link, or NULL if no enabled link has been found.
- */
-struct media_pad *media_entity_remote_source(struct media_pad *pad)
-{
- unsigned int i;
-
- for (i = 0; i < pad->entity->num_links; i++) {
- struct media_link *link = &pad->entity->links[i];
-
- if (!(link->flags & MEDIA_LNK_FL_ENABLED))
- continue;
-
- if (link->source == pad)
- return link->sink;
-
- if (link->sink == pad)
- return link->source;
- }
-
- return NULL;
-
-}
-EXPORT_SYMBOL_GPL(media_entity_remote_source);
diff --git a/drivers/media/pci/cx25821/cx25821-video.c b/drivers/media/pci/cx25821/cx25821-video.c
index 31ce7698..d4de021d 100644
--- a/drivers/media/pci/cx25821/cx25821-video.c
+++ b/drivers/media/pci/cx25821/cx25821-video.c
@@ -461,7 +461,7 @@ int cx25821_video_register(struct cx25821_dev *dev)
spin_lock_init(&dev->slock);
- for (i = 0; i < VID_CHANNEL_NUM; ++i) {
+ for (i = 0; i < MAX_VID_CHANNEL_NUM - 1; ++i) {
cx25821_init_controls(dev, i);
cx25821_risc_stopper(dev->pci, &dev->channels[i].vidq.stopper,
diff --git a/drivers/media/platform/davinci/Kconfig b/drivers/media/platform/davinci/Kconfig
index ccfde4eb..31f56a40 100644
--- a/drivers/media/platform/davinci/Kconfig
+++ b/drivers/media/platform/davinci/Kconfig
@@ -1,34 +1,103 @@
config VIDEO_DAVINCI_VPIF_DISPLAY
- tristate "DM646x/DA850/OMAPL138 EVM Video Display"
+ tristate "DaVinci Video VPIF Display"
depends on VIDEO_DEV && (MACH_DAVINCI_DM6467_EVM || MACH_DAVINCI_DA850_EVM)
- select VIDEOBUF2_DMA_CONTIG
+ select VIDEOBUF_DMA_CONTIG
select VIDEO_DAVINCI_VPIF
- select VIDEO_ADV7343 if MEDIA_SUBDRV_AUTOSELECT
- select VIDEO_THS7303 if MEDIA_SUBDRV_AUTOSELECT
+ select VIDEO_ADV7343
+ select VIDEO_THS7303
help
- Enables Davinci VPIF module used for display devices.
- This module is common for following DM6467/DA850/OMAPL138
- based display devices.
-
+ Support for DaVinci VPIF Display on DM6467 EVM and/or DA850/OMAP-L138/AM18xx EVM.
To compile this driver as a module, choose M here: the
module will be called vpif_display.
+config VIDEO_DM355_AF
+ tristate "DM355 Auto Focus Driver"
+ depends on ARCH_DAVINCI_DM355
+ default y
+ help
+ Support for dm355 AF hardware.
+
+ Auto Focus programming functions which are used to support
+ control loop for Auto Focus. It collects metrics about the
+ image or video data,
+
+config VIDEO_DM355_AEW
+ tristate "DM355 Auto exposure /White Balance Driver"
+ depends on ARCH_DAVINCI_DM355
+ help
+ Support for dm355 hardware.
+
+ DM355 Auto Exposure and Auto White Balance programming functions
+ which are used to support the control loops for Auto Exposure and
+ Auto White Balance. It collects metrics about the image or video data
+
+config VIDEO_DM365_3A_HW
+ tristate "DM365 Auto Focus, Auto Exposure/ White Balance HW module"
+ depends on ARCH_DAVINCI_DM365
+ help
+ DM365 Auto Focus, Auto Exposure and Auto White Balancing HW module
+
+ This module has functions which configure AEW/AF hardware, high level
+ AF module and AEW module use these functionalities. It collects metrics
+ about the image or video data
+
+config VIDEO_DM365_AF
+ tristate "DM365 Auto Focus Driver"
+ depends on ARCH_DAVINCI_DM365
+ select VIDEO_DM365_3A_HW
+ help
+ DM365 Auto Focus hardware module.
+
+ Auto Focus driver is used to support control loop for Auto Focus.
+ It collects metrics about the image or video data. This provides
+ hooks to AF subdevice driver.
+
+config VIDEO_DM365_AEW
+ tristate "DM365 Auto exposure /White Balance Driver"
+ depends on ARCH_DAVINCI_DM365
+ select VIDEO_DM365_3A_HW
+ help
+ DM365 Auto Exposure and Auto White Balance hardware module.
+
+ This is used to support the control loops for Auto Exposure
+ and Auto White Balance. It collects metrics about the image
+ or video data
+
+config DM365_IPIPE
+ depends on ARCH_DAVINCI && ARCH_DAVINCI_DM365
+ tristate "DM365 IPIPE"
+ help
+ dm365 IPIPE hardware module.
+
+ This is the hardware module that implements imp_hw_interface
+ for DM365. This hardware module provides previewer and resizer
+ functionality for image processing.
+
+config IMP_DEBUG
+ depends on (DM355_IPIPE || DM365_IPIPE)
+ bool "IMP Debug support"
+ default n
+ help
+ Enable dumping of Image PIPE configuration to console
+
+ This option enables debug information to be dumped onto console,
+ helps user in finding the contents of registers during the failing
+ case and rootcause the issue.
+
config VIDEO_DAVINCI_VPIF_CAPTURE
- tristate "DM646x/DA850/OMAPL138 EVM Video Capture"
+ tristate "DaVinci Video VPIF Capture"
depends on VIDEO_DEV && (MACH_DAVINCI_DM6467_EVM || MACH_DAVINCI_DA850_EVM)
- select VIDEOBUF2_DMA_CONTIG
+ select VIDEOBUF_DMA_CONTIG
select VIDEO_DAVINCI_VPIF
help
- Enables Davinci VPIF module used for captur devices.
- This module is common for following DM6467/DA850/OMAPL138
- based capture devices.
+ Support for DaVinci VPIF Capture on DM6467 EVM and/or DA850/OMAP-L138/AM18xx EVM.
To compile this driver as a module, choose M here: the
module will be called vpif_capture.
config VIDEO_DAVINCI_VPIF
tristate "DaVinci VPIF Driver"
- depends on VIDEO_DAVINCI_VPIF_DISPLAY || VIDEO_DAVINCI_VPIF_CAPTURE
+ depends on VIDEO_DAVINCI_VPIF_DISPLAY
help
Support for DaVinci VPIF Driver.
@@ -44,7 +113,6 @@ config VIDEO_VPSS_SYSTEM
config VIDEO_VPFE_CAPTURE
tristate "VPFE Video Capture Driver"
depends on VIDEO_V4L2 && (ARCH_DAVINCI || ARCH_OMAP3)
- depends on I2C
select VIDEOBUF_DMA_CONTIG
help
Support for DMx/AMx VPFE based frame grabber. This is the
@@ -53,10 +121,20 @@ config VIDEO_VPFE_CAPTURE
To compile this driver as a module, choose M here: the
module will be called vpfe-capture.
+
+config VIDEO_YCBCR
+ depends on (VIDEO_VPFE_CAPTURE)
+ bool "VPFE YCBCR format support"
+ default y
+ help
+ Enables support for YCbCr camera
+ This is temporary option that enables to support YCbCr camera with resolution 640x480.
+ Later image format will be detected automatically
+
config VIDEO_DM6446_CCDC
tristate "DM6446 CCDC HW module"
- depends on VIDEO_VPFE_CAPTURE
+ depends on VIDEO_VPFE_CAPTURE && ARCH_DAVINCI_DM644x
select VIDEO_VPSS_SYSTEM
default y
help
@@ -83,9 +161,28 @@ config VIDEO_DM355_CCDC
To compile this driver as a module, choose M here: the
module will be called vpfe.
+
+config VIDEO_DM365_ISIF
+ tristate "DM365 CCDC/ISIF HW module"
+ depends on ARCH_DAVINCI_DM365 && VIDEO_VPFE_CAPTURE
+ default y
+ help
+ Enables DM365 ISIF hw module. This is the hardware module for
+ configuring ISIF in VPFE to capture Raw Bayer RGB data from
+ a image sensor or YUV data from a YUV source.
+
+config DM355_IPIPE
+ depends on ARCH_DAVINCI && ARCH_DAVINCI_DM355
+ tristate "DM355 IPIPE"
+ help
+ dm355 IPIPE hw programming module.
+
+ This is the hardware module that implements imp_hw_interface
+ for DM355. This hardware module provides previewer and resizer
+ configuration functionality for image processing.
config VIDEO_ISIF
- tristate "ISIF HW module"
+ tristate "DM365 ISIF HW module"
depends on ARCH_DAVINCI_DM365 && VIDEO_VPFE_CAPTURE
select VIDEO_VPSS_SYSTEM
default y
@@ -97,15 +194,63 @@ config VIDEO_ISIF
To compile this driver as a module, choose M here: the
module will be called vpfe.
-config VIDEO_DAVINCI_VPBE_DISPLAY
- tristate "DM644X/DM365/DM355 VPBE HW module"
- depends on ARCH_DAVINCI_DM644x || ARCH_DAVINCI_DM355 || ARCH_DAVINCI_DM365
+config VIDEO_DM644X_VPBE
+ tristate "DM644X VPBE HW module"
select VIDEO_VPSS_SYSTEM
- select VIDEOBUF2_DMA_CONTIG
+ select VIDEOBUF_DMA_CONTIG
help
- Enables Davinci VPBE module used for display devices.
- This module is common for following DM644x/DM365/DM355
- based display devices.
+ Enables VPBE modules used for display on a DM644x
+ SoC.
To compile this driver as a module, choose M here: the
module will be called vpbe.
+config VIDEO_DAVINCI_DISPLAY
+ tristate "Davinci V4L2 Video Display"
+ depends on VIDEO_DEV && ARCH_DAVINCI
+ select VIDEOBUF_VMALLOC
+ select DAVINCI_OSD
+ help
+ V4L2 Display driver support for davinci.
+
+ To compile this driver as a module, choose M here: the
+ module will be called davinci_display.
+
+config DAVINCI_ENC_MNGR
+ tristate "Davinci Encoder Manager support"
+ depends on ARCH_DAVINCI
+ default y
+ help
+ Enable support for the DaVinci Encoder Manager. This is responsible
+ for managing output and video/graphics modes for davinci video drivers.
+
+ To compile this driver as a module, choose M here: the
+ module will be called davinci_enc_mngr
+
+config ENC_MNGR_MAX_CHANNELS
+ int "Max number of channels for Encoder Manager"
+ depends on DAVINCI_ENC_MNGR
+ default "2"
+ help
+ Used to give max number of channels supported by encoder manager
+ driver.
+
+config DAVINCI_OSD
+ tristate "Davinci Display Manager"
+ help
+ Support for Davinci On-Screen Display Manager.
+
+ To compile this driver as a module, choose M here: the
+ module will be called davinci_osd.
+
+config DAVINCI_VPBE_ENCODER
+ tristate "Davinci VPBE Encoder support"
+ depends on DAVINCI_ENC_MNGR
+ default y
+ help
+ Enable support for the DaVinci VPBE internal encoder. DaVinci VPBE
+ has internal VENC and DAC to output analog SD outputs (composite,
+ S-Video and Component video outputs).
+
+ To compile this driver as a module, choose M here: the
+ module will be called vpbe_encoder.
+
\ No newline at end of file
diff --git a/drivers/media/platform/davinci/Makefile b/drivers/media/platform/davinci/Makefile
index f40f5219..d5ff0403 100644
--- a/drivers/media/platform/davinci/Makefile
+++ b/drivers/media/platform/davinci/Makefile
@@ -5,16 +5,36 @@
# VPIF
obj-$(CONFIG_VIDEO_DAVINCI_VPIF) += vpif.o
-#VPIF Display driver
-obj-$(CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY) += vpif_display.o
-#VPIF Capture driver
-obj-$(CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE) += vpif_capture.o
+#DM646x EVM Display driver
+obj-$(CONFIG_DISPLAY_DAVINCI_DM646X_EVM) += vpif_display.o
+#DM646x EVM Capture driver
+obj-$(CONFIG_CAPTURE_DAVINCI_DM646X_EVM) += vpif_capture.o
-# Capture: DM6446 and DM355
+# Capture: DM6446, DM355, DM365
obj-$(CONFIG_VIDEO_VPSS_SYSTEM) += vpss.o
obj-$(CONFIG_VIDEO_VPFE_CAPTURE) += vpfe_capture.o
obj-$(CONFIG_VIDEO_DM6446_CCDC) += dm644x_ccdc.o
obj-$(CONFIG_VIDEO_DM355_CCDC) += dm355_ccdc.o
-obj-$(CONFIG_VIDEO_ISIF) += isif.o
-obj-$(CONFIG_VIDEO_DAVINCI_VPBE_DISPLAY) += vpbe.o vpbe_osd.o \
- vpbe_venc.o vpbe_display.o
+obj-$(CONFIG_VIDEO_DM365_ISIF) += dm365_ccdc.o
+dm355_af_driver-objs += dm355_af.o dm355_af_hw.o
+obj-$(CONFIG_VIDEO_DM355_AF) += dm355_af_driver.o
+dm355_aew_driver-objs += dm355_aew.o dm355_aew_hw.o
+obj-$(CONFIG_VIDEO_DM355_AEW) += dm355_aew_driver.o
+
+dm365_a3_hw_driver-objs := dm365_a3_hw.o
+obj-$(CONFIG_VIDEO_DM365_3A_HW) += dm365_a3_hw_driver.o
+dm365_af_driver-objs := dm365_af.o
+obj-$(CONFIG_VIDEO_DM365_AF) += dm365_af_driver.o
+dm365_aew_driver-objs := dm365_aew.o
+obj-$(CONFIG_VIDEO_DM365_AEW) += dm365_aew_driver.o
+
+# DaVinci Encoder/Display Manager and Encoders
+obj-$(CONFIG_DAVINCI_OSD) += davinci_platform.o davinci_osd.o
+obj-$(CONFIG_DAVINCI_ENC_MNGR) += davinci_enc_mngr.o
+
+obj-$(CONFIG_DAVINCI_LOGICPD_ENCODER) += logicpd_encoder.o
+obj-$(CONFIG_DAVINCI_AVNET_ENCODER) += avnetlcd_encoder.o
+obj-$(CONFIG_DAVINCI_VPBE_ENCODER) += vpbe_encoder.o
+obj-$(CONFIG_DAVINCI_GENERIC_PRGB_ENCODER) += dm365_generic_prgb_encoder.o
+
+obj-$(CONFIG_VIDEO_DAVINCI_DISPLAY) += davinci_display.o
diff --git a/drivers/media/platform/davinci/avnetlcd_encoder.c b/drivers/media/platform/davinci/avnetlcd_encoder.c
new file mode 100644
index 00000000..e4065f7c
--- /dev/null
+++ b/drivers/media/platform/davinci/avnetlcd_encoder.c
@@ -0,0 +1,373 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* logicpd_encoder.c. This is just a place holder for hardcoding all supported
+ modes timing. LogicPD timing signals are programmed by the encoder manager
+ based on this data.
+ */
+
+/* Kernel Specific header files */
+
+#include <linux/kernel.h>
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <media/davinci/vid_encoder_if.h>
+#include <media/davinci/avnetlcd_encoder.h>
+
+/* Function prototypes */
+static int avnetlcd_encoder_initialize(struct vid_encoder_device *enc,
+ int flag);
+static int avnetlcd_encoder_deinitialize(struct vid_encoder_device *enc);
+
+static int avnetlcd_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+static int avnetlcd_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+
+static int avnetlcd_encoder_setoutput(char *output,
+ struct vid_encoder_device *enc);
+static int avnetlcd_encoder_getoutput(char *output,
+ struct vid_encoder_device *enc);
+
+static int avnetlcd_encoder_enumoutput(int index,
+ char *output,
+ struct vid_encoder_device *enc);
+
+static struct avnetlcd_encoder_config avnetlcd_encoder_configuration = {
+ .no_of_outputs = AVNETLCD_ENCODER_MAX_NO_OUTPUTS,
+ .output[0] = {
+ .output_name = VID_ENC_OUTPUT_LCD1,
+ .no_of_standard = AVNETLCD_ENCODER_GRAPHICS_NUM_STD,
+ .standards[0] = {
+ .name = VID_ENC_STD_800x480,
+ .std = 1,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 800,
+ .yres = 480,
+ .fps = {60, 1},
+ .left_margin = 85,
+ .right_margin = 70,
+ .upper_margin = 32,
+ .lower_margin = 11,
+ .hsync_len = 9,
+ .vsync_len = 9,
+ .flags = 0},
+ }, /* hsync -ve, vsync -ve */
+};
+
+static struct avnetlcd_encoder_channel avnetlcd_encoder_channel_info = {
+ .params.outindex = 0,
+ .params.mode = VID_ENC_STD_800x480,
+ .enc_device = NULL
+};
+
+static struct vid_enc_output_ops outputs_ops = {
+ .count = AVNETLCD_ENCODER_MAX_NO_OUTPUTS,
+ .enumoutput = avnetlcd_encoder_enumoutput,
+ .setoutput = avnetlcd_encoder_setoutput,
+ .getoutput = avnetlcd_encoder_getoutput
+};
+
+static struct vid_enc_mode_ops modes_ops = {
+ .setmode = avnetlcd_encoder_setmode,
+ .getmode = avnetlcd_encoder_getmode,
+};
+
+static struct vid_encoder_device avnetlcd_encoder_dev = {
+ .name = "AVNETLCD_ENCODER",
+ .capabilities = 0,
+ .initialize = avnetlcd_encoder_initialize,
+ .mode_ops = &modes_ops,
+ .ctrl_ops = NULL,
+ .output_ops = &outputs_ops,
+ .params_ops = NULL,
+ .misc_ops = NULL,
+ .deinitialize = avnetlcd_encoder_deinitialize,
+};
+
+/*
+ * This function is called by the encoder manager to initialize
+ * avnetlcd encoder driver.
+ */
+static int avnetlcd_encoder_initialize(struct vid_encoder_device *enc, int flag)
+{
+ int err = 0, outindex;
+ char *std, *output;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ avnetlcd_encoder_channel_info.enc_device = (struct encoder_device *)enc;
+
+ /* call set standard */
+ std = avnetlcd_encoder_channel_info.params.mode;
+ outindex = avnetlcd_encoder_channel_info.params.outindex;
+ output = avnetlcd_encoder_configuration.output[outindex].output_name;
+ err |= avnetlcd_encoder_setoutput(output, enc);
+ if (err < 0) {
+ err = -EINVAL;
+ printk(KERN_ERR "Error occured in setoutput\n");
+ avnetlcd_encoder_deinitialize(enc);
+ return err;
+ }
+ printk(KERN_DEBUG "Avnetlcd Encoder initialized\n");
+ return err;
+}
+
+/* Function to de-initialize the encoder */
+static int avnetlcd_encoder_deinitialize(struct vid_encoder_device *enc)
+{
+ if (NULL == enc) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ avnetlcd_encoder_channel_info.enc_device = NULL;
+ printk(KERN_DEBUG "Avnetlcd Encoder de-initialized\n");
+ return 0;
+}
+
+/* Following function is used to set the mode*/
+static int avnetlcd_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, outindex, i;
+ char *mode;
+ struct vid_enc_mode_info *my_mode_info = NULL;
+
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ mode = mode_info->name;
+ if (NULL == mode) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "Start of avnetlcd_encoder_setmode..\n");
+ outindex = avnetlcd_encoder_channel_info.params.outindex;
+
+ if (mode_info->std) {
+ char *mymode = NULL;
+ /* This is a standard mode */
+ for (i = 0;
+ i <
+ avnetlcd_encoder_configuration.output[outindex].
+ no_of_standard; i++) {
+ if (!strcmp
+ (avnetlcd_encoder_configuration.output[outindex].
+ standards[i].name, mode)) {
+ mymode =
+ avnetlcd_encoder_configuration.
+ output[outindex].standards[i].name;
+ break;
+ }
+ }
+ if ((i ==
+ avnetlcd_encoder_configuration.output[outindex].
+ no_of_standard) || (NULL == mymode)) {
+ printk(KERN_ERR "Invalid id...\n");
+ return -EINVAL;
+ }
+ /* Store the standard in global object of avnetlcd_encoder */
+ avnetlcd_encoder_channel_info.params.mode = mymode;
+ return 0;
+ } else {
+ /* Non- Standard mode. Check if we support it. If so
+ save the timing info and return */
+ for (i = 0; i < AVNETLCD_ENCODER_GRAPHICS_NUM_STD; i++) {
+ if (!strcmp
+ (avnetlcd_encoder_configuration.output[outindex].
+ standards[i].name, VID_ENC_STD_NON_STANDARD)) {
+ my_mode_info =
+ &avnetlcd_encoder_configuration.
+ output[outindex].standards[i];
+ break;
+ }
+ }
+ if (my_mode_info) {
+ /* We support. So save timing info and return success
+ interface type is same as what is currently is active
+ */
+ my_mode_info->interlaced = mode_info->interlaced;
+ my_mode_info->xres = mode_info->xres;
+ my_mode_info->yres = mode_info->yres;
+ my_mode_info->fps = mode_info->fps;
+ my_mode_info->left_margin = mode_info->left_margin;
+ my_mode_info->right_margin = mode_info->right_margin;
+ my_mode_info->upper_margin = mode_info->upper_margin;
+ my_mode_info->lower_margin = mode_info->lower_margin;
+ my_mode_info->hsync_len = mode_info->hsync_len;
+ my_mode_info->vsync_len = mode_info->vsync_len;
+ my_mode_info->flags = mode_info->flags;
+ /*
+ * If we need to configure something in the encoder module,
+ * we need to do this here
+ */
+ return 0;
+ }
+ printk(KERN_ERR "Mode not supported..\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "</avnetlcd_encoder_setmode>\n");
+ return err;
+}
+
+/* Following function is used to get currently selected mode.*/
+static int avnetlcd_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, i, outindex;
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<avnetlcd_encoder_getmode>\n");
+ outindex = avnetlcd_encoder_channel_info.params.outindex;
+ for (i = 0; i < AVNETLCD_ENCODER_GRAPHICS_NUM_STD; i++) {
+ if (!strcmp(avnetlcd_encoder_channel_info.params.mode,
+ avnetlcd_encoder_configuration.output[outindex].
+ standards[i].name)) {
+ memcpy(mode_info,
+ &avnetlcd_encoder_configuration.output[outindex].
+ standards[i], sizeof(struct vid_enc_mode_info));
+ break;
+ }
+ }
+ if (i == AVNETLCD_ENCODER_GRAPHICS_NUM_STD) {
+ printk(KERN_ERR "Wiered. No mode info\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "</avnetlcd_encoder_getmode>\n");
+ return err;
+}
+
+/* For Avnetlcd, we have only one output, called LCD, we
+ always set this to this at init
+*/
+static int avnetlcd_encoder_setoutput(char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+ struct vid_enc_mode_info *my_mode_info;
+ printk(KERN_DEBUG "<avnetlcd_encoder_setoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output: NULL Pointer.\n");
+ return -EINVAL;
+ }
+
+ /* Just check if the default output match with this output name */
+ if (strcmp
+ (avnetlcd_encoder_configuration.output[0].output_name, output)) {
+ printk(KERN_ERR "no matching output found.\n");
+ return -EINVAL;
+ }
+ avnetlcd_encoder_channel_info.params.mode
+ = avnetlcd_encoder_configuration.output[0].standards[0].name;
+
+ my_mode_info = &avnetlcd_encoder_configuration.output[0].standards[0];
+ err |= avnetlcd_encoder_setmode(my_mode_info, enc);
+ if (err < 0) {
+ printk(KERN_ERR "Error in setting default mode\n");
+ return err;
+ }
+ printk(KERN_DEBUG "</avnetlcd_encoder_setoutput>\n");
+ return err;
+}
+
+/* Following function is used to get output name of current output.*/
+static int avnetlcd_encoder_getoutput(char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, index, len;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<avnetlcd_encoder_getoutput>\n");
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ index = avnetlcd_encoder_channel_info.params.outindex;
+ len = strlen(avnetlcd_encoder_configuration.output[index].output_name);
+ if (len > (VID_ENC_NAME_MAX_CHARS - 1))
+ len = VID_ENC_NAME_MAX_CHARS - 1;
+ strncpy(output,
+ avnetlcd_encoder_configuration.output[index].output_name, len);
+ output[len] = '\0';
+ printk(KERN_DEBUG "</avnetlcd_encoder_getoutput>\n");
+ return err;
+}
+
+/* Following function is used to enumerate outputs supported by the driver.
+ It fills in information in the output. */
+static int avnetlcd_encoder_enumoutput(int index, char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+
+ printk(KERN_DEBUG "<avnetlcd_encoder_enumoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* Only one output is available */
+ if (index >= avnetlcd_encoder_configuration.no_of_outputs)
+ return -EINVAL;
+
+ strncpy(output,
+ avnetlcd_encoder_configuration.output[index].output_name,
+ VID_ENC_NAME_MAX_CHARS);
+ printk(KERN_DEBUG "</avnetlcd_encoder_enumoutput>\n");
+ return err;
+}
+
+/* This function used to initialize the Avnetlcd encoder driver */
+static int avnetlcd_encoder_init(void)
+{
+ int err = 0;
+
+ err = vid_enc_register_encoder(&avnetlcd_encoder_dev);
+ printk(KERN_NOTICE "Avnetlcd encoder initialized\n");
+ return err;
+}
+
+/* Function used to cleanup Avnetlcd encoder driver */
+static void avnetlcd_encoder_cleanup(void)
+{
+ vid_enc_unregister_encoder(&avnetlcd_encoder_dev);
+}
+
+subsys_initcall_sync(avnetlcd_encoder_init);
+module_exit(avnetlcd_encoder_cleanup);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/ccdc_hw_device.h b/drivers/media/platform/davinci/ccdc_hw_device.h
index 86b9b351..d0ea4541 100644
--- a/drivers/media/platform/davinci/ccdc_hw_device.h
+++ b/drivers/media/platform/davinci/ccdc_hw_device.h
@@ -57,7 +57,7 @@ struct ccdc_hw_ops {
*/
int (*get_params) (void *params);
/* Pointer to function to configure ccdc */
- int (*configure) (void);
+ int (*configure) (int mode);
/* Pointer to function to set buffer type */
int (*set_buftype) (enum ccdc_buftype buf_type);
@@ -91,6 +91,8 @@ struct ccdc_hw_ops {
void (*setfbaddr) (unsigned long addr);
/* Pointer to function to get field id */
int (*getfid) (void);
+ /* Dump configuration registers */
+ void (*isif_dump_hw_config) (void);
};
struct ccdc_hw_device {
diff --git a/drivers/media/platform/davinci/davinci_display.c b/drivers/media/platform/davinci/davinci_display.c
new file mode 100644
index 00000000..3114f473
--- /dev/null
+++ b/drivers/media/platform/davinci/davinci_display.c
@@ -0,0 +1,2236 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <media/v4l2-dev.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-device.h>
+#include <linux/wait.h>
+#include <linux/time.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/mm.h>
+#include <linux/mutex.h>
+#include <linux/videodev2.h>
+#include <linux/gcd.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <asm/pgtable.h>
+#include <mach/cputype.h>
+#include <media/davinci/davinci_enc.h>
+#include <media/davinci/davinci_display.h>
+
+#define DAVINCI_DISPLAY_DRIVER "davinci_v4l2"
+#define DM355_EVM_CARD "DM355 EVM"
+#define DM644X_EVM_CARD "DM644X EVM"
+#define DM365_EVM_CARD "DM365 EVM"
+
+static u32 video2_numbuffers = 3;
+static u32 video3_numbuffers = 3;
+static u32 cont2_bufoffset = 0;
+static u32 cont2_bufsize = 0;
+static u32 cont3_bufoffset = 0;
+static u32 cont3_bufsize = 0;
+
+#define DAVINCI_DISPLAY_HD_BUF_SIZE (1280*720*2)
+#define DAVINCI_DISPLAY_SD_BUF_SIZE (720*576*2)
+
+static u32 video2_bufsize = DAVINCI_DISPLAY_HD_BUF_SIZE;
+static u32 video3_bufsize = DAVINCI_DISPLAY_SD_BUF_SIZE;
+
+module_param(video2_numbuffers, uint, S_IRUGO);
+module_param(video3_numbuffers, uint, S_IRUGO);
+
+module_param(video2_bufsize, uint, S_IRUGO);
+module_param(video3_bufsize, uint, S_IRUGO);
+module_param(cont2_bufoffset, uint, S_IRUGO);
+module_param(cont2_bufsize, uint, S_IRUGO);
+module_param(cont3_bufoffset, uint, S_IRUGO);
+module_param(cont3_bufsize, uint, S_IRUGO);
+
+MODULE_PARM_DESC(cont2_bufoffset, "Display offset (default 0)");
+MODULE_PARM_DESC(cont2_bufsize, "Display buffer size (default 0)");
+MODULE_PARM_DESC(cont3_bufoffset, "Display offset (default 0)");
+MODULE_PARM_DESC(cont3_bufsize, "Display buffer size (default 0)");
+
+
+#define DAVINCI_DEFAULT_NUM_BUFS 3
+static struct buf_config_params display_buf_config_params = {
+ .min_numbuffers = DAVINCI_DEFAULT_NUM_BUFS,
+ .numbuffers[0] = DAVINCI_DEFAULT_NUM_BUFS,
+ .numbuffers[1] = DAVINCI_DEFAULT_NUM_BUFS,
+ .min_bufsize[0] = DAVINCI_DISPLAY_HD_BUF_SIZE,
+ .min_bufsize[1] = DAVINCI_DISPLAY_SD_BUF_SIZE,
+ .layer_bufsize[0] = DAVINCI_DISPLAY_HD_BUF_SIZE,
+ .layer_bufsize[1] = DAVINCI_DISPLAY_SD_BUF_SIZE,
+};
+
+static int davinci_display_nr[] = { 2, 3 };
+
+/* global variables */
+static struct davinci_display davinci_dm;
+
+struct device *davinci_display_dev = NULL;
+
+static struct v4l2_capability davinci_display_videocap = {
+ .driver = DAVINCI_DISPLAY_DRIVER,
+ .bus_info = "Platform",
+ .version = DAVINCI_DISPLAY_VERSION_CODE,
+ .capabilities = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING
+};
+
+static struct v4l2_fract ntsc_aspect = DAVINCI_DISPLAY_PIXELASPECT_NTSC;
+static struct v4l2_fract pal_aspect = DAVINCI_DISPLAY_PIXELASPECT_PAL;
+static struct v4l2_fract sp_aspect = DAVINCI_DISPLAY_PIXELASPECT_SP;
+
+static struct v4l2_rect ntsc_bounds = DAVINCI_DISPLAY_WIN_NTSC;
+static struct v4l2_rect pal_bounds = DAVINCI_DISPLAY_WIN_PAL;
+static struct v4l2_rect vga_bounds = DAVINCI_DISPLAY_WIN_640_480;
+static struct v4l2_rect hd_720p_bounds = DAVINCI_DISPLAY_WIN_720P;
+static struct v4l2_rect hd_1080i_bounds = DAVINCI_DISPLAY_WIN_1080I;
+
+/*
+ * davinci_buffer_prepare()
+ * This is the callback function called from videobuf_qbuf() function
+ * the buffer is prepared and user space virtual address is converted into
+ * physical address
+ */
+static int davinci_buffer_prepare(struct videobuf_queue *q,
+ struct videobuf_buffer *vb,
+ enum v4l2_field field)
+{
+
+ struct davinci_fh *fh = q->priv_data;
+ struct display_obj *layer = fh->layer;
+ unsigned long addr;
+ int ret = 0;
+
+ dev_dbg(davinci_display_dev, "<davinci_buffer_prepare>\n");
+
+ /* If buffer is not initialized, initialize it */
+ if (VIDEOBUF_NEEDS_INIT == vb->state) {
+ vb->width = layer->pix_fmt.width;
+ vb->height = layer->pix_fmt.height;
+ vb->size = layer->pix_fmt.sizeimage;
+ vb->field = field;
+
+ ret = videobuf_iolock(q, vb, NULL);
+ if (ret < 0) {
+ dev_err(davinci_display_dev, "Failed to map \
+ user address\n");
+ goto buf_align_exit;
+ }
+
+ addr = videobuf_to_dma_contig(vb);
+
+ if (q->streaming) {
+ if (!ISALIGNED(addr)) {
+ dev_err(davinci_display_dev, "buffer_prepare:offset is \
+ not aligned to 32 bytes\n");
+ goto buf_align_exit;
+ }
+ }
+ vb->state = VIDEOBUF_PREPARED;
+ }
+
+ return 0;
+
+buf_align_exit:
+ return -EINVAL;
+}
+/*
+ * davinci_buffer_setup()
+ * This function allocates memory for the buffers
+ */
+static int davinci_buffer_setup(struct videobuf_queue *q, unsigned int *count,
+ unsigned int *size)
+{
+ /* Get the file handle object and layer object */
+ struct davinci_fh *fh = q->priv_data;
+ struct display_obj *layer = fh->layer;
+ int buf_size;
+
+ dev_dbg(davinci_display_dev, "<davinci_buffer_setup>\n");
+
+ *size = layer->pix_fmt.sizeimage;
+ buf_size = display_buf_config_params.layer_bufsize[layer->device_id];
+
+ /**
+ * For MMAP, limit the memory allocation as per bootarg
+ * configured buffer size
+ */
+ if (V4L2_MEMORY_MMAP == layer->memory)
+ if (*size > buf_size)
+ *size = buf_size;
+
+ /* Checking if the buffer size exceeds the available buffer */
+ if (display_buf_config_params.video_limit[layer->device_id]) {
+ while (*size * *count > (display_buf_config_params.video_limit[layer->device_id]))
+ (*count)--;
+ }
+
+ /* Store number of buffers allocated in numbuffer member */
+ if (*count < display_buf_config_params.min_numbuffers)
+ *count = layer->numbuffers = display_buf_config_params.numbuffers[layer->device_id];
+
+ dev_dbg(davinci_display_dev, "</davinci_buffer_setup>\n");
+
+ return 0;
+}
+
+/*
+ * davinci_buffer_queue()
+ * This function adds the buffer to DMA queue
+ */
+static void davinci_buffer_queue(struct videobuf_queue *q,
+ struct videobuf_buffer *vb)
+{
+ /* Get the file handle object and layer object */
+ struct davinci_fh *fh = q->priv_data;
+ struct display_obj *layer = fh->layer;
+ dev_dbg(davinci_display_dev, "<davinci_buffer_queue>\n");
+
+ /* add the buffer to the DMA queue */
+ list_add_tail(&vb->queue, &layer->dma_queue);
+ /* Change state of the buffer */
+ vb->state = VIDEOBUF_QUEUED;
+ dev_dbg(davinci_display_dev, "</davinci_buffer_queue>\n");
+}
+
+/*
+ * davinci_buffer_release()
+ * This function is called from the videobuf layer to free memory allocated to
+ * the buffers
+ */
+static void davinci_buffer_release(struct videobuf_queue *q,
+ struct videobuf_buffer *vb)
+{
+ /* Get the file handle object and layer object */
+ struct davinci_fh *fh = q->priv_data;
+ struct display_obj *layer = fh->layer;
+ unsigned int buf_size = 0;
+ dev_dbg(davinci_display_dev, "<davinci_buffer_release>\n");
+
+ if (V4L2_MEMORY_USERPTR != layer->memory)
+ videobuf_dma_contig_free(q, vb);
+
+ vb->state = VIDEOBUF_NEEDS_INIT;
+
+
+ /* If memory type is not mmap, return */
+ if (V4L2_MEMORY_MMAP != layer->memory)
+ return;
+ /* Calculate the size of the buffer */
+ buf_size = display_buf_config_params.layer_bufsize[layer->device_id];
+
+ dev_dbg(davinci_display_dev, "</davinci_buffer_release>\n");
+}
+
+/* davinci_frames_to_process()
+ * Return the number of frames to process to achieve the desired frame rate.
+ * If 0 is returned, the current displayed frame needs to be repeated.
+ * If >1 is returned, all buffers need to be skipped except the last one,
+ * which is displayed.
+ */
+static int davinci_frames_to_process(struct display_obj *layer)
+{
+ struct davinci_timeperframe_info *tpfInfo = &(layer->tpf_info);
+ unsigned long framesToSkip;
+
+ /* If we are not simulating a frame rate, we always process exactly
+ * one frame. */
+ if (tpfInfo->irq_service_rate == 0)
+ return 1;
+
+ /* Increment the IRQ counter by 1.000 */
+ tpfInfo->irq_count += 1000;
+
+ /* If we haven't reached the next threshold for processing a frame,
+ * we must repeat the current frame (return 0). This hapens when
+ * simulating a framerate lower than the hardware framerate.
+ */
+ if (tpfInfo->irq_count < tpfInfo->next_irq)
+ return 0;
+
+ /* In cases where we're simulating a framerate higher than the hardware
+ * we may need to dequeue additional buffers and throw them away. */
+ framesToSkip = 0;
+ while (tpfInfo->next_irq + tpfInfo->irq_service_rate <=
+ tpfInfo->irq_count) {
+
+ tpfInfo->next_irq += tpfInfo->irq_service_rate;
+ framesToSkip++;
+ }
+
+ tpfInfo->next_irq += tpfInfo->irq_service_rate;
+ tpfInfo->next_irq -= tpfInfo->irq_count;
+ tpfInfo->irq_count = 0;
+
+ return 1 + framesToSkip;
+}
+
+static struct videobuf_queue_ops video_qops = {
+ .buf_setup = davinci_buffer_setup,
+ .buf_prepare = davinci_buffer_prepare,
+ .buf_queue = davinci_buffer_queue,
+ .buf_release = davinci_buffer_release,
+};
+
+static u8 layer_first_int = 1;
+
+/* davinci_display_isr()
+ * ISR function. It changes status of the displayed buffer, takes next buffer
+ * from the queue and sets its address in VPBE registers
+ */
+static void davinci_display_isr(unsigned int event, void *dispObj)
+{
+ unsigned long jiffies_time = get_jiffies_64();
+ struct timeval timevalue;
+ int i, fid;
+ unsigned long addr = 0;
+ struct display_obj *layer = NULL;
+ struct davinci_display *dispDevice = (struct davinci_display *)dispObj;
+
+ /* Convert time represention from jiffies to timeval */
+ jiffies_to_timeval(jiffies_time, &timevalue);
+
+ for (i = 0; i < DAVINCI_DISPLAY_MAX_DEVICES; i++) {
+ layer = dispDevice->dev[i];
+ /* If streaming is started in this layer */
+ if (!layer->started)
+ continue;
+ /* Query the number of frames to process in this ISR call to
+ * simulate the desired frame rate. Right now, we only support
+ * simulated frame rates less than the hardware framerate, so
+ * this value will always be 0 or 1. When rates faster than
+ * the hardware rate are supported, * it can be > 1 in which
+ * case we need to dequeue and throw away (skip) additional
+ * buffers. Right now, all we do is repeat the current frame
+ * when it is 0.
+ */
+ if (davinci_frames_to_process(layer) == 0)
+ continue;
+ /* Check the field format */
+ if ((V4L2_FIELD_NONE == layer->pix_fmt.field) &&
+ (!list_empty(&layer->dma_queue)) &&
+ (event & DAVINCI_DISP_END_OF_FRAME)) {
+ /* Progressive mode */
+ if (layer_first_int) {
+ layer_first_int = 0;
+ continue;
+ } else {
+ /* Mark status of the curFrm to
+ * done and unlock semaphore on it
+ */
+ if (layer->curFrm != layer->nextFrm) {
+ layer->curFrm->ts = timevalue;
+ layer->curFrm->state = VIDEOBUF_DONE;
+ wake_up_interruptible(&layer->curFrm->done);
+ /* Make curFrm pointing to nextFrm */
+ layer->curFrm = layer->nextFrm;
+ }
+ }
+ /* Get the next buffer from buffer queue */
+ layer->nextFrm =
+ list_entry(layer->dma_queue.next,
+ struct videobuf_buffer, queue);
+ /* Remove that buffer from the buffer queue */
+ list_del(&layer->nextFrm->queue);
+ /* Mark status of the buffer as active */
+ layer->nextFrm->state = VIDEOBUF_ACTIVE;
+
+ addr = videobuf_to_dma_contig(layer->nextFrm);
+ davinci_disp_start_layer(layer->layer_info.id,
+ addr,
+ &davinci_dm.fb_desc);
+ } else {
+ /* Interlaced mode
+ * If it is first interrupt, ignore it
+ */
+ if (layer_first_int) {
+ layer_first_int = 0;
+ return;
+ }
+
+ layer->field_id ^= 1;
+ if (event & DAVINCI_DISP_FIRST_FIELD)
+ fid = 0;
+ else if (event & DAVINCI_DISP_SECOND_FIELD)
+ fid = 1;
+ else
+ return;
+
+ /* If field id does not match with stored
+ * field id
+ */
+ if (fid != layer->field_id) {
+ /* Make them in sync */
+ if (0 == fid) {
+ layer->field_id = fid;
+ }
+ return;
+ }
+ /* device field id and local field id are
+ * in sync. If this is even field
+ */
+ if (0 == fid) {
+ if (layer->curFrm == layer->nextFrm)
+ continue;
+ /* one frame is displayed If next frame is
+ * available, release curFrm and move on
+ * Copy frame display time
+ */
+ layer->curFrm->ts = timevalue;
+ /* Change status of the curFrm */
+ layer->curFrm->state = VIDEOBUF_DONE;
+ /* unlock semaphore on curFrm */
+ wake_up_interruptible(&layer->curFrm->done);
+ /* Make curFrm pointing to
+ * nextFrm
+ */
+ layer->curFrm = layer->nextFrm;
+ } else if (1 == fid) { /* odd field */
+ if (list_empty(&layer->dma_queue)
+ || (layer->curFrm != layer->nextFrm))
+ continue;
+
+ /* one field is displayed configure
+ * the next frame if it is available
+ * otherwise hold on current frame
+ * Get next from the buffer queue
+ */
+ layer->nextFrm = list_entry(layer->
+ dma_queue.
+ next, struct
+ videobuf_buffer,
+ queue);
+
+ /* Remove that from the
+ * buffer queue
+ */
+ list_del(&layer->nextFrm->queue);
+
+ /* Mark state of the frame
+ * to active
+ */
+ layer->nextFrm->state = VIDEOBUF_ACTIVE;
+
+ addr = videobuf_to_dma_contig(layer->nextFrm);
+ davinci_disp_start_layer(layer->layer_info.id,
+ addr,
+ &davinci_dm.fb_desc);
+ }
+ }
+ }
+}
+
+static struct display_obj*
+_davinci_disp_get_other_win(struct display_obj *layer)
+{
+ enum davinci_display_device_id thiswin, otherwin;
+ thiswin = layer->device_id;
+
+ otherwin = (thiswin == DAVINCI_DISPLAY_DEVICE_0) ?
+ DAVINCI_DISPLAY_DEVICE_1 : DAVINCI_DISPLAY_DEVICE_0;
+ return davinci_dm.dev[otherwin];
+}
+
+static int davinci_config_layer(enum davinci_display_device_id id);
+
+static int davinci_set_video_display_params(struct display_obj *layer)
+{
+ unsigned long addr;
+
+ addr = videobuf_to_dma_contig(layer->curFrm);
+ /* Set address in the display registers */
+ davinci_disp_start_layer(layer->layer_info.id,
+ addr,
+ &davinci_dm.fb_desc);
+ davinci_disp_enable_layer(layer->layer_info.id, 0);
+ /* Enable the window */
+ layer->layer_info.enable = 1;
+ if (layer->layer_info.config.pixfmt == PIXFMT_NV12) {
+ struct display_obj *otherlayer =
+ _davinci_disp_get_other_win(layer);
+ davinci_disp_enable_layer(otherlayer->layer_info.id, 1);
+ otherlayer->layer_info.enable = 1;
+ }
+ return 0;
+}
+
+static void davinci_disp_calculate_scale_factor(struct display_obj *layer,
+ int expected_xsize,
+ int expected_ysize)
+{
+ struct display_layer_info *layer_info = &layer->layer_info;
+ struct v4l2_pix_format *pixfmt = &layer->pix_fmt;
+ int h_scale = 0, v_scale = 0, h_exp = 0, v_exp = 0, temp;
+ /* Application initially set the image format. Current display
+ * size is obtained from the encoder manager. expected_xsize
+ * and expected_ysize are set through S_CROP ioctl. Based on this,
+ * driver will calculate the scale factors for vertical and
+ * horizontal direction so that the image is displayed scaled
+ * and expanded. Application uses expansion to display the image
+ * in a square pixel. Otherwise it is displayed using displays
+ * pixel aspect ratio.It is expected that application chooses
+ * the crop coordinates for cropped or scaled display. if crop
+ * size is less than the image size, it is displayed cropped or
+ * it is displayed scaled and/or expanded.
+ *
+ * to begin with, set the crop window same as expected. Later we
+ * will override with scaled window size
+ */
+ layer->layer_info.config.xsize = pixfmt->width;
+ layer->layer_info.config.ysize = pixfmt->height;
+ layer_info->h_zoom = ZOOM_X1; /* no horizontal zoom */
+ layer_info->v_zoom = ZOOM_X1; /* no horizontal zoom */
+ layer_info->h_exp = H_EXP_OFF; /* no horizontal zoom */
+ layer_info->v_exp = V_EXP_OFF; /* no horizontal zoom */
+
+ if (pixfmt->width < expected_xsize) {
+ h_scale = davinci_dm.mode_info.xres / pixfmt->width;
+ if (h_scale < 2)
+ h_scale = 1;
+ else if (h_scale >= 4)
+ h_scale = 4;
+ else
+ h_scale = 2;
+ layer->layer_info.config.xsize *= h_scale;
+ if (layer->layer_info.config.xsize < expected_xsize) {
+ if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_NTSC)
+ || !strcmp(davinci_dm.mode_info.name,
+ VID_ENC_STD_PAL)) {
+ temp =
+ (layer->layer_info.config.xsize *
+ DAVINCI_DISPLAY_H_EXP_RATIO_N)
+ / DAVINCI_DISPLAY_H_EXP_RATIO_D;
+ if (temp <= expected_xsize) {
+ h_exp = 1;
+ layer->layer_info.config.xsize = temp;
+ }
+ }
+ }
+ if (h_scale == 2)
+ layer_info->h_zoom = ZOOM_X2;
+ else if (h_scale == 4)
+ layer_info->h_zoom = ZOOM_X4;
+ if (h_exp)
+ layer_info->h_exp = H_EXP_9_OVER_8;
+ } else {
+ /* no scaling, only cropping. Set display area to crop area */
+ layer->layer_info.config.xsize = expected_xsize;
+ }
+
+ if (pixfmt->height < expected_ysize) {
+ v_scale = expected_ysize / pixfmt->height;
+ if (v_scale < 2)
+ v_scale = 1;
+ else if (v_scale >= 4)
+ v_scale = 4;
+ else
+ v_scale = 2;
+ layer->layer_info.config.ysize *= v_scale;
+ if (layer->layer_info.config.ysize < expected_ysize) {
+ if (!strcmp(davinci_dm.mode_info.name, "PAL")) {
+ temp =
+ (layer->layer_info.config.ysize *
+ DAVINCI_DISPLAY_V_EXP_RATIO_N)
+ / DAVINCI_DISPLAY_V_EXP_RATIO_D;
+ if (temp <= expected_ysize) {
+ v_exp = 1;
+ layer->layer_info.config.ysize = temp;
+ }
+ }
+ }
+ if (v_scale == 2)
+ layer_info->v_zoom = ZOOM_X2;
+ else if (v_scale == 4)
+ layer_info->v_zoom = ZOOM_X4;
+ if (v_exp)
+ layer_info->h_exp = V_EXP_6_OVER_5;
+ } else {
+ /* no scaling, only cropping. Set display area to crop area */
+ layer->layer_info.config.ysize = expected_ysize;
+ }
+ dev_dbg(davinci_display_dev,
+ "crop display xsize = %d, ysize = %d\n",
+ layer->layer_info.config.xsize, layer->layer_info.config.ysize);
+}
+
+static void davinci_disp_adj_position(struct display_obj *layer, int top,
+ int left)
+{
+ layer->layer_info.config.xpos = 0;
+ layer->layer_info.config.ypos = 0;
+ if (left + layer->layer_info.config.xsize <= davinci_dm.mode_info.xres)
+ layer->layer_info.config.xpos = left;
+ if (top + layer->layer_info.config.ysize <= davinci_dm.mode_info.yres)
+ layer->layer_info.config.ypos = top;
+ dev_dbg(davinci_display_dev,
+ "new xpos = %d, ypos = %d\n",
+ layer->layer_info.config.xpos, layer->layer_info.config.ypos);
+}
+
+static int davinci_disp_check_window_params(struct v4l2_rect *c)
+{
+ if ((c->width == 0)
+ || ((c->width + c->left) > davinci_dm.mode_info.xres)
+ || (c->height == 0)
+ || ((c->height + c->top) > davinci_dm.mode_info.yres)) {
+ dev_err(davinci_display_dev, "Invalid crop values\n");
+ return -1;
+ }
+ if ((c->height & 0x1) && (davinci_dm.mode_info.interlaced)) {
+ dev_err(davinci_display_dev,
+ "window height must be even for interlaced display\n");
+ return -1;
+ }
+ return 0;
+}
+
+/* vpbe_get_mode_timeperframe() : get framerate of current video mode
+ */
+static int vpbe_get_mode_timeperframe(unsigned char *mode_info_name,
+ struct v4l2_fract *frVal)
+{
+ int ret = 0;
+
+ if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_NTSC)) {
+ frVal->numerator = 30000;
+ frVal->denominator = 1001;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_NTSC_RGB)) {
+ frVal->numerator = 30000;
+ frVal->denominator = 1001;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_PAL)) {
+ frVal->numerator = 25;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_PAL_RGB)) {
+ frVal->numerator = 25;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_720P_24)) {
+ frVal->numerator = 24;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_720P_25)) {
+ frVal->numerator = 25;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_720P_30)) {
+ frVal->numerator = 30;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_720P_50)) {
+ frVal->numerator = 50;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_720P_60)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080I_25)) {
+ frVal->numerator = 25;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080I_30)) {
+ frVal->numerator = 30;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080P_24)) {
+ frVal->numerator = 24;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080P_25)) {
+ frVal->numerator = 25;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080P_30)) {
+ frVal->numerator = 30;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080P_50)) {
+ frVal->numerator = 50;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080P_60)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_480P_60)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_576P_50)) {
+ frVal->numerator = 50;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_640x480)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_640x400)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_640x350)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_800x480)) {
+ frVal->numerator = 60;
+ frVal->denominator = 1;
+ } else {
+ dev_err(davinci_display_dev, "unknown video mode\n");
+ ret = -EINVAL;
+ }
+ return ret;
+}
+
+/* vpbe_try_format()
+ * If user application provides width and height, and have bytesperline set
+ * to zero, driver calculates bytesperline and sizeimage based on hardware
+ * limits. If application likes to add pads at the end of each line and
+ * end of the buffer , it can set bytesperline to line size and sizeimage to
+ * bytesperline * height of the buffer. If driver fills zero for active
+ * video width and height, and has requested user bytesperline and sizeimage,
+ * width and height is adjusted to maximum display limit or buffer width
+ * height which ever is lower
+ */
+static int vpbe_try_format(struct v4l2_pix_format *pixfmt, int check)
+{
+ struct vid_enc_mode_info *mode_info;
+ int min_sizeimage, bpp, min_height = 1, min_width = 32,
+ max_width, max_height, user_info = 0;
+
+ mode_info = &davinci_dm.mode_info;
+ davinci_enc_get_mode(0, mode_info);
+
+ if ((pixfmt->pixelformat != V4L2_PIX_FMT_UYVY) &&
+ (pixfmt->pixelformat != V4L2_PIX_FMT_NV12))
+ /* choose default as V4L2_PIX_FMT_UYVY */
+ pixfmt->pixelformat = V4L2_PIX_FMT_UYVY;
+
+ if (pixfmt->field == V4L2_FIELD_ANY) {
+ if (mode_info->interlaced)
+ pixfmt->field = V4L2_FIELD_INTERLACED;
+ else
+ pixfmt->field = V4L2_FIELD_NONE;
+ }
+
+ if (pixfmt->field == V4L2_FIELD_INTERLACED)
+ min_height = 2;
+
+ if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12)
+ bpp = 1;
+ else
+ bpp = 2;
+
+ max_width = mode_info->xres;
+ max_height = mode_info->yres;
+
+ min_width /= bpp;
+
+ if (!pixfmt->width && !pixfmt->bytesperline) {
+ dev_err(davinci_display_dev, "bytesperline and width"
+ " cannot be zero\n");
+ return -EINVAL;
+ }
+
+ /* if user provided bytesperline, it must provide sizeimage as well */
+ if (pixfmt->bytesperline && !pixfmt->sizeimage) {
+ dev_err(davinci_display_dev,
+ "sizeimage must be non zero, when user"
+ " provides bytesperline\n");
+ return -EINVAL;
+ }
+
+ /* adjust bytesperline as per hardware - multiple of 32 */
+ if (!pixfmt->width)
+ pixfmt->width = pixfmt->bytesperline / bpp;
+
+ if (!pixfmt->bytesperline)
+ pixfmt->bytesperline = pixfmt->width * bpp;
+ else
+ user_info = 1;
+ pixfmt->bytesperline = ((pixfmt->bytesperline + 31) & ~31);
+
+ if (pixfmt->width < min_width) {
+ if (check) {
+ dev_err(davinci_display_dev,
+ "height is less than minimum,"
+ "input width = %d, min_width = %d \n",
+ pixfmt->width, min_width);
+ return -EINVAL;
+ }
+ pixfmt->width = min_width;
+ }
+
+ if (pixfmt->width > max_width) {
+ if (check) {
+ dev_err(davinci_display_dev,
+ "width is more than maximum,"
+ "input width = %d, max_width = %d\n",
+ pixfmt->width, max_width);
+ return -EINVAL;
+ }
+ pixfmt->width = max_width;
+ }
+
+ /* If height is zero, then atleast we need to have sizeimage
+ * to calculate height
+ */
+ if (!pixfmt->height) {
+ if (user_info) {
+ if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) {
+ /* for NV12 format, sizeimage is y-plane size
+ * + CbCr plane which is half of y-plane
+ */
+ pixfmt->height = pixfmt->sizeimage /
+ (pixfmt->bytesperline +
+ (pixfmt->bytesperline >> 1));
+ } else
+ pixfmt->height = pixfmt->sizeimage/
+ pixfmt->bytesperline;
+ }
+ }
+
+ if (pixfmt->height > max_height) {
+ if (check && !user_info) {
+ dev_err(davinci_display_dev,
+ "height is more than maximum,"
+ "input height = %d, max_height = %d\n",
+ pixfmt->height, max_height);
+ return -EINVAL;
+ }
+ pixfmt->height = max_height;
+ }
+
+ if (pixfmt->height < min_height) {
+ if (check && !user_info) {
+ dev_err(davinci_display_dev,
+ "width is less than minimum,"
+ "input height = %d, min_height = %d\n",
+ pixfmt->height, min_height);
+ return -EINVAL;
+ }
+ pixfmt->height = min_width;
+ }
+
+ /* if user has not provided bytesperline calculate it based on width */
+ if (!user_info)
+ pixfmt->bytesperline = (((pixfmt->width * bpp) + 31) & ~31);
+
+ if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12)
+ min_sizeimage = pixfmt->bytesperline * pixfmt->height +
+ (pixfmt->bytesperline * pixfmt->height >> 1);
+ else
+ min_sizeimage = pixfmt->bytesperline * pixfmt->height;
+
+ if (pixfmt->sizeimage < min_sizeimage) {
+ if (check && user_info) {
+ dev_err(davinci_display_dev, "sizeimage is less, %d\n",
+ min_sizeimage);
+ return -EINVAL;
+ }
+ pixfmt->sizeimage = min_sizeimage;
+ }
+ return 0;
+}
+
+static int vpbe_g_priority(struct file *file, void *priv,
+ enum v4l2_priority *p)
+{
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ *p = v4l2_prio_max(&layer->prio);
+
+ return 0;
+}
+
+static int vpbe_s_priority(struct file *file, void *priv,
+ enum v4l2_priority p)
+{
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+ int ret;
+
+ ret = v4l2_prio_change(&layer->prio, &fh->prio, p);
+
+ return ret;
+}
+
+static int vpbe_g_parm(struct file *file, void *priv,
+ struct v4l2_streamparm *parm)
+{
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+ int ret = 0;
+
+ /* Clear out the input structure */
+ memset(parm, 0, sizeof(struct v4l2_streamparm));
+
+ /* Set the buffer type */
+ parm->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
+
+ /* We support frame repeating controlled by the timeperframe setting.
+ * Frame skipping is still TBD */
+ parm->parm.output.capability |= V4L2_CAP_TIMEPERFRAME;
+
+ /* If a simulated frame rate is in effect, return it */
+ if (layer->tpf_info.irq_service_rate > 0) {
+ parm->parm.output.timeperframe =
+ layer->tpf_info.sim_timeperframe;
+ }
+ /* Othersise, retrieve the current mode's framerate */
+ else {
+ ret = vpbe_get_mode_timeperframe(davinci_dm.mode_info.name,
+ &parm->parm.output.timeperframe);
+ if (ret < 0)
+ goto hardware_framerate;
+ }
+
+ goto exit;
+
+hardware_framerate:
+ dev_err(davinci_display_dev, "Could not retrieve hardware framerate");
+ ret = -EINVAL;
+
+exit:
+ return ret;
+}
+
+static int vpbe_s_parm(struct file *file, void *priv,
+ struct v4l2_streamparm *parm)
+{
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+ struct v4l2_streamparm result;
+ struct v4l2_fract *hw_tpf;
+ struct v4l2_fract *sim_tpf;
+ struct v4l2_fract service_rate;
+ unsigned long normalize_gcd;
+ int ret = 0;
+
+ /* Establish some aliases for code readability */
+ hw_tpf = &layer->tpf_info.hw_timeperframe;
+ sim_tpf = &parm->parm.output.timeperframe;
+
+ /* Get our current settings */
+ ret = vpbe_g_parm(file, priv, &result);
+ if (ret < 0)
+ goto g_parm_failed;
+
+ /* Division by zero is not allowed */
+ if (sim_tpf->denominator == 0)
+ goto division_by_zero;
+
+ /* Get the hardware framerate */
+ ret = vpbe_get_mode_timeperframe(davinci_dm.mode_info.name, hw_tpf);
+ if (ret < 0)
+ goto hardware_framerate;
+
+ /* Normalize the specified timeperframe */
+ normalize_gcd = gcd(sim_tpf->numerator, sim_tpf->denominator);
+ sim_tpf->numerator /= normalize_gcd;
+ sim_tpf->denominator /= normalize_gcd;
+
+ /* If zero was specified for timeperframe or the hardware rate was
+ * specified, use the hardware rate */
+ if (sim_tpf->numerator == 0 ||
+ (sim_tpf->numerator == hw_tpf->numerator &&
+ sim_tpf->denominator == hw_tpf->denominator)) {
+
+ /* Disable the simulated framerate */
+ layer->tpf_info.irq_service_rate = 0;
+ result.parm.output.timeperframe = *hw_tpf;
+ goto exit;
+ }
+
+ /* Since we're doing fixed-point math to three decimal places, we
+ * cannot support a numerator value larger than 2^32 / 1000 */
+ if (sim_tpf->numerator > (-1UL / 1000UL))
+ goto too_big;
+
+ /* Right now, a simulated framerate faster than the hardware is not
+ * supported. */
+ if ((sim_tpf->numerator * 1000 / sim_tpf->denominator) >
+ (hw_tpf->numerator * 1000 / hw_tpf->denominator)) {
+ goto too_fast;
+ }
+
+ /* If we get this far, we know that the specified framerate is valid.
+ * Update the simulated framerate. */
+ layer->tpf_info.sim_timeperframe = *sim_tpf;
+ sim_tpf = &layer->tpf_info.sim_timeperframe;
+
+ /* Calculate the irq service rate. */
+ service_rate.numerator = hw_tpf->numerator * sim_tpf->denominator;
+ service_rate.denominator = hw_tpf->denominator * sim_tpf->numerator;
+
+ normalize_gcd = gcd(service_rate.numerator, service_rate.denominator);
+ service_rate.numerator /= normalize_gcd;
+ service_rate.denominator /= normalize_gcd;
+
+ /* Store the service rate in integer form. Multiply the result by 1000
+ * to also include the first three decimal digits. */
+ layer->tpf_info.irq_service_rate =
+ (service_rate.numerator * 1000) / service_rate.denominator;
+ result.parm.output.timeperframe = *sim_tpf;
+
+ layer->tpf_info.next_irq = layer->tpf_info.irq_service_rate;
+ layer->tpf_info.irq_count = 0;
+
+ goto exit;
+
+too_fast:
+ dev_err(davinci_display_dev, "timeperframe cannot exceed hardware "
+ "framerate");
+ ret = -EINVAL;
+ goto exit;
+
+too_big:
+ dev_err(davinci_display_dev, "timeperframe numerator cannot exceed "
+ "%lu", -1UL / 1000UL);
+ ret = -EINVAL;
+ goto exit;
+
+hardware_framerate:
+ dev_err(davinci_display_dev, "Could not retrieve hardware framerate");
+ ret = -EINVAL;
+ goto exit;
+
+division_by_zero:
+ dev_err(davinci_display_dev, "timeperframe divides by zero");
+ ret = -EINVAL;
+ goto exit;
+
+g_parm_failed:
+ dev_err(davinci_display_dev, "Could not retrieve current settings");
+ ret = -EINVAL;
+
+exit:
+ *parm = result;
+ return ret;
+}
+
+static int vpbe_querycap(struct file *file, void *priv,
+ struct v4l2_capability *cap)
+{
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_QUERYCAP, layer id = %d\n",
+ layer->device_id);
+
+ memset(cap, 0, sizeof(*cap));
+ *cap = davinci_display_videocap;
+
+ return 0;
+}
+
+static int vpbe_s_crop(struct file *file, void *priv,
+ struct v4l2_crop *crop)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev,
+ "VIDIOC_S_CROP, layer id = %d\n",
+ layer->device_id);
+
+ if (crop->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
+ struct v4l2_rect *rect = &crop->c;
+
+ if (rect->top < 0 || rect->left < 0) {
+ dev_err(davinci_display_dev,
+ "Error in S_CROP params"
+ " Negative values for"
+ " top/left" );
+ return -EINVAL;
+
+ }
+
+ if (davinci_disp_check_window_params(rect)) {
+ dev_err(davinci_display_dev,
+ "Error in S_CROP params\n");
+ return -EINVAL;
+ }
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+
+ davinci_disp_get_layer_config(layer->layer_info.id,
+ &layer->layer_info.config);
+
+ davinci_disp_calculate_scale_factor(layer, rect->width,
+ rect->height);
+
+ davinci_disp_adj_position(layer, rect->top, rect->left);
+
+ if (davinci_disp_set_layer_config(layer->layer_info.id,
+ &layer->layer_info.config)) {
+
+ dev_err(davinci_display_dev,
+ "Error in S_CROP params\n");
+ mutex_unlock(&davinci_dm.lock);
+ return -EINVAL;
+ }
+
+ /* apply zooming and h or v expansion */
+ davinci_disp_set_zoom(layer->layer_info.id,
+ layer->layer_info.h_zoom,
+ layer->layer_info.v_zoom);
+
+ davinci_disp_set_vid_expansion(layer->layer_info.h_exp,
+ layer->layer_info.v_exp);
+
+ if ((layer->layer_info.h_zoom != ZOOM_X1) ||
+ (layer->layer_info.v_zoom != ZOOM_X1) ||
+ (layer->layer_info.h_exp != H_EXP_OFF) ||
+ (layer->layer_info.v_exp != V_EXP_OFF))
+ /* Enable expansion filter */
+ davinci_disp_set_interpolation_filter(1);
+ else
+ davinci_disp_set_interpolation_filter(0);
+ mutex_unlock(&davinci_dm.lock);
+ } else {
+ dev_err(davinci_display_dev, "Invalid buf type \n");
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+static int vpbe_g_crop(struct file *file, void *priv,
+ struct v4l2_crop *crop)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_G_CROP, layer id = %d\n",
+ layer->device_id);
+
+ if (crop->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
+ struct v4l2_rect *rect = &crop->c;
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+
+ davinci_disp_get_layer_config(layer->layer_info.id,
+ &layer->layer_info.config);
+ rect->top = layer->layer_info.config.ypos;
+ rect->left = layer->layer_info.config.xpos;
+ rect->width = layer->layer_info.config.xsize;
+ rect->height = layer->layer_info.config.ysize;
+ mutex_unlock(&davinci_dm.lock);
+ } else {
+ dev_err(davinci_display_dev,"Invalid buf type \n");
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static int vpbe_cropcap(struct file *file, void *priv,
+ struct v4l2_cropcap *cropcap)
+{
+ int ret = 0;
+
+ dev_dbg(davinci_display_dev, "\nStart of VIDIOC_CROPCAP ioctl");
+
+ if (davinci_enc_get_mode(0, &davinci_dm.mode_info)) {
+ dev_err(davinci_display_dev,
+ "Error in getting current display mode"
+ " from enc mngr\n");
+ return -EINVAL;
+ }
+
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+
+ cropcap->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
+ if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_NTSC)) {
+ cropcap->bounds = cropcap->defrect = ntsc_bounds;
+ cropcap->pixelaspect = ntsc_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_PAL)) {
+ cropcap->bounds = cropcap->defrect = pal_bounds;
+ cropcap->pixelaspect = pal_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name,VID_ENC_STD_640x480)) {
+ cropcap->bounds = cropcap->defrect = vga_bounds;
+ cropcap->pixelaspect = sp_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_640x400)) {
+ cropcap->bounds = cropcap->defrect = vga_bounds;
+ cropcap->bounds.height = cropcap->defrect.height = 400;
+ cropcap->pixelaspect = sp_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_640x350)) {
+ cropcap->bounds = cropcap->defrect = vga_bounds;
+ cropcap->bounds.height = cropcap->defrect.height = 350;
+ cropcap->pixelaspect = sp_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_480x272)) {
+ cropcap->bounds = cropcap->defrect = vga_bounds;
+ cropcap->pixelaspect = sp_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_720P_60)) {
+ cropcap->bounds = cropcap->defrect = hd_720p_bounds;
+ cropcap->pixelaspect = sp_aspect;
+ } else if (!strcmp(davinci_dm.mode_info.name, VID_ENC_STD_1080I_30)) {
+ cropcap->bounds = cropcap->defrect = hd_1080i_bounds;
+ cropcap->pixelaspect = sp_aspect;
+ } else {
+ dev_err(davinci_display_dev, "Unknown encoder display mode\n");
+ return -EINVAL;
+ }
+
+ mutex_unlock(&davinci_dm.lock);
+ dev_dbg(davinci_display_dev, "\nEnd of VIDIOC_CROPCAP ioctl");
+
+ return ret;
+}
+
+static int vpbe_streamoff(struct file *file, void *priv,
+ enum v4l2_buf_type buf_type)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_STREAMOFF,layer id = %d\n",
+ layer->device_id);
+ /* If io is allowed for this file handle, return error */
+ if (!fh->io_allowed) {
+ dev_err(davinci_display_dev, "No io_allowed\n");
+ return -EACCES;
+ }
+
+ /* If streaming is not started, return error */
+ if (!layer->started) {
+ dev_err(davinci_display_dev, "streaming not started in layer"
+ " id = %d\n", layer->device_id);
+ return -EINVAL;
+ }
+
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+ davinci_disp_disable_layer(layer->layer_info.id);
+ layer->started = 0;
+ mutex_unlock(&davinci_dm.lock);
+ ret = videobuf_streamoff(&layer->buffer_queue);
+
+ return ret;
+}
+
+static int vpbe_streamon(struct file *file, void *priv,
+ enum v4l2_buf_type buf_type)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_STREAMON, layer id = %d\n",
+ layer->device_id);
+ /* If file handle is not allowed IO, return error */
+ if (!fh->io_allowed) {
+ dev_err(davinci_display_dev, "No io_allowed\n");
+ return -EACCES;
+ }
+ /* If Streaming is already started, return error */
+ if (layer->started) {
+ dev_err(davinci_display_dev, "layer is already streaming\n");
+ return -EBUSY;
+ }
+
+ /*
+ * Call videobuf_streamon to start streaming
+ * in videobuf
+ */
+ ret = videobuf_streamon(&layer->buffer_queue);
+ if (ret) {
+ dev_err(davinci_display_dev,
+ "error in videobuf_streamon\n");
+ return ret;
+ }
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+ /* If buffer queue is empty, return error */
+ if (list_empty(&layer->dma_queue)) {
+ dev_err(davinci_display_dev, "buffer queue is empty\n");
+ mutex_unlock(&davinci_dm.lock);
+ return -EIO;
+ }
+ /* Get the next frame from the buffer queue */
+ layer->nextFrm = layer->curFrm = list_entry(layer->dma_queue.next,
+ struct videobuf_buffer, queue);
+ /* Remove buffer from the buffer queue */
+ list_del(&layer->curFrm->queue);
+ /* Mark state of the current frame to active */
+ layer->curFrm->state = VIDEOBUF_ACTIVE;
+ /* Initialize field_id and started member */
+
+ layer->field_id = 0;
+
+ /* Set parameters in OSD and VENC */
+ ret = davinci_set_video_display_params(layer);
+ if (ret < 0) {
+ mutex_unlock(&davinci_dm.lock);
+ return ret;
+ }
+ /* if request format is yuv420 semiplanar, need to
+ * enable both video windows
+ */
+
+ layer->started = 1;
+ dev_dbg(davinci_display_dev, "Started streaming on layer id = %d,"
+ " ret = %d\n", layer->device_id, ret);
+
+ layer_first_int = 1;
+ mutex_unlock(&davinci_dm.lock);
+
+ return ret;
+}
+
+static int vpbe_dqbuf(struct file *file, void *priv,
+ struct v4l2_buffer *buf)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_DQBUF, layer id = %d\n",
+ layer->device_id);
+
+ /* If this file handle is not allowed to do IO, return error */
+ if (!fh->io_allowed) {
+ dev_err(davinci_display_dev, "No io_allowed\n");
+ return -EACCES;
+ }
+ if (file->f_flags & O_NONBLOCK)
+ /* Call videobuf_dqbuf for non blocking mode */
+ ret = videobuf_dqbuf(&layer->buffer_queue, buf, 1);
+ else
+ /* Call videobuf_dqbuf for blocking mode */
+ ret = videobuf_dqbuf(&layer->buffer_queue, buf, 0);
+
+ return ret;
+}
+
+static int vpbe_qbuf(struct file *file, void *priv,
+ struct v4l2_buffer *p)
+{
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_QBUF, layer id = %d\n",
+ layer->device_id);
+
+ /* If this file handle is not allowed to do IO, return error */
+ if (!fh->io_allowed) {
+ dev_err(davinci_display_dev, "No io_allowed\n");
+ return -EACCES;
+ }
+
+ return videobuf_qbuf(&layer->buffer_queue, p);
+}
+
+static int vpbe_querybuf(struct file *file, void *priv,
+ struct v4l2_buffer *buf)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_QUERYBUF, layer id = %d\n",
+ layer->device_id);
+
+ /* Call videobuf_querybuf to get information */
+ ret = videobuf_querybuf(&layer->buffer_queue, buf);
+
+ return ret;
+}
+
+static int vpbe_reqbufs(struct file *file, void *priv,
+ struct v4l2_requestbuffers *req_buf)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_REQBUFS, count= %d, type = %d,"
+ "memory = %d\n",
+ req_buf->count, req_buf->type, req_buf->memory);
+
+ /* If io users of the layer is not zero, return error */
+ if (0 != layer->io_usrs) {
+ dev_err(davinci_display_dev, "not IO user\n");
+ return -EBUSY;
+ }
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+ /* Initialize videobuf queue as per the buffer type */
+
+ videobuf_queue_dma_contig_init(&layer->buffer_queue,
+ &video_qops, davinci_display_dev,
+ &layer->irqlock,
+ V4L2_BUF_TYPE_VIDEO_OUTPUT,
+ layer->pix_fmt.field,
+ sizeof(struct videobuf_buffer), fh);
+
+ /* Set io allowed member of file handle to TRUE */
+ fh->io_allowed = 1;
+ /* Increment io usrs member of layer object to 1 */
+ layer->io_usrs = 1;
+ /* Store type of memory requested in layer object */
+ layer->memory = req_buf->memory;
+ /* Initialize buffer queue */
+ INIT_LIST_HEAD(&layer->dma_queue);
+ /* Allocate buffers */
+ ret = videobuf_reqbufs(&layer->buffer_queue, req_buf);
+ mutex_unlock(&davinci_dm.lock);
+
+ return ret;
+}
+
+static int vpbe_s_fmt(struct file *file, void *priv,
+ struct v4l2_format *fmt)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_S_FMT, layer id = %d\n",
+ layer->device_id);
+
+ /* If streaming is started, return error */
+ if (layer->started) {
+ dev_err(davinci_display_dev, "Streaming is started\n");
+ return -EBUSY;
+ }
+ if (V4L2_BUF_TYPE_VIDEO_OUTPUT == fmt->type) {
+ struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
+ /* Check for valid field format */
+ ret = vpbe_try_format(pixfmt, 1);
+ if (ret)
+ return ret;
+
+ /* YUV420 is requested, check availability of the other video window */
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+
+ layer->pix_fmt = *pixfmt;
+ if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12 &&
+ cpu_is_davinci_dm365()) {
+ struct display_obj *otherlayer =
+ _davinci_disp_get_other_win(layer);
+
+ /* if other layer is available, only
+ * claim it, do not configure it
+ */
+ if (davinci_disp_request_layer(otherlayer->layer_info.id)) {
+ /* Couldn't get layer */
+ dev_err(davinci_display_dev,
+ "Display Manager"
+ " failed to allocate"
+ " the other layer:"
+ "vidwin %d\n",
+ otherlayer->
+ layer_info.id);
+ mutex_unlock(&davinci_dm.lock);
+ return -EBUSY;
+ }
+ }
+
+ /* store the pixel format in the layer object */
+ davinci_disp_get_layer_config(layer->layer_info.id,
+ &layer->layer_info.config);
+
+ layer->layer_info.config.xsize = pixfmt->width;
+ layer->layer_info.config.ysize = pixfmt->height;
+ layer->layer_info.config.line_length = pixfmt->bytesperline;
+ layer->layer_info.config.ypos = 0;
+ layer->layer_info.config.xpos = 0;
+ layer->layer_info.config.interlaced =
+ davinci_dm.mode_info.interlaced;
+
+ /* change of the default pixel format for both vid windows */
+ if (V4L2_PIX_FMT_NV12 == pixfmt->pixelformat) {
+ struct display_obj *otherlayer;
+ layer->layer_info.config.pixfmt = PIXFMT_NV12;
+ otherlayer = _davinci_disp_get_other_win(layer);
+ otherlayer->layer_info.config.pixfmt = PIXFMT_NV12;
+ }
+
+ if (davinci_disp_set_layer_config(layer->layer_info.id,
+ &layer->layer_info.config)) {
+ dev_err(davinci_display_dev, "Error in S_FMT params:\n");
+ mutex_unlock(&davinci_dm.lock);
+ return -EINVAL;
+ }
+
+ /* readback and fill the local copy of current pix format */
+ davinci_disp_get_layer_config(layer->layer_info.id,
+ &layer->layer_info.config);
+
+ /* verify if readback values are as expected */
+ if (layer->pix_fmt.width != layer->layer_info.config.xsize ||
+ layer->pix_fmt.height != layer->layer_info.config.ysize ||
+ layer->pix_fmt.bytesperline != layer->layer_info.config.line_length ||
+ (layer->layer_info.config.interlaced && layer->pix_fmt.field !=
+ V4L2_FIELD_INTERLACED) || (!layer->layer_info.config.interlaced &&
+ layer->pix_fmt.field != V4L2_FIELD_NONE)) {
+ dev_err(davinci_display_dev, "mismatch with layer config"
+ " params:\n");
+ dev_err(davinci_display_dev, "layer->layer_info.config.xsize ="
+ "%d layer->pix_fmt.width = %d\n",
+ layer->layer_info.config.xsize,
+ layer->pix_fmt.width);
+ dev_err(davinci_display_dev,
+ "layer->layer_info.config.ysize ="
+ "%d layer->pix_fmt.height = %d\n",
+ layer->layer_info.config.ysize,
+ layer->pix_fmt.height);
+ dev_err(davinci_display_dev, "layer->layer_info.config."
+ "line_length= %d layer->pix_fmt"
+ ".bytesperline = %d\n",
+ layer->layer_info.config.line_length,
+ layer->pix_fmt.bytesperline);
+ dev_err(davinci_display_dev, "layer->layer_info.config."
+ "interlaced =%d layer->pix_fmt."
+ "field = %d\n", layer->layer_info.config.interlaced,
+ layer->pix_fmt.field);
+ mutex_unlock(&davinci_dm.lock);
+ return -EFAULT;
+ }
+
+ dev_notice(davinci_display_dev,
+ "Before finishing with S_FMT:\n"
+ "layer.pix_fmt.bytesperline = %d,\n"
+ " layer.pix_fmt.width = %d, \n"
+ " layer.pix_fmt.height = %d, \n"
+ " layer.pix_fmt.sizeimage =%d\n",
+ layer->pix_fmt.bytesperline,
+ layer->pix_fmt.width,
+ layer->pix_fmt.height,
+ layer->pix_fmt.sizeimage);
+
+ dev_notice(davinci_display_dev,
+ "pixfmt->width = %d,\n"
+ " layer->layer_info.config.line_length"
+ "= %d\n",
+ pixfmt->width,
+ layer->layer_info.config.line_length);
+
+ mutex_unlock(&davinci_dm.lock);
+ } else {
+ dev_err(davinci_display_dev, "invalid type\n");
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+static int vpbe_try_fmt(struct file *file, void *priv,
+ struct v4l2_format *fmt)
+{
+ int ret = 0;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_TRY_FMT\n");
+
+ if (V4L2_BUF_TYPE_VIDEO_OUTPUT == fmt->type) {
+ struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
+ /* Check for valid field format */
+ ret = vpbe_try_format(pixfmt, 0);
+ } else {
+ dev_err(davinci_display_dev, "invalid type\n");
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static int vpbe_enum_fmt(struct file *file, void *priv,
+ struct v4l2_fmtdesc *fmt)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+ unsigned int index = 0;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_ENUM_FMT, layer id = %d\n",
+ layer->device_id);
+ if (fmt->index > 0) {
+ dev_err(davinci_display_dev,
+ "Invalid format index\n");
+ return -EINVAL;
+ }
+ /* Fill in the information about format */
+
+ index = fmt->index;
+ memset(fmt, 0, sizeof(*fmt));
+ fmt->index = index;
+ fmt->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
+ if (index == 0) {
+ strcpy(fmt->description, "YUV 4:2:2 - UYVY");
+ fmt->pixelformat = V4L2_PIX_FMT_UYVY;
+ } else if (index == 1) {
+ strcpy(fmt->description, "Y/CbCr 4:2:0");
+ fmt->pixelformat = V4L2_PIX_FMT_NV12;
+ }
+
+ return ret;
+}
+
+static int vpbe_g_fmt(struct file *file, void *priv,
+ struct v4l2_format *fmt)
+{
+ int ret = 0;
+ struct davinci_fh *fh = file->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "VIDIOC_G_FMT, layer id = %d\n",
+ layer->device_id);
+
+ /* If buffer type is video output */
+ if (V4L2_BUF_TYPE_VIDEO_OUTPUT == fmt->type) {
+ struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
+ /* Fill in the information about format */
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (!ret) {
+ *pixfmt = layer->pix_fmt;
+ mutex_unlock(&davinci_dm.lock);
+ }
+ } else {
+ dev_err(davinci_display_dev, "invalid type\n");
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static long vpbe_param_handler(struct file *file, void *priv,
+ int cmd, void *param)
+{
+ int ret = 0;
+
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+
+ switch (cmd) {
+ case VIDIOC_S_COFST:
+ davinci_dm.fb_desc.cbcr_ofst = *((unsigned long *) param);
+ mutex_unlock(&davinci_dm.lock);
+ break;
+ case VIDIOC_S_YDOFST:
+ davinci_dm.fb_desc.yd_ofst = *((unsigned long *) param);
+
+ /* The Y-plane display offset must be 64-byte aligned */
+ if (davinci_dm.fb_desc.yd_ofst & 0x3F) {
+ dev_err(davinci_display_dev, "fb_desc.yd_ofst is not "
+ "aligned to 64 bytes\n");
+ davinci_dm.fb_desc.yd_ofst = 0;
+ ret = -EINVAL;
+ }
+
+ mutex_unlock(&davinci_dm.lock);
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+/*
+ * davinci_mmap()
+ * It is used to map kernel space buffers into user spaces
+ */
+static int davinci_mmap(struct file *filep, struct vm_area_struct *vma)
+{
+ /* Get the layer object and file handle object */
+ struct davinci_fh *fh = filep->private_data;
+ struct display_obj *layer = fh->layer;
+ int err = 0;
+ dev_dbg(davinci_display_dev, "<davinci_mmap>\n");
+
+ err = videobuf_mmap_mapper(&layer->buffer_queue, vma);
+ dev_dbg(davinci_display_dev, "</davinci_mmap>\n");
+ return err;
+}
+
+/* davinci_poll(): It is used for select/poll system call
+ */
+static unsigned int davinci_poll(struct file *filep, poll_table *wait)
+{
+ int err = 0;
+ struct davinci_fh *fh = filep->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "<davinci_poll>");
+
+ if (layer->started)
+ err = videobuf_poll_stream(filep, &layer->buffer_queue, wait);
+ dev_dbg(davinci_display_dev, "</davinci_poll>");
+ return err;
+}
+
+static int davinci_config_layer(enum davinci_display_device_id id)
+{
+ int err = 0;
+ struct davinci_layer_config *layer_config;
+ struct vid_enc_mode_info *mode_info;
+ struct display_obj *layer = davinci_dm.dev[id];
+
+ /* First claim the layer for this device */
+ if (davinci_disp_request_layer(layer->layer_info.id)) {
+ /* Couldn't get layer */
+ dev_err(davinci_display_dev,
+ "Display Manager failed to allocate layer\n");
+ return -EBUSY;
+ }
+
+ /* get the current video display mode from encoder manager */
+ mode_info = &davinci_dm.mode_info;
+ if (davinci_enc_get_mode(0, mode_info)) {
+ dev_err(davinci_display_dev,
+ "Error in getting current display mode from enc mngr\n");
+ return -1;
+ }
+
+ layer_config = &layer->layer_info.config;
+ /* Set the default image and crop values */
+ layer_config->pixfmt = PIXFMT_YCbCrI;
+ layer->pix_fmt.pixelformat = V4L2_PIX_FMT_UYVY;
+ layer->pix_fmt.bytesperline = layer_config->line_length =
+ mode_info->xres * 2;
+
+ layer->pix_fmt.width = layer_config->xsize = mode_info->xres;
+ layer->pix_fmt.height = layer_config->ysize = mode_info->yres;
+ layer->pix_fmt.sizeimage =
+ layer->pix_fmt.bytesperline * layer->pix_fmt.height;
+ layer_config->xpos = 0;
+ layer_config->ypos = 0;
+ layer_config->interlaced = mode_info->interlaced;
+
+ /* turn off ping-pong buffer and field inversion to fix
+ * the image shaking problem in 1080I mode
+ */
+
+ if (layer->layer_info.config.interlaced)
+ layer->pix_fmt.field = V4L2_FIELD_INTERLACED;
+ else
+ layer->pix_fmt.field = V4L2_FIELD_NONE;
+ davinci_disp_set_layer_config(layer->layer_info.id, layer_config);
+ return err;
+}
+
+/*
+ * davinci_open()
+ * It creates object of file handle structure and stores it in private_data
+ * member of filepointer
+ */
+static int davinci_open(struct file *filep)
+{
+ int minor = iminor(filep->f_path.dentry->d_inode);
+ int found = -1;
+ int i = 0;
+ struct display_obj *layer;
+ struct davinci_fh *fh = NULL;
+
+ /* Check for valid minor number */
+ for (i = 0; i < DAVINCI_DISPLAY_MAX_DEVICES; i++) {
+ /* Get the pointer to the layer object */
+ layer = davinci_dm.dev[i];
+ if (minor == layer->video_dev->minor) {
+ found = i;
+ break;
+ }
+ }
+
+ /* If not found, return error no device */
+ if (0 > found) {
+ dev_err(davinci_display_dev, "device not found\n");
+ return -ENODEV;
+ }
+
+ /* Allocate memory for the file handle object */
+ fh = kmalloc(sizeof(struct davinci_fh), GFP_KERNEL);
+ if (ISNULL(fh)) {
+ dev_err(davinci_display_dev,
+ "unable to allocate memory for file handle object\n");
+ return -ENOMEM;
+ }
+ dev_dbg(davinci_display_dev, "<davinci open> plane = %d\n",
+ layer->device_id);
+ /* store pointer to fh in private_data member of filep */
+ filep->private_data = fh;
+ fh->layer = layer;
+
+ if (!layer->usrs) {
+ /* Configure the default values for the layer */
+ if (davinci_config_layer(layer->device_id)) {
+ dev_err(davinci_display_dev,
+ "Unable to configure video layer for id = %d\n",
+ layer->device_id);
+ return -EINVAL;
+ }
+ }
+
+ /* Increment layer usrs counter */
+ layer->usrs++;
+ /* Set io_allowed member to false */
+ fh->io_allowed = 0;
+ /* Initialize priority of this instance to default priority */
+ fh->prio = V4L2_PRIORITY_UNSET;
+ v4l2_prio_open(&layer->prio, &fh->prio);
+ dev_dbg(davinci_display_dev, "</davinci_open>\n");
+
+ /* Initialize framerate information */
+ memset(&fh->layer->tpf_info, 0,
+ sizeof(struct davinci_timeperframe_info));
+
+ return 0;
+}
+
+/*
+ * davinci_release()
+ * This function deletes buffer queue, frees the buffers and the davinci
+ * display file * handle
+ */
+static int davinci_release(struct file *filep)
+{
+ int ret = 0;
+ /* Get the layer object and file handle object */
+ struct davinci_fh *fh = filep->private_data;
+ struct display_obj *layer = fh->layer;
+
+ dev_dbg(davinci_display_dev, "<davinci_release>\n");
+ /* If this is doing IO and other layer are not closed */
+ if ((layer->usrs != 1) && fh->io_allowed) {
+ dev_err(davinci_display_dev, "Close other instances\n");
+ return -EAGAIN;
+ }
+ /* Get the lock on layer object */
+ ret = mutex_lock_interruptible(&davinci_dm.lock);
+ if (ret)
+ return ret;
+
+ /* if this instance is doing IO */
+ if (fh->io_allowed) {
+ /* Reset io_usrs member of layer object */
+ layer->io_usrs = 0;
+ davinci_disp_disable_layer(layer->layer_info.id);
+ layer->started = 0;
+ /* Free buffers allocated */
+ videobuf_queue_cancel(&layer->buffer_queue);
+ videobuf_mmap_free(&layer->buffer_queue);
+ }
+
+ /* Decrement layer usrs counter */
+ layer->usrs--;
+ /* If this file handle has initialize encoder device, reset it */
+ if (!layer->usrs) {
+ if (layer->layer_info.config.pixfmt == PIXFMT_NV12) {
+ struct display_obj *otherlayer;
+ otherlayer = _davinci_disp_get_other_win(layer);
+ davinci_disp_disable_layer(otherlayer->layer_info.id);
+ davinci_disp_release_layer(otherlayer->layer_info.id);
+ }
+ davinci_disp_disable_layer(layer->layer_info.id);
+ davinci_disp_release_layer(layer->layer_info.id);
+ }
+
+ /* Clear any simulated frame rate */
+ memset(&layer->tpf_info, 0, sizeof(struct davinci_timeperframe_info));
+
+ /* Close the priority */
+ v4l2_prio_close(&layer->prio, &fh->prio);
+ filep->private_data = NULL;
+
+ /* Free memory allocated to file handle object */
+ if (!ISNULL(fh))
+ kfree(fh);
+ /* unlock mutex on layer object */
+ mutex_unlock(&davinci_dm.lock);
+
+ davinci_dm.fb_desc.cbcr_ofst = 0;
+ davinci_dm.fb_desc.yd_ofst = 0;
+
+ dev_dbg(davinci_display_dev, "</davinci_release>\n");
+ return 0;
+}
+
+static void davinci_platform_release(struct device
+ *device)
+{
+ /* This is called when the reference count goes to zero */
+}
+
+static struct v4l2_file_operations vpbe_fops = {
+ .owner = THIS_MODULE,
+ .open = davinci_open,
+ .release = davinci_release,
+ .ioctl = video_ioctl2,
+ .mmap = davinci_mmap,
+ .poll = davinci_poll
+};
+
+/* vpbe capture ioctl operations */
+static const struct v4l2_ioctl_ops vpbe_ioctl_ops = {
+ .vidioc_querycap = vpbe_querycap,
+ .vidioc_g_fmt_vid_out = vpbe_g_fmt,
+ .vidioc_enum_fmt_vid_out = vpbe_enum_fmt,
+ .vidioc_s_fmt_vid_out = vpbe_s_fmt,
+ .vidioc_try_fmt_vid_out = vpbe_try_fmt,
+ .vidioc_reqbufs = vpbe_reqbufs,
+ .vidioc_querybuf = vpbe_querybuf,
+ .vidioc_qbuf = vpbe_qbuf,
+ .vidioc_dqbuf = vpbe_dqbuf,
+ .vidioc_streamon = vpbe_streamon,
+ .vidioc_streamoff = vpbe_streamoff,
+ .vidioc_cropcap = vpbe_cropcap,
+ .vidioc_g_crop = vpbe_g_crop,
+ .vidioc_s_crop = vpbe_s_crop,
+ .vidioc_g_priority = vpbe_g_priority,
+ .vidioc_s_priority = vpbe_s_priority,
+ .vidioc_g_parm = vpbe_g_parm,
+ .vidioc_s_parm = vpbe_s_parm,
+ .vidioc_default = vpbe_param_handler,
+};
+
+/*
+ * davinci_probe()
+ * This function creates device entries by register itself to the V4L2 driver
+ * and initializes fields of each layer objects
+ */
+static int davinci_probe(struct device *device)
+{
+ int i, j = 0, k, err = 0;
+ struct video_device *vbd = NULL;
+ struct display_obj *layer = NULL;
+ struct platform_device *pdev;
+ unsigned long phys_end_kernel;
+ size_t size;
+
+ davinci_display_dev = device;
+
+ dev_dbg(davinci_display_dev, "<davinci_probe>\n");
+
+ /* First request memory region for io */
+ pdev = to_platform_device(device);
+ if (pdev->num_resources != 0) {
+ dev_err(davinci_display_dev, "probed for an unknown device\n");
+ return -ENODEV;
+ }
+
+ /*
+ * Initialising the memory from the input arguments file for
+ * contiguous memory buffers and avoid defragmentation
+ */
+
+ if (cont2_bufsize) {
+ /* attempt to determine the end of Linux kernel memory */
+ phys_end_kernel = virt_to_phys((void *)PAGE_OFFSET) +
+ (num_physpages << PAGE_SHIFT);
+ phys_end_kernel += cont2_bufoffset;
+ size = cont2_bufsize;
+
+ err = dma_declare_coherent_memory(&pdev->dev, phys_end_kernel,
+ phys_end_kernel,
+ size,
+ DMA_MEMORY_MAP |
+ DMA_MEMORY_EXCLUSIVE);
+
+ if (!err) {
+ dev_err(&pdev->dev, "Unable to declare MMAP memory.\n");
+ err = -ENOMEM;
+ goto probe_out;
+ }
+ }
+
+ if (cont3_bufsize) {
+ /* attempt to determine the end of Linux kernel memory */
+ phys_end_kernel = virt_to_phys((void *)PAGE_OFFSET) +
+ (num_physpages << PAGE_SHIFT);
+ phys_end_kernel += cont3_bufoffset;
+ size = cont3_bufsize;
+
+ err = dma_declare_coherent_memory(&pdev->dev, phys_end_kernel,
+ phys_end_kernel,
+ size,
+ DMA_MEMORY_MAP |
+ DMA_MEMORY_EXCLUSIVE);
+
+ if (!err) {
+ dev_err(&pdev->dev, "Unable to declare MMAP memory.\n");
+ err = -ENOMEM;
+ goto probe_out;
+ }
+ }
+
+ for (i = 0; i < DAVINCI_DISPLAY_MAX_DEVICES; i++) {
+ /* Get the pointer to the layer object */
+ layer = davinci_dm.dev[i];
+ /* Allocate memory for video device */
+ vbd = video_device_alloc();
+ if (ISNULL(vbd)) {
+ for (j = 0; j < i; j++) {
+ video_device_release
+ (davinci_dm.dev[j]->video_dev);
+ }
+ dev_err(davinci_display_dev, "ran out of memory\n");
+ return -ENOMEM;
+ }
+
+ /* Initialize field of video device */
+ vbd->dev = *device;
+ vbd->release = video_device_release;
+ vbd->fops = &vpbe_fops;
+ vbd->ioctl_ops = &vpbe_ioctl_ops;
+ vbd->minor = -1;
+ vbd->current_norm = V4L2_STD_NTSC;
+
+ snprintf(vbd->name, sizeof(vbd->name),
+ "DaVinci_VPBEDisplay_DRIVER_V%d.%d.%d",
+ (DAVINCI_DISPLAY_VERSION_CODE >> 16)
+ & 0xff,
+ (DAVINCI_DISPLAY_VERSION_CODE >> 8) &
+ 0xff, (DAVINCI_DISPLAY_VERSION_CODE) & 0xff);
+ /* Set video_dev to the video device */
+ layer->video_dev = vbd;
+ layer->device_id = i;
+ layer->layer_info.id =
+ ((i == DAVINCI_DISPLAY_DEVICE_0) ? WIN_VID0 : WIN_VID1);
+ if (display_buf_config_params.numbuffers[i] == 0)
+ layer->memory = V4L2_MEMORY_USERPTR;
+ else
+ layer->memory = V4L2_MEMORY_MMAP;
+ /* Initialize field of the layer objects */
+ layer->usrs = layer->io_usrs = 0;
+ layer->started = 0;
+
+ /* Initialize prio member of layer object */
+ v4l2_prio_init(&layer->prio);
+
+ /* register video device */
+ printk(KERN_NOTICE
+ "Trying to register davinci display video device.\n");
+ printk(KERN_NOTICE "layer=%x,layer->video_dev=%x\n", (int)layer,
+ (int)&layer->video_dev);
+
+ err = video_register_device(layer->
+ video_dev,
+ VFL_TYPE_GRABBER,
+ davinci_display_nr[i]);
+ if (err)
+ goto probe_out;
+ }
+ /* Initialize mutex */
+ mutex_init(&davinci_dm.lock);
+ return 0;
+
+probe_out:
+ for (k = 0; k < j; k++) {
+ /* Get the pointer to the layer object */
+ layer = davinci_dm.dev[k];
+ /* Unregister video device */
+ video_unregister_device(layer->video_dev);
+ /* Release video device */
+ video_device_release(layer->video_dev);
+ layer->video_dev = NULL;
+ }
+ return err;
+}
+
+/*
+ * davinci_remove()
+ * It un-register hardware planes from V4L2 driver
+ */
+static int davinci_remove(struct device *device)
+{
+ int i;
+ struct display_obj *plane;
+ dev_dbg(davinci_display_dev, "<davinci_remove>\n");
+ /* un-register device */
+ for (i = 0; i < DAVINCI_DISPLAY_MAX_DEVICES; i++) {
+ /* Get the pointer to the layer object */
+ plane = davinci_dm.dev[i];
+ /* Unregister video device */
+ video_unregister_device(plane->video_dev);
+
+ plane->video_dev = NULL;
+ }
+
+ dev_dbg(davinci_display_dev, "</davinci_remove>\n");
+ return 0;
+}
+
+static struct device_driver davinci_driver = {
+ .name = DAVINCI_DISPLAY_DRIVER,
+ .bus = &platform_bus_type,
+ .probe = davinci_probe,
+ .remove = davinci_remove,
+};
+static struct platform_device _davinci_display_device = {
+ .name = DAVINCI_DISPLAY_DRIVER,
+ .id = 1,
+ .dev = {
+ .release = davinci_platform_release,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ }
+};
+
+/*
+ * davinci_display_init()
+ * This function registers device and driver to the kernel, requests irq
+ * handler and allocates memory for layer objects
+ */
+static __init int davinci_display_init(void)
+{
+ int err = 0, i, j;
+ int free_layer_objects_index;
+ int free_buffer_layer_index;
+ int free_buffer_index;
+
+
+ printk(KERN_DEBUG "<davinci_display_init>\n");
+
+ /* Default number of buffers should be 3 */
+ if ((video2_numbuffers > 0) &&
+ (video2_numbuffers < display_buf_config_params.min_numbuffers))
+ video2_numbuffers = display_buf_config_params.min_numbuffers;
+ if ((video3_numbuffers > 0) &&
+ (video3_numbuffers < display_buf_config_params.min_numbuffers))
+ video3_numbuffers = display_buf_config_params.min_numbuffers;
+
+ /* Set buffer size to min buffers size if invalid buffer size is
+ * given */
+ if (video2_bufsize <
+ display_buf_config_params.min_bufsize[DAVINCI_DISPLAY_DEVICE_0])
+ video2_bufsize =
+ display_buf_config_params.
+ min_bufsize[DAVINCI_DISPLAY_DEVICE_0];
+
+ if (video3_bufsize <
+ display_buf_config_params.min_bufsize[DAVINCI_DISPLAY_DEVICE_1])
+ video3_bufsize =
+ display_buf_config_params.
+ min_bufsize[DAVINCI_DISPLAY_DEVICE_1];
+
+ /* set number of buffers, they could come from boot/args */
+ display_buf_config_params.numbuffers[DAVINCI_DISPLAY_DEVICE_0] =
+ video2_numbuffers;
+ display_buf_config_params.numbuffers[DAVINCI_DISPLAY_DEVICE_1] =
+ video3_numbuffers;
+
+ /*set size of buffers, they could come from bootargs*/
+ display_buf_config_params.layer_bufsize[DAVINCI_DISPLAY_DEVICE_0] =
+ video2_bufsize;
+ display_buf_config_params.layer_bufsize[DAVINCI_DISPLAY_DEVICE_1] =
+ video3_bufsize;
+
+ if (cpu_is_davinci_dm355()) {
+ strcpy(davinci_display_videocap.card, DM355_EVM_CARD);
+ } else if (cpu_is_davinci_dm365())
+ strcpy(davinci_display_videocap.card, DM365_EVM_CARD);
+ else
+ strcpy(davinci_display_videocap.card, DM644X_EVM_CARD);
+
+
+ /* Allocate memory for four plane display objects */
+ for (i = 0; i < DAVINCI_DISPLAY_MAX_DEVICES; i++) {
+ davinci_dm.dev[i] =
+ kmalloc(sizeof(struct display_obj), GFP_KERNEL);
+ /* If memory allocation fails, return error */
+ if (!davinci_dm.dev[i]) {
+ free_layer_objects_index = i;
+ printk(KERN_ERR "ran out of memory\n");
+ err = -ENOMEM;
+ goto davinci_init_free_layer_objects;
+ }
+ spin_lock_init(&davinci_dm.dev[i]->irqlock);
+ }
+ free_layer_objects_index = DAVINCI_DISPLAY_MAX_DEVICES;
+
+ if (display_buf_config_params.numbuffers[0] == 0)
+ printk(KERN_ERR "no vid2 buffer allocated\n");
+ if (display_buf_config_params.numbuffers[1] == 0)
+ printk(KERN_ERR "no vid3 buffer allocated\n");
+ free_buffer_layer_index = DAVINCI_DISPLAY_MAX_DEVICES;
+ free_buffer_index = display_buf_config_params.numbuffers[i - 1];
+ /* Register driver to the kernel */
+ err = driver_register(&davinci_driver);
+ if (0 != err)
+ goto davinci_init_free_layer_objects;
+
+ /* register device as a platform device to the kernel */
+ err = platform_device_register(&_davinci_display_device);
+ if (0 != err) {
+ goto davinci_init_unregister_driver;
+ }
+
+ davinci_dm.event_callback.mask = (DAVINCI_DISP_END_OF_FRAME |
+ DAVINCI_DISP_FIRST_FIELD |
+ DAVINCI_DISP_SECOND_FIELD);
+
+ davinci_dm.event_callback.arg = &davinci_dm;
+ davinci_dm.event_callback.handler = davinci_display_isr;
+
+ err = davinci_disp_register_callback(&davinci_dm.event_callback);
+
+ if (0 != err) {
+ goto davinci_init_unregister_driver;
+ }
+ printk(KERN_NOTICE
+ "davinci_init:DaVinci V4L2 Display Driver V1.0 loaded\n");
+ printk(KERN_DEBUG "</davinci_init>\n");
+ return 0;
+
+davinci_init_unregister_driver:
+ driver_unregister(&davinci_driver);
+
+davinci_init_free_layer_objects:
+ for (j = 0; j < free_layer_objects_index; j++) {
+ if (davinci_dm.dev[i]) {
+ kfree(davinci_dm.dev[j]);
+ davinci_dm.dev[i] = NULL;
+ }
+ }
+ return err;
+}
+
+/*
+ * davinci_cleanup()
+ * This function un-registers device and driver to the kernel, frees requested
+ * irq handler and de-allocates memory allocated for layer objects.
+ */
+static void davinci_cleanup(void)
+{
+ int i = 0;
+ printk(KERN_INFO "<davinci_cleanup>\n");
+
+ davinci_disp_unregister_callback(&davinci_dm.event_callback);
+ platform_device_unregister(&_davinci_display_device);
+ driver_unregister(&davinci_driver);
+ for (i = 0; i < DAVINCI_DISPLAY_MAX_DEVICES; i++) {
+ if (davinci_dm.dev[i]) {
+ kfree(davinci_dm.dev[i]);
+ davinci_dm.dev[i] = NULL;
+ }
+ }
+ printk(KERN_INFO "</davinci_cleanup>\n");
+}
+
+EXPORT_SYMBOL(davinci_display_dev);
+MODULE_LICENSE("GPL");
+/* Function for module initialization and cleanup */
+module_init(davinci_display_init);
+module_exit(davinci_cleanup);
diff --git a/drivers/media/platform/davinci/davinci_enc_mngr.c b/drivers/media/platform/davinci/davinci_enc_mngr.c
new file mode 100644
index 00000000..c4371a1c
--- /dev/null
+++ b/drivers/media/platform/davinci/davinci_enc_mngr.c
@@ -0,0 +1,1173 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/export.h>
+#include <linux/module.h>
+
+#include <linux/attribute_container.h>
+#include <mach/hardware.h>
+#include <mach/mux.h>
+#include <mach/cputype.h>
+#include <asm/io.h>
+#include <media/davinci/davinci_enc.h>
+#include <media/davinci/vid_encoder_types.h>
+#include <media/davinci/vid_encoder_if.h>
+#include <media/davinci/davinci_enc_mngr.h>
+#include <media/davinci/davinci_platform.h>
+
+#define ISNULL(p) ((NULL) == (p))
+
+static char *ch0_output = "";
+static char *ch1_output = "";
+static char *ch0_mode = "";
+static char *ch1_mode = "";
+module_param(ch0_output, charp, S_IRUGO);
+module_param(ch1_output, charp, S_IRUGO);
+module_param(ch0_mode, charp, S_IRUGO);
+module_param(ch1_mode, charp, S_IRUGO);
+
+#include <linux/stat.h>
+//#define DAVINCI_ENC_MAX_CHANNELS 1
+
+struct vid_enc_device_mgr enc_dev[DAVINCI_ENC_MAX_CHANNELS];
+
+EXPORT_SYMBOL(enc_dev);
+extern struct enc_config davinci_enc_default[];
+extern char *davinci_outputs[];
+extern char *davinci_modes[];
+
+struct display_device {
+ struct module *owner;
+ struct device class_dev;
+ int channel;
+};
+
+static struct display_device *davinci_display_device[DAVINCI_ENC_MAX_CHANNELS];
+
+#define to_display_dev(cdev) container_of(cdev, struct display_device, class_dev)
+
+static void display_class_release(struct device *cdev)
+{
+ struct display_device *dev = to_display_dev(cdev);
+
+ if (dev != NULL)
+ kfree(dev);
+}
+
+struct class display_class = {
+ .name = "davinci_display",
+ .owner = THIS_MODULE,
+ .dev_release = display_class_release,
+};
+EXPORT_SYMBOL(display_class);
+
+static ssize_t output_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ char name[VID_ENC_NAME_MAX_CHARS];
+ struct display_device *dev = to_display_dev(cdev);
+ int p, ret;
+
+ ret = davinci_enc_get_output(dev->channel, name);
+ if (ret < 0)
+ return ret;
+
+ p = sprintf(buf, name);
+ p += sprintf(buf + p, "\n");
+
+ return p;
+}
+
+static ssize_t
+output_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ struct display_device *dev = to_display_dev(cdev);
+ char name[VID_ENC_NAME_MAX_CHARS];
+ int ret;
+
+ if (!buffer || (count == 0)|| (count > VID_ENC_NAME_MAX_CHARS))
+ return 0;
+
+ strncpy(name, buffer, count);
+ name[count - 1] = 0;
+ ret = davinci_enc_set_output(dev->channel, name);
+ if (ret < 0) {
+ return ret;
+ }
+
+ return count;
+}
+
+static ssize_t mode_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ struct display_device *dev = to_display_dev(cdev);
+ struct vid_enc_mode_info mode_info;
+ int p;
+ int ret;
+
+ ret = davinci_enc_get_mode(dev->channel, &mode_info);
+ if (ret < 0)
+ return ret;
+
+ p = sprintf(buf, mode_info.name);
+ p += sprintf(buf + p, "\n");
+
+ return p;
+}
+
+static ssize_t
+mode_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ struct display_device *dev = to_display_dev(cdev);
+ char name[VID_ENC_NAME_MAX_CHARS];
+ struct vid_enc_mode_info mode_info;
+ int ret;
+
+ if (!buffer || (count == 0) || (count > VID_ENC_NAME_MAX_CHARS))
+ return 0;
+
+ strncpy(name, buffer, count);
+ name[count - 1] = 0;
+
+ ret = davinci_enc_get_mode(dev->channel, &mode_info);
+
+ if (ret < 0)
+ return ret;
+
+ mode_info.name = name;
+ ret = davinci_enc_set_mode(dev->channel, &mode_info);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+
+static ssize_t enable_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return 0;
+}
+
+static ssize_t
+enable_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ struct display_device *dev = to_display_dev(cdev);
+ int enable_output_state, ret;
+
+ if (!buffer || (count == 0))
+ return 0;
+
+ if (strncmp(buffer, "on", 2) == 0)
+ enable_output_state = 1;
+ else if (strncmp(buffer, "off", 3) == 0)
+ enable_output_state = 0;
+ else
+ return -EINVAL;
+
+ ret = davinci_enc_enable_output(dev->channel, enable_output_state);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+
+static ssize_t
+control_store(struct device *cdev, const char *buffer, size_t count,
+ u8 ctrl)
+{
+ struct display_device *dev = to_display_dev(cdev);
+ int val;
+ int ret;
+
+ if (!buffer || (count == 0))
+ return 0;
+
+ val = simple_strtoul(buffer, NULL, 0);
+
+ ret = davinci_enc_set_control(dev->channel, ctrl, (char)val);
+ if (ret < 0)
+ return ret;
+ return count;
+}
+static ssize_t control_show(struct device *cdev, char *buf, u8 ctrl)
+{
+ struct display_device *dev = to_display_dev(cdev);
+ unsigned int p;
+ unsigned char val;
+ int ret;
+
+ ret = davinci_enc_get_control(dev->channel, ctrl, &val);
+ if (ret < 0)
+ return ret;
+
+ p = sprintf(buf, "%d", val);
+ p += sprintf(buf + p, "\n");
+
+ return p;
+}
+
+static ssize_t
+brightness_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ return control_store(cdev, buffer, count, VID_ENC_CTRL_BRIGHTNESS);
+}
+static ssize_t brightness_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return control_show(cdev, buf, VID_ENC_CTRL_BRIGHTNESS);
+}
+static ssize_t
+hue_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ return control_store(cdev, buffer, count, VID_ENC_CTRL_HUE);
+}
+static ssize_t hue_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return control_show(cdev, buf, VID_ENC_CTRL_HUE);
+}
+static ssize_t
+gain_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ return control_store(cdev, buffer, count, VID_ENC_CTRL_GAIN);
+}
+static ssize_t gain_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return control_show(cdev, buf, VID_ENC_CTRL_GAIN);
+}
+
+#define DECLARE_ATTR(_name, _mode, _show, _store) \
+{ \
+ .attr = { .name = __stringify(_name), .mode = _mode, \
+ }, \
+ .show = _show, \
+ .store = _store, \
+}
+static struct device_attribute bl_device_attributes[] = {
+ DECLARE_ATTR(output, S_IRWXUGO, output_show, output_store),
+ DECLARE_ATTR(mode, S_IRWXUGO, mode_show, mode_store),
+ DECLARE_ATTR(enable, S_IRWXUGO, enable_show, enable_store),
+ DECLARE_ATTR(brightness, S_IRWXUGO, brightness_show, brightness_store),
+ DECLARE_ATTR(hue, S_IRWXUGO, hue_show, hue_store),
+ DECLARE_ATTR(gain, S_IRWXUGO, gain_show, gain_store)
+};
+
+static void *create_sysfs_files(int channel)
+{
+ struct display_device *dev;
+ int ret;
+ int i;
+
+ dev = kzalloc(sizeof(struct display_device), GFP_KERNEL);
+ if (!dev)
+ return NULL;
+
+ dev->owner = THIS_MODULE;
+ dev->channel = channel;
+ dev->class_dev.class = &display_class;
+ dev_set_name(&dev->class_dev, "ch%d", channel);
+ dev_set_drvdata(&dev->class_dev, dev);
+ ret = device_register(&dev->class_dev);
+ if (ret < 0) {
+ printk(KERN_ERR "DaVinci Enc Manager: Error in device_register\n");
+ kfree(dev);
+ return NULL;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(bl_device_attributes); i++) {
+ ret = device_create_file(&dev->class_dev,
+ &bl_device_attributes[i]);
+ if (ret < 0) {
+ while (--i >= 0)
+ device_remove_file(&dev->class_dev,
+ &bl_device_attributes
+ [i]);
+ dev_set_drvdata(&dev->class_dev, NULL);
+ device_unregister(&dev->class_dev);
+ return NULL;
+ }
+ }
+
+ return dev;
+}
+
+static void remove_sysfs_files(struct display_device *dev)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(bl_device_attributes); i++)
+ device_remove_file(&dev->class_dev,
+ &bl_device_attributes[i]);
+
+ dev_set_drvdata(&dev->class_dev, NULL);
+ device_unregister(&dev->class_dev);
+}
+
+static void davinci_enc_check_options(void)
+{
+ int i;
+
+ i = 0;
+ while (*(davinci_modes[i]) != 0) {
+ if (*ch0_mode != 0 && !strcmp(ch0_mode, davinci_modes[i])) {
+ if (strcmp(ch0_mode, "ntsc") == 0
+ || strcmp(ch0_mode, "pal") == 0)
+ strcpy(davinci_enc_default[0].mode,
+ davinci_modes[i - 1]);
+ else
+ strcpy(davinci_enc_default[0].mode,
+ davinci_modes[i]);
+ }
+ if (*ch1_mode != 0 &&
+ (DAVINCI_ENC_MAX_CHANNELS > 1) &&
+ !strcmp(ch1_mode, davinci_modes[i])) {
+ if (strcmp(ch1_mode, "ntsc") == 0
+ || strcmp(ch1_mode, "pal") == 0)
+ strcpy(davinci_enc_default[1].mode,
+ davinci_modes[i - 1]);
+ else
+ strcpy(davinci_enc_default[1].mode,
+ davinci_modes[i]);
+ }
+ i++;
+ }
+
+ i = 0;
+ while (*(davinci_outputs[i]) != 0) {
+ if (*ch0_output != 0 && !strcmp(ch0_output, davinci_outputs[i]))
+ strcpy(davinci_enc_default[0].output,
+ davinci_outputs[i]);
+
+ if (*ch1_output != 0 &&
+ (DAVINCI_ENC_MAX_CHANNELS > 1) &&
+ !strcmp(ch1_output, davinci_outputs[i]))
+ strcpy(davinci_enc_default[1].output,
+ davinci_outputs[i]);
+ i++;
+ }
+ printk(KERN_NOTICE "ch0 default output \"%s\", mode \"%s\"\n",
+ davinci_enc_default[0].output, davinci_enc_default[0].mode);
+ if (DAVINCI_ENC_MAX_CHANNELS > 1)
+ printk(KERN_NOTICE "ch1 default output \"%s\", mode \"%s\"\n",
+ davinci_enc_default[1].output,
+ davinci_enc_default[1].mode);
+ return;
+}
+
+/*
+ * vid_enc_mgr_init
+ */
+static int davinci_enc_mngr_init(void)
+{
+
+ int i, err = -EINVAL;
+ struct vid_enc_device_mgr *ptr = 0;
+
+
+ class_register(&display_class);
+
+ for (i = 0; i < DAVINCI_ENC_MAX_CHANNELS; i++) {
+ ptr = &enc_dev[i];
+
+ memset((void *)ptr, 0, sizeof(struct vid_enc_device_mgr));
+ sema_init(&ptr->lock, 1);
+
+ davinci_display_device[i] = create_sysfs_files(i);
+ if (!davinci_display_device[i]) {
+ printk(KERN_ERR
+ "Could not create display control sysfs "
+ "files for channel %d\n", i);
+ return -EINVAL;
+ }
+ }
+
+ davinci_enc_check_options();
+ err = 0;
+ return err;
+}
+
+/*
+ * vid_enc_mgr_cleanup
+ */
+static void davinci_enc_mngr_exit(void)
+{
+//Sandeep
+ int i;
+
+ for (i = 0; i < DAVINCI_ENC_MAX_CHANNELS; i++)
+ remove_sysfs_files(davinci_display_device[i]);
+
+ class_unregister(&display_class);
+
+ return;
+}
+
+/*
+ * davinci_get_cur_encoder: get current encoder on the specified channel
+ */
+static struct vid_encoder_device *davinci_get_cur_encoder(int channel)
+{
+ struct vid_enc_device_mgr *mgr;
+
+ if ((channel > DAVINCI_ENC_MAX_CHANNELS) || (channel < 0))
+ return NULL;
+
+ mgr = &enc_dev[channel];
+
+ if (mgr->current_encoder > mgr->num_encoders)
+ return NULL;
+
+ if (mgr->num_encoders == 0)
+ return NULL;
+
+ return mgr->encoder[mgr->current_encoder];
+}
+
+/**
+ * function davinci_enc_setparams
+ * @params: pointer to params structure.
+ * @channel: channel number.
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Set parameters at current active encoder. params will be defined by
+ * the specific encoder and used by user space applications to set encoder
+ * parameters.
+ */
+int davinci_enc_setparams(int channel, void *params)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->params_ops || NULL == params)
+ return -EINVAL;
+
+ if (cur_enc->params_ops->setparams != NULL)
+ return cur_enc->params_ops->setparams(params, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_setparams);
+
+/**
+ * function davinci_enc_getparams
+ * @params: pointer to params structure.
+ * @channel: channel number, 0 for first channel and so forth
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Get parameters at current active encoder. params will be defined by
+ * the specific encoder and used by user space applications to get encoder
+ * parameters.
+ */
+int davinci_enc_getparams(int channel, void *params)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->params_ops || NULL == params)
+ return -EINVAL;
+
+ if (cur_enc->params_ops->getparams != NULL)
+ return cur_enc->params_ops->getparams(params, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_getparams);
+
+/**
+ * function davinci_enc_set_control
+ * @channel: channel number.
+ * @ctrl: davinci_vid_enc_control type
+ * @val: control value to be set
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Set controls at the current encoder's output.
+ *
+ */
+int davinci_enc_set_control(int channel, enum vid_enc_ctrl_id ctrl, char val)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->ctrl_ops)
+ return -EINVAL;
+
+ if (cur_enc->ctrl_ops->setcontrol != NULL)
+ return cur_enc->ctrl_ops->setcontrol(ctrl, val, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_set_control);
+
+/**
+ * function davinci_enc_get_control
+ * @channel: channel number.
+ * @ctrl: control type as per davinci_vid_enc_ctrl_type
+ * @val: ptr to value that gets updated
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Get controls at the current encoder's output.
+ *
+ */
+int davinci_enc_get_control(int channel, enum vid_enc_ctrl_id ctrl, char *val)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->ctrl_ops || NULL == val)
+ return -EINVAL;
+
+ if (cur_enc->ctrl_ops->getcontrol != NULL)
+ return cur_enc->ctrl_ops->getcontrol(ctrl, val, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_get_control);
+
+/**
+ * function davinci_enc_reset
+ * @channel: channel number. DAVINCI_ENC_MAX_CHANNELS set to 1
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Do a software Reset the current encoder. Some of the encoders require this.
+ * This shouldn't affect the contents of the registers configured already for
+ * for output, standard, control etc. If there is no support, encoder doesn't
+ * implement this API.
+ */
+int davinci_enc_reset(int channel)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->misc_ops)
+ return -EINVAL;
+
+ if (cur_enc->misc_ops != NULL && cur_enc->misc_ops->reset != NULL)
+ return cur_enc->misc_ops->reset(cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_reset);
+
+/**
+ * function davinci_enc_enable_output
+ * @channel: channel number. DAVINCI_ENC_MAX_CHANNELS set to 1
+ * @flag: flag to indicate enable or disable, 0 - disable, 1 - enable
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+* Enable/Disable the current ouput. While the VPSS is configured for a
+ * video mode or graphics mode, you may observe noise on the display device
+ * due to timing changes. To avoid this, the output may be disabled during
+* configuration of the VENC or related hardware in the VPSS and re-enabled
+* using this API. This will switch the output DACs Off or On based on the
+* flag.
+ */
+int davinci_enc_enable_output(int channel, int flag)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->misc_ops)
+ return -EINVAL;
+
+ if (cur_enc->misc_ops != NULL && cur_enc->misc_ops->enable != NULL)
+ return cur_enc->misc_ops->enable(flag, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_enable_output);
+
+/**
+ * function davinci_enc_set_output
+ * @channel: channel number.
+ * @output: ptr to output name string
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Set output - Set channel's output to the one identified by output string
+ * The encoder manager calls enumoutput() of each of the encoder to determine
+ * the encoder that supports this output and set this encoder as the current
+ * encoder. It calls setoutput() of the selected encoder. Encoder is expected
+ * set a default mode on this output internally. Manager calls the getmode()
+ * to get information about the mode to program the SoC hardware (VENC/DLCD
+ * for Davinci/DM355. During programing of the SoC hardware for timing, manager
+ * would call enable() to disable and re-enable the output of the encoder
+ * to avoid noise at the display. It may also call reset() to make sure the
+ * encoder is reset if required by the encoder hardware.
+ */
+int davinci_enc_set_output(int channel, char *output)
+{
+ int i, j, found = -1;
+ int err = -EINVAL;
+ struct vid_encoder_device *cur_enc, *new_enc = 0;
+ struct vid_enc_device_mgr *mgr = NULL;
+ char buf[VID_ENC_NAME_MAX_CHARS];
+
+ cur_enc = davinci_get_cur_encoder(channel);
+ if (NULL == cur_enc || NULL == output)
+ return err;
+
+ mgr = &enc_dev[channel];
+
+ /* enumerate the output for each encoder on this channel
+ to find a matching one */
+ for (i = 0; i < mgr->num_encoders; i++) {
+ if (ISNULL(mgr->encoder[i]))
+ return err;
+
+ for (j = 0; j < mgr->encoder[i]->output_ops->count; j++) {
+ err =
+ mgr->encoder[i]->output_ops->
+ enumoutput(j, buf, mgr->encoder[i]);
+ if (err != 0)
+ return err;
+ if (strcmp(buf, output) == 0) {
+ found = i;
+ new_enc = mgr->encoder[i];
+ break;
+ }
+ }
+ }
+
+ if (found < 0) {
+ printk(KERN_ERR "output not found\n");
+ return -EINVAL;
+ }
+
+ /* found the encoder */
+ err = 0;
+ mgr->current_encoder = found;
+ if ((err = down_interruptible(&mgr->lock)) < 0)
+ return err;
+ err |= cur_enc->deinitialize(cur_enc);
+ err |= new_enc->initialize(new_enc, VID_ENC_FULL_INIT_FLAG);
+ err |= new_enc->output_ops->setoutput(output, new_enc);
+
+ if (err < 0) {
+ up(&mgr->lock);
+ return err;
+ }
+
+ /* get default mode */
+ err |= new_enc->mode_ops->getmode(&mgr->current_mode, new_enc);
+
+ if (new_enc->misc_ops != NULL && new_enc->misc_ops->enable != NULL)
+ err |= new_enc->misc_ops->enable(0, new_enc);
+
+ davinci_enc_set_mode_platform(channel, mgr);
+
+ /* Some encoders need a soft reset after configuring VENC, ex.
+ ths8200
+ */
+ if (new_enc->misc_ops != NULL && new_enc->misc_ops->reset != NULL)
+ err |= new_enc->misc_ops->reset(new_enc);
+
+ if (new_enc->misc_ops != NULL && new_enc->misc_ops->enable != NULL)
+ err |= new_enc->misc_ops->enable(1, new_enc);
+
+ if (0 == err)
+ strcpy(enc_dev[channel].current_output, output);
+
+ up(&mgr->lock);
+
+ return err;
+}
+
+EXPORT_SYMBOL(davinci_enc_set_output);
+
+/**
+ * function davinci_enc_set_mode
+ * @channel: channel number.
+ * @mode_info: ptr to vid_enc_mode_info structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * set standard or non-standard mode at current encoder's active output.
+ * Encoder Manager first configure the VENC or associated SoC hardware
+ * before calling the setmode() API of the encoder. To do so, encoder Manager
+ * calls the getmode() to get the mode_info for this mode and configure the
+ * mode based on the timing information present in this structure.
+ */
+int davinci_enc_set_mode(int channel, struct vid_enc_mode_info *mode_info)
+{
+ struct vid_encoder_device *cur_enc;
+ struct vid_enc_device_mgr *mgr = 0;
+
+ int err = -EINVAL;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->mode_ops || NULL == mode_info)
+ return err;
+
+ mgr = &enc_dev[channel];
+
+ if (cur_enc->mode_ops->setmode != NULL) {
+ if ((err = down_interruptible(&mgr->lock)) < 0)
+ return err;
+ err = cur_enc->mode_ops->setmode(mode_info, cur_enc);
+ up(&mgr->lock);
+ } else
+ return err;
+
+ if (err < 0)
+ return err;
+
+ err = cur_enc->mode_ops->getmode(&mgr->current_mode, cur_enc);
+ if (err < 0)
+ return err;
+
+ err = 0;
+
+ if ((err = down_interruptible(&mgr->lock)) < 0)
+ return err;
+
+ if (cur_enc->misc_ops != NULL && cur_enc->misc_ops->enable != NULL)
+ err |= cur_enc->misc_ops->enable(0, cur_enc);
+
+ /* non-standard */
+ if (mgr->current_mode.std == 0) {
+ davinci_enc_set_display_timing(&mgr->current_mode);
+ up(&mgr->lock);
+ return err;
+ }
+
+ davinci_enc_set_mode_platform(channel, mgr);
+
+ if (cur_enc->misc_ops != NULL && cur_enc->misc_ops->reset != NULL)
+ err |= cur_enc->misc_ops->reset(cur_enc);
+
+ if (cur_enc->misc_ops != NULL && cur_enc->misc_ops->enable != NULL)
+ err |= cur_enc->misc_ops->enable(1, cur_enc);
+
+ up(&mgr->lock);
+
+ return err;
+}
+
+EXPORT_SYMBOL(davinci_enc_set_mode);
+
+/**
+ * function davinci_enc_get_mode
+ * @channel: channel number, starting index 0.
+ * @mode_info: ptr to vid_enc_mode_info structure
+ * This is updated by encoder manager
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * get video or graphics mode at current encoder's active output.
+ *
+*/
+int davinci_enc_get_mode(int channel, struct vid_enc_mode_info *mode_info)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->mode_ops || NULL == mode_info)
+ return -EINVAL;
+
+ if (cur_enc->mode_ops->getmode != NULL)
+ return cur_enc->mode_ops->getmode(mode_info, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_get_mode);
+
+/**
+ * function davinci_enc_get_output
+ * @channel: channel number.
+ * @output: ptr to array of char to hold output name.
+ * size VID_ENC_NAME_MAX_CHARS
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Get output - Get channel's output. User call this to get the current
+* output name
+ */
+int davinci_enc_get_output(int channel, char *output)
+{
+ struct vid_encoder_device *cur_enc;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->output_ops || NULL == output)
+ return -EINVAL;
+
+ if (cur_enc->output_ops->getoutput != NULL)
+ return cur_enc->output_ops->getoutput(output, cur_enc);
+ else
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_get_output);
+
+/**
+ * vid_enc_register_encoder
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Register the encoder module with the encoder manager
+ * This is implemented by the encoder Manager
+ */
+int vid_enc_register_encoder(struct vid_encoder_device *encoder)
+{
+ int i, found = 0, err = 0;
+ int ch_id = 0;
+ struct vid_enc_device_mgr *mgr = 0;
+ struct vid_encoder_device *cur_enc = 0;
+ struct enc_config *enc_def = 0;
+ struct vid_enc_mode_info mode_info;
+ char buf[VID_ENC_NAME_MAX_CHARS];
+
+ if (ISNULL(encoder))
+ return -EINVAL;
+
+ memset(&mode_info, 0, sizeof(struct vid_enc_mode_info));
+ ch_id = encoder->channel_id;
+
+ if ((ch_id > DAVINCI_ENC_MAX_CHANNELS) || (ch_id < 0))
+ return -EINVAL;
+
+ mgr = &enc_dev[ch_id];
+
+ if (mgr->num_encoders > DAVINCI_ENC_MAX_ENCODERS)
+ return -EINVAL;
+
+ /* get module boot args */
+ enc_def = &davinci_enc_default[ch_id];
+
+ /* we'd assume only std mode being reqeusted from bootargs */
+ mode_info.name = enc_def->mode;
+ mode_info.std = 1;
+ if (mgr->num_encoders == 0) {
+
+ /* set default for the first encoder */
+ err = encoder->initialize(encoder, VID_ENC_FULL_INIT_FLAG);
+
+ if (err >= 0) {
+ /* see if this has output requested by default
+ or bootarg */
+
+ for (i = 0; i < encoder->output_ops->count; i++) {
+ err =
+ encoder->output_ops->enumoutput(i, buf,
+ encoder);
+ if (err != 0)
+ return err;
+ if (strcmp(buf, enc_def->output) == 0) {
+ err =
+ encoder->output_ops->
+ setoutput(enc_def->output, encoder);
+ found = 1;
+ break;
+ }
+ }
+
+ if (found == 1) {
+ err =
+ encoder->mode_ops->setmode(&mode_info,
+ encoder);
+ if (err != 0) {
+ printk
+ (KERN_ERR
+ "Setmode failed, reset to encoder"
+ " default...\n");
+ encoder->deinitialize(encoder);
+ encoder->initialize(encoder, 0);
+ err = 0;
+ }
+ }
+
+ mgr->encoder[mgr->num_encoders++] = encoder;
+ mgr->current_encoder = 0;
+ encoder->output_ops->getoutput(mgr->current_output,
+ encoder);
+ encoder->mode_ops->getmode(&mgr->current_mode, encoder);
+ if ((err = down_interruptible(&mgr->lock)) < 0)
+ return err;
+ davinci_enc_set_mode_platform(ch_id, mgr);
+ if (encoder->misc_ops != NULL
+ && encoder->misc_ops->reset != NULL)
+ err |= encoder->misc_ops->reset(encoder);
+ up(&mgr->lock);
+ if (encoder->misc_ops != NULL
+ && encoder->misc_ops->enable != NULL)
+ encoder->misc_ops->enable(1, encoder);
+ }
+ } else {
+ /* If we have more than one encoder module, then we still
+ want to make sure we can set to the default output and
+ mode. If current one is not the default, try this new
+ one. If still no luck, just use the newly registered
+ one as default */
+ cur_enc = davinci_get_cur_encoder(ch_id);
+
+ if ((strcmp(mgr->current_output,
+ enc_def->output) != 0) && (cur_enc != NULL)) {
+ cur_enc->deinitialize(cur_enc);
+
+ err = encoder->initialize(encoder,
+ VID_ENC_FULL_INIT_FLAG);
+
+ if (err < 0) {
+ /* no change if new one cannot be
+ initialized */
+ encoder->deinitialize(encoder);
+ cur_enc->initialize(cur_enc, 0);
+ return err;
+ }
+ /* look for matching output */
+ for (i = 0; i < encoder->output_ops->count; i++) {
+ err =
+ encoder->output_ops->enumoutput(i, buf,
+ encoder);
+ if (err != 0)
+ return err;
+ if (strcmp(buf, enc_def->output) == 0) {
+ err =
+ encoder->output_ops->
+ setoutput(enc_def->output, encoder);
+ found = 1;
+ break;
+ }
+ }
+
+ if (found == 1) {
+ err |=
+ encoder->mode_ops->setmode(&mode_info,
+ encoder);
+ /* setmode went wrong, try redo init */
+ if (err != 0) {
+ printk
+ (KERN_ERR
+ "Set output or mode failed, "
+ "reset to encoder default...\n");
+ encoder->deinitialize(encoder);
+ encoder->initialize(encoder, 0);
+ err = 0;
+ }
+ }
+
+ mgr->encoder[mgr->num_encoders++] = encoder;
+ mgr->current_encoder = mgr->num_encoders - 1;
+ encoder->output_ops->getoutput(mgr->current_output,
+ encoder);
+ encoder->mode_ops->getmode(&mgr->current_mode, encoder);
+ if ((err = down_interruptible(&mgr->lock)) < 0)
+ return err;
+ davinci_enc_set_mode_platform(ch_id, mgr);
+ if (encoder->misc_ops != NULL
+ && encoder->misc_ops->reset != NULL)
+ err |= encoder->misc_ops->reset(encoder);
+ up(&mgr->lock);
+ if (encoder->misc_ops != NULL
+ && encoder->misc_ops->enable != NULL)
+ encoder->misc_ops->enable(1, encoder);
+
+ } else if (strcmp(mgr->current_output, enc_def->output) == 0) {
+ /* no change in output or mode */
+ mgr->encoder[mgr->num_encoders++] = encoder;
+
+ }
+ }
+
+ return err;
+}
+
+EXPORT_SYMBOL(vid_enc_register_encoder);
+
+/**
+ * vid_enc_unregister_encoder
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Register the encoder module with the encoder manager
+ * This is implemented by the encoder Manager
+ */
+int vid_enc_unregister_encoder(struct vid_encoder_device *encoder)
+{
+ int i, j = 0, err = -EINVAL, ch_id;
+ struct vid_enc_device_mgr *mgr = 0;
+
+ if (ISNULL(encoder))
+ return err;
+
+ ch_id = encoder->channel_id;
+
+ if ((ch_id > DAVINCI_ENC_MAX_CHANNELS) || (ch_id < 0))
+ return err;
+
+ mgr = &enc_dev[ch_id];
+
+ for (i = 0; i < mgr->num_encoders; i++) {
+ if (encoder == mgr->encoder[i]) {
+
+ mgr->encoder[i] = NULL;
+ for (j = i; j < mgr->num_encoders - 1; j++)
+ mgr->encoder[j] = mgr->encoder[j + 1];
+ mgr->num_encoders--;
+ err = 0;
+ break;
+ }
+ }
+ return err;
+
+}
+
+EXPORT_SYMBOL(vid_enc_unregister_encoder);
+
+/**
+ * davinci_enc_enable_vbi
+ * @flag: flag which tells whether to enable or disable raw vbi
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * This function is used to enable/disable RAW VBI sending in
+ * the encoder.
+ */
+int davinci_enc_enable_vbi(int channel, int flag)
+{
+ struct vid_encoder_device *cur_enc = NULL;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->enable_vbi)
+ return -EINVAL;
+
+ return cur_enc->enable_vbi(flag, cur_enc);
+}
+
+EXPORT_SYMBOL(davinci_enc_enable_vbi);
+
+/**
+ * davinci_enc_enable_hbi
+ * @flag: flag which tells whether to enable or disable raw hbi
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * This function is used to enable/disable RAW HBI sending in
+ * the encoder.
+ */
+int davinci_enc_enable_hbi(int channel, int flag)
+{
+ struct vid_encoder_device *cur_enc = NULL;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->enable_hbi)
+ return -EINVAL;
+
+ return cur_enc->enable_hbi(flag, cur_enc);
+}
+
+EXPORT_SYMBOL(davinci_enc_enable_hbi);
+
+/**
+ * davinci_enc_enable_sliced_vbi
+ * @channel: channel number.
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Following funcion is used to enable support for
+ * sending set of sliced vbi services. Caller calls
+ * this function with pointer to the structure vid_enc_sliced_vbi_service
+ */
+int davinci_enc_enable_sliced_vbi(int channel,
+ struct vid_enc_sliced_vbi_service *services)
+{
+ struct vid_encoder_device *cur_enc = NULL;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->set_vbi_services)
+ return -EINVAL;
+
+ return cur_enc->set_vbi_services(services, cur_enc);
+}
+
+EXPORT_SYMBOL(davinci_enc_enable_sliced_vbi);
+
+/**
+ * davinci_enc_write_sliced_vbi_data
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Register the encoder module with the encoder manager
+ * This is implemented by the encoder Manager
+ */
+int davinci_enc_write_sliced_vbi_data(int channel,
+ struct vid_enc_sliced_vbi_data *data)
+{
+ struct vid_encoder_device *cur_enc = NULL;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->write_vbi_data)
+ return -EINVAL;
+
+ return cur_enc->write_vbi_data(data, cur_enc);
+}
+
+EXPORT_SYMBOL(davinci_enc_write_sliced_vbi_data);
+
+int davinci_enc_get_sliced_cap(int channel,
+ struct vid_enc_sliced_vbi_service *service)
+{
+ struct vid_encoder_device *cur_enc = NULL;
+
+ cur_enc = davinci_get_cur_encoder(channel);
+
+ if (NULL == cur_enc || NULL == cur_enc->get_sliced_cap)
+ return -EINVAL;
+
+ return cur_enc->get_sliced_cap(service, cur_enc);
+}
+
+EXPORT_SYMBOL(davinci_enc_get_sliced_cap);
+
+subsys_initcall(davinci_enc_mngr_init);
+module_exit(davinci_enc_mngr_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("DaVinci Encoder Manager");
+MODULE_AUTHOR("Texas Instruments");
diff --git a/drivers/media/platform/davinci/davinci_osd.c b/drivers/media/platform/davinci/davinci_osd.c
new file mode 100644
index 00000000..e4f4b756
--- /dev/null
+++ b/drivers/media/platform/davinci/davinci_osd.c
@@ -0,0 +1,2416 @@
+/*
+ * TI DaVinci On-Screen Display Manager
+ *
+ * Andy Lowe (alowe@mvista.com), MontaVista Software
+ *
+ * 2007 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <video/davinci_vpbe.h>
+#include <video/davinci_osd.h>
+#include <mach/cputype.h>
+#include <mach/hardware.h>
+#include <media/davinci/vpss.h>
+
+#include <asm/io.h>
+
+#define MODULE_NAME "davinci_osd"
+
+#define DM355_VPSSBL_REG_BASE 0x01C70800
+
+#define DAVINCI_DDR_BASE 0x80000000
+
+/* parameters that apply on a per-window (OSD or video) basis */
+struct davinci_window_state {
+ int is_allocated;
+ int is_enabled;
+ unsigned long fb_base_phys;
+ enum davinci_zoom_factor h_zoom;
+ enum davinci_zoom_factor v_zoom;
+ struct davinci_layer_config lconfig;
+};
+
+/* parameters that apply on a per-OSD-window basis */
+struct davinci_osdwin_state {
+ enum davinci_clut clut;
+ enum davinci_blending_factor blend;
+ int colorkey_blending;
+ unsigned colorkey;
+ int rec601_attenuation;
+ unsigned char palette_map[16]; /* index is pixel value */
+};
+
+/* hardware rectangular cursor parameters */
+struct davinci_cursor_state {
+ int is_enabled;
+ struct davinci_cursor_config config;
+};
+
+static bool field_inversion;
+
+struct davinci_osd_state {
+ spinlock_t lock;
+ struct device *dev;
+ dma_addr_t osd_base_phys;
+ unsigned long osd_base;
+ unsigned long osd_size;
+
+ int irq;
+ struct davinci_disp_callback *callback;
+ int pingpong; /* 1-->the isr will toggle the VID0 ping-pong buffer */
+ int interpolation_filter;
+ enum davinci_h_exp_ratio osd_h_exp;
+ enum davinci_v_exp_ratio osd_v_exp;
+ enum davinci_h_exp_ratio vid_h_exp;
+ enum davinci_v_exp_ratio vid_v_exp;
+ enum davinci_clut backg_clut;
+ unsigned backg_clut_index;
+ enum davinci_rom_clut rom_clut;
+ int is_blinking; /* attribute window blinking enabled */
+ enum davinci_blink_interval blink;
+ enum davinci_pix_format yc_pixfmt; /* YCbCrI or YCrCbI */
+ unsigned char clut_ram[256][3]; /* columns are Y, Cb, Cr */
+ struct davinci_cursor_state cursor;
+ struct davinci_window_state win[4]; /* OSD0, VID0, OSD1, VID1 */
+ struct davinci_osdwin_state osdwin[2]; /* OSD0, OSD1 */
+};
+
+static struct davinci_osd_state osd_state;
+static struct davinci_osd_state *osd = &osd_state;
+
+/* register access routines */
+static __inline__ u32 osd_read(u32 offset)
+{
+ return __raw_readl((volatile void *)(osd->osd_base + offset));
+}
+
+static __inline__ u32 osd_write(u32 val, u32 offset)
+{
+ __raw_writel(val, (volatile void *)(osd->osd_base + offset));
+ return val;
+}
+
+static __inline__ u32 osd_set(u32 mask, u32 offset)
+{
+ u32 addr = osd->osd_base + offset;
+ u32 val = __raw_readl((volatile void *)addr) | mask;
+
+ __raw_writel(val, (volatile void *)addr);
+ return val;
+}
+
+static __inline__ u32 osd_clear(u32 mask, u32 offset)
+{
+ u32 addr = osd->osd_base + offset;
+ u32 val = __raw_readl((volatile void *)addr) & ~mask;
+
+ __raw_writel(val, (volatile void *) addr);
+ return val;
+}
+
+static __inline__ u32 osd_merge(u32 mask, u32 val, u32 offset)
+{
+ u32 addr = osd->osd_base + offset;
+ u32 new_val = (__raw_readl((volatile void *)addr) & ~mask) | (val & mask);
+
+ __raw_writel(new_val, (volatile void *)addr);
+ return new_val;
+}
+
+void osd_write_left_margin(u32 val)
+{
+ __raw_writel(val, (volatile void *)(osd->osd_base + OSD_BASEPX));
+}
+EXPORT_SYMBOL(osd_write_left_margin);
+
+void osd_write_upper_margin(u32 val)
+{
+ __raw_writel(val, (volatile void *)(osd->osd_base + OSD_BASEPY));
+}
+EXPORT_SYMBOL(osd_write_upper_margin);
+
+u32 osd_read_left_margin(void)
+{
+ return __raw_readl((volatile void *)(osd->osd_base + OSD_BASEPX));
+}
+EXPORT_SYMBOL(osd_read_left_margin);
+
+u32 osd_read_upper_margin(void)
+{
+ return __raw_readl((volatile void *)(osd->osd_base + OSD_BASEPY));
+}
+EXPORT_SYMBOL(osd_read_upper_margin);
+
+
+/* define some macros for layer and pixfmt classification */
+#define is_osd_win(layer) (((layer) == WIN_OSD0) || ((layer) == WIN_OSD1))
+#define is_vid_win(layer) (((layer) == WIN_VID0) || ((layer) == WIN_VID1))
+#define is_rgb_pixfmt(pixfmt) \
+ (((pixfmt) == PIXFMT_RGB565) || ((pixfmt) == PIXFMT_RGB888))
+#define is_yc_pixfmt(pixfmt) \
+ (((pixfmt) == PIXFMT_YCbCrI) || ((pixfmt) == PIXFMT_YCrCbI) || \
+ ((pixfmt) == PIXFMT_NV12))
+#define MAX_WIN_SIZE OSD_VIDWIN0XP_V0X
+#define MAX_LINE_LENGTH (OSD_VIDWIN0OFST_V0LO << 5)
+
+/* interrupt service routine */
+static irqreturn_t davinci_disp_isr(int irq, void *arg)
+{
+ unsigned event = 0;
+ struct davinci_disp_callback *callback = osd->callback;
+ static unsigned last_event;
+#if 0
+ if (cpu_is_davinci_dm355()) {
+ if (!
+ (__raw_readl(IO_ADDRESS(DM355_VPSSBL_REG_BASE + VPSSBL_INTSTAT)) &
+ VPSSBL_INTSTAT_VENCINT)) {
+ return IRQ_NONE;
+ }
+ __raw_writel(VPSSBL_INTSTAT_VENCINT,
+ IO_ADDRESS(DM355_VPSSBL_REG_BASE + VPSSBL_INTSTAT));
+ }
+#endif
+#if 0
+ if (cpu_is_davinci_dm365()) {
+ if (!
+ (__raw_readl(IO_ADDRESS(DM365_ISP5_REG_BASE + ISP5_INTSTAT)) &
+ ISP5_INTSTAT_VENCINT)) {
+ return IRQ_NONE;
+ }
+ __raw_writel(ISP5_INTSTAT_VENCINT,
+ IO_ADDRESS(DM365_ISP5_REG_BASE + ISP5_INTSTAT));
+ }
+#endif
+ if (davinci_disp_is_second_field())
+ event |= DAVINCI_DISP_SECOND_FIELD;
+ else
+ event |= DAVINCI_DISP_FIRST_FIELD;
+
+ if (event == (last_event & ~DAVINCI_DISP_END_OF_FRAME)) {
+ /*
+ * If the display is non-interlaced, then we need to flag the
+ * end-of-frame event at every interrupt regardless of the
+ * value of the FIDST bit. We can conclude that the display is
+ * non-interlaced if the value of the FIDST bit is unchanged
+ * from the previous interrupt.
+ */
+ event |= DAVINCI_DISP_END_OF_FRAME;
+ } else if (event == DAVINCI_DISP_SECOND_FIELD) {
+ /* end-of-frame for interlaced display */
+ event |= DAVINCI_DISP_END_OF_FRAME;
+ }
+ last_event = event;
+
+ if (osd->pingpong) {
+ /*
+ * Toggle the ping-pong buffers for VID0. This is part of the
+ * workaround for field signal inversion Advisory 1.3.8 for
+ * the DM6446.
+ */
+ if (event & DAVINCI_DISP_SECOND_FIELD)
+ osd_set(OSD_MISCCTL_PPSW, OSD_MISCCTL);
+ else
+ osd_clear(OSD_MISCCTL_PPSW, OSD_MISCCTL);
+ }
+
+ while (callback) {
+ if (callback->mask & event)
+ callback->handler(event, callback->arg);
+ callback = callback->next;
+ }
+
+ return IRQ_HANDLED;
+}
+
+int davinci_disp_unregister_callback(struct davinci_disp_callback *callback)
+{
+ unsigned long flags;
+ struct davinci_disp_callback *prev;
+ int err = 0;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ prev = osd->callback;
+ if (!prev)
+ err = -1;
+ else if (prev == callback)
+ osd->callback = callback->next;
+ else {
+ while (prev->next && (prev->next != callback))
+ prev = prev->next;
+ if (!prev->next)
+ err = -1;
+ else
+ prev->next = callback->next;
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+
+ return err;
+}
+EXPORT_SYMBOL(davinci_disp_unregister_callback);
+
+int davinci_disp_register_callback(struct davinci_disp_callback *callback)
+{
+ unsigned long flags;
+ struct davinci_disp_callback *next;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ next = osd->callback;
+ osd->callback = callback;
+ callback->next = next;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(davinci_disp_register_callback);
+
+/*
+ * This routine implements a workaround for the field signal inversion silicon
+ * erratum described in Advisory 1.3.8 for the DM6446. The fb_base_phys and
+ * lconfig parameters apply to the vid0 window. This routine should be called
+ * whenever the vid0 layer configuration or start address is modified, or when
+ * the OSD field inversion setting is modified.
+ * Returns: 1 if the ping-pong buffers need to be toggled in the vsync isr, or
+ * 0 otherwise
+ */
+static int _davinci_disp_dm6446_vid0_pingpong(int fld_inversion,
+ unsigned long fb_base_phys,
+ const struct davinci_layer_config
+ *lconfig)
+{
+ return 0;
+}
+
+static void _davinci_disp_set_field_inversion(int enable)
+{
+ unsigned fsinv = 0;
+
+ field_inversion = (enable != 0);
+ if (enable)
+ fsinv = OSD_MODE_FSINV;
+
+ osd_merge(OSD_MODE_FSINV, fsinv, OSD_MODE);
+}
+
+void davinci_disp_set_field_inversion(int enable)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ _davinci_disp_set_field_inversion(enable);
+
+ osd->pingpong =
+ _davinci_disp_dm6446_vid0_pingpong(field_inversion,
+ osd->win[WIN_VID0].fb_base_phys,
+ &osd->win[WIN_VID0].lconfig);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_field_inversion);
+
+void davinci_disp_get_background(enum davinci_clut *clut,
+ unsigned char *clut_index)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *clut = osd->backg_clut;
+ *clut_index = osd->backg_clut_index;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_background);
+
+static void _davinci_disp_set_background(enum davinci_clut clut,
+ unsigned char clut_index)
+{
+ u32 mode = 0;
+
+ if (clut == RAM_CLUT)
+ mode |= OSD_MODE_BCLUT;
+ mode |= clut_index;
+ osd_merge(OSD_MODE_BCLUT | OSD_MODE_CABG, mode, OSD_MODE);
+}
+
+void davinci_disp_set_background(enum davinci_clut clut,
+ unsigned char clut_index)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->backg_clut = clut;
+ osd->backg_clut_index = clut_index;
+ _davinci_disp_set_background(clut, clut_index);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_background);
+
+int davinci_disp_get_interpolation_filter(void)
+{
+ return osd->interpolation_filter;
+}
+EXPORT_SYMBOL(davinci_disp_get_interpolation_filter);
+
+static void _davinci_disp_set_interpolation_filter(int filter)
+{
+ if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365())
+ osd_clear(OSD_EXTMODE_EXPMDSEL, OSD_EXTMODE);
+ osd_merge(OSD_MODE_EF, filter ? OSD_MODE_EF : 0, OSD_MODE);
+}
+
+void davinci_disp_set_interpolation_filter(int filter)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->interpolation_filter = (filter != 0);
+ _davinci_disp_set_interpolation_filter(filter);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_interpolation_filter);
+
+void davinci_disp_get_cursor_config(struct davinci_cursor_config *cursor)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *cursor = osd->cursor.config;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_cursor_config);
+
+static void _davinci_disp_set_cursor_config(const struct davinci_cursor_config
+ *cursor)
+{
+ unsigned rectcur = 0;
+
+ osd_write(cursor->xsize, OSD_CURXL);
+ osd_write(cursor->xpos, OSD_CURXP);
+
+ if (cursor->interlaced) {
+ osd_write(cursor->ypos >> 1, OSD_CURYP);
+ if (cpu_is_davinci_dm644x()) {
+ /* Must add 1 to ysize due to device erratum. */
+ osd_write((cursor->ysize >> 1) + 1, OSD_CURYL);
+ } else
+ osd_write(cursor->ysize >> 1, OSD_CURYL);
+ } else {
+ osd_write(cursor->ypos, OSD_CURYP);
+ if (cpu_is_davinci_dm644x()) {
+ /* Must add 1 to ysize due to device erratum. */
+ osd_write(cursor->ysize + 1, OSD_CURYL);
+ } else
+ osd_write(cursor->ysize, OSD_CURYL);
+ }
+
+ if (cursor->clut == RAM_CLUT)
+ rectcur |= OSD_RECTCUR_CLUTSR;
+ rectcur |= (cursor->clut_index << OSD_RECTCUR_RCAD_SHIFT);
+ rectcur |= (cursor->h_width << OSD_RECTCUR_RCHW_SHIFT);
+ rectcur |= (cursor->v_width << OSD_RECTCUR_RCVW_SHIFT);
+ osd_merge(OSD_RECTCUR_RCAD | OSD_RECTCUR_CLUTSR | OSD_RECTCUR_RCHW |
+ OSD_RECTCUR_RCVW, rectcur, OSD_RECTCUR);
+}
+
+void davinci_disp_set_cursor_config(struct davinci_cursor_config *cursor)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ cursor->xsize = min(cursor->xsize, (unsigned)OSD_CURXL_RCSW);
+ cursor->ysize = min(cursor->ysize, (unsigned)OSD_CURYL_RCSH);
+ cursor->xpos = min(cursor->xpos, (unsigned)OSD_CURXP_RCSX);
+ cursor->ypos = min(cursor->ypos, (unsigned)OSD_CURYP_RCSY);
+ cursor->interlaced = (cursor->interlaced != 0);
+ if (cursor->interlaced) {
+ cursor->ysize &= ~1;
+ cursor->ypos &= ~1;
+ }
+ cursor->h_width &= (OSD_RECTCUR_RCHW >> OSD_RECTCUR_RCHW_SHIFT);
+ cursor->v_width &= (OSD_RECTCUR_RCVW >> OSD_RECTCUR_RCVW_SHIFT);
+ cursor->clut = (cursor->clut == RAM_CLUT) ? RAM_CLUT : ROM_CLUT;
+
+ osd->cursor.config = *cursor;
+ _davinci_disp_set_cursor_config(cursor);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_cursor_config);
+
+int davinci_disp_cursor_is_enabled(void)
+{
+ return osd->cursor.is_enabled;
+}
+EXPORT_SYMBOL(davinci_disp_cursor_is_enabled);
+
+static void _davinci_disp_cursor_disable(void)
+{
+ osd_clear(OSD_RECTCUR_RCACT, OSD_RECTCUR);
+}
+
+void davinci_disp_cursor_disable(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->cursor.is_enabled = 0;
+ _davinci_disp_cursor_disable();
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_cursor_disable);
+
+static void _davinci_disp_cursor_enable(void)
+{
+ osd_set(OSD_RECTCUR_RCACT, OSD_RECTCUR);
+}
+
+void davinci_disp_cursor_enable(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->cursor.is_enabled = 1;
+ _davinci_disp_cursor_enable();
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_cursor_enable);
+
+void davinci_disp_get_vid_expansion(enum davinci_h_exp_ratio *h_exp,
+ enum davinci_v_exp_ratio *v_exp)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *h_exp = osd->vid_h_exp;
+ *v_exp = osd->vid_v_exp;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_vid_expansion);
+
+static void _davinci_disp_set_vid_expansion(enum davinci_h_exp_ratio h_exp,
+ enum davinci_v_exp_ratio v_exp)
+{
+ u32 mode = 0, extmode = 0;
+
+ switch (h_exp) {
+ case H_EXP_OFF:
+ break;
+ case H_EXP_9_OVER_8:
+ mode |= OSD_MODE_VHRSZ;
+ break;
+ case H_EXP_3_OVER_2:
+ extmode |= OSD_EXTMODE_VIDHRSZ15;
+ break;
+ }
+
+ switch (v_exp) {
+ case V_EXP_OFF:
+ break;
+ case V_EXP_6_OVER_5:
+ mode |= OSD_MODE_VVRSZ;
+ break;
+ }
+
+ if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365())
+ osd_merge(OSD_EXTMODE_VIDHRSZ15, extmode, OSD_EXTMODE);
+ osd_merge(OSD_MODE_VHRSZ | OSD_MODE_VVRSZ, mode, OSD_MODE);
+}
+
+int davinci_disp_set_vid_expansion(enum davinci_h_exp_ratio h_exp,
+ enum davinci_v_exp_ratio v_exp)
+{
+ unsigned long flags;
+
+ if (h_exp == H_EXP_3_OVER_2 && cpu_is_davinci_dm644x())
+ return -1;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->vid_h_exp = h_exp;
+ osd->vid_v_exp = v_exp;
+ _davinci_disp_set_vid_expansion(h_exp, v_exp);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL(davinci_disp_set_vid_expansion);
+
+void davinci_disp_get_osd_expansion(enum davinci_h_exp_ratio *h_exp,
+ enum davinci_v_exp_ratio *v_exp)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *h_exp = osd->osd_h_exp;
+ *v_exp = osd->osd_v_exp;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_osd_expansion);
+
+static void _davinci_disp_set_osd_expansion(enum davinci_h_exp_ratio h_exp,
+ enum davinci_v_exp_ratio v_exp)
+{
+ u32 mode = 0, extmode = 0;
+
+ switch (h_exp) {
+ case H_EXP_OFF:
+ break;
+ case H_EXP_9_OVER_8:
+ mode |= OSD_MODE_OHRSZ;
+ break;
+ case H_EXP_3_OVER_2:
+ extmode |= OSD_EXTMODE_OSDHRSZ15;
+ break;
+ }
+
+ switch (v_exp) {
+ case V_EXP_OFF:
+ break;
+ case V_EXP_6_OVER_5:
+ mode |= OSD_MODE_OVRSZ;
+ break;
+ }
+
+ if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365())
+ osd_merge(OSD_EXTMODE_OSDHRSZ15, extmode, OSD_EXTMODE);
+ osd_merge(OSD_MODE_OHRSZ | OSD_MODE_OVRSZ, mode, OSD_MODE);
+}
+
+int davinci_disp_set_osd_expansion(enum davinci_h_exp_ratio h_exp,
+ enum davinci_v_exp_ratio v_exp)
+{
+ unsigned long flags;
+
+ if (h_exp == H_EXP_3_OVER_2 && cpu_is_davinci_dm644x())
+ return -1;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->osd_h_exp = h_exp;
+ osd->osd_v_exp = v_exp;
+ _davinci_disp_set_osd_expansion(h_exp, v_exp);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL(davinci_disp_set_osd_expansion);
+
+void davinci_disp_get_blink_attribute(int *enable,
+ enum davinci_blink_interval *blink)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *enable = osd->is_blinking;
+ *blink = osd->blink;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_blink_attribute);
+
+static void _davinci_disp_set_blink_attribute(int enable,
+ enum davinci_blink_interval blink)
+{
+ u32 osdatrmd = 0;
+
+ if (enable) {
+ osdatrmd |= OSD_OSDATRMD_BLNK;
+ osdatrmd |= blink << OSD_OSDATRMD_BLNKINT_SHIFT;
+ }
+ /* caller must ensure that OSD1 is configured in attribute mode */
+ osd_merge(OSD_OSDATRMD_BLNKINT | OSD_OSDATRMD_BLNK, osdatrmd,
+ OSD_OSDATRMD);
+}
+
+void davinci_disp_set_blink_attribute(int enable,
+ enum davinci_blink_interval blink)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->is_blinking = (enable != 0);
+ osd->blink = blink;
+ if (osd->win[WIN_OSD1].lconfig.pixfmt == PIXFMT_OSD_ATTR)
+ _davinci_disp_set_blink_attribute(enable, blink);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_blink_attribute);
+
+enum davinci_rom_clut davinci_disp_get_rom_clut(void)
+{
+ return osd->rom_clut;
+}
+EXPORT_SYMBOL(davinci_disp_get_rom_clut);
+
+static void _davinci_disp_set_rom_clut(enum davinci_rom_clut rom_clut)
+{
+ if (rom_clut == ROM_CLUT0)
+ osd_clear(OSD_MISCCTL_RSEL, OSD_MISCCTL);
+ else
+ osd_set(OSD_MISCCTL_RSEL, OSD_MISCCTL);
+}
+
+void davinci_disp_set_rom_clut(enum davinci_rom_clut rom_clut)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->rom_clut = rom_clut;
+ _davinci_disp_set_rom_clut(rom_clut);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_rom_clut);
+
+static void _davinci_disp_set_clut_ycbcr(unsigned char clut_index,
+ unsigned char y, unsigned char cb,
+ unsigned char cr)
+{
+ /* wait until any previous writes to the CLUT RAM have completed */
+ while (osd_read(OSD_MISCCTL) & OSD_MISCCTL_CPBSY)
+ cpu_relax();
+
+ osd_write((y << OSD_CLUTRAMYCB_Y_SHIFT) | cb, OSD_CLUTRAMYCB);
+ osd_write((cr << OSD_CLUTRAMCR_CR_SHIFT) | clut_index, OSD_CLUTRAMCR);
+}
+
+void davinci_disp_set_clut_ycbcr(unsigned char clut_index, unsigned char y,
+ unsigned char cb, unsigned char cr)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->clut_ram[clut_index][0] = y;
+ osd->clut_ram[clut_index][1] = cb;
+ osd->clut_ram[clut_index][2] = cr;
+ _davinci_disp_set_clut_ycbcr(clut_index, y, cb, cr);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_clut_ycbcr);
+
+static void _davinci_disp_rgb_to_ycbcr(const unsigned char rgb[3],
+ unsigned char ycbcr[3])
+{
+ int y, cb, cr;
+ int r = rgb[0];
+ int g = rgb[1];
+ int b = rgb[2];
+ /*
+ * This conversion matrix corresponds to the conversion matrix used
+ * by the OSD to convert RGB values to YCbCr values. All coefficients
+ * have been scaled by a factor of 2^22.
+ */
+ static const int rgb_to_ycbcr[3][3] = {
+ {1250330, 2453618, 490352},
+ {-726093, -1424868, 2150957},
+ {2099836, -1750086, -349759}
+ };
+
+ y = rgb_to_ycbcr[0][0] * r + rgb_to_ycbcr[0][1] * g +
+ rgb_to_ycbcr[0][2] * b;
+ cb = rgb_to_ycbcr[1][0] * r + rgb_to_ycbcr[1][1] * g +
+ rgb_to_ycbcr[1][2] * b;
+ cr = rgb_to_ycbcr[2][0] * r + rgb_to_ycbcr[2][1] * g +
+ rgb_to_ycbcr[2][2] * b;
+
+ /* round and scale */
+ y = ((y + (1 << 21)) >> 22);
+ cb = ((cb + (1 << 21)) >> 22) + 128;
+ cr = ((cr + (1 << 21)) >> 22) + 128;
+
+ /* clip */
+ y = (y < 0) ? 0 : y;
+ y = (y > 255) ? 255 : y;
+ cb = (cb < 0) ? 0 : cb;
+ cb = (cb > 255) ? 255 : cb;
+ cr = (cr < 0) ? 0 : cr;
+ cr = (cr > 255) ? 255 : cr;
+
+ ycbcr[0] = y;
+ ycbcr[1] = cb;
+ ycbcr[2] = cr;
+}
+
+void davinci_disp_set_clut_rgb(unsigned char clut_index, unsigned char r,
+ unsigned char g, unsigned char b)
+{
+ unsigned char rgb[3], ycbcr[3];
+ unsigned long flags;
+
+ rgb[0] = r;
+ rgb[1] = g;
+ rgb[2] = b;
+ _davinci_disp_rgb_to_ycbcr(rgb, ycbcr);
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osd->clut_ram[clut_index][0] = ycbcr[0];
+ osd->clut_ram[clut_index][1] = ycbcr[1];
+ osd->clut_ram[clut_index][2] = ycbcr[2];
+ _davinci_disp_set_clut_ycbcr(clut_index, ycbcr[0], ycbcr[1], ycbcr[2]);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_clut_rgb);
+
+unsigned char davinci_disp_get_palette_map(enum davinci_osd_layer osdwin,
+ unsigned char pixel_value)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned char clut_index;
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ switch (win->lconfig.pixfmt) {
+ case PIXFMT_1BPP:
+ clut_index = osdwin_state->palette_map[pixel_value & 0x1];
+ break;
+ case PIXFMT_2BPP:
+ clut_index = osdwin_state->palette_map[pixel_value & 0x3];
+ break;
+ case PIXFMT_4BPP:
+ clut_index = osdwin_state->palette_map[pixel_value & 0xf];
+ break;
+ default:
+ clut_index = 0;
+ break;
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+
+ return clut_index;
+}
+EXPORT_SYMBOL(davinci_disp_get_palette_map);
+
+static void _davinci_disp_set_palette_map(enum davinci_osd_layer osdwin,
+ unsigned char pixel_value,
+ unsigned char clut_index,
+ enum davinci_pix_format pixfmt)
+{
+ int bmp_reg, bmp_offset, bmp_mask, bmp_shift;
+ static const int map_1bpp[] = { 0, 15 };
+ static const int map_2bpp[] = { 0, 5, 10, 15 };
+
+ switch (pixfmt) {
+ case PIXFMT_1BPP:
+ bmp_reg = map_1bpp[pixel_value & 0x1];
+ break;
+ case PIXFMT_2BPP:
+ bmp_reg = map_2bpp[pixel_value & 0x3];
+ break;
+ case PIXFMT_4BPP:
+ bmp_reg = pixel_value & 0xf;
+ break;
+ default:
+ return;
+ }
+
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ bmp_offset = OSD_W0BMP01 + (bmp_reg >> 1) * sizeof(u32);
+ break;
+ case OSDWIN_OSD1:
+ bmp_offset = OSD_W1BMP01 + (bmp_reg >> 1) * sizeof(u32);
+ break;
+ default:
+ return;
+ }
+
+ if (bmp_reg & 1) {
+ bmp_shift = 8;
+ bmp_mask = 0xff << 8;
+ } else {
+ bmp_shift = 0;
+ bmp_mask = 0xff;
+ }
+
+ osd_merge(bmp_mask, clut_index << bmp_shift, bmp_offset);
+}
+
+void davinci_disp_set_palette_map(enum davinci_osd_layer osdwin,
+ unsigned char pixel_value,
+ unsigned char clut_index)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ switch (win->lconfig.pixfmt) {
+ case PIXFMT_1BPP:
+ osdwin_state->palette_map[pixel_value & 0x1] = clut_index;
+ break;
+ case PIXFMT_2BPP:
+ osdwin_state->palette_map[pixel_value & 0x3] = clut_index;
+ break;
+ case PIXFMT_4BPP:
+ osdwin_state->palette_map[pixel_value & 0xf] = clut_index;
+ break;
+ default:
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return;
+ }
+
+ _davinci_disp_set_palette_map(osdwin, pixel_value, clut_index,
+ win->lconfig.pixfmt);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_palette_map);
+
+int davinci_disp_get_rec601_attenuation(enum davinci_osd_layer osdwin)
+{
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+
+ return osdwin_state->rec601_attenuation;
+}
+EXPORT_SYMBOL(davinci_disp_get_rec601_attenuation);
+
+static void _davinci_disp_set_rec601_attenuation(enum davinci_osd_layer osdwin,
+ int enable)
+{
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ if (cpu_is_davinci_dm644x()) {
+ osd_merge(OSD_OSDWIN0MD_ATN0E,
+ enable ? OSD_OSDWIN0MD_ATN0E : 0,
+ OSD_OSDWIN0MD);
+ } else if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365()) {
+ osd_merge(OSD_EXTMODE_ATNOSD0EN,
+ enable ? OSD_EXTMODE_ATNOSD0EN : 0,
+ OSD_EXTMODE);
+ }
+ break;
+ case OSDWIN_OSD1:
+ if (cpu_is_davinci_dm644x()) {
+ osd_merge(OSD_OSDWIN1MD_ATN1E,
+ enable ? OSD_OSDWIN1MD_ATN1E : 0,
+ OSD_OSDWIN1MD);
+ } else if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365()) {
+ osd_merge(OSD_EXTMODE_ATNOSD1EN,
+ enable ? OSD_EXTMODE_ATNOSD1EN : 0,
+ OSD_EXTMODE);
+ }
+ break;
+ }
+}
+
+void davinci_disp_set_rec601_attenuation(enum davinci_osd_layer osdwin,
+ int enable)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osdwin_state->rec601_attenuation = (enable != 0);
+ if (win->lconfig.pixfmt != PIXFMT_OSD_ATTR)
+ _davinci_disp_set_rec601_attenuation(osdwin, enable);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_rec601_attenuation);
+
+enum davinci_blending_factor davinci_disp_get_blending_factor(enum
+ davinci_osd_layer
+ osdwin)
+{
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+
+ return osdwin_state->blend;
+}
+EXPORT_SYMBOL(davinci_disp_get_blending_factor);
+
+static void _davinci_disp_set_blending_factor(enum davinci_osd_layer osdwin,
+ enum davinci_blending_factor
+ blend)
+{
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ osd_merge(OSD_OSDWIN0MD_BLND0,
+ blend << OSD_OSDWIN0MD_BLND0_SHIFT, OSD_OSDWIN0MD);
+ break;
+ case OSDWIN_OSD1:
+ osd_merge(OSD_OSDWIN1MD_BLND1,
+ blend << OSD_OSDWIN1MD_BLND1_SHIFT, OSD_OSDWIN1MD);
+ break;
+ }
+}
+
+void davinci_disp_set_blending_factor(enum davinci_osd_layer osdwin,
+ enum davinci_blending_factor blend)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osdwin_state->blend = blend;
+ if (win->lconfig.pixfmt != PIXFMT_OSD_ATTR)
+ _davinci_disp_set_blending_factor(osdwin, blend);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_blending_factor);
+
+static void _davinci_disp_enable_rgb888_pixblend(enum davinci_osd_layer osdwin)
+{
+
+ osd_merge(OSD_MISCCTL_BLDSEL, 0, OSD_MISCCTL);
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ osd_merge(OSD_EXTMODE_OSD0BLDCHR,
+ OSD_EXTMODE_OSD0BLDCHR, OSD_EXTMODE);
+ break;
+ case OSDWIN_OSD1:
+ osd_merge(OSD_EXTMODE_OSD1BLDCHR,
+ OSD_EXTMODE_OSD1BLDCHR, OSD_EXTMODE);
+ break;
+ }
+}
+
+void davinci_disp_enable_rgb888_pixblend(enum davinci_osd_layer osdwin)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ if (cpu_is_davinci_dm644x())
+ return;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ if (win->lconfig.pixfmt == PIXFMT_RGB888)
+ _davinci_disp_enable_rgb888_pixblend(osdwin);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_enable_rgb888_pixblend);
+
+static void _davinci_disp_disable_color_key(enum davinci_osd_layer osdwin)
+{
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ osd_clear(OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD);
+ break;
+ case OSDWIN_OSD1:
+ osd_clear(OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD);
+ break;
+ }
+}
+
+void davinci_disp_disable_color_key(enum davinci_osd_layer osdwin)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osdwin_state->colorkey_blending = 0;
+ if (win->lconfig.pixfmt != PIXFMT_OSD_ATTR)
+ _davinci_disp_disable_color_key(osdwin);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_disable_color_key);
+
+static void _davinci_disp_enable_color_key(enum davinci_osd_layer osdwin,
+ unsigned colorkey,
+ enum davinci_pix_format pixfmt)
+{
+ switch (pixfmt) {
+ case PIXFMT_1BPP:
+ case PIXFMT_2BPP:
+ case PIXFMT_4BPP:
+ case PIXFMT_8BPP:
+ if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365()) {
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ osd_merge(OSD_TRANSPBMPIDX_BMP0,
+ colorkey <<
+ OSD_TRANSPBMPIDX_BMP0_SHIFT,
+ OSD_TRANSPBMPIDX);
+ break;
+ case OSDWIN_OSD1:
+ osd_merge(OSD_TRANSPBMPIDX_BMP1,
+ colorkey <<
+ OSD_TRANSPBMPIDX_BMP1_SHIFT,
+ OSD_TRANSPBMPIDX);
+ break;
+ }
+ }
+ break;
+ case PIXFMT_RGB565:
+ if (cpu_is_davinci_dm644x()) {
+ osd_write(colorkey & OSD_TRANSPVAL_RGBTRANS,
+ OSD_TRANSPVAL);
+ } else if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365()) {
+ osd_write(colorkey & OSD_TRANSPVALL_RGBL,
+ OSD_TRANSPVALL);
+ }
+ break;
+ case PIXFMT_YCbCrI:
+ case PIXFMT_YCrCbI:
+ if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365())
+ osd_merge(OSD_TRANSPVALU_Y, colorkey, OSD_TRANSPVALU);
+ break;
+ case PIXFMT_RGB888:
+ if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365()) {
+ osd_write(colorkey & OSD_TRANSPVALL_RGBL,
+ OSD_TRANSPVALL);
+ osd_merge(OSD_TRANSPVALU_RGBU, colorkey >> 16,
+ OSD_TRANSPVALU);
+ }
+ break;
+ default:
+ break;
+ }
+
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ osd_set(OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD);
+ break;
+ case OSDWIN_OSD1:
+ osd_set(OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD);
+ break;
+ }
+}
+
+void davinci_disp_enable_color_key(enum davinci_osd_layer osdwin,
+ unsigned colorkey)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osdwin_state->colorkey_blending = 1;
+ osdwin_state->colorkey = colorkey;
+ if (win->lconfig.pixfmt != PIXFMT_OSD_ATTR) {
+ _davinci_disp_enable_color_key(osdwin, colorkey,
+ win->lconfig.pixfmt);
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_enable_color_key);
+
+enum davinci_clut davinci_disp_get_osd_clut(enum davinci_osd_layer osdwin)
+{
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+
+ return osdwin_state->clut;
+}
+EXPORT_SYMBOL(davinci_disp_get_osd_clut);
+
+static void _davinci_disp_set_osd_clut(enum davinci_osd_layer osdwin,
+ enum davinci_clut clut)
+{
+ u32 winmd = 0;
+
+ switch (osdwin) {
+ case OSDWIN_OSD0:
+ if (clut == RAM_CLUT)
+ winmd |= OSD_OSDWIN0MD_CLUTS0;
+ osd_merge(OSD_OSDWIN0MD_CLUTS0, winmd, OSD_OSDWIN0MD);
+ break;
+ case OSDWIN_OSD1:
+ if (clut == RAM_CLUT)
+ winmd |= OSD_OSDWIN1MD_CLUTS1;
+ osd_merge(OSD_OSDWIN1MD_CLUTS1, winmd, OSD_OSDWIN1MD);
+ break;
+ }
+}
+
+void davinci_disp_set_osd_clut(enum davinci_osd_layer osdwin,
+ enum davinci_clut clut)
+{
+ enum davinci_disp_layer layer =
+ (osdwin == OSDWIN_OSD0) ? WIN_OSD0 : WIN_OSD1;
+ struct davinci_window_state *win = &osd->win[layer];
+ struct davinci_osdwin_state *osdwin_state = &osd->osdwin[osdwin];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ osdwin_state->clut = clut;
+ if (win->lconfig.pixfmt != PIXFMT_OSD_ATTR)
+ _davinci_disp_set_osd_clut(osdwin, clut);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_osd_clut);
+
+void davinci_disp_get_zoom(enum davinci_disp_layer layer,
+ enum davinci_zoom_factor *h_zoom,
+ enum davinci_zoom_factor *v_zoom)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *h_zoom = win->h_zoom;
+ *v_zoom = win->v_zoom;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_zoom);
+
+static void _davinci_disp_set_zoom(enum davinci_disp_layer layer,
+ enum davinci_zoom_factor h_zoom,
+ enum davinci_zoom_factor v_zoom)
+{
+ u32 winmd = 0;
+
+ switch (layer) {
+ case WIN_OSD0:
+ winmd |= (h_zoom << OSD_OSDWIN0MD_OHZ0_SHIFT);
+ winmd |= (v_zoom << OSD_OSDWIN0MD_OVZ0_SHIFT);
+ osd_merge(OSD_OSDWIN0MD_OHZ0 | OSD_OSDWIN0MD_OVZ0, winmd,
+ OSD_OSDWIN0MD);
+ break;
+ case WIN_VID0:
+ winmd |= (h_zoom << OSD_VIDWINMD_VHZ0_SHIFT);
+ winmd |= (v_zoom << OSD_VIDWINMD_VVZ0_SHIFT);
+ osd_merge(OSD_VIDWINMD_VHZ0 | OSD_VIDWINMD_VVZ0, winmd,
+ OSD_VIDWINMD);
+ break;
+ case WIN_OSD1:
+ winmd |= (h_zoom << OSD_OSDWIN1MD_OHZ1_SHIFT);
+ winmd |= (v_zoom << OSD_OSDWIN1MD_OVZ1_SHIFT);
+ osd_merge(OSD_OSDWIN1MD_OHZ1 | OSD_OSDWIN1MD_OVZ1, winmd,
+ OSD_OSDWIN1MD);
+ break;
+ case WIN_VID1:
+ winmd |= (h_zoom << OSD_VIDWINMD_VHZ1_SHIFT);
+ winmd |= (v_zoom << OSD_VIDWINMD_VVZ1_SHIFT);
+ osd_merge(OSD_VIDWINMD_VHZ1 | OSD_VIDWINMD_VVZ1, winmd,
+ OSD_VIDWINMD);
+ break;
+ }
+}
+
+void davinci_disp_set_zoom(enum davinci_disp_layer layer,
+ enum davinci_zoom_factor h_zoom,
+ enum davinci_zoom_factor v_zoom)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ win->h_zoom = h_zoom;
+ win->v_zoom = v_zoom;
+ _davinci_disp_set_zoom(layer, h_zoom, v_zoom);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_set_zoom);
+
+int davinci_disp_layer_is_enabled(enum davinci_disp_layer layer)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ return win->is_enabled;
+}
+EXPORT_SYMBOL(davinci_disp_layer_is_enabled);
+
+static void _davinci_disp_disable_layer(enum
+ davinci_disp_layer layer)
+{
+ switch (layer) {
+ case WIN_OSD0:
+ osd_clear(OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD);
+ break;
+ case WIN_VID0:
+ osd_clear(OSD_VIDWINMD_ACT0, OSD_VIDWINMD);
+ break;
+ case WIN_OSD1:
+ /* disable attribute mode as well as disabling the window */
+ osd_clear(OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1,
+ OSD_OSDWIN1MD);
+ break;
+ case WIN_VID1:
+ osd_clear(OSD_VIDWINMD_ACT1, OSD_VIDWINMD);
+ break;
+ }
+}
+
+void davinci_disp_disable_layer(enum davinci_disp_layer layer)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ if (!win->is_enabled) {
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return;
+ }
+ win->is_enabled = 0;
+
+ _davinci_disp_disable_layer(layer);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_disable_layer);
+
+static void _davinci_disp_enable_attribute_mode(void)
+{
+ /* enable attribute mode for OSD1 */
+ osd_set(OSD_OSDWIN1MD_OASW, OSD_OSDWIN1MD);
+}
+
+static void _davinci_disp_enable_layer(enum
+ davinci_disp_layer layer)
+{
+ switch (layer) {
+ case WIN_OSD0:
+ osd_set(OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD);
+ break;
+ case WIN_VID0:
+ osd_set(OSD_VIDWINMD_ACT0, OSD_VIDWINMD);
+ break;
+ case WIN_OSD1:
+ /* enable OSD1 and disable attribute mode */
+ osd_merge(OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1,
+ OSD_OSDWIN1MD_OACT1, OSD_OSDWIN1MD);
+ break;
+ case WIN_VID1:
+ osd_set(OSD_VIDWINMD_ACT1, OSD_VIDWINMD);
+ break;
+ }
+}
+
+int davinci_disp_enable_layer(enum davinci_disp_layer layer,
+ int otherwin)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ /* use otherwin flag to know this is the other vid window
+ * in YUV420 mode, if is, skip this check
+ */
+ if (!otherwin && (!win->is_allocated ||
+ !win->fb_base_phys ||
+ !win->lconfig.line_length ||
+ !win->lconfig.xsize ||
+ !win->lconfig.ysize)) {
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return -1;
+ }
+
+ if (win->is_enabled) {
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return 0;
+ }
+ win->is_enabled = 1;
+
+ if (win->lconfig.pixfmt != PIXFMT_OSD_ATTR)
+ _davinci_disp_enable_layer(layer);
+ else {
+ _davinci_disp_enable_attribute_mode();
+ _davinci_disp_set_blink_attribute(osd->is_blinking, osd->blink);
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL(davinci_disp_enable_layer);
+
+static void _davinci_disp_start_layer(enum davinci_disp_layer layer,
+ unsigned long fb_base_phys,
+ struct davinci_fb_desc *fb_desc)
+{
+ if (cpu_is_davinci_dm644x()) {
+ switch (layer) {
+ case WIN_OSD0:
+ osd_write(fb_base_phys & ~0x1F, OSD_OSDWIN0ADR);
+ break;
+ case WIN_VID0:
+ osd_write(fb_base_phys & ~0x1F, OSD_VIDWIN0ADR);
+ break;
+ case WIN_OSD1:
+ osd_write(fb_base_phys & ~0x1F, OSD_OSDWIN1ADR);
+ break;
+ case WIN_VID1:
+ osd_write(fb_base_phys & ~0x1F, OSD_VIDWIN1ADR);
+ break;
+ }
+ } else if (cpu_is_davinci_dm355()) {
+ unsigned long fb_offset_32 =
+ (fb_base_phys - DAVINCI_DDR_BASE) >> 5;
+
+ switch (layer) {
+ case WIN_OSD0:
+ osd_merge(OSD_OSDWINADH_O0AH,
+ fb_offset_32 >> (16 -
+ OSD_OSDWINADH_O0AH_SHIFT),
+ OSD_OSDWINADH);
+ osd_write(fb_offset_32 & OSD_OSDWIN0ADL_O0AL,
+ OSD_OSDWIN0ADL);
+ break;
+ case WIN_VID0:
+ osd_merge(OSD_VIDWINADH_V0AH,
+ fb_offset_32 >> (16 -
+ OSD_VIDWINADH_V0AH_SHIFT),
+ OSD_VIDWINADH);
+ osd_write(fb_offset_32 & OSD_VIDWIN0ADL_V0AL,
+ OSD_VIDWIN0ADL);
+ break;
+ case WIN_OSD1:
+ osd_merge(OSD_OSDWINADH_O1AH,
+ fb_offset_32 >> (16 -
+ OSD_OSDWINADH_O1AH_SHIFT),
+ OSD_OSDWINADH);
+ osd_write(fb_offset_32 & OSD_OSDWIN1ADL_O1AL,
+ OSD_OSDWIN1ADL);
+ break;
+ case WIN_VID1:
+ osd_merge(OSD_VIDWINADH_V1AH,
+ fb_offset_32 >> (16 -
+ OSD_VIDWINADH_V1AH_SHIFT),
+ OSD_VIDWINADH);
+ osd_write(fb_offset_32 & OSD_VIDWIN1ADL_V1AL,
+ OSD_VIDWIN1ADL);
+ break;
+ }
+ } else if (cpu_is_davinci_dm365()) {
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long fb_offset_32, cbcr_offset_32;
+
+ fb_offset_32 = fb_base_phys - DAVINCI_DDR_BASE;
+ if (fb_desc && fb_desc->cbcr_ofst)
+ cbcr_offset_32 = fb_desc->cbcr_ofst;
+ else
+ cbcr_offset_32 = win->lconfig.line_length *
+ win->lconfig.ysize;
+ cbcr_offset_32 += fb_offset_32;
+
+ /* If a Y-plane display offset was specified, adjuest the fb
+ * and cbcr offsets to reflect the desired start of the
+ * display. This only applies when an NV12 colorspace is being
+ * used on the display.
+ */
+ if (fb_desc && fb_desc->yd_ofst) {
+ if (win->lconfig.pixfmt == PIXFMT_NV12) {
+ fb_offset_32 += fb_desc->yd_ofst;
+ cbcr_offset_32 += (fb_desc->yd_ofst) >> 1;
+ }
+ }
+
+ fb_offset_32 = fb_offset_32 >> 5;
+ cbcr_offset_32 = cbcr_offset_32 >> 5;
+ /*
+ * DM365: start address is 27-bit long address b26 - b23 are
+ * in offset register b12 - b9, and * bit 26 has to be '1'
+ */
+ if (win->lconfig.pixfmt == PIXFMT_NV12) {
+ switch (layer) {
+ case WIN_VID0:
+ case WIN_VID1:
+ /* Y is in VID0 */
+ osd_merge(OSD_VIDWIN0OFST_V0AH,
+ ((fb_offset_32 & 0x7800000) >>
+ (23 - OSD_WINOFST_AH_SHIFT)) | 0x1000,
+ OSD_VIDWIN0OFST);
+ osd_merge(OSD_VIDWINADH_V0AH,
+ (fb_offset_32 & 0x7F0000) >>
+ (16 - OSD_VIDWINADH_V0AH_SHIFT),
+ OSD_VIDWINADH);
+ osd_write(fb_offset_32 & 0xFFFF,
+ OSD_VIDWIN0ADL);
+ /* CbCr is in VID1 */
+ osd_merge(OSD_VIDWIN1OFST_V1AH,
+ ((cbcr_offset_32 & 0x7800000) >>
+ (23 - OSD_WINOFST_AH_SHIFT)) | 0x1000,
+ OSD_VIDWIN1OFST);
+ osd_merge(OSD_VIDWINADH_V1AH,
+ (cbcr_offset_32 & 0x7F0000) >>
+ (16 - OSD_VIDWINADH_V1AH_SHIFT),
+ OSD_VIDWINADH);
+ osd_write(cbcr_offset_32 & 0xFFFF,
+ OSD_VIDWIN1ADL);
+ break;
+ default:
+ break;
+ }
+ }
+
+ switch (layer) {
+ case WIN_OSD0:
+ osd_merge(OSD_OSDWIN0OFST_O0AH,
+ ((fb_offset_32 & 0x7800000) >>
+ (23 - OSD_WINOFST_AH_SHIFT)) | 0x1000,
+ OSD_OSDWIN0OFST);
+ osd_merge(OSD_OSDWINADH_O0AH,
+ (fb_offset_32 & 0x7F0000) >>
+ (16 - OSD_OSDWINADH_O0AH_SHIFT),
+ OSD_OSDWINADH);
+ osd_write(fb_offset_32 & 0xFFFF, OSD_OSDWIN0ADL);
+ break;
+ case WIN_VID0:
+ if (win->lconfig.pixfmt != PIXFMT_NV12) {
+ osd_merge(OSD_VIDWIN0OFST_V0AH,
+ ((fb_offset_32 & 0x7800000) >>
+ (23 - OSD_WINOFST_AH_SHIFT)) | 0x1000,
+ OSD_VIDWIN0OFST);
+ osd_merge(OSD_VIDWINADH_V0AH,
+ (fb_offset_32 & 0x7F0000) >>
+ (16 - OSD_VIDWINADH_V0AH_SHIFT),
+ OSD_VIDWINADH);
+ osd_write(fb_offset_32 & 0xFFFF,
+ OSD_VIDWIN0ADL);
+ }
+ break;
+ case WIN_OSD1:
+ osd_merge(OSD_OSDWIN1OFST_O1AH,
+ ((fb_offset_32 & 0x7800000) >>
+ (23 - OSD_WINOFST_AH_SHIFT)) | 0x1000,
+ OSD_OSDWIN1OFST);
+ osd_merge(OSD_OSDWINADH_O1AH,
+ (fb_offset_32 & 0x7F0000) >>
+ (16 - OSD_OSDWINADH_O1AH_SHIFT),
+ OSD_OSDWINADH);
+ osd_write(fb_offset_32 & 0xFFFF, OSD_OSDWIN1ADL);
+ break;
+ case WIN_VID1:
+ if (win->lconfig.pixfmt != PIXFMT_NV12) {
+ osd_merge(OSD_VIDWIN1OFST_V1AH,
+ ((fb_offset_32 & 0x7800000) >>
+ (23 - OSD_WINOFST_AH_SHIFT)) | 0x1000,
+ OSD_VIDWIN1OFST);
+ osd_merge(OSD_VIDWINADH_V1AH,
+ (fb_offset_32 & 0x7F0000) >>
+ (16 - OSD_VIDWINADH_V1AH_SHIFT),
+ OSD_VIDWINADH);
+ osd_write(fb_offset_32 & 0xFFFF,
+ OSD_VIDWIN1ADL);
+ }
+ break;
+ }
+ }
+}
+
+void davinci_disp_start_layer(enum davinci_disp_layer layer,
+ unsigned long fb_base_phys,
+ struct davinci_fb_desc *fb_desc)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ win->fb_base_phys = fb_base_phys & ~0x1F;
+ _davinci_disp_start_layer(layer, fb_base_phys, fb_desc);
+
+ if (layer == WIN_VID0) {
+ osd->pingpong =
+ _davinci_disp_dm6446_vid0_pingpong(field_inversion,
+ win->fb_base_phys,
+ &win->lconfig);
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_start_layer);
+
+void davinci_disp_get_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ *lconfig = win->lconfig;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_get_layer_config);
+
+void _davinci_disp_copy_layer_config(enum davinci_disp_layer to_layer,
+ enum davinci_disp_layer from_layer)
+{
+ struct davinci_layer_config *tlconfig, *flconfig;
+
+ tlconfig = &(osd->win[to_layer].lconfig);
+ flconfig = &(osd->win[from_layer].lconfig);
+
+ memcpy(tlconfig, flconfig, sizeof(struct davinci_layer_config));
+}
+
+/*
+ * If the requested lconfig is completely rejected and the value of lconfig on
+ * exit is the current lconfig, then try_layer_config() returns 1. Otherwise,
+ * try_layer_config() returns 0. A return value of 0 does not necessarily mean
+ * that the value of lconfig on exit is identical to the value of lconfig on
+ * entry, but merely that it represents a change from the current lconfig.
+ */
+static int try_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ int bad_config = 0;
+
+ /* verify that the pixel format is compatible with the layer */
+ switch (lconfig->pixfmt) {
+ case PIXFMT_1BPP:
+ case PIXFMT_2BPP:
+ case PIXFMT_4BPP:
+ case PIXFMT_8BPP:
+ case PIXFMT_RGB565:
+ bad_config = !is_osd_win(layer);
+ break;
+ case PIXFMT_YCbCrI:
+ case PIXFMT_YCrCbI:
+ if (cpu_is_davinci_dm644x())
+ bad_config = !is_vid_win(layer);
+ break;
+ case PIXFMT_RGB888:
+ if (cpu_is_davinci_dm644x())
+ bad_config = !is_vid_win(layer);
+ else if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365())
+ bad_config = !is_osd_win(layer);
+ break;
+ case PIXFMT_NV12:
+ if (!cpu_is_davinci_dm365())
+ bad_config = 1;
+ else
+ bad_config = is_osd_win(layer);
+ break;
+ case PIXFMT_OSD_ATTR:
+ bad_config = (layer != WIN_OSD1);
+ break;
+ default:
+ bad_config = 1;
+ break;
+ }
+ if (bad_config) {
+ /*
+ * The requested pixel format is incompatible with the layer, so
+ * keep the current layer configuration.
+ */
+ *lconfig = win->lconfig;
+ return bad_config;
+ }
+
+ /* DM6446: */
+ /* only one OSD window at a time can use RGB pixel formats */
+ if ((cpu_is_davinci_dm644x())
+ && is_osd_win(layer) && is_rgb_pixfmt(lconfig->pixfmt)) {
+ enum davinci_pix_format pixfmt;
+
+ if (layer == WIN_OSD0)
+ pixfmt = osd->win[WIN_OSD1].lconfig.pixfmt;
+ else
+ pixfmt = osd->win[WIN_OSD0].lconfig.pixfmt;
+
+ if (is_rgb_pixfmt(pixfmt)) {
+ /*
+ * The other OSD window is already configured for an
+ * RGB, so keep the current layer configuration.
+ */
+ *lconfig = win->lconfig;
+ return 1;
+ }
+ }
+
+ /* DM6446: only one video window at a time can use RGB888 */
+ if (cpu_is_davinci_dm644x() && is_vid_win(layer)
+ && lconfig->pixfmt == PIXFMT_RGB888) {
+ enum davinci_pix_format pixfmt;
+
+ if (layer == WIN_VID0)
+ pixfmt = osd->win[WIN_VID1].lconfig.pixfmt;
+ else
+ pixfmt = osd->win[WIN_VID0].lconfig.pixfmt;
+
+ if (pixfmt == PIXFMT_RGB888) {
+ /*
+ * The other video window is already configured for
+ * RGB888, so keep the current layer configuration.
+ */
+ *lconfig = win->lconfig;
+ return 1;
+ }
+ }
+
+ /* window dimensions must be non-zero */
+ if (!lconfig->line_length || !lconfig->xsize || !lconfig->ysize) {
+ *lconfig = win->lconfig;
+ return 1;
+ }
+
+ /* round line_length up to a multiple of 32 */
+ lconfig->line_length = ((lconfig->line_length + 31) / 32) * 32;
+ lconfig->line_length =
+ min(lconfig->line_length, (unsigned)MAX_LINE_LENGTH);
+ lconfig->xsize = min(lconfig->xsize, (unsigned)MAX_WIN_SIZE);
+ lconfig->ysize = min(lconfig->ysize, (unsigned)MAX_WIN_SIZE);
+ lconfig->xpos = min(lconfig->xpos, (unsigned)MAX_WIN_SIZE);
+ lconfig->ypos = min(lconfig->ypos, (unsigned)MAX_WIN_SIZE);
+ lconfig->interlaced = (lconfig->interlaced != 0);
+ if (lconfig->interlaced) {
+ /* ysize and ypos must be even for interlaced displays */
+ lconfig->ysize &= ~1;
+ lconfig->ypos &= ~1;
+ }
+
+ return 0;
+}
+
+int davinci_disp_try_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig)
+{
+ int reject_config;
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ reject_config = try_layer_config(layer, lconfig);
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+
+ return reject_config;
+}
+EXPORT_SYMBOL(davinci_disp_try_layer_config);
+
+static void _davinci_disp_disable_vid_rgb888(void)
+{
+ /*
+ * The DM6446 supports RGB888 pixel format in a single video window.
+ * This routine disables RGB888 pixel format for both video windows.
+ * The caller must ensure that neither video window is currently
+ * configured for RGB888 pixel format.
+ */
+ if (cpu_is_davinci_dm644x())
+ osd_clear(OSD_MISCCTL_RGBEN, OSD_MISCCTL);
+}
+
+static void _davinci_disp_enable_vid_rgb888(enum davinci_disp_layer layer)
+{
+ /*
+ * The DM6446 supports RGB888 pixel format in a single video window.
+ * This routine enables RGB888 pixel format for the specified video
+ * window. The caller must ensure that the other video window is not
+ * currently configured for RGB888 pixel format, as this routine will
+ * disable RGB888 pixel format for the other window.
+ */
+ if (cpu_is_davinci_dm644x()) {
+ if (layer == WIN_VID0) {
+ osd_merge(OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
+ OSD_MISCCTL_RGBEN, OSD_MISCCTL);
+ } else if (layer == WIN_VID1) {
+ osd_merge(OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
+ OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
+ OSD_MISCCTL);
+ }
+ }
+}
+
+static void _davinci_disp_set_cbcr_order(enum davinci_pix_format pixfmt)
+{
+ /*
+ * The caller must ensure that all windows using YC pixfmt use the same
+ * Cb/Cr order.
+ */
+ if (pixfmt == PIXFMT_YCbCrI)
+ osd_clear(OSD_MODE_CS, OSD_MODE);
+ else if (pixfmt == PIXFMT_YCrCbI)
+ osd_set(OSD_MODE_CS, OSD_MODE);
+}
+
+static void _davinci_disp_set_layer_config(enum davinci_disp_layer layer,
+ const struct davinci_layer_config
+ *lconfig)
+{
+ u32 winmd = 0, winmd_mask = 0, bmw = 0;
+
+ _davinci_disp_set_cbcr_order(lconfig->pixfmt);
+
+ switch (layer) {
+ case WIN_OSD0:
+ if (cpu_is_davinci_dm644x()) {
+ winmd_mask |= OSD_OSDWIN0MD_RGB0E;
+ if (lconfig->pixfmt == PIXFMT_RGB565)
+ winmd |= OSD_OSDWIN0MD_RGB0E;
+ } else if (cpu_is_davinci_dm355() || cpu_is_davinci_dm365()) {
+ winmd_mask |= OSD_OSDWIN0MD_BMP0MD;
+ switch (lconfig->pixfmt) {
+ case PIXFMT_RGB565:
+ winmd |= (1 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
+ break;
+ case PIXFMT_RGB888:
+ winmd |= (2 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
+ _davinci_disp_enable_rgb888_pixblend
+ (OSDWIN_OSD0);
+ break;
+ case PIXFMT_YCbCrI:
+ case PIXFMT_YCrCbI:
+ winmd |= (3 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
+ break;
+ default:
+ break;
+ }
+ }
+
+ winmd_mask |= OSD_OSDWIN0MD_BMW0 | OSD_OSDWIN0MD_OFF0;
+
+ switch (lconfig->pixfmt) {
+ case PIXFMT_1BPP:
+ bmw = 0;
+ break;
+ case PIXFMT_2BPP:
+ bmw = 1;
+ break;
+ case PIXFMT_4BPP:
+ bmw = 2;
+ break;
+ case PIXFMT_8BPP:
+ bmw = 3;
+ break;
+ default:
+ break;
+ }
+ winmd |= (bmw << OSD_OSDWIN0MD_BMW0_SHIFT);
+
+ if (lconfig->interlaced)
+ winmd |= OSD_OSDWIN0MD_OFF0;
+
+ osd_merge(winmd_mask, winmd, OSD_OSDWIN0MD);
+ osd_write(lconfig->line_length >> 5, OSD_OSDWIN0OFST);
+ osd_write(lconfig->xpos, OSD_OSDWIN0XP);
+ osd_write(lconfig->xsize, OSD_OSDWIN0XL);
+ if (lconfig->interlaced) {
+ osd_write(lconfig->ypos >> 1, OSD_OSDWIN0YP);
+ osd_write(lconfig->ysize >> 1, OSD_OSDWIN0YL);
+ } else {
+ osd_write(lconfig->ypos, OSD_OSDWIN0YP);
+ osd_write(lconfig->ysize, OSD_OSDWIN0YL);
+ }
+ break;
+ case WIN_VID0:
+ winmd_mask |= OSD_VIDWINMD_VFF0;
+ if (lconfig->interlaced)
+ winmd |= OSD_VIDWINMD_VFF0;
+
+ osd_merge(winmd_mask, winmd, OSD_VIDWINMD);
+ osd_write(lconfig->line_length >> 5, OSD_VIDWIN0OFST);
+ osd_write(lconfig->xpos, OSD_VIDWIN0XP);
+ osd_write(lconfig->xsize, OSD_VIDWIN0XL);
+ /*
+ * For YUV420P format the register contents are
+ * duplicated in both VID registers
+ */
+ if (cpu_is_davinci_dm365()) {
+ if (lconfig->pixfmt == PIXFMT_NV12) {
+ /* other window also */
+ if (lconfig->interlaced) {
+ winmd_mask |= OSD_VIDWINMD_VFF1;
+ winmd |= OSD_VIDWINMD_VFF1;
+ osd_merge(winmd_mask, winmd,
+ OSD_VIDWINMD);
+ }
+
+ osd_merge(OSD_MISCCTL_S420D, OSD_MISCCTL_S420D,
+ OSD_MISCCTL);
+ osd_write(lconfig->line_length >> 5,
+ OSD_VIDWIN1OFST);
+ osd_write(lconfig->xpos, OSD_VIDWIN1XP);
+ osd_write(lconfig->xsize, OSD_VIDWIN1XL);
+ /* if NV21 pixfmt and line length not 32B
+ * aligned (e.g. NTSC), Need to set window
+ * X pixel size to be 32B aligned as well
+ */
+ if (lconfig->xsize % 32) {
+ osd_write(((lconfig->xsize + 31) & ~31),
+ OSD_VIDWIN1XL);
+ osd_write(((lconfig->xsize + 31) & ~31),
+ OSD_VIDWIN0XL);
+ }
+ } else
+ osd_merge(OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D,
+ OSD_MISCCTL);
+ }
+ if (lconfig->interlaced) {
+ osd_write(lconfig->ypos >> 1, OSD_VIDWIN0YP);
+ osd_write(lconfig->ysize >> 1, OSD_VIDWIN0YL);
+ if (cpu_is_davinci_dm365()
+ && lconfig->pixfmt == PIXFMT_NV12) {
+ osd_write(lconfig->ypos >> 1, OSD_VIDWIN1YP);
+ osd_write(lconfig->ysize >> 1, OSD_VIDWIN1YL);
+ }
+ } else {
+ osd_write(lconfig->ypos, OSD_VIDWIN0YP);
+ osd_write(lconfig->ysize, OSD_VIDWIN0YL);
+ if (cpu_is_davinci_dm365()
+ && lconfig->pixfmt == PIXFMT_NV12) {
+ osd_write(lconfig->ypos, OSD_VIDWIN1YP);
+ osd_write(lconfig->ysize, OSD_VIDWIN1YL);
+ }
+ }
+ break;
+ case WIN_OSD1:
+ /*
+ * The caller must ensure that OSD1 is disabled prior to
+ * switching from a normal mode to attribute mode or from
+ * attribute mode to a normal mode.
+ */
+ if (lconfig->pixfmt == PIXFMT_OSD_ATTR) {
+ if (cpu_is_davinci_dm644x()) {
+ winmd_mask |=
+ OSD_OSDWIN1MD_ATN1E | OSD_OSDWIN1MD_RGB1E |
+ OSD_OSDWIN1MD_CLUTS1 | OSD_OSDWIN1MD_BLND1 |
+ OSD_OSDWIN1MD_TE1;
+ } else {
+ winmd_mask |=
+ OSD_OSDWIN1MD_BMP1MD | OSD_OSDWIN1MD_CLUTS1
+ | OSD_OSDWIN1MD_BLND1 | OSD_OSDWIN1MD_TE1;
+ }
+ } else {
+ if (cpu_is_davinci_dm644x()) {
+ winmd_mask |= OSD_OSDWIN1MD_RGB1E;
+ if (lconfig->pixfmt == PIXFMT_RGB565)
+ winmd |= OSD_OSDWIN1MD_RGB1E;
+ } else if (cpu_is_davinci_dm355()
+ || cpu_is_davinci_dm365()) {
+ winmd_mask |= OSD_OSDWIN1MD_BMP1MD;
+ switch (lconfig->pixfmt) {
+ case PIXFMT_RGB565:
+ winmd |=
+ (1 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
+ break;
+ case PIXFMT_RGB888:
+ winmd |=
+ (2 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
+ _davinci_disp_enable_rgb888_pixblend
+ (OSDWIN_OSD1);
+ break;
+ case PIXFMT_YCbCrI:
+ case PIXFMT_YCrCbI:
+ winmd |=
+ (3 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
+ break;
+ default:
+ break;
+ }
+ }
+
+ winmd_mask |= OSD_OSDWIN1MD_BMW1;
+ switch (lconfig->pixfmt) {
+ case PIXFMT_1BPP:
+ bmw = 0;
+ break;
+ case PIXFMT_2BPP:
+ bmw = 1;
+ break;
+ case PIXFMT_4BPP:
+ bmw = 2;
+ break;
+ case PIXFMT_8BPP:
+ bmw = 3;
+ break;
+ default:
+ break;
+ }
+ winmd |= (bmw << OSD_OSDWIN1MD_BMW1_SHIFT);
+ }
+
+ winmd_mask |= OSD_OSDWIN1MD_OFF1;
+ if (lconfig->interlaced)
+ winmd |= OSD_OSDWIN1MD_OFF1;
+
+ osd_merge(winmd_mask, winmd, OSD_OSDWIN1MD);
+ osd_write(lconfig->line_length >> 5, OSD_OSDWIN1OFST);
+ osd_write(lconfig->xpos, OSD_OSDWIN1XP);
+ osd_write(lconfig->xsize, OSD_OSDWIN1XL);
+ if (lconfig->interlaced) {
+ osd_write(lconfig->ypos >> 1, OSD_OSDWIN1YP);
+ osd_write(lconfig->ysize >> 1, OSD_OSDWIN1YL);
+ } else {
+ osd_write(lconfig->ypos, OSD_OSDWIN1YP);
+ osd_write(lconfig->ysize, OSD_OSDWIN1YL);
+ }
+ break;
+ case WIN_VID1:
+ winmd_mask |= OSD_VIDWINMD_VFF1;
+ if (lconfig->interlaced)
+ winmd |= OSD_VIDWINMD_VFF1;
+
+ osd_merge(winmd_mask, winmd, OSD_VIDWINMD);
+ osd_write(lconfig->line_length >> 5, OSD_VIDWIN1OFST);
+ osd_write(lconfig->xpos, OSD_VIDWIN1XP);
+ osd_write(lconfig->xsize, OSD_VIDWIN1XL);
+ /*
+ * For YUV420P format the register contents are
+ * duplicated in both VID registers
+ */
+ if (cpu_is_davinci_dm365()) {
+ if (lconfig->pixfmt == PIXFMT_NV12) {
+ /* other window also */
+ if (lconfig->interlaced) {
+ winmd_mask |= OSD_VIDWINMD_VFF0;
+ winmd |= OSD_VIDWINMD_VFF0;
+ osd_merge(winmd_mask, winmd,
+ OSD_VIDWINMD);
+ }
+ osd_merge(OSD_MISCCTL_S420D, OSD_MISCCTL_S420D,
+ OSD_MISCCTL);
+ osd_write(lconfig->line_length >> 5,
+ OSD_VIDWIN0OFST);
+ osd_write(lconfig->xpos, OSD_VIDWIN0XP);
+ osd_write(lconfig->xsize, OSD_VIDWIN0XL);
+ } else
+ osd_merge(OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D,
+ OSD_MISCCTL);
+ }
+
+ if (lconfig->interlaced) {
+ osd_write(lconfig->ypos >> 1, OSD_VIDWIN1YP);
+ osd_write(lconfig->ysize >> 1, OSD_VIDWIN1YL);
+ if (cpu_is_davinci_dm365()
+ && lconfig->pixfmt == PIXFMT_NV12) {
+ osd_write(lconfig->ypos >> 1, OSD_VIDWIN0YP);
+ osd_write(lconfig->ysize >> 1, OSD_VIDWIN0YL);
+ }
+ } else {
+ osd_write(lconfig->ypos, OSD_VIDWIN1YP);
+ osd_write(lconfig->ysize, OSD_VIDWIN1YL);
+ if (cpu_is_davinci_dm365()
+ && lconfig->pixfmt == PIXFMT_NV12) {
+ osd_write(lconfig->ypos, OSD_VIDWIN0YP);
+ osd_write(lconfig->ysize, OSD_VIDWIN0YL);
+ }
+ }
+ break;
+ }
+}
+
+int davinci_disp_set_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ int reject_config;
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ reject_config = try_layer_config(layer, lconfig);
+ if (reject_config) {
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return reject_config;
+ }
+
+ /* update the current Cb/Cr order */
+ if (is_yc_pixfmt(lconfig->pixfmt))
+ osd->yc_pixfmt = lconfig->pixfmt;
+
+ /*
+ * If we are switching OSD1 from normal mode to attribute mode or from
+ * attribute mode to normal mode, then we must disable the window.
+ */
+ if (layer == WIN_OSD1) {
+ if (((lconfig->pixfmt == PIXFMT_OSD_ATTR)
+ && (win->lconfig.pixfmt != PIXFMT_OSD_ATTR))
+ || ((lconfig->pixfmt != PIXFMT_OSD_ATTR)
+ && (win->lconfig.pixfmt == PIXFMT_OSD_ATTR))) {
+ win->is_enabled = 0;
+ _davinci_disp_disable_layer(layer);
+ }
+ }
+
+ _davinci_disp_set_layer_config(layer, lconfig);
+
+ if (layer == WIN_OSD1) {
+ struct davinci_osdwin_state *osdwin_state =
+ &osd->osdwin[OSDWIN_OSD1];
+
+ if ((lconfig->pixfmt != PIXFMT_OSD_ATTR)
+ && (win->lconfig.pixfmt == PIXFMT_OSD_ATTR)) {
+ /*
+ * We just switched OSD1 from attribute mode to normal
+ * mode, so we must initialize the CLUT select, the
+ * blend factor, transparency colorkey enable, and
+ * attenuation enable (DM6446 only) bits in the
+ * OSDWIN1MD register.
+ */
+ _davinci_disp_set_osd_clut(OSDWIN_OSD1,
+ osdwin_state->clut);
+ _davinci_disp_set_blending_factor(OSDWIN_OSD1,
+ osdwin_state->blend);
+ if (osdwin_state->colorkey_blending) {
+ _davinci_disp_enable_color_key(OSDWIN_OSD1,
+ osdwin_state->
+ colorkey,
+ lconfig->pixfmt);
+ } else
+ _davinci_disp_disable_color_key(OSDWIN_OSD1);
+ _davinci_disp_set_rec601_attenuation(OSDWIN_OSD1,
+ osdwin_state->
+ rec601_attenuation);
+ } else if ((lconfig->pixfmt == PIXFMT_OSD_ATTR)
+ && (win->lconfig.pixfmt != PIXFMT_OSD_ATTR)) {
+ /*
+ * We just switched OSD1 from normal mode to attribute
+ * mode, so we must initialize the blink enable and
+ * blink interval bits in the OSDATRMD register.
+ */
+ _davinci_disp_set_blink_attribute(osd->is_blinking,
+ osd->blink);
+ }
+ }
+
+ /*
+ * If we just switched to a 1-, 2-, or 4-bits-per-pixel bitmap format
+ * then configure a default palette map.
+ */
+ if ((lconfig->pixfmt != win->lconfig.pixfmt)
+ && ((lconfig->pixfmt == PIXFMT_1BPP)
+ || (lconfig->pixfmt == PIXFMT_2BPP)
+ || (lconfig->pixfmt == PIXFMT_4BPP))) {
+ enum davinci_osd_layer osdwin =
+ ((layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1);
+ struct davinci_osdwin_state *osdwin_state =
+ &osd->osdwin[osdwin];
+ unsigned char clut_index;
+ unsigned char clut_entries = 0;
+
+ switch (lconfig->pixfmt) {
+ case PIXFMT_1BPP:
+ clut_entries = 2;
+ break;
+ case PIXFMT_2BPP:
+ clut_entries = 4;
+ break;
+ case PIXFMT_4BPP:
+ clut_entries = 16;
+ break;
+ default:
+ break;
+ }
+ /*
+ * The default palette map maps the pixel value to the clut
+ * index, i.e. pixel value 0 maps to clut entry 0, pixel value 1
+ * maps to clut entry 1, etc.
+ */
+ for (clut_index = 0; clut_index < 16; clut_index++) {
+ osdwin_state->palette_map[clut_index] = clut_index;
+ if (clut_index < clut_entries) {
+ _davinci_disp_set_palette_map(osdwin,
+ clut_index,
+ clut_index,
+ lconfig->pixfmt);
+ }
+ }
+ }
+
+ win->lconfig = *lconfig;
+ /* DM6446: configure the RGB888 enable and window selection */
+ if (osd->win[WIN_VID0].lconfig.pixfmt == PIXFMT_RGB888)
+ _davinci_disp_enable_vid_rgb888(WIN_VID0);
+ else if (osd->win[WIN_VID1].lconfig.pixfmt == PIXFMT_RGB888)
+ _davinci_disp_enable_vid_rgb888(WIN_VID1);
+ else
+ _davinci_disp_disable_vid_rgb888();
+
+ if (layer == WIN_VID0) {
+ osd->pingpong =
+ _davinci_disp_dm6446_vid0_pingpong(field_inversion,
+ win->fb_base_phys,
+ &win->lconfig);
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(davinci_disp_set_layer_config);
+
+void davinci_disp_init_layer(enum davinci_disp_layer layer)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ enum davinci_osd_layer osdwin;
+ struct davinci_osdwin_state *osdwin_state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ win->is_enabled = 0;
+ _davinci_disp_disable_layer(layer);
+
+ win->h_zoom = ZOOM_X1;
+ win->v_zoom = ZOOM_X1;
+ _davinci_disp_set_zoom(layer, win->h_zoom, win->v_zoom);
+
+ win->fb_base_phys = 0;
+ _davinci_disp_start_layer(layer, win->fb_base_phys, NULL);
+
+ win->lconfig.line_length = 0;
+ win->lconfig.xsize = 0;
+ win->lconfig.ysize = 0;
+ win->lconfig.xpos = 0;
+ win->lconfig.ypos = 0;
+ win->lconfig.interlaced = 0;
+ switch (layer) {
+ case WIN_OSD0:
+ case WIN_OSD1:
+ osdwin = (layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1;
+ osdwin_state = &osd->osdwin[osdwin];
+ /*
+ * Other code relies on the fact that OSD windows default to a
+ * bitmap pixel format when they are deallocated, so don't
+ * change this default pixel format.
+ */
+ win->lconfig.pixfmt = PIXFMT_8BPP;
+ _davinci_disp_set_layer_config(layer, &win->lconfig);
+ osdwin_state->clut = RAM_CLUT;
+ _davinci_disp_set_osd_clut(osdwin, osdwin_state->clut);
+ osdwin_state->colorkey_blending = 0;
+ _davinci_disp_disable_color_key(osdwin);
+ osdwin_state->blend = OSD_8_VID_0;
+ _davinci_disp_set_blending_factor(osdwin, osdwin_state->blend);
+ osdwin_state->rec601_attenuation = 0;
+ _davinci_disp_set_rec601_attenuation(osdwin,
+ osdwin_state->
+ rec601_attenuation);
+ if (osdwin == OSDWIN_OSD1) {
+ osd->is_blinking = 0;
+ osd->blink = BLINK_X1;
+ }
+ break;
+ case WIN_VID0:
+ case WIN_VID1:
+ win->lconfig.pixfmt = osd->yc_pixfmt;
+ _davinci_disp_set_layer_config(layer, &win->lconfig);
+ break;
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_init_layer);
+
+void davinci_disp_release_layer(enum davinci_disp_layer layer)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ if (!win->is_allocated) {
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return;
+ }
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+ davinci_disp_init_layer(layer);
+ spin_lock_irqsave(&osd->lock, flags);
+
+ win->is_allocated = 0;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+}
+EXPORT_SYMBOL(davinci_disp_release_layer);
+
+int davinci_disp_request_layer(enum davinci_disp_layer layer)
+{
+ struct davinci_window_state *win = &osd->win[layer];
+ unsigned long flags;
+
+ spin_lock_irqsave(&osd->lock, flags);
+
+ if (win->is_allocated) {
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return -1;
+ }
+ win->is_allocated = 1;
+
+ spin_unlock_irqrestore(&osd->lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL(davinci_disp_request_layer);
+
+static void _davinci_disp_init(void)
+{
+ osd_write(0, OSD_MODE);
+ osd_write(0, OSD_VIDWINMD);
+ osd_write(0, OSD_OSDWIN0MD);
+ osd_write(0, OSD_OSDWIN1MD);
+ osd_write(0, OSD_RECTCUR);
+ osd_write(0, OSD_MISCCTL);
+ if (cpu_is_davinci_dm355()) {
+ osd_write(0, OSD_VBNDRY);
+ osd_write(0, OSD_EXTMODE);
+ osd_write(OSD_MISCCTL_DMANG, OSD_MISCCTL);
+ }
+}
+
+static int davinci_osd_probe(struct platform_device *pdev)
+{
+ struct davinci_osd_platform_data *pdata = pdev->dev.platform_data;
+ struct resource *res;
+
+ osd->dev = &pdev->dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!res) {
+ dev_err(osd->dev, "Unable to get VENC interrupt");
+ return -ENOENT;
+ }
+ osd->irq = res->start;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(osd->dev, "Unable to get OSD register address map\n");
+ return -ENODEV;
+ }
+ osd->osd_base_phys = res->start;
+ osd->osd_size = res->end - res->start + 1;
+ if (!request_mem_region(osd->osd_base_phys, osd->osd_size,
+ MODULE_NAME)) {
+ dev_err(osd->dev, "Unable to reserve OSD MMIO region\n");
+ return -ENODEV;
+ }
+ osd->osd_base = (unsigned long)ioremap_nocache(res->start,
+ osd->osd_size);
+ if (!osd->osd_base) {
+ dev_err(osd->dev, "Unable to map the OSD region\n");
+ goto release_osd1;
+ }
+
+ if (request_irq(osd->irq, davinci_disp_isr, IRQF_SHARED, MODULE_NAME,
+ osd)) {
+ dev_err(osd->dev,"Unable to request interrupt\n");
+ goto release_osd2;
+ }
+
+ _davinci_disp_init();
+
+ /* set default Cb/Cr order */
+ osd->yc_pixfmt = PIXFMT_YCbCrI;
+
+ if (cpu_is_davinci_dm355()) {
+ /*
+ * ROM CLUT1 on the DM355 is similar (identical?) to ROM CLUT0
+ * on the DM6446, so make ROM_CLUT1 the default on the DM355.
+ */
+ osd->rom_clut = ROM_CLUT1;
+ }
+
+ _davinci_disp_set_field_inversion(pdata->invert_field);
+ _davinci_disp_set_rom_clut(osd->rom_clut);
+
+ davinci_disp_init_layer(WIN_OSD0);
+ davinci_disp_init_layer(WIN_VID0);
+ davinci_disp_init_layer(WIN_OSD1);
+ davinci_disp_init_layer(WIN_VID1);
+
+ return 0;
+
+release_osd2:
+ iounmap((void *)osd->osd_base);
+release_osd1:
+ release_mem_region(osd->osd_base_phys, osd->osd_size);
+
+ return -ENODEV;
+}
+
+static int davinci_osd_remove(struct platform_device *pdev)
+{
+ free_irq(osd->irq, osd);
+ if (osd->osd_base)
+ iounmap((void *)osd->osd_base);
+ release_mem_region(osd->osd_base_phys, osd->osd_size);
+
+ return 0;
+}
+
+static struct platform_driver davinci_osd_driver = {
+ .probe = davinci_osd_probe,
+ .remove = davinci_osd_remove,
+ .driver = {
+ .name = MODULE_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+int davinci_osd_init(void)
+{
+ spin_lock_init(&osd->lock);
+
+ /* Register the driver */
+ if (platform_driver_register(&davinci_osd_driver)) {
+ printk(KERN_ERR "Unable to register davinci osd driver\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static void davinci_osd_exit(void)
+{
+ platform_driver_unregister(&davinci_osd_driver);
+}
+
+subsys_initcall(davinci_osd_init);
+module_exit(davinci_osd_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("DaVinci OSD Manager Driver");
+MODULE_AUTHOR("Texas Instruments");
diff --git a/drivers/media/platform/davinci/davinci_platform.c b/drivers/media/platform/davinci/davinci_platform.c
new file mode 100644
index 00000000..334f2cad
--- /dev/null
+++ b/drivers/media/platform/davinci/davinci_platform.c
@@ -0,0 +1,1353 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/attribute_container.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/slab.h>
+#include <linux/export.h>
+#include <linux/stat.h>
+#include <linux/module.h>
+#include <linux/export.h>
+
+#include <mach/hardware.h>
+#include <mach/mux.h>
+#include <mach/cputype.h>
+//#include <mach/io.h>
+//#include <mach/i2c.h>
+#include <asm/io.h>
+#include <media/davinci/davinci_enc.h>
+#include <media/davinci/vid_encoder_types.h>
+#include <video/davinci_vpbe.h>
+#include <video/davinci_osd.h>
+#include <media/davinci/davinci_enc_mngr.h>
+#include <media/davinci/davinci_platform.h>
+//#include "../ths7303.h"
+
+#define MSP430_I2C_ADDR (0x25)
+#define PCA9543A_I2C_ADDR (0x73)
+#define THS7303 0
+#define THS7303_I2C_ADDR (0x2C)
+#define THS7353_I2C_ADDR (0x2E)
+#define THS7353 1
+#define THS73XX_CHANNEL_1 1
+#define THS73XX_CHANNEL_2 2
+#define THS73XX_CHANNEL_3 3
+#define DM365_CPLD_REGISTER3 (0x04000018)
+#define DM365_TVP7002_SEL (0x1)
+#define DM365_SENSOR_SEL (0x2)
+#define DM365_TVP5146_SEL (0x5)
+#define DM365_VIDEO_MUX_MASK (0x7)
+#define DM644X_DDR2_CNTL_BASE (0x20000000)
+#define VENC_27MHZ (27000000)
+#define VENC_74_25MHZ (74250000)
+
+struct davinci_venc_state {
+ spinlock_t lock;
+ struct device *vdev;
+ dma_addr_t venc_base_phys;
+ unsigned long venc_base;
+ unsigned long venc_size;
+ bool invert_field;
+};
+
+static struct davinci_venc_state venc_state;
+static struct davinci_venc_state *venc = &venc_state;
+
+enum ths73xx_filter_mode {
+ THS_FILTER_MODE_480I,
+ THS_FILTER_MODE_576I,
+ THS_FILTER_MODE_480P,
+ THS_FILTER_MODE_576P,
+ THS_FILTER_MODE_720P,
+ THS_FILTER_MODE_1080I,
+ THS_FILTER_MODE_1080P
+};
+
+extern struct vid_enc_device_mgr enc_dev[];
+
+struct enc_config davinci_enc_default[DAVINCI_ENC_MAX_CHANNELS] = {
+ {VID_ENC_OUTPUT_COMPOSITE,
+ VID_ENC_STD_NTSC}
+};
+
+EXPORT_SYMBOL(davinci_enc_default);
+
+char *davinci_outputs[] = {
+ VID_ENC_OUTPUT_COMPOSITE,
+ VID_ENC_OUTPUT_COMPOSITE1,
+ VID_ENC_OUTPUT_SVIDEO,
+ VID_ENC_OUTPUT_SVIDEO1,
+ VID_ENC_OUTPUT_COMPONENT,
+ VID_ENC_OUTPUT_COMPONENT1,
+ VID_ENC_OUTPUT_LCD,
+ VID_ENC_OUTPUT_LCD1,
+ VID_ENC_OUTPUT_PRGB,
+ VID_ENC_OUTPUT_PRGB1,
+ ""
+};
+
+EXPORT_SYMBOL(davinci_outputs);
+
+char *davinci_modes[] = {
+ VID_ENC_STD_NTSC,
+ "ntsc",
+ VID_ENC_STD_NTSC_RGB,
+ VID_ENC_STD_PAL,
+ "pal",
+ VID_ENC_STD_PAL_RGB,
+ VID_ENC_STD_720P_24,
+ VID_ENC_STD_720P_25,
+ VID_ENC_STD_720P_30,
+ VID_ENC_STD_720P_50,
+ VID_ENC_STD_720P_60,
+ VID_ENC_STD_1080I_25,
+ VID_ENC_STD_1080I_30,
+ VID_ENC_STD_1080P_25,
+ VID_ENC_STD_1080P_30,
+ VID_ENC_STD_1080P_50,
+ VID_ENC_STD_1080P_60,
+ VID_ENC_STD_480P_60,
+ VID_ENC_STD_576P_50,
+ VID_ENC_STD_640x480,
+ VID_ENC_STD_640x400,
+ VID_ENC_STD_640x350,
+ VID_ENC_STD_480x272,
+ VID_ENC_STD_800x480,
+ VID_ENC_STD_PRGB_DEFAULT,
+ ""
+};
+
+EXPORT_SYMBOL(davinci_modes);
+
+static __inline__ u32 dispc_reg_in(u32 offset)
+{
+ return (__raw_readl((volatile void __iomem *)(venc->venc_base + offset)));
+}
+
+static __inline__ u32 dispc_reg_out(u32 offset, u32 val)
+{
+ __raw_writel(val, (volatile void __iomem *)(venc->venc_base + offset));
+
+ return (val);
+}
+
+static __inline__ u32 dispc_reg_merge(u32 offset, u32 val, u32 mask)
+{
+ u32 addr, new_val;
+
+ addr = venc->venc_base + offset;
+
+ new_val = (__raw_readl((volatile void __iomem *)addr) & ~mask) | (val & mask);
+ __raw_writel(new_val, (volatile void __iomem *)addr);
+ return (new_val);
+}
+
+u32 venc_reg_in(u32 offset)
+{
+ return (__raw_readl((volatile void __iomem *)(venc->venc_base + offset)));
+}
+EXPORT_SYMBOL(venc_reg_in);
+
+u32 venc_reg_out(u32 offset, u32 val)
+{
+ __raw_writel(val, (volatile void __iomem *)(venc->venc_base + offset));
+
+ return (val);
+}
+EXPORT_SYMBOL(venc_reg_out);
+
+u32 venc_reg_merge(u32 offset, u32 val, u32 mask)
+{
+ u32 addr, new_val;
+
+ addr = venc->venc_base + offset;
+
+ new_val = (__raw_readl((volatile void __iomem *)addr) & ~mask) | (val & mask);
+ __raw_writel(new_val, (volatile void __iomem *)addr);
+ return (new_val);
+}
+EXPORT_SYMBOL(venc_reg_merge);
+
+static void __iomem *display_cntl_base;
+
+static DEFINE_SPINLOCK(reg_access_lock);
+static void davinci_enc_set_basep(int channel, unsigned basepx, unsigned basepy)
+{
+ spin_lock(&reg_access_lock);
+
+ osd_write_left_margin(basepx & OSD_BASEPX_BPX);
+ osd_write_upper_margin(basepy & OSD_BASEPY_BPY);
+
+ spin_unlock(&reg_access_lock);
+}
+
+static void davinci_enc_get_basep(int channel, unsigned *basepx,
+ unsigned *basepy)
+{
+ spin_lock(&reg_access_lock);
+
+ *basepx = (OSD_BASEPX_BPX & osd_read_left_margin());
+ *basepy = (OSD_BASEPY_BPY & osd_read_upper_margin());
+
+ spin_unlock(&reg_access_lock);
+}
+
+struct system_device {
+ struct module *owner;
+ struct device class_dev;
+};
+
+static struct system_device *davinci_system_device;
+
+#define to_system_dev(cdev) container_of(cdev, \
+ struct system_device, class_dev)
+
+static void davinci_system_class_release(struct device *cdev)
+{
+ struct system_device *dev = to_system_dev(cdev);
+
+ if (dev != NULL)
+ kfree(dev);
+}
+
+struct class davinci_system_class = {
+ .name = "davinci_system",
+ .owner = THIS_MODULE,
+ .dev_release = davinci_system_class_release,
+};
+
+static ssize_t
+reg_store(struct device *cdev, struct device_attribute *attr, const char *buffer, size_t count)
+{
+ char *str = 0;
+ char *bufv = 0;
+ int addr = 0;
+ int val = 0;
+ int len = 0;
+
+ if (!buffer || (count == 0) || (count >= 128))
+ return 0;
+
+ str = kmalloc(128, GFP_KERNEL);
+ if (0 == str)
+ return -ENOMEM;
+
+ strcpy(str, buffer);
+ /* overwrite the '\n' */
+ strcpy(str + count - 1, "\0");
+
+ /* format: <address> [<value>]
+ if only <address> present, it is a read
+ if <address> <value>, then it is a write */
+ len = strcspn(str, " ");
+ addr = simple_strtoul(str, NULL, 16);
+
+ if (len != count - 1) {
+ bufv = str;
+ strsep(&bufv, " ");
+ val = simple_strtoul(bufv, NULL, 16);
+ }
+
+ kfree(str);
+
+ /* for now, restrict this to access DDR2 controller
+ Peripheral Bust Burst Priority Register PBBPR
+ (addr: 0x20000020) only */
+ if (addr != (DM644X_DDR2_CNTL_BASE + 0x20))
+ return -EINVAL;
+
+ spin_lock(&reg_access_lock);
+ if (bufv != 0)
+ writel(val, display_cntl_base + addr - DM644X_DDR2_CNTL_BASE);
+ printk(KERN_NOTICE "%05x %08x\n", addr,
+ readl(display_cntl_base + addr - DM644X_DDR2_CNTL_BASE));
+ spin_unlock(&reg_access_lock);
+
+ return count;
+}
+
+static ssize_t reg_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return 0;
+}
+
+static ssize_t osd_basepx_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ unsigned int basepx, basepy;
+ int p;
+
+ davinci_enc_get_basep(0, &basepx, &basepy);
+ p = sprintf(buf, "%d\n", basepx);
+ return p;
+}
+
+static ssize_t osd_basepx_store(struct device *cdev, struct device_attribute *attr, const char *buffer,
+ size_t count)
+{
+ unsigned int basepx, basepy;
+ char reg_val[10];
+
+ if (count >= 9) {
+ strncpy(reg_val, buffer, 9);
+ reg_val[9] = '\0';
+ } else {
+ /* overwrite the '\n' */
+ strcpy(reg_val, buffer);
+ strcpy(reg_val + count - 1, "\0");
+ }
+ davinci_enc_get_basep(0, &basepx, &basepy);
+ basepx = simple_strtoul(reg_val, NULL, 10);
+
+ if (basepx > OSD_BASEPX_BPX) {
+ printk(KERN_ERR "Invalid value for OSD basepx\n");
+ return count;
+ }
+ davinci_enc_set_basep(0, basepx, basepy);
+ return count;
+}
+
+static ssize_t osd_basepy_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ unsigned int basepx, basepy;
+ int p;
+
+ davinci_enc_get_basep(0, &basepx, &basepy);
+ p = sprintf(buf, "%d\n", basepy);
+ return p;
+}
+
+static ssize_t osd_basepy_store(struct device *cdev, struct device_attribute *attr, const char *buffer,
+ size_t count)
+{
+ unsigned int basepx, basepy;
+ char reg_val[10];
+
+ if (count >= 9) {
+ strncpy(reg_val, buffer, 9);
+ reg_val[9] = '\0';
+ } else {
+ /* overwrite the '\n' */
+ strcpy(reg_val, buffer);
+ strcpy(reg_val + count - 1, "\0");
+ }
+
+ davinci_enc_get_basep(0, &basepx, &basepy);
+ basepy = simple_strtoul(reg_val, NULL, 10);
+ if (basepy > OSD_BASEPY_BPY) {
+ printk(KERN_ERR "Invalid value for OSD basepy\n");
+ return count;
+ }
+ davinci_enc_set_basep(0, basepx, basepy);
+ return count;
+}
+
+#define DECLARE_ATTR(_name, _mode, _show, _store) { \
+ .attr = { .name = __stringify(_name), .mode = _mode }, \
+ .show = _show, \
+ .store = _store,}
+
+static struct device_attribute system_device_attributes[] = {
+ DECLARE_ATTR(reg, S_IRWXUGO, reg_show, reg_store),
+ DECLARE_ATTR(vpbe_osd_basepx, S_IRWXUGO, osd_basepx_show,
+ osd_basepx_store),
+ DECLARE_ATTR(vpbe_osd_basepy, S_IRWXUGO, osd_basepy_show,
+ osd_basepy_store)
+};
+
+static void *create_sysfs_files(void)
+{
+ struct system_device *dev;
+ int ret;
+ int i;
+
+ dev = kzalloc(sizeof(struct system_device), GFP_KERNEL);
+ if (!dev)
+ return NULL;
+
+ dev->owner = THIS_MODULE;
+ dev->class_dev.class = &davinci_system_class;
+ dev_set_name(&dev->class_dev, "%s", "system");
+// dev_set_drvdata(&dev->class_dev, dev);
+ ret = device_register(&dev->class_dev);
+ if (ret < 0) {
+ printk(KERN_ERR "DaVinci Platform: Error in device_register\n");
+ kfree(dev);
+ return NULL;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(system_device_attributes); i++) {
+ ret = device_create_file(&dev->class_dev,
+ &system_device_attributes
+ [i]);
+ if (ret < 0) {
+ while (--i >= 0)
+ device_remove_file(&dev->class_dev,
+ &system_device_attributes
+ [i]);
+ device_unregister(&dev->class_dev);
+ printk(KERN_ERR "Error in device_create_file\n");
+ return NULL;
+ }
+ }
+
+ return dev;
+}
+
+static void remove_sysfs_files(struct system_device *dev)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(system_device_attributes); i++)
+ device_remove_file(&dev->class_dev,
+ &system_device_attributes[i]);
+
+ device_unregister(&dev->class_dev);
+}
+
+/**
+ * function davinci_enc_select_venc_clk
+ * @clk: Desired input clock for VENC
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Select the venc input clock based on the clk value.
+ */
+int davinci_enc_select_venc_clock(int clk)
+{
+ struct clk *pll1_venc_clk, *pll2_venc_clk;
+ unsigned int pll1_venc_clk_rate, pll2_venc_clk_rate;
+
+ pll1_venc_clk = clk_get(NULL, "pll1_sysclk6");
+ pll1_venc_clk_rate = clk_get_rate(pll1_venc_clk);
+
+ pll2_venc_clk = clk_get(NULL, "pll2_sysclk5");
+ pll2_venc_clk_rate = clk_get_rate(pll2_venc_clk);
+
+ if (clk == pll1_venc_clk_rate)
+ __raw_writel(0x18, IO_ADDRESS(SYS_VPSS_CLKCTL));
+ else if (clk == pll2_venc_clk_rate)
+ __raw_writel(0x38, IO_ADDRESS(SYS_VPSS_CLKCTL));
+ //else if (cpu_is_davinci_dm368()) {
+ // enable_hd_clk();
+ // __raw_writel(0x3a, IO_ADDRESS(SYS_VPSS_CLKCTL));
+ //}
+ else {
+ dev_err(venc->vdev, "Desired VENC clock not available\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+EXPORT_SYMBOL(davinci_enc_select_venc_clock);
+
+/* TODO */
+#if 0
+/* function to configure THS7303 filter */
+static int tvp73xx_setup_channel(u8 device, enum ths73xx_filter_mode mode)
+{
+ u8 val[2];
+ u8 input_bias_luma = 2, input_bias_chroma = 2, temp;
+ u8 i2c_addr = THS7303_I2C_ADDR;
+ int err = 0;
+
+ if (device == THS7353) {
+ i2c_addr = THS7353_I2C_ADDR;
+ input_bias_luma = 5;
+ input_bias_chroma = 4;
+ }
+
+ /* setup 7303
+ * Input Mux A
+ */
+ val[1] = 0;
+ switch (mode) {
+ case THS_FILTER_MODE_1080P:
+ {
+ /* LPF - 5MHz */
+ val[1] = (3 << 6);
+ /* LPF - bypass */
+ val[1] |= (3 << 3);
+ break;
+ }
+ case THS_FILTER_MODE_1080I:
+ case THS_FILTER_MODE_720P:
+ {
+ /* LPF - 5MHz */
+ val[1] = (2 << 6);
+ /* LPF - 35 MHz */
+ val[1] |= (2 << 3);
+ break;
+ }
+ case THS_FILTER_MODE_480P:
+ case THS_FILTER_MODE_576P:
+ {
+ /* LPF - 2.5MHz */
+ val[1] = (1 << 6);
+ /* LPF - 16 MHz */
+ val[1] |= (1 << 3);
+ break;
+ }
+ case THS_FILTER_MODE_480I:
+ case THS_FILTER_MODE_576I:
+ {
+ /* LPF - 500 KHz, LPF - 9 MHz. Do nothing */
+ break;
+ }
+ default:
+ return -1;
+ }
+ /* setup channel2 - Luma - Green */
+ temp = val[1];
+ val[1] |= input_bias_luma;
+ val[0] = THS73XX_CHANNEL_2;
+ err = davinci_i2c_write(2, val, i2c_addr);
+
+ /* setup channel1 chroam - Red */
+ val[1] = temp;
+ val[1] |= input_bias_chroma;
+
+ val[0] = THS73XX_CHANNEL_1;
+ err |= davinci_i2c_write(2, val, i2c_addr);
+
+ val[0] = THS73XX_CHANNEL_3;
+ err |= davinci_i2c_write(2, val, i2c_addr);
+ return 0;
+}
+#endif
+
+static void enableDigitalOutput(int bEnable)
+{
+ if (bEnable) {
+ dispc_reg_out(VENC_VMOD, 0);
+ dispc_reg_out(VENC_CVBS, 0);
+
+ //if (cpu_is_davinci_dm644x())
+ // __raw_writel(0, IO_ADDRESS(DM644X_VPBE_REG_BASE + VPBE_PCR));
+
+ /*if (cpu_is_davinci_dm368()) {
+ enable_lcd();
+
+
+ __raw_writel(0x1a, IO_ADDRESS(SYS_VPSS_CLKCTL));
+
+
+ davinci_cfg_reg(DM365_GPIO82);
+
+ gpio_request(82, "lcd_oe");
+
+
+ gpio_direction_output(82, 0);
+ gpio_set_value(82, 0);
+ }*/
+
+ dispc_reg_out(VENC_LCDOUT, 0);
+ dispc_reg_out(VENC_HSPLS, 0);
+ dispc_reg_out(VENC_HSTART, 0);
+ dispc_reg_out(VENC_HVALID, 0);
+ dispc_reg_out(VENC_HINT, 0);
+ dispc_reg_out(VENC_VSPLS, 0);
+ dispc_reg_out(VENC_VSTART, 0);
+ dispc_reg_out(VENC_VVALID, 0);
+ dispc_reg_out(VENC_VINT, 0);
+ dispc_reg_out(VENC_YCCCTL, 0);
+ dispc_reg_out(VENC_DACSEL, 0);
+
+ } else {
+ /* Initialize the VPSS Clock Control register */
+ if (davinci_enc_select_venc_clock(VENC_27MHZ) < 0)
+ dev_err(venc->vdev, "PLL's doesnot yield required\
+ VENC clk\n");
+ //if (cpu_is_davinci_dm644x())
+ // __raw_writel(0, IO_ADDRESS(DM644X_VPBE_REG_BASE + VPBE_PCR));
+
+ /* Set PINMUX0 reg to enable LCD (all other settings are kept
+ per boot)
+ */
+ //if (cpu_is_davinci_dm644x()) {
+ // davinci_cfg_reg(DM644X_LOEEN);
+ // davinci_cfg_reg(DM644X_LFLDEN);
+ //}
+
+ /* disable VCLK output pin enable */
+ dispc_reg_out(VENC_VIDCTL, 0x141);
+
+ /* Disable output sync pins */
+ dispc_reg_out(VENC_SYNCCTL, 0);
+
+ /* Disable DCLOCK */
+ dispc_reg_out(VENC_DCLKCTL, 0);
+ dispc_reg_out(VENC_DRGBX1, 0x0000057C);
+
+ /* Disable LCD output control (accepting default polarity) */
+ dispc_reg_out(VENC_LCDOUT, 0);
+ if (!cpu_is_davinci_dm355())
+ dispc_reg_out(VENC_CMPNT, 0x100);
+ dispc_reg_out(VENC_HSPLS, 0);
+ dispc_reg_out(VENC_HINT, 0);
+ dispc_reg_out(VENC_HSTART, 0);
+ dispc_reg_out(VENC_HVALID, 0);
+
+ dispc_reg_out(VENC_VSPLS, 0);
+ dispc_reg_out(VENC_VINT, 0);
+ dispc_reg_out(VENC_VSTART, 0);
+ dispc_reg_out(VENC_VVALID, 0);
+
+ dispc_reg_out(VENC_HSDLY, 0);
+ dispc_reg_out(VENC_VSDLY, 0);
+
+ dispc_reg_out(VENC_YCCCTL, 0);
+ dispc_reg_out(VENC_VSTARTA, 0);
+
+ /* Set OSD clock and OSD Sync Adavance registers */
+ dispc_reg_out(VENC_OSDCLK0, 1);
+ dispc_reg_out(VENC_OSDCLK1, 2);
+ }
+}
+
+/*
+ * setting NTSC mode
+ */
+
+static void davinci_enc_set_ntsc(struct vid_enc_mode_info *mode_info)
+{
+ enableDigitalOutput(0);
+
+ if (cpu_is_davinci_dm355()) {
+ dispc_reg_out(VENC_CLKCTL, 0x01);
+ dispc_reg_out(VENC_VIDCTL, 0);
+ /* DM 350 Configure VDAC_CONFIG , why ?? */
+ __raw_writel(0x0E21A6B6, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ } else if (cpu_is_davinci_dm365()) {
+ dispc_reg_out(VENC_CLKCTL, 0x01);
+ dispc_reg_out(VENC_VIDCTL, 0);
+ __raw_writel(0x081141CF, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ } else {
+ /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
+ dispc_reg_merge(VENC_VIDCTL, 0, 1 << 1);
+ /* Set REC656 Mode */
+ dispc_reg_out(VENC_YCCCTL, 0x1);
+ dispc_reg_merge(VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
+ dispc_reg_merge(VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
+ }
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ dispc_reg_merge(VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
+}
+
+/*
+ * setting PAL mode
+ */
+static void davinci_enc_set_pal(struct vid_enc_mode_info *mode_info)
+{
+
+ enableDigitalOutput(0);
+
+ if (cpu_is_davinci_dm355()) {
+ dispc_reg_out(VENC_CLKCTL, 0x1);
+ dispc_reg_out(VENC_VIDCTL, 0);
+ /* DM350 Configure VDAC_CONFIG */
+ __raw_writel(0x0E21A6B6, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ } else if (cpu_is_davinci_dm365()) {
+ dispc_reg_out(VENC_CLKCTL, 0x1);
+ dispc_reg_out(VENC_VIDCTL, 0);
+ __raw_writel(0x081141CF, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ } else {
+ /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
+ dispc_reg_merge(VENC_VIDCTL, 0, 1 << 1);
+ /* Set REC656 Mode */
+ dispc_reg_out(VENC_YCCCTL, 0x1);
+ }
+
+ dispc_reg_merge(VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
+ VENC_SYNCCTL_OVD);
+
+
+ osd_write_left_margin(mode_info->left_margin);
+ /* PAL display shows shakiness in the OSD0 when
+ * this is set to upper margin. Need to bump it
+ * by 2 in the case of DM365
+ */
+
+ if (cpu_is_davinci_dm365())
+ osd_write_upper_margin(mode_info->upper_margin + 2);
+ else
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ dispc_reg_merge(VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
+ dispc_reg_out(VENC_DACTST, 0x0);
+}
+
+/*
+ * davinci_enc_ntsc_pal_rgb
+ */
+/* This function configures the video encoder to NTSC RGB setting.*/
+static void davinci_enc_set_ntsc_pal_rgb(struct vid_enc_mode_info *mode_info)
+{
+ enableDigitalOutput(0);
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+}
+
+/*
+ * davinci_enc_set_525p
+ */
+/* This function configures the video encoder to HDTV(525p) component setting.*/
+static void davinci_enc_set_525p(struct vid_enc_mode_info *mode_info)
+{
+ enableDigitalOutput(0);
+ if (cpu_is_davinci_dm365()) {
+ if (davinci_enc_select_venc_clock(VENC_27MHZ) < 0)
+ dev_err(venc->vdev, "PLL's doesnot yield required\
+ VENC clk\n");
+ } else
+ __raw_writel(0x19, IO_ADDRESS(SYS_VPSS_CLKCTL));
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ if (cpu_is_davinci_dm365()) {
+ dispc_reg_out(VENC_CLKCTL, 0x01);
+ //ths7303_setval(THS7303_FILTER_MODE_480P_576P);
+ msleep(40);
+ __raw_writel(0x081141EF, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ }
+
+ //if (cpu_is_davinci_dm644x())
+ // __raw_writel(VPBE_PCR_VENC_DIV, IO_ADDRESS(DM644X_VPBE_REG_BASE + VPBE_PCR));
+ dispc_reg_out(VENC_OSDCLK0, 0);
+ dispc_reg_out(VENC_OSDCLK1, 1);
+ //if (cpu_is_davinci_dm644x()) {
+ // dispc_reg_merge(VENC_VDPRO, VENC_VDPRO_DAFRQ, VENC_VDPRO_DAFRQ);
+ // dispc_reg_merge(VENC_VDPRO, VENC_VDPRO_DAUPS, VENC_VDPRO_DAUPS);
+ //}
+
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_YCBCR8 <<
+ VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
+
+ /* Set REC656 Mode */
+ dispc_reg_out(VENC_YCCCTL, 0x1);
+ dispc_reg_merge(VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
+}
+
+/*
+ * davinci_enc_set_625p
+ */
+/* This function configures the video encoder to HDTV(625p) component setting.*/
+static void davinci_enc_set_625p(struct vid_enc_mode_info *mode_info)
+{
+ enableDigitalOutput(0);
+ if (cpu_is_davinci_dm365()) {
+ if (davinci_enc_select_venc_clock(VENC_27MHZ) < 0)
+ dev_err(venc->vdev, "PLL's doesnot yield required\
+ VENC clk\n");
+ } else
+ __raw_writel(0x19, IO_ADDRESS(SYS_VPSS_CLKCTL));
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ if (cpu_is_davinci_dm365()) {
+ dispc_reg_out(VENC_CLKCTL, 0x01);
+ //ths7303_setval(THS7303_FILTER_MODE_480P_576P);
+ msleep(40);
+ __raw_writel(0x081141EF, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ }
+
+ //if (cpu_is_davinci_dm644x())
+ // __raw_writel(VPBE_PCR_VENC_DIV, IO_ADDRESS(DM644X_VPBE_REG_BASE + VPBE_PCR));
+
+ dispc_reg_out(VENC_OSDCLK0, 0);
+ dispc_reg_out(VENC_OSDCLK1, 1);
+
+ //if (cpu_is_davinci_dm644x()) {
+ // dispc_reg_merge(VENC_VDPRO, VENC_VDPRO_DAFRQ, VENC_VDPRO_DAFRQ);
+ // dispc_reg_merge(VENC_VDPRO, VENC_VDPRO_DAUPS, VENC_VDPRO_DAUPS);
+ //}
+
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_YCBCR8 <<
+ VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
+
+ /* Set REC656 Mode */
+ dispc_reg_out(VENC_YCCCTL, 0x1);
+ dispc_reg_merge(VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
+}
+
+/*
+ * davinci_enc_set_display_timing
+ */
+/* This function sets the display timing from the fb_info structure*/
+void davinci_enc_set_display_timing(struct vid_enc_mode_info *mode)
+{
+ dispc_reg_out(VENC_HSPLS, mode->hsync_len);
+ dispc_reg_out(VENC_HSTART, mode->left_margin);
+ dispc_reg_out(VENC_HVALID, mode->xres);
+ dispc_reg_out(VENC_HINT,
+ mode->xres + mode->left_margin + mode->right_margin - 1);
+
+ dispc_reg_out(VENC_VSPLS, mode->vsync_len);
+ dispc_reg_out(VENC_VSTART, mode->upper_margin);
+ dispc_reg_out(VENC_VVALID, mode->yres);
+ dispc_reg_out(VENC_VINT,
+ mode->yres + mode->upper_margin + mode->lower_margin);
+};
+
+EXPORT_SYMBOL(davinci_enc_set_display_timing);
+
+/*
+ * davinci_enc_set_dclk_pattern
+ */
+/* This function sets the DCLK output mode and pattern using
+ DCLKPTN registers */
+void davinci_enc_set_dclk_pattern
+ (unsigned long enable, unsigned long long pattern) {
+ if (enable > 1)
+ enable = 1;
+
+ dispc_reg_out(VENC_DCLKPTN0, pattern & 0xFFFF);
+ dispc_reg_out(VENC_DCLKPTN1, (pattern >> 16) & 0xFFFF);
+ dispc_reg_out(VENC_DCLKPTN2, (pattern >> 32) & 0xFFFF);
+ dispc_reg_out(VENC_DCLKPTN3, (pattern >> 48) & 0xFFFF);
+
+ /* The pattern is to enable DCLK or
+ to determine its level */
+ dispc_reg_merge(VENC_DCLKCTL,
+ enable << VENC_DCLKCTL_DCKEC_SHIFT, VENC_DCLKCTL_DCKEC);
+};
+EXPORT_SYMBOL(davinci_enc_set_dclk_pattern);
+
+/*
+ * davinci_enc_set_dclk_aux_pattern
+ */
+/* This function sets the auxiliary DCLK output pattern using
+ DCLKPTNnA registers */
+void davinci_enc_set_dclk_aux_pattern(unsigned long long pattern)
+{
+ dispc_reg_out(VENC_DCLKPTN0A, pattern & 0xFFFF);
+ dispc_reg_out(VENC_DCLKPTN1A, (pattern >> 16) & 0xFFFF);
+ dispc_reg_out(VENC_DCLKPTN2A, (pattern >> 32) & 0xFFFF);
+ dispc_reg_out(VENC_DCLKPTN3A, (pattern >> 48) & 0xFFFF);
+};
+EXPORT_SYMBOL(davinci_enc_set_dclk_aux_pattern);
+
+/*
+ * davinci_enc_set_dclk_pw
+ */
+/* This function sets the DCLK output pattern width using
+ DCLKCTL register, PCKPW is [0, 63] that makes real width [1, 64] */
+void davinci_enc_set_dclk_pw(unsigned long width)
+{
+ if (width > 0x3F)
+ width = 0;
+
+ dispc_reg_merge(VENC_DCLKCTL, width, VENC_DCLKCTL_DCKPW);
+};
+EXPORT_SYMBOL(davinci_enc_set_dclk_pw);
+
+/*
+ * setting DLCD 480P PRGB mode
+ */
+static void davinci_enc_set_prgb(struct vid_enc_mode_info *mode_info)
+{
+ enableDigitalOutput(1);
+
+ dispc_reg_out(VENC_VIDCTL, 0x141);
+ dispc_reg_out(VENC_DCLKCTL, 0);
+ dispc_reg_out(VENC_DCLKPTN0, 0);
+
+ /* Set the OSD Divisor to 1. */
+ dispc_reg_out(VENC_OSDCLK0, 0);
+ dispc_reg_out(VENC_OSDCLK1, 1);
+ /* Clear composite mode register */
+ dispc_reg_out(VENC_CVBS, 0);
+
+ /* Set PINMUX1 to enable all outputs needed to support RGB666 */
+ if (cpu_is_davinci_dm355()) {
+ /* Enable the venc and dlcd clocks. */
+ dispc_reg_out(VENC_CLKCTL, 0x11);
+ //davinci_cfg_reg(DM355_VOUT_FIELD_G70);
+ //davinci_cfg_reg(DM355_VOUT_COUTL_EN);
+ //davinci_cfg_reg(DM355_VOUT_COUTH_EN);
+ } else if (cpu_is_davinci_dm365()) {
+ /* DM365 pinmux */
+ dispc_reg_out(VENC_CLKCTL, 0x11);
+ //davinci_cfg_reg(DM365_VOUT_FIELD_G81);
+ //davinci_cfg_reg(DM365_VOUT_COUTL_EN);
+ //davinci_cfg_reg(DM365_VOUT_COUTH_EN);
+ } else {
+ dispc_reg_out(VENC_CMPNT, 0x100);
+ //davinci_cfg_reg(DM644X_GPIO46_47);
+ //davinci_cfg_reg(DM644X_GPIO0);
+ //davinci_cfg_reg(DM644X_RGB666);
+ //davinci_cfg_reg(DM644X_LOEEN);
+ //davinci_cfg_reg(DM644X_GPIO3);
+ }
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ /* Set VIDCTL to select VCLKE = 1,
+ VCLKZ =0, SYDIR = 0 (set o/p), DOMD = 0 */
+ dispc_reg_merge(VENC_VIDCTL, 1 << VENC_VIDCTL_VCLKE_SHIFT,
+ VENC_VIDCTL_VCLKE);
+ dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_VCLKZ_SHIFT,
+ VENC_VIDCTL_VCLKZ);
+ dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_SYDIR_SHIFT,
+ VENC_VIDCTL_SYDIR);
+ dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_YCDIR_SHIFT,
+ VENC_VIDCTL_YCDIR);
+
+ dispc_reg_merge(VENC_DCLKCTL,
+ 1 << VENC_DCLKCTL_DCKEC_SHIFT, VENC_DCLKCTL_DCKEC);
+
+ dispc_reg_out(VENC_DCLKPTN0, 0x1);
+
+ davinci_enc_set_display_timing(mode_info);
+ dispc_reg_out(VENC_SYNCCTL,
+ (VENC_SYNCCTL_SYEV |
+ VENC_SYNCCTL_SYEH | VENC_SYNCCTL_HPL
+ | VENC_SYNCCTL_VPL));
+
+ /* Configure VMOD. No change in VENC bit */
+ dispc_reg_out(VENC_VMOD, 0x2011);
+ dispc_reg_out(VENC_LCDOUT, 0x1);
+
+ /*if (cpu_is_davinci_dm368()) {
+ mdelay(200);
+ gpio_set_value(82, 1);
+ }*/
+}
+
+/*
+ *
+ */
+static void davinci_enc_set_720p(struct vid_enc_mode_info *mode_info)
+{
+ /* Reset video encoder module */
+ dispc_reg_out(VENC_VMOD, 0);
+
+ enableDigitalOutput(1);
+
+ dispc_reg_out(VENC_VIDCTL, (VENC_VIDCTL_VCLKE | VENC_VIDCTL_VCLKP));
+ /* Setting DRGB Matrix registers back to default values */
+ dispc_reg_out(VENC_DRGBX0, 0x00000400);
+ dispc_reg_out(VENC_DRGBX1, 0x00000576);
+ dispc_reg_out(VENC_DRGBX2, 0x00000159);
+ dispc_reg_out(VENC_DRGBX3, 0x000002cb);
+ dispc_reg_out(VENC_DRGBX4, 0x000006ee);
+
+ /* Enable DCLOCK */
+ dispc_reg_out(VENC_DCLKCTL, VENC_DCLKCTL_DCKEC);
+ /* Set DCLOCK pattern */
+ dispc_reg_out(VENC_DCLKPTN0, 1);
+ dispc_reg_out(VENC_DCLKPTN1, 0);
+ dispc_reg_out(VENC_DCLKPTN2, 0);
+ dispc_reg_out(VENC_DCLKPTN3, 0);
+ dispc_reg_out(VENC_DCLKPTN0A, 2);
+ dispc_reg_out(VENC_DCLKPTN1A, 0);
+ dispc_reg_out(VENC_DCLKPTN2A, 0);
+ dispc_reg_out(VENC_DCLKPTN3A, 0);
+ dispc_reg_out(VENC_DCLKHS, 0);
+ dispc_reg_out(VENC_DCLKHSA, 1);
+ dispc_reg_out(VENC_DCLKHR, 0);
+ dispc_reg_out(VENC_DCLKVS, 0);
+ dispc_reg_out(VENC_DCLKVR, 0);
+ /* Set brightness start position and pulse width to zero */
+ dispc_reg_out(VENC_BRTS, 0);
+ dispc_reg_out(VENC_BRTW, 0);
+ /* Set LCD AC toggle interval and horizontal position to zero */
+ dispc_reg_out(VENC_ACCTL, 0);
+
+ /* Set PWM period and width to zero */
+ dispc_reg_out(VENC_PWMP, 0);
+ dispc_reg_out(VENC_PWMW, 0);
+
+ dispc_reg_out(VENC_CVBS, 0);
+ dispc_reg_out(VENC_CMPNT, 0);
+ /* turning on horizontal and vertical syncs */
+ dispc_reg_out(VENC_SYNCCTL, (VENC_SYNCCTL_SYEV | VENC_SYNCCTL_SYEH));
+ dispc_reg_out(VENC_OSDCLK0, 0);
+ dispc_reg_out(VENC_OSDCLK1, 1);
+ dispc_reg_out(VENC_OSDHADV, 0);
+
+ __raw_writel(0xa, IO_ADDRESS(SYS_VPSS_CLKCTL));
+ if (cpu_is_davinci_dm355()) {
+ dispc_reg_out(VENC_CLKCTL, 0x11);
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ //davinci_cfg_reg(DM355_VOUT_FIELD_G70);
+ //davinci_cfg_reg(DM355_VOUT_COUTL_EN);
+ //davinci_cfg_reg(DM355_VOUT_COUTH_EN);
+ } else {
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ //davinci_cfg_reg(DM644X_LOEEN);
+ //davinci_cfg_reg(DM644X_GPIO3);
+ }
+
+ /* Set VENC for non-standard timing */
+ davinci_enc_set_display_timing(mode_info);
+
+ dispc_reg_out(VENC_HSDLY, 0);
+ dispc_reg_out(VENC_VSDLY, 0);
+ dispc_reg_out(VENC_YCCCTL, 0);
+ dispc_reg_out(VENC_VSTARTA, 0);
+
+ /* Enable all VENC, non-standard timing mode, master timing, HD,
+ progressive
+ */
+ if (cpu_is_davinci_dm355()) {
+ dispc_reg_out(VENC_VMOD, (VENC_VMOD_VENC | VENC_VMOD_VMD));
+ } else {
+ dispc_reg_out(VENC_VMOD,
+ (VENC_VMOD_VENC | VENC_VMOD_VMD |
+ VENC_VMOD_HDMD));
+ }
+ dispc_reg_out(VENC_LCDOUT, 1);
+}
+
+/*
+ *
+ */
+static void davinci_enc_set_1080i(struct vid_enc_mode_info *mode_info)
+{
+ /* Reset video encoder module */
+ dispc_reg_out(VENC_VMOD, 0);
+
+ enableDigitalOutput(1);
+ dispc_reg_out(VENC_VIDCTL, (VENC_VIDCTL_VCLKE | VENC_VIDCTL_VCLKP));
+ /* Setting DRGB Matrix registers back to default values */
+ dispc_reg_out(VENC_DRGBX0, 0x00000400);
+ dispc_reg_out(VENC_DRGBX1, 0x00000576);
+ dispc_reg_out(VENC_DRGBX2, 0x00000159);
+ dispc_reg_out(VENC_DRGBX3, 0x000002cb);
+ dispc_reg_out(VENC_DRGBX4, 0x000006ee);
+ /* Enable DCLOCK */
+ dispc_reg_out(VENC_DCLKCTL, VENC_DCLKCTL_DCKEC);
+ /* Set DCLOCK pattern */
+ dispc_reg_out(VENC_DCLKPTN0, 1);
+ dispc_reg_out(VENC_DCLKPTN1, 0);
+ dispc_reg_out(VENC_DCLKPTN2, 0);
+ dispc_reg_out(VENC_DCLKPTN3, 0);
+ dispc_reg_out(VENC_DCLKPTN0A, 2);
+ dispc_reg_out(VENC_DCLKPTN1A, 0);
+ dispc_reg_out(VENC_DCLKPTN2A, 0);
+ dispc_reg_out(VENC_DCLKPTN3A, 0);
+ dispc_reg_out(VENC_DCLKHS, 0);
+ dispc_reg_out(VENC_DCLKHSA, 1);
+ dispc_reg_out(VENC_DCLKHR, 0);
+ dispc_reg_out(VENC_DCLKVS, 0);
+ dispc_reg_out(VENC_DCLKVR, 0);
+ /* Set brightness start position and pulse width to zero */
+ dispc_reg_out(VENC_BRTS, 0);
+ dispc_reg_out(VENC_BRTW, 0);
+ /* Set LCD AC toggle interval and horizontal position to zero */
+ dispc_reg_out(VENC_ACCTL, 0);
+
+ /* Set PWM period and width to zero */
+ dispc_reg_out(VENC_PWMP, 0);
+ dispc_reg_out(VENC_PWMW, 0);
+
+ dispc_reg_out(VENC_CVBS, 0);
+ dispc_reg_out(VENC_CMPNT, 0);
+ /* turning on horizontal and vertical syncs */
+ dispc_reg_out(VENC_SYNCCTL, (VENC_SYNCCTL_SYEV | VENC_SYNCCTL_SYEH));
+ dispc_reg_out(VENC_OSDCLK0, 0);
+ dispc_reg_out(VENC_OSDCLK1, 1);
+ dispc_reg_out(VENC_OSDHADV, 0);
+
+ dispc_reg_out(VENC_HSDLY, 0);
+ dispc_reg_out(VENC_VSDLY, 0);
+ dispc_reg_out(VENC_YCCCTL, 0);
+ dispc_reg_out(VENC_VSTARTA, 13);
+
+ __raw_writel(0xa, IO_ADDRESS(SYS_VPSS_CLKCTL));
+ if (cpu_is_davinci_dm355()) {
+ dispc_reg_out(VENC_CLKCTL, 0x11);
+
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ //davinci_cfg_reg(DM355_VOUT_FIELD);
+ //davinci_cfg_reg(DM355_VOUT_COUTL_EN);
+ //davinci_cfg_reg(DM355_VOUT_COUTH_EN);
+ } else {
+ osd_write_left_margin(mode_info->left_margin);
+ osd_write_upper_margin(mode_info->upper_margin);
+
+ //davinci_cfg_reg(DM644X_LFLDEN);
+ }
+
+ /* Set VENC for non-standard timing */
+ davinci_enc_set_display_timing(mode_info);
+
+ /* Enable all VENC, non-standard timing mode, master timing,
+ HD, interlaced
+ */
+ if (cpu_is_davinci_dm355()) {
+ dispc_reg_out(VENC_VMOD,
+ (VENC_VMOD_VENC | VENC_VMOD_VMD |
+ VENC_VMOD_NSIT));
+ } else {
+ dispc_reg_out(VENC_VMOD,
+ (VENC_VMOD_VENC | VENC_VMOD_VMD | VENC_VMOD_HDMD |
+ VENC_VMOD_NSIT));
+ }
+ dispc_reg_out(VENC_LCDOUT, 1);
+}
+
+static void davinci_enc_set_internal_hd(struct vid_enc_mode_info *mode_info)
+{
+ if (davinci_enc_select_venc_clock(VENC_74_25MHZ) < 0)
+ dev_err(venc->vdev, "PLL's doesnot yield required VENC clk\n");
+
+ //ths7303_setval(THS7303_FILTER_MODE_720P_1080I);
+ msleep(50);
+ __raw_writel(0x081141EF, IO_ADDRESS(DM3XX_VDAC_CONFIG));
+ return;
+}
+
+void davinci_enc_priv_setmode(struct vid_enc_device_mgr *mgr)
+{
+
+ switch (mgr->current_mode.if_type) {
+ case VID_ENC_IF_BT656:
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_YCBCR8 << VENC_VMOD_VDMD_SHIFT,
+ VENC_VMOD_VDMD);
+ dispc_reg_merge(VENC_YCCCTL, 1, 1);
+ break;
+ case VID_ENC_IF_BT1120:
+ break;
+ case VID_ENC_IF_YCC8:
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_YCBCR8 << VENC_VMOD_VDMD_SHIFT,
+ VENC_VMOD_VDMD);
+ break;
+ case VID_ENC_IF_YCC16:
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_YCBCR16 << VENC_VMOD_VDMD_SHIFT,
+ VENC_VMOD_VDMD);
+ break;
+ case VID_ENC_IF_SRGB:
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_RGB8 << VENC_VMOD_VDMD_SHIFT,
+ VENC_VMOD_VDMD);
+ break;
+ case VID_ENC_IF_PRGB:
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_RGB666 << VENC_VMOD_VDMD_SHIFT,
+ VENC_VMOD_VDMD);
+ break;
+ default:
+ break;
+ }
+
+ if (strcmp(mgr->current_mode.name, VID_ENC_STD_NTSC) == 0) {
+ davinci_enc_set_ntsc(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_NTSC_RGB) == 0) {
+ davinci_enc_set_ntsc_pal_rgb(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_PAL) == 0) {
+ davinci_enc_set_pal(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_PAL_RGB) == 0) {
+ davinci_enc_set_ntsc_pal_rgb(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_480P_60) == 0) {
+ davinci_enc_set_525p(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_576P_50) == 0) {
+ davinci_enc_set_625p(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_640x480) == 0 ||
+ strcmp(mgr->current_mode.name, VID_ENC_STD_640x400) == 0 ||
+ strcmp(mgr->current_mode.name, VID_ENC_STD_640x350) == 0 ||
+ strcmp(mgr->current_mode.name, VID_ENC_STD_480x272) == 0 ||
+ strcmp(mgr->current_mode.name, VID_ENC_STD_800x480) == 0) {
+ davinci_enc_set_prgb(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_720P_60) == 0) {
+ /* DM365 has built-in HD DAC; otherwise, they depend on
+ * THS8200
+ */
+ if (cpu_is_davinci_dm365()) {
+ dispc_reg_out(VENC_CLKCTL, 0x01);
+ enableDigitalOutput(0);
+ dispc_reg_out(VENC_OSDCLK0, 0);
+ dispc_reg_out(VENC_OSDCLK1, 1);
+ dispc_reg_merge(VENC_VMOD,
+ VENC_VMOD_VDMD_YCBCR8 <<
+ VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
+ dispc_reg_out(VENC_YCCCTL, 0x1);
+ dispc_reg_merge(VENC_VMOD, VENC_VMOD_VENC,
+ VENC_VMOD_VENC);
+ davinci_enc_set_internal_hd(&mgr->current_mode);
+ /* changed for 720P demo */
+ davinci_enc_set_basep(0, 0xf0, 10);
+ } else
+ davinci_enc_set_720p(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_1080I_30) == 0) {
+ if (cpu_is_davinci_dm365()) {
+ davinci_enc_set_internal_hd(&mgr->current_mode);
+ davinci_enc_set_basep(0, 0xd0, 10);
+ } else
+ davinci_enc_set_1080i(&mgr->current_mode);
+ } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_PRGB_DEFAULT) == 0) {
+ davinci_enc_set_prgb(&mgr->current_mode);
+ }
+
+ /* turn off ping-pong buffer and field inversion to fix
+ * the image shaking problem in 1080I mode. The problem i.d. by the
+ * DM6446 Advisory 1.3.8 is not seen in 1080I mode, but the ping-pong
+ * buffer workaround created a shaking problem.
+ */
+ if ((venc->invert_field) &&
+ (strcmp(mgr->current_mode.name, VID_ENC_STD_1080I_30) == 0))
+ davinci_disp_set_field_inversion(0);
+
+ return;
+}
+
+void davinci_enc_set_mode_platform(int channel, struct vid_enc_device_mgr *mgr)
+{
+
+ if (0 == mgr->current_mode.std) {
+ davinci_enc_set_display_timing(&mgr->current_mode);
+ return;
+ }
+ davinci_enc_priv_setmode(mgr);
+}
+
+EXPORT_SYMBOL(davinci_enc_set_mode_platform);
+
+int davinci_disp_is_second_field(void)
+{
+ return ((__raw_readl((volatile void *)(venc->venc_base + VENC_VSTAT)) & VENC_VSTAT_FIDST)
+ == VENC_VSTAT_FIDST);
+}
+EXPORT_SYMBOL(davinci_disp_is_second_field);
+
+static int davinci_venc_probe(struct platform_device *pdev)
+{
+ struct davinci_venc_platform_data *pdata = pdev->dev.platform_data;
+ struct resource *res;
+
+ venc->vdev = &pdev->dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(venc->vdev, "Unable to get VENC register address map\n");
+ return -ENODEV;
+ }
+ venc->venc_base_phys = res->start;
+ venc->venc_size = res->end - res->start + 1;
+ if (!request_mem_region(venc->venc_base_phys, venc->venc_size,
+ "davinci_venc")) {
+ dev_err(venc->vdev, "Unable to reserve VENC MMIO region\n");
+ return -ENODEV;
+ }
+ venc->venc_base = (unsigned long)ioremap_nocache(res->start,
+ venc->venc_size);
+ if (!venc->venc_base) {
+ dev_err(venc->vdev, "Unable to map VENC MMIO\n");
+ goto release_venc;
+ }
+
+ venc->invert_field = pdata->invert_field;
+
+ return 0;
+
+release_venc:
+ release_mem_region(venc->venc_base_phys, venc->venc_size);
+
+ return -ENODEV;
+}
+
+static int davinci_venc_remove(struct platform_device *pdev)
+{
+ if (venc->venc_base)
+ iounmap((void *)venc->venc_base);
+ release_mem_region(venc->venc_base_phys, venc->venc_size);
+
+ return 0;
+}
+
+static struct platform_driver davinci_venc_driver = {
+ .probe = davinci_venc_probe,
+ .remove = davinci_venc_remove,
+ .driver = {
+ .name = "davinci_venc",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int davinci_platform_init(void)
+{
+/* Sandeep */
+ display_cntl_base = ioremap(DM644X_DDR2_CNTL_BASE, 0x24);
+ if (!display_cntl_base) {
+ printk(KERN_ERR "Could not remap control registers\n");
+ return -EINVAL;
+ }
+ class_register(&davinci_system_class);
+
+ davinci_system_device = create_sysfs_files();
+ if (!davinci_system_device) {
+ printk(KERN_ERR "Could not create davinci system sysfs\n");
+ iounmap(display_cntl_base);
+ return -EINVAL;
+ }
+
+ /* Register the driver */
+ if (platform_driver_register(&davinci_venc_driver)) {
+ printk(KERN_ERR "Unable to register davinci platform driver\n");
+ return -ENODEV;
+ }
+
+
+ return 0;
+}
+
+static void davinci_platform_exit(void)
+{
+/* Sandeep */
+ remove_sysfs_files(davinci_system_device);
+ class_unregister(&davinci_system_class);
+ iounmap(display_cntl_base);
+
+ platform_driver_unregister(&davinci_venc_driver);
+
+ return;
+}
+
+subsys_initcall(davinci_platform_init);
+module_exit(davinci_platform_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("DaVinci Platform Driver");
+MODULE_AUTHOR("Texas Instruments");
diff --git a/drivers/media/platform/davinci/dm365_a3_hw.c b/drivers/media/platform/davinci/dm365_a3_hw.c
new file mode 100644
index 00000000..0b94f591
--- /dev/null
+++ b/drivers/media/platform/davinci/dm365_a3_hw.c
@@ -0,0 +1,416 @@
+/* *
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <media/davinci/dm365_af.h>
+#include <media/davinci/dm365_aew.h>
+#include <media/davinci/dm365_a3_hw.h>
+#include <linux/export.h>
+#include <linux/module.h>
+/* 3A hardware module configuration */
+struct a3_config {
+ /* lock for write protection */
+ struct mutex lock;
+ /* base address */
+ void __iomem *base;
+};
+
+/* H3A module configuration */
+static struct a3_config a3_cfg;
+
+/* register access routines */
+static inline u32 regr(unsigned int offset)
+{
+ return __raw_readl(a3_cfg.base + offset);
+}
+
+static inline u32 regw(u32 val, unsigned int offset)
+{
+ __raw_writel(val, (a3_cfg.base + offset));
+ return val;
+}
+
+/* Function to set register */
+int af_register_setup(struct device *dev, struct af_device *af_dev)
+{
+ unsigned int utemp = 0;
+ unsigned int address = 0;
+ int index;
+
+ /* Lock resource since this register is written by
+ * both the AF and AEW drivers
+ */
+ mutex_lock(&a3_cfg.lock);
+ /* Configure Hardware Registers */
+ /* Set PCR Register */
+ utemp = regr(AFPCR); /* Read PCR Register */
+
+ /*Set Accumulator Mode */
+ utemp &= ~FVMODE;
+ if (af_dev->config->mode == ACCUMULATOR_PEAK)
+ utemp |= FVMODE;
+ /* Set A-law */
+ utemp &= ~AF_ALAW_EN;
+ if (af_dev->config->alaw_enable == H3A_AF_ENABLE)
+ utemp |= AF_ALAW_EN;
+
+ /* Set HFV only or HFV and VFV */
+ utemp &= ~AF_VF_EN;
+ if (af_dev->config->fv_sel == AF_HFV_AND_VFV)
+ utemp |= AF_VF_EN;
+ /* Set RGB Position */
+ utemp &= ~RGBPOS;
+ utemp |= (af_dev->config->rgb_pos) << AF_RGBPOS_SHIFT;
+
+ utemp &= ~AF_MED_EN;
+ /*HMF Configurations */
+ if (af_dev->config->hmf_config.enable == H3A_AF_ENABLE) {
+ /* Enable HMF */
+ utemp |= AF_MED_EN;
+
+ /* Set Median Threshold */
+ utemp &= ~MED_TH;
+ utemp |=
+ (((af_dev->config->hmf_config.threshold)
+ << AF_MED_TH_SHIFT) & MED_TH);
+ }
+ /* Set PCR Register */
+ regw(utemp , AFPCR);
+ mutex_unlock(&a3_cfg.lock);
+
+ /* Configure AFPAX1 */
+ /*Paxel parameter configuration */
+ /*Set Width in AFPAX1 Register */
+ utemp = (SET_VAL(af_dev->config->paxel_config.width)) <<
+ AF_PAXW_SHIFT;
+
+ /* Set height in AFPAX1 */
+ utemp &= ~PAXH;
+ utemp |= (SET_VAL(af_dev->config->paxel_config.height));
+
+ regw(utemp , AFPAX1);
+
+ /* Configure AFPAX2 Register */
+ /* Set Column Increment in AFPAX2 Register */
+ utemp = 0;
+ utemp &= ~AFINCH;
+ utemp |=
+ (SET_VAL(af_dev->config->paxel_config.column_incr)) <<
+ AF_COLUMN_INCR_SHIFT;
+
+ /* Set Line Increment in AFPAX2 Register */
+ utemp &= ~AFINCV;
+ utemp |=
+ (SET_VAL(af_dev->config->paxel_config.line_incr)) <<
+ AF_LINE_INCR_SHIFT;
+
+ /* Set Vertical Count */
+ utemp &= ~PAXVC;
+ utemp |= (af_dev->config->paxel_config.vt_cnt - 1) << AF_VT_COUNT_SHIFT;
+ /* Set Horizontal Count */
+ utemp &= ~PAXHC;
+ utemp |= (af_dev->config->paxel_config.hz_cnt - 1);
+ regw(utemp, AFPAX2);
+
+ /* Configure PAXSTART Register */
+ /*Configure Horizontal Start */
+ utemp = 0;
+ utemp &= ~PAXSH;
+ utemp |=
+ (af_dev->config->paxel_config.hz_start) << AF_HZ_START_SHIFT;
+ /* Configure Vertical Start */
+ utemp &= ~PAXSV;
+ utemp |= af_dev->config->paxel_config.vt_start;
+ regw(utemp , AFPAXSTART);
+
+ /*SetIIRSH Register */
+ regw(af_dev->config->iir_config.hz_start_pos, AFIIRSH);
+
+ /* Set IIR Filter0 Coefficients */
+ address = AFCOEF010;
+ for (index = 0; index < AF_NUMBER_OF_HFV_COEF; index += 2) {
+ utemp = af_dev->config->iir_config.coeff_set0[index] &
+ COEF_MASK0;
+ if (index < AF_NUMBER_OF_HFV_COEF-1) {
+ utemp |=
+ (((af_dev->config->iir_config.coeff_set0[index + 1]) <<
+ AF_COEF_SHIFT) & COEF_MASK1);
+ }
+ regw(utemp, address);
+ dev_dbg(dev, "\n COEF0 %x", regr(address));
+ address = address + AF_OFFSET;
+ }
+
+ /* Set IIR Filter1 Coefficients */
+ address = AFCOEF110;
+ for (index = 0; index < AF_NUMBER_OF_HFV_COEF; index += 2) {
+ utemp = af_dev->config->iir_config.coeff_set1[index] &
+ COEF_MASK0;
+ if (index < AF_NUMBER_OF_HFV_COEF-1) {
+ utemp |=
+ (((af_dev->config->iir_config.coeff_set1[index + 1]) <<
+ AF_COEF_SHIFT) & COEF_MASK1);
+ }
+ regw(utemp, address);
+ dev_dbg(dev, "\n COEF0 %x", regr(address));
+ address = address + AF_OFFSET;
+ }
+
+ /* HFV thresholds for FIR 1 & 2 */
+ utemp = af_dev->config->fir_config.hfv_thr1 & HFV_THR0_MASK;
+ utemp |= ((af_dev->config->fir_config.hfv_thr2 << HFV_THR2_SHIFT) &
+ HFV_THR2_MASK);
+ regw(utemp, AF_HFV_THR);
+
+ /* VFV coefficients and thresholds */
+ utemp = af_dev->config->fir_config.coeff_1[0] & VFV_COEF_MASK0;
+ utemp |= ((af_dev->config->fir_config.coeff_1[1] << 8) &
+ VFV_COEF_MASK1);
+ utemp |= ((af_dev->config->fir_config.coeff_1[2] << 16) &
+ VFV_COEF_MASK2);
+ utemp |= ((af_dev->config->fir_config.coeff_1[3] << 24) &
+ VFV_COEF_MASK3);
+ regw(utemp, AF_VFV_CFG1);
+
+ utemp = af_dev->config->fir_config.coeff_1[4] & VFV_COEF_MASK0;
+ utemp |= ((af_dev->config->fir_config.vfv_thr1 << VFV_THR_SHIFT) &
+ VFV_THR_MASK);
+ regw(utemp, AF_VFV_CFG2);
+
+ /* VFV coefficients and thresholds */
+ utemp = af_dev->config->fir_config.coeff_2[0] & VFV_COEF_MASK0;
+ utemp |= ((af_dev->config->fir_config.coeff_2[1] << 8) &
+ VFV_COEF_MASK1);
+ utemp |= ((af_dev->config->fir_config.coeff_2[2] << 16) &
+ VFV_COEF_MASK2);
+ utemp |= ((af_dev->config->fir_config.coeff_2[3] << 24) &
+ VFV_COEF_MASK3);
+ regw(utemp, AF_VFV_CFG3);
+
+ utemp = af_dev->config->fir_config.coeff_2[4] & VFV_COEF_MASK0;
+ utemp |= ((af_dev->config->fir_config.vfv_thr2 << VFV_THR_SHIFT) &
+ VFV_THR_MASK);
+ regw(utemp, AF_VFV_CFG4);
+ /* Set AFBUFST to Current buffer Physical Address */
+ regw((unsigned int)(virt_to_phys(af_dev->buff_curr)), AFBUFST);
+
+ return 0;
+}
+EXPORT_SYMBOL(af_register_setup);
+
+inline u32 af_get_hw_state(void)
+{
+ return (regr(AFPCR) & AF_BUSYAF) >> AF_BUSYAF_SHIFT;
+}
+EXPORT_SYMBOL(af_get_hw_state);
+
+inline u32 aew_get_hw_state(void)
+{
+ return (regr(AEWPCR) & AEW_BUSYAEWB) >> AEW_BUSYAEW_SHIFT;
+}
+EXPORT_SYMBOL(aew_get_hw_state);
+
+inline u32 af_get_enable(void)
+{
+ return regr(AFPCR) & AF_EN;
+}
+EXPORT_SYMBOL(af_get_enable);
+
+inline u32 aew_get_enable(void)
+{
+ return (regr(AEWPCR) & AEW_EN) >> AEW_EN_SHIFT;
+}
+EXPORT_SYMBOL(aew_get_enable);
+
+/* Function to Enable/Disable AF Engine */
+inline void af_engine_setup(struct device *dev, int enable)
+{
+ unsigned int pcr;
+
+ mutex_lock(&a3_cfg.lock);
+ pcr = regr(AFPCR);
+ dev_dbg(dev, "\nEngine Setup value before PCR : %x", pcr);
+
+ /* Set AF_EN bit in PCR Register */
+ if (enable)
+ pcr |= AF_EN;
+ else
+ pcr &= ~AF_EN;
+
+ regw(pcr, AFPCR);
+ mutex_unlock(&a3_cfg.lock);
+
+ dev_dbg(dev, "\n Engine Setup value after PCR : %x", pcr);
+}
+EXPORT_SYMBOL(af_engine_setup);
+
+/* Function to set address */
+inline void af_set_address(struct device *dev, unsigned long address)
+{
+ regw((address & ~0x3F), AFBUFST);
+}
+EXPORT_SYMBOL(af_set_address);
+
+/* Function to set hardware configuration registers */
+int aew_register_setup(struct device *dev, struct aew_device *aew_dev)
+{
+ unsigned utemp;
+
+ mutex_lock(&a3_cfg.lock);
+ /* Set up the registers */
+ utemp = regr(AEWPCR);
+
+ /* Enable A Law */
+ if (aew_dev->config->alaw_enable == H3A_AEW_ENABLE)
+ utemp |= AEW_ALAW_EN;
+ else
+ utemp &= ~AEW_ALAW_EN;
+
+ utemp &= ~AEW_MED_EN;
+ /*HMF Configurations */
+ if (aew_dev->config->hmf_config.enable == H3A_AEW_ENABLE) {
+ /* Enable HMF */
+ utemp |= AEW_MED_EN;
+ /* Set Median Threshold */
+ utemp &= ~MED_TH;
+ utemp |=
+ (((aew_dev->config->hmf_config.threshold) <<
+ AF_MED_TH_SHIFT) & MED_TH);
+ }
+
+ /*Configure Saturation limit */
+ utemp &= ~AVE2LMT;
+ utemp |= aew_dev->config->saturation_limit << AEW_AVE2LMT_SHIFT;
+ regw(utemp, AEWPCR);
+ mutex_unlock(&a3_cfg.lock);
+
+ /*Window parameter configuration */
+ /* Configure Window Width in AEWWIN1 register */
+ utemp =
+ ((SET_VAL(aew_dev->config->window_config.height)) <<
+ AEW_WINH_SHIFT);
+
+ /* Configure Window height in AEWWIN1 register */
+ utemp |=
+ ((SET_VAL(aew_dev->config->window_config.width)) <<
+ AEW_WINW_SHIFT);
+
+ /* Configure Window vertical count in AEWWIN2 register */
+ utemp |=
+ ((aew_dev->config->window_config).vt_cnt - 1) << AEW_VT_COUNT_SHIFT;
+
+ /* Configure Window horizontal count in AEWWIN1 register */
+ utemp |= ((aew_dev->config->window_config).hz_cnt - 1);
+
+ /* Configure Window vertical start in AEWWIN1 register */
+ regw(utemp, AEWWIN1);
+
+ /*Window Start parameter configuration */
+
+ utemp =
+ (aew_dev->config->window_config).vt_start << AEW_VT_START_SHIFT;
+
+ /* Configure Window horizontal start in AEWWIN2 register */
+ utemp &= ~WINSH;
+ utemp |= (aew_dev->config->window_config).hz_start;
+ regw(utemp, AEWINSTART);
+
+ /*Window Line Increment configuration */
+ /*Configure vertical line increment in AEWSUBWIN */
+ utemp =
+ (SET_VAL(aew_dev->config->window_config.
+ vt_line_incr) << AEW_LINE_INCR_SHIFT);
+
+ /* Configuring Horizontal Line increment in AEWSUBWIN */
+ utemp &= ~AEWINCH;
+ utemp |= (SET_VAL(aew_dev->config->window_config.hz_line_incr));
+
+ regw(utemp, AEWSUBWIN);
+
+ /* Black Window Configuration */
+ /* Configure vertical start and height in AEWWINBLK */
+ utemp =
+ (aew_dev->config->blackwindow_config).
+ vt_start << AEW_BLKWIN_VT_START_SHIFT;
+
+ /* Configure height in Black window */
+ utemp &= ~BLKWINH;
+ utemp |= (SET_VAL(aew_dev->config->blackwindow_config.height));
+ regw(utemp, AEWINBLK);
+
+ /* AE/AWB engine configuration */
+ utemp = aew_dev->config->sum_shift & AEW_SUMSHFT_MASK;
+ utemp |= (((aew_dev->config->out_format) << AEFMT_SHFT) & AEFMT_MASK);
+ regw(utemp, AEW_CFG);
+
+ /* Set AFBUFST to Current buffer Physical Address */
+ regw((unsigned int)(virt_to_phys(aew_dev->buff_curr)), AEWBUFST);
+
+ return 0;
+}
+EXPORT_SYMBOL(aew_register_setup);
+
+/* Function to enable/ disable AEW Engine */
+inline void aew_engine_setup(struct device *dev, int value)
+{
+ unsigned int pcr;
+
+ dev_dbg(dev, "\nAEW_REG(PCR) Before Setting %x", regr(AEWPCR));
+
+ mutex_lock(&a3_cfg.lock);
+ /* Read Pcr Register */
+ pcr = regr(AEWPCR);
+ pcr &= ~AEW_EN;
+ pcr |= (value << AEW_EN_SHIFT);
+
+ /*Set AF_EN bit in PCR Register */
+ regw(pcr, AEWPCR);
+ mutex_unlock(&a3_cfg.lock);
+
+ dev_dbg(dev, "\nAfter Setting %d : PCR VALUE %x", value,
+ regr(AEWPCR));
+
+}
+EXPORT_SYMBOL(aew_engine_setup);
+
+/* Function used to set adddress */
+inline void aew_set_address(struct device *dev, unsigned long address)
+{
+ regw((address & ~0x3F), AEWBUFST);
+}
+EXPORT_SYMBOL(aew_set_address);
+
+static int dm365_afew_hw_init(void)
+{
+ printk(KERN_NOTICE "dm365_afew_hw_init\n");
+ mutex_init(&a3_cfg.lock);
+ a3_cfg.base = ioremap(DM365_A3_HW_ADDR, DM365_A3_HW_ADDR_SIZE);
+ if (!a3_cfg.base) {
+ printk(KERN_ERR "Unable to ioremap 3A registers\n");
+ return -EINVAL;
+ }
+ regw(0, LINE_START);
+ return 0;
+}
+
+static void dm365_afew_hw_exit(void)
+{
+ printk(KERN_NOTICE "dm365_afew_hw_exit\n");
+ iounmap(a3_cfg.base);
+}
+subsys_initcall(dm365_afew_hw_init);
+module_exit(dm365_afew_hw_exit);
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/dm365_aew.c b/drivers/media/platform/davinci/dm365_aew.c
new file mode 100644
index 00000000..afa78267
--- /dev/null
+++ b/drivers/media/platform/davinci/dm365_aew.c
@@ -0,0 +1,844 @@
+/* *
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/major.h>
+#include <linux/sched.h>
+#include <media/v4l2-device.h>
+#include <media/davinci/dm365_a3_hw.h>
+#include <media/davinci/vpss.h>
+
+/* Global structure */
+static struct class *aew_class;
+struct aew_device *aew_dev_configptr;
+struct device *aewdev;
+/* device structure to make entry in device*/
+static dev_t dev;
+
+/* For registeration of charatcer device*/
+static struct cdev c_dev;
+
+int aew_validate_parameters(void)
+{
+ int result = 0;
+
+ /* Check horizontal Count */
+ if ((aew_dev_configptr->config->window_config.hz_cnt <
+ AEW_WINDOW_HORIZONTAL_COUNT_MIN)
+ || (aew_dev_configptr->config->window_config.hz_cnt >
+ AEW_WINDOW_HORIZONTAL_COUNT_MAX)) {
+ dev_err(aewdev, "\n Horizontal Count is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Vertical Count */
+ if ((aew_dev_configptr->config->window_config.vt_cnt <
+ AEW_WINDOW_VERTICAL_COUNT_MIN)
+ || (aew_dev_configptr->config->window_config.vt_cnt >
+ AEW_WINDOW_VERTICAL_COUNT_MAX)) {
+ dev_err(aewdev, "\n Vertical Count is incorrect");
+ result = -EINVAL;
+ }
+ /* Check line increment */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(aew_dev_configptr->config->window_config.
+ hz_line_incr))
+ || (aew_dev_configptr->config->window_config.hz_line_incr <
+ AEW_HZ_LINEINCR_MIN)
+ || (aew_dev_configptr->config->window_config.hz_line_incr >
+ AEW_HZ_LINEINCR_MAX)) {
+ dev_err(aewdev, "\n Invalid Parameters");
+ dev_err(aewdev, "\n Horizontal Line Increment is incorrect");
+ result = -EINVAL;
+ }
+ /* Check line increment */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(aew_dev_configptr->config->window_config.
+ vt_line_incr))
+ || (aew_dev_configptr->config->window_config.vt_line_incr <
+ AEW_VT_LINEINCR_MIN)
+ || (aew_dev_configptr->config->window_config.vt_line_incr >
+ AEW_VT_LINEINCR_MAX)) {
+ dev_err(aewdev, "\n Invalid Parameters");
+ dev_err(aewdev, "\n Vertical Line Increment is incorrect");
+ result = -EINVAL;
+ }
+ /* Check width */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(aew_dev_configptr->config->window_config.width))
+ || (aew_dev_configptr->config->window_config.width <
+ AEW_WIDTH_MIN)
+ || (aew_dev_configptr->config->window_config.width >
+ AEW_WIDTH_MAX)) {
+ dev_err(aewdev, "\n Width is incorrect");
+
+ result = -EINVAL;
+ }
+ /* Check Height */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(aew_dev_configptr->config->window_config.height))
+ || (aew_dev_configptr->config->window_config.height <
+ AEW_HEIGHT_MIN)
+ || (aew_dev_configptr->config->window_config.height >
+ AEW_HEIGHT_MAX)) {
+ dev_err(aewdev, "\n height incorrect");
+ result = -EINVAL;
+ }
+ /* Check Horizontal Start */
+ if ((aew_dev_configptr->config->window_config.hz_start <
+ AEW_HZSTART_MIN)
+ || (aew_dev_configptr->config->window_config.hz_start >
+ AEW_HZSTART_MAX)) {
+ dev_err(aewdev, "\n horizontal start is incorrect");
+ result = -EINVAL;
+ }
+ if ((aew_dev_configptr->config->window_config.vt_start >
+ AEW_VTSTART_MAX)) {
+ dev_err(aewdev, "\n Vertical start is incorrect");
+ result = -EINVAL;
+ }
+ if ((aew_dev_configptr->config->alaw_enable > H3A_AEW_ENABLE)
+ || (aew_dev_configptr->config->alaw_enable < H3A_AEW_DISABLE)) {
+ dev_err(aewdev, "\n A Law setting is incorrect");
+ result = -EINVAL;
+ }
+ if (aew_dev_configptr->config->saturation_limit > AEW_AVELMT_MAX) {
+ dev_err(aewdev, "\n Saturation Limit is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Black Window Height */
+ if (NOT_EVEN ==
+ CHECK_EVEN(aew_dev_configptr->config->blackwindow_config.height)
+ || (aew_dev_configptr->config->blackwindow_config.height <
+ AEW_BLKWINHEIGHT_MIN)
+ || (aew_dev_configptr->config->blackwindow_config.height >
+ AEW_BLKWINHEIGHT_MAX)) {
+ dev_err(aewdev, "\n Black Window height incorrect");
+ result = -EINVAL;
+ }
+ /* Check Black Window Height */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(aew_dev_configptr->config->blackwindow_config.
+ height))
+ || (aew_dev_configptr->config->blackwindow_config.vt_start <
+ AEW_BLKWINVTSTART_MIN)
+ || (aew_dev_configptr->config->blackwindow_config.vt_start >
+ AEW_BLKWINVTSTART_MAX)) {
+ dev_err(aewdev, "\n Black Window vertical Start is incorrect");
+ result = -EINVAL;
+ }
+
+ if (aew_dev_configptr->config->out_format < AEW_OUT_SUM_OF_SQUARES ||
+ aew_dev_configptr->config->out_format > AEW_OUT_SUM_ONLY) {
+ dev_err(aewdev, "\n Invalid out_format");
+ result = -EINVAL;
+ }
+
+ if (aew_dev_configptr->config->sum_shift > AEW_SUMSHIFT_MAX) {
+ dev_err(aewdev, "\n sum_shift param is invalid, max = %d",
+ AEW_SUMSHIFT_MAX);
+ result = -EINVAL;
+ }
+
+ return result;
+}
+
+/* inline function to free reserver pages */
+inline void aew_free_pages(unsigned long addr, unsigned long bufsize)
+{
+ unsigned long tempaddr;
+ unsigned long size;
+ tempaddr = addr;
+ if (!addr)
+ return;
+ size = PAGE_SIZE << (get_order(bufsize));
+ while (size > 0) {
+ ClearPageReserved(virt_to_page(addr));
+ addr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ free_pages(tempaddr, get_order(bufsize));
+}
+
+/* Function to perform hardware Configuration */
+int aew_hardware_setup(void)
+{
+ int result;
+ /* Size for buffer in bytes */
+ int buff_size = 0;
+ unsigned long adr;
+ unsigned long size;
+ unsigned int busyaew;
+ int window_count;
+ /* Get the value of PCR register */
+ busyaew = aew_get_hw_state();
+
+ /* If H3A Engine is busy then return */
+ if (busyaew == 1) {
+ dev_err(aewdev, "\n Error : AEW Engine is busy");
+ return -EBUSY;
+ }
+
+ result = aew_validate_parameters();
+ dev_dbg(aewdev, "Result = %d\n", result);
+ if (result < 0) {
+ dev_err(aewdev, "Error : Parameters are incorrect \n");
+ return result;
+ }
+
+ /* Deallocate the previously allocated buffers */
+ if (aew_dev_configptr->buff_old)
+ aew_free_pages((unsigned long)aew_dev_configptr->buff_old,
+ aew_dev_configptr->size_window);
+
+ if (aew_dev_configptr->buff_curr)
+ aew_free_pages((unsigned long)aew_dev_configptr->
+ buff_curr, aew_dev_configptr->size_window);
+
+ if (aew_dev_configptr->buff_app)
+ aew_free_pages((unsigned long)aew_dev_configptr->
+ buff_app, aew_dev_configptr->size_window);
+
+ /*
+ * Allocat the buffers as per the new buffer size
+ * Allocate memory for old buffer
+ */
+ /*if (aew_dev_configptr->config->out_format == AEW_OUT_SUM_ONLY)
+ buff_size = (aew_dev_configptr->config->window_config.hz_cnt) *
+ (aew_dev_configptr->config->window_config.vt_cnt) *
+ AEW_WINDOW_SIZE_SUM_ONLY;
+ else
+ buff_size = (aew_dev_configptr->config->window_config.hz_cnt) *
+ (aew_dev_configptr->config->window_config.vt_cnt) *
+ AEW_WINDOW_SIZE;
+ */
+
+ window_count= (aew_dev_configptr->config->window_config.hz_cnt) *
+ (aew_dev_configptr->config->window_config.vt_cnt + 1);
+ if (aew_dev_configptr->config->out_format == AEW_OUT_SUM_ONLY){
+ int w=0, cb=0, ec=0, ext=0, win8=0, hor_cont=0;
+ while (w < (window_count)) {
+ if (win8 == 8){
+ cb++;
+ win8 = 0;
+ ext++;
+ } else {
+ if (hor_cont == aew_dev_configptr->config->window_config.hz_cnt){
+ if (((ext) % 2) != 0){
+ ec++;
+ }
+ ext=0;
+ hor_cont=0;
+ } else{
+ w++;
+ win8++;
+ hor_cont++;
+ ext++;
+ }
+ }
+ }
+ buff_size = (cb + 1 + ec + window_count)* AEW_WINDOW_SIZE_SUM_ONLY;
+
+ }else
+ buff_size = ((aew_dev_configptr->config->window_config.hz_cnt) *
+ (aew_dev_configptr->config->window_config.vt_cnt + 1) +
+ (aew_dev_configptr->config->window_config.hz_cnt) *
+ (aew_dev_configptr->config->window_config.vt_cnt + 1) *
+ 1/8 )*AEW_WINDOW_SIZE;
+
+ aew_dev_configptr->buff_old =
+ (void *)__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order(buff_size));
+
+ if (aew_dev_configptr->buff_old == NULL)
+ return -ENOMEM;
+
+ /* Make pges reserved so that they will be swapped out */
+ adr = (unsigned long)aew_dev_configptr->buff_old;
+ size = PAGE_SIZE << (get_order(buff_size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers
+ * are never swapped out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ /* Allocate memory for current buffer */
+ aew_dev_configptr->buff_curr =
+ (void *)__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order(buff_size));
+
+ if (aew_dev_configptr->buff_curr == NULL) {
+
+ /*Free all buffer that are allocated */
+ if (aew_dev_configptr->buff_old)
+ aew_free_pages((unsigned long)aew_dev_configptr->
+ buff_old, buff_size);
+ return -ENOMEM;
+ }
+
+ /* Make pges reserved so that they will be swapped out */
+ adr = (unsigned long)aew_dev_configptr->buff_curr;
+ size = PAGE_SIZE << (get_order(buff_size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers
+ * are never swapped out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ /* Allocate memory for application buffer */
+ aew_dev_configptr->buff_app =
+ (void *)__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order(buff_size));
+
+ if (aew_dev_configptr->buff_app == NULL) {
+ /* Free all buffer that were allocated previously */
+ if (aew_dev_configptr->buff_old)
+ aew_free_pages((unsigned long)aew_dev_configptr->
+ buff_old, buff_size);
+ if (aew_dev_configptr->buff_curr)
+ aew_free_pages((unsigned long)aew_dev_configptr->
+ buff_curr, buff_size);
+ return -ENOMEM;
+ }
+
+ /* Make pages reserved so that they will be swapped out */
+ adr = (unsigned long)aew_dev_configptr->buff_app;
+ size = PAGE_SIZE << (get_order(buff_size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers
+ * are never swapped out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ /* Set the registers */
+ aew_register_setup(aewdev, aew_dev_configptr);
+ aew_dev_configptr->size_window = buff_size;
+ aew_dev_configptr->aew_config = H3A_AEW_CONFIG;
+
+ return 0;
+}
+
+/* This Function is called when driver is opened */
+static int aew_open(struct inode *inode, struct file *filp)
+{
+ /* Return if Device is in use (Single Channel Support is provided) */
+ if (aew_dev_configptr->in_use == AEW_IN_USE)
+ return -EBUSY;
+
+ /* Set the aew_dev_configptr structure */
+ aew_dev_configptr->config = NULL;
+
+ /* Allocate memory for configuration structure of this channel */
+ aew_dev_configptr->config = (struct aew_configuration *)
+ kmalloc(sizeof(struct aew_configuration), GFP_KERNEL);
+
+ if (aew_dev_configptr->config == NULL) {
+ dev_err(aewdev, "Error : Kmalloc fail\n");
+ return -ENOMEM;
+ }
+
+ /* Initiaze the wait queue */
+ init_waitqueue_head(&(aew_dev_configptr->aew_wait_queue));
+
+ /* Device is in use */
+ aew_dev_configptr->in_use = AEW_IN_USE;
+
+ /* No Hardware Set up done */
+ aew_dev_configptr->aew_config = H3A_AEW_CONFIG_NOT_DONE;
+
+ /* No statistics are available */
+ aew_dev_configptr->buffer_filled = 0;
+
+ /* Set Window Size to 0 */
+ aew_dev_configptr->size_window = 0;
+
+ /* Initialize the mutex */
+ mutex_init(&(aew_dev_configptr->read_blocked));
+
+ return 0;
+}
+
+static void aew_platform_release(struct device *device)
+{
+ /* This is called when the reference count goes to zero */
+}
+
+static int aew_probe(struct device *device)
+{
+ aewdev = device;
+ return 0;
+}
+
+static int aew_remove(struct device *device)
+{
+ return 0;
+}
+
+/* This Function is called when driver is closed */
+static int aew_release(struct inode *inode, struct file *filp)
+{
+ aew_engine_setup(aewdev, 0);
+ /* The Application has closed device so device is not in use */
+ aew_dev_configptr->in_use = AEW_NOT_IN_USE;
+
+ /* Release memory for configuration structure of this channel */
+ kfree(aew_dev_configptr->config);
+
+ /* Free Old Buffer */
+ if (aew_dev_configptr->buff_old)
+ aew_free_pages((unsigned long)aew_dev_configptr->buff_old,
+ aew_dev_configptr->size_window);
+
+ /* Free Current Buffer */
+ if (aew_dev_configptr->buff_curr)
+ aew_free_pages((unsigned long)aew_dev_configptr->
+ buff_curr, aew_dev_configptr->size_window);
+
+ /* Free Application Buffer */
+ if (aew_dev_configptr->buff_app)
+ aew_free_pages((unsigned long)aew_dev_configptr->buff_app,
+ aew_dev_configptr->size_window);
+
+ aew_dev_configptr->buff_old = NULL;
+ aew_dev_configptr->buff_curr = NULL;
+ aew_dev_configptr->config = NULL;
+ aew_dev_configptr->buff_app = NULL;
+
+ return 0;
+}
+
+/*
+ * This function will process IOCTL commands sent by the application and
+ * control the devices IO operations.
+ */
+static long aew_ioctl(struct file *filep,
+ unsigned int cmd, unsigned long arg)
+{
+ /* Stores Previous Configurations */
+ struct aew_configuration aewconfig = *(aew_dev_configptr->config);
+ int result = 0;
+
+ /* Decrement the semaphore */
+ result = mutex_lock_interruptible(&aew_dev_configptr->read_blocked);
+ if (result)
+ return result;
+
+ /*
+ * Extract the type and number bitfields, and don't decode wrong cmds:
+ * verify the magic number
+ */
+ if (_IOC_TYPE(cmd) != AEW_MAGIC_NO) {
+ mutex_unlock(&aew_dev_configptr->read_blocked);
+ return -ENOTTY;
+ }
+
+ /* verify the command number */
+ if (_IOC_NR(cmd) > AEW_IOC_MAXNR) {
+ /* Release mutex in case of fault */
+ mutex_unlock(&aew_dev_configptr->read_blocked);
+ return -ENOTTY;
+ }
+
+ /* check for the permission of the operation */
+ if (_IOC_DIR(cmd) & _IOC_READ)
+ result =
+ !access_ok(VERIFY_WRITE, (void __user *)arg,
+ _IOC_SIZE(cmd));
+ else if (_IOC_DIR(cmd) & _IOC_WRITE)
+ result =
+ !access_ok(VERIFY_READ, (void __user *)arg, _IOC_SIZE(cmd));
+
+ if (result) {
+ /* Release mutex in case of fault */
+ mutex_unlock(&aew_dev_configptr->read_blocked);
+ return -EFAULT;
+ }
+
+ /* Switch according to IOCTL command */
+ switch (cmd) {
+ /*
+ * This ioctl is used to perform hardware set up
+ * and will set all the registers for AF engine
+ */
+ case AEW_S_PARAM:
+ /* Copy config structure passed by user */
+ if (copy_from_user(aew_dev_configptr->config,
+ (struct aew_configuration *)arg,
+ sizeof(struct aew_configuration))) {
+ *(aew_dev_configptr->config) = aewconfig;
+ mutex_unlock(&aew_dev_configptr->read_blocked);
+ return -EFAULT;
+ }
+ /* Call aew_hardware_setup to perform register configuration */
+ result = aew_hardware_setup();
+ if (!result) {
+ /*
+ * Hardware Set up is successful
+ * Return the no of bytes required for buffer
+ */
+ result = aew_dev_configptr->size_window;
+ } else {
+ /* Change Configuration Structure to original */
+ *(aew_dev_configptr->config) = aewconfig;
+ dev_err(aewdev, "Error : AEW_S_PARAM failed\n");
+ }
+ break;
+
+ /* This ioctl is used to return parameters in user space */
+ case AEW_G_PARAM:
+ if (aew_dev_configptr->aew_config == H3A_AEW_CONFIG) {
+ if (copy_to_user
+ ((struct aew_configuration *)arg,
+ aew_dev_configptr->config,
+ sizeof(struct aew_configuration))) {
+ mutex_unlock(&aew_dev_configptr->read_blocked);
+ return -EFAULT;
+ } else
+ result = aew_dev_configptr->size_window;
+ } else {
+ dev_err(aewdev,
+ "Error : AEW Hardware is not configured.\n");
+ result = -EINVAL;
+ }
+ break;
+
+ /* This ioctl is used to enable AEW Engine */
+ case AEW_ENABLE:
+ /* Enable AEW Engine if Hardware set up is done */
+ if (aew_dev_configptr->aew_config == H3A_AEW_CONFIG_NOT_DONE) {
+ dev_err(aewdev,
+ "Error : AEW Hardware is not configured.\n");
+ result = -EINVAL;
+ } else{
+ /* Enable AF Engine */
+ aew_engine_setup(aewdev, 1);
+ }break;
+
+ /* This ioctl is used to disable AEW Engine */
+ case AEW_DISABLE:
+ /* Disable AEW Engine */
+ aew_engine_setup(aewdev, 0);
+ break;
+
+ /* Invalid Command */
+ default:
+ dev_err(aewdev, "Error: It should not come here!!\n");
+ result = -ENOTTY;
+ break;
+ }
+
+ /* Release the mutex */
+ mutex_unlock(&aew_dev_configptr->read_blocked);
+
+ return result;
+}
+
+/* This function will return statistics to user */
+static ssize_t aew_read(struct file *filep, char *kbuff,
+ size_t size, loff_t *offset)
+{
+ void *buffer_temp;
+ int result = 0;
+ int ret;
+
+ /* Semaphore will return immediately if read call is busy */
+ ret = mutex_trylock(&(aew_dev_configptr->read_blocked));
+ if (!ret) {
+ dev_dbg(aewdev, "Read Call : busy : %d\n", ret);
+ return -EBUSY;
+ }
+ /* First Check the size given by user */
+ if (size < aew_dev_configptr->size_window) {
+ /*
+ * Return Failure to applicaiton
+ * if size is less than required size
+ */
+ dev_dbg(aewdev, "Error : Invalid size of buffer\n");
+ mutex_unlock(&(aew_dev_configptr->read_blocked));
+ return -EINVAL;
+ }
+
+ /*
+ * The value of buffer_filled flag determines
+ * the status of statistics
+ */
+ if (aew_dev_configptr->buffer_filled == 0) {
+ /* Decrement the semaphore */
+ dev_dbg(aewdev, "READ CALL IS BLOCKED............\n");
+ /* Block the read call */
+ wait_event_interruptible_timeout(aew_dev_configptr->
+ aew_wait_queue,
+ aew_dev_configptr->
+ buffer_filled, AEW_TIMEOUT);
+ dev_dbg(aewdev, "Read Call is unbloked and waking up.......\n");
+ dev_dbg(aewdev, "Buffer Filled.... %d\n",
+ aew_dev_configptr->buffer_filled);
+ }
+
+ if (aew_dev_configptr->buffer_filled == 1) {
+ /* Disable the interrupts and then swap the buffers */
+ dev_dbg(aewdev, "READING............\n");
+ disable_irq(6);
+ /* New Statistics are availaible */
+ aew_dev_configptr->buffer_filled = 0;
+
+ /* Swap application buffer and old buffer */
+ buffer_temp = aew_dev_configptr->buff_old;
+ aew_dev_configptr->buff_old = aew_dev_configptr->buff_app;
+ aew_dev_configptr->buff_app = buffer_temp;
+
+ /* Interrupts are enabled */
+ enable_irq(6);
+ /*
+ * Copy the entire statistics located in application
+ * buffer to user space
+ */
+ if (copy_to_user(kbuff, aew_dev_configptr->buff_app,
+ aew_dev_configptr->size_window)) {
+ dev_err(aewdev, "Error : Read Fault\n");
+ mutex_unlock(&(aew_dev_configptr->read_blocked));
+ return -EFAULT;
+ } else{
+ result = aew_dev_configptr->size_window;
+ }
+ dev_dbg(aewdev, "Reading Done........................\n");
+ }
+
+ dev_dbg(aewdev, "APP BUFF VALUE %x\n",
+ (*((unsigned int *)(aew_dev_configptr->buff_app))));
+
+ /* release the mutex */
+ mutex_unlock(&(aew_dev_configptr->read_blocked));
+
+ return result;
+}
+
+/* This function will handle interrupt generated by H3A Engine. */
+static irqreturn_t aew_isr(int irq, void *dev_id)
+{
+ /* EN AF Bit */
+ unsigned int enaew;
+ /* Temporary Buffer for Swapping */
+ void *buffer_temp;
+
+ /* Get the value of PCR register */
+ enaew = aew_get_enable();
+
+ /* If AEW engine is not enabled, interrupt is not for AEW */
+ if (!enaew)
+ return IRQ_RETVAL(IRQ_NONE);
+
+ /*
+ * Interrupt is generated by AEW, so Service the Interrupt
+ * Swap current buffer and old buffer
+ */
+ if (aew_dev_configptr) {
+ buffer_temp = aew_dev_configptr->buff_curr;
+ aew_dev_configptr->buff_curr = aew_dev_configptr->buff_old;
+ aew_dev_configptr->buff_old = buffer_temp;
+
+ /* Set the AEWBUFSTAT REgister to current buffer Address */
+ aew_set_address(aewdev, (unsigned
+ long)(virt_to_phys(aew_dev_configptr->buff_curr)));
+
+ /*
+ * Set buffer filled flag to indicate statistics are available
+ */
+ aew_dev_configptr->buffer_filled = 1;
+
+ /* new statistics are available. Wake up the read call */
+ wake_up(&(aew_dev_configptr->aew_wait_queue));
+
+ return IRQ_RETVAL(IRQ_HANDLED);
+ }
+ return IRQ_RETVAL(IRQ_NONE);
+}
+
+/* file Operation Structure*/
+static const struct file_operations aew_fops = {
+ .owner = THIS_MODULE,
+ .open = aew_open,
+ .read = aew_read,
+ .unlocked_ioctl = aew_ioctl,
+ .release = aew_release,
+};
+static struct platform_device aewdevice = {
+ .name = "dm365_aew",
+ .id = 2,
+ .dev = {
+ .release = aew_platform_release,
+ }
+};
+
+static struct device_driver aew_driver = {
+ .name = "dm365_aew",
+ .bus = &platform_bus_type,
+ .probe = aew_probe,
+ .remove = aew_remove,
+};
+
+#define DRIVERNAME "DM365AEW"
+/* Function to register the AF character device driver. */
+int __init aew_init(void)
+{
+ int err;
+ int result = 0;
+
+ /*
+ * Register the driver in the kernel
+ * dynmically get the major number for the driver using
+ * alloc_chrdev_region function
+ */
+ result = alloc_chrdev_region(&dev, 0, 1, DRIVERNAME);
+
+ if (result < 0) {
+ printk(KERN_ERR "Error : Could not register character device");
+ return -ENODEV;
+ }
+ printk(KERN_INFO "aew major#: %d, minor# %d\n", MAJOR(dev), MINOR(dev));
+ /* allocate memory for device structure and initialize it with 0 */
+ aew_dev_configptr =
+ kmalloc(sizeof(struct aew_device), GFP_KERNEL);
+ if (!aew_dev_configptr) {
+ printk(KERN_ERR "Error : kmalloc fail");
+ unregister_chrdev_region(dev, AEW_NR_DEVS);
+ return -ENOMEM;
+
+ }
+
+ /* Initialize character device */
+ cdev_init(&c_dev, &aew_fops);
+ c_dev.owner = THIS_MODULE;
+ c_dev.ops = &aew_fops;
+ err = cdev_add(&c_dev, dev, 1);
+ if (err) {
+ printk(KERN_ERR "Error : Error in Adding Davinci AEW");
+ unregister_chrdev_region(dev, AEW_NR_DEVS);
+ kfree(aew_dev_configptr);
+ return -err;
+ }
+ /* register driver as a platform driver */
+ if (driver_register(&aew_driver) != 0) {
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ /* Register the drive as a platform device */
+ if (platform_device_register(&aewdevice) != 0) {
+ driver_unregister(&aew_driver);
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ aew_class = class_create(THIS_MODULE, "dm365_aew");
+ if (!aew_class) {
+ printk(KERN_ERR "aew_init: error in creating device class\n");
+ driver_unregister(&aew_driver);
+ platform_device_unregister(&aewdevice);
+ unregister_chrdev_region(dev, 1);
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ device_create(aew_class, NULL, dev, NULL, "dm365_aew");
+
+ /* Set up the Interrupt handler for H3AINT interrupt */
+ result = request_irq(6, aew_isr, IRQF_SHARED, "dm365_h3a_aew",
+ (void *)aew_dev_configptr);
+
+ if (result != 0) {
+ printk(KERN_ERR "Error : Request IRQ Failed");
+ unregister_chrdev_region(dev, AEW_NR_DEVS);
+ device_destroy(aew_class, dev);
+ class_destroy(aew_class);
+ kfree(aew_dev_configptr);
+ driver_unregister(&aew_driver);
+ platform_device_unregister(&aewdevice);
+ cdev_del(&c_dev);
+ return result;
+ }
+
+ /* Initialize device structure */
+ memset(aew_dev_configptr, 0, sizeof(struct aew_device));
+
+ aew_dev_configptr->in_use = AEW_NOT_IN_USE;
+ aew_dev_configptr->buffer_filled = 0;
+ printk(KERN_NOTICE "AEW Driver initialized\n");
+ return 0;
+}
+
+/*
+ * This Function is called by the kernel while unloading the driver
+ * This will unregister the Character Device Driver
+ */
+void __exit aew_cleanup(void)
+{
+ /* Device is in use */
+ if (aew_dev_configptr->in_use == AEW_IN_USE) {
+ printk(KERN_ERR "Error : Driver in use");
+ return;
+ }
+
+ free_irq(6, aew_dev_configptr);
+ /* Free device structure */
+ kfree(aew_dev_configptr);
+ aew_dev_configptr = NULL;
+ unregister_chrdev_region(dev, AEW_NR_DEVS);
+
+ driver_unregister(&aew_driver);
+
+ device_destroy(aew_class, dev);
+
+ class_destroy(aew_class);
+
+ platform_device_unregister(&aewdevice);
+
+ cdev_del(&c_dev);
+
+ /* unregistering the driver from the kernel */
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+}
+
+module_init(aew_init)
+module_exit(aew_cleanup)
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/dm365_af.c b/drivers/media/platform/davinci/dm365_af.c
new file mode 100644
index 00000000..f7bb9ff7
--- /dev/null
+++ b/drivers/media/platform/davinci/dm365_af.c
@@ -0,0 +1,832 @@
+/* *
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/major.h>
+#include <linux/sched.h>
+#include <media/v4l2-device.h>
+#include <media/davinci/dm365_a3_hw.h>
+#include <media/davinci/vpss.h>
+
+
+/*Global structure for device */
+static struct af_device *af_dev_configptr;
+
+/* For registeration of character device */
+static struct cdev c_dev;
+
+/* device structure to make entry in device */
+static struct class *af_class;
+static dev_t dev;
+struct device *afdev;
+
+/* inline function to free reserver pages */
+inline void af_free_pages(unsigned long addr, unsigned long bufsize)
+{
+ unsigned long tempaddr;
+ unsigned long size;
+ tempaddr = addr;
+ if (!addr)
+ return;
+ size = PAGE_SIZE << (get_order(bufsize));
+ while (size > 0) {
+ ClearPageReserved(virt_to_page(addr));
+ addr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+ free_pages(tempaddr, get_order(bufsize));
+}
+
+/* Function to check paxel parameters */
+static int af_validate_parameters(void)
+{
+ int result = 0;
+ dev_dbg(afdev, "E\n");
+ /* Check horizontal Count */
+ if ((af_dev_configptr->config->paxel_config.hz_cnt <
+ AF_PAXEL_HORIZONTAL_COUNT_MIN) ||
+ (af_dev_configptr->config->paxel_config.hz_cnt >
+ AF_PAXEL_HORIZONTAL_COUNT_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel Horizontal Count is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Vertical Count */
+ if ((af_dev_configptr->config->paxel_config.vt_cnt <
+ AF_PAXEL_VERTICAL_COUNT_MIN) ||
+ (af_dev_configptr->config->paxel_config.vt_cnt >
+ AF_PAXEL_VERTICAL_COUNT_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel Vertical Count is incorrect");
+ result = -EINVAL;
+ }
+ /* Check line increment */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(af_dev_configptr->config->paxel_config.line_incr)) ||
+ (af_dev_configptr->config->paxel_config.line_incr <
+ AF_LINE_INCR_MIN) ||
+ (af_dev_configptr->config->paxel_config.line_incr >
+ AF_LINE_INCR_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel Line Increment is incorrect");
+ result = -EINVAL;
+ }
+ if (af_dev_configptr->config->fv_sel == AF_HFV_AND_VFV) {
+ if ((NOT_EVEN ==
+ CHECK_EVEN(af_dev_configptr->config->\
+ paxel_config.column_incr)) ||
+ (af_dev_configptr->config->paxel_config.column_incr <
+ AF_COLUMN_INCR_MIN) ||
+ (af_dev_configptr->config->paxel_config.column_incr >
+ AF_COLUMN_INCR_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel Column Increment is"
+ "incorrect");
+ result = -EINVAL;
+ }
+ }
+ /* Check width */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(af_dev_configptr->config->paxel_config.width)) ||
+ (af_dev_configptr->config->paxel_config.width < AF_WIDTH_MIN) ||
+ (af_dev_configptr->config->paxel_config.width > AF_WIDTH_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel Width is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Height */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(af_dev_configptr->config->paxel_config.height)) ||
+ (af_dev_configptr->config->paxel_config.height < AF_HEIGHT_MIN) ||
+ (af_dev_configptr->config->paxel_config.height > AF_HEIGHT_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel Height is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Horizontal Start */
+ if ((NOT_EVEN ==
+ CHECK_EVEN(af_dev_configptr->config->paxel_config.hz_start)) ||
+ (af_dev_configptr->config->paxel_config.hz_start <
+ (af_dev_configptr->config->iir_config.hz_start_pos + 2)) ||
+ (af_dev_configptr->config->paxel_config.hz_start <
+ AF_HZSTART_MIN) ||
+ (af_dev_configptr->config->paxel_config.hz_start >
+ AF_HZSTART_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel horizontal start is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Vertical Start */
+ if ((af_dev_configptr->config->paxel_config.vt_start <
+ AF_VTSTART_MIN) ||
+ (af_dev_configptr->config->paxel_config.vt_start >
+ AF_VTSTART_MAX)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n Paxel vertical start is incorrect");
+ result = -EINVAL;
+ }
+ /* Check Threshold */
+ if ((af_dev_configptr->config->hmf_config.threshold > AF_MEDTH_MAX) &&
+ (af_dev_configptr->config->hmf_config.enable == H3A_AF_ENABLE)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev,
+ "\n Horizontal Median Filter Threshold is incorrect");
+ result = -EINVAL;
+ }
+ /* Check IIRSH start */
+ if (af_dev_configptr->config->iir_config.hz_start_pos > AF_IIRSH_MAX) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev,
+ "\n IIR FITLER horizontal start position incorrect");
+ result = -EINVAL;
+ }
+ /* Verify ALaw */
+ if ((af_dev_configptr->config->alaw_enable < H3A_AF_DISABLE) ||
+ (af_dev_configptr->config->alaw_enable > H3A_AF_ENABLE)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n ALaw Setting is incorrect");
+ result = -EINVAL;
+ }
+ /* Verify Horizontal Median Filter Setting */
+ if ((af_dev_configptr->config->hmf_config.enable < H3A_AF_DISABLE) ||
+ (af_dev_configptr->config->hmf_config.enable > H3A_AF_ENABLE)) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev,
+ "\n Horizontal Median Filter Setting is incorrect");
+ result = -EINVAL;
+ }
+ /* Check RGB position if HFV used */
+ if (af_dev_configptr->config->fv_sel == AF_HFV_ONLY &&
+ ((af_dev_configptr->config->rgb_pos < GR_GB_BAYER) ||
+ (af_dev_configptr->config->rgb_pos > RB_GG_CUSTOM))) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n RGB Position Setting is incorrect");
+ result = -EINVAL;
+ }
+ if (af_dev_configptr->config->fv_sel == AF_HFV_AND_VFV) {
+ /* Check for threshold values */
+ if (af_dev_configptr->config->fir_config.hfv_thr1 >
+ AF_HFV_THR_MAX ||
+ af_dev_configptr->config->fir_config.hfv_thr2 >
+ AF_HFV_THR_MAX) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n HFV FIR 1 or FIR 2 Threshold"
+ " incorrect");
+ result = -EINVAL;
+ }
+ if (af_dev_configptr->config->fir_config.vfv_thr1 >
+ AF_VFV_THR_MAX ||
+ af_dev_configptr->config->fir_config.vfv_thr2 >
+ AF_VFV_THR_MAX) {
+ dev_err(afdev, "\n Invalid Parameters");
+ dev_err(afdev, "\n VFV FIR 1 or FIR 2 Threshold"
+ " incorrect");
+ result = -EINVAL;
+ }
+ }
+ dev_dbg(afdev, "L\n");
+ return result;
+}
+
+/* Function to perform hardware set up */
+static int af_hardware_setup(void)
+{
+ int result;
+
+ /* Size for buffer in bytes */
+ int buff_size;
+ unsigned long adr, size;
+ unsigned int busyaf;
+ dev_dbg(afdev, "E\n");
+
+ /* Get the value of PCR register */
+ busyaf = af_get_hw_state();
+
+ /* If busy bit is 1 then busy lock registers caanot be configured */
+ if (busyaf == 1) {
+ /* Hardware cannot be configure while engine is busy */
+ dev_err(afdev, "AF_register_setup_ERROR : Engine Busy");
+ dev_err(afdev, "\n Configuration cannot be done ");
+ return -EBUSY;
+ }
+
+ /* Check IIR Coefficient and start Values */
+ result = af_validate_parameters();
+ if (result < 0)
+ return result;
+
+ /* Compute buffer size */
+ if (af_dev_configptr->config->fv_sel == AF_HFV_ONLY)
+ buff_size =
+ (af_dev_configptr->config->paxel_config.hz_cnt) *
+ (af_dev_configptr->config->paxel_config.vt_cnt) *
+ AF_PAXEL_SIZE_HF_ONLY;
+ else
+ buff_size =
+ (af_dev_configptr->config->paxel_config.hz_cnt) *
+ (af_dev_configptr->config->paxel_config.vt_cnt) *
+ AF_PAXEL_SIZE_HF_VF;
+
+ /* Deallocate the previosu buffers free old buffers */
+ if (af_dev_configptr->buff_old)
+ af_free_pages((unsigned long)af_dev_configptr->buff_old,
+ af_dev_configptr->size_paxel);
+
+ /* Free current buffer */
+ if (af_dev_configptr->buff_curr)
+ af_free_pages((unsigned long)af_dev_configptr->buff_curr,
+ af_dev_configptr->size_paxel);
+
+ /* Free application buffers */
+ if (af_dev_configptr->buff_app)
+ af_free_pages((unsigned long)af_dev_configptr->buff_app,
+ af_dev_configptr->size_paxel);
+
+ /*
+ * Reallocate the buffer as per new paxel configurations
+ * Allocate memory for old buffer
+ */
+ af_dev_configptr->buff_old =
+ (void *)__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order(buff_size));
+
+ if (af_dev_configptr->buff_old == NULL)
+ return -ENOMEM;
+
+ /* allocate the memory for storing old statistics */
+ adr = (unsigned long)af_dev_configptr->buff_old;
+ size = PAGE_SIZE << (get_order(buff_size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers
+ * are never swapped out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ /* Allocate memory for current buffer */
+ af_dev_configptr->buff_curr =
+ (void *)__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order(buff_size));
+
+ /* Free the previously allocated buffer */
+ if (af_dev_configptr->buff_curr == NULL) {
+ if (af_dev_configptr->buff_old)
+ af_free_pages((unsigned long)af_dev_configptr->
+ buff_old, buff_size);
+ return -ENOMEM;
+ }
+
+ adr = (unsigned long)af_dev_configptr->buff_curr;
+ size = PAGE_SIZE << (get_order(buff_size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers
+ * are never swapped out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ /* Allocate memory for old buffer */
+ af_dev_configptr->buff_app =
+ (void *)__get_free_pages(GFP_KERNEL | GFP_DMA,
+ get_order(buff_size));
+
+ if (af_dev_configptr->buff_app == NULL) {
+
+ /* Free the previously allocated buffer */
+ if (af_dev_configptr->buff_curr)
+ af_free_pages((unsigned long)af_dev_configptr->
+ buff_curr, buff_size);
+ /* Free the previously allocated buffer */
+ if (af_dev_configptr->buff_old)
+ af_free_pages((unsigned long)af_dev_configptr->
+ buff_old, buff_size);
+ return -ENOMEM;
+ }
+
+ adr = (unsigned long)af_dev_configptr->buff_app;
+ size = PAGE_SIZE << (get_order(buff_size));
+ while (size > 0) {
+ /*
+ * make sure the frame buffers
+ * are never swapped out of memory
+ */
+ SetPageReserved(virt_to_page(adr));
+ adr += PAGE_SIZE;
+ size -= PAGE_SIZE;
+ }
+
+ result = af_register_setup(afdev, af_dev_configptr);
+ if (result < 0)
+ return result;
+ af_dev_configptr->size_paxel = buff_size;
+
+ /* Set configuration flag to indicate HW setup done */
+ af_dev_configptr->af_config = H3A_AF_CONFIG;
+
+ dev_dbg(afdev, "L\n");
+ return 0;
+}
+
+/*
+ * This function called when driver is opened.It creates Channel
+ * Configuration Structure
+ */
+static int af_open(struct inode *inode, struct file *filp)
+{
+ dev_dbg(afdev, "E\n");
+
+ /* Return if device is in use */
+ if (af_dev_configptr->in_use == AF_IN_USE)
+ return -EBUSY;
+ af_dev_configptr->config = NULL;
+
+ /* Allocate memory for Device Structure */
+ af_dev_configptr->config = kmalloc(sizeof(struct af_configuration)
+ , GFP_KERNEL);
+ if (af_dev_configptr->config == NULL) {
+ dev_err(afdev, "Error : Kmalloc fail\n");
+ return -ENOMEM;
+ }
+
+ /* Initialize the wait queue */
+ init_waitqueue_head(&(af_dev_configptr->af_wait_queue));
+
+ /* Driver is in use */
+ af_dev_configptr->in_use = AF_IN_USE;
+
+ /* Hardware is not set up */
+ af_dev_configptr->af_config = H3A_AF_CONFIG_NOT_DONE;
+ af_dev_configptr->buffer_filled = 0;
+
+ /* Initialize the mutex */
+ mutex_init(&(af_dev_configptr->read_blocked));
+ dev_dbg(afdev, "L\n");
+ return 0;
+}
+
+/*
+ * This function called when driver is closed.
+ * It will deallocate all the buffers.
+ */
+static int af_release(struct inode *inode, struct file *filp)
+{
+ dev_dbg(afdev, "E\n");
+
+ af_engine_setup(afdev, 0);
+ /* free current buffer */
+ if (af_dev_configptr->buff_curr)
+ af_free_pages((unsigned long)af_dev_configptr->buff_curr,
+ af_dev_configptr->size_paxel);
+
+ /* Free old buffer */
+ if (af_dev_configptr->buff_old)
+ af_free_pages((unsigned long)af_dev_configptr->buff_old,
+ af_dev_configptr->size_paxel);
+
+ /* Free application buffer */
+ if (af_dev_configptr->buff_app)
+ af_free_pages((unsigned long)af_dev_configptr->buff_app,
+ af_dev_configptr->size_paxel);
+
+ /* Release memory for configuration structure of this channel */
+ af_dev_configptr->buff_curr = NULL;
+ af_dev_configptr->buff_old = NULL;
+ af_dev_configptr->buff_app = NULL;
+ kfree(af_dev_configptr->config);
+ af_dev_configptr->config = NULL;
+
+ /* Device is not in use */
+ af_dev_configptr->in_use = AF_NOT_IN_USE;
+
+ dev_dbg(afdev, "L\n");
+
+ return 0;
+}
+static void af_platform_release(struct device *device)
+{
+ /* This is called when the reference count goes to zero */
+}
+static int af_probe(struct device *device)
+{
+ afdev = device;
+ return 0;
+}
+
+static int af_remove(struct device *device)
+{
+ return 0;
+}
+
+/*
+ * This function will process IOCTL commands sent by the application and
+ * control the device IO operations.
+ */
+static long af_ioctl(struct file *filep,
+ unsigned int cmd, unsigned long arg)
+{
+ struct af_configuration afconfig = *(af_dev_configptr->config);
+ int result = 0;
+ dev_dbg(afdev, "E\n");
+
+ /* Block the mutex while ioctl is called */
+ result = mutex_lock_interruptible(&af_dev_configptr->read_blocked);
+ if (result)
+ return result;
+
+ /* Extract the type and number bitfields, and don't decode wrong cmds */
+ if (_IOC_TYPE(cmd) != AF_MAGIC_NO) {
+ mutex_unlock(&af_dev_configptr->read_blocked);
+ return -ENOTTY;
+ }
+
+ if (_IOC_NR(cmd) > AF_IOC_MAXNR) {
+ mutex_unlock(&af_dev_configptr->read_blocked);
+ return -ENOTTY;
+ }
+
+ /* Use 'access_ok' to validate user space pointer */
+ if (_IOC_DIR(cmd) & _IOC_READ)
+ result =
+ !access_ok(VERIFY_WRITE, (void __user *)arg,
+ _IOC_SIZE(cmd));
+ else if (_IOC_DIR(cmd) & _IOC_WRITE)
+ result =
+ !access_ok(VERIFY_READ, (void __user *)arg, _IOC_SIZE(cmd));
+
+ if (result) {
+ mutex_unlock(&af_dev_configptr->read_blocked);
+ return -EFAULT;
+ }
+
+ switch (cmd) {
+
+ /*
+ * This ioctl is used to perform hardware
+ * set up for AF Engine. It will configure all the registers.
+ */
+ case AF_S_PARAM:
+ if (copy_from_user(af_dev_configptr->config,
+ (struct af_configuration *)arg,
+ sizeof(struct af_configuration))) {
+ /* Release the semaphore */
+ mutex_unlock(&af_dev_configptr->read_blocked);
+ return -EFAULT;
+ }
+
+ /* Call AF_hardware_setup to perform register configuration */
+ result = af_hardware_setup();
+ if (!result) {
+ result = af_dev_configptr->size_paxel;
+ } else {
+ dev_err(afdev, "Error : AF_S_PARAM failed");
+ *(af_dev_configptr->config) = afconfig;
+ }
+ break;
+
+ /* This ioctl will get the paramters from application */
+ case AF_G_PARAM:
+ /* Check if Hardware is configured or not */
+ if (af_dev_configptr->af_config == H3A_AF_CONFIG) {
+ if (copy_to_user((struct af_configuration *)arg,
+ af_dev_configptr->config,
+ sizeof(struct af_configuration))) {
+ mutex_unlock(&af_dev_configptr->read_blocked);
+ return -EFAULT;
+ } else
+ result = af_dev_configptr->size_paxel;
+
+ } else {
+ dev_dbg(afdev, "Error : AF Hardware not configured.");
+ result = -EINVAL;
+ }
+
+ break;
+
+ /*
+ * This ioctl will enable AF Engine if hardware configuration
+ * is done
+ */
+ case AF_ENABLE:
+ /* Check if hardware is configured or not */
+ if (af_dev_configptr->af_config == H3A_AF_CONFIG_NOT_DONE) {
+ dev_err(afdev, "Error : AF Hardware not configured.");
+ result = -EINVAL;
+ } else
+ af_engine_setup(afdev, 1);
+ break;
+
+ /* This ioctl will disable AF Engine */
+ case AF_DISABLE:
+ af_engine_setup(afdev, 0);
+ break;
+
+ default:
+ dev_err(afdev, "Error : Invalid IOCTL!");
+ result = -ENOTTY;
+ break;
+ }
+
+ /* Before returning increment semaphore */
+ mutex_unlock(&af_dev_configptr->read_blocked);
+ dev_dbg(afdev, "L\n");
+ return result;
+}
+
+/* Function will return the statistics to user */
+ssize_t af_read(struct file *filep, char *kbuff, size_t size, loff_t *offset)
+{
+ void *buff_temp;
+ int result = 0;
+ int ret;
+ dev_dbg(afdev, "E\n");
+
+ ret = mutex_trylock(&(af_dev_configptr->read_blocked));
+ if (!ret) {
+ dev_err(afdev, "\n Read Call : busy");
+ return -EBUSY;
+ }
+
+ /*
+ * If no of bytes specified by the user is less than that of buffer
+ * return error
+ */
+ if (size < af_dev_configptr->size_paxel) {
+ dev_err(afdev, "\n Error : Invalid buffer size");
+ mutex_unlock(&(af_dev_configptr->read_blocked));
+ return -1;
+ }
+
+ /*
+ * The value of bufffer_filled flag determines
+ * the status of statistics
+ */
+ if (af_dev_configptr->buffer_filled == 0) {
+ dev_dbg(afdev, "Read call is blocked .......................");
+ /*
+ * Block the read call until new statistics are available
+ * or timer expires Decrement the semaphore count
+ */
+ wait_event_interruptible_timeout(af_dev_configptr->
+ af_wait_queue,
+ af_dev_configptr->
+ buffer_filled, AF_TIMEOUT);
+ dev_dbg(afdev,
+ "\n Read Call Unblocked..........................");
+ }
+ if (af_dev_configptr->buffer_filled == 1) {
+ /*
+ * New Statistics are available. Disable the interrupts while
+ * swapping the buffers
+ */
+ dev_dbg(afdev, "\n Reading.............................");
+ disable_irq(3);
+
+ af_dev_configptr->buffer_filled = 0;
+
+ /* Swap application buffer and old buffer */
+ buff_temp = af_dev_configptr->buff_old;
+ af_dev_configptr->buff_old = af_dev_configptr->buff_app;
+ af_dev_configptr->buff_app = buff_temp;
+
+ dev_dbg(afdev, "\n Reading Done.............................");
+
+ /* Enable the interrupts once swapping is done */
+ enable_irq(3);
+
+ /*
+ * New Statistics are not availaible copy the application
+ * buffer to user. Return the entire statistics to user
+ */
+ if (copy_to_user(kbuff, af_dev_configptr->buff_app,
+ af_dev_configptr->size_paxel)) {
+ /* Release the semaphore in case of fault */
+ mutex_unlock(&(af_dev_configptr->read_blocked));
+ return -EFAULT;
+ } else
+ result = af_dev_configptr->size_paxel;
+ }
+
+ /* Release the Mutex */
+ mutex_unlock(&(af_dev_configptr->read_blocked));
+ dev_dbg(afdev, "\n Read APPLICATION BUFFER %d",
+ *((int *)((af_dev_configptr->buff_app))));
+ dev_dbg(afdev, "L\n");
+ return result;
+}
+
+/* This function will handle the H3A interrupt. */
+static irqreturn_t af_isr(int irq, void *dev_id)
+{
+ /* Temporary buffer for swapping */
+ void *buff_temp;
+ int enaf;
+
+ dev_dbg(afdev, "E\n");
+
+ /* Get the value of PCR register */
+ enaf = af_get_enable();
+
+ /* If AF Engine has enabled, interrupt is not for AF */
+ if (!enaf)
+ return IRQ_RETVAL(IRQ_NONE);
+
+ /*
+ * Service the Interrupt. Set buffer filled flag to indicate
+ * statistics are available. Swap current buffer and old buffer
+ */
+ if (af_dev_configptr) {
+ buff_temp = af_dev_configptr->buff_curr;
+ af_dev_configptr->buff_curr = af_dev_configptr->buff_old;
+ af_dev_configptr->buff_old = buff_temp;
+
+ /* Set AF Buf st to current register address */
+ if (af_dev_configptr->buff_curr)
+ af_set_address(afdev, (unsigned long)
+ virt_to_phys(af_dev_configptr->buff_curr));
+
+ /* Wake up read as new statistics are available */
+ af_dev_configptr->buffer_filled = 1;
+ wake_up(&(af_dev_configptr->af_wait_queue));
+ dev_dbg(afdev, "L\n");
+ return IRQ_RETVAL(IRQ_HANDLED);
+ }
+ return IRQ_RETVAL(IRQ_NONE);
+}
+
+/* File Operation Structure */
+static const struct file_operations af_fops = {
+ .owner = THIS_MODULE,
+ .open = af_open,
+ .unlocked_ioctl = af_ioctl,
+ .read = af_read,
+ .release = af_release
+};
+static struct platform_device afdevice = {
+ .name = "dm365_af",
+ .id = 2,
+ .dev = {
+ .release = af_platform_release,
+ }
+};
+
+static struct device_driver af_driver = {
+ .name = "dm365_af",
+ .bus = &platform_bus_type,
+ .probe = af_probe,
+ .remove = af_remove,
+};
+
+/* Function to register the AF character device driver. */
+#define DRIVERNAME "DM365AF"
+int __init af_init(void)
+{
+ int err;
+ int result = 0;
+
+ /*
+ * Register the driver in the kernel
+ * dynmically get the major number for the driver using
+ * alloc_chrdev_region function
+ */
+ result = alloc_chrdev_region(&dev, 0, 1, DRIVERNAME);
+
+ if (result < 0) {
+ printk(KERN_ERR "Error : Could not register character device");
+ return -ENODEV;
+ }
+ printk(KERN_INFO "af major#: %d, minor# %d\n", MAJOR(dev), MINOR(dev));
+ /* allocate memory for device structure and initialize it with 0 */
+ af_dev_configptr =
+ kmalloc(sizeof(struct af_device), GFP_KERNEL);
+ if (!af_dev_configptr) {
+ printk(KERN_ERR "Error : kmalloc fail");
+ unregister_chrdev_region(dev, AF_NR_DEVS);
+ return -ENOMEM;
+ }
+ /* Initialize character device */
+ cdev_init(&c_dev, &af_fops);
+ c_dev.owner = THIS_MODULE;
+ c_dev.ops = &af_fops;
+ err = cdev_add(&c_dev, dev, 1);
+ if (err) {
+ printk(KERN_ERR "Error : Error in Adding Davinci AF");
+ unregister_chrdev_region(dev, AF_NR_DEVS);
+ kfree(af_dev_configptr);
+ return -err;
+ }
+ /* register driver as a platform driver */
+ if (driver_register(&af_driver) != 0) {
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+
+ /* Register the drive as a platform device */
+ if (platform_device_register(&afdevice) != 0) {
+ driver_unregister(&af_driver);
+ unregister_chrdev_region(dev, 1);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+ af_class = class_create(THIS_MODULE, "dm365_af");
+ if (!af_class) {
+ printk(KERN_ERR "af_init: error in creating device class\n");
+ driver_unregister(&af_driver);
+ platform_device_unregister(&afdevice);
+ unregister_chrdev_region(dev, 1);
+ unregister_chrdev(MAJOR(dev), DRIVERNAME);
+ cdev_del(&c_dev);
+ return -EINVAL;
+ }
+ /* register device class */
+ device_create(af_class, NULL, dev, NULL, "dm365_af");
+
+ /* Set up the Interrupt handler for H3AINT interrupt */
+ result = request_irq(3, af_isr, IRQF_SHARED, "dm365_h3a_af",
+ (void *)af_dev_configptr);
+
+ if (result != 0) {
+ printk(KERN_ERR "Error : Request IRQ Failed");
+ unregister_chrdev_region(dev, AF_NR_DEVS);
+ kfree(af_dev_configptr);
+ device_destroy(af_class, dev);
+ class_destroy(af_class);
+ driver_unregister(&af_driver);
+ platform_device_unregister(&afdevice);
+ cdev_del(&c_dev);
+ return result;
+ }
+
+ /* Initialize device structure */
+ memset((unsigned char *)af_dev_configptr, 0, sizeof(struct af_device));
+
+ af_dev_configptr->in_use = AF_NOT_IN_USE;
+ af_dev_configptr->buffer_filled = 0;
+ printk(KERN_ERR "AF Driver initialized\n");
+ return 0;
+}
+
+/*
+ * This function is called by the kernel while unloading the driver.
+ * It will unregister character device driver
+ */
+void __exit af_cleanup(void)
+{
+ /* Return if driver is busy */
+ if (af_dev_configptr->in_use == AF_IN_USE) {
+ printk(KERN_ERR "Error : Driver in use. Can't remove.");
+ return;
+ }
+ free_irq(3, af_dev_configptr);
+ /* Free device structure */
+ kfree(af_dev_configptr);
+
+ unregister_chrdev_region(dev, AF_NR_DEVS);
+
+ driver_unregister(&af_driver);
+
+ device_destroy(af_class, dev);
+
+ class_destroy(af_class);
+
+ platform_device_unregister(&afdevice);
+ /* unregistering the driver from the kernel */
+ cdev_del(&c_dev);
+
+}
+
+module_init(af_init)
+module_exit(af_cleanup)
+/* Module License */
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/dm365_ccdc.c b/drivers/media/platform/davinci/dm365_ccdc.c
new file mode 100755
index 00000000..36e217c4
--- /dev/null
+++ b/drivers/media/platform/davinci/dm365_ccdc.c
@@ -0,0 +1,1631 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * This is the isif hardware module for DM365.
+ * TODO: 1) Raw bayer parameter settings and bayer capture
+ * 2) Add support for control ioctl
+ * 3) Add support for linearization
+ * 4) Test VPFE_CMD_S_CCDC_RAW_RARAMS ioctl
+ */
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/videodev2.h>
+#include <linux/slab.h>
+#include <mach/mux.h>
+#include <media/davinci/dm365_ccdc.h>
+#include <media/davinci/vpss.h>
+#include "dm365_ccdc_regs.h"
+#include "ccdc_hw_device.h"
+
+static struct device *dev;
+
+/* Defauts for module configuation paramaters */
+static struct ccdc_config_params_raw ccdc_config_defaults = {
+ .linearize = {
+ .en = 0,
+ .corr_shft = CCDC_NO_SHIFT,
+ .scale_fact = {1, 0},
+ },
+ .df_csc = {
+ .df_or_csc = 0,
+ .csc = {
+ .en = 0
+ },
+ },
+ .dfc = {
+ .en = 0
+ },
+ .bclamp = {
+ .en = 0
+ },
+ .gain_offset = {
+ .gain = {
+ .r_ye = {1, 0},
+ .gr_cy = {1, 0},
+ .gb_g = {1, 0},
+ .b_mg = {1, 0},
+ },
+ },
+ .culling = {
+ .hcpat_odd = 0xff,
+ .hcpat_even = 0xff,
+ .vcpat = 0xff
+ },
+ .compress = {
+ .alg = CCDC_ALAW,
+ },
+};
+
+/* ISIF operation configuration */
+struct ccdc_oper_config {
+ enum vpfe_hw_if_type if_type;
+ struct ccdc_ycbcr_config ycbcr;
+ struct ccdc_params_raw bayer;
+ enum ccdc_data_pack data_pack;
+ void *__iomem base_addr;
+ void *__iomem linear_tbl0_addr;
+ void *__iomem linear_tbl1_addr;
+};
+
+static struct ccdc_oper_config ccdc_cfg = {
+#ifdef CONFIG_VIDEO_YCBCR
+ .ycbcr = {
+ .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
+ .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
+ .win = CCDC_WIN_VGA,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .pix_order = CCDC_PIXORDER_YCBYCR,
+ },
+#else
+ .ycbcr = {
+ .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
+ .frm_fmt = CCDC_FRMFMT_INTERLACED,
+ .win = CCDC_WIN_NTSC,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .pix_order = CCDC_PIXORDER_CBYCRY,
+ .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED,
+ },
+#endif
+ .bayer = {
+ .pix_fmt = CCDC_PIXFMT_RAW,
+ .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
+ .win = CCDC_WIN_VGA,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .gain = {
+ .r_ye = {1, 0},
+ .gr_cy = {1, 0},
+ .gb_g = {1, 0},
+ .b_mg = {1, 0},
+ },
+ .cfa_pat = CCDC_CFA_PAT_MOSAIC,
+ .data_msb = CCDC_BIT_MSB_7,
+ .config_params = {
+ .data_size = CCDC_12_BITS,
+ .data_shift = CCDC_NO_SHIFT,
+ .col_pat_field0 = {
+ .olop = CCDC_GREEN_BLUE,
+ .olep = CCDC_BLUE,
+ .elop = CCDC_RED,
+ .elep = CCDC_GREEN_RED,
+ },
+ .col_pat_field1 = {
+ .olop = CCDC_GREEN_BLUE,
+ .olep = CCDC_BLUE,
+ .elop = CCDC_RED,
+ .elep = CCDC_GREEN_RED,
+ },
+ .test_pat_gen = 0,
+ },
+ },
+ .data_pack = CCDC_DATA_PACK8,
+};
+
+/* Raw Bayer formats */
+static u32 ccdc_raw_bayer_pix_formats[] =
+ {V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
+
+/* Raw YUV formats */
+static u32 ccdc_raw_yuv_pix_formats[] =
+ {V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
+
+/* register access routines */
+static inline u32 regr(u32 offset)
+{
+ return __raw_readl(ccdc_cfg.base_addr + offset);
+}
+
+static inline void regw(u32 val, u32 offset)
+{
+ __raw_writel(val, ccdc_cfg.base_addr + offset);
+}
+
+static inline u32 ccdc_merge(u32 mask, u32 val, u32 offset)
+{
+ u32 new_val = (regr(offset) & ~mask) | (val & mask);
+
+ regw(new_val, offset);
+ return new_val;
+}
+
+static inline void regw_lin_tbl(u32 val, u32 offset, int i)
+{
+ if (!i)
+ __raw_writel(val, ccdc_cfg.linear_tbl0_addr + offset);
+ else
+ __raw_writel(val, ccdc_cfg.linear_tbl1_addr + offset);
+}
+
+static void ccdc_disable_all_modules(void)
+{
+ /* disable BC */
+ regw(0, CLAMPCFG);
+ /* disable vdfc */
+ regw(0, DFCCTL);
+ /* disable CSC */
+ regw(0, CSCCTL);
+ /* disable linearization */
+ regw(0, LINCFG0);
+ /* disable other modules here as they are supported */
+}
+
+static void ccdc_enable(int en)
+{
+ if (!en) {
+ /* Before disable isif, disable all ISIF modules */
+ ccdc_disable_all_modules();
+ /**
+ * wait for next VD. Assume lowest scan rate is 12 Hz. So
+ * 100 msec delay is good enough
+ */
+ }
+ msleep(100);
+ ccdc_merge(CCDC_SYNCEN_VDHDEN_MASK, en, SYNCEN);
+}
+
+static void ccdc_enable_output_to_sdram(int en)
+{
+ ccdc_merge(CCDC_SYNCEN_WEN_MASK, en << CCDC_SYNCEN_WEN_SHIFT, SYNCEN);
+}
+
+static void ccdc_config_culling(struct ccdc_cul *cul)
+{
+ u32 val;
+
+ /* Horizontal pattern */
+ val = (cul->hcpat_even) << CULL_PAT_EVEN_LINE_SHIFT;
+ val |= cul->hcpat_odd;
+ regw(val, CULH);
+
+ /* vertical pattern */
+ regw(cul->vcpat, CULV);
+
+ /* LPF */
+ ccdc_merge((CCDC_LPF_MASK << CCDC_LPF_SHIFT),
+ (cul->en_lpf << CCDC_LPF_SHIFT), MODESET);
+}
+
+static void ccdc_config_gain_offset(void)
+{
+ struct ccdc_gain_offsets_adj *gain_off_ptr =
+ &ccdc_cfg.bayer.config_params.gain_offset;
+ u32 val;
+
+ val = ((gain_off_ptr->gain_sdram_en & 1) << GAIN_SDRAM_EN_SHIFT) |
+ ((gain_off_ptr->gain_ipipe_en & 1) << GAIN_IPIPE_EN_SHIFT) |
+ ((gain_off_ptr->gain_h3a_en & 1) << GAIN_H3A_EN_SHIFT) |
+ ((gain_off_ptr->offset_sdram_en & 1) << OFST_SDRAM_EN_SHIFT) |
+ ((gain_off_ptr->offset_ipipe_en & 1) << OFST_IPIPE_EN_SHIFT) |
+ ((gain_off_ptr->offset_h3a_en & 1) << OFST_H3A_EN_SHIFT);
+
+ ccdc_merge(GAIN_OFFSET_EN_MASK, val, CGAMMAWD);
+
+ val = ((gain_off_ptr->gain.r_ye.integer & GAIN_INTEGER_MASK)
+ << GAIN_INTEGER_SHIFT);
+ val |= (ccdc_cfg.bayer.
+ config_params.gain_offset.gain.r_ye.decimal &
+ GAIN_DECIMAL_MASK);
+ regw(val, CRGAIN);
+
+ val = ((gain_off_ptr->gain.gr_cy
+ .integer & GAIN_INTEGER_MASK) << GAIN_INTEGER_SHIFT);
+ val |= (gain_off_ptr->gain.gr_cy
+ .decimal & GAIN_DECIMAL_MASK);
+ regw(val, CGRGAIN);
+
+ val = ((gain_off_ptr->gain.gb_g
+ .integer & GAIN_INTEGER_MASK) << GAIN_INTEGER_SHIFT);
+ val |= (gain_off_ptr->gain.gb_g
+ .decimal & GAIN_DECIMAL_MASK);
+ regw(val, CGBGAIN);
+
+ val = ((gain_off_ptr->gain.b_mg
+ .integer & GAIN_INTEGER_MASK) << GAIN_INTEGER_SHIFT);
+ val |= (gain_off_ptr->gain.b_mg
+ .decimal & GAIN_DECIMAL_MASK);
+ regw(val, CBGAIN);
+
+ regw((gain_off_ptr->offset &
+ OFFSET_MASK), COFSTA);
+}
+
+static void ccdc_restore_defaults(void)
+{
+ enum vpss_ccdc_source_sel source = VPSS_CCDCIN;
+ int i;
+
+ memcpy(&ccdc_cfg.bayer.config_params, &ccdc_config_defaults,
+ sizeof(struct ccdc_config_params_raw));
+
+ dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
+ /* Enable clock to ISIF, IPIPEIF and BL */
+ vpss_enable_clock(VPSS_CCDC_CLOCK, 1);
+ vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
+ vpss_enable_clock(VPSS_BL_CLOCK, 1);
+
+ /* set all registers to default value */
+ for (i = 0; i <= 0x1f8; i += 4)
+ regw(0, i);
+
+ /* no culling support */
+ regw(0xffff, CULH);
+ regw(0xff, CULV);
+
+ /* Set default offset and gain */
+ ccdc_config_gain_offset();
+
+ vpss_select_ccdc_source(source);
+
+ dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
+}
+
+static int ccdc_open(struct device *device)
+{
+ dev = device;
+ ccdc_restore_defaults();
+ return 0;
+}
+
+/* This function will configure the window size to be capture in CCDC reg */
+static void ccdc_setwin(struct v4l2_rect *image_win,
+ enum ccdc_frmfmt frm_fmt, int ppc, int mode)
+{
+ int horz_start, horz_nr_pixels;
+ int vert_start, vert_nr_lines;
+ int mid_img = 0;
+
+ dev_dbg(dev, "\nStarting ccdc_setwin...");
+ /**
+ * ppc - per pixel count. indicates how many pixels per cell
+ * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
+ * raw capture this is 1
+ */
+ horz_start = image_win->left << (ppc - 1);
+ horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1;
+
+ /* Writing the horizontal info into the registers */
+ regw(horz_start & START_PX_HOR_MASK, SPH);
+ regw(horz_nr_pixels & NUM_PX_HOR_MASK, LNH);
+ vert_start = image_win->top;
+
+ if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
+ vert_nr_lines = (image_win->height >> 1) - 1;
+ vert_start >>= 1;
+ /* To account for VD since line 0 doesn't have any data */
+ vert_start += 1;
+ } else {
+ /* To account for VD since line 0 doesn't have any data */
+ vert_start += 1;
+ vert_nr_lines = image_win->height - 1;
+ /* configure VDINT0 and VDINT1 */
+ mid_img = vert_start + (image_win->height / 2);
+ regw(mid_img, VDINT1);
+ }
+
+ if (!mode)
+ regw(0, VDINT0);
+ else
+ regw(vert_nr_lines, VDINT0);
+ regw(vert_start & START_VER_ONE_MASK, SLV0);
+ regw(vert_start & START_VER_TWO_MASK, SLV1);
+ regw(vert_nr_lines & NUM_LINES_VER, LNV);
+}
+
+static void ccdc_config_bclamp(struct ccdc_black_clamp *bc)
+{
+ u32 val;
+
+ /**
+ * DC Offset is always added to image data irrespective of bc enable
+ * status
+ */
+ val = bc->dc_offset & CCDC_BC_DCOFFSET_MASK;
+ regw(val, CLDCOFST);
+
+ if (bc->en) {
+ val = (bc->bc_mode_color & CCDC_BC_MODE_COLOR_MASK) <<
+ CCDC_BC_MODE_COLOR_SHIFT;
+
+ /* Enable BC and horizontal clamp caculation paramaters */
+ val = val | 1 | ((bc->horz.mode & CCDC_HORZ_BC_MODE_MASK) <<
+ CCDC_HORZ_BC_MODE_SHIFT);
+
+ regw(val, CLAMPCFG);
+
+ if (bc->horz.mode != CCDC_HORZ_BC_DISABLE) {
+ /**
+ * Window count for calculation
+ * Base window selection
+ * pixel limit
+ * Horizontal size of window
+ * vertical size of the window
+ * Horizontal start position of the window
+ * Vertical start position of the window
+ */
+ val = (bc->horz.win_count_calc &
+ CCDC_HORZ_BC_WIN_COUNT_MASK) |
+ ((bc->horz.base_win_sel_calc & 1)
+ << CCDC_HORZ_BC_WIN_SEL_SHIFT) |
+ ((bc->horz.clamp_pix_limit & 1)
+ << CCDC_HORZ_BC_PIX_LIMIT_SHIFT) |
+ ((bc->horz.win_h_sz_calc &
+ CCDC_HORZ_BC_WIN_H_SIZE_MASK)
+ << CCDC_HORZ_BC_WIN_H_SIZE_SHIFT) |
+ ((bc->horz.win_v_sz_calc &
+ CCDC_HORZ_BC_WIN_V_SIZE_MASK)
+ << CCDC_HORZ_BC_WIN_V_SIZE_SHIFT);
+
+ regw(val, CLHWIN0);
+
+ val = (bc->horz.win_start_h_calc &
+ CCDC_HORZ_BC_WIN_START_H_MASK);
+ regw(val, CLHWIN1);
+
+ val =
+ (bc->horz.
+ win_start_v_calc & CCDC_HORZ_BC_WIN_START_V_MASK);
+ regw(val, CLHWIN2);
+ }
+
+ /* vertical clamp caculation paramaters */
+
+ /* OB H Valid */
+ val = (bc->vert.ob_h_sz_calc & CCDC_VERT_BC_OB_H_SZ_MASK);
+
+ /* Reset clamp value sel for previous line */
+ val |= ((bc->vert.reset_val_sel &
+ CCDC_VERT_BC_RST_VAL_SEL_MASK)
+ << CCDC_VERT_BC_RST_VAL_SEL_SHIFT);
+
+ /* Line average coefficient */
+ val |= (bc->vert.line_ave_coef <<
+ CCDC_VERT_BC_LINE_AVE_COEF_SHIFT);
+ regw(val, CLVWIN0);
+
+ /* Configured reset value */
+ if (bc->vert.reset_val_sel ==
+ CCDC_VERT_BC_USE_CONFIG_CLAMP_VAL) {
+ val =
+ (bc->vert.
+ reset_clamp_val & CCDC_VERT_BC_RST_VAL_MASK);
+ regw(val, CLVRV);
+ }
+
+ /* Optical Black horizontal start position */
+ val = (bc->vert.ob_start_h & CCDC_VERT_BC_OB_START_HORZ_MASK);
+ regw(val, CLVWIN1);
+
+ /* Optical Black vertical start position */
+ val = (bc->vert.ob_start_v & CCDC_VERT_BC_OB_START_VERT_MASK);
+ regw(val, CLVWIN2);
+
+ val = (bc->vert.ob_v_sz_calc & CCDC_VERT_BC_OB_VERT_SZ_MASK);
+ regw(val, CLVWIN3);
+
+ /* Vertical start position for BC subtraction */
+ val = (bc->vert_start_sub & CCDC_BC_VERT_START_SUB_V_MASK);
+ regw(val, CLSV);
+ }
+}
+
+static void ccdc_config_linearization(struct ccdc_linearize *linearize)
+{
+ u32 val, i;
+ if (!linearize->en) {
+ regw(0, LINCFG0);
+ return;
+ }
+
+ /* shift value for correction */
+ val = (linearize->corr_shft & CCDC_LIN_CORRSFT_MASK)
+ << CCDC_LIN_CORRSFT_SHIFT;
+ /* enable */
+ val |= 1;
+ regw(val, LINCFG0);
+
+ /* Scale factor */
+ val = (linearize->scale_fact.integer & 1)
+ << CCDC_LIN_SCALE_FACT_INTEG_SHIFT;
+ val |= (linearize->scale_fact.decimal &
+ CCDC_LIN_SCALE_FACT_DECIMAL_MASK);
+ regw(val, LINCFG1);
+
+ for (i = 0; i < CCDC_LINEAR_TAB_SIZE; i++) {
+ val = linearize->table[i] & CCDC_LIN_ENTRY_MASK;
+ if (i%2)
+ regw_lin_tbl(val, ((i >> 1) << 2), 1);
+ else
+ regw_lin_tbl(val, ((i >> 1) << 2), 0);
+ }
+}
+
+static void ccdc_config_dfc(struct ccdc_dfc *vdfc)
+{
+#define DFC_WRITE_WAIT_COUNT 1000
+ u32 val, count = DFC_WRITE_WAIT_COUNT;
+ int i;
+
+ if (!vdfc->en)
+ return;
+
+ /* Correction mode */
+ val = ((vdfc->corr_mode & CCDC_VDFC_CORR_MOD_MASK)
+ << CCDC_VDFC_CORR_MOD_SHIFT);
+
+ /* Correct whole line or partial */
+ if (vdfc->corr_whole_line)
+ val |= 1 << CCDC_VDFC_CORR_WHOLE_LN_SHIFT;
+
+ /* level shift value */
+ val |= (vdfc->def_level_shift & CCDC_VDFC_LEVEL_SHFT_MASK) <<
+ CCDC_VDFC_LEVEL_SHFT_SHIFT;
+
+ regw(val, DFCCTL);
+
+ /* Defect saturation level */
+ val = vdfc->def_sat_level & CCDC_VDFC_SAT_LEVEL_MASK;
+ regw(val, VDFSATLV);
+
+ regw(vdfc->table[0].pos_vert & CCDC_VDFC_POS_MASK, DFCMEM0);
+ regw(vdfc->table[0].pos_horz & CCDC_VDFC_POS_MASK, DFCMEM1);
+ if (vdfc->corr_mode == CCDC_VDFC_NORMAL ||
+ vdfc->corr_mode == CCDC_VDFC_HORZ_INTERPOL_IF_SAT) {
+ regw(vdfc->table[0].level_at_pos, DFCMEM2);
+ regw(vdfc->table[0].level_up_pixels, DFCMEM3);
+ regw(vdfc->table[0].level_low_pixels, DFCMEM4);
+ }
+
+ val = regr(DFCMEMCTL);
+ /* set DFCMARST and set DFCMWR */
+ val |= 1 << CCDC_DFCMEMCTL_DFCMARST_SHIFT;
+ val |= 1;
+ regw(val, DFCMEMCTL);
+
+ while (count && (regr(DFCMEMCTL) & 0x01))
+ count--;
+
+ val = regr(DFCMEMCTL);
+ if (!count) {
+ dev_dbg(dev, "defect table write timeout !!!\n");
+ return;
+ }
+
+ for (i = 1; i < vdfc->num_vdefects; i++) {
+ regw(vdfc->table[i].pos_vert & CCDC_VDFC_POS_MASK,
+ DFCMEM0);
+ regw(vdfc->table[i].pos_horz & CCDC_VDFC_POS_MASK,
+ DFCMEM1);
+ if (vdfc->corr_mode == CCDC_VDFC_NORMAL ||
+ vdfc->corr_mode == CCDC_VDFC_HORZ_INTERPOL_IF_SAT) {
+ regw(vdfc->table[i].level_at_pos, DFCMEM2);
+ regw(vdfc->table[i].level_up_pixels, DFCMEM3);
+ regw(vdfc->table[i].level_low_pixels, DFCMEM4);
+ }
+ val = regr(DFCMEMCTL);
+ /* clear DFCMARST and set DFCMWR */
+ val &= ~(1 << CCDC_DFCMEMCTL_DFCMARST_SHIFT);
+ val |= 1;
+ regw(val, DFCMEMCTL);
+
+ count = DFC_WRITE_WAIT_COUNT;
+ while (count && (regr(DFCMEMCTL) & 0x01))
+ count--;
+
+ val = regr(DFCMEMCTL);
+ if (!count) {
+ dev_err(dev, "defect table write timeout !!!\n");
+ return;
+ }
+ }
+ if (vdfc->num_vdefects < CCDC_VDFC_TABLE_SIZE) {
+ /* Extra cycle needed */
+ regw(0, DFCMEM0);
+ regw(0x1FFF, DFCMEM1);
+ val = 1;
+ regw(val, DFCMEMCTL);
+ }
+
+ /* enable VDFC */
+ ccdc_merge((1 << CCDC_VDFC_EN_SHIFT), (1 << CCDC_VDFC_EN_SHIFT),
+ DFCCTL);
+
+ ccdc_merge((1 << CCDC_VDFC_EN_SHIFT), (0 << CCDC_VDFC_EN_SHIFT),
+ DFCCTL);
+
+ regw(0x6, DFCMEMCTL);
+ for (i = 0 ; i < vdfc->num_vdefects; i++) {
+ count = DFC_WRITE_WAIT_COUNT;
+ while (count && (regr(DFCMEMCTL) & 0x2))
+ count--;
+
+ val = regr(DFCMEMCTL);
+ if (!count) {
+ dev_err(dev, "defect table write timeout !!!\n");
+ return;
+ }
+
+ val = regr(DFCMEM0) | regr(DFCMEM1) | regr(DFCMEM2) |
+ regr(DFCMEM3) | regr(DFCMEM4);
+ regw(0x2, DFCMEMCTL);
+ }
+}
+
+static void ccdc_config_csc(struct ccdc_df_csc *df_csc)
+{
+ u32 val1 = 0, val2 = 0, i;
+
+ if (!df_csc->csc.en) {
+ regw(0, CSCCTL);
+ return;
+ }
+ for (i = 0; i < CCDC_CSC_NUM_COEFF; i++) {
+ if ((i % 2) == 0) {
+ /* CSCM - LSB */
+ val1 =
+ ((df_csc->csc.coeff[i].integer &
+ CCDC_CSC_COEF_INTEG_MASK)
+ << CCDC_CSC_COEF_INTEG_SHIFT) |
+ ((df_csc->csc.coeff[i].decimal &
+ CCDC_CSC_COEF_DECIMAL_MASK));
+ } else {
+
+ /* CSCM - MSB */
+ val2 =
+ ((df_csc->csc.coeff[i].integer &
+ CCDC_CSC_COEF_INTEG_MASK)
+ << CCDC_CSC_COEF_INTEG_SHIFT) |
+ ((df_csc->csc.coeff[i].decimal &
+ CCDC_CSC_COEF_DECIMAL_MASK));
+ val2 <<= CCDC_CSCM_MSB_SHIFT;
+ val2 |= val1;
+ regw(val2, (CSCM0 + ((i-1) << 1)));
+ }
+ }
+
+ /* program the active area */
+ regw(df_csc->start_pix & CCDC_DF_CSC_SPH_MASK, FMTSPH);
+ /**
+ * one extra pixel as required for CSC. Actually number of
+ * pixel - 1 should be configured in this register. So we
+ * need to subtract 1 before writing to FMTSPH, but we will
+ * not do this since csc requires one extra pixel
+ */
+ regw((df_csc->num_pixels) & CCDC_DF_CSC_SPH_MASK, FMTLNH);
+ regw(df_csc->start_line & CCDC_DF_CSC_SPH_MASK, FMTSLV);
+ /**
+ * one extra line as required for CSC. See reason documented for
+ * num_pixels
+ */
+ regw((df_csc->num_lines) & CCDC_DF_CSC_SPH_MASK, FMTLNV);
+
+ /* Enable CSC */
+ regw(1, CSCCTL);
+}
+
+static int ccdc_config_raw(int mode)
+{
+ struct ccdc_params_raw *params = &ccdc_cfg.bayer;
+ struct ccdc_config_params_raw *module_params =
+ &ccdc_cfg.bayer.config_params;
+ struct vpss_pg_frame_size frame_size;
+ struct vpss_sync_pol sync;
+ u32 val;
+
+ dev_dbg(dev, "\nStarting ccdc_config_raw..\n");
+
+ /* Configure CCDCFG register */
+
+ /**
+ * Set CCD Not to swap input since input is RAW data
+ * Set FID detection function to Latch at V-Sync
+ * Set WENLOG - ccdc valid area
+ * Set TRGSEL
+ * Set EXTRG
+ * Packed to 8 or 16 bits
+ */
+
+ val = CCDC_YCINSWP_RAW | CCDC_CCDCFG_FIDMD_LATCH_VSYNC |
+ CCDC_CCDCFG_WENLOG_AND | CCDC_CCDCFG_TRGSEL_WEN |
+ CCDC_CCDCFG_EXTRG_DISABLE | (ccdc_cfg.data_pack &
+ CCDC_DATA_PACK_MASK);
+
+ dev_dbg(dev, "Writing 0x%x to ...CCDCFG \n", val);
+ regw(val, CCDCFG);
+
+ /**
+ * Configure the vertical sync polarity(MODESET.VDPOL)
+ * Configure the horizontal sync polarity (MODESET.HDPOL)
+ * Configure frame id polarity (MODESET.FLDPOL)
+ * Configure data polarity
+ * Configure External WEN Selection
+ * Configure frame format(progressive or interlace)
+ * Configure pixel format (Input mode)
+ * Configure the data shift
+ */
+
+ val = CCDC_VDHDOUT_INPUT |
+ ((params->vd_pol & CCDC_VD_POL_MASK) << CCDC_VD_POL_SHIFT) |
+ ((params->hd_pol & CCDC_HD_POL_MASK) << CCDC_HD_POL_SHIFT) |
+ ((params->fid_pol & CCDC_FID_POL_MASK) << CCDC_FID_POL_SHIFT) |
+ ((CCDC_DATAPOL_NORMAL & CCDC_DATAPOL_MASK)
+ << CCDC_DATAPOL_SHIFT) |
+ ((CCDC_EXWEN_DISABLE & CCDC_EXWEN_MASK) << CCDC_EXWEN_SHIFT) |
+ ((params->frm_fmt & CCDC_FRM_FMT_MASK) << CCDC_FRM_FMT_SHIFT) |
+ ((params->pix_fmt & CCDC_INPUT_MASK) << CCDC_INPUT_SHIFT) |
+ ((params->config_params.data_shift & CCDC_DATASFT_MASK)
+ << CCDC_DATASFT_SHIFT);
+
+ regw(val, MODESET);
+ dev_dbg(dev, "Writing 0x%x to MODESET...\n", val);
+
+ /**
+ * Configure GAMMAWD register
+ * CFA pattern setting
+ */
+ val = (params->cfa_pat & CCDC_GAMMAWD_CFA_MASK) <<
+ CCDC_GAMMAWD_CFA_SHIFT;
+
+ /* Gamma msb */
+ if (module_params->compress.alg == CCDC_ALAW)
+ val = val | CCDC_ALAW_ENABLE;
+
+ val = val | ((params->data_msb & CCDC_ALAW_GAMA_WD_MASK) <<
+ CCDC_ALAW_GAMA_WD_SHIFT);
+ printk("VPFE REG GAMMAWD = %x\r\n", val);
+ regw(val, CGAMMAWD);
+
+ /* Configure DPCM compression settings */
+ if (module_params->compress.alg == CCDC_DPCM) {
+ val = 1 << CCDC_DPCM_EN_SHIFT;
+ val |= (module_params->compress.pred &
+ CCDC_DPCM_PREDICTOR_MASK) << CCDC_DPCM_PREDICTOR_SHIFT;
+ }
+
+ regw(val, MISC);
+ /* Configure Gain & Offset */
+
+ ccdc_config_gain_offset();
+
+ /* Configure Color pattern */
+ val = (params->config_params.col_pat_field0.olop) |
+ (params->config_params.col_pat_field0.olep << 2) |
+ (params->config_params.col_pat_field0.elop << 4) |
+ (params->config_params.col_pat_field0.elep << 6) |
+ (params->config_params.col_pat_field1.olop << 8) |
+ (params->config_params.col_pat_field1.olep << 10) |
+ (params->config_params.col_pat_field1.elop << 12) |
+ (params->config_params.col_pat_field1.elep << 14);
+ regw(val, CCOLP);
+ dev_dbg(dev, "Writing %x to CCOLP ...\n", val);
+
+ /* Configure HSIZE register */
+ val =
+ (params->
+ horz_flip_en & CCDC_HSIZE_FLIP_MASK) << CCDC_HSIZE_FLIP_SHIFT;
+
+ /* calculate line offset in 32 bytes based on pack value */
+ if (ccdc_cfg.data_pack == CCDC_PACK_8BIT)
+ val |= (((params->win.width + 31) >> 5) & CCDC_LINEOFST_MASK);
+ else if (ccdc_cfg.data_pack == CCDC_PACK_12BIT)
+ val |= ((((params->win.width +
+ (params->win.width >> 2)) +
+ 31) >> 5) & CCDC_LINEOFST_MASK);
+ else
+ val |=
+ ((((params->win.width * 2) +
+ 31) >> 5) & CCDC_LINEOFST_MASK);
+ regw(val, HSIZE);
+
+ /* Configure SDOFST register */
+ if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
+ if (params->image_invert_en) {
+ /* For interlace inverse mode */
+ regw(0x4B6D, SDOFST);
+ dev_dbg(dev, "Writing 0x4B6D to SDOFST...\n");
+ } else {
+ /* For interlace non inverse mode */
+ regw(0x0B6D, SDOFST);
+ dev_dbg(dev, "Writing 0x0B6D to SDOFST...\n");
+ }
+ } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
+ if (params->image_invert_en) {
+ /* For progessive inverse mode */
+ regw(0x4000, SDOFST);
+ dev_dbg(dev, "Writing 0x4000 to SDOFST...\n");
+ } else {
+ /* For progessive non inverse mode */
+ regw(0x0000, SDOFST);
+ dev_dbg(dev, "Writing 0x0000 to SDOFST...\n");
+ }
+ }
+
+ /* Configure video window */
+ ccdc_setwin(&params->win, params->frm_fmt, 1, mode);
+
+ /* Configure Black Clamp */
+ ccdc_config_bclamp(&module_params->bclamp);
+
+ /* Configure Vertical Defection Pixel Correction */
+ ccdc_config_dfc(&module_params->dfc);
+
+ if (!module_params->df_csc.df_or_csc)
+ /* Configure Color Space Conversion */
+ ccdc_config_csc(&module_params->df_csc);
+
+ ccdc_config_linearization(&module_params->linearize);
+
+ /* Configure Culling */
+ ccdc_config_culling(&module_params->culling);
+
+ /* Configure Horizontal and vertical offsets(DFC,LSC,Gain) */
+ val = module_params->horz_offset & CCDC_DATA_H_OFFSET_MASK;
+ regw(val, DATAHOFST);
+
+ val = module_params->vert_offset & CCDC_DATA_V_OFFSET_MASK;
+ regw(val, DATAVOFST);
+
+ /* Setup test pattern if enabled */
+ if (params->config_params.test_pat_gen) {
+ /* Use the HD/VD pol settings from user */
+ sync.ccdpg_hdpol = params->hd_pol & CCDC_HD_POL_MASK;
+ sync.ccdpg_vdpol = params->vd_pol & CCDC_VD_POL_MASK;
+
+ vpss_set_sync_pol(sync);
+
+ frame_size.hlpfr = ccdc_cfg.bayer.win.width;
+ frame_size.pplen = ccdc_cfg.bayer.win.height;
+ vpss_set_pg_frame_size(frame_size);
+ vpss_select_ccdc_source(VPSS_PGLPBK);
+ }
+
+ dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n");
+ return 0;
+}
+
+static int ccdc_validate_df_csc_params(struct ccdc_df_csc *df_csc)
+{
+ struct ccdc_color_space_conv *csc;
+ int i, csc_df_en = 0;
+ int err = -EINVAL;
+
+ if (!df_csc->df_or_csc) {
+ /* csc configuration */
+ csc = &df_csc->csc;
+ if (csc->en) {
+ csc_df_en = 1;
+ for (i = 0; i < CCDC_CSC_NUM_COEFF; i++) {
+ if (csc->coeff[i].integer >
+ CCDC_CSC_COEF_INTEG_MASK ||
+ csc->coeff[i].decimal >
+ CCDC_CSC_COEF_DECIMAL_MASK) {
+ dev_dbg(dev,
+ "invalid csc coefficients \n");
+ return err;
+ }
+ }
+ }
+ }
+
+ if (df_csc->start_pix > CCDC_DF_CSC_SPH_MASK) {
+ dev_dbg(dev, "invalid df_csc start pix value \n");
+ return err;
+ }
+ if (df_csc->num_pixels > CCDC_DF_NUMPIX) {
+ dev_dbg(dev, "invalid df_csc num pixels value \n");
+ return err;
+ }
+ if (df_csc->start_line > CCDC_DF_CSC_LNH_MASK) {
+ dev_dbg(dev, "invalid df_csc start_line value \n");
+ return err;
+ }
+ if (df_csc->num_lines > CCDC_DF_NUMLINES) {
+ dev_dbg(dev, "invalid df_csc num_lines value \n");
+ return err;
+ }
+ return 0;
+}
+
+static int ccdc_validate_dfc_params(struct ccdc_dfc *dfc)
+{
+ int err = -EINVAL;
+ int i;
+
+ if (dfc->en) {
+ if (dfc->corr_whole_line > 1) {
+ dev_dbg(dev, "invalid corr_whole_line value \n");
+ return err;
+ }
+
+ if (dfc->def_level_shift > 4) {
+ dev_dbg(dev, "invalid def_level_shift value \n");
+ return err;
+ }
+
+ if (dfc->def_sat_level > 4095) {
+ dev_dbg(dev, "invalid def_sat_level value \n");
+ return err;
+ }
+ if ((!dfc->num_vdefects) || (dfc->num_vdefects > 8)) {
+ dev_dbg(dev, "invalid num_vdefects value \n");
+ return err;
+ }
+ for (i = 0; i < CCDC_VDFC_TABLE_SIZE; i++) {
+ if (dfc->table[i].pos_vert > 0x1fff) {
+ dev_dbg(dev, "invalid pos_vert value \n");
+ return err;
+ }
+ if (dfc->table[i].pos_horz > 0x1fff) {
+ dev_dbg(dev, "invalid pos_horz value \n");
+ return err;
+ }
+ }
+ }
+ return 0;
+}
+
+static int ccdc_validate_bclamp_params(struct ccdc_black_clamp *bclamp)
+{
+ int err = -EINVAL;
+
+ if (bclamp->dc_offset > 0x1fff) {
+ dev_dbg(dev, "invalid bclamp dc_offset value \n");
+ return err;
+ }
+
+ if (bclamp->en) {
+ if (bclamp->horz.clamp_pix_limit > 1) {
+ dev_dbg(dev,
+ "invalid bclamp horz clamp_pix_limit value \n");
+ return err;
+ }
+
+ if (bclamp->horz.win_count_calc < 1 ||
+ bclamp->horz.win_count_calc > 32) {
+ dev_dbg(dev,
+ "invalid bclamp horz win_count_calc value \n");
+ return err;
+ }
+
+ if (bclamp->horz.win_start_h_calc > 0x1fff) {
+ dev_dbg(dev,
+ "invalid bclamp win_start_v_calc value \n");
+ return err;
+ }
+
+ if (bclamp->horz.win_start_v_calc > 0x1fff) {
+ dev_dbg(dev,
+ "invalid bclamp win_start_v_calc value \n");
+ return err;
+ }
+
+ if (bclamp->vert.reset_clamp_val > 0xfff) {
+ dev_dbg(dev,
+ "invalid bclamp reset_clamp_val value \n");
+ return err;
+ }
+
+ if (bclamp->vert.ob_v_sz_calc > 0x1fff) {
+ dev_dbg(dev, "invalid bclamp ob_v_sz_calc value \n");
+ return err;
+ }
+
+ if (bclamp->vert.ob_start_h > 0x1fff) {
+ dev_dbg(dev, "invalid bclamp ob_start_h value \n");
+ return err;
+ }
+
+ if (bclamp->vert.ob_start_v > 0x1fff) {
+ dev_dbg(dev, "invalid bclamp ob_start_h value \n");
+ return err;
+ }
+ }
+ return 0;
+}
+
+static int ccdc_validate_gain_ofst_params(struct ccdc_gain_offsets_adj
+ *gain_offset)
+{
+ int err = -EINVAL;
+
+ if (gain_offset->gain_sdram_en ||
+ gain_offset->gain_ipipe_en ||
+ gain_offset->gain_h3a_en) {
+ if ((gain_offset->gain.r_ye.integer > 7) ||
+ (gain_offset->gain.r_ye.decimal > 0x1ff)) {
+ dev_dbg(dev, "invalid gain r_ye\n");
+ return err;
+ }
+ if ((gain_offset->gain.gr_cy.integer > 7) ||
+ (gain_offset->gain.gr_cy.decimal > 0x1ff)) {
+ dev_dbg(dev, "invalid gain gr_cy\n");
+ return err;
+ }
+ if ((gain_offset->gain.gb_g.integer > 7) ||
+ (gain_offset->gain.gb_g.decimal > 0x1ff)) {
+ dev_dbg(dev, "invalid gain gb_g\n");
+ return err;
+ }
+ if ((gain_offset->gain.b_mg.integer > 7) ||
+ (gain_offset->gain.b_mg.decimal > 0x1ff)) {
+ dev_dbg(dev, "invalid gain b_mg\n");
+ return err;
+ }
+ }
+ if (gain_offset->offset_sdram_en ||
+ gain_offset->offset_ipipe_en ||
+ gain_offset->offset_h3a_en) {
+ if (gain_offset->offset > 0xfff) {
+ dev_dbg(dev, "invalid gain b_mg\n");
+ return err;
+ }
+ }
+
+ return 0;
+}
+
+static int
+validate_ccdc_config_params_raw(struct ccdc_config_params_raw *params)
+{
+ int err;
+
+ err = ccdc_validate_df_csc_params(&params->df_csc);
+ if (err)
+ goto exit;
+ err = ccdc_validate_dfc_params(&params->dfc);
+ if (err)
+ goto exit;
+ err = ccdc_validate_bclamp_params(&params->bclamp);
+ if (err)
+ goto exit;
+ err = ccdc_validate_gain_ofst_params(&params->gain_offset);
+exit:
+ return err;
+}
+
+static int ccdc_set_buftype(enum ccdc_buftype buf_type)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.buf_type = buf_type;
+ else
+ ccdc_cfg.ycbcr.buf_type = buf_type;
+
+ return 0;
+
+}
+static enum ccdc_buftype ccdc_get_buftype(void)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.buf_type;
+
+ return ccdc_cfg.ycbcr.buf_type;
+}
+
+static int ccdc_enum_pix(u32 *pix, int i)
+{
+ int ret = -EINVAL;
+
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
+ *pix = ccdc_raw_bayer_pix_formats[i];
+ ret = 0;
+ }
+ } else {
+ if (i < ARRAY_SIZE(ccdc_raw_yuv_pix_formats)) {
+ *pix = ccdc_raw_yuv_pix_formats[i];
+ ret = 0;
+ }
+ }
+
+ return ret;
+}
+
+static int ccdc_set_pixel_format(unsigned int pixfmt)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ if (pixfmt == V4L2_PIX_FMT_SBGGR8) {
+ if ((ccdc_cfg.bayer.config_params.compress.alg !=
+ CCDC_ALAW) &&
+ (ccdc_cfg.bayer.config_params.compress.alg !=
+ CCDC_DPCM)) {
+ dev_dbg(dev, "Either configure A-Law or"
+ "DPCM\n");
+ return -EINVAL;
+ }
+ ccdc_cfg.data_pack = CCDC_PACK_8BIT;
+ } else if (pixfmt == V4L2_PIX_FMT_SBGGR16) {
+ ccdc_cfg.bayer.config_params.compress.alg =
+ CCDC_NO_COMPRESSION;
+ ccdc_cfg.data_pack = CCDC_PACK_16BIT;
+ } else
+ return -EINVAL;
+ ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
+ } else {
+ if (pixfmt == V4L2_PIX_FMT_YUYV)
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
+ else if (pixfmt == V4L2_PIX_FMT_UYVY)
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
+ else
+ return -EINVAL;
+ ccdc_cfg.data_pack = CCDC_PACK_8BIT;
+ }
+ return 0;
+}
+
+static u32 ccdc_get_pixel_format(void)
+{
+ u32 pixfmt;
+
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.bayer.config_params.compress.alg
+ == CCDC_ALAW
+ || ccdc_cfg.bayer.config_params.compress.alg
+ == CCDC_DPCM)
+ pixfmt = V4L2_PIX_FMT_SBGGR8;
+ else
+ pixfmt = V4L2_PIX_FMT_SBGGR16;
+ else {
+ if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
+ pixfmt = V4L2_PIX_FMT_YUYV;
+ else
+ pixfmt = V4L2_PIX_FMT_UYVY;
+ }
+ return pixfmt;
+}
+
+static int ccdc_set_image_window(struct v4l2_rect *win)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ ccdc_cfg.bayer.win.top = win->top;
+ ccdc_cfg.bayer.win.left = win->left;
+ ccdc_cfg.bayer.win.width = win->width;
+ ccdc_cfg.bayer.win.height = win->height;
+ } else {
+ ccdc_cfg.ycbcr.win.top = win->top;
+ ccdc_cfg.ycbcr.win.left = win->left;
+ ccdc_cfg.ycbcr.win.width = win->width;
+ ccdc_cfg.ycbcr.win.height = win->height;
+ }
+ return 0;
+}
+
+static void ccdc_get_image_window(struct v4l2_rect *win)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ *win = ccdc_cfg.bayer.win;
+ else
+ *win = ccdc_cfg.ycbcr.win;
+}
+
+static unsigned int ccdc_get_line_length(void)
+{
+ unsigned int len;
+
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.data_pack == CCDC_PACK_8BIT)
+ len = ((ccdc_cfg.bayer.win.width));
+ else if (ccdc_cfg.data_pack == CCDC_PACK_12BIT)
+ len = (((ccdc_cfg.bayer.win.width * 2) +
+ (ccdc_cfg.bayer.win.width >> 2)));
+ else
+ len = (((ccdc_cfg.bayer.win.width * 2)));
+ } else
+ len = (((ccdc_cfg.ycbcr.win.width * 2)));
+
+ return ALIGN(len, 32);
+}
+
+static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.frm_fmt = frm_fmt;
+ else
+ ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
+
+ return 0;
+}
+static enum ccdc_frmfmt ccdc_get_frame_format(void)
+{
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.frm_fmt;
+ else
+ return ccdc_cfg.ycbcr.frm_fmt;
+}
+
+static int ccdc_getfid(void)
+{
+ return (regr(MODESET) >> 15) & 0x1;
+}
+
+/* misc operations */
+static void ccdc_setfbaddr(unsigned long addr)
+{
+ regw((addr >> 21) & 0x07ff, CADU);
+ regw((addr >> 5) & 0x0ffff, CADL);
+}
+
+static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
+{
+ ccdc_cfg.if_type = params->if_type;
+
+ switch (params->if_type) {
+ case VPFE_BT656:
+ case VPFE_BT656_10BIT:
+ case VPFE_YCBCR_SYNC_8:
+ ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
+ break;
+ case VPFE_BT1120:
+ case VPFE_YCBCR_SYNC_16:
+ ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
+ break;
+ case VPFE_RAW_BAYER:
+ ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
+ break;
+ default:
+ dev_dbg(dev, "Invalid interface type\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/* Parameter operations */
+static int ccdc_get_params(void __user *params)
+{
+ /* only raw module parameters can be set through the IOCTL */
+ if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
+ return -EINVAL;
+
+ if (copy_to_user(params,
+ &ccdc_cfg.bayer.config_params,
+ sizeof(ccdc_cfg.bayer.config_params))) {
+ dev_dbg(dev, "ccdc_get_params: error in copying ccdc params\n");
+ return -EFAULT;
+ }
+ return 0;
+}
+
+/* Parameter operations */
+static int ccdc_set_params(void __user *params)
+{
+ struct ccdc_config_params_raw *ccdc_raw_params;
+ int ret = -EINVAL;
+
+ /* only raw module parameters can be set through the IOCTL */
+ if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
+ return ret;
+
+ ccdc_raw_params = kzalloc(sizeof(*ccdc_raw_params), GFP_KERNEL);
+
+ if (NULL == ccdc_raw_params)
+ return -ENOMEM;
+
+ ret = copy_from_user(ccdc_raw_params,
+ params, sizeof(*ccdc_raw_params));
+ if (ret) {
+ dev_dbg(dev, "ccdc_set_params: error in copying ccdc"
+ "params, %d\n", ret);
+ ret = -EFAULT;
+ goto free_out;
+ }
+
+ if (!validate_ccdc_config_params_raw(ccdc_raw_params)) {
+ memcpy(&ccdc_cfg.bayer.config_params,
+ ccdc_raw_params,
+ sizeof(*ccdc_raw_params));
+ ret = 0;
+ } else
+ ret = -EINVAL;
+free_out:
+ kfree(ccdc_raw_params);
+ return ret;
+}
+
+/* This function will configure CCDC for YCbCr parameters. */
+static int ccdc_config_ycbcr(int mode)
+{
+ struct ccdc_ycbcr_config *params = &ccdc_cfg.ycbcr;
+ struct vpss_pg_frame_size frame_size;
+ u32 modeset = 0, ccdcfg = 0;
+ struct vpss_sync_pol sync;
+
+ /**
+ * first reset the CCDC
+ * all registers have default values after reset
+ * This is important since we assume default values to be set in
+ * a lot of registers that we didn't touch
+ */
+ dev_dbg(dev, "\nStarting ccdc_config_ycbcr...");
+
+ /* configure pixel format or input mode */
+ modeset = modeset | ((params->pix_fmt & CCDC_INPUT_MASK)
+ << CCDC_INPUT_SHIFT) |
+ ((params->frm_fmt & CCDC_FRM_FMT_MASK) << CCDC_FRM_FMT_SHIFT) |
+ (((params->fid_pol & CCDC_FID_POL_MASK) << CCDC_FID_POL_SHIFT)) |
+ (((params->hd_pol & CCDC_HD_POL_MASK) << CCDC_HD_POL_SHIFT)) |
+ (((params->vd_pol & CCDC_VD_POL_MASK) << CCDC_VD_POL_SHIFT));
+
+ /* pack the data to 8-bit CCDCCFG */
+ switch (ccdc_cfg.if_type) {
+ case VPFE_BT656:
+ if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
+ dev_dbg(dev, "Invalid pix_fmt(input mode)\n");
+ return -1;
+ }
+ modeset |=
+ ((VPFE_PINPOL_NEGATIVE & CCDC_VD_POL_MASK)
+ << CCDC_VD_POL_SHIFT);
+ regw(3, REC656IF);
+ ccdcfg = ccdcfg | CCDC_DATA_PACK8 | CCDC_YCINSWP_YCBCR;
+ break;
+ case VPFE_BT656_10BIT:
+ if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
+ dev_dbg(dev, "Invalid pix_fmt(input mode)\n");
+ return -1;
+ }
+ /* setup BT.656, embedded sync */
+ regw(3, REC656IF);
+ /* enable 10 bit mode in ccdcfg */
+ ccdcfg = ccdcfg | CCDC_DATA_PACK8 | CCDC_YCINSWP_YCBCR |
+ CCDC_BW656_ENABLE;
+ break;
+ case VPFE_BT1120:
+ if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
+ dev_dbg(dev, "Invalid pix_fmt(input mode)\n");
+ return -EINVAL;
+ }
+ regw(3, REC656IF);
+ break;
+
+ case VPFE_YCBCR_SYNC_8:
+#ifdef CONFIG_VIDEO_YCBCR
+ ccdcfg = CCDC_DATA_PACK8|CCDC_CCDCFG_WENLOG_OR;
+#else
+ ccdcfg |= CCDC_DATA_PACK8;
+ ccdcfg |= CCDC_YCINSWP_YCBCR;
+#endif
+ if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
+ dev_dbg(dev, "Invalid pix_fmt(input mode)\n");
+ return -EINVAL;
+ }
+ break;
+ case VPFE_YCBCR_SYNC_16:
+ if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
+ dev_dbg(dev, "Invalid pix_fmt(input mode)\n");
+ return -EINVAL;
+ }
+ break;
+ default:
+ /* should never come here */
+ dev_dbg(dev, "Invalid interface type\n");
+ return -EINVAL;
+ }
+
+ regw(modeset, MODESET);
+
+ /* Set up pix order */
+ ccdcfg |= (params->pix_order & CCDC_PIX_ORDER_MASK) <<
+ CCDC_PIX_ORDER_SHIFT;
+
+ regw(ccdcfg, CCDCFG);
+
+ /* configure video window */
+ if ((ccdc_cfg.if_type == VPFE_BT1120) ||
+ (ccdc_cfg.if_type == VPFE_YCBCR_SYNC_16))
+ ccdc_setwin(&params->win, params->frm_fmt, 1, mode);
+ else
+ ccdc_setwin(&params->win, params->frm_fmt, 2, mode);
+
+ /**
+ * configure the horizontal line offset
+ * this is done by rounding up width to a multiple of 16 pixels
+ * and multiply by two to account for y:cb:cr 4:2:2 data
+ */
+ regw(((((params->win.width * 2) + 31) & 0xffffffe0) >> 5), HSIZE);
+
+ /* configure the memory line offset */
+ if ((params->frm_fmt == CCDC_FRMFMT_INTERLACED) &&
+ (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED)) {
+ /* two fields are interleaved in memory */
+ regw(0x00000249, SDOFST);
+ }
+
+ /* Setup test pattern if enabled */
+ if (ccdc_cfg.bayer.config_params.test_pat_gen) {
+ sync.ccdpg_hdpol = (params->hd_pol & CCDC_HD_POL_MASK);
+ sync.ccdpg_vdpol = (params->vd_pol & CCDC_VD_POL_MASK);
+ vpss_set_sync_pol(sync);
+ vpss_set_pg_frame_size(frame_size);
+ }
+
+ return 0;
+}
+
+static int ccdc_configure(int mode)
+{
+#ifndef CONFIG_VIDEO_YCBCR
+ printk("CCDC CONFIGURE");
+ return ccdc_config_raw(mode);
+#endif
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_config_raw(mode);
+ else
+ ccdc_config_ycbcr(mode);
+
+ return 0;
+}
+
+static int ccdc_close(struct device *device)
+{
+ /* copy defaults to module params */
+ memcpy(&ccdc_cfg.bayer.config_params,
+ &ccdc_config_defaults,
+ sizeof(struct ccdc_config_params_raw));
+
+ return 0;
+}
+static void ccdc_dump_hw_config(void)
+{
+ u32 utemp;
+
+ printk(KERN_NOTICE"ISIF registers:\n");
+ utemp = regr(SYNCEN);
+ printk(KERN_NOTICE"ISIF_SYNCEN = 0x%x\n", utemp);
+ utemp = regr(MODESET);
+ printk(KERN_NOTICE"ISIF_MODESET = 0x%x\n", utemp);
+ utemp = regr(CCDCFG);
+ printk(KERN_NOTICE"ISIF_CCDCFG = 0x%x\n", utemp);
+ utemp = regr(CADU);
+ printk(KERN_NOTICE"ISIF_CADU = 0x%x\n", utemp);
+ utemp = regr(CADL);
+ printk(KERN_NOTICE"ISIF_CADL = 0x%x\n", utemp);
+ utemp = regr(HSIZE);
+ printk(KERN_NOTICE"ISIF_HSIZE = 0x%x\n", utemp);
+ utemp = regr(SDOFST);
+ printk(KERN_NOTICE"ISIF_SDOFST = 0x%x\n", utemp);
+ utemp = regr(HDW);
+ printk(KERN_NOTICE"ISIF_HDW = 0x%x\n", utemp);
+ utemp = regr(VDW);
+ printk(KERN_NOTICE"ISIF_VDW = 0x%x\n", utemp);
+ utemp = regr(PPLN);
+ printk(KERN_NOTICE"ISIF_PPLN = 0x%x\n", utemp);
+ utemp = regr(LPFR);
+ printk(KERN_NOTICE"ISIF_LPFR = 0x%x\n", utemp);
+ utemp = regr(SPH);
+ printk(KERN_NOTICE"ISIF_SPH = 0x%x\n", utemp);
+ utemp = regr(LNH);
+ printk(KERN_NOTICE"ISIF_LNH = 0x%x\n", utemp);
+ utemp = regr(SLV0);
+ printk(KERN_NOTICE"ISIF_SLV0 = 0x%x\n", utemp);
+ utemp = regr(SLV1);
+ printk(KERN_NOTICE"ISIF_SLV1 = 0x%x\n", utemp);
+ utemp = regr(LNV);
+ printk(KERN_NOTICE"ISIF_LNV = 0x%x\n", utemp);
+ utemp = regr(CULH);
+ printk(KERN_NOTICE"ISIF_CULH = 0x%x\n", utemp);
+ utemp = regr(CULV);
+ printk(KERN_NOTICE"ISIF_CULV = 0x%x\n", utemp);
+ utemp = regr(HSIZE);
+ printk(KERN_NOTICE"ISIF_HSIZE = 0x%x\n", utemp);
+ utemp = regr(SDOFST);
+ printk(KERN_NOTICE"ISIF_SDOFST = 0x%x\n", utemp);
+ utemp = regr(CADU);
+ printk(KERN_NOTICE"ISIF_CADU = 0x%x\n", utemp);
+ utemp = regr(CADL);
+ printk(KERN_NOTICE"ISIF_CADL = 0x%x\n", utemp);
+ utemp = regr(LINCFG0);
+ printk(KERN_NOTICE"ISIF_LINCFG0 = 0x%x\n", utemp);
+ utemp = regr(LINCFG1);
+ printk(KERN_NOTICE"ISIF_LINCFG1 = 0x%x\n", utemp);
+ utemp = regr(VDINT0);
+ printk(KERN_NOTICE"ISIF_VDINT0 = 0x%x\n", utemp);
+ utemp = regr(VDINT1);
+ printk(KERN_NOTICE"ISIF_VDINT1 = 0x%x\n", utemp);
+ utemp = regr(VDINT2);
+ printk(KERN_NOTICE"ISIF_VDINT2 = 0x%x\n", utemp);
+ utemp = regr(MISC);
+ printk(KERN_NOTICE"ISIF_MISC = 0x%x\n", utemp);
+ utemp = regr(CGAMMAWD);
+ printk(KERN_NOTICE"ISIF_CGAMMAWD = 0x%x\n", utemp);
+ utemp = regr(REC656IF);
+ printk(KERN_NOTICE"ISIF_REC656IF = 0x%x\n", utemp);
+
+ return;
+}
+
+static struct ccdc_hw_device ccdc_hw_dev = {
+ .name = "DM365 ISIF",
+ .owner = THIS_MODULE,
+ .hw_ops = {
+ .open = ccdc_open,
+ .close = ccdc_close,
+ .enable = ccdc_enable,
+ .enable_out_to_sdram = ccdc_enable_output_to_sdram,
+ .set_hw_if_params = ccdc_set_hw_if_params,
+ .set_params = ccdc_set_params,
+ .get_params = ccdc_get_params,
+ .configure = ccdc_configure,
+ .set_buftype = ccdc_set_buftype,
+ .get_buftype = ccdc_get_buftype,
+ .enum_pix = ccdc_enum_pix,
+ .set_pixel_format = ccdc_set_pixel_format,
+ .get_pixel_format = ccdc_get_pixel_format,
+ .set_frame_format = ccdc_set_frame_format,
+ .get_frame_format = ccdc_get_frame_format,
+ .set_image_window = ccdc_set_image_window,
+ .get_image_window = ccdc_get_image_window,
+ .get_line_length = ccdc_get_line_length,
+ .setfbaddr = ccdc_setfbaddr,
+ .getfid = ccdc_getfid,
+ .isif_dump_hw_config = ccdc_dump_hw_config,
+ },
+};
+
+static int dm365_ccdc_probe(struct platform_device *pdev)
+{
+ static resource_size_t res_len;
+ struct resource *res;
+ void *__iomem addr;
+ int status = 0, i;
+ printk("PROBE CCDC\r\n");
+ /**
+ * first try to register with vpfe. If not correct platform, then we
+ * don't have to iomap
+ */
+ status = vpfe_register_ccdc_device(&ccdc_hw_dev);
+ if (status < 0)
+ return status;
+
+ i = 0;
+ /* Get the ISIF base address, linearization table0 and table1 addr. */
+ while (i < 3) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ if (!res) {
+ status = -ENOENT;
+ goto fail_nobase_res;
+ }
+ res_len = res->end - res->start + 1;
+ res = request_mem_region(res->start, res_len, res->name);
+ if (!res) {
+ status = -EBUSY;
+ goto fail_nobase_res;
+ }
+ addr = ioremap_nocache(res->start, res_len);
+ if (!addr) {
+ status = -EBUSY;
+ goto fail_base_iomap;
+ }
+ switch (i) {
+ case 0:
+ /* ISIF base address */
+ ccdc_cfg.base_addr = addr;
+ break;
+ case 1:
+ /* ISIF linear tbl0 address */
+ ccdc_cfg.linear_tbl0_addr = addr;
+ break;
+ default:
+ /* ISIF linear tbl0 address */
+ ccdc_cfg.linear_tbl1_addr = addr;
+ break;
+ }
+ i++;
+ }
+
+ //davinci_cfg_reg(DM365_VIN_CAM_WEN);
+ davinci_cfg_reg(DM365_VIN_CAM_VD);
+ davinci_cfg_reg(DM365_VIN_CAM_HD);
+ davinci_cfg_reg(DM365_VIN_YIN4_7_EN);
+ davinci_cfg_reg(DM365_VIN_YIN0_3_EN);
+ printk("CCDC_CONFIGURE BEFORE\r\n");
+#ifndef CONFIG_VIDE_YCBCR
+ ccdc_hw_dev.hw_ops.configure(0);
+#endif
+ printk(KERN_NOTICE "%s is registered with vpfe.\n",
+ ccdc_hw_dev.name);
+ return 0;
+fail_base_iomap:
+
+ release_mem_region(res->start, res_len);
+ i--;
+fail_nobase_res:
+ if (ccdc_cfg.base_addr)
+ iounmap(ccdc_cfg.base_addr);
+ if (ccdc_cfg.linear_tbl0_addr)
+ iounmap(ccdc_cfg.linear_tbl0_addr);
+
+ while (i >= 0) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ release_mem_region(res->start, res_len);
+ i--;
+ }
+ vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return status;
+}
+
+static int dm365_ccdc_remove(struct platform_device *pdev)
+{
+ struct resource *res;
+ int i = 0;
+
+ iounmap(ccdc_cfg.base_addr);
+ iounmap(ccdc_cfg.linear_tbl0_addr);
+ iounmap(ccdc_cfg.linear_tbl1_addr);
+ while (i < 3) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ if (res)
+ release_mem_region(res->start,
+ res->end - res->start + 1);
+ i++;
+ }
+ vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return 0;
+}
+
+static struct platform_driver dm365_ccdc_driver = {
+ .driver = {
+ .name = "dm365_isif",
+ .owner = THIS_MODULE,
+ },
+ .remove = (dm365_ccdc_remove),
+ .probe = dm365_ccdc_probe,
+};
+
+static int dm365_ccdc_init(void)
+{
+ return platform_driver_register(&dm365_ccdc_driver);
+}
+
+
+static void dm365_ccdc_exit(void)
+{
+ platform_driver_unregister(&dm365_ccdc_driver);
+}
+
+module_init(dm365_ccdc_init);
+module_exit(dm365_ccdc_exit);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/dm365_ccdc_regs.h b/drivers/media/platform/davinci/dm365_ccdc_regs.h
new file mode 100644
index 00000000..3d6d550c
--- /dev/null
+++ b/drivers/media/platform/davinci/dm365_ccdc_regs.h
@@ -0,0 +1,310 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _DM365_CCDC_REGS_H
+#define _DM365_CCDC_REGS_H
+
+/* ISIF registers relative offsets */
+#define SYNCEN 0x00
+#define MODESET 0x04
+#define HDW 0x08
+#define VDW 0x0c
+#define PPLN 0x10
+#define LPFR 0x14
+#define SPH 0x18
+#define LNH 0x1c
+#define SLV0 0x20
+#define SLV1 0x24
+#define LNV 0x28
+#define CULH 0x2c
+#define CULV 0x30
+#define HSIZE 0x34
+#define SDOFST 0x38
+#define CADU 0x3c
+#define CADL 0x40
+#define LINCFG0 0x44
+#define LINCFG1 0x48
+#define CCOLP 0x4c
+#define CRGAIN 0x50
+#define CGRGAIN 0x54
+#define CGBGAIN 0x58
+#define CBGAIN 0x5c
+#define COFSTA 0x60
+#define FLSHCFG0 0x64
+#define FLSHCFG1 0x68
+#define FLSHCFG2 0x6c
+#define VDINT0 0x70
+#define VDINT1 0x74
+#define VDINT2 0x78
+#define MISC 0x7c
+#define CGAMMAWD 0x80
+#define REC656IF 0x84
+#define CCDCFG 0x88
+/*****************************************************
+* Defect Correction registers
+*****************************************************/
+#define DFCCTL 0x8c
+#define VDFSATLV 0x90
+#define DFCMEMCTL 0x94
+#define DFCMEM0 0x98
+#define DFCMEM1 0x9c
+#define DFCMEM2 0xa0
+#define DFCMEM3 0xa4
+#define DFCMEM4 0xa8
+/****************************************************
+* Black Clamp registers
+****************************************************/
+#define CLAMPCFG 0xac
+#define CLDCOFST 0xb0
+#define CLSV 0xb4
+#define CLHWIN0 0xb8
+#define CLHWIN1 0xbc
+#define CLHWIN2 0xc0
+#define CLVRV 0xc4
+#define CLVWIN0 0xc8
+#define CLVWIN1 0xcc
+#define CLVWIN2 0xd0
+#define CLVWIN3 0xd4
+/****************************************************
+* Lense Shading Correction
+****************************************************/
+#define DATAHOFST 0xd8
+#define DATAVOFST 0xdc
+#define LSCHVAL 0xe0
+#define LSCVVAL 0xe4
+#define TWODLSCCFG 0xe8
+#define TWODLSCOFST 0xec
+#define TWODLSCINI 0xf0
+#define TWODLSCGRBU 0xf4
+#define TWODLSCGRBL 0xf8
+#define TWODLSCGROF 0xfc
+#define TWODLSCORBU 0x100
+#define TWODLSCORBL 0x104
+#define TWODLSCOROF 0x108
+#define TWODLSCIRQEN 0x10c
+#define TWODLSCIRQST 0x110
+/****************************************************
+* Data formatter
+****************************************************/
+#define FMTCFG 0x114
+#define FMTPLEN 0x118
+#define FMTSPH 0x11c
+#define FMTLNH 0x120
+#define FMTSLV 0x124
+#define FMTLNV 0x128
+#define FMTRLEN 0x12c
+#define FMTHCNT 0x130
+#define FMTAPTR_BASE 0x134
+/* Below macro for addresses FMTAPTR0 - FMTAPTR15 */
+#define FMTAPTR(i) (FMTAPTR_BASE + (i * 4))
+#define FMTPGMVF0 0x174
+#define FMTPGMVF1 0x178
+#define FMTPGMAPU0 0x17c
+#define FMTPGMAPU1 0x180
+#define FMTPGMAPS0 0x184
+#define FMTPGMAPS1 0x188
+#define FMTPGMAPS2 0x18c
+#define FMTPGMAPS3 0x190
+#define FMTPGMAPS4 0x194
+#define FMTPGMAPS5 0x198
+#define FMTPGMAPS6 0x19c
+#define FMTPGMAPS7 0x1a0
+/************************************************
+* Color Space Converter
+************************************************/
+#define CSCCTL 0x1a4
+#define CSCM0 0x1a8
+#define CSCM1 0x1ac
+#define CSCM2 0x1b0
+#define CSCM3 0x1b4
+#define CSCM4 0x1b8
+#define CSCM5 0x1bc
+#define CSCM6 0x1c0
+#define CSCM7 0x1c4
+#define OBWIN0 0x1c8
+#define OBWIN1 0x1cc
+#define OBWIN2 0x1d0
+#define OBWIN3 0x1d4
+#define OBVAL0 0x1d8
+#define OBVAL1 0x1dc
+#define OBVAL2 0x1e0
+#define OBVAL3 0x1e4
+#define OBVAL4 0x1e8
+#define OBVAL5 0x1ec
+#define OBVAL6 0x1f0
+#define OBVAL7 0x1f4
+#define CLKCTL 0x1f8
+
+#define CCDC_LINEAR_LUT0_ADDR 0x1C7C000
+#define CCDC_LINEAR_LUT1_ADDR 0x1C7C400
+
+/* Masks & Shifts below */
+#define START_PX_HOR_MASK (0x7FFF)
+#define NUM_PX_HOR_MASK (0x7FFF)
+#define START_VER_ONE_MASK (0x7FFF)
+#define START_VER_TWO_MASK (0x7FFF)
+#define NUM_LINES_VER (0x7FFF)
+
+/* gain - offset masks */
+#define GAIN_INTEGER_MASK (0x7)
+#define GAIN_INTEGER_SHIFT (0x9)
+#define GAIN_DECIMAL_MASK (0x1FF)
+#define OFFSET_MASK (0xFFF)
+#define GAIN_SDRAM_EN_SHIFT (12)
+#define GAIN_IPIPE_EN_SHIFT (13)
+#define GAIN_H3A_EN_SHIFT (14)
+#define OFST_SDRAM_EN_SHIFT (8)
+#define OFST_IPIPE_EN_SHIFT (9)
+#define OFST_H3A_EN_SHIFT (10)
+#define GAIN_OFFSET_EN_MASK (0x7700)
+
+/* Culling */
+#define CULL_PAT_EVEN_LINE_SHIFT (8)
+
+/* CCDCFG register */
+#define CCDC_YCINSWP_RAW (0x00 << 4)
+#define CCDC_YCINSWP_YCBCR (0x01 << 4)
+#define CCDC_CCDCFG_FIDMD_LATCH_VSYNC (0x00 << 6)
+#define CCDC_CCDCFG_WENLOG_AND (0x00 << 8)
+#define CCDC_CCDCFG_WENLOG_OR (0x01 << 8)
+#define CCDC_CCDCFG_TRGSEL_WEN (0x00 << 9)
+#define CCDC_CCDCFG_EXTRG_DISABLE (0x00 << 10)
+#define CCDC_LATCH_ON_VSYNC_DISABLE (0x01 << 15)
+#define CCDC_LATCH_ON_VSYNC_ENABLE (0x00 << 15)
+#define CCDC_DATA_PACK_MASK (0x03)
+#define CCDC_DATA_PACK16 (0x0)
+#define CCDC_DATA_PACK12 (0x1)
+#define CCDC_DATA_PACK8 (0x2)
+#define CCDC_PIX_ORDER_SHIFT (11)
+#define CCDC_PIX_ORDER_MASK (0x01)
+#define CCDC_BW656_ENABLE (0x01 << 5)
+
+/* MODESET registers */
+#define CCDC_VDHDOUT_INPUT (0x00 << 0)
+#define CCDC_INPUT_MASK (0x03)
+#define CCDC_INPUT_SHIFT (12)
+#define CCDC_RAW_INPUT_MODE (0x00)
+#define CCDC_FID_POL_MASK (0x01)
+#define CCDC_FID_POL_SHIFT (4)
+#define CCDC_HD_POL_MASK (0x01)
+#define CCDC_HD_POL_SHIFT (3)
+#define CCDC_VD_POL_MASK (0x01)
+#define CCDC_VD_POL_SHIFT (2)
+#define CCDC_DATAPOL_NORMAL (0x00)
+#define CCDC_DATAPOL_MASK (0x01)
+#define CCDC_DATAPOL_SHIFT (6)
+#define CCDC_EXWEN_DISABLE (0x00)
+#define CCDC_EXWEN_MASK (0x01)
+#define CCDC_EXWEN_SHIFT (5)
+#define CCDC_FRM_FMT_MASK (0x01)
+#define CCDC_FRM_FMT_SHIFT (7)
+#define CCDC_DATASFT_MASK (0x07)
+#define CCDC_DATASFT_SHIFT (8)
+#define CCDC_LPF_SHIFT (14)
+#define CCDC_LPF_MASK (0x1)
+
+/* GAMMAWD registers */
+#define CCDC_ALAW_GAMA_WD_MASK (0xF)
+#define CCDC_ALAW_GAMA_WD_SHIFT (1)
+#define CCDC_ALAW_ENABLE (0x01)
+#define CCDC_GAMMAWD_CFA_MASK (0x01)
+#define CCDC_GAMMAWD_CFA_SHIFT (5)
+
+/* HSIZE registers */
+#define CCDC_HSIZE_FLIP_MASK (0x01)
+#define CCDC_HSIZE_FLIP_SHIFT (12)
+#define CCDC_LINEOFST_MASK (0xFFF)
+
+/* MISC registers */
+#define CCDC_DPCM_EN_SHIFT (12)
+#define CCDC_DPCM_EN_MASK (1)
+#define CCDC_DPCM_PREDICTOR_SHIFT (13)
+#define CCDC_DPCM_PREDICTOR_MASK (1)
+
+/* Black clamp related */
+#define CCDC_BC_DCOFFSET_MASK (0x1FFF)
+#define CCDC_BC_MODE_COLOR_MASK (1)
+#define CCDC_BC_MODE_COLOR_SHIFT (4)
+#define CCDC_HORZ_BC_MODE_MASK (3)
+#define CCDC_HORZ_BC_MODE_SHIFT (1)
+#define CCDC_HORZ_BC_WIN_COUNT_MASK (0x1F)
+#define CCDC_HORZ_BC_WIN_SEL_SHIFT (5)
+#define CCDC_HORZ_BC_PIX_LIMIT_SHIFT (6)
+#define CCDC_HORZ_BC_WIN_H_SIZE_MASK (3)
+#define CCDC_HORZ_BC_WIN_H_SIZE_SHIFT (8)
+#define CCDC_HORZ_BC_WIN_V_SIZE_MASK (3)
+#define CCDC_HORZ_BC_WIN_V_SIZE_SHIFT (12)
+#define CCDC_HORZ_BC_WIN_START_H_MASK (0x1FFF)
+#define CCDC_HORZ_BC_WIN_START_V_MASK (0x1FFF)
+#define CCDC_VERT_BC_OB_H_SZ_MASK (7)
+#define CCDC_VERT_BC_RST_VAL_SEL_MASK (3)
+#define CCDC_VERT_BC_RST_VAL_SEL_SHIFT (4)
+#define CCDC_VERT_BC_LINE_AVE_COEF_SHIFT (8)
+#define CCDC_VERT_BC_OB_START_HORZ_MASK (0x1FFF)
+#define CCDC_VERT_BC_OB_START_VERT_MASK (0x1FFF)
+#define CCDC_VERT_BC_OB_VERT_SZ_MASK (0x1FFF)
+#define CCDC_VERT_BC_RST_VAL_MASK (0xFFF)
+#define CCDC_BC_VERT_START_SUB_V_MASK (0x1FFF)
+
+/* VDFC registers */
+#define CCDC_VDFC_EN_SHIFT (4)
+#define CCDC_VDFC_CORR_MOD_MASK (3)
+#define CCDC_VDFC_CORR_MOD_SHIFT (5)
+#define CCDC_VDFC_CORR_WHOLE_LN_SHIFT (7)
+#define CCDC_VDFC_LEVEL_SHFT_MASK (7)
+#define CCDC_VDFC_LEVEL_SHFT_SHIFT (8)
+#define CCDC_VDFC_SAT_LEVEL_MASK (0xFFF)
+#define CCDC_VDFC_POS_MASK (0x1FFF)
+#define CCDC_DFCMEMCTL_DFCMARST_SHIFT (2)
+
+/* CSC registers */
+#define CCDC_CSC_COEF_INTEG_MASK (7)
+#define CCDC_CSC_COEF_DECIMAL_MASK (0x1f)
+#define CCDC_CSC_COEF_INTEG_SHIFT (5)
+#define CCDC_CSCM_MSB_SHIFT (8)
+#define CCDC_DF_CSC_SPH_MASK (0x1FFF)
+#define CCDC_DF_CSC_LNH_MASK (0x1FFF)
+#define CCDC_DF_CSC_SLV_MASK (0x1FFF)
+#define CCDC_DF_CSC_LNV_MASK (0x1FFF)
+#define CCDC_DF_NUMLINES (0x7FFF)
+#define CCDC_DF_NUMPIX (0x1FFF)
+
+/* Offsets for LSC/DFC/Gain */
+#define CCDC_DATA_H_OFFSET_MASK (0x1FFF)
+#define CCDC_DATA_V_OFFSET_MASK (0x1FFF)
+
+/* Linearization */
+#define CCDC_LIN_CORRSFT_MASK (7)
+#define CCDC_LIN_CORRSFT_SHIFT (4)
+#define CCDC_LIN_SCALE_FACT_INTEG_SHIFT (10)
+#define CCDC_LIN_SCALE_FACT_DECIMAL_MASK (0x3FF)
+#define CCDC_LIN_ENTRY_MASK (0x3FF)
+
+#define CCDC_DF_FMTRLEN_MASK (0x1FFF)
+#define CCDC_DF_FMTHCNT_MASK (0x1FFF)
+
+/* Pattern registers */
+#define CCDC_PG_EN (1 << 3)
+#define CCDC_SEL_PG_SRC (3 << 4)
+#define CCDC_PG_VD_POL_SHIFT (0)
+#define CCDC_PG_HD_POL_SHIFT (1)
+
+/*random other junk*/
+#define CCDC_SYNCEN_VDHDEN_MASK (1 << 0)
+#define CCDC_SYNCEN_WEN_MASK (1 << 1)
+#define CCDC_SYNCEN_WEN_SHIFT 1
+
+#endif
diff --git a/drivers/media/platform/davinci/dm365_generic_prgb_encoder.c b/drivers/media/platform/davinci/dm365_generic_prgb_encoder.c
new file mode 100644
index 00000000..8b441d63
--- /dev/null
+++ b/drivers/media/platform/davinci/dm365_generic_prgb_encoder.c
@@ -0,0 +1,721 @@
+/*
+ * Copyright (C) 2011 Ridgerun (http://www.ridgerun.com)
+ *
+ * Author: Natanel Castro <natanael.castro@ridgerun.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Based on logicpd_encoder.c
+ *
+ *
+ * Functionality:
+ * This encoder sets the PRGB output according to what it is request for.
+ * For its operation it is required to be registered as a driver at the
+ * board file.
+ * There are two ways to itroduce the mode (STD) data to this driver:
+ * 1) Through the platform data structure (davinci_gen_prgb_pdata) at the board
+ * file on driver's registration.
+ *
+ * 2) By using booting arguments, in wich case mode parameters are set by
+ * the instruction "dm365_generic_prgb_encoder.mode=" followed by the
+ * resolution description, using the CVT syntax for frame buffer setup.
+ * examples: 720x480MR-16@30 , 1280x720MR-16@60
+ *
+ * If both of the configurations are present for the registration, the driver
+ * chooses the one set by the bootargs.
+ *
+ * Clocking set up however depends on two conditions for it's assignment:
+ * 1) Pixel clock value is intricately related to screen characteristics and
+ * it has to be set in order to enable the video signals. If pixel clk is
+ * set to a non-zero value on platform's data structure, its value will be
+ * always respected an set. Otherwise it will be assigned and/or calculated.
+ *
+ * 2) As the configuration depends on specific hardware and display device, the
+ * driver uses the function pointed at platform's structure to set the clock
+ * for the video output. If there's no pointer for such a function, the
+ * driver will execute the default function which sets the pll1clk6 to use
+ * closest posible frequency.
+ *
+ */
+
+/* Kernel Specific header files */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+
+#include <linux/kernel.h>
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <media/davinci/vid_encoder_if.h>
+#include <media/davinci/davinci_platform.h>
+#include <media/davinci/dm365_generic_prgb_encoder.h>
+
+/* Function prototypes */
+
+static __init int gen_prgb_probe(struct platform_device *pdev);
+static int gen_prgb_remove(struct platform_device *pdev);
+
+static int gen_prgb_encoder_initialize(struct vid_encoder_device *enc, int flag);
+static int gen_prgb_encoder_deinitialize(struct vid_encoder_device *enc);
+
+static int gen_prgb_driver_init(void);
+static void gen_prgb_driver_cleanup(void);
+
+
+static int gen_prgb_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+static int gen_prgb_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+
+static int gen_prgb_encoder_setoutput(char *output,
+ struct vid_encoder_device *enc);
+static int gen_prgb_encoder_getoutput(char *output,
+ struct vid_encoder_device *enc);
+
+static int gen_prgb_encoder_enumoutput(int index,
+ char *output,
+ struct vid_encoder_device *enc);
+
+static void pixel_clock_estimation(struct davinci_gen_prgb_pdata *gen_prgb_dev);
+static int set_pixel_clock_output(unsigned int required_clk_rate);
+
+
+/* Variables */
+
+static char *def_mode;
+unsigned int pixel_clock_khz;
+int (*clock_set_function)(unsigned int);
+
+static struct gen_prgb_encoder_config gen_prgb_encoder_configuration = {
+ .no_of_outputs = GEN_PRGB_ENCODER_MAX_NO_OUTPUTS,
+ .output[0] = {
+ .output_name = VID_ENC_OUTPUT_PRGB,
+ .no_of_standard = GEN_PRGB_ENCODER_NUM_STD,
+ .standards[0] = { /* This is programmed by the driver when
+ .probe function is called */
+ .name = VID_ENC_STD_PRGB_DEFAULT,
+ .std = 1,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 0,
+ .yres = 0,
+ .fps = {0, 1},
+ .left_margin = 0,
+ .right_margin = 0,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0}, /* hsync -ve, vsync -ve */
+ },
+};
+
+/* This is a default structure that should not be modified */
+static struct davinci_gen_prgb_pdata gen_prgb_mode_data = {
+ .xres = 0,
+ .yres = 0,
+ .fps = {30, 1},
+ .pixel_clock_khz = 0,
+ .clock_set_function = &set_pixel_clock_output,
+ .left_margin = 0,
+ .right_margin = 0,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .vsync_len = 0,
+ .flags = 0,
+};
+
+
+static struct gen_prgb_encoder_channel gen_prgb_encoder_channel_info = {
+ .params.outindex = 0,
+ .params.mode = VID_ENC_STD_PRGB_DEFAULT,
+ .enc_device = NULL
+};
+
+static struct vid_enc_output_ops outputs_ops = {
+ .count = GEN_PRGB_ENCODER_MAX_NO_OUTPUTS,
+ .enumoutput = gen_prgb_encoder_enumoutput,
+ .setoutput = gen_prgb_encoder_setoutput,
+ .getoutput = gen_prgb_encoder_getoutput
+};
+
+static struct vid_enc_mode_ops modes_ops = {
+ .setmode = gen_prgb_encoder_setmode,
+ .getmode = gen_prgb_encoder_getmode,
+};
+
+/* struct for encoder registration */
+static struct vid_encoder_device gen_prgb_encoder_dev = {
+ .name = "GEN_PRGB_ENCODER",
+ .capabilities = 0,
+ .initialize = gen_prgb_encoder_initialize,
+ .mode_ops = &modes_ops,
+ .ctrl_ops = NULL,
+ .output_ops = &outputs_ops,
+ .params_ops = NULL,
+ .misc_ops = NULL,
+ .deinitialize = gen_prgb_encoder_deinitialize,
+};
+
+/* struct for driver registration */
+static struct platform_driver gen_prgb_driver = {
+ .driver = {
+ .name = PRGB_ENCODER_DRV_NAME,
+ .owner = THIS_MODULE,
+ },
+ .probe = gen_prgb_probe,
+ .remove = __devexit_p(gen_prgb_remove),
+};
+
+static ssize_t width_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return sprintf(buf, "%d\n", gen_prgb_encoder_configuration.output[0].standards[0].xres);
+}
+
+static ssize_t height_show(struct device *cdev, struct device_attribute *attr, char *buf)
+{
+ return sprintf(buf, "%d\n", gen_prgb_encoder_configuration.output[0].standards[0].yres);
+}
+
+#define DECLARE_ATTR(_name, _mode, _show) \
+{ \
+ .attr = { .name = __stringify(_name), .mode = _mode, \
+ .owner = THIS_MODULE }, \
+ .show = _show, \
+}
+static struct device_attribute device_attributes[] = {
+ DECLARE_ATTR(width, S_IRWXUGO, width_show),
+ DECLARE_ATTR(height, S_IRWXUGO, height_show)
+};
+
+struct display_device {
+ struct module *owner;
+ struct device class_dev;
+};
+
+struct display_device *displaydevice;
+/* Defined in davinci encoder manager */
+extern struct class display_class;
+
+static void create_sysfs_files()
+{
+ struct display_device *displaydevice;
+ int i, ret;
+
+ displaydevice = kzalloc(sizeof(struct display_device), GFP_KERNEL);
+ if (!displaydevice)
+ return;
+
+ displaydevice->owner = THIS_MODULE;
+ displaydevice->class_dev.class = &display_class;
+ dev_set_name(&displaydevice->class_dev, "prgb");
+ dev_set_drvdata(&displaydevice->class_dev, displaydevice);
+ ret = device_register(&displaydevice->class_dev);
+ if (ret < 0) {
+ printk(KERN_ERR "PRGB encoder: Error in device_register\n");
+ kfree(displaydevice);
+ return;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(device_attributes); i++) {
+ ret = device_create_file(&displaydevice->class_dev,
+ &device_attributes[i]);
+ if (ret < 0) {
+ while (--i >= 0)
+ device_remove_file(&displaydevice->class_dev,
+ &device_attributes
+ [i]);
+ dev_set_drvdata(&displaydevice->class_dev, NULL);
+ device_unregister(&displaydevice->class_dev);
+ return;
+ }
+ }
+}
+
+static void remove_sysfs_files()
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(device_attributes); i++)
+ device_remove_file(&displaydevice->class_dev,
+ &device_attributes[i]);
+
+ dev_set_drvdata(&displaydevice->class_dev, NULL);
+ device_unregister(&displaydevice->class_dev);
+}
+
+
+/* Function for pixel clock estimation based on screen parameters of the data structure */
+static void pixel_clock_estimation(struct davinci_gen_prgb_pdata *gen_prgb_dev)
+{
+ int hint, vint;
+
+ /* pixel_clk = (hint+1)*(vint+1)*FPS
+ * hint = xres + hfp + hbp + hsync
+ * vint = yres + vfp + vbp + vsync
+ */
+
+ hint = gen_prgb_dev->xres + gen_prgb_dev->left_margin + gen_prgb_dev->right_margin + gen_prgb_dev->hsync_len;
+ vint = gen_prgb_dev->yres + gen_prgb_dev->upper_margin + gen_prgb_dev->lower_margin + gen_prgb_dev->vsync_len;
+
+ gen_prgb_dev->pixel_clock_khz = ( ((hint + 1) * (vint + 1)) / 1000) * (gen_prgb_dev->fps.numerator / gen_prgb_dev->fps.denominator);
+
+ printk(KERN_DEBUG "required pixel clk rate= %d KHz\n", gen_prgb_dev->pixel_clock_khz);
+
+}
+
+/* Function for setup SYSCLK6 to generate the required frequency */
+static int set_pixel_clock_output(unsigned int required_clk_rate)
+{
+ int err = 0;
+
+ unsigned int pll_div6;
+ unsigned int clk_div = 0;
+
+ int freq_factor, diff, tmp_diff;
+ int div_factor;
+ int i;
+
+ if ((!required_clk_rate) | (required_clk_rate > DAVINCI_PLL1_RATE)){
+ printk(KERN_NOTICE "Invalid frequency rate of %d\n", required_clk_rate);
+ return -1;
+ }
+
+ /* Calculating the closest required divider, depends on DAVINCI_PLL1_RATE */
+
+ freq_factor = (DAVINCI_PLL1_RATE << 5) / required_clk_rate;
+ diff = 31 << 5;
+
+ for (i=0; i <= 31; i++){
+
+ if ((i << 5) > freq_factor)
+ break;
+
+ div_factor = (i + 1) << 5;
+
+ tmp_diff = abs(freq_factor - div_factor);
+
+ if (tmp_diff < diff){
+ diff = tmp_diff;
+ clk_div = i;
+ }
+ }
+
+ printk(KERN_DEBUG "assigned divider for pll1clk6 = %d\n", clk_div);
+
+ if (clk_div > PLL1DIV6_MAX_NUM)
+ err = -1;
+ else {
+
+ /* Reading pll_div6 current value*/
+ pll_div6 = __raw_readl(IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x968));
+
+ /* Assigning divider to the closest required frequency */
+ pll_div6 = 0x8000 | clk_div; /* DAVINCI_PLL1_RATE/(clk_div+1)= required_clk_rate (Khz) */
+
+ __raw_writel(pll_div6, IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x968));
+
+ /* Set the bit in the ALNCTL register to flag a change in the
+ * PLLDIV6 ratio */
+ __raw_writel(1<<6, IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x940));
+
+ /* Run a GO operation to perform the change. */
+ __raw_writel(0x1, IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x938));
+ }
+
+ return err;
+}
+
+static int gen_prgb_encoder_mode_to_timings(const char *mode_str)
+{
+ struct fb_info fbi;
+ struct fb_var_screeninfo var;
+ struct fb_ops fbops;
+ int err = 0;
+
+ printk(KERN_DEBUG "gen_prgb_encoder_mode_to_timings\n");
+
+ memset(&fbi, 0, sizeof(fbi));
+ memset(&var, 0, sizeof(var));
+ memset(&fbops, 0, sizeof(fbops));
+ fbi.fbops = &fbops;
+
+ err = fb_find_mode(&var, &fbi, mode_str, NULL, 0, NULL, 24);
+
+ if (err != 0) {
+
+ gen_prgb_mode_data.left_margin = var.left_margin;
+ gen_prgb_mode_data.right_margin = var.right_margin;
+ gen_prgb_mode_data.upper_margin = var.upper_margin;
+ gen_prgb_mode_data.lower_margin = var.lower_margin;
+ gen_prgb_mode_data.hsync_len = var.hsync_len;
+ gen_prgb_mode_data.vsync_len = var.vsync_len;
+ gen_prgb_mode_data.xres = var.xres;
+ gen_prgb_mode_data.yres = var.yres;
+
+ if (!gen_prgb_mode_data.pixel_clock_khz)
+ gen_prgb_mode_data.pixel_clock_khz = PICOS2KHZ(var.pixclock);
+
+ return 0;
+ } else {
+ return -EINVAL;
+ }
+}
+
+/* function for parsing mode parameters */
+static int gen_prgb_encoder_parse_def_modes(struct davinci_gen_prgb_pdata **gen_prgb_dev)
+{
+ char *str, *options, *this_opt;
+ int err = 0;
+
+ printk(KERN_DEBUG "gen_prgb_encoder_parse_def_modes\n");
+
+ str = kmalloc(strlen(def_mode) + 1, GFP_KERNEL);
+ strcpy(str, def_mode);
+ options = str;
+
+ while (!err && (this_opt = strsep(&options, ",")) != NULL) {
+ char *mode_str;
+
+ mode_str = this_opt;
+ err = gen_prgb_encoder_mode_to_timings(mode_str);
+
+ if (err)
+ break;
+ }
+
+ if (err == 0)
+ *gen_prgb_dev = &gen_prgb_mode_data;
+ else
+ *gen_prgb_dev = NULL;
+
+ kfree(str);
+
+ return err;
+}
+
+/* This function is called by the encoder manager to initialize gen_prgb encoder driver.
+ */
+static int gen_prgb_encoder_initialize(struct vid_encoder_device *enc, int flag)
+{
+ int err = 0, outindex;
+ char *std, *output;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ gen_prgb_encoder_channel_info.enc_device = (struct encoder_device *)enc;
+
+ /* call set standard */
+ std = gen_prgb_encoder_channel_info.params.mode;
+ outindex = gen_prgb_encoder_channel_info.params.outindex;
+ output = gen_prgb_encoder_configuration.output[outindex].output_name;
+ err |= gen_prgb_encoder_setoutput(output, enc);
+ if (err < 0) {
+ err = -EINVAL;
+ printk(KERN_ERR "Error occured in setoutput\n");
+ gen_prgb_encoder_deinitialize(enc);
+ return err;
+ }
+ printk(KERN_NOTICE "General PRGB Encoder initialized\n");
+ return err;
+}
+
+/* Function to de-initialize the encoder */
+static int gen_prgb_encoder_deinitialize(struct vid_encoder_device *enc)
+{
+ if (NULL == enc) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ gen_prgb_encoder_channel_info.enc_device = NULL;
+ printk(KERN_DEBUG "General PRGB Encoder de-initialized\n");
+ return 0;
+}
+
+/* Following function is used to set the mode*/
+static int gen_prgb_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, outindex, i;
+ char *mode;
+
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ if (NULL == (mode = mode_info->name)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "Start of gen_prgb_encoder_setmode..\n");
+ outindex = gen_prgb_encoder_channel_info.params.outindex;
+
+ if (mode_info->std) {
+ char *mymode = NULL;
+ /* This is a standard mode */
+ for (i = 0;
+ i <
+ gen_prgb_encoder_configuration.output[outindex].
+ no_of_standard; i++) {
+ if (!strcmp
+ (gen_prgb_encoder_configuration.output[outindex].
+ standards[i].name, mode)) {
+ mymode =
+ gen_prgb_encoder_configuration.
+ output[outindex].standards[i].name;
+ /* CLK setup */
+ err = clock_set_function(pixel_clock_khz);
+ break;
+ }
+ }
+ if ((i ==
+ gen_prgb_encoder_configuration.output[outindex].
+ no_of_standard) || (NULL == mymode)) {
+ printk(KERN_ERR "Invalid id...\n");
+ return -EINVAL;
+ }
+ /* Store the standard in global object of gen_prgb_encoder */
+ gen_prgb_encoder_channel_info.params.mode = mymode;
+ return 0;
+ }
+ printk(KERN_DEBUG "</gen_prgb_encoder_setmode>\n");
+ return err;
+}
+
+/* Following function is used to get currently selected mode.*/
+static int gen_prgb_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, i, outindex;
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<gen_prgb_encoder_getmode>\n");
+ outindex = gen_prgb_encoder_channel_info.params.outindex;
+ for (i = 0; i < GEN_PRGB_ENCODER_NUM_STD; i++) {
+ if (!strcmp(gen_prgb_encoder_channel_info.params.mode,
+ gen_prgb_encoder_configuration.output[outindex].
+ standards[i].name)) {
+ memcpy(mode_info,
+ &gen_prgb_encoder_configuration.output[outindex].
+ standards[i], sizeof(struct vid_enc_mode_info));
+ break;
+ }
+ }
+ if (i == GEN_PRGB_ENCODER_NUM_STD) {
+ printk(KERN_ERR "Wiered. No mode info\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "</gen_prgb_encoder_getmode>\n");
+ return err;
+}
+
+/* For General PRGB, we have several outputs, we
+ always set this to this at init
+*/
+static int gen_prgb_encoder_setoutput(char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+ struct vid_enc_mode_info *my_mode_info;
+ printk(KERN_DEBUG "<gen_prgb_encoder_setoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output: NULL Pointer.\n");
+ return -EINVAL;
+ }
+
+ /* Just check if the default output match with this output name */
+ if (strcmp(gen_prgb_encoder_configuration.output[0].output_name, output)) {
+ printk(KERN_ERR "no matching output found.\n");
+ return -EINVAL;
+ }
+ gen_prgb_encoder_channel_info.params.mode
+ = gen_prgb_encoder_configuration.output[0].standards[0].name;
+
+ my_mode_info = &gen_prgb_encoder_configuration.output[0].standards[0];
+ err |= gen_prgb_encoder_setmode(my_mode_info, enc);
+ if (err < 0) {
+ printk(KERN_ERR "Error in setting default mode\n");
+ return err;
+ }
+ printk(KERN_DEBUG "</gen_prgb_encoder_setoutput>\n");
+ return err;
+}
+
+/* Following function is used to get output name of current output.*/
+static int gen_prgb_encoder_getoutput(char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, index, len;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<gen_prgb_encoder_getoutput>\n");
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ index = gen_prgb_encoder_channel_info.params.outindex;
+ len = strlen(gen_prgb_encoder_configuration.output[index].output_name);
+ if (len > (VID_ENC_NAME_MAX_CHARS - 1))
+ len = VID_ENC_NAME_MAX_CHARS - 1;
+ strncpy(output, gen_prgb_encoder_configuration.output[index].output_name,
+ len);
+ output[len] = '\0';
+ printk(KERN_DEBUG "</gen_prgb_encoder_getoutput>\n");
+ return err;
+}
+
+/* Following function is used to enumerate outputs supported by the driver.
+ It fills in information in the output. */
+static int gen_prgb_encoder_enumoutput(int index, char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+
+ printk(KERN_DEBUG "<gen_prgb_encoder_enumoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* Only one output is available */
+ if (index >= gen_prgb_encoder_configuration.no_of_outputs) {
+ return -EINVAL;
+ }
+ strncpy(output,
+ gen_prgb_encoder_configuration.output[index].output_name,
+ VID_ENC_NAME_MAX_CHARS);
+ printk(KERN_DEBUG "</gen_prgb_encoder_enumoutput>\n");
+ return err;
+}
+
+
+/* Encoder registration with the encoder manager */
+static int __init gen_prgb_probe(struct platform_device *pdev)
+{
+ int err = 0;
+
+ struct davinci_gen_prgb_pdata *gen_prgb_dev = (struct davinci_gen_prgb_pdata *) (*pdev).dev.platform_data;
+
+ printk(KERN_DEBUG "gen_prgb_probe\n");
+
+ /* Setting up prgb struct parameters */
+ if(gen_prgb_dev){
+ if (gen_prgb_dev->clock_set_function)
+ gen_prgb_mode_data.clock_set_function = gen_prgb_dev->clock_set_function;
+ else
+ gen_prgb_dev->clock_set_function = gen_prgb_mode_data.clock_set_function;
+
+ if (gen_prgb_dev->pixel_clock_khz)
+ gen_prgb_mode_data.pixel_clock_khz = gen_prgb_dev->pixel_clock_khz;
+ }
+
+ if (def_mode && strlen(def_mode) > 0) {
+ if (gen_prgb_encoder_parse_def_modes(&gen_prgb_dev)){
+ printk(KERN_NOTICE "cannot parse default modes\n");
+ err = -1;
+ }
+ }
+
+ /* Assigning video standard values */
+ if (gen_prgb_dev) {
+
+ gen_prgb_encoder_configuration.output[0].standards[0].xres = gen_prgb_dev->xres;
+ gen_prgb_encoder_configuration.output[0].standards[0].yres = gen_prgb_dev->yres;
+ gen_prgb_encoder_configuration.output[0].standards[0].fps = gen_prgb_dev->fps;
+ gen_prgb_encoder_configuration.output[0].standards[0].left_margin = gen_prgb_dev->left_margin;
+ gen_prgb_encoder_configuration.output[0].standards[0].right_margin = gen_prgb_dev->right_margin;
+ gen_prgb_encoder_configuration.output[0].standards[0].upper_margin = gen_prgb_dev->upper_margin;
+ gen_prgb_encoder_configuration.output[0].standards[0].lower_margin = gen_prgb_dev->lower_margin;
+ gen_prgb_encoder_configuration.output[0].standards[0].hsync_len = gen_prgb_dev->hsync_len;
+ gen_prgb_encoder_configuration.output[0].standards[0].vsync_len = gen_prgb_dev->vsync_len;
+ gen_prgb_encoder_configuration.output[0].standards[0].flags = gen_prgb_dev->flags;
+
+ if(!(gen_prgb_dev->pixel_clock_khz))
+ pixel_clock_estimation(gen_prgb_dev);
+
+ pixel_clock_khz = gen_prgb_dev->pixel_clock_khz;
+ clock_set_function = gen_prgb_dev->clock_set_function;
+
+ if (err != 0)
+ printk(KERN_NOTICE "failed when setting up pixel_clk\n");
+
+ err = vid_enc_register_encoder(&gen_prgb_encoder_dev);
+ if (err != 0)
+ printk(KERN_NOTICE "failed at encoder registration\n");
+
+ } else {
+ printk(KERN_NOTICE "No data structure on generic_prgb driver\n");
+ err = -1;
+ }
+
+ create_sysfs_files();
+
+ return err;
+}
+
+/* This function used to un-register the General PRGB driver */
+static int gen_prgb_remove(struct platform_device *pdev)
+{
+ remove_sysfs_files();
+ vid_enc_unregister_encoder(&gen_prgb_encoder_dev);
+
+ return 0;
+}
+
+/* This function used to initialize the General PRGB driver */
+static int gen_prgb_driver_init(void)
+{
+ int err = 0;
+
+ printk(KERN_DEBUG "gen_prgb_driver_init\n");
+ /* Register driver to the kernel */
+ err = platform_driver_register(&gen_prgb_driver);
+
+ return err;
+}
+
+/* This function used to un-initialize the General PRGB driver */
+static void gen_prgb_driver_cleanup(void)
+{
+ platform_driver_unregister(&gen_prgb_driver);
+}
+
+module_param_named(mode, def_mode, charp, 0);
+
+subsys_initcall(gen_prgb_driver_init);
+module_exit(gen_prgb_driver_cleanup);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/isif.c b/drivers/media/platform/davinci/isif.c
deleted file mode 100644
index 5050f926..00000000
--- a/drivers/media/platform/davinci/isif.c
+++ /dev/null
@@ -1,1165 +0,0 @@
-/*
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * Image Sensor Interface (ISIF) driver
- *
- * This driver is for configuring the ISIF IP available on DM365 or any other
- * TI SoCs. This is used for capturing yuv or bayer video or image data
- * from a decoder or sensor. This IP is similar to the CCDC IP on DM355
- * and DM6446, but with enhanced or additional ip blocks. The driver
- * configures the ISIF upon commands from the vpfe bridge driver through
- * ccdc_hw_device interface.
- *
- * TODO: 1) Raw bayer parameter settings and bayer capture
- * 2) Add support for control ioctl
- */
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/uaccess.h>
-#include <linux/io.h>
-#include <linux/videodev2.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/module.h>
-
-#include <mach/mux.h>
-
-#include <media/davinci/isif.h>
-#include <media/davinci/vpss.h>
-
-#include "isif_regs.h"
-#include "ccdc_hw_device.h"
-
-/* Defaults for module configuration parameters */
-static struct isif_config_params_raw isif_config_defaults = {
- .linearize = {
- .en = 0,
- .corr_shft = ISIF_NO_SHIFT,
- .scale_fact = {1, 0},
- },
- .df_csc = {
- .df_or_csc = 0,
- .csc = {
- .en = 0,
- },
- },
- .dfc = {
- .en = 0,
- },
- .bclamp = {
- .en = 0,
- },
- .gain_offset = {
- .gain = {
- .r_ye = {1, 0},
- .gr_cy = {1, 0},
- .gb_g = {1, 0},
- .b_mg = {1, 0},
- },
- },
- .culling = {
- .hcpat_odd = 0xff,
- .hcpat_even = 0xff,
- .vcpat = 0xff,
- },
- .compress = {
- .alg = ISIF_ALAW,
- },
-};
-
-/* ISIF operation configuration */
-static struct isif_oper_config {
- struct device *dev;
- enum vpfe_hw_if_type if_type;
- struct isif_ycbcr_config ycbcr;
- struct isif_params_raw bayer;
- enum isif_data_pack data_pack;
- /* Master clock */
- struct clk *mclk;
- /* ISIF base address */
- void __iomem *base_addr;
- /* ISIF Linear Table 0 */
- void __iomem *linear_tbl0_addr;
- /* ISIF Linear Table 1 */
- void __iomem *linear_tbl1_addr;
-} isif_cfg = {
- .ycbcr = {
- .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
- .frm_fmt = CCDC_FRMFMT_INTERLACED,
- .win = ISIF_WIN_NTSC,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .pix_order = CCDC_PIXORDER_CBYCRY,
- .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED,
- },
- .bayer = {
- .pix_fmt = CCDC_PIXFMT_RAW,
- .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
- .win = ISIF_WIN_VGA,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .gain = {
- .r_ye = {1, 0},
- .gr_cy = {1, 0},
- .gb_g = {1, 0},
- .b_mg = {1, 0},
- },
- .cfa_pat = ISIF_CFA_PAT_MOSAIC,
- .data_msb = ISIF_BIT_MSB_11,
- .config_params = {
- .data_shift = ISIF_NO_SHIFT,
- .col_pat_field0 = {
- .olop = ISIF_GREEN_BLUE,
- .olep = ISIF_BLUE,
- .elop = ISIF_RED,
- .elep = ISIF_GREEN_RED,
- },
- .col_pat_field1 = {
- .olop = ISIF_GREEN_BLUE,
- .olep = ISIF_BLUE,
- .elop = ISIF_RED,
- .elep = ISIF_GREEN_RED,
- },
- .test_pat_gen = 0,
- },
- },
- .data_pack = ISIF_DATA_PACK8,
-};
-
-/* Raw Bayer formats */
-static const u32 isif_raw_bayer_pix_formats[] = {
- V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
-
-/* Raw YUV formats */
-static const u32 isif_raw_yuv_pix_formats[] = {
- V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
-
-/* register access routines */
-static inline u32 regr(u32 offset)
-{
- return __raw_readl(isif_cfg.base_addr + offset);
-}
-
-static inline void regw(u32 val, u32 offset)
-{
- __raw_writel(val, isif_cfg.base_addr + offset);
-}
-
-/* reg_modify() - read, modify and write register */
-static inline u32 reg_modify(u32 mask, u32 val, u32 offset)
-{
- u32 new_val = (regr(offset) & ~mask) | (val & mask);
-
- regw(new_val, offset);
- return new_val;
-}
-
-static inline void regw_lin_tbl(u32 val, u32 offset, int i)
-{
- if (!i)
- __raw_writel(val, isif_cfg.linear_tbl0_addr + offset);
- else
- __raw_writel(val, isif_cfg.linear_tbl1_addr + offset);
-}
-
-static void isif_disable_all_modules(void)
-{
- /* disable BC */
- regw(0, CLAMPCFG);
- /* disable vdfc */
- regw(0, DFCCTL);
- /* disable CSC */
- regw(0, CSCCTL);
- /* disable linearization */
- regw(0, LINCFG0);
- /* disable other modules here as they are supported */
-}
-
-static void isif_enable(int en)
-{
- if (!en) {
- /* Before disable isif, disable all ISIF modules */
- isif_disable_all_modules();
- /*
- * wait for next VD. Assume lowest scan rate is 12 Hz. So
- * 100 msec delay is good enough
- */
- msleep(100);
- }
- reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN);
-}
-
-static void isif_enable_output_to_sdram(int en)
-{
- reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN);
-}
-
-static void isif_config_culling(struct isif_cul *cul)
-{
- u32 val;
-
- /* Horizontal pattern */
- val = (cul->hcpat_even << CULL_PAT_EVEN_LINE_SHIFT) | cul->hcpat_odd;
- regw(val, CULH);
-
- /* vertical pattern */
- regw(cul->vcpat, CULV);
-
- /* LPF */
- reg_modify(ISIF_LPF_MASK << ISIF_LPF_SHIFT,
- cul->en_lpf << ISIF_LPF_SHIFT, MODESET);
-}
-
-static void isif_config_gain_offset(void)
-{
- struct isif_gain_offsets_adj *gain_off_p =
- &isif_cfg.bayer.config_params.gain_offset;
- u32 val;
-
- val = (!!gain_off_p->gain_sdram_en << GAIN_SDRAM_EN_SHIFT) |
- (!!gain_off_p->gain_ipipe_en << GAIN_IPIPE_EN_SHIFT) |
- (!!gain_off_p->gain_h3a_en << GAIN_H3A_EN_SHIFT) |
- (!!gain_off_p->offset_sdram_en << OFST_SDRAM_EN_SHIFT) |
- (!!gain_off_p->offset_ipipe_en << OFST_IPIPE_EN_SHIFT) |
- (!!gain_off_p->offset_h3a_en << OFST_H3A_EN_SHIFT);
-
- reg_modify(GAIN_OFFSET_EN_MASK, val, CGAMMAWD);
-
- val = (gain_off_p->gain.r_ye.integer << GAIN_INTEGER_SHIFT) |
- gain_off_p->gain.r_ye.decimal;
- regw(val, CRGAIN);
-
- val = (gain_off_p->gain.gr_cy.integer << GAIN_INTEGER_SHIFT) |
- gain_off_p->gain.gr_cy.decimal;
- regw(val, CGRGAIN);
-
- val = (gain_off_p->gain.gb_g.integer << GAIN_INTEGER_SHIFT) |
- gain_off_p->gain.gb_g.decimal;
- regw(val, CGBGAIN);
-
- val = (gain_off_p->gain.b_mg.integer << GAIN_INTEGER_SHIFT) |
- gain_off_p->gain.b_mg.decimal;
- regw(val, CBGAIN);
-
- regw(gain_off_p->offset, COFSTA);
-}
-
-static void isif_restore_defaults(void)
-{
- enum vpss_ccdc_source_sel source = VPSS_CCDCIN;
-
- dev_dbg(isif_cfg.dev, "\nstarting isif_restore_defaults...");
- isif_cfg.bayer.config_params = isif_config_defaults;
- /* Enable clock to ISIF, IPIPEIF and BL */
- vpss_enable_clock(VPSS_CCDC_CLOCK, 1);
- vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
- vpss_enable_clock(VPSS_BL_CLOCK, 1);
- /* Set default offset and gain */
- isif_config_gain_offset();
- vpss_select_ccdc_source(source);
- dev_dbg(isif_cfg.dev, "\nEnd of isif_restore_defaults...");
-}
-
-static int isif_open(struct device *device)
-{
- isif_restore_defaults();
- return 0;
-}
-
-/* This function will configure the window size to be capture in ISIF reg */
-static void isif_setwin(struct v4l2_rect *image_win,
- enum ccdc_frmfmt frm_fmt, int ppc)
-{
- int horz_start, horz_nr_pixels;
- int vert_start, vert_nr_lines;
- int mid_img = 0;
-
- dev_dbg(isif_cfg.dev, "\nStarting isif_setwin...");
- /*
- * ppc - per pixel count. indicates how many pixels per cell
- * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
- * raw capture this is 1
- */
- horz_start = image_win->left << (ppc - 1);
- horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1;
-
- /* Writing the horizontal info into the registers */
- regw(horz_start & START_PX_HOR_MASK, SPH);
- regw(horz_nr_pixels & NUM_PX_HOR_MASK, LNH);
- vert_start = image_win->top;
-
- if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
- vert_nr_lines = (image_win->height >> 1) - 1;
- vert_start >>= 1;
- /* To account for VD since line 0 doesn't have any data */
- vert_start += 1;
- } else {
- /* To account for VD since line 0 doesn't have any data */
- vert_start += 1;
- vert_nr_lines = image_win->height - 1;
- /* configure VDINT0 and VDINT1 */
- mid_img = vert_start + (image_win->height / 2);
- regw(mid_img, VDINT1);
- }
-
- regw(0, VDINT0);
- regw(vert_start & START_VER_ONE_MASK, SLV0);
- regw(vert_start & START_VER_TWO_MASK, SLV1);
- regw(vert_nr_lines & NUM_LINES_VER, LNV);
-}
-
-static void isif_config_bclamp(struct isif_black_clamp *bc)
-{
- u32 val;
-
- /*
- * DC Offset is always added to image data irrespective of bc enable
- * status
- */
- regw(bc->dc_offset, CLDCOFST);
-
- if (bc->en) {
- val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT;
-
- /* Enable BC and horizontal clamp caculation paramaters */
- val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT);
-
- regw(val, CLAMPCFG);
-
- if (bc->horz.mode != ISIF_HORZ_BC_DISABLE) {
- /*
- * Window count for calculation
- * Base window selection
- * pixel limit
- * Horizontal size of window
- * vertical size of the window
- * Horizontal start position of the window
- * Vertical start position of the window
- */
- val = bc->horz.win_count_calc |
- ((!!bc->horz.base_win_sel_calc) <<
- ISIF_HORZ_BC_WIN_SEL_SHIFT) |
- ((!!bc->horz.clamp_pix_limit) <<
- ISIF_HORZ_BC_PIX_LIMIT_SHIFT) |
- (bc->horz.win_h_sz_calc <<
- ISIF_HORZ_BC_WIN_H_SIZE_SHIFT) |
- (bc->horz.win_v_sz_calc <<
- ISIF_HORZ_BC_WIN_V_SIZE_SHIFT);
- regw(val, CLHWIN0);
-
- regw(bc->horz.win_start_h_calc, CLHWIN1);
- regw(bc->horz.win_start_v_calc, CLHWIN2);
- }
-
- /* vertical clamp caculation paramaters */
-
- /* Reset clamp value sel for previous line */
- val |=
- (bc->vert.reset_val_sel << ISIF_VERT_BC_RST_VAL_SEL_SHIFT) |
- (bc->vert.line_ave_coef << ISIF_VERT_BC_LINE_AVE_COEF_SHIFT);
- regw(val, CLVWIN0);
-
- /* Optical Black horizontal start position */
- regw(bc->vert.ob_start_h, CLVWIN1);
- /* Optical Black vertical start position */
- regw(bc->vert.ob_start_v, CLVWIN2);
- /* Optical Black vertical size for calculation */
- regw(bc->vert.ob_v_sz_calc, CLVWIN3);
- /* Vertical start position for BC subtraction */
- regw(bc->vert_start_sub, CLSV);
- }
-}
-
-static void isif_config_linearization(struct isif_linearize *linearize)
-{
- u32 val, i;
-
- if (!linearize->en) {
- regw(0, LINCFG0);
- return;
- }
-
- /* shift value for correction & enable linearization (set lsb) */
- val = (linearize->corr_shft << ISIF_LIN_CORRSFT_SHIFT) | 1;
- regw(val, LINCFG0);
-
- /* Scale factor */
- val = ((!!linearize->scale_fact.integer) <<
- ISIF_LIN_SCALE_FACT_INTEG_SHIFT) |
- linearize->scale_fact.decimal;
- regw(val, LINCFG1);
-
- for (i = 0; i < ISIF_LINEAR_TAB_SIZE; i++) {
- if (i % 2)
- regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 1);
- else
- regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 0);
- }
-}
-
-static int isif_config_dfc(struct isif_dfc *vdfc)
-{
- /* initialize retries to loop for max ~ 250 usec */
- u32 val, count, retries = loops_per_jiffy / (4000/HZ);
- int i;
-
- if (!vdfc->en)
- return 0;
-
- /* Correction mode */
- val = (vdfc->corr_mode << ISIF_VDFC_CORR_MOD_SHIFT);
-
- /* Correct whole line or partial */
- if (vdfc->corr_whole_line)
- val |= 1 << ISIF_VDFC_CORR_WHOLE_LN_SHIFT;
-
- /* level shift value */
- val |= vdfc->def_level_shift << ISIF_VDFC_LEVEL_SHFT_SHIFT;
-
- regw(val, DFCCTL);
-
- /* Defect saturation level */
- regw(vdfc->def_sat_level, VDFSATLV);
-
- regw(vdfc->table[0].pos_vert, DFCMEM0);
- regw(vdfc->table[0].pos_horz, DFCMEM1);
- if (vdfc->corr_mode == ISIF_VDFC_NORMAL ||
- vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
- regw(vdfc->table[0].level_at_pos, DFCMEM2);
- regw(vdfc->table[0].level_up_pixels, DFCMEM3);
- regw(vdfc->table[0].level_low_pixels, DFCMEM4);
- }
-
- /* set DFCMARST and set DFCMWR */
- val = regr(DFCMEMCTL) | (1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT) | 1;
- regw(val, DFCMEMCTL);
-
- count = retries;
- while (count && (regr(DFCMEMCTL) & 0x1))
- count--;
-
- if (!count) {
- dev_dbg(isif_cfg.dev, "defect table write timeout !!!\n");
- return -1;
- }
-
- for (i = 1; i < vdfc->num_vdefects; i++) {
- regw(vdfc->table[i].pos_vert, DFCMEM0);
- regw(vdfc->table[i].pos_horz, DFCMEM1);
- if (vdfc->corr_mode == ISIF_VDFC_NORMAL ||
- vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
- regw(vdfc->table[i].level_at_pos, DFCMEM2);
- regw(vdfc->table[i].level_up_pixels, DFCMEM3);
- regw(vdfc->table[i].level_low_pixels, DFCMEM4);
- }
- val = regr(DFCMEMCTL);
- /* clear DFCMARST and set DFCMWR */
- val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
- val |= 1;
- regw(val, DFCMEMCTL);
-
- count = retries;
- while (count && (regr(DFCMEMCTL) & 0x1))
- count--;
-
- if (!count) {
- dev_err(isif_cfg.dev,
- "defect table write timeout !!!\n");
- return -1;
- }
- }
- if (vdfc->num_vdefects < ISIF_VDFC_TABLE_SIZE) {
- /* Extra cycle needed */
- regw(0, DFCMEM0);
- regw(0x1FFF, DFCMEM1);
- regw(1, DFCMEMCTL);
- }
-
- /* enable VDFC */
- reg_modify((1 << ISIF_VDFC_EN_SHIFT), (1 << ISIF_VDFC_EN_SHIFT),
- DFCCTL);
- return 0;
-}
-
-static void isif_config_csc(struct isif_df_csc *df_csc)
-{
- u32 val1 = 0, val2 = 0, i;
-
- if (!df_csc->csc.en) {
- regw(0, CSCCTL);
- return;
- }
- for (i = 0; i < ISIF_CSC_NUM_COEFF; i++) {
- if ((i % 2) == 0) {
- /* CSCM - LSB */
- val1 = (df_csc->csc.coeff[i].integer <<
- ISIF_CSC_COEF_INTEG_SHIFT) |
- df_csc->csc.coeff[i].decimal;
- } else {
-
- /* CSCM - MSB */
- val2 = (df_csc->csc.coeff[i].integer <<
- ISIF_CSC_COEF_INTEG_SHIFT) |
- df_csc->csc.coeff[i].decimal;
- val2 <<= ISIF_CSCM_MSB_SHIFT;
- val2 |= val1;
- regw(val2, (CSCM0 + ((i - 1) << 1)));
- }
- }
-
- /* program the active area */
- regw(df_csc->start_pix, FMTSPH);
- /*
- * one extra pixel as required for CSC. Actually number of
- * pixel - 1 should be configured in this register. So we
- * need to subtract 1 before writing to FMTSPH, but we will
- * not do this since csc requires one extra pixel
- */
- regw(df_csc->num_pixels, FMTLNH);
- regw(df_csc->start_line, FMTSLV);
- /*
- * one extra line as required for CSC. See reason documented for
- * num_pixels
- */
- regw(df_csc->num_lines, FMTLNV);
-
- /* Enable CSC */
- regw(1, CSCCTL);
-}
-
-static int isif_config_raw(void)
-{
- struct isif_params_raw *params = &isif_cfg.bayer;
- struct isif_config_params_raw *module_params =
- &isif_cfg.bayer.config_params;
- struct vpss_pg_frame_size frame_size;
- struct vpss_sync_pol sync;
- u32 val;
-
- dev_dbg(isif_cfg.dev, "\nStarting isif_config_raw..\n");
-
- /*
- * Configure CCDCFG register:-
- * Set CCD Not to swap input since input is RAW data
- * Set FID detection function to Latch at V-Sync
- * Set WENLOG - isif valid area
- * Set TRGSEL
- * Set EXTRG
- * Packed to 8 or 16 bits
- */
-
- val = ISIF_YCINSWP_RAW | ISIF_CCDCFG_FIDMD_LATCH_VSYNC |
- ISIF_CCDCFG_WENLOG_AND | ISIF_CCDCFG_TRGSEL_WEN |
- ISIF_CCDCFG_EXTRG_DISABLE | isif_cfg.data_pack;
-
- dev_dbg(isif_cfg.dev, "Writing 0x%x to ...CCDCFG \n", val);
- regw(val, CCDCFG);
-
- /*
- * Configure the vertical sync polarity(MODESET.VDPOL)
- * Configure the horizontal sync polarity (MODESET.HDPOL)
- * Configure frame id polarity (MODESET.FLDPOL)
- * Configure data polarity
- * Configure External WEN Selection
- * Configure frame format(progressive or interlace)
- * Configure pixel format (Input mode)
- * Configure the data shift
- */
-
- val = ISIF_VDHDOUT_INPUT | (params->vd_pol << ISIF_VD_POL_SHIFT) |
- (params->hd_pol << ISIF_HD_POL_SHIFT) |
- (params->fid_pol << ISIF_FID_POL_SHIFT) |
- (ISIF_DATAPOL_NORMAL << ISIF_DATAPOL_SHIFT) |
- (ISIF_EXWEN_DISABLE << ISIF_EXWEN_SHIFT) |
- (params->frm_fmt << ISIF_FRM_FMT_SHIFT) |
- (params->pix_fmt << ISIF_INPUT_SHIFT) |
- (params->config_params.data_shift << ISIF_DATASFT_SHIFT);
-
- regw(val, MODESET);
- dev_dbg(isif_cfg.dev, "Writing 0x%x to MODESET...\n", val);
-
- /*
- * Configure GAMMAWD register
- * CFA pattern setting
- */
- val = params->cfa_pat << ISIF_GAMMAWD_CFA_SHIFT;
-
- /* Gamma msb */
- if (module_params->compress.alg == ISIF_ALAW)
- val |= ISIF_ALAW_ENABLE;
-
- val |= (params->data_msb << ISIF_ALAW_GAMA_WD_SHIFT);
- regw(val, CGAMMAWD);
-
- /* Configure DPCM compression settings */
- if (module_params->compress.alg == ISIF_DPCM) {
- val = BIT(ISIF_DPCM_EN_SHIFT) |
- (module_params->compress.pred <<
- ISIF_DPCM_PREDICTOR_SHIFT);
- }
-
- regw(val, MISC);
-
- /* Configure Gain & Offset */
- isif_config_gain_offset();
-
- /* Configure Color pattern */
- val = (params->config_params.col_pat_field0.olop) |
- (params->config_params.col_pat_field0.olep << 2) |
- (params->config_params.col_pat_field0.elop << 4) |
- (params->config_params.col_pat_field0.elep << 6) |
- (params->config_params.col_pat_field1.olop << 8) |
- (params->config_params.col_pat_field1.olep << 10) |
- (params->config_params.col_pat_field1.elop << 12) |
- (params->config_params.col_pat_field1.elep << 14);
- regw(val, CCOLP);
- dev_dbg(isif_cfg.dev, "Writing %x to CCOLP ...\n", val);
-
- /* Configure HSIZE register */
- val = (!!params->horz_flip_en) << ISIF_HSIZE_FLIP_SHIFT;
-
- /* calculate line offset in 32 bytes based on pack value */
- if (isif_cfg.data_pack == ISIF_PACK_8BIT)
- val |= ((params->win.width + 31) >> 5);
- else if (isif_cfg.data_pack == ISIF_PACK_12BIT)
- val |= (((params->win.width +
- (params->win.width >> 2)) + 31) >> 5);
- else
- val |= (((params->win.width * 2) + 31) >> 5);
- regw(val, HSIZE);
-
- /* Configure SDOFST register */
- if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
- if (params->image_invert_en) {
- /* For interlace inverse mode */
- regw(0x4B6D, SDOFST);
- dev_dbg(isif_cfg.dev, "Writing 0x4B6D to SDOFST...\n");
- } else {
- /* For interlace non inverse mode */
- regw(0x0B6D, SDOFST);
- dev_dbg(isif_cfg.dev, "Writing 0x0B6D to SDOFST...\n");
- }
- } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
- if (params->image_invert_en) {
- /* For progressive inverse mode */
- regw(0x4000, SDOFST);
- dev_dbg(isif_cfg.dev, "Writing 0x4000 to SDOFST...\n");
- } else {
- /* For progressive non inverse mode */
- regw(0x0000, SDOFST);
- dev_dbg(isif_cfg.dev, "Writing 0x0000 to SDOFST...\n");
- }
- }
-
- /* Configure video window */
- isif_setwin(&params->win, params->frm_fmt, 1);
-
- /* Configure Black Clamp */
- isif_config_bclamp(&module_params->bclamp);
-
- /* Configure Vertical Defection Pixel Correction */
- if (isif_config_dfc(&module_params->dfc) < 0)
- return -EFAULT;
-
- if (!module_params->df_csc.df_or_csc)
- /* Configure Color Space Conversion */
- isif_config_csc(&module_params->df_csc);
-
- isif_config_linearization(&module_params->linearize);
-
- /* Configure Culling */
- isif_config_culling(&module_params->culling);
-
- /* Configure horizontal and vertical offsets(DFC,LSC,Gain) */
- regw(module_params->horz_offset, DATAHOFST);
- regw(module_params->vert_offset, DATAVOFST);
-
- /* Setup test pattern if enabled */
- if (params->config_params.test_pat_gen) {
- /* Use the HD/VD pol settings from user */
- sync.ccdpg_hdpol = params->hd_pol;
- sync.ccdpg_vdpol = params->vd_pol;
- dm365_vpss_set_sync_pol(sync);
- frame_size.hlpfr = isif_cfg.bayer.win.width;
- frame_size.pplen = isif_cfg.bayer.win.height;
- dm365_vpss_set_pg_frame_size(frame_size);
- vpss_select_ccdc_source(VPSS_PGLPBK);
- }
-
- dev_dbg(isif_cfg.dev, "\nEnd of isif_config_ycbcr...\n");
- return 0;
-}
-
-static int isif_set_buftype(enum ccdc_buftype buf_type)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- isif_cfg.bayer.buf_type = buf_type;
- else
- isif_cfg.ycbcr.buf_type = buf_type;
-
- return 0;
-
-}
-static enum ccdc_buftype isif_get_buftype(void)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- return isif_cfg.bayer.buf_type;
-
- return isif_cfg.ycbcr.buf_type;
-}
-
-static int isif_enum_pix(u32 *pix, int i)
-{
- int ret = -EINVAL;
-
- if (isif_cfg.if_type == VPFE_RAW_BAYER) {
- if (i < ARRAY_SIZE(isif_raw_bayer_pix_formats)) {
- *pix = isif_raw_bayer_pix_formats[i];
- ret = 0;
- }
- } else {
- if (i < ARRAY_SIZE(isif_raw_yuv_pix_formats)) {
- *pix = isif_raw_yuv_pix_formats[i];
- ret = 0;
- }
- }
-
- return ret;
-}
-
-static int isif_set_pixel_format(unsigned int pixfmt)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER) {
- if (pixfmt == V4L2_PIX_FMT_SBGGR8) {
- if ((isif_cfg.bayer.config_params.compress.alg !=
- ISIF_ALAW) &&
- (isif_cfg.bayer.config_params.compress.alg !=
- ISIF_DPCM)) {
- dev_dbg(isif_cfg.dev,
- "Either configure A-Law or DPCM\n");
- return -EINVAL;
- }
- isif_cfg.data_pack = ISIF_PACK_8BIT;
- } else if (pixfmt == V4L2_PIX_FMT_SBGGR16) {
- isif_cfg.bayer.config_params.compress.alg =
- ISIF_NO_COMPRESSION;
- isif_cfg.data_pack = ISIF_PACK_16BIT;
- } else
- return -EINVAL;
- isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
- } else {
- if (pixfmt == V4L2_PIX_FMT_YUYV)
- isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
- else if (pixfmt == V4L2_PIX_FMT_UYVY)
- isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
- else
- return -EINVAL;
- isif_cfg.data_pack = ISIF_PACK_8BIT;
- }
- return 0;
-}
-
-static u32 isif_get_pixel_format(void)
-{
- u32 pixfmt;
-
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- if (isif_cfg.bayer.config_params.compress.alg == ISIF_ALAW ||
- isif_cfg.bayer.config_params.compress.alg == ISIF_DPCM)
- pixfmt = V4L2_PIX_FMT_SBGGR8;
- else
- pixfmt = V4L2_PIX_FMT_SBGGR16;
- else {
- if (isif_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
- pixfmt = V4L2_PIX_FMT_YUYV;
- else
- pixfmt = V4L2_PIX_FMT_UYVY;
- }
- return pixfmt;
-}
-
-static int isif_set_image_window(struct v4l2_rect *win)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER) {
- isif_cfg.bayer.win.top = win->top;
- isif_cfg.bayer.win.left = win->left;
- isif_cfg.bayer.win.width = win->width;
- isif_cfg.bayer.win.height = win->height;
- } else {
- isif_cfg.ycbcr.win.top = win->top;
- isif_cfg.ycbcr.win.left = win->left;
- isif_cfg.ycbcr.win.width = win->width;
- isif_cfg.ycbcr.win.height = win->height;
- }
- return 0;
-}
-
-static void isif_get_image_window(struct v4l2_rect *win)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- *win = isif_cfg.bayer.win;
- else
- *win = isif_cfg.ycbcr.win;
-}
-
-static unsigned int isif_get_line_length(void)
-{
- unsigned int len;
-
- if (isif_cfg.if_type == VPFE_RAW_BAYER) {
- if (isif_cfg.data_pack == ISIF_PACK_8BIT)
- len = ((isif_cfg.bayer.win.width));
- else if (isif_cfg.data_pack == ISIF_PACK_12BIT)
- len = (((isif_cfg.bayer.win.width * 2) +
- (isif_cfg.bayer.win.width >> 2)));
- else
- len = (((isif_cfg.bayer.win.width * 2)));
- } else
- len = (((isif_cfg.ycbcr.win.width * 2)));
- return ALIGN(len, 32);
-}
-
-static int isif_set_frame_format(enum ccdc_frmfmt frm_fmt)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- isif_cfg.bayer.frm_fmt = frm_fmt;
- else
- isif_cfg.ycbcr.frm_fmt = frm_fmt;
- return 0;
-}
-static enum ccdc_frmfmt isif_get_frame_format(void)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- return isif_cfg.bayer.frm_fmt;
- return isif_cfg.ycbcr.frm_fmt;
-}
-
-static int isif_getfid(void)
-{
- return (regr(MODESET) >> 15) & 0x1;
-}
-
-/* misc operations */
-static void isif_setfbaddr(unsigned long addr)
-{
- regw((addr >> 21) & 0x07ff, CADU);
- regw((addr >> 5) & 0x0ffff, CADL);
-}
-
-static int isif_set_hw_if_params(struct vpfe_hw_if_param *params)
-{
- isif_cfg.if_type = params->if_type;
-
- switch (params->if_type) {
- case VPFE_BT656:
- case VPFE_BT656_10BIT:
- case VPFE_YCBCR_SYNC_8:
- isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
- isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
- break;
- case VPFE_BT1120:
- case VPFE_YCBCR_SYNC_16:
- isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
- isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
- break;
- case VPFE_RAW_BAYER:
- isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
- break;
- default:
- dev_dbg(isif_cfg.dev, "Invalid interface type\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* This function will configure ISIF for YCbCr parameters. */
-static int isif_config_ycbcr(void)
-{
- struct isif_ycbcr_config *params = &isif_cfg.ycbcr;
- struct vpss_pg_frame_size frame_size;
- u32 modeset = 0, ccdcfg = 0;
- struct vpss_sync_pol sync;
-
- dev_dbg(isif_cfg.dev, "\nStarting isif_config_ycbcr...");
-
- /* configure pixel format or input mode */
- modeset = modeset | (params->pix_fmt << ISIF_INPUT_SHIFT) |
- (params->frm_fmt << ISIF_FRM_FMT_SHIFT) |
- (params->fid_pol << ISIF_FID_POL_SHIFT) |
- (params->hd_pol << ISIF_HD_POL_SHIFT) |
- (params->vd_pol << ISIF_VD_POL_SHIFT);
-
- /* pack the data to 8-bit ISIFCFG */
- switch (isif_cfg.if_type) {
- case VPFE_BT656:
- if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
- dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
- return -EINVAL;
- }
- modeset |= (VPFE_PINPOL_NEGATIVE << ISIF_VD_POL_SHIFT);
- regw(3, REC656IF);
- ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR;
- break;
- case VPFE_BT656_10BIT:
- if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
- dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
- return -EINVAL;
- }
- /* setup BT.656, embedded sync */
- regw(3, REC656IF);
- /* enable 10 bit mode in ccdcfg */
- ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR |
- ISIF_BW656_ENABLE;
- break;
- case VPFE_BT1120:
- if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
- dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
- return -EINVAL;
- }
- regw(3, REC656IF);
- break;
-
- case VPFE_YCBCR_SYNC_8:
- ccdcfg |= ISIF_DATA_PACK8;
- ccdcfg |= ISIF_YCINSWP_YCBCR;
- if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
- dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
- return -EINVAL;
- }
- break;
- case VPFE_YCBCR_SYNC_16:
- if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
- dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
- return -EINVAL;
- }
- break;
- default:
- /* should never come here */
- dev_dbg(isif_cfg.dev, "Invalid interface type\n");
- return -EINVAL;
- }
-
- regw(modeset, MODESET);
-
- /* Set up pix order */
- ccdcfg |= params->pix_order << ISIF_PIX_ORDER_SHIFT;
-
- regw(ccdcfg, CCDCFG);
-
- /* configure video window */
- if ((isif_cfg.if_type == VPFE_BT1120) ||
- (isif_cfg.if_type == VPFE_YCBCR_SYNC_16))
- isif_setwin(&params->win, params->frm_fmt, 1);
- else
- isif_setwin(&params->win, params->frm_fmt, 2);
-
- /*
- * configure the horizontal line offset
- * this is done by rounding up width to a multiple of 16 pixels
- * and multiply by two to account for y:cb:cr 4:2:2 data
- */
- regw(((((params->win.width * 2) + 31) & 0xffffffe0) >> 5), HSIZE);
-
- /* configure the memory line offset */
- if ((params->frm_fmt == CCDC_FRMFMT_INTERLACED) &&
- (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED))
- /* two fields are interleaved in memory */
- regw(0x00000249, SDOFST);
-
- /* Setup test pattern if enabled */
- if (isif_cfg.bayer.config_params.test_pat_gen) {
- sync.ccdpg_hdpol = params->hd_pol;
- sync.ccdpg_vdpol = params->vd_pol;
- dm365_vpss_set_sync_pol(sync);
- dm365_vpss_set_pg_frame_size(frame_size);
- }
- return 0;
-}
-
-static int isif_configure(void)
-{
- if (isif_cfg.if_type == VPFE_RAW_BAYER)
- return isif_config_raw();
- return isif_config_ycbcr();
-}
-
-static int isif_close(struct device *device)
-{
- /* copy defaults to module params */
- isif_cfg.bayer.config_params = isif_config_defaults;
- return 0;
-}
-
-static struct ccdc_hw_device isif_hw_dev = {
- .name = "ISIF",
- .owner = THIS_MODULE,
- .hw_ops = {
- .open = isif_open,
- .close = isif_close,
- .enable = isif_enable,
- .enable_out_to_sdram = isif_enable_output_to_sdram,
- .set_hw_if_params = isif_set_hw_if_params,
- .configure = isif_configure,
- .set_buftype = isif_set_buftype,
- .get_buftype = isif_get_buftype,
- .enum_pix = isif_enum_pix,
- .set_pixel_format = isif_set_pixel_format,
- .get_pixel_format = isif_get_pixel_format,
- .set_frame_format = isif_set_frame_format,
- .get_frame_format = isif_get_frame_format,
- .set_image_window = isif_set_image_window,
- .get_image_window = isif_get_image_window,
- .get_line_length = isif_get_line_length,
- .setfbaddr = isif_setfbaddr,
- .getfid = isif_getfid,
- },
-};
-
-static int isif_probe(struct platform_device *pdev)
-{
- void (*setup_pinmux)(void);
- struct resource *res;
- void *__iomem addr;
- int status = 0, i;
-
- /*
- * first try to register with vpfe. If not correct platform, then we
- * don't have to iomap
- */
- status = vpfe_register_ccdc_device(&isif_hw_dev);
- if (status < 0)
- return status;
-
- /* Get and enable Master clock */
- isif_cfg.mclk = clk_get(&pdev->dev, "master");
- if (IS_ERR(isif_cfg.mclk)) {
- status = PTR_ERR(isif_cfg.mclk);
- goto fail_mclk;
- }
- if (clk_prepare_enable(isif_cfg.mclk)) {
- status = -ENODEV;
- goto fail_mclk;
- }
-
- /* Platform data holds setup_pinmux function ptr */
- if (NULL == pdev->dev.platform_data) {
- status = -ENODEV;
- goto fail_mclk;
- }
- setup_pinmux = pdev->dev.platform_data;
- /*
- * setup Mux configuration for ccdc which may be different for
- * different SoCs using this CCDC
- */
- setup_pinmux();
-
- i = 0;
- /* Get the ISIF base address, linearization table0 and table1 addr. */
- while (i < 3) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, i);
- if (!res) {
- status = -ENODEV;
- goto fail_nobase_res;
- }
- res = request_mem_region(res->start, resource_size(res),
- res->name);
- if (!res) {
- status = -EBUSY;
- goto fail_nobase_res;
- }
- addr = ioremap_nocache(res->start, resource_size(res));
- if (!addr) {
- status = -ENOMEM;
- goto fail_base_iomap;
- }
- switch (i) {
- case 0:
- /* ISIF base address */
- isif_cfg.base_addr = addr;
- break;
- case 1:
- /* ISIF linear tbl0 address */
- isif_cfg.linear_tbl0_addr = addr;
- break;
- default:
- /* ISIF linear tbl0 address */
- isif_cfg.linear_tbl1_addr = addr;
- break;
- }
- i++;
- }
- isif_cfg.dev = &pdev->dev;
-
- printk(KERN_NOTICE "%s is registered with vpfe.\n",
- isif_hw_dev.name);
- return 0;
-fail_base_iomap:
- release_mem_region(res->start, resource_size(res));
- i--;
-fail_nobase_res:
- if (isif_cfg.base_addr)
- iounmap(isif_cfg.base_addr);
- if (isif_cfg.linear_tbl0_addr)
- iounmap(isif_cfg.linear_tbl0_addr);
-
- while (i >= 0) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, i);
- release_mem_region(res->start, resource_size(res));
- i--;
- }
-fail_mclk:
- clk_disable_unprepare(isif_cfg.mclk);
- clk_put(isif_cfg.mclk);
- vpfe_unregister_ccdc_device(&isif_hw_dev);
- return status;
-}
-
-static int isif_remove(struct platform_device *pdev)
-{
- struct resource *res;
- int i = 0;
-
- iounmap(isif_cfg.base_addr);
- iounmap(isif_cfg.linear_tbl0_addr);
- iounmap(isif_cfg.linear_tbl1_addr);
- while (i < 3) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, i);
- if (res)
- release_mem_region(res->start, resource_size(res));
- i++;
- }
- vpfe_unregister_ccdc_device(&isif_hw_dev);
- clk_disable_unprepare(isif_cfg.mclk);
- clk_put(isif_cfg.mclk);
- return 0;
-}
-
-static struct platform_driver isif_driver = {
- .driver = {
- .name = "isif",
- .owner = THIS_MODULE,
- },
- .remove = isif_remove,
- .probe = isif_probe,
-};
-
-module_platform_driver(isif_driver);
-
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/isif_regs.h b/drivers/media/platform/davinci/isif_regs.h
deleted file mode 100644
index aa69a463..00000000
--- a/drivers/media/platform/davinci/isif_regs.h
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _ISIF_REGS_H
-#define _ISIF_REGS_H
-
-/* ISIF registers relative offsets */
-#define SYNCEN 0x00
-#define MODESET 0x04
-#define HDW 0x08
-#define VDW 0x0c
-#define PPLN 0x10
-#define LPFR 0x14
-#define SPH 0x18
-#define LNH 0x1c
-#define SLV0 0x20
-#define SLV1 0x24
-#define LNV 0x28
-#define CULH 0x2c
-#define CULV 0x30
-#define HSIZE 0x34
-#define SDOFST 0x38
-#define CADU 0x3c
-#define CADL 0x40
-#define LINCFG0 0x44
-#define LINCFG1 0x48
-#define CCOLP 0x4c
-#define CRGAIN 0x50
-#define CGRGAIN 0x54
-#define CGBGAIN 0x58
-#define CBGAIN 0x5c
-#define COFSTA 0x60
-#define FLSHCFG0 0x64
-#define FLSHCFG1 0x68
-#define FLSHCFG2 0x6c
-#define VDINT0 0x70
-#define VDINT1 0x74
-#define VDINT2 0x78
-#define MISC 0x7c
-#define CGAMMAWD 0x80
-#define REC656IF 0x84
-#define CCDCFG 0x88
-/*****************************************************
-* Defect Correction registers
-*****************************************************/
-#define DFCCTL 0x8c
-#define VDFSATLV 0x90
-#define DFCMEMCTL 0x94
-#define DFCMEM0 0x98
-#define DFCMEM1 0x9c
-#define DFCMEM2 0xa0
-#define DFCMEM3 0xa4
-#define DFCMEM4 0xa8
-/****************************************************
-* Black Clamp registers
-****************************************************/
-#define CLAMPCFG 0xac
-#define CLDCOFST 0xb0
-#define CLSV 0xb4
-#define CLHWIN0 0xb8
-#define CLHWIN1 0xbc
-#define CLHWIN2 0xc0
-#define CLVRV 0xc4
-#define CLVWIN0 0xc8
-#define CLVWIN1 0xcc
-#define CLVWIN2 0xd0
-#define CLVWIN3 0xd4
-/****************************************************
-* Lense Shading Correction
-****************************************************/
-#define DATAHOFST 0xd8
-#define DATAVOFST 0xdc
-#define LSCHVAL 0xe0
-#define LSCVVAL 0xe4
-#define TWODLSCCFG 0xe8
-#define TWODLSCOFST 0xec
-#define TWODLSCINI 0xf0
-#define TWODLSCGRBU 0xf4
-#define TWODLSCGRBL 0xf8
-#define TWODLSCGROF 0xfc
-#define TWODLSCORBU 0x100
-#define TWODLSCORBL 0x104
-#define TWODLSCOROF 0x108
-#define TWODLSCIRQEN 0x10c
-#define TWODLSCIRQST 0x110
-/****************************************************
-* Data formatter
-****************************************************/
-#define FMTCFG 0x114
-#define FMTPLEN 0x118
-#define FMTSPH 0x11c
-#define FMTLNH 0x120
-#define FMTSLV 0x124
-#define FMTLNV 0x128
-#define FMTRLEN 0x12c
-#define FMTHCNT 0x130
-#define FMTAPTR_BASE 0x134
-/* Below macro for addresses FMTAPTR0 - FMTAPTR15 */
-#define FMTAPTR(i) (FMTAPTR_BASE + (i * 4))
-#define FMTPGMVF0 0x174
-#define FMTPGMVF1 0x178
-#define FMTPGMAPU0 0x17c
-#define FMTPGMAPU1 0x180
-#define FMTPGMAPS0 0x184
-#define FMTPGMAPS1 0x188
-#define FMTPGMAPS2 0x18c
-#define FMTPGMAPS3 0x190
-#define FMTPGMAPS4 0x194
-#define FMTPGMAPS5 0x198
-#define FMTPGMAPS6 0x19c
-#define FMTPGMAPS7 0x1a0
-/************************************************
-* Color Space Converter
-************************************************/
-#define CSCCTL 0x1a4
-#define CSCM0 0x1a8
-#define CSCM1 0x1ac
-#define CSCM2 0x1b0
-#define CSCM3 0x1b4
-#define CSCM4 0x1b8
-#define CSCM5 0x1bc
-#define CSCM6 0x1c0
-#define CSCM7 0x1c4
-#define OBWIN0 0x1c8
-#define OBWIN1 0x1cc
-#define OBWIN2 0x1d0
-#define OBWIN3 0x1d4
-#define OBVAL0 0x1d8
-#define OBVAL1 0x1dc
-#define OBVAL2 0x1e0
-#define OBVAL3 0x1e4
-#define OBVAL4 0x1e8
-#define OBVAL5 0x1ec
-#define OBVAL6 0x1f0
-#define OBVAL7 0x1f4
-#define CLKCTL 0x1f8
-
-/* Masks & Shifts below */
-#define START_PX_HOR_MASK 0x7FFF
-#define NUM_PX_HOR_MASK 0x7FFF
-#define START_VER_ONE_MASK 0x7FFF
-#define START_VER_TWO_MASK 0x7FFF
-#define NUM_LINES_VER 0x7FFF
-
-/* gain - offset masks */
-#define GAIN_INTEGER_SHIFT 9
-#define OFFSET_MASK 0xFFF
-#define GAIN_SDRAM_EN_SHIFT 12
-#define GAIN_IPIPE_EN_SHIFT 13
-#define GAIN_H3A_EN_SHIFT 14
-#define OFST_SDRAM_EN_SHIFT 8
-#define OFST_IPIPE_EN_SHIFT 9
-#define OFST_H3A_EN_SHIFT 10
-#define GAIN_OFFSET_EN_MASK 0x7700
-
-/* Culling */
-#define CULL_PAT_EVEN_LINE_SHIFT 8
-
-/* CCDCFG register */
-#define ISIF_YCINSWP_RAW (0x00 << 4)
-#define ISIF_YCINSWP_YCBCR (0x01 << 4)
-#define ISIF_CCDCFG_FIDMD_LATCH_VSYNC (0x00 << 6)
-#define ISIF_CCDCFG_WENLOG_AND (0x00 << 8)
-#define ISIF_CCDCFG_TRGSEL_WEN (0x00 << 9)
-#define ISIF_CCDCFG_EXTRG_DISABLE (0x00 << 10)
-#define ISIF_LATCH_ON_VSYNC_DISABLE (0x01 << 15)
-#define ISIF_LATCH_ON_VSYNC_ENABLE (0x00 << 15)
-#define ISIF_DATA_PACK_MASK 3
-#define ISIF_DATA_PACK16 0
-#define ISIF_DATA_PACK12 1
-#define ISIF_DATA_PACK8 2
-#define ISIF_PIX_ORDER_SHIFT 11
-#define ISIF_BW656_ENABLE (0x01 << 5)
-
-/* MODESET registers */
-#define ISIF_VDHDOUT_INPUT (0x00 << 0)
-#define ISIF_INPUT_SHIFT 12
-#define ISIF_RAW_INPUT_MODE 0
-#define ISIF_FID_POL_SHIFT 4
-#define ISIF_HD_POL_SHIFT 3
-#define ISIF_VD_POL_SHIFT 2
-#define ISIF_DATAPOL_NORMAL 0
-#define ISIF_DATAPOL_SHIFT 6
-#define ISIF_EXWEN_DISABLE 0
-#define ISIF_EXWEN_SHIFT 5
-#define ISIF_FRM_FMT_SHIFT 7
-#define ISIF_DATASFT_SHIFT 8
-#define ISIF_LPF_SHIFT 14
-#define ISIF_LPF_MASK 1
-
-/* GAMMAWD registers */
-#define ISIF_ALAW_GAMA_WD_MASK 0xF
-#define ISIF_ALAW_GAMA_WD_SHIFT 1
-#define ISIF_ALAW_ENABLE 1
-#define ISIF_GAMMAWD_CFA_SHIFT 5
-
-/* HSIZE registers */
-#define ISIF_HSIZE_FLIP_MASK 1
-#define ISIF_HSIZE_FLIP_SHIFT 12
-
-/* MISC registers */
-#define ISIF_DPCM_EN_SHIFT 12
-#define ISIF_DPCM_PREDICTOR_SHIFT 13
-
-/* Black clamp related */
-#define ISIF_BC_MODE_COLOR_SHIFT 4
-#define ISIF_HORZ_BC_MODE_SHIFT 1
-#define ISIF_HORZ_BC_WIN_SEL_SHIFT 5
-#define ISIF_HORZ_BC_PIX_LIMIT_SHIFT 6
-#define ISIF_HORZ_BC_WIN_H_SIZE_SHIFT 8
-#define ISIF_HORZ_BC_WIN_V_SIZE_SHIFT 12
-#define ISIF_VERT_BC_RST_VAL_SEL_SHIFT 4
-#define ISIF_VERT_BC_LINE_AVE_COEF_SHIFT 8
-
-/* VDFC registers */
-#define ISIF_VDFC_EN_SHIFT 4
-#define ISIF_VDFC_CORR_MOD_SHIFT 5
-#define ISIF_VDFC_CORR_WHOLE_LN_SHIFT 7
-#define ISIF_VDFC_LEVEL_SHFT_SHIFT 8
-#define ISIF_VDFC_POS_MASK 0x1FFF
-#define ISIF_DFCMEMCTL_DFCMARST_SHIFT 2
-
-/* CSC registers */
-#define ISIF_CSC_COEF_INTEG_MASK 7
-#define ISIF_CSC_COEF_DECIMAL_MASK 0x1f
-#define ISIF_CSC_COEF_INTEG_SHIFT 5
-#define ISIF_CSCM_MSB_SHIFT 8
-#define ISIF_DF_CSC_SPH_MASK 0x1FFF
-#define ISIF_DF_CSC_LNH_MASK 0x1FFF
-#define ISIF_DF_CSC_SLV_MASK 0x1FFF
-#define ISIF_DF_CSC_LNV_MASK 0x1FFF
-#define ISIF_DF_NUMLINES 0x7FFF
-#define ISIF_DF_NUMPIX 0x1FFF
-
-/* Offsets for LSC/DFC/Gain */
-#define ISIF_DATA_H_OFFSET_MASK 0x1FFF
-#define ISIF_DATA_V_OFFSET_MASK 0x1FFF
-
-/* Linearization */
-#define ISIF_LIN_CORRSFT_SHIFT 4
-#define ISIF_LIN_SCALE_FACT_INTEG_SHIFT 10
-
-
-/* Pattern registers */
-#define ISIF_PG_EN (1 << 3)
-#define ISIF_SEL_PG_SRC (3 << 4)
-#define ISIF_PG_VD_POL_SHIFT 0
-#define ISIF_PG_HD_POL_SHIFT 1
-
-/*random other junk*/
-#define ISIF_SYNCEN_VDHDEN_MASK (1 << 0)
-#define ISIF_SYNCEN_WEN_MASK (1 << 1)
-#define ISIF_SYNCEN_WEN_SHIFT 1
-
-#endif
diff --git a/drivers/media/platform/davinci/logicpd_encoder.c b/drivers/media/platform/davinci/logicpd_encoder.c
new file mode 100644
index 00000000..b0358333
--- /dev/null
+++ b/drivers/media/platform/davinci/logicpd_encoder.c
@@ -0,0 +1,428 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* logicpd_encoder.c. This is just a place holder for hardcoding all supported
+ modes timing. LogicPD timing signals are programmed by the encoder manager
+ based on this data.
+ */
+
+/* Kernel Specific header files */
+
+#include <linux/kernel.h>
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <media/davinci/vid_encoder_if.h>
+#include <media/davinci/logicpd_encoder.h>
+
+/* Function prototypes */
+static int logicpd_encoder_initialize(struct vid_encoder_device *enc, int flag);
+static int logicpd_encoder_deinitialize(struct vid_encoder_device *enc);
+
+static int logicpd_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+static int logicpd_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+
+static int logicpd_encoder_setoutput(char *output,
+ struct vid_encoder_device *enc);
+static int logicpd_encoder_getoutput(char *output,
+ struct vid_encoder_device *enc);
+
+static int logicpd_encoder_enumoutput(int index,
+ char *output,
+ struct vid_encoder_device *enc);
+
+static struct logicpd_encoder_config logicpd_encoder_configuration = {
+ .no_of_outputs = LOGICPD_ENCODER_MAX_NO_OUTPUTS,
+ .output[0] = {
+ .output_name = VID_ENC_OUTPUT_LCD,
+ .no_of_standard = LOGICPD_ENCODER_GRAPHICS_NUM_STD,
+ .standards[0] = {
+ .name = VID_ENC_STD_640x480,
+ .std = 1,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 640,
+ .yres = 480,
+ .fps = {60, 1},
+ .left_margin = 85,
+ .right_margin = 70,
+ .upper_margin = 32,
+ .lower_margin = 11,
+ .hsync_len = 9,
+ .vsync_len = 9,
+ .flags = 0}, /* hsync -ve, vsync -ve */
+ .standards[1] = {
+ .name = VID_ENC_STD_640x400,
+ .std = 1,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 640,
+ .yres = 400,
+ .fps = {60, 1},
+ .left_margin = 85,
+ .right_margin = 70,
+ .upper_margin = 72,
+ .lower_margin = 51,
+ .hsync_len = 9,
+ .vsync_len = 9,
+ .flags = 2}, /* hsync -ve, vsync +ve */
+ .standards[2] = {
+ .name = VID_ENC_STD_640x350,
+ .std = 1,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 640,
+ .yres = 350,
+ .fps = {60, 1},
+ .left_margin = 85,
+ .right_margin = 70,
+ .upper_margin = 97,
+ .lower_margin = 76,
+ .hsync_len = 9,
+ .vsync_len = 9,
+ .flags = 1}, /* hsync +ve, vsync -ve */
+ .standards[3] = {
+ .name = VID_ENC_STD_480x272,
+ .std = 1,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 480,
+ .yres = 272,
+ .fps = {60, 1},
+ .left_margin = 43,
+ .right_margin = 43,
+ .upper_margin = 12,
+ .lower_margin = 12,
+ .hsync_len = 42,
+ .vsync_len = 10,
+ .flags = 0}, /* hsync +ve, vsync -ve */
+ .standards[4] = { /* This is programmed by the user application. We just save
+ the received timing information */
+ .name = VID_ENC_STD_NON_STANDARD,
+ .std = 0,
+ .if_type = VID_ENC_IF_PRGB,
+ .interlaced = 0,
+ .xres = 0,
+ .yres = 0,
+ .fps = {0, 0},
+ .left_margin = 0,
+ .right_margin = 0,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ },
+};
+
+static struct logicpd_encoder_channel logicpd_encoder_channel_info = {
+ .params.outindex = 0,
+ .params.mode = VID_ENC_STD_640x480,
+ .enc_device = NULL
+};
+
+static struct vid_enc_output_ops outputs_ops = {
+ .count = LOGICPD_ENCODER_MAX_NO_OUTPUTS,
+ .enumoutput = logicpd_encoder_enumoutput,
+ .setoutput = logicpd_encoder_setoutput,
+ .getoutput = logicpd_encoder_getoutput
+};
+
+static struct vid_enc_mode_ops modes_ops = {
+ .setmode = logicpd_encoder_setmode,
+ .getmode = logicpd_encoder_getmode,
+};
+
+static struct vid_encoder_device logicpd_encoder_dev = {
+ .name = "LOGICPD_ENCODER",
+ .capabilities = 0,
+ .initialize = logicpd_encoder_initialize,
+ .mode_ops = &modes_ops,
+ .ctrl_ops = NULL,
+ .output_ops = &outputs_ops,
+ .params_ops = NULL,
+ .misc_ops = NULL,
+ .deinitialize = logicpd_encoder_deinitialize,
+};
+
+/* This function is called by the encoder manager to initialize logicpd encoder driver.
+ */
+static int logicpd_encoder_initialize(struct vid_encoder_device *enc, int flag)
+{
+ int err = 0, outindex;
+ char *std, *output;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ logicpd_encoder_channel_info.enc_device = (struct encoder_device *)enc;
+
+ /* call set standard */
+ std = logicpd_encoder_channel_info.params.mode;
+ outindex = logicpd_encoder_channel_info.params.outindex;
+ output = logicpd_encoder_configuration.output[outindex].output_name;
+ err |= logicpd_encoder_setoutput(output, enc);
+ if (err < 0) {
+ err = -EINVAL;
+ printk(KERN_ERR "Error occured in setoutput\n");
+ logicpd_encoder_deinitialize(enc);
+ return err;
+ }
+ printk(KERN_DEBUG "LogicPD Encoder initialized\n");
+ return err;
+}
+
+/* Function to de-initialize the encoder */
+static int logicpd_encoder_deinitialize(struct vid_encoder_device *enc)
+{
+ if (NULL == enc) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ logicpd_encoder_channel_info.enc_device = NULL;
+ printk(KERN_DEBUG "LogicPD Encoder de-initialized\n");
+ return 0;
+}
+
+/* Following function is used to set the mode*/
+static int logicpd_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, outindex, i;
+ char *mode;
+ struct vid_enc_mode_info *my_mode_info = NULL;
+
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ if (NULL == (mode = mode_info->name)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "Start of logicpd_encoder_setmode..\n");
+ outindex = logicpd_encoder_channel_info.params.outindex;
+
+ if (mode_info->std) {
+ char *mymode = NULL;
+ /* This is a standard mode */
+ for (i = 0;
+ i <
+ logicpd_encoder_configuration.output[outindex].
+ no_of_standard; i++) {
+ if (!strcmp
+ (logicpd_encoder_configuration.output[outindex].
+ standards[i].name, mode)) {
+ mymode =
+ logicpd_encoder_configuration.
+ output[outindex].standards[i].name;
+ break;
+ }
+ }
+ if ((i ==
+ logicpd_encoder_configuration.output[outindex].
+ no_of_standard) || (NULL == mymode)) {
+ printk(KERN_ERR "Invalid id...\n");
+ return -EINVAL;
+ }
+ /* Store the standard in global object of logicpd_encoder */
+ logicpd_encoder_channel_info.params.mode = mymode;
+ return 0;
+ } else {
+ /* Non- Standard mode. Check if we support it. If so
+ save the timing info and return */
+ for (i = 0; i < LOGICPD_ENCODER_GRAPHICS_NUM_STD; i++) {
+ if (!strcmp
+ (logicpd_encoder_configuration.output[outindex].
+ standards[i].name, VID_ENC_STD_NON_STANDARD)) {
+ my_mode_info =
+ &logicpd_encoder_configuration.
+ output[outindex].standards[i];
+ break;
+ }
+ }
+ if (my_mode_info) {
+ /* We support. So save timing info and return success
+ interface type is same as what is currently is active
+ */
+ my_mode_info->interlaced = mode_info->interlaced;
+ my_mode_info->xres = mode_info->xres;
+ my_mode_info->yres = mode_info->yres;
+ my_mode_info->fps = mode_info->fps;
+ my_mode_info->left_margin = mode_info->left_margin;
+ my_mode_info->right_margin = mode_info->right_margin;
+ my_mode_info->upper_margin = mode_info->upper_margin;
+ my_mode_info->lower_margin = mode_info->lower_margin;
+ my_mode_info->hsync_len = mode_info->hsync_len;
+ my_mode_info->vsync_len = mode_info->vsync_len;
+ my_mode_info->flags = mode_info->flags;
+ /* If we need to configure something in the encoder module, we need to
+ do this here */
+ return 0;
+ }
+ printk(KERN_ERR "Mode not supported..\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "</logicpd_encoder_setmode>\n");
+ return err;
+}
+
+/* Following function is used to get currently selected mode.*/
+static int logicpd_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, i, outindex;
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<logicpd_encoder_getmode>\n");
+ outindex = logicpd_encoder_channel_info.params.outindex;
+ for (i = 0; i < LOGICPD_ENCODER_GRAPHICS_NUM_STD; i++) {
+ if (!strcmp(logicpd_encoder_channel_info.params.mode,
+ logicpd_encoder_configuration.output[outindex].
+ standards[i].name)) {
+ memcpy(mode_info,
+ &logicpd_encoder_configuration.output[outindex].
+ standards[i], sizeof(struct vid_enc_mode_info));
+ break;
+ }
+ }
+ if (i == LOGICPD_ENCODER_GRAPHICS_NUM_STD) {
+ printk(KERN_ERR "Wiered. No mode info\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "</logicpd_encoder_getmode>\n");
+ return err;
+}
+
+/* For LogicPD, we have only one output, called LCD, we
+ always set this to this at init
+*/
+static int logicpd_encoder_setoutput(char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+ struct vid_enc_mode_info *my_mode_info;
+ printk(KERN_DEBUG "<logicpd_encoder_setoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output: NULL Pointer.\n");
+ return -EINVAL;
+ }
+
+ /* Just check if the default output match with this output name */
+ if (strcmp(logicpd_encoder_configuration.output[0].output_name, output)) {
+ printk(KERN_ERR "no matching output found.\n");
+ return -EINVAL;
+ }
+ logicpd_encoder_channel_info.params.mode
+ = logicpd_encoder_configuration.output[0].standards[0].name;
+
+ my_mode_info = &logicpd_encoder_configuration.output[0].standards[0];
+ err |= logicpd_encoder_setmode(my_mode_info, enc);
+ if (err < 0) {
+ printk(KERN_ERR "Error in setting default mode\n");
+ return err;
+ }
+ printk(KERN_DEBUG "</logicpd_encoder_setoutput>\n");
+ return err;
+}
+
+/* Following function is used to get output name of current output.*/
+static int logicpd_encoder_getoutput(char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, index, len;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<logicpd_encoder_getoutput>\n");
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ index = logicpd_encoder_channel_info.params.outindex;
+ len = strlen(logicpd_encoder_configuration.output[index].output_name);
+ if (len > (VID_ENC_NAME_MAX_CHARS - 1))
+ len = VID_ENC_NAME_MAX_CHARS - 1;
+ strncpy(output, logicpd_encoder_configuration.output[index].output_name,
+ len);
+ output[len] = '\0';
+ printk(KERN_DEBUG "</logicpd_encoder_getoutput>\n");
+ return err;
+}
+
+/* Following function is used to enumerate outputs supported by the driver.
+ It fills in information in the output. */
+static int logicpd_encoder_enumoutput(int index, char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+
+ printk(KERN_DEBUG "<logicpd_encoder_enumoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* Only one output is available */
+ if (index >= logicpd_encoder_configuration.no_of_outputs) {
+ return -EINVAL;
+ }
+ strncpy(output,
+ logicpd_encoder_configuration.output[index].output_name,
+ VID_ENC_NAME_MAX_CHARS);
+ printk(KERN_DEBUG "</logicpd_encoder_enumoutput>\n");
+ return err;
+}
+
+/* This function used to initialize the LogicPD encoder driver */
+static int logicpd_encoder_init(void)
+{
+ int err = 0;
+
+ err = vid_enc_register_encoder(&logicpd_encoder_dev);
+ printk(KERN_NOTICE "LogicPD encoder initialized\n");
+ return err;
+}
+
+/* Function used to cleanup LogicPD encoder driver */
+static void logicpd_encoder_cleanup(void)
+{
+ vid_enc_unregister_encoder(&logicpd_encoder_dev);
+}
+
+subsys_initcall_sync(logicpd_encoder_init);
+module_exit(logicpd_encoder_cleanup);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/vpbe.c b/drivers/media/platform/davinci/vpbe.c
deleted file mode 100644
index 4ca0f9a2..00000000
--- a/drivers/media/platform/davinci/vpbe.c
+++ /dev/null
@@ -1,872 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/wait.h>
-#include <linux/time.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-
-#include <media/v4l2-device.h>
-#include <media/davinci/vpbe_types.h>
-#include <media/davinci/vpbe.h>
-#include <media/davinci/vpss.h>
-#include <media/davinci/vpbe_venc.h>
-
-#define VPBE_DEFAULT_OUTPUT "Composite"
-#define VPBE_DEFAULT_MODE "ntsc"
-
-static char *def_output = VPBE_DEFAULT_OUTPUT;
-static char *def_mode = VPBE_DEFAULT_MODE;
-static int debug;
-
-module_param(def_output, charp, S_IRUGO);
-module_param(def_mode, charp, S_IRUGO);
-module_param(debug, int, 0644);
-
-MODULE_PARM_DESC(def_output, "vpbe output name (default:Composite)");
-MODULE_PARM_DESC(def_mode, "vpbe output mode name (default:ntsc");
-MODULE_PARM_DESC(debug, "Debug level 0-1");
-
-MODULE_DESCRIPTION("TI DMXXX VPBE Display controller");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Texas Instruments");
-
-/**
- * vpbe_current_encoder_info - Get config info for current encoder
- * @vpbe_dev - vpbe device ptr
- *
- * Return ptr to current encoder config info
- */
-static struct encoder_config_info*
-vpbe_current_encoder_info(struct vpbe_device *vpbe_dev)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- int index = vpbe_dev->current_sd_index;
-
- return ((index == 0) ? &cfg->venc :
- &cfg->ext_encoders[index-1]);
-}
-
-/**
- * vpbe_find_encoder_sd_index - Given a name find encoder sd index
- *
- * @vpbe_config - ptr to vpbe cfg
- * @output_index - index used by application
- *
- * Return sd index of the encoder
- */
-static int vpbe_find_encoder_sd_index(struct vpbe_config *cfg,
- int index)
-{
- char *encoder_name = cfg->outputs[index].subdev_name;
- int i;
-
- /* Venc is always first */
- if (!strcmp(encoder_name, cfg->venc.module_name))
- return 0;
-
- for (i = 0; i < cfg->num_ext_encoders; i++) {
- if (!strcmp(encoder_name,
- cfg->ext_encoders[i].module_name))
- return i+1;
- }
-
- return -EINVAL;
-}
-
-/**
- * vpbe_g_cropcap - Get crop capabilities of the display
- * @vpbe_dev - vpbe device ptr
- * @cropcap - cropcap is a ptr to struct v4l2_cropcap
- *
- * Update the crop capabilities in crop cap for current
- * mode
- */
-static int vpbe_g_cropcap(struct vpbe_device *vpbe_dev,
- struct v4l2_cropcap *cropcap)
-{
- if (NULL == cropcap)
- return -EINVAL;
- cropcap->bounds.left = 0;
- cropcap->bounds.top = 0;
- cropcap->bounds.width = vpbe_dev->current_timings.xres;
- cropcap->bounds.height = vpbe_dev->current_timings.yres;
- cropcap->defrect = cropcap->bounds;
-
- return 0;
-}
-
-/**
- * vpbe_enum_outputs - enumerate outputs
- * @vpbe_dev - vpbe device ptr
- * @output - ptr to v4l2_output structure
- *
- * Enumerates the outputs available at the vpbe display
- * returns the status, -EINVAL if end of output list
- */
-static int vpbe_enum_outputs(struct vpbe_device *vpbe_dev,
- struct v4l2_output *output)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- int temp_index = output->index;
-
- if (temp_index >= cfg->num_outputs)
- return -EINVAL;
-
- *output = cfg->outputs[temp_index].output;
- output->index = temp_index;
-
- return 0;
-}
-
-static int vpbe_get_mode_info(struct vpbe_device *vpbe_dev, char *mode,
- int output_index)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- struct vpbe_enc_mode_info var;
- int curr_output = output_index;
- int i;
-
- if (NULL == mode)
- return -EINVAL;
-
- for (i = 0; i < cfg->outputs[curr_output].num_modes; i++) {
- var = cfg->outputs[curr_output].modes[i];
- if (!strcmp(mode, var.name)) {
- vpbe_dev->current_timings = var;
- return 0;
- }
- }
-
- return -EINVAL;
-}
-
-static int vpbe_get_current_mode_info(struct vpbe_device *vpbe_dev,
- struct vpbe_enc_mode_info *mode_info)
-{
- if (NULL == mode_info)
- return -EINVAL;
-
- *mode_info = vpbe_dev->current_timings;
-
- return 0;
-}
-
-/* Get std by std id */
-static int vpbe_get_std_info(struct vpbe_device *vpbe_dev,
- v4l2_std_id std_id)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- struct vpbe_enc_mode_info var;
- int curr_output = vpbe_dev->current_out_index;
- int i;
-
- for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) {
- var = cfg->outputs[curr_output].modes[i];
- if ((var.timings_type & VPBE_ENC_STD) &&
- (var.std_id & std_id)) {
- vpbe_dev->current_timings = var;
- return 0;
- }
- }
-
- return -EINVAL;
-}
-
-static int vpbe_get_std_info_by_name(struct vpbe_device *vpbe_dev,
- char *std_name)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- struct vpbe_enc_mode_info var;
- int curr_output = vpbe_dev->current_out_index;
- int i;
-
- for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) {
- var = cfg->outputs[curr_output].modes[i];
- if (!strcmp(var.name, std_name)) {
- vpbe_dev->current_timings = var;
- return 0;
- }
- }
-
- return -EINVAL;
-}
-
-/**
- * vpbe_set_output - Set output
- * @vpbe_dev - vpbe device ptr
- * @index - index of output
- *
- * Set vpbe output to the output specified by the index
- */
-static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index)
-{
- struct encoder_config_info *curr_enc_info =
- vpbe_current_encoder_info(vpbe_dev);
- struct vpbe_config *cfg = vpbe_dev->cfg;
- struct venc_platform_data *venc_device = vpbe_dev->venc_device;
- enum v4l2_mbus_pixelcode if_params;
- int enc_out_index;
- int sd_index;
- int ret = 0;
-
- if (index >= cfg->num_outputs)
- return -EINVAL;
-
- mutex_lock(&vpbe_dev->lock);
-
- sd_index = vpbe_dev->current_sd_index;
- enc_out_index = cfg->outputs[index].output.index;
- /*
- * Currently we switch the encoder based on output selected
- * by the application. If media controller is implemented later
- * there is will be an API added to setup_link between venc
- * and external encoder. So in that case below comparison always
- * match and encoder will not be switched. But if application
- * chose not to use media controller, then this provides current
- * way of switching encoder at the venc output.
- */
- if (strcmp(curr_enc_info->module_name,
- cfg->outputs[index].subdev_name)) {
- /* Need to switch the encoder at the output */
- sd_index = vpbe_find_encoder_sd_index(cfg, index);
- if (sd_index < 0) {
- ret = -EINVAL;
- goto out;
- }
-
- if_params = cfg->outputs[index].if_params;
- venc_device->setup_if_config(if_params);
- if (ret)
- goto out;
- }
-
- /* Set output at the encoder */
- ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video,
- s_routing, 0, enc_out_index, 0);
- if (ret)
- goto out;
-
- /*
- * It is assumed that venc or extenal encoder will set a default
- * mode in the sub device. For external encoder or LCD pannel output,
- * we also need to set up the lcd port for the required mode. So setup
- * the lcd port for the default mode that is configured in the board
- * arch/arm/mach-davinci/board-dm355-evm.setup file for the external
- * encoder.
- */
- ret = vpbe_get_mode_info(vpbe_dev,
- cfg->outputs[index].default_mode, index);
- if (!ret) {
- struct osd_state *osd_device = vpbe_dev->osd_device;
-
- osd_device->ops.set_left_margin(osd_device,
- vpbe_dev->current_timings.left_margin);
- osd_device->ops.set_top_margin(osd_device,
- vpbe_dev->current_timings.upper_margin);
- vpbe_dev->current_sd_index = sd_index;
- vpbe_dev->current_out_index = index;
- }
-out:
- mutex_unlock(&vpbe_dev->lock);
- return ret;
-}
-
-static int vpbe_set_default_output(struct vpbe_device *vpbe_dev)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- int ret = 0;
- int i;
-
- for (i = 0; i < cfg->num_outputs; i++) {
- if (!strcmp(def_output,
- cfg->outputs[i].output.name)) {
- ret = vpbe_set_output(vpbe_dev, i);
- if (!ret)
- vpbe_dev->current_out_index = i;
- return ret;
- }
- }
- return ret;
-}
-
-/**
- * vpbe_get_output - Get output
- * @vpbe_dev - vpbe device ptr
- *
- * return current vpbe output to the the index
- */
-static unsigned int vpbe_get_output(struct vpbe_device *vpbe_dev)
-{
- return vpbe_dev->current_out_index;
-}
-
-/**
- * vpbe_s_dv_timings - Set the given preset timings in the encoder
- *
- * Sets the timings if supported by the current encoder. Return the status.
- * 0 - success & -EINVAL on error
- */
-static int vpbe_s_dv_timings(struct vpbe_device *vpbe_dev,
- struct v4l2_dv_timings *dv_timings)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- int out_index = vpbe_dev->current_out_index;
- struct vpbe_output *output = &cfg->outputs[out_index];
- int sd_index = vpbe_dev->current_sd_index;
- int ret, i;
-
-
- if (!(cfg->outputs[out_index].output.capabilities &
- V4L2_OUT_CAP_DV_TIMINGS))
- return -EINVAL;
-
- for (i = 0; i < output->num_modes; i++) {
- if (output->modes[i].timings_type == VPBE_ENC_CUSTOM_TIMINGS &&
- !memcmp(&output->modes[i].dv_timings,
- dv_timings, sizeof(*dv_timings)))
- break;
- }
- if (i >= output->num_modes)
- return -EINVAL;
- vpbe_dev->current_timings = output->modes[i];
- mutex_lock(&vpbe_dev->lock);
-
- ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video,
- s_dv_timings, dv_timings);
- if (!ret && (vpbe_dev->amp != NULL)) {
- /* Call amplifier subdevice */
- ret = v4l2_subdev_call(vpbe_dev->amp, video,
- s_dv_timings, dv_timings);
- }
- /* set the lcd controller output for the given mode */
- if (!ret) {
- struct osd_state *osd_device = vpbe_dev->osd_device;
-
- osd_device->ops.set_left_margin(osd_device,
- vpbe_dev->current_timings.left_margin);
- osd_device->ops.set_top_margin(osd_device,
- vpbe_dev->current_timings.upper_margin);
- }
- mutex_unlock(&vpbe_dev->lock);
-
- return ret;
-}
-
-/**
- * vpbe_g_dv_timings - Get the timings in the current encoder
- *
- * Get the timings in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int vpbe_g_dv_timings(struct vpbe_device *vpbe_dev,
- struct v4l2_dv_timings *dv_timings)
-{
- if (vpbe_dev->current_timings.timings_type &
- VPBE_ENC_CUSTOM_TIMINGS) {
- *dv_timings = vpbe_dev->current_timings.dv_timings;
- return 0;
- }
-
- return -EINVAL;
-}
-
-/**
- * vpbe_enum_dv_timings - Enumerate the dv timings in the current encoder
- *
- * Get the timings in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int vpbe_enum_dv_timings(struct vpbe_device *vpbe_dev,
- struct v4l2_enum_dv_timings *timings)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- int out_index = vpbe_dev->current_out_index;
- struct vpbe_output *output = &cfg->outputs[out_index];
- int j = 0;
- int i;
-
- if (!(output->output.capabilities & V4L2_OUT_CAP_DV_TIMINGS))
- return -EINVAL;
-
- for (i = 0; i < output->num_modes; i++) {
- if (output->modes[i].timings_type == VPBE_ENC_CUSTOM_TIMINGS) {
- if (j == timings->index)
- break;
- j++;
- }
- }
-
- if (i == output->num_modes)
- return -EINVAL;
- timings->timings = output->modes[i].dv_timings;
- return 0;
-}
-
-/**
- * vpbe_s_std - Set the given standard in the encoder
- *
- * Sets the standard if supported by the current encoder. Return the status.
- * 0 - success & -EINVAL on error
- */
-static int vpbe_s_std(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id)
-{
- struct vpbe_config *cfg = vpbe_dev->cfg;
- int out_index = vpbe_dev->current_out_index;
- int sd_index = vpbe_dev->current_sd_index;
- int ret;
-
- if (!(cfg->outputs[out_index].output.capabilities &
- V4L2_OUT_CAP_STD))
- return -EINVAL;
-
- ret = vpbe_get_std_info(vpbe_dev, *std_id);
- if (ret)
- return ret;
-
- mutex_lock(&vpbe_dev->lock);
-
- ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video,
- s_std_output, *std_id);
- /* set the lcd controller output for the given mode */
- if (!ret) {
- struct osd_state *osd_device = vpbe_dev->osd_device;
-
- osd_device->ops.set_left_margin(osd_device,
- vpbe_dev->current_timings.left_margin);
- osd_device->ops.set_top_margin(osd_device,
- vpbe_dev->current_timings.upper_margin);
- }
- mutex_unlock(&vpbe_dev->lock);
-
- return ret;
-}
-
-/**
- * vpbe_g_std - Get the standard in the current encoder
- *
- * Get the standard in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int vpbe_g_std(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id)
-{
- struct vpbe_enc_mode_info *cur_timings = &vpbe_dev->current_timings;
-
- if (cur_timings->timings_type & VPBE_ENC_STD) {
- *std_id = cur_timings->std_id;
- return 0;
- }
-
- return -EINVAL;
-}
-
-/**
- * vpbe_set_mode - Set mode in the current encoder using mode info
- *
- * Use the mode string to decide what timings to set in the encoder
- * This is typically useful when fbset command is used to change the current
- * timings by specifying a string to indicate the timings.
- */
-static int vpbe_set_mode(struct vpbe_device *vpbe_dev,
- struct vpbe_enc_mode_info *mode_info)
-{
- struct vpbe_enc_mode_info *preset_mode = NULL;
- struct vpbe_config *cfg = vpbe_dev->cfg;
- struct v4l2_dv_timings dv_timings;
- struct osd_state *osd_device;
- int out_index = vpbe_dev->current_out_index;
- int ret = 0;
- int i;
-
- if ((NULL == mode_info) || (NULL == mode_info->name))
- return -EINVAL;
-
- for (i = 0; i < cfg->outputs[out_index].num_modes; i++) {
- if (!strcmp(mode_info->name,
- cfg->outputs[out_index].modes[i].name)) {
- preset_mode = &cfg->outputs[out_index].modes[i];
- /*
- * it may be one of the 3 timings type. Check and
- * invoke right API
- */
- if (preset_mode->timings_type & VPBE_ENC_STD)
- return vpbe_s_std(vpbe_dev,
- &preset_mode->std_id);
- if (preset_mode->timings_type &
- VPBE_ENC_CUSTOM_TIMINGS) {
- dv_timings =
- preset_mode->dv_timings;
- return vpbe_s_dv_timings(vpbe_dev, &dv_timings);
- }
- }
- }
-
- /* Only custom timing should reach here */
- if (preset_mode == NULL)
- return -EINVAL;
-
- mutex_lock(&vpbe_dev->lock);
-
- osd_device = vpbe_dev->osd_device;
- vpbe_dev->current_timings = *preset_mode;
- osd_device->ops.set_left_margin(osd_device,
- vpbe_dev->current_timings.left_margin);
- osd_device->ops.set_top_margin(osd_device,
- vpbe_dev->current_timings.upper_margin);
-
- mutex_unlock(&vpbe_dev->lock);
-
- return ret;
-}
-
-static int vpbe_set_default_mode(struct vpbe_device *vpbe_dev)
-{
- int ret;
-
- ret = vpbe_get_std_info_by_name(vpbe_dev, def_mode);
- if (ret)
- return ret;
-
- /* set the default mode in the encoder */
- return vpbe_set_mode(vpbe_dev, &vpbe_dev->current_timings);
-}
-
-static int platform_device_get(struct device *dev, void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct vpbe_device *vpbe_dev = data;
-
- if (strstr(pdev->name, "vpbe-osd") != NULL)
- vpbe_dev->osd_device = platform_get_drvdata(pdev);
- if (strstr(pdev->name, "vpbe-venc") != NULL)
- vpbe_dev->venc_device = dev_get_platdata(&pdev->dev);
-
- return 0;
-}
-
-/**
- * vpbe_initialize() - Initialize the vpbe display controller
- * @vpbe_dev - vpbe device ptr
- *
- * Master frame buffer device drivers calls this to initialize vpbe
- * display controller. This will then registers v4l2 device and the sub
- * devices and sets a current encoder sub device for display. v4l2 display
- * device driver is the master and frame buffer display device driver is
- * the slave. Frame buffer display driver checks the initialized during
- * probe and exit if not initialized. Returns status.
- */
-static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev)
-{
- struct encoder_config_info *enc_info;
- struct amp_config_info *amp_info;
- struct v4l2_subdev **enc_subdev;
- struct osd_state *osd_device;
- struct i2c_adapter *i2c_adap;
- int num_encoders;
- int ret = 0;
- int err;
- int i;
-
- /*
- * v4l2 abd FBDev frame buffer devices will get the vpbe_dev pointer
- * from the platform device by iteration of platform drivers and
- * matching with device name
- */
- if (NULL == vpbe_dev || NULL == dev) {
- printk(KERN_ERR "Null device pointers.\n");
- return -ENODEV;
- }
-
- if (vpbe_dev->initialized)
- return 0;
-
- mutex_lock(&vpbe_dev->lock);
-
- if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) {
- /* We have dac clock available for platform */
- vpbe_dev->dac_clk = clk_get(vpbe_dev->pdev, "vpss_dac");
- if (IS_ERR(vpbe_dev->dac_clk)) {
- ret = PTR_ERR(vpbe_dev->dac_clk);
- goto fail_mutex_unlock;
- }
- if (clk_prepare_enable(vpbe_dev->dac_clk)) {
- ret = -ENODEV;
- goto fail_mutex_unlock;
- }
- }
-
- /* first enable vpss clocks */
- vpss_enable_clock(VPSS_VPBE_CLOCK, 1);
-
- /* First register a v4l2 device */
- ret = v4l2_device_register(dev, &vpbe_dev->v4l2_dev);
- if (ret) {
- v4l2_err(dev->driver,
- "Unable to register v4l2 device.\n");
- goto fail_clk_put;
- }
- v4l2_info(&vpbe_dev->v4l2_dev, "vpbe v4l2 device registered\n");
-
- err = bus_for_each_dev(&platform_bus_type, NULL, vpbe_dev,
- platform_device_get);
- if (err < 0) {
- ret = err;
- goto fail_dev_unregister;
- }
-
- vpbe_dev->venc = venc_sub_dev_init(&vpbe_dev->v4l2_dev,
- vpbe_dev->cfg->venc.module_name);
- /* register venc sub device */
- if (vpbe_dev->venc == NULL) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "vpbe unable to init venc sub device\n");
- ret = -ENODEV;
- goto fail_dev_unregister;
- }
- /* initialize osd device */
- osd_device = vpbe_dev->osd_device;
-
- if (NULL != osd_device->ops.initialize) {
- err = osd_device->ops.initialize(osd_device);
- if (err) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "unable to initialize the OSD device");
- err = -ENOMEM;
- goto fail_dev_unregister;
- }
- }
-
- /*
- * Register any external encoders that are configured. At index 0 we
- * store venc sd index.
- */
- num_encoders = vpbe_dev->cfg->num_ext_encoders + 1;
- vpbe_dev->encoders = kmalloc(
- sizeof(struct v4l2_subdev *)*num_encoders,
- GFP_KERNEL);
- if (NULL == vpbe_dev->encoders) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "unable to allocate memory for encoders sub devices");
- ret = -ENOMEM;
- goto fail_dev_unregister;
- }
-
- i2c_adap = i2c_get_adapter(vpbe_dev->cfg->i2c_adapter_id);
- for (i = 0; i < (vpbe_dev->cfg->num_ext_encoders + 1); i++) {
- if (i == 0) {
- /* venc is at index 0 */
- enc_subdev = &vpbe_dev->encoders[i];
- *enc_subdev = vpbe_dev->venc;
- continue;
- }
- enc_info = &vpbe_dev->cfg->ext_encoders[i];
- if (enc_info->is_i2c) {
- enc_subdev = &vpbe_dev->encoders[i];
- *enc_subdev = v4l2_i2c_new_subdev_board(
- &vpbe_dev->v4l2_dev, i2c_adap,
- &enc_info->board_info, NULL);
- if (*enc_subdev)
- v4l2_info(&vpbe_dev->v4l2_dev,
- "v4l2 sub device %s registered\n",
- enc_info->module_name);
- else {
- v4l2_err(&vpbe_dev->v4l2_dev, "encoder %s"
- " failed to register",
- enc_info->module_name);
- ret = -ENODEV;
- goto fail_kfree_encoders;
- }
- } else
- v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c encoders"
- " currently not supported");
- }
- /* Add amplifier subdevice for dm365 */
- if ((strcmp(vpbe_dev->cfg->module_name, "dm365-vpbe-display") == 0) &&
- vpbe_dev->cfg->amp != NULL) {
- amp_info = vpbe_dev->cfg->amp;
- if (amp_info->is_i2c) {
- vpbe_dev->amp = v4l2_i2c_new_subdev_board(
- &vpbe_dev->v4l2_dev, i2c_adap,
- &amp_info->board_info, NULL);
- if (!vpbe_dev->amp) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "amplifier %s failed to register",
- amp_info->module_name);
- ret = -ENODEV;
- goto fail_kfree_encoders;
- }
- v4l2_info(&vpbe_dev->v4l2_dev,
- "v4l2 sub device %s registered\n",
- amp_info->module_name);
- } else {
- vpbe_dev->amp = NULL;
- v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c amplifiers"
- " currently not supported");
- }
- } else {
- vpbe_dev->amp = NULL;
- }
-
- /* set the current encoder and output to that of venc by default */
- vpbe_dev->current_sd_index = 0;
- vpbe_dev->current_out_index = 0;
-
- mutex_unlock(&vpbe_dev->lock);
-
- printk(KERN_NOTICE "Setting default output to %s\n", def_output);
- ret = vpbe_set_default_output(vpbe_dev);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default output %s",
- def_output);
- return ret;
- }
-
- printk(KERN_NOTICE "Setting default mode to %s\n", def_mode);
- ret = vpbe_set_default_mode(vpbe_dev);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default mode %s",
- def_mode);
- return ret;
- }
- vpbe_dev->initialized = 1;
- /* TBD handling of bootargs for default output and mode */
- return 0;
-
-fail_kfree_encoders:
- kfree(vpbe_dev->encoders);
-fail_dev_unregister:
- v4l2_device_unregister(&vpbe_dev->v4l2_dev);
-fail_clk_put:
- if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) {
- clk_disable_unprepare(vpbe_dev->dac_clk);
- clk_put(vpbe_dev->dac_clk);
- }
-fail_mutex_unlock:
- mutex_unlock(&vpbe_dev->lock);
- return ret;
-}
-
-/**
- * vpbe_deinitialize() - de-initialize the vpbe display controller
- * @dev - Master and slave device ptr
- *
- * vpbe_master and slave frame buffer devices calls this to de-initialize
- * the display controller. It is called when master and slave device
- * driver modules are removed and no longer requires the display controller.
- */
-static void vpbe_deinitialize(struct device *dev, struct vpbe_device *vpbe_dev)
-{
- v4l2_device_unregister(&vpbe_dev->v4l2_dev);
- if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) {
- clk_disable_unprepare(vpbe_dev->dac_clk);
- clk_put(vpbe_dev->dac_clk);
- }
-
- kfree(vpbe_dev->amp);
- kfree(vpbe_dev->encoders);
- vpbe_dev->initialized = 0;
- /* disable vpss clocks */
- vpss_enable_clock(VPSS_VPBE_CLOCK, 0);
-}
-
-static struct vpbe_device_ops vpbe_dev_ops = {
- .g_cropcap = vpbe_g_cropcap,
- .enum_outputs = vpbe_enum_outputs,
- .set_output = vpbe_set_output,
- .get_output = vpbe_get_output,
- .s_dv_timings = vpbe_s_dv_timings,
- .g_dv_timings = vpbe_g_dv_timings,
- .enum_dv_timings = vpbe_enum_dv_timings,
- .s_std = vpbe_s_std,
- .g_std = vpbe_g_std,
- .initialize = vpbe_initialize,
- .deinitialize = vpbe_deinitialize,
- .get_mode_info = vpbe_get_current_mode_info,
- .set_mode = vpbe_set_mode,
-};
-
-static int vpbe_probe(struct platform_device *pdev)
-{
- struct vpbe_device *vpbe_dev;
- struct vpbe_config *cfg;
- int ret = -EINVAL;
-
- if (pdev->dev.platform_data == NULL) {
- v4l2_err(pdev->dev.driver, "No platform data\n");
- return -ENODEV;
- }
- cfg = pdev->dev.platform_data;
-
- if (!cfg->module_name[0] ||
- !cfg->osd.module_name[0] ||
- !cfg->venc.module_name[0]) {
- v4l2_err(pdev->dev.driver, "vpbe display module names not"
- " defined\n");
- return ret;
- }
-
- vpbe_dev = kzalloc(sizeof(*vpbe_dev), GFP_KERNEL);
- if (vpbe_dev == NULL) {
- v4l2_err(pdev->dev.driver, "Unable to allocate memory"
- " for vpbe_device\n");
- return -ENOMEM;
- }
- vpbe_dev->cfg = cfg;
- vpbe_dev->ops = vpbe_dev_ops;
- vpbe_dev->pdev = &pdev->dev;
-
- if (cfg->outputs->num_modes > 0)
- vpbe_dev->current_timings = vpbe_dev->cfg->outputs[0].modes[0];
- else {
- kfree(vpbe_dev);
- return -ENODEV;
- }
-
- /* set the driver data in platform device */
- platform_set_drvdata(pdev, vpbe_dev);
- mutex_init(&vpbe_dev->lock);
-
- return 0;
-}
-
-static int vpbe_remove(struct platform_device *device)
-{
- struct vpbe_device *vpbe_dev = platform_get_drvdata(device);
-
- kfree(vpbe_dev);
-
- return 0;
-}
-
-static struct platform_driver vpbe_driver = {
- .driver = {
- .name = "vpbe_controller",
- .owner = THIS_MODULE,
- },
- .probe = vpbe_probe,
- .remove = vpbe_remove,
-};
-
-module_platform_driver(vpbe_driver);
diff --git a/drivers/media/platform/davinci/vpbe_display.c b/drivers/media/platform/davinci/vpbe_display.c
deleted file mode 100644
index 5e6b0cab..00000000
--- a/drivers/media/platform/davinci/vpbe_display.c
+++ /dev/null
@@ -1,1896 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/string.h>
-#include <linux/wait.h>
-#include <linux/time.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/mm.h>
-#include <linux/mutex.h>
-#include <linux/videodev2.h>
-#include <linux/slab.h>
-
-#include <asm/pgtable.h>
-#include <mach/cputype.h>
-
-#include <media/v4l2-dev.h>
-#include <media/v4l2-common.h>
-#include <media/v4l2-ioctl.h>
-#include <media/v4l2-device.h>
-#include <media/davinci/vpbe_display.h>
-#include <media/davinci/vpbe_types.h>
-#include <media/davinci/vpbe.h>
-#include <media/davinci/vpbe_venc.h>
-#include <media/davinci/vpbe_osd.h>
-#include "vpbe_venc_regs.h"
-
-#define VPBE_DISPLAY_DRIVER "vpbe-v4l2"
-
-static int debug;
-
-#define VPBE_DEFAULT_NUM_BUFS 3
-
-module_param(debug, int, 0644);
-
-static int vpbe_set_osd_display_params(struct vpbe_display *disp_dev,
- struct vpbe_layer *layer);
-
-static int venc_is_second_field(struct vpbe_display *disp_dev)
-{
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- int ret;
- int val;
-
- ret = v4l2_subdev_call(vpbe_dev->venc,
- core,
- ioctl,
- VENC_GET_FLD,
- &val);
- if (ret < 0) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Error in getting Field ID 0\n");
- }
- return val;
-}
-
-static void vpbe_isr_even_field(struct vpbe_display *disp_obj,
- struct vpbe_layer *layer)
-{
- struct timespec timevalue;
-
- if (layer->cur_frm == layer->next_frm)
- return;
- ktime_get_ts(&timevalue);
- layer->cur_frm->vb.v4l2_buf.timestamp.tv_sec =
- timevalue.tv_sec;
- layer->cur_frm->vb.v4l2_buf.timestamp.tv_usec =
- timevalue.tv_nsec / NSEC_PER_USEC;
- vb2_buffer_done(&layer->cur_frm->vb, VB2_BUF_STATE_DONE);
- /* Make cur_frm pointing to next_frm */
- layer->cur_frm = layer->next_frm;
-}
-
-static void vpbe_isr_odd_field(struct vpbe_display *disp_obj,
- struct vpbe_layer *layer)
-{
- struct osd_state *osd_device = disp_obj->osd_device;
- unsigned long addr;
-
- spin_lock(&disp_obj->dma_queue_lock);
- if (list_empty(&layer->dma_queue) ||
- (layer->cur_frm != layer->next_frm)) {
- spin_unlock(&disp_obj->dma_queue_lock);
- return;
- }
- /*
- * one field is displayed configure
- * the next frame if it is available
- * otherwise hold on current frame
- * Get next from the buffer queue
- */
- layer->next_frm = list_entry(layer->dma_queue.next,
- struct vpbe_disp_buffer, list);
- /* Remove that from the buffer queue */
- list_del(&layer->next_frm->list);
- spin_unlock(&disp_obj->dma_queue_lock);
- /* Mark state of the frame to active */
- layer->next_frm->vb.state = VB2_BUF_STATE_ACTIVE;
- addr = vb2_dma_contig_plane_dma_addr(&layer->next_frm->vb, 0);
- osd_device->ops.start_layer(osd_device,
- layer->layer_info.id,
- addr,
- disp_obj->cbcr_ofst);
-}
-
-/* interrupt service routine */
-static irqreturn_t venc_isr(int irq, void *arg)
-{
- struct vpbe_display *disp_dev = (struct vpbe_display *)arg;
- struct vpbe_layer *layer;
- static unsigned last_event;
- unsigned event = 0;
- int fid;
- int i;
-
- if ((NULL == arg) || (NULL == disp_dev->dev[0]))
- return IRQ_HANDLED;
-
- if (venc_is_second_field(disp_dev))
- event |= VENC_SECOND_FIELD;
- else
- event |= VENC_FIRST_FIELD;
-
- if (event == (last_event & ~VENC_END_OF_FRAME)) {
- /*
- * If the display is non-interlaced, then we need to flag the
- * end-of-frame event at every interrupt regardless of the
- * value of the FIDST bit. We can conclude that the display is
- * non-interlaced if the value of the FIDST bit is unchanged
- * from the previous interrupt.
- */
- event |= VENC_END_OF_FRAME;
- } else if (event == VENC_SECOND_FIELD) {
- /* end-of-frame for interlaced display */
- event |= VENC_END_OF_FRAME;
- }
- last_event = event;
-
- for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) {
- layer = disp_dev->dev[i];
- /* If streaming is started in this layer */
- if (!layer->started)
- continue;
-
- if (layer->layer_first_int) {
- layer->layer_first_int = 0;
- continue;
- }
- /* Check the field format */
- if ((V4L2_FIELD_NONE == layer->pix_fmt.field) &&
- (event & VENC_END_OF_FRAME)) {
- /* Progressive mode */
-
- vpbe_isr_even_field(disp_dev, layer);
- vpbe_isr_odd_field(disp_dev, layer);
- } else {
- /* Interlaced mode */
-
- layer->field_id ^= 1;
- if (event & VENC_FIRST_FIELD)
- fid = 0;
- else
- fid = 1;
-
- /*
- * If field id does not match with store
- * field id
- */
- if (fid != layer->field_id) {
- /* Make them in sync */
- layer->field_id = fid;
- continue;
- }
- /*
- * device field id and local field id are
- * in sync. If this is even field
- */
- if (0 == fid)
- vpbe_isr_even_field(disp_dev, layer);
- else /* odd field */
- vpbe_isr_odd_field(disp_dev, layer);
- }
- }
-
- return IRQ_HANDLED;
-}
-
-/*
- * vpbe_buffer_prepare()
- * This is the callback function called from vb2_qbuf() function
- * the buffer is prepared and user space virtual address is converted into
- * physical address
- */
-static int vpbe_buffer_prepare(struct vb2_buffer *vb)
-{
- struct vpbe_fh *fh = vb2_get_drv_priv(vb->vb2_queue);
- struct vb2_queue *q = vb->vb2_queue;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- unsigned long addr;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "vpbe_buffer_prepare\n");
-
- if (vb->state != VB2_BUF_STATE_ACTIVE &&
- vb->state != VB2_BUF_STATE_PREPARED) {
- vb2_set_plane_payload(vb, 0, layer->pix_fmt.sizeimage);
- if (vb2_plane_vaddr(vb, 0) &&
- vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0))
- return -EINVAL;
-
- addr = vb2_dma_contig_plane_dma_addr(vb, 0);
- if (q->streaming) {
- if (!IS_ALIGNED(addr, 8)) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "buffer_prepare:offset is \
- not aligned to 32 bytes\n");
- return -EINVAL;
- }
- }
- }
- return 0;
-}
-
-/*
- * vpbe_buffer_setup()
- * This function allocates memory for the buffers
- */
-static int
-vpbe_buffer_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
- unsigned int *nbuffers, unsigned int *nplanes,
- unsigned int sizes[], void *alloc_ctxs[])
-
-{
- /* Get the file handle object and layer object */
- struct vpbe_fh *fh = vb2_get_drv_priv(vq);
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_buffer_setup\n");
-
- /* Store number of buffers allocated in numbuffer member */
- if (*nbuffers < VPBE_DEFAULT_NUM_BUFS)
- *nbuffers = layer->numbuffers = VPBE_DEFAULT_NUM_BUFS;
-
- *nplanes = 1;
- sizes[0] = layer->pix_fmt.sizeimage;
- alloc_ctxs[0] = layer->alloc_ctx;
-
- return 0;
-}
-
-/*
- * vpbe_buffer_queue()
- * This function adds the buffer to DMA queue
- */
-static void vpbe_buffer_queue(struct vb2_buffer *vb)
-{
- /* Get the file handle object and layer object */
- struct vpbe_fh *fh = vb2_get_drv_priv(vb->vb2_queue);
- struct vpbe_disp_buffer *buf = container_of(vb,
- struct vpbe_disp_buffer, vb);
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_display *disp = fh->disp_dev;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- unsigned long flags;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "vpbe_buffer_queue\n");
-
- /* add the buffer to the DMA queue */
- spin_lock_irqsave(&disp->dma_queue_lock, flags);
- list_add_tail(&buf->list, &layer->dma_queue);
- spin_unlock_irqrestore(&disp->dma_queue_lock, flags);
-}
-
-/*
- * vpbe_buf_cleanup()
- * This function is called from the vb2 layer to free memory allocated to
- * the buffers
- */
-static void vpbe_buf_cleanup(struct vb2_buffer *vb)
-{
- /* Get the file handle object and layer object */
- struct vpbe_fh *fh = vb2_get_drv_priv(vb->vb2_queue);
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- struct vpbe_disp_buffer *buf = container_of(vb,
- struct vpbe_disp_buffer, vb);
- unsigned long flags;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "vpbe_buf_cleanup\n");
-
- spin_lock_irqsave(&layer->irqlock, flags);
- if (vb->state == VB2_BUF_STATE_ACTIVE)
- list_del_init(&buf->list);
- spin_unlock_irqrestore(&layer->irqlock, flags);
-}
-
-static void vpbe_wait_prepare(struct vb2_queue *vq)
-{
- struct vpbe_fh *fh = vb2_get_drv_priv(vq);
- struct vpbe_layer *layer = fh->layer;
-
- mutex_unlock(&layer->opslock);
-}
-
-static void vpbe_wait_finish(struct vb2_queue *vq)
-{
- struct vpbe_fh *fh = vb2_get_drv_priv(vq);
- struct vpbe_layer *layer = fh->layer;
-
- mutex_lock(&layer->opslock);
-}
-
-static int vpbe_buffer_init(struct vb2_buffer *vb)
-{
- struct vpbe_disp_buffer *buf = container_of(vb,
- struct vpbe_disp_buffer, vb);
-
- INIT_LIST_HEAD(&buf->list);
- return 0;
-}
-
-static int vpbe_start_streaming(struct vb2_queue *vq, unsigned int count)
-{
- struct vpbe_fh *fh = vb2_get_drv_priv(vq);
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- /* If buffer queue is empty, return error */
- if (list_empty(&layer->dma_queue)) {
- v4l2_err(&vpbe_dev->v4l2_dev, "buffer queue is empty\n");
- return -EINVAL;
- }
- /* Get the next frame from the buffer queue */
- layer->next_frm = layer->cur_frm = list_entry(layer->dma_queue.next,
- struct vpbe_disp_buffer, list);
- /* Remove buffer from the buffer queue */
- list_del(&layer->cur_frm->list);
- /* Mark state of the current frame to active */
- layer->cur_frm->vb.state = VB2_BUF_STATE_ACTIVE;
- /* Initialize field_id and started member */
- layer->field_id = 0;
-
- /* Set parameters in OSD and VENC */
- ret = vpbe_set_osd_display_params(fh->disp_dev, layer);
- if (ret < 0)
- return ret;
-
- /*
- * if request format is yuv420 semiplanar, need to
- * enable both video windows
- */
- layer->started = 1;
- layer->layer_first_int = 1;
-
- return ret;
-}
-
-static int vpbe_stop_streaming(struct vb2_queue *vq)
-{
- struct vpbe_fh *fh = vb2_get_drv_priv(vq);
- struct vpbe_layer *layer = fh->layer;
-
- if (!vb2_is_streaming(vq))
- return 0;
-
- /* release all active buffers */
- while (!list_empty(&layer->dma_queue)) {
- layer->next_frm = list_entry(layer->dma_queue.next,
- struct vpbe_disp_buffer, list);
- list_del(&layer->next_frm->list);
- vb2_buffer_done(&layer->next_frm->vb, VB2_BUF_STATE_ERROR);
- }
-
- return 0;
-}
-
-static struct vb2_ops video_qops = {
- .queue_setup = vpbe_buffer_queue_setup,
- .wait_prepare = vpbe_wait_prepare,
- .wait_finish = vpbe_wait_finish,
- .buf_init = vpbe_buffer_init,
- .buf_prepare = vpbe_buffer_prepare,
- .start_streaming = vpbe_start_streaming,
- .stop_streaming = vpbe_stop_streaming,
- .buf_cleanup = vpbe_buf_cleanup,
- .buf_queue = vpbe_buffer_queue,
-};
-
-static
-struct vpbe_layer*
-_vpbe_display_get_other_win_layer(struct vpbe_display *disp_dev,
- struct vpbe_layer *layer)
-{
- enum vpbe_display_device_id thiswin, otherwin;
- thiswin = layer->device_id;
-
- otherwin = (thiswin == VPBE_DISPLAY_DEVICE_0) ?
- VPBE_DISPLAY_DEVICE_1 : VPBE_DISPLAY_DEVICE_0;
- return disp_dev->dev[otherwin];
-}
-
-static int vpbe_set_osd_display_params(struct vpbe_display *disp_dev,
- struct vpbe_layer *layer)
-{
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct osd_state *osd_device = disp_dev->osd_device;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- unsigned long addr;
- int ret;
-
- addr = vb2_dma_contig_plane_dma_addr(&layer->cur_frm->vb, 0);
- /* Set address in the display registers */
- osd_device->ops.start_layer(osd_device,
- layer->layer_info.id,
- addr,
- disp_dev->cbcr_ofst);
-
- ret = osd_device->ops.enable_layer(osd_device,
- layer->layer_info.id, 0);
- if (ret < 0) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Error in enabling osd window layer 0\n");
- return -1;
- }
-
- /* Enable the window */
- layer->layer_info.enable = 1;
- if (cfg->pixfmt == PIXFMT_NV12) {
- struct vpbe_layer *otherlayer =
- _vpbe_display_get_other_win_layer(disp_dev, layer);
-
- ret = osd_device->ops.enable_layer(osd_device,
- otherlayer->layer_info.id, 1);
- if (ret < 0) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Error in enabling osd window layer 1\n");
- return -1;
- }
- otherlayer->layer_info.enable = 1;
- }
- return 0;
-}
-
-static void
-vpbe_disp_calculate_scale_factor(struct vpbe_display *disp_dev,
- struct vpbe_layer *layer,
- int expected_xsize, int expected_ysize)
-{
- struct display_layer_info *layer_info = &layer->layer_info;
- struct v4l2_pix_format *pixfmt = &layer->pix_fmt;
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- int calculated_xsize;
- int h_exp = 0;
- int v_exp = 0;
- int h_scale;
- int v_scale;
-
- v4l2_std_id standard_id = vpbe_dev->current_timings.std_id;
-
- /*
- * Application initially set the image format. Current display
- * size is obtained from the vpbe display controller. expected_xsize
- * and expected_ysize are set through S_CROP ioctl. Based on this,
- * driver will calculate the scale factors for vertical and
- * horizontal direction so that the image is displayed scaled
- * and expanded. Application uses expansion to display the image
- * in a square pixel. Otherwise it is displayed using displays
- * pixel aspect ratio.It is expected that application chooses
- * the crop coordinates for cropped or scaled display. if crop
- * size is less than the image size, it is displayed cropped or
- * it is displayed scaled and/or expanded.
- *
- * to begin with, set the crop window same as expected. Later we
- * will override with scaled window size
- */
-
- cfg->xsize = pixfmt->width;
- cfg->ysize = pixfmt->height;
- layer_info->h_zoom = ZOOM_X1; /* no horizontal zoom */
- layer_info->v_zoom = ZOOM_X1; /* no horizontal zoom */
- layer_info->h_exp = H_EXP_OFF; /* no horizontal zoom */
- layer_info->v_exp = V_EXP_OFF; /* no horizontal zoom */
-
- if (pixfmt->width < expected_xsize) {
- h_scale = vpbe_dev->current_timings.xres / pixfmt->width;
- if (h_scale < 2)
- h_scale = 1;
- else if (h_scale >= 4)
- h_scale = 4;
- else
- h_scale = 2;
- cfg->xsize *= h_scale;
- if (cfg->xsize < expected_xsize) {
- if ((standard_id & V4L2_STD_525_60) ||
- (standard_id & V4L2_STD_625_50)) {
- calculated_xsize = (cfg->xsize *
- VPBE_DISPLAY_H_EXP_RATIO_N) /
- VPBE_DISPLAY_H_EXP_RATIO_D;
- if (calculated_xsize <= expected_xsize) {
- h_exp = 1;
- cfg->xsize = calculated_xsize;
- }
- }
- }
- if (h_scale == 2)
- layer_info->h_zoom = ZOOM_X2;
- else if (h_scale == 4)
- layer_info->h_zoom = ZOOM_X4;
- if (h_exp)
- layer_info->h_exp = H_EXP_9_OVER_8;
- } else {
- /* no scaling, only cropping. Set display area to crop area */
- cfg->xsize = expected_xsize;
- }
-
- if (pixfmt->height < expected_ysize) {
- v_scale = expected_ysize / pixfmt->height;
- if (v_scale < 2)
- v_scale = 1;
- else if (v_scale >= 4)
- v_scale = 4;
- else
- v_scale = 2;
- cfg->ysize *= v_scale;
- if (cfg->ysize < expected_ysize) {
- if ((standard_id & V4L2_STD_625_50)) {
- calculated_xsize = (cfg->ysize *
- VPBE_DISPLAY_V_EXP_RATIO_N) /
- VPBE_DISPLAY_V_EXP_RATIO_D;
- if (calculated_xsize <= expected_ysize) {
- v_exp = 1;
- cfg->ysize = calculated_xsize;
- }
- }
- }
- if (v_scale == 2)
- layer_info->v_zoom = ZOOM_X2;
- else if (v_scale == 4)
- layer_info->v_zoom = ZOOM_X4;
- if (v_exp)
- layer_info->h_exp = V_EXP_6_OVER_5;
- } else {
- /* no scaling, only cropping. Set display area to crop area */
- cfg->ysize = expected_ysize;
- }
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "crop display xsize = %d, ysize = %d\n",
- cfg->xsize, cfg->ysize);
-}
-
-static void vpbe_disp_adj_position(struct vpbe_display *disp_dev,
- struct vpbe_layer *layer,
- int top, int left)
-{
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
-
- cfg->xpos = min((unsigned int)left,
- vpbe_dev->current_timings.xres - cfg->xsize);
- cfg->ypos = min((unsigned int)top,
- vpbe_dev->current_timings.yres - cfg->ysize);
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "new xpos = %d, ypos = %d\n",
- cfg->xpos, cfg->ypos);
-}
-
-static void vpbe_disp_check_window_params(struct vpbe_display *disp_dev,
- struct v4l2_rect *c)
-{
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
-
- if ((c->width == 0) ||
- ((c->width + c->left) > vpbe_dev->current_timings.xres))
- c->width = vpbe_dev->current_timings.xres - c->left;
-
- if ((c->height == 0) || ((c->height + c->top) >
- vpbe_dev->current_timings.yres))
- c->height = vpbe_dev->current_timings.yres - c->top;
-
- /* window height must be even for interlaced display */
- if (vpbe_dev->current_timings.interlaced)
- c->height &= (~0x01);
-
-}
-
-/**
- * vpbe_try_format()
- * If user application provides width and height, and have bytesperline set
- * to zero, driver calculates bytesperline and sizeimage based on hardware
- * limits.
- */
-static int vpbe_try_format(struct vpbe_display *disp_dev,
- struct v4l2_pix_format *pixfmt, int check)
-{
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- int min_height = 1;
- int min_width = 32;
- int max_height;
- int max_width;
- int bpp;
-
- if ((pixfmt->pixelformat != V4L2_PIX_FMT_UYVY) &&
- (pixfmt->pixelformat != V4L2_PIX_FMT_NV12))
- /* choose default as V4L2_PIX_FMT_UYVY */
- pixfmt->pixelformat = V4L2_PIX_FMT_UYVY;
-
- /* Check the field format */
- if ((pixfmt->field != V4L2_FIELD_INTERLACED) &&
- (pixfmt->field != V4L2_FIELD_NONE)) {
- if (vpbe_dev->current_timings.interlaced)
- pixfmt->field = V4L2_FIELD_INTERLACED;
- else
- pixfmt->field = V4L2_FIELD_NONE;
- }
-
- if (pixfmt->field == V4L2_FIELD_INTERLACED)
- min_height = 2;
-
- if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12)
- bpp = 1;
- else
- bpp = 2;
-
- max_width = vpbe_dev->current_timings.xres;
- max_height = vpbe_dev->current_timings.yres;
-
- min_width /= bpp;
-
- if (!pixfmt->width || (pixfmt->width < min_width) ||
- (pixfmt->width > max_width)) {
- pixfmt->width = vpbe_dev->current_timings.xres;
- }
-
- if (!pixfmt->height || (pixfmt->height < min_height) ||
- (pixfmt->height > max_height)) {
- pixfmt->height = vpbe_dev->current_timings.yres;
- }
-
- if (pixfmt->bytesperline < (pixfmt->width * bpp))
- pixfmt->bytesperline = pixfmt->width * bpp;
-
- /* Make the bytesperline 32 byte aligned */
- pixfmt->bytesperline = ((pixfmt->width * bpp + 31) & ~31);
-
- if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12)
- pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height +
- (pixfmt->bytesperline * pixfmt->height >> 1);
- else
- pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height;
-
- return 0;
-}
-
-static int vpbe_display_g_priority(struct file *file, void *priv,
- enum v4l2_priority *p)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
-
- *p = v4l2_prio_max(&layer->prio);
-
- return 0;
-}
-
-static int vpbe_display_s_priority(struct file *file, void *priv,
- enum v4l2_priority p)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- int ret;
-
- ret = v4l2_prio_change(&layer->prio, &fh->prio, p);
-
- return ret;
-}
-
-static int vpbe_display_querycap(struct file *file, void *priv,
- struct v4l2_capability *cap)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- cap->version = VPBE_DISPLAY_VERSION_CODE;
- cap->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING;
- cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
- snprintf(cap->driver, sizeof(cap->driver), "%s",
- dev_name(vpbe_dev->pdev));
- snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
- dev_name(vpbe_dev->pdev));
- strlcpy(cap->card, vpbe_dev->cfg->module_name, sizeof(cap->card));
-
- return 0;
-}
-
-static int vpbe_display_s_crop(struct file *file, void *priv,
- const struct v4l2_crop *crop)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_display *disp_dev = fh->disp_dev;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct osd_state *osd_device = disp_dev->osd_device;
- struct v4l2_rect rect = crop->c;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_S_CROP, layer id = %d\n", layer->device_id);
-
- if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buf type\n");
- return -EINVAL;
- }
-
- if (rect.top < 0)
- rect.top = 0;
- if (rect.left < 0)
- rect.left = 0;
-
- vpbe_disp_check_window_params(disp_dev, &rect);
-
- osd_device->ops.get_layer_config(osd_device,
- layer->layer_info.id, cfg);
-
- vpbe_disp_calculate_scale_factor(disp_dev, layer,
- rect.width,
- rect.height);
- vpbe_disp_adj_position(disp_dev, layer, rect.top,
- rect.left);
- ret = osd_device->ops.set_layer_config(osd_device,
- layer->layer_info.id, cfg);
- if (ret < 0) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Error in set layer config:\n");
- return -EINVAL;
- }
-
- /* apply zooming and h or v expansion */
- osd_device->ops.set_zoom(osd_device,
- layer->layer_info.id,
- layer->layer_info.h_zoom,
- layer->layer_info.v_zoom);
- ret = osd_device->ops.set_vid_expansion(osd_device,
- layer->layer_info.h_exp,
- layer->layer_info.v_exp);
- if (ret < 0) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Error in set vid expansion:\n");
- return -EINVAL;
- }
-
- if ((layer->layer_info.h_zoom != ZOOM_X1) ||
- (layer->layer_info.v_zoom != ZOOM_X1) ||
- (layer->layer_info.h_exp != H_EXP_OFF) ||
- (layer->layer_info.v_exp != V_EXP_OFF))
- /* Enable expansion filter */
- osd_device->ops.set_interpolation_filter(osd_device, 1);
- else
- osd_device->ops.set_interpolation_filter(osd_device, 0);
-
- return 0;
-}
-
-static int vpbe_display_g_crop(struct file *file, void *priv,
- struct v4l2_crop *crop)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- struct osd_state *osd_device = fh->disp_dev->osd_device;
- struct v4l2_rect *rect = &crop->c;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_G_CROP, layer id = %d\n",
- layer->device_id);
-
- if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buf type\n");
- return -EINVAL;
- }
- osd_device->ops.get_layer_config(osd_device,
- layer->layer_info.id, cfg);
- rect->top = cfg->ypos;
- rect->left = cfg->xpos;
- rect->width = cfg->xsize;
- rect->height = cfg->ysize;
-
- return 0;
-}
-
-static int vpbe_display_cropcap(struct file *file, void *priv,
- struct v4l2_cropcap *cropcap)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_CROPCAP ioctl\n");
-
- cropcap->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
- cropcap->bounds.left = 0;
- cropcap->bounds.top = 0;
- cropcap->bounds.width = vpbe_dev->current_timings.xres;
- cropcap->bounds.height = vpbe_dev->current_timings.yres;
- cropcap->pixelaspect = vpbe_dev->current_timings.aspect;
- cropcap->defrect = cropcap->bounds;
- return 0;
-}
-
-static int vpbe_display_g_fmt(struct file *file, void *priv,
- struct v4l2_format *fmt)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_G_FMT, layer id = %d\n",
- layer->device_id);
-
- /* If buffer type is video output */
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "invalid type\n");
- return -EINVAL;
- }
- /* Fill in the information about format */
- fmt->fmt.pix = layer->pix_fmt;
-
- return 0;
-}
-
-static int vpbe_display_enum_fmt(struct file *file, void *priv,
- struct v4l2_fmtdesc *fmt)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- unsigned int index = 0;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_ENUM_FMT, layer id = %d\n",
- layer->device_id);
- if (fmt->index > 1) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid format index\n");
- return -EINVAL;
- }
-
- /* Fill in the information about format */
- index = fmt->index;
- memset(fmt, 0, sizeof(*fmt));
- fmt->index = index;
- fmt->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
- if (index == 0) {
- strcpy(fmt->description, "YUV 4:2:2 - UYVY");
- fmt->pixelformat = V4L2_PIX_FMT_UYVY;
- } else {
- strcpy(fmt->description, "Y/CbCr 4:2:0");
- fmt->pixelformat = V4L2_PIX_FMT_NV12;
- }
-
- return 0;
-}
-
-static int vpbe_display_s_fmt(struct file *file, void *priv,
- struct v4l2_format *fmt)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_display *disp_dev = fh->disp_dev;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
- struct osd_state *osd_device = disp_dev->osd_device;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_S_FMT, layer id = %d\n",
- layer->device_id);
-
- /* If streaming is started, return error */
- if (layer->started) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n");
- return -EBUSY;
- }
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) {
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "invalid type\n");
- return -EINVAL;
- }
- /* Check for valid pixel format */
- ret = vpbe_try_format(disp_dev, pixfmt, 1);
- if (ret)
- return ret;
-
- /* YUV420 is requested, check availability of the
- other video window */
-
- layer->pix_fmt = *pixfmt;
-
- /* Get osd layer config */
- osd_device->ops.get_layer_config(osd_device,
- layer->layer_info.id, cfg);
- /* Store the pixel format in the layer object */
- cfg->xsize = pixfmt->width;
- cfg->ysize = pixfmt->height;
- cfg->line_length = pixfmt->bytesperline;
- cfg->ypos = 0;
- cfg->xpos = 0;
- cfg->interlaced = vpbe_dev->current_timings.interlaced;
-
- if (V4L2_PIX_FMT_UYVY == pixfmt->pixelformat)
- cfg->pixfmt = PIXFMT_YCbCrI;
-
- /* Change of the default pixel format for both video windows */
- if (V4L2_PIX_FMT_NV12 == pixfmt->pixelformat) {
- struct vpbe_layer *otherlayer;
- cfg->pixfmt = PIXFMT_NV12;
- otherlayer = _vpbe_display_get_other_win_layer(disp_dev,
- layer);
- otherlayer->layer_info.config.pixfmt = PIXFMT_NV12;
- }
-
- /* Set the layer config in the osd window */
- ret = osd_device->ops.set_layer_config(osd_device,
- layer->layer_info.id, cfg);
- if (ret < 0) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Error in S_FMT params:\n");
- return -EINVAL;
- }
-
- /* Readback and fill the local copy of current pix format */
- osd_device->ops.get_layer_config(osd_device,
- layer->layer_info.id, cfg);
-
- return 0;
-}
-
-static int vpbe_display_try_fmt(struct file *file, void *priv,
- struct v4l2_format *fmt)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_display *disp_dev = fh->disp_dev;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_TRY_FMT\n");
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "invalid type\n");
- return -EINVAL;
- }
-
- /* Check for valid field format */
- return vpbe_try_format(disp_dev, pixfmt, 0);
-
-}
-
-/**
- * vpbe_display_s_std - Set the given standard in the encoder
- *
- * Sets the standard if supported by the current encoder. Return the status.
- * 0 - success & -EINVAL on error
- */
-static int vpbe_display_s_std(struct file *file, void *priv,
- v4l2_std_id *std_id)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_STD\n");
-
- /* If streaming is started, return error */
- if (layer->started) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n");
- return -EBUSY;
- }
- if (NULL != vpbe_dev->ops.s_std) {
- ret = vpbe_dev->ops.s_std(vpbe_dev, std_id);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Failed to set standard for sub devices\n");
- return -EINVAL;
- }
- } else {
- return -EINVAL;
- }
-
- return 0;
-}
-
-/**
- * vpbe_display_g_std - Get the standard in the current encoder
- *
- * Get the standard in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int vpbe_display_g_std(struct file *file, void *priv,
- v4l2_std_id *std_id)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_STD\n");
-
- /* Get the standard from the current encoder */
- if (vpbe_dev->current_timings.timings_type & VPBE_ENC_STD) {
- *std_id = vpbe_dev->current_timings.std_id;
- return 0;
- }
-
- return -EINVAL;
-}
-
-/**
- * vpbe_display_enum_output - enumerate outputs
- *
- * Enumerates the outputs available at the vpbe display
- * returns the status, -EINVAL if end of output list
- */
-static int vpbe_display_enum_output(struct file *file, void *priv,
- struct v4l2_output *output)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_ENUM_OUTPUT\n");
-
- /* Enumerate outputs */
-
- if (NULL == vpbe_dev->ops.enum_outputs)
- return -EINVAL;
-
- ret = vpbe_dev->ops.enum_outputs(vpbe_dev, output);
- if (ret) {
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "Failed to enumerate outputs\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-/**
- * vpbe_display_s_output - Set output to
- * the output specified by the index
- */
-static int vpbe_display_s_output(struct file *file, void *priv,
- unsigned int i)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_OUTPUT\n");
- /* If streaming is started, return error */
- if (layer->started) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n");
- return -EBUSY;
- }
- if (NULL == vpbe_dev->ops.set_output)
- return -EINVAL;
-
- ret = vpbe_dev->ops.set_output(vpbe_dev, i);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Failed to set output for sub devices\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-/**
- * vpbe_display_g_output - Get output from subdevice
- * for a given by the index
- */
-static int vpbe_display_g_output(struct file *file, void *priv,
- unsigned int *i)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_OUTPUT\n");
- /* Get the standard from the current encoder */
- *i = vpbe_dev->current_out_index;
-
- return 0;
-}
-
-/**
- * vpbe_display_enum_dv_timings - Enumerate the dv timings
- *
- * enum the timings in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int
-vpbe_display_enum_dv_timings(struct file *file, void *priv,
- struct v4l2_enum_dv_timings *timings)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_ENUM_DV_TIMINGS\n");
-
- /* Enumerate outputs */
- if (NULL == vpbe_dev->ops.enum_dv_timings)
- return -EINVAL;
-
- ret = vpbe_dev->ops.enum_dv_timings(vpbe_dev, timings);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Failed to enumerate dv timings info\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-/**
- * vpbe_display_s_dv_timings - Set the dv timings
- *
- * Set the timings in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int
-vpbe_display_s_dv_timings(struct file *file, void *priv,
- struct v4l2_dv_timings *timings)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_DV_TIMINGS\n");
-
-
- /* If streaming is started, return error */
- if (layer->started) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n");
- return -EBUSY;
- }
-
- /* Set the given standard in the encoder */
- if (!vpbe_dev->ops.s_dv_timings)
- return -EINVAL;
-
- ret = vpbe_dev->ops.s_dv_timings(vpbe_dev, timings);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Failed to set the dv timings info\n");
- return -EINVAL;
- }
- /* set the current norm to zero to be consistent. If STD is used
- * v4l2 layer will set the norm properly on successful s_std call
- */
- layer->video_dev.current_norm = 0;
-
- return 0;
-}
-
-/**
- * vpbe_display_g_dv_timings - Set the dv timings
- *
- * Get the timings in the current encoder. Return the status. 0 - success
- * -EINVAL on error
- */
-static int
-vpbe_display_g_dv_timings(struct file *file, void *priv,
- struct v4l2_dv_timings *dv_timings)
-{
- struct vpbe_fh *fh = priv;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_DV_TIMINGS\n");
-
- /* Get the given standard in the encoder */
-
- if (vpbe_dev->current_timings.timings_type &
- VPBE_ENC_CUSTOM_TIMINGS) {
- *dv_timings = vpbe_dev->current_timings.dv_timings;
- } else {
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int vpbe_display_streamoff(struct file *file, void *priv,
- enum v4l2_buf_type buf_type)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- struct osd_state *osd_device = fh->disp_dev->osd_device;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_STREAMOFF,layer id = %d\n",
- layer->device_id);
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf_type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n");
- return -EINVAL;
- }
-
- /* If io is allowed for this file handle, return error */
- if (!fh->io_allowed) {
- v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n");
- return -EACCES;
- }
-
- /* If streaming is not started, return error */
- if (!layer->started) {
- v4l2_err(&vpbe_dev->v4l2_dev, "streaming not started in layer"
- " id = %d\n", layer->device_id);
- return -EINVAL;
- }
-
- osd_device->ops.disable_layer(osd_device,
- layer->layer_info.id);
- layer->started = 0;
- ret = vb2_streamoff(&layer->buffer_queue, buf_type);
-
- return ret;
-}
-
-static int vpbe_display_streamon(struct file *file, void *priv,
- enum v4l2_buf_type buf_type)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_display *disp_dev = fh->disp_dev;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- struct osd_state *osd_device = disp_dev->osd_device;
- int ret;
-
- osd_device->ops.disable_layer(osd_device,
- layer->layer_info.id);
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_STREAMON, layerid=%d\n",
- layer->device_id);
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf_type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n");
- return -EINVAL;
- }
-
- /* If file handle is not allowed IO, return error */
- if (!fh->io_allowed) {
- v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n");
- return -EACCES;
- }
- /* If Streaming is already started, return error */
- if (layer->started) {
- v4l2_err(&vpbe_dev->v4l2_dev, "layer is already streaming\n");
- return -EBUSY;
- }
-
- /*
- * Call vb2_streamon to start streaming
- * in videobuf
- */
- ret = vb2_streamon(&layer->buffer_queue, buf_type);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "error in vb2_streamon\n");
- return ret;
- }
- return ret;
-}
-
-static int vpbe_display_dqbuf(struct file *file, void *priv,
- struct v4l2_buffer *buf)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_DQBUF, layer id = %d\n",
- layer->device_id);
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf->type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n");
- return -EINVAL;
- }
- /* If this file handle is not allowed to do IO, return error */
- if (!fh->io_allowed) {
- v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n");
- return -EACCES;
- }
- if (file->f_flags & O_NONBLOCK)
- /* Call videobuf_dqbuf for non blocking mode */
- ret = vb2_dqbuf(&layer->buffer_queue, buf, 1);
- else
- /* Call videobuf_dqbuf for blocking mode */
- ret = vb2_dqbuf(&layer->buffer_queue, buf, 0);
-
- return ret;
-}
-
-static int vpbe_display_qbuf(struct file *file, void *priv,
- struct v4l2_buffer *p)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_QBUF, layer id = %d\n",
- layer->device_id);
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != p->type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n");
- return -EINVAL;
- }
-
- /* If this file handle is not allowed to do IO, return error */
- if (!fh->io_allowed) {
- v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n");
- return -EACCES;
- }
-
- return vb2_qbuf(&layer->buffer_queue, p);
-}
-
-static int vpbe_display_querybuf(struct file *file, void *priv,
- struct v4l2_buffer *buf)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "VIDIOC_QUERYBUF, layer id = %d\n",
- layer->device_id);
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf->type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n");
- return -EINVAL;
- }
- /* Call vb2_querybuf to get information */
- return vb2_querybuf(&layer->buffer_queue, buf);
-}
-
-static int vpbe_display_reqbufs(struct file *file, void *priv,
- struct v4l2_requestbuffers *req_buf)
-{
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- struct vb2_queue *q;
- int ret;
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_reqbufs\n");
-
- if (V4L2_BUF_TYPE_VIDEO_OUTPUT != req_buf->type) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n");
- return -EINVAL;
- }
-
- /* If io users of the layer is not zero, return error */
- if (0 != layer->io_usrs) {
- v4l2_err(&vpbe_dev->v4l2_dev, "not IO user\n");
- return -EBUSY;
- }
- /* Initialize videobuf queue as per the buffer type */
- layer->alloc_ctx = vb2_dma_contig_init_ctx(vpbe_dev->pdev);
- if (IS_ERR(layer->alloc_ctx)) {
- v4l2_err(&vpbe_dev->v4l2_dev, "Failed to get the context\n");
- return PTR_ERR(layer->alloc_ctx);
- }
- q = &layer->buffer_queue;
- memset(q, 0, sizeof(*q));
- q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
- q->io_modes = VB2_MMAP | VB2_USERPTR;
- q->drv_priv = fh;
- q->ops = &video_qops;
- q->mem_ops = &vb2_dma_contig_memops;
- q->buf_struct_size = sizeof(struct vpbe_disp_buffer);
-
- ret = vb2_queue_init(q);
- if (ret) {
- v4l2_err(&vpbe_dev->v4l2_dev, "vb2_queue_init() failed\n");
- vb2_dma_contig_cleanup_ctx(layer->alloc_ctx);
- return ret;
- }
- /* Set io allowed member of file handle to TRUE */
- fh->io_allowed = 1;
- /* Increment io usrs member of layer object to 1 */
- layer->io_usrs = 1;
- /* Store type of memory requested in layer object */
- layer->memory = req_buf->memory;
- /* Initialize buffer queue */
- INIT_LIST_HEAD(&layer->dma_queue);
- /* Allocate buffers */
- return vb2_reqbufs(q, req_buf);
-}
-
-/*
- * vpbe_display_mmap()
- * It is used to map kernel space buffers into user spaces
- */
-static int vpbe_display_mmap(struct file *filep, struct vm_area_struct *vma)
-{
- /* Get the layer object and file handle object */
- struct vpbe_fh *fh = filep->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- int ret;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_mmap\n");
-
- if (mutex_lock_interruptible(&layer->opslock))
- return -ERESTARTSYS;
- ret = vb2_mmap(&layer->buffer_queue, vma);
- mutex_unlock(&layer->opslock);
- return ret;
-}
-
-/* vpbe_display_poll(): It is used for select/poll system call
- */
-static unsigned int vpbe_display_poll(struct file *filep, poll_table *wait)
-{
- struct vpbe_fh *fh = filep->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
- unsigned int err = 0;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_poll\n");
- if (layer->started) {
- mutex_lock(&layer->opslock);
- err = vb2_poll(&layer->buffer_queue, filep, wait);
- mutex_unlock(&layer->opslock);
- }
- return err;
-}
-
-/*
- * vpbe_display_open()
- * It creates object of file handle structure and stores it in private_data
- * member of filepointer
- */
-static int vpbe_display_open(struct file *file)
-{
- struct vpbe_fh *fh = NULL;
- struct vpbe_layer *layer = video_drvdata(file);
- struct vpbe_display *disp_dev = layer->disp_dev;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- struct osd_state *osd_device = disp_dev->osd_device;
- int err;
-
- /* Allocate memory for the file handle object */
- fh = kmalloc(sizeof(struct vpbe_fh), GFP_KERNEL);
- if (fh == NULL) {
- v4l2_err(&vpbe_dev->v4l2_dev,
- "unable to allocate memory for file handle object\n");
- return -ENOMEM;
- }
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "vpbe display open plane = %d\n",
- layer->device_id);
-
- /* store pointer to fh in private_data member of filep */
- file->private_data = fh;
- fh->layer = layer;
- fh->disp_dev = disp_dev;
-
- if (!layer->usrs) {
- if (mutex_lock_interruptible(&layer->opslock))
- return -ERESTARTSYS;
- /* First claim the layer for this device */
- err = osd_device->ops.request_layer(osd_device,
- layer->layer_info.id);
- mutex_unlock(&layer->opslock);
- if (err < 0) {
- /* Couldn't get layer */
- v4l2_err(&vpbe_dev->v4l2_dev,
- "Display Manager failed to allocate layer\n");
- kfree(fh);
- return -EINVAL;
- }
- }
- /* Increment layer usrs counter */
- layer->usrs++;
- /* Set io_allowed member to false */
- fh->io_allowed = 0;
- /* Initialize priority of this instance to default priority */
- fh->prio = V4L2_PRIORITY_UNSET;
- v4l2_prio_open(&layer->prio, &fh->prio);
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev,
- "vpbe display device opened successfully\n");
- return 0;
-}
-
-/*
- * vpbe_display_release()
- * This function deletes buffer queue, frees the buffers and the davinci
- * display file * handle
- */
-static int vpbe_display_release(struct file *file)
-{
- /* Get the layer object and file handle object */
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_layer *layer = fh->layer;
- struct osd_layer_config *cfg = &layer->layer_info.config;
- struct vpbe_display *disp_dev = fh->disp_dev;
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- struct osd_state *osd_device = disp_dev->osd_device;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_release\n");
-
- mutex_lock(&layer->opslock);
- /* if this instance is doing IO */
- if (fh->io_allowed) {
- /* Reset io_usrs member of layer object */
- layer->io_usrs = 0;
-
- osd_device->ops.disable_layer(osd_device,
- layer->layer_info.id);
- layer->started = 0;
- /* Free buffers allocated */
- vb2_queue_release(&layer->buffer_queue);
- vb2_dma_contig_cleanup_ctx(&layer->buffer_queue);
- }
-
- /* Decrement layer usrs counter */
- layer->usrs--;
- /* If this file handle has initialize encoder device, reset it */
- if (!layer->usrs) {
- if (cfg->pixfmt == PIXFMT_NV12) {
- struct vpbe_layer *otherlayer;
- otherlayer =
- _vpbe_display_get_other_win_layer(disp_dev, layer);
- osd_device->ops.disable_layer(osd_device,
- otherlayer->layer_info.id);
- osd_device->ops.release_layer(osd_device,
- otherlayer->layer_info.id);
- }
- osd_device->ops.disable_layer(osd_device,
- layer->layer_info.id);
- osd_device->ops.release_layer(osd_device,
- layer->layer_info.id);
- }
- /* Close the priority */
- v4l2_prio_close(&layer->prio, fh->prio);
- file->private_data = NULL;
- mutex_unlock(&layer->opslock);
-
- /* Free memory allocated to file handle object */
- kfree(fh);
-
- disp_dev->cbcr_ofst = 0;
-
- return 0;
-}
-
-#ifdef CONFIG_VIDEO_ADV_DEBUG
-static int vpbe_display_g_register(struct file *file, void *priv,
- struct v4l2_dbg_register *reg)
-{
- struct v4l2_dbg_match *match = &reg->match;
- struct vpbe_fh *fh = file->private_data;
- struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev;
-
- if (match->type >= 2) {
- v4l2_subdev_call(vpbe_dev->venc,
- core,
- g_register,
- reg);
- }
-
- return 0;
-}
-
-static int vpbe_display_s_register(struct file *file, void *priv,
- struct v4l2_dbg_register *reg)
-{
- return 0;
-}
-#endif
-
-/* vpbe capture ioctl operations */
-static const struct v4l2_ioctl_ops vpbe_ioctl_ops = {
- .vidioc_querycap = vpbe_display_querycap,
- .vidioc_g_fmt_vid_out = vpbe_display_g_fmt,
- .vidioc_enum_fmt_vid_out = vpbe_display_enum_fmt,
- .vidioc_s_fmt_vid_out = vpbe_display_s_fmt,
- .vidioc_try_fmt_vid_out = vpbe_display_try_fmt,
- .vidioc_reqbufs = vpbe_display_reqbufs,
- .vidioc_querybuf = vpbe_display_querybuf,
- .vidioc_qbuf = vpbe_display_qbuf,
- .vidioc_dqbuf = vpbe_display_dqbuf,
- .vidioc_streamon = vpbe_display_streamon,
- .vidioc_streamoff = vpbe_display_streamoff,
- .vidioc_cropcap = vpbe_display_cropcap,
- .vidioc_g_crop = vpbe_display_g_crop,
- .vidioc_s_crop = vpbe_display_s_crop,
- .vidioc_g_priority = vpbe_display_g_priority,
- .vidioc_s_priority = vpbe_display_s_priority,
- .vidioc_s_std = vpbe_display_s_std,
- .vidioc_g_std = vpbe_display_g_std,
- .vidioc_enum_output = vpbe_display_enum_output,
- .vidioc_s_output = vpbe_display_s_output,
- .vidioc_g_output = vpbe_display_g_output,
- .vidioc_s_dv_timings = vpbe_display_s_dv_timings,
- .vidioc_g_dv_timings = vpbe_display_g_dv_timings,
- .vidioc_enum_dv_timings = vpbe_display_enum_dv_timings,
-#ifdef CONFIG_VIDEO_ADV_DEBUG
- .vidioc_g_register = vpbe_display_g_register,
- .vidioc_s_register = vpbe_display_s_register,
-#endif
-};
-
-static struct v4l2_file_operations vpbe_fops = {
- .owner = THIS_MODULE,
- .open = vpbe_display_open,
- .release = vpbe_display_release,
- .unlocked_ioctl = video_ioctl2,
- .mmap = vpbe_display_mmap,
- .poll = vpbe_display_poll
-};
-
-static int vpbe_device_get(struct device *dev, void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct vpbe_display *vpbe_disp = data;
-
- if (strcmp("vpbe_controller", pdev->name) == 0)
- vpbe_disp->vpbe_dev = platform_get_drvdata(pdev);
-
- if (strstr(pdev->name, "vpbe-osd") != NULL)
- vpbe_disp->osd_device = platform_get_drvdata(pdev);
-
- return 0;
-}
-
-static int init_vpbe_layer(int i, struct vpbe_display *disp_dev,
- struct platform_device *pdev)
-{
- struct vpbe_layer *vpbe_display_layer = NULL;
- struct video_device *vbd = NULL;
-
- /* Allocate memory for four plane display objects */
-
- disp_dev->dev[i] =
- kzalloc(sizeof(struct vpbe_layer), GFP_KERNEL);
-
- /* If memory allocation fails, return error */
- if (!disp_dev->dev[i]) {
- printk(KERN_ERR "ran out of memory\n");
- return -ENOMEM;
- }
- spin_lock_init(&disp_dev->dev[i]->irqlock);
- mutex_init(&disp_dev->dev[i]->opslock);
-
- /* Get the pointer to the layer object */
- vpbe_display_layer = disp_dev->dev[i];
- vbd = &vpbe_display_layer->video_dev;
- /* Initialize field of video device */
- vbd->release = video_device_release_empty;
- vbd->fops = &vpbe_fops;
- vbd->ioctl_ops = &vpbe_ioctl_ops;
- vbd->minor = -1;
- vbd->v4l2_dev = &disp_dev->vpbe_dev->v4l2_dev;
- vbd->lock = &vpbe_display_layer->opslock;
- vbd->vfl_dir = VFL_DIR_TX;
-
- if (disp_dev->vpbe_dev->current_timings.timings_type &
- VPBE_ENC_STD) {
- vbd->tvnorms = (V4L2_STD_525_60 | V4L2_STD_625_50);
- vbd->current_norm =
- disp_dev->vpbe_dev->current_timings.std_id;
- } else
- vbd->current_norm = 0;
-
- snprintf(vbd->name, sizeof(vbd->name),
- "DaVinci_VPBE Display_DRIVER_V%d.%d.%d",
- (VPBE_DISPLAY_VERSION_CODE >> 16) & 0xff,
- (VPBE_DISPLAY_VERSION_CODE >> 8) & 0xff,
- (VPBE_DISPLAY_VERSION_CODE) & 0xff);
-
- vpbe_display_layer->device_id = i;
-
- vpbe_display_layer->layer_info.id =
- ((i == VPBE_DISPLAY_DEVICE_0) ? WIN_VID0 : WIN_VID1);
-
- /* Initialize prio member of layer object */
- v4l2_prio_init(&vpbe_display_layer->prio);
-
- return 0;
-}
-
-static int register_device(struct vpbe_layer *vpbe_display_layer,
- struct vpbe_display *disp_dev,
- struct platform_device *pdev)
-{
- int err;
-
- v4l2_info(&disp_dev->vpbe_dev->v4l2_dev,
- "Trying to register VPBE display device.\n");
- v4l2_info(&disp_dev->vpbe_dev->v4l2_dev,
- "layer=%x,layer->video_dev=%x\n",
- (int)vpbe_display_layer,
- (int)&vpbe_display_layer->video_dev);
-
- err = video_register_device(&vpbe_display_layer->video_dev,
- VFL_TYPE_GRABBER,
- -1);
- if (err)
- return -ENODEV;
-
- vpbe_display_layer->disp_dev = disp_dev;
- /* set the driver data in platform device */
- platform_set_drvdata(pdev, disp_dev);
- video_set_drvdata(&vpbe_display_layer->video_dev,
- vpbe_display_layer);
-
- return 0;
-}
-
-
-
-/*
- * vpbe_display_probe()
- * This function creates device entries by register itself to the V4L2 driver
- * and initializes fields of each layer objects
- */
-static int vpbe_display_probe(struct platform_device *pdev)
-{
- struct vpbe_layer *vpbe_display_layer;
- struct vpbe_display *disp_dev;
- struct resource *res = NULL;
- int k;
- int i;
- int err;
- int irq;
-
- printk(KERN_DEBUG "vpbe_display_probe\n");
- /* Allocate memory for vpbe_display */
- disp_dev = kzalloc(sizeof(struct vpbe_display), GFP_KERNEL);
- if (!disp_dev) {
- printk(KERN_ERR "ran out of memory\n");
- return -ENOMEM;
- }
-
- spin_lock_init(&disp_dev->dma_queue_lock);
- /*
- * Scan all the platform devices to find the vpbe
- * controller device and get the vpbe_dev object
- */
- err = bus_for_each_dev(&platform_bus_type, NULL, disp_dev,
- vpbe_device_get);
- if (err < 0)
- return err;
- /* Initialize the vpbe display controller */
- if (NULL != disp_dev->vpbe_dev->ops.initialize) {
- err = disp_dev->vpbe_dev->ops.initialize(&pdev->dev,
- disp_dev->vpbe_dev);
- if (err) {
- v4l2_err(&disp_dev->vpbe_dev->v4l2_dev,
- "Error initing vpbe\n");
- err = -ENOMEM;
- goto probe_out;
- }
- }
-
- for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) {
- if (init_vpbe_layer(i, disp_dev, pdev)) {
- err = -ENODEV;
- goto probe_out;
- }
- }
-
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- if (!res) {
- v4l2_err(&disp_dev->vpbe_dev->v4l2_dev,
- "Unable to get VENC interrupt resource\n");
- err = -ENODEV;
- goto probe_out;
- }
-
- irq = res->start;
- if (request_irq(irq, venc_isr, IRQF_DISABLED, VPBE_DISPLAY_DRIVER,
- disp_dev)) {
- v4l2_err(&disp_dev->vpbe_dev->v4l2_dev,
- "Unable to request interrupt\n");
- err = -ENODEV;
- goto probe_out;
- }
-
- for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) {
- if (register_device(disp_dev->dev[i], disp_dev, pdev)) {
- err = -ENODEV;
- goto probe_out_irq;
- }
- }
-
- printk(KERN_DEBUG "Successfully completed the probing of vpbe v4l2 device\n");
- return 0;
-
-probe_out_irq:
- free_irq(res->start, disp_dev);
-probe_out:
- for (k = 0; k < VPBE_DISPLAY_MAX_DEVICES; k++) {
- /* Get the pointer to the layer object */
- vpbe_display_layer = disp_dev->dev[k];
- /* Unregister video device */
- if (vpbe_display_layer) {
- video_unregister_device(
- &vpbe_display_layer->video_dev);
- kfree(disp_dev->dev[k]);
- }
- }
- kfree(disp_dev);
- return err;
-}
-
-/*
- * vpbe_display_remove()
- * It un-register hardware layer from V4L2 driver
- */
-static int vpbe_display_remove(struct platform_device *pdev)
-{
- struct vpbe_layer *vpbe_display_layer;
- struct vpbe_display *disp_dev = platform_get_drvdata(pdev);
- struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev;
- struct resource *res;
- int i;
-
- v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_remove\n");
-
- /* unregister irq */
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- free_irq(res->start, disp_dev);
-
- /* deinitialize the vpbe display controller */
- if (NULL != vpbe_dev->ops.deinitialize)
- vpbe_dev->ops.deinitialize(&pdev->dev, vpbe_dev);
- /* un-register device */
- for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) {
- /* Get the pointer to the layer object */
- vpbe_display_layer = disp_dev->dev[i];
- /* Unregister video device */
- video_unregister_device(&vpbe_display_layer->video_dev);
-
- }
- for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) {
- kfree(disp_dev->dev[i]);
- disp_dev->dev[i] = NULL;
- }
-
- return 0;
-}
-
-static struct platform_driver vpbe_display_driver = {
- .driver = {
- .name = VPBE_DISPLAY_DRIVER,
- .owner = THIS_MODULE,
- .bus = &platform_bus_type,
- },
- .probe = vpbe_display_probe,
- .remove = vpbe_display_remove,
-};
-
-module_platform_driver(vpbe_display_driver);
-
-MODULE_DESCRIPTION("TI DM644x/DM355/DM365 VPBE Display controller");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Texas Instruments");
diff --git a/drivers/media/platform/davinci/vpbe_encoder.c b/drivers/media/platform/davinci/vpbe_encoder.c
new file mode 100644
index 00000000..6e8032d3
--- /dev/null
+++ b/drivers/media/platform/davinci/vpbe_encoder.c
@@ -0,0 +1,887 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* vpbe_encoder.c.. For internal encoder of the VPBE */
+
+/* Kernel Specific header files */
+
+#include <linux/kernel.h>
+//#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <video/davinci_vpbe.h>
+#include <media/davinci/vid_encoder_if.h>
+#include <media/davinci/vpbe_encoder.h>
+#include <media/davinci/davinci_platform.h>
+#include <mach/hardware.h>
+#include <linux/io.h>
+#include <mach/cputype.h>
+
+#include <asm/io.h>
+
+struct vpbe_encoder_params {
+ int outindex;
+ char *mode;
+};
+
+struct vpbe_encoder_config {
+// unsigned long vencregs;
+ int no_of_outputs;
+ struct {
+ char *output_name;
+ int no_of_standard;
+ char *standards[VPBE_ENCODER_MAX_NUM_STD];
+ } output[VPBE_ENCODER_MAX_NO_OUTPUTS];
+};
+
+struct vpbe_encoder_channel {
+ struct encoder_device *enc_device;
+ struct vpbe_encoder_params params;
+};
+
+/* Function prototypes */
+static int vpbe_encoder_initialize(struct vid_encoder_device *enc, int flag);
+static int vpbe_encoder_deinitialize(struct vid_encoder_device *enc);
+
+static int vpbe_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+static int vpbe_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc);
+
+static int vpbe_encoder_setoutput(char *output, struct vid_encoder_device *enc);
+static int vpbe_encoder_getoutput(char *output, struct vid_encoder_device *enc);
+
+static int vpbe_encoder_enumoutput(int index,
+ char *output,
+ struct vid_encoder_device *enc);
+
+static int vpbe_encoder_enable(int flag, struct vid_encoder_device *enc);
+
+/* All Supported encoder modes */
+static struct vid_enc_mode_info vpbe_encoder_modes[VPBE_ENCODER_MAX_NUM_STD] = {
+ {
+ .name = VID_ENC_STD_NTSC,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 1,
+ .xres = 720,
+ .yres = 480,
+ .fps = {30000, 1001},
+ .left_margin = 0x79,
+ .right_margin = 0,
+ .upper_margin = 0x10,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_PAL,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 1,
+ .xres = 720,
+ .yres = 576,
+ .fps = {25, 1},
+ .left_margin = 0x7E,
+ .right_margin = 0,
+ .upper_margin = 0x16,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_NTSC_RGB,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 1,
+ .xres = 720,
+ .yres = 480,
+ .fps = {30000, 1001},
+ .left_margin = 0x80,
+ .right_margin = 0,
+ .upper_margin = 0x12,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_PAL_RGB,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 1,
+ .xres = 720,
+ .yres = 576,
+ .fps = {25, 1},
+ .left_margin = 0x88,
+ .right_margin = 0,
+ .upper_margin = 0x18,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_480P_60,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 720,
+ .yres = 480,
+ .fps = {60, 1},
+ .left_margin = 0x80,
+ .right_margin = 0,
+ .upper_margin = 0x20,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_576P_50,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 720,
+ .yres = 576,
+ .fps = {50, 1},
+ .left_margin = 0x7E,
+ .right_margin = 0,
+ .upper_margin = 0x30,
+ .lower_margin = 0,
+ .hsync_len = 0,
+ .vsync_len = 0,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_720P_60,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 1280,
+ .yres = 720,
+ .fps = {60, 1},
+ .left_margin = 300,
+ .right_margin = 70,
+ .upper_margin = 26,
+ .lower_margin = 3,
+ .hsync_len = 80,
+ .vsync_len = 5,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_720P_50,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 1280,
+ .yres = 720,
+ .fps = {50, 1},
+ .left_margin = 300,
+ .right_margin = 70,
+ .upper_margin = 26,
+ .lower_margin = 3,
+ .hsync_len = 80,
+ .vsync_len = 5,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_720P_30,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 1280,
+ .yres = 720,
+ .fps = {30, 1},
+ .left_margin = 300,
+ .right_margin = 70,
+ .upper_margin = 26,
+ .lower_margin = 3,
+ .hsync_len = 80,
+ .vsync_len = 5,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_720P_25,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 1280,
+ .yres = 720,
+ .fps = {25, 1},
+ .left_margin = 300,
+ .right_margin = 70,
+ .upper_margin = 26,
+ .lower_margin = 3,
+ .hsync_len = 80,
+ .vsync_len = 5,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_720P_24,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 0,
+ .xres = 1280,
+ .yres = 720,
+ .fps = {24, 1},
+ .left_margin = 300,
+ .right_margin = 70,
+ .upper_margin = 26,
+ .lower_margin = 3,
+ .hsync_len = 80,
+ .vsync_len = 5,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_1080I_30,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 1,
+ .xres = 1920,
+ .yres = 1080,
+ .fps = {30, 1},
+ .left_margin = 200,
+ .right_margin = 80,
+ .upper_margin = 13,
+ .lower_margin = 31,
+ .hsync_len = 88,
+ .vsync_len = 5,
+ .flags = 0},
+ {
+ .name = VID_ENC_STD_1080I_25,
+ .std = 1,
+ .if_type = VID_ENC_IF_INT,
+ .interlaced = 1,
+ .xres = 1920,
+ .yres = 1080,
+ .fps = {25, 1},
+ .left_margin = 200,
+ .right_margin = 80,
+ .upper_margin = 13,
+ .lower_margin = 31,
+ .hsync_len = 88,
+ .vsync_len = 5,
+ .flags = 0},
+};
+
+static struct vpbe_encoder_config vpbe_encoder_configuration = {
+// .vencregs = DM644X_VENC_REG_BASE,
+ .no_of_outputs = VPBE_DM644X_ENCODER_MAX_NO_OUTPUTS,
+ .output[0] = {
+ .output_name = VID_ENC_OUTPUT_COMPOSITE,
+ .no_of_standard = VPBE_DM644X_ENCODER_COMPOSITE_NUM_STD,
+ .standards = {VID_ENC_STD_NTSC, VID_ENC_STD_PAL},
+ },
+ .output[1] = {
+ .output_name = VID_ENC_OUTPUT_SVIDEO,
+ .no_of_standard = VPBE_DM644X_ENCODER_SVIDEO_NUM_STD,
+ .standards = {VID_ENC_STD_NTSC, VID_ENC_STD_PAL},
+ },
+ .output[2] = {
+ .output_name = VID_ENC_OUTPUT_COMPONENT,
+ .no_of_standard = VPBE_DM644X_ENCODER_COMPONENT_NUM_STD,
+ .standards = {VID_ENC_STD_NTSC,
+ VID_ENC_STD_PAL,
+ VID_ENC_STD_NTSC_RGB,
+ VID_ENC_STD_PAL_RGB,
+ VID_ENC_STD_480P_60,
+ VID_ENC_STD_576P_50},
+ }
+};
+
+static struct vpbe_encoder_channel vpbe_encoder_channel_info = {
+ .params.outindex = 0,
+ .params.mode = VID_ENC_STD_NTSC,
+ .enc_device = NULL
+};
+
+static struct vid_enc_output_ops outputs_ops = {
+ .count = VPBE_ENCODER_MAX_NO_OUTPUTS,
+ .enumoutput = vpbe_encoder_enumoutput,
+ .setoutput = vpbe_encoder_setoutput,
+ .getoutput = vpbe_encoder_getoutput
+};
+
+static struct vid_enc_mode_ops modes_ops = {
+ .setmode = vpbe_encoder_setmode,
+ .getmode = vpbe_encoder_getmode,
+};
+
+static struct vid_enc_misc_ops miscs_ops = {
+ .reset = NULL,
+ .enable = vpbe_encoder_enable,
+};
+
+static struct vid_encoder_device vpbe_encoder_dev = {
+ .name = "VPBE_ENCODER",
+ .capabilities = 0,
+ .initialize = vpbe_encoder_initialize,
+ .mode_ops = &modes_ops,
+ .ctrl_ops = NULL,
+ .output_ops = &outputs_ops,
+ .params_ops = NULL,
+ .misc_ops = &miscs_ops,
+ .deinitialize = vpbe_encoder_deinitialize,
+};
+
+/*
+ * display controller register I/O routines
+ */
+#if 0
+static __inline__ u32 venc_reg_in(u32 offset)
+{
+ u32 addr;
+ addr = vpbe_encoder_configuration.vencregs + offset;
+ return (__raw_readl(IO_ADDRESS(addr)));
+}
+static __inline__ u32 venc_reg_out(u32 offset, u32 val)
+{
+ u32 addr = vpbe_encoder_configuration.vencregs + offset;
+ __raw_writel(val, IO_ADDRESS(addr));
+ return (val);
+}
+static __inline__ u32 venc_reg_merge(u32 offset, u32 val, u32 mask)
+{
+ u32 addr, new_val;
+ addr = vpbe_encoder_configuration.vencregs + offset;
+ new_val = (__raw_readl(IO_ADDRESS(addr)) & ~mask) | (val & mask);
+ __raw_writel(new_val, IO_ADDRESS(addr));
+ return (new_val);
+}
+#endif
+
+/* Function to enable/disable output */
+static int vpbe_encoder_enable(int flag, struct vid_encoder_device *enc)
+{
+ if (flag)
+ venc_reg_out(VENC_DACTST, 0);
+ else
+ venc_reg_out(VENC_DACTST, 0xF000);
+ return 0;
+}
+
+/* This function sets the dac of the VPBE for various outputs
+ */
+static int vpbe_encoder_set_dac(char *output)
+{
+ int error = 0;
+
+ if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm365()) {
+ if (!strcmp(output, VID_ENC_OUTPUT_COMPOSITE)) {
+ printk(KERN_DEBUG "Setting output to Composite\n");
+ venc_reg_out(VENC_DACSEL, 0);
+ } else if (!strcmp(output, VID_ENC_OUTPUT_SVIDEO)) {
+ printk(KERN_DEBUG "Setting output to S-Video\n");
+ venc_reg_out(VENC_DACSEL, 0x210);
+ } else if (!strcmp(output, VID_ENC_OUTPUT_COMPONENT)) {
+ printk(KERN_DEBUG
+ "Setting output to Component Video\n");
+ venc_reg_out(VENC_DACSEL, 0x543);
+ } else
+ error = -1;
+ } else if (!cpu_is_davinci_dm355())
+ error = -1;
+ return error;
+}
+
+/* This function is called by the encoder manager to initialize vpbe encoder driver.
+ * It initializes all registers of vpbe_encoder with the default values
+ */
+static int vpbe_encoder_initialize(struct vid_encoder_device *enc, int flag)
+{
+ int err = 0, outindex;
+ char *std, *output;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ vpbe_encoder_channel_info.enc_device = (struct encoder_device *)enc;
+
+ /* call set standard */
+ std = vpbe_encoder_channel_info.params.mode;
+ outindex = vpbe_encoder_channel_info.params.outindex;
+ output = vpbe_encoder_configuration.output[outindex].output_name;
+ err |= vpbe_encoder_setoutput(output, enc);
+ if (err < 0) {
+ err = -EINVAL;
+ printk(KERN_ERR "Error occured in setoutput\n");
+ vpbe_encoder_deinitialize(enc);
+ return err;
+ }
+ printk(KERN_DEBUG "VPBE Encoder initialized\n");
+ return err;
+}
+
+static int vpbe_encoder_deinitialize(struct vid_encoder_device *enc)
+{
+ if (NULL == enc) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm365())
+ venc_reg_out(VENC_DACSEL, 0);
+
+ /* disable output */
+ venc_reg_out(VENC_DACTST, 0xF000);
+ venc_reg_out(VENC_VMOD, 0);
+
+ vpbe_encoder_channel_info.enc_device = NULL;
+ printk(KERN_DEBUG "VPBE Encoder de-initialized\n");
+ return 0;
+}
+
+/* Following function returns ptr to a mode_info structure*/
+static struct vid_enc_mode_info *get_modeinfo(char *mode_name)
+{
+ int i;
+ for (i = 0; i < VPBE_ENCODER_MAX_NUM_STD; i++) {
+ if (!strcmp(vpbe_encoder_modes[i].name, mode_name)) {
+ return &vpbe_encoder_modes[i];
+ }
+ }
+ return NULL;
+}
+
+/* Following function is used to set the mode*/
+static int vpbe_encoder_setmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0, outindex, i, dm6446 = 0, dm355 = 0, dm365 = 0;
+ char *mode;
+ struct vid_enc_mode_info *my_mode_info;
+
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ if (NULL == (mode = mode_info->name)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "Start of vpbe_encoder_setmode..\n");
+ outindex = vpbe_encoder_channel_info.params.outindex;
+ if (cpu_is_davinci_dm644x())
+ dm6446 = 1;
+ else if (cpu_is_davinci_dm355())
+ dm355 = 1;
+ else if (cpu_is_davinci_dm365())
+ dm365 = 1;
+ else
+ return -EINVAL;
+
+ if (mode_info->std) {
+ char *mymode = NULL;
+ /* This is a standard mode */
+ for (i = 0;
+ i <
+ vpbe_encoder_configuration.output[outindex].no_of_standard;
+ i++) {
+ if (!strcmp
+ (vpbe_encoder_configuration.output[outindex].
+ standards[i], mode)) {
+ mymode =
+ vpbe_encoder_configuration.output[outindex].
+ standards[i];
+ break;
+ }
+ }
+ if ((i ==
+ vpbe_encoder_configuration.output[outindex].no_of_standard)
+ || (NULL == mymode)) {
+ printk(KERN_ERR "Invalid id...\n");
+ return -EINVAL;
+ }
+ /* Store the standard in global object of vpbe_encoder */
+ vpbe_encoder_channel_info.params.mode = mymode;
+ if (!strcmp(mymode, VID_ENC_STD_NTSC)) {
+ /* Setup NTSC */
+ venc_reg_out(VENC_VMOD, 0);
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
+ venc_reg_merge(VENC_VMOD,
+ (0 << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ } else if (!strcmp(mymode, VID_ENC_STD_PAL)) {
+ /* Setup PAL */
+ venc_reg_out(VENC_VMOD, 0);
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ } else if (!strcmp(mymode, VID_ENC_STD_NTSC_RGB) &&
+ (dm6446 || dm365)) {
+ /* Setup for NTSC RGB */
+ venc_reg_out(VENC_VMOD, 0);
+ venc_reg_merge(VENC_VMOD,
+ (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
+ venc_reg_merge(VENC_VMOD,
+ (0 << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ venc_reg_merge(VENC_CMPNT,
+ (1 << VENC_CMPNT_MRGB_SHIFT),
+ VENC_CMPNT_MRGB);
+ } else if (!strcmp(mymode, VID_ENC_STD_PAL_RGB) &&
+ (dm6446 || dm365)) {
+ /* Setup for PAL RGB */
+ venc_reg_out(VENC_VMOD, 0);
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ venc_reg_merge(VENC_CMPNT,
+ (1 << VENC_CMPNT_MRGB_SHIFT),
+ VENC_CMPNT_MRGB);
+ } else if (!strcmp(mymode, VID_ENC_STD_480P_60) &&
+ (dm6446 || dm365)) {
+ /* Setup for 480P, Progressive NTSC */
+ venc_reg_out(VENC_VMOD, 0);
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ VENC_VMOD_HDMD, VENC_VMOD_HDMD);
+ venc_reg_merge(VENC_VMOD,
+ (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+
+ } else if (!strcmp(mymode, VID_ENC_STD_576P_50) &&
+ (dm6446 || dm365)) {
+ venc_reg_out(VENC_VMOD, 0);
+ /* Setup for 576P, Progressive PAL */
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ VENC_VMOD_HDMD, VENC_VMOD_HDMD);
+ venc_reg_merge
+ (VENC_VMOD,
+ (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ } else if (!strncmp(mymode, VID_ENC_STD_720P_60, 5) && dm365) {
+ char buf[16];
+ unsigned long xh, val;
+ strcpy(buf, mymode + 5);
+ venc_reg_out(VENC_VMOD, 0);
+ /* DM365 component HD mode */
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ VENC_VMOD_HDMD, VENC_VMOD_HDMD);
+ venc_reg_merge
+ (VENC_VMOD,
+ (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ venc_reg_merge
+ (VENC_VMOD,
+ VENC_VMOD_VENC,
+ VENC_VMOD_VENC);
+ /* DM365 VENC spec, Table 16 */
+ if (strict_strtoul(buf, 10, &val) != 0)
+ val = 60;
+ switch (val) {
+ case 60:
+ default:
+ xh = 0;
+ break;
+ case 50:
+ xh = 330;
+ break;
+ case 30:
+ xh = 1650;
+ break;
+ case 25:
+ xh = 2310;
+ break;
+ case 24:
+ xh = 2475;
+ break;
+ }
+ venc_reg_out(VENC_XHINTVL, xh);
+ } else if (!strncmp(mymode, VID_ENC_STD_1080I_30, 6) && dm365) {
+ char buf[16];
+ unsigned long xh, val;
+ strcpy(buf, mymode + 6);
+ venc_reg_out(VENC_VMOD, 0);
+ /* DM365 component HD mode */
+ venc_reg_merge(VENC_VMOD,
+ (1 << VENC_VMOD_VIE_SHIFT),
+ VENC_VMOD_VIE);
+ venc_reg_merge(VENC_VMOD,
+ VENC_VMOD_HDMD, VENC_VMOD_HDMD);
+ venc_reg_merge
+ (VENC_VMOD,
+ (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
+ VENC_VMOD_TVTYP);
+ venc_reg_merge
+ (VENC_VMOD,
+ VENC_VMOD_VENC,
+ VENC_VMOD_VENC);
+ if (strict_strtoul(buf, 10, &val) != 0)
+ val = 30;
+ switch (val) {
+ case 30:
+ default:
+ xh = 0;
+ break;
+ case 25:
+ xh = 2640;
+ break;
+ }
+ venc_reg_out(VENC_XHINTVL, xh);
+ } else {
+ printk(KERN_ERR "Mode not supported..\n");
+ return -EINVAL;
+ }
+ } else {
+ /* Non- Standard mode. Check if we support it. If so
+ save the timing info and return */
+ my_mode_info = get_modeinfo(VID_ENC_STD_NON_STANDARD);
+ if (my_mode_info) {
+ /* We support. So save timing info and return success
+ interface type is same as what is currently is active
+ */
+ vpbe_encoder_channel_info.params.mode =
+ VID_ENC_STD_NON_STANDARD;
+ my_mode_info->std = 0;
+ my_mode_info->interlaced = mode_info->interlaced;
+ my_mode_info->xres = mode_info->xres;
+ my_mode_info->yres = mode_info->yres;
+ my_mode_info->fps = mode_info->fps;
+ my_mode_info->left_margin = mode_info->left_margin;
+ my_mode_info->right_margin = mode_info->right_margin;
+ my_mode_info->upper_margin = mode_info->upper_margin;
+ my_mode_info->lower_margin = mode_info->lower_margin;
+ my_mode_info->hsync_len = mode_info->hsync_len;
+ my_mode_info->vsync_len = mode_info->vsync_len;
+ my_mode_info->flags = mode_info->flags;
+ /* If we need to configure something in the encoder module, we need to
+ do this here */
+ return 0;
+ }
+ printk(KERN_ERR "Mode not supported..\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "</vpbe_encoder_setmode>\n");
+ return err;
+}
+
+/* Following function is used to get currently selected mode.*/
+static int vpbe_encoder_getmode(struct vid_enc_mode_info *mode_info,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+ struct vid_enc_mode_info *my_mode_info;
+ if ((NULL == enc) || (NULL == mode_info)) {
+ printk(KERN_ERR "NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<vpbe_encoder_getmode>\n");
+ my_mode_info = get_modeinfo(vpbe_encoder_channel_info.params.mode);
+ if (NULL == my_mode_info) {
+ printk(KERN_ERR "NULL Pointer for current mode info\n");
+ return -EINVAL;
+ }
+ memcpy(mode_info, my_mode_info, sizeof(struct vid_enc_mode_info));
+ printk(KERN_DEBUG "<vpbe_encoder_getmode/>\n");
+ return err;
+}
+
+/* Following function is used to set output format in VPBE DAC. The
+ output name is passed as the argument to this function. */
+static int vpbe_encoder_setoutput(char *output, struct vid_encoder_device *enc)
+{
+ int err = 0, index;
+ struct vid_enc_mode_info *my_mode_info;
+ printk(KERN_DEBUG "<vpbe_encoder_setoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output: NULL Pointer.\n");
+ return -EINVAL;
+ }
+
+ for (index = 0; index < vpbe_encoder_configuration.no_of_outputs;
+ index++) {
+ if (!strcmp
+ (output,
+ vpbe_encoder_configuration.output[index].output_name)) {
+ break;
+ }
+ }
+
+ if (index == vpbe_encoder_configuration.no_of_outputs) {
+ /* No output matching this name */
+ printk(KERN_ERR "No matching output: %s\n", output);
+ return -EINVAL;
+ }
+
+ if (vpbe_encoder_set_dac(output) < 0) {
+ printk(KERN_ERR
+ "<vpbe_encoder_setoutput, error in setting DAC config>\n");
+ return -EINVAL;
+ }
+
+ vpbe_encoder_channel_info.params.outindex = index;
+
+ /* set default standard */
+ vpbe_encoder_channel_info.params.mode
+ = vpbe_encoder_configuration.output[index].standards[0];
+
+ my_mode_info = get_modeinfo(vpbe_encoder_channel_info.params.mode);
+ if (NULL == my_mode_info) {
+ printk(KERN_ERR "No matching mode_info entry found\n");
+ return -EINVAL;
+ }
+
+ err |= vpbe_encoder_setmode(my_mode_info, enc);
+ if (err < 0) {
+ printk(KERN_ERR "Erron in setting default mode\n");
+ return err;
+ }
+ printk(KERN_DEBUG "</vpbe_encoder_setoutput>\n");
+ return err;
+}
+
+/* Following function is used to get output name of current output.*/
+static int vpbe_encoder_getoutput(char *output, struct vid_encoder_device *enc)
+{
+ int err = 0, index, len;
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer\n");
+ return -EINVAL;
+ }
+ printk(KERN_DEBUG "<vpbe_encoder_getoutput>\n");
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ index = vpbe_encoder_channel_info.params.outindex;
+ len = strlen(vpbe_encoder_configuration.output[index].output_name);
+ if (len > (VID_ENC_NAME_MAX_CHARS - 1))
+ len = VID_ENC_NAME_MAX_CHARS - 1;
+ strncpy(output, vpbe_encoder_configuration.output[index].output_name,
+ len);
+ output[len] = '\0';
+ printk(KERN_DEBUG "</vpbe_encoder_getoutput>\n");
+ return err;
+}
+
+/* Following function is used to enumerate outputs supported by the driver.
+ It fills in information about the output in the output. */
+static int vpbe_encoder_enumoutput(int index, char *output,
+ struct vid_encoder_device *enc)
+{
+ int err = 0;
+
+ printk(KERN_DEBUG "<vpbe_encoder_enumoutput>\n");
+ if (NULL == enc) {
+ printk(KERN_ERR "enc:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* check for null pointer */
+ if (output == NULL) {
+ printk(KERN_ERR "output:NULL Pointer.\n");
+ return -EINVAL;
+ }
+ /* Only one output is available */
+ if (index >= vpbe_encoder_configuration.no_of_outputs) {
+ return -EINVAL;
+ }
+ strncpy(output,
+ vpbe_encoder_configuration.output[index].output_name,
+ VID_ENC_NAME_MAX_CHARS);
+ printk(KERN_DEBUG "</vpbe_encoder_enumoutput>\n");
+ return err;
+}
+
+/* This function used to initialize the vpbe encoder driver */
+static int vpbe_encoder_init(void)
+{
+ int err = 0;
+
+ if (cpu_is_davinci_dm644x()) {
+ /* Do nothing. We have everything setup for DM6446 */
+ } else if (cpu_is_davinci_dm355()) {
+ outputs_ops.count = VPBE_DM355_ENCODER_MAX_NO_OUTPUTS;
+// vpbe_encoder_configuration.vencregs = DM355_VENC_REG_BASE;
+ vpbe_encoder_configuration.no_of_outputs =
+ VPBE_DM355_ENCODER_MAX_NO_OUTPUTS;
+ vpbe_encoder_configuration.output[0].no_of_standard =
+ VPBE_DM355_ENCODER_COMPOSITE_NUM_STD;
+ /* If we have different no of standards for composite in
+ * DM355 and DM6446 we need to fill the stanard names as
+ * well here. Now both are the same.
+ */
+ } else if (cpu_is_davinci_dm365()) {
+ outputs_ops.count = VPBE_DM365_ENCODER_MAX_NO_OUTPUTS;
+// vpbe_encoder_configuration.vencregs = DM365_VENC_REG_BASE;
+ vpbe_encoder_configuration.no_of_outputs =
+ VPBE_DM365_ENCODER_MAX_NO_OUTPUTS;
+ vpbe_encoder_configuration.output[0].no_of_standard =
+ VPBE_DM365_ENCODER_COMPOSITE_NUM_STD;
+ vpbe_encoder_configuration.output[1].no_of_standard =
+ VPBE_DM365_ENCODER_COMPONENT_NUM_STD;
+ vpbe_encoder_configuration.output[1].output_name =
+ VID_ENC_OUTPUT_COMPONENT;
+ vpbe_encoder_configuration.output[1].standards[0] =
+ VID_ENC_STD_480P_60;
+ vpbe_encoder_configuration.output[1].standards[1] =
+ VID_ENC_STD_576P_50;
+ vpbe_encoder_configuration.output[1].standards[2] =
+ VID_ENC_STD_720P_24;
+ vpbe_encoder_configuration.output[1].standards[3] =
+ VID_ENC_STD_720P_25;
+ vpbe_encoder_configuration.output[1].standards[4] =
+ VID_ENC_STD_720P_30;
+ vpbe_encoder_configuration.output[1].standards[5] =
+ VID_ENC_STD_720P_50;
+ vpbe_encoder_configuration.output[1].standards[6] =
+ VID_ENC_STD_720P_60;
+ vpbe_encoder_configuration.output[1].standards[7] =
+ VID_ENC_STD_1080I_25;
+ vpbe_encoder_configuration.output[1].standards[8] =
+ VID_ENC_STD_1080I_30;
+ } else
+ return -1;
+
+ err = vid_enc_register_encoder(&vpbe_encoder_dev);
+ printk(KERN_NOTICE "VPBE Encoder Initialized\n");
+ return err;
+}
+
+/* Function used to cleanup vpbe encoder driver */
+static void vpbe_encoder_cleanup(void)
+{
+ vid_enc_unregister_encoder(&vpbe_encoder_dev);
+}
+
+subsys_initcall(vpbe_encoder_init);
+module_exit(vpbe_encoder_cleanup);
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/davinci/vpbe_osd.c b/drivers/media/platform/davinci/vpbe_osd.c
deleted file mode 100644
index 12ad17c5..00000000
--- a/drivers/media/platform/davinci/vpbe_osd.c
+++ /dev/null
@@ -1,1619 +0,0 @@
-/*
- * Copyright (C) 2007-2010 Texas Instruments Inc
- * Copyright (C) 2007 MontaVista Software, Inc.
- *
- * Andy Lowe (alowe@mvista.com), MontaVista Software
- * - Initial version
- * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
- * - ported to sub device interface
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/slab.h>
-
-#include <mach/cputype.h>
-#include <mach/hardware.h>
-
-#include <media/davinci/vpss.h>
-#include <media/v4l2-device.h>
-#include <media/davinci/vpbe_types.h>
-#include <media/davinci/vpbe_osd.h>
-
-#include <linux/io.h>
-#include "vpbe_osd_regs.h"
-
-#define MODULE_NAME "davinci-vpbe-osd"
-
-static struct platform_device_id vpbe_osd_devtype[] = {
- {
- .name = DM644X_VPBE_OSD_SUBDEV_NAME,
- .driver_data = VPBE_VERSION_1,
- }, {
- .name = DM365_VPBE_OSD_SUBDEV_NAME,
- .driver_data = VPBE_VERSION_2,
- }, {
- .name = DM355_VPBE_OSD_SUBDEV_NAME,
- .driver_data = VPBE_VERSION_3,
- },
-};
-
-MODULE_DEVICE_TABLE(platform, vpbe_osd_devtype);
-
-/* register access routines */
-static inline u32 osd_read(struct osd_state *sd, u32 offset)
-{
- struct osd_state *osd = sd;
-
- return readl(osd->osd_base + offset);
-}
-
-static inline u32 osd_write(struct osd_state *sd, u32 val, u32 offset)
-{
- struct osd_state *osd = sd;
-
- writel(val, osd->osd_base + offset);
-
- return val;
-}
-
-static inline u32 osd_set(struct osd_state *sd, u32 mask, u32 offset)
-{
- struct osd_state *osd = sd;
-
- void __iomem *addr = osd->osd_base + offset;
- u32 val = readl(addr) | mask;
-
- writel(val, addr);
-
- return val;
-}
-
-static inline u32 osd_clear(struct osd_state *sd, u32 mask, u32 offset)
-{
- struct osd_state *osd = sd;
-
- void __iomem *addr = osd->osd_base + offset;
- u32 val = readl(addr) & ~mask;
-
- writel(val, addr);
-
- return val;
-}
-
-static inline u32 osd_modify(struct osd_state *sd, u32 mask, u32 val,
- u32 offset)
-{
- struct osd_state *osd = sd;
-
- void __iomem *addr = osd->osd_base + offset;
- u32 new_val = (readl(addr) & ~mask) | (val & mask);
-
- writel(new_val, addr);
-
- return new_val;
-}
-
-/* define some macros for layer and pixfmt classification */
-#define is_osd_win(layer) (((layer) == WIN_OSD0) || ((layer) == WIN_OSD1))
-#define is_vid_win(layer) (((layer) == WIN_VID0) || ((layer) == WIN_VID1))
-#define is_rgb_pixfmt(pixfmt) \
- (((pixfmt) == PIXFMT_RGB565) || ((pixfmt) == PIXFMT_RGB888))
-#define is_yc_pixfmt(pixfmt) \
- (((pixfmt) == PIXFMT_YCbCrI) || ((pixfmt) == PIXFMT_YCrCbI) || \
- ((pixfmt) == PIXFMT_NV12))
-#define MAX_WIN_SIZE OSD_VIDWIN0XP_V0X
-#define MAX_LINE_LENGTH (OSD_VIDWIN0OFST_V0LO << 5)
-
-/**
- * _osd_dm6446_vid0_pingpong() - field inversion fix for DM6446
- * @sd - ptr to struct osd_state
- * @field_inversion - inversion flag
- * @fb_base_phys - frame buffer address
- * @lconfig - ptr to layer config
- *
- * This routine implements a workaround for the field signal inversion silicon
- * erratum described in Advisory 1.3.8 for the DM6446. The fb_base_phys and
- * lconfig parameters apply to the vid0 window. This routine should be called
- * whenever the vid0 layer configuration or start address is modified, or when
- * the OSD field inversion setting is modified.
- * Returns: 1 if the ping-pong buffers need to be toggled in the vsync isr, or
- * 0 otherwise
- */
-static int _osd_dm6446_vid0_pingpong(struct osd_state *sd,
- int field_inversion,
- unsigned long fb_base_phys,
- const struct osd_layer_config *lconfig)
-{
- struct osd_platform_data *pdata;
-
- pdata = (struct osd_platform_data *)sd->dev->platform_data;
- if (pdata != NULL && pdata->field_inv_wa_enable) {
-
- if (!field_inversion || !lconfig->interlaced) {
- osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR);
- osd_write(sd, fb_base_phys & ~0x1F, OSD_PPVWIN0ADR);
- osd_modify(sd, OSD_MISCCTL_PPSW | OSD_MISCCTL_PPRV, 0,
- OSD_MISCCTL);
- return 0;
- } else {
- unsigned miscctl = OSD_MISCCTL_PPRV;
-
- osd_write(sd,
- (fb_base_phys & ~0x1F) - lconfig->line_length,
- OSD_VIDWIN0ADR);
- osd_write(sd,
- (fb_base_phys & ~0x1F) + lconfig->line_length,
- OSD_PPVWIN0ADR);
- osd_modify(sd,
- OSD_MISCCTL_PPSW | OSD_MISCCTL_PPRV, miscctl,
- OSD_MISCCTL);
-
- return 1;
- }
- }
-
- return 0;
-}
-
-static void _osd_set_field_inversion(struct osd_state *sd, int enable)
-{
- unsigned fsinv = 0;
-
- if (enable)
- fsinv = OSD_MODE_FSINV;
-
- osd_modify(sd, OSD_MODE_FSINV, fsinv, OSD_MODE);
-}
-
-static void _osd_set_blink_attribute(struct osd_state *sd, int enable,
- enum osd_blink_interval blink)
-{
- u32 osdatrmd = 0;
-
- if (enable) {
- osdatrmd |= OSD_OSDATRMD_BLNK;
- osdatrmd |= blink << OSD_OSDATRMD_BLNKINT_SHIFT;
- }
- /* caller must ensure that OSD1 is configured in attribute mode */
- osd_modify(sd, OSD_OSDATRMD_BLNKINT | OSD_OSDATRMD_BLNK, osdatrmd,
- OSD_OSDATRMD);
-}
-
-static void _osd_set_rom_clut(struct osd_state *sd,
- enum osd_rom_clut rom_clut)
-{
- if (rom_clut == ROM_CLUT0)
- osd_clear(sd, OSD_MISCCTL_RSEL, OSD_MISCCTL);
- else
- osd_set(sd, OSD_MISCCTL_RSEL, OSD_MISCCTL);
-}
-
-static void _osd_set_palette_map(struct osd_state *sd,
- enum osd_win_layer osdwin,
- unsigned char pixel_value,
- unsigned char clut_index,
- enum osd_pix_format pixfmt)
-{
- static const int map_2bpp[] = { 0, 5, 10, 15 };
- static const int map_1bpp[] = { 0, 15 };
- int bmp_offset;
- int bmp_shift;
- int bmp_mask;
- int bmp_reg;
-
- switch (pixfmt) {
- case PIXFMT_1BPP:
- bmp_reg = map_1bpp[pixel_value & 0x1];
- break;
- case PIXFMT_2BPP:
- bmp_reg = map_2bpp[pixel_value & 0x3];
- break;
- case PIXFMT_4BPP:
- bmp_reg = pixel_value & 0xf;
- break;
- default:
- return;
- }
-
- switch (osdwin) {
- case OSDWIN_OSD0:
- bmp_offset = OSD_W0BMP01 + (bmp_reg >> 1) * sizeof(u32);
- break;
- case OSDWIN_OSD1:
- bmp_offset = OSD_W1BMP01 + (bmp_reg >> 1) * sizeof(u32);
- break;
- default:
- return;
- }
-
- if (bmp_reg & 1) {
- bmp_shift = 8;
- bmp_mask = 0xff << 8;
- } else {
- bmp_shift = 0;
- bmp_mask = 0xff;
- }
-
- osd_modify(sd, bmp_mask, clut_index << bmp_shift, bmp_offset);
-}
-
-static void _osd_set_rec601_attenuation(struct osd_state *sd,
- enum osd_win_layer osdwin, int enable)
-{
- switch (osdwin) {
- case OSDWIN_OSD0:
- osd_modify(sd, OSD_OSDWIN0MD_ATN0E,
- enable ? OSD_OSDWIN0MD_ATN0E : 0,
- OSD_OSDWIN0MD);
- if (sd->vpbe_type == VPBE_VERSION_1)
- osd_modify(sd, OSD_OSDWIN0MD_ATN0E,
- enable ? OSD_OSDWIN0MD_ATN0E : 0,
- OSD_OSDWIN0MD);
- else if ((sd->vpbe_type == VPBE_VERSION_3) ||
- (sd->vpbe_type == VPBE_VERSION_2))
- osd_modify(sd, OSD_EXTMODE_ATNOSD0EN,
- enable ? OSD_EXTMODE_ATNOSD0EN : 0,
- OSD_EXTMODE);
- break;
- case OSDWIN_OSD1:
- osd_modify(sd, OSD_OSDWIN1MD_ATN1E,
- enable ? OSD_OSDWIN1MD_ATN1E : 0,
- OSD_OSDWIN1MD);
- if (sd->vpbe_type == VPBE_VERSION_1)
- osd_modify(sd, OSD_OSDWIN1MD_ATN1E,
- enable ? OSD_OSDWIN1MD_ATN1E : 0,
- OSD_OSDWIN1MD);
- else if ((sd->vpbe_type == VPBE_VERSION_3) ||
- (sd->vpbe_type == VPBE_VERSION_2))
- osd_modify(sd, OSD_EXTMODE_ATNOSD1EN,
- enable ? OSD_EXTMODE_ATNOSD1EN : 0,
- OSD_EXTMODE);
- break;
- }
-}
-
-static void _osd_set_blending_factor(struct osd_state *sd,
- enum osd_win_layer osdwin,
- enum osd_blending_factor blend)
-{
- switch (osdwin) {
- case OSDWIN_OSD0:
- osd_modify(sd, OSD_OSDWIN0MD_BLND0,
- blend << OSD_OSDWIN0MD_BLND0_SHIFT, OSD_OSDWIN0MD);
- break;
- case OSDWIN_OSD1:
- osd_modify(sd, OSD_OSDWIN1MD_BLND1,
- blend << OSD_OSDWIN1MD_BLND1_SHIFT, OSD_OSDWIN1MD);
- break;
- }
-}
-
-static void _osd_enable_rgb888_pixblend(struct osd_state *sd,
- enum osd_win_layer osdwin)
-{
-
- osd_modify(sd, OSD_MISCCTL_BLDSEL, 0, OSD_MISCCTL);
- switch (osdwin) {
- case OSDWIN_OSD0:
- osd_modify(sd, OSD_EXTMODE_OSD0BLDCHR,
- OSD_EXTMODE_OSD0BLDCHR, OSD_EXTMODE);
- break;
- case OSDWIN_OSD1:
- osd_modify(sd, OSD_EXTMODE_OSD1BLDCHR,
- OSD_EXTMODE_OSD1BLDCHR, OSD_EXTMODE);
- break;
- }
-}
-
-static void _osd_enable_color_key(struct osd_state *sd,
- enum osd_win_layer osdwin,
- unsigned colorkey,
- enum osd_pix_format pixfmt)
-{
- switch (pixfmt) {
- case PIXFMT_1BPP:
- case PIXFMT_2BPP:
- case PIXFMT_4BPP:
- case PIXFMT_8BPP:
- if (sd->vpbe_type == VPBE_VERSION_3) {
- switch (osdwin) {
- case OSDWIN_OSD0:
- osd_modify(sd, OSD_TRANSPBMPIDX_BMP0,
- colorkey <<
- OSD_TRANSPBMPIDX_BMP0_SHIFT,
- OSD_TRANSPBMPIDX);
- break;
- case OSDWIN_OSD1:
- osd_modify(sd, OSD_TRANSPBMPIDX_BMP1,
- colorkey <<
- OSD_TRANSPBMPIDX_BMP1_SHIFT,
- OSD_TRANSPBMPIDX);
- break;
- }
- }
- break;
- case PIXFMT_RGB565:
- if (sd->vpbe_type == VPBE_VERSION_1)
- osd_write(sd, colorkey & OSD_TRANSPVAL_RGBTRANS,
- OSD_TRANSPVAL);
- else if (sd->vpbe_type == VPBE_VERSION_3)
- osd_write(sd, colorkey & OSD_TRANSPVALL_RGBL,
- OSD_TRANSPVALL);
- break;
- case PIXFMT_YCbCrI:
- case PIXFMT_YCrCbI:
- if (sd->vpbe_type == VPBE_VERSION_3)
- osd_modify(sd, OSD_TRANSPVALU_Y, colorkey,
- OSD_TRANSPVALU);
- break;
- case PIXFMT_RGB888:
- if (sd->vpbe_type == VPBE_VERSION_3) {
- osd_write(sd, colorkey & OSD_TRANSPVALL_RGBL,
- OSD_TRANSPVALL);
- osd_modify(sd, OSD_TRANSPVALU_RGBU, colorkey >> 16,
- OSD_TRANSPVALU);
- }
- break;
- default:
- break;
- }
-
- switch (osdwin) {
- case OSDWIN_OSD0:
- osd_set(sd, OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD);
- break;
- case OSDWIN_OSD1:
- osd_set(sd, OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD);
- break;
- }
-}
-
-static void _osd_disable_color_key(struct osd_state *sd,
- enum osd_win_layer osdwin)
-{
- switch (osdwin) {
- case OSDWIN_OSD0:
- osd_clear(sd, OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD);
- break;
- case OSDWIN_OSD1:
- osd_clear(sd, OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD);
- break;
- }
-}
-
-static void _osd_set_osd_clut(struct osd_state *sd,
- enum osd_win_layer osdwin,
- enum osd_clut clut)
-{
- u32 winmd = 0;
-
- switch (osdwin) {
- case OSDWIN_OSD0:
- if (clut == RAM_CLUT)
- winmd |= OSD_OSDWIN0MD_CLUTS0;
- osd_modify(sd, OSD_OSDWIN0MD_CLUTS0, winmd, OSD_OSDWIN0MD);
- break;
- case OSDWIN_OSD1:
- if (clut == RAM_CLUT)
- winmd |= OSD_OSDWIN1MD_CLUTS1;
- osd_modify(sd, OSD_OSDWIN1MD_CLUTS1, winmd, OSD_OSDWIN1MD);
- break;
- }
-}
-
-static void _osd_set_zoom(struct osd_state *sd, enum osd_layer layer,
- enum osd_zoom_factor h_zoom,
- enum osd_zoom_factor v_zoom)
-{
- u32 winmd = 0;
-
- switch (layer) {
- case WIN_OSD0:
- winmd |= (h_zoom << OSD_OSDWIN0MD_OHZ0_SHIFT);
- winmd |= (v_zoom << OSD_OSDWIN0MD_OVZ0_SHIFT);
- osd_modify(sd, OSD_OSDWIN0MD_OHZ0 | OSD_OSDWIN0MD_OVZ0, winmd,
- OSD_OSDWIN0MD);
- break;
- case WIN_VID0:
- winmd |= (h_zoom << OSD_VIDWINMD_VHZ0_SHIFT);
- winmd |= (v_zoom << OSD_VIDWINMD_VVZ0_SHIFT);
- osd_modify(sd, OSD_VIDWINMD_VHZ0 | OSD_VIDWINMD_VVZ0, winmd,
- OSD_VIDWINMD);
- break;
- case WIN_OSD1:
- winmd |= (h_zoom << OSD_OSDWIN1MD_OHZ1_SHIFT);
- winmd |= (v_zoom << OSD_OSDWIN1MD_OVZ1_SHIFT);
- osd_modify(sd, OSD_OSDWIN1MD_OHZ1 | OSD_OSDWIN1MD_OVZ1, winmd,
- OSD_OSDWIN1MD);
- break;
- case WIN_VID1:
- winmd |= (h_zoom << OSD_VIDWINMD_VHZ1_SHIFT);
- winmd |= (v_zoom << OSD_VIDWINMD_VVZ1_SHIFT);
- osd_modify(sd, OSD_VIDWINMD_VHZ1 | OSD_VIDWINMD_VVZ1, winmd,
- OSD_VIDWINMD);
- break;
- }
-}
-
-static void _osd_disable_layer(struct osd_state *sd, enum osd_layer layer)
-{
- switch (layer) {
- case WIN_OSD0:
- osd_clear(sd, OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD);
- break;
- case WIN_VID0:
- osd_clear(sd, OSD_VIDWINMD_ACT0, OSD_VIDWINMD);
- break;
- case WIN_OSD1:
- /* disable attribute mode as well as disabling the window */
- osd_clear(sd, OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1,
- OSD_OSDWIN1MD);
- break;
- case WIN_VID1:
- osd_clear(sd, OSD_VIDWINMD_ACT1, OSD_VIDWINMD);
- break;
- }
-}
-
-static void osd_disable_layer(struct osd_state *sd, enum osd_layer layer)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- if (!win->is_enabled) {
- spin_unlock_irqrestore(&osd->lock, flags);
- return;
- }
- win->is_enabled = 0;
-
- _osd_disable_layer(sd, layer);
-
- spin_unlock_irqrestore(&osd->lock, flags);
-}
-
-static void _osd_enable_attribute_mode(struct osd_state *sd)
-{
- /* enable attribute mode for OSD1 */
- osd_set(sd, OSD_OSDWIN1MD_OASW, OSD_OSDWIN1MD);
-}
-
-static void _osd_enable_layer(struct osd_state *sd, enum osd_layer layer)
-{
- switch (layer) {
- case WIN_OSD0:
- osd_set(sd, OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD);
- break;
- case WIN_VID0:
- osd_set(sd, OSD_VIDWINMD_ACT0, OSD_VIDWINMD);
- break;
- case WIN_OSD1:
- /* enable OSD1 and disable attribute mode */
- osd_modify(sd, OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1,
- OSD_OSDWIN1MD_OACT1, OSD_OSDWIN1MD);
- break;
- case WIN_VID1:
- osd_set(sd, OSD_VIDWINMD_ACT1, OSD_VIDWINMD);
- break;
- }
-}
-
-static int osd_enable_layer(struct osd_state *sd, enum osd_layer layer,
- int otherwin)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- struct osd_layer_config *cfg = &win->lconfig;
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- /*
- * use otherwin flag to know this is the other vid window
- * in YUV420 mode, if is, skip this check
- */
- if (!otherwin && (!win->is_allocated ||
- !win->fb_base_phys ||
- !cfg->line_length ||
- !cfg->xsize ||
- !cfg->ysize)) {
- spin_unlock_irqrestore(&osd->lock, flags);
- return -1;
- }
-
- if (win->is_enabled) {
- spin_unlock_irqrestore(&osd->lock, flags);
- return 0;
- }
- win->is_enabled = 1;
-
- if (cfg->pixfmt != PIXFMT_OSD_ATTR)
- _osd_enable_layer(sd, layer);
- else {
- _osd_enable_attribute_mode(sd);
- _osd_set_blink_attribute(sd, osd->is_blinking, osd->blink);
- }
-
- spin_unlock_irqrestore(&osd->lock, flags);
-
- return 0;
-}
-
-#define OSD_SRC_ADDR_HIGH4 0x7800000
-#define OSD_SRC_ADDR_HIGH7 0x7F0000
-#define OSD_SRCADD_OFSET_SFT 23
-#define OSD_SRCADD_ADD_SFT 16
-#define OSD_WINADL_MASK 0xFFFF
-#define OSD_WINOFST_MASK 0x1000
-#define VPBE_REG_BASE 0x80000000
-
-static void _osd_start_layer(struct osd_state *sd, enum osd_layer layer,
- unsigned long fb_base_phys,
- unsigned long cbcr_ofst)
-{
-
- if (sd->vpbe_type == VPBE_VERSION_1) {
- switch (layer) {
- case WIN_OSD0:
- osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN0ADR);
- break;
- case WIN_VID0:
- osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR);
- break;
- case WIN_OSD1:
- osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN1ADR);
- break;
- case WIN_VID1:
- osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN1ADR);
- break;
- }
- } else if (sd->vpbe_type == VPBE_VERSION_3) {
- unsigned long fb_offset_32 =
- (fb_base_phys - VPBE_REG_BASE) >> 5;
-
- switch (layer) {
- case WIN_OSD0:
- osd_modify(sd, OSD_OSDWINADH_O0AH,
- fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
- OSD_OSDWINADH_O0AH_SHIFT),
- OSD_OSDWINADH);
- osd_write(sd, fb_offset_32 & OSD_OSDWIN0ADL_O0AL,
- OSD_OSDWIN0ADL);
- break;
- case WIN_VID0:
- osd_modify(sd, OSD_VIDWINADH_V0AH,
- fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
- OSD_VIDWINADH_V0AH_SHIFT),
- OSD_VIDWINADH);
- osd_write(sd, fb_offset_32 & OSD_VIDWIN0ADL_V0AL,
- OSD_VIDWIN0ADL);
- break;
- case WIN_OSD1:
- osd_modify(sd, OSD_OSDWINADH_O1AH,
- fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
- OSD_OSDWINADH_O1AH_SHIFT),
- OSD_OSDWINADH);
- osd_write(sd, fb_offset_32 & OSD_OSDWIN1ADL_O1AL,
- OSD_OSDWIN1ADL);
- break;
- case WIN_VID1:
- osd_modify(sd, OSD_VIDWINADH_V1AH,
- fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
- OSD_VIDWINADH_V1AH_SHIFT),
- OSD_VIDWINADH);
- osd_write(sd, fb_offset_32 & OSD_VIDWIN1ADL_V1AL,
- OSD_VIDWIN1ADL);
- break;
- }
- } else if (sd->vpbe_type == VPBE_VERSION_2) {
- struct osd_window_state *win = &sd->win[layer];
- unsigned long fb_offset_32, cbcr_offset_32;
-
- fb_offset_32 = fb_base_phys - VPBE_REG_BASE;
- if (cbcr_ofst)
- cbcr_offset_32 = cbcr_ofst;
- else
- cbcr_offset_32 = win->lconfig.line_length *
- win->lconfig.ysize;
- cbcr_offset_32 += fb_offset_32;
- fb_offset_32 = fb_offset_32 >> 5;
- cbcr_offset_32 = cbcr_offset_32 >> 5;
- /*
- * DM365: start address is 27-bit long address b26 - b23 are
- * in offset register b12 - b9, and * bit 26 has to be '1'
- */
- if (win->lconfig.pixfmt == PIXFMT_NV12) {
- switch (layer) {
- case WIN_VID0:
- case WIN_VID1:
- /* Y is in VID0 */
- osd_modify(sd, OSD_VIDWIN0OFST_V0AH,
- ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
- (OSD_SRCADD_OFSET_SFT -
- OSD_WINOFST_AH_SHIFT)) |
- OSD_WINOFST_MASK, OSD_VIDWIN0OFST);
- osd_modify(sd, OSD_VIDWINADH_V0AH,
- (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
- (OSD_SRCADD_ADD_SFT -
- OSD_VIDWINADH_V0AH_SHIFT),
- OSD_VIDWINADH);
- osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
- OSD_VIDWIN0ADL);
- /* CbCr is in VID1 */
- osd_modify(sd, OSD_VIDWIN1OFST_V1AH,
- ((cbcr_offset_32 &
- OSD_SRC_ADDR_HIGH4) >>
- (OSD_SRCADD_OFSET_SFT -
- OSD_WINOFST_AH_SHIFT)) |
- OSD_WINOFST_MASK, OSD_VIDWIN1OFST);
- osd_modify(sd, OSD_VIDWINADH_V1AH,
- (cbcr_offset_32 &
- OSD_SRC_ADDR_HIGH7) >>
- (OSD_SRCADD_ADD_SFT -
- OSD_VIDWINADH_V1AH_SHIFT),
- OSD_VIDWINADH);
- osd_write(sd, cbcr_offset_32 & OSD_WINADL_MASK,
- OSD_VIDWIN1ADL);
- break;
- default:
- break;
- }
- }
-
- switch (layer) {
- case WIN_OSD0:
- osd_modify(sd, OSD_OSDWIN0OFST_O0AH,
- ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
- (OSD_SRCADD_OFSET_SFT -
- OSD_WINOFST_AH_SHIFT)) | OSD_WINOFST_MASK,
- OSD_OSDWIN0OFST);
- osd_modify(sd, OSD_OSDWINADH_O0AH,
- (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
- (OSD_SRCADD_ADD_SFT -
- OSD_OSDWINADH_O0AH_SHIFT), OSD_OSDWINADH);
- osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
- OSD_OSDWIN0ADL);
- break;
- case WIN_VID0:
- if (win->lconfig.pixfmt != PIXFMT_NV12) {
- osd_modify(sd, OSD_VIDWIN0OFST_V0AH,
- ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
- (OSD_SRCADD_OFSET_SFT -
- OSD_WINOFST_AH_SHIFT)) |
- OSD_WINOFST_MASK, OSD_VIDWIN0OFST);
- osd_modify(sd, OSD_VIDWINADH_V0AH,
- (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
- (OSD_SRCADD_ADD_SFT -
- OSD_VIDWINADH_V0AH_SHIFT),
- OSD_VIDWINADH);
- osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
- OSD_VIDWIN0ADL);
- }
- break;
- case WIN_OSD1:
- osd_modify(sd, OSD_OSDWIN1OFST_O1AH,
- ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
- (OSD_SRCADD_OFSET_SFT -
- OSD_WINOFST_AH_SHIFT)) | OSD_WINOFST_MASK,
- OSD_OSDWIN1OFST);
- osd_modify(sd, OSD_OSDWINADH_O1AH,
- (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
- (OSD_SRCADD_ADD_SFT -
- OSD_OSDWINADH_O1AH_SHIFT),
- OSD_OSDWINADH);
- osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
- OSD_OSDWIN1ADL);
- break;
- case WIN_VID1:
- if (win->lconfig.pixfmt != PIXFMT_NV12) {
- osd_modify(sd, OSD_VIDWIN1OFST_V1AH,
- ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
- (OSD_SRCADD_OFSET_SFT -
- OSD_WINOFST_AH_SHIFT)) |
- OSD_WINOFST_MASK, OSD_VIDWIN1OFST);
- osd_modify(sd, OSD_VIDWINADH_V1AH,
- (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
- (OSD_SRCADD_ADD_SFT -
- OSD_VIDWINADH_V1AH_SHIFT),
- OSD_VIDWINADH);
- osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
- OSD_VIDWIN1ADL);
- }
- break;
- }
- }
-}
-
-static void osd_start_layer(struct osd_state *sd, enum osd_layer layer,
- unsigned long fb_base_phys,
- unsigned long cbcr_ofst)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- struct osd_layer_config *cfg = &win->lconfig;
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- win->fb_base_phys = fb_base_phys & ~0x1F;
- _osd_start_layer(sd, layer, fb_base_phys, cbcr_ofst);
-
- if (layer == WIN_VID0) {
- osd->pingpong =
- _osd_dm6446_vid0_pingpong(sd, osd->field_inversion,
- win->fb_base_phys,
- cfg);
- }
-
- spin_unlock_irqrestore(&osd->lock, flags);
-}
-
-static void osd_get_layer_config(struct osd_state *sd, enum osd_layer layer,
- struct osd_layer_config *lconfig)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- *lconfig = win->lconfig;
-
- spin_unlock_irqrestore(&osd->lock, flags);
-}
-
-/**
- * try_layer_config() - Try a specific configuration for the layer
- * @sd - ptr to struct osd_state
- * @layer - layer to configure
- * @lconfig - layer configuration to try
- *
- * If the requested lconfig is completely rejected and the value of lconfig on
- * exit is the current lconfig, then try_layer_config() returns 1. Otherwise,
- * try_layer_config() returns 0. A return value of 0 does not necessarily mean
- * that the value of lconfig on exit is identical to the value of lconfig on
- * entry, but merely that it represents a change from the current lconfig.
- */
-static int try_layer_config(struct osd_state *sd, enum osd_layer layer,
- struct osd_layer_config *lconfig)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- int bad_config = 0;
-
- /* verify that the pixel format is compatible with the layer */
- switch (lconfig->pixfmt) {
- case PIXFMT_1BPP:
- case PIXFMT_2BPP:
- case PIXFMT_4BPP:
- case PIXFMT_8BPP:
- case PIXFMT_RGB565:
- if (osd->vpbe_type == VPBE_VERSION_1)
- bad_config = !is_vid_win(layer);
- break;
- case PIXFMT_YCbCrI:
- case PIXFMT_YCrCbI:
- bad_config = !is_vid_win(layer);
- break;
- case PIXFMT_RGB888:
- if (osd->vpbe_type == VPBE_VERSION_1)
- bad_config = !is_vid_win(layer);
- else if ((osd->vpbe_type == VPBE_VERSION_3) ||
- (osd->vpbe_type == VPBE_VERSION_2))
- bad_config = !is_osd_win(layer);
- break;
- case PIXFMT_NV12:
- if (osd->vpbe_type != VPBE_VERSION_2)
- bad_config = 1;
- else
- bad_config = is_osd_win(layer);
- break;
- case PIXFMT_OSD_ATTR:
- bad_config = (layer != WIN_OSD1);
- break;
- default:
- bad_config = 1;
- break;
- }
- if (bad_config) {
- /*
- * The requested pixel format is incompatible with the layer,
- * so keep the current layer configuration.
- */
- *lconfig = win->lconfig;
- return bad_config;
- }
-
- /* DM6446: */
- /* only one OSD window at a time can use RGB pixel formats */
- if ((osd->vpbe_type == VPBE_VERSION_1) &&
- is_osd_win(layer) && is_rgb_pixfmt(lconfig->pixfmt)) {
- enum osd_pix_format pixfmt;
- if (layer == WIN_OSD0)
- pixfmt = osd->win[WIN_OSD1].lconfig.pixfmt;
- else
- pixfmt = osd->win[WIN_OSD0].lconfig.pixfmt;
-
- if (is_rgb_pixfmt(pixfmt)) {
- /*
- * The other OSD window is already configured for an
- * RGB, so keep the current layer configuration.
- */
- *lconfig = win->lconfig;
- return 1;
- }
- }
-
- /* DM6446: only one video window at a time can use RGB888 */
- if ((osd->vpbe_type == VPBE_VERSION_1) && is_vid_win(layer) &&
- lconfig->pixfmt == PIXFMT_RGB888) {
- enum osd_pix_format pixfmt;
-
- if (layer == WIN_VID0)
- pixfmt = osd->win[WIN_VID1].lconfig.pixfmt;
- else
- pixfmt = osd->win[WIN_VID0].lconfig.pixfmt;
-
- if (pixfmt == PIXFMT_RGB888) {
- /*
- * The other video window is already configured for
- * RGB888, so keep the current layer configuration.
- */
- *lconfig = win->lconfig;
- return 1;
- }
- }
-
- /* window dimensions must be non-zero */
- if (!lconfig->line_length || !lconfig->xsize || !lconfig->ysize) {
- *lconfig = win->lconfig;
- return 1;
- }
-
- /* round line_length up to a multiple of 32 */
- lconfig->line_length = ((lconfig->line_length + 31) / 32) * 32;
- lconfig->line_length =
- min(lconfig->line_length, (unsigned)MAX_LINE_LENGTH);
- lconfig->xsize = min(lconfig->xsize, (unsigned)MAX_WIN_SIZE);
- lconfig->ysize = min(lconfig->ysize, (unsigned)MAX_WIN_SIZE);
- lconfig->xpos = min(lconfig->xpos, (unsigned)MAX_WIN_SIZE);
- lconfig->ypos = min(lconfig->ypos, (unsigned)MAX_WIN_SIZE);
- lconfig->interlaced = (lconfig->interlaced != 0);
- if (lconfig->interlaced) {
- /* ysize and ypos must be even for interlaced displays */
- lconfig->ysize &= ~1;
- lconfig->ypos &= ~1;
- }
-
- return 0;
-}
-
-static void _osd_disable_vid_rgb888(struct osd_state *sd)
-{
- /*
- * The DM6446 supports RGB888 pixel format in a single video window.
- * This routine disables RGB888 pixel format for both video windows.
- * The caller must ensure that neither video window is currently
- * configured for RGB888 pixel format.
- */
- if (sd->vpbe_type == VPBE_VERSION_1)
- osd_clear(sd, OSD_MISCCTL_RGBEN, OSD_MISCCTL);
-}
-
-static void _osd_enable_vid_rgb888(struct osd_state *sd,
- enum osd_layer layer)
-{
- /*
- * The DM6446 supports RGB888 pixel format in a single video window.
- * This routine enables RGB888 pixel format for the specified video
- * window. The caller must ensure that the other video window is not
- * currently configured for RGB888 pixel format, as this routine will
- * disable RGB888 pixel format for the other window.
- */
- if (sd->vpbe_type == VPBE_VERSION_1) {
- if (layer == WIN_VID0)
- osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
- OSD_MISCCTL_RGBEN, OSD_MISCCTL);
- else if (layer == WIN_VID1)
- osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
- OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
- OSD_MISCCTL);
- }
-}
-
-static void _osd_set_cbcr_order(struct osd_state *sd,
- enum osd_pix_format pixfmt)
-{
- /*
- * The caller must ensure that all windows using YC pixfmt use the same
- * Cb/Cr order.
- */
- if (pixfmt == PIXFMT_YCbCrI)
- osd_clear(sd, OSD_MODE_CS, OSD_MODE);
- else if (pixfmt == PIXFMT_YCrCbI)
- osd_set(sd, OSD_MODE_CS, OSD_MODE);
-}
-
-static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer,
- const struct osd_layer_config *lconfig)
-{
- u32 winmd = 0, winmd_mask = 0, bmw = 0;
-
- _osd_set_cbcr_order(sd, lconfig->pixfmt);
-
- switch (layer) {
- case WIN_OSD0:
- if (sd->vpbe_type == VPBE_VERSION_1) {
- winmd_mask |= OSD_OSDWIN0MD_RGB0E;
- if (lconfig->pixfmt == PIXFMT_RGB565)
- winmd |= OSD_OSDWIN0MD_RGB0E;
- } else if ((sd->vpbe_type == VPBE_VERSION_3) ||
- (sd->vpbe_type == VPBE_VERSION_2)) {
- winmd_mask |= OSD_OSDWIN0MD_BMP0MD;
- switch (lconfig->pixfmt) {
- case PIXFMT_RGB565:
- winmd |= (1 <<
- OSD_OSDWIN0MD_BMP0MD_SHIFT);
- break;
- case PIXFMT_RGB888:
- winmd |= (2 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
- _osd_enable_rgb888_pixblend(sd, OSDWIN_OSD0);
- break;
- case PIXFMT_YCbCrI:
- case PIXFMT_YCrCbI:
- winmd |= (3 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
- break;
- default:
- break;
- }
- }
-
- winmd_mask |= OSD_OSDWIN0MD_BMW0 | OSD_OSDWIN0MD_OFF0;
-
- switch (lconfig->pixfmt) {
- case PIXFMT_1BPP:
- bmw = 0;
- break;
- case PIXFMT_2BPP:
- bmw = 1;
- break;
- case PIXFMT_4BPP:
- bmw = 2;
- break;
- case PIXFMT_8BPP:
- bmw = 3;
- break;
- default:
- break;
- }
- winmd |= (bmw << OSD_OSDWIN0MD_BMW0_SHIFT);
-
- if (lconfig->interlaced)
- winmd |= OSD_OSDWIN0MD_OFF0;
-
- osd_modify(sd, winmd_mask, winmd, OSD_OSDWIN0MD);
- osd_write(sd, lconfig->line_length >> 5, OSD_OSDWIN0OFST);
- osd_write(sd, lconfig->xpos, OSD_OSDWIN0XP);
- osd_write(sd, lconfig->xsize, OSD_OSDWIN0XL);
- if (lconfig->interlaced) {
- osd_write(sd, lconfig->ypos >> 1, OSD_OSDWIN0YP);
- osd_write(sd, lconfig->ysize >> 1, OSD_OSDWIN0YL);
- } else {
- osd_write(sd, lconfig->ypos, OSD_OSDWIN0YP);
- osd_write(sd, lconfig->ysize, OSD_OSDWIN0YL);
- }
- break;
- case WIN_VID0:
- winmd_mask |= OSD_VIDWINMD_VFF0;
- if (lconfig->interlaced)
- winmd |= OSD_VIDWINMD_VFF0;
-
- osd_modify(sd, winmd_mask, winmd, OSD_VIDWINMD);
- osd_write(sd, lconfig->line_length >> 5, OSD_VIDWIN0OFST);
- osd_write(sd, lconfig->xpos, OSD_VIDWIN0XP);
- osd_write(sd, lconfig->xsize, OSD_VIDWIN0XL);
- /*
- * For YUV420P format the register contents are
- * duplicated in both VID registers
- */
- if ((sd->vpbe_type == VPBE_VERSION_2) &&
- (lconfig->pixfmt == PIXFMT_NV12)) {
- /* other window also */
- if (lconfig->interlaced) {
- winmd_mask |= OSD_VIDWINMD_VFF1;
- winmd |= OSD_VIDWINMD_VFF1;
- osd_modify(sd, winmd_mask, winmd,
- OSD_VIDWINMD);
- }
-
- osd_modify(sd, OSD_MISCCTL_S420D,
- OSD_MISCCTL_S420D, OSD_MISCCTL);
- osd_write(sd, lconfig->line_length >> 5,
- OSD_VIDWIN1OFST);
- osd_write(sd, lconfig->xpos, OSD_VIDWIN1XP);
- osd_write(sd, lconfig->xsize, OSD_VIDWIN1XL);
- /*
- * if NV21 pixfmt and line length not 32B
- * aligned (e.g. NTSC), Need to set window
- * X pixel size to be 32B aligned as well
- */
- if (lconfig->xsize % 32) {
- osd_write(sd,
- ((lconfig->xsize + 31) & ~31),
- OSD_VIDWIN1XL);
- osd_write(sd,
- ((lconfig->xsize + 31) & ~31),
- OSD_VIDWIN0XL);
- }
- } else if ((sd->vpbe_type == VPBE_VERSION_2) &&
- (lconfig->pixfmt != PIXFMT_NV12)) {
- osd_modify(sd, OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D,
- OSD_MISCCTL);
- }
-
- if (lconfig->interlaced) {
- osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN0YP);
- osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN0YL);
- if ((sd->vpbe_type == VPBE_VERSION_2) &&
- lconfig->pixfmt == PIXFMT_NV12) {
- osd_write(sd, lconfig->ypos >> 1,
- OSD_VIDWIN1YP);
- osd_write(sd, lconfig->ysize >> 1,
- OSD_VIDWIN1YL);
- }
- } else {
- osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP);
- osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL);
- if ((sd->vpbe_type == VPBE_VERSION_2) &&
- lconfig->pixfmt == PIXFMT_NV12) {
- osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP);
- osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL);
- }
- }
- break;
- case WIN_OSD1:
- /*
- * The caller must ensure that OSD1 is disabled prior to
- * switching from a normal mode to attribute mode or from
- * attribute mode to a normal mode.
- */
- if (lconfig->pixfmt == PIXFMT_OSD_ATTR) {
- if (sd->vpbe_type == VPBE_VERSION_1) {
- winmd_mask |= OSD_OSDWIN1MD_ATN1E |
- OSD_OSDWIN1MD_RGB1E | OSD_OSDWIN1MD_CLUTS1 |
- OSD_OSDWIN1MD_BLND1 | OSD_OSDWIN1MD_TE1;
- } else {
- winmd_mask |= OSD_OSDWIN1MD_BMP1MD |
- OSD_OSDWIN1MD_CLUTS1 | OSD_OSDWIN1MD_BLND1 |
- OSD_OSDWIN1MD_TE1;
- }
- } else {
- if (sd->vpbe_type == VPBE_VERSION_1) {
- winmd_mask |= OSD_OSDWIN1MD_RGB1E;
- if (lconfig->pixfmt == PIXFMT_RGB565)
- winmd |= OSD_OSDWIN1MD_RGB1E;
- } else if ((sd->vpbe_type == VPBE_VERSION_3)
- || (sd->vpbe_type == VPBE_VERSION_2)) {
- winmd_mask |= OSD_OSDWIN1MD_BMP1MD;
- switch (lconfig->pixfmt) {
- case PIXFMT_RGB565:
- winmd |=
- (1 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
- break;
- case PIXFMT_RGB888:
- winmd |=
- (2 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
- _osd_enable_rgb888_pixblend(sd,
- OSDWIN_OSD1);
- break;
- case PIXFMT_YCbCrI:
- case PIXFMT_YCrCbI:
- winmd |=
- (3 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
- break;
- default:
- break;
- }
- }
-
- winmd_mask |= OSD_OSDWIN1MD_BMW1;
- switch (lconfig->pixfmt) {
- case PIXFMT_1BPP:
- bmw = 0;
- break;
- case PIXFMT_2BPP:
- bmw = 1;
- break;
- case PIXFMT_4BPP:
- bmw = 2;
- break;
- case PIXFMT_8BPP:
- bmw = 3;
- break;
- default:
- break;
- }
- winmd |= (bmw << OSD_OSDWIN1MD_BMW1_SHIFT);
- }
-
- winmd_mask |= OSD_OSDWIN1MD_OFF1;
- if (lconfig->interlaced)
- winmd |= OSD_OSDWIN1MD_OFF1;
-
- osd_modify(sd, winmd_mask, winmd, OSD_OSDWIN1MD);
- osd_write(sd, lconfig->line_length >> 5, OSD_OSDWIN1OFST);
- osd_write(sd, lconfig->xpos, OSD_OSDWIN1XP);
- osd_write(sd, lconfig->xsize, OSD_OSDWIN1XL);
- if (lconfig->interlaced) {
- osd_write(sd, lconfig->ypos >> 1, OSD_OSDWIN1YP);
- osd_write(sd, lconfig->ysize >> 1, OSD_OSDWIN1YL);
- } else {
- osd_write(sd, lconfig->ypos, OSD_OSDWIN1YP);
- osd_write(sd, lconfig->ysize, OSD_OSDWIN1YL);
- }
- break;
- case WIN_VID1:
- winmd_mask |= OSD_VIDWINMD_VFF1;
- if (lconfig->interlaced)
- winmd |= OSD_VIDWINMD_VFF1;
-
- osd_modify(sd, winmd_mask, winmd, OSD_VIDWINMD);
- osd_write(sd, lconfig->line_length >> 5, OSD_VIDWIN1OFST);
- osd_write(sd, lconfig->xpos, OSD_VIDWIN1XP);
- osd_write(sd, lconfig->xsize, OSD_VIDWIN1XL);
- /*
- * For YUV420P format the register contents are
- * duplicated in both VID registers
- */
- if (sd->vpbe_type == VPBE_VERSION_2) {
- if (lconfig->pixfmt == PIXFMT_NV12) {
- /* other window also */
- if (lconfig->interlaced) {
- winmd_mask |= OSD_VIDWINMD_VFF0;
- winmd |= OSD_VIDWINMD_VFF0;
- osd_modify(sd, winmd_mask, winmd,
- OSD_VIDWINMD);
- }
- osd_modify(sd, OSD_MISCCTL_S420D,
- OSD_MISCCTL_S420D, OSD_MISCCTL);
- osd_write(sd, lconfig->line_length >> 5,
- OSD_VIDWIN0OFST);
- osd_write(sd, lconfig->xpos, OSD_VIDWIN0XP);
- osd_write(sd, lconfig->xsize, OSD_VIDWIN0XL);
- } else {
- osd_modify(sd, OSD_MISCCTL_S420D,
- ~OSD_MISCCTL_S420D, OSD_MISCCTL);
- }
- }
-
- if (lconfig->interlaced) {
- osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN1YP);
- osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN1YL);
- if ((sd->vpbe_type == VPBE_VERSION_2) &&
- lconfig->pixfmt == PIXFMT_NV12) {
- osd_write(sd, lconfig->ypos >> 1,
- OSD_VIDWIN0YP);
- osd_write(sd, lconfig->ysize >> 1,
- OSD_VIDWIN0YL);
- }
- } else {
- osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP);
- osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL);
- if ((sd->vpbe_type == VPBE_VERSION_2) &&
- lconfig->pixfmt == PIXFMT_NV12) {
- osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP);
- osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL);
- }
- }
- break;
- }
-}
-
-static int osd_set_layer_config(struct osd_state *sd, enum osd_layer layer,
- struct osd_layer_config *lconfig)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- struct osd_layer_config *cfg = &win->lconfig;
- unsigned long flags;
- int reject_config;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- reject_config = try_layer_config(sd, layer, lconfig);
- if (reject_config) {
- spin_unlock_irqrestore(&osd->lock, flags);
- return reject_config;
- }
-
- /* update the current Cb/Cr order */
- if (is_yc_pixfmt(lconfig->pixfmt))
- osd->yc_pixfmt = lconfig->pixfmt;
-
- /*
- * If we are switching OSD1 from normal mode to attribute mode or from
- * attribute mode to normal mode, then we must disable the window.
- */
- if (layer == WIN_OSD1) {
- if (((lconfig->pixfmt == PIXFMT_OSD_ATTR) &&
- (cfg->pixfmt != PIXFMT_OSD_ATTR)) ||
- ((lconfig->pixfmt != PIXFMT_OSD_ATTR) &&
- (cfg->pixfmt == PIXFMT_OSD_ATTR))) {
- win->is_enabled = 0;
- _osd_disable_layer(sd, layer);
- }
- }
-
- _osd_set_layer_config(sd, layer, lconfig);
-
- if (layer == WIN_OSD1) {
- struct osd_osdwin_state *osdwin_state =
- &osd->osdwin[OSDWIN_OSD1];
-
- if ((lconfig->pixfmt != PIXFMT_OSD_ATTR) &&
- (cfg->pixfmt == PIXFMT_OSD_ATTR)) {
- /*
- * We just switched OSD1 from attribute mode to normal
- * mode, so we must initialize the CLUT select, the
- * blend factor, transparency colorkey enable, and
- * attenuation enable (DM6446 only) bits in the
- * OSDWIN1MD register.
- */
- _osd_set_osd_clut(sd, OSDWIN_OSD1,
- osdwin_state->clut);
- _osd_set_blending_factor(sd, OSDWIN_OSD1,
- osdwin_state->blend);
- if (osdwin_state->colorkey_blending) {
- _osd_enable_color_key(sd, OSDWIN_OSD1,
- osdwin_state->
- colorkey,
- lconfig->pixfmt);
- } else
- _osd_disable_color_key(sd, OSDWIN_OSD1);
- _osd_set_rec601_attenuation(sd, OSDWIN_OSD1,
- osdwin_state->
- rec601_attenuation);
- } else if ((lconfig->pixfmt == PIXFMT_OSD_ATTR) &&
- (cfg->pixfmt != PIXFMT_OSD_ATTR)) {
- /*
- * We just switched OSD1 from normal mode to attribute
- * mode, so we must initialize the blink enable and
- * blink interval bits in the OSDATRMD register.
- */
- _osd_set_blink_attribute(sd, osd->is_blinking,
- osd->blink);
- }
- }
-
- /*
- * If we just switched to a 1-, 2-, or 4-bits-per-pixel bitmap format
- * then configure a default palette map.
- */
- if ((lconfig->pixfmt != cfg->pixfmt) &&
- ((lconfig->pixfmt == PIXFMT_1BPP) ||
- (lconfig->pixfmt == PIXFMT_2BPP) ||
- (lconfig->pixfmt == PIXFMT_4BPP))) {
- enum osd_win_layer osdwin =
- ((layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1);
- struct osd_osdwin_state *osdwin_state =
- &osd->osdwin[osdwin];
- unsigned char clut_index;
- unsigned char clut_entries = 0;
-
- switch (lconfig->pixfmt) {
- case PIXFMT_1BPP:
- clut_entries = 2;
- break;
- case PIXFMT_2BPP:
- clut_entries = 4;
- break;
- case PIXFMT_4BPP:
- clut_entries = 16;
- break;
- default:
- break;
- }
- /*
- * The default palette map maps the pixel value to the clut
- * index, i.e. pixel value 0 maps to clut entry 0, pixel value
- * 1 maps to clut entry 1, etc.
- */
- for (clut_index = 0; clut_index < 16; clut_index++) {
- osdwin_state->palette_map[clut_index] = clut_index;
- if (clut_index < clut_entries) {
- _osd_set_palette_map(sd, osdwin, clut_index,
- clut_index,
- lconfig->pixfmt);
- }
- }
- }
-
- *cfg = *lconfig;
- /* DM6446: configure the RGB888 enable and window selection */
- if (osd->win[WIN_VID0].lconfig.pixfmt == PIXFMT_RGB888)
- _osd_enable_vid_rgb888(sd, WIN_VID0);
- else if (osd->win[WIN_VID1].lconfig.pixfmt == PIXFMT_RGB888)
- _osd_enable_vid_rgb888(sd, WIN_VID1);
- else
- _osd_disable_vid_rgb888(sd);
-
- if (layer == WIN_VID0) {
- osd->pingpong =
- _osd_dm6446_vid0_pingpong(sd, osd->field_inversion,
- win->fb_base_phys,
- cfg);
- }
-
- spin_unlock_irqrestore(&osd->lock, flags);
-
- return 0;
-}
-
-static void osd_init_layer(struct osd_state *sd, enum osd_layer layer)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- enum osd_win_layer osdwin;
- struct osd_osdwin_state *osdwin_state;
- struct osd_layer_config *cfg = &win->lconfig;
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- win->is_enabled = 0;
- _osd_disable_layer(sd, layer);
-
- win->h_zoom = ZOOM_X1;
- win->v_zoom = ZOOM_X1;
- _osd_set_zoom(sd, layer, win->h_zoom, win->v_zoom);
-
- win->fb_base_phys = 0;
- _osd_start_layer(sd, layer, win->fb_base_phys, 0);
-
- cfg->line_length = 0;
- cfg->xsize = 0;
- cfg->ysize = 0;
- cfg->xpos = 0;
- cfg->ypos = 0;
- cfg->interlaced = 0;
- switch (layer) {
- case WIN_OSD0:
- case WIN_OSD1:
- osdwin = (layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1;
- osdwin_state = &osd->osdwin[osdwin];
- /*
- * Other code relies on the fact that OSD windows default to a
- * bitmap pixel format when they are deallocated, so don't
- * change this default pixel format.
- */
- cfg->pixfmt = PIXFMT_8BPP;
- _osd_set_layer_config(sd, layer, cfg);
- osdwin_state->clut = RAM_CLUT;
- _osd_set_osd_clut(sd, osdwin, osdwin_state->clut);
- osdwin_state->colorkey_blending = 0;
- _osd_disable_color_key(sd, osdwin);
- osdwin_state->blend = OSD_8_VID_0;
- _osd_set_blending_factor(sd, osdwin, osdwin_state->blend);
- osdwin_state->rec601_attenuation = 0;
- _osd_set_rec601_attenuation(sd, osdwin,
- osdwin_state->
- rec601_attenuation);
- if (osdwin == OSDWIN_OSD1) {
- osd->is_blinking = 0;
- osd->blink = BLINK_X1;
- }
- break;
- case WIN_VID0:
- case WIN_VID1:
- cfg->pixfmt = osd->yc_pixfmt;
- _osd_set_layer_config(sd, layer, cfg);
- break;
- }
-
- spin_unlock_irqrestore(&osd->lock, flags);
-}
-
-static void osd_release_layer(struct osd_state *sd, enum osd_layer layer)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- if (!win->is_allocated) {
- spin_unlock_irqrestore(&osd->lock, flags);
- return;
- }
-
- spin_unlock_irqrestore(&osd->lock, flags);
- osd_init_layer(sd, layer);
- spin_lock_irqsave(&osd->lock, flags);
-
- win->is_allocated = 0;
-
- spin_unlock_irqrestore(&osd->lock, flags);
-}
-
-static int osd_request_layer(struct osd_state *sd, enum osd_layer layer)
-{
- struct osd_state *osd = sd;
- struct osd_window_state *win = &osd->win[layer];
- unsigned long flags;
-
- spin_lock_irqsave(&osd->lock, flags);
-
- if (win->is_allocated) {
- spin_unlock_irqrestore(&osd->lock, flags);
- return -1;
- }
- win->is_allocated = 1;
-
- spin_unlock_irqrestore(&osd->lock, flags);
-
- return 0;
-}
-
-static void _osd_init(struct osd_state *sd)
-{
- osd_write(sd, 0, OSD_MODE);
- osd_write(sd, 0, OSD_VIDWINMD);
- osd_write(sd, 0, OSD_OSDWIN0MD);
- osd_write(sd, 0, OSD_OSDWIN1MD);
- osd_write(sd, 0, OSD_RECTCUR);
- osd_write(sd, 0, OSD_MISCCTL);
- if (sd->vpbe_type == VPBE_VERSION_3) {
- osd_write(sd, 0, OSD_VBNDRY);
- osd_write(sd, 0, OSD_EXTMODE);
- osd_write(sd, OSD_MISCCTL_DMANG, OSD_MISCCTL);
- }
-}
-
-static void osd_set_left_margin(struct osd_state *sd, u32 val)
-{
- osd_write(sd, val, OSD_BASEPX);
-}
-
-static void osd_set_top_margin(struct osd_state *sd, u32 val)
-{
- osd_write(sd, val, OSD_BASEPY);
-}
-
-static int osd_initialize(struct osd_state *osd)
-{
- if (osd == NULL)
- return -ENODEV;
- _osd_init(osd);
-
- /* set default Cb/Cr order */
- osd->yc_pixfmt = PIXFMT_YCbCrI;
-
- if (osd->vpbe_type == VPBE_VERSION_3) {
- /*
- * ROM CLUT1 on the DM355 is similar (identical?) to ROM CLUT0
- * on the DM6446, so make ROM_CLUT1 the default on the DM355.
- */
- osd->rom_clut = ROM_CLUT1;
- }
-
- _osd_set_field_inversion(osd, osd->field_inversion);
- _osd_set_rom_clut(osd, osd->rom_clut);
-
- osd_init_layer(osd, WIN_OSD0);
- osd_init_layer(osd, WIN_VID0);
- osd_init_layer(osd, WIN_OSD1);
- osd_init_layer(osd, WIN_VID1);
-
- return 0;
-}
-
-static const struct vpbe_osd_ops osd_ops = {
- .initialize = osd_initialize,
- .request_layer = osd_request_layer,
- .release_layer = osd_release_layer,
- .enable_layer = osd_enable_layer,
- .disable_layer = osd_disable_layer,
- .set_layer_config = osd_set_layer_config,
- .get_layer_config = osd_get_layer_config,
- .start_layer = osd_start_layer,
- .set_left_margin = osd_set_left_margin,
- .set_top_margin = osd_set_top_margin,
-};
-
-static int osd_probe(struct platform_device *pdev)
-{
- const struct platform_device_id *pdev_id;
- struct osd_state *osd;
- struct resource *res;
- int ret = 0;
-
- osd = kzalloc(sizeof(struct osd_state), GFP_KERNEL);
- if (osd == NULL)
- return -ENOMEM;
-
- pdev_id = platform_get_device_id(pdev);
- if (!pdev_id) {
- ret = -EINVAL;
- goto free_mem;
- }
-
- osd->dev = &pdev->dev;
- osd->vpbe_type = pdev_id->driver_data;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(osd->dev, "Unable to get OSD register address map\n");
- ret = -ENODEV;
- goto free_mem;
- }
- osd->osd_base_phys = res->start;
- osd->osd_size = resource_size(res);
- if (!request_mem_region(osd->osd_base_phys, osd->osd_size,
- MODULE_NAME)) {
- dev_err(osd->dev, "Unable to reserve OSD MMIO region\n");
- ret = -ENODEV;
- goto free_mem;
- }
- osd->osd_base = ioremap_nocache(res->start, osd->osd_size);
- if (!osd->osd_base) {
- dev_err(osd->dev, "Unable to map the OSD region\n");
- ret = -ENODEV;
- goto release_mem_region;
- }
- spin_lock_init(&osd->lock);
- osd->ops = osd_ops;
- platform_set_drvdata(pdev, osd);
- dev_notice(osd->dev, "OSD sub device probe success\n");
- return ret;
-
-release_mem_region:
- release_mem_region(osd->osd_base_phys, osd->osd_size);
-free_mem:
- kfree(osd);
- return ret;
-}
-
-static int osd_remove(struct platform_device *pdev)
-{
- struct osd_state *osd = platform_get_drvdata(pdev);
-
- iounmap((void *)osd->osd_base);
- release_mem_region(osd->osd_base_phys, osd->osd_size);
- kfree(osd);
- return 0;
-}
-
-static struct platform_driver osd_driver = {
- .probe = osd_probe,
- .remove = osd_remove,
- .driver = {
- .name = MODULE_NAME,
- .owner = THIS_MODULE,
- },
- .id_table = vpbe_osd_devtype
-};
-
-module_platform_driver(osd_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("DaVinci OSD Manager Driver");
-MODULE_AUTHOR("Texas Instruments");
diff --git a/drivers/media/platform/davinci/vpbe_venc.c b/drivers/media/platform/davinci/vpbe_venc.c
deleted file mode 100644
index bdbebd59..00000000
--- a/drivers/media/platform/davinci/vpbe_venc.c
+++ /dev/null
@@ -1,730 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/ctype.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/videodev2.h>
-#include <linux/slab.h>
-
-#include <mach/hardware.h>
-#include <mach/mux.h>
-#include <linux/platform_data/i2c-davinci.h>
-
-#include <linux/io.h>
-
-#include <media/davinci/vpbe_types.h>
-#include <media/davinci/vpbe_venc.h>
-#include <media/davinci/vpss.h>
-#include <media/v4l2-device.h>
-
-#include "vpbe_venc_regs.h"
-
-#define MODULE_NAME "davinci-vpbe-venc"
-
-static struct platform_device_id vpbe_venc_devtype[] = {
- {
- .name = DM644X_VPBE_VENC_SUBDEV_NAME,
- .driver_data = VPBE_VERSION_1,
- }, {
- .name = DM365_VPBE_VENC_SUBDEV_NAME,
- .driver_data = VPBE_VERSION_2,
- }, {
- .name = DM355_VPBE_VENC_SUBDEV_NAME,
- .driver_data = VPBE_VERSION_3,
- },
-};
-
-MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype);
-
-static int debug = 2;
-module_param(debug, int, 0644);
-MODULE_PARM_DESC(debug, "Debug level 0-2");
-
-struct venc_state {
- struct v4l2_subdev sd;
- struct venc_callback *callback;
- struct venc_platform_data *pdata;
- struct device *pdev;
- u32 output;
- v4l2_std_id std;
- spinlock_t lock;
- void __iomem *venc_base;
- void __iomem *vdaccfg_reg;
- enum vpbe_version venc_type;
-};
-
-static inline struct venc_state *to_state(struct v4l2_subdev *sd)
-{
- return container_of(sd, struct venc_state, sd);
-}
-
-static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
-{
- struct venc_state *venc = to_state(sd);
-
- return readl(venc->venc_base + offset);
-}
-
-static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
-{
- struct venc_state *venc = to_state(sd);
-
- writel(val, (venc->venc_base + offset));
-
- return val;
-}
-
-static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
- u32 val, u32 mask)
-{
- u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
-
- venc_write(sd, offset, new_val);
-
- return new_val;
-}
-
-static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
-{
- struct venc_state *venc = to_state(sd);
-
- writel(val, venc->vdaccfg_reg);
-
- val = readl(venc->vdaccfg_reg);
-
- return val;
-}
-
-#define VDAC_COMPONENT 0x543
-#define VDAC_S_VIDEO 0x210
-/* This function sets the dac of the VPBE for various outputs
- */
-static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
-{
- switch (out_index) {
- case 0:
- v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
- venc_write(sd, VENC_DACSEL, 0);
- break;
- case 1:
- v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
- venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
- break;
- case 2:
- v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
- venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
- break;
- default:
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
-{
- struct venc_state *venc = to_state(sd);
-
- v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
-
- if (benable) {
- venc_write(sd, VENC_VMOD, 0);
- venc_write(sd, VENC_CVBS, 0);
- venc_write(sd, VENC_LCDOUT, 0);
- venc_write(sd, VENC_HSPLS, 0);
- venc_write(sd, VENC_HSTART, 0);
- venc_write(sd, VENC_HVALID, 0);
- venc_write(sd, VENC_HINT, 0);
- venc_write(sd, VENC_VSPLS, 0);
- venc_write(sd, VENC_VSTART, 0);
- venc_write(sd, VENC_VVALID, 0);
- venc_write(sd, VENC_VINT, 0);
- venc_write(sd, VENC_YCCCTL, 0);
- venc_write(sd, VENC_DACSEL, 0);
-
- } else {
- venc_write(sd, VENC_VMOD, 0);
- /* disable VCLK output pin enable */
- venc_write(sd, VENC_VIDCTL, 0x141);
-
- /* Disable output sync pins */
- venc_write(sd, VENC_SYNCCTL, 0);
-
- /* Disable DCLOCK */
- venc_write(sd, VENC_DCLKCTL, 0);
- venc_write(sd, VENC_DRGBX1, 0x0000057C);
-
- /* Disable LCD output control (accepting default polarity) */
- venc_write(sd, VENC_LCDOUT, 0);
- if (venc->venc_type != VPBE_VERSION_3)
- venc_write(sd, VENC_CMPNT, 0x100);
- venc_write(sd, VENC_HSPLS, 0);
- venc_write(sd, VENC_HINT, 0);
- venc_write(sd, VENC_HSTART, 0);
- venc_write(sd, VENC_HVALID, 0);
-
- venc_write(sd, VENC_VSPLS, 0);
- venc_write(sd, VENC_VINT, 0);
- venc_write(sd, VENC_VSTART, 0);
- venc_write(sd, VENC_VVALID, 0);
-
- venc_write(sd, VENC_HSDLY, 0);
- venc_write(sd, VENC_VSDLY, 0);
-
- venc_write(sd, VENC_YCCCTL, 0);
- venc_write(sd, VENC_VSTARTA, 0);
-
- /* Set OSD clock and OSD Sync Adavance registers */
- venc_write(sd, VENC_OSDCLK0, 1);
- venc_write(sd, VENC_OSDCLK1, 2);
- }
-}
-
-#define VDAC_CONFIG_SD_V3 0x0E21A6B6
-#define VDAC_CONFIG_SD_V2 0x081141CF
-/*
- * setting NTSC mode
- */
-static int venc_set_ntsc(struct v4l2_subdev *sd)
-{
- u32 val;
- struct venc_state *venc = to_state(sd);
- struct venc_platform_data *pdata = venc->pdata;
-
- v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
-
- /* Setup clock at VPSS & VENC for SD */
- vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
- if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
- return -EINVAL;
-
- venc_enabledigitaloutput(sd, 0);
-
- if (venc->venc_type == VPBE_VERSION_3) {
- venc_write(sd, VENC_CLKCTL, 0x01);
- venc_write(sd, VENC_VIDCTL, 0);
- val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
- } else if (venc->venc_type == VPBE_VERSION_2) {
- venc_write(sd, VENC_CLKCTL, 0x01);
- venc_write(sd, VENC_VIDCTL, 0);
- vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
- } else {
- /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
- venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
- /* Set REC656 Mode */
- venc_write(sd, VENC_YCCCTL, 0x1);
- venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
- venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
- }
-
- venc_write(sd, VENC_VMOD, 0);
- venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
- VENC_VMOD_VIE);
- venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
- venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
- VENC_VMOD_TVTYP);
- venc_write(sd, VENC_DACTST, 0x0);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
-
- return 0;
-}
-
-/*
- * setting PAL mode
- */
-static int venc_set_pal(struct v4l2_subdev *sd)
-{
- struct venc_state *venc = to_state(sd);
-
- v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
-
- /* Setup clock at VPSS & VENC for SD */
- vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
- if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
- return -EINVAL;
-
- venc_enabledigitaloutput(sd, 0);
-
- if (venc->venc_type == VPBE_VERSION_3) {
- venc_write(sd, VENC_CLKCTL, 0x1);
- venc_write(sd, VENC_VIDCTL, 0);
- vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
- } else if (venc->venc_type == VPBE_VERSION_2) {
- venc_write(sd, VENC_CLKCTL, 0x1);
- venc_write(sd, VENC_VIDCTL, 0);
- vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
- } else {
- /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
- venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
- /* Set REC656 Mode */
- venc_write(sd, VENC_YCCCTL, 0x1);
- }
-
- venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
- VENC_SYNCCTL_OVD);
- venc_write(sd, VENC_VMOD, 0);
- venc_modify(sd, VENC_VMOD,
- (1 << VENC_VMOD_VIE_SHIFT),
- VENC_VMOD_VIE);
- venc_modify(sd, VENC_VMOD,
- (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
- venc_modify(sd, VENC_VMOD,
- (1 << VENC_VMOD_TVTYP_SHIFT),
- VENC_VMOD_TVTYP);
- venc_write(sd, VENC_DACTST, 0x0);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
-
- return 0;
-}
-
-#define VDAC_CONFIG_HD_V2 0x081141EF
-/*
- * venc_set_480p59_94
- *
- * This function configures the video encoder to EDTV(525p) component setting.
- */
-static int venc_set_480p59_94(struct v4l2_subdev *sd)
-{
- struct venc_state *venc = to_state(sd);
- struct venc_platform_data *pdata = venc->pdata;
-
- v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
- if (venc->venc_type != VPBE_VERSION_1 &&
- venc->venc_type != VPBE_VERSION_2)
- return -EINVAL;
-
- /* Setup clock at VPSS & VENC for SD */
- if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 27000000) < 0)
- return -EINVAL;
-
- venc_enabledigitaloutput(sd, 0);
-
- if (venc->venc_type == VPBE_VERSION_2)
- vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
- venc_write(sd, VENC_OSDCLK0, 0);
- venc_write(sd, VENC_OSDCLK1, 1);
-
- if (venc->venc_type == VPBE_VERSION_1) {
- venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
- VENC_VDPRO_DAFRQ);
- venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
- VENC_VDPRO_DAUPS);
- }
-
- venc_write(sd, VENC_VMOD, 0);
- venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
- VENC_VMOD_VIE);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
- venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
- VENC_VMOD_TVTYP);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
- VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
-
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
-
- return 0;
-}
-
-/*
- * venc_set_625p
- *
- * This function configures the video encoder to HDTV(625p) component setting
- */
-static int venc_set_576p50(struct v4l2_subdev *sd)
-{
- struct venc_state *venc = to_state(sd);
- struct venc_platform_data *pdata = venc->pdata;
-
- v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
-
- if (venc->venc_type != VPBE_VERSION_1 &&
- venc->venc_type != VPBE_VERSION_2)
- return -EINVAL;
- /* Setup clock at VPSS & VENC for SD */
- if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 27000000) < 0)
- return -EINVAL;
-
- venc_enabledigitaloutput(sd, 0);
-
- if (venc->venc_type == VPBE_VERSION_2)
- vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
-
- venc_write(sd, VENC_OSDCLK0, 0);
- venc_write(sd, VENC_OSDCLK1, 1);
-
- if (venc->venc_type == VPBE_VERSION_1) {
- venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
- VENC_VDPRO_DAFRQ);
- venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
- VENC_VDPRO_DAUPS);
- }
-
- venc_write(sd, VENC_VMOD, 0);
- venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
- VENC_VMOD_VIE);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
- venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
- VENC_VMOD_TVTYP);
-
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
- VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
-
- return 0;
-}
-
-/*
- * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
- */
-static int venc_set_720p60_internal(struct v4l2_subdev *sd)
-{
- struct venc_state *venc = to_state(sd);
- struct venc_platform_data *pdata = venc->pdata;
-
- if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 74250000) < 0)
- return -EINVAL;
-
- venc_enabledigitaloutput(sd, 0);
-
- venc_write(sd, VENC_OSDCLK0, 0);
- venc_write(sd, VENC_OSDCLK1, 1);
-
- venc_write(sd, VENC_VMOD, 0);
- /* DM365 component HD mode */
- venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
- VENC_VMOD_VIE);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
- venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
- VENC_VMOD_TVTYP);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
- venc_write(sd, VENC_XHINTVL, 0);
- return 0;
-}
-
-/*
- * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
- */
-static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
-{
- struct venc_state *venc = to_state(sd);
- struct venc_platform_data *pdata = venc->pdata;
-
- if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 74250000) < 0)
- return -EINVAL;
-
- venc_enabledigitaloutput(sd, 0);
-
- venc_write(sd, VENC_OSDCLK0, 0);
- venc_write(sd, VENC_OSDCLK1, 1);
-
-
- venc_write(sd, VENC_VMOD, 0);
- /* DM365 component HD mode */
- venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
- VENC_VMOD_VIE);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
- venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
- VENC_VMOD_TVTYP);
- venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
- venc_write(sd, VENC_XHINTVL, 0);
- return 0;
-}
-
-static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
-{
- v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
-
- if (norm & V4L2_STD_525_60)
- return venc_set_ntsc(sd);
- else if (norm & V4L2_STD_625_50)
- return venc_set_pal(sd);
-
- return -EINVAL;
-}
-
-static int venc_s_dv_timings(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *dv_timings)
-{
- struct venc_state *venc = to_state(sd);
- u32 height = dv_timings->bt.height;
- int ret;
-
- v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
-
- if (height == 576)
- return venc_set_576p50(sd);
- else if (height == 480)
- return venc_set_480p59_94(sd);
- else if ((height == 720) &&
- (venc->venc_type == VPBE_VERSION_2)) {
- /* TBD setup internal 720p mode here */
- ret = venc_set_720p60_internal(sd);
- /* for DM365 VPBE, there is DAC inside */
- vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
- return ret;
- } else if ((height == 1080) &&
- (venc->venc_type == VPBE_VERSION_2)) {
- /* TBD setup internal 1080i mode here */
- ret = venc_set_1080i30_internal(sd);
- /* for DM365 VPBE, there is DAC inside */
- vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
- return ret;
- }
- return -EINVAL;
-}
-
-static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
- u32 config)
-{
- struct venc_state *venc = to_state(sd);
- int ret;
-
- v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
-
- ret = venc_set_dac(sd, output);
- if (!ret)
- venc->output = output;
-
- return ret;
-}
-
-static long venc_ioctl(struct v4l2_subdev *sd,
- unsigned int cmd,
- void *arg)
-{
- u32 val;
-
- switch (cmd) {
- case VENC_GET_FLD:
- val = venc_read(sd, VENC_VSTAT);
- *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
- VENC_VSTAT_FIDST);
- break;
- default:
- v4l2_err(sd, "Wrong IOCTL cmd\n");
- break;
- }
-
- return 0;
-}
-
-static const struct v4l2_subdev_core_ops venc_core_ops = {
- .ioctl = venc_ioctl,
-};
-
-static const struct v4l2_subdev_video_ops venc_video_ops = {
- .s_routing = venc_s_routing,
- .s_std_output = venc_s_std_output,
- .s_dv_timings = venc_s_dv_timings,
-};
-
-static const struct v4l2_subdev_ops venc_ops = {
- .core = &venc_core_ops,
- .video = &venc_video_ops,
-};
-
-static int venc_initialize(struct v4l2_subdev *sd)
-{
- struct venc_state *venc = to_state(sd);
- int ret;
-
- /* Set default to output to composite and std to NTSC */
- venc->output = 0;
- venc->std = V4L2_STD_525_60;
-
- ret = venc_s_routing(sd, 0, venc->output, 0);
- if (ret < 0) {
- v4l2_err(sd, "Error setting output during init\n");
- return -EINVAL;
- }
-
- ret = venc_s_std_output(sd, venc->std);
- if (ret < 0) {
- v4l2_err(sd, "Error setting std during init\n");
- return -EINVAL;
- }
-
- return ret;
-}
-
-static int venc_device_get(struct device *dev, void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct venc_state **venc = data;
-
- if (strstr(pdev->name, "vpbe-venc") != NULL)
- *venc = platform_get_drvdata(pdev);
-
- return 0;
-}
-
-struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
- const char *venc_name)
-{
- struct venc_state *venc;
- int err;
-
- err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
- venc_device_get);
- if (venc == NULL)
- return NULL;
-
- v4l2_subdev_init(&venc->sd, &venc_ops);
-
- strcpy(venc->sd.name, venc_name);
- if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
- v4l2_err(v4l2_dev,
- "vpbe unable to register venc sub device\n");
- return NULL;
- }
- if (venc_initialize(&venc->sd)) {
- v4l2_err(v4l2_dev,
- "vpbe venc initialization failed\n");
- return NULL;
- }
-
- return &venc->sd;
-}
-EXPORT_SYMBOL(venc_sub_dev_init);
-
-static int venc_probe(struct platform_device *pdev)
-{
- const struct platform_device_id *pdev_id;
- struct venc_state *venc;
- struct resource *res;
- int ret;
-
- venc = kzalloc(sizeof(struct venc_state), GFP_KERNEL);
- if (venc == NULL)
- return -ENOMEM;
-
- pdev_id = platform_get_device_id(pdev);
- if (!pdev_id) {
- ret = -EINVAL;
- goto free_mem;
- }
- venc->venc_type = pdev_id->driver_data;
- venc->pdev = &pdev->dev;
- venc->pdata = pdev->dev.platform_data;
- if (NULL == venc->pdata) {
- dev_err(venc->pdev, "Unable to get platform data for"
- " VENC sub device");
- ret = -ENOENT;
- goto free_mem;
- }
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(venc->pdev,
- "Unable to get VENC register address map\n");
- ret = -ENODEV;
- goto free_mem;
- }
-
- if (!request_mem_region(res->start, resource_size(res), "venc")) {
- dev_err(venc->pdev, "Unable to reserve VENC MMIO region\n");
- ret = -ENODEV;
- goto free_mem;
- }
-
- venc->venc_base = ioremap_nocache(res->start, resource_size(res));
- if (!venc->venc_base) {
- dev_err(venc->pdev, "Unable to map VENC IO space\n");
- ret = -ENODEV;
- goto release_venc_mem_region;
- }
-
- if (venc->venc_type != VPBE_VERSION_1) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!res) {
- dev_err(venc->pdev,
- "Unable to get VDAC_CONFIG address map\n");
- ret = -ENODEV;
- goto unmap_venc_io;
- }
-
- if (!request_mem_region(res->start,
- resource_size(res), "venc")) {
- dev_err(venc->pdev,
- "Unable to reserve VDAC_CONFIG MMIO region\n");
- ret = -ENODEV;
- goto unmap_venc_io;
- }
-
- venc->vdaccfg_reg = ioremap_nocache(res->start,
- resource_size(res));
- if (!venc->vdaccfg_reg) {
- dev_err(venc->pdev,
- "Unable to map VDAC_CONFIG IO space\n");
- ret = -ENODEV;
- goto release_vdaccfg_mem_region;
- }
- }
- spin_lock_init(&venc->lock);
- platform_set_drvdata(pdev, venc);
- dev_notice(venc->pdev, "VENC sub device probe success\n");
- return 0;
-
-release_vdaccfg_mem_region:
- release_mem_region(res->start, resource_size(res));
-unmap_venc_io:
- iounmap(venc->venc_base);
-release_venc_mem_region:
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- release_mem_region(res->start, resource_size(res));
-free_mem:
- kfree(venc);
- return ret;
-}
-
-static int venc_remove(struct platform_device *pdev)
-{
- struct venc_state *venc = platform_get_drvdata(pdev);
- struct resource *res;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- iounmap((void *)venc->venc_base);
- release_mem_region(res->start, resource_size(res));
- if (venc->venc_type != VPBE_VERSION_1) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- iounmap((void *)venc->vdaccfg_reg);
- release_mem_region(res->start, resource_size(res));
- }
- kfree(venc);
-
- return 0;
-}
-
-static struct platform_driver venc_driver = {
- .probe = venc_probe,
- .remove = venc_remove,
- .driver = {
- .name = MODULE_NAME,
- .owner = THIS_MODULE,
- },
- .id_table = vpbe_venc_devtype
-};
-
-module_platform_driver(venc_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("VPBE VENC Driver");
-MODULE_AUTHOR("Texas Instruments");
diff --git a/drivers/media/platform/davinci/vpbe_venc_regs.h b/drivers/media/platform/davinci/vpbe_venc_regs.h
deleted file mode 100644
index 947cb151..00000000
--- a/drivers/media/platform/davinci/vpbe_venc_regs.h
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (C) 2006-2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2..
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _VPBE_VENC_REGS_H
-#define _VPBE_VENC_REGS_H
-
-/* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */
-#define VENC_VMOD 0x00
-#define VENC_VIDCTL 0x04
-#define VENC_VDPRO 0x08
-#define VENC_SYNCCTL 0x0C
-#define VENC_HSPLS 0x10
-#define VENC_VSPLS 0x14
-#define VENC_HINT 0x18
-#define VENC_HSTART 0x1C
-#define VENC_HVALID 0x20
-#define VENC_VINT 0x24
-#define VENC_VSTART 0x28
-#define VENC_VVALID 0x2C
-#define VENC_HSDLY 0x30
-#define VENC_VSDLY 0x34
-#define VENC_YCCCTL 0x38
-#define VENC_RGBCTL 0x3C
-#define VENC_RGBCLP 0x40
-#define VENC_LINECTL 0x44
-#define VENC_CULLLINE 0x48
-#define VENC_LCDOUT 0x4C
-#define VENC_BRTS 0x50
-#define VENC_BRTW 0x54
-#define VENC_ACCTL 0x58
-#define VENC_PWMP 0x5C
-#define VENC_PWMW 0x60
-#define VENC_DCLKCTL 0x64
-#define VENC_DCLKPTN0 0x68
-#define VENC_DCLKPTN1 0x6C
-#define VENC_DCLKPTN2 0x70
-#define VENC_DCLKPTN3 0x74
-#define VENC_DCLKPTN0A 0x78
-#define VENC_DCLKPTN1A 0x7C
-#define VENC_DCLKPTN2A 0x80
-#define VENC_DCLKPTN3A 0x84
-#define VENC_DCLKHS 0x88
-#define VENC_DCLKHSA 0x8C
-#define VENC_DCLKHR 0x90
-#define VENC_DCLKVS 0x94
-#define VENC_DCLKVR 0x98
-#define VENC_CAPCTL 0x9C
-#define VENC_CAPDO 0xA0
-#define VENC_CAPDE 0xA4
-#define VENC_ATR0 0xA8
-#define VENC_ATR1 0xAC
-#define VENC_ATR2 0xB0
-#define VENC_VSTAT 0xB8
-#define VENC_RAMADR 0xBC
-#define VENC_RAMPORT 0xC0
-#define VENC_DACTST 0xC4
-#define VENC_YCOLVL 0xC8
-#define VENC_SCPROG 0xCC
-#define VENC_CVBS 0xDC
-#define VENC_CMPNT 0xE0
-#define VENC_ETMG0 0xE4
-#define VENC_ETMG1 0xE8
-#define VENC_ETMG2 0xEC
-#define VENC_ETMG3 0xF0
-#define VENC_DACSEL 0xF4
-#define VENC_ARGBX0 0x100
-#define VENC_ARGBX1 0x104
-#define VENC_ARGBX2 0x108
-#define VENC_ARGBX3 0x10C
-#define VENC_ARGBX4 0x110
-#define VENC_DRGBX0 0x114
-#define VENC_DRGBX1 0x118
-#define VENC_DRGBX2 0x11C
-#define VENC_DRGBX3 0x120
-#define VENC_DRGBX4 0x124
-#define VENC_VSTARTA 0x128
-#define VENC_OSDCLK0 0x12C
-#define VENC_OSDCLK1 0x130
-#define VENC_HVLDCL0 0x134
-#define VENC_HVLDCL1 0x138
-#define VENC_OSDHADV 0x13C
-#define VENC_CLKCTL 0x140
-#define VENC_GAMCTL 0x144
-#define VENC_XHINTVL 0x174
-
-/* bit definitions */
-#define VPBE_PCR_VENC_DIV (1 << 1)
-#define VPBE_PCR_CLK_OFF (1 << 0)
-
-#define VENC_VMOD_VDMD_SHIFT 12
-#define VENC_VMOD_VDMD_YCBCR16 0
-#define VENC_VMOD_VDMD_YCBCR8 1
-#define VENC_VMOD_VDMD_RGB666 2
-#define VENC_VMOD_VDMD_RGB8 3
-#define VENC_VMOD_VDMD_EPSON 4
-#define VENC_VMOD_VDMD_CASIO 5
-#define VENC_VMOD_VDMD_UDISPQVGA 6
-#define VENC_VMOD_VDMD_STNLCD 7
-#define VENC_VMOD_VIE_SHIFT 1
-#define VENC_VMOD_VDMD (7 << 12)
-#define VENC_VMOD_ITLCL (1 << 11)
-#define VENC_VMOD_ITLC (1 << 10)
-#define VENC_VMOD_NSIT (1 << 9)
-#define VENC_VMOD_HDMD (1 << 8)
-#define VENC_VMOD_TVTYP_SHIFT 6
-#define VENC_VMOD_TVTYP (3 << 6)
-#define VENC_VMOD_SLAVE (1 << 5)
-#define VENC_VMOD_VMD (1 << 4)
-#define VENC_VMOD_BLNK (1 << 3)
-#define VENC_VMOD_VIE (1 << 1)
-#define VENC_VMOD_VENC (1 << 0)
-
-/* VMOD TVTYP options for HDMD=0 */
-#define SDTV_NTSC 0
-#define SDTV_PAL 1
-/* VMOD TVTYP options for HDMD=1 */
-#define HDTV_525P 0
-#define HDTV_625P 1
-#define HDTV_1080I 2
-#define HDTV_720P 3
-
-#define VENC_VIDCTL_VCLKP (1 << 14)
-#define VENC_VIDCTL_VCLKE_SHIFT 13
-#define VENC_VIDCTL_VCLKE (1 << 13)
-#define VENC_VIDCTL_VCLKZ_SHIFT 12
-#define VENC_VIDCTL_VCLKZ (1 << 12)
-#define VENC_VIDCTL_SYDIR_SHIFT 8
-#define VENC_VIDCTL_SYDIR (1 << 8)
-#define VENC_VIDCTL_DOMD_SHIFT 4
-#define VENC_VIDCTL_DOMD (3 << 4)
-#define VENC_VIDCTL_YCDIR_SHIFT 0
-#define VENC_VIDCTL_YCDIR (1 << 0)
-
-#define VENC_VDPRO_ATYCC_SHIFT 5
-#define VENC_VDPRO_ATYCC (1 << 5)
-#define VENC_VDPRO_ATCOM_SHIFT 4
-#define VENC_VDPRO_ATCOM (1 << 4)
-#define VENC_VDPRO_DAFRQ (1 << 3)
-#define VENC_VDPRO_DAUPS (1 << 2)
-#define VENC_VDPRO_CUPS (1 << 1)
-#define VENC_VDPRO_YUPS (1 << 0)
-
-#define VENC_SYNCCTL_VPL_SHIFT 3
-#define VENC_SYNCCTL_VPL (1 << 3)
-#define VENC_SYNCCTL_HPL_SHIFT 2
-#define VENC_SYNCCTL_HPL (1 << 2)
-#define VENC_SYNCCTL_SYEV_SHIFT 1
-#define VENC_SYNCCTL_SYEV (1 << 1)
-#define VENC_SYNCCTL_SYEH_SHIFT 0
-#define VENC_SYNCCTL_SYEH (1 << 0)
-#define VENC_SYNCCTL_OVD_SHIFT 14
-#define VENC_SYNCCTL_OVD (1 << 14)
-
-#define VENC_DCLKCTL_DCKEC_SHIFT 11
-#define VENC_DCLKCTL_DCKEC (1 << 11)
-#define VENC_DCLKCTL_DCKPW_SHIFT 0
-#define VENC_DCLKCTL_DCKPW (0x3f << 0)
-
-#define VENC_VSTAT_FIDST (1 << 4)
-
-#define VENC_CMPNT_MRGB_SHIFT 14
-#define VENC_CMPNT_MRGB (1 << 14)
-
-#endif /* _VPBE_VENC_REGS_H */
diff --git a/drivers/media/platform/davinci/vpfe_capture.c b/drivers/media/platform/davinci/vpfe_capture.c
index 28d019da..cb4e54f6 100644
--- a/drivers/media/platform/davinci/vpfe_capture.c
+++ b/drivers/media/platform/davinci/vpfe_capture.c
@@ -19,7 +19,7 @@
* VPFE Capture driver allows applications to capture and stream video
* frames on DaVinci SoCs (DM6446, DM355 etc) from a YUV source such as
* TVP5146 or Raw Bayer RGB image data from an image sensor
- * such as Microns' MT9T001, MT9T031 etc.
+ * such as Microns' MT9T001, mt9p031 etc.
*
* These SoCs have, in common, a Video Processing Subsystem (VPSS) that
* consists of a Video Processing Front End (VPFE) for capturing
@@ -59,39 +59,77 @@
* TODO list
* - Support multiple REQBUF after open
* - Support for de-allocating buffers through REQBUF
- * - Support for Raw Bayer RGB capture
* - Support for chaining Image Processor
* - Support for static allocation of buffers
- * - Support for USERPTR IO
* - Support for STREAMON before QBUF
* - Support for control ioctls
*/
#include <linux/module.h>
-#include <linux/slab.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
-#include <media/v4l2-common.h>
+#include <linux/version.h>
#include <linux/io.h>
+#include <linux/slab.h>
+
+#include <media/v4l2-common.h>
+#include <media/davinci/videohd.h>
#include <media/davinci/vpfe_capture.h>
+#include <media/davinci/imp_hw_if.h>
+
+#include <mach/cputype.h>
+
#include "ccdc_hw_device.h"
-static int debug;
+#define HD_IMAGE_SIZE (2176 * 2176 * 2)
+#define PAL_IMAGE_SIZE (720 * 576 * 2)
+#define SECOND_IMAGE_SIZE_MAX (640 * 480 * 2)
+
+static int debug = 1;
+#ifdef CONFIG_VIDEO_YCBCR
+static u32 numbuffers = 4;
+#else
static u32 numbuffers = 3;
-static u32 bufsize = (720 * 576 * 2);
+#endif
+static u32 bufsize = HD_IMAGE_SIZE + SECOND_IMAGE_SIZE_MAX;
+static int interface;
+static u32 cont_bufoffset = 0;
+static u32 cont_bufsize = 0;
+module_param(interface, bool, S_IRUGO);
module_param(numbuffers, uint, S_IRUGO);
module_param(bufsize, uint, S_IRUGO);
-module_param(debug, int, 0644);
-
+module_param(debug, bool, 0644);
+module_param(cont_bufoffset, uint, S_IRUGO);
+module_param(cont_bufsize, uint, S_IRUGO);
+
+/**
+ * VPFE capture can be used for capturing video such as from TVP5146 or TVP7002
+ * and for capture raw bayer data from camera sensors such as mt9p031. At this
+ * point there is problem in co-existence of mt9p031 and tvp5146 due to i2c
+ * address collision. So set the variable below from bootargs to do either video
+ * capture or camera capture.
+ * interface = 0 - video capture (from TVP514x or such),
+ * interface = 1 - Camera capture (from mt9p031 or such)
+ * Re-visit this when we fix the co-existence issue
+ */
+MODULE_PARM_DESC(interface, "interface 0-1 (default:0)");
MODULE_PARM_DESC(numbuffers, "buffer count (default:3)");
-MODULE_PARM_DESC(bufsize, "buffer size in bytes (default:720 x 576 x 2)");
+MODULE_PARM_DESC(bufsize, "buffer size in bytes, (default:4147200 bytes)");
MODULE_PARM_DESC(debug, "Debug level 0-1");
+MODULE_PARM_DESC(cont_bufoffset, "Capture buffer offset (default 0)");
+MODULE_PARM_DESC(cont_bufsize, "Capture buffer size (default 0)");
MODULE_DESCRIPTION("VPFE Video for Linux Capture Driver");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Texas Instruments");
+//TODO !!!
+#ifdef CONFIG_VIDEO_YCBCR
+static size_t ipipif_dma_size = 0;
+static dma_addr_t ipipif_dma_addr_phys = 0;
+static void * ipipif_dma_addr_cpu = NULL;
+#endif
/* standard information */
struct vpfe_standard {
v4l2_std_id std_id;
@@ -100,6 +138,7 @@ struct vpfe_standard {
struct v4l2_fract pixelaspect;
/* 0 - progressive, 1 - interlaced */
int frame_format;
+ struct v4l2_fract fps;
};
/* ccdc configuration */
@@ -112,10 +151,16 @@ struct ccdc_config {
/* data structures */
static struct vpfe_config_params config_params = {
+#ifdef CONFIG_VIDEO_YCBCR
+ .min_numbuffers = 4,
+ .numbuffers = 4,
+#else
.min_numbuffers = 3,
.numbuffers = 3,
- .min_bufsize = 720 * 480 * 2,
- .device_bufsize = 720 * 576 * 2,
+#endif
+ .min_bufsize = 1280 * 720 * 2,
+ /* DM365 IPIPE supports up to 2176 pixels, otherwise you need to use raw */
+ .device_bufsize = 2176 * 2176 * 2,
};
/* ccdc device registered */
@@ -125,9 +170,23 @@ static DEFINE_MUTEX(ccdc_lock);
/* ccdc configuration */
static struct ccdc_config *ccdc_cfg;
+/* hardware interface for image processing pipeline */
+static struct imp_hw_interface *imp_hw_if;
+
const struct vpfe_standard vpfe_standards[] = {
- {V4L2_STD_525_60, 720, 480, {11, 10}, 1},
- {V4L2_STD_625_50, 720, 576, {54, 59}, 1},
+ {V4L2_STD_525_60, 720, 480, {11, 10}, 1, {1001, 30000} },
+ {V4L2_STD_625_50, 720, 576, {54, 59}, 1, {1, 25} },
+ {V4L2_STD_525P_60, 720, 480, {11, 10}, 0, {1001, 30000} },
+ {V4L2_STD_625P_50, 720, 576, {54, 59}, 0, {1, 25} },
+ {V4L2_STD_720P_30, 1280, 720, {1, 1}, 0, {1, 30} },
+ {V4L2_STD_720P_50, 1280, 720, {1, 1}, 0, {1, 50} },
+ {V4L2_STD_720P_60, 1280, 720, {1, 1}, 0, {1, 60} },
+ {V4L2_STD_1080I_30, 1920, 1080, {1, 1}, 1, {1, 30} },
+ {V4L2_STD_1080I_50, 1920, 1080, {1, 1}, 1, {1, 50} },
+ {V4L2_STD_1080I_60, 1920, 1080, {1, 1}, 1, {1, 60} },
+ {V4L2_STD_1080P_30, 1920, 1080, {1, 1}, 0, {1, 30} },
+ {V4L2_STD_1080P_50, 1920, 1080, {1, 1}, 0, {1, 50} },
+ {V4L2_STD_1080P_60, 1920, 1080, {1, 1}, 0, {1, 60} },
};
/* Used when raw Bayer image from ccdc is directly captured to SDRAM */
@@ -140,6 +199,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_SBGGR8,
},
.bpp = 1,
+ .subdev_pix_fmt = V4L2_PIX_FMT_SGRBG10,
},
{
.fmtdesc = {
@@ -149,6 +209,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_SBGGR16,
},
.bpp = 2,
+ .subdev_pix_fmt = V4L2_PIX_FMT_SGRBG10,
},
{
.fmtdesc = {
@@ -158,6 +219,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_SGRBG10DPCM8,
},
.bpp = 1,
+ .subdev_pix_fmt = V4L2_PIX_FMT_SGRBG10,
},
{
.fmtdesc = {
@@ -167,6 +229,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_UYVY,
},
.bpp = 2,
+ .subdev_pix_fmt = V4L2_PIX_FMT_UYVY,
},
{
.fmtdesc = {
@@ -176,6 +239,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_YUYV,
},
.bpp = 2,
+ .subdev_pix_fmt = V4L2_PIX_FMT_UYVY,
},
{
.fmtdesc = {
@@ -185,12 +249,15 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_NV12,
},
.bpp = 1,
+ .subdev_pix_fmt = V4L2_PIX_FMT_UYVY,
},
};
-/*
- * vpfe_lookup_pix_format()
- * lookup an entry in the vpfe pix format table based on pix_format
+/**
+ * vpfe_lookup_pix_format() - lookup an entry in the vpfe pix format table
+ * @pix_format: v4l pix format
+ * This function lookup an entry in the vpfe pix format table based on
+ * pix_format
*/
static const struct vpfe_pixel_format *vpfe_lookup_pix_format(u32 pix_format)
{
@@ -223,6 +290,7 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
BUG_ON(!dev->hw_ops.get_frame_format);
BUG_ON(!dev->hw_ops.get_pixel_format);
BUG_ON(!dev->hw_ops.set_pixel_format);
+ BUG_ON(!dev->hw_ops.set_params);
BUG_ON(!dev->hw_ops.set_image_window);
BUG_ON(!dev->hw_ops.get_image_window);
BUG_ON(!dev->hw_ops.get_line_length);
@@ -285,6 +353,49 @@ void vpfe_unregister_ccdc_device(struct ccdc_hw_device *dev)
}
EXPORT_SYMBOL(vpfe_unregister_ccdc_device);
+/*
+ * vpfe_get_camera_frame_params()
+ * Get the image parameters such as max height and width, frame format
+ * etc and update the stdinfo accordingly. This is a work around to get
+ * the maximum width, height and frame format since camera driver doesn't
+ * support s_std.
+ */
+static int vpfe_get_camera_frame_params(struct vpfe_device *vpfe_dev)
+{
+ struct vpfe_subdev_info *sdinfo = vpfe_dev->current_subdev;
+ struct v4l2_format sd_fmt;
+ int ret;
+
+ /* TODO: Currently there is no support for setting timings
+ * in sensor similar to S_STD. So get the limits of width and height
+ * using try format. In future we should be able to set
+ * timings for a specific resolution and fps. In that case
+ * we know the limits for the specific timing and this code
+ * would require change.
+ */
+ memset(&sd_fmt, 0, sizeof(sd_fmt));
+#ifdef CONFIG_VIDEO_YCBCR
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, g_fmt, &sd_fmt);
+#else
+ sd_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ /* hard code it to match that of mt9p031 sensor */
+ sd_fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_SGRBG10;
+ /* use a value big enough */
+ sd_fmt.fmt.pix.width = 1 << 31;
+ sd_fmt.fmt.pix.height = 1 << 31;
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, try_fmt, &sd_fmt);
+#endif
+ if (!ret) {
+ vpfe_dev->std_info.active_pixels = sd_fmt.fmt.pix.width;
+ vpfe_dev->std_info.active_lines = sd_fmt.fmt.pix.height;
+ /* hard code the frame format to be progressive always. */
+ vpfe_dev->std_info.frame_format = 0;
+ }
+ return ret;
+}
+
/*
* vpfe_get_ccdc_image_format - Get image parameters based on CCDC settings
*/
@@ -295,9 +406,17 @@ static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe_dev,
enum ccdc_buftype buf_type;
enum ccdc_frmfmt frm_fmt;
+ vpfe_dev->crop.top = 0;
+ vpfe_dev->crop.left = 0;
memset(f, 0, sizeof(*f));
+#ifdef CONFIG_VIDEO_YCBCR
+ f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+#else
f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
+#endif
ccdc_dev->hw_ops.get_image_window(&image_win);
+ vpfe_dev->crop.width = image_win.width;
+ vpfe_dev->crop.height = image_win.height;
f->fmt.pix.width = image_win.width;
f->fmt.pix.height = image_win.height;
f->fmt.pix.bytesperline = ccdc_dev->hw_ops.get_line_length();
@@ -331,10 +450,34 @@ static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe_dev,
static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe_dev)
{
enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED;
+ u32 pix_fmt;
int ret = 0;
- if (ccdc_dev->hw_ops.set_pixel_format(
- vpfe_dev->fmt.fmt.pix.pixelformat) < 0) {
+ pix_fmt = vpfe_dev->fmt.fmt.pix.pixelformat;
+
+ /* At CCDC we need to set pix format based on source. */
+ if (vpfe_dev->imp_chained) {
+ if (vpfe_dev->current_subdev->is_camera){
+#ifdef CONFIG_VIDEO_YCBCR
+ if(vpfe_dev->current_subdev->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ pix_fmt = V4L2_PIX_FMT_YUYV;
+ }
+ //TODO
+ else
+ {
+ pix_fmt = V4L2_PIX_FMT_SBGGR16;
+ }
+#else
+ pix_fmt = V4L2_PIX_FMT_SBGGR16;
+#endif
+ }
+ else if (pix_fmt == V4L2_PIX_FMT_NV12){
+ pix_fmt = V4L2_PIX_FMT_UYVY;
+ }
+ }
+
+ if (ccdc_dev->hw_ops.set_pixel_format(pix_fmt) < 0) {
v4l2_err(&vpfe_dev->v4l2_dev,
"couldn't set pix format in ccdc\n");
return -EINVAL;
@@ -370,19 +513,19 @@ static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe_dev)
* For a given standard, this functions sets up the default
* pix format & crop values in the vpfe device and ccdc. It first
* starts with defaults based values from the standard table.
- * It then checks if sub device support g_mbus_fmt and then override the
+ * It then checks if sub device support g_fmt and then override the
* values based on that.Sets crop values to match with scan resolution
* starting at 0,0. It calls vpfe_config_ccdc_image_format() set the
- * values in ccdc
+ * values in ccdc. Not called when sensor is the input source
*/
static int vpfe_config_image_format(struct vpfe_device *vpfe_dev,
const v4l2_std_id *std_id)
{
struct vpfe_subdev_info *sdinfo = vpfe_dev->current_subdev;
- struct v4l2_mbus_framefmt mbus_fmt;
- struct v4l2_pix_format *pix = &vpfe_dev->fmt.fmt.pix;
+ struct v4l2_format sd_fmt;
int i, ret = 0;
+ /* configure the ccdc based on standard */
for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) {
if (vpfe_standards[i].std_id & *std_id) {
vpfe_dev->std_info.active_pixels =
@@ -391,6 +534,7 @@ static int vpfe_config_image_format(struct vpfe_device *vpfe_dev,
vpfe_standards[i].height;
vpfe_dev->std_info.frame_format =
vpfe_standards[i].frame_format;
+ vpfe_dev->std_info.fps = vpfe_standards[i].fps;
vpfe_dev->std_index = i;
break;
}
@@ -405,37 +549,30 @@ static int vpfe_config_image_format(struct vpfe_device *vpfe_dev,
vpfe_dev->crop.left = 0;
vpfe_dev->crop.width = vpfe_dev->std_info.active_pixels;
vpfe_dev->crop.height = vpfe_dev->std_info.active_lines;
- pix->width = vpfe_dev->crop.width;
- pix->height = vpfe_dev->crop.height;
+ vpfe_dev->fmt.fmt.pix.width = vpfe_dev->crop.width;
+ vpfe_dev->fmt.fmt.pix.height = vpfe_dev->crop.height;
/* first field and frame format based on standard frame format */
if (vpfe_dev->std_info.frame_format) {
- pix->field = V4L2_FIELD_INTERLACED;
+ vpfe_dev->fmt.fmt.pix.field = V4L2_FIELD_INTERLACED;
/* assume V4L2_PIX_FMT_UYVY as default */
- pix->pixelformat = V4L2_PIX_FMT_UYVY;
- v4l2_fill_mbus_format(&mbus_fmt, pix,
- V4L2_MBUS_FMT_YUYV10_2X10);
+ vpfe_dev->fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
} else {
- pix->field = V4L2_FIELD_NONE;
- /* assume V4L2_PIX_FMT_SBGGR8 */
- pix->pixelformat = V4L2_PIX_FMT_SBGGR8;
- v4l2_fill_mbus_format(&mbus_fmt, pix,
- V4L2_MBUS_FMT_SBGGR8_1X8);
+ vpfe_dev->fmt.fmt.pix.field = V4L2_FIELD_NONE;
+ vpfe_dev->fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
}
- /* if sub device supports g_mbus_fmt, override the defaults */
+ sd_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ /* if sub device supports g_fmt, override the defaults */
ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
- sdinfo->grp_id, video, g_mbus_fmt, &mbus_fmt);
+ sdinfo->grp_id, video, g_fmt, &sd_fmt);
if (ret && ret != -ENOIOCTLCMD) {
v4l2_err(&vpfe_dev->v4l2_dev,
- "error in getting g_mbus_fmt from sub device\n");
+ "error in getting g_fmt from sub device\n");
return ret;
}
- v4l2_fill_pix_format(pix, &mbus_fmt);
- pix->bytesperline = pix->width * 2;
- pix->sizeimage = pix->bytesperline * pix->height;
-
+ vpfe_dev->fmt = sd_fmt;
/* Sets the values in CCDC */
ret = vpfe_config_ccdc_image_format(vpfe_dev);
if (ret)
@@ -443,51 +580,166 @@ static int vpfe_config_image_format(struct vpfe_device *vpfe_dev,
/* Update the values of sizeimage and bytesperline */
if (!ret) {
- pix->bytesperline = ccdc_dev->hw_ops.get_line_length();
- pix->sizeimage = pix->bytesperline * pix->height;
+ vpfe_dev->fmt.fmt.pix.bytesperline =
+ ccdc_dev->hw_ops.get_line_length();
+ vpfe_dev->fmt.fmt.pix.sizeimage =
+ vpfe_dev->fmt.fmt.pix.bytesperline *
+ vpfe_dev->fmt.fmt.pix.height;
+ }
+ return ret;
+}
+
+/**
+ * vpfe_set_format_in_sensor() - Set frame format in the sensor
+ * @vpfe_dev - vpfe device object
+ *
+ * Set the given frame format in the sensor. Assume the sensor
+ * supports V4L2_PIX_FMT_SGRBG10
+ */
+static int vpfe_set_format_in_sensor(struct vpfe_device *vpfe_dev,
+ struct v4l2_format *fmt)
+{
+ struct vpfe_subdev_info *sdinfo = vpfe_dev->current_subdev;
+ struct v4l2_format sd_fmt;
+ int ret;
+
+ memset(&sd_fmt, 0, sizeof(sd_fmt));
+#ifdef CONFIV_VIDEO_YCBCR
+ if(vpfe_dev->current_subdev->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ sd_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ sd_fmt.fmt.pix.colorspace = V4L2_COLORSPACE_JPEG;
+ sd_fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV;
+ sd_fmt.fmt.pix.width = fmt->fmt.pix.width;
+ sd_fmt.fmt.pix.height = fmt->fmt.pix.height;
}
+ //TODO
+ else
+ {
+ sd_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ sd_fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_SGRBG10;
+ sd_fmt.fmt.pix.width = fmt->fmt.pix.width;
+ sd_fmt.fmt.pix.height = fmt->fmt.pix.height;
+ }
+#else
+ sd_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ sd_fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_SGRBG10;
+ sd_fmt.fmt.pix.width = fmt->fmt.pix.width;
+ sd_fmt.fmt.pix.height = fmt->fmt.pix.height;
+#endif
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, s_fmt, &sd_fmt);
return ret;
}
static int vpfe_initialize_device(struct vpfe_device *vpfe_dev)
{
+ struct vpfe_subdev_info *sdinfo;
int ret = 0;
+ sdinfo = vpfe_dev->current_subdev;
/* set first input of current subdevice as the current input */
vpfe_dev->current_input = 0;
+ /*
+ * set default standard. For camera device, we cannot set standard.
+ * So we set it to -1. Otherwise, first entry in the standard is the
+ * is the default
+ */
+ if (vpfe_dev->current_subdev->is_camera) {
+ vpfe_dev->std_index = -1;
+ /* Set the bus/interface parameter for the sub device in ccdc */
+ ret = ccdc_dev->hw_ops.set_hw_if_params(&sdinfo->ccdc_if_params);
+ if (ret)
+ goto unlock_out;
+ /*
+ * Configure the vpfe default format information based on ccdc
+ * defaults
+ */
+ ret = vpfe_get_ccdc_image_format(vpfe_dev, &vpfe_dev->fmt);
+ /* also set the current default format in the sensor */
+ if (ret)
+ goto out;
+
+ ret = vpfe_set_format_in_sensor(vpfe_dev, &vpfe_dev->fmt);
+ /* Get max width and height available for capture from camera */
+ if (ret)
+ goto out;
+
+ /**
+ * Get the frame information from camera sensor such as maximum
+ * width and height, frame format etc
+ */
+ ret = vpfe_get_camera_frame_params(vpfe_dev);
- /* set default standard */
- vpfe_dev->std_index = 0;
-
- /* Configure the default format information */
- ret = vpfe_config_image_format(vpfe_dev,
+ } else {
+ vpfe_dev->std_index = 0;
+ /* Configure the default format information */
+ ret = vpfe_config_image_format(vpfe_dev,
&vpfe_standards[vpfe_dev->std_index].std_id);
+ }
+
if (ret)
- return ret;
+ goto out;
/* now open the ccdc device to initialize it */
mutex_lock(&ccdc_lock);
if (NULL == ccdc_dev) {
v4l2_err(&vpfe_dev->v4l2_dev, "ccdc device not registered\n");
ret = -ENODEV;
- goto unlock;
+ goto unlock_out;
}
if (!try_module_get(ccdc_dev->owner)) {
v4l2_err(&vpfe_dev->v4l2_dev, "Couldn't lock ccdc module\n");
ret = -ENODEV;
- goto unlock;
+ goto unlock_out;
+ }
+
+ vpfe_dev->imp_chained = 0;
+ vpfe_dev->second_output = 0;
+ vpfe_dev->second_out_img_sz = 0;
+ vpfe_dev->rsz_present = 0;
+ vpfe_dev->out_from = VPFE_CCDC_OUT;
+ vpfe_dev->skip_frame_count = 1;
+ vpfe_dev->skip_frame_count_init = 1;
+
+ /* TODO - revisit for MC */
+ if (!(ISNULL(imp_hw_if)) &&
+ (imp_hw_if->get_preview_oper_mode() == IMP_MODE_CONTINUOUS)) {
+ if (imp_hw_if->get_previewer_config_state()
+ == STATE_CONFIGURED) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "IPIPE Chained\n");
+ v4l2_info(&vpfe_dev->v4l2_dev, "IPIPE Chained\n");
+#endif
+ vpfe_dev->imp_chained = 1;
+ vpfe_dev->out_from = VPFE_IMP_PREV_OUT;
+ if (imp_hw_if->get_resizer_config_state()
+ == STATE_CONFIGURED) {
+ v4l2_info(&vpfe_dev->v4l2_dev,
+ "Resizer present\n");
+ vpfe_dev->rsz_present = 1;
+ vpfe_dev->out_from = VPFE_IMP_RSZ_OUT;
+ if (imp_hw_if->get_output_state(1)) {
+ v4l2_info(&vpfe_dev->v4l2_dev,
+ "second output present\n");
+ vpfe_dev->second_output = 1;
+ vpfe_dev->second_out_img_sz =
+ imp_hw_if->
+ get_line_length(1) *
+ imp_hw_if->
+ get_image_height(1);
+ }
+ }
+ }
}
+
ret = ccdc_dev->hw_ops.open(vpfe_dev->pdev);
if (!ret)
vpfe_dev->initialized = 1;
-
- /* Clear all VPFE/CCDC interrupts */
- if (vpfe_dev->cfg->clr_intr)
- vpfe_dev->cfg->clr_intr(-1);
-
-unlock:
+unlock_out:
mutex_unlock(&ccdc_lock);
+out:
return ret;
}
@@ -500,8 +752,9 @@ static int vpfe_open(struct file *file)
struct vpfe_device *vpfe_dev = video_drvdata(file);
struct vpfe_fh *fh;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_open\n");
-
+#endif
if (!vpfe_dev->cfg->num_subdevs) {
v4l2_err(&vpfe_dev->v4l2_dev, "No decoder registered\n");
return -ENODEV;
@@ -545,8 +798,14 @@ static void vpfe_schedule_next_buffer(struct vpfe_device *vpfe_dev)
list_del(&vpfe_dev->next_frm->queue);
vpfe_dev->next_frm->state = VIDEOBUF_ACTIVE;
addr = videobuf_to_dma_contig(vpfe_dev->next_frm);
-
- ccdc_dev->hw_ops.setfbaddr(addr);
+ if (vpfe_dev->out_from == VPFE_CCDC_OUT)
+ ccdc_dev->hw_ops.setfbaddr(addr);
+ else {
+ imp_hw_if->update_outbuf1_address(NULL, addr);
+ if (vpfe_dev->second_output)
+ imp_hw_if->update_outbuf2_address(NULL,
+ addr + vpfe_dev->second_off);
+ }
}
static void vpfe_schedule_bottom_field(struct vpfe_device *vpfe_dev)
@@ -560,13 +819,18 @@ static void vpfe_schedule_bottom_field(struct vpfe_device *vpfe_dev)
static void vpfe_process_buffer_complete(struct vpfe_device *vpfe_dev)
{
- v4l2_get_timestamp(&vpfe_dev->cur_frm->ts);
+ struct timeval timevalue;
+
+ do_gettimeofday(&timevalue);
+ vpfe_dev->cur_frm->ts = timevalue;
vpfe_dev->cur_frm->state = VIDEOBUF_DONE;
vpfe_dev->cur_frm->size = vpfe_dev->fmt.fmt.pix.sizeimage;
wake_up_interruptible(&vpfe_dev->cur_frm->done);
vpfe_dev->cur_frm = vpfe_dev->next_frm;
}
-
+#ifdef CONFIG_VIDEO_YCBCR
+extern void ipipeif_set_enable(char en, unsigned int mode);
+#endif
/* ISR for VINT0*/
static irqreturn_t vpfe_isr(int irq, void *dev_id)
{
@@ -574,24 +838,48 @@ static irqreturn_t vpfe_isr(int irq, void *dev_id)
enum v4l2_field field;
int fid;
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "\nStarting vpfe_isr...\n");
field = vpfe_dev->fmt.fmt.pix.field;
/* if streaming not started, don't do anything */
if (!vpfe_dev->started)
- goto clear_intr;
+ return IRQ_HANDLED;
/* only for 6446 this will be applicable */
if (NULL != ccdc_dev->hw_ops.reset)
ccdc_dev->hw_ops.reset();
if (field == V4L2_FIELD_NONE) {
- /* handle progressive frame capture */
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
- "frame format is progressive...\n");
- if (vpfe_dev->cur_frm != vpfe_dev->next_frm)
- vpfe_process_buffer_complete(vpfe_dev);
- goto clear_intr;
+ if (vpfe_dev->imp_chained) {
+ vpfe_dev->skip_frame_count--;
+ if (!vpfe_dev->skip_frame_count) {
+ vpfe_dev->skip_frame_count =
+ vpfe_dev->skip_frame_count_init;
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(vpfe_dev->current_subdev->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ ipipeif_set_enable(1,0);
+ }
+#endif
+ if (imp_hw_if->enable_resize)
+ imp_hw_if->enable_resize(1);
+ } else {
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(vpfe_dev->current_subdev->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ ipipeif_set_enable(0,0);
+ }
+#endif
+ if (imp_hw_if->enable_resize)
+ imp_hw_if->enable_resize(0);
+ }
+ } else {
+ if (vpfe_dev->cur_frm != vpfe_dev->next_frm)
+ vpfe_process_buffer_complete(vpfe_dev);
+
+ }
+ return IRQ_HANDLED;
}
/* interlaced or TB capture check which field we are in hardware */
@@ -599,8 +887,6 @@ static irqreturn_t vpfe_isr(int irq, void *dev_id)
/* switch the software maintained field id */
vpfe_dev->field_id ^= 1;
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "field id = %x:%x.\n",
- fid, vpfe_dev->field_id);
if (fid == vpfe_dev->field_id) {
/* we are in-sync here,continue */
if (fid == 0) {
@@ -615,10 +901,11 @@ static irqreturn_t vpfe_isr(int irq, void *dev_id)
* interleavely or separately in memory, reconfigure
* the CCDC memory address
*/
- if (field == V4L2_FIELD_SEQ_TB) {
+ if ((vpfe_dev->out_from == VPFE_CCDC_OUT) &&
+ (field == V4L2_FIELD_SEQ_TB))
vpfe_schedule_bottom_field(vpfe_dev);
- }
- goto clear_intr;
+
+ return IRQ_HANDLED;
}
/*
* if one field is just being captured configure
@@ -627,7 +914,8 @@ static irqreturn_t vpfe_isr(int irq, void *dev_id)
* current buffer
*/
spin_lock(&vpfe_dev->dma_queue_lock);
- if (!list_empty(&vpfe_dev->dma_queue) &&
+ if ((vpfe_dev->out_from == VPFE_CCDC_OUT) &&
+ !list_empty(&vpfe_dev->dma_queue) &&
vpfe_dev->cur_frm == vpfe_dev->next_frm)
vpfe_schedule_next_buffer(vpfe_dev);
spin_unlock(&vpfe_dev->dma_queue_lock);
@@ -638,26 +926,17 @@ static irqreturn_t vpfe_isr(int irq, void *dev_id)
*/
vpfe_dev->field_id = fid;
}
-clear_intr:
- if (vpfe_dev->cfg->clr_intr)
- vpfe_dev->cfg->clr_intr(irq);
-
return IRQ_HANDLED;
}
-/* vdint1_isr - isr handler for VINT1 interrupt */
-static irqreturn_t vdint1_isr(int irq, void *dev_id)
+/* vpfe_vdint1_isr - isr handler for VINT1 interrupt */
+static irqreturn_t vpfe_vdint1_isr(int irq, void *dev_id)
{
struct vpfe_device *vpfe_dev = dev_id;
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "\nInside vdint1_isr...\n");
-
/* if streaming not started, don't do anything */
- if (!vpfe_dev->started) {
- if (vpfe_dev->cfg->clr_intr)
- vpfe_dev->cfg->clr_intr(irq);
+ if (!vpfe_dev->started)
return IRQ_HANDLED;
- }
spin_lock(&vpfe_dev->dma_queue_lock);
if ((vpfe_dev->fmt.fmt.pix.field == V4L2_FIELD_NONE) &&
@@ -665,9 +944,64 @@ static irqreturn_t vdint1_isr(int irq, void *dev_id)
vpfe_dev->cur_frm == vpfe_dev->next_frm)
vpfe_schedule_next_buffer(vpfe_dev);
spin_unlock(&vpfe_dev->dma_queue_lock);
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t vpfe_imp_dma_isr(int irq, void *dev_id)
+{
+ struct vpfe_device *vpfe_dev = dev_id;
+ int fid;
+ enum v4l2_field field;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "\nvpfe_imp_dma_isr\n");
+#endif
+
+ /* if streaming not started, don't do anything */
+ if (!vpfe_dev->started)
+ return IRQ_HANDLED;
+
+ field = vpfe_dev->fmt.fmt.pix.field;
+
+ if (field == V4L2_FIELD_NONE) {
+ /* handle progressive frame capture */
+ if (vpfe_dev->cur_frm != vpfe_dev->next_frm)
+ vpfe_process_buffer_complete(vpfe_dev);
+ } else {
+ fid = ccdc_dev->hw_ops.getfid();
+
+ if (fid == vpfe_dev->field_id) {
+ /* we are in-sync here,continue */
+ if (fid == 1 && !list_empty(&vpfe_dev->dma_queue) &&
+ vpfe_dev->cur_frm == vpfe_dev->next_frm) {
+ spin_lock(&vpfe_dev->dma_queue_lock);
+ vpfe_schedule_next_buffer(vpfe_dev);
+ spin_unlock(&vpfe_dev->dma_queue_lock);
+ }
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t vpfe_imp_update_isr(int irq, void *dev_id)
+{
+ struct vpfe_device *vpfe_dev = dev_id;
- if (vpfe_dev->cfg->clr_intr)
- vpfe_dev->cfg->clr_intr(irq);
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "\nvpfe_imp_update_isr\n");
+#endif
+
+ /* if streaming not started, don't do anything */
+ if (!vpfe_dev->started)
+ return IRQ_HANDLED;
+
+ if (!list_empty(&vpfe_dev->dma_queue) &&
+ vpfe_dev->cur_frm == vpfe_dev->next_frm) {
+ spin_lock(&vpfe_dev->dma_queue_lock);
+ vpfe_schedule_next_buffer(vpfe_dev);
+ spin_unlock(&vpfe_dev->dma_queue_lock);
+ }
return IRQ_HANDLED;
}
@@ -676,31 +1010,93 @@ static void vpfe_detach_irq(struct vpfe_device *vpfe_dev)
{
enum ccdc_frmfmt frame_format;
- frame_format = ccdc_dev->hw_ops.get_frame_format();
- if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
- free_irq(vpfe_dev->ccdc_irq1, vpfe_dev);
+ free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
+ if (vpfe_dev->out_from == VPFE_CCDC_OUT) {
+ frame_format = ccdc_dev->hw_ops.get_frame_format();
+ if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
+ free_irq(vpfe_dev->ccdc_irq1, vpfe_dev);
+ } else {
+ free_irq(vpfe_dev->imp_dma_irq, vpfe_dev);
+ if (vpfe_dev->imp_update_irq)
+ free_irq(vpfe_dev->imp_update_irq,vpfe_dev);
+ }
}
static int vpfe_attach_irq(struct vpfe_device *vpfe_dev)
{
enum ccdc_frmfmt frame_format;
+ int ret;
+ enum v4l2_field field;
+
+ vpfe_dev->imp_update_irq = 0;
+
+ ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED,
+ "vpfe_capture0", vpfe_dev);
+ if (ret < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Error: requesting VINT0 interrupt\n");
+ return ret;
+ }
- frame_format = ccdc_dev->hw_ops.get_frame_format();
- if (frame_format == CCDC_FRMFMT_PROGRESSIVE) {
- return request_irq(vpfe_dev->ccdc_irq1, vdint1_isr,
- IRQF_DISABLED, "vpfe_capture1",
- vpfe_dev);
+ if (vpfe_dev->out_from == VPFE_CCDC_OUT) {
+ frame_format = ccdc_dev->hw_ops.get_frame_format();
+ if (frame_format == CCDC_FRMFMT_PROGRESSIVE) {
+ ret = request_irq(vpfe_dev->ccdc_irq1,
+ vpfe_vdint1_isr,
+ IRQF_DISABLED,
+ "vpfe_capture1", vpfe_dev);
+ if (ret < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Error: requesting VINT1 interrupt\n");
+ free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
+ }
+ }
+ } else {
+ /* output from Previewer/Resizer */
+ struct irq_numbers irq_info;
+ if (vpfe_dev->rsz_present)
+ imp_hw_if->get_rsz_irq(&irq_info);
+ else
+ imp_hw_if->get_preview_irq(&irq_info);
+
+ field = vpfe_dev->fmt.fmt.pix.field;
+
+ if (field == V4L2_FIELD_NONE) {
+ vpfe_dev->imp_update_irq = irq_info.update;
+ ret = request_irq(irq_info.update, vpfe_imp_update_isr, IRQF_DISABLED,
+ "Imp_Update_Irq", vpfe_dev);
+ if (ret < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Error: requesting VINT0 interrupt\n");
+ return ret;
+ }
+ }
+
+ vpfe_dev->imp_dma_irq = irq_info.sdram;
+ ret = request_irq(irq_info.sdram,
+ vpfe_imp_dma_isr,
+ IRQF_DISABLED,
+ "Imp_Sdram_Irq",
+ vpfe_dev);
+ if (ret < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Error: requesting IMP"
+ " IRQ interrupt\n");
+ free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
+ }
}
return 0;
}
-/* vpfe_stop_ccdc_capture: stop streaming in ccdc/isif */
-static void vpfe_stop_ccdc_capture(struct vpfe_device *vpfe_dev)
+/* vpfe_stop_capture: stop streaming in ccdc/isif */
+static void vpfe_stop_capture(struct vpfe_device *vpfe_dev)
{
vpfe_dev->started = 0;
ccdc_dev->hw_ops.enable(0);
if (ccdc_dev->hw_ops.enable_out_to_sdram)
ccdc_dev->hw_ops.enable_out_to_sdram(0);
+ if (vpfe_dev->imp_chained)
+ imp_hw_if->enable(0, NULL);
}
/*
@@ -714,7 +1110,9 @@ static int vpfe_release(struct file *file)
struct vpfe_subdev_info *sdinfo;
int ret;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_release\n");
+#endif
/* Get the device lock */
mutex_lock(&vpfe_dev->lock);
@@ -727,19 +1125,25 @@ static int vpfe_release(struct file *file)
video, s_stream, 0);
if (ret && (ret != -ENOIOCTLCMD))
v4l2_err(&vpfe_dev->v4l2_dev,
- "stream off failed in subdev\n");
- vpfe_stop_ccdc_capture(vpfe_dev);
+ "stream off failed in subdev\n");
+ vpfe_stop_capture(vpfe_dev);
vpfe_detach_irq(vpfe_dev);
videobuf_streamoff(&vpfe_dev->buffer_queue);
}
vpfe_dev->io_usrs = 0;
vpfe_dev->numbuffers = config_params.numbuffers;
+
+ if (vpfe_dev->imp_chained) {
+ imp_hw_if->enable(0, NULL);
+ imp_hw_if->unlock_chain();
+ }
}
+
/* Decrement device usrs counter */
vpfe_dev->usrs--;
/* Close the priority */
- v4l2_prio_close(&vpfe_dev->prio, fh->prio);
+ v4l2_prio_close(&vpfe_dev->prio, &fh->prio);
/* If this is the last file handle */
if (!vpfe_dev->usrs) {
vpfe_dev->initialized = 0;
@@ -763,7 +1167,9 @@ static int vpfe_mmap(struct file *file, struct vm_area_struct *vma)
/* Get the device object and file handle object */
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_mmap\n");
+#endif
return videobuf_mmap_mapper(&vpfe_dev->buffer_queue, vma);
}
@@ -775,7 +1181,9 @@ static unsigned int vpfe_poll(struct file *file, poll_table *wait)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_poll\n");
+#endif
if (vpfe_dev->started)
return videobuf_poll_stream(file,
@@ -783,17 +1191,96 @@ static unsigned int vpfe_poll(struct file *file, poll_table *wait)
return 0;
}
+static long vpfe_param_handler(struct file *file, void *priv,
+ int cmd, void *param)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+ int ret = 0;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_param_handler\n");
+#endif
+
+ if (NULL == param) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "Invalid user ptr\n");
+#endif
+ }
+
+ if (vpfe_dev->started) {
+ /* only allowed if streaming is not started */
+ v4l2_err(&vpfe_dev->v4l2_dev, "device already started\n");
+ return -EBUSY;
+ }
+
+
+ switch (cmd) {
+ case VPFE_CMD_S_CCDC_RAW_PARAMS:
+ v4l2_warn(&vpfe_dev->v4l2_dev,
+ "VPFE_CMD_S_CCDC_RAW_PARAMS: experimental ioctl\n");
+ ret = mutex_lock_interruptible(&vpfe_dev->lock);
+ if (ret)
+ return ret;
+ ret = ccdc_dev->hw_ops.set_params(param);
+ if (ret) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "Error in setting parameters in CCDC\n");
+#endif
+ goto unlock_out;
+ }
+
+ if (vpfe_get_ccdc_image_format(vpfe_dev, &vpfe_dev->fmt) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Invalid image format at CCDC\n");
+ ret = -EINVAL;
+ }
+unlock_out:
+ mutex_unlock(&vpfe_dev->lock);
+ break;
+ case VPFE_CMD_G_CCDC_RAW_PARAMS:
+ v4l2_warn(&vpfe_dev->v4l2_dev,
+ "VPFE_CMD_G_CCDC_RAW_PARAMS: experimental ioctl\n");
+ if (!ccdc_dev->hw_ops.get_params) {
+ ret = -EINVAL;
+ break;
+ }
+ ret = ccdc_dev->hw_ops.get_params(param);
+ if (ret) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "Error in getting parameters from CCDC\n");
+#endif
+ }
+ break;
+
+ default:
+ ret = -EINVAL;
+ }
+ return ret;
+}
+
+static long vpfe_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ if (cmd == VPFE_CMD_S_CCDC_RAW_PARAMS ||
+ cmd == VPFE_CMD_G_CCDC_RAW_PARAMS)
+ return vpfe_param_handler(file, file->private_data, cmd,
+ (void *)arg);
+ return video_ioctl2(file, cmd, arg);
+}
+
/* vpfe capture driver file operations */
static const struct v4l2_file_operations vpfe_fops = {
.owner = THIS_MODULE,
.open = vpfe_open,
.release = vpfe_release,
- .unlocked_ioctl = video_ioctl2,
+ .unlocked_ioctl = vpfe_ioctl,
.mmap = vpfe_mmap,
.poll = vpfe_poll
};
-/*
+/**
* vpfe_check_format()
* This function adjust the input pixel format as per hardware
* capabilities and update the same in pixfmt.
@@ -832,12 +1319,24 @@ static const struct vpfe_pixel_format *
/* check if hw supports it */
temp = 0;
found = 0;
- while (ccdc_dev->hw_ops.enum_pix(&pix, temp) >= 0) {
- if (vpfe_pix_fmt->fmtdesc.pixelformat == pix) {
- found = 1;
- break;
+ if (vpfe_dev->out_from == VPFE_CCDC_OUT) {
+ while (ccdc_dev->hw_ops.enum_pix(&pix, temp) >= 0) {
+ if (vpfe_pix_fmt->fmtdesc.pixelformat == pix) {
+ found = 1;
+ break;
+ }
+ temp++;
+ }
+ } else {
+ if (imp_hw_if) {
+ while (imp_hw_if->enum_pix(&pix, temp) >= 0) {
+ if (vpfe_pix_fmt->fmtdesc.pixelformat == pix) {
+ found = 1;
+ break;
+ }
+ temp++;
+ }
}
- temp++;
}
if (!found) {
@@ -891,10 +1390,18 @@ static const struct vpfe_pixel_format *
max_width = vpfe_dev->std_info.active_pixels;
max_height = vpfe_dev->std_info.active_lines;
+ if (vpfe_dev->imp_chained) {
+ /* check with imp hw for the limits */
+ max_width = imp_hw_if->get_max_output_width(0);
+ max_height = imp_hw_if->get_max_output_height(0);
+ }
+
min_width /= vpfe_pix_fmt->bpp;
- v4l2_info(&vpfe_dev->v4l2_dev, "width = %d, height = %d, bpp = %d\n",
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "width = %d, height = %d, bpp = %d\n",
pixfmt->width, pixfmt->height, vpfe_pix_fmt->bpp);
+#endif
pixfmt->width = clamp((pixfmt->width), min_width, max_width);
pixfmt->height = clamp((pixfmt->height), min_height, max_height);
@@ -915,10 +1422,12 @@ static const struct vpfe_pixel_format *
else
pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height;
- v4l2_info(&vpfe_dev->v4l2_dev, "adjusted width = %d, height ="
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "adjusted width = %d, height ="
" %d, bpp = %d, bytesperline = %d, sizeimage = %d\n",
pixfmt->width, pixfmt->height, vpfe_pix_fmt->bpp,
pixfmt->bytesperline, pixfmt->sizeimage);
+#endif
return vpfe_pix_fmt;
}
@@ -927,7 +1436,9 @@ static int vpfe_querycap(struct file *file, void *priv,
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_querycap\n");
+#endif
cap->version = VPFE_CAPTURE_VERSION_CODE;
cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
@@ -943,7 +1454,9 @@ static int vpfe_g_fmt_vid_cap(struct file *file, void *priv,
struct vpfe_device *vpfe_dev = video_drvdata(file);
int ret = 0;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_fmt_vid_cap\n");
+#endif
/* Fill in the information about format */
*fmt = vpfe_dev->fmt;
return ret;
@@ -957,10 +1470,22 @@ static int vpfe_enum_fmt_vid_cap(struct file *file, void *priv,
int temp_index;
u32 pix;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_fmt_vid_cap\n");
+#endif
- if (ccdc_dev->hw_ops.enum_pix(&pix, fmt->index) < 0)
- return -EINVAL;
+ if (!vpfe_dev->imp_chained) {
+ if (ccdc_dev->hw_ops.enum_pix(&pix, fmt->index) < 0)
+ return -EINVAL;
+ } else {
+ /**
+ * Based on resizer present or not or not, imp module will
+ * enumerate pixel format available at previewer output
+ * or resizer output based on interface type
+ */
+ if (imp_hw_if->enum_pix(&pix, fmt->index) < 0)
+ return -EINVAL;
+ }
/* Fill in the information about format */
pix_fmt = vpfe_lookup_pix_format(pix);
@@ -973,14 +1498,124 @@ static int vpfe_enum_fmt_vid_cap(struct file *file, void *priv,
return -EINVAL;
}
+/**
+ * vpfe_config_imp_image_format - Setup image format in image processor
+ * @vpfe_dev: vpfe device object
+ *
+ * Configure the input and output pixel format, input crop area and output
+ * frame sizes in the image processor. This is called during S_INPUT, S_CROP
+ * and S_FMT ioctls.
+ */
+static int vpfe_config_imp_image_format(struct vpfe_device *vpfe_dev)
+{
+ struct vpfe_subdev_info *sdinfo =
+ vpfe_dev->current_subdev;
+ int ret = -EINVAL, bytesperline;
+ enum imp_pix_formats imp_pix;
+ struct imp_window imp_win;
+
+ /* first setup input and output pixel formats */
+#ifdef CONFIG_VIDEO_YCBCR
+ if (sdinfo->is_camera && sdinfo->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ imp_pix = IMP_YUYV;
+ //TODO
+ else
+ imp_pix = IMP_BAYER;
+#else
+ if (sdinfo->is_camera)
+ imp_pix = IMP_BAYER;
+ else
+ imp_pix = IMP_UYVY;
+#endif
+ if (imp_hw_if->set_in_pixel_format(imp_pix) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Couldn't set in pix format at IMP\n");
+ goto imp_exit;
+ }
+
+ if (vpfe_dev->fmt.fmt.pix.pixelformat == V4L2_PIX_FMT_SBGGR16)
+ imp_pix = IMP_BAYER;
+ else if (vpfe_dev->fmt.fmt.pix.pixelformat == V4L2_PIX_FMT_UYVY)
+ imp_pix = IMP_UYVY;
+ else if (vpfe_dev->fmt.fmt.pix.pixelformat == V4L2_PIX_FMT_NV12)
+ imp_pix = IMP_YUV420SP;
+ else {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "pixel format not supported at IMP\n");
+ goto imp_exit;
+ }
+
+ if (imp_hw_if->set_out_pixel_format(imp_pix) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "pixel format not supported"
+ " at IMP\n");
+ goto imp_exit;
+ }
+
+ if (vpfe_dev->fmt.fmt.pix.field == V4L2_FIELD_INTERLACED) {
+ imp_hw_if->set_buftype(0);
+ imp_hw_if->set_frame_format(0);
+ ccdc_dev->hw_ops.set_frame_format(CCDC_FRMFMT_INTERLACED);
+ } else if (vpfe_dev->fmt.fmt.pix.field == V4L2_FIELD_NONE) {
+ imp_hw_if->set_frame_format(1);
+ ccdc_dev->hw_ops.set_frame_format(CCDC_FRMFMT_PROGRESSIVE);
+ } else {
+ v4l2_err(&vpfe_dev->v4l2_dev, "\n field error!");
+ goto imp_exit;
+ }
+
+ /**
+ * Check if we have resizer. Otherwise don't allow crop size to
+ * be different from image size
+ */
+ imp_win.width = vpfe_dev->crop.width;
+ imp_win.height = vpfe_dev->crop.height;
+ imp_win.hst = vpfe_dev->crop.left;
+ /* vst start from 1 */
+ imp_win.vst = vpfe_dev->crop.top + 1;
+ if (imp_hw_if->set_input_win(&imp_win) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Error in setting crop window"
+ " in IMP\n");
+ goto imp_exit;
+ }
+
+ /* Set output */
+ imp_win.width = vpfe_dev->fmt.fmt.pix.width;
+ imp_win.height = vpfe_dev->fmt.fmt.pix.height;
+ imp_win.hst = 0;
+ imp_win.vst = 0;
+ if (imp_hw_if->set_output_win(&imp_win) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Error in setting image window"
+ " in IMP\n");
+ goto imp_exit;
+ }
+
+ bytesperline = imp_hw_if->get_line_length(0);
+ if (bytesperline !=
+ vpfe_dev->fmt.fmt.pix.bytesperline) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Mismatch between bytesperline"
+ "at IMP and vpfe\n");
+ goto imp_exit;
+ }
+
+ if (imp_hw_if->get_output_state(1))
+ vpfe_dev->second_out_img_sz = imp_hw_if->get_line_length(1) *
+ imp_hw_if->get_image_height(1);
+ ret = 0;
+imp_exit:
+ return ret;
+}
+
static int vpfe_s_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *fmt)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
const struct vpfe_pixel_format *pix_fmts;
+ struct vpfe_subdev_info *sdinfo;
int ret = 0;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_fmt_vid_cap\n");
+#endif
/* If streaming is started, return error */
if (vpfe_dev->started) {
@@ -999,22 +1634,70 @@ static int vpfe_s_fmt_vid_cap(struct file *file, void *priv,
if (ret)
return ret;
- /* First detach any IRQ if currently attached */
- vpfe_detach_irq(vpfe_dev);
+ sdinfo = vpfe_dev->current_subdev;
+ if (sdinfo->is_camera) {
+ /*
+ * TODO. Current implementation of camera sub device calculates
+ * sensor timing values based on S_FMT. So we need to
+ * explicitely call S_FMT first and make sure it succeeds before
+ * setting capture parameters in ccdc. Assuming sensor supports
+ * V4L2_PIX_FMT_SGRBG10
+ */
+ ret = vpfe_set_format_in_sensor(vpfe_dev, fmt);
+ if (!ret) {
+ /**
+ * Set Crop size to frame size. Application needs to call
+ * S_CROP to change it after S_FMT
+ */
+ vpfe_dev->crop.width = fmt->fmt.pix.width;
+ vpfe_dev->crop.height = fmt->fmt.pix.height;
+ } else
+ goto s_fmt_out;
+ }
+
vpfe_dev->fmt = *fmt;
- /* set image capture parameters in the ccdc */
- ret = vpfe_config_ccdc_image_format(vpfe_dev);
- mutex_unlock(&vpfe_dev->lock);
- return ret;
-}
-static int vpfe_try_fmt_vid_cap(struct file *file, void *priv,
- struct v4l2_format *f)
-{
- struct vpfe_device *vpfe_dev = video_drvdata(file);
+ if (!vpfe_dev->imp_chained) {
+ /*
+ * Set Crop size to frame size when only ccdc is involved.
+ * Application needs to cal S_CROP to change it after S_FMT
+ */
+ vpfe_dev->crop.width = fmt->fmt.pix.width;
+ vpfe_dev->crop.height = fmt->fmt.pix.height;
+
+ /* set image capture parameters in the ccdc if */
+ ret = vpfe_config_ccdc_image_format(vpfe_dev);
+ } else {
+ /*
+ * currently S_FMT does scaling at the sensor and input to
+ * to CCDC is this scaled output for camera capture. So SoC
+ * resizer can be used to zoom/scale up a rectangle of input
+ * frame inside the received frame boundary by setting S_CROP.
+ * But for decoders like tvp7002, we set ccdc sizes based on
+ * given standard and use image processor to scale it down or
+ * up. So processing is different for both cases
+ */
+ if (vpfe_dev->current_subdev->is_camera)
+ ret = vpfe_config_ccdc_image_format(vpfe_dev);
+
+ if (!ret)
+ ret = vpfe_config_imp_image_format(vpfe_dev);
+ }
+
+s_fmt_out:
+ mutex_unlock(&vpfe_dev->lock);
+ return ret;
+}
+
+static int vpfe_try_fmt_vid_cap(struct file *file, void *priv,
+ struct v4l2_format *f)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
const struct vpfe_pixel_format *pix_fmts;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_try_fmt_vid_cap\n");
+#endif
pix_fmts = vpfe_check_format(vpfe_dev, &f->fmt.pix);
if (NULL == pix_fmts)
@@ -1061,9 +1744,10 @@ static int vpfe_get_app_input_index(struct vpfe_device *vpfe_dev,
for (i = 0; i < cfg->num_subdevs; i++) {
sdinfo = &cfg->sub_devs[i];
- if (!strcmp(sdinfo->name, vpfe_dev->current_subdev->name)) {
+ if (!strcmp(sdinfo->module_name,
+ vpfe_dev->current_subdev->module_name)) {
if (vpfe_dev->current_input >= sdinfo->num_inputs)
- return -1;
+ return -EINVAL;
*app_input_index = j + vpfe_dev->current_input;
return 0;
}
@@ -1077,20 +1761,26 @@ static int vpfe_enum_input(struct file *file, void *priv,
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
struct vpfe_subdev_info *sdinfo;
- int subdev, index ;
+ int subdev, index, temp_index;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_input\n");
+#endif
+ temp_index = inp->index;
if (vpfe_get_subdev_input_index(vpfe_dev,
&subdev,
&index,
inp->index) < 0) {
- v4l2_err(&vpfe_dev->v4l2_dev, "input information not found"
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "input information not found"
" for the subdev\n");
+#endif
return -EINVAL;
}
sdinfo = &vpfe_dev->cfg->sub_devs[subdev];
memcpy(inp, &sdinfo->inputs[index], sizeof(struct v4l2_input));
+ inp->index = temp_index;
return 0;
}
@@ -1098,22 +1788,24 @@ static int vpfe_g_input(struct file *file, void *priv, unsigned int *index)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_input\n");
+#endif
return vpfe_get_app_input_index(vpfe_dev, index);
}
-
static int vpfe_s_input(struct file *file, void *priv, unsigned int index)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+ int subdev_index, subdev_inp_index, ret;
struct vpfe_subdev_info *sdinfo;
- int subdev_index, inp_index;
struct vpfe_route *route;
u32 input = 0, output = 0;
- int ret = -EINVAL;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_input\n");
+#endif
ret = mutex_lock_interruptible(&vpfe_dev->lock);
if (ret)
@@ -1128,43 +1820,87 @@ static int vpfe_s_input(struct file *file, void *priv, unsigned int index)
ret = -EBUSY;
goto unlock_out;
}
- ret = vpfe_get_subdev_input_index(vpfe_dev,
- &subdev_index,
- &inp_index,
- index);
- if (ret < 0) {
+
+ if (vpfe_get_subdev_input_index(vpfe_dev,
+ &subdev_index,
+ &subdev_inp_index,
+ index) < 0) {
v4l2_err(&vpfe_dev->v4l2_dev, "invalid input index\n");
+ ret = -EINVAL;
goto unlock_out;
}
sdinfo = &vpfe_dev->cfg->sub_devs[subdev_index];
- route = &sdinfo->routes[inp_index];
+
+ if (!sdinfo->registered) {
+ ret = -EINVAL;
+ goto unlock_out;
+ }
+
+ if (vpfe_dev->cfg->setup_input) {
+ if (vpfe_dev->cfg->setup_input(sdinfo->grp_id) < 0) {
+ ret = -EFAULT;
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "couldn't setup input for %s\n",
+ sdinfo->module_name);
+#endif
+ goto unlock_out;
+ }
+ }
+
+ route = &sdinfo->routes[subdev_inp_index];
if (route && sdinfo->can_route) {
input = route->input;
output = route->output;
- }
-
- ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id,
- video, s_routing, input, output, 0);
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video,
+ s_routing, input, output, 0);
- if (ret) {
- v4l2_err(&vpfe_dev->v4l2_dev,
- "vpfe_doioctl:error in setting input in decoder\n");
- ret = -EINVAL;
- goto unlock_out;
+ if (ret) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "s_input:error in setting input in"
+ " decoder \n");
+#endif
+ ret = -EINVAL;
+ goto unlock_out;
+ }
}
+
vpfe_dev->current_subdev = sdinfo;
- vpfe_dev->current_input = index;
- vpfe_dev->std_index = 0;
+ vpfe_dev->current_input = subdev_inp_index;
/* set the bus/interface parameter for the sub device in ccdc */
ret = ccdc_dev->hw_ops.set_hw_if_params(&sdinfo->ccdc_if_params);
if (ret)
goto unlock_out;
+ /* update the if parameters to imp hw interface */
+ if (imp_hw_if && imp_hw_if->set_hw_if_param)
+ ret = imp_hw_if->set_hw_if_param(&sdinfo->ccdc_if_params);
+ if (ret)
+ goto unlock_out;
+
/* set the default image parameters in the device */
- ret = vpfe_config_image_format(vpfe_dev,
+ if (vpfe_dev->current_subdev->is_camera) {
+ vpfe_dev->std_index = -1;
+ /* for camera, use ccdc default parameters */
+ ret = vpfe_get_ccdc_image_format(vpfe_dev, &vpfe_dev->fmt);
+ /* also set the current default format in the sensor */
+ if (ret)
+ goto unlock_out;
+
+ ret = vpfe_set_format_in_sensor(vpfe_dev, &vpfe_dev->fmt);
+ } else {
+ vpfe_dev->std_index = 0;
+ /*
+ * For non-camera sub device, use standard to configure vpfe
+ * default
+ */
+ ret = vpfe_config_image_format(vpfe_dev,
&vpfe_standards[vpfe_dev->std_index].std_id);
+ }
unlock_out:
mutex_unlock(&vpfe_dev->lock);
return ret;
@@ -1176,7 +1912,9 @@ static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
struct vpfe_subdev_info *sdinfo;
int ret = 0;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_querystd\n");
+#endif
ret = mutex_lock_interruptible(&vpfe_dev->lock);
sdinfo = vpfe_dev->current_subdev;
@@ -1195,7 +1933,9 @@ static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id *std_id)
struct vpfe_subdev_info *sdinfo;
int ret = 0;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_std\n");
+#endif
/* Call decoder driver function to set the standard */
ret = mutex_lock_interruptible(&vpfe_dev->lock);
@@ -1210,6 +1950,16 @@ static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id *std_id)
goto unlock_out;
}
+ /* Set filter value in ths7353 for TVP7002 input path */
+ if (sdinfo->grp_id == VPFE_SUBDEV_TVP7002) {
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, s_std_output, *std_id);
+ if (ret < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Failed to set filter for THS7353\n");
+ goto unlock_out;
+ }
+ }
+
ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id,
core, s_std, *std_id);
if (ret < 0) {
@@ -1227,11 +1977,21 @@ static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_std\n");
+#endif
+ if (vpfe_dev->std_index < 0 ||
+ vpfe_dev->std_index >= ARRAY_SIZE(vpfe_standards)) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "Standard not supported\n");
+#endif
+ return -EINVAL;
+ }
*std_id = vpfe_standards[vpfe_dev->std_index].std_id;
return 0;
}
+
/*
* Videobuf operations
*/
@@ -1242,16 +2002,39 @@ static int vpfe_videobuf_setup(struct videobuf_queue *vq,
struct vpfe_fh *fh = vq->priv_data;
struct vpfe_device *vpfe_dev = fh->vpfe_dev;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_buffer_setup\n");
+#endif
+
+ /*
+ * if we are using mmap, check the size of the allocated buffer is less
+ * than or equal to the maximum specified in the driver. Assume here the
+ * user has called S_FMT and sizeimage has been calculated.
+ */
*size = vpfe_dev->fmt.fmt.pix.sizeimage;
- if (vpfe_dev->memory == V4L2_MEMORY_MMAP &&
- vpfe_dev->fmt.fmt.pix.sizeimage > config_params.device_bufsize)
- *size = config_params.device_bufsize;
+ if (vpfe_dev->second_output)
+ *size += vpfe_dev->second_out_img_sz;
+
+ if (vpfe_dev->memory == V4L2_MEMORY_MMAP) {
+ /* Limit maximum to what is configured */
+ if (*size > config_params.device_bufsize){
+ *size = config_params.device_bufsize;
+ printk("Limiting v4l2 output buffer size %d\n",*size);
+ }
+ }
+
+ if (config_params.video_limit) {
+ while (*size * *count > config_params.video_limit)
+ (*count)--;
+ }
if (*count < config_params.min_numbuffers)
*count = config_params.min_numbuffers;
+
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
"count=%d, size=%d\n", *count, *size);
+#endif
return 0;
}
@@ -1264,7 +2047,9 @@ static int vpfe_videobuf_prepare(struct videobuf_queue *vq,
unsigned long addr;
int ret;
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_buffer_prepare\n");
+ #ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_videobuf_prepare\n");
+ #endif
/* If buffer is not initialized, initialize it */
if (VIDEOBUF_NEEDS_INIT == vb->state) {
@@ -1284,6 +2069,7 @@ static int vpfe_videobuf_prepare(struct videobuf_queue *vq,
vb->state = VIDEOBUF_PREPARED;
}
+
return 0;
}
@@ -1295,8 +2081,6 @@ static void vpfe_videobuf_queue(struct videobuf_queue *vq,
struct vpfe_device *vpfe_dev = fh->vpfe_dev;
unsigned long flags;
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_buffer_queue\n");
-
/* add the buffer to the DMA queue */
spin_lock_irqsave(&vpfe_dev->dma_queue_lock, flags);
list_add_tail(&vb->queue, &vpfe_dev->dma_queue);
@@ -1311,18 +2095,13 @@ static void vpfe_videobuf_release(struct videobuf_queue *vq,
{
struct vpfe_fh *fh = vq->priv_data;
struct vpfe_device *vpfe_dev = fh->vpfe_dev;
- unsigned long flags;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_videobuf_release\n");
+#endif
- /*
- * We need to flush the buffer from the dma queue since
- * they are de-allocated
- */
- spin_lock_irqsave(&vpfe_dev->dma_queue_lock, flags);
- INIT_LIST_HEAD(&vpfe_dev->dma_queue);
- spin_unlock_irqrestore(&vpfe_dev->dma_queue_lock, flags);
- videobuf_dma_contig_free(vq, vb);
+ if (vpfe_dev->memory == V4L2_MEMORY_MMAP)
+ videobuf_dma_contig_free(vq, vb);
vb->state = VIDEOBUF_NEEDS_INIT;
}
@@ -1344,7 +2123,9 @@ static int vpfe_reqbufs(struct file *file, void *priv,
struct vpfe_fh *fh = file->private_data;
int ret = 0;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_reqbufs\n");
+#endif
if (V4L2_BUF_TYPE_VIDEO_CAPTURE != req_buf->type) {
v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buffer type\n");
@@ -1369,12 +2150,14 @@ static int vpfe_reqbufs(struct file *file, void *priv,
req_buf->type,
vpfe_dev->fmt.fmt.pix.field,
sizeof(struct videobuf_buffer),
- fh, NULL);
+ fh);
fh->io_allowed = 1;
vpfe_dev->io_usrs = 1;
INIT_LIST_HEAD(&vpfe_dev->dma_queue);
ret = videobuf_reqbufs(&vpfe_dev->buffer_queue, req_buf);
+ if (!ret && vpfe_dev->imp_chained)
+ imp_hw_if->lock_chain();
unlock_out:
mutex_unlock(&vpfe_dev->lock);
return ret;
@@ -1385,7 +2168,9 @@ static int vpfe_querybuf(struct file *file, void *priv,
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_querybuf\n");
+#endif
if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf->type) {
v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n");
@@ -1406,7 +2191,9 @@ static int vpfe_qbuf(struct file *file, void *priv,
struct vpfe_device *vpfe_dev = video_drvdata(file);
struct vpfe_fh *fh = file->private_data;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_qbuf\n");
+#endif
if (V4L2_BUF_TYPE_VIDEO_CAPTURE != p->type) {
v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n");
@@ -1429,7 +2216,9 @@ static int vpfe_dqbuf(struct file *file, void *priv,
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_dqbuf\n");
+#endif
if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf->type) {
v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n");
@@ -1439,61 +2228,48 @@ static int vpfe_dqbuf(struct file *file, void *priv,
buf, file->f_flags & O_NONBLOCK);
}
-static int vpfe_queryctrl(struct file *file, void *priv,
- struct v4l2_queryctrl *qctrl)
-{
- struct vpfe_device *vpfe_dev = video_drvdata(file);
- struct vpfe_subdev_info *sdinfo;
-
- sdinfo = vpfe_dev->current_subdev;
-
- return v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id,
- core, queryctrl, qctrl);
-
-}
-
-static int vpfe_g_ctrl(struct file *file, void *priv, struct v4l2_control *ctrl)
-{
- struct vpfe_device *vpfe_dev = video_drvdata(file);
- struct vpfe_subdev_info *sdinfo;
-
- sdinfo = vpfe_dev->current_subdev;
-
- return v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id,
- core, g_ctrl, ctrl);
-}
-
-static int vpfe_s_ctrl(struct file *file, void *priv, struct v4l2_control *ctrl)
-{
- struct vpfe_device *vpfe_dev = video_drvdata(file);
- struct vpfe_subdev_info *sdinfo;
-
- sdinfo = vpfe_dev->current_subdev;
-
- return v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id,
- core, s_ctrl, ctrl);
-}
-
-/*
+/**
* vpfe_calculate_offsets : This function calculates buffers offset
- * for top and bottom field
+ * @vpfe_dev - device object
+ *
+ * This function calculates field and second image offsets
*/
static void vpfe_calculate_offsets(struct vpfe_device *vpfe_dev)
{
struct v4l2_rect image_win;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_calculate_offsets\n");
+#endif
- ccdc_dev->hw_ops.get_image_window(&image_win);
- vpfe_dev->field_off = image_win.height * image_win.width;
+ vpfe_dev->field_off = 0;
+ vpfe_dev->second_off = 0;
+ if (!vpfe_dev->imp_chained) {
+ ccdc_dev->hw_ops.get_image_window(&image_win);
+ vpfe_dev->field_off = image_win.height * image_win.width;
+
+ } else {
+ if (vpfe_dev->second_output)
+ vpfe_dev->second_off = vpfe_dev->fmt.fmt.pix.sizeimage;
+ }
+ vpfe_dev->field_off = (vpfe_dev->field_off + 31) & ~0x1f;
+ /* Adjust the second offset to 32 byte boundary */
+ vpfe_dev->second_off = (vpfe_dev->second_off + 31) & ~0x1f;
}
/* vpfe_start_ccdc_capture: start streaming in ccdc/isif */
-static void vpfe_start_ccdc_capture(struct vpfe_device *vpfe_dev)
+static void vpfe_start_capture(struct vpfe_device *vpfe_dev)
{
- ccdc_dev->hw_ops.enable(1);
if (ccdc_dev->hw_ops.enable_out_to_sdram)
- ccdc_dev->hw_ops.enable_out_to_sdram(1);
+#ifdef CONFIG_VIDEO_YCBCR
+ ccdc_dev->hw_ops.enable_out_to_sdram((!vpfe_dev->imp_chained || (vpfe_dev->imp_chained && (vpfe_dev->current_subdev->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8))));
+#else
+ ccdc_dev->hw_ops.enable_out_to_sdram(!vpfe_dev->imp_chained);
+#endif
+ if (vpfe_dev->imp_chained)
+ imp_hw_if->enable(1, NULL);
+
+ ccdc_dev->hw_ops.enable(1);
vpfe_dev->started = 1;
}
@@ -1509,13 +2285,16 @@ static int vpfe_streamon(struct file *file, void *priv,
struct vpfe_fh *fh = file->private_data;
struct vpfe_subdev_info *sdinfo;
unsigned long addr;
- int ret = 0;
+ unsigned long addr_ipipeif = 0;
+ int ret = -EINVAL;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_streamon\n");
+#endif
if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf_type) {
v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n");
- return -EINVAL;
+ return ret;
}
/* If file handle is not allowed IO, return error */
@@ -1530,7 +2309,7 @@ static int vpfe_streamon(struct file *file, void *priv,
if (ret && (ret != -ENOIOCTLCMD)) {
v4l2_err(&vpfe_dev->v4l2_dev, "stream on failed in subdev\n");
- return -EINVAL;
+ return ret;
}
/* If buffer queue is empty, return error */
@@ -1544,7 +2323,6 @@ static int vpfe_streamon(struct file *file, void *priv,
if (ret)
return ret;
-
ret = mutex_lock_interruptible(&vpfe_dev->lock);
if (ret)
goto streamoff;
@@ -1559,7 +2337,20 @@ static int vpfe_streamon(struct file *file, void *priv,
/* Initialize field_id and started member */
vpfe_dev->field_id = 0;
addr = videobuf_to_dma_contig(vpfe_dev->cur_frm);
-
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(sdinfo->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ ipipif_dma_size = (vpfe_dev->fmt.fmt.pix.width*vpfe_dev->fmt.fmt.pix.height)*2;
+ ipipif_dma_addr_cpu = dma_alloc_coherent(vpfe_dev->pdev,ipipif_dma_size,&ipipif_dma_addr_phys,GFP_KERNEL);
+ if(!ipipif_dma_addr_cpu)
+ {
+ goto unlock_out;
+ }
+ addr_ipipeif = ipipif_dma_addr_phys;
+ ccdc_dev->hw_ops.setfbaddr(addr_ipipeif);
+ }
+#endif
/* Calculate field offset */
vpfe_calculate_offsets(vpfe_dev);
@@ -1569,14 +2360,53 @@ static int vpfe_streamon(struct file *file, void *priv,
ret = -EFAULT;
goto unlock_out;
}
- if (ccdc_dev->hw_ops.configure() < 0) {
+
+ if (ccdc_dev->hw_ops.configure(vpfe_dev->imp_chained) < 0) {
v4l2_err(&vpfe_dev->v4l2_dev,
"Error in configuring ccdc\n");
- ret = -EINVAL;
goto unlock_out;
}
- ccdc_dev->hw_ops.setfbaddr((unsigned long)(addr));
- vpfe_start_ccdc_capture(vpfe_dev);
+
+ if (!vpfe_dev->imp_chained) {
+ ccdc_dev->hw_ops.setfbaddr((unsigned long)(addr));
+ goto out;
+ }
+
+ /* Image processor chained in the path */
+ if (!cpu_is_davinci_dm365() &&
+ !vpfe_dev->current_subdev->is_camera) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Doesn't support chaining\n");
+ goto unlock_out;
+ }
+ if (imp_hw_if->hw_setup(vpfe_dev->pdev, NULL) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Error setting up IMP\n");
+ goto unlock_out;
+ }
+#ifdef CONFIG_VIDEO_YCBCR
+ //TODO
+ if(sdinfo->ccdc_if_params.if_type == VPFE_YCBCR_SYNC_8)
+ {
+ imp_hw_if->set_ipipif_addr(vpfe_dev->pdev, NULL,addr_ipipeif);
+ }
+#endif
+ if (imp_hw_if->update_outbuf1_address(NULL, addr) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev,
+ "Error setting up address in IMP output1\n");
+ goto unlock_out;
+ }
+
+ if (vpfe_dev->second_output) {
+ if (imp_hw_if->update_outbuf2_address(NULL,
+ (addr + vpfe_dev->second_off)) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Error setting up"
+ " address in IMP output2\n");
+ goto unlock_out;
+ }
+ }
+out:
+ ret = 0;
+ vpfe_start_capture(vpfe_dev);
mutex_unlock(&vpfe_dev->lock);
return ret;
unlock_out:
@@ -1594,16 +2424,22 @@ static int vpfe_streamoff(struct file *file, void *priv,
struct vpfe_subdev_info *sdinfo;
int ret = 0;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_streamoff\n");
+#endif
if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf_type) {
- v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n");
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "Invalid buf type\n");
+#endif
return -EINVAL;
}
/* If io is allowed for this file handle, return error */
if (!fh->io_allowed) {
- v4l2_err(&vpfe_dev->v4l2_dev, "fh->io_allowed\n");
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "fh->io_allowed\n");
+#endif
return -EACCES;
}
@@ -1617,7 +2453,7 @@ static int vpfe_streamoff(struct file *file, void *priv,
if (ret)
return ret;
- vpfe_stop_ccdc_capture(vpfe_dev);
+ vpfe_stop_capture(vpfe_dev);
vpfe_detach_irq(vpfe_dev);
sdinfo = vpfe_dev->current_subdev;
@@ -1626,28 +2462,101 @@ static int vpfe_streamoff(struct file *file, void *priv,
if (ret && (ret != -ENOIOCTLCMD))
v4l2_err(&vpfe_dev->v4l2_dev, "stream off failed in subdev\n");
+
+#ifdef CONFIG_VIDEO_YCBCR
+ if(ipipif_dma_addr_cpu)
+ {
+ dma_free_coherent(vpfe_dev->pdev,ipipif_dma_size,ipipif_dma_addr_cpu,ipipif_dma_addr_phys);
+ ipipif_dma_addr_cpu = NULL;
+ ipipif_dma_size = 0;
+ ipipif_dma_addr_phys = 0;
+ }
+#endif
+
ret = videobuf_streamoff(&vpfe_dev->buffer_queue);
mutex_unlock(&vpfe_dev->lock);
return ret;
}
+static int vpfe_queryctrl(struct file *file, void *priv,
+ struct v4l2_queryctrl *qc)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+ struct vpfe_subdev_info *sub_dev = vpfe_dev->current_subdev;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_queryctrl\n");
+#endif
+
+ /* pass it to sub device */
+ return v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sub_dev->grp_id,
+ core, queryctrl, qc);
+}
+
+static int vpfe_g_ctrl(struct file *file, void *priv,
+ struct v4l2_control *ctrl)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+ struct vpfe_subdev_info *sub_dev = vpfe_dev->current_subdev;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_ctrl\n");
+#endif
+
+ return v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sub_dev->grp_id,
+ core, g_ctrl, ctrl);
+}
+
+static int vpfe_s_ctrl(struct file *file, void *priv,
+ struct v4l2_control *ctrl)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+ struct vpfe_subdev_info *sub_dev = vpfe_dev->current_subdev;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_ctrl\n");
+#endif
+
+ return v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sub_dev->grp_id,
+ core, s_ctrl, ctrl);
+}
+
static int vpfe_cropcap(struct file *file, void *priv,
struct v4l2_cropcap *crop)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+ struct vpfe_subdev_info *sdinfo;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_cropcap\n");
-
- if (vpfe_dev->std_index >= ARRAY_SIZE(vpfe_standards))
- return -EINVAL;
+#endif
memset(crop, 0, sizeof(struct v4l2_cropcap));
crop->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
- crop->bounds.width = crop->defrect.width =
- vpfe_standards[vpfe_dev->std_index].width;
- crop->bounds.height = crop->defrect.height =
- vpfe_standards[vpfe_dev->std_index].height;
- crop->pixelaspect = vpfe_standards[vpfe_dev->std_index].pixelaspect;
+ sdinfo = vpfe_dev->current_subdev;
+
+ if (!sdinfo->is_camera) {
+
+ if (vpfe_dev->std_index < 0 ||
+ vpfe_dev->std_index >= ARRAY_SIZE(vpfe_standards))
+ return -EINVAL;
+
+ crop->bounds.width = vpfe_standards[vpfe_dev->std_index].width;
+ crop->defrect.width = crop->bounds.width;
+ crop->bounds.height =
+ vpfe_standards[vpfe_dev->std_index].height;
+ crop->defrect.height = crop->bounds.height;
+ crop->pixelaspect =
+ vpfe_standards[vpfe_dev->std_index].pixelaspect;
+ } else {
+ /* camera interface */
+ crop->bounds.width = vpfe_dev->std_info.active_pixels;
+ crop->defrect.width = crop->bounds.width;
+ crop->bounds.height = vpfe_dev->std_info.active_lines;
+ crop->defrect.height = crop->bounds.height;
+ crop->pixelaspect.numerator = 1;
+ crop->pixelaspect.denominator = 1;
+ }
return 0;
}
@@ -1656,20 +2565,23 @@ static int vpfe_g_crop(struct file *file, void *priv,
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_crop\n");
+#endif
crop->c = vpfe_dev->crop;
return 0;
}
static int vpfe_s_crop(struct file *file, void *priv,
- const struct v4l2_crop *crop)
+ struct v4l2_crop *crop)
{
struct vpfe_device *vpfe_dev = video_drvdata(file);
- struct v4l2_rect rect = crop->c;
- int ret = 0;
+ int ret = 0, max_height, max_width;
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_crop\n");
+#endif
if (vpfe_dev->started) {
/* make sure streaming is not started */
@@ -1682,91 +2594,237 @@ static int vpfe_s_crop(struct file *file, void *priv,
if (ret)
return ret;
- if (rect.top < 0 || rect.left < 0) {
+ if (crop->c.top < 0 || crop->c.left < 0) {
v4l2_err(&vpfe_dev->v4l2_dev,
"doesn't support negative values for top & left\n");
ret = -EINVAL;
goto unlock_out;
}
- /* adjust the width to 16 pixel boundary */
- rect.width = ((rect.width + 15) & ~0xf);
+ /* adjust the width to 16 pixel boundry */
+ crop->c.width = ((crop->c.width + 15) & ~0xf);
- /* make sure parameters are valid */
- if ((rect.left + rect.width >
- vpfe_dev->std_info.active_pixels) ||
- (rect.top + rect.height >
- vpfe_dev->std_info.active_lines)) {
- v4l2_err(&vpfe_dev->v4l2_dev, "Error in S_CROP params\n");
+ /**
+ * When there is no image processor chained, then cropping
+ * happens at the ccdc and image size is the cropped image
+ * size. For Camera, maximum size is limited to frame size
+ * configured at the sensor through S_FMT that happens at
+ * either at device open() or when application calls S_FMT
+ */
+ if (!vpfe_dev->current_subdev->is_camera) {
+ max_width = vpfe_dev->std_info.active_pixels;
+ max_height = vpfe_dev->std_info.active_lines;
+ } else {
+ max_width = vpfe_dev->fmt.fmt.pix.width;
+ max_height = vpfe_dev->fmt.fmt.pix.height;
+ }
+
+ if ((crop->c.left + crop->c.width > max_width) ||
+ (crop->c.top + crop->c.height > max_height)) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Error in S_CROP"
+ " params, max_width = %d, max_height = %d\n",
+ max_width, max_height);
ret = -EINVAL;
goto unlock_out;
}
- ccdc_dev->hw_ops.set_image_window(&rect);
- vpfe_dev->fmt.fmt.pix.width = rect.width;
- vpfe_dev->fmt.fmt.pix.height = rect.height;
- vpfe_dev->fmt.fmt.pix.bytesperline =
- ccdc_dev->hw_ops.get_line_length();
- vpfe_dev->fmt.fmt.pix.sizeimage =
- vpfe_dev->fmt.fmt.pix.bytesperline *
- vpfe_dev->fmt.fmt.pix.height;
- vpfe_dev->crop = rect;
+
+ ccdc_dev->hw_ops.set_image_window(&crop->c);
+ if (!vpfe_dev->imp_chained) {
+ vpfe_dev->fmt.fmt.pix.width = crop->c.width;
+ vpfe_dev->fmt.fmt.pix.height = crop->c.height;
+ vpfe_dev->fmt.fmt.pix.bytesperline =
+ ccdc_dev->hw_ops.get_line_length();
+ vpfe_dev->fmt.fmt.pix.sizeimage =
+ vpfe_dev->fmt.fmt.pix.bytesperline *
+ vpfe_dev->fmt.fmt.pix.height;
+ } else {
+ struct imp_window imp_crop_win;
+
+ imp_crop_win.width = crop->c.width;
+ imp_crop_win.height = crop->c.height;
+ imp_crop_win.hst = crop->c.left;
+ /* vst starts from 1 */
+ imp_crop_win.vst = crop->c.top + 1;
+ if (imp_hw_if->set_input_win(&imp_crop_win) < 0) {
+ v4l2_err(&vpfe_dev->v4l2_dev, "Error in setting crop "
+ "window in IMP\n");
+ ret = -EINVAL;
+ goto unlock_out;
+ }
+ }
+ vpfe_dev->crop = crop->c;
unlock_out:
mutex_unlock(&vpfe_dev->lock);
return ret;
}
-
-static long vpfe_param_handler(struct file *file, void *priv,
- bool valid_prio, int cmd, void *param)
+static int vpfe_s_parm(struct file *file, void *priv,
+ struct v4l2_streamparm *parm)
{
+ struct v4l2_captureparm *capparam = &parm->parm.capture;
struct vpfe_device *vpfe_dev = video_drvdata(file);
- int ret = 0;
+ int ret = -EINVAL;
- v4l2_dbg(2, debug, &vpfe_dev->v4l2_dev, "vpfe_param_handler\n");
+ /* TODO - Revisit it before submitting to upstream */
+ if (!cpu_is_davinci_dm365()) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "Ioctl not supported on this platform\n");
+#endif
+ goto out;
+ }
if (vpfe_dev->started) {
- /* only allowed if streaming is not started */
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
- "device already started\n");
- return -EBUSY;
+ "Steaming ON. Cannot change capture streaming params.");
+#endif
+ goto out;
+ }
+
+ if (vpfe_dev->std_info.frame_format) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "Supported only for progressive scan");
+#endif
+ goto out;
+ }
+
+ if (!capparam->timeperframe.numerator ||
+ !capparam->timeperframe.denominator) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "invalid timeperframe");
+#endif
+ goto out;
+ }
+
+ if (capparam->timeperframe.numerator !=
+ vpfe_dev->std_info.fps.numerator ||
+ capparam->timeperframe.denominator >
+ vpfe_dev->std_info.fps.denominator) {
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
+ "Invalid capparam, timeperframe.numerator = %d,"
+ "timeperframe.denominator = %d,\n"
+ "vpfe std_info.numerator = %d,"
+ " std_info.denominator = %d",
+ capparam->timeperframe.numerator,
+ capparam->timeperframe.denominator,
+ vpfe_dev->std_info.fps.numerator,
+ vpfe_dev->std_info.fps.denominator);
+#endif
+ goto out;
}
ret = mutex_lock_interruptible(&vpfe_dev->lock);
if (ret)
- return ret;
+ goto out;
- switch (cmd) {
- case VPFE_CMD_S_CCDC_RAW_PARAMS:
- v4l2_warn(&vpfe_dev->v4l2_dev,
- "VPFE_CMD_S_CCDC_RAW_PARAMS: experimental ioctl\n");
- if (ccdc_dev->hw_ops.set_params) {
- ret = ccdc_dev->hw_ops.set_params(param);
- if (ret) {
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
- "Error setting parameters in CCDC\n");
- goto unlock_out;
- }
- ret = vpfe_get_ccdc_image_format(vpfe_dev,
- &vpfe_dev->fmt);
- if (ret < 0) {
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
- "Invalid image format at CCDC\n");
- goto unlock_out;
- }
- } else {
- ret = -EINVAL;
- v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
- "VPFE_CMD_S_CCDC_RAW_PARAMS not supported\n");
+ vpfe_dev->timeperframe = capparam->timeperframe;
+ vpfe_dev->skip_frame_count = vpfe_dev->std_info.fps.denominator/
+ capparam->timeperframe.denominator;
+ vpfe_dev->skip_frame_count_init = vpfe_dev->skip_frame_count;
+ mutex_unlock(&vpfe_dev->lock);
+ ret = 0;
+out:
+ return ret;
+}
+
+static int vpfe_g_parm(struct file *file, void *priv,
+ struct v4l2_streamparm *parm)
+{
+ struct v4l2_captureparm *capparam = &parm->parm.capture;
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+
+ memset(capparam, 0, sizeof(struct v4l2_captureparm));
+ capparam->capability = V4L2_CAP_TIMEPERFRAME;
+ capparam->timeperframe = vpfe_dev->timeperframe;
+ return 0;
+}
+
+static int vpfe_enum_framesizes(struct file *file, void *priv,
+ struct v4l2_frmsizeenum *frms)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+ struct vpfe_subdev_info *sdinfo;
+ u32 pixel_format;
+ int ret = -EINVAL;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_framesizes\n");
+#endif
+ sdinfo = vpfe_dev->current_subdev;
+
+ mutex_lock(&vpfe_dev->lock);
+
+ if (sdinfo->is_camera) {
+#ifdef CONFIG_VIDEO_YCBCR
+ if(frms->pixel_format == V4L2_PIX_FMT_SGRBG10)
+ {
+ /* Assume the sensor supports V4L2_PIX_FMT_SGRBG10*/
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, enum_framesizes, frms);
}
- break;
- default:
- ret = -ENOTTY;
+ //TODO
+ else
+ {
+ ret = 0;
+ }
+#else
+ /* Assume the sensor supports V4L2_PIX_FMT_SGRBG10*/
+ pixel_format = frms->pixel_format;
+ frms->pixel_format = V4L2_PIX_FMT_SGRBG10;
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, enum_framesizes, frms);
+ frms->pixel_format = pixel_format;
+#endif
}
-unlock_out:
+
mutex_unlock(&vpfe_dev->lock);
return ret;
}
+static int vpfe_enum_frameintervals(struct file *file, void *priv,
+ struct v4l2_frmivalenum *frmi)
+{
+ struct vpfe_device *vpfe_dev = video_drvdata(file);
+ struct vpfe_subdev_info *sdinfo;
+ u32 pixel_format;
+ int ret = -EINVAL;
+
+#ifdef CONFIG_V2R_DEBUG
+ v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_frameintervals\n");
+#endif
+ sdinfo = vpfe_dev->current_subdev;
+
+ mutex_lock(&vpfe_dev->lock);
+
+ if (sdinfo->is_camera) {
+#ifdef CONFIG_VIDEO_YCBCR
+ if(frmi->pixel_format == V4L2_PIX_FMT_SGRBG10)
+ {
+ /* Assume the sensor supports V4L2_PIX_FMT_SGRBG10*/
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, enum_frameintervals, frmi);
+ }
+ else
+ {
+ ret = 0;
+ }
+#else
+ /* Assume the sensor supports V4L2_PIX_FMT_SGRBG10*/
+ pixel_format = frmi->pixel_format;
+ frmi->pixel_format = V4L2_PIX_FMT_SGRBG10;
+ ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev,
+ sdinfo->grp_id, video, enum_frameintervals, frmi);
+ frmi->pixel_format = pixel_format;
+#endif
+ }
+
+ mutex_unlock(&vpfe_dev->lock);
+ return ret;
+}
/* vpfe capture ioctl operations */
static const struct v4l2_ioctl_ops vpfe_ioctl_ops = {
@@ -1781,19 +2839,22 @@ static const struct v4l2_ioctl_ops vpfe_ioctl_ops = {
.vidioc_querystd = vpfe_querystd,
.vidioc_s_std = vpfe_s_std,
.vidioc_g_std = vpfe_g_std,
- .vidioc_queryctrl = vpfe_queryctrl,
- .vidioc_g_ctrl = vpfe_g_ctrl,
- .vidioc_s_ctrl = vpfe_s_ctrl,
.vidioc_reqbufs = vpfe_reqbufs,
.vidioc_querybuf = vpfe_querybuf,
.vidioc_qbuf = vpfe_qbuf,
.vidioc_dqbuf = vpfe_dqbuf,
.vidioc_streamon = vpfe_streamon,
.vidioc_streamoff = vpfe_streamoff,
+ .vidioc_queryctrl = vpfe_queryctrl,
+ .vidioc_g_ctrl = vpfe_g_ctrl,
+ .vidioc_s_ctrl = vpfe_s_ctrl,
.vidioc_cropcap = vpfe_cropcap,
.vidioc_g_crop = vpfe_g_crop,
.vidioc_s_crop = vpfe_s_crop,
- .vidioc_default = vpfe_param_handler,
+ .vidioc_s_parm = vpfe_s_parm,
+ .vidioc_g_parm = vpfe_g_parm,
+ .vidioc_enum_framesizes = vpfe_enum_framesizes,
+ .vidioc_enum_frameintervals = vpfe_enum_frameintervals,
};
static struct vpfe_device *vpfe_initialize(void)
@@ -1815,7 +2876,7 @@ static struct vpfe_device *vpfe_initialize(void)
config_params.numbuffers = numbuffers;
if (numbuffers)
- config_params.device_bufsize = bufsize;
+ config_params.device_bufsize = ALIGN(bufsize, 4096);
/* Allocate memory for device objects */
vpfe_dev = kzalloc(sizeof(*vpfe_dev), GFP_KERNEL);
@@ -1823,10 +2884,88 @@ static struct vpfe_device *vpfe_initialize(void)
return vpfe_dev;
}
-/*
- * vpfe_probe : This function creates device entries by register
- * itself to the V4L2 driver and initializes fields of each
- * device objects
+static void vpfe_disable_clock(struct vpfe_device *vpfe_dev)
+{
+#ifndef CONFIG_V2R_VIDEOOUTALWAYSON
+ struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
+ int i;
+
+ for (i = 0; i < vpfe_cfg->num_clocks; i++) {
+ clk_disable(vpfe_dev->clks[i]);
+ clk_put(vpfe_dev->clks[i]);
+ }
+ kfree(vpfe_dev->clks);
+ v4l2_info(vpfe_dev->pdev->driver, "vpfe capture clocks disabled\n");
+#endif
+}
+
+/**
+ * vpfe_enable_clock() - Enable clocks for vpfe capture driver
+ * @vpfe_dev - ptr to vpfe capture device
+ *
+ * Enables clocks defined in vpfe configuration. The function
+ * assumes that at least one clock is to be defined which is
+ * true as of now. re-visit this if this assumption is not true
+ */
+static int vpfe_enable_clock(struct vpfe_device *vpfe_dev)
+{
+ struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
+ int ret = -EFAULT, i;
+
+ if (!vpfe_cfg->num_clocks)
+ return 0;
+
+ vpfe_dev->clks = kzalloc(vpfe_cfg->num_clocks *
+ sizeof(struct clock *), GFP_KERNEL);
+
+ if (NULL == vpfe_dev->clks) {
+ v4l2_err(vpfe_dev->pdev->driver, "Memory allocation failed\n");
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < vpfe_cfg->num_clocks; i++) {
+ if (NULL == vpfe_cfg->clocks[i]) {
+ v4l2_err(vpfe_dev->pdev->driver,
+ "clock %s is not defined in vpfe config\n",
+ vpfe_cfg->clocks[i]);
+ goto out;
+ }
+
+ vpfe_dev->clks[i] = clk_get(vpfe_dev->pdev,
+ vpfe_cfg->clocks[i]);
+ if (NULL == vpfe_dev->clks[i]) {
+ v4l2_err(vpfe_dev->pdev->driver,
+ "Failed to get clock %s\n",
+ vpfe_cfg->clocks[i]);
+ goto out;
+ }
+
+ if (clk_enable(vpfe_dev->clks[i])) {
+ v4l2_err(vpfe_dev->pdev->driver,
+ "vpfe clock %s not enabled\n",
+ vpfe_cfg->clocks[i]);
+ goto out;
+ }
+
+ v4l2_info(vpfe_dev->pdev->driver, "vpss clock %s enabled",
+ vpfe_cfg->clocks[i]);
+ }
+ return 0;
+out:
+ for (i = 0; i < vpfe_cfg->num_clocks; i++) {
+ if (vpfe_dev->clks[i])
+ clk_put(vpfe_dev->clks[i]);
+ }
+ kfree(vpfe_dev->clks);
+ return ret;
+}
+
+/**
+ * vpfe_probe : vpfe probe function
+ * @pdev: platform device pointer
+ *
+ * This function creates device entries by register itself to the V4L2 driver
+ * and initializes fields of each device objects
*/
static int vpfe_probe(struct platform_device *pdev)
{
@@ -1836,8 +2975,10 @@ static int vpfe_probe(struct platform_device *pdev)
struct vpfe_device *vpfe_dev;
struct i2c_adapter *i2c_adap;
struct video_device *vfd;
- int ret = -ENOMEM, i, j;
+ int ret = -ENOMEM, i, j, err;
int num_subdevs = 0;
+ unsigned long phys_end_kernel;
+ size_t size;
/* Get the pointer to the device object */
vpfe_dev = vpfe_initialize();
@@ -1849,10 +2990,33 @@ static int vpfe_probe(struct platform_device *pdev)
}
vpfe_dev->pdev = &pdev->dev;
+ //printk("Cont buffer size = %d\r\n", cont_bufsize);
+
+ if (cont_bufsize) {
+ /* attempt to determine the end of Linux kernel memory */
+ //unsigned int tmp_size = 0;
+ phys_end_kernel = virt_to_phys((void *)PAGE_OFFSET) +
+ (num_physpages << PAGE_SHIFT);
+ size = cont_bufsize;
+ phys_end_kernel += cont_bufoffset;
+ //printk("Cont memory %x -> %x for device %p\r\n", phys_end_kernel, size, &pdev->dev);
+ //tmp_size = PAGE_ALIGN(size);
+ //printk("Page align %d\r\n", tmp_size);
+ err = dma_declare_coherent_memory(&pdev->dev, phys_end_kernel,
+ phys_end_kernel, size,
+ DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
+ //printk("Cont memory %d\r\n", err);
+ if (!err) {
+ dev_err(&pdev->dev, "Unable to declare MMAP memory.\n");
+ ret = -ENOENT;
+ goto probe_free_dev_mem;
+ }
+ config_params.video_limit = size;
+ }
if (NULL == pdev->dev.platform_data) {
v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n");
- ret = -ENODEV;
+ ret = -ENOENT;
goto probe_free_dev_mem;
}
@@ -1866,59 +3030,65 @@ static int vpfe_probe(struct platform_device *pdev)
goto probe_free_dev_mem;
}
+ /* enable vpss clocks */
+ ret = vpfe_enable_clock(vpfe_dev);
+ if (ret)
+ goto probe_free_dev_mem;
+
+ /* Initialise the ipipe hw module if exists */
+ if (!cpu_is_davinci_dm644x()) {
+ imp_hw_if = imp_get_hw_if();
+ if (ISNULL(imp_hw_if))
+ return -1;
+ }
+
+ mutex_lock(&ccdc_lock);
/* Allocate memory for ccdc configuration */
ccdc_cfg = kmalloc(sizeof(struct ccdc_config), GFP_KERNEL);
if (NULL == ccdc_cfg) {
v4l2_err(pdev->dev.driver,
"Memory allocation failed for ccdc_cfg\n");
- goto probe_free_lock;
+ goto probe_disable_clock;
}
- mutex_lock(&ccdc_lock);
-
strncpy(ccdc_cfg->name, vpfe_cfg->ccdc, 32);
/* Get VINT0 irq resource */
res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res1) {
v4l2_err(pdev->dev.driver,
"Unable to get interrupt for VINT0\n");
- ret = -ENODEV;
- goto probe_free_ccdc_cfg_mem;
+ ret = -ENOENT;
+ goto probe_disable_clock;
}
vpfe_dev->ccdc_irq0 = res1->start;
/* Get VINT1 irq resource */
- res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
+ res1 = platform_get_resource(pdev,
+ IORESOURCE_IRQ, 1);
if (!res1) {
v4l2_err(pdev->dev.driver,
"Unable to get interrupt for VINT1\n");
- ret = -ENODEV;
- goto probe_free_ccdc_cfg_mem;
+ ret = -ENOENT;
+ goto probe_disable_clock;
}
vpfe_dev->ccdc_irq1 = res1->start;
- ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED,
- "vpfe_capture0", vpfe_dev);
-
- if (0 != ret) {
- v4l2_err(pdev->dev.driver, "Unable to request interrupt\n");
- goto probe_free_ccdc_cfg_mem;
- }
-
/* Allocate memory for video device */
vfd = video_device_alloc();
if (NULL == vfd) {
ret = -ENOMEM;
- v4l2_err(pdev->dev.driver, "Unable to alloc video device\n");
- goto probe_out_release_irq;
+ v4l2_err(pdev->dev.driver,
+ "Unable to alloc video device\n");
+ goto probe_disable_clock;
}
/* Initialize field of video device */
vfd->release = video_device_release;
vfd->fops = &vpfe_fops;
vfd->ioctl_ops = &vpfe_ioctl_ops;
+ vfd->minor = -1;
vfd->tvnorms = 0;
- vfd->current_norm = V4L2_STD_PAL;
+ vfd->current_norm = V4L2_STD_NTSC;
vfd->v4l2_dev = &vpfe_dev->v4l2_dev;
snprintf(vfd->name, sizeof(vfd->name),
"%s_V%d.%d.%d",
@@ -1946,10 +3116,12 @@ static int vpfe_probe(struct platform_device *pdev)
/* Initialize prio member of device object */
v4l2_prio_init(&vpfe_dev->prio);
/* register video device */
+#ifdef CONFIG_V2R_DEBUG
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
"trying to register vpfe device.\n");
v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
"video_dev=%x\n", (int)&vpfe_dev->video_dev);
+#endif
vpfe_dev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
ret = video_register_device(vpfe_dev->video_dev,
VFL_TYPE_GRABBER, -1);
@@ -1965,7 +3137,8 @@ static int vpfe_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, vpfe_dev);
/* set driver private data */
video_set_drvdata(vpfe_dev->video_dev, vpfe_dev);
- i2c_adap = i2c_get_adapter(vpfe_cfg->i2c_adapter_id);
+ i2c_adap = i2c_get_adapter(1);
+ vpfe_cfg = pdev->dev.platform_data;
num_subdevs = vpfe_cfg->num_subdevs;
vpfe_dev->sd = kmalloc(sizeof(struct v4l2_subdev *) * num_subdevs,
GFP_KERNEL);
@@ -1980,33 +3153,65 @@ static int vpfe_probe(struct platform_device *pdev)
struct v4l2_input *inps;
sdinfo = &vpfe_cfg->sub_devs[i];
-
- /* Load up the subdevice */
- vpfe_dev->sd[i] =
- v4l2_i2c_new_subdev_board(&vpfe_dev->v4l2_dev,
- i2c_adap,
- &sdinfo->board_info,
- NULL);
- if (vpfe_dev->sd[i]) {
- v4l2_info(&vpfe_dev->v4l2_dev,
- "v4l2 sub device %s registered\n",
- sdinfo->name);
- vpfe_dev->sd[i]->grp_id = sdinfo->grp_id;
- /* update tvnorms from the sub devices */
- for (j = 0; j < sdinfo->num_inputs; j++) {
- inps = &sdinfo->inputs[j];
- vfd->tvnorms |= inps->std;
+ /**
+ * register subdevices based on interface setting. Currently
+ * tvp5146 and mt9p031 cannot co-exists due to i2c address
+ * conflicts. So only one of them is registered. Re-visit this
+ * once we have support for i2c switch handling in i2c driver
+ * framework
+ */
+ if (interface == sdinfo->is_camera) {
+ /* setup input path */
+ if (vpfe_cfg->setup_input) {
+ if (vpfe_cfg->setup_input(sdinfo->grp_id) < 0) {
+ ret = -EFAULT;
+ v4l2_info(&vpfe_dev->v4l2_dev, "could"
+ " not setup input for %s\n",
+ sdinfo->module_name);
+ goto probe_sd_out;
+ }
+ }
+ /* Load up the subdevice */
+ vpfe_dev->sd[i] =
+ v4l2_i2c_new_subdev_board(&vpfe_dev->v4l2_dev,
+ i2c_adap,
+ sdinfo->module_name,
+ &sdinfo->board_info,
+ NULL);
+ if (vpfe_dev->sd[i]) {
+ v4l2_info(&vpfe_dev->v4l2_dev,
+ "v4l2 sub device %s registered\n",
+ sdinfo->module_name);
+ vpfe_dev->sd[i]->grp_id = sdinfo->grp_id;
+ /* update tvnorms from the sub devices */
+ for (j = 0; j < sdinfo->num_inputs; j++) {
+ inps = &sdinfo->inputs[j];
+ vfd->tvnorms |= inps->std;
+ }
+ sdinfo->registered = 1;
+ } else {
+ v4l2_info(&vpfe_dev->v4l2_dev,
+ "v4l2 sub device %s register fails\n",
+ sdinfo->module_name);
}
- } else {
- v4l2_info(&vpfe_dev->v4l2_dev,
- "v4l2 sub device %s register fails\n",
- sdinfo->name);
- goto probe_sd_out;
}
}
- /* set first sub device as current one */
- vpfe_dev->current_subdev = &vpfe_cfg->sub_devs[0];
+ /* We need at least one sub device to do capture */
+ for (i = 0; i < num_subdevs; i++) {
+ sdinfo = &vpfe_cfg->sub_devs[i];
+ if (sdinfo->registered) {
+ /* set this as the current sub device */
+ vpfe_dev->current_subdev = &vpfe_cfg->sub_devs[i];
+ break;
+ }
+ }
+
+ /* if we don't have any sub device registered, return error */
+ if (i == num_subdevs) {
+ printk(KERN_NOTICE "No sub devices registered\n");
+ goto probe_sd_out;
+ }
/* We have at least one sub device to work with */
mutex_unlock(&ccdc_lock);
@@ -2019,14 +3224,12 @@ probe_out_video_unregister:
probe_out_v4l2_unregister:
v4l2_device_unregister(&vpfe_dev->v4l2_dev);
probe_out_video_release:
- if (!video_is_registered(vpfe_dev->video_dev))
+ if (vpfe_dev->video_dev->minor == -1)
video_device_release(vpfe_dev->video_dev);
-probe_out_release_irq:
- free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
-probe_free_ccdc_cfg_mem:
- kfree(ccdc_cfg);
-probe_free_lock:
+probe_disable_clock:
+ vpfe_disable_clock(vpfe_dev);
mutex_unlock(&ccdc_lock);
+ kfree(ccdc_cfg);
probe_free_dev_mem:
kfree(vpfe_dev);
return ret;
@@ -2041,26 +3244,30 @@ static int vpfe_remove(struct platform_device *pdev)
v4l2_info(pdev->dev.driver, "vpfe_remove\n");
- free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
kfree(vpfe_dev->sd);
v4l2_device_unregister(&vpfe_dev->v4l2_dev);
video_unregister_device(vpfe_dev->video_dev);
+ vpfe_disable_clock(vpfe_dev);
kfree(vpfe_dev);
kfree(ccdc_cfg);
return 0;
}
-static int vpfe_suspend(struct device *dev)
+static int
+vpfe_suspend(struct device *dev)
{
- return 0;
+ /* add suspend code here later */
+ return -1;
}
-static int vpfe_resume(struct device *dev)
+static int
+vpfe_resume(struct device *dev)
{
- return 0;
+ /* add resume code here later */
+ return -1;
}
-static const struct dev_pm_ops vpfe_dev_pm_ops = {
+static struct dev_pm_ops vpfe_dev_pm_ops = {
.suspend = vpfe_suspend,
.resume = vpfe_resume,
};
@@ -2072,7 +3279,23 @@ static struct platform_driver vpfe_driver = {
.pm = &vpfe_dev_pm_ops,
},
.probe = vpfe_probe,
- .remove = vpfe_remove,
+ .remove = (vpfe_remove),
};
-module_platform_driver(vpfe_driver);
+static __init int vpfe_init(void)
+{
+ printk(KERN_NOTICE "vpfe_init\n");
+ /* Register driver to the kernel */
+ return platform_driver_register(&vpfe_driver);
+}
+
+/**
+ * vpfe_cleanup : This function un-registers device driver
+ */
+static void vpfe_cleanup(void)
+{
+ platform_driver_unregister(&vpfe_driver);
+}
+
+module_init(vpfe_init);
+module_exit(vpfe_cleanup);
diff --git a/drivers/media/platform/davinci/vpss.c b/drivers/media/platform/davinci/vpss.c
index a19c5522..7ab77f7a 100644
--- a/drivers/media/platform/davinci/vpss.c
+++ b/drivers/media/platform/davinci/vpss.c
@@ -15,7 +15,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
- * common vpss system module platform driver for all video drivers.
+ * common vpss driver for all video drivers.
*/
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -25,6 +25,7 @@
#include <linux/spinlock.h>
#include <linux/compiler.h>
#include <linux/io.h>
+#include <mach/hardware.h>
#include <media/davinci/vpss.h>
MODULE_LICENSE("GPL");
@@ -34,73 +35,42 @@ MODULE_AUTHOR("Texas Instruments");
/* DM644x defines */
#define DM644X_SBL_PCR_VPSS (4)
-#define DM355_VPSSBL_INTSEL 0x10
-#define DM355_VPSSBL_EVTSEL 0x14
/* vpss BL register offsets */
#define DM355_VPSSBL_CCDCMUX 0x1c
/* vpss CLK register offsets */
-#define DM355_VPSSCLK_CLKCTRL 0x04
+#define DM355_VPSSCLK_CLKCTRL 0x4
+#define DM355_VPSSBL_PCR 0x4
+#define DM355_VPSSBL_MEMCTRL 0x18
+
/* masks and shifts */
-#define VPSS_HSSISEL_SHIFT 4
-/*
- * VDINT0 - vpss_int0, VDINT1 - vpss_int1, H3A - vpss_int4,
- * IPIPE_INT1_SDR - vpss_int5
- */
-#define DM355_VPSSBL_INTSEL_DEFAULT 0xff83ff10
-/* VENCINT - vpss_int8 */
-#define DM355_VPSSBL_EVTSEL_DEFAULT 0x4
-
-#define DM365_ISP5_PCCR 0x04
-#define DM365_ISP5_PCCR_BL_CLK_ENABLE BIT(0)
-#define DM365_ISP5_PCCR_ISIF_CLK_ENABLE BIT(1)
-#define DM365_ISP5_PCCR_H3A_CLK_ENABLE BIT(2)
-#define DM365_ISP5_PCCR_RSZ_CLK_ENABLE BIT(3)
-#define DM365_ISP5_PCCR_IPIPE_CLK_ENABLE BIT(4)
-#define DM365_ISP5_PCCR_IPIPEIF_CLK_ENABLE BIT(5)
-#define DM365_ISP5_PCCR_RSV BIT(6)
-
-#define DM365_ISP5_BCR 0x08
-#define DM365_ISP5_BCR_ISIF_OUT_ENABLE BIT(1)
-
-#define DM365_ISP5_INTSEL1 0x10
-#define DM365_ISP5_INTSEL2 0x14
-#define DM365_ISP5_INTSEL3 0x18
-#define DM365_ISP5_CCDCMUX 0x20
+#define DM365_PCCR 0x04
+#define DM365_ISP_REG_BASE 0x01c70000
+#define DM365_VPSS_REG_BASE 0x01c70200
+#define DM365_VPBE_CLK_CTRL 0x00
+#define DM365_ISP5_CCDCMUX 0x20
#define DM365_ISP5_PG_FRAME_SIZE 0x28
-#define DM365_VPBE_CLK_CTRL 0x00
-
-#define VPSS_CLK_CTRL 0x01c40044
-#define VPSS_CLK_CTRL_VENCCLKEN BIT(3)
-#define VPSS_CLK_CTRL_DACCLKEN BIT(4)
-
-/*
- * vpss interrupts. VDINT0 - vpss_int0, VDINT1 - vpss_int1,
- * AF - vpss_int3
- */
-#define DM365_ISP5_INTSEL1_DEFAULT 0x0b1f0100
-/* AEW - vpss_int6, RSZ_INT_DMA - vpss_int5 */
-#define DM365_ISP5_INTSEL2_DEFAULT 0x1f0a0f1f
-/* VENC - vpss_int8 */
-#define DM365_ISP5_INTSEL3_DEFAULT 0x00000015
-
-/* masks and shifts for DM365*/
#define DM365_CCDC_PG_VD_POL_SHIFT 0
#define DM365_CCDC_PG_HD_POL_SHIFT 1
+#define DM365_VPSS_INTSTAT 0x0C
+#define DM365_VPSS_INTSEL1 0x10
+
+#define VPSS_CLK_CTRL 0x01C40044
#define CCD_SRC_SEL_MASK (BIT_MASK(5) | BIT_MASK(4))
#define CCD_SRC_SEL_SHIFT 4
+#define CCD_INT_SEL_MASK (BIT_MASK(12) | BIT_MASK(11)|\
+ BIT_MASK(10) | BIT_MASK(9) |\
+ BIT_MASK(8) | BIT_MASK(4) |\
+ BIT_MASK(3) | BIT_MASK(2) |\
+ BIT_MASK(1) | BIT_MASK(0))
-/* Different SoC platforms supported by this driver */
-enum vpss_platform_type {
- DM644X,
- DM355,
- DM365,
-};
+#define VPSS_HSSISEL_SHIFT 4
-/*
+
+/**
* vpss operations. Depends on platform. Not all functions are available
- * on all platforms. The api, first check if a functio is available before
- * invoking it. In the probe, the function ptrs are initialized based on
+ * on all platforms. The api, first check if a function is available before
+ * invoking it. In the probe, the function ptrs are intialized based on
* vpss name. vpss name can be "dm355_vpss", "dm644x_vpss" etc.
*/
struct vpss_hw_ops {
@@ -123,7 +93,11 @@ struct vpss_oper_config {
__iomem void *vpss_regs_base0;
__iomem void *vpss_regs_base1;
resource_size_t *vpss_regs_base2;
- enum vpss_platform_type platform;
+ struct resource *r1;
+ resource_size_t len1;
+ struct resource *r2;
+ resource_size_t len2;
+ char vpss_name[32];
spinlock_t vpss_lock;
struct vpss_hw_ops hw_ops;
};
@@ -138,7 +112,25 @@ static inline u32 bl_regr(u32 offset)
static inline void bl_regw(u32 val, u32 offset)
{
+ u32 read_value;
+
__raw_writel(val, oper_cfg.vpss_regs_base0 + offset);
+
+ read_value = __raw_readl(oper_cfg.vpss_regs_base0 + offset);
+}
+
+static inline u32 isp5_read(u32 offset)
+{
+ return __raw_readl(oper_cfg.vpss_regs_base0 + offset);
+}
+
+static inline void isp5_write(u32 val, u32 offset)
+{
+ u32 read_value;
+
+ __raw_writel(val, oper_cfg.vpss_regs_base0 + offset);
+
+ read_value = __raw_readl(oper_cfg.vpss_regs_base0 + offset);
}
static inline u32 vpss_regr(u32 offset)
@@ -148,19 +140,17 @@ static inline u32 vpss_regr(u32 offset)
static inline void vpss_regw(u32 val, u32 offset)
{
+ u32 read_value;
+
__raw_writel(val, oper_cfg.vpss_regs_base1 + offset);
-}
-/* For DM365 only */
-static inline u32 isp5_read(u32 offset)
-{
- return __raw_readl(oper_cfg.vpss_regs_base0 + offset);
+ read_value = __raw_readl(oper_cfg.vpss_regs_base1 + offset);
+
}
-/* For DM365 only */
-static inline void isp5_write(u32 val, u32 offset)
+static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
{
- __raw_writel(val, oper_cfg.vpss_regs_base0 + offset);
+ bl_regw(src_sel << VPSS_HSSISEL_SHIFT, DM355_VPSSBL_CCDCMUX);
}
static void dm365_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
@@ -175,9 +165,24 @@ static void dm365_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
isp5_write(temp, DM365_ISP5_CCDCMUX);
}
-static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
+/**
+ * dm365_dma_complete_interrupt - check and clear RSZ_INT_DMA
+ *
+ * This is called to update check and clear RSZ_INT_DMA interrupt
+ */
+static int dm365_dma_complete_interrupt(void)
{
- bl_regw(src_sel << VPSS_HSSISEL_SHIFT, DM355_VPSSBL_CCDCMUX);
+ u32 status;
+
+ status = isp5_read(DM365_VPSS_INTSTAT);
+ /* Check and clear bit 15 */
+ if (status & 0x8000) {
+ status &= 0x8000;
+ isp5_write(status, DM365_VPSS_INTSTAT);
+ /* clear the interrupt */
+ return 0;
+ }
+ return 1;
}
int vpss_dma_complete_interrupt(void)
@@ -185,15 +190,17 @@ int vpss_dma_complete_interrupt(void)
if (!oper_cfg.hw_ops.dma_complete_interrupt)
return 2;
return oper_cfg.hw_ops.dma_complete_interrupt();
+
}
EXPORT_SYMBOL(vpss_dma_complete_interrupt);
int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
{
if (!oper_cfg.hw_ops.select_ccdc_source)
- return -EINVAL;
+ return -1;
oper_cfg.hw_ops.select_ccdc_source(src_sel);
+
return 0;
}
EXPORT_SYMBOL(vpss_select_ccdc_source);
@@ -204,15 +211,162 @@ static int dm644x_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
if (wbl_sel < VPSS_PCR_AEW_WBL_0 ||
wbl_sel > VPSS_PCR_CCDC_WBL_O)
- return -EINVAL;
+ return -1;
/* writing a 0 clear the overflow */
mask = ~(mask << wbl_sel);
val = bl_regr(DM644X_SBL_PCR_VPSS) & mask;
bl_regw(val, DM644X_SBL_PCR_VPSS);
+
return 0;
}
+/**
+ * vpss_pcr_control - common function for updating vpsssbl pcr register
+ * @val: value to be written
+ * @mask: bit mask
+ * @shift: shift for mask and val
+ *
+ * This is called to update VPSSSBL PCR register
+ */
+static void vpss_pcr_control(int val, int mask, int shift)
+{
+ unsigned long flags;
+ u32 utemp;
+
+ spin_lock_irqsave(&oper_cfg.vpss_lock, flags);
+
+ utemp = bl_regr(DM355_VPSSBL_PCR);
+ mask <<= shift;
+ val <<= shift;
+ utemp &= (~mask);
+ utemp |= val;
+
+ bl_regw(utemp, DM355_VPSSBL_PCR);
+ spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags);
+}
+
+/**
+ * vpss_dm355_assign_wblctrl_master - select WBLCTRL/DDR2 read master
+ * @master: memory master
+ *
+ * This is called to assign DDR2/WBLCTRL master. Use this in only DM355
+ */
+void vpss_dm355_assign_wblctrl_master(enum dm355_wblctrl master)
+{
+ /* WBLCTRL is bit 6 */
+ vpss_pcr_control(master, 1, 6);
+}
+EXPORT_SYMBOL(vpss_dm355_assign_wblctrl_master);
+
+/**
+ * vpss_dm355_assign_rblctrl_master - select RBLCTRL/DDR2 read master
+ * @master: memory master
+ *
+ * This is called to assign DDR2/RBLCTRL master. Use this in only DM355
+ */
+void vpss_dm355_assign_rblctrl_master(enum dm355_rblctrl master)
+{
+ /* RBLCTRL is bit 5 & 4 */
+ vpss_pcr_control(master, 3, 5);
+}
+EXPORT_SYMBOL(vpss_dm355_assign_rblctrl_master);
+
+/**
+ * vpss_memory_control - common function for updating memory
+ * control register
+ * @en: enable/disable
+ * @mask: bit mask
+ *
+ * This is called to update memory control register
+ */
+static void vpss_mem_control(int en, u32 mask)
+{
+ unsigned long flags;
+ u32 utemp;
+
+ spin_lock_irqsave(&oper_cfg.vpss_lock, flags);
+ utemp = bl_regr(DM355_VPSSBL_MEMCTRL);
+ if (en)
+ utemp |= mask;
+ else
+ utemp &= (~mask);
+
+ bl_regw(utemp, DM355_VPSSBL_MEMCTRL);
+ spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags);
+}
+
+/**
+ * vpss_dm355_assign_dfc_memory_master - select dfc memory by IPIPE/CCDC
+ * @master: memory master
+ *
+ * This is called to assign dfc memory mastership to IPIPE or CCDC.
+ * Use this in only DM355
+ */
+void vpss_dm355_assign_dfc_memory_master(enum dm355_dfc_mem_sel master)
+{
+ if (master == DM355_DFC_MEM_IPIPE)
+ vpss_mem_control(0, 0x1);
+ else
+ vpss_mem_control(1, 0x1);
+}
+EXPORT_SYMBOL(vpss_dm355_assign_dfc_memory_master);
+
+/**
+ * vpss_dm355_ipipe_enable_any_address - IPIPE can use any address type
+ * @en: enable/disable non-aligned buffer address use.
+ *
+ * This is called to allow IPIPE to use non-aligned buffer address.
+ * Applicable only to DM355.
+ */
+void vpss_dm355_ipipe_enable_any_address(int en)
+{
+ if (en)
+ vpss_mem_control(1, 0x4);
+ else
+ vpss_mem_control(0, 0x4);
+}
+EXPORT_SYMBOL(vpss_dm355_ipipe_enable_any_address);
+
+/*
+ * vpss_dm355_assign_int_memory_master - assign internal module memory
+ * @master: master for internal memory
+ *
+ * This function will select the module that gets access to internal memory.
+ * Choice is either IPIPE or CFALD. Applicable only on DM355
+ */
+void vpss_dm355_assign_int_memory_master(enum dm355_int_mem_sel master)
+{
+ if (master == DM355_INT_MEM_IPIPE)
+ vpss_mem_control(0, 0x2);
+ else
+ vpss_mem_control(1, 0x2);
+
+}
+EXPORT_SYMBOL(vpss_dm355_assign_int_memory_master);
+
+#if 0
+static void dm365_enable_irq(void)
+{
+ u32 current_val = isp5_read(DM365_VPSS_INTSEL1);
+ /*just enable INTSEL0 and INTSEL1 and leave everything else as is*/
+ current_val &= ~(CCD_INT_SEL_MASK);
+ current_val |= BIT_MASK(8);
+ isp5_write(current_val, DM365_VPSS_INTSEL1);
+}
+#endif
+
+static void dm365_set_sync_pol(struct vpss_sync_pol sync)
+{
+ int val = 0;
+ val = isp5_read(DM365_ISP5_CCDCMUX);
+
+ val |= (sync.ccdpg_hdpol << DM365_CCDC_PG_HD_POL_SHIFT);
+ val |= (sync.ccdpg_vdpol << DM365_CCDC_PG_VD_POL_SHIFT);
+
+ isp5_write(val, DM365_ISP5_CCDCMUX);
+}
+
void vpss_set_sync_pol(struct vpss_sync_pol sync)
{
if (!oper_cfg.hw_ops.set_sync_pol)
@@ -222,16 +376,33 @@ void vpss_set_sync_pol(struct vpss_sync_pol sync)
}
EXPORT_SYMBOL(vpss_set_sync_pol);
+static void dm365_set_pg_frame_size(struct vpss_pg_frame_size frame_size)
+{
+ int current_reg = ((frame_size.hlpfr >> 1) - 1) << 16;
+
+ current_reg |= (frame_size.pplen - 1);
+ isp5_write(current_reg, DM365_ISP5_PG_FRAME_SIZE);
+}
+
+void vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size)
+{
+ if (!oper_cfg.hw_ops.set_pg_frame_size)
+ return;
+
+ oper_cfg.hw_ops.set_pg_frame_size(frame_size);
+}
+EXPORT_SYMBOL(vpss_set_pg_frame_size);
+
int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
{
if (!oper_cfg.hw_ops.clear_wbl_overflow)
- return -EINVAL;
+ return -1;
return oper_cfg.hw_ops.clear_wbl_overflow(wbl_sel);
}
EXPORT_SYMBOL(vpss_clear_wbl_overflow);
-/*
+/**
* dm355_enable_clock - Enable VPSS Clock
* @clock_sel: CLock to be enabled/disabled
* @en: enable/disable flag
@@ -265,7 +436,7 @@ static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en)
default:
printk(KERN_ERR "dm355_enable_clock:"
" Invalid selector: %d\n", clock_sel);
- return -EINVAL;
+ return -1;
}
spin_lock_irqsave(&oper_cfg.vpss_lock, flags);
@@ -277,13 +448,14 @@ static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en)
vpss_regw(utemp, DM355_VPSSCLK_CLKCTRL);
spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags);
+
return 0;
}
static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en)
{
unsigned long flags;
- u32 utemp, mask = 0x1, shift = 0, offset = DM365_ISP5_PCCR;
+ u32 utemp, mask = 0x1, shift = 0, offset = DM365_PCCR;
u32 (*read)(u32 offset) = isp5_read;
void(*write)(u32 val, u32 offset) = isp5_write;
@@ -369,152 +541,139 @@ static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en)
int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en)
{
if (!oper_cfg.hw_ops.enable_clock)
- return -EINVAL;
+ return -1;
return oper_cfg.hw_ops.enable_clock(clock_sel, en);
}
EXPORT_SYMBOL(vpss_enable_clock);
-void dm365_vpss_set_sync_pol(struct vpss_sync_pol sync)
-{
- int val = 0;
- val = isp5_read(DM365_ISP5_CCDCMUX);
-
- val |= (sync.ccdpg_hdpol << DM365_CCDC_PG_HD_POL_SHIFT);
- val |= (sync.ccdpg_vdpol << DM365_CCDC_PG_VD_POL_SHIFT);
-
- isp5_write(val, DM365_ISP5_CCDCMUX);
-}
-EXPORT_SYMBOL(dm365_vpss_set_sync_pol);
-
-void vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size)
-{
- if (!oper_cfg.hw_ops.set_pg_frame_size)
- return;
-
- oper_cfg.hw_ops.set_pg_frame_size(frame_size);
-}
-EXPORT_SYMBOL(vpss_set_pg_frame_size);
-
-void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size)
-{
- int current_reg = ((frame_size.hlpfr >> 1) - 1) << 16;
-
- current_reg |= (frame_size.pplen - 1);
- isp5_write(current_reg, DM365_ISP5_PG_FRAME_SIZE);
-}
-EXPORT_SYMBOL(dm365_vpss_set_pg_frame_size);
-
static int vpss_probe(struct platform_device *pdev)
{
- struct resource *r1, *r2;
- char *platform_name;
- int status;
+ int status, dm355 = 0, dm365 = 0;
if (!pdev->dev.platform_data) {
dev_err(&pdev->dev, "no platform data\n");
return -ENOENT;
}
+ strcpy(oper_cfg.vpss_name, pdev->dev.platform_data);
- platform_name = pdev->dev.platform_data;
- if (!strcmp(platform_name, "dm355_vpss"))
- oper_cfg.platform = DM355;
- else if (!strcmp(platform_name, "dm365_vpss"))
- oper_cfg.platform = DM365;
- else if (!strcmp(platform_name, "dm644x_vpss"))
- oper_cfg.platform = DM644X;
- else {
+ if (!strcmp(oper_cfg.vpss_name, "dm355_vpss"))
+ dm355 = 1;
+ else if (!strcmp(oper_cfg.vpss_name, "dm365_vpss"))
+ dm365 = 1;
+ else if (strcmp(oper_cfg.vpss_name, "dm644x_vpss")) {
dev_err(&pdev->dev, "vpss driver not supported on"
" this platform\n");
return -ENODEV;
}
- dev_info(&pdev->dev, "%s vpss probed\n", platform_name);
- r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!r1)
+ dev_info(&pdev->dev, "%s vpss probed\n", oper_cfg.vpss_name);
+ oper_cfg.r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!oper_cfg.r1)
return -ENOENT;
- r1 = request_mem_region(r1->start, resource_size(r1), r1->name);
- if (!r1)
+ oper_cfg.len1 = oper_cfg.r1->end - oper_cfg.r1->start + 1;
+
+ oper_cfg.r1 = request_mem_region(oper_cfg.r1->start, oper_cfg.len1,
+ oper_cfg.r1->name);
+ if (!oper_cfg.r1)
return -EBUSY;
- oper_cfg.vpss_regs_base0 = ioremap(r1->start, resource_size(r1));
+ oper_cfg.vpss_regs_base0 = ioremap(oper_cfg.r1->start, oper_cfg.len1);
if (!oper_cfg.vpss_regs_base0) {
status = -EBUSY;
goto fail1;
}
- if (oper_cfg.platform == DM355 || oper_cfg.platform == DM365) {
- r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!r2) {
+ if (dm355 || dm365) {
+ oper_cfg.r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!oper_cfg.r2) {
status = -ENOENT;
goto fail2;
}
- r2 = request_mem_region(r2->start, resource_size(r2), r2->name);
- if (!r2) {
+ oper_cfg.len2 = oper_cfg.r2->end - oper_cfg.r2->start + 1;
+ oper_cfg.r2 = request_mem_region(oper_cfg.r2->start,
+ oper_cfg.len2,
+ oper_cfg.r2->name);
+ if (!oper_cfg.r2) {
status = -EBUSY;
goto fail2;
}
- oper_cfg.vpss_regs_base1 = ioremap(r2->start,
- resource_size(r2));
+ oper_cfg.vpss_regs_base1 = ioremap(oper_cfg.r2->start,
+ oper_cfg.len2);
if (!oper_cfg.vpss_regs_base1) {
status = -EBUSY;
goto fail3;
}
}
- if (oper_cfg.platform == DM355) {
+ if (dm355) {
oper_cfg.hw_ops.enable_clock = dm355_enable_clock;
oper_cfg.hw_ops.select_ccdc_source = dm355_select_ccdc_source;
- /* Setup vpss interrupts */
- bl_regw(DM355_VPSSBL_INTSEL_DEFAULT, DM355_VPSSBL_INTSEL);
- bl_regw(DM355_VPSSBL_EVTSEL_DEFAULT, DM355_VPSSBL_EVTSEL);
- } else if (oper_cfg.platform == DM365) {
+ } else if (dm365) {
oper_cfg.hw_ops.enable_clock = dm365_enable_clock;
oper_cfg.hw_ops.select_ccdc_source = dm365_select_ccdc_source;
- /* Setup vpss interrupts */
- isp5_write((isp5_read(DM365_ISP5_PCCR) |
- DM365_ISP5_PCCR_BL_CLK_ENABLE |
- DM365_ISP5_PCCR_ISIF_CLK_ENABLE |
- DM365_ISP5_PCCR_H3A_CLK_ENABLE |
- DM365_ISP5_PCCR_RSZ_CLK_ENABLE |
- DM365_ISP5_PCCR_IPIPE_CLK_ENABLE |
- DM365_ISP5_PCCR_IPIPEIF_CLK_ENABLE |
- DM365_ISP5_PCCR_RSV), DM365_ISP5_PCCR);
- isp5_write((isp5_read(DM365_ISP5_BCR) |
- DM365_ISP5_BCR_ISIF_OUT_ENABLE), DM365_ISP5_BCR);
- isp5_write(DM365_ISP5_INTSEL1_DEFAULT, DM365_ISP5_INTSEL1);
- isp5_write(DM365_ISP5_INTSEL2_DEFAULT, DM365_ISP5_INTSEL2);
- isp5_write(DM365_ISP5_INTSEL3_DEFAULT, DM365_ISP5_INTSEL3);
- } else
+ oper_cfg.hw_ops.set_sync_pol = dm365_set_sync_pol;
+ oper_cfg.hw_ops.set_pg_frame_size = dm365_set_pg_frame_size;
+ oper_cfg.hw_ops.dma_complete_interrupt =
+ dm365_dma_complete_interrupt;
+
+ } else if (!strcmp(oper_cfg.vpss_name, "dm644x_vpss"))
oper_cfg.hw_ops.clear_wbl_overflow = dm644x_clear_wbl_overflow;
+ if (dm355) {
+ /*
+ * These values being written to INTSEL and EVTSEL
+ * registers match those in LSP 2.10
+ */
+ bl_regw(0xff83ff10, 0x10);
+ bl_regw(0x7b3c0004, 0x14);
+ }
+ if (dm365) {
+ /**
+ * These values being written to INTSEL and EVTSEL
+ * registers match those in LSP 2.10
+ */
+ isp5_write((isp5_read(0x4) | 0x0000007f), 0x4);
+ isp5_write((isp5_read(0x8) | 0x00000002), 0x8);
+ /* INT0, INT1, AF */
+ isp5_write((isp5_read(0x10) | 0x0b1f0100), 0x10);
+ /* AEW, RSZ_INT_DMA */
+#ifdef CONFIG_VIDEO_YCBCR
+ isp5_write((isp5_read(0x14) | 0x1f0a160d), 0x14);
+#else
+ isp5_write((isp5_read(0x14) | 0x1f0a0f0d), 0x14);
+#endif
+ /* VENC */
+ isp5_write((isp5_read(0x18) | 0x00000015), 0x18);
+ /* No event selected */
+ isp5_write((isp5_read(0x1c) | 0x00000000), 0x1c);
+ }
+
spin_lock_init(&oper_cfg.vpss_lock);
- dev_info(&pdev->dev, "%s vpss probe success\n", platform_name);
+ dev_info(&pdev->dev, "%s vpss probe success\n", oper_cfg.vpss_name);
return 0;
fail3:
- release_mem_region(r2->start, resource_size(r2));
+ release_mem_region(oper_cfg.r2->start, oper_cfg.len2);
fail2:
iounmap(oper_cfg.vpss_regs_base0);
fail1:
- release_mem_region(r1->start, resource_size(r1));
+ release_mem_region(oper_cfg.r1->start, oper_cfg.len1);
return status;
}
static int vpss_remove(struct platform_device *pdev)
{
- struct resource *res;
-
iounmap(oper_cfg.vpss_regs_base0);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- release_mem_region(res->start, resource_size(res));
- if (oper_cfg.platform == DM355 || oper_cfg.platform == DM365) {
+ release_mem_region(oper_cfg.r1->start, oper_cfg.len1);
+ if (!strcmp(oper_cfg.vpss_name, "dm355_vpss") ||
+ !strcmp(oper_cfg.vpss_name, "dm365_vpss")) {
iounmap(oper_cfg.vpss_regs_base1);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- release_mem_region(res->start, resource_size(res));
+ release_mem_region(oper_cfg.r2->start, oper_cfg.len2);
}
+
return 0;
}
@@ -530,19 +689,18 @@ static struct platform_driver vpss_driver = {
static void vpss_exit(void)
{
iounmap(oper_cfg.vpss_regs_base2);
- release_mem_region(VPSS_CLK_CTRL, 4);
+ release_mem_region(*oper_cfg.vpss_regs_base2, 4);
platform_driver_unregister(&vpss_driver);
}
static int __init vpss_init(void)
{
- if (!request_mem_region(VPSS_CLK_CTRL, 4, "vpss_clock_control"))
+ if (request_mem_region(VPSS_CLK_CTRL, 4, "vpss_clock_control")) {
+ oper_cfg.vpss_regs_base2 = ioremap(VPSS_CLK_CTRL, 4);
+ __raw_writel(0x18, oper_cfg.vpss_regs_base2);
+ } else
return -EBUSY;
- oper_cfg.vpss_regs_base2 = ioremap(VPSS_CLK_CTRL, 4);
- writel(VPSS_CLK_CTRL_VENCCLKEN |
- VPSS_CLK_CTRL_DACCLKEN, oper_cfg.vpss_regs_base2);
-
return platform_driver_register(&vpss_driver);
}
subsys_initcall(vpss_init);
diff --git a/drivers/media/platform/soc_camera/soc_mediabus.c b/drivers/media/platform/soc_camera/soc_mediabus.c
index 89dce097..ff965d8e 100644
--- a/drivers/media/platform/soc_camera/soc_mediabus.c
+++ b/drivers/media/platform/soc_camera/soc_mediabus.c
@@ -12,9 +12,8 @@
#include <linux/module.h>
#include <media/v4l2-device.h>
-#include <media/v4l2-mediabus.h>
#include <media/soc_mediabus.h>
-
+#define V4L2_MBUS_FMT_JPEG_1X8 0x4001
static const struct soc_mbus_lookup mbus_fmt[] = {
{
.code = V4L2_MBUS_FMT_YUYV8_2X8,
diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile
index 768aaf62..5ab4ae56 100644
--- a/drivers/media/v4l2-core/Makefile
+++ b/drivers/media/v4l2-core/Makefile
@@ -4,8 +4,7 @@
tuner-objs := tuner-core.o
-videodev-objs := v4l2-dev.o v4l2-ioctl.o v4l2-device.o v4l2-fh.o \
- v4l2-event.o v4l2-ctrls.o v4l2-subdev.o
+videodev-objs := v4l2-dev.o v4l2-ioctl.o v4l2-device.o
ifeq ($(CONFIG_COMPAT),y)
videodev-objs += v4l2-compat-ioctl32.o
endif
diff --git a/drivers/media/v4l2-core/v4l1-compat.c b/drivers/media/v4l2-core/v4l1-compat.c
new file mode 100644
index 00000000..0c2105ca
--- /dev/null
+++ b/drivers/media/v4l2-core/v4l1-compat.c
@@ -0,0 +1,1270 @@
+/*
+ *
+ * Video for Linux Two
+ * Backward Compatibility Layer
+ *
+ * Support subroutines for providing V4L2 drivers with backward
+ * compatibility with applications using the old API.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Author: Bill Dirks <bill@thedirks.org>
+ * et al.
+ *
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/videodev.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ioctl.h>
+
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+
+static unsigned int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "enable debug messages");
+MODULE_AUTHOR("Bill Dirks");
+MODULE_DESCRIPTION("v4l(1) compatibility layer for v4l2 drivers.");
+MODULE_LICENSE("GPL");
+
+#define dprintk(fmt, arg...) \
+ do { \
+ if (debug) \
+ printk(KERN_DEBUG "v4l1-compat: " fmt , ## arg);\
+ } while (0)
+
+/*
+ * I O C T L T R A N S L A T I O N
+ *
+ * From here on down is the code for translating the numerous
+ * ioctl commands from the old API to the new API.
+ */
+
+static int
+get_v4l_control(struct file *file,
+ int cid,
+ v4l2_kioctl drv)
+{
+ struct v4l2_queryctrl qctrl2;
+ struct v4l2_control ctrl2;
+ int err;
+
+ qctrl2.id = cid;
+ err = drv(file, VIDIOC_QUERYCTRL, &qctrl2);
+ if (err < 0)
+ dprintk("VIDIOC_QUERYCTRL: %d\n", err);
+ if (err == 0 && !(qctrl2.flags & V4L2_CTRL_FLAG_DISABLED)) {
+ ctrl2.id = qctrl2.id;
+ err = drv(file, VIDIOC_G_CTRL, &ctrl2);
+ if (err < 0) {
+ dprintk("VIDIOC_G_CTRL: %d\n", err);
+ return 0;
+ }
+ return DIV_ROUND_CLOSEST((ctrl2.value-qctrl2.minimum) * 65535,
+ qctrl2.maximum - qctrl2.minimum);
+ }
+ return 0;
+}
+
+static int
+set_v4l_control(struct file *file,
+ int cid,
+ int value,
+ v4l2_kioctl drv)
+{
+ struct v4l2_queryctrl qctrl2;
+ struct v4l2_control ctrl2;
+ int err;
+
+ qctrl2.id = cid;
+ err = drv(file, VIDIOC_QUERYCTRL, &qctrl2);
+ if (err < 0)
+ dprintk("VIDIOC_QUERYCTRL: %d\n", err);
+ if (err == 0 &&
+ !(qctrl2.flags & V4L2_CTRL_FLAG_DISABLED) &&
+ !(qctrl2.flags & V4L2_CTRL_FLAG_GRABBED)) {
+ if (value < 0)
+ value = 0;
+ if (value > 65535)
+ value = 65535;
+ if (value && qctrl2.type == V4L2_CTRL_TYPE_BOOLEAN)
+ value = 65535;
+ ctrl2.id = qctrl2.id;
+ ctrl2.value =
+ (value * (qctrl2.maximum - qctrl2.minimum)
+ + 32767)
+ / 65535;
+ ctrl2.value += qctrl2.minimum;
+ err = drv(file, VIDIOC_S_CTRL, &ctrl2);
+ if (err < 0)
+ dprintk("VIDIOC_S_CTRL: %d\n", err);
+ }
+ return 0;
+}
+
+/* ----------------------------------------------------------------- */
+
+static const unsigned int palette2pixelformat[] = {
+ [VIDEO_PALETTE_GREY] = V4L2_PIX_FMT_GREY,
+ [VIDEO_PALETTE_RGB555] = V4L2_PIX_FMT_RGB555,
+ [VIDEO_PALETTE_RGB565] = V4L2_PIX_FMT_RGB565,
+ [VIDEO_PALETTE_RGB24] = V4L2_PIX_FMT_BGR24,
+ [VIDEO_PALETTE_RGB32] = V4L2_PIX_FMT_BGR32,
+ /* yuv packed pixel */
+ [VIDEO_PALETTE_YUYV] = V4L2_PIX_FMT_YUYV,
+ [VIDEO_PALETTE_YUV422] = V4L2_PIX_FMT_YUYV,
+ [VIDEO_PALETTE_UYVY] = V4L2_PIX_FMT_UYVY,
+ /* yuv planar */
+ [VIDEO_PALETTE_YUV410P] = V4L2_PIX_FMT_YUV410,
+ [VIDEO_PALETTE_YUV420] = V4L2_PIX_FMT_YUV420,
+ [VIDEO_PALETTE_YUV420P] = V4L2_PIX_FMT_YUV420,
+ [VIDEO_PALETTE_YUV411P] = V4L2_PIX_FMT_YUV411P,
+ [VIDEO_PALETTE_YUV422P] = V4L2_PIX_FMT_YUV422P,
+};
+
+static unsigned int __pure
+palette_to_pixelformat(unsigned int palette)
+{
+ if (palette < ARRAY_SIZE(palette2pixelformat))
+ return palette2pixelformat[palette];
+ else
+ return 0;
+}
+
+static unsigned int __attribute_const__
+pixelformat_to_palette(unsigned int pixelformat)
+{
+ int palette = 0;
+ switch (pixelformat) {
+ case V4L2_PIX_FMT_GREY:
+ palette = VIDEO_PALETTE_GREY;
+ break;
+ case V4L2_PIX_FMT_RGB555:
+ palette = VIDEO_PALETTE_RGB555;
+ break;
+ case V4L2_PIX_FMT_RGB565:
+ palette = VIDEO_PALETTE_RGB565;
+ break;
+ case V4L2_PIX_FMT_BGR24:
+ palette = VIDEO_PALETTE_RGB24;
+ break;
+ case V4L2_PIX_FMT_BGR32:
+ palette = VIDEO_PALETTE_RGB32;
+ break;
+ /* yuv packed pixel */
+ case V4L2_PIX_FMT_YUYV:
+ palette = VIDEO_PALETTE_YUYV;
+ break;
+ case V4L2_PIX_FMT_UYVY:
+ palette = VIDEO_PALETTE_UYVY;
+ break;
+ /* yuv planar */
+ case V4L2_PIX_FMT_YUV410:
+ palette = VIDEO_PALETTE_YUV420;
+ break;
+ case V4L2_PIX_FMT_YUV420:
+ palette = VIDEO_PALETTE_YUV420;
+ break;
+ case V4L2_PIX_FMT_YUV411P:
+ palette = VIDEO_PALETTE_YUV411P;
+ break;
+ case V4L2_PIX_FMT_YUV422P:
+ palette = VIDEO_PALETTE_YUV422P;
+ break;
+ }
+ return palette;
+}
+
+/* ----------------------------------------------------------------- */
+
+static int poll_one(struct file *file, struct poll_wqueues *pwq)
+{
+ int retval = 1;
+ poll_table *table;
+
+ poll_initwait(pwq);
+ table = &pwq->pt;
+ for (;;) {
+ int mask;
+ mask = file->f_op->poll(file, table);
+ if (mask & POLLIN)
+ break;
+ table = NULL;
+ if (signal_pending(current)) {
+ retval = -ERESTARTSYS;
+ break;
+ }
+ poll_schedule(pwq, TASK_INTERRUPTIBLE);
+ }
+ poll_freewait(pwq);
+ return retval;
+}
+
+static int count_inputs(
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ struct v4l2_input input2;
+ int i;
+
+ for (i = 0;; i++) {
+ memset(&input2, 0, sizeof(input2));
+ input2.index = i;
+ if (0 != drv(file, VIDIOC_ENUMINPUT, &input2))
+ break;
+ }
+ return i;
+}
+
+static int check_size(
+ struct file *file,
+ v4l2_kioctl drv,
+ int *maxw,
+ int *maxh)
+{
+ struct v4l2_fmtdesc desc2;
+ struct v4l2_format fmt2;
+
+ memset(&desc2, 0, sizeof(desc2));
+ memset(&fmt2, 0, sizeof(fmt2));
+
+ desc2.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ if (0 != drv(file, VIDIOC_ENUM_FMT, &desc2))
+ goto done;
+
+ fmt2.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ fmt2.fmt.pix.width = 10000;
+ fmt2.fmt.pix.height = 10000;
+ fmt2.fmt.pix.pixelformat = desc2.pixelformat;
+ if (0 != drv(file, VIDIOC_TRY_FMT, &fmt2))
+ goto done;
+
+ *maxw = fmt2.fmt.pix.width;
+ *maxh = fmt2.fmt.pix.height;
+
+done:
+ return 0;
+}
+
+/* ----------------------------------------------------------------- */
+
+static noinline long v4l1_compat_get_capabilities(
+ struct video_capability *cap,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_framebuffer fbuf;
+ struct v4l2_capability *cap2;
+
+ cap2 = kzalloc(sizeof(*cap2), GFP_KERNEL);
+ if (!cap2) {
+ err = -ENOMEM;
+ return err;
+ }
+ memset(cap, 0, sizeof(*cap));
+ memset(&fbuf, 0, sizeof(fbuf));
+
+ err = drv(file, VIDIOC_QUERYCAP, cap2);
+ if (err < 0) {
+ dprintk("VIDIOCGCAP / VIDIOC_QUERYCAP: %ld\n", err);
+ goto done;
+ }
+ if (cap2->capabilities & V4L2_CAP_VIDEO_OVERLAY) {
+ err = drv(file, VIDIOC_G_FBUF, &fbuf);
+ if (err < 0) {
+ dprintk("VIDIOCGCAP / VIDIOC_G_FBUF: %ld\n", err);
+ memset(&fbuf, 0, sizeof(fbuf));
+ }
+ err = 0;
+ }
+
+ memcpy(cap->name, cap2->card,
+ min(sizeof(cap->name), sizeof(cap2->card)));
+ cap->name[sizeof(cap->name) - 1] = 0;
+ if (cap2->capabilities & V4L2_CAP_VIDEO_CAPTURE)
+ cap->type |= VID_TYPE_CAPTURE;
+ if (cap2->capabilities & V4L2_CAP_TUNER)
+ cap->type |= VID_TYPE_TUNER;
+ if (cap2->capabilities & V4L2_CAP_VBI_CAPTURE)
+ cap->type |= VID_TYPE_TELETEXT;
+ if (cap2->capabilities & V4L2_CAP_VIDEO_OVERLAY)
+ cap->type |= VID_TYPE_OVERLAY;
+ if (fbuf.capability & V4L2_FBUF_CAP_LIST_CLIPPING)
+ cap->type |= VID_TYPE_CLIPPING;
+
+ cap->channels = count_inputs(file, drv);
+ check_size(file, drv,
+ &cap->maxwidth, &cap->maxheight);
+ cap->audios = 0; /* FIXME */
+ cap->minwidth = 48; /* FIXME */
+ cap->minheight = 32; /* FIXME */
+
+done:
+ kfree(cap2);
+ return err;
+}
+
+static noinline long v4l1_compat_get_frame_buffer(
+ struct video_buffer *buffer,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_framebuffer fbuf;
+
+ memset(buffer, 0, sizeof(*buffer));
+ memset(&fbuf, 0, sizeof(fbuf));
+
+ err = drv(file, VIDIOC_G_FBUF, &fbuf);
+ if (err < 0) {
+ dprintk("VIDIOCGFBUF / VIDIOC_G_FBUF: %ld\n", err);
+ goto done;
+ }
+ buffer->base = fbuf.base;
+ buffer->height = fbuf.fmt.height;
+ buffer->width = fbuf.fmt.width;
+
+ switch (fbuf.fmt.pixelformat) {
+ case V4L2_PIX_FMT_RGB332:
+ buffer->depth = 8;
+ break;
+ case V4L2_PIX_FMT_RGB555:
+ buffer->depth = 15;
+ break;
+ case V4L2_PIX_FMT_RGB565:
+ buffer->depth = 16;
+ break;
+ case V4L2_PIX_FMT_BGR24:
+ buffer->depth = 24;
+ break;
+ case V4L2_PIX_FMT_BGR32:
+ buffer->depth = 32;
+ break;
+ default:
+ buffer->depth = 0;
+ }
+ if (fbuf.fmt.bytesperline) {
+ buffer->bytesperline = fbuf.fmt.bytesperline;
+ if (!buffer->depth && buffer->width)
+ buffer->depth = ((fbuf.fmt.bytesperline<<3)
+ + (buffer->width-1))
+ / buffer->width;
+ } else {
+ buffer->bytesperline =
+ (buffer->width * buffer->depth + 7) & 7;
+ buffer->bytesperline >>= 3;
+ }
+done:
+ return err;
+}
+
+static noinline long v4l1_compat_set_frame_buffer(
+ struct video_buffer *buffer,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_framebuffer fbuf;
+
+ memset(&fbuf, 0, sizeof(fbuf));
+ fbuf.base = buffer->base;
+ fbuf.fmt.height = buffer->height;
+ fbuf.fmt.width = buffer->width;
+ switch (buffer->depth) {
+ case 8:
+ fbuf.fmt.pixelformat = V4L2_PIX_FMT_RGB332;
+ break;
+ case 15:
+ fbuf.fmt.pixelformat = V4L2_PIX_FMT_RGB555;
+ break;
+ case 16:
+ fbuf.fmt.pixelformat = V4L2_PIX_FMT_RGB565;
+ break;
+ case 24:
+ fbuf.fmt.pixelformat = V4L2_PIX_FMT_BGR24;
+ break;
+ case 32:
+ fbuf.fmt.pixelformat = V4L2_PIX_FMT_BGR32;
+ break;
+ }
+ fbuf.fmt.bytesperline = buffer->bytesperline;
+ err = drv(file, VIDIOC_S_FBUF, &fbuf);
+ if (err < 0)
+ dprintk("VIDIOCSFBUF / VIDIOC_S_FBUF: %ld\n", err);
+ return err;
+}
+
+static noinline long v4l1_compat_get_win_cap_dimensions(
+ struct video_window *win,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_format *fmt;
+
+ fmt = kzalloc(sizeof(*fmt), GFP_KERNEL);
+ if (!fmt) {
+ err = -ENOMEM;
+ return err;
+ }
+ memset(win, 0, sizeof(*win));
+
+ fmt->type = V4L2_BUF_TYPE_VIDEO_OVERLAY;
+ err = drv(file, VIDIOC_G_FMT, fmt);
+ if (err < 0)
+ dprintk("VIDIOCGWIN / VIDIOC_G_WIN: %ld\n", err);
+ if (err == 0) {
+ win->x = fmt->fmt.win.w.left;
+ win->y = fmt->fmt.win.w.top;
+ win->width = fmt->fmt.win.w.width;
+ win->height = fmt->fmt.win.w.height;
+ win->chromakey = fmt->fmt.win.chromakey;
+ win->clips = NULL;
+ win->clipcount = 0;
+ goto done;
+ }
+
+ fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ err = drv(file, VIDIOC_G_FMT, fmt);
+ if (err < 0) {
+ dprintk("VIDIOCGWIN / VIDIOC_G_FMT: %ld\n", err);
+ goto done;
+ }
+ win->x = 0;
+ win->y = 0;
+ win->width = fmt->fmt.pix.width;
+ win->height = fmt->fmt.pix.height;
+ win->chromakey = 0;
+ win->clips = NULL;
+ win->clipcount = 0;
+done:
+ kfree(fmt);
+ return err;
+}
+
+static noinline long v4l1_compat_set_win_cap_dimensions(
+ struct video_window *win,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err, err1, err2;
+ struct v4l2_format *fmt;
+
+ fmt = kzalloc(sizeof(*fmt), GFP_KERNEL);
+ if (!fmt) {
+ err = -ENOMEM;
+ return err;
+ }
+ fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ drv(file, VIDIOC_STREAMOFF, &fmt->type);
+ err1 = drv(file, VIDIOC_G_FMT, fmt);
+ if (err1 < 0)
+ dprintk("VIDIOCSWIN / VIDIOC_G_FMT: %ld\n", err1);
+ if (err1 == 0) {
+ fmt->fmt.pix.width = win->width;
+ fmt->fmt.pix.height = win->height;
+ fmt->fmt.pix.field = V4L2_FIELD_ANY;
+ fmt->fmt.pix.bytesperline = 0;
+ err = drv(file, VIDIOC_S_FMT, fmt);
+ if (err < 0)
+ dprintk("VIDIOCSWIN / VIDIOC_S_FMT #1: %ld\n",
+ err);
+ win->width = fmt->fmt.pix.width;
+ win->height = fmt->fmt.pix.height;
+ }
+
+ memset(fmt, 0, sizeof(*fmt));
+ fmt->type = V4L2_BUF_TYPE_VIDEO_OVERLAY;
+ fmt->fmt.win.w.left = win->x;
+ fmt->fmt.win.w.top = win->y;
+ fmt->fmt.win.w.width = win->width;
+ fmt->fmt.win.w.height = win->height;
+ fmt->fmt.win.chromakey = win->chromakey;
+ fmt->fmt.win.clips = (void __user *)win->clips;
+ fmt->fmt.win.clipcount = win->clipcount;
+ err2 = drv(file, VIDIOC_S_FMT, fmt);
+ if (err2 < 0)
+ dprintk("VIDIOCSWIN / VIDIOC_S_FMT #2: %ld\n", err2);
+
+ if (err1 != 0 && err2 != 0)
+ err = err1;
+ else
+ err = 0;
+ kfree(fmt);
+ return err;
+}
+
+static noinline long v4l1_compat_turn_preview_on_off(
+ int *on,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ enum v4l2_buf_type captype = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ if (0 == *on) {
+ /* dirty hack time. But v4l1 has no STREAMOFF
+ * equivalent in the API, and this one at
+ * least comes close ... */
+ drv(file, VIDIOC_STREAMOFF, &captype);
+ }
+ err = drv(file, VIDIOC_OVERLAY, on);
+ if (err < 0)
+ dprintk("VIDIOCCAPTURE / VIDIOC_PREVIEW: %ld\n", err);
+ return err;
+}
+
+static noinline long v4l1_compat_get_input_info(
+ struct video_channel *chan,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_input input2;
+ v4l2_std_id sid;
+
+ memset(&input2, 0, sizeof(input2));
+ input2.index = chan->channel;
+ err = drv(file, VIDIOC_ENUMINPUT, &input2);
+ if (err < 0) {
+ dprintk("VIDIOCGCHAN / VIDIOC_ENUMINPUT: "
+ "channel=%d err=%ld\n", chan->channel, err);
+ goto done;
+ }
+ chan->channel = input2.index;
+ memcpy(chan->name, input2.name,
+ min(sizeof(chan->name), sizeof(input2.name)));
+ chan->name[sizeof(chan->name) - 1] = 0;
+ chan->tuners = (input2.type == V4L2_INPUT_TYPE_TUNER) ? 1 : 0;
+ chan->flags = (chan->tuners) ? VIDEO_VC_TUNER : 0;
+ switch (input2.type) {
+ case V4L2_INPUT_TYPE_TUNER:
+ chan->type = VIDEO_TYPE_TV;
+ break;
+ default:
+ case V4L2_INPUT_TYPE_CAMERA:
+ chan->type = VIDEO_TYPE_CAMERA;
+ break;
+ }
+ chan->norm = 0;
+ /* Note: G_STD might not be present for radio receivers,
+ * so we should ignore any errors. */
+ if (drv(file, VIDIOC_G_STD, &sid) == 0) {
+ if (sid & V4L2_STD_PAL)
+ chan->norm = VIDEO_MODE_PAL;
+ if (sid & V4L2_STD_NTSC)
+ chan->norm = VIDEO_MODE_NTSC;
+ if (sid & V4L2_STD_SECAM)
+ chan->norm = VIDEO_MODE_SECAM;
+ if (sid == V4L2_STD_ALL)
+ chan->norm = VIDEO_MODE_AUTO;
+ }
+done:
+ return err;
+}
+
+static noinline long v4l1_compat_set_input(
+ struct video_channel *chan,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ v4l2_std_id sid = 0;
+
+ err = drv(file, VIDIOC_S_INPUT, &chan->channel);
+ if (err < 0)
+ dprintk("VIDIOCSCHAN / VIDIOC_S_INPUT: %ld\n", err);
+ switch (chan->norm) {
+ case VIDEO_MODE_PAL:
+ sid = V4L2_STD_PAL;
+ break;
+ case VIDEO_MODE_NTSC:
+ sid = V4L2_STD_NTSC;
+ break;
+ case VIDEO_MODE_SECAM:
+ sid = V4L2_STD_SECAM;
+ break;
+ case VIDEO_MODE_AUTO:
+ sid = V4L2_STD_ALL;
+ break;
+ }
+ if (0 != sid) {
+ err = drv(file, VIDIOC_S_STD, &sid);
+ if (err < 0)
+ dprintk("VIDIOCSCHAN / VIDIOC_S_STD: %ld\n", err);
+ }
+ return err;
+}
+
+static noinline long v4l1_compat_get_picture(
+ struct video_picture *pict,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_format *fmt;
+
+ fmt = kzalloc(sizeof(*fmt), GFP_KERNEL);
+ if (!fmt) {
+ err = -ENOMEM;
+ return err;
+ }
+
+ pict->brightness = get_v4l_control(file,
+ V4L2_CID_BRIGHTNESS, drv);
+ pict->hue = get_v4l_control(file,
+ V4L2_CID_HUE, drv);
+ pict->contrast = get_v4l_control(file,
+ V4L2_CID_CONTRAST, drv);
+ pict->colour = get_v4l_control(file,
+ V4L2_CID_SATURATION, drv);
+ pict->whiteness = get_v4l_control(file,
+ V4L2_CID_WHITENESS, drv);
+
+ fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ err = drv(file, VIDIOC_G_FMT, fmt);
+ if (err < 0) {
+ dprintk("VIDIOCGPICT / VIDIOC_G_FMT: %ld\n", err);
+ goto done;
+ }
+
+ pict->depth = ((fmt->fmt.pix.bytesperline << 3)
+ + (fmt->fmt.pix.width - 1))
+ / fmt->fmt.pix.width;
+ pict->palette = pixelformat_to_palette(
+ fmt->fmt.pix.pixelformat);
+done:
+ kfree(fmt);
+ return err;
+}
+
+static noinline long v4l1_compat_set_picture(
+ struct video_picture *pict,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_framebuffer fbuf;
+ int mem_err = 0, ovl_err = 0;
+ struct v4l2_format *fmt;
+
+ fmt = kzalloc(sizeof(*fmt), GFP_KERNEL);
+ if (!fmt) {
+ err = -ENOMEM;
+ return err;
+ }
+ memset(&fbuf, 0, sizeof(fbuf));
+
+ set_v4l_control(file,
+ V4L2_CID_BRIGHTNESS, pict->brightness, drv);
+ set_v4l_control(file,
+ V4L2_CID_HUE, pict->hue, drv);
+ set_v4l_control(file,
+ V4L2_CID_CONTRAST, pict->contrast, drv);
+ set_v4l_control(file,
+ V4L2_CID_SATURATION, pict->colour, drv);
+ set_v4l_control(file,
+ V4L2_CID_WHITENESS, pict->whiteness, drv);
+ /*
+ * V4L1 uses this ioctl to set both memory capture and overlay
+ * pixel format, while V4L2 has two different ioctls for this.
+ * Some cards may not support one or the other, and may support
+ * different pixel formats for memory vs overlay.
+ */
+
+ fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ err = drv(file, VIDIOC_G_FMT, fmt);
+ /* If VIDIOC_G_FMT failed, then the driver likely doesn't
+ support memory capture. Trying to set the memory capture
+ parameters would be pointless. */
+ if (err < 0) {
+ dprintk("VIDIOCSPICT / VIDIOC_G_FMT: %ld\n", err);
+ mem_err = -1000; /* didn't even try */
+ } else if (fmt->fmt.pix.pixelformat !=
+ palette_to_pixelformat(pict->palette)) {
+ fmt->fmt.pix.pixelformat = palette_to_pixelformat(
+ pict->palette);
+ mem_err = drv(file, VIDIOC_S_FMT, fmt);
+ if (mem_err < 0)
+ dprintk("VIDIOCSPICT / VIDIOC_S_FMT: %d\n",
+ mem_err);
+ }
+
+ err = drv(file, VIDIOC_G_FBUF, &fbuf);
+ /* If VIDIOC_G_FBUF failed, then the driver likely doesn't
+ support overlay. Trying to set the overlay parameters
+ would be quite pointless. */
+ if (err < 0) {
+ dprintk("VIDIOCSPICT / VIDIOC_G_FBUF: %ld\n", err);
+ ovl_err = -1000; /* didn't even try */
+ } else if (fbuf.fmt.pixelformat !=
+ palette_to_pixelformat(pict->palette)) {
+ fbuf.fmt.pixelformat = palette_to_pixelformat(
+ pict->palette);
+ ovl_err = drv(file, VIDIOC_S_FBUF, &fbuf);
+ if (ovl_err < 0)
+ dprintk("VIDIOCSPICT / VIDIOC_S_FBUF: %d\n",
+ ovl_err);
+ }
+ if (ovl_err < 0 && mem_err < 0) {
+ /* ioctl failed, couldn't set either parameter */
+ if (mem_err != -1000)
+ err = mem_err;
+ else if (ovl_err == -EPERM)
+ err = 0;
+ else
+ err = ovl_err;
+ } else
+ err = 0;
+ kfree(fmt);
+ return err;
+}
+
+static noinline long v4l1_compat_get_tuner(
+ struct video_tuner *tun,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ int i;
+ struct v4l2_tuner tun2;
+ struct v4l2_standard std2;
+ v4l2_std_id sid;
+
+ memset(&tun2, 0, sizeof(tun2));
+ err = drv(file, VIDIOC_G_TUNER, &tun2);
+ if (err < 0) {
+ dprintk("VIDIOCGTUNER / VIDIOC_G_TUNER: %ld\n", err);
+ goto done;
+ }
+ memcpy(tun->name, tun2.name,
+ min(sizeof(tun->name), sizeof(tun2.name)));
+ tun->name[sizeof(tun->name) - 1] = 0;
+ tun->rangelow = tun2.rangelow;
+ tun->rangehigh = tun2.rangehigh;
+ tun->flags = 0;
+ tun->mode = VIDEO_MODE_AUTO;
+
+ for (i = 0; i < 64; i++) {
+ memset(&std2, 0, sizeof(std2));
+ std2.index = i;
+ if (0 != drv(file, VIDIOC_ENUMSTD, &std2))
+ break;
+ if (std2.id & V4L2_STD_PAL)
+ tun->flags |= VIDEO_TUNER_PAL;
+ if (std2.id & V4L2_STD_NTSC)
+ tun->flags |= VIDEO_TUNER_NTSC;
+ if (std2.id & V4L2_STD_SECAM)
+ tun->flags |= VIDEO_TUNER_SECAM;
+ }
+
+ /* Note: G_STD might not be present for radio receivers,
+ * so we should ignore any errors. */
+ if (drv(file, VIDIOC_G_STD, &sid) == 0) {
+ if (sid & V4L2_STD_PAL)
+ tun->mode = VIDEO_MODE_PAL;
+ if (sid & V4L2_STD_NTSC)
+ tun->mode = VIDEO_MODE_NTSC;
+ if (sid & V4L2_STD_SECAM)
+ tun->mode = VIDEO_MODE_SECAM;
+ }
+
+ if (tun2.capability & V4L2_TUNER_CAP_LOW)
+ tun->flags |= VIDEO_TUNER_LOW;
+ if (tun2.rxsubchans & V4L2_TUNER_SUB_STEREO)
+ tun->flags |= VIDEO_TUNER_STEREO_ON;
+ tun->signal = tun2.signal;
+done:
+ return err;
+}
+
+static noinline long v4l1_compat_select_tuner(
+ struct video_tuner *tun,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_tuner t;/*84 bytes on x86_64*/
+ memset(&t, 0, sizeof(t));
+
+ t.index = tun->tuner;
+
+ err = drv(file, VIDIOC_S_TUNER, &t);
+ if (err < 0)
+ dprintk("VIDIOCSTUNER / VIDIOC_S_TUNER: %ld\n", err);
+ return err;
+}
+
+static noinline long v4l1_compat_get_frequency(
+ unsigned long *freq,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_frequency freq2;
+ memset(&freq2, 0, sizeof(freq2));
+
+ freq2.tuner = 0;
+ err = drv(file, VIDIOC_G_FREQUENCY, &freq2);
+ if (err < 0)
+ dprintk("VIDIOCGFREQ / VIDIOC_G_FREQUENCY: %ld\n", err);
+ if (0 == err)
+ *freq = freq2.frequency;
+ return err;
+}
+
+static noinline long v4l1_compat_set_frequency(
+ unsigned long *freq,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_frequency freq2;
+ memset(&freq2, 0, sizeof(freq2));
+
+ drv(file, VIDIOC_G_FREQUENCY, &freq2);
+ freq2.frequency = *freq;
+ err = drv(file, VIDIOC_S_FREQUENCY, &freq2);
+ if (err < 0)
+ dprintk("VIDIOCSFREQ / VIDIOC_S_FREQUENCY: %ld\n", err);
+ return err;
+}
+
+static noinline long v4l1_compat_get_audio(
+ struct video_audio *aud,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ int i;
+ struct v4l2_queryctrl qctrl2;
+ struct v4l2_audio aud2;
+ struct v4l2_tuner tun2;
+ memset(&aud2, 0, sizeof(aud2));
+
+ err = drv(file, VIDIOC_G_AUDIO, &aud2);
+ if (err < 0) {
+ dprintk("VIDIOCGAUDIO / VIDIOC_G_AUDIO: %ld\n", err);
+ goto done;
+ }
+ memcpy(aud->name, aud2.name,
+ min(sizeof(aud->name), sizeof(aud2.name)));
+ aud->name[sizeof(aud->name) - 1] = 0;
+ aud->audio = aud2.index;
+ aud->flags = 0;
+ i = get_v4l_control(file, V4L2_CID_AUDIO_VOLUME, drv);
+ if (i >= 0) {
+ aud->volume = i;
+ aud->flags |= VIDEO_AUDIO_VOLUME;
+ }
+ i = get_v4l_control(file, V4L2_CID_AUDIO_BASS, drv);
+ if (i >= 0) {
+ aud->bass = i;
+ aud->flags |= VIDEO_AUDIO_BASS;
+ }
+ i = get_v4l_control(file, V4L2_CID_AUDIO_TREBLE, drv);
+ if (i >= 0) {
+ aud->treble = i;
+ aud->flags |= VIDEO_AUDIO_TREBLE;
+ }
+ i = get_v4l_control(file, V4L2_CID_AUDIO_BALANCE, drv);
+ if (i >= 0) {
+ aud->balance = i;
+ aud->flags |= VIDEO_AUDIO_BALANCE;
+ }
+ i = get_v4l_control(file, V4L2_CID_AUDIO_MUTE, drv);
+ if (i >= 0) {
+ if (i)
+ aud->flags |= VIDEO_AUDIO_MUTE;
+ aud->flags |= VIDEO_AUDIO_MUTABLE;
+ }
+ aud->step = 1;
+ qctrl2.id = V4L2_CID_AUDIO_VOLUME;
+ if (drv(file, VIDIOC_QUERYCTRL, &qctrl2) == 0 &&
+ !(qctrl2.flags & V4L2_CTRL_FLAG_DISABLED))
+ aud->step = qctrl2.step;
+ aud->mode = 0;
+
+ memset(&tun2, 0, sizeof(tun2));
+ err = drv(file, VIDIOC_G_TUNER, &tun2);
+ if (err < 0) {
+ dprintk("VIDIOCGAUDIO / VIDIOC_G_TUNER: %ld\n", err);
+ err = 0;
+ goto done;
+ }
+
+ if (tun2.rxsubchans & V4L2_TUNER_SUB_LANG2)
+ aud->mode = VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
+ else if (tun2.rxsubchans & V4L2_TUNER_SUB_STEREO)
+ aud->mode = VIDEO_SOUND_STEREO;
+ else if (tun2.rxsubchans & V4L2_TUNER_SUB_MONO)
+ aud->mode = VIDEO_SOUND_MONO;
+done:
+ return err;
+}
+
+static noinline long v4l1_compat_set_audio(
+ struct video_audio *aud,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_audio aud2;
+ struct v4l2_tuner tun2;
+
+ memset(&aud2, 0, sizeof(aud2));
+ memset(&tun2, 0, sizeof(tun2));
+
+ aud2.index = aud->audio;
+ err = drv(file, VIDIOC_S_AUDIO, &aud2);
+ if (err < 0) {
+ dprintk("VIDIOCSAUDIO / VIDIOC_S_AUDIO: %ld\n", err);
+ goto done;
+ }
+
+ set_v4l_control(file, V4L2_CID_AUDIO_VOLUME,
+ aud->volume, drv);
+ set_v4l_control(file, V4L2_CID_AUDIO_BASS,
+ aud->bass, drv);
+ set_v4l_control(file, V4L2_CID_AUDIO_TREBLE,
+ aud->treble, drv);
+ set_v4l_control(file, V4L2_CID_AUDIO_BALANCE,
+ aud->balance, drv);
+ set_v4l_control(file, V4L2_CID_AUDIO_MUTE,
+ !!(aud->flags & VIDEO_AUDIO_MUTE), drv);
+
+ err = drv(file, VIDIOC_G_TUNER, &tun2);
+ if (err < 0)
+ dprintk("VIDIOCSAUDIO / VIDIOC_G_TUNER: %ld\n", err);
+ if (err == 0) {
+ switch (aud->mode) {
+ default:
+ case VIDEO_SOUND_MONO:
+ case VIDEO_SOUND_LANG1:
+ tun2.audmode = V4L2_TUNER_MODE_MONO;
+ break;
+ case VIDEO_SOUND_STEREO:
+ tun2.audmode = V4L2_TUNER_MODE_STEREO;
+ break;
+ case VIDEO_SOUND_LANG2:
+ tun2.audmode = V4L2_TUNER_MODE_LANG2;
+ break;
+ }
+ err = drv(file, VIDIOC_S_TUNER, &tun2);
+ if (err < 0)
+ dprintk("VIDIOCSAUDIO / VIDIOC_S_TUNER: %ld\n", err);
+ }
+ err = 0;
+done:
+ return err;
+}
+
+static noinline long v4l1_compat_capture_frame(
+ struct video_mmap *mm,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ enum v4l2_buf_type captype = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ struct v4l2_buffer buf;
+ struct v4l2_format *fmt;
+
+ fmt = kzalloc(sizeof(*fmt), GFP_KERNEL);
+ if (!fmt) {
+ err = -ENOMEM;
+ return err;
+ }
+ memset(&buf, 0, sizeof(buf));
+
+ fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ err = drv(file, VIDIOC_G_FMT, fmt);
+ if (err < 0) {
+ dprintk("VIDIOCMCAPTURE / VIDIOC_G_FMT: %ld\n", err);
+ goto done;
+ }
+ if (mm->width != fmt->fmt.pix.width ||
+ mm->height != fmt->fmt.pix.height ||
+ palette_to_pixelformat(mm->format) !=
+ fmt->fmt.pix.pixelformat) {
+ /* New capture format... */
+ fmt->fmt.pix.width = mm->width;
+ fmt->fmt.pix.height = mm->height;
+ fmt->fmt.pix.pixelformat =
+ palette_to_pixelformat(mm->format);
+ fmt->fmt.pix.field = V4L2_FIELD_ANY;
+ fmt->fmt.pix.bytesperline = 0;
+ err = drv(file, VIDIOC_S_FMT, fmt);
+ if (err < 0) {
+ dprintk("VIDIOCMCAPTURE / VIDIOC_S_FMT: %ld\n", err);
+ goto done;
+ }
+ }
+ buf.index = mm->frame;
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ err = drv(file, VIDIOC_QUERYBUF, &buf);
+ if (err < 0) {
+ dprintk("VIDIOCMCAPTURE / VIDIOC_QUERYBUF: %ld\n", err);
+ goto done;
+ }
+ err = drv(file, VIDIOC_QBUF, &buf);
+ if (err < 0) {
+ dprintk("VIDIOCMCAPTURE / VIDIOC_QBUF: %ld\n", err);
+ goto done;
+ }
+ err = drv(file, VIDIOC_STREAMON, &captype);
+ if (err < 0)
+ dprintk("VIDIOCMCAPTURE / VIDIOC_STREAMON: %ld\n", err);
+done:
+ kfree(fmt);
+ return err;
+}
+
+static noinline long v4l1_compat_sync(
+ int *i,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ enum v4l2_buf_type captype = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ struct v4l2_buffer buf;
+ struct poll_wqueues *pwq;
+
+ memset(&buf, 0, sizeof(buf));
+ buf.index = *i;
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ err = drv(file, VIDIOC_QUERYBUF, &buf);
+ if (err < 0) {
+ /* No such buffer */
+ dprintk("VIDIOCSYNC / VIDIOC_QUERYBUF: %ld\n", err);
+ goto done;
+ }
+ if (!(buf.flags & V4L2_BUF_FLAG_MAPPED)) {
+ /* Buffer is not mapped */
+ err = -EINVAL;
+ goto done;
+ }
+
+ /* make sure capture actually runs so we don't block forever */
+ err = drv(file, VIDIOC_STREAMON, &captype);
+ if (err < 0) {
+ dprintk("VIDIOCSYNC / VIDIOC_STREAMON: %ld\n", err);
+ goto done;
+ }
+
+ pwq = kmalloc(sizeof(*pwq), GFP_KERNEL);
+ /* Loop as long as the buffer is queued, but not done */
+ while ((buf.flags & (V4L2_BUF_FLAG_QUEUED | V4L2_BUF_FLAG_DONE))
+ == V4L2_BUF_FLAG_QUEUED) {
+ err = poll_one(file, pwq);
+ if (err < 0 || /* error or sleep was interrupted */
+ err == 0) /* timeout? Shouldn't occur. */
+ break;
+ err = drv(file, VIDIOC_QUERYBUF, &buf);
+ if (err < 0)
+ dprintk("VIDIOCSYNC / VIDIOC_QUERYBUF: %ld\n", err);
+ }
+ kfree(pwq);
+ if (!(buf.flags & V4L2_BUF_FLAG_DONE)) /* not done */
+ goto done;
+ do {
+ err = drv(file, VIDIOC_DQBUF, &buf);
+ if (err < 0)
+ dprintk("VIDIOCSYNC / VIDIOC_DQBUF: %ld\n", err);
+ } while (err == 0 && buf.index != *i);
+done:
+ return err;
+}
+
+static noinline long v4l1_compat_get_vbi_format(
+ struct vbi_format *fmt,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_format *fmt2;
+
+ fmt2 = kzalloc(sizeof(*fmt2), GFP_KERNEL);
+ if (!fmt2) {
+ err = -ENOMEM;
+ return err;
+ }
+ fmt2->type = V4L2_BUF_TYPE_VBI_CAPTURE;
+
+ err = drv(file, VIDIOC_G_FMT, fmt2);
+ if (err < 0) {
+ dprintk("VIDIOCGVBIFMT / VIDIOC_G_FMT: %ld\n", err);
+ goto done;
+ }
+ if (fmt2->fmt.vbi.sample_format != V4L2_PIX_FMT_GREY) {
+ err = -EINVAL;
+ goto done;
+ }
+ memset(fmt, 0, sizeof(*fmt));
+ fmt->samples_per_line = fmt2->fmt.vbi.samples_per_line;
+ fmt->sampling_rate = fmt2->fmt.vbi.sampling_rate;
+ fmt->sample_format = VIDEO_PALETTE_RAW;
+ fmt->start[0] = fmt2->fmt.vbi.start[0];
+ fmt->count[0] = fmt2->fmt.vbi.count[0];
+ fmt->start[1] = fmt2->fmt.vbi.start[1];
+ fmt->count[1] = fmt2->fmt.vbi.count[1];
+ fmt->flags = fmt2->fmt.vbi.flags & 0x03;
+done:
+ kfree(fmt2);
+ return err;
+}
+
+static noinline long v4l1_compat_set_vbi_format(
+ struct vbi_format *fmt,
+ struct file *file,
+ v4l2_kioctl drv)
+{
+ long err;
+ struct v4l2_format *fmt2 = NULL;
+
+ if (VIDEO_PALETTE_RAW != fmt->sample_format) {
+ err = -EINVAL;
+ return err;
+ }
+
+ fmt2 = kzalloc(sizeof(*fmt2), GFP_KERNEL);
+ if (!fmt2) {
+ err = -ENOMEM;
+ return err;
+ }
+ fmt2->type = V4L2_BUF_TYPE_VBI_CAPTURE;
+ fmt2->fmt.vbi.samples_per_line = fmt->samples_per_line;
+ fmt2->fmt.vbi.sampling_rate = fmt->sampling_rate;
+ fmt2->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
+ fmt2->fmt.vbi.start[0] = fmt->start[0];
+ fmt2->fmt.vbi.count[0] = fmt->count[0];
+ fmt2->fmt.vbi.start[1] = fmt->start[1];
+ fmt2->fmt.vbi.count[1] = fmt->count[1];
+ fmt2->fmt.vbi.flags = fmt->flags;
+ err = drv(file, VIDIOC_TRY_FMT, fmt2);
+ if (err < 0) {
+ dprintk("VIDIOCSVBIFMT / VIDIOC_TRY_FMT: %ld\n", err);
+ goto done;
+ }
+
+ if (fmt2->fmt.vbi.samples_per_line != fmt->samples_per_line ||
+ fmt2->fmt.vbi.sampling_rate != fmt->sampling_rate ||
+ fmt2->fmt.vbi.sample_format != V4L2_PIX_FMT_GREY ||
+ fmt2->fmt.vbi.start[0] != fmt->start[0] ||
+ fmt2->fmt.vbi.count[0] != fmt->count[0] ||
+ fmt2->fmt.vbi.start[1] != fmt->start[1] ||
+ fmt2->fmt.vbi.count[1] != fmt->count[1] ||
+ fmt2->fmt.vbi.flags != fmt->flags) {
+ err = -EINVAL;
+ goto done;
+ }
+ err = drv(file, VIDIOC_S_FMT, fmt2);
+ if (err < 0)
+ dprintk("VIDIOCSVBIFMT / VIDIOC_S_FMT: %ld\n", err);
+done:
+ kfree(fmt2);
+ return err;
+}
+
+/*
+ * This function is exported.
+ */
+long
+v4l_compat_translate_ioctl(struct file *file,
+ int cmd,
+ void *arg,
+ v4l2_kioctl drv)
+{
+ long err;
+
+ switch (cmd) {
+ case VIDIOCGCAP: /* capability */
+ err = v4l1_compat_get_capabilities(arg, file, drv);
+ break;
+ case VIDIOCGFBUF: /* get frame buffer */
+ err = v4l1_compat_get_frame_buffer(arg, file, drv);
+ break;
+ case VIDIOCSFBUF: /* set frame buffer */
+ err = v4l1_compat_set_frame_buffer(arg, file, drv);
+ break;
+ case VIDIOCGWIN: /* get window or capture dimensions */
+ err = v4l1_compat_get_win_cap_dimensions(arg, file, drv);
+ break;
+ case VIDIOCSWIN: /* set window and/or capture dimensions */
+ err = v4l1_compat_set_win_cap_dimensions(arg, file, drv);
+ break;
+ case VIDIOCCAPTURE: /* turn on/off preview */
+ err = v4l1_compat_turn_preview_on_off(arg, file, drv);
+ break;
+ case VIDIOCGCHAN: /* get input information */
+ err = v4l1_compat_get_input_info(arg, file, drv);
+ break;
+ case VIDIOCSCHAN: /* set input */
+ err = v4l1_compat_set_input(arg, file, drv);
+ break;
+ case VIDIOCGPICT: /* get tone controls & partial capture format */
+ err = v4l1_compat_get_picture(arg, file, drv);
+ break;
+ case VIDIOCSPICT: /* set tone controls & partial capture format */
+ err = v4l1_compat_set_picture(arg, file, drv);
+ break;
+ case VIDIOCGTUNER: /* get tuner information */
+ err = v4l1_compat_get_tuner(arg, file, drv);
+ break;
+ case VIDIOCSTUNER: /* select a tuner input */
+ err = v4l1_compat_select_tuner(arg, file, drv);
+ break;
+ case VIDIOCGFREQ: /* get frequency */
+ err = v4l1_compat_get_frequency(arg, file, drv);
+ break;
+ case VIDIOCSFREQ: /* set frequency */
+ err = v4l1_compat_set_frequency(arg, file, drv);
+ break;
+ case VIDIOCGAUDIO: /* get audio properties/controls */
+ err = v4l1_compat_get_audio(arg, file, drv);
+ break;
+ case VIDIOCSAUDIO: /* set audio controls */
+ err = v4l1_compat_set_audio(arg, file, drv);
+ break;
+ case VIDIOCMCAPTURE: /* capture a frame */
+ err = v4l1_compat_capture_frame(arg, file, drv);
+ break;
+ case VIDIOCSYNC: /* wait for a frame */
+ err = v4l1_compat_sync(arg, file, drv);
+ break;
+ case VIDIOCGVBIFMT: /* query VBI data capture format */
+ err = v4l1_compat_get_vbi_format(arg, file, drv);
+ break;
+ case VIDIOCSVBIFMT:
+ err = v4l1_compat_set_vbi_format(arg, file, drv);
+ break;
+ default:
+ err = -ENOIOCTLCMD;
+ break;
+ }
+
+ return err;
+}
+EXPORT_SYMBOL(v4l_compat_translate_ioctl);
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
index aa044f49..14835b85 100644
--- a/drivers/media/v4l2-core/v4l2-common.c
+++ b/drivers/media/v4l2-core/v4l2-common.c
@@ -51,16 +51,14 @@
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/i2c.h>
-#if defined(CONFIG_SPI)
-#include <linux/spi/spi.h>
-#endif
#include <asm/uaccess.h>
+#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/div64.h>
+#define __OLD_VIDIOC_ /* To allow fixing old calls*/
#include <media/v4l2-common.h>
#include <media/v4l2-device.h>
-#include <media/v4l2-ctrls.h>
#include <media/v4l2-chip-ident.h>
#include <linux/videodev2.h>
@@ -79,13 +77,80 @@ MODULE_LICENSE("GPL");
* Video Standard Operations (contributed by Michael Schimek)
*/
+
+/* ----------------------------------------------------------------- */
+/* priority handling */
+
+#define V4L2_PRIO_VALID(val) (val == V4L2_PRIORITY_BACKGROUND || \
+ val == V4L2_PRIORITY_INTERACTIVE || \
+ val == V4L2_PRIORITY_RECORD)
+
+int v4l2_prio_init(struct v4l2_prio_state *global)
+{
+ memset(global,0,sizeof(*global));
+ return 0;
+}
+EXPORT_SYMBOL(v4l2_prio_init);
+
+int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
+ enum v4l2_priority new)
+{
+ if (!V4L2_PRIO_VALID(new))
+ return -EINVAL;
+ if (*local == new)
+ return 0;
+
+ atomic_inc(&global->prios[new]);
+ if (V4L2_PRIO_VALID(*local))
+ atomic_dec(&global->prios[*local]);
+ *local = new;
+ return 0;
+}
+EXPORT_SYMBOL(v4l2_prio_change);
+
+int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local)
+{
+ return v4l2_prio_change(global,local,V4L2_PRIORITY_DEFAULT);
+}
+EXPORT_SYMBOL(v4l2_prio_open);
+
+int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local)
+{
+ if (V4L2_PRIO_VALID(*local))
+ atomic_dec(&global->prios[*local]);
+ return 0;
+}
+EXPORT_SYMBOL(v4l2_prio_close);
+
+enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global)
+{
+ if (atomic_read(&global->prios[V4L2_PRIORITY_RECORD]) > 0)
+ return V4L2_PRIORITY_RECORD;
+ if (atomic_read(&global->prios[V4L2_PRIORITY_INTERACTIVE]) > 0)
+ return V4L2_PRIORITY_INTERACTIVE;
+ if (atomic_read(&global->prios[V4L2_PRIORITY_BACKGROUND]) > 0)
+ return V4L2_PRIORITY_BACKGROUND;
+ return V4L2_PRIORITY_UNSET;
+}
+EXPORT_SYMBOL(v4l2_prio_max);
+
+int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local)
+{
+ if (*local < v4l2_prio_max(global))
+ return -EBUSY;
+ return 0;
+}
+EXPORT_SYMBOL(v4l2_prio_check);
+
+/* ----------------------------------------------------------------- */
+
/* Helper functions for control handling */
/* Check for correctness of the ctrl's value based on the data from
struct v4l2_queryctrl and the available menu items. Note that
menu_items may be NULL, in that case it is ignored. */
int v4l2_ctrl_check(struct v4l2_ext_control *ctrl, struct v4l2_queryctrl *qctrl,
- const char * const *menu_items)
+ const char **menu_items)
{
if (qctrl->flags & V4L2_CTRL_FLAG_DISABLED)
return -EINVAL;
@@ -104,24 +169,468 @@ int v4l2_ctrl_check(struct v4l2_ext_control *ctrl, struct v4l2_queryctrl *qctrl,
menu_items[ctrl->value][0] == '\0')
return -EINVAL;
}
- if (qctrl->type == V4L2_CTRL_TYPE_BITMASK &&
- (ctrl->value & ~qctrl->maximum))
- return -ERANGE;
return 0;
}
EXPORT_SYMBOL(v4l2_ctrl_check);
+/* Returns NULL or a character pointer array containing the menu for
+ the given control ID. The pointer array ends with a NULL pointer.
+ An empty string signifies a menu entry that is invalid. This allows
+ drivers to disable certain options if it is not supported. */
+const char **v4l2_ctrl_get_menu(u32 id)
+{
+ static const char *mpeg_audio_sampling_freq[] = {
+ "44.1 kHz",
+ "48 kHz",
+ "32 kHz",
+ NULL
+ };
+ static const char *mpeg_audio_encoding[] = {
+ "MPEG-1/2 Layer I",
+ "MPEG-1/2 Layer II",
+ "MPEG-1/2 Layer III",
+ "MPEG-2/4 AAC",
+ "AC-3",
+ NULL
+ };
+ static const char *mpeg_audio_l1_bitrate[] = {
+ "32 kbps",
+ "64 kbps",
+ "96 kbps",
+ "128 kbps",
+ "160 kbps",
+ "192 kbps",
+ "224 kbps",
+ "256 kbps",
+ "288 kbps",
+ "320 kbps",
+ "352 kbps",
+ "384 kbps",
+ "416 kbps",
+ "448 kbps",
+ NULL
+ };
+ static const char *mpeg_audio_l2_bitrate[] = {
+ "32 kbps",
+ "48 kbps",
+ "56 kbps",
+ "64 kbps",
+ "80 kbps",
+ "96 kbps",
+ "112 kbps",
+ "128 kbps",
+ "160 kbps",
+ "192 kbps",
+ "224 kbps",
+ "256 kbps",
+ "320 kbps",
+ "384 kbps",
+ NULL
+ };
+ static const char *mpeg_audio_l3_bitrate[] = {
+ "32 kbps",
+ "40 kbps",
+ "48 kbps",
+ "56 kbps",
+ "64 kbps",
+ "80 kbps",
+ "96 kbps",
+ "112 kbps",
+ "128 kbps",
+ "160 kbps",
+ "192 kbps",
+ "224 kbps",
+ "256 kbps",
+ "320 kbps",
+ NULL
+ };
+ static const char *mpeg_audio_ac3_bitrate[] = {
+ "32 kbps",
+ "40 kbps",
+ "48 kbps",
+ "56 kbps",
+ "64 kbps",
+ "80 kbps",
+ "96 kbps",
+ "112 kbps",
+ "128 kbps",
+ "160 kbps",
+ "192 kbps",
+ "224 kbps",
+ "256 kbps",
+ "320 kbps",
+ "384 kbps",
+ "448 kbps",
+ "512 kbps",
+ "576 kbps",
+ "640 kbps",
+ NULL
+ };
+ static const char *mpeg_audio_mode[] = {
+ "Stereo",
+ "Joint Stereo",
+ "Dual",
+ "Mono",
+ NULL
+ };
+ static const char *mpeg_audio_mode_extension[] = {
+ "Bound 4",
+ "Bound 8",
+ "Bound 12",
+ "Bound 16",
+ NULL
+ };
+ static const char *mpeg_audio_emphasis[] = {
+ "No Emphasis",
+ "50/15 us",
+ "CCITT J17",
+ NULL
+ };
+ static const char *mpeg_audio_crc[] = {
+ "No CRC",
+ "16-bit CRC",
+ NULL
+ };
+ static const char *mpeg_video_encoding[] = {
+ "MPEG-1",
+ "MPEG-2",
+ "MPEG-4 AVC",
+ NULL
+ };
+ static const char *mpeg_video_aspect[] = {
+ "1x1",
+ "4x3",
+ "16x9",
+ "2.21x1",
+ NULL
+ };
+ static const char *mpeg_video_bitrate_mode[] = {
+ "Variable Bitrate",
+ "Constant Bitrate",
+ NULL
+ };
+ static const char *mpeg_stream_type[] = {
+ "MPEG-2 Program Stream",
+ "MPEG-2 Transport Stream",
+ "MPEG-1 System Stream",
+ "MPEG-2 DVD-compatible Stream",
+ "MPEG-1 VCD-compatible Stream",
+ "MPEG-2 SVCD-compatible Stream",
+ NULL
+ };
+ static const char *mpeg_stream_vbi_fmt[] = {
+ "No VBI",
+ "Private packet, IVTV format",
+ NULL
+ };
+ static const char *camera_power_line_frequency[] = {
+ "Disabled",
+ "50 Hz",
+ "60 Hz",
+ NULL
+ };
+ static const char *camera_exposure_auto[] = {
+ "Auto Mode",
+ "Manual Mode",
+ "Shutter Priority Mode",
+ "Aperture Priority Mode",
+ NULL
+ };
+ static const char *colorfx[] = {
+ "None",
+ "Black & White",
+ "Sepia",
+ NULL
+ };
+ static const char *tune_preemphasis[] = {
+ "No preemphasis",
+ "50 useconds",
+ "75 useconds",
+ NULL,
+ };
+
+ switch (id) {
+ case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
+ return mpeg_audio_sampling_freq;
+ case V4L2_CID_MPEG_AUDIO_ENCODING:
+ return mpeg_audio_encoding;
+ case V4L2_CID_MPEG_AUDIO_L1_BITRATE:
+ return mpeg_audio_l1_bitrate;
+ case V4L2_CID_MPEG_AUDIO_L2_BITRATE:
+ return mpeg_audio_l2_bitrate;
+ case V4L2_CID_MPEG_AUDIO_L3_BITRATE:
+ return mpeg_audio_l3_bitrate;
+ case V4L2_CID_MPEG_AUDIO_AC3_BITRATE:
+ return mpeg_audio_ac3_bitrate;
+ case V4L2_CID_MPEG_AUDIO_MODE:
+ return mpeg_audio_mode;
+ case V4L2_CID_MPEG_AUDIO_MODE_EXTENSION:
+ return mpeg_audio_mode_extension;
+ case V4L2_CID_MPEG_AUDIO_EMPHASIS:
+ return mpeg_audio_emphasis;
+ case V4L2_CID_MPEG_AUDIO_CRC:
+ return mpeg_audio_crc;
+ case V4L2_CID_MPEG_VIDEO_ENCODING:
+ return mpeg_video_encoding;
+ case V4L2_CID_MPEG_VIDEO_ASPECT:
+ return mpeg_video_aspect;
+ case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
+ return mpeg_video_bitrate_mode;
+ case V4L2_CID_MPEG_STREAM_TYPE:
+ return mpeg_stream_type;
+ case V4L2_CID_MPEG_STREAM_VBI_FMT:
+ return mpeg_stream_vbi_fmt;
+ case V4L2_CID_POWER_LINE_FREQUENCY:
+ return camera_power_line_frequency;
+ case V4L2_CID_EXPOSURE_AUTO:
+ return camera_exposure_auto;
+ case V4L2_CID_COLORFX:
+ return colorfx;
+ case V4L2_CID_TUNE_PREEMPHASIS:
+ return tune_preemphasis;
+ default:
+ return NULL;
+ }
+}
+EXPORT_SYMBOL(v4l2_ctrl_get_menu);
+
+/* Return the control name. */
+const char *v4l2_ctrl_get_name(u32 id)
+{
+ switch (id) {
+ /* USER controls */
+ case V4L2_CID_USER_CLASS: return "User Controls";
+ case V4L2_CID_BRIGHTNESS: return "Brightness";
+ case V4L2_CID_CONTRAST: return "Contrast";
+ case V4L2_CID_SATURATION: return "Saturation";
+ case V4L2_CID_HUE: return "Hue";
+ case V4L2_CID_AUDIO_VOLUME: return "Volume";
+ case V4L2_CID_AUDIO_BALANCE: return "Balance";
+ case V4L2_CID_AUDIO_BASS: return "Bass";
+ case V4L2_CID_AUDIO_TREBLE: return "Treble";
+ case V4L2_CID_AUDIO_MUTE: return "Mute";
+ case V4L2_CID_AUDIO_LOUDNESS: return "Loudness";
+ case V4L2_CID_BLACK_LEVEL: return "Black Level";
+ case V4L2_CID_AUTO_WHITE_BALANCE: return "White Balance, Automatic";
+ case V4L2_CID_DO_WHITE_BALANCE: return "Do White Balance";
+ case V4L2_CID_RED_BALANCE: return "Red Balance";
+ case V4L2_CID_BLUE_BALANCE: return "Blue Balance";
+ case V4L2_CID_GAMMA: return "Gamma";
+ case V4L2_CID_EXPOSURE: return "Exposure";
+ case V4L2_CID_AUTOGAIN: return "Gain, Automatic";
+ case V4L2_CID_GAIN: return "Gain";
+ case V4L2_CID_HFLIP: return "Horizontal Flip";
+ case V4L2_CID_VFLIP: return "Vertical Flip";
+ case V4L2_CID_HCENTER: return "Horizontal Center";
+ case V4L2_CID_VCENTER: return "Vertical Center";
+ case V4L2_CID_POWER_LINE_FREQUENCY: return "Power Line Frequency";
+ case V4L2_CID_HUE_AUTO: return "Hue, Automatic";
+ case V4L2_CID_WHITE_BALANCE_TEMPERATURE: return "White Balance Temperature";
+ case V4L2_CID_SHARPNESS: return "Sharpness";
+ case V4L2_CID_BACKLIGHT_COMPENSATION: return "Backlight Compensation";
+ case V4L2_CID_CHROMA_AGC: return "Chroma AGC";
+ case V4L2_CID_COLOR_KILLER: return "Color Killer";
+ case V4L2_CID_COLORFX: return "Color Effects";
+
+ /* MPEG controls */
+ case V4L2_CID_MPEG_CLASS: return "MPEG Encoder Controls";
+ case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: return "Audio Sampling Frequency";
+ case V4L2_CID_MPEG_AUDIO_ENCODING: return "Audio Encoding";
+ case V4L2_CID_MPEG_AUDIO_L1_BITRATE: return "Audio Layer I Bitrate";
+ case V4L2_CID_MPEG_AUDIO_L2_BITRATE: return "Audio Layer II Bitrate";
+ case V4L2_CID_MPEG_AUDIO_L3_BITRATE: return "Audio Layer III Bitrate";
+ case V4L2_CID_MPEG_AUDIO_AAC_BITRATE: return "Audio AAC Bitrate";
+ case V4L2_CID_MPEG_AUDIO_AC3_BITRATE: return "Audio AC-3 Bitrate";
+ case V4L2_CID_MPEG_AUDIO_MODE: return "Audio Stereo Mode";
+ case V4L2_CID_MPEG_AUDIO_MODE_EXTENSION: return "Audio Stereo Mode Extension";
+ case V4L2_CID_MPEG_AUDIO_EMPHASIS: return "Audio Emphasis";
+ case V4L2_CID_MPEG_AUDIO_CRC: return "Audio CRC";
+ case V4L2_CID_MPEG_AUDIO_MUTE: return "Audio Mute";
+ case V4L2_CID_MPEG_VIDEO_ENCODING: return "Video Encoding";
+ case V4L2_CID_MPEG_VIDEO_ASPECT: return "Video Aspect";
+ case V4L2_CID_MPEG_VIDEO_B_FRAMES: return "Video B Frames";
+ case V4L2_CID_MPEG_VIDEO_GOP_SIZE: return "Video GOP Size";
+ case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE: return "Video GOP Closure";
+ case V4L2_CID_MPEG_VIDEO_PULLDOWN: return "Video Pulldown";
+ case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: return "Video Bitrate Mode";
+ case V4L2_CID_MPEG_VIDEO_BITRATE: return "Video Bitrate";
+ case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: return "Video Peak Bitrate";
+ case V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION: return "Video Temporal Decimation";
+ case V4L2_CID_MPEG_VIDEO_MUTE: return "Video Mute";
+ case V4L2_CID_MPEG_VIDEO_MUTE_YUV: return "Video Mute YUV";
+ case V4L2_CID_MPEG_STREAM_TYPE: return "Stream Type";
+ case V4L2_CID_MPEG_STREAM_PID_PMT: return "Stream PMT Program ID";
+ case V4L2_CID_MPEG_STREAM_PID_AUDIO: return "Stream Audio Program ID";
+ case V4L2_CID_MPEG_STREAM_PID_VIDEO: return "Stream Video Program ID";
+ case V4L2_CID_MPEG_STREAM_PID_PCR: return "Stream PCR Program ID";
+ case V4L2_CID_MPEG_STREAM_PES_ID_AUDIO: return "Stream PES Audio ID";
+ case V4L2_CID_MPEG_STREAM_PES_ID_VIDEO: return "Stream PES Video ID";
+ case V4L2_CID_MPEG_STREAM_VBI_FMT: return "Stream VBI Format";
+
+ /* CAMERA controls */
+ case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
+ case V4L2_CID_EXPOSURE_AUTO: return "Auto Exposure";
+ case V4L2_CID_EXPOSURE_ABSOLUTE: return "Exposure Time, Absolute";
+ case V4L2_CID_EXPOSURE_AUTO_PRIORITY: return "Exposure, Dynamic Framerate";
+ case V4L2_CID_PAN_RELATIVE: return "Pan, Relative";
+ case V4L2_CID_TILT_RELATIVE: return "Tilt, Relative";
+ case V4L2_CID_PAN_RESET: return "Pan, Reset";
+ case V4L2_CID_TILT_RESET: return "Tilt, Reset";
+ case V4L2_CID_PAN_ABSOLUTE: return "Pan, Absolute";
+ case V4L2_CID_TILT_ABSOLUTE: return "Tilt, Absolute";
+ case V4L2_CID_FOCUS_ABSOLUTE: return "Focus, Absolute";
+ case V4L2_CID_FOCUS_RELATIVE: return "Focus, Relative";
+ case V4L2_CID_FOCUS_AUTO: return "Focus, Automatic";
+ case V4L2_CID_ZOOM_ABSOLUTE: return "Zoom, Absolute";
+ case V4L2_CID_ZOOM_RELATIVE: return "Zoom, Relative";
+ case V4L2_CID_ZOOM_CONTINUOUS: return "Zoom, Continuous";
+ case V4L2_CID_PRIVACY: return "Privacy";
+
+ /* FM Radio Modulator control */
+ case V4L2_CID_FM_TX_CLASS: return "FM Radio Modulator Controls";
+ case V4L2_CID_RDS_TX_DEVIATION: return "RDS Signal Deviation";
+ case V4L2_CID_RDS_TX_PI: return "RDS Program ID";
+ case V4L2_CID_RDS_TX_PTY: return "RDS Program Type";
+ case V4L2_CID_RDS_TX_PS_NAME: return "RDS PS Name";
+ case V4L2_CID_RDS_TX_RADIO_TEXT: return "RDS Radio Text";
+ case V4L2_CID_AUDIO_LIMITER_ENABLED: return "Audio Limiter Feature Enabled";
+ case V4L2_CID_AUDIO_LIMITER_RELEASE_TIME: return "Audio Limiter Release Time";
+ case V4L2_CID_AUDIO_LIMITER_DEVIATION: return "Audio Limiter Deviation";
+ case V4L2_CID_AUDIO_COMPRESSION_ENABLED: return "Audio Compression Feature Enabled";
+ case V4L2_CID_AUDIO_COMPRESSION_GAIN: return "Audio Compression Gain";
+ case V4L2_CID_AUDIO_COMPRESSION_THRESHOLD: return "Audio Compression Threshold";
+ case V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME: return "Audio Compression Attack Time";
+ case V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME: return "Audio Compression Release Time";
+ case V4L2_CID_PILOT_TONE_ENABLED: return "Pilot Tone Feature Enabled";
+ case V4L2_CID_PILOT_TONE_DEVIATION: return "Pilot Tone Deviation";
+ case V4L2_CID_PILOT_TONE_FREQUENCY: return "Pilot Tone Frequency";
+ case V4L2_CID_TUNE_PREEMPHASIS: return "Pre-emphasis settings";
+ case V4L2_CID_TUNE_POWER_LEVEL: return "Tune Power Level";
+ case V4L2_CID_TUNE_ANTENNA_CAPACITOR: return "Tune Antenna Capacitor";
+
+ default:
+ return NULL;
+ }
+}
+EXPORT_SYMBOL(v4l2_ctrl_get_name);
+
/* Fill in a struct v4l2_queryctrl */
int v4l2_ctrl_query_fill(struct v4l2_queryctrl *qctrl, s32 min, s32 max, s32 step, s32 def)
{
- const char *name;
-
- v4l2_ctrl_fill(qctrl->id, &name, &qctrl->type,
- &min, &max, &step, &def, &qctrl->flags);
+ const char *name = v4l2_ctrl_get_name(qctrl->id);
+ qctrl->flags = 0;
if (name == NULL)
return -EINVAL;
+ switch (qctrl->id) {
+ case V4L2_CID_AUDIO_MUTE:
+ case V4L2_CID_AUDIO_LOUDNESS:
+ case V4L2_CID_AUTO_WHITE_BALANCE:
+ case V4L2_CID_AUTOGAIN:
+ case V4L2_CID_HFLIP:
+ case V4L2_CID_VFLIP:
+ case V4L2_CID_HUE_AUTO:
+ case V4L2_CID_CHROMA_AGC:
+ case V4L2_CID_COLOR_KILLER:
+ case V4L2_CID_MPEG_AUDIO_MUTE:
+ case V4L2_CID_MPEG_VIDEO_MUTE:
+ case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
+ case V4L2_CID_MPEG_VIDEO_PULLDOWN:
+ case V4L2_CID_EXPOSURE_AUTO_PRIORITY:
+ case V4L2_CID_FOCUS_AUTO:
+ case V4L2_CID_PRIVACY:
+ case V4L2_CID_AUDIO_LIMITER_ENABLED:
+ case V4L2_CID_AUDIO_COMPRESSION_ENABLED:
+ case V4L2_CID_PILOT_TONE_ENABLED:
+ qctrl->type = V4L2_CTRL_TYPE_BOOLEAN;
+ min = 0;
+ max = step = 1;
+ break;
+ case V4L2_CID_PAN_RESET:
+ case V4L2_CID_TILT_RESET:
+ qctrl->type = V4L2_CTRL_TYPE_BUTTON;
+ qctrl->flags |= V4L2_CTRL_FLAG_WRITE_ONLY;
+ min = max = step = def = 0;
+ break;
+ case V4L2_CID_POWER_LINE_FREQUENCY:
+ case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
+ case V4L2_CID_MPEG_AUDIO_ENCODING:
+ case V4L2_CID_MPEG_AUDIO_L1_BITRATE:
+ case V4L2_CID_MPEG_AUDIO_L2_BITRATE:
+ case V4L2_CID_MPEG_AUDIO_L3_BITRATE:
+ case V4L2_CID_MPEG_AUDIO_AC3_BITRATE:
+ case V4L2_CID_MPEG_AUDIO_MODE:
+ case V4L2_CID_MPEG_AUDIO_MODE_EXTENSION:
+ case V4L2_CID_MPEG_AUDIO_EMPHASIS:
+ case V4L2_CID_MPEG_AUDIO_CRC:
+ case V4L2_CID_MPEG_VIDEO_ENCODING:
+ case V4L2_CID_MPEG_VIDEO_ASPECT:
+ case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
+ case V4L2_CID_MPEG_STREAM_TYPE:
+ case V4L2_CID_MPEG_STREAM_VBI_FMT:
+ case V4L2_CID_EXPOSURE_AUTO:
+ case V4L2_CID_COLORFX:
+ case V4L2_CID_TUNE_PREEMPHASIS:
+ qctrl->type = V4L2_CTRL_TYPE_MENU;
+ step = 1;
+ break;
+ case V4L2_CID_RDS_TX_PS_NAME:
+ case V4L2_CID_RDS_TX_RADIO_TEXT:
+ qctrl->type = V4L2_CTRL_TYPE_STRING;
+ break;
+ case V4L2_CID_USER_CLASS:
+ case V4L2_CID_CAMERA_CLASS:
+ case V4L2_CID_MPEG_CLASS:
+ case V4L2_CID_FM_TX_CLASS:
+ qctrl->type = V4L2_CTRL_TYPE_CTRL_CLASS;
+ qctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+ min = max = step = def = 0;
+ break;
+ default:
+ qctrl->type = V4L2_CTRL_TYPE_INTEGER;
+ break;
+ }
+ switch (qctrl->id) {
+ case V4L2_CID_MPEG_AUDIO_ENCODING:
+ case V4L2_CID_MPEG_AUDIO_MODE:
+ case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
+ case V4L2_CID_MPEG_VIDEO_B_FRAMES:
+ case V4L2_CID_MPEG_STREAM_TYPE:
+ qctrl->flags |= V4L2_CTRL_FLAG_UPDATE;
+ break;
+ case V4L2_CID_AUDIO_VOLUME:
+ case V4L2_CID_AUDIO_BALANCE:
+ case V4L2_CID_AUDIO_BASS:
+ case V4L2_CID_AUDIO_TREBLE:
+ case V4L2_CID_BRIGHTNESS:
+ case V4L2_CID_CONTRAST:
+ case V4L2_CID_SATURATION:
+ case V4L2_CID_HUE:
+ case V4L2_CID_RED_BALANCE:
+ case V4L2_CID_BLUE_BALANCE:
+ case V4L2_CID_GAMMA:
+ case V4L2_CID_SHARPNESS:
+ case V4L2_CID_RDS_TX_DEVIATION:
+ case V4L2_CID_AUDIO_LIMITER_RELEASE_TIME:
+ case V4L2_CID_AUDIO_LIMITER_DEVIATION:
+ case V4L2_CID_AUDIO_COMPRESSION_GAIN:
+ case V4L2_CID_AUDIO_COMPRESSION_THRESHOLD:
+ case V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME:
+ case V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME:
+ case V4L2_CID_PILOT_TONE_DEVIATION:
+ case V4L2_CID_PILOT_TONE_FREQUENCY:
+ case V4L2_CID_TUNE_POWER_LEVEL:
+ case V4L2_CID_TUNE_ANTENNA_CAPACITOR:
+ qctrl->flags |= V4L2_CTRL_FLAG_SLIDER;
+ break;
+ case V4L2_CID_PAN_RELATIVE:
+ case V4L2_CID_TILT_RELATIVE:
+ case V4L2_CID_FOCUS_RELATIVE:
+ case V4L2_CID_ZOOM_RELATIVE:
+ qctrl->flags |= V4L2_CTRL_FLAG_WRITE_ONLY;
+ break;
+ }
qctrl->minimum = min;
qctrl->maximum = max;
qctrl->step = step;
@@ -137,7 +646,7 @@ EXPORT_SYMBOL(v4l2_ctrl_query_fill);
If menu_items is NULL, then the menu items are retrieved using
v4l2_ctrl_get_menu. */
int v4l2_ctrl_query_menu(struct v4l2_querymenu *qmenu, struct v4l2_queryctrl *qctrl,
- const char * const *menu_items)
+ const char **menu_items)
{
int i;
@@ -160,7 +669,7 @@ EXPORT_SYMBOL(v4l2_ctrl_query_menu);
Use this if there are 'holes' in the list of valid menu items. */
int v4l2_ctrl_query_menu_valid_items(struct v4l2_querymenu *qmenu, const u32 *ids)
{
- const char * const *menu_items = v4l2_ctrl_get_menu(qmenu->id);
+ const char **menu_items = v4l2_ctrl_get_menu(qmenu->id);
qmenu->reserved = 0;
if (menu_items == NULL || ids == NULL)
@@ -238,7 +747,7 @@ int v4l2_chip_match_host(const struct v4l2_dbg_match *match)
}
EXPORT_SYMBOL(v4l2_chip_match_host);
-#if IS_ENABLED(CONFIG_I2C)
+#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
int v4l2_chip_match_i2c_client(struct i2c_client *c, const struct v4l2_dbg_match *match)
{
int len;
@@ -306,20 +815,20 @@ EXPORT_SYMBOL_GPL(v4l2_i2c_subdev_init);
/* Load an i2c sub-device. */
struct v4l2_subdev *v4l2_i2c_new_subdev_board(struct v4l2_device *v4l2_dev,
- struct i2c_adapter *adapter, struct i2c_board_info *info,
- const unsigned short *probe_addrs)
+ struct i2c_adapter *adapter, const char *module_name,
+ struct i2c_board_info *info, const unsigned short *probe_addrs)
{
struct v4l2_subdev *sd = NULL;
struct i2c_client *client;
BUG_ON(!v4l2_dev);
- request_module(I2C_MODULE_PREFIX "%s", info->type);
+ if (module_name)
+ request_module(module_name);
/* Create the i2c client */
if (info->addr == 0 && probe_addrs)
- client = i2c_new_probed_device(adapter, info, probe_addrs,
- NULL);
+ client = i2c_new_probed_device(adapter, info, probe_addrs, 0);
else
client = i2c_new_device(adapter, info);
@@ -345,6 +854,18 @@ struct v4l2_subdev *v4l2_i2c_new_subdev_board(struct v4l2_device *v4l2_dev,
/* Decrease the module use count to match the first try_module_get. */
module_put(client->driver->driver.owner);
+ if (sd) {
+ /* We return errors from v4l2_subdev_call only if we have the
+ callback as the .s_config is not mandatory */
+ int err = v4l2_subdev_call(sd, core, s_config,
+ info->irq, info->platform_data);
+
+ if (err && err != -ENOIOCTLCMD) {
+ v4l2_device_unregister_subdev(sd);
+ sd = NULL;
+ }
+ }
+
error:
/* If we have a client but no subdev, then something went wrong and
we must unregister the client. */
@@ -354,8 +875,10 @@ error:
}
EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev_board);
-struct v4l2_subdev *v4l2_i2c_new_subdev(struct v4l2_device *v4l2_dev,
- struct i2c_adapter *adapter, const char *client_type,
+struct v4l2_subdev *v4l2_i2c_new_subdev_cfg(struct v4l2_device *v4l2_dev,
+ struct i2c_adapter *adapter,
+ const char *module_name, const char *client_type,
+ int irq, void *platform_data,
u8 addr, const unsigned short *probe_addrs)
{
struct i2c_board_info info;
@@ -365,10 +888,13 @@ struct v4l2_subdev *v4l2_i2c_new_subdev(struct v4l2_device *v4l2_dev,
memset(&info, 0, sizeof(info));
strlcpy(info.type, client_type, sizeof(info.type));
info.addr = addr;
+ info.irq = irq;
+ info.platform_data = platform_data;
- return v4l2_i2c_new_subdev_board(v4l2_dev, adapter, &info, probe_addrs);
+ return v4l2_i2c_new_subdev_board(v4l2_dev, adapter, module_name,
+ &info, probe_addrs);
}
-EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev);
+EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev_cfg);
/* Return i2c client address of v4l2_subdev. */
unsigned short v4l2_i2c_subdev_addr(struct v4l2_subdev *sd)
@@ -384,7 +910,7 @@ EXPORT_SYMBOL_GPL(v4l2_i2c_subdev_addr);
const unsigned short *v4l2_i2c_tuner_addrs(enum v4l2_i2c_tuner_type type)
{
static const unsigned short radio_addrs[] = {
-#if IS_ENABLED(CONFIG_MEDIA_TUNER_TEA5761)
+#if defined(CONFIG_MEDIA_TUNER_TEA5761) || defined(CONFIG_MEDIA_TUNER_TEA5761_MODULE)
0x10,
#endif
0x60,
@@ -416,66 +942,6 @@ EXPORT_SYMBOL_GPL(v4l2_i2c_tuner_addrs);
#endif /* defined(CONFIG_I2C) */
-#if defined(CONFIG_SPI)
-
-/* Load an spi sub-device. */
-
-void v4l2_spi_subdev_init(struct v4l2_subdev *sd, struct spi_device *spi,
- const struct v4l2_subdev_ops *ops)
-{
- v4l2_subdev_init(sd, ops);
- sd->flags |= V4L2_SUBDEV_FL_IS_SPI;
- /* the owner is the same as the spi_device's driver owner */
- sd->owner = spi->dev.driver->owner;
- /* spi_device and v4l2_subdev point to one another */
- v4l2_set_subdevdata(sd, spi);
- spi_set_drvdata(spi, sd);
- /* initialize name */
- strlcpy(sd->name, spi->dev.driver->name, sizeof(sd->name));
-}
-EXPORT_SYMBOL_GPL(v4l2_spi_subdev_init);
-
-struct v4l2_subdev *v4l2_spi_new_subdev(struct v4l2_device *v4l2_dev,
- struct spi_master *master, struct spi_board_info *info)
-{
- struct v4l2_subdev *sd = NULL;
- struct spi_device *spi = NULL;
-
- BUG_ON(!v4l2_dev);
-
- if (info->modalias[0])
- request_module(info->modalias);
-
- spi = spi_new_device(master, info);
-
- if (spi == NULL || spi->dev.driver == NULL)
- goto error;
-
- if (!try_module_get(spi->dev.driver->owner))
- goto error;
-
- sd = spi_get_drvdata(spi);
-
- /* Register with the v4l2_device which increases the module's
- use count as well. */
- if (v4l2_device_register_subdev(v4l2_dev, sd))
- sd = NULL;
-
- /* Decrease the module use count to match the first try_module_get. */
- module_put(spi->dev.driver->owner);
-
-error:
- /* If we have a client but no subdev, then something went wrong and
- we must unregister the client. */
- if (spi && sd == NULL)
- spi_unregister_device(spi);
-
- return sd;
-}
-EXPORT_SYMBOL_GPL(v4l2_spi_new_subdev);
-
-#endif /* defined(CONFIG_SPI) */
-
/* Clamp x to be between min and max, aligned to a multiple of 2^align. min
* and max don't have to be aligned, but there must be at least one valid
* value. E.g., min=17,max=31,align=4 is not allowed as there are no multiples
@@ -549,442 +1015,3 @@ void v4l_bound_align_image(u32 *w, unsigned int wmin, unsigned int wmax,
}
}
EXPORT_SYMBOL_GPL(v4l_bound_align_image);
-
-/**
- * v4l_fill_dv_preset_info - fill description of a digital video preset
- * @preset - preset value
- * @info - pointer to struct v4l2_dv_enum_preset
- *
- * drivers can use this helper function to fill description of dv preset
- * in info.
- */
-int v4l_fill_dv_preset_info(u32 preset, struct v4l2_dv_enum_preset *info)
-{
- static const struct v4l2_dv_preset_info {
- u16 width;
- u16 height;
- const char *name;
- } dv_presets[] = {
- { 0, 0, "Invalid" }, /* V4L2_DV_INVALID */
- { 720, 480, "480p@59.94" }, /* V4L2_DV_480P59_94 */
- { 720, 576, "576p@50" }, /* V4L2_DV_576P50 */
- { 1280, 720, "720p@24" }, /* V4L2_DV_720P24 */
- { 1280, 720, "720p@25" }, /* V4L2_DV_720P25 */
- { 1280, 720, "720p@30" }, /* V4L2_DV_720P30 */
- { 1280, 720, "720p@50" }, /* V4L2_DV_720P50 */
- { 1280, 720, "720p@59.94" }, /* V4L2_DV_720P59_94 */
- { 1280, 720, "720p@60" }, /* V4L2_DV_720P60 */
- { 1920, 1080, "1080i@29.97" }, /* V4L2_DV_1080I29_97 */
- { 1920, 1080, "1080i@30" }, /* V4L2_DV_1080I30 */
- { 1920, 1080, "1080i@25" }, /* V4L2_DV_1080I25 */
- { 1920, 1080, "1080i@50" }, /* V4L2_DV_1080I50 */
- { 1920, 1080, "1080i@60" }, /* V4L2_DV_1080I60 */
- { 1920, 1080, "1080p@24" }, /* V4L2_DV_1080P24 */
- { 1920, 1080, "1080p@25" }, /* V4L2_DV_1080P25 */
- { 1920, 1080, "1080p@30" }, /* V4L2_DV_1080P30 */
- { 1920, 1080, "1080p@50" }, /* V4L2_DV_1080P50 */
- { 1920, 1080, "1080p@60" }, /* V4L2_DV_1080P60 */
- };
-
- if (info == NULL || preset >= ARRAY_SIZE(dv_presets))
- return -EINVAL;
-
- info->preset = preset;
- info->width = dv_presets[preset].width;
- info->height = dv_presets[preset].height;
- strlcpy(info->name, dv_presets[preset].name, sizeof(info->name));
- return 0;
-}
-EXPORT_SYMBOL_GPL(v4l_fill_dv_preset_info);
-
-/**
- * v4l_match_dv_timings - check if two timings match
- * @t1 - compare this v4l2_dv_timings struct...
- * @t2 - with this struct.
- * @pclock_delta - the allowed pixelclock deviation.
- *
- * Compare t1 with t2 with a given margin of error for the pixelclock.
- */
-bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
- const struct v4l2_dv_timings *t2,
- unsigned pclock_delta)
-{
- if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
- return false;
- if (t1->bt.width == t2->bt.width &&
- t1->bt.height == t2->bt.height &&
- t1->bt.interlaced == t2->bt.interlaced &&
- t1->bt.polarities == t2->bt.polarities &&
- t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
- t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
- t1->bt.hfrontporch == t2->bt.hfrontporch &&
- t1->bt.vfrontporch == t2->bt.vfrontporch &&
- t1->bt.vsync == t2->bt.vsync &&
- t1->bt.vbackporch == t2->bt.vbackporch &&
- (!t1->bt.interlaced ||
- (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
- t1->bt.il_vsync == t2->bt.il_vsync &&
- t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
- return true;
- return false;
-}
-EXPORT_SYMBOL_GPL(v4l_match_dv_timings);
-
-/*
- * CVT defines
- * Based on Coordinated Video Timings Standard
- * version 1.1 September 10, 2003
- */
-
-#define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
-
-/* Normal blanking */
-#define CVT_MIN_V_BPORCH 7 /* lines */
-#define CVT_MIN_V_PORCH_RND 3 /* lines */
-#define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
-
-/* Normal blanking for CVT uses GTF to calculate horizontal blanking */
-#define CVT_CELL_GRAN 8 /* character cell granularity */
-#define CVT_M 600 /* blanking formula gradient */
-#define CVT_C 40 /* blanking formula offset */
-#define CVT_K 128 /* blanking formula scaling factor */
-#define CVT_J 20 /* blanking formula scaling factor */
-#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
-#define CVT_M_PRIME (CVT_K * CVT_M / 256)
-
-/* Reduced Blanking */
-#define CVT_RB_MIN_V_BPORCH 7 /* lines */
-#define CVT_RB_V_FPORCH 3 /* lines */
-#define CVT_RB_MIN_V_BLANK 460 /* us */
-#define CVT_RB_H_SYNC 32 /* pixels */
-#define CVT_RB_H_BPORCH 80 /* pixels */
-#define CVT_RB_H_BLANK 160 /* pixels */
-
-/** v4l2_detect_cvt - detect if the given timings follow the CVT standard
- * @frame_height - the total height of the frame (including blanking) in lines.
- * @hfreq - the horizontal frequency in Hz.
- * @vsync - the height of the vertical sync in lines.
- * @polarities - the horizontal and vertical polarities (same as struct
- * v4l2_bt_timings polarities).
- * @fmt - the resulting timings.
- *
- * This function will attempt to detect if the given values correspond to a
- * valid CVT format. If so, then it will return true, and fmt will be filled
- * in with the found CVT timings.
- */
-bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
- u32 polarities, struct v4l2_dv_timings *fmt)
-{
- int v_fp, v_bp, h_fp, h_bp, hsync;
- int frame_width, image_height, image_width;
- bool reduced_blanking;
- unsigned pix_clk;
-
- if (vsync < 4 || vsync > 7)
- return false;
-
- if (polarities == V4L2_DV_VSYNC_POS_POL)
- reduced_blanking = false;
- else if (polarities == V4L2_DV_HSYNC_POS_POL)
- reduced_blanking = true;
- else
- return false;
-
- /* Vertical */
- if (reduced_blanking) {
- v_fp = CVT_RB_V_FPORCH;
- v_bp = (CVT_RB_MIN_V_BLANK * hfreq + 999999) / 1000000;
- v_bp -= vsync + v_fp;
-
- if (v_bp < CVT_RB_MIN_V_BPORCH)
- v_bp = CVT_RB_MIN_V_BPORCH;
- } else {
- v_fp = CVT_MIN_V_PORCH_RND;
- v_bp = (CVT_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
-
- if (v_bp < CVT_MIN_V_BPORCH)
- v_bp = CVT_MIN_V_BPORCH;
- }
- image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
-
- /* Aspect ratio based on vsync */
- switch (vsync) {
- case 4:
- image_width = (image_height * 4) / 3;
- break;
- case 5:
- image_width = (image_height * 16) / 9;
- break;
- case 6:
- image_width = (image_height * 16) / 10;
- break;
- case 7:
- /* special case */
- if (image_height == 1024)
- image_width = (image_height * 5) / 4;
- else if (image_height == 768)
- image_width = (image_height * 15) / 9;
- else
- return false;
- break;
- default:
- return false;
- }
-
- image_width = image_width & ~7;
-
- /* Horizontal */
- if (reduced_blanking) {
- pix_clk = (image_width + CVT_RB_H_BLANK) * hfreq;
- pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
-
- h_bp = CVT_RB_H_BPORCH;
- hsync = CVT_RB_H_SYNC;
- h_fp = CVT_RB_H_BLANK - h_bp - hsync;
-
- frame_width = image_width + CVT_RB_H_BLANK;
- } else {
- int h_blank;
- unsigned ideal_duty_cycle = CVT_C_PRIME - (CVT_M_PRIME * 1000) / hfreq;
-
- h_blank = (image_width * ideal_duty_cycle + (100 - ideal_duty_cycle) / 2) /
- (100 - ideal_duty_cycle);
- h_blank = h_blank - h_blank % (2 * CVT_CELL_GRAN);
-
- if (h_blank * 100 / image_width < 20) {
- h_blank = image_width / 5;
- h_blank = (h_blank + 0x7) & ~0x7;
- }
-
- pix_clk = (image_width + h_blank) * hfreq;
- pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
-
- h_bp = h_blank / 2;
- frame_width = image_width + h_blank;
-
- hsync = (frame_width * 8 + 50) / 100;
- hsync = hsync - hsync % CVT_CELL_GRAN;
- h_fp = h_blank - hsync - h_bp;
- }
-
- fmt->bt.polarities = polarities;
- fmt->bt.width = image_width;
- fmt->bt.height = image_height;
- fmt->bt.hfrontporch = h_fp;
- fmt->bt.vfrontporch = v_fp;
- fmt->bt.hsync = hsync;
- fmt->bt.vsync = vsync;
- fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
- fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
- fmt->bt.pixelclock = pix_clk;
- fmt->bt.standards = V4L2_DV_BT_STD_CVT;
- if (reduced_blanking)
- fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
- return true;
-}
-EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
-
-/*
- * GTF defines
- * Based on Generalized Timing Formula Standard
- * Version 1.1 September 2, 1999
- */
-
-#define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
-
-#define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
-#define GTF_V_FP 1 /* vertical front porch (lines) */
-#define GTF_CELL_GRAN 8 /* character cell granularity */
-
-/* Default */
-#define GTF_D_M 600 /* blanking formula gradient */
-#define GTF_D_C 40 /* blanking formula offset */
-#define GTF_D_K 128 /* blanking formula scaling factor */
-#define GTF_D_J 20 /* blanking formula scaling factor */
-#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
-#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
-
-/* Secondary */
-#define GTF_S_M 3600 /* blanking formula gradient */
-#define GTF_S_C 40 /* blanking formula offset */
-#define GTF_S_K 128 /* blanking formula scaling factor */
-#define GTF_S_J 35 /* blanking formula scaling factor */
-#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
-#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
-
-/** v4l2_detect_gtf - detect if the given timings follow the GTF standard
- * @frame_height - the total height of the frame (including blanking) in lines.
- * @hfreq - the horizontal frequency in Hz.
- * @vsync - the height of the vertical sync in lines.
- * @polarities - the horizontal and vertical polarities (same as struct
- * v4l2_bt_timings polarities).
- * @aspect - preferred aspect ratio. GTF has no method of determining the
- * aspect ratio in order to derive the image width from the
- * image height, so it has to be passed explicitly. Usually
- * the native screen aspect ratio is used for this. If it
- * is not filled in correctly, then 16:9 will be assumed.
- * @fmt - the resulting timings.
- *
- * This function will attempt to detect if the given values correspond to a
- * valid GTF format. If so, then it will return true, and fmt will be filled
- * in with the found GTF timings.
- */
-bool v4l2_detect_gtf(unsigned frame_height,
- unsigned hfreq,
- unsigned vsync,
- u32 polarities,
- struct v4l2_fract aspect,
- struct v4l2_dv_timings *fmt)
-{
- int pix_clk;
- int v_fp, v_bp, h_fp, hsync;
- int frame_width, image_height, image_width;
- bool default_gtf;
- int h_blank;
-
- if (vsync != 3)
- return false;
-
- if (polarities == V4L2_DV_VSYNC_POS_POL)
- default_gtf = true;
- else if (polarities == V4L2_DV_HSYNC_POS_POL)
- default_gtf = false;
- else
- return false;
-
- /* Vertical */
- v_fp = GTF_V_FP;
- v_bp = (GTF_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
- image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
-
- if (aspect.numerator == 0 || aspect.denominator == 0) {
- aspect.numerator = 16;
- aspect.denominator = 9;
- }
- image_width = ((image_height * aspect.numerator) / aspect.denominator);
-
- /* Horizontal */
- if (default_gtf)
- h_blank = ((image_width * GTF_D_C_PRIME * hfreq) -
- (image_width * GTF_D_M_PRIME * 1000) +
- (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) / 2) /
- (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000);
- else
- h_blank = ((image_width * GTF_S_C_PRIME * hfreq) -
- (image_width * GTF_S_M_PRIME * 1000) +
- (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) / 2) /
- (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000);
-
- h_blank = h_blank - h_blank % (2 * GTF_CELL_GRAN);
- frame_width = image_width + h_blank;
-
- pix_clk = (image_width + h_blank) * hfreq;
- pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
-
- hsync = (frame_width * 8 + 50) / 100;
- hsync = hsync - hsync % GTF_CELL_GRAN;
-
- h_fp = h_blank / 2 - hsync;
-
- fmt->bt.polarities = polarities;
- fmt->bt.width = image_width;
- fmt->bt.height = image_height;
- fmt->bt.hfrontporch = h_fp;
- fmt->bt.vfrontporch = v_fp;
- fmt->bt.hsync = hsync;
- fmt->bt.vsync = vsync;
- fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
- fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
- fmt->bt.pixelclock = pix_clk;
- fmt->bt.standards = V4L2_DV_BT_STD_GTF;
- if (!default_gtf)
- fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
- return true;
-}
-EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
-
-/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
- * 0x15 and 0x16 from the EDID.
- * @hor_landscape - byte 0x15 from the EDID.
- * @vert_portrait - byte 0x16 from the EDID.
- *
- * Determines the aspect ratio from the EDID.
- * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
- * "Horizontal and Vertical Screen Size or Aspect Ratio"
- */
-struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
-{
- struct v4l2_fract aspect = { 16, 9 };
- u32 tmp;
- u8 ratio;
-
- /* Nothing filled in, fallback to 16:9 */
- if (!hor_landscape && !vert_portrait)
- return aspect;
- /* Both filled in, so they are interpreted as the screen size in cm */
- if (hor_landscape && vert_portrait) {
- aspect.numerator = hor_landscape;
- aspect.denominator = vert_portrait;
- return aspect;
- }
- /* Only one is filled in, so interpret them as a ratio:
- (val + 99) / 100 */
- ratio = hor_landscape | vert_portrait;
- /* Change some rounded values into the exact aspect ratio */
- if (ratio == 79) {
- aspect.numerator = 16;
- aspect.denominator = 9;
- } else if (ratio == 34) {
- aspect.numerator = 4;
- aspect.numerator = 3;
- } else if (ratio == 68) {
- aspect.numerator = 15;
- aspect.numerator = 9;
- } else {
- aspect.numerator = hor_landscape + 99;
- aspect.denominator = 100;
- }
- if (hor_landscape)
- return aspect;
- /* The aspect ratio is for portrait, so swap numerator and denominator */
- tmp = aspect.denominator;
- aspect.denominator = aspect.numerator;
- aspect.numerator = tmp;
- return aspect;
-}
-EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
-
-const struct v4l2_frmsize_discrete *v4l2_find_nearest_format(
- const struct v4l2_discrete_probe *probe,
- s32 width, s32 height)
-{
- int i;
- u32 error, min_error = UINT_MAX;
- const struct v4l2_frmsize_discrete *size, *best = NULL;
-
- if (!probe)
- return best;
-
- for (i = 0, size = probe->sizes; i < probe->num_sizes; i++, size++) {
- error = abs(size->width - width) + abs(size->height - height);
- if (error < min_error) {
- min_error = error;
- best = size;
- }
- if (!error)
- break;
- }
-
- return best;
-}
-EXPORT_SYMBOL_GPL(v4l2_find_nearest_format);
-
-void v4l2_get_timestamp(struct timeval *tv)
-{
- struct timespec ts;
-
- ktime_get_ts(&ts);
- tv->tv_sec = ts.tv_sec;
- tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
-}
-EXPORT_SYMBOL_GPL(v4l2_get_timestamp);
diff --git a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
index 7157af30..997975d5 100644
--- a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
+++ b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
@@ -5,7 +5,7 @@
* Copyright (C) 1997-2000 Jakub Jelinek (jakub@redhat.com)
* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
* Copyright (C) 2001,2002 Andi Kleen, SuSE Labs
- * Copyright (C) 2003 Pavel Machek (pavel@ucw.cz)
+ * Copyright (C) 2003 Pavel Machek (pavel@suse.cz)
* Copyright (C) 2005 Philippe De Muyter (phdm@macqel.be)
* Copyright (C) 2008 Hans Verkuil <hverkuil@xs4all.nl>
*
@@ -14,18 +14,225 @@
*/
#include <linux/compat.h>
-#include <linux/module.h>
+#define __OLD_VIDIOC_ /* To allow fixing old calls*/
+#include <linux/videodev.h>
#include <linux/videodev2.h>
-#include <linux/v4l2-subdev.h>
-#include <media/v4l2-dev.h>
+#include <linux/module.h>
+#include <linux/smp_lock.h>
#include <media/v4l2-ioctl.h>
+#ifdef CONFIG_COMPAT
+
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+struct video_tuner32 {
+ compat_int_t tuner;
+ char name[32];
+ compat_ulong_t rangelow, rangehigh;
+ u32 flags; /* It is really u32 in videodev.h */
+ u16 mode, signal;
+};
+
+static int get_video_tuner32(struct video_tuner *kp, struct video_tuner32 __user *up)
+{
+ if (!access_ok(VERIFY_READ, up, sizeof(struct video_tuner32)) ||
+ get_user(kp->tuner, &up->tuner) ||
+ copy_from_user(kp->name, up->name, 32) ||
+ get_user(kp->rangelow, &up->rangelow) ||
+ get_user(kp->rangehigh, &up->rangehigh) ||
+ get_user(kp->flags, &up->flags) ||
+ get_user(kp->mode, &up->mode) ||
+ get_user(kp->signal, &up->signal))
+ return -EFAULT;
+ return 0;
+}
+
+static int put_video_tuner32(struct video_tuner *kp, struct video_tuner32 __user *up)
+{
+ if (!access_ok(VERIFY_WRITE, up, sizeof(struct video_tuner32)) ||
+ put_user(kp->tuner, &up->tuner) ||
+ copy_to_user(up->name, kp->name, 32) ||
+ put_user(kp->rangelow, &up->rangelow) ||
+ put_user(kp->rangehigh, &up->rangehigh) ||
+ put_user(kp->flags, &up->flags) ||
+ put_user(kp->mode, &up->mode) ||
+ put_user(kp->signal, &up->signal))
+ return -EFAULT;
+ return 0;
+}
+
+struct video_buffer32 {
+ compat_caddr_t base;
+ compat_int_t height, width, depth, bytesperline;
+};
+
+static int get_video_buffer32(struct video_buffer *kp, struct video_buffer32 __user *up)
+{
+ u32 tmp;
+
+ if (!access_ok(VERIFY_READ, up, sizeof(struct video_buffer32)) ||
+ get_user(tmp, &up->base) ||
+ get_user(kp->height, &up->height) ||
+ get_user(kp->width, &up->width) ||
+ get_user(kp->depth, &up->depth) ||
+ get_user(kp->bytesperline, &up->bytesperline))
+ return -EFAULT;
+
+ /* This is actually a physical address stored
+ * as a void pointer.
+ */
+ kp->base = (void *)(unsigned long) tmp;
+
+ return 0;
+}
+
+static int put_video_buffer32(struct video_buffer *kp, struct video_buffer32 __user *up)
+{
+ u32 tmp = (u32)((unsigned long)kp->base);
+
+ if (!access_ok(VERIFY_WRITE, up, sizeof(struct video_buffer32)) ||
+ put_user(tmp, &up->base) ||
+ put_user(kp->height, &up->height) ||
+ put_user(kp->width, &up->width) ||
+ put_user(kp->depth, &up->depth) ||
+ put_user(kp->bytesperline, &up->bytesperline))
+ return -EFAULT;
+ return 0;
+}
+
+struct video_clip32 {
+ s32 x, y, width, height; /* It's really s32 in videodev.h */
+ compat_caddr_t next;
+};
+
+struct video_window32 {
+ u32 x, y, width, height, chromakey, flags;
+ compat_caddr_t clips;
+ compat_int_t clipcount;
+};
+
+static int get_video_window32(struct video_window *kp, struct video_window32 __user *up)
+{
+ struct video_clip __user *uclips;
+ struct video_clip __user *kclips;
+ compat_caddr_t p;
+ int nclips;
+
+ if (!access_ok(VERIFY_READ, up, sizeof(struct video_window32)))
+ return -EFAULT;
+
+ if (get_user(nclips, &up->clipcount))
+ return -EFAULT;
+
+ if (!access_ok(VERIFY_READ, up, sizeof(struct video_window32)) ||
+ get_user(kp->x, &up->x) ||
+ get_user(kp->y, &up->y) ||
+ get_user(kp->width, &up->width) ||
+ get_user(kp->height, &up->height) ||
+ get_user(kp->chromakey, &up->chromakey) ||
+ get_user(kp->flags, &up->flags) ||
+ get_user(kp->clipcount, &up->clipcount))
+ return -EFAULT;
+
+ nclips = kp->clipcount;
+ kp->clips = NULL;
+
+ if (nclips == 0)
+ return 0;
+ if (get_user(p, &up->clips))
+ return -EFAULT;
+ uclips = compat_ptr(p);
+
+ /* If nclips < 0, then it is a clipping bitmap of size
+ VIDEO_CLIPMAP_SIZE */
+ if (nclips < 0) {
+ if (!access_ok(VERIFY_READ, uclips, VIDEO_CLIPMAP_SIZE))
+ return -EFAULT;
+ kp->clips = compat_alloc_user_space(VIDEO_CLIPMAP_SIZE);
+ if (copy_in_user(kp->clips, uclips, VIDEO_CLIPMAP_SIZE))
+ return -EFAULT;
+ return 0;
+ }
+
+ /* Otherwise it is an array of video_clip structs. */
+ if (!access_ok(VERIFY_READ, uclips, nclips * sizeof(struct video_clip)))
+ return -EFAULT;
+
+ kp->clips = compat_alloc_user_space(nclips * sizeof(struct video_clip));
+ kclips = kp->clips;
+ while (nclips--) {
+ int err;
+
+ err = copy_in_user(&kclips->x, &uclips->x, sizeof(kclips->x));
+ err |= copy_in_user(&kclips->y, &uclips->y, sizeof(kclips->y));
+ err |= copy_in_user(&kclips->width, &uclips->width, sizeof(kclips->width));
+ err |= copy_in_user(&kclips->height, &uclips->height, sizeof(kclips->height));
+ kclips->next = NULL;
+ if (err)
+ return -EFAULT;
+ kclips++;
+ uclips++;
+ }
+ return 0;
+}
+
+/* You get back everything except the clips... */
+static int put_video_window32(struct video_window *kp, struct video_window32 __user *up)
+{
+ if (!access_ok(VERIFY_WRITE, up, sizeof(struct video_window32)) ||
+ put_user(kp->x, &up->x) ||
+ put_user(kp->y, &up->y) ||
+ put_user(kp->width, &up->width) ||
+ put_user(kp->height, &up->height) ||
+ put_user(kp->chromakey, &up->chromakey) ||
+ put_user(kp->flags, &up->flags) ||
+ put_user(kp->clipcount, &up->clipcount))
+ return -EFAULT;
+ return 0;
+}
+
+struct video_code32 {
+ char loadwhat[16]; /* name or tag of file being passed */
+ compat_int_t datasize;
+ unsigned char *data;
+};
+
+static int get_microcode32(struct video_code *kp, struct video_code32 __user *up)
+{
+ if (!access_ok(VERIFY_READ, up, sizeof(struct video_code32)) ||
+ copy_from_user(kp->loadwhat, up->loadwhat, sizeof(up->loadwhat)) ||
+ get_user(kp->datasize, &up->datasize) ||
+ copy_from_user(kp->data, up->data, up->datasize))
+ return -EFAULT;
+ return 0;
+}
+
+#define VIDIOCGTUNER32 _IOWR('v', 4, struct video_tuner32)
+#define VIDIOCSTUNER32 _IOW('v', 5, struct video_tuner32)
+#define VIDIOCGWIN32 _IOR('v', 9, struct video_window32)
+#define VIDIOCSWIN32 _IOW('v', 10, struct video_window32)
+#define VIDIOCGFBUF32 _IOR('v', 11, struct video_buffer32)
+#define VIDIOCSFBUF32 _IOW('v', 12, struct video_buffer32)
+#define VIDIOCGFREQ32 _IOR('v', 14, u32)
+#define VIDIOCSFREQ32 _IOW('v', 15, u32)
+#define VIDIOCSMICROCODE32 _IOW('v', 27, struct video_code32)
+
+#define VIDIOCCAPTURE32 _IOW('v', 8, s32)
+#define VIDIOCSYNC32 _IOW('v', 18, s32)
+#define VIDIOCSWRITEMODE32 _IOW('v', 25, s32)
+
+#endif
+
static long native_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
long ret = -ENOIOCTLCMD;
if (file->f_op->unlocked_ioctl)
ret = file->f_op->unlocked_ioctl(file, cmd, arg);
+ else if (file->f_op->ioctl) {
+ lock_kernel();
+ ret = file->f_op->ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
+ unlock_kernel();
+ }
return ret;
}
@@ -38,7 +245,7 @@ struct v4l2_clip32 {
struct v4l2_window32 {
struct v4l2_rect w;
- __u32 field; /* enum v4l2_field */
+ enum v4l2_field field;
__u32 chromakey;
compat_caddr_t clips; /* actually struct v4l2_clip32 * */
__u32 clipcount;
@@ -81,7 +288,7 @@ static int get_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user
static int put_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user *up)
{
- if (copy_to_user(&up->w, &kp->w, sizeof(kp->w)) ||
+ if (copy_to_user(&up->w, &kp->w, sizeof(up->w)) ||
put_user(kp->field, &up->field) ||
put_user(kp->chromakey, &up->chromakey) ||
put_user(kp->clipcount, &up->clipcount))
@@ -96,14 +303,6 @@ static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp, struct v4l2_pi
return 0;
}
-static inline int get_v4l2_pix_format_mplane(struct v4l2_pix_format_mplane *kp,
- struct v4l2_pix_format_mplane __user *up)
-{
- if (copy_from_user(kp, up, sizeof(struct v4l2_pix_format_mplane)))
- return -EFAULT;
- return 0;
-}
-
static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp, struct v4l2_pix_format __user *up)
{
if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format)))
@@ -111,14 +310,6 @@ static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp, struct v4l2_pi
return 0;
}
-static inline int put_v4l2_pix_format_mplane(struct v4l2_pix_format_mplane *kp,
- struct v4l2_pix_format_mplane __user *up)
-{
- if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format_mplane)))
- return -EFAULT;
- return 0;
-}
-
static inline int get_v4l2_vbi_format(struct v4l2_vbi_format *kp, struct v4l2_vbi_format __user *up)
{
if (copy_from_user(kp, up, sizeof(struct v4l2_vbi_format)))
@@ -148,10 +339,9 @@ static inline int put_v4l2_sliced_vbi_format(struct v4l2_sliced_vbi_format *kp,
}
struct v4l2_format32 {
- __u32 type; /* enum v4l2_buf_type */
+ enum v4l2_buf_type type;
union {
struct v4l2_pix_format pix;
- struct v4l2_pix_format_mplane pix_mp;
struct v4l2_window32 win;
struct v4l2_vbi_format vbi;
struct v4l2_sliced_vbi_format sliced;
@@ -159,33 +349,15 @@ struct v4l2_format32 {
} fmt;
};
-/**
- * struct v4l2_create_buffers32 - VIDIOC_CREATE_BUFS32 argument
- * @index: on return, index of the first created buffer
- * @count: entry: number of requested buffers,
- * return: number of created buffers
- * @memory: buffer memory type
- * @format: frame format, for which buffers are requested
- * @reserved: future extensions
- */
-struct v4l2_create_buffers32 {
- __u32 index;
- __u32 count;
- __u32 memory; /* enum v4l2_memory */
- struct v4l2_format32 format;
- __u32 reserved[8];
-};
-
-static int __get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up)
+static int get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up)
{
+ if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_format32)) ||
+ get_user(kp->type, &up->type))
+ return -EFAULT;
switch (kp->type) {
case V4L2_BUF_TYPE_VIDEO_CAPTURE:
case V4L2_BUF_TYPE_VIDEO_OUTPUT:
return get_v4l2_pix_format(&kp->fmt.pix, &up->fmt.pix);
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- return get_v4l2_pix_format_mplane(&kp->fmt.pix_mp,
- &up->fmt.pix_mp);
case V4L2_BUF_TYPE_VIDEO_OVERLAY:
case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
return get_v4l2_window32(&kp->fmt.win, &up->fmt.win);
@@ -195,6 +367,12 @@ static int __get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __us
case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
return get_v4l2_sliced_vbi_format(&kp->fmt.sliced, &up->fmt.sliced);
+ case V4L2_BUF_TYPE_PRIVATE:
+ if (copy_from_user(kp, up, sizeof(kp->fmt.raw_data)))
+ return -EFAULT;
+ return 0;
+ case 0:
+ return -EINVAL;
default:
printk(KERN_INFO "compat_ioctl32: unexpected VIDIOC_FMT type %d\n",
kp->type);
@@ -202,32 +380,15 @@ static int __get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __us
}
}
-static int get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up)
-{
- if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_format32)) ||
- get_user(kp->type, &up->type))
- return -EFAULT;
- return __get_v4l2_format32(kp, up);
-}
-
-static int get_v4l2_create32(struct v4l2_create_buffers *kp, struct v4l2_create_buffers32 __user *up)
-{
- if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_create_buffers32)) ||
- copy_from_user(kp, up, offsetof(struct v4l2_create_buffers32, format.fmt)))
- return -EFAULT;
- return __get_v4l2_format32(&kp->format, &up->format);
-}
-
-static int __put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up)
+static int put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up)
{
+ if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_format32)) ||
+ put_user(kp->type, &up->type))
+ return -EFAULT;
switch (kp->type) {
case V4L2_BUF_TYPE_VIDEO_CAPTURE:
case V4L2_BUF_TYPE_VIDEO_OUTPUT:
return put_v4l2_pix_format(&kp->fmt.pix, &up->fmt.pix);
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- return put_v4l2_pix_format_mplane(&kp->fmt.pix_mp,
- &up->fmt.pix_mp);
case V4L2_BUF_TYPE_VIDEO_OVERLAY:
case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
return put_v4l2_window32(&kp->fmt.win, &up->fmt.win);
@@ -237,6 +398,12 @@ static int __put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __us
case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
return put_v4l2_sliced_vbi_format(&kp->fmt.sliced, &up->fmt.sliced);
+ case V4L2_BUF_TYPE_PRIVATE:
+ if (copy_to_user(up, kp, sizeof(up->fmt.raw_data)))
+ return -EFAULT;
+ return 0;
+ case 0:
+ return -EINVAL;
default:
printk(KERN_INFO "compat_ioctl32: unexpected VIDIOC_FMT type %d\n",
kp->type);
@@ -244,22 +411,6 @@ static int __put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __us
}
}
-static int put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up)
-{
- if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_format32)) ||
- put_user(kp->type, &up->type))
- return -EFAULT;
- return __put_v4l2_format32(kp, up);
-}
-
-static int put_v4l2_create32(struct v4l2_create_buffers *kp, struct v4l2_create_buffers32 __user *up)
-{
- if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_create_buffers32)) ||
- copy_to_user(up, kp, offsetof(struct v4l2_create_buffers32, format.fmt)))
- return -EFAULT;
- return __put_v4l2_format32(&kp->format, &up->format);
-}
-
struct v4l2_standard32 {
__u32 index;
__u32 id[2]; /* __u64 would get the alignment wrong */
@@ -291,246 +442,92 @@ static int put_v4l2_standard32(struct v4l2_standard *kp, struct v4l2_standard32
return 0;
}
-struct v4l2_plane32 {
- __u32 bytesused;
- __u32 length;
- union {
- __u32 mem_offset;
- compat_long_t userptr;
- __s32 fd;
- } m;
- __u32 data_offset;
- __u32 reserved[11];
-};
-
struct v4l2_buffer32 {
__u32 index;
- __u32 type; /* enum v4l2_buf_type */
+ enum v4l2_buf_type type;
__u32 bytesused;
__u32 flags;
- __u32 field; /* enum v4l2_field */
+ enum v4l2_field field;
struct compat_timeval timestamp;
struct v4l2_timecode timecode;
__u32 sequence;
/* memory location */
- __u32 memory; /* enum v4l2_memory */
+ enum v4l2_memory memory;
union {
__u32 offset;
compat_long_t userptr;
- compat_caddr_t planes;
- __s32 fd;
} m;
__u32 length;
- __u32 reserved2;
+ __u32 input;
__u32 reserved;
};
-static int get_v4l2_plane32(struct v4l2_plane *up, struct v4l2_plane32 *up32,
- enum v4l2_memory memory)
-{
- void __user *up_pln;
- compat_long_t p;
-
- if (copy_in_user(up, up32, 2 * sizeof(__u32)) ||
- copy_in_user(&up->data_offset, &up32->data_offset,
- sizeof(__u32)))
- return -EFAULT;
-
- if (memory == V4L2_MEMORY_USERPTR) {
- if (get_user(p, &up32->m.userptr))
- return -EFAULT;
- up_pln = compat_ptr(p);
- if (put_user((unsigned long)up_pln, &up->m.userptr))
- return -EFAULT;
- } else if (memory == V4L2_MEMORY_DMABUF) {
- if (copy_in_user(&up->m.fd, &up32->m.fd, sizeof(int)))
- return -EFAULT;
- } else {
- if (copy_in_user(&up->m.mem_offset, &up32->m.mem_offset,
- sizeof(__u32)))
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int put_v4l2_plane32(struct v4l2_plane *up, struct v4l2_plane32 *up32,
- enum v4l2_memory memory)
-{
- if (copy_in_user(up32, up, 2 * sizeof(__u32)) ||
- copy_in_user(&up32->data_offset, &up->data_offset,
- sizeof(__u32)))
- return -EFAULT;
-
- /* For MMAP, driver might've set up the offset, so copy it back.
- * USERPTR stays the same (was userspace-provided), so no copying. */
- if (memory == V4L2_MEMORY_MMAP)
- if (copy_in_user(&up32->m.mem_offset, &up->m.mem_offset,
- sizeof(__u32)))
- return -EFAULT;
- /* For DMABUF, driver might've set up the fd, so copy it back. */
- if (memory == V4L2_MEMORY_DMABUF)
- if (copy_in_user(&up32->m.fd, &up->m.fd,
- sizeof(int)))
- return -EFAULT;
-
- return 0;
-}
-
static int get_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user *up)
{
- struct v4l2_plane32 __user *uplane32;
- struct v4l2_plane __user *uplane;
- compat_caddr_t p;
- int num_planes;
- int ret;
if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_buffer32)) ||
get_user(kp->index, &up->index) ||
get_user(kp->type, &up->type) ||
get_user(kp->flags, &up->flags) ||
- get_user(kp->memory, &up->memory))
- return -EFAULT;
-
- if (V4L2_TYPE_IS_OUTPUT(kp->type))
- if (get_user(kp->bytesused, &up->bytesused) ||
- get_user(kp->field, &up->field) ||
- get_user(kp->timestamp.tv_sec, &up->timestamp.tv_sec) ||
- get_user(kp->timestamp.tv_usec,
- &up->timestamp.tv_usec))
+ get_user(kp->memory, &up->memory) ||
+ get_user(kp->input, &up->input))
return -EFAULT;
+ switch (kp->memory) {
+ case V4L2_MEMORY_MMAP:
+ break;
+ case V4L2_MEMORY_USERPTR:
+ {
+ compat_long_t tmp;
- if (V4L2_TYPE_IS_MULTIPLANAR(kp->type)) {
- if (get_user(kp->length, &up->length))
+ if (get_user(kp->length, &up->length) ||
+ get_user(tmp, &up->m.userptr))
return -EFAULT;
- num_planes = kp->length;
- if (num_planes == 0) {
- kp->m.planes = NULL;
- /* num_planes == 0 is legal, e.g. when userspace doesn't
- * need planes array on DQBUF*/
- return 0;
+ kp->m.userptr = (unsigned long)compat_ptr(tmp);
}
-
- if (get_user(p, &up->m.planes))
- return -EFAULT;
-
- uplane32 = compat_ptr(p);
- if (!access_ok(VERIFY_READ, uplane32,
- num_planes * sizeof(struct v4l2_plane32)))
+ break;
+ case V4L2_MEMORY_OVERLAY:
+ if (get_user(kp->m.offset, &up->m.offset))
return -EFAULT;
-
- /* We don't really care if userspace decides to kill itself
- * by passing a very big num_planes value */
- uplane = compat_alloc_user_space(num_planes *
- sizeof(struct v4l2_plane));
- kp->m.planes = uplane;
-
- while (--num_planes >= 0) {
- ret = get_v4l2_plane32(uplane, uplane32, kp->memory);
- if (ret)
- return ret;
- ++uplane;
- ++uplane32;
- }
- } else {
- switch (kp->memory) {
- case V4L2_MEMORY_MMAP:
- if (get_user(kp->length, &up->length) ||
- get_user(kp->m.offset, &up->m.offset))
- return -EFAULT;
- break;
- case V4L2_MEMORY_USERPTR:
- {
- compat_long_t tmp;
-
- if (get_user(kp->length, &up->length) ||
- get_user(tmp, &up->m.userptr))
- return -EFAULT;
-
- kp->m.userptr = (unsigned long)compat_ptr(tmp);
- }
- break;
- case V4L2_MEMORY_OVERLAY:
- if (get_user(kp->m.offset, &up->m.offset))
- return -EFAULT;
- break;
- case V4L2_MEMORY_DMABUF:
- if (get_user(kp->m.fd, &up->m.fd))
- return -EFAULT;
- break;
- }
+ break;
}
-
return 0;
}
static int put_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user *up)
{
- struct v4l2_plane32 __user *uplane32;
- struct v4l2_plane __user *uplane;
- compat_caddr_t p;
- int num_planes;
- int ret;
-
if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_buffer32)) ||
put_user(kp->index, &up->index) ||
put_user(kp->type, &up->type) ||
put_user(kp->flags, &up->flags) ||
- put_user(kp->memory, &up->memory))
+ put_user(kp->memory, &up->memory) ||
+ put_user(kp->input, &up->input))
return -EFAULT;
-
+ switch (kp->memory) {
+ case V4L2_MEMORY_MMAP:
+ if (put_user(kp->length, &up->length) ||
+ put_user(kp->m.offset, &up->m.offset))
+ return -EFAULT;
+ break;
+ case V4L2_MEMORY_USERPTR:
+ if (put_user(kp->length, &up->length) ||
+ put_user(kp->m.userptr, &up->m.userptr))
+ return -EFAULT;
+ break;
+ case V4L2_MEMORY_OVERLAY:
+ if (put_user(kp->m.offset, &up->m.offset))
+ return -EFAULT;
+ break;
+ }
if (put_user(kp->bytesused, &up->bytesused) ||
put_user(kp->field, &up->field) ||
put_user(kp->timestamp.tv_sec, &up->timestamp.tv_sec) ||
put_user(kp->timestamp.tv_usec, &up->timestamp.tv_usec) ||
copy_to_user(&up->timecode, &kp->timecode, sizeof(struct v4l2_timecode)) ||
put_user(kp->sequence, &up->sequence) ||
- put_user(kp->reserved2, &up->reserved2) ||
put_user(kp->reserved, &up->reserved))
return -EFAULT;
-
- if (V4L2_TYPE_IS_MULTIPLANAR(kp->type)) {
- num_planes = kp->length;
- if (num_planes == 0)
- return 0;
-
- uplane = kp->m.planes;
- if (get_user(p, &up->m.planes))
- return -EFAULT;
- uplane32 = compat_ptr(p);
-
- while (--num_planes >= 0) {
- ret = put_v4l2_plane32(uplane, uplane32, kp->memory);
- if (ret)
- return ret;
- ++uplane;
- ++uplane32;
- }
- } else {
- switch (kp->memory) {
- case V4L2_MEMORY_MMAP:
- if (put_user(kp->length, &up->length) ||
- put_user(kp->m.offset, &up->m.offset))
- return -EFAULT;
- break;
- case V4L2_MEMORY_USERPTR:
- if (put_user(kp->length, &up->length) ||
- put_user(kp->m.userptr, &up->m.userptr))
- return -EFAULT;
- break;
- case V4L2_MEMORY_OVERLAY:
- if (put_user(kp->m.offset, &up->m.offset))
- return -EFAULT;
- break;
- case V4L2_MEMORY_DMABUF:
- if (put_user(kp->m.fd, &up->m.fd))
- return -EFAULT;
- break;
- }
- }
-
return 0;
}
@@ -652,13 +649,12 @@ static int get_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext
if (get_user(p, &up->controls))
return -EFAULT;
ucontrols = compat_ptr(p);
- if (!access_ok(VERIFY_READ, ucontrols,
- n * sizeof(struct v4l2_ext_control32)))
+ if (!access_ok(VERIFY_READ, ucontrols, n * sizeof(struct v4l2_ext_control)))
return -EFAULT;
kcontrols = compat_alloc_user_space(n * sizeof(struct v4l2_ext_control));
kp->controls = kcontrols;
while (--n >= 0) {
- if (copy_in_user(kcontrols, ucontrols, sizeof(*ucontrols)))
+ if (copy_in_user(kcontrols, ucontrols, sizeof(*kcontrols)))
return -EFAULT;
if (ctrl_is_pointer(kcontrols->id)) {
void __user *s;
@@ -694,8 +690,7 @@ static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext
if (get_user(p, &up->controls))
return -EFAULT;
ucontrols = compat_ptr(p);
- if (!access_ok(VERIFY_WRITE, ucontrols,
- n * sizeof(struct v4l2_ext_control32)))
+ if (!access_ok(VERIFY_WRITE, ucontrols, n * sizeof(struct v4l2_ext_control)))
return -EFAULT;
while (--n >= 0) {
@@ -714,70 +709,6 @@ static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext
return 0;
}
-struct v4l2_event32 {
- __u32 type;
- union {
- __u8 data[64];
- } u;
- __u32 pending;
- __u32 sequence;
- struct compat_timespec timestamp;
- __u32 id;
- __u32 reserved[8];
-};
-
-static int put_v4l2_event32(struct v4l2_event *kp, struct v4l2_event32 __user *up)
-{
- if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_event32)) ||
- put_user(kp->type, &up->type) ||
- copy_to_user(&up->u, &kp->u, sizeof(kp->u)) ||
- put_user(kp->pending, &up->pending) ||
- put_user(kp->sequence, &up->sequence) ||
- put_compat_timespec(&kp->timestamp, &up->timestamp) ||
- put_user(kp->id, &up->id) ||
- copy_to_user(up->reserved, kp->reserved, 8 * sizeof(__u32)))
- return -EFAULT;
- return 0;
-}
-
-struct v4l2_subdev_edid32 {
- __u32 pad;
- __u32 start_block;
- __u32 blocks;
- __u32 reserved[5];
- compat_caddr_t edid;
-};
-
-static int get_v4l2_subdev_edid32(struct v4l2_subdev_edid *kp, struct v4l2_subdev_edid32 __user *up)
-{
- u32 tmp;
-
- if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_subdev_edid32)) ||
- get_user(kp->pad, &up->pad) ||
- get_user(kp->start_block, &up->start_block) ||
- get_user(kp->blocks, &up->blocks) ||
- get_user(tmp, &up->edid) ||
- copy_from_user(kp->reserved, up->reserved, sizeof(kp->reserved)))
- return -EFAULT;
- kp->edid = compat_ptr(tmp);
- return 0;
-}
-
-static int put_v4l2_subdev_edid32(struct v4l2_subdev_edid *kp, struct v4l2_subdev_edid32 __user *up)
-{
- u32 tmp = (u32)((unsigned long)kp->edid);
-
- if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_subdev_edid32)) ||
- put_user(kp->pad, &up->pad) ||
- put_user(kp->start_block, &up->start_block) ||
- put_user(kp->blocks, &up->blocks) ||
- put_user(tmp, &up->edid) ||
- copy_to_user(kp->reserved, up->reserved, sizeof(kp->reserved)))
- return -EFAULT;
- return 0;
-}
-
-
#define VIDIOC_G_FMT32 _IOWR('V', 4, struct v4l2_format32)
#define VIDIOC_S_FMT32 _IOWR('V', 5, struct v4l2_format32)
#define VIDIOC_QUERYBUF32 _IOWR('V', 9, struct v4l2_buffer32)
@@ -787,17 +718,15 @@ static int put_v4l2_subdev_edid32(struct v4l2_subdev_edid *kp, struct v4l2_subde
#define VIDIOC_DQBUF32 _IOWR('V', 17, struct v4l2_buffer32)
#define VIDIOC_ENUMSTD32 _IOWR('V', 25, struct v4l2_standard32)
#define VIDIOC_ENUMINPUT32 _IOWR('V', 26, struct v4l2_input32)
-#define VIDIOC_SUBDEV_G_EDID32 _IOWR('V', 63, struct v4l2_subdev_edid32)
-#define VIDIOC_SUBDEV_S_EDID32 _IOWR('V', 64, struct v4l2_subdev_edid32)
#define VIDIOC_TRY_FMT32 _IOWR('V', 64, struct v4l2_format32)
#define VIDIOC_G_EXT_CTRLS32 _IOWR('V', 71, struct v4l2_ext_controls32)
#define VIDIOC_S_EXT_CTRLS32 _IOWR('V', 72, struct v4l2_ext_controls32)
#define VIDIOC_TRY_EXT_CTRLS32 _IOWR('V', 73, struct v4l2_ext_controls32)
-#define VIDIOC_DQEVENT32 _IOR ('V', 89, struct v4l2_event32)
-#define VIDIOC_CREATE_BUFS32 _IOWR('V', 92, struct v4l2_create_buffers32)
-#define VIDIOC_PREPARE_BUF32 _IOWR('V', 93, struct v4l2_buffer32)
#define VIDIOC_OVERLAY32 _IOW ('V', 14, s32)
+#ifdef __OLD_VIDIOC_
+#define VIDIOC_OVERLAY32_OLD _IOWR('V', 14, s32)
+#endif
#define VIDIOC_STREAMON32 _IOW ('V', 18, s32)
#define VIDIOC_STREAMOFF32 _IOW ('V', 19, s32)
#define VIDIOC_G_INPUT32 _IOR ('V', 38, s32)
@@ -808,15 +737,19 @@ static int put_v4l2_subdev_edid32(struct v4l2_subdev_edid *kp, struct v4l2_subde
static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
union {
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ struct video_tuner vt;
+ struct video_buffer vb;
+ struct video_window vw;
+ struct video_code vc;
+ struct video_audio va;
+#endif
struct v4l2_format v2f;
struct v4l2_buffer v2b;
struct v4l2_framebuffer v2fb;
struct v4l2_input v2i;
struct v4l2_standard v2s;
struct v4l2_ext_controls v2ecs;
- struct v4l2_event v2ev;
- struct v4l2_create_buffers v2crt;
- struct v4l2_subdev_edid v2edid;
unsigned long vx;
int vi;
} karg;
@@ -826,6 +759,17 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
/* First, convert the command. */
switch (cmd) {
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ case VIDIOCGTUNER32: cmd = VIDIOCGTUNER; break;
+ case VIDIOCSTUNER32: cmd = VIDIOCSTUNER; break;
+ case VIDIOCGWIN32: cmd = VIDIOCGWIN; break;
+ case VIDIOCSWIN32: cmd = VIDIOCSWIN; break;
+ case VIDIOCGFBUF32: cmd = VIDIOCGFBUF; break;
+ case VIDIOCSFBUF32: cmd = VIDIOCSFBUF; break;
+ case VIDIOCGFREQ32: cmd = VIDIOCGFREQ; break;
+ case VIDIOCSFREQ32: cmd = VIDIOCSFREQ; break;
+ case VIDIOCSMICROCODE32: cmd = VIDIOCSMICROCODE; break;
+#endif
case VIDIOC_G_FMT32: cmd = VIDIOC_G_FMT; break;
case VIDIOC_S_FMT32: cmd = VIDIOC_S_FMT; break;
case VIDIOC_QUERYBUF32: cmd = VIDIOC_QUERYBUF; break;
@@ -839,21 +783,56 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
case VIDIOC_G_EXT_CTRLS32: cmd = VIDIOC_G_EXT_CTRLS; break;
case VIDIOC_S_EXT_CTRLS32: cmd = VIDIOC_S_EXT_CTRLS; break;
case VIDIOC_TRY_EXT_CTRLS32: cmd = VIDIOC_TRY_EXT_CTRLS; break;
- case VIDIOC_DQEVENT32: cmd = VIDIOC_DQEVENT; break;
case VIDIOC_OVERLAY32: cmd = VIDIOC_OVERLAY; break;
+#ifdef __OLD_VIDIOC_
+ case VIDIOC_OVERLAY32_OLD: cmd = VIDIOC_OVERLAY; break;
+#endif
case VIDIOC_STREAMON32: cmd = VIDIOC_STREAMON; break;
case VIDIOC_STREAMOFF32: cmd = VIDIOC_STREAMOFF; break;
case VIDIOC_G_INPUT32: cmd = VIDIOC_G_INPUT; break;
case VIDIOC_S_INPUT32: cmd = VIDIOC_S_INPUT; break;
case VIDIOC_G_OUTPUT32: cmd = VIDIOC_G_OUTPUT; break;
case VIDIOC_S_OUTPUT32: cmd = VIDIOC_S_OUTPUT; break;
- case VIDIOC_CREATE_BUFS32: cmd = VIDIOC_CREATE_BUFS; break;
- case VIDIOC_PREPARE_BUF32: cmd = VIDIOC_PREPARE_BUF; break;
- case VIDIOC_SUBDEV_G_EDID32: cmd = VIDIOC_SUBDEV_G_EDID; break;
- case VIDIOC_SUBDEV_S_EDID32: cmd = VIDIOC_SUBDEV_S_EDID; break;
}
switch (cmd) {
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ case VIDIOCSTUNER:
+ case VIDIOCGTUNER:
+ err = get_video_tuner32(&karg.vt, up);
+ compatible_arg = 0;
+ break;
+
+ case VIDIOCSFBUF:
+ err = get_video_buffer32(&karg.vb, up);
+ compatible_arg = 0;
+ break;
+
+ case VIDIOCSWIN:
+ err = get_video_window32(&karg.vw, up);
+ compatible_arg = 0;
+ break;
+
+ case VIDIOCGWIN:
+ case VIDIOCGFBUF:
+ case VIDIOCGFREQ:
+ compatible_arg = 0;
+ break;
+
+ case VIDIOCSMICROCODE:
+ err = get_microcode32(&karg.vc, up);
+ compatible_arg = 0;
+ break;
+
+ case VIDIOCSFREQ:
+ err = get_user(karg.vx, (u32 __user *)up);
+ compatible_arg = 0;
+ break;
+
+ case VIDIOCCAPTURE:
+ case VIDIOCSYNC:
+ case VIDIOCSWRITEMODE:
+#endif
case VIDIOC_OVERLAY:
case VIDIOC_STREAMON:
case VIDIOC_STREAMOFF:
@@ -868,12 +847,6 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
compatible_arg = 0;
break;
- case VIDIOC_SUBDEV_G_EDID:
- case VIDIOC_SUBDEV_S_EDID:
- err = get_v4l2_subdev_edid32(&karg.v2edid, up);
- compatible_arg = 0;
- break;
-
case VIDIOC_G_FMT:
case VIDIOC_S_FMT:
case VIDIOC_TRY_FMT:
@@ -881,12 +854,6 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
compatible_arg = 0;
break;
- case VIDIOC_CREATE_BUFS:
- err = get_v4l2_create32(&karg.v2crt, up);
- compatible_arg = 0;
- break;
-
- case VIDIOC_PREPARE_BUF:
case VIDIOC_QUERYBUF:
case VIDIOC_QBUF:
case VIDIOC_DQBUF:
@@ -919,9 +886,6 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
err = get_v4l2_ext_controls32(&karg.v2ecs, up);
compatible_arg = 0;
break;
- case VIDIOC_DQEVENT:
- compatible_arg = 0;
- break;
}
if (err)
return err;
@@ -951,6 +915,23 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
return err;
switch (cmd) {
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ case VIDIOCGTUNER:
+ err = put_video_tuner32(&karg.vt, up);
+ break;
+
+ case VIDIOCGWIN:
+ err = put_video_window32(&karg.vw, up);
+ break;
+
+ case VIDIOCGFBUF:
+ err = put_video_buffer32(&karg.vb, up);
+ break;
+
+ case VIDIOCGFREQ:
+ err = put_user(((u32)karg.vx), (u32 __user *)up);
+ break;
+#endif
case VIDIOC_S_INPUT:
case VIDIOC_S_OUTPUT:
case VIDIOC_G_INPUT:
@@ -962,25 +943,12 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
err = put_v4l2_framebuffer32(&karg.v2fb, up);
break;
- case VIDIOC_DQEVENT:
- err = put_v4l2_event32(&karg.v2ev, up);
- break;
-
- case VIDIOC_SUBDEV_G_EDID:
- case VIDIOC_SUBDEV_S_EDID:
- err = put_v4l2_subdev_edid32(&karg.v2edid, up);
- break;
-
case VIDIOC_G_FMT:
case VIDIOC_S_FMT:
case VIDIOC_TRY_FMT:
err = put_v4l2_format32(&karg.v2f, up);
break;
- case VIDIOC_CREATE_BUFS:
- err = put_v4l2_create32(&karg.v2crt, up);
- break;
-
case VIDIOC_QUERYBUF:
case VIDIOC_QBUF:
case VIDIOC_DQBUF:
@@ -1000,13 +968,51 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar
long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
{
- struct video_device *vdev = video_devdata(file);
long ret = -ENOIOCTLCMD;
- if (!file->f_op->unlocked_ioctl)
+ if (!file->f_op->ioctl && !file->f_op->unlocked_ioctl)
return ret;
switch (cmd) {
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ case VIDIOCGCAP:
+ case VIDIOCGCHAN:
+ case VIDIOCSCHAN:
+ case VIDIOCGTUNER32:
+ case VIDIOCSTUNER32:
+ case VIDIOCGPICT:
+ case VIDIOCSPICT:
+ case VIDIOCCAPTURE32:
+ case VIDIOCGWIN32:
+ case VIDIOCSWIN32:
+ case VIDIOCGFBUF32:
+ case VIDIOCSFBUF32:
+ case VIDIOCKEY:
+ case VIDIOCGFREQ32:
+ case VIDIOCSFREQ32:
+ case VIDIOCGAUDIO:
+ case VIDIOCSAUDIO:
+ case VIDIOCSYNC32:
+ case VIDIOCMCAPTURE:
+ case VIDIOCGMBUF:
+ case VIDIOCGUNIT:
+ case VIDIOCGCAPTURE:
+ case VIDIOCSCAPTURE:
+ case VIDIOCSPLAYMODE:
+ case VIDIOCSWRITEMODE32:
+ case VIDIOCGPLAYINFO:
+ case VIDIOCSMICROCODE32:
+ case VIDIOCGVBIFMT:
+ case VIDIOCSVBIFMT:
+#endif
+#ifdef __OLD_VIDIOC_
+ case VIDIOC_OVERLAY32_OLD:
+ case VIDIOC_S_PARM_OLD:
+ case VIDIOC_S_CTRL_OLD:
+ case VIDIOC_G_AUDIO_OLD:
+ case VIDIOC_G_AUDOUT_OLD:
+ case VIDIOC_CROPCAP_OLD:
+#endif
case VIDIOC_QUERYCAP:
case VIDIOC_RESERVED:
case VIDIOC_ENUM_FMT:
@@ -1018,7 +1024,6 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
case VIDIOC_S_FBUF32:
case VIDIOC_OVERLAY32:
case VIDIOC_QBUF32:
- case VIDIOC_EXPBUF:
case VIDIOC_DQBUF32:
case VIDIOC_STREAMON32:
case VIDIOC_STREAMOFF32:
@@ -1050,8 +1055,6 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
case VIDIOC_CROPCAP:
case VIDIOC_G_CROP:
case VIDIOC_S_CROP:
- case VIDIOC_G_SELECTION:
- case VIDIOC_S_SELECTION:
case VIDIOC_G_JPEGCOMP:
case VIDIOC_S_JPEGCOMP:
case VIDIOC_QUERYSTD:
@@ -1070,44 +1073,35 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
case VIDIOC_G_ENC_INDEX:
case VIDIOC_ENCODER_CMD:
case VIDIOC_TRY_ENCODER_CMD:
- case VIDIOC_DECODER_CMD:
- case VIDIOC_TRY_DECODER_CMD:
case VIDIOC_DBG_S_REGISTER:
case VIDIOC_DBG_G_REGISTER:
case VIDIOC_DBG_G_CHIP_IDENT:
case VIDIOC_S_HW_FREQ_SEEK:
- case VIDIOC_ENUM_DV_PRESETS:
- case VIDIOC_S_DV_PRESET:
- case VIDIOC_G_DV_PRESET:
- case VIDIOC_QUERY_DV_PRESET:
- case VIDIOC_S_DV_TIMINGS:
- case VIDIOC_G_DV_TIMINGS:
- case VIDIOC_DQEVENT:
- case VIDIOC_DQEVENT32:
- case VIDIOC_SUBSCRIBE_EVENT:
- case VIDIOC_UNSUBSCRIBE_EVENT:
- case VIDIOC_CREATE_BUFS32:
- case VIDIOC_PREPARE_BUF32:
- case VIDIOC_ENUM_DV_TIMINGS:
- case VIDIOC_QUERY_DV_TIMINGS:
- case VIDIOC_DV_TIMINGS_CAP:
- case VIDIOC_ENUM_FREQ_BANDS:
- case VIDIOC_SUBDEV_G_EDID32:
- case VIDIOC_SUBDEV_S_EDID32:
ret = do_video_ioctl(file, cmd, arg);
break;
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ /* BTTV specific... */
+ case _IOW('v', BASE_VIDIOCPRIVATE+0, char [256]):
+ case _IOR('v', BASE_VIDIOCPRIVATE+1, char [256]):
+ case _IOR('v' , BASE_VIDIOCPRIVATE+2, unsigned int):
+ case _IOW('v' , BASE_VIDIOCPRIVATE+3, char [16]): /* struct bttv_pll_info */
+ case _IOR('v' , BASE_VIDIOCPRIVATE+4, int):
+ case _IOR('v' , BASE_VIDIOCPRIVATE+5, int):
+ case _IOR('v' , BASE_VIDIOCPRIVATE+6, int):
+ case _IOR('v' , BASE_VIDIOCPRIVATE+7, int):
+ ret = native_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
+ break;
+#endif
default:
- if (vdev->fops->compat_ioctl32)
- ret = vdev->fops->compat_ioctl32(file, cmd, arg);
-
- if (ret == -ENOIOCTLCMD)
- printk(KERN_WARNING "compat_ioctl32: "
- "unknown ioctl '%c', dir=%d, #%d (0x%08x)\n",
- _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd),
- cmd);
+ printk(KERN_WARNING "compat_ioctl32: "
+ "unknown ioctl '%c', dir=%d, #%d (0x%08x)\n",
+ _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd), cmd);
break;
}
return ret;
}
EXPORT_SYMBOL_GPL(v4l2_compat_ioctl32);
+#endif
+
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
deleted file mode 100644
index 6b28b580..00000000
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ /dev/null
@@ -1,2913 +0,0 @@
-/*
- V4L2 controls framework implementation.
-
- Copyright (C) 2010 Hans Verkuil <hverkuil@xs4all.nl>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/ctype.h>
-#include <linux/slab.h>
-#include <linux/export.h>
-#include <media/v4l2-ioctl.h>
-#include <media/v4l2-device.h>
-#include <media/v4l2-ctrls.h>
-#include <media/v4l2-event.h>
-#include <media/v4l2-dev.h>
-
-#define has_op(master, op) \
- (master->ops && master->ops->op)
-#define call_op(master, op) \
- (has_op(master, op) ? master->ops->op(master) : 0)
-
-/* Internal temporary helper struct, one for each v4l2_ext_control */
-struct v4l2_ctrl_helper {
- /* Pointer to the control reference of the master control */
- struct v4l2_ctrl_ref *mref;
- /* The control corresponding to the v4l2_ext_control ID field. */
- struct v4l2_ctrl *ctrl;
- /* v4l2_ext_control index of the next control belonging to the
- same cluster, or 0 if there isn't any. */
- u32 next;
-};
-
-/* Small helper function to determine if the autocluster is set to manual
- mode. */
-static bool is_cur_manual(const struct v4l2_ctrl *master)
-{
- return master->is_auto && master->cur.val == master->manual_mode_value;
-}
-
-/* Same as above, but this checks the against the new value instead of the
- current value. */
-static bool is_new_manual(const struct v4l2_ctrl *master)
-{
- return master->is_auto && master->val == master->manual_mode_value;
-}
-
-/* Returns NULL or a character pointer array containing the menu for
- the given control ID. The pointer array ends with a NULL pointer.
- An empty string signifies a menu entry that is invalid. This allows
- drivers to disable certain options if it is not supported. */
-const char * const *v4l2_ctrl_get_menu(u32 id)
-{
- static const char * const mpeg_audio_sampling_freq[] = {
- "44.1 kHz",
- "48 kHz",
- "32 kHz",
- NULL
- };
- static const char * const mpeg_audio_encoding[] = {
- "MPEG-1/2 Layer I",
- "MPEG-1/2 Layer II",
- "MPEG-1/2 Layer III",
- "MPEG-2/4 AAC",
- "AC-3",
- NULL
- };
- static const char * const mpeg_audio_l1_bitrate[] = {
- "32 kbps",
- "64 kbps",
- "96 kbps",
- "128 kbps",
- "160 kbps",
- "192 kbps",
- "224 kbps",
- "256 kbps",
- "288 kbps",
- "320 kbps",
- "352 kbps",
- "384 kbps",
- "416 kbps",
- "448 kbps",
- NULL
- };
- static const char * const mpeg_audio_l2_bitrate[] = {
- "32 kbps",
- "48 kbps",
- "56 kbps",
- "64 kbps",
- "80 kbps",
- "96 kbps",
- "112 kbps",
- "128 kbps",
- "160 kbps",
- "192 kbps",
- "224 kbps",
- "256 kbps",
- "320 kbps",
- "384 kbps",
- NULL
- };
- static const char * const mpeg_audio_l3_bitrate[] = {
- "32 kbps",
- "40 kbps",
- "48 kbps",
- "56 kbps",
- "64 kbps",
- "80 kbps",
- "96 kbps",
- "112 kbps",
- "128 kbps",
- "160 kbps",
- "192 kbps",
- "224 kbps",
- "256 kbps",
- "320 kbps",
- NULL
- };
- static const char * const mpeg_audio_ac3_bitrate[] = {
- "32 kbps",
- "40 kbps",
- "48 kbps",
- "56 kbps",
- "64 kbps",
- "80 kbps",
- "96 kbps",
- "112 kbps",
- "128 kbps",
- "160 kbps",
- "192 kbps",
- "224 kbps",
- "256 kbps",
- "320 kbps",
- "384 kbps",
- "448 kbps",
- "512 kbps",
- "576 kbps",
- "640 kbps",
- NULL
- };
- static const char * const mpeg_audio_mode[] = {
- "Stereo",
- "Joint Stereo",
- "Dual",
- "Mono",
- NULL
- };
- static const char * const mpeg_audio_mode_extension[] = {
- "Bound 4",
- "Bound 8",
- "Bound 12",
- "Bound 16",
- NULL
- };
- static const char * const mpeg_audio_emphasis[] = {
- "No Emphasis",
- "50/15 us",
- "CCITT J17",
- NULL
- };
- static const char * const mpeg_audio_crc[] = {
- "No CRC",
- "16-bit CRC",
- NULL
- };
- static const char * const mpeg_audio_dec_playback[] = {
- "Auto",
- "Stereo",
- "Left",
- "Right",
- "Mono",
- "Swapped Stereo",
- NULL
- };
- static const char * const mpeg_video_encoding[] = {
- "MPEG-1",
- "MPEG-2",
- "MPEG-4 AVC",
- NULL
- };
- static const char * const mpeg_video_aspect[] = {
- "1x1",
- "4x3",
- "16x9",
- "2.21x1",
- NULL
- };
- static const char * const mpeg_video_bitrate_mode[] = {
- "Variable Bitrate",
- "Constant Bitrate",
- NULL
- };
- static const char * const mpeg_stream_type[] = {
- "MPEG-2 Program Stream",
- "MPEG-2 Transport Stream",
- "MPEG-1 System Stream",
- "MPEG-2 DVD-compatible Stream",
- "MPEG-1 VCD-compatible Stream",
- "MPEG-2 SVCD-compatible Stream",
- NULL
- };
- static const char * const mpeg_stream_vbi_fmt[] = {
- "No VBI",
- "Private Packet, IVTV Format",
- NULL
- };
- static const char * const camera_power_line_frequency[] = {
- "Disabled",
- "50 Hz",
- "60 Hz",
- "Auto",
- NULL
- };
- static const char * const camera_exposure_auto[] = {
- "Auto Mode",
- "Manual Mode",
- "Shutter Priority Mode",
- "Aperture Priority Mode",
- NULL
- };
- static const char * const camera_exposure_metering[] = {
- "Average",
- "Center Weighted",
- "Spot",
- NULL
- };
- static const char * const camera_auto_focus_range[] = {
- "Auto",
- "Normal",
- "Macro",
- "Infinity",
- NULL
- };
- static const char * const colorfx[] = {
- "None",
- "Black & White",
- "Sepia",
- "Negative",
- "Emboss",
- "Sketch",
- "Sky Blue",
- "Grass Green",
- "Skin Whiten",
- "Vivid",
- "Aqua",
- "Art Freeze",
- "Silhouette",
- "Solarization",
- "Antique",
- "Set Cb/Cr",
- NULL
- };
- static const char * const auto_n_preset_white_balance[] = {
- "Manual",
- "Auto",
- "Incandescent",
- "Fluorescent",
- "Fluorescent H",
- "Horizon",
- "Daylight",
- "Flash",
- "Cloudy",
- "Shade",
- NULL,
- };
- static const char * const camera_iso_sensitivity_auto[] = {
- "Manual",
- "Auto",
- NULL
- };
- static const char * const scene_mode[] = {
- "None",
- "Backlight",
- "Beach/Snow",
- "Candle Light",
- "Dusk/Dawn",
- "Fall Colors",
- "Fireworks",
- "Landscape",
- "Night",
- "Party/Indoor",
- "Portrait",
- "Sports",
- "Sunset",
- "Text",
- NULL
- };
- static const char * const tune_preemphasis[] = {
- "No Preemphasis",
- "50 Microseconds",
- "75 Microseconds",
- NULL,
- };
- static const char * const header_mode[] = {
- "Separate Buffer",
- "Joined With 1st Frame",
- NULL,
- };
- static const char * const multi_slice[] = {
- "Single",
- "Max Macroblocks",
- "Max Bytes",
- NULL,
- };
- static const char * const entropy_mode[] = {
- "CAVLC",
- "CABAC",
- NULL,
- };
- static const char * const mpeg_h264_level[] = {
- "1",
- "1b",
- "1.1",
- "1.2",
- "1.3",
- "2",
- "2.1",
- "2.2",
- "3",
- "3.1",
- "3.2",
- "4",
- "4.1",
- "4.2",
- "5",
- "5.1",
- NULL,
- };
- static const char * const h264_loop_filter[] = {
- "Enabled",
- "Disabled",
- "Disabled at Slice Boundary",
- NULL,
- };
- static const char * const h264_profile[] = {
- "Baseline",
- "Constrained Baseline",
- "Main",
- "Extended",
- "High",
- "High 10",
- "High 422",
- "High 444 Predictive",
- "High 10 Intra",
- "High 422 Intra",
- "High 444 Intra",
- "CAVLC 444 Intra",
- "Scalable Baseline",
- "Scalable High",
- "Scalable High Intra",
- "Multiview High",
- NULL,
- };
- static const char * const vui_sar_idc[] = {
- "Unspecified",
- "1:1",
- "12:11",
- "10:11",
- "16:11",
- "40:33",
- "24:11",
- "20:11",
- "32:11",
- "80:33",
- "18:11",
- "15:11",
- "64:33",
- "160:99",
- "4:3",
- "3:2",
- "2:1",
- "Extended SAR",
- NULL,
- };
- static const char * const h264_fp_arrangement_type[] = {
- "Checkerboard",
- "Column",
- "Row",
- "Side by Side",
- "Top Bottom",
- "Temporal",
- NULL,
- };
- static const char * const h264_fmo_map_type[] = {
- "Interleaved Slices",
- "Scattered Slices",
- "Foreground with Leftover",
- "Box Out",
- "Raster Scan",
- "Wipe Scan",
- "Explicit",
- NULL,
- };
- static const char * const mpeg_mpeg4_level[] = {
- "0",
- "0b",
- "1",
- "2",
- "3",
- "3b",
- "4",
- "5",
- NULL,
- };
- static const char * const mpeg4_profile[] = {
- "Simple",
- "Advanced Simple",
- "Core",
- "Simple Scalable",
- "Advanced Coding Efficency",
- NULL,
- };
-
- static const char * const flash_led_mode[] = {
- "Off",
- "Flash",
- "Torch",
- NULL,
- };
- static const char * const flash_strobe_source[] = {
- "Software",
- "External",
- NULL,
- };
-
- static const char * const jpeg_chroma_subsampling[] = {
- "4:4:4",
- "4:2:2",
- "4:2:0",
- "4:1:1",
- "4:1:0",
- "Gray",
- NULL,
- };
- static const char * const dv_tx_mode[] = {
- "DVI-D",
- "HDMI",
- NULL,
- };
- static const char * const dv_rgb_range[] = {
- "Automatic",
- "RGB limited range (16-235)",
- "RGB full range (0-255)",
- NULL,
- };
-
-
- switch (id) {
- case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
- return mpeg_audio_sampling_freq;
- case V4L2_CID_MPEG_AUDIO_ENCODING:
- return mpeg_audio_encoding;
- case V4L2_CID_MPEG_AUDIO_L1_BITRATE:
- return mpeg_audio_l1_bitrate;
- case V4L2_CID_MPEG_AUDIO_L2_BITRATE:
- return mpeg_audio_l2_bitrate;
- case V4L2_CID_MPEG_AUDIO_L3_BITRATE:
- return mpeg_audio_l3_bitrate;
- case V4L2_CID_MPEG_AUDIO_AC3_BITRATE:
- return mpeg_audio_ac3_bitrate;
- case V4L2_CID_MPEG_AUDIO_MODE:
- return mpeg_audio_mode;
- case V4L2_CID_MPEG_AUDIO_MODE_EXTENSION:
- return mpeg_audio_mode_extension;
- case V4L2_CID_MPEG_AUDIO_EMPHASIS:
- return mpeg_audio_emphasis;
- case V4L2_CID_MPEG_AUDIO_CRC:
- return mpeg_audio_crc;
- case V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK:
- case V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK:
- return mpeg_audio_dec_playback;
- case V4L2_CID_MPEG_VIDEO_ENCODING:
- return mpeg_video_encoding;
- case V4L2_CID_MPEG_VIDEO_ASPECT:
- return mpeg_video_aspect;
- case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
- return mpeg_video_bitrate_mode;
- case V4L2_CID_MPEG_STREAM_TYPE:
- return mpeg_stream_type;
- case V4L2_CID_MPEG_STREAM_VBI_FMT:
- return mpeg_stream_vbi_fmt;
- case V4L2_CID_POWER_LINE_FREQUENCY:
- return camera_power_line_frequency;
- case V4L2_CID_EXPOSURE_AUTO:
- return camera_exposure_auto;
- case V4L2_CID_EXPOSURE_METERING:
- return camera_exposure_metering;
- case V4L2_CID_AUTO_FOCUS_RANGE:
- return camera_auto_focus_range;
- case V4L2_CID_COLORFX:
- return colorfx;
- case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
- return auto_n_preset_white_balance;
- case V4L2_CID_ISO_SENSITIVITY_AUTO:
- return camera_iso_sensitivity_auto;
- case V4L2_CID_SCENE_MODE:
- return scene_mode;
- case V4L2_CID_TUNE_PREEMPHASIS:
- return tune_preemphasis;
- case V4L2_CID_FLASH_LED_MODE:
- return flash_led_mode;
- case V4L2_CID_FLASH_STROBE_SOURCE:
- return flash_strobe_source;
- case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
- return header_mode;
- case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
- return multi_slice;
- case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
- return entropy_mode;
- case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
- return mpeg_h264_level;
- case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
- return h264_loop_filter;
- case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
- return h264_profile;
- case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC:
- return vui_sar_idc;
- case V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE:
- return h264_fp_arrangement_type;
- case V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE:
- return h264_fmo_map_type;
- case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
- return mpeg_mpeg4_level;
- case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
- return mpeg4_profile;
- case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
- return jpeg_chroma_subsampling;
- case V4L2_CID_DV_TX_MODE:
- return dv_tx_mode;
- case V4L2_CID_DV_TX_RGB_RANGE:
- case V4L2_CID_DV_RX_RGB_RANGE:
- return dv_rgb_range;
-
- default:
- return NULL;
- }
-}
-EXPORT_SYMBOL(v4l2_ctrl_get_menu);
-
-/* Return the control name. */
-const char *v4l2_ctrl_get_name(u32 id)
-{
- switch (id) {
- /* USER controls */
- /* Keep the order of the 'case's the same as in videodev2.h! */
- case V4L2_CID_USER_CLASS: return "User Controls";
- case V4L2_CID_BRIGHTNESS: return "Brightness";
- case V4L2_CID_CONTRAST: return "Contrast";
- case V4L2_CID_SATURATION: return "Saturation";
- case V4L2_CID_HUE: return "Hue";
- case V4L2_CID_AUDIO_VOLUME: return "Volume";
- case V4L2_CID_AUDIO_BALANCE: return "Balance";
- case V4L2_CID_AUDIO_BASS: return "Bass";
- case V4L2_CID_AUDIO_TREBLE: return "Treble";
- case V4L2_CID_AUDIO_MUTE: return "Mute";
- case V4L2_CID_AUDIO_LOUDNESS: return "Loudness";
- case V4L2_CID_BLACK_LEVEL: return "Black Level";
- case V4L2_CID_AUTO_WHITE_BALANCE: return "White Balance, Automatic";
- case V4L2_CID_DO_WHITE_BALANCE: return "Do White Balance";
- case V4L2_CID_RED_BALANCE: return "Red Balance";
- case V4L2_CID_BLUE_BALANCE: return "Blue Balance";
- case V4L2_CID_GAMMA: return "Gamma";
- case V4L2_CID_EXPOSURE: return "Exposure";
- case V4L2_CID_AUTOGAIN: return "Gain, Automatic";
- case V4L2_CID_GAIN: return "Gain";
- case V4L2_CID_HFLIP: return "Horizontal Flip";
- case V4L2_CID_VFLIP: return "Vertical Flip";
- case V4L2_CID_POWER_LINE_FREQUENCY: return "Power Line Frequency";
- case V4L2_CID_HUE_AUTO: return "Hue, Automatic";
- case V4L2_CID_WHITE_BALANCE_TEMPERATURE: return "White Balance Temperature";
- case V4L2_CID_SHARPNESS: return "Sharpness";
- case V4L2_CID_BACKLIGHT_COMPENSATION: return "Backlight Compensation";
- case V4L2_CID_CHROMA_AGC: return "Chroma AGC";
- case V4L2_CID_COLOR_KILLER: return "Color Killer";
- case V4L2_CID_COLORFX: return "Color Effects";
- case V4L2_CID_AUTOBRIGHTNESS: return "Brightness, Automatic";
- case V4L2_CID_BAND_STOP_FILTER: return "Band-Stop Filter";
- case V4L2_CID_ROTATE: return "Rotate";
- case V4L2_CID_BG_COLOR: return "Background Color";
- case V4L2_CID_CHROMA_GAIN: return "Chroma Gain";
- case V4L2_CID_ILLUMINATORS_1: return "Illuminator 1";
- case V4L2_CID_ILLUMINATORS_2: return "Illuminator 2";
- case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: return "Min Number of Capture Buffers";
- case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: return "Min Number of Output Buffers";
- case V4L2_CID_ALPHA_COMPONENT: return "Alpha Component";
- case V4L2_CID_COLORFX_CBCR: return "Color Effects, CbCr";
-
- /* MPEG controls */
- /* Keep the order of the 'case's the same as in videodev2.h! */
- case V4L2_CID_MPEG_CLASS: return "MPEG Encoder Controls";
- case V4L2_CID_MPEG_STREAM_TYPE: return "Stream Type";
- case V4L2_CID_MPEG_STREAM_PID_PMT: return "Stream PMT Program ID";
- case V4L2_CID_MPEG_STREAM_PID_AUDIO: return "Stream Audio Program ID";
- case V4L2_CID_MPEG_STREAM_PID_VIDEO: return "Stream Video Program ID";
- case V4L2_CID_MPEG_STREAM_PID_PCR: return "Stream PCR Program ID";
- case V4L2_CID_MPEG_STREAM_PES_ID_AUDIO: return "Stream PES Audio ID";
- case V4L2_CID_MPEG_STREAM_PES_ID_VIDEO: return "Stream PES Video ID";
- case V4L2_CID_MPEG_STREAM_VBI_FMT: return "Stream VBI Format";
- case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: return "Audio Sampling Frequency";
- case V4L2_CID_MPEG_AUDIO_ENCODING: return "Audio Encoding";
- case V4L2_CID_MPEG_AUDIO_L1_BITRATE: return "Audio Layer I Bitrate";
- case V4L2_CID_MPEG_AUDIO_L2_BITRATE: return "Audio Layer II Bitrate";
- case V4L2_CID_MPEG_AUDIO_L3_BITRATE: return "Audio Layer III Bitrate";
- case V4L2_CID_MPEG_AUDIO_MODE: return "Audio Stereo Mode";
- case V4L2_CID_MPEG_AUDIO_MODE_EXTENSION: return "Audio Stereo Mode Extension";
- case V4L2_CID_MPEG_AUDIO_EMPHASIS: return "Audio Emphasis";
- case V4L2_CID_MPEG_AUDIO_CRC: return "Audio CRC";
- case V4L2_CID_MPEG_AUDIO_MUTE: return "Audio Mute";
- case V4L2_CID_MPEG_AUDIO_AAC_BITRATE: return "Audio AAC Bitrate";
- case V4L2_CID_MPEG_AUDIO_AC3_BITRATE: return "Audio AC-3 Bitrate";
- case V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK: return "Audio Playback";
- case V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK: return "Audio Multilingual Playback";
- case V4L2_CID_MPEG_VIDEO_ENCODING: return "Video Encoding";
- case V4L2_CID_MPEG_VIDEO_ASPECT: return "Video Aspect";
- case V4L2_CID_MPEG_VIDEO_B_FRAMES: return "Video B Frames";
- case V4L2_CID_MPEG_VIDEO_GOP_SIZE: return "Video GOP Size";
- case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE: return "Video GOP Closure";
- case V4L2_CID_MPEG_VIDEO_PULLDOWN: return "Video Pulldown";
- case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: return "Video Bitrate Mode";
- case V4L2_CID_MPEG_VIDEO_BITRATE: return "Video Bitrate";
- case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: return "Video Peak Bitrate";
- case V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION: return "Video Temporal Decimation";
- case V4L2_CID_MPEG_VIDEO_MUTE: return "Video Mute";
- case V4L2_CID_MPEG_VIDEO_MUTE_YUV: return "Video Mute YUV";
- case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE: return "Decoder Slice Interface";
- case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER: return "MPEG4 Loop Filter Enable";
- case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB: return "Number of Intra Refresh MBs";
- case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE: return "Frame Level Rate Control Enable";
- case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE: return "H264 MB Level Rate Control";
- case V4L2_CID_MPEG_VIDEO_HEADER_MODE: return "Sequence Header Mode";
- case V4L2_CID_MPEG_VIDEO_MAX_REF_PIC: return "Max Number of Reference Pics";
- case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP: return "H263 I-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP: return "H263 P-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP: return "H263 B-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_H263_MIN_QP: return "H263 Minimum QP Value";
- case V4L2_CID_MPEG_VIDEO_H263_MAX_QP: return "H263 Maximum QP Value";
- case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: return "H264 I-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP: return "H264 P-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP: return "H264 B-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_H264_MAX_QP: return "H264 Maximum QP Value";
- case V4L2_CID_MPEG_VIDEO_H264_MIN_QP: return "H264 Minimum QP Value";
- case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM: return "H264 8x8 Transform Enable";
- case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE: return "H264 CPB Buffer Size";
- case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: return "H264 Entropy Mode";
- case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD: return "H264 I-Frame Period";
- case V4L2_CID_MPEG_VIDEO_H264_LEVEL: return "H264 Level";
- case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA: return "H264 Loop Filter Alpha Offset";
- case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA: return "H264 Loop Filter Beta Offset";
- case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: return "H264 Loop Filter Mode";
- case V4L2_CID_MPEG_VIDEO_H264_PROFILE: return "H264 Profile";
- case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT: return "Vertical Size of SAR";
- case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH: return "Horizontal Size of SAR";
- case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE: return "Aspect Ratio VUI Enable";
- case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC: return "VUI Aspect Ratio IDC";
- case V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING: return "H264 Enable Frame Packing SEI";
- case V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0: return "H264 Set Curr. Frame as Frame0";
- case V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE: return "H264 FP Arrangement Type";
- case V4L2_CID_MPEG_VIDEO_H264_FMO: return "H264 Flexible MB Ordering";
- case V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE: return "H264 Map Type for FMO";
- case V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP: return "H264 FMO Number of Slice Groups";
- case V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION: return "H264 FMO Direction of Change";
- case V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE: return "H264 FMO Size of 1st Slice Grp";
- case V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH: return "H264 FMO No. of Consecutive MBs";
- case V4L2_CID_MPEG_VIDEO_H264_ASO: return "H264 Arbitrary Slice Ordering";
- case V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER: return "H264 ASO Slice Order";
- case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING: return "Enable H264 Hierarchical Coding";
- case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: return "H264 Hierarchical Coding Type";
- case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER:return "H264 Number of HC Layers";
- case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP:
- return "H264 Set QP Value for HC Layers";
- case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: return "MPEG4 I-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP: return "MPEG4 P-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP: return "MPEG4 B-Frame QP Value";
- case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP: return "MPEG4 Minimum QP Value";
- case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP: return "MPEG4 Maximum QP Value";
- case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: return "MPEG4 Level";
- case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: return "MPEG4 Profile";
- case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL: return "Quarter Pixel Search Enable";
- case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES: return "Maximum Bytes in a Slice";
- case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB: return "Number of MBs in a Slice";
- case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: return "Slice Partitioning Method";
- case V4L2_CID_MPEG_VIDEO_VBV_SIZE: return "VBV Buffer Size";
- case V4L2_CID_MPEG_VIDEO_DEC_PTS: return "Video Decoder PTS";
- case V4L2_CID_MPEG_VIDEO_DEC_FRAME: return "Video Decoder Frame Count";
- case V4L2_CID_MPEG_VIDEO_VBV_DELAY: return "Initial Delay for VBV Control";
-
- /* CAMERA controls */
- /* Keep the order of the 'case's the same as in videodev2.h! */
- case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
- case V4L2_CID_EXPOSURE_AUTO: return "Auto Exposure";
- case V4L2_CID_EXPOSURE_ABSOLUTE: return "Exposure Time, Absolute";
- case V4L2_CID_EXPOSURE_AUTO_PRIORITY: return "Exposure, Dynamic Framerate";
- case V4L2_CID_PAN_RELATIVE: return "Pan, Relative";
- case V4L2_CID_TILT_RELATIVE: return "Tilt, Relative";
- case V4L2_CID_PAN_RESET: return "Pan, Reset";
- case V4L2_CID_TILT_RESET: return "Tilt, Reset";
- case V4L2_CID_PAN_ABSOLUTE: return "Pan, Absolute";
- case V4L2_CID_TILT_ABSOLUTE: return "Tilt, Absolute";
- case V4L2_CID_FOCUS_ABSOLUTE: return "Focus, Absolute";
- case V4L2_CID_FOCUS_RELATIVE: return "Focus, Relative";
- case V4L2_CID_FOCUS_AUTO: return "Focus, Automatic Continuous";
- case V4L2_CID_ZOOM_ABSOLUTE: return "Zoom, Absolute";
- case V4L2_CID_ZOOM_RELATIVE: return "Zoom, Relative";
- case V4L2_CID_ZOOM_CONTINUOUS: return "Zoom, Continuous";
- case V4L2_CID_PRIVACY: return "Privacy";
- case V4L2_CID_IRIS_ABSOLUTE: return "Iris, Absolute";
- case V4L2_CID_IRIS_RELATIVE: return "Iris, Relative";
- case V4L2_CID_AUTO_EXPOSURE_BIAS: return "Auto Exposure, Bias";
- case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: return "White Balance, Auto & Preset";
- case V4L2_CID_WIDE_DYNAMIC_RANGE: return "Wide Dynamic Range";
- case V4L2_CID_IMAGE_STABILIZATION: return "Image Stabilization";
- case V4L2_CID_ISO_SENSITIVITY: return "ISO Sensitivity";
- case V4L2_CID_ISO_SENSITIVITY_AUTO: return "ISO Sensitivity, Auto";
- case V4L2_CID_EXPOSURE_METERING: return "Exposure, Metering Mode";
- case V4L2_CID_SCENE_MODE: return "Scene Mode";
- case V4L2_CID_3A_LOCK: return "3A Lock";
- case V4L2_CID_AUTO_FOCUS_START: return "Auto Focus, Start";
- case V4L2_CID_AUTO_FOCUS_STOP: return "Auto Focus, Stop";
- case V4L2_CID_AUTO_FOCUS_STATUS: return "Auto Focus, Status";
- case V4L2_CID_AUTO_FOCUS_RANGE: return "Auto Focus, Range";
-
- /* FM Radio Modulator control */
- /* Keep the order of the 'case's the same as in videodev2.h! */
- case V4L2_CID_FM_TX_CLASS: return "FM Radio Modulator Controls";
- case V4L2_CID_RDS_TX_DEVIATION: return "RDS Signal Deviation";
- case V4L2_CID_RDS_TX_PI: return "RDS Program ID";
- case V4L2_CID_RDS_TX_PTY: return "RDS Program Type";
- case V4L2_CID_RDS_TX_PS_NAME: return "RDS PS Name";
- case V4L2_CID_RDS_TX_RADIO_TEXT: return "RDS Radio Text";
- case V4L2_CID_AUDIO_LIMITER_ENABLED: return "Audio Limiter Feature Enabled";
- case V4L2_CID_AUDIO_LIMITER_RELEASE_TIME: return "Audio Limiter Release Time";
- case V4L2_CID_AUDIO_LIMITER_DEVIATION: return "Audio Limiter Deviation";
- case V4L2_CID_AUDIO_COMPRESSION_ENABLED: return "Audio Compression Enabled";
- case V4L2_CID_AUDIO_COMPRESSION_GAIN: return "Audio Compression Gain";
- case V4L2_CID_AUDIO_COMPRESSION_THRESHOLD: return "Audio Compression Threshold";
- case V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME: return "Audio Compression Attack Time";
- case V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME: return "Audio Compression Release Time";
- case V4L2_CID_PILOT_TONE_ENABLED: return "Pilot Tone Feature Enabled";
- case V4L2_CID_PILOT_TONE_DEVIATION: return "Pilot Tone Deviation";
- case V4L2_CID_PILOT_TONE_FREQUENCY: return "Pilot Tone Frequency";
- case V4L2_CID_TUNE_PREEMPHASIS: return "Pre-Emphasis";
- case V4L2_CID_TUNE_POWER_LEVEL: return "Tune Power Level";
- case V4L2_CID_TUNE_ANTENNA_CAPACITOR: return "Tune Antenna Capacitor";
-
- /* Flash controls */
- case V4L2_CID_FLASH_CLASS: return "Flash Controls";
- case V4L2_CID_FLASH_LED_MODE: return "LED Mode";
- case V4L2_CID_FLASH_STROBE_SOURCE: return "Strobe Source";
- case V4L2_CID_FLASH_STROBE: return "Strobe";
- case V4L2_CID_FLASH_STROBE_STOP: return "Stop Strobe";
- case V4L2_CID_FLASH_STROBE_STATUS: return "Strobe Status";
- case V4L2_CID_FLASH_TIMEOUT: return "Strobe Timeout";
- case V4L2_CID_FLASH_INTENSITY: return "Intensity, Flash Mode";
- case V4L2_CID_FLASH_TORCH_INTENSITY: return "Intensity, Torch Mode";
- case V4L2_CID_FLASH_INDICATOR_INTENSITY: return "Intensity, Indicator";
- case V4L2_CID_FLASH_FAULT: return "Faults";
- case V4L2_CID_FLASH_CHARGE: return "Charge";
- case V4L2_CID_FLASH_READY: return "Ready to Strobe";
-
- /* JPEG encoder controls */
- /* Keep the order of the 'case's the same as in videodev2.h! */
- case V4L2_CID_JPEG_CLASS: return "JPEG Compression Controls";
- case V4L2_CID_JPEG_CHROMA_SUBSAMPLING: return "Chroma Subsampling";
- case V4L2_CID_JPEG_RESTART_INTERVAL: return "Restart Interval";
- case V4L2_CID_JPEG_COMPRESSION_QUALITY: return "Compression Quality";
- case V4L2_CID_JPEG_ACTIVE_MARKER: return "Active Markers";
-
- /* Image source controls */
- case V4L2_CID_IMAGE_SOURCE_CLASS: return "Image Source Controls";
- case V4L2_CID_VBLANK: return "Vertical Blanking";
- case V4L2_CID_HBLANK: return "Horizontal Blanking";
- case V4L2_CID_ANALOGUE_GAIN: return "Analogue Gain";
-
- /* Image processing controls */
- case V4L2_CID_IMAGE_PROC_CLASS: return "Image Processing Controls";
- case V4L2_CID_LINK_FREQ: return "Link Frequency";
- case V4L2_CID_PIXEL_RATE: return "Pixel Rate";
- case V4L2_CID_TEST_PATTERN: return "Test Pattern";
-
- /* DV controls */
- case V4L2_CID_DV_CLASS: return "Digital Video Controls";
- case V4L2_CID_DV_TX_HOTPLUG: return "Hotplug Present";
- case V4L2_CID_DV_TX_RXSENSE: return "RxSense Present";
- case V4L2_CID_DV_TX_EDID_PRESENT: return "EDID Present";
- case V4L2_CID_DV_TX_MODE: return "Transmit Mode";
- case V4L2_CID_DV_TX_RGB_RANGE: return "Tx RGB Quantization Range";
- case V4L2_CID_DV_RX_POWER_PRESENT: return "Power Present";
- case V4L2_CID_DV_RX_RGB_RANGE: return "Rx RGB Quantization Range";
-
- default:
- return NULL;
- }
-}
-EXPORT_SYMBOL(v4l2_ctrl_get_name);
-
-void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
- s32 *min, s32 *max, s32 *step, s32 *def, u32 *flags)
-{
- *name = v4l2_ctrl_get_name(id);
- *flags = 0;
-
- switch (id) {
- case V4L2_CID_AUDIO_MUTE:
- case V4L2_CID_AUDIO_LOUDNESS:
- case V4L2_CID_AUTO_WHITE_BALANCE:
- case V4L2_CID_AUTOGAIN:
- case V4L2_CID_HFLIP:
- case V4L2_CID_VFLIP:
- case V4L2_CID_HUE_AUTO:
- case V4L2_CID_CHROMA_AGC:
- case V4L2_CID_COLOR_KILLER:
- case V4L2_CID_AUTOBRIGHTNESS:
- case V4L2_CID_MPEG_AUDIO_MUTE:
- case V4L2_CID_MPEG_VIDEO_MUTE:
- case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
- case V4L2_CID_MPEG_VIDEO_PULLDOWN:
- case V4L2_CID_EXPOSURE_AUTO_PRIORITY:
- case V4L2_CID_FOCUS_AUTO:
- case V4L2_CID_PRIVACY:
- case V4L2_CID_AUDIO_LIMITER_ENABLED:
- case V4L2_CID_AUDIO_COMPRESSION_ENABLED:
- case V4L2_CID_PILOT_TONE_ENABLED:
- case V4L2_CID_ILLUMINATORS_1:
- case V4L2_CID_ILLUMINATORS_2:
- case V4L2_CID_FLASH_STROBE_STATUS:
- case V4L2_CID_FLASH_CHARGE:
- case V4L2_CID_FLASH_READY:
- case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER:
- case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE:
- case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
- case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE:
- case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM:
- case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE:
- case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL:
- case V4L2_CID_WIDE_DYNAMIC_RANGE:
- case V4L2_CID_IMAGE_STABILIZATION:
- *type = V4L2_CTRL_TYPE_BOOLEAN;
- *min = 0;
- *max = *step = 1;
- break;
- case V4L2_CID_PAN_RESET:
- case V4L2_CID_TILT_RESET:
- case V4L2_CID_FLASH_STROBE:
- case V4L2_CID_FLASH_STROBE_STOP:
- case V4L2_CID_AUTO_FOCUS_START:
- case V4L2_CID_AUTO_FOCUS_STOP:
- *type = V4L2_CTRL_TYPE_BUTTON;
- *flags |= V4L2_CTRL_FLAG_WRITE_ONLY;
- *min = *max = *step = *def = 0;
- break;
- case V4L2_CID_POWER_LINE_FREQUENCY:
- case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
- case V4L2_CID_MPEG_AUDIO_ENCODING:
- case V4L2_CID_MPEG_AUDIO_L1_BITRATE:
- case V4L2_CID_MPEG_AUDIO_L2_BITRATE:
- case V4L2_CID_MPEG_AUDIO_L3_BITRATE:
- case V4L2_CID_MPEG_AUDIO_AC3_BITRATE:
- case V4L2_CID_MPEG_AUDIO_MODE:
- case V4L2_CID_MPEG_AUDIO_MODE_EXTENSION:
- case V4L2_CID_MPEG_AUDIO_EMPHASIS:
- case V4L2_CID_MPEG_AUDIO_CRC:
- case V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK:
- case V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK:
- case V4L2_CID_MPEG_VIDEO_ENCODING:
- case V4L2_CID_MPEG_VIDEO_ASPECT:
- case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
- case V4L2_CID_MPEG_STREAM_TYPE:
- case V4L2_CID_MPEG_STREAM_VBI_FMT:
- case V4L2_CID_EXPOSURE_AUTO:
- case V4L2_CID_AUTO_FOCUS_RANGE:
- case V4L2_CID_COLORFX:
- case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
- case V4L2_CID_TUNE_PREEMPHASIS:
- case V4L2_CID_FLASH_LED_MODE:
- case V4L2_CID_FLASH_STROBE_SOURCE:
- case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
- case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
- case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
- case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
- case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
- case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
- case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC:
- case V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE:
- case V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE:
- case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
- case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
- case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
- case V4L2_CID_ISO_SENSITIVITY_AUTO:
- case V4L2_CID_EXPOSURE_METERING:
- case V4L2_CID_SCENE_MODE:
- case V4L2_CID_DV_TX_MODE:
- case V4L2_CID_DV_TX_RGB_RANGE:
- case V4L2_CID_DV_RX_RGB_RANGE:
- case V4L2_CID_TEST_PATTERN:
- *type = V4L2_CTRL_TYPE_MENU;
- break;
- case V4L2_CID_LINK_FREQ:
- *type = V4L2_CTRL_TYPE_INTEGER_MENU;
- break;
- case V4L2_CID_RDS_TX_PS_NAME:
- case V4L2_CID_RDS_TX_RADIO_TEXT:
- *type = V4L2_CTRL_TYPE_STRING;
- break;
- case V4L2_CID_ISO_SENSITIVITY:
- case V4L2_CID_AUTO_EXPOSURE_BIAS:
- *type = V4L2_CTRL_TYPE_INTEGER_MENU;
- break;
- case V4L2_CID_USER_CLASS:
- case V4L2_CID_CAMERA_CLASS:
- case V4L2_CID_MPEG_CLASS:
- case V4L2_CID_FM_TX_CLASS:
- case V4L2_CID_FLASH_CLASS:
- case V4L2_CID_JPEG_CLASS:
- case V4L2_CID_IMAGE_SOURCE_CLASS:
- case V4L2_CID_IMAGE_PROC_CLASS:
- case V4L2_CID_DV_CLASS:
- *type = V4L2_CTRL_TYPE_CTRL_CLASS;
- /* You can neither read not write these */
- *flags |= V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_WRITE_ONLY;
- *min = *max = *step = *def = 0;
- break;
- case V4L2_CID_BG_COLOR:
- *type = V4L2_CTRL_TYPE_INTEGER;
- *step = 1;
- *min = 0;
- /* Max is calculated as RGB888 that is 2^24 */
- *max = 0xFFFFFF;
- break;
- case V4L2_CID_FLASH_FAULT:
- case V4L2_CID_JPEG_ACTIVE_MARKER:
- case V4L2_CID_3A_LOCK:
- case V4L2_CID_AUTO_FOCUS_STATUS:
- case V4L2_CID_DV_TX_HOTPLUG:
- case V4L2_CID_DV_TX_RXSENSE:
- case V4L2_CID_DV_TX_EDID_PRESENT:
- case V4L2_CID_DV_RX_POWER_PRESENT:
- *type = V4L2_CTRL_TYPE_BITMASK;
- break;
- case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
- case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT:
- *type = V4L2_CTRL_TYPE_INTEGER;
- *flags |= V4L2_CTRL_FLAG_READ_ONLY;
- break;
- case V4L2_CID_MPEG_VIDEO_DEC_FRAME:
- case V4L2_CID_MPEG_VIDEO_DEC_PTS:
- *flags |= V4L2_CTRL_FLAG_VOLATILE;
- /* Fall through */
- case V4L2_CID_PIXEL_RATE:
- *type = V4L2_CTRL_TYPE_INTEGER64;
- *flags |= V4L2_CTRL_FLAG_READ_ONLY;
- *min = *max = *step = *def = 0;
- break;
- default:
- *type = V4L2_CTRL_TYPE_INTEGER;
- break;
- }
- switch (id) {
- case V4L2_CID_MPEG_AUDIO_ENCODING:
- case V4L2_CID_MPEG_AUDIO_MODE:
- case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
- case V4L2_CID_MPEG_VIDEO_B_FRAMES:
- case V4L2_CID_MPEG_STREAM_TYPE:
- *flags |= V4L2_CTRL_FLAG_UPDATE;
- break;
- case V4L2_CID_AUDIO_VOLUME:
- case V4L2_CID_AUDIO_BALANCE:
- case V4L2_CID_AUDIO_BASS:
- case V4L2_CID_AUDIO_TREBLE:
- case V4L2_CID_BRIGHTNESS:
- case V4L2_CID_CONTRAST:
- case V4L2_CID_SATURATION:
- case V4L2_CID_HUE:
- case V4L2_CID_RED_BALANCE:
- case V4L2_CID_BLUE_BALANCE:
- case V4L2_CID_GAMMA:
- case V4L2_CID_SHARPNESS:
- case V4L2_CID_CHROMA_GAIN:
- case V4L2_CID_RDS_TX_DEVIATION:
- case V4L2_CID_AUDIO_LIMITER_RELEASE_TIME:
- case V4L2_CID_AUDIO_LIMITER_DEVIATION:
- case V4L2_CID_AUDIO_COMPRESSION_GAIN:
- case V4L2_CID_AUDIO_COMPRESSION_THRESHOLD:
- case V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME:
- case V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME:
- case V4L2_CID_PILOT_TONE_DEVIATION:
- case V4L2_CID_PILOT_TONE_FREQUENCY:
- case V4L2_CID_TUNE_POWER_LEVEL:
- case V4L2_CID_TUNE_ANTENNA_CAPACITOR:
- *flags |= V4L2_CTRL_FLAG_SLIDER;
- break;
- case V4L2_CID_PAN_RELATIVE:
- case V4L2_CID_TILT_RELATIVE:
- case V4L2_CID_FOCUS_RELATIVE:
- case V4L2_CID_IRIS_RELATIVE:
- case V4L2_CID_ZOOM_RELATIVE:
- *flags |= V4L2_CTRL_FLAG_WRITE_ONLY;
- break;
- case V4L2_CID_FLASH_STROBE_STATUS:
- case V4L2_CID_AUTO_FOCUS_STATUS:
- case V4L2_CID_FLASH_READY:
- case V4L2_CID_DV_TX_HOTPLUG:
- case V4L2_CID_DV_TX_RXSENSE:
- case V4L2_CID_DV_TX_EDID_PRESENT:
- case V4L2_CID_DV_RX_POWER_PRESENT:
- *flags |= V4L2_CTRL_FLAG_READ_ONLY;
- break;
- }
-}
-EXPORT_SYMBOL(v4l2_ctrl_fill);
-
-/* Helper function to determine whether the control type is compatible with
- VIDIOC_G/S_CTRL. */
-static bool type_is_int(const struct v4l2_ctrl *ctrl)
-{
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_INTEGER64:
- case V4L2_CTRL_TYPE_STRING:
- /* Nope, these need v4l2_ext_control */
- return false;
- default:
- return true;
- }
-}
-
-static void fill_event(struct v4l2_event *ev, struct v4l2_ctrl *ctrl, u32 changes)
-{
- memset(ev->reserved, 0, sizeof(ev->reserved));
- ev->type = V4L2_EVENT_CTRL;
- ev->id = ctrl->id;
- ev->u.ctrl.changes = changes;
- ev->u.ctrl.type = ctrl->type;
- ev->u.ctrl.flags = ctrl->flags;
- if (ctrl->type == V4L2_CTRL_TYPE_STRING)
- ev->u.ctrl.value64 = 0;
- else
- ev->u.ctrl.value64 = ctrl->cur.val64;
- ev->u.ctrl.minimum = ctrl->minimum;
- ev->u.ctrl.maximum = ctrl->maximum;
- if (ctrl->type == V4L2_CTRL_TYPE_MENU
- || ctrl->type == V4L2_CTRL_TYPE_INTEGER_MENU)
- ev->u.ctrl.step = 1;
- else
- ev->u.ctrl.step = ctrl->step;
- ev->u.ctrl.default_value = ctrl->default_value;
-}
-
-static void send_event(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, u32 changes)
-{
- struct v4l2_event ev;
- struct v4l2_subscribed_event *sev;
-
- if (list_empty(&ctrl->ev_subs))
- return;
- fill_event(&ev, ctrl, changes);
-
- list_for_each_entry(sev, &ctrl->ev_subs, node)
- if (sev->fh != fh ||
- (sev->flags & V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK))
- v4l2_event_queue_fh(sev->fh, &ev);
-}
-
-/* Helper function: copy the current control value back to the caller */
-static int cur_to_user(struct v4l2_ext_control *c,
- struct v4l2_ctrl *ctrl)
-{
- u32 len;
-
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_STRING:
- len = strlen(ctrl->cur.string);
- if (c->size < len + 1) {
- c->size = len + 1;
- return -ENOSPC;
- }
- return copy_to_user(c->string, ctrl->cur.string,
- len + 1) ? -EFAULT : 0;
- case V4L2_CTRL_TYPE_INTEGER64:
- c->value64 = ctrl->cur.val64;
- break;
- default:
- c->value = ctrl->cur.val;
- break;
- }
- return 0;
-}
-
-/* Helper function: copy the caller-provider value as the new control value */
-static int user_to_new(struct v4l2_ext_control *c,
- struct v4l2_ctrl *ctrl)
-{
- int ret;
- u32 size;
-
- ctrl->is_new = 1;
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_INTEGER64:
- ctrl->val64 = c->value64;
- break;
- case V4L2_CTRL_TYPE_STRING:
- size = c->size;
- if (size == 0)
- return -ERANGE;
- if (size > ctrl->maximum + 1)
- size = ctrl->maximum + 1;
- ret = copy_from_user(ctrl->string, c->string, size);
- if (!ret) {
- char last = ctrl->string[size - 1];
-
- ctrl->string[size - 1] = 0;
- /* If the string was longer than ctrl->maximum,
- then return an error. */
- if (strlen(ctrl->string) == ctrl->maximum && last)
- return -ERANGE;
- }
- return ret ? -EFAULT : 0;
- default:
- ctrl->val = c->value;
- break;
- }
- return 0;
-}
-
-/* Helper function: copy the new control value back to the caller */
-static int new_to_user(struct v4l2_ext_control *c,
- struct v4l2_ctrl *ctrl)
-{
- u32 len;
-
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_STRING:
- len = strlen(ctrl->string);
- if (c->size < len + 1) {
- c->size = ctrl->maximum + 1;
- return -ENOSPC;
- }
- return copy_to_user(c->string, ctrl->string,
- len + 1) ? -EFAULT : 0;
- case V4L2_CTRL_TYPE_INTEGER64:
- c->value64 = ctrl->val64;
- break;
- default:
- c->value = ctrl->val;
- break;
- }
- return 0;
-}
-
-/* Copy the new value to the current value. */
-static void new_to_cur(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, u32 ch_flags)
-{
- bool changed = false;
-
- if (ctrl == NULL)
- return;
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_BUTTON:
- changed = true;
- break;
- case V4L2_CTRL_TYPE_STRING:
- /* strings are always 0-terminated */
- changed = strcmp(ctrl->string, ctrl->cur.string);
- strcpy(ctrl->cur.string, ctrl->string);
- break;
- case V4L2_CTRL_TYPE_INTEGER64:
- changed = ctrl->val64 != ctrl->cur.val64;
- ctrl->cur.val64 = ctrl->val64;
- break;
- default:
- changed = ctrl->val != ctrl->cur.val;
- ctrl->cur.val = ctrl->val;
- break;
- }
- if (ch_flags & V4L2_EVENT_CTRL_CH_FLAGS) {
- /* Note: CH_FLAGS is only set for auto clusters. */
- ctrl->flags &=
- ~(V4L2_CTRL_FLAG_INACTIVE | V4L2_CTRL_FLAG_VOLATILE);
- if (!is_cur_manual(ctrl->cluster[0])) {
- ctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
- if (ctrl->cluster[0]->has_volatiles)
- ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
- }
- fh = NULL;
- }
- if (changed || ch_flags) {
- /* If a control was changed that was not one of the controls
- modified by the application, then send the event to all. */
- if (!ctrl->is_new)
- fh = NULL;
- send_event(fh, ctrl,
- (changed ? V4L2_EVENT_CTRL_CH_VALUE : 0) | ch_flags);
- if (ctrl->call_notify && changed && ctrl->handler->notify)
- ctrl->handler->notify(ctrl, ctrl->handler->notify_priv);
- }
-}
-
-/* Copy the current value to the new value */
-static void cur_to_new(struct v4l2_ctrl *ctrl)
-{
- if (ctrl == NULL)
- return;
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_STRING:
- /* strings are always 0-terminated */
- strcpy(ctrl->string, ctrl->cur.string);
- break;
- case V4L2_CTRL_TYPE_INTEGER64:
- ctrl->val64 = ctrl->cur.val64;
- break;
- default:
- ctrl->val = ctrl->cur.val;
- break;
- }
-}
-
-/* Return non-zero if one or more of the controls in the cluster has a new
- value that differs from the current value. */
-static int cluster_changed(struct v4l2_ctrl *master)
-{
- int diff = 0;
- int i;
-
- for (i = 0; !diff && i < master->ncontrols; i++) {
- struct v4l2_ctrl *ctrl = master->cluster[i];
-
- if (ctrl == NULL)
- continue;
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_BUTTON:
- /* Button controls are always 'different' */
- return 1;
- case V4L2_CTRL_TYPE_STRING:
- /* strings are always 0-terminated */
- diff = strcmp(ctrl->string, ctrl->cur.string);
- break;
- case V4L2_CTRL_TYPE_INTEGER64:
- diff = ctrl->val64 != ctrl->cur.val64;
- break;
- default:
- diff = ctrl->val != ctrl->cur.val;
- break;
- }
- }
- return diff;
-}
-
-/* Control range checking */
-static int check_range(enum v4l2_ctrl_type type,
- s32 min, s32 max, u32 step, s32 def)
-{
- switch (type) {
- case V4L2_CTRL_TYPE_BOOLEAN:
- if (step != 1 || max > 1 || min < 0)
- return -ERANGE;
- /* fall through */
- case V4L2_CTRL_TYPE_INTEGER:
- if (step <= 0 || min > max || def < min || def > max)
- return -ERANGE;
- return 0;
- case V4L2_CTRL_TYPE_BITMASK:
- if (step || min || !max || (def & ~max))
- return -ERANGE;
- return 0;
- case V4L2_CTRL_TYPE_MENU:
- case V4L2_CTRL_TYPE_INTEGER_MENU:
- if (min > max || def < min || def > max)
- return -ERANGE;
- /* Note: step == menu_skip_mask for menu controls.
- So here we check if the default value is masked out. */
- if (step && ((1 << def) & step))
- return -EINVAL;
- return 0;
- case V4L2_CTRL_TYPE_STRING:
- if (min > max || min < 0 || step < 1 || def)
- return -ERANGE;
- return 0;
- default:
- return 0;
- }
-}
-
-/* Validate a new control */
-static int validate_new(const struct v4l2_ctrl *ctrl,
- struct v4l2_ext_control *c)
-{
- size_t len;
- u32 offset;
- s32 val;
-
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_INTEGER:
- /* Round towards the closest legal value */
- val = c->value + ctrl->step / 2;
- val = clamp(val, ctrl->minimum, ctrl->maximum);
- offset = val - ctrl->minimum;
- offset = ctrl->step * (offset / ctrl->step);
- c->value = ctrl->minimum + offset;
- return 0;
-
- case V4L2_CTRL_TYPE_BOOLEAN:
- c->value = !!c->value;
- return 0;
-
- case V4L2_CTRL_TYPE_MENU:
- case V4L2_CTRL_TYPE_INTEGER_MENU:
- if (c->value < ctrl->minimum || c->value > ctrl->maximum)
- return -ERANGE;
- if (ctrl->menu_skip_mask & (1 << c->value))
- return -EINVAL;
- if (ctrl->type == V4L2_CTRL_TYPE_MENU &&
- ctrl->qmenu[c->value][0] == '\0')
- return -EINVAL;
- return 0;
-
- case V4L2_CTRL_TYPE_BITMASK:
- c->value &= ctrl->maximum;
- return 0;
-
- case V4L2_CTRL_TYPE_BUTTON:
- case V4L2_CTRL_TYPE_CTRL_CLASS:
- c->value = 0;
- return 0;
-
- case V4L2_CTRL_TYPE_INTEGER64:
- return 0;
-
- case V4L2_CTRL_TYPE_STRING:
- len = strlen(c->string);
- if (len < ctrl->minimum)
- return -ERANGE;
- if ((len - ctrl->minimum) % ctrl->step)
- return -ERANGE;
- return 0;
-
- default:
- return -EINVAL;
- }
-}
-
-static inline u32 node2id(struct list_head *node)
-{
- return list_entry(node, struct v4l2_ctrl_ref, node)->ctrl->id;
-}
-
-/* Set the handler's error code if it wasn't set earlier already */
-static inline int handler_set_err(struct v4l2_ctrl_handler *hdl, int err)
-{
- if (hdl->error == 0)
- hdl->error = err;
- return err;
-}
-
-/* Initialize the handler */
-int v4l2_ctrl_handler_init(struct v4l2_ctrl_handler *hdl,
- unsigned nr_of_controls_hint)
-{
- hdl->lock = &hdl->_lock;
- mutex_init(hdl->lock);
- INIT_LIST_HEAD(&hdl->ctrls);
- INIT_LIST_HEAD(&hdl->ctrl_refs);
- hdl->nr_of_buckets = 1 + nr_of_controls_hint / 8;
- hdl->buckets = kcalloc(hdl->nr_of_buckets, sizeof(hdl->buckets[0]),
- GFP_KERNEL);
- hdl->error = hdl->buckets ? 0 : -ENOMEM;
- return hdl->error;
-}
-EXPORT_SYMBOL(v4l2_ctrl_handler_init);
-
-/* Free all controls and control refs */
-void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl)
-{
- struct v4l2_ctrl_ref *ref, *next_ref;
- struct v4l2_ctrl *ctrl, *next_ctrl;
- struct v4l2_subscribed_event *sev, *next_sev;
-
- if (hdl == NULL || hdl->buckets == NULL)
- return;
-
- mutex_lock(hdl->lock);
- /* Free all nodes */
- list_for_each_entry_safe(ref, next_ref, &hdl->ctrl_refs, node) {
- list_del(&ref->node);
- kfree(ref);
- }
- /* Free all controls owned by the handler */
- list_for_each_entry_safe(ctrl, next_ctrl, &hdl->ctrls, node) {
- list_del(&ctrl->node);
- list_for_each_entry_safe(sev, next_sev, &ctrl->ev_subs, node)
- list_del(&sev->node);
- kfree(ctrl);
- }
- kfree(hdl->buckets);
- hdl->buckets = NULL;
- hdl->cached = NULL;
- hdl->error = 0;
- mutex_unlock(hdl->lock);
-}
-EXPORT_SYMBOL(v4l2_ctrl_handler_free);
-
-/* For backwards compatibility: V4L2_CID_PRIVATE_BASE should no longer
- be used except in G_CTRL, S_CTRL, QUERYCTRL and QUERYMENU when dealing
- with applications that do not use the NEXT_CTRL flag.
-
- We just find the n-th private user control. It's O(N), but that should not
- be an issue in this particular case. */
-static struct v4l2_ctrl_ref *find_private_ref(
- struct v4l2_ctrl_handler *hdl, u32 id)
-{
- struct v4l2_ctrl_ref *ref;
-
- id -= V4L2_CID_PRIVATE_BASE;
- list_for_each_entry(ref, &hdl->ctrl_refs, node) {
- /* Search for private user controls that are compatible with
- VIDIOC_G/S_CTRL. */
- if (V4L2_CTRL_ID2CLASS(ref->ctrl->id) == V4L2_CTRL_CLASS_USER &&
- V4L2_CTRL_DRIVER_PRIV(ref->ctrl->id)) {
- if (!type_is_int(ref->ctrl))
- continue;
- if (id == 0)
- return ref;
- id--;
- }
- }
- return NULL;
-}
-
-/* Find a control with the given ID. */
-static struct v4l2_ctrl_ref *find_ref(struct v4l2_ctrl_handler *hdl, u32 id)
-{
- struct v4l2_ctrl_ref *ref;
- int bucket;
-
- id &= V4L2_CTRL_ID_MASK;
-
- /* Old-style private controls need special handling */
- if (id >= V4L2_CID_PRIVATE_BASE)
- return find_private_ref(hdl, id);
- bucket = id % hdl->nr_of_buckets;
-
- /* Simple optimization: cache the last control found */
- if (hdl->cached && hdl->cached->ctrl->id == id)
- return hdl->cached;
-
- /* Not in cache, search the hash */
- ref = hdl->buckets ? hdl->buckets[bucket] : NULL;
- while (ref && ref->ctrl->id != id)
- ref = ref->next;
-
- if (ref)
- hdl->cached = ref; /* cache it! */
- return ref;
-}
-
-/* Find a control with the given ID. Take the handler's lock first. */
-static struct v4l2_ctrl_ref *find_ref_lock(
- struct v4l2_ctrl_handler *hdl, u32 id)
-{
- struct v4l2_ctrl_ref *ref = NULL;
-
- if (hdl) {
- mutex_lock(hdl->lock);
- ref = find_ref(hdl, id);
- mutex_unlock(hdl->lock);
- }
- return ref;
-}
-
-/* Find a control with the given ID. */
-struct v4l2_ctrl *v4l2_ctrl_find(struct v4l2_ctrl_handler *hdl, u32 id)
-{
- struct v4l2_ctrl_ref *ref = find_ref_lock(hdl, id);
-
- return ref ? ref->ctrl : NULL;
-}
-EXPORT_SYMBOL(v4l2_ctrl_find);
-
-/* Allocate a new v4l2_ctrl_ref and hook it into the handler. */
-static int handler_new_ref(struct v4l2_ctrl_handler *hdl,
- struct v4l2_ctrl *ctrl)
-{
- struct v4l2_ctrl_ref *ref;
- struct v4l2_ctrl_ref *new_ref;
- u32 id = ctrl->id;
- u32 class_ctrl = V4L2_CTRL_ID2CLASS(id) | 1;
- int bucket = id % hdl->nr_of_buckets; /* which bucket to use */
-
- /* Automatically add the control class if it is not yet present. */
- if (id != class_ctrl && find_ref_lock(hdl, class_ctrl) == NULL)
- if (!v4l2_ctrl_new_std(hdl, NULL, class_ctrl, 0, 0, 0, 0))
- return hdl->error;
-
- if (hdl->error)
- return hdl->error;
-
- new_ref = kzalloc(sizeof(*new_ref), GFP_KERNEL);
- if (!new_ref)
- return handler_set_err(hdl, -ENOMEM);
- new_ref->ctrl = ctrl;
- if (ctrl->handler == hdl) {
- /* By default each control starts in a cluster of its own.
- new_ref->ctrl is basically a cluster array with one
- element, so that's perfect to use as the cluster pointer.
- But only do this for the handler that owns the control. */
- ctrl->cluster = &new_ref->ctrl;
- ctrl->ncontrols = 1;
- }
-
- INIT_LIST_HEAD(&new_ref->node);
-
- mutex_lock(hdl->lock);
-
- /* Add immediately at the end of the list if the list is empty, or if
- the last element in the list has a lower ID.
- This ensures that when elements are added in ascending order the
- insertion is an O(1) operation. */
- if (list_empty(&hdl->ctrl_refs) || id > node2id(hdl->ctrl_refs.prev)) {
- list_add_tail(&new_ref->node, &hdl->ctrl_refs);
- goto insert_in_hash;
- }
-
- /* Find insert position in sorted list */
- list_for_each_entry(ref, &hdl->ctrl_refs, node) {
- if (ref->ctrl->id < id)
- continue;
- /* Don't add duplicates */
- if (ref->ctrl->id == id) {
- kfree(new_ref);
- goto unlock;
- }
- list_add(&new_ref->node, ref->node.prev);
- break;
- }
-
-insert_in_hash:
- /* Insert the control node in the hash */
- new_ref->next = hdl->buckets[bucket];
- hdl->buckets[bucket] = new_ref;
-
-unlock:
- mutex_unlock(hdl->lock);
- return 0;
-}
-
-/* Add a new control */
-static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, const char *name, enum v4l2_ctrl_type type,
- s32 min, s32 max, u32 step, s32 def,
- u32 flags, const char * const *qmenu,
- const s64 *qmenu_int, void *priv)
-{
- struct v4l2_ctrl *ctrl;
- unsigned sz_extra = 0;
- int err;
-
- if (hdl->error)
- return NULL;
-
- /* Sanity checks */
- if (id == 0 || name == NULL || id >= V4L2_CID_PRIVATE_BASE ||
- (type == V4L2_CTRL_TYPE_MENU && qmenu == NULL) ||
- (type == V4L2_CTRL_TYPE_INTEGER_MENU && qmenu_int == NULL)) {
- handler_set_err(hdl, -ERANGE);
- return NULL;
- }
- err = check_range(type, min, max, step, def);
- if (err) {
- handler_set_err(hdl, err);
- return NULL;
- }
- if (type == V4L2_CTRL_TYPE_BITMASK && ((def & ~max) || min || step)) {
- handler_set_err(hdl, -ERANGE);
- return NULL;
- }
-
- if (type == V4L2_CTRL_TYPE_BUTTON)
- flags |= V4L2_CTRL_FLAG_WRITE_ONLY;
- else if (type == V4L2_CTRL_TYPE_CTRL_CLASS)
- flags |= V4L2_CTRL_FLAG_READ_ONLY;
- else if (type == V4L2_CTRL_TYPE_STRING)
- sz_extra += 2 * (max + 1);
-
- ctrl = kzalloc(sizeof(*ctrl) + sz_extra, GFP_KERNEL);
- if (ctrl == NULL) {
- handler_set_err(hdl, -ENOMEM);
- return NULL;
- }
-
- INIT_LIST_HEAD(&ctrl->node);
- INIT_LIST_HEAD(&ctrl->ev_subs);
- ctrl->handler = hdl;
- ctrl->ops = ops;
- ctrl->id = id;
- ctrl->name = name;
- ctrl->type = type;
- ctrl->flags = flags;
- ctrl->minimum = min;
- ctrl->maximum = max;
- ctrl->step = step;
- if (type == V4L2_CTRL_TYPE_MENU)
- ctrl->qmenu = qmenu;
- else if (type == V4L2_CTRL_TYPE_INTEGER_MENU)
- ctrl->qmenu_int = qmenu_int;
- ctrl->priv = priv;
- ctrl->cur.val = ctrl->val = ctrl->default_value = def;
-
- if (ctrl->type == V4L2_CTRL_TYPE_STRING) {
- ctrl->cur.string = (char *)&ctrl[1] + sz_extra - (max + 1);
- ctrl->string = (char *)&ctrl[1] + sz_extra - 2 * (max + 1);
- if (ctrl->minimum)
- memset(ctrl->cur.string, ' ', ctrl->minimum);
- }
- if (handler_new_ref(hdl, ctrl)) {
- kfree(ctrl);
- return NULL;
- }
- mutex_lock(hdl->lock);
- list_add_tail(&ctrl->node, &hdl->ctrls);
- mutex_unlock(hdl->lock);
- return ctrl;
-}
-
-struct v4l2_ctrl *v4l2_ctrl_new_custom(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_config *cfg, void *priv)
-{
- bool is_menu;
- struct v4l2_ctrl *ctrl;
- const char *name = cfg->name;
- const char * const *qmenu = cfg->qmenu;
- const s64 *qmenu_int = cfg->qmenu_int;
- enum v4l2_ctrl_type type = cfg->type;
- u32 flags = cfg->flags;
- s32 min = cfg->min;
- s32 max = cfg->max;
- u32 step = cfg->step;
- s32 def = cfg->def;
-
- if (name == NULL)
- v4l2_ctrl_fill(cfg->id, &name, &type, &min, &max, &step,
- &def, &flags);
-
- is_menu = (cfg->type == V4L2_CTRL_TYPE_MENU ||
- cfg->type == V4L2_CTRL_TYPE_INTEGER_MENU);
- if (is_menu)
- WARN_ON(step);
- else
- WARN_ON(cfg->menu_skip_mask);
- if (cfg->type == V4L2_CTRL_TYPE_MENU && qmenu == NULL)
- qmenu = v4l2_ctrl_get_menu(cfg->id);
- else if (cfg->type == V4L2_CTRL_TYPE_INTEGER_MENU &&
- qmenu_int == NULL) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
-
- ctrl = v4l2_ctrl_new(hdl, cfg->ops, cfg->id, name,
- type, min, max,
- is_menu ? cfg->menu_skip_mask : step,
- def, flags, qmenu, qmenu_int, priv);
- if (ctrl)
- ctrl->is_private = cfg->is_private;
- return ctrl;
-}
-EXPORT_SYMBOL(v4l2_ctrl_new_custom);
-
-/* Helper function for standard non-menu controls */
-struct v4l2_ctrl *v4l2_ctrl_new_std(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, s32 min, s32 max, u32 step, s32 def)
-{
- const char *name;
- enum v4l2_ctrl_type type;
- u32 flags;
-
- v4l2_ctrl_fill(id, &name, &type, &min, &max, &step, &def, &flags);
- if (type == V4L2_CTRL_TYPE_MENU
- || type == V4L2_CTRL_TYPE_INTEGER_MENU) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
- return v4l2_ctrl_new(hdl, ops, id, name, type,
- min, max, step, def, flags, NULL, NULL, NULL);
-}
-EXPORT_SYMBOL(v4l2_ctrl_new_std);
-
-/* Helper function for standard menu controls */
-struct v4l2_ctrl *v4l2_ctrl_new_std_menu(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, s32 max, s32 mask, s32 def)
-{
- const char * const *qmenu = v4l2_ctrl_get_menu(id);
- const char *name;
- enum v4l2_ctrl_type type;
- s32 min;
- s32 step;
- u32 flags;
-
- v4l2_ctrl_fill(id, &name, &type, &min, &max, &step, &def, &flags);
- if (type != V4L2_CTRL_TYPE_MENU) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
- return v4l2_ctrl_new(hdl, ops, id, name, type,
- 0, max, mask, def, flags, qmenu, NULL, NULL);
-}
-EXPORT_SYMBOL(v4l2_ctrl_new_std_menu);
-
-/* Helper function for standard menu controls with driver defined menu */
-struct v4l2_ctrl *v4l2_ctrl_new_std_menu_items(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops, u32 id, s32 max,
- s32 mask, s32 def, const char * const *qmenu)
-{
- enum v4l2_ctrl_type type;
- const char *name;
- u32 flags;
- s32 step;
- s32 min;
-
- /* v4l2_ctrl_new_std_menu_items() should only be called for
- * standard controls without a standard menu.
- */
- if (v4l2_ctrl_get_menu(id)) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
-
- v4l2_ctrl_fill(id, &name, &type, &min, &max, &step, &def, &flags);
- if (type != V4L2_CTRL_TYPE_MENU || qmenu == NULL) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
- return v4l2_ctrl_new(hdl, ops, id, name, type, 0, max, mask, def,
- flags, qmenu, NULL, NULL);
-
-}
-EXPORT_SYMBOL(v4l2_ctrl_new_std_menu_items);
-
-/* Helper function for standard integer menu controls */
-struct v4l2_ctrl *v4l2_ctrl_new_int_menu(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, s32 max, s32 def, const s64 *qmenu_int)
-{
- const char *name;
- enum v4l2_ctrl_type type;
- s32 min;
- s32 step;
- u32 flags;
-
- v4l2_ctrl_fill(id, &name, &type, &min, &max, &step, &def, &flags);
- if (type != V4L2_CTRL_TYPE_INTEGER_MENU) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
- return v4l2_ctrl_new(hdl, ops, id, name, type,
- 0, max, 0, def, flags, NULL, qmenu_int, NULL);
-}
-EXPORT_SYMBOL(v4l2_ctrl_new_int_menu);
-
-/* Add a control from another handler to this handler */
-struct v4l2_ctrl *v4l2_ctrl_add_ctrl(struct v4l2_ctrl_handler *hdl,
- struct v4l2_ctrl *ctrl)
-{
- if (hdl == NULL || hdl->error)
- return NULL;
- if (ctrl == NULL) {
- handler_set_err(hdl, -EINVAL);
- return NULL;
- }
- if (ctrl->handler == hdl)
- return ctrl;
- return handler_new_ref(hdl, ctrl) ? NULL : ctrl;
-}
-EXPORT_SYMBOL(v4l2_ctrl_add_ctrl);
-
-/* Add the controls from another handler to our own. */
-int v4l2_ctrl_add_handler(struct v4l2_ctrl_handler *hdl,
- struct v4l2_ctrl_handler *add,
- bool (*filter)(const struct v4l2_ctrl *ctrl))
-{
- struct v4l2_ctrl_ref *ref;
- int ret = 0;
-
- /* Do nothing if either handler is NULL or if they are the same */
- if (!hdl || !add || hdl == add)
- return 0;
- if (hdl->error)
- return hdl->error;
- mutex_lock(add->lock);
- list_for_each_entry(ref, &add->ctrl_refs, node) {
- struct v4l2_ctrl *ctrl = ref->ctrl;
-
- /* Skip handler-private controls. */
- if (ctrl->is_private)
- continue;
- /* And control classes */
- if (ctrl->type == V4L2_CTRL_TYPE_CTRL_CLASS)
- continue;
- /* Filter any unwanted controls */
- if (filter && !filter(ctrl))
- continue;
- ret = handler_new_ref(hdl, ctrl);
- if (ret)
- break;
- }
- mutex_unlock(add->lock);
- return ret;
-}
-EXPORT_SYMBOL(v4l2_ctrl_add_handler);
-
-bool v4l2_ctrl_radio_filter(const struct v4l2_ctrl *ctrl)
-{
- if (V4L2_CTRL_ID2CLASS(ctrl->id) == V4L2_CTRL_CLASS_FM_TX)
- return true;
- switch (ctrl->id) {
- case V4L2_CID_AUDIO_MUTE:
- case V4L2_CID_AUDIO_VOLUME:
- case V4L2_CID_AUDIO_BALANCE:
- case V4L2_CID_AUDIO_BASS:
- case V4L2_CID_AUDIO_TREBLE:
- case V4L2_CID_AUDIO_LOUDNESS:
- return true;
- default:
- break;
- }
- return false;
-}
-EXPORT_SYMBOL(v4l2_ctrl_radio_filter);
-
-/* Cluster controls */
-void v4l2_ctrl_cluster(unsigned ncontrols, struct v4l2_ctrl **controls)
-{
- bool has_volatiles = false;
- int i;
-
- /* The first control is the master control and it must not be NULL */
- BUG_ON(ncontrols == 0 || controls[0] == NULL);
-
- for (i = 0; i < ncontrols; i++) {
- if (controls[i]) {
- controls[i]->cluster = controls;
- controls[i]->ncontrols = ncontrols;
- if (controls[i]->flags & V4L2_CTRL_FLAG_VOLATILE)
- has_volatiles = true;
- }
- }
- controls[0]->has_volatiles = has_volatiles;
-}
-EXPORT_SYMBOL(v4l2_ctrl_cluster);
-
-void v4l2_ctrl_auto_cluster(unsigned ncontrols, struct v4l2_ctrl **controls,
- u8 manual_val, bool set_volatile)
-{
- struct v4l2_ctrl *master = controls[0];
- u32 flag = 0;
- int i;
-
- v4l2_ctrl_cluster(ncontrols, controls);
- WARN_ON(ncontrols <= 1);
- WARN_ON(manual_val < master->minimum || manual_val > master->maximum);
- WARN_ON(set_volatile && !has_op(master, g_volatile_ctrl));
- master->is_auto = true;
- master->has_volatiles = set_volatile;
- master->manual_mode_value = manual_val;
- master->flags |= V4L2_CTRL_FLAG_UPDATE;
-
- if (!is_cur_manual(master))
- flag = V4L2_CTRL_FLAG_INACTIVE |
- (set_volatile ? V4L2_CTRL_FLAG_VOLATILE : 0);
-
- for (i = 1; i < ncontrols; i++)
- if (controls[i])
- controls[i]->flags |= flag;
-}
-EXPORT_SYMBOL(v4l2_ctrl_auto_cluster);
-
-/* Activate/deactivate a control. */
-void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active)
-{
- /* invert since the actual flag is called 'inactive' */
- bool inactive = !active;
- bool old;
-
- if (ctrl == NULL)
- return;
-
- if (inactive)
- /* set V4L2_CTRL_FLAG_INACTIVE */
- old = test_and_set_bit(4, &ctrl->flags);
- else
- /* clear V4L2_CTRL_FLAG_INACTIVE */
- old = test_and_clear_bit(4, &ctrl->flags);
- if (old != inactive)
- send_event(NULL, ctrl, V4L2_EVENT_CTRL_CH_FLAGS);
-}
-EXPORT_SYMBOL(v4l2_ctrl_activate);
-
-/* Grab/ungrab a control.
- Typically used when streaming starts and you want to grab controls,
- preventing the user from changing them.
-
- Just call this and the framework will block any attempts to change
- these controls. */
-void v4l2_ctrl_grab(struct v4l2_ctrl *ctrl, bool grabbed)
-{
- bool old;
-
- if (ctrl == NULL)
- return;
-
- v4l2_ctrl_lock(ctrl);
- if (grabbed)
- /* set V4L2_CTRL_FLAG_GRABBED */
- old = test_and_set_bit(1, &ctrl->flags);
- else
- /* clear V4L2_CTRL_FLAG_GRABBED */
- old = test_and_clear_bit(1, &ctrl->flags);
- if (old != grabbed)
- send_event(NULL, ctrl, V4L2_EVENT_CTRL_CH_FLAGS);
- v4l2_ctrl_unlock(ctrl);
-}
-EXPORT_SYMBOL(v4l2_ctrl_grab);
-
-/* Log the control name and value */
-static void log_ctrl(const struct v4l2_ctrl *ctrl,
- const char *prefix, const char *colon)
-{
- if (ctrl->flags & (V4L2_CTRL_FLAG_DISABLED | V4L2_CTRL_FLAG_WRITE_ONLY))
- return;
- if (ctrl->type == V4L2_CTRL_TYPE_CTRL_CLASS)
- return;
-
- printk(KERN_INFO "%s%s%s: ", prefix, colon, ctrl->name);
-
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_INTEGER:
- printk(KERN_CONT "%d", ctrl->cur.val);
- break;
- case V4L2_CTRL_TYPE_BOOLEAN:
- printk(KERN_CONT "%s", ctrl->cur.val ? "true" : "false");
- break;
- case V4L2_CTRL_TYPE_MENU:
- printk(KERN_CONT "%s", ctrl->qmenu[ctrl->cur.val]);
- break;
- case V4L2_CTRL_TYPE_INTEGER_MENU:
- printk(KERN_CONT "%lld", ctrl->qmenu_int[ctrl->cur.val]);
- break;
- case V4L2_CTRL_TYPE_BITMASK:
- printk(KERN_CONT "0x%08x", ctrl->cur.val);
- break;
- case V4L2_CTRL_TYPE_INTEGER64:
- printk(KERN_CONT "%lld", ctrl->cur.val64);
- break;
- case V4L2_CTRL_TYPE_STRING:
- printk(KERN_CONT "%s", ctrl->cur.string);
- break;
- default:
- printk(KERN_CONT "unknown type %d", ctrl->type);
- break;
- }
- if (ctrl->flags & (V4L2_CTRL_FLAG_INACTIVE |
- V4L2_CTRL_FLAG_GRABBED |
- V4L2_CTRL_FLAG_VOLATILE)) {
- if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE)
- printk(KERN_CONT " inactive");
- if (ctrl->flags & V4L2_CTRL_FLAG_GRABBED)
- printk(KERN_CONT " grabbed");
- if (ctrl->flags & V4L2_CTRL_FLAG_VOLATILE)
- printk(KERN_CONT " volatile");
- }
- printk(KERN_CONT "\n");
-}
-
-/* Log all controls owned by the handler */
-void v4l2_ctrl_handler_log_status(struct v4l2_ctrl_handler *hdl,
- const char *prefix)
-{
- struct v4l2_ctrl *ctrl;
- const char *colon = "";
- int len;
-
- if (hdl == NULL)
- return;
- if (prefix == NULL)
- prefix = "";
- len = strlen(prefix);
- if (len && prefix[len - 1] != ' ')
- colon = ": ";
- mutex_lock(hdl->lock);
- list_for_each_entry(ctrl, &hdl->ctrls, node)
- if (!(ctrl->flags & V4L2_CTRL_FLAG_DISABLED))
- log_ctrl(ctrl, prefix, colon);
- mutex_unlock(hdl->lock);
-}
-EXPORT_SYMBOL(v4l2_ctrl_handler_log_status);
-
-int v4l2_ctrl_subdev_log_status(struct v4l2_subdev *sd)
-{
- v4l2_ctrl_handler_log_status(sd->ctrl_handler, sd->name);
- return 0;
-}
-EXPORT_SYMBOL(v4l2_ctrl_subdev_log_status);
-
-/* Call s_ctrl for all controls owned by the handler */
-int v4l2_ctrl_handler_setup(struct v4l2_ctrl_handler *hdl)
-{
- struct v4l2_ctrl *ctrl;
- int ret = 0;
-
- if (hdl == NULL)
- return 0;
- mutex_lock(hdl->lock);
- list_for_each_entry(ctrl, &hdl->ctrls, node)
- ctrl->done = false;
-
- list_for_each_entry(ctrl, &hdl->ctrls, node) {
- struct v4l2_ctrl *master = ctrl->cluster[0];
- int i;
-
- /* Skip if this control was already handled by a cluster. */
- /* Skip button controls and read-only controls. */
- if (ctrl->done || ctrl->type == V4L2_CTRL_TYPE_BUTTON ||
- (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY))
- continue;
-
- for (i = 0; i < master->ncontrols; i++) {
- if (master->cluster[i]) {
- cur_to_new(master->cluster[i]);
- master->cluster[i]->is_new = 1;
- master->cluster[i]->done = true;
- }
- }
- ret = call_op(master, s_ctrl);
- if (ret)
- break;
- }
- mutex_unlock(hdl->lock);
- return ret;
-}
-EXPORT_SYMBOL(v4l2_ctrl_handler_setup);
-
-/* Implement VIDIOC_QUERYCTRL */
-int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc)
-{
- u32 id = qc->id & V4L2_CTRL_ID_MASK;
- struct v4l2_ctrl_ref *ref;
- struct v4l2_ctrl *ctrl;
-
- if (hdl == NULL)
- return -EINVAL;
-
- mutex_lock(hdl->lock);
-
- /* Try to find it */
- ref = find_ref(hdl, id);
-
- if ((qc->id & V4L2_CTRL_FLAG_NEXT_CTRL) && !list_empty(&hdl->ctrl_refs)) {
- /* Find the next control with ID > qc->id */
-
- /* Did we reach the end of the control list? */
- if (id >= node2id(hdl->ctrl_refs.prev)) {
- ref = NULL; /* Yes, so there is no next control */
- } else if (ref) {
- /* We found a control with the given ID, so just get
- the next one in the list. */
- ref = list_entry(ref->node.next, typeof(*ref), node);
- } else {
- /* No control with the given ID exists, so start
- searching for the next largest ID. We know there
- is one, otherwise the first 'if' above would have
- been true. */
- list_for_each_entry(ref, &hdl->ctrl_refs, node)
- if (id < ref->ctrl->id)
- break;
- }
- }
- mutex_unlock(hdl->lock);
- if (!ref)
- return -EINVAL;
-
- ctrl = ref->ctrl;
- memset(qc, 0, sizeof(*qc));
- if (id >= V4L2_CID_PRIVATE_BASE)
- qc->id = id;
- else
- qc->id = ctrl->id;
- strlcpy(qc->name, ctrl->name, sizeof(qc->name));
- qc->minimum = ctrl->minimum;
- qc->maximum = ctrl->maximum;
- qc->default_value = ctrl->default_value;
- if (ctrl->type == V4L2_CTRL_TYPE_MENU
- || ctrl->type == V4L2_CTRL_TYPE_INTEGER_MENU)
- qc->step = 1;
- else
- qc->step = ctrl->step;
- qc->flags = ctrl->flags;
- qc->type = ctrl->type;
- return 0;
-}
-EXPORT_SYMBOL(v4l2_queryctrl);
-
-int v4l2_subdev_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
-{
- if (qc->id & V4L2_CTRL_FLAG_NEXT_CTRL)
- return -EINVAL;
- return v4l2_queryctrl(sd->ctrl_handler, qc);
-}
-EXPORT_SYMBOL(v4l2_subdev_queryctrl);
-
-/* Implement VIDIOC_QUERYMENU */
-int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm)
-{
- struct v4l2_ctrl *ctrl;
- u32 i = qm->index;
-
- ctrl = v4l2_ctrl_find(hdl, qm->id);
- if (!ctrl)
- return -EINVAL;
-
- qm->reserved = 0;
- /* Sanity checks */
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_MENU:
- if (ctrl->qmenu == NULL)
- return -EINVAL;
- break;
- case V4L2_CTRL_TYPE_INTEGER_MENU:
- if (ctrl->qmenu_int == NULL)
- return -EINVAL;
- break;
- default:
- return -EINVAL;
- }
-
- if (i < ctrl->minimum || i > ctrl->maximum)
- return -EINVAL;
-
- /* Use mask to see if this menu item should be skipped */
- if (ctrl->menu_skip_mask & (1 << i))
- return -EINVAL;
- /* Empty menu items should also be skipped */
- if (ctrl->type == V4L2_CTRL_TYPE_MENU) {
- if (ctrl->qmenu[i] == NULL || ctrl->qmenu[i][0] == '\0')
- return -EINVAL;
- strlcpy(qm->name, ctrl->qmenu[i], sizeof(qm->name));
- } else {
- qm->value = ctrl->qmenu_int[i];
- }
- return 0;
-}
-EXPORT_SYMBOL(v4l2_querymenu);
-
-int v4l2_subdev_querymenu(struct v4l2_subdev *sd, struct v4l2_querymenu *qm)
-{
- return v4l2_querymenu(sd->ctrl_handler, qm);
-}
-EXPORT_SYMBOL(v4l2_subdev_querymenu);
-
-
-
-/* Some general notes on the atomic requirements of VIDIOC_G/TRY/S_EXT_CTRLS:
-
- It is not a fully atomic operation, just best-effort only. After all, if
- multiple controls have to be set through multiple i2c writes (for example)
- then some initial writes may succeed while others fail. Thus leaving the
- system in an inconsistent state. The question is how much effort you are
- willing to spend on trying to make something atomic that really isn't.
-
- From the point of view of an application the main requirement is that
- when you call VIDIOC_S_EXT_CTRLS and some values are invalid then an
- error should be returned without actually affecting any controls.
-
- If all the values are correct, then it is acceptable to just give up
- in case of low-level errors.
-
- It is important though that the application can tell when only a partial
- configuration was done. The way we do that is through the error_idx field
- of struct v4l2_ext_controls: if that is equal to the count field then no
- controls were affected. Otherwise all controls before that index were
- successful in performing their 'get' or 'set' operation, the control at
- the given index failed, and you don't know what happened with the controls
- after the failed one. Since if they were part of a control cluster they
- could have been successfully processed (if a cluster member was encountered
- at index < error_idx), they could have failed (if a cluster member was at
- error_idx), or they may not have been processed yet (if the first cluster
- member appeared after error_idx).
-
- It is all fairly theoretical, though. In practice all you can do is to
- bail out. If error_idx == count, then it is an application bug. If
- error_idx < count then it is only an application bug if the error code was
- EBUSY. That usually means that something started streaming just when you
- tried to set the controls. In all other cases it is a driver/hardware
- problem and all you can do is to retry or bail out.
-
- Note that these rules do not apply to VIDIOC_TRY_EXT_CTRLS: since that
- never modifies controls the error_idx is just set to whatever control
- has an invalid value.
- */
-
-/* Prepare for the extended g/s/try functions.
- Find the controls in the control array and do some basic checks. */
-static int prepare_ext_ctrls(struct v4l2_ctrl_handler *hdl,
- struct v4l2_ext_controls *cs,
- struct v4l2_ctrl_helper *helpers)
-{
- struct v4l2_ctrl_helper *h;
- bool have_clusters = false;
- u32 i;
-
- for (i = 0, h = helpers; i < cs->count; i++, h++) {
- struct v4l2_ext_control *c = &cs->controls[i];
- struct v4l2_ctrl_ref *ref;
- struct v4l2_ctrl *ctrl;
- u32 id = c->id & V4L2_CTRL_ID_MASK;
-
- cs->error_idx = i;
-
- if (cs->ctrl_class && V4L2_CTRL_ID2CLASS(id) != cs->ctrl_class)
- return -EINVAL;
-
- /* Old-style private controls are not allowed for
- extended controls */
- if (id >= V4L2_CID_PRIVATE_BASE)
- return -EINVAL;
- ref = find_ref_lock(hdl, id);
- if (ref == NULL)
- return -EINVAL;
- ctrl = ref->ctrl;
- if (ctrl->flags & V4L2_CTRL_FLAG_DISABLED)
- return -EINVAL;
-
- if (ctrl->cluster[0]->ncontrols > 1)
- have_clusters = true;
- if (ctrl->cluster[0] != ctrl)
- ref = find_ref_lock(hdl, ctrl->cluster[0]->id);
- /* Store the ref to the master control of the cluster */
- h->mref = ref;
- h->ctrl = ctrl;
- /* Initially set next to 0, meaning that there is no other
- control in this helper array belonging to the same
- cluster */
- h->next = 0;
- }
-
- /* We are done if there were no controls that belong to a multi-
- control cluster. */
- if (!have_clusters)
- return 0;
-
- /* The code below figures out in O(n) time which controls in the list
- belong to the same cluster. */
-
- /* This has to be done with the handler lock taken. */
- mutex_lock(hdl->lock);
-
- /* First zero the helper field in the master control references */
- for (i = 0; i < cs->count; i++)
- helpers[i].mref->helper = NULL;
- for (i = 0, h = helpers; i < cs->count; i++, h++) {
- struct v4l2_ctrl_ref *mref = h->mref;
-
- /* If the mref->helper is set, then it points to an earlier
- helper that belongs to the same cluster. */
- if (mref->helper) {
- /* Set the next field of mref->helper to the current
- index: this means that that earlier helper now
- points to the next helper in the same cluster. */
- mref->helper->next = i;
- /* mref should be set only for the first helper in the
- cluster, clear the others. */
- h->mref = NULL;
- }
- /* Point the mref helper to the current helper struct. */
- mref->helper = h;
- }
- mutex_unlock(hdl->lock);
- return 0;
-}
-
-/* Handles the corner case where cs->count == 0. It checks whether the
- specified control class exists. If that class ID is 0, then it checks
- whether there are any controls at all. */
-static int class_check(struct v4l2_ctrl_handler *hdl, u32 ctrl_class)
-{
- if (ctrl_class == 0)
- return list_empty(&hdl->ctrl_refs) ? -EINVAL : 0;
- return find_ref_lock(hdl, ctrl_class | 1) ? 0 : -EINVAL;
-}
-
-
-
-/* Get extended controls. Allocates the helpers array if needed. */
-int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs)
-{
- struct v4l2_ctrl_helper helper[4];
- struct v4l2_ctrl_helper *helpers = helper;
- int ret;
- int i, j;
-
- cs->error_idx = cs->count;
- cs->ctrl_class = V4L2_CTRL_ID2CLASS(cs->ctrl_class);
-
- if (hdl == NULL)
- return -EINVAL;
-
- if (cs->count == 0)
- return class_check(hdl, cs->ctrl_class);
-
- if (cs->count > ARRAY_SIZE(helper)) {
- helpers = kmalloc_array(cs->count, sizeof(helper[0]),
- GFP_KERNEL);
- if (helpers == NULL)
- return -ENOMEM;
- }
-
- ret = prepare_ext_ctrls(hdl, cs, helpers);
- cs->error_idx = cs->count;
-
- for (i = 0; !ret && i < cs->count; i++)
- if (helpers[i].ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY)
- ret = -EACCES;
-
- for (i = 0; !ret && i < cs->count; i++) {
- int (*ctrl_to_user)(struct v4l2_ext_control *c,
- struct v4l2_ctrl *ctrl) = cur_to_user;
- struct v4l2_ctrl *master;
-
- if (helpers[i].mref == NULL)
- continue;
-
- master = helpers[i].mref->ctrl;
- cs->error_idx = i;
-
- v4l2_ctrl_lock(master);
-
- /* g_volatile_ctrl will update the new control values */
- if ((master->flags & V4L2_CTRL_FLAG_VOLATILE) ||
- (master->has_volatiles && !is_cur_manual(master))) {
- for (j = 0; j < master->ncontrols; j++)
- cur_to_new(master->cluster[j]);
- ret = call_op(master, g_volatile_ctrl);
- ctrl_to_user = new_to_user;
- }
- /* If OK, then copy the current (for non-volatile controls)
- or the new (for volatile controls) control values to the
- caller */
- if (!ret) {
- u32 idx = i;
-
- do {
- ret = ctrl_to_user(cs->controls + idx,
- helpers[idx].ctrl);
- idx = helpers[idx].next;
- } while (!ret && idx);
- }
- v4l2_ctrl_unlock(master);
- }
-
- if (cs->count > ARRAY_SIZE(helper))
- kfree(helpers);
- return ret;
-}
-EXPORT_SYMBOL(v4l2_g_ext_ctrls);
-
-int v4l2_subdev_g_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs)
-{
- return v4l2_g_ext_ctrls(sd->ctrl_handler, cs);
-}
-EXPORT_SYMBOL(v4l2_subdev_g_ext_ctrls);
-
-/* Helper function to get a single control */
-static int get_ctrl(struct v4l2_ctrl *ctrl, struct v4l2_ext_control *c)
-{
- struct v4l2_ctrl *master = ctrl->cluster[0];
- int ret = 0;
- int i;
-
- /* String controls are not supported. The new_to_user() and
- * cur_to_user() calls below would need to be modified not to access
- * userspace memory when called from get_ctrl().
- */
- if (ctrl->type == V4L2_CTRL_TYPE_STRING)
- return -EINVAL;
-
- if (ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY)
- return -EACCES;
-
- v4l2_ctrl_lock(master);
- /* g_volatile_ctrl will update the current control values */
- if (ctrl->flags & V4L2_CTRL_FLAG_VOLATILE) {
- for (i = 0; i < master->ncontrols; i++)
- cur_to_new(master->cluster[i]);
- ret = call_op(master, g_volatile_ctrl);
- new_to_user(c, ctrl);
- } else {
- cur_to_user(c, ctrl);
- }
- v4l2_ctrl_unlock(master);
- return ret;
-}
-
-int v4l2_g_ctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_control *control)
-{
- struct v4l2_ctrl *ctrl = v4l2_ctrl_find(hdl, control->id);
- struct v4l2_ext_control c;
- int ret;
-
- if (ctrl == NULL || !type_is_int(ctrl))
- return -EINVAL;
- ret = get_ctrl(ctrl, &c);
- control->value = c.value;
- return ret;
-}
-EXPORT_SYMBOL(v4l2_g_ctrl);
-
-int v4l2_subdev_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *control)
-{
- return v4l2_g_ctrl(sd->ctrl_handler, control);
-}
-EXPORT_SYMBOL(v4l2_subdev_g_ctrl);
-
-s32 v4l2_ctrl_g_ctrl(struct v4l2_ctrl *ctrl)
-{
- struct v4l2_ext_control c;
-
- /* It's a driver bug if this happens. */
- WARN_ON(!type_is_int(ctrl));
- c.value = 0;
- get_ctrl(ctrl, &c);
- return c.value;
-}
-EXPORT_SYMBOL(v4l2_ctrl_g_ctrl);
-
-s64 v4l2_ctrl_g_ctrl_int64(struct v4l2_ctrl *ctrl)
-{
- struct v4l2_ext_control c;
-
- /* It's a driver bug if this happens. */
- WARN_ON(ctrl->type != V4L2_CTRL_TYPE_INTEGER64);
- c.value = 0;
- get_ctrl(ctrl, &c);
- return c.value;
-}
-EXPORT_SYMBOL(v4l2_ctrl_g_ctrl_int64);
-
-
-/* Core function that calls try/s_ctrl and ensures that the new value is
- copied to the current value on a set.
- Must be called with ctrl->handler->lock held. */
-static int try_or_set_cluster(struct v4l2_fh *fh, struct v4l2_ctrl *master,
- bool set, u32 ch_flags)
-{
- bool update_flag;
- int ret;
- int i;
-
- /* Go through the cluster and either validate the new value or
- (if no new value was set), copy the current value to the new
- value, ensuring a consistent view for the control ops when
- called. */
- for (i = 0; i < master->ncontrols; i++) {
- struct v4l2_ctrl *ctrl = master->cluster[i];
-
- if (ctrl == NULL)
- continue;
-
- if (!ctrl->is_new) {
- cur_to_new(ctrl);
- continue;
- }
- /* Check again: it may have changed since the
- previous check in try_or_set_ext_ctrls(). */
- if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED))
- return -EBUSY;
- }
-
- ret = call_op(master, try_ctrl);
-
- /* Don't set if there is no change */
- if (ret || !set || !cluster_changed(master))
- return ret;
- ret = call_op(master, s_ctrl);
- if (ret)
- return ret;
-
- /* If OK, then make the new values permanent. */
- update_flag = is_cur_manual(master) != is_new_manual(master);
- for (i = 0; i < master->ncontrols; i++)
- new_to_cur(fh, master->cluster[i], ch_flags |
- ((update_flag && i > 0) ? V4L2_EVENT_CTRL_CH_FLAGS : 0));
- return 0;
-}
-
-/* Validate controls. */
-static int validate_ctrls(struct v4l2_ext_controls *cs,
- struct v4l2_ctrl_helper *helpers, bool set)
-{
- unsigned i;
- int ret = 0;
-
- cs->error_idx = cs->count;
- for (i = 0; i < cs->count; i++) {
- struct v4l2_ctrl *ctrl = helpers[i].ctrl;
-
- cs->error_idx = i;
-
- if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY)
- return -EACCES;
- /* This test is also done in try_set_control_cluster() which
- is called in atomic context, so that has the final say,
- but it makes sense to do an up-front check as well. Once
- an error occurs in try_set_control_cluster() some other
- controls may have been set already and we want to do a
- best-effort to avoid that. */
- if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED))
- return -EBUSY;
- ret = validate_new(ctrl, &cs->controls[i]);
- if (ret)
- return ret;
- }
- return 0;
-}
-
-/* Obtain the current volatile values of an autocluster and mark them
- as new. */
-static void update_from_auto_cluster(struct v4l2_ctrl *master)
-{
- int i;
-
- for (i = 0; i < master->ncontrols; i++)
- cur_to_new(master->cluster[i]);
- if (!call_op(master, g_volatile_ctrl))
- for (i = 1; i < master->ncontrols; i++)
- if (master->cluster[i])
- master->cluster[i]->is_new = 1;
-}
-
-/* Try or try-and-set controls */
-static int try_set_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl,
- struct v4l2_ext_controls *cs,
- bool set)
-{
- struct v4l2_ctrl_helper helper[4];
- struct v4l2_ctrl_helper *helpers = helper;
- unsigned i, j;
- int ret;
-
- cs->error_idx = cs->count;
- cs->ctrl_class = V4L2_CTRL_ID2CLASS(cs->ctrl_class);
-
- if (hdl == NULL)
- return -EINVAL;
-
- if (cs->count == 0)
- return class_check(hdl, cs->ctrl_class);
-
- if (cs->count > ARRAY_SIZE(helper)) {
- helpers = kmalloc_array(cs->count, sizeof(helper[0]),
- GFP_KERNEL);
- if (!helpers)
- return -ENOMEM;
- }
- ret = prepare_ext_ctrls(hdl, cs, helpers);
- if (!ret)
- ret = validate_ctrls(cs, helpers, set);
- if (ret && set)
- cs->error_idx = cs->count;
- for (i = 0; !ret && i < cs->count; i++) {
- struct v4l2_ctrl *master;
- u32 idx = i;
-
- if (helpers[i].mref == NULL)
- continue;
-
- cs->error_idx = i;
- master = helpers[i].mref->ctrl;
- v4l2_ctrl_lock(master);
-
- /* Reset the 'is_new' flags of the cluster */
- for (j = 0; j < master->ncontrols; j++)
- if (master->cluster[j])
- master->cluster[j]->is_new = 0;
-
- /* For volatile autoclusters that are currently in auto mode
- we need to discover if it will be set to manual mode.
- If so, then we have to copy the current volatile values
- first since those will become the new manual values (which
- may be overwritten by explicit new values from this set
- of controls). */
- if (master->is_auto && master->has_volatiles &&
- !is_cur_manual(master)) {
- /* Pick an initial non-manual value */
- s32 new_auto_val = master->manual_mode_value + 1;
- u32 tmp_idx = idx;
-
- do {
- /* Check if the auto control is part of the
- list, and remember the new value. */
- if (helpers[tmp_idx].ctrl == master)
- new_auto_val = cs->controls[tmp_idx].value;
- tmp_idx = helpers[tmp_idx].next;
- } while (tmp_idx);
- /* If the new value == the manual value, then copy
- the current volatile values. */
- if (new_auto_val == master->manual_mode_value)
- update_from_auto_cluster(master);
- }
-
- /* Copy the new caller-supplied control values.
- user_to_new() sets 'is_new' to 1. */
- do {
- ret = user_to_new(cs->controls + idx, helpers[idx].ctrl);
- idx = helpers[idx].next;
- } while (!ret && idx);
-
- if (!ret)
- ret = try_or_set_cluster(fh, master, set, 0);
-
- /* Copy the new values back to userspace. */
- if (!ret) {
- idx = i;
- do {
- ret = new_to_user(cs->controls + idx,
- helpers[idx].ctrl);
- idx = helpers[idx].next;
- } while (!ret && idx);
- }
- v4l2_ctrl_unlock(master);
- }
-
- if (cs->count > ARRAY_SIZE(helper))
- kfree(helpers);
- return ret;
-}
-
-int v4l2_try_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs)
-{
- return try_set_ext_ctrls(NULL, hdl, cs, false);
-}
-EXPORT_SYMBOL(v4l2_try_ext_ctrls);
-
-int v4l2_s_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl,
- struct v4l2_ext_controls *cs)
-{
- return try_set_ext_ctrls(fh, hdl, cs, true);
-}
-EXPORT_SYMBOL(v4l2_s_ext_ctrls);
-
-int v4l2_subdev_try_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs)
-{
- return try_set_ext_ctrls(NULL, sd->ctrl_handler, cs, false);
-}
-EXPORT_SYMBOL(v4l2_subdev_try_ext_ctrls);
-
-int v4l2_subdev_s_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs)
-{
- return try_set_ext_ctrls(NULL, sd->ctrl_handler, cs, true);
-}
-EXPORT_SYMBOL(v4l2_subdev_s_ext_ctrls);
-
-/* Helper function for VIDIOC_S_CTRL compatibility */
-static int set_ctrl(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl,
- struct v4l2_ext_control *c, u32 ch_flags)
-{
- struct v4l2_ctrl *master = ctrl->cluster[0];
- int i;
-
- /* String controls are not supported. The user_to_new() and
- * cur_to_user() calls below would need to be modified not to access
- * userspace memory when called from set_ctrl().
- */
- if (ctrl->type == V4L2_CTRL_TYPE_STRING)
- return -EINVAL;
-
- /* Reset the 'is_new' flags of the cluster */
- for (i = 0; i < master->ncontrols; i++)
- if (master->cluster[i])
- master->cluster[i]->is_new = 0;
-
- /* For autoclusters with volatiles that are switched from auto to
- manual mode we have to update the current volatile values since
- those will become the initial manual values after such a switch. */
- if (master->is_auto && master->has_volatiles && ctrl == master &&
- !is_cur_manual(master) && c->value == master->manual_mode_value)
- update_from_auto_cluster(master);
-
- user_to_new(c, ctrl);
- return try_or_set_cluster(fh, master, true, ch_flags);
-}
-
-/* Helper function for VIDIOC_S_CTRL compatibility */
-static int set_ctrl_lock(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl,
- struct v4l2_ext_control *c)
-{
- int ret = validate_new(ctrl, c);
-
- if (!ret) {
- v4l2_ctrl_lock(ctrl);
- ret = set_ctrl(fh, ctrl, c, 0);
- if (!ret)
- cur_to_user(c, ctrl);
- v4l2_ctrl_unlock(ctrl);
- }
- return ret;
-}
-
-int v4l2_s_ctrl(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl,
- struct v4l2_control *control)
-{
- struct v4l2_ctrl *ctrl = v4l2_ctrl_find(hdl, control->id);
- struct v4l2_ext_control c;
- int ret;
-
- if (ctrl == NULL || !type_is_int(ctrl))
- return -EINVAL;
-
- if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY)
- return -EACCES;
-
- c.value = control->value;
- ret = set_ctrl_lock(fh, ctrl, &c);
- control->value = c.value;
- return ret;
-}
-EXPORT_SYMBOL(v4l2_s_ctrl);
-
-int v4l2_subdev_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *control)
-{
- return v4l2_s_ctrl(NULL, sd->ctrl_handler, control);
-}
-EXPORT_SYMBOL(v4l2_subdev_s_ctrl);
-
-int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val)
-{
- struct v4l2_ext_control c;
-
- /* It's a driver bug if this happens. */
- WARN_ON(!type_is_int(ctrl));
- c.value = val;
- return set_ctrl_lock(NULL, ctrl, &c);
-}
-EXPORT_SYMBOL(v4l2_ctrl_s_ctrl);
-
-int v4l2_ctrl_s_ctrl_int64(struct v4l2_ctrl *ctrl, s64 val)
-{
- struct v4l2_ext_control c;
-
- /* It's a driver bug if this happens. */
- WARN_ON(ctrl->type != V4L2_CTRL_TYPE_INTEGER64);
- c.value64 = val;
- return set_ctrl_lock(NULL, ctrl, &c);
-}
-EXPORT_SYMBOL(v4l2_ctrl_s_ctrl_int64);
-
-void v4l2_ctrl_notify(struct v4l2_ctrl *ctrl, v4l2_ctrl_notify_fnc notify, void *priv)
-{
- if (ctrl == NULL)
- return;
- if (notify == NULL) {
- ctrl->call_notify = 0;
- return;
- }
- if (WARN_ON(ctrl->handler->notify && ctrl->handler->notify != notify))
- return;
- ctrl->handler->notify = notify;
- ctrl->handler->notify_priv = priv;
- ctrl->call_notify = 1;
-}
-EXPORT_SYMBOL(v4l2_ctrl_notify);
-
-int v4l2_ctrl_modify_range(struct v4l2_ctrl *ctrl,
- s32 min, s32 max, u32 step, s32 def)
-{
- int ret = check_range(ctrl->type, min, max, step, def);
- struct v4l2_ext_control c;
-
- switch (ctrl->type) {
- case V4L2_CTRL_TYPE_INTEGER:
- case V4L2_CTRL_TYPE_BOOLEAN:
- case V4L2_CTRL_TYPE_MENU:
- case V4L2_CTRL_TYPE_INTEGER_MENU:
- case V4L2_CTRL_TYPE_BITMASK:
- if (ret)
- return ret;
- break;
- default:
- return -EINVAL;
- }
- v4l2_ctrl_lock(ctrl);
- ctrl->minimum = min;
- ctrl->maximum = max;
- ctrl->step = step;
- ctrl->default_value = def;
- c.value = ctrl->cur.val;
- if (validate_new(ctrl, &c))
- c.value = def;
- if (c.value != ctrl->cur.val)
- ret = set_ctrl(NULL, ctrl, &c, V4L2_EVENT_CTRL_CH_RANGE);
- else
- send_event(NULL, ctrl, V4L2_EVENT_CTRL_CH_RANGE);
- v4l2_ctrl_unlock(ctrl);
- return ret;
-}
-EXPORT_SYMBOL(v4l2_ctrl_modify_range);
-
-static int v4l2_ctrl_add_event(struct v4l2_subscribed_event *sev, unsigned elems)
-{
- struct v4l2_ctrl *ctrl = v4l2_ctrl_find(sev->fh->ctrl_handler, sev->id);
-
- if (ctrl == NULL)
- return -EINVAL;
-
- v4l2_ctrl_lock(ctrl);
- list_add_tail(&sev->node, &ctrl->ev_subs);
- if (ctrl->type != V4L2_CTRL_TYPE_CTRL_CLASS &&
- (sev->flags & V4L2_EVENT_SUB_FL_SEND_INITIAL)) {
- struct v4l2_event ev;
- u32 changes = V4L2_EVENT_CTRL_CH_FLAGS;
-
- if (!(ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY))
- changes |= V4L2_EVENT_CTRL_CH_VALUE;
- fill_event(&ev, ctrl, changes);
- /* Mark the queue as active, allowing this initial
- event to be accepted. */
- sev->elems = elems;
- v4l2_event_queue_fh(sev->fh, &ev);
- }
- v4l2_ctrl_unlock(ctrl);
- return 0;
-}
-
-static void v4l2_ctrl_del_event(struct v4l2_subscribed_event *sev)
-{
- struct v4l2_ctrl *ctrl = v4l2_ctrl_find(sev->fh->ctrl_handler, sev->id);
-
- v4l2_ctrl_lock(ctrl);
- list_del(&sev->node);
- v4l2_ctrl_unlock(ctrl);
-}
-
-void v4l2_ctrl_replace(struct v4l2_event *old, const struct v4l2_event *new)
-{
- u32 old_changes = old->u.ctrl.changes;
-
- old->u.ctrl = new->u.ctrl;
- old->u.ctrl.changes |= old_changes;
-}
-EXPORT_SYMBOL(v4l2_ctrl_replace);
-
-void v4l2_ctrl_merge(const struct v4l2_event *old, struct v4l2_event *new)
-{
- new->u.ctrl.changes |= old->u.ctrl.changes;
-}
-EXPORT_SYMBOL(v4l2_ctrl_merge);
-
-const struct v4l2_subscribed_event_ops v4l2_ctrl_sub_ev_ops = {
- .add = v4l2_ctrl_add_event,
- .del = v4l2_ctrl_del_event,
- .replace = v4l2_ctrl_replace,
- .merge = v4l2_ctrl_merge,
-};
-EXPORT_SYMBOL(v4l2_ctrl_sub_ev_ops);
-
-int v4l2_ctrl_log_status(struct file *file, void *fh)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_fh *vfh = file->private_data;
-
- if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) && vfd->v4l2_dev)
- v4l2_ctrl_handler_log_status(vfh->ctrl_handler,
- vfd->v4l2_dev->name);
- return 0;
-}
-EXPORT_SYMBOL(v4l2_ctrl_log_status);
-
-int v4l2_ctrl_subscribe_event(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub)
-{
- if (sub->type == V4L2_EVENT_CTRL)
- return v4l2_event_subscribe(fh, sub, 0, &v4l2_ctrl_sub_ev_ops);
- return -EINVAL;
-}
-EXPORT_SYMBOL(v4l2_ctrl_subscribe_event);
-
-int v4l2_ctrl_subdev_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
- struct v4l2_event_subscription *sub)
-{
- if (!sd->ctrl_handler)
- return -EINVAL;
- return v4l2_ctrl_subscribe_event(fh, sub);
-}
-EXPORT_SYMBOL(v4l2_ctrl_subdev_subscribe_event);
-
-unsigned int v4l2_ctrl_poll(struct file *file, struct poll_table_struct *wait)
-{
- struct v4l2_fh *fh = file->private_data;
-
- if (v4l2_event_pending(fh))
- return POLLPRI;
- poll_wait(file, &fh->wait, wait);
- return 0;
-}
-EXPORT_SYMBOL(v4l2_ctrl_poll);
diff --git a/drivers/media/v4l2-core/v4l2-dev.c b/drivers/media/v4l2-core/v4l2-dev.c
index de1e9ab7..0409d7f9 100644
--- a/drivers/media/v4l2-core/v4l2-dev.c
+++ b/drivers/media/v4l2-core/v4l2-dev.c
@@ -26,6 +26,7 @@
#include <linux/kmod.h>
#include <linux/slab.h>
#include <asm/uaccess.h>
+#include <asm/system.h>
#include <media/v4l2-common.h>
#include <media/v4l2-device.h>
@@ -46,29 +47,6 @@ static ssize_t show_index(struct device *cd,
return sprintf(buf, "%i\n", vdev->index);
}
-static ssize_t show_debug(struct device *cd,
- struct device_attribute *attr, char *buf)
-{
- struct video_device *vdev = to_video_device(cd);
-
- return sprintf(buf, "%i\n", vdev->debug);
-}
-
-static ssize_t set_debug(struct device *cd, struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct video_device *vdev = to_video_device(cd);
- int res = 0;
- u16 value;
-
- res = kstrtou16(buf, 0, &value);
- if (res)
- return res;
-
- vdev->debug = value;
- return len;
-}
-
static ssize_t show_name(struct device *cd,
struct device_attribute *attr, char *buf)
{
@@ -79,7 +57,6 @@ static ssize_t show_name(struct device *cd,
static struct device_attribute video_device_attrs[] = {
__ATTR(name, S_IRUGO, show_name, NULL),
- __ATTR(debug, 0644, show_debug, set_debug),
__ATTR(index, S_IRUGO, show_index, NULL),
__ATTR_NULL
};
@@ -103,7 +80,7 @@ static inline unsigned long *devnode_bits(int vfl_type)
/* Any types not assigned to fixed minor ranges must be mapped to
one single bitmap for the purposes of finding a free node number
since all those unassigned types use the same minor range. */
- int idx = (vfl_type > VFL_TYPE_RADIO) ? VFL_TYPE_MAX - 1 : vfl_type;
+ int idx = (vfl_type > VFL_TYPE_VTX) ? VFL_TYPE_MAX - 1 : vfl_type;
return devnode_nums[idx];
}
@@ -166,12 +143,12 @@ static inline void video_put(struct video_device *vdev)
static void v4l2_device_release(struct device *cd)
{
struct video_device *vdev = to_video_device(cd);
- struct v4l2_device *v4l2_dev = vdev->v4l2_dev;
mutex_lock(&videodev_lock);
- if (WARN_ON(video_device[vdev->minor] != vdev)) {
- /* should not happen */
+ if (video_device[vdev->minor] != vdev) {
mutex_unlock(&videodev_lock);
+ /* should not happen */
+ WARN_ON(1);
return;
}
@@ -189,30 +166,9 @@ static void v4l2_device_release(struct device *cd)
mutex_unlock(&videodev_lock);
-#if defined(CONFIG_MEDIA_CONTROLLER)
- if (v4l2_dev && v4l2_dev->mdev &&
- vdev->vfl_type != VFL_TYPE_SUBDEV)
- media_device_unregister_entity(&vdev->entity);
-#endif
-
- /* Do not call v4l2_device_put if there is no release callback set.
- * Drivers that have no v4l2_device release callback might free the
- * v4l2_dev instance in the video_device release callback below, so we
- * must perform this check here.
- *
- * TODO: In the long run all drivers that use v4l2_device should use the
- * v4l2_device release callback. This check will then be unnecessary.
- */
- if (v4l2_dev && v4l2_dev->release == NULL)
- v4l2_dev = NULL;
-
/* Release video_device and perform other
cleanups as needed. */
vdev->release(vdev);
-
- /* Decrease v4l2_device refcount */
- if (v4l2_dev)
- v4l2_device_put(v4l2_dev);
}
static struct class video_class = {
@@ -222,172 +178,65 @@ static struct class video_class = {
struct video_device *video_devdata(struct file *file)
{
- return video_device[iminor(file_inode(file))];
+ return video_device[iminor(file->f_path.dentry->d_inode)];
}
EXPORT_SYMBOL(video_devdata);
-
-/* Priority handling */
-
-static inline bool prio_is_valid(enum v4l2_priority prio)
-{
- return prio == V4L2_PRIORITY_BACKGROUND ||
- prio == V4L2_PRIORITY_INTERACTIVE ||
- prio == V4L2_PRIORITY_RECORD;
-}
-
-void v4l2_prio_init(struct v4l2_prio_state *global)
-{
- memset(global, 0, sizeof(*global));
-}
-EXPORT_SYMBOL(v4l2_prio_init);
-
-int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
- enum v4l2_priority new)
-{
- if (!prio_is_valid(new))
- return -EINVAL;
- if (*local == new)
- return 0;
-
- atomic_inc(&global->prios[new]);
- if (prio_is_valid(*local))
- atomic_dec(&global->prios[*local]);
- *local = new;
- return 0;
-}
-EXPORT_SYMBOL(v4l2_prio_change);
-
-void v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local)
-{
- v4l2_prio_change(global, local, V4L2_PRIORITY_DEFAULT);
-}
-EXPORT_SYMBOL(v4l2_prio_open);
-
-void v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority local)
-{
- if (prio_is_valid(local))
- atomic_dec(&global->prios[local]);
-}
-EXPORT_SYMBOL(v4l2_prio_close);
-
-enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global)
-{
- if (atomic_read(&global->prios[V4L2_PRIORITY_RECORD]) > 0)
- return V4L2_PRIORITY_RECORD;
- if (atomic_read(&global->prios[V4L2_PRIORITY_INTERACTIVE]) > 0)
- return V4L2_PRIORITY_INTERACTIVE;
- if (atomic_read(&global->prios[V4L2_PRIORITY_BACKGROUND]) > 0)
- return V4L2_PRIORITY_BACKGROUND;
- return V4L2_PRIORITY_UNSET;
-}
-EXPORT_SYMBOL(v4l2_prio_max);
-
-int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority local)
-{
- return (local < v4l2_prio_max(global)) ? -EBUSY : 0;
-}
-EXPORT_SYMBOL(v4l2_prio_check);
-
-
static ssize_t v4l2_read(struct file *filp, char __user *buf,
size_t sz, loff_t *off)
{
struct video_device *vdev = video_devdata(filp);
- int ret = -ENODEV;
if (!vdev->fops->read)
return -EINVAL;
- if (video_is_registered(vdev))
- ret = vdev->fops->read(filp, buf, sz, off);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: read: %zd (%d)\n",
- video_device_node_name(vdev), sz, ret);
- return ret;
+ if (video_is_unregistered(vdev))
+ return -EIO;
+ return vdev->fops->read(filp, buf, sz, off);
}
static ssize_t v4l2_write(struct file *filp, const char __user *buf,
size_t sz, loff_t *off)
{
struct video_device *vdev = video_devdata(filp);
- int ret = -ENODEV;
if (!vdev->fops->write)
return -EINVAL;
- if (video_is_registered(vdev))
- ret = vdev->fops->write(filp, buf, sz, off);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: write: %zd (%d)\n",
- video_device_node_name(vdev), sz, ret);
- return ret;
+ if (video_is_unregistered(vdev))
+ return -EIO;
+ return vdev->fops->write(filp, buf, sz, off);
}
static unsigned int v4l2_poll(struct file *filp, struct poll_table_struct *poll)
{
struct video_device *vdev = video_devdata(filp);
- unsigned int res = POLLERR | POLLHUP;
- if (!vdev->fops->poll)
+ if (!vdev->fops->poll || video_is_unregistered(vdev))
return DEFAULT_POLLMASK;
- if (video_is_registered(vdev))
- res = vdev->fops->poll(filp, poll);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: poll: %08x\n",
- video_device_node_name(vdev), res);
- return res;
+ return vdev->fops->poll(filp, poll);
}
-static long v4l2_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+static long v4l2_ioctl(struct file *filp,
+ unsigned int cmd, unsigned long arg)
{
struct video_device *vdev = video_devdata(filp);
- int ret = -ENODEV;
-
- if (vdev->fops->unlocked_ioctl) {
- struct mutex *lock = v4l2_ioctl_get_lock(vdev, cmd);
-
- if (lock && mutex_lock_interruptible(lock))
- return -ERESTARTSYS;
- if (video_is_registered(vdev))
- ret = vdev->fops->unlocked_ioctl(filp, cmd, arg);
- if (lock)
- mutex_unlock(lock);
- } else if (vdev->fops->ioctl) {
- /* This code path is a replacement for the BKL. It is a major
- * hack but it will have to do for those drivers that are not
- * yet converted to use unlocked_ioctl.
- *
- * There are two options: if the driver implements struct
- * v4l2_device, then the lock defined there is used to
- * serialize the ioctls. Otherwise the v4l2 core lock defined
- * below is used. This lock is really bad since it serializes
- * completely independent devices.
- *
- * Both variants suffer from the same problem: if the driver
- * sleeps, then it blocks all ioctls since the lock is still
- * held. This is very common for VIDIOC_DQBUF since that
- * normally waits for a frame to arrive. As a result any other
- * ioctl calls will proceed very, very slowly since each call
- * will have to wait for the VIDIOC_QBUF to finish. Things that
- * should take 0.01s may now take 10-20 seconds.
- *
- * The workaround is to *not* take the lock for VIDIOC_DQBUF.
- * This actually works OK for videobuf-based drivers, since
- * videobuf will take its own internal lock.
- */
- static DEFINE_MUTEX(v4l2_ioctl_mutex);
- struct mutex *m = vdev->v4l2_dev ?
- &vdev->v4l2_dev->ioctl_lock : &v4l2_ioctl_mutex;
-
- if (cmd != VIDIOC_DQBUF && mutex_lock_interruptible(m))
- return -ERESTARTSYS;
- if (video_is_registered(vdev))
- ret = vdev->fops->ioctl(filp, cmd, arg);
- if (cmd != VIDIOC_DQBUF)
- mutex_unlock(m);
- } else
- ret = -ENOTTY;
- return ret;
+ if (!vdev->fops->ioctl)
+ return -ENOTTY;
+ /* Allow ioctl to continue even if the device was unregistered.
+ Things like dequeueing buffers might still be useful. */
+ return vdev->fops->ioctl(filp, cmd, arg);
+}
+
+static long v4l2_unlocked_ioctl(struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ struct video_device *vdev = video_devdata(filp);
+
+ if (!vdev->fops->unlocked_ioctl)
+ return -ENOTTY;
+ /* Allow ioctl to continue even if the device was unregistered.
+ Things like dequeueing buffers might still be useful. */
+ return vdev->fops->unlocked_ioctl(filp, cmd, arg);
}
#ifdef CONFIG_MMU
@@ -398,33 +247,23 @@ static unsigned long v4l2_get_unmapped_area(struct file *filp,
unsigned long flags)
{
struct video_device *vdev = video_devdata(filp);
- int ret;
if (!vdev->fops->get_unmapped_area)
return -ENOSYS;
- if (!video_is_registered(vdev))
+ if (video_is_unregistered(vdev))
return -ENODEV;
- ret = vdev->fops->get_unmapped_area(filp, addr, len, pgoff, flags);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: get_unmapped_area (%d)\n",
- video_device_node_name(vdev), ret);
- return ret;
+ return vdev->fops->get_unmapped_area(filp, addr, len, pgoff, flags);
}
#endif
static int v4l2_mmap(struct file *filp, struct vm_area_struct *vm)
{
struct video_device *vdev = video_devdata(filp);
- int ret = -ENODEV;
- if (!vdev->fops->mmap)
+ if (!vdev->fops->mmap ||
+ video_is_unregistered(vdev))
return -ENODEV;
- if (video_is_registered(vdev))
- ret = vdev->fops->mmap(filp, vm);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: mmap (%d)\n",
- video_device_node_name(vdev), ret);
- return ret;
+ return vdev->fops->mmap(filp, vm);
}
/* Override for the open function */
@@ -436,24 +275,18 @@ static int v4l2_open(struct inode *inode, struct file *filp)
/* Check if the video device is available */
mutex_lock(&videodev_lock);
vdev = video_devdata(filp);
- /* return ENODEV if the video device has already been removed. */
- if (vdev == NULL || !video_is_registered(vdev)) {
+ /* return ENODEV if the video device has been removed
+ already or if it is not registered anymore. */
+ if (vdev == NULL || video_is_unregistered(vdev)) {
mutex_unlock(&videodev_lock);
return -ENODEV;
}
/* and increase the device refcount */
video_get(vdev);
mutex_unlock(&videodev_lock);
- if (vdev->fops->open) {
- if (video_is_registered(vdev))
- ret = vdev->fops->open(filp);
- else
- ret = -ENODEV;
- }
+ if (vdev->fops->open)
+ ret = vdev->fops->open(filp);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: open (%d)\n",
- video_device_node_name(vdev), ret);
/* decrease the refcount in case of an error */
if (ret)
video_put(vdev);
@@ -467,10 +300,7 @@ static int v4l2_release(struct inode *inode, struct file *filp)
int ret = 0;
if (vdev->fops->release)
- ret = vdev->fops->release(filp);
- if (vdev->debug)
- printk(KERN_DEBUG "%s: release\n",
- video_device_node_name(vdev));
+ vdev->fops->release(filp);
/* decrease the refcount unconditionally since the release()
return value is ignored. */
@@ -478,6 +308,22 @@ static int v4l2_release(struct inode *inode, struct file *filp)
return ret;
}
+static const struct file_operations v4l2_unlocked_fops = {
+ .owner = THIS_MODULE,
+ .read = v4l2_read,
+ .write = v4l2_write,
+ .open = v4l2_open,
+ .get_unmapped_area = v4l2_get_unmapped_area,
+ .mmap = v4l2_mmap,
+ .unlocked_ioctl = v4l2_unlocked_ioctl,
+#ifdef CONFIG_COMPAT
+ .compat_ioctl = v4l2_compat_ioctl32,
+#endif
+ .release = v4l2_release,
+ .poll = v4l2_poll,
+ .llseek = no_llseek,
+};
+
static const struct file_operations v4l2_fops = {
.owner = THIS_MODULE,
.read = v4l2_read,
@@ -530,225 +376,18 @@ static int get_index(struct video_device *vdev)
return find_first_zero_bit(used, VIDEO_NUM_DEVICES);
}
-#define SET_VALID_IOCTL(ops, cmd, op) \
- if (ops->op) \
- set_bit(_IOC_NR(cmd), valid_ioctls)
-
-/* This determines which ioctls are actually implemented in the driver.
- It's a one-time thing which simplifies video_ioctl2 as it can just do
- a bit test.
-
- Note that drivers can override this by setting bits to 1 in
- vdev->valid_ioctls. If an ioctl is marked as 1 when this function is
- called, then that ioctl will actually be marked as unimplemented.
-
- It does that by first setting up the local valid_ioctls bitmap, and
- at the end do a:
-
- vdev->valid_ioctls = valid_ioctls & ~(vdev->valid_ioctls)
- */
-static void determine_valid_ioctls(struct video_device *vdev)
-{
- DECLARE_BITMAP(valid_ioctls, BASE_VIDIOC_PRIVATE);
- const struct v4l2_ioctl_ops *ops = vdev->ioctl_ops;
- bool is_vid = vdev->vfl_type == VFL_TYPE_GRABBER;
- bool is_vbi = vdev->vfl_type == VFL_TYPE_VBI;
- bool is_radio = vdev->vfl_type == VFL_TYPE_RADIO;
- bool is_rx = vdev->vfl_dir != VFL_DIR_TX;
- bool is_tx = vdev->vfl_dir != VFL_DIR_RX;
-
- bitmap_zero(valid_ioctls, BASE_VIDIOC_PRIVATE);
-
- /* vfl_type and vfl_dir independent ioctls */
-
- SET_VALID_IOCTL(ops, VIDIOC_QUERYCAP, vidioc_querycap);
- if (ops->vidioc_g_priority ||
- test_bit(V4L2_FL_USE_FH_PRIO, &vdev->flags))
- set_bit(_IOC_NR(VIDIOC_G_PRIORITY), valid_ioctls);
- if (ops->vidioc_s_priority ||
- test_bit(V4L2_FL_USE_FH_PRIO, &vdev->flags))
- set_bit(_IOC_NR(VIDIOC_S_PRIORITY), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_STREAMON, vidioc_streamon);
- SET_VALID_IOCTL(ops, VIDIOC_STREAMOFF, vidioc_streamoff);
- /* Note: the control handler can also be passed through the filehandle,
- and that can't be tested here. If the bit for these control ioctls
- is set, then the ioctl is valid. But if it is 0, then it can still
- be valid if the filehandle passed the control handler. */
- if (vdev->ctrl_handler || ops->vidioc_queryctrl)
- set_bit(_IOC_NR(VIDIOC_QUERYCTRL), valid_ioctls);
- if (vdev->ctrl_handler || ops->vidioc_g_ctrl || ops->vidioc_g_ext_ctrls)
- set_bit(_IOC_NR(VIDIOC_G_CTRL), valid_ioctls);
- if (vdev->ctrl_handler || ops->vidioc_s_ctrl || ops->vidioc_s_ext_ctrls)
- set_bit(_IOC_NR(VIDIOC_S_CTRL), valid_ioctls);
- if (vdev->ctrl_handler || ops->vidioc_g_ext_ctrls)
- set_bit(_IOC_NR(VIDIOC_G_EXT_CTRLS), valid_ioctls);
- if (vdev->ctrl_handler || ops->vidioc_s_ext_ctrls)
- set_bit(_IOC_NR(VIDIOC_S_EXT_CTRLS), valid_ioctls);
- if (vdev->ctrl_handler || ops->vidioc_try_ext_ctrls)
- set_bit(_IOC_NR(VIDIOC_TRY_EXT_CTRLS), valid_ioctls);
- if (vdev->ctrl_handler || ops->vidioc_querymenu)
- set_bit(_IOC_NR(VIDIOC_QUERYMENU), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_G_FREQUENCY, vidioc_g_frequency);
- SET_VALID_IOCTL(ops, VIDIOC_S_FREQUENCY, vidioc_s_frequency);
- SET_VALID_IOCTL(ops, VIDIOC_LOG_STATUS, vidioc_log_status);
-#ifdef CONFIG_VIDEO_ADV_DEBUG
- SET_VALID_IOCTL(ops, VIDIOC_DBG_G_REGISTER, vidioc_g_register);
- SET_VALID_IOCTL(ops, VIDIOC_DBG_S_REGISTER, vidioc_s_register);
-#endif
- SET_VALID_IOCTL(ops, VIDIOC_DBG_G_CHIP_IDENT, vidioc_g_chip_ident);
- /* yes, really vidioc_subscribe_event */
- SET_VALID_IOCTL(ops, VIDIOC_DQEVENT, vidioc_subscribe_event);
- SET_VALID_IOCTL(ops, VIDIOC_SUBSCRIBE_EVENT, vidioc_subscribe_event);
- SET_VALID_IOCTL(ops, VIDIOC_UNSUBSCRIBE_EVENT, vidioc_unsubscribe_event);
- if (ops->vidioc_enum_freq_bands || ops->vidioc_g_tuner || ops->vidioc_g_modulator)
- set_bit(_IOC_NR(VIDIOC_ENUM_FREQ_BANDS), valid_ioctls);
-
- if (is_vid) {
- /* video specific ioctls */
- if ((is_rx && (ops->vidioc_enum_fmt_vid_cap ||
- ops->vidioc_enum_fmt_vid_cap_mplane ||
- ops->vidioc_enum_fmt_vid_overlay)) ||
- (is_tx && (ops->vidioc_enum_fmt_vid_out ||
- ops->vidioc_enum_fmt_vid_out_mplane)))
- set_bit(_IOC_NR(VIDIOC_ENUM_FMT), valid_ioctls);
- if ((is_rx && (ops->vidioc_g_fmt_vid_cap ||
- ops->vidioc_g_fmt_vid_cap_mplane ||
- ops->vidioc_g_fmt_vid_overlay)) ||
- (is_tx && (ops->vidioc_g_fmt_vid_out ||
- ops->vidioc_g_fmt_vid_out_mplane ||
- ops->vidioc_g_fmt_vid_out_overlay)))
- set_bit(_IOC_NR(VIDIOC_G_FMT), valid_ioctls);
- if ((is_rx && (ops->vidioc_s_fmt_vid_cap ||
- ops->vidioc_s_fmt_vid_cap_mplane ||
- ops->vidioc_s_fmt_vid_overlay)) ||
- (is_tx && (ops->vidioc_s_fmt_vid_out ||
- ops->vidioc_s_fmt_vid_out_mplane ||
- ops->vidioc_s_fmt_vid_out_overlay)))
- set_bit(_IOC_NR(VIDIOC_S_FMT), valid_ioctls);
- if ((is_rx && (ops->vidioc_try_fmt_vid_cap ||
- ops->vidioc_try_fmt_vid_cap_mplane ||
- ops->vidioc_try_fmt_vid_overlay)) ||
- (is_tx && (ops->vidioc_try_fmt_vid_out ||
- ops->vidioc_try_fmt_vid_out_mplane ||
- ops->vidioc_try_fmt_vid_out_overlay)))
- set_bit(_IOC_NR(VIDIOC_TRY_FMT), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_OVERLAY, vidioc_overlay);
- SET_VALID_IOCTL(ops, VIDIOC_G_FBUF, vidioc_g_fbuf);
- SET_VALID_IOCTL(ops, VIDIOC_S_FBUF, vidioc_s_fbuf);
- SET_VALID_IOCTL(ops, VIDIOC_G_JPEGCOMP, vidioc_g_jpegcomp);
- SET_VALID_IOCTL(ops, VIDIOC_S_JPEGCOMP, vidioc_s_jpegcomp);
- SET_VALID_IOCTL(ops, VIDIOC_G_ENC_INDEX, vidioc_g_enc_index);
- SET_VALID_IOCTL(ops, VIDIOC_ENCODER_CMD, vidioc_encoder_cmd);
- SET_VALID_IOCTL(ops, VIDIOC_TRY_ENCODER_CMD, vidioc_try_encoder_cmd);
- SET_VALID_IOCTL(ops, VIDIOC_DECODER_CMD, vidioc_decoder_cmd);
- SET_VALID_IOCTL(ops, VIDIOC_TRY_DECODER_CMD, vidioc_try_decoder_cmd);
- SET_VALID_IOCTL(ops, VIDIOC_ENUM_FRAMESIZES, vidioc_enum_framesizes);
- SET_VALID_IOCTL(ops, VIDIOC_ENUM_FRAMEINTERVALS, vidioc_enum_frameintervals);
- } else if (is_vbi) {
- /* vbi specific ioctls */
- if ((is_rx && (ops->vidioc_g_fmt_vbi_cap ||
- ops->vidioc_g_fmt_sliced_vbi_cap)) ||
- (is_tx && (ops->vidioc_g_fmt_vbi_out ||
- ops->vidioc_g_fmt_sliced_vbi_out)))
- set_bit(_IOC_NR(VIDIOC_G_FMT), valid_ioctls);
- if ((is_rx && (ops->vidioc_s_fmt_vbi_cap ||
- ops->vidioc_s_fmt_sliced_vbi_cap)) ||
- (is_tx && (ops->vidioc_s_fmt_vbi_out ||
- ops->vidioc_s_fmt_sliced_vbi_out)))
- set_bit(_IOC_NR(VIDIOC_S_FMT), valid_ioctls);
- if ((is_rx && (ops->vidioc_try_fmt_vbi_cap ||
- ops->vidioc_try_fmt_sliced_vbi_cap)) ||
- (is_tx && (ops->vidioc_try_fmt_vbi_out ||
- ops->vidioc_try_fmt_sliced_vbi_out)))
- set_bit(_IOC_NR(VIDIOC_TRY_FMT), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_G_SLICED_VBI_CAP, vidioc_g_sliced_vbi_cap);
- }
- if (!is_radio) {
- /* ioctls valid for video or vbi */
- SET_VALID_IOCTL(ops, VIDIOC_REQBUFS, vidioc_reqbufs);
- SET_VALID_IOCTL(ops, VIDIOC_QUERYBUF, vidioc_querybuf);
- SET_VALID_IOCTL(ops, VIDIOC_QBUF, vidioc_qbuf);
- SET_VALID_IOCTL(ops, VIDIOC_EXPBUF, vidioc_expbuf);
- SET_VALID_IOCTL(ops, VIDIOC_DQBUF, vidioc_dqbuf);
- SET_VALID_IOCTL(ops, VIDIOC_CREATE_BUFS, vidioc_create_bufs);
- SET_VALID_IOCTL(ops, VIDIOC_PREPARE_BUF, vidioc_prepare_buf);
- if (ops->vidioc_s_std)
- set_bit(_IOC_NR(VIDIOC_ENUMSTD), valid_ioctls);
- if (ops->vidioc_g_std || vdev->current_norm)
- set_bit(_IOC_NR(VIDIOC_G_STD), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_S_STD, vidioc_s_std);
- if (is_rx) {
- SET_VALID_IOCTL(ops, VIDIOC_QUERYSTD, vidioc_querystd);
- SET_VALID_IOCTL(ops, VIDIOC_ENUMINPUT, vidioc_enum_input);
- SET_VALID_IOCTL(ops, VIDIOC_G_INPUT, vidioc_g_input);
- SET_VALID_IOCTL(ops, VIDIOC_S_INPUT, vidioc_s_input);
- SET_VALID_IOCTL(ops, VIDIOC_ENUMAUDIO, vidioc_enumaudio);
- SET_VALID_IOCTL(ops, VIDIOC_G_AUDIO, vidioc_g_audio);
- SET_VALID_IOCTL(ops, VIDIOC_S_AUDIO, vidioc_s_audio);
- SET_VALID_IOCTL(ops, VIDIOC_QUERY_DV_PRESET, vidioc_query_dv_preset);
- SET_VALID_IOCTL(ops, VIDIOC_QUERY_DV_TIMINGS, vidioc_query_dv_timings);
- }
- if (is_tx) {
- SET_VALID_IOCTL(ops, VIDIOC_ENUMOUTPUT, vidioc_enum_output);
- SET_VALID_IOCTL(ops, VIDIOC_G_OUTPUT, vidioc_g_output);
- SET_VALID_IOCTL(ops, VIDIOC_S_OUTPUT, vidioc_s_output);
- SET_VALID_IOCTL(ops, VIDIOC_ENUMAUDOUT, vidioc_enumaudout);
- SET_VALID_IOCTL(ops, VIDIOC_G_AUDOUT, vidioc_g_audout);
- SET_VALID_IOCTL(ops, VIDIOC_S_AUDOUT, vidioc_s_audout);
- }
- if (ops->vidioc_g_crop || ops->vidioc_g_selection)
- set_bit(_IOC_NR(VIDIOC_G_CROP), valid_ioctls);
- if (ops->vidioc_s_crop || ops->vidioc_s_selection)
- set_bit(_IOC_NR(VIDIOC_S_CROP), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_G_SELECTION, vidioc_g_selection);
- SET_VALID_IOCTL(ops, VIDIOC_S_SELECTION, vidioc_s_selection);
- if (ops->vidioc_cropcap || ops->vidioc_g_selection)
- set_bit(_IOC_NR(VIDIOC_CROPCAP), valid_ioctls);
- if (ops->vidioc_g_parm || (vdev->vfl_type == VFL_TYPE_GRABBER &&
- (ops->vidioc_g_std || vdev->current_norm)))
- set_bit(_IOC_NR(VIDIOC_G_PARM), valid_ioctls);
- SET_VALID_IOCTL(ops, VIDIOC_S_PARM, vidioc_s_parm);
- SET_VALID_IOCTL(ops, VIDIOC_ENUM_DV_PRESETS, vidioc_enum_dv_presets);
- SET_VALID_IOCTL(ops, VIDIOC_S_DV_PRESET, vidioc_s_dv_preset);
- SET_VALID_IOCTL(ops, VIDIOC_G_DV_PRESET, vidioc_g_dv_preset);
- SET_VALID_IOCTL(ops, VIDIOC_S_DV_TIMINGS, vidioc_s_dv_timings);
- SET_VALID_IOCTL(ops, VIDIOC_G_DV_TIMINGS, vidioc_g_dv_timings);
- SET_VALID_IOCTL(ops, VIDIOC_ENUM_DV_TIMINGS, vidioc_enum_dv_timings);
- SET_VALID_IOCTL(ops, VIDIOC_DV_TIMINGS_CAP, vidioc_dv_timings_cap);
- }
- if (is_tx) {
- /* transmitter only ioctls */
- SET_VALID_IOCTL(ops, VIDIOC_G_MODULATOR, vidioc_g_modulator);
- SET_VALID_IOCTL(ops, VIDIOC_S_MODULATOR, vidioc_s_modulator);
- }
- if (is_rx) {
- /* receiver only ioctls */
- SET_VALID_IOCTL(ops, VIDIOC_G_TUNER, vidioc_g_tuner);
- SET_VALID_IOCTL(ops, VIDIOC_S_TUNER, vidioc_s_tuner);
- SET_VALID_IOCTL(ops, VIDIOC_S_HW_FREQ_SEEK, vidioc_s_hw_freq_seek);
- }
-
- bitmap_andnot(vdev->valid_ioctls, valid_ioctls, vdev->valid_ioctls,
- BASE_VIDIOC_PRIVATE);
-}
-
/**
- * __video_register_device - register video4linux devices
+ * video_register_device - register video4linux devices
* @vdev: video device structure we want to register
* @type: type of device to register
* @nr: which device node number (0 == /dev/video0, 1 == /dev/video1, ...
* -1 == first free)
* @warn_if_nr_in_use: warn if the desired device node number
* was already in use and another number was chosen instead.
- * @owner: module that owns the video device node
*
* The registration code assigns minor numbers and device node numbers
* based on the requested type and registers the new device node with
* the kernel.
- *
- * This function assumes that struct video_device was zeroed when it
- * was allocated and does not contain any stale date.
- *
* An error is returned if no free minor or device node number could be
* found, or if the registration of the device node failed.
*
@@ -758,47 +397,45 @@ static void determine_valid_ioctls(struct video_device *vdev)
*
* %VFL_TYPE_GRABBER - A frame grabber
*
+ * %VFL_TYPE_VTX - A teletext device
+ *
* %VFL_TYPE_VBI - Vertical blank data (undecoded)
*
* %VFL_TYPE_RADIO - A radio card
- *
- * %VFL_TYPE_SUBDEV - A subdevice
*/
-int __video_register_device(struct video_device *vdev, int type, int nr,
- int warn_if_nr_in_use, struct module *owner)
+static int __video_register_device(struct video_device *vdev, int type, int nr,
+ int warn_if_nr_in_use)
{
int i = 0;
int ret;
int minor_offset = 0;
int minor_cnt = VIDEO_NUM_DEVICES;
const char *name_base;
+ void *priv = video_get_drvdata(vdev);
/* A minor value of -1 marks this video device as never
having been registered */
vdev->minor = -1;
/* the release callback MUST be present */
- if (WARN_ON(!vdev->release))
+ WARN_ON(!vdev->release);
+ if (!vdev->release)
return -EINVAL;
- /* v4l2_fh support */
- spin_lock_init(&vdev->fh_lock);
- INIT_LIST_HEAD(&vdev->fh_list);
-
/* Part 1: check device type */
switch (type) {
case VFL_TYPE_GRABBER:
name_base = "video";
break;
+ case VFL_TYPE_VTX:
+ name_base = "vtx";
+ break;
case VFL_TYPE_VBI:
name_base = "vbi";
break;
case VFL_TYPE_RADIO:
name_base = "radio";
break;
- case VFL_TYPE_SUBDEV:
- name_base = "v4l-subdev";
- break;
default:
printk(KERN_ERR "%s called with unknown type: %d\n",
__func__, type);
@@ -807,16 +444,8 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
vdev->vfl_type = type;
vdev->cdev = NULL;
- if (vdev->v4l2_dev) {
- if (vdev->v4l2_dev->dev)
- vdev->parent = vdev->v4l2_dev->dev;
- if (vdev->ctrl_handler == NULL)
- vdev->ctrl_handler = vdev->v4l2_dev->ctrl_handler;
- /* If the prio state pointer is NULL, then use the v4l2_device
- prio state. */
- if (vdev->prio == NULL)
- vdev->prio = &vdev->v4l2_dev->prio;
- }
+ if (vdev->v4l2_dev && vdev->v4l2_dev->dev)
+ vdev->parent = vdev->v4l2_dev->dev;
/* Part 2: find a free minor, device node number and device index. */
#ifdef CONFIG_VIDEO_FIXED_MINOR_RANGES
@@ -834,6 +463,10 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
minor_offset = 64;
minor_cnt = 64;
break;
+ case VFL_TYPE_VTX:
+ minor_offset = 192;
+ minor_cnt = 32;
+ break;
case VFL_TYPE_VBI:
minor_offset = 224;
minor_cnt = 32;
@@ -879,17 +512,17 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
vdev->index = get_index(vdev);
mutex_unlock(&videodev_lock);
- if (vdev->ioctl_ops)
- determine_valid_ioctls(vdev);
-
/* Part 3: Initialize the character device */
vdev->cdev = cdev_alloc();
if (vdev->cdev == NULL) {
ret = -ENOMEM;
goto cleanup;
}
- vdev->cdev->ops = &v4l2_fops;
- vdev->cdev->owner = owner;
+ if (vdev->fops->unlocked_ioctl)
+ vdev->cdev->ops = &v4l2_unlocked_fops;
+ else
+ vdev->cdev->ops = &v4l2_fops;
+ vdev->cdev->owner = vdev->fops->owner;
ret = cdev_add(vdev->cdev, MKDEV(VIDEO_MAJOR, vdev->minor), 1);
if (ret < 0) {
printk(KERN_ERR "%s: cdev_add failed\n", __func__);
@@ -899,6 +532,10 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
}
/* Part 4: register the device with sysfs */
+ memset(&vdev->dev, 0, sizeof(vdev->dev));
+ /* The memset above cleared the device's drvdata, so
+ put back the copy we made earlier. */
+ video_set_drvdata(vdev, priv);
vdev->dev.class = &video_class;
vdev->dev.devt = MKDEV(VIDEO_MAJOR, vdev->minor);
if (vdev->parent)
@@ -914,35 +551,13 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
vdev->dev.release = v4l2_device_release;
if (nr != -1 && nr != vdev->num && warn_if_nr_in_use)
- printk(KERN_WARNING "%s: requested %s%d, got %s\n", __func__,
- name_base, nr, video_device_node_name(vdev));
-
- /* Increase v4l2_device refcount */
- if (vdev->v4l2_dev)
- v4l2_device_get(vdev->v4l2_dev);
-
-#if defined(CONFIG_MEDIA_CONTROLLER)
- /* Part 5: Register the entity. */
- if (vdev->v4l2_dev && vdev->v4l2_dev->mdev &&
- vdev->vfl_type != VFL_TYPE_SUBDEV) {
- vdev->entity.type = MEDIA_ENT_T_DEVNODE_V4L;
- vdev->entity.name = vdev->name;
- vdev->entity.info.v4l.major = VIDEO_MAJOR;
- vdev->entity.info.v4l.minor = vdev->minor;
- ret = media_device_register_entity(vdev->v4l2_dev->mdev,
- &vdev->entity);
- if (ret < 0)
- printk(KERN_WARNING
- "%s: media_device_register_entity failed\n",
- __func__);
- }
-#endif
- /* Part 6: Activate this minor. The char device can now be used. */
- set_bit(V4L2_FL_REGISTERED, &vdev->flags);
+ printk(KERN_WARNING "%s: requested %s%d, got %s%d\n",
+ __func__, name_base, nr, name_base, vdev->num);
+
+ /* Part 5: Activate this minor. The char device can now be used. */
mutex_lock(&videodev_lock);
video_device[vdev->minor] = vdev;
mutex_unlock(&videodev_lock);
-
return 0;
cleanup:
@@ -955,7 +570,18 @@ cleanup:
vdev->minor = -1;
return ret;
}
-EXPORT_SYMBOL(__video_register_device);
+
+int video_register_device(struct video_device *vdev, int type, int nr)
+{
+ return __video_register_device(vdev, type, nr, 1);
+}
+EXPORT_SYMBOL(video_register_device);
+
+int video_register_device_no_warn(struct video_device *vdev, int type, int nr)
+{
+ return __video_register_device(vdev, type, nr, 0);
+}
+EXPORT_SYMBOL(video_register_device_no_warn);
/**
* video_unregister_device - unregister a video4linux device
@@ -967,14 +593,11 @@ EXPORT_SYMBOL(__video_register_device);
void video_unregister_device(struct video_device *vdev)
{
/* Check if vdev was ever registered at all */
- if (!vdev || !video_is_registered(vdev))
+ if (!vdev || vdev->minor < 0)
return;
mutex_lock(&videodev_lock);
- /* This must be in a critical section to prevent a race with v4l2_open.
- * Once this bit has been cleared video_get may never be called again.
- */
- clear_bit(V4L2_FL_REGISTERED, &vdev->flags);
+ set_bit(V4L2_FL_UNREGISTERED, &vdev->flags);
mutex_unlock(&videodev_lock);
device_unregister(&vdev->dev);
}
@@ -1014,7 +637,7 @@ static void __exit videodev_exit(void)
unregister_chrdev_region(dev, VIDEO_NUM_DEVICES);
}
-subsys_initcall(videodev_init);
+module_init(videodev_init)
module_exit(videodev_exit)
MODULE_AUTHOR("Alan Cox, Mauro Carvalho Chehab <mchehab@infradead.org>");
diff --git a/drivers/media/v4l2-core/v4l2-device.c b/drivers/media/v4l2-core/v4l2-device.c
index 8ed5da21..b9a1a401 100644
--- a/drivers/media/v4l2-core/v4l2-device.c
+++ b/drivers/media/v4l2-core/v4l2-device.c
@@ -20,15 +20,11 @@
#include <linux/types.h>
#include <linux/ioctl.h>
-#include <linux/module.h>
#include <linux/i2c.h>
-#include <linux/slab.h>
-#if defined(CONFIG_SPI)
-#include <linux/spi/spi.h>
-#endif
+#include <linux/export.h>
+#include <linux/module.h>
#include <linux/videodev2.h>
#include <media/v4l2-device.h>
-#include <media/v4l2-ctrls.h>
int v4l2_device_register(struct device *dev, struct v4l2_device *v4l2_dev)
{
@@ -37,10 +33,6 @@ int v4l2_device_register(struct device *dev, struct v4l2_device *v4l2_dev)
INIT_LIST_HEAD(&v4l2_dev->subdevs);
spin_lock_init(&v4l2_dev->lock);
- mutex_init(&v4l2_dev->ioctl_lock);
- v4l2_prio_init(&v4l2_dev->prio);
- kref_init(&v4l2_dev->ref);
- get_device(dev);
v4l2_dev->dev = dev;
if (dev == NULL) {
/* If dev == NULL, then name must be filled in by the caller */
@@ -52,27 +44,13 @@ int v4l2_device_register(struct device *dev, struct v4l2_device *v4l2_dev)
if (!v4l2_dev->name[0])
snprintf(v4l2_dev->name, sizeof(v4l2_dev->name), "%s %s",
dev->driver->name, dev_name(dev));
- if (!dev_get_drvdata(dev))
- dev_set_drvdata(dev, v4l2_dev);
+ if (dev_get_drvdata(dev))
+ v4l2_warn(v4l2_dev, "Non-NULL drvdata on register\n");
+ dev_set_drvdata(dev, v4l2_dev);
return 0;
}
EXPORT_SYMBOL_GPL(v4l2_device_register);
-static void v4l2_device_release(struct kref *ref)
-{
- struct v4l2_device *v4l2_dev =
- container_of(ref, struct v4l2_device, ref);
-
- if (v4l2_dev->release)
- v4l2_dev->release(v4l2_dev);
-}
-
-int v4l2_device_put(struct v4l2_device *v4l2_dev)
-{
- return kref_put(&v4l2_dev->ref, v4l2_device_release);
-}
-EXPORT_SYMBOL_GPL(v4l2_device_put);
-
int v4l2_device_set_name(struct v4l2_device *v4l2_dev, const char *basename,
atomic_t *instance)
{
@@ -91,13 +69,10 @@ EXPORT_SYMBOL_GPL(v4l2_device_set_name);
void v4l2_device_disconnect(struct v4l2_device *v4l2_dev)
{
- if (v4l2_dev->dev == NULL)
- return;
-
- if (dev_get_drvdata(v4l2_dev->dev) == v4l2_dev)
+ if (v4l2_dev->dev) {
dev_set_drvdata(v4l2_dev->dev, NULL);
- put_device(v4l2_dev->dev);
- v4l2_dev->dev = NULL;
+ v4l2_dev->dev = NULL;
+ }
}
EXPORT_SYMBOL_GPL(v4l2_device_disconnect);
@@ -112,7 +87,7 @@ void v4l2_device_unregister(struct v4l2_device *v4l2_dev)
/* Unregister subdevs */
list_for_each_entry_safe(sd, next, &v4l2_dev->subdevs, list) {
v4l2_device_unregister_subdev(sd);
-#if IS_ENABLED(CONFIG_I2C)
+#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
if (sd->flags & V4L2_SUBDEV_FL_IS_I2C) {
struct i2c_client *client = v4l2_get_subdevdata(sd);
@@ -122,16 +97,6 @@ void v4l2_device_unregister(struct v4l2_device *v4l2_dev)
is a platform bus, then it is never deleted. */
if (client)
i2c_unregister_device(client);
- continue;
- }
-#endif
-#if defined(CONFIG_SPI)
- if (sd->flags & V4L2_SUBDEV_FL_IS_SPI) {
- struct spi_device *spi = v4l2_get_subdevdata(sd);
-
- if (spi)
- spi_unregister_device(spi);
- continue;
}
#endif
}
@@ -139,140 +104,32 @@ void v4l2_device_unregister(struct v4l2_device *v4l2_dev)
EXPORT_SYMBOL_GPL(v4l2_device_unregister);
int v4l2_device_register_subdev(struct v4l2_device *v4l2_dev,
- struct v4l2_subdev *sd)
+ struct v4l2_subdev *sd)
{
-#if defined(CONFIG_MEDIA_CONTROLLER)
- struct media_entity *entity = &sd->entity;
-#endif
- int err;
-
/* Check for valid input */
if (v4l2_dev == NULL || sd == NULL || !sd->name[0])
return -EINVAL;
-
/* Warn if we apparently re-register a subdev */
WARN_ON(sd->v4l2_dev != NULL);
-
if (!try_module_get(sd->owner))
return -ENODEV;
-
sd->v4l2_dev = v4l2_dev;
- if (sd->internal_ops && sd->internal_ops->registered) {
- err = sd->internal_ops->registered(sd);
- if (err)
- goto error_module;
- }
-
- /* This just returns 0 if either of the two args is NULL */
- err = v4l2_ctrl_add_handler(v4l2_dev->ctrl_handler, sd->ctrl_handler, NULL);
- if (err)
- goto error_unregister;
-
-#if defined(CONFIG_MEDIA_CONTROLLER)
- /* Register the entity. */
- if (v4l2_dev->mdev) {
- err = media_device_register_entity(v4l2_dev->mdev, entity);
- if (err < 0)
- goto error_unregister;
- }
-#endif
-
spin_lock(&v4l2_dev->lock);
list_add_tail(&sd->list, &v4l2_dev->subdevs);
spin_unlock(&v4l2_dev->lock);
-
return 0;
-
-error_unregister:
- if (sd->internal_ops && sd->internal_ops->unregistered)
- sd->internal_ops->unregistered(sd);
-error_module:
- module_put(sd->owner);
- sd->v4l2_dev = NULL;
- return err;
}
EXPORT_SYMBOL_GPL(v4l2_device_register_subdev);
-static void v4l2_device_release_subdev_node(struct video_device *vdev)
-{
- struct v4l2_subdev *sd = video_get_drvdata(vdev);
- sd->devnode = NULL;
- kfree(vdev);
-}
-
-int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev)
-{
- struct video_device *vdev;
- struct v4l2_subdev *sd;
- int err;
-
- /* Register a device node for every subdev marked with the
- * V4L2_SUBDEV_FL_HAS_DEVNODE flag.
- */
- list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
- if (!(sd->flags & V4L2_SUBDEV_FL_HAS_DEVNODE))
- continue;
-
- vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
- if (!vdev) {
- err = -ENOMEM;
- goto clean_up;
- }
-
- video_set_drvdata(vdev, sd);
- strlcpy(vdev->name, sd->name, sizeof(vdev->name));
- vdev->v4l2_dev = v4l2_dev;
- vdev->fops = &v4l2_subdev_fops;
- vdev->release = v4l2_device_release_subdev_node;
- vdev->ctrl_handler = sd->ctrl_handler;
- err = __video_register_device(vdev, VFL_TYPE_SUBDEV, -1, 1,
- sd->owner);
- if (err < 0) {
- kfree(vdev);
- goto clean_up;
- }
-#if defined(CONFIG_MEDIA_CONTROLLER)
- sd->entity.info.v4l.major = VIDEO_MAJOR;
- sd->entity.info.v4l.minor = vdev->minor;
-#endif
- sd->devnode = vdev;
- }
- return 0;
-
-clean_up:
- list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
- if (!sd->devnode)
- break;
- video_unregister_device(sd->devnode);
- }
-
- return err;
-}
-EXPORT_SYMBOL_GPL(v4l2_device_register_subdev_nodes);
-
void v4l2_device_unregister_subdev(struct v4l2_subdev *sd)
{
- struct v4l2_device *v4l2_dev;
-
/* return if it isn't registered */
if (sd == NULL || sd->v4l2_dev == NULL)
return;
-
- v4l2_dev = sd->v4l2_dev;
-
- spin_lock(&v4l2_dev->lock);
+ spin_lock(&sd->v4l2_dev->lock);
list_del(&sd->list);
- spin_unlock(&v4l2_dev->lock);
-
- if (sd->internal_ops && sd->internal_ops->unregistered)
- sd->internal_ops->unregistered(sd);
+ spin_unlock(&sd->v4l2_dev->lock);
sd->v4l2_dev = NULL;
-
-#if defined(CONFIG_MEDIA_CONTROLLER)
- if (v4l2_dev->mdev)
- media_device_unregister_entity(&sd->entity);
-#endif
- video_unregister_device(sd->devnode);
module_put(sd->owner);
}
EXPORT_SYMBOL_GPL(v4l2_device_unregister_subdev);
diff --git a/drivers/media/v4l2-core/v4l2-event.c b/drivers/media/v4l2-core/v4l2-event.c
deleted file mode 100644
index 86dcb548..00000000
--- a/drivers/media/v4l2-core/v4l2-event.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * v4l2-event.c
- *
- * V4L2 events.
- *
- * Copyright (C) 2009--2010 Nokia Corporation.
- *
- * Contact: Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- */
-
-#include <media/v4l2-dev.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-event.h>
-
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/export.h>
-
-static unsigned sev_pos(const struct v4l2_subscribed_event *sev, unsigned idx)
-{
- idx += sev->first;
- return idx >= sev->elems ? idx - sev->elems : idx;
-}
-
-static int __v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event)
-{
- struct v4l2_kevent *kev;
- unsigned long flags;
-
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
-
- if (list_empty(&fh->available)) {
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
- return -ENOENT;
- }
-
- WARN_ON(fh->navailable == 0);
-
- kev = list_first_entry(&fh->available, struct v4l2_kevent, list);
- list_del(&kev->list);
- fh->navailable--;
-
- kev->event.pending = fh->navailable;
- *event = kev->event;
- kev->sev->first = sev_pos(kev->sev, 1);
- kev->sev->in_use--;
-
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
-
- return 0;
-}
-
-int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event,
- int nonblocking)
-{
- int ret;
-
- if (nonblocking)
- return __v4l2_event_dequeue(fh, event);
-
- /* Release the vdev lock while waiting */
- if (fh->vdev->lock)
- mutex_unlock(fh->vdev->lock);
-
- do {
- ret = wait_event_interruptible(fh->wait,
- fh->navailable != 0);
- if (ret < 0)
- break;
-
- ret = __v4l2_event_dequeue(fh, event);
- } while (ret == -ENOENT);
-
- if (fh->vdev->lock)
- mutex_lock(fh->vdev->lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(v4l2_event_dequeue);
-
-/* Caller must hold fh->vdev->fh_lock! */
-static struct v4l2_subscribed_event *v4l2_event_subscribed(
- struct v4l2_fh *fh, u32 type, u32 id)
-{
- struct v4l2_subscribed_event *sev;
-
- assert_spin_locked(&fh->vdev->fh_lock);
-
- list_for_each_entry(sev, &fh->subscribed, list)
- if (sev->type == type && sev->id == id)
- return sev;
-
- return NULL;
-}
-
-static void __v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev,
- const struct timespec *ts)
-{
- struct v4l2_subscribed_event *sev;
- struct v4l2_kevent *kev;
- bool copy_payload = true;
-
- /* Are we subscribed? */
- sev = v4l2_event_subscribed(fh, ev->type, ev->id);
- if (sev == NULL)
- return;
-
- /*
- * If the event has been added to the fh->subscribed list, but its
- * add op has not completed yet elems will be 0, treat this as
- * not being subscribed.
- */
- if (!sev->elems)
- return;
-
- /* Increase event sequence number on fh. */
- fh->sequence++;
-
- /* Do we have any free events? */
- if (sev->in_use == sev->elems) {
- /* no, remove the oldest one */
- kev = sev->events + sev_pos(sev, 0);
- list_del(&kev->list);
- sev->in_use--;
- sev->first = sev_pos(sev, 1);
- fh->navailable--;
- if (sev->elems == 1) {
- if (sev->ops && sev->ops->replace) {
- sev->ops->replace(&kev->event, ev);
- copy_payload = false;
- }
- } else if (sev->ops && sev->ops->merge) {
- struct v4l2_kevent *second_oldest =
- sev->events + sev_pos(sev, 0);
- sev->ops->merge(&kev->event, &second_oldest->event);
- }
- }
-
- /* Take one and fill it. */
- kev = sev->events + sev_pos(sev, sev->in_use);
- kev->event.type = ev->type;
- if (copy_payload)
- kev->event.u = ev->u;
- kev->event.id = ev->id;
- kev->event.timestamp = *ts;
- kev->event.sequence = fh->sequence;
- sev->in_use++;
- list_add_tail(&kev->list, &fh->available);
-
- fh->navailable++;
-
- wake_up_all(&fh->wait);
-}
-
-void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev)
-{
- struct v4l2_fh *fh;
- unsigned long flags;
- struct timespec timestamp;
-
- ktime_get_ts(&timestamp);
-
- spin_lock_irqsave(&vdev->fh_lock, flags);
-
- list_for_each_entry(fh, &vdev->fh_list, list)
- __v4l2_event_queue_fh(fh, ev, &timestamp);
-
- spin_unlock_irqrestore(&vdev->fh_lock, flags);
-}
-EXPORT_SYMBOL_GPL(v4l2_event_queue);
-
-void v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev)
-{
- unsigned long flags;
- struct timespec timestamp;
-
- ktime_get_ts(&timestamp);
-
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
- __v4l2_event_queue_fh(fh, ev, &timestamp);
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
-}
-EXPORT_SYMBOL_GPL(v4l2_event_queue_fh);
-
-int v4l2_event_pending(struct v4l2_fh *fh)
-{
- return fh->navailable;
-}
-EXPORT_SYMBOL_GPL(v4l2_event_pending);
-
-int v4l2_event_subscribe(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub, unsigned elems,
- const struct v4l2_subscribed_event_ops *ops)
-{
- struct v4l2_subscribed_event *sev, *found_ev;
- unsigned long flags;
- unsigned i;
-
- if (sub->type == V4L2_EVENT_ALL)
- return -EINVAL;
-
- if (elems < 1)
- elems = 1;
-
- sev = kzalloc(sizeof(*sev) + sizeof(struct v4l2_kevent) * elems, GFP_KERNEL);
- if (!sev)
- return -ENOMEM;
- for (i = 0; i < elems; i++)
- sev->events[i].sev = sev;
- sev->type = sub->type;
- sev->id = sub->id;
- sev->flags = sub->flags;
- sev->fh = fh;
- sev->ops = ops;
-
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
- found_ev = v4l2_event_subscribed(fh, sub->type, sub->id);
- if (!found_ev)
- list_add(&sev->list, &fh->subscribed);
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
-
- if (found_ev) {
- kfree(sev);
- return 0; /* Already listening */
- }
-
- if (sev->ops && sev->ops->add) {
- int ret = sev->ops->add(sev, elems);
- if (ret) {
- sev->ops = NULL;
- v4l2_event_unsubscribe(fh, sub);
- return ret;
- }
- }
-
- /* Mark as ready for use */
- sev->elems = elems;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(v4l2_event_subscribe);
-
-void v4l2_event_unsubscribe_all(struct v4l2_fh *fh)
-{
- struct v4l2_event_subscription sub;
- struct v4l2_subscribed_event *sev;
- unsigned long flags;
-
- do {
- sev = NULL;
-
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
- if (!list_empty(&fh->subscribed)) {
- sev = list_first_entry(&fh->subscribed,
- struct v4l2_subscribed_event, list);
- sub.type = sev->type;
- sub.id = sev->id;
- }
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
- if (sev)
- v4l2_event_unsubscribe(fh, &sub);
- } while (sev);
-}
-EXPORT_SYMBOL_GPL(v4l2_event_unsubscribe_all);
-
-int v4l2_event_unsubscribe(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub)
-{
- struct v4l2_subscribed_event *sev;
- unsigned long flags;
- int i;
-
- if (sub->type == V4L2_EVENT_ALL) {
- v4l2_event_unsubscribe_all(fh);
- return 0;
- }
-
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
-
- sev = v4l2_event_subscribed(fh, sub->type, sub->id);
- if (sev != NULL) {
- /* Remove any pending events for this subscription */
- for (i = 0; i < sev->in_use; i++) {
- list_del(&sev->events[sev_pos(sev, i)].list);
- fh->navailable--;
- }
- list_del(&sev->list);
- }
-
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
-
- if (sev && sev->ops && sev->ops->del)
- sev->ops->del(sev);
-
- kfree(sev);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(v4l2_event_unsubscribe);
-
-int v4l2_event_subdev_unsubscribe(struct v4l2_subdev *sd, struct v4l2_fh *fh,
- struct v4l2_event_subscription *sub)
-{
- return v4l2_event_unsubscribe(fh, sub);
-}
-EXPORT_SYMBOL_GPL(v4l2_event_subdev_unsubscribe);
diff --git a/drivers/media/v4l2-core/v4l2-fh.c b/drivers/media/v4l2-core/v4l2-fh.c
deleted file mode 100644
index e57c002b..00000000
--- a/drivers/media/v4l2-core/v4l2-fh.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * v4l2-fh.c
- *
- * V4L2 file handles.
- *
- * Copyright (C) 2009--2010 Nokia Corporation.
- *
- * Contact: Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- */
-
-#include <linux/bitops.h>
-#include <linux/slab.h>
-#include <linux/export.h>
-#include <media/v4l2-dev.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-event.h>
-#include <media/v4l2-ioctl.h>
-
-void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev)
-{
- fh->vdev = vdev;
- /* Inherit from video_device. May be overridden by the driver. */
- fh->ctrl_handler = vdev->ctrl_handler;
- INIT_LIST_HEAD(&fh->list);
- set_bit(V4L2_FL_USES_V4L2_FH, &fh->vdev->flags);
- fh->prio = V4L2_PRIORITY_UNSET;
- init_waitqueue_head(&fh->wait);
- INIT_LIST_HEAD(&fh->available);
- INIT_LIST_HEAD(&fh->subscribed);
- fh->sequence = -1;
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_init);
-
-void v4l2_fh_add(struct v4l2_fh *fh)
-{
- unsigned long flags;
-
- if (test_bit(V4L2_FL_USE_FH_PRIO, &fh->vdev->flags))
- v4l2_prio_open(fh->vdev->prio, &fh->prio);
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
- list_add(&fh->list, &fh->vdev->fh_list);
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_add);
-
-int v4l2_fh_open(struct file *filp)
-{
- struct video_device *vdev = video_devdata(filp);
- struct v4l2_fh *fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-
- filp->private_data = fh;
- if (fh == NULL)
- return -ENOMEM;
- v4l2_fh_init(fh, vdev);
- v4l2_fh_add(fh);
- return 0;
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_open);
-
-void v4l2_fh_del(struct v4l2_fh *fh)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
- list_del_init(&fh->list);
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
- if (test_bit(V4L2_FL_USE_FH_PRIO, &fh->vdev->flags))
- v4l2_prio_close(fh->vdev->prio, fh->prio);
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_del);
-
-void v4l2_fh_exit(struct v4l2_fh *fh)
-{
- if (fh->vdev == NULL)
- return;
- v4l2_event_unsubscribe_all(fh);
- fh->vdev = NULL;
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_exit);
-
-int v4l2_fh_release(struct file *filp)
-{
- struct v4l2_fh *fh = filp->private_data;
-
- if (fh) {
- v4l2_fh_del(fh);
- v4l2_fh_exit(fh);
- kfree(fh);
- }
- return 0;
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_release);
-
-int v4l2_fh_is_singular(struct v4l2_fh *fh)
-{
- unsigned long flags;
- int is_singular;
-
- if (fh == NULL || fh->vdev == NULL)
- return 0;
- spin_lock_irqsave(&fh->vdev->fh_lock, flags);
- is_singular = list_is_singular(&fh->list);
- spin_unlock_irqrestore(&fh->vdev->fh_lock, flags);
- return is_singular;
-}
-EXPORT_SYMBOL_GPL(v4l2_fh_is_singular);
diff --git a/drivers/media/v4l2-core/v4l2-int-device.c b/drivers/media/v4l2-core/v4l2-int-device.c
index f4473494..a935bae5 100644
--- a/drivers/media/v4l2-core/v4l2-int-device.c
+++ b/drivers/media/v4l2-core/v4l2-int-device.c
@@ -26,7 +26,6 @@
#include <linux/list.h>
#include <linux/sort.h>
#include <linux/string.h>
-#include <linux/module.h>
#include <media/v4l2-int-device.h>
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index aa6e7c78..eb38c9f0 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -13,23 +13,43 @@
*/
#include <linux/module.h>
-#include <linux/slab.h>
#include <linux/types.h>
#include <linux/kernel.h>
-#include <linux/version.h>
+#define __OLD_VIDIOC_ /* To allow fixing old calls */
+#include <linux/videodev.h>
#include <linux/videodev2.h>
+#include <linux/slab.h>
+#ifdef CONFIG_VIDEO_V4L1
+#include <linux/videodev.h>
+#endif
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
-#include <media/v4l2-ctrls.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-event.h>
-#include <media/v4l2-device.h>
#include <media/v4l2-chip-ident.h>
-#include <media/videobuf2-core.h>
-/* Zero out the end of the struct pointed to by p. Everything after, but
+#define dbgarg(cmd, fmt, arg...) \
+ do { \
+ if (vfd->debug & V4L2_DEBUG_IOCTL_ARG) { \
+ printk(KERN_DEBUG "%s: ", vfd->name); \
+ v4l_printk_ioctl(cmd); \
+ printk(" " fmt, ## arg); \
+ } \
+ } while (0)
+
+#define dbgarg2(fmt, arg...) \
+ do { \
+ if (vfd->debug & V4L2_DEBUG_IOCTL_ARG) \
+ printk(KERN_DEBUG "%s: " fmt, vfd->name, ## arg);\
+ } while (0)
+
+#define dbgarg3(fmt, arg...) \
+ do { \
+ if (vfd->debug & V4L2_DEBUG_IOCTL_ARG) \
+ printk(KERN_CONT "%s: " fmt, vfd->name, ## arg);\
+ } while (0)
+
+/* Zero out the end of the struct pointed to by p. Everthing after, but
* not including, the specified field is cleared. */
#define CLEAR_AFTER_FIELD(p, field) \
memset((u8 *)(p) + offsetof(typeof(*(p)), field) + sizeof((p)->field), \
@@ -146,8 +166,6 @@ const char *v4l2_type_names[] = {
[V4L2_BUF_TYPE_SLICED_VBI_CAPTURE] = "sliced-vbi-cap",
[V4L2_BUF_TYPE_SLICED_VBI_OUTPUT] = "sliced-vbi-out",
[V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY] = "vid-out-overlay",
- [V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE] = "vid-cap-mplane",
- [V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE] = "vid-out-mplane",
};
EXPORT_SYMBOL(v4l2_type_names);
@@ -155,2120 +173,1703 @@ static const char *v4l2_memory_names[] = {
[V4L2_MEMORY_MMAP] = "mmap",
[V4L2_MEMORY_USERPTR] = "userptr",
[V4L2_MEMORY_OVERLAY] = "overlay",
- [V4L2_MEMORY_DMABUF] = "dmabuf",
};
-#define prt_names(a, arr) (((unsigned)(a)) < ARRAY_SIZE(arr) ? arr[a] : "unknown")
+#define prt_names(a, arr) ((((a) >= 0) && ((a) < ARRAY_SIZE(arr))) ? \
+ arr[a] : "unknown")
/* ------------------------------------------------------------------ */
/* debug help functions */
-static void v4l_print_querycap(const void *arg, bool write_only)
-{
- const struct v4l2_capability *p = arg;
-
- pr_cont("driver=%s, card=%s, bus=%s, version=0x%08x, "
- "capabilities=0x%08x, device_caps=0x%08x\n",
- p->driver, p->card, p->bus_info,
- p->version, p->capabilities, p->device_caps);
-}
-
-static void v4l_print_enuminput(const void *arg, bool write_only)
-{
- const struct v4l2_input *p = arg;
-
- pr_cont("index=%u, name=%s, type=%u, audioset=0x%x, tuner=%u, "
- "std=0x%08Lx, status=0x%x, capabilities=0x%x\n",
- p->index, p->name, p->type, p->audioset, p->tuner,
- (unsigned long long)p->std, p->status, p->capabilities);
-}
-
-static void v4l_print_enumoutput(const void *arg, bool write_only)
-{
- const struct v4l2_output *p = arg;
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+static const char *v4l1_ioctls[] = {
+ [_IOC_NR(VIDIOCGCAP)] = "VIDIOCGCAP",
+ [_IOC_NR(VIDIOCGCHAN)] = "VIDIOCGCHAN",
+ [_IOC_NR(VIDIOCSCHAN)] = "VIDIOCSCHAN",
+ [_IOC_NR(VIDIOCGTUNER)] = "VIDIOCGTUNER",
+ [_IOC_NR(VIDIOCSTUNER)] = "VIDIOCSTUNER",
+ [_IOC_NR(VIDIOCGPICT)] = "VIDIOCGPICT",
+ [_IOC_NR(VIDIOCSPICT)] = "VIDIOCSPICT",
+ [_IOC_NR(VIDIOCCAPTURE)] = "VIDIOCCAPTURE",
+ [_IOC_NR(VIDIOCGWIN)] = "VIDIOCGWIN",
+ [_IOC_NR(VIDIOCSWIN)] = "VIDIOCSWIN",
+ [_IOC_NR(VIDIOCGFBUF)] = "VIDIOCGFBUF",
+ [_IOC_NR(VIDIOCSFBUF)] = "VIDIOCSFBUF",
+ [_IOC_NR(VIDIOCKEY)] = "VIDIOCKEY",
+ [_IOC_NR(VIDIOCGFREQ)] = "VIDIOCGFREQ",
+ [_IOC_NR(VIDIOCSFREQ)] = "VIDIOCSFREQ",
+ [_IOC_NR(VIDIOCGAUDIO)] = "VIDIOCGAUDIO",
+ [_IOC_NR(VIDIOCSAUDIO)] = "VIDIOCSAUDIO",
+ [_IOC_NR(VIDIOCSYNC)] = "VIDIOCSYNC",
+ [_IOC_NR(VIDIOCMCAPTURE)] = "VIDIOCMCAPTURE",
+ [_IOC_NR(VIDIOCGMBUF)] = "VIDIOCGMBUF",
+ [_IOC_NR(VIDIOCGUNIT)] = "VIDIOCGUNIT",
+ [_IOC_NR(VIDIOCGCAPTURE)] = "VIDIOCGCAPTURE",
+ [_IOC_NR(VIDIOCSCAPTURE)] = "VIDIOCSCAPTURE",
+ [_IOC_NR(VIDIOCSPLAYMODE)] = "VIDIOCSPLAYMODE",
+ [_IOC_NR(VIDIOCSWRITEMODE)] = "VIDIOCSWRITEMODE",
+ [_IOC_NR(VIDIOCGPLAYINFO)] = "VIDIOCGPLAYINFO",
+ [_IOC_NR(VIDIOCSMICROCODE)] = "VIDIOCSMICROCODE",
+ [_IOC_NR(VIDIOCGVBIFMT)] = "VIDIOCGVBIFMT",
+ [_IOC_NR(VIDIOCSVBIFMT)] = "VIDIOCSVBIFMT"
+};
+#define V4L1_IOCTLS ARRAY_SIZE(v4l1_ioctls)
+#endif
- pr_cont("index=%u, name=%s, type=%u, audioset=0x%x, "
- "modulator=%u, std=0x%08Lx, capabilities=0x%x\n",
- p->index, p->name, p->type, p->audioset, p->modulator,
- (unsigned long long)p->std, p->capabilities);
-}
+static const char *v4l2_ioctls[] = {
+ [_IOC_NR(VIDIOC_QUERYCAP)] = "VIDIOC_QUERYCAP",
+ [_IOC_NR(VIDIOC_RESERVED)] = "VIDIOC_RESERVED",
+ [_IOC_NR(VIDIOC_ENUM_FMT)] = "VIDIOC_ENUM_FMT",
+ [_IOC_NR(VIDIOC_G_FMT)] = "VIDIOC_G_FMT",
+ [_IOC_NR(VIDIOC_S_FMT)] = "VIDIOC_S_FMT",
+ [_IOC_NR(VIDIOC_REQBUFS)] = "VIDIOC_REQBUFS",
+ [_IOC_NR(VIDIOC_QUERYBUF)] = "VIDIOC_QUERYBUF",
+ [_IOC_NR(VIDIOC_G_FBUF)] = "VIDIOC_G_FBUF",
+ [_IOC_NR(VIDIOC_S_FBUF)] = "VIDIOC_S_FBUF",
+ [_IOC_NR(VIDIOC_OVERLAY)] = "VIDIOC_OVERLAY",
+ [_IOC_NR(VIDIOC_QBUF)] = "VIDIOC_QBUF",
+ [_IOC_NR(VIDIOC_DQBUF)] = "VIDIOC_DQBUF",
+ [_IOC_NR(VIDIOC_STREAMON)] = "VIDIOC_STREAMON",
+ [_IOC_NR(VIDIOC_STREAMOFF)] = "VIDIOC_STREAMOFF",
+ [_IOC_NR(VIDIOC_G_PARM)] = "VIDIOC_G_PARM",
+ [_IOC_NR(VIDIOC_S_PARM)] = "VIDIOC_S_PARM",
+ [_IOC_NR(VIDIOC_G_STD)] = "VIDIOC_G_STD",
+ [_IOC_NR(VIDIOC_S_STD)] = "VIDIOC_S_STD",
+ [_IOC_NR(VIDIOC_ENUMSTD)] = "VIDIOC_ENUMSTD",
+ [_IOC_NR(VIDIOC_ENUMINPUT)] = "VIDIOC_ENUMINPUT",
+ [_IOC_NR(VIDIOC_G_CTRL)] = "VIDIOC_G_CTRL",
+ [_IOC_NR(VIDIOC_S_CTRL)] = "VIDIOC_S_CTRL",
+ [_IOC_NR(VIDIOC_G_TUNER)] = "VIDIOC_G_TUNER",
+ [_IOC_NR(VIDIOC_S_TUNER)] = "VIDIOC_S_TUNER",
+ [_IOC_NR(VIDIOC_G_AUDIO)] = "VIDIOC_G_AUDIO",
+ [_IOC_NR(VIDIOC_S_AUDIO)] = "VIDIOC_S_AUDIO",
+ [_IOC_NR(VIDIOC_QUERYCTRL)] = "VIDIOC_QUERYCTRL",
+ [_IOC_NR(VIDIOC_QUERYMENU)] = "VIDIOC_QUERYMENU",
+ [_IOC_NR(VIDIOC_G_INPUT)] = "VIDIOC_G_INPUT",
+ [_IOC_NR(VIDIOC_S_INPUT)] = "VIDIOC_S_INPUT",
+ [_IOC_NR(VIDIOC_G_OUTPUT)] = "VIDIOC_G_OUTPUT",
+ [_IOC_NR(VIDIOC_S_OUTPUT)] = "VIDIOC_S_OUTPUT",
+ [_IOC_NR(VIDIOC_ENUMOUTPUT)] = "VIDIOC_ENUMOUTPUT",
+ [_IOC_NR(VIDIOC_G_AUDOUT)] = "VIDIOC_G_AUDOUT",
+ [_IOC_NR(VIDIOC_S_AUDOUT)] = "VIDIOC_S_AUDOUT",
+ [_IOC_NR(VIDIOC_G_MODULATOR)] = "VIDIOC_G_MODULATOR",
+ [_IOC_NR(VIDIOC_S_MODULATOR)] = "VIDIOC_S_MODULATOR",
+ [_IOC_NR(VIDIOC_G_FREQUENCY)] = "VIDIOC_G_FREQUENCY",
+ [_IOC_NR(VIDIOC_S_FREQUENCY)] = "VIDIOC_S_FREQUENCY",
+ [_IOC_NR(VIDIOC_CROPCAP)] = "VIDIOC_CROPCAP",
+ [_IOC_NR(VIDIOC_G_CROP)] = "VIDIOC_G_CROP",
+ [_IOC_NR(VIDIOC_S_CROP)] = "VIDIOC_S_CROP",
+ [_IOC_NR(VIDIOC_G_JPEGCOMP)] = "VIDIOC_G_JPEGCOMP",
+ [_IOC_NR(VIDIOC_S_JPEGCOMP)] = "VIDIOC_S_JPEGCOMP",
+ [_IOC_NR(VIDIOC_QUERYSTD)] = "VIDIOC_QUERYSTD",
+ [_IOC_NR(VIDIOC_TRY_FMT)] = "VIDIOC_TRY_FMT",
+ [_IOC_NR(VIDIOC_ENUMAUDIO)] = "VIDIOC_ENUMAUDIO",
+ [_IOC_NR(VIDIOC_ENUMAUDOUT)] = "VIDIOC_ENUMAUDOUT",
+ [_IOC_NR(VIDIOC_G_PRIORITY)] = "VIDIOC_G_PRIORITY",
+ [_IOC_NR(VIDIOC_S_PRIORITY)] = "VIDIOC_S_PRIORITY",
+ [_IOC_NR(VIDIOC_G_SLICED_VBI_CAP)] = "VIDIOC_G_SLICED_VBI_CAP",
+ [_IOC_NR(VIDIOC_LOG_STATUS)] = "VIDIOC_LOG_STATUS",
+ [_IOC_NR(VIDIOC_G_EXT_CTRLS)] = "VIDIOC_G_EXT_CTRLS",
+ [_IOC_NR(VIDIOC_S_EXT_CTRLS)] = "VIDIOC_S_EXT_CTRLS",
+ [_IOC_NR(VIDIOC_TRY_EXT_CTRLS)] = "VIDIOC_TRY_EXT_CTRLS",
+#if 1
+ [_IOC_NR(VIDIOC_ENUM_FRAMESIZES)] = "VIDIOC_ENUM_FRAMESIZES",
+ [_IOC_NR(VIDIOC_ENUM_FRAMEINTERVALS)] = "VIDIOC_ENUM_FRAMEINTERVALS",
+ [_IOC_NR(VIDIOC_G_ENC_INDEX)] = "VIDIOC_G_ENC_INDEX",
+ [_IOC_NR(VIDIOC_ENCODER_CMD)] = "VIDIOC_ENCODER_CMD",
+ [_IOC_NR(VIDIOC_TRY_ENCODER_CMD)] = "VIDIOC_TRY_ENCODER_CMD",
+
+ [_IOC_NR(VIDIOC_DBG_S_REGISTER)] = "VIDIOC_DBG_S_REGISTER",
+ [_IOC_NR(VIDIOC_DBG_G_REGISTER)] = "VIDIOC_DBG_G_REGISTER",
+
+ [_IOC_NR(VIDIOC_DBG_G_CHIP_IDENT)] = "VIDIOC_DBG_G_CHIP_IDENT",
+ [_IOC_NR(VIDIOC_S_HW_FREQ_SEEK)] = "VIDIOC_S_HW_FREQ_SEEK",
+#endif
+};
+#define V4L2_IOCTLS ARRAY_SIZE(v4l2_ioctls)
-static void v4l_print_audio(const void *arg, bool write_only)
+/* Common ioctl debug function. This function can be used by
+ external ioctl messages as well as internal V4L ioctl */
+void v4l_printk_ioctl(unsigned int cmd)
{
- const struct v4l2_audio *p = arg;
+ char *dir, *type;
- if (write_only)
- pr_cont("index=%u, mode=0x%x\n", p->index, p->mode);
- else
- pr_cont("index=%u, name=%s, capability=0x%x, mode=0x%x\n",
- p->index, p->name, p->capability, p->mode);
-}
-
-static void v4l_print_audioout(const void *arg, bool write_only)
-{
- const struct v4l2_audioout *p = arg;
+ switch (_IOC_TYPE(cmd)) {
+ case 'd':
+ type = "v4l2_int";
+ break;
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ case 'v':
+ if (_IOC_NR(cmd) >= V4L1_IOCTLS) {
+ type = "v4l1";
+ break;
+ }
+ printk("%s", v4l1_ioctls[_IOC_NR(cmd)]);
+ return;
+#endif
+ case 'V':
+ if (_IOC_NR(cmd) >= V4L2_IOCTLS) {
+ type = "v4l2";
+ break;
+ }
+ printk("%s", v4l2_ioctls[_IOC_NR(cmd)]);
+ return;
+ default:
+ type = "unknown";
+ }
- if (write_only)
- pr_cont("index=%u\n", p->index);
- else
- pr_cont("index=%u, name=%s, capability=0x%x, mode=0x%x\n",
- p->index, p->name, p->capability, p->mode);
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_NONE: dir = "--"; break;
+ case _IOC_READ: dir = "r-"; break;
+ case _IOC_WRITE: dir = "-w"; break;
+ case _IOC_READ | _IOC_WRITE: dir = "rw"; break;
+ default: dir = "*ERR*"; break;
+ }
+ printk("%s ioctl '%c', dir=%s, #%d (0x%08x)",
+ type, _IOC_TYPE(cmd), dir, _IOC_NR(cmd), cmd);
}
+EXPORT_SYMBOL(v4l_printk_ioctl);
-static void v4l_print_fmtdesc(const void *arg, bool write_only)
-{
- const struct v4l2_fmtdesc *p = arg;
-
- pr_cont("index=%u, type=%s, flags=0x%x, pixelformat=%c%c%c%c, description='%s'\n",
- p->index, prt_names(p->type, v4l2_type_names),
- p->flags, (p->pixelformat & 0xff),
- (p->pixelformat >> 8) & 0xff,
- (p->pixelformat >> 16) & 0xff,
- (p->pixelformat >> 24) & 0xff,
- p->description);
-}
+/*
+ * helper function -- handles userspace copying for ioctl arguments
+ */
-static void v4l_print_format(const void *arg, bool write_only)
+#ifdef __OLD_VIDIOC_
+static unsigned int
+video_fix_command(unsigned int cmd)
{
- const struct v4l2_format *p = arg;
- const struct v4l2_pix_format *pix;
- const struct v4l2_pix_format_mplane *mp;
- const struct v4l2_vbi_format *vbi;
- const struct v4l2_sliced_vbi_format *sliced;
- const struct v4l2_window *win;
- const struct v4l2_clip *clip;
- unsigned i;
-
- pr_cont("type=%s", prt_names(p->type, v4l2_type_names));
- switch (p->type) {
- case V4L2_BUF_TYPE_VIDEO_CAPTURE:
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- pix = &p->fmt.pix;
- pr_cont(", width=%u, height=%u, "
- "pixelformat=%c%c%c%c, field=%s, "
- "bytesperline=%u sizeimage=%u, colorspace=%d\n",
- pix->width, pix->height,
- (pix->pixelformat & 0xff),
- (pix->pixelformat >> 8) & 0xff,
- (pix->pixelformat >> 16) & 0xff,
- (pix->pixelformat >> 24) & 0xff,
- prt_names(pix->field, v4l2_field_names),
- pix->bytesperline, pix->sizeimage,
- pix->colorspace);
- break;
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- mp = &p->fmt.pix_mp;
- pr_cont(", width=%u, height=%u, "
- "format=%c%c%c%c, field=%s, "
- "colorspace=%d, num_planes=%u\n",
- mp->width, mp->height,
- (mp->pixelformat & 0xff),
- (mp->pixelformat >> 8) & 0xff,
- (mp->pixelformat >> 16) & 0xff,
- (mp->pixelformat >> 24) & 0xff,
- prt_names(mp->field, v4l2_field_names),
- mp->colorspace, mp->num_planes);
- for (i = 0; i < mp->num_planes; i++)
- printk(KERN_DEBUG "plane %u: bytesperline=%u sizeimage=%u\n", i,
- mp->plane_fmt[i].bytesperline,
- mp->plane_fmt[i].sizeimage);
+ switch (cmd) {
+ case VIDIOC_OVERLAY_OLD:
+ cmd = VIDIOC_OVERLAY;
break;
- case V4L2_BUF_TYPE_VIDEO_OVERLAY:
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
- win = &p->fmt.win;
- pr_cont(", wxh=%dx%d, x,y=%d,%d, field=%s, "
- "chromakey=0x%08x, bitmap=%p, "
- "global_alpha=0x%02x\n",
- win->w.width, win->w.height,
- win->w.left, win->w.top,
- prt_names(win->field, v4l2_field_names),
- win->chromakey, win->bitmap, win->global_alpha);
- clip = win->clips;
- for (i = 0; i < win->clipcount; i++) {
- printk(KERN_DEBUG "clip %u: wxh=%dx%d, x,y=%d,%d\n",
- i, clip->c.width, clip->c.height,
- clip->c.left, clip->c.top);
- clip = clip->next;
- }
+ case VIDIOC_S_PARM_OLD:
+ cmd = VIDIOC_S_PARM;
break;
- case V4L2_BUF_TYPE_VBI_CAPTURE:
- case V4L2_BUF_TYPE_VBI_OUTPUT:
- vbi = &p->fmt.vbi;
- pr_cont(", sampling_rate=%u, offset=%u, samples_per_line=%u, "
- "sample_format=%c%c%c%c, start=%u,%u, count=%u,%u\n",
- vbi->sampling_rate, vbi->offset,
- vbi->samples_per_line,
- (vbi->sample_format & 0xff),
- (vbi->sample_format >> 8) & 0xff,
- (vbi->sample_format >> 16) & 0xff,
- (vbi->sample_format >> 24) & 0xff,
- vbi->start[0], vbi->start[1],
- vbi->count[0], vbi->count[1]);
+ case VIDIOC_S_CTRL_OLD:
+ cmd = VIDIOC_S_CTRL;
break;
- case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
- case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
- sliced = &p->fmt.sliced;
- pr_cont(", service_set=0x%08x, io_size=%d\n",
- sliced->service_set, sliced->io_size);
- for (i = 0; i < 24; i++)
- printk(KERN_DEBUG "line[%02u]=0x%04x, 0x%04x\n", i,
- sliced->service_lines[0][i],
- sliced->service_lines[1][i]);
+ case VIDIOC_G_AUDIO_OLD:
+ cmd = VIDIOC_G_AUDIO;
+ break;
+ case VIDIOC_G_AUDOUT_OLD:
+ cmd = VIDIOC_G_AUDOUT;
+ break;
+ case VIDIOC_CROPCAP_OLD:
+ cmd = VIDIOC_CROPCAP;
break;
}
+ return cmd;
}
+#endif
-static void v4l_print_framebuffer(const void *arg, bool write_only)
-{
- const struct v4l2_framebuffer *p = arg;
-
- pr_cont("capability=0x%x, flags=0x%x, base=0x%p, width=%u, "
- "height=%u, pixelformat=%c%c%c%c, "
- "bytesperline=%u sizeimage=%u, colorspace=%d\n",
- p->capability, p->flags, p->base,
- p->fmt.width, p->fmt.height,
- (p->fmt.pixelformat & 0xff),
- (p->fmt.pixelformat >> 8) & 0xff,
- (p->fmt.pixelformat >> 16) & 0xff,
- (p->fmt.pixelformat >> 24) & 0xff,
- p->fmt.bytesperline, p->fmt.sizeimage,
- p->fmt.colorspace);
-}
-
-static void v4l_print_buftype(const void *arg, bool write_only)
-{
- pr_cont("type=%s\n", prt_names(*(u32 *)arg, v4l2_type_names));
-}
-
-static void v4l_print_modulator(const void *arg, bool write_only)
-{
- const struct v4l2_modulator *p = arg;
-
- if (write_only)
- pr_cont("index=%u, txsubchans=0x%x", p->index, p->txsubchans);
- else
- pr_cont("index=%u, name=%s, capability=0x%x, "
- "rangelow=%u, rangehigh=%u, txsubchans=0x%x\n",
- p->index, p->name, p->capability,
- p->rangelow, p->rangehigh, p->txsubchans);
-}
-
-static void v4l_print_tuner(const void *arg, bool write_only)
-{
- const struct v4l2_tuner *p = arg;
-
- if (write_only)
- pr_cont("index=%u, audmode=%u\n", p->index, p->audmode);
- else
- pr_cont("index=%u, name=%s, type=%u, capability=0x%x, "
- "rangelow=%u, rangehigh=%u, signal=%u, afc=%d, "
- "rxsubchans=0x%x, audmode=%u\n",
- p->index, p->name, p->type,
- p->capability, p->rangelow,
- p->rangehigh, p->signal, p->afc,
- p->rxsubchans, p->audmode);
-}
-
-static void v4l_print_frequency(const void *arg, bool write_only)
+/*
+ * Obsolete usercopy function - Should be removed soon
+ */
+long
+video_usercopy(struct file *file, unsigned int cmd, unsigned long arg,
+ v4l2_kioctl func)
{
- const struct v4l2_frequency *p = arg;
+ char sbuf[128];
+ void *mbuf = NULL;
+ void *parg = NULL;
+ long err = -EINVAL;
+ int is_ext_ctrl;
+ size_t ctrls_size = 0;
+ void __user *user_ptr = NULL;
- pr_cont("tuner=%u, type=%u, frequency=%u\n",
- p->tuner, p->type, p->frequency);
-}
+#ifdef __OLD_VIDIOC_
+ cmd = video_fix_command(cmd);
+#endif
+ is_ext_ctrl = (cmd == VIDIOC_S_EXT_CTRLS || cmd == VIDIOC_G_EXT_CTRLS ||
+ cmd == VIDIOC_TRY_EXT_CTRLS);
-static void v4l_print_standard(const void *arg, bool write_only)
-{
- const struct v4l2_standard *p = arg;
-
- pr_cont("index=%u, id=0x%Lx, name=%s, fps=%u/%u, "
- "framelines=%u\n", p->index,
- (unsigned long long)p->id, p->name,
- p->frameperiod.numerator,
- p->frameperiod.denominator,
- p->framelines);
-}
+ /* Copy arguments into temp kernel buffer */
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_NONE:
+ parg = NULL;
+ break;
+ case _IOC_READ:
+ case _IOC_WRITE:
+ case (_IOC_WRITE | _IOC_READ):
+ if (_IOC_SIZE(cmd) <= sizeof(sbuf)) {
+ parg = sbuf;
+ } else {
+ /* too big to allocate from stack */
+ mbuf = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
+ if (NULL == mbuf)
+ return -ENOMEM;
+ parg = mbuf;
+ }
-static void v4l_print_std(const void *arg, bool write_only)
-{
- pr_cont("std=0x%08Lx\n", *(const long long unsigned *)arg);
-}
+ err = -EFAULT;
+ if (_IOC_DIR(cmd) & _IOC_WRITE)
+ if (copy_from_user(parg, (void __user *)arg, _IOC_SIZE(cmd)))
+ goto out;
+ break;
+ }
+ if (is_ext_ctrl) {
+ struct v4l2_ext_controls *p = parg;
+
+ /* In case of an error, tell the caller that it wasn't
+ a specific control that caused it. */
+ p->error_idx = p->count;
+ user_ptr = (void __user *)p->controls;
+ if (p->count) {
+ ctrls_size = sizeof(struct v4l2_ext_control) * p->count;
+ /* Note: v4l2_ext_controls fits in sbuf[] so mbuf is still NULL. */
+ mbuf = kmalloc(ctrls_size, GFP_KERNEL);
+ err = -ENOMEM;
+ if (NULL == mbuf)
+ goto out_ext_ctrl;
+ err = -EFAULT;
+ if (copy_from_user(mbuf, user_ptr, ctrls_size))
+ goto out_ext_ctrl;
+ p->controls = mbuf;
+ }
+ }
-static void v4l_print_hw_freq_seek(const void *arg, bool write_only)
-{
- const struct v4l2_hw_freq_seek *p = arg;
+ /* call driver */
+ err = func(file, cmd, parg);
+ if (err == -ENOIOCTLCMD)
+ err = -EINVAL;
+ if (is_ext_ctrl) {
+ struct v4l2_ext_controls *p = parg;
- pr_cont("tuner=%u, type=%u, seek_upward=%u, wrap_around=%u, spacing=%u, "
- "rangelow=%u, rangehigh=%u\n",
- p->tuner, p->type, p->seek_upward, p->wrap_around, p->spacing,
- p->rangelow, p->rangehigh);
-}
+ p->controls = (void *)user_ptr;
+ if (p->count && err == 0 && copy_to_user(user_ptr, mbuf, ctrls_size))
+ err = -EFAULT;
+ goto out_ext_ctrl;
+ }
+ if (err < 0)
+ goto out;
-static void v4l_print_requestbuffers(const void *arg, bool write_only)
-{
- const struct v4l2_requestbuffers *p = arg;
+out_ext_ctrl:
+ /* Copy results into user buffer */
+ switch (_IOC_DIR(cmd)) {
+ case _IOC_READ:
+ case (_IOC_WRITE | _IOC_READ):
+ if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd)))
+ err = -EFAULT;
+ break;
+ }
- pr_cont("count=%d, type=%s, memory=%s\n",
- p->count,
- prt_names(p->type, v4l2_type_names),
- prt_names(p->memory, v4l2_memory_names));
+out:
+ kfree(mbuf);
+ return err;
}
+EXPORT_SYMBOL(video_usercopy);
-static void v4l_print_buffer(const void *arg, bool write_only)
+static void dbgbuf(unsigned int cmd, struct video_device *vfd,
+ struct v4l2_buffer *p)
{
- const struct v4l2_buffer *p = arg;
- const struct v4l2_timecode *tc = &p->timecode;
- const struct v4l2_plane *plane;
- int i;
+ struct v4l2_timecode *tc = &p->timecode;
- pr_cont("%02ld:%02d:%02d.%08ld index=%d, type=%s, "
- "flags=0x%08x, field=%s, sequence=%d, memory=%s",
+ dbgarg(cmd, "%02ld:%02d:%02d.%08ld index=%d, type=%s, "
+ "bytesused=%d, flags=0x%08d, "
+ "field=%0d, sequence=%d, memory=%s, offset/userptr=0x%08lx, length=%d\n",
p->timestamp.tv_sec / 3600,
(int)(p->timestamp.tv_sec / 60) % 60,
(int)(p->timestamp.tv_sec % 60),
(long)p->timestamp.tv_usec,
p->index,
prt_names(p->type, v4l2_type_names),
- p->flags, prt_names(p->field, v4l2_field_names),
- p->sequence, prt_names(p->memory, v4l2_memory_names));
-
- if (V4L2_TYPE_IS_MULTIPLANAR(p->type) && p->m.planes) {
- pr_cont("\n");
- for (i = 0; i < p->length; ++i) {
- plane = &p->m.planes[i];
- printk(KERN_DEBUG
- "plane %d: bytesused=%d, data_offset=0x%08x "
- "offset/userptr=0x%lx, length=%d\n",
- i, plane->bytesused, plane->data_offset,
- plane->m.userptr, plane->length);
- }
- } else {
- pr_cont("bytesused=%d, offset/userptr=0x%lx, length=%d\n",
- p->bytesused, p->m.userptr, p->length);
- }
-
- printk(KERN_DEBUG "timecode=%02d:%02d:%02d type=%d, "
- "flags=0x%08x, frames=%d, userbits=0x%08x\n",
+ p->bytesused, p->flags,
+ p->field, p->sequence,
+ prt_names(p->memory, v4l2_memory_names),
+ p->m.userptr, p->length);
+ dbgarg2("timecode=%02d:%02d:%02d type=%d, "
+ "flags=0x%08d, frames=%d, userbits=0x%08x\n",
tc->hours, tc->minutes, tc->seconds,
tc->type, tc->flags, tc->frames, *(__u32 *)tc->userbits);
}
-static void v4l_print_exportbuffer(const void *arg, bool write_only)
-{
- const struct v4l2_exportbuffer *p = arg;
-
- pr_cont("fd=%d, type=%s, index=%u, plane=%u, flags=0x%08x\n",
- p->fd, prt_names(p->type, v4l2_type_names),
- p->index, p->plane, p->flags);
-}
-
-static void v4l_print_create_buffers(const void *arg, bool write_only)
+static inline void dbgrect(struct video_device *vfd, char *s,
+ struct v4l2_rect *r)
{
- const struct v4l2_create_buffers *p = arg;
+ dbgarg2("%sRect start at %dx%d, size=%dx%d\n", s, r->left, r->top,
+ r->width, r->height);
+};
- pr_cont("index=%d, count=%d, memory=%s, ",
- p->index, p->count,
- prt_names(p->memory, v4l2_memory_names));
- v4l_print_format(&p->format, write_only);
-}
+static inline void v4l_print_pix_fmt(struct video_device *vfd,
+ struct v4l2_pix_format *fmt)
+{
+ dbgarg2("width=%d, height=%d, format=%c%c%c%c, field=%s, "
+ "bytesperline=%d sizeimage=%d, colorspace=%d\n",
+ fmt->width, fmt->height,
+ (fmt->pixelformat & 0xff),
+ (fmt->pixelformat >> 8) & 0xff,
+ (fmt->pixelformat >> 16) & 0xff,
+ (fmt->pixelformat >> 24) & 0xff,
+ prt_names(fmt->field, v4l2_field_names),
+ fmt->bytesperline, fmt->sizeimage, fmt->colorspace);
+};
-static void v4l_print_streamparm(const void *arg, bool write_only)
+static inline void v4l_print_ext_ctrls(unsigned int cmd,
+ struct video_device *vfd, struct v4l2_ext_controls *c, int show_vals)
{
- const struct v4l2_streamparm *p = arg;
-
- pr_cont("type=%s", prt_names(p->type, v4l2_type_names));
-
- if (p->type == V4L2_BUF_TYPE_VIDEO_CAPTURE ||
- p->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
- const struct v4l2_captureparm *c = &p->parm.capture;
-
- pr_cont(", capability=0x%x, capturemode=0x%x, timeperframe=%d/%d, "
- "extendedmode=%d, readbuffers=%d\n",
- c->capability, c->capturemode,
- c->timeperframe.numerator, c->timeperframe.denominator,
- c->extendedmode, c->readbuffers);
- } else if (p->type == V4L2_BUF_TYPE_VIDEO_OUTPUT ||
- p->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
- const struct v4l2_outputparm *c = &p->parm.output;
+ __u32 i;
- pr_cont(", capability=0x%x, outputmode=0x%x, timeperframe=%d/%d, "
- "extendedmode=%d, writebuffers=%d\n",
- c->capability, c->outputmode,
- c->timeperframe.numerator, c->timeperframe.denominator,
- c->extendedmode, c->writebuffers);
+ if (!(vfd->debug & V4L2_DEBUG_IOCTL_ARG))
+ return;
+ dbgarg(cmd, "");
+ printk(KERN_CONT "class=0x%x", c->ctrl_class);
+ for (i = 0; i < c->count; i++) {
+ if (show_vals && !c->controls[i].size)
+ printk(KERN_CONT " id/val=0x%x/0x%x",
+ c->controls[i].id, c->controls[i].value);
+ else
+ printk(KERN_CONT " id=0x%x,size=%u",
+ c->controls[i].id, c->controls[i].size);
}
-}
-
-static void v4l_print_queryctrl(const void *arg, bool write_only)
-{
- const struct v4l2_queryctrl *p = arg;
-
- pr_cont("id=0x%x, type=%d, name=%s, min/max=%d/%d, "
- "step=%d, default=%d, flags=0x%08x\n",
- p->id, p->type, p->name,
- p->minimum, p->maximum,
- p->step, p->default_value, p->flags);
-}
+ printk(KERN_CONT "\n");
+};
-static void v4l_print_querymenu(const void *arg, bool write_only)
+static inline int check_ext_ctrls(struct v4l2_ext_controls *c, int allow_priv)
{
- const struct v4l2_querymenu *p = arg;
-
- pr_cont("id=0x%x, index=%d\n", p->id, p->index);
-}
+ __u32 i;
-static void v4l_print_control(const void *arg, bool write_only)
-{
- const struct v4l2_control *p = arg;
+ /* zero the reserved fields */
+ c->reserved[0] = c->reserved[1] = 0;
+ for (i = 0; i < c->count; i++)
+ c->controls[i].reserved2[0] = 0;
- pr_cont("id=0x%x, value=%d\n", p->id, p->value);
+ /* V4L2_CID_PRIVATE_BASE cannot be used as control class
+ when using extended controls.
+ Only when passed in through VIDIOC_G_CTRL and VIDIOC_S_CTRL
+ is it allowed for backwards compatibility.
+ */
+ if (!allow_priv && c->ctrl_class == V4L2_CID_PRIVATE_BASE)
+ return 0;
+ /* Check that all controls are from the same control class. */
+ for (i = 0; i < c->count; i++) {
+ if (V4L2_CTRL_ID2CLASS(c->controls[i].id) != c->ctrl_class) {
+ c->error_idx = i;
+ return 0;
+ }
+ }
+ return 1;
}
-static void v4l_print_ext_controls(const void *arg, bool write_only)
+static int check_fmt(const struct v4l2_ioctl_ops *ops, enum v4l2_buf_type type)
{
- const struct v4l2_ext_controls *p = arg;
- int i;
+ if (ops == NULL)
+ return -EINVAL;
- pr_cont("class=0x%x, count=%d, error_idx=%d",
- p->ctrl_class, p->count, p->error_idx);
- for (i = 0; i < p->count; i++) {
- if (p->controls[i].size)
- pr_cont(", id/val=0x%x/0x%x",
- p->controls[i].id, p->controls[i].value);
- else
- pr_cont(", id/size=0x%x/%u",
- p->controls[i].id, p->controls[i].size);
+ switch (type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ if (ops->vidioc_g_fmt_vid_cap)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_VIDEO_OVERLAY:
+ if (ops->vidioc_g_fmt_vid_overlay)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT:
+ if (ops->vidioc_g_fmt_vid_out)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
+ if (ops->vidioc_g_fmt_vid_out_overlay)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_VBI_CAPTURE:
+ if (ops->vidioc_g_fmt_vbi_cap)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_VBI_OUTPUT:
+ if (ops->vidioc_g_fmt_vbi_out)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
+ if (ops->vidioc_g_fmt_sliced_vbi_cap)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
+ if (ops->vidioc_g_fmt_sliced_vbi_out)
+ return 0;
+ break;
+ case V4L2_BUF_TYPE_PRIVATE:
+ if (ops->vidioc_g_fmt_type_private)
+ return 0;
+ break;
}
- pr_cont("\n");
-}
-
-static void v4l_print_cropcap(const void *arg, bool write_only)
-{
- const struct v4l2_cropcap *p = arg;
-
- pr_cont("type=%s, bounds wxh=%dx%d, x,y=%d,%d, "
- "defrect wxh=%dx%d, x,y=%d,%d\n, "
- "pixelaspect %d/%d\n",
- prt_names(p->type, v4l2_type_names),
- p->bounds.width, p->bounds.height,
- p->bounds.left, p->bounds.top,
- p->defrect.width, p->defrect.height,
- p->defrect.left, p->defrect.top,
- p->pixelaspect.numerator, p->pixelaspect.denominator);
+ return -EINVAL;
}
-static void v4l_print_crop(const void *arg, bool write_only)
+static long __video_do_ioctl(struct file *file,
+ unsigned int cmd, void *arg)
{
- const struct v4l2_crop *p = arg;
+ struct video_device *vfd = video_devdata(file);
+ const struct v4l2_ioctl_ops *ops = vfd->ioctl_ops;
+ void *fh = file->private_data;
+ long ret = -EINVAL;
- pr_cont("type=%s, wxh=%dx%d, x,y=%d,%d\n",
- prt_names(p->type, v4l2_type_names),
- p->c.width, p->c.height,
- p->c.left, p->c.top);
-}
+ if ((vfd->debug & V4L2_DEBUG_IOCTL) &&
+ !(vfd->debug & V4L2_DEBUG_IOCTL_ARG)) {
+ v4l_print_ioctl(vfd->name, cmd);
+ printk(KERN_CONT "\n");
+ }
-static void v4l_print_selection(const void *arg, bool write_only)
-{
- const struct v4l2_selection *p = arg;
+ if (ops == NULL) {
+ printk(KERN_WARNING "videodev: \"%s\" has no ioctl_ops.\n",
+ vfd->name);
+ return -EINVAL;
+ }
- pr_cont("type=%s, target=%d, flags=0x%x, wxh=%dx%d, x,y=%d,%d\n",
- prt_names(p->type, v4l2_type_names),
- p->target, p->flags,
- p->r.width, p->r.height, p->r.left, p->r.top);
-}
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ /***********************************************************
+ Handles calls to the obsoleted V4L1 API
+ Due to the nature of VIDIOCGMBUF, each driver that supports
+ V4L1 should implement its own handler for this ioctl.
+ ***********************************************************/
-static void v4l_print_jpegcompression(const void *arg, bool write_only)
-{
- const struct v4l2_jpegcompression *p = arg;
+ /* --- streaming capture ------------------------------------- */
+ if (cmd == VIDIOCGMBUF) {
+ struct video_mbuf *p = arg;
- pr_cont("quality=%d, APPn=%d, APP_len=%d, "
- "COM_len=%d, jpeg_markers=0x%x\n",
- p->quality, p->APPn, p->APP_len,
- p->COM_len, p->jpeg_markers);
-}
+ if (!ops->vidiocgmbuf)
+ return ret;
+ ret = ops->vidiocgmbuf(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "size=%d, frames=%d, offsets=0x%08lx\n",
+ p->size, p->frames,
+ (unsigned long)p->offsets);
+ return ret;
+ }
-static void v4l_print_enc_idx(const void *arg, bool write_only)
-{
- const struct v4l2_enc_idx *p = arg;
+ /********************************************************
+ All other V4L1 calls are handled by v4l1_compat module.
+ Those calls will be translated into V4L2 calls, and
+ __video_do_ioctl will be called again, with one or more
+ V4L2 ioctls.
+ ********************************************************/
+ if (_IOC_TYPE(cmd) == 'v' && _IOC_NR(cmd) < BASE_VIDIOCPRIVATE)
+ return v4l_compat_translate_ioctl(file, cmd, arg,
+ __video_do_ioctl);
+#endif
- pr_cont("entries=%d, entries_cap=%d\n",
- p->entries, p->entries_cap);
-}
+ switch (cmd) {
+ /* --- capabilities ------------------------------------------ */
+ case VIDIOC_QUERYCAP:
+ {
+ struct v4l2_capability *cap = (struct v4l2_capability *)arg;
-static void v4l_print_encoder_cmd(const void *arg, bool write_only)
-{
- const struct v4l2_encoder_cmd *p = arg;
+ if (!ops->vidioc_querycap)
+ break;
- pr_cont("cmd=%d, flags=0x%x\n",
- p->cmd, p->flags);
-}
+ ret = ops->vidioc_querycap(file, fh, cap);
+ if (!ret)
+ dbgarg(cmd, "driver=%s, card=%s, bus=%s, "
+ "version=0x%08x, "
+ "capabilities=0x%08x\n",
+ cap->driver, cap->card, cap->bus_info,
+ cap->version,
+ cap->capabilities);
+ break;
+ }
-static void v4l_print_decoder_cmd(const void *arg, bool write_only)
-{
- const struct v4l2_decoder_cmd *p = arg;
+ /* --- priority ------------------------------------------ */
+ case VIDIOC_G_PRIORITY:
+ {
+ enum v4l2_priority *p = arg;
- pr_cont("cmd=%d, flags=0x%x\n", p->cmd, p->flags);
+ if (!ops->vidioc_g_priority)
+ break;
+ ret = ops->vidioc_g_priority(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "priority is %d\n", *p);
+ break;
+ }
+ case VIDIOC_S_PRIORITY:
+ {
+ enum v4l2_priority *p = arg;
- if (p->cmd == V4L2_DEC_CMD_START)
- pr_info("speed=%d, format=%u\n",
- p->start.speed, p->start.format);
- else if (p->cmd == V4L2_DEC_CMD_STOP)
- pr_info("pts=%llu\n", p->stop.pts);
-}
+ if (!ops->vidioc_s_priority)
+ break;
+ dbgarg(cmd, "setting priority to %d\n", *p);
+ ret = ops->vidioc_s_priority(file, fh, *p);
+ break;
+ }
-static void v4l_print_dbg_chip_ident(const void *arg, bool write_only)
-{
- const struct v4l2_dbg_chip_ident *p = arg;
-
- pr_cont("type=%u, ", p->match.type);
- if (p->match.type == V4L2_CHIP_MATCH_I2C_DRIVER)
- pr_cont("name=%s, ", p->match.name);
- else
- pr_cont("addr=%u, ", p->match.addr);
- pr_cont("chip_ident=%u, revision=0x%x\n",
- p->ident, p->revision);
-}
+ /* --- capture ioctls ---------------------------------------- */
+ case VIDIOC_ENUM_FMT:
+ {
+ struct v4l2_fmtdesc *f = arg;
-static void v4l_print_dbg_register(const void *arg, bool write_only)
-{
- const struct v4l2_dbg_register *p = arg;
-
- pr_cont("type=%u, ", p->match.type);
- if (p->match.type == V4L2_CHIP_MATCH_I2C_DRIVER)
- pr_cont("name=%s, ", p->match.name);
- else
- pr_cont("addr=%u, ", p->match.addr);
- pr_cont("reg=0x%llx, val=0x%llx\n",
- p->reg, p->val);
-}
-
-static void v4l_print_dv_enum_presets(const void *arg, bool write_only)
-{
- const struct v4l2_dv_enum_preset *p = arg;
-
- pr_cont("index=%u, preset=%u, name=%s, width=%u, height=%u\n",
- p->index, p->preset, p->name, p->width, p->height);
-}
-
-static void v4l_print_dv_preset(const void *arg, bool write_only)
-{
- const struct v4l2_dv_preset *p = arg;
-
- pr_cont("preset=%u\n", p->preset);
-}
-
-static void v4l_print_dv_timings(const void *arg, bool write_only)
-{
- const struct v4l2_dv_timings *p = arg;
-
- switch (p->type) {
- case V4L2_DV_BT_656_1120:
- pr_cont("type=bt-656/1120, interlaced=%u, "
- "pixelclock=%llu, "
- "width=%u, height=%u, polarities=0x%x, "
- "hfrontporch=%u, hsync=%u, "
- "hbackporch=%u, vfrontporch=%u, "
- "vsync=%u, vbackporch=%u, "
- "il_vfrontporch=%u, il_vsync=%u, "
- "il_vbackporch=%u, standards=0x%x, flags=0x%x\n",
- p->bt.interlaced, p->bt.pixelclock,
- p->bt.width, p->bt.height,
- p->bt.polarities, p->bt.hfrontporch,
- p->bt.hsync, p->bt.hbackporch,
- p->bt.vfrontporch, p->bt.vsync,
- p->bt.vbackporch, p->bt.il_vfrontporch,
- p->bt.il_vsync, p->bt.il_vbackporch,
- p->bt.standards, p->bt.flags);
- break;
- default:
- pr_cont("type=%d\n", p->type);
- break;
- }
-}
-
-static void v4l_print_enum_dv_timings(const void *arg, bool write_only)
-{
- const struct v4l2_enum_dv_timings *p = arg;
-
- pr_cont("index=%u, ", p->index);
- v4l_print_dv_timings(&p->timings, write_only);
-}
-
-static void v4l_print_dv_timings_cap(const void *arg, bool write_only)
-{
- const struct v4l2_dv_timings_cap *p = arg;
-
- switch (p->type) {
- case V4L2_DV_BT_656_1120:
- pr_cont("type=bt-656/1120, width=%u-%u, height=%u-%u, "
- "pixelclock=%llu-%llu, standards=0x%x, capabilities=0x%x\n",
- p->bt.min_width, p->bt.max_width,
- p->bt.min_height, p->bt.max_height,
- p->bt.min_pixelclock, p->bt.max_pixelclock,
- p->bt.standards, p->bt.capabilities);
- break;
- default:
- pr_cont("type=%u\n", p->type);
- break;
- }
-}
-
-static void v4l_print_frmsizeenum(const void *arg, bool write_only)
-{
- const struct v4l2_frmsizeenum *p = arg;
-
- pr_cont("index=%u, pixelformat=%c%c%c%c, type=%u",
- p->index,
- (p->pixel_format & 0xff),
- (p->pixel_format >> 8) & 0xff,
- (p->pixel_format >> 16) & 0xff,
- (p->pixel_format >> 24) & 0xff,
- p->type);
- switch (p->type) {
- case V4L2_FRMSIZE_TYPE_DISCRETE:
- pr_cont(" wxh=%ux%u\n",
- p->discrete.width, p->discrete.height);
- break;
- case V4L2_FRMSIZE_TYPE_STEPWISE:
- pr_cont(" min=%ux%u, max=%ux%u, step=%ux%u\n",
- p->stepwise.min_width, p->stepwise.min_height,
- p->stepwise.step_width, p->stepwise.step_height,
- p->stepwise.max_width, p->stepwise.max_height);
- break;
- case V4L2_FRMSIZE_TYPE_CONTINUOUS:
- /* fall through */
- default:
- pr_cont("\n");
- break;
- }
-}
-
-static void v4l_print_frmivalenum(const void *arg, bool write_only)
-{
- const struct v4l2_frmivalenum *p = arg;
-
- pr_cont("index=%u, pixelformat=%c%c%c%c, wxh=%ux%u, type=%u",
- p->index,
- (p->pixel_format & 0xff),
- (p->pixel_format >> 8) & 0xff,
- (p->pixel_format >> 16) & 0xff,
- (p->pixel_format >> 24) & 0xff,
- p->width, p->height, p->type);
- switch (p->type) {
- case V4L2_FRMIVAL_TYPE_DISCRETE:
- pr_cont(" fps=%d/%d\n",
- p->discrete.numerator,
- p->discrete.denominator);
- break;
- case V4L2_FRMIVAL_TYPE_STEPWISE:
- pr_cont(" min=%d/%d, max=%d/%d, step=%d/%d\n",
- p->stepwise.min.numerator,
- p->stepwise.min.denominator,
- p->stepwise.max.numerator,
- p->stepwise.max.denominator,
- p->stepwise.step.numerator,
- p->stepwise.step.denominator);
- break;
- case V4L2_FRMIVAL_TYPE_CONTINUOUS:
- /* fall through */
- default:
- pr_cont("\n");
- break;
- }
-}
-
-static void v4l_print_event(const void *arg, bool write_only)
-{
- const struct v4l2_event *p = arg;
- const struct v4l2_event_ctrl *c;
-
- pr_cont("type=0x%x, pending=%u, sequence=%u, id=%u, "
- "timestamp=%lu.%9.9lu\n",
- p->type, p->pending, p->sequence, p->id,
- p->timestamp.tv_sec, p->timestamp.tv_nsec);
- switch (p->type) {
- case V4L2_EVENT_VSYNC:
- printk(KERN_DEBUG "field=%s\n",
- prt_names(p->u.vsync.field, v4l2_field_names));
- break;
- case V4L2_EVENT_CTRL:
- c = &p->u.ctrl;
- printk(KERN_DEBUG "changes=0x%x, type=%u, ",
- c->changes, c->type);
- if (c->type == V4L2_CTRL_TYPE_INTEGER64)
- pr_cont("value64=%lld, ", c->value64);
- else
- pr_cont("value=%d, ", c->value);
- pr_cont("flags=0x%x, minimum=%d, maximum=%d, step=%d,"
- " default_value=%d\n",
- c->flags, c->minimum, c->maximum,
- c->step, c->default_value);
- break;
- case V4L2_EVENT_FRAME_SYNC:
- pr_cont("frame_sequence=%u\n",
- p->u.frame_sync.frame_sequence);
- break;
- }
-}
-
-static void v4l_print_event_subscription(const void *arg, bool write_only)
-{
- const struct v4l2_event_subscription *p = arg;
-
- pr_cont("type=0x%x, id=0x%x, flags=0x%x\n",
- p->type, p->id, p->flags);
-}
-
-static void v4l_print_sliced_vbi_cap(const void *arg, bool write_only)
-{
- const struct v4l2_sliced_vbi_cap *p = arg;
- int i;
-
- pr_cont("type=%s, service_set=0x%08x\n",
- prt_names(p->type, v4l2_type_names), p->service_set);
- for (i = 0; i < 24; i++)
- printk(KERN_DEBUG "line[%02u]=0x%04x, 0x%04x\n", i,
- p->service_lines[0][i],
- p->service_lines[1][i]);
-}
-
-static void v4l_print_freq_band(const void *arg, bool write_only)
-{
- const struct v4l2_frequency_band *p = arg;
-
- pr_cont("tuner=%u, type=%u, index=%u, capability=0x%x, "
- "rangelow=%u, rangehigh=%u, modulation=0x%x\n",
- p->tuner, p->type, p->index,
- p->capability, p->rangelow,
- p->rangehigh, p->modulation);
-}
-
-static void v4l_print_u32(const void *arg, bool write_only)
-{
- pr_cont("value=%u\n", *(const u32 *)arg);
-}
-
-static void v4l_print_newline(const void *arg, bool write_only)
-{
- pr_cont("\n");
-}
-
-static void v4l_print_default(const void *arg, bool write_only)
-{
- pr_cont("driver-specific ioctl\n");
-}
-
-static int check_ext_ctrls(struct v4l2_ext_controls *c, int allow_priv)
-{
- __u32 i;
-
- /* zero the reserved fields */
- c->reserved[0] = c->reserved[1] = 0;
- for (i = 0; i < c->count; i++)
- c->controls[i].reserved2[0] = 0;
-
- /* V4L2_CID_PRIVATE_BASE cannot be used as control class
- when using extended controls.
- Only when passed in through VIDIOC_G_CTRL and VIDIOC_S_CTRL
- is it allowed for backwards compatibility.
- */
- if (!allow_priv && c->ctrl_class == V4L2_CID_PRIVATE_BASE)
- return 0;
- /* Check that all controls are from the same control class. */
- for (i = 0; i < c->count; i++) {
- if (V4L2_CTRL_ID2CLASS(c->controls[i].id) != c->ctrl_class) {
- c->error_idx = i;
- return 0;
- }
- }
- return 1;
-}
-
-static int check_fmt(struct file *file, enum v4l2_buf_type type)
-{
- struct video_device *vfd = video_devdata(file);
- const struct v4l2_ioctl_ops *ops = vfd->ioctl_ops;
- bool is_vid = vfd->vfl_type == VFL_TYPE_GRABBER;
- bool is_vbi = vfd->vfl_type == VFL_TYPE_VBI;
- bool is_rx = vfd->vfl_dir != VFL_DIR_TX;
- bool is_tx = vfd->vfl_dir != VFL_DIR_RX;
-
- if (ops == NULL)
- return -EINVAL;
-
- switch (type) {
- case V4L2_BUF_TYPE_VIDEO_CAPTURE:
- if (is_vid && is_rx &&
- (ops->vidioc_g_fmt_vid_cap || ops->vidioc_g_fmt_vid_cap_mplane))
- return 0;
- break;
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (is_vid && is_rx && ops->vidioc_g_fmt_vid_cap_mplane)
- return 0;
- break;
- case V4L2_BUF_TYPE_VIDEO_OVERLAY:
- if (is_vid && is_rx && ops->vidioc_g_fmt_vid_overlay)
- return 0;
- break;
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- if (is_vid && is_tx &&
- (ops->vidioc_g_fmt_vid_out || ops->vidioc_g_fmt_vid_out_mplane))
- return 0;
- break;
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (is_vid && is_tx && ops->vidioc_g_fmt_vid_out_mplane)
- return 0;
- break;
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
- if (is_vid && is_tx && ops->vidioc_g_fmt_vid_out_overlay)
- return 0;
- break;
- case V4L2_BUF_TYPE_VBI_CAPTURE:
- if (is_vbi && is_rx && ops->vidioc_g_fmt_vbi_cap)
- return 0;
- break;
- case V4L2_BUF_TYPE_VBI_OUTPUT:
- if (is_vbi && is_tx && ops->vidioc_g_fmt_vbi_out)
- return 0;
- break;
- case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
- if (is_vbi && is_rx && ops->vidioc_g_fmt_sliced_vbi_cap)
- return 0;
- break;
- case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
- if (is_vbi && is_tx && ops->vidioc_g_fmt_sliced_vbi_out)
- return 0;
- break;
- default:
- break;
- }
- return -EINVAL;
-}
-
-static int v4l_querycap(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_capability *cap = (struct v4l2_capability *)arg;
-
- cap->version = LINUX_VERSION_CODE;
- return ops->vidioc_querycap(file, fh, cap);
-}
-
-static int v4l_s_input(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_s_input(file, fh, *(unsigned int *)arg);
-}
-
-static int v4l_s_output(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_s_output(file, fh, *(unsigned int *)arg);
-}
-
-static int v4l_g_priority(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd;
- u32 *p = arg;
-
- if (ops->vidioc_g_priority)
- return ops->vidioc_g_priority(file, fh, arg);
- vfd = video_devdata(file);
- *p = v4l2_prio_max(&vfd->v4l2_dev->prio);
- return 0;
-}
-
-static int v4l_s_priority(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd;
- struct v4l2_fh *vfh;
- u32 *p = arg;
-
- if (ops->vidioc_s_priority)
- return ops->vidioc_s_priority(file, fh, *p);
- vfd = video_devdata(file);
- vfh = file->private_data;
- return v4l2_prio_change(&vfd->v4l2_dev->prio, &vfh->prio, *p);
-}
-
-static int v4l_enuminput(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_input *p = arg;
-
- /*
- * We set the flags for CAP_PRESETS, CAP_DV_TIMINGS &
- * CAP_STD here based on ioctl handler provided by the
- * driver. If the driver doesn't support these
- * for a specific input, it must override these flags.
- */
- if (ops->vidioc_s_std)
- p->capabilities |= V4L2_IN_CAP_STD;
- if (ops->vidioc_s_dv_preset)
- p->capabilities |= V4L2_IN_CAP_PRESETS;
- if (ops->vidioc_s_dv_timings)
- p->capabilities |= V4L2_IN_CAP_DV_TIMINGS;
-
- return ops->vidioc_enum_input(file, fh, p);
-}
-
-static int v4l_enumoutput(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_output *p = arg;
-
- /*
- * We set the flags for CAP_PRESETS, CAP_DV_TIMINGS &
- * CAP_STD here based on ioctl handler provided by the
- * driver. If the driver doesn't support these
- * for a specific output, it must override these flags.
- */
- if (ops->vidioc_s_std)
- p->capabilities |= V4L2_OUT_CAP_STD;
- if (ops->vidioc_s_dv_preset)
- p->capabilities |= V4L2_OUT_CAP_PRESETS;
- if (ops->vidioc_s_dv_timings)
- p->capabilities |= V4L2_OUT_CAP_DV_TIMINGS;
-
- return ops->vidioc_enum_output(file, fh, p);
-}
-
-static int v4l_enum_fmt(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_fmtdesc *p = arg;
- struct video_device *vfd = video_devdata(file);
- bool is_rx = vfd->vfl_dir != VFL_DIR_TX;
- bool is_tx = vfd->vfl_dir != VFL_DIR_RX;
-
- switch (p->type) {
- case V4L2_BUF_TYPE_VIDEO_CAPTURE:
- if (unlikely(!is_rx || !ops->vidioc_enum_fmt_vid_cap))
+ switch (f->type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ if (ops->vidioc_enum_fmt_vid_cap)
+ ret = ops->vidioc_enum_fmt_vid_cap(file, fh, f);
break;
- return ops->vidioc_enum_fmt_vid_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (unlikely(!is_rx || !ops->vidioc_enum_fmt_vid_cap_mplane))
+ case V4L2_BUF_TYPE_VIDEO_OVERLAY:
+ if (ops->vidioc_enum_fmt_vid_overlay)
+ ret = ops->vidioc_enum_fmt_vid_overlay(file,
+ fh, f);
break;
- return ops->vidioc_enum_fmt_vid_cap_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OVERLAY:
- if (unlikely(!is_rx || !ops->vidioc_enum_fmt_vid_overlay))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT:
+ if (ops->vidioc_enum_fmt_vid_out)
+ ret = ops->vidioc_enum_fmt_vid_out(file, fh, f);
break;
- return ops->vidioc_enum_fmt_vid_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- if (unlikely(!is_tx || !ops->vidioc_enum_fmt_vid_out))
+ case V4L2_BUF_TYPE_PRIVATE:
+ if (ops->vidioc_enum_fmt_type_private)
+ ret = ops->vidioc_enum_fmt_type_private(file,
+ fh, f);
break;
- return ops->vidioc_enum_fmt_vid_out(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (unlikely(!is_tx || !ops->vidioc_enum_fmt_vid_out_mplane))
+ default:
break;
- return ops->vidioc_enum_fmt_vid_out_mplane(file, fh, arg);
+ }
+ if (!ret)
+ dbgarg(cmd, "index=%d, type=%d, flags=%d, "
+ "pixelformat=%c%c%c%c, description='%s'\n",
+ f->index, f->type, f->flags,
+ (f->pixelformat & 0xff),
+ (f->pixelformat >> 8) & 0xff,
+ (f->pixelformat >> 16) & 0xff,
+ (f->pixelformat >> 24) & 0xff,
+ f->description);
+ break;
}
- return -EINVAL;
-}
-
-static int v4l_g_fmt(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_format *p = arg;
- struct video_device *vfd = video_devdata(file);
- bool is_vid = vfd->vfl_type == VFL_TYPE_GRABBER;
- bool is_rx = vfd->vfl_dir != VFL_DIR_TX;
- bool is_tx = vfd->vfl_dir != VFL_DIR_RX;
-
- switch (p->type) {
- case V4L2_BUF_TYPE_VIDEO_CAPTURE:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_g_fmt_vid_cap))
- break;
- return ops->vidioc_g_fmt_vid_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_g_fmt_vid_cap_mplane))
+ case VIDIOC_G_FMT:
+ {
+ struct v4l2_format *f = (struct v4l2_format *)arg;
+
+ /* FIXME: Should be one dump per type */
+ dbgarg(cmd, "type=%s\n", prt_names(f->type, v4l2_type_names));
+
+ switch (f->type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ if (ops->vidioc_g_fmt_vid_cap)
+ ret = ops->vidioc_g_fmt_vid_cap(file, fh, f);
+ if (!ret)
+ v4l_print_pix_fmt(vfd, &f->fmt.pix);
break;
- return ops->vidioc_g_fmt_vid_cap_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OVERLAY:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_g_fmt_vid_overlay))
+ case V4L2_BUF_TYPE_VIDEO_OVERLAY:
+ if (ops->vidioc_g_fmt_vid_overlay)
+ ret = ops->vidioc_g_fmt_vid_overlay(file,
+ fh, f);
break;
- return ops->vidioc_g_fmt_vid_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VBI_CAPTURE:
- if (unlikely(!is_rx || is_vid || !ops->vidioc_g_fmt_vbi_cap))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT:
+ if (ops->vidioc_g_fmt_vid_out)
+ ret = ops->vidioc_g_fmt_vid_out(file, fh, f);
+ if (!ret)
+ v4l_print_pix_fmt(vfd, &f->fmt.pix);
break;
- return ops->vidioc_g_fmt_vbi_cap(file, fh, arg);
- case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
- if (unlikely(!is_rx || is_vid || !ops->vidioc_g_fmt_sliced_vbi_cap))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
+ if (ops->vidioc_g_fmt_vid_out_overlay)
+ ret = ops->vidioc_g_fmt_vid_out_overlay(file,
+ fh, f);
break;
- return ops->vidioc_g_fmt_sliced_vbi_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_g_fmt_vid_out))
+ case V4L2_BUF_TYPE_VBI_CAPTURE:
+ if (ops->vidioc_g_fmt_vbi_cap)
+ ret = ops->vidioc_g_fmt_vbi_cap(file, fh, f);
break;
- return ops->vidioc_g_fmt_vid_out(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_g_fmt_vid_out_mplane))
+ case V4L2_BUF_TYPE_VBI_OUTPUT:
+ if (ops->vidioc_g_fmt_vbi_out)
+ ret = ops->vidioc_g_fmt_vbi_out(file, fh, f);
break;
- return ops->vidioc_g_fmt_vid_out_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_g_fmt_vid_out_overlay))
+ case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
+ if (ops->vidioc_g_fmt_sliced_vbi_cap)
+ ret = ops->vidioc_g_fmt_sliced_vbi_cap(file,
+ fh, f);
break;
- return ops->vidioc_g_fmt_vid_out_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VBI_OUTPUT:
- if (unlikely(!is_tx || is_vid || !ops->vidioc_g_fmt_vbi_out))
+ case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
+ if (ops->vidioc_g_fmt_sliced_vbi_out)
+ ret = ops->vidioc_g_fmt_sliced_vbi_out(file,
+ fh, f);
break;
- return ops->vidioc_g_fmt_vbi_out(file, fh, arg);
- case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
- if (unlikely(!is_tx || is_vid || !ops->vidioc_g_fmt_sliced_vbi_out))
+ case V4L2_BUF_TYPE_PRIVATE:
+ if (ops->vidioc_g_fmt_type_private)
+ ret = ops->vidioc_g_fmt_type_private(file,
+ fh, f);
break;
- return ops->vidioc_g_fmt_sliced_vbi_out(file, fh, arg);
- }
- return -EINVAL;
-}
-
-static int v4l_s_fmt(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_format *p = arg;
- struct video_device *vfd = video_devdata(file);
- bool is_vid = vfd->vfl_type == VFL_TYPE_GRABBER;
- bool is_rx = vfd->vfl_dir != VFL_DIR_TX;
- bool is_tx = vfd->vfl_dir != VFL_DIR_RX;
+ }
- switch (p->type) {
- case V4L2_BUF_TYPE_VIDEO_CAPTURE:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_s_fmt_vid_cap))
+ break;
+ }
+ case VIDIOC_S_FMT:
+ {
+ struct v4l2_format *f = (struct v4l2_format *)arg;
+
+ /* FIXME: Should be one dump per type */
+ dbgarg(cmd, "type=%s\n", prt_names(f->type, v4l2_type_names));
+
+ switch (f->type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ CLEAR_AFTER_FIELD(f, fmt.pix);
+ v4l_print_pix_fmt(vfd, &f->fmt.pix);
+ if (ops->vidioc_s_fmt_vid_cap)
+ ret = ops->vidioc_s_fmt_vid_cap(file, fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix);
- return ops->vidioc_s_fmt_vid_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_s_fmt_vid_cap_mplane))
+ case V4L2_BUF_TYPE_VIDEO_OVERLAY:
+ CLEAR_AFTER_FIELD(f, fmt.win);
+ if (ops->vidioc_s_fmt_vid_overlay)
+ ret = ops->vidioc_s_fmt_vid_overlay(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix_mp);
- return ops->vidioc_s_fmt_vid_cap_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OVERLAY:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_s_fmt_vid_overlay))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT:
+ CLEAR_AFTER_FIELD(f, fmt.pix);
+ v4l_print_pix_fmt(vfd, &f->fmt.pix);
+ if (ops->vidioc_s_fmt_vid_out)
+ ret = ops->vidioc_s_fmt_vid_out(file, fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.win);
- return ops->vidioc_s_fmt_vid_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VBI_CAPTURE:
- if (unlikely(!is_rx || is_vid || !ops->vidioc_s_fmt_vbi_cap))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
+ CLEAR_AFTER_FIELD(f, fmt.win);
+ if (ops->vidioc_s_fmt_vid_out_overlay)
+ ret = ops->vidioc_s_fmt_vid_out_overlay(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.vbi);
- return ops->vidioc_s_fmt_vbi_cap(file, fh, arg);
- case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
- if (unlikely(!is_rx || is_vid || !ops->vidioc_s_fmt_sliced_vbi_cap))
- break;
- CLEAR_AFTER_FIELD(p, fmt.sliced);
- return ops->vidioc_s_fmt_sliced_vbi_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_s_fmt_vid_out))
+ case V4L2_BUF_TYPE_VBI_CAPTURE:
+ CLEAR_AFTER_FIELD(f, fmt.vbi);
+ if (ops->vidioc_s_fmt_vbi_cap)
+ ret = ops->vidioc_s_fmt_vbi_cap(file, fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix);
- return ops->vidioc_s_fmt_vid_out(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_s_fmt_vid_out_mplane))
+ case V4L2_BUF_TYPE_VBI_OUTPUT:
+ CLEAR_AFTER_FIELD(f, fmt.vbi);
+ if (ops->vidioc_s_fmt_vbi_out)
+ ret = ops->vidioc_s_fmt_vbi_out(file, fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix_mp);
- return ops->vidioc_s_fmt_vid_out_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_s_fmt_vid_out_overlay))
+ case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
+ CLEAR_AFTER_FIELD(f, fmt.sliced);
+ if (ops->vidioc_s_fmt_sliced_vbi_cap)
+ ret = ops->vidioc_s_fmt_sliced_vbi_cap(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.win);
- return ops->vidioc_s_fmt_vid_out_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VBI_OUTPUT:
- if (unlikely(!is_tx || is_vid || !ops->vidioc_s_fmt_vbi_out))
+ case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
+ CLEAR_AFTER_FIELD(f, fmt.sliced);
+ if (ops->vidioc_s_fmt_sliced_vbi_out)
+ ret = ops->vidioc_s_fmt_sliced_vbi_out(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.vbi);
- return ops->vidioc_s_fmt_vbi_out(file, fh, arg);
- case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
- if (unlikely(!is_tx || is_vid || !ops->vidioc_s_fmt_sliced_vbi_out))
+ case V4L2_BUF_TYPE_PRIVATE:
+ /* CLEAR_AFTER_FIELD(f, fmt.raw_data); <- does nothing */
+ if (ops->vidioc_s_fmt_type_private)
+ ret = ops->vidioc_s_fmt_type_private(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.sliced);
- return ops->vidioc_s_fmt_sliced_vbi_out(file, fh, arg);
+ }
+ break;
}
- return -EINVAL;
-}
-
-static int v4l_try_fmt(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_format *p = arg;
- struct video_device *vfd = video_devdata(file);
- bool is_vid = vfd->vfl_type == VFL_TYPE_GRABBER;
- bool is_rx = vfd->vfl_dir != VFL_DIR_TX;
- bool is_tx = vfd->vfl_dir != VFL_DIR_RX;
-
- switch (p->type) {
- case V4L2_BUF_TYPE_VIDEO_CAPTURE:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_try_fmt_vid_cap))
- break;
- CLEAR_AFTER_FIELD(p, fmt.pix);
- return ops->vidioc_try_fmt_vid_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_try_fmt_vid_cap_mplane))
+ case VIDIOC_TRY_FMT:
+ {
+ struct v4l2_format *f = (struct v4l2_format *)arg;
+
+ /* FIXME: Should be one dump per type */
+ dbgarg(cmd, "type=%s\n", prt_names(f->type,
+ v4l2_type_names));
+ switch (f->type) {
+ case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+ CLEAR_AFTER_FIELD(f, fmt.pix);
+ if (ops->vidioc_try_fmt_vid_cap)
+ ret = ops->vidioc_try_fmt_vid_cap(file, fh, f);
+ if (!ret)
+ v4l_print_pix_fmt(vfd, &f->fmt.pix);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix_mp);
- return ops->vidioc_try_fmt_vid_cap_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OVERLAY:
- if (unlikely(!is_rx || !is_vid || !ops->vidioc_try_fmt_vid_overlay))
+ case V4L2_BUF_TYPE_VIDEO_OVERLAY:
+ CLEAR_AFTER_FIELD(f, fmt.win);
+ if (ops->vidioc_try_fmt_vid_overlay)
+ ret = ops->vidioc_try_fmt_vid_overlay(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.win);
- return ops->vidioc_try_fmt_vid_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VBI_CAPTURE:
- if (unlikely(!is_rx || is_vid || !ops->vidioc_try_fmt_vbi_cap))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT:
+ CLEAR_AFTER_FIELD(f, fmt.pix);
+ if (ops->vidioc_try_fmt_vid_out)
+ ret = ops->vidioc_try_fmt_vid_out(file, fh, f);
+ if (!ret)
+ v4l_print_pix_fmt(vfd, &f->fmt.pix);
break;
- CLEAR_AFTER_FIELD(p, fmt.vbi);
- return ops->vidioc_try_fmt_vbi_cap(file, fh, arg);
- case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
- if (unlikely(!is_rx || is_vid || !ops->vidioc_try_fmt_sliced_vbi_cap))
+ case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
+ CLEAR_AFTER_FIELD(f, fmt.win);
+ if (ops->vidioc_try_fmt_vid_out_overlay)
+ ret = ops->vidioc_try_fmt_vid_out_overlay(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.sliced);
- return ops->vidioc_try_fmt_sliced_vbi_cap(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_try_fmt_vid_out))
+ case V4L2_BUF_TYPE_VBI_CAPTURE:
+ CLEAR_AFTER_FIELD(f, fmt.vbi);
+ if (ops->vidioc_try_fmt_vbi_cap)
+ ret = ops->vidioc_try_fmt_vbi_cap(file, fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix);
- return ops->vidioc_try_fmt_vid_out(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_try_fmt_vid_out_mplane))
+ case V4L2_BUF_TYPE_VBI_OUTPUT:
+ CLEAR_AFTER_FIELD(f, fmt.vbi);
+ if (ops->vidioc_try_fmt_vbi_out)
+ ret = ops->vidioc_try_fmt_vbi_out(file, fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.pix_mp);
- return ops->vidioc_try_fmt_vid_out_mplane(file, fh, arg);
- case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
- if (unlikely(!is_tx || !is_vid || !ops->vidioc_try_fmt_vid_out_overlay))
+ case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
+ CLEAR_AFTER_FIELD(f, fmt.sliced);
+ if (ops->vidioc_try_fmt_sliced_vbi_cap)
+ ret = ops->vidioc_try_fmt_sliced_vbi_cap(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.win);
- return ops->vidioc_try_fmt_vid_out_overlay(file, fh, arg);
- case V4L2_BUF_TYPE_VBI_OUTPUT:
- if (unlikely(!is_tx || is_vid || !ops->vidioc_try_fmt_vbi_out))
+ case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
+ CLEAR_AFTER_FIELD(f, fmt.sliced);
+ if (ops->vidioc_try_fmt_sliced_vbi_out)
+ ret = ops->vidioc_try_fmt_sliced_vbi_out(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.vbi);
- return ops->vidioc_try_fmt_vbi_out(file, fh, arg);
- case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
- if (unlikely(!is_tx || is_vid || !ops->vidioc_try_fmt_sliced_vbi_out))
+ case V4L2_BUF_TYPE_PRIVATE:
+ /* CLEAR_AFTER_FIELD(f, fmt.raw_data); <- does nothing */
+ if (ops->vidioc_try_fmt_type_private)
+ ret = ops->vidioc_try_fmt_type_private(file,
+ fh, f);
break;
- CLEAR_AFTER_FIELD(p, fmt.sliced);
- return ops->vidioc_try_fmt_sliced_vbi_out(file, fh, arg);
- }
- return -EINVAL;
-}
-
-static int v4l_streamon(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_streamon(file, fh, *(unsigned int *)arg);
-}
+ }
-static int v4l_streamoff(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_streamoff(file, fh, *(unsigned int *)arg);
-}
+ break;
+ }
+ /* FIXME: Those buf reqs could be handled here,
+ with some changes on videobuf to allow its header to be included at
+ videodev2.h or being merged at videodev2.
+ */
+ case VIDIOC_REQBUFS:
+ {
+ struct v4l2_requestbuffers *p = arg;
-static int v4l_g_tuner(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_tuner *p = arg;
- int err;
-
- p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
- V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
- err = ops->vidioc_g_tuner(file, fh, p);
- if (!err)
- p->capability |= V4L2_TUNER_CAP_FREQ_BANDS;
- return err;
-}
+ if (!ops->vidioc_reqbufs)
+ break;
+ ret = check_fmt(ops, p->type);
+ if (ret)
+ break;
-static int v4l_s_tuner(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_tuner *p = arg;
+ if (p->type < V4L2_BUF_TYPE_PRIVATE)
+ CLEAR_AFTER_FIELD(p, memory);
- p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
- V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
- return ops->vidioc_s_tuner(file, fh, p);
-}
+ ret = ops->vidioc_reqbufs(file, fh, p);
+ dbgarg(cmd, "count=%d, type=%s, memory=%s\n",
+ p->count,
+ prt_names(p->type, v4l2_type_names),
+ prt_names(p->memory, v4l2_memory_names));
+ break;
+ }
+ case VIDIOC_QUERYBUF:
+ {
+ struct v4l2_buffer *p = arg;
-static int v4l_g_modulator(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_modulator *p = arg;
- int err;
+ if (!ops->vidioc_querybuf)
+ break;
+ ret = check_fmt(ops, p->type);
+ if (ret)
+ break;
- err = ops->vidioc_g_modulator(file, fh, p);
- if (!err)
- p->capability |= V4L2_TUNER_CAP_FREQ_BANDS;
- return err;
-}
+ ret = ops->vidioc_querybuf(file, fh, p);
+ if (!ret)
+ dbgbuf(cmd, vfd, p);
+ break;
+ }
+ case VIDIOC_QBUF:
+ {
+ struct v4l2_buffer *p = arg;
-static int v4l_g_frequency(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_frequency *p = arg;
+ if (!ops->vidioc_qbuf)
+ break;
+ ret = check_fmt(ops, p->type);
+ if (ret)
+ break;
- p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
- V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
- return ops->vidioc_g_frequency(file, fh, p);
-}
+ ret = ops->vidioc_qbuf(file, fh, p);
+ if (!ret)
+ dbgbuf(cmd, vfd, p);
+ break;
+ }
+ case VIDIOC_DQBUF:
+ {
+ struct v4l2_buffer *p = arg;
-static int v4l_s_frequency(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_frequency *p = arg;
- enum v4l2_tuner_type type;
+ if (!ops->vidioc_dqbuf)
+ break;
+ ret = check_fmt(ops, p->type);
+ if (ret)
+ break;
- type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
- V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
- if (p->type != type)
- return -EINVAL;
- return ops->vidioc_s_frequency(file, fh, p);
-}
+ ret = ops->vidioc_dqbuf(file, fh, p);
+ if (!ret)
+ dbgbuf(cmd, vfd, p);
+ break;
+ }
+ case VIDIOC_OVERLAY:
+ {
+ int *i = arg;
-static int v4l_enumstd(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_standard *p = arg;
- v4l2_std_id id = vfd->tvnorms, curr_id = 0;
- unsigned int index = p->index, i, j = 0;
- const char *descr = "";
-
- /* Return -ENODATA if the tvnorms for the current input
- or output is 0, meaning that it doesn't support this API. */
- if (id == 0)
- return -ENODATA;
-
- /* Return norm array in a canonical way */
- for (i = 0; i <= index && id; i++) {
- /* last std value in the standards array is 0, so this
- while always ends there since (id & 0) == 0. */
- while ((id & standards[j].std) != standards[j].std)
- j++;
- curr_id = standards[j].std;
- descr = standards[j].descr;
- j++;
- if (curr_id == 0)
+ if (!ops->vidioc_overlay)
break;
- if (curr_id != V4L2_STD_PAL &&
- curr_id != V4L2_STD_SECAM &&
- curr_id != V4L2_STD_NTSC)
- id &= ~curr_id;
+ dbgarg(cmd, "value=%d\n", *i);
+ ret = ops->vidioc_overlay(file, fh, *i);
+ break;
}
- if (i <= index)
- return -EINVAL;
-
- v4l2_video_std_construct(p, curr_id, descr);
- return 0;
-}
-
-static int v4l_g_std(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- v4l2_std_id *id = arg;
+ case VIDIOC_G_FBUF:
+ {
+ struct v4l2_framebuffer *p = arg;
- /* Calls the specific handler */
- if (ops->vidioc_g_std)
- return ops->vidioc_g_std(file, fh, arg);
- if (vfd->current_norm) {
- *id = vfd->current_norm;
- return 0;
+ if (!ops->vidioc_g_fbuf)
+ break;
+ ret = ops->vidioc_g_fbuf(file, fh, arg);
+ if (!ret) {
+ dbgarg(cmd, "capability=0x%x, flags=%d, base=0x%08lx\n",
+ p->capability, p->flags,
+ (unsigned long)p->base);
+ v4l_print_pix_fmt(vfd, &p->fmt);
+ }
+ break;
}
- return -ENOTTY;
-}
-
-static int v4l_s_std(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- v4l2_std_id *id = arg, norm;
- int ret;
-
- norm = (*id) & vfd->tvnorms;
- if (vfd->tvnorms && !norm) /* Check if std is supported */
- return -EINVAL;
-
- /* Calls the specific handler */
- ret = ops->vidioc_s_std(file, fh, &norm);
-
- /* Updates standard information */
- if (ret >= 0)
- vfd->current_norm = norm;
- return ret;
-}
-
-static int v4l_querystd(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- v4l2_std_id *p = arg;
-
- /*
- * If nothing detected, it should return all supported
- * standard.
- * Drivers just need to mask the std argument, in order
- * to remove the standards that don't apply from the mask.
- * This means that tuners, audio and video decoders can join
- * their efforts to improve the standards detection.
- */
- *p = vfd->tvnorms;
- return ops->vidioc_querystd(file, fh, arg);
-}
-
-static int v4l_s_hw_freq_seek(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_hw_freq_seek *p = arg;
- enum v4l2_tuner_type type;
-
- type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
- V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
- if (p->type != type)
- return -EINVAL;
- return ops->vidioc_s_hw_freq_seek(file, fh, p);
-}
-
-static int v4l_overlay(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_overlay(file, fh, *(unsigned int *)arg);
-}
+ case VIDIOC_S_FBUF:
+ {
+ struct v4l2_framebuffer *p = arg;
-static int v4l_reqbufs(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_requestbuffers *p = arg;
- int ret = check_fmt(file, p->type);
+ if (!ops->vidioc_s_fbuf)
+ break;
+ dbgarg(cmd, "capability=0x%x, flags=%d, base=0x%08lx\n",
+ p->capability, p->flags, (unsigned long)p->base);
+ v4l_print_pix_fmt(vfd, &p->fmt);
+ ret = ops->vidioc_s_fbuf(file, fh, arg);
+ break;
+ }
+ case VIDIOC_STREAMON:
+ {
+ enum v4l2_buf_type i = *(int *)arg;
- if (ret)
- return ret;
+ if (!ops->vidioc_streamon)
+ break;
+ dbgarg(cmd, "type=%s\n", prt_names(i, v4l2_type_names));
+ ret = ops->vidioc_streamon(file, fh, i);
+ break;
+ }
+ case VIDIOC_STREAMOFF:
+ {
+ enum v4l2_buf_type i = *(int *)arg;
- CLEAR_AFTER_FIELD(p, memory);
+ if (!ops->vidioc_streamoff)
+ break;
+ dbgarg(cmd, "type=%s\n", prt_names(i, v4l2_type_names));
+ ret = ops->vidioc_streamoff(file, fh, i);
+ break;
+ }
+ /* ---------- tv norms ---------- */
+ case VIDIOC_ENUMSTD:
+ {
+ struct v4l2_standard *p = arg;
+ v4l2_std_id id = vfd->tvnorms, curr_id = 0;
+ unsigned int index = p->index, i, j = 0;
+ const char *descr = "";
+
+ /* Return norm array in a canonical way */
+ for (i = 0; i <= index && id; i++) {
+ /* last std value in the standards array is 0, so this
+ while always ends there since (id & 0) == 0. */
+ while ((id & standards[j].std) != standards[j].std)
+ j++;
+ curr_id = standards[j].std;
+ descr = standards[j].descr;
+ j++;
+ if (curr_id == 0)
+ break;
+ if (curr_id != V4L2_STD_PAL &&
+ curr_id != V4L2_STD_SECAM &&
+ curr_id != V4L2_STD_NTSC)
+ id &= ~curr_id;
+ }
+ if (i <= index)
+ return -EINVAL;
- return ops->vidioc_reqbufs(file, fh, p);
-}
+ v4l2_video_std_construct(p, curr_id, descr);
-static int v4l_querybuf(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_buffer *p = arg;
- int ret = check_fmt(file, p->type);
+ dbgarg(cmd, "index=%d, id=0x%Lx, name=%s, fps=%d/%d, "
+ "framelines=%d\n", p->index,
+ (unsigned long long)p->id, p->name,
+ p->frameperiod.numerator,
+ p->frameperiod.denominator,
+ p->framelines);
- return ret ? ret : ops->vidioc_querybuf(file, fh, p);
-}
+ ret = 0;
+ break;
+ }
+ case VIDIOC_G_STD:
+ {
+ v4l2_std_id *id = arg;
+
+ ret = 0;
+ /* Calls the specific handler */
+ if (ops->vidioc_g_std)
+ ret = ops->vidioc_g_std(file, fh, id);
+ else if (vfd->current_norm)
+ *id = vfd->current_norm;
+ else
+ ret = -EINVAL;
-static int v4l_qbuf(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_buffer *p = arg;
- int ret = check_fmt(file, p->type);
+ if (!ret)
+ dbgarg(cmd, "std=0x%08Lx\n", (long long unsigned)*id);
+ break;
+ }
+ case VIDIOC_S_STD:
+ {
+ v4l2_std_id *id = arg, norm;
- return ret ? ret : ops->vidioc_qbuf(file, fh, p);
-}
+ dbgarg(cmd, "std=%08Lx\n", (long long unsigned)*id);
-static int v4l_dqbuf(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_buffer *p = arg;
- int ret = check_fmt(file, p->type);
+ norm = (*id) & vfd->tvnorms;
+ if (vfd->tvnorms && !norm) /* Check if std is supported */
+ break;
- return ret ? ret : ops->vidioc_dqbuf(file, fh, p);
-}
+ /* Calls the specific handler */
+ if (ops->vidioc_s_std)
+ ret = ops->vidioc_s_std(file, fh, &norm);
+ else
+ ret = -EINVAL;
-static int v4l_create_bufs(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_create_buffers *create = arg;
- int ret = check_fmt(file, create->format.type);
+ /* Updates standard information */
+ if (ret >= 0)
+ vfd->current_norm = norm;
+ break;
+ }
+ case VIDIOC_QUERYSTD:
+ {
+ v4l2_std_id *p = arg;
- return ret ? ret : ops->vidioc_create_bufs(file, fh, create);
-}
+ if (!ops->vidioc_querystd)
+ break;
+ ret = ops->vidioc_querystd(file, fh, arg);
+ if (!ret)
+ dbgarg(cmd, "detected std=%08Lx\n",
+ (unsigned long long)*p);
+ break;
+ }
+ /* ------ input switching ---------- */
+ /* FIXME: Inputs can be handled inside videodev2 */
+ case VIDIOC_ENUMINPUT:
+ {
+ struct v4l2_input *p = arg;
-static int v4l_prepare_buf(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_buffer *b = arg;
- int ret = check_fmt(file, b->type);
+ if (!ops->vidioc_enum_input)
+ break;
- return ret ? ret : ops->vidioc_prepare_buf(file, fh, b);
-}
+ ret = ops->vidioc_enum_input(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "index=%d, name=%s, type=%d, "
+ "audioset=%d, "
+ "tuner=%d, std=%08Lx, status=%d\n",
+ p->index, p->name, p->type, p->audioset,
+ p->tuner,
+ (unsigned long long)p->std,
+ p->status);
+ break;
+ }
+ case VIDIOC_G_INPUT:
+ {
+ unsigned int *i = arg;
-static int v4l_g_parm(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_streamparm *p = arg;
- v4l2_std_id std;
- int ret = check_fmt(file, p->type);
+ if (!ops->vidioc_g_input)
+ break;
+ ret = ops->vidioc_g_input(file, fh, i);
+ if (!ret)
+ dbgarg(cmd, "value=%d\n", *i);
+ break;
+ }
+ case VIDIOC_S_INPUT:
+ {
+ unsigned int *i = arg;
- if (ret)
- return ret;
- if (ops->vidioc_g_parm)
- return ops->vidioc_g_parm(file, fh, p);
- std = vfd->current_norm;
- if (p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
- p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
- return -EINVAL;
- p->parm.capture.readbuffers = 2;
- if (ops->vidioc_g_std)
- ret = ops->vidioc_g_std(file, fh, &std);
- if (ret == 0)
- v4l2_video_std_frame_period(std,
- &p->parm.capture.timeperframe);
- return ret;
-}
+ if (!ops->vidioc_s_input)
+ break;
+ dbgarg(cmd, "value=%d\n", *i);
+ ret = ops->vidioc_s_input(file, fh, *i);
+ break;
+ }
-static int v4l_s_parm(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_streamparm *p = arg;
- int ret = check_fmt(file, p->type);
+ /* ------ output switching ---------- */
+ case VIDIOC_ENUMOUTPUT:
+ {
+ struct v4l2_output *p = arg;
- return ret ? ret : ops->vidioc_s_parm(file, fh, p);
-}
+ if (!ops->vidioc_enum_output)
+ break;
-static int v4l_queryctrl(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_queryctrl *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
-
- if (vfh && vfh->ctrl_handler)
- return v4l2_queryctrl(vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_queryctrl(vfd->ctrl_handler, p);
- if (ops->vidioc_queryctrl)
- return ops->vidioc_queryctrl(file, fh, p);
- return -ENOTTY;
-}
+ ret = ops->vidioc_enum_output(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "index=%d, name=%s, type=%d, "
+ "audioset=0x%x, "
+ "modulator=%d, std=0x%08Lx\n",
+ p->index, p->name, p->type, p->audioset,
+ p->modulator, (unsigned long long)p->std);
+ break;
+ }
+ case VIDIOC_G_OUTPUT:
+ {
+ unsigned int *i = arg;
-static int v4l_querymenu(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_querymenu *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
-
- if (vfh && vfh->ctrl_handler)
- return v4l2_querymenu(vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_querymenu(vfd->ctrl_handler, p);
- if (ops->vidioc_querymenu)
- return ops->vidioc_querymenu(file, fh, p);
- return -ENOTTY;
-}
+ if (!ops->vidioc_g_output)
+ break;
+ ret = ops->vidioc_g_output(file, fh, i);
+ if (!ret)
+ dbgarg(cmd, "value=%d\n", *i);
+ break;
+ }
+ case VIDIOC_S_OUTPUT:
+ {
+ unsigned int *i = arg;
-static int v4l_g_ctrl(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_control *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
- struct v4l2_ext_controls ctrls;
- struct v4l2_ext_control ctrl;
-
- if (vfh && vfh->ctrl_handler)
- return v4l2_g_ctrl(vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_g_ctrl(vfd->ctrl_handler, p);
- if (ops->vidioc_g_ctrl)
- return ops->vidioc_g_ctrl(file, fh, p);
- if (ops->vidioc_g_ext_ctrls == NULL)
- return -ENOTTY;
-
- ctrls.ctrl_class = V4L2_CTRL_ID2CLASS(p->id);
- ctrls.count = 1;
- ctrls.controls = &ctrl;
- ctrl.id = p->id;
- ctrl.value = p->value;
- if (check_ext_ctrls(&ctrls, 1)) {
- int ret = ops->vidioc_g_ext_ctrls(file, fh, &ctrls);
-
- if (ret == 0)
- p->value = ctrl.value;
- return ret;
+ if (!ops->vidioc_s_output)
+ break;
+ dbgarg(cmd, "value=%d\n", *i);
+ ret = ops->vidioc_s_output(file, fh, *i);
+ break;
}
- return -EINVAL;
-}
-static int v4l_s_ctrl(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_control *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
- struct v4l2_ext_controls ctrls;
- struct v4l2_ext_control ctrl;
-
- if (vfh && vfh->ctrl_handler)
- return v4l2_s_ctrl(vfh, vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_s_ctrl(NULL, vfd->ctrl_handler, p);
- if (ops->vidioc_s_ctrl)
- return ops->vidioc_s_ctrl(file, fh, p);
- if (ops->vidioc_s_ext_ctrls == NULL)
- return -ENOTTY;
-
- ctrls.ctrl_class = V4L2_CTRL_ID2CLASS(p->id);
- ctrls.count = 1;
- ctrls.controls = &ctrl;
- ctrl.id = p->id;
- ctrl.value = p->value;
- if (check_ext_ctrls(&ctrls, 1))
- return ops->vidioc_s_ext_ctrls(file, fh, &ctrls);
- return -EINVAL;
-}
+ /* --- controls ---------------------------------------------- */
+ case VIDIOC_QUERYCTRL:
+ {
+ struct v4l2_queryctrl *p = arg;
-static int v4l_g_ext_ctrls(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_ext_controls *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
-
- p->error_idx = p->count;
- if (vfh && vfh->ctrl_handler)
- return v4l2_g_ext_ctrls(vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_g_ext_ctrls(vfd->ctrl_handler, p);
- if (ops->vidioc_g_ext_ctrls == NULL)
- return -ENOTTY;
- return check_ext_ctrls(p, 0) ? ops->vidioc_g_ext_ctrls(file, fh, p) :
- -EINVAL;
-}
+ if (!ops->vidioc_queryctrl)
+ break;
+ ret = ops->vidioc_queryctrl(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "id=0x%x, type=%d, name=%s, min/max=%d/%d, "
+ "step=%d, default=%d, flags=0x%08x\n",
+ p->id, p->type, p->name,
+ p->minimum, p->maximum,
+ p->step, p->default_value, p->flags);
+ else
+ dbgarg(cmd, "id=0x%x\n", p->id);
+ break;
+ }
+ case VIDIOC_G_CTRL:
+ {
+ struct v4l2_control *p = arg;
+
+ if (ops->vidioc_g_ctrl)
+ ret = ops->vidioc_g_ctrl(file, fh, p);
+ else if (ops->vidioc_g_ext_ctrls) {
+ struct v4l2_ext_controls ctrls;
+ struct v4l2_ext_control ctrl;
+
+ ctrls.ctrl_class = V4L2_CTRL_ID2CLASS(p->id);
+ ctrls.count = 1;
+ ctrls.controls = &ctrl;
+ ctrl.id = p->id;
+ ctrl.value = p->value;
+ if (check_ext_ctrls(&ctrls, 1)) {
+ ret = ops->vidioc_g_ext_ctrls(file, fh, &ctrls);
+ if (ret == 0)
+ p->value = ctrl.value;
+ }
+ } else
+ break;
+ if (!ret)
+ dbgarg(cmd, "id=0x%x, value=%d\n", p->id, p->value);
+ else
+ dbgarg(cmd, "id=0x%x\n", p->id);
+ break;
+ }
+ case VIDIOC_S_CTRL:
+ {
+ struct v4l2_control *p = arg;
+ struct v4l2_ext_controls ctrls;
+ struct v4l2_ext_control ctrl;
-static int v4l_s_ext_ctrls(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_ext_controls *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
-
- p->error_idx = p->count;
- if (vfh && vfh->ctrl_handler)
- return v4l2_s_ext_ctrls(vfh, vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_s_ext_ctrls(NULL, vfd->ctrl_handler, p);
- if (ops->vidioc_s_ext_ctrls == NULL)
- return -ENOTTY;
- return check_ext_ctrls(p, 0) ? ops->vidioc_s_ext_ctrls(file, fh, p) :
- -EINVAL;
-}
+ if (!ops->vidioc_s_ctrl && !ops->vidioc_s_ext_ctrls)
+ break;
-static int v4l_try_ext_ctrls(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_ext_controls *p = arg;
- struct v4l2_fh *vfh =
- test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags) ? fh : NULL;
-
- p->error_idx = p->count;
- if (vfh && vfh->ctrl_handler)
- return v4l2_try_ext_ctrls(vfh->ctrl_handler, p);
- if (vfd->ctrl_handler)
- return v4l2_try_ext_ctrls(vfd->ctrl_handler, p);
- if (ops->vidioc_try_ext_ctrls == NULL)
- return -ENOTTY;
- return check_ext_ctrls(p, 0) ? ops->vidioc_try_ext_ctrls(file, fh, p) :
- -EINVAL;
-}
+ dbgarg(cmd, "id=0x%x, value=%d\n", p->id, p->value);
-static int v4l_g_crop(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_crop *p = arg;
- struct v4l2_selection s = {
- .type = p->type,
- };
- int ret;
-
- if (ops->vidioc_g_crop)
- return ops->vidioc_g_crop(file, fh, p);
- /* simulate capture crop using selection api */
-
- /* crop means compose for output devices */
- if (V4L2_TYPE_IS_OUTPUT(p->type))
- s.target = V4L2_SEL_TGT_COMPOSE_ACTIVE;
- else
- s.target = V4L2_SEL_TGT_CROP_ACTIVE;
-
- ret = ops->vidioc_g_selection(file, fh, &s);
-
- /* copying results to old structure on success */
- if (!ret)
- p->c = s.r;
- return ret;
-}
+ if (ops->vidioc_s_ctrl) {
+ ret = ops->vidioc_s_ctrl(file, fh, p);
+ break;
+ }
+ if (!ops->vidioc_s_ext_ctrls)
+ break;
-static int v4l_s_crop(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_crop *p = arg;
- struct v4l2_selection s = {
- .type = p->type,
- .r = p->c,
- };
-
- if (ops->vidioc_s_crop)
- return ops->vidioc_s_crop(file, fh, p);
- /* simulate capture crop using selection api */
-
- /* crop means compose for output devices */
- if (V4L2_TYPE_IS_OUTPUT(p->type))
- s.target = V4L2_SEL_TGT_COMPOSE_ACTIVE;
- else
- s.target = V4L2_SEL_TGT_CROP_ACTIVE;
-
- return ops->vidioc_s_selection(file, fh, &s);
-}
+ ctrls.ctrl_class = V4L2_CTRL_ID2CLASS(p->id);
+ ctrls.count = 1;
+ ctrls.controls = &ctrl;
+ ctrl.id = p->id;
+ ctrl.value = p->value;
+ if (check_ext_ctrls(&ctrls, 1))
+ ret = ops->vidioc_s_ext_ctrls(file, fh, &ctrls);
+ break;
+ }
+ case VIDIOC_G_EXT_CTRLS:
+ {
+ struct v4l2_ext_controls *p = arg;
-static int v4l_cropcap(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_cropcap *p = arg;
- struct v4l2_selection s = { .type = p->type };
- int ret;
+ p->error_idx = p->count;
+ if (!ops->vidioc_g_ext_ctrls)
+ break;
+ if (check_ext_ctrls(p, 0))
+ ret = ops->vidioc_g_ext_ctrls(file, fh, p);
+ v4l_print_ext_ctrls(cmd, vfd, p, !ret);
+ break;
+ }
+ case VIDIOC_S_EXT_CTRLS:
+ {
+ struct v4l2_ext_controls *p = arg;
- if (ops->vidioc_cropcap)
- return ops->vidioc_cropcap(file, fh, p);
+ p->error_idx = p->count;
+ if (!ops->vidioc_s_ext_ctrls)
+ break;
+ v4l_print_ext_ctrls(cmd, vfd, p, 1);
+ if (check_ext_ctrls(p, 0))
+ ret = ops->vidioc_s_ext_ctrls(file, fh, p);
+ break;
+ }
+ case VIDIOC_TRY_EXT_CTRLS:
+ {
+ struct v4l2_ext_controls *p = arg;
- /* obtaining bounds */
- if (V4L2_TYPE_IS_OUTPUT(p->type))
- s.target = V4L2_SEL_TGT_COMPOSE_BOUNDS;
- else
- s.target = V4L2_SEL_TGT_CROP_BOUNDS;
+ p->error_idx = p->count;
+ if (!ops->vidioc_try_ext_ctrls)
+ break;
+ v4l_print_ext_ctrls(cmd, vfd, p, 1);
+ if (check_ext_ctrls(p, 0))
+ ret = ops->vidioc_try_ext_ctrls(file, fh, p);
+ break;
+ }
+ case VIDIOC_QUERYMENU:
+ {
+ struct v4l2_querymenu *p = arg;
- ret = ops->vidioc_g_selection(file, fh, &s);
- if (ret)
- return ret;
- p->bounds = s.r;
+ if (!ops->vidioc_querymenu)
+ break;
+ ret = ops->vidioc_querymenu(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "id=0x%x, index=%d, name=%s\n",
+ p->id, p->index, p->name);
+ else
+ dbgarg(cmd, "id=0x%x, index=%d\n",
+ p->id, p->index);
+ break;
+ }
+ /* --- audio ---------------------------------------------- */
+ case VIDIOC_ENUMAUDIO:
+ {
+ struct v4l2_audio *p = arg;
- /* obtaining defrect */
- if (V4L2_TYPE_IS_OUTPUT(p->type))
- s.target = V4L2_SEL_TGT_COMPOSE_DEFAULT;
- else
- s.target = V4L2_SEL_TGT_CROP_DEFAULT;
+ if (!ops->vidioc_enumaudio)
+ break;
+ ret = ops->vidioc_enumaudio(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "index=%d, name=%s, capability=0x%x, "
+ "mode=0x%x\n", p->index, p->name,
+ p->capability, p->mode);
+ else
+ dbgarg(cmd, "index=%d\n", p->index);
+ break;
+ }
+ case VIDIOC_G_AUDIO:
+ {
+ struct v4l2_audio *p = arg;
- ret = ops->vidioc_g_selection(file, fh, &s);
- if (ret)
- return ret;
- p->defrect = s.r;
+ if (!ops->vidioc_g_audio)
+ break;
- /* setting trivial pixelaspect */
- p->pixelaspect.numerator = 1;
- p->pixelaspect.denominator = 1;
- return 0;
-}
+ ret = ops->vidioc_g_audio(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "index=%d, name=%s, capability=0x%x, "
+ "mode=0x%x\n", p->index,
+ p->name, p->capability, p->mode);
+ else
+ dbgarg(cmd, "index=%d\n", p->index);
+ break;
+ }
+ case VIDIOC_S_AUDIO:
+ {
+ struct v4l2_audio *p = arg;
-static int v4l_log_status(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- int ret;
-
- if (vfd->v4l2_dev)
- pr_info("%s: ================= START STATUS =================\n",
- vfd->v4l2_dev->name);
- ret = ops->vidioc_log_status(file, fh);
- if (vfd->v4l2_dev)
- pr_info("%s: ================== END STATUS ==================\n",
- vfd->v4l2_dev->name);
- return ret;
-}
+ if (!ops->vidioc_s_audio)
+ break;
+ dbgarg(cmd, "index=%d, name=%s, capability=0x%x, "
+ "mode=0x%x\n", p->index, p->name,
+ p->capability, p->mode);
+ ret = ops->vidioc_s_audio(file, fh, p);
+ break;
+ }
+ case VIDIOC_ENUMAUDOUT:
+ {
+ struct v4l2_audioout *p = arg;
-static int v4l_dbg_g_register(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
-#ifdef CONFIG_VIDEO_ADV_DEBUG
- struct v4l2_dbg_register *p = arg;
+ if (!ops->vidioc_enumaudout)
+ break;
+ dbgarg(cmd, "Enum for index=%d\n", p->index);
+ ret = ops->vidioc_enumaudout(file, fh, p);
+ if (!ret)
+ dbgarg2("index=%d, name=%s, capability=%d, "
+ "mode=%d\n", p->index, p->name,
+ p->capability, p->mode);
+ break;
+ }
+ case VIDIOC_G_AUDOUT:
+ {
+ struct v4l2_audioout *p = arg;
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
- return ops->vidioc_g_register(file, fh, p);
-#else
- return -ENOTTY;
-#endif
-}
+ if (!ops->vidioc_g_audout)
+ break;
-static int v4l_dbg_s_register(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
-#ifdef CONFIG_VIDEO_ADV_DEBUG
- struct v4l2_dbg_register *p = arg;
+ ret = ops->vidioc_g_audout(file, fh, p);
+ if (!ret)
+ dbgarg2("index=%d, name=%s, capability=%d, "
+ "mode=%d\n", p->index, p->name,
+ p->capability, p->mode);
+ break;
+ }
+ case VIDIOC_S_AUDOUT:
+ {
+ struct v4l2_audioout *p = arg;
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
- return ops->vidioc_s_register(file, fh, p);
-#else
- return -ENOTTY;
-#endif
-}
+ if (!ops->vidioc_s_audout)
+ break;
+ dbgarg(cmd, "index=%d, name=%s, capability=%d, "
+ "mode=%d\n", p->index, p->name,
+ p->capability, p->mode);
-static int v4l_dbg_g_chip_ident(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_dbg_chip_ident *p = arg;
+ ret = ops->vidioc_s_audout(file, fh, p);
+ break;
+ }
+ case VIDIOC_G_MODULATOR:
+ {
+ struct v4l2_modulator *p = arg;
- p->ident = V4L2_IDENT_NONE;
- p->revision = 0;
- return ops->vidioc_g_chip_ident(file, fh, p);
-}
+ if (!ops->vidioc_g_modulator)
+ break;
+ ret = ops->vidioc_g_modulator(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "index=%d, name=%s, "
+ "capability=%d, rangelow=%d,"
+ " rangehigh=%d, txsubchans=%d\n",
+ p->index, p->name, p->capability,
+ p->rangelow, p->rangehigh,
+ p->txsubchans);
+ break;
+ }
+ case VIDIOC_S_MODULATOR:
+ {
+ struct v4l2_modulator *p = arg;
-static int v4l_dqevent(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return v4l2_event_dequeue(fh, arg, file->f_flags & O_NONBLOCK);
-}
+ if (!ops->vidioc_s_modulator)
+ break;
+ dbgarg(cmd, "index=%d, name=%s, capability=%d, "
+ "rangelow=%d, rangehigh=%d, txsubchans=%d\n",
+ p->index, p->name, p->capability, p->rangelow,
+ p->rangehigh, p->txsubchans);
+ ret = ops->vidioc_s_modulator(file, fh, p);
+ break;
+ }
+ case VIDIOC_G_CROP:
+ {
+ struct v4l2_crop *p = arg;
-static int v4l_subscribe_event(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_subscribe_event(fh, arg);
-}
+ if (!ops->vidioc_g_crop)
+ break;
-static int v4l_unsubscribe_event(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- return ops->vidioc_unsubscribe_event(fh, arg);
-}
+ dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
+ ret = ops->vidioc_g_crop(file, fh, p);
+ if (!ret)
+ dbgrect(vfd, "", &p->c);
+ break;
+ }
+ case VIDIOC_S_CROP:
+ {
+ struct v4l2_crop *p = arg;
-static int v4l_g_sliced_vbi_cap(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct v4l2_sliced_vbi_cap *p = arg;
- int ret = check_fmt(file, p->type);
+ if (!ops->vidioc_s_crop)
+ break;
+ dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
+ dbgrect(vfd, "", &p->c);
+ ret = ops->vidioc_s_crop(file, fh, p);
+ break;
+ }
+ case VIDIOC_CROPCAP:
+ {
+ struct v4l2_cropcap *p = arg;
- if (ret)
- return ret;
+ /*FIXME: Should also show v4l2_fract pixelaspect */
+ if (!ops->vidioc_cropcap)
+ break;
- /* Clear up to type, everything after type is zeroed already */
- memset(p, 0, offsetof(struct v4l2_sliced_vbi_cap, type));
+ dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
+ ret = ops->vidioc_cropcap(file, fh, p);
+ if (!ret) {
+ dbgrect(vfd, "bounds ", &p->bounds);
+ dbgrect(vfd, "defrect ", &p->defrect);
+ }
+ break;
+ }
+ case VIDIOC_G_JPEGCOMP:
+ {
+ struct v4l2_jpegcompression *p = arg;
- return ops->vidioc_g_sliced_vbi_cap(file, fh, p);
-}
+ if (!ops->vidioc_g_jpegcomp)
+ break;
-static int v4l_enum_freq_bands(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- struct v4l2_frequency_band *p = arg;
- enum v4l2_tuner_type type;
- int err;
+ ret = ops->vidioc_g_jpegcomp(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "quality=%d, APPn=%d, "
+ "APP_len=%d, COM_len=%d, "
+ "jpeg_markers=%d\n",
+ p->quality, p->APPn, p->APP_len,
+ p->COM_len, p->jpeg_markers);
+ break;
+ }
+ case VIDIOC_S_JPEGCOMP:
+ {
+ struct v4l2_jpegcompression *p = arg;
- type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
- V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
+ if (!ops->vidioc_g_jpegcomp)
+ break;
+ dbgarg(cmd, "quality=%d, APPn=%d, APP_len=%d, "
+ "COM_len=%d, jpeg_markers=%d\n",
+ p->quality, p->APPn, p->APP_len,
+ p->COM_len, p->jpeg_markers);
+ ret = ops->vidioc_s_jpegcomp(file, fh, p);
+ break;
+ }
+ case VIDIOC_G_ENC_INDEX:
+ {
+ struct v4l2_enc_idx *p = arg;
- if (type != p->type)
- return -EINVAL;
- if (ops->vidioc_enum_freq_bands)
- return ops->vidioc_enum_freq_bands(file, fh, p);
- if (ops->vidioc_g_tuner) {
- struct v4l2_tuner t = {
- .index = p->tuner,
- .type = type,
- };
-
- if (p->index)
- return -EINVAL;
- err = ops->vidioc_g_tuner(file, fh, &t);
- if (err)
- return err;
- p->capability = t.capability | V4L2_TUNER_CAP_FREQ_BANDS;
- p->rangelow = t.rangelow;
- p->rangehigh = t.rangehigh;
- p->modulation = (type == V4L2_TUNER_RADIO) ?
- V4L2_BAND_MODULATION_FM : V4L2_BAND_MODULATION_VSB;
- return 0;
+ if (!ops->vidioc_g_enc_index)
+ break;
+ ret = ops->vidioc_g_enc_index(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "entries=%d, entries_cap=%d\n",
+ p->entries, p->entries_cap);
+ break;
}
- if (ops->vidioc_g_modulator) {
- struct v4l2_modulator m = {
- .index = p->tuner,
- };
+ case VIDIOC_ENCODER_CMD:
+ {
+ struct v4l2_encoder_cmd *p = arg;
- if (type != V4L2_TUNER_RADIO)
- return -EINVAL;
- if (p->index)
- return -EINVAL;
- err = ops->vidioc_g_modulator(file, fh, &m);
- if (err)
- return err;
- p->capability = m.capability | V4L2_TUNER_CAP_FREQ_BANDS;
- p->rangelow = m.rangelow;
- p->rangehigh = m.rangehigh;
- p->modulation = (type == V4L2_TUNER_RADIO) ?
- V4L2_BAND_MODULATION_FM : V4L2_BAND_MODULATION_VSB;
- return 0;
+ if (!ops->vidioc_encoder_cmd)
+ break;
+ ret = ops->vidioc_encoder_cmd(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "cmd=%d, flags=%x\n", p->cmd, p->flags);
+ break;
}
- return -ENOTTY;
-}
+ case VIDIOC_TRY_ENCODER_CMD:
+ {
+ struct v4l2_encoder_cmd *p = arg;
-struct v4l2_ioctl_info {
- unsigned int ioctl;
- u32 flags;
- const char * const name;
- union {
- u32 offset;
- int (*func)(const struct v4l2_ioctl_ops *ops,
- struct file *file, void *fh, void *p);
- } u;
- void (*debug)(const void *arg, bool write_only);
-};
+ if (!ops->vidioc_try_encoder_cmd)
+ break;
+ ret = ops->vidioc_try_encoder_cmd(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "cmd=%d, flags=%x\n", p->cmd, p->flags);
+ break;
+ }
+ case VIDIOC_G_PARM:
+ {
+ struct v4l2_streamparm *p = arg;
-/* This control needs a priority check */
-#define INFO_FL_PRIO (1 << 0)
-/* This control can be valid if the filehandle passes a control handler. */
-#define INFO_FL_CTRL (1 << 1)
-/* This is a standard ioctl, no need for special code */
-#define INFO_FL_STD (1 << 2)
-/* This is ioctl has its own function */
-#define INFO_FL_FUNC (1 << 3)
-/* Queuing ioctl */
-#define INFO_FL_QUEUE (1 << 4)
-/* Zero struct from after the field to the end */
-#define INFO_FL_CLEAR(v4l2_struct, field) \
- ((offsetof(struct v4l2_struct, field) + \
- sizeof(((struct v4l2_struct *)0)->field)) << 16)
-#define INFO_FL_CLEAR_MASK (_IOC_SIZEMASK << 16)
-
-#define IOCTL_INFO_STD(_ioctl, _vidioc, _debug, _flags) \
- [_IOC_NR(_ioctl)] = { \
- .ioctl = _ioctl, \
- .flags = _flags | INFO_FL_STD, \
- .name = #_ioctl, \
- .u.offset = offsetof(struct v4l2_ioctl_ops, _vidioc), \
- .debug = _debug, \
- }
-
-#define IOCTL_INFO_FNC(_ioctl, _func, _debug, _flags) \
- [_IOC_NR(_ioctl)] = { \
- .ioctl = _ioctl, \
- .flags = _flags | INFO_FL_FUNC, \
- .name = #_ioctl, \
- .u.func = _func, \
- .debug = _debug, \
- }
-
-static struct v4l2_ioctl_info v4l2_ioctls[] = {
- IOCTL_INFO_FNC(VIDIOC_QUERYCAP, v4l_querycap, v4l_print_querycap, 0),
- IOCTL_INFO_FNC(VIDIOC_ENUM_FMT, v4l_enum_fmt, v4l_print_fmtdesc, INFO_FL_CLEAR(v4l2_fmtdesc, type)),
- IOCTL_INFO_FNC(VIDIOC_G_FMT, v4l_g_fmt, v4l_print_format, INFO_FL_CLEAR(v4l2_format, type)),
- IOCTL_INFO_FNC(VIDIOC_S_FMT, v4l_s_fmt, v4l_print_format, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_REQBUFS, v4l_reqbufs, v4l_print_requestbuffers, INFO_FL_PRIO | INFO_FL_QUEUE),
- IOCTL_INFO_FNC(VIDIOC_QUERYBUF, v4l_querybuf, v4l_print_buffer, INFO_FL_QUEUE | INFO_FL_CLEAR(v4l2_buffer, length)),
- IOCTL_INFO_STD(VIDIOC_G_FBUF, vidioc_g_fbuf, v4l_print_framebuffer, 0),
- IOCTL_INFO_STD(VIDIOC_S_FBUF, vidioc_s_fbuf, v4l_print_framebuffer, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_OVERLAY, v4l_overlay, v4l_print_u32, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_QBUF, v4l_qbuf, v4l_print_buffer, INFO_FL_QUEUE),
- IOCTL_INFO_STD(VIDIOC_EXPBUF, vidioc_expbuf, v4l_print_exportbuffer, INFO_FL_QUEUE | INFO_FL_CLEAR(v4l2_exportbuffer, flags)),
- IOCTL_INFO_FNC(VIDIOC_DQBUF, v4l_dqbuf, v4l_print_buffer, INFO_FL_QUEUE),
- IOCTL_INFO_FNC(VIDIOC_STREAMON, v4l_streamon, v4l_print_buftype, INFO_FL_PRIO | INFO_FL_QUEUE),
- IOCTL_INFO_FNC(VIDIOC_STREAMOFF, v4l_streamoff, v4l_print_buftype, INFO_FL_PRIO | INFO_FL_QUEUE),
- IOCTL_INFO_FNC(VIDIOC_G_PARM, v4l_g_parm, v4l_print_streamparm, INFO_FL_CLEAR(v4l2_streamparm, type)),
- IOCTL_INFO_FNC(VIDIOC_S_PARM, v4l_s_parm, v4l_print_streamparm, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_G_STD, v4l_g_std, v4l_print_std, 0),
- IOCTL_INFO_FNC(VIDIOC_S_STD, v4l_s_std, v4l_print_std, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_ENUMSTD, v4l_enumstd, v4l_print_standard, INFO_FL_CLEAR(v4l2_standard, index)),
- IOCTL_INFO_FNC(VIDIOC_ENUMINPUT, v4l_enuminput, v4l_print_enuminput, INFO_FL_CLEAR(v4l2_input, index)),
- IOCTL_INFO_FNC(VIDIOC_G_CTRL, v4l_g_ctrl, v4l_print_control, INFO_FL_CTRL | INFO_FL_CLEAR(v4l2_control, id)),
- IOCTL_INFO_FNC(VIDIOC_S_CTRL, v4l_s_ctrl, v4l_print_control, INFO_FL_PRIO | INFO_FL_CTRL),
- IOCTL_INFO_FNC(VIDIOC_G_TUNER, v4l_g_tuner, v4l_print_tuner, INFO_FL_CLEAR(v4l2_tuner, index)),
- IOCTL_INFO_FNC(VIDIOC_S_TUNER, v4l_s_tuner, v4l_print_tuner, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_G_AUDIO, vidioc_g_audio, v4l_print_audio, 0),
- IOCTL_INFO_STD(VIDIOC_S_AUDIO, vidioc_s_audio, v4l_print_audio, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_QUERYCTRL, v4l_queryctrl, v4l_print_queryctrl, INFO_FL_CTRL | INFO_FL_CLEAR(v4l2_queryctrl, id)),
- IOCTL_INFO_FNC(VIDIOC_QUERYMENU, v4l_querymenu, v4l_print_querymenu, INFO_FL_CTRL | INFO_FL_CLEAR(v4l2_querymenu, index)),
- IOCTL_INFO_STD(VIDIOC_G_INPUT, vidioc_g_input, v4l_print_u32, 0),
- IOCTL_INFO_FNC(VIDIOC_S_INPUT, v4l_s_input, v4l_print_u32, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_G_OUTPUT, vidioc_g_output, v4l_print_u32, 0),
- IOCTL_INFO_FNC(VIDIOC_S_OUTPUT, v4l_s_output, v4l_print_u32, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_ENUMOUTPUT, v4l_enumoutput, v4l_print_enumoutput, INFO_FL_CLEAR(v4l2_output, index)),
- IOCTL_INFO_STD(VIDIOC_G_AUDOUT, vidioc_g_audout, v4l_print_audioout, 0),
- IOCTL_INFO_STD(VIDIOC_S_AUDOUT, vidioc_s_audout, v4l_print_audioout, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_G_MODULATOR, v4l_g_modulator, v4l_print_modulator, INFO_FL_CLEAR(v4l2_modulator, index)),
- IOCTL_INFO_STD(VIDIOC_S_MODULATOR, vidioc_s_modulator, v4l_print_modulator, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_G_FREQUENCY, v4l_g_frequency, v4l_print_frequency, INFO_FL_CLEAR(v4l2_frequency, tuner)),
- IOCTL_INFO_FNC(VIDIOC_S_FREQUENCY, v4l_s_frequency, v4l_print_frequency, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_CROPCAP, v4l_cropcap, v4l_print_cropcap, INFO_FL_CLEAR(v4l2_cropcap, type)),
- IOCTL_INFO_FNC(VIDIOC_G_CROP, v4l_g_crop, v4l_print_crop, INFO_FL_CLEAR(v4l2_crop, type)),
- IOCTL_INFO_FNC(VIDIOC_S_CROP, v4l_s_crop, v4l_print_crop, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_G_SELECTION, vidioc_g_selection, v4l_print_selection, 0),
- IOCTL_INFO_STD(VIDIOC_S_SELECTION, vidioc_s_selection, v4l_print_selection, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_G_JPEGCOMP, vidioc_g_jpegcomp, v4l_print_jpegcompression, 0),
- IOCTL_INFO_STD(VIDIOC_S_JPEGCOMP, vidioc_s_jpegcomp, v4l_print_jpegcompression, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_QUERYSTD, v4l_querystd, v4l_print_std, 0),
- IOCTL_INFO_FNC(VIDIOC_TRY_FMT, v4l_try_fmt, v4l_print_format, 0),
- IOCTL_INFO_STD(VIDIOC_ENUMAUDIO, vidioc_enumaudio, v4l_print_audio, INFO_FL_CLEAR(v4l2_audio, index)),
- IOCTL_INFO_STD(VIDIOC_ENUMAUDOUT, vidioc_enumaudout, v4l_print_audioout, INFO_FL_CLEAR(v4l2_audioout, index)),
- IOCTL_INFO_FNC(VIDIOC_G_PRIORITY, v4l_g_priority, v4l_print_u32, 0),
- IOCTL_INFO_FNC(VIDIOC_S_PRIORITY, v4l_s_priority, v4l_print_u32, INFO_FL_PRIO),
- IOCTL_INFO_FNC(VIDIOC_G_SLICED_VBI_CAP, v4l_g_sliced_vbi_cap, v4l_print_sliced_vbi_cap, INFO_FL_CLEAR(v4l2_sliced_vbi_cap, type)),
- IOCTL_INFO_FNC(VIDIOC_LOG_STATUS, v4l_log_status, v4l_print_newline, 0),
- IOCTL_INFO_FNC(VIDIOC_G_EXT_CTRLS, v4l_g_ext_ctrls, v4l_print_ext_controls, INFO_FL_CTRL),
- IOCTL_INFO_FNC(VIDIOC_S_EXT_CTRLS, v4l_s_ext_ctrls, v4l_print_ext_controls, INFO_FL_PRIO | INFO_FL_CTRL),
- IOCTL_INFO_FNC(VIDIOC_TRY_EXT_CTRLS, v4l_try_ext_ctrls, v4l_print_ext_controls, INFO_FL_CTRL),
- IOCTL_INFO_STD(VIDIOC_ENUM_FRAMESIZES, vidioc_enum_framesizes, v4l_print_frmsizeenum, INFO_FL_CLEAR(v4l2_frmsizeenum, pixel_format)),
- IOCTL_INFO_STD(VIDIOC_ENUM_FRAMEINTERVALS, vidioc_enum_frameintervals, v4l_print_frmivalenum, INFO_FL_CLEAR(v4l2_frmivalenum, height)),
- IOCTL_INFO_STD(VIDIOC_G_ENC_INDEX, vidioc_g_enc_index, v4l_print_enc_idx, 0),
- IOCTL_INFO_STD(VIDIOC_ENCODER_CMD, vidioc_encoder_cmd, v4l_print_encoder_cmd, INFO_FL_PRIO | INFO_FL_CLEAR(v4l2_encoder_cmd, flags)),
- IOCTL_INFO_STD(VIDIOC_TRY_ENCODER_CMD, vidioc_try_encoder_cmd, v4l_print_encoder_cmd, INFO_FL_CLEAR(v4l2_encoder_cmd, flags)),
- IOCTL_INFO_STD(VIDIOC_DECODER_CMD, vidioc_decoder_cmd, v4l_print_decoder_cmd, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_TRY_DECODER_CMD, vidioc_try_decoder_cmd, v4l_print_decoder_cmd, 0),
- IOCTL_INFO_FNC(VIDIOC_DBG_S_REGISTER, v4l_dbg_s_register, v4l_print_dbg_register, 0),
- IOCTL_INFO_FNC(VIDIOC_DBG_G_REGISTER, v4l_dbg_g_register, v4l_print_dbg_register, 0),
- IOCTL_INFO_FNC(VIDIOC_DBG_G_CHIP_IDENT, v4l_dbg_g_chip_ident, v4l_print_dbg_chip_ident, 0),
- IOCTL_INFO_FNC(VIDIOC_S_HW_FREQ_SEEK, v4l_s_hw_freq_seek, v4l_print_hw_freq_seek, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_ENUM_DV_PRESETS, vidioc_enum_dv_presets, v4l_print_dv_enum_presets, 0),
- IOCTL_INFO_STD(VIDIOC_S_DV_PRESET, vidioc_s_dv_preset, v4l_print_dv_preset, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_G_DV_PRESET, vidioc_g_dv_preset, v4l_print_dv_preset, 0),
- IOCTL_INFO_STD(VIDIOC_QUERY_DV_PRESET, vidioc_query_dv_preset, v4l_print_dv_preset, 0),
- IOCTL_INFO_STD(VIDIOC_S_DV_TIMINGS, vidioc_s_dv_timings, v4l_print_dv_timings, INFO_FL_PRIO),
- IOCTL_INFO_STD(VIDIOC_G_DV_TIMINGS, vidioc_g_dv_timings, v4l_print_dv_timings, 0),
- IOCTL_INFO_FNC(VIDIOC_DQEVENT, v4l_dqevent, v4l_print_event, 0),
- IOCTL_INFO_FNC(VIDIOC_SUBSCRIBE_EVENT, v4l_subscribe_event, v4l_print_event_subscription, 0),
- IOCTL_INFO_FNC(VIDIOC_UNSUBSCRIBE_EVENT, v4l_unsubscribe_event, v4l_print_event_subscription, 0),
- IOCTL_INFO_FNC(VIDIOC_CREATE_BUFS, v4l_create_bufs, v4l_print_create_buffers, INFO_FL_PRIO | INFO_FL_QUEUE),
- IOCTL_INFO_FNC(VIDIOC_PREPARE_BUF, v4l_prepare_buf, v4l_print_buffer, INFO_FL_QUEUE),
- IOCTL_INFO_STD(VIDIOC_ENUM_DV_TIMINGS, vidioc_enum_dv_timings, v4l_print_enum_dv_timings, 0),
- IOCTL_INFO_STD(VIDIOC_QUERY_DV_TIMINGS, vidioc_query_dv_timings, v4l_print_dv_timings, 0),
- IOCTL_INFO_STD(VIDIOC_DV_TIMINGS_CAP, vidioc_dv_timings_cap, v4l_print_dv_timings_cap, INFO_FL_CLEAR(v4l2_dv_timings_cap, type)),
- IOCTL_INFO_FNC(VIDIOC_ENUM_FREQ_BANDS, v4l_enum_freq_bands, v4l_print_freq_band, 0),
-};
-#define V4L2_IOCTLS ARRAY_SIZE(v4l2_ioctls)
+ if (ops->vidioc_g_parm) {
+ ret = check_fmt(ops, p->type);
+ if (ret)
+ break;
+ ret = ops->vidioc_g_parm(file, fh, p);
+ } else {
+ v4l2_std_id std = vfd->current_norm;
-bool v4l2_is_known_ioctl(unsigned int cmd)
-{
- if (_IOC_NR(cmd) >= V4L2_IOCTLS)
- return false;
- return v4l2_ioctls[_IOC_NR(cmd)].ioctl == cmd;
-}
+ if (p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+ return -EINVAL;
-struct mutex *v4l2_ioctl_get_lock(struct video_device *vdev, unsigned cmd)
-{
- if (_IOC_NR(cmd) >= V4L2_IOCTLS)
- return vdev->lock;
- if (test_bit(_IOC_NR(cmd), vdev->disable_locking))
- return NULL;
- if (vdev->queue && vdev->queue->lock &&
- (v4l2_ioctls[_IOC_NR(cmd)].flags & INFO_FL_QUEUE))
- return vdev->queue->lock;
- return vdev->lock;
-}
+ ret = 0;
+ if (ops->vidioc_g_std)
+ ret = ops->vidioc_g_std(file, fh, &std);
+ else if (std == 0)
+ ret = -EINVAL;
+ if (ret == 0)
+ v4l2_video_std_frame_period(std,
+ &p->parm.capture.timeperframe);
+ }
-/* Common ioctl debug function. This function can be used by
- external ioctl messages as well as internal V4L ioctl */
-void v4l_printk_ioctl(const char *prefix, unsigned int cmd)
-{
- const char *dir, *type;
+ dbgarg(cmd, "type=%d\n", p->type);
+ break;
+ }
+ case VIDIOC_S_PARM:
+ {
+ struct v4l2_streamparm *p = arg;
- if (prefix)
- printk(KERN_DEBUG "%s: ", prefix);
+ if (!ops->vidioc_s_parm)
+ break;
+ ret = check_fmt(ops, p->type);
+ if (ret)
+ break;
- switch (_IOC_TYPE(cmd)) {
- case 'd':
- type = "v4l2_int";
+ dbgarg(cmd, "type=%d\n", p->type);
+ ret = ops->vidioc_s_parm(file, fh, p);
break;
- case 'V':
- if (_IOC_NR(cmd) >= V4L2_IOCTLS) {
- type = "v4l2";
+ }
+ case VIDIOC_G_TUNER:
+ {
+ struct v4l2_tuner *p = arg;
+
+ if (!ops->vidioc_g_tuner)
break;
- }
- pr_cont("%s", v4l2_ioctls[_IOC_NR(cmd)].name);
- return;
- default:
- type = "unknown";
+
+ ret = ops->vidioc_g_tuner(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "index=%d, name=%s, type=%d, "
+ "capability=0x%x, rangelow=%d, "
+ "rangehigh=%d, signal=%d, afc=%d, "
+ "rxsubchans=0x%x, audmode=%d\n",
+ p->index, p->name, p->type,
+ p->capability, p->rangelow,
+ p->rangehigh, p->signal, p->afc,
+ p->rxsubchans, p->audmode);
break;
}
+ case VIDIOC_S_TUNER:
+ {
+ struct v4l2_tuner *p = arg;
- switch (_IOC_DIR(cmd)) {
- case _IOC_NONE: dir = "--"; break;
- case _IOC_READ: dir = "r-"; break;
- case _IOC_WRITE: dir = "-w"; break;
- case _IOC_READ | _IOC_WRITE: dir = "rw"; break;
- default: dir = "*ERR*"; break;
+ if (!ops->vidioc_s_tuner)
+ break;
+ dbgarg(cmd, "index=%d, name=%s, type=%d, "
+ "capability=0x%x, rangelow=%d, "
+ "rangehigh=%d, signal=%d, afc=%d, "
+ "rxsubchans=0x%x, audmode=%d\n",
+ p->index, p->name, p->type,
+ p->capability, p->rangelow,
+ p->rangehigh, p->signal, p->afc,
+ p->rxsubchans, p->audmode);
+ ret = ops->vidioc_s_tuner(file, fh, p);
+ break;
}
- pr_cont("%s ioctl '%c', dir=%s, #%d (0x%08x)",
- type, _IOC_TYPE(cmd), dir, _IOC_NR(cmd), cmd);
-}
-EXPORT_SYMBOL(v4l_printk_ioctl);
+ case VIDIOC_G_FREQUENCY:
+ {
+ struct v4l2_frequency *p = arg;
-static long __video_do_ioctl(struct file *file,
- unsigned int cmd, void *arg)
-{
- struct video_device *vfd = video_devdata(file);
- const struct v4l2_ioctl_ops *ops = vfd->ioctl_ops;
- bool write_only = false;
- struct v4l2_ioctl_info default_info;
- const struct v4l2_ioctl_info *info;
- void *fh = file->private_data;
- struct v4l2_fh *vfh = NULL;
- int use_fh_prio = 0;
- int debug = vfd->debug;
- long ret = -ENOTTY;
+ if (!ops->vidioc_g_frequency)
+ break;
- if (ops == NULL) {
- pr_warn("%s: has no ioctl_ops.\n",
- video_device_node_name(vfd));
- return ret;
+ ret = ops->vidioc_g_frequency(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "tuner=%d, type=%d, frequency=%d\n",
+ p->tuner, p->type, p->frequency);
+ break;
}
+ case VIDIOC_S_FREQUENCY:
+ {
+ struct v4l2_frequency *p = arg;
- if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) {
- vfh = file->private_data;
- use_fh_prio = test_bit(V4L2_FL_USE_FH_PRIO, &vfd->flags);
+ if (!ops->vidioc_s_frequency)
+ break;
+ dbgarg(cmd, "tuner=%d, type=%d, frequency=%d\n",
+ p->tuner, p->type, p->frequency);
+ ret = ops->vidioc_s_frequency(file, fh, p);
+ break;
}
+ case VIDIOC_G_SLICED_VBI_CAP:
+ {
+ struct v4l2_sliced_vbi_cap *p = arg;
- if (v4l2_is_known_ioctl(cmd)) {
- info = &v4l2_ioctls[_IOC_NR(cmd)];
+ if (!ops->vidioc_g_sliced_vbi_cap)
+ break;
- if (!test_bit(_IOC_NR(cmd), vfd->valid_ioctls) &&
- !((info->flags & INFO_FL_CTRL) && vfh && vfh->ctrl_handler))
- goto done;
+ /* Clear up to type, everything after type is zerod already */
+ memset(p, 0, offsetof(struct v4l2_sliced_vbi_cap, type));
- if (use_fh_prio && (info->flags & INFO_FL_PRIO)) {
- ret = v4l2_prio_check(vfd->prio, vfh->prio);
- if (ret)
- goto done;
- }
- } else {
- default_info.ioctl = cmd;
- default_info.flags = 0;
- default_info.debug = v4l_print_default;
- info = &default_info;
- }
-
- write_only = _IOC_DIR(cmd) == _IOC_WRITE;
- if (write_only && debug > V4L2_DEBUG_IOCTL) {
- v4l_printk_ioctl(video_device_node_name(vfd), cmd);
- pr_cont(": ");
- info->debug(arg, write_only);
- }
- if (info->flags & INFO_FL_STD) {
- typedef int (*vidioc_op)(struct file *file, void *fh, void *p);
- const void *p = vfd->ioctl_ops;
- const vidioc_op *vidioc = p + info->u.offset;
-
- ret = (*vidioc)(file, fh, arg);
- } else if (info->flags & INFO_FL_FUNC) {
- ret = info->u.func(ops, file, fh, arg);
- } else if (!ops->vidioc_default) {
- ret = -ENOTTY;
- } else {
- ret = ops->vidioc_default(file, fh,
- use_fh_prio ? v4l2_prio_check(vfd->prio, vfh->prio) >= 0 : 0,
- cmd, arg);
+ dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
+ ret = ops->vidioc_g_sliced_vbi_cap(file, fh, p);
+ if (!ret)
+ dbgarg2("service_set=%d\n", p->service_set);
+ break;
}
-
-done:
- if (debug) {
- if (write_only && debug > V4L2_DEBUG_IOCTL) {
- if (ret < 0)
- printk(KERN_DEBUG "%s: error %ld\n",
- video_device_node_name(vfd), ret);
- return ret;
- }
- v4l_printk_ioctl(video_device_node_name(vfd), cmd);
- if (ret < 0)
- pr_cont(": error %ld\n", ret);
- else if (debug == V4L2_DEBUG_IOCTL)
- pr_cont("\n");
- else if (_IOC_DIR(cmd) == _IOC_NONE)
- info->debug(arg, write_only);
- else {
- pr_cont(": ");
- info->debug(arg, write_only);
- }
+ case VIDIOC_LOG_STATUS:
+ {
+ if (!ops->vidioc_log_status)
+ break;
+ ret = ops->vidioc_log_status(file, fh);
+ break;
+ }
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ case VIDIOC_DBG_G_REGISTER:
+ {
+ struct v4l2_dbg_register *p = arg;
+
+ if (!capable(CAP_SYS_ADMIN))
+ ret = -EPERM;
+ else if (ops->vidioc_g_register)
+ ret = ops->vidioc_g_register(file, fh, p);
+ break;
+ }
+ case VIDIOC_DBG_S_REGISTER:
+ {
+ struct v4l2_dbg_register *p = arg;
+
+ if (!capable(CAP_SYS_ADMIN))
+ ret = -EPERM;
+ else if (ops->vidioc_s_register)
+ ret = ops->vidioc_s_register(file, fh, p);
+ break;
}
+#endif
+ case VIDIOC_DBG_G_CHIP_IDENT:
+ {
+ struct v4l2_dbg_chip_ident *p = arg;
- return ret;
-}
+ if (!ops->vidioc_g_chip_ident)
+ break;
+ p->ident = V4L2_IDENT_NONE;
+ p->revision = 0;
+ ret = ops->vidioc_g_chip_ident(file, fh, p);
+ if (!ret)
+ dbgarg(cmd, "chip_ident=%u, revision=0x%x\n", p->ident, p->revision);
+ break;
+ }
+ case VIDIOC_S_HW_FREQ_SEEK:
+ {
+ struct v4l2_hw_freq_seek *p = arg;
-static int check_array_args(unsigned int cmd, void *parg, size_t *array_size,
- void * __user *user_ptr, void ***kernel_ptr)
-{
- int ret = 0;
+ if (!ops->vidioc_s_hw_freq_seek)
+ break;
+ dbgarg(cmd,
+ "tuner=%d, type=%d, seek_upward=%d, wrap_around=%d\n",
+ p->tuner, p->type, p->seek_upward, p->wrap_around);
+ ret = ops->vidioc_s_hw_freq_seek(file, fh, p);
+ break;
+ }
+ case VIDIOC_ENUM_FRAMESIZES:
+ {
+ struct v4l2_frmsizeenum *p = arg;
- switch (cmd) {
- case VIDIOC_PREPARE_BUF:
- case VIDIOC_QUERYBUF:
- case VIDIOC_QBUF:
- case VIDIOC_DQBUF: {
- struct v4l2_buffer *buf = parg;
+ if (!ops->vidioc_enum_framesizes)
+ break;
- if (V4L2_TYPE_IS_MULTIPLANAR(buf->type) && buf->length > 0) {
- if (buf->length > VIDEO_MAX_PLANES) {
- ret = -EINVAL;
- break;
- }
- *user_ptr = (void __user *)buf->m.planes;
- *kernel_ptr = (void *)&buf->m.planes;
- *array_size = sizeof(struct v4l2_plane) * buf->length;
- ret = 1;
+ ret = ops->vidioc_enum_framesizes(file, fh, p);
+ dbgarg(cmd,
+ "index=%d, pixelformat=%c%c%c%c, type=%d ",
+ p->index,
+ (p->pixel_format & 0xff),
+ (p->pixel_format >> 8) & 0xff,
+ (p->pixel_format >> 16) & 0xff,
+ (p->pixel_format >> 24) & 0xff,
+ p->type);
+ switch (p->type) {
+ case V4L2_FRMSIZE_TYPE_DISCRETE:
+ dbgarg3("width = %d, height=%d\n",
+ p->discrete.width, p->discrete.height);
+ break;
+ case V4L2_FRMSIZE_TYPE_STEPWISE:
+ dbgarg3("min %dx%d, max %dx%d, step %dx%d\n",
+ p->stepwise.min_width, p->stepwise.min_height,
+ p->stepwise.step_width, p->stepwise.step_height,
+ p->stepwise.max_width, p->stepwise.max_height);
+ break;
+ case V4L2_FRMSIZE_TYPE_CONTINUOUS:
+ dbgarg3("continuous\n");
+ break;
+ default:
+ dbgarg3("- Unknown type!\n");
}
+
break;
}
+ case VIDIOC_ENUM_FRAMEINTERVALS:
+ {
+ struct v4l2_frmivalenum *p = arg;
- case VIDIOC_SUBDEV_G_EDID:
- case VIDIOC_SUBDEV_S_EDID: {
- struct v4l2_subdev_edid *edid = parg;
+ if (!ops->vidioc_enum_frameintervals)
+ break;
- if (edid->blocks) {
- if (edid->blocks > 256) {
- ret = -EINVAL;
- break;
- }
- *user_ptr = (void __user *)edid->edid;
- *kernel_ptr = (void *)&edid->edid;
- *array_size = edid->blocks * 128;
- ret = 1;
+ ret = ops->vidioc_enum_frameintervals(file, fh, p);
+ dbgarg(cmd,
+ "index=%d, pixelformat=%d, width=%d, height=%d, type=%d ",
+ p->index, p->pixel_format,
+ p->width, p->height, p->type);
+ switch (p->type) {
+ case V4L2_FRMIVAL_TYPE_DISCRETE:
+ dbgarg2("fps=%d/%d\n",
+ p->discrete.numerator,
+ p->discrete.denominator);
+ break;
+ case V4L2_FRMIVAL_TYPE_STEPWISE:
+ dbgarg2("min=%d/%d, max=%d/%d, step=%d/%d\n",
+ p->stepwise.min.numerator,
+ p->stepwise.min.denominator,
+ p->stepwise.max.numerator,
+ p->stepwise.max.denominator,
+ p->stepwise.step.numerator,
+ p->stepwise.step.denominator);
+ break;
+ case V4L2_FRMIVAL_TYPE_CONTINUOUS:
+ dbgarg2("continuous\n");
+ break;
+ default:
+ dbgarg2("- Unknown type!\n");
}
break;
}
- case VIDIOC_S_EXT_CTRLS:
- case VIDIOC_G_EXT_CTRLS:
- case VIDIOC_TRY_EXT_CTRLS: {
- struct v4l2_ext_controls *ctrls = parg;
-
- if (ctrls->count != 0) {
- if (ctrls->count > V4L2_CID_MAX_CTRLS) {
- ret = -EINVAL;
- break;
- }
- *user_ptr = (void __user *)ctrls->controls;
- *kernel_ptr = (void *)&ctrls->controls;
- *array_size = sizeof(struct v4l2_ext_control)
- * ctrls->count;
- ret = 1;
- }
+ default:
+ {
+ if (!ops->vidioc_default)
+ break;
+ ret = ops->vidioc_default(file, fh, cmd, arg);
break;
}
+ } /* switch */
+
+ if (vfd->debug & V4L2_DEBUG_IOCTL_ARG) {
+ if (ret < 0) {
+ v4l_print_ioctl(vfd->name, cmd);
+ printk(KERN_CONT " error %ld\n", ret);
+ }
}
return ret;
}
-long
-video_usercopy(struct file *file, unsigned int cmd, unsigned long arg,
- v4l2_kioctl func)
+/* In some cases, only a few fields are used as input, i.e. when the app sets
+ * "index" and then the driver fills in the rest of the structure for the thing
+ * with that index. We only need to copy up the first non-input field. */
+static unsigned long cmd_input_size(unsigned int cmd)
+{
+ /* Size of structure up to and including 'field' */
+#define CMDINSIZE(cmd, type, field) \
+ case VIDIOC_##cmd: \
+ return offsetof(struct v4l2_##type, field) + \
+ sizeof(((struct v4l2_##type *)0)->field);
+
+ switch (cmd) {
+ CMDINSIZE(ENUM_FMT, fmtdesc, type);
+ CMDINSIZE(G_FMT, format, type);
+ CMDINSIZE(QUERYBUF, buffer, type);
+ CMDINSIZE(G_PARM, streamparm, type);
+ CMDINSIZE(ENUMSTD, standard, index);
+ CMDINSIZE(ENUMINPUT, input, index);
+ CMDINSIZE(G_CTRL, control, id);
+ CMDINSIZE(G_TUNER, tuner, index);
+ CMDINSIZE(QUERYCTRL, queryctrl, id);
+ CMDINSIZE(QUERYMENU, querymenu, index);
+ CMDINSIZE(ENUMOUTPUT, output, index);
+ CMDINSIZE(G_MODULATOR, modulator, index);
+ CMDINSIZE(G_FREQUENCY, frequency, tuner);
+ CMDINSIZE(CROPCAP, cropcap, type);
+ CMDINSIZE(G_CROP, crop, type);
+ CMDINSIZE(ENUMAUDIO, audio, index);
+ CMDINSIZE(ENUMAUDOUT, audioout, index);
+ CMDINSIZE(ENCODER_CMD, encoder_cmd, flags);
+ CMDINSIZE(TRY_ENCODER_CMD, encoder_cmd, flags);
+ CMDINSIZE(G_SLICED_VBI_CAP, sliced_vbi_cap, type);
+ CMDINSIZE(ENUM_FRAMESIZES, frmsizeenum, pixel_format);
+ CMDINSIZE(ENUM_FRAMEINTERVALS, frmivalenum, height);
+ default:
+ return _IOC_SIZE(cmd);
+ }
+}
+
+long video_ioctl2(struct file *file,
+ unsigned int cmd, unsigned long arg)
{
char sbuf[128];
void *mbuf = NULL;
- void *parg = (void *)arg;
+ void *parg = NULL;
long err = -EINVAL;
- bool has_array_args;
- size_t array_size = 0;
+ int is_ext_ctrl;
+ size_t ctrls_size = 0;
void __user *user_ptr = NULL;
- void **kernel_ptr = NULL;
+
+#ifdef __OLD_VIDIOC_
+ cmd = video_fix_command(cmd);
+#endif
+ is_ext_ctrl = (cmd == VIDIOC_S_EXT_CTRLS || cmd == VIDIOC_G_EXT_CTRLS ||
+ cmd == VIDIOC_TRY_EXT_CTRLS);
/* Copy arguments into temp kernel buffer */
if (_IOC_DIR(cmd) != _IOC_NONE) {
@@ -2284,20 +1885,7 @@ video_usercopy(struct file *file, unsigned int cmd, unsigned long arg,
err = -EFAULT;
if (_IOC_DIR(cmd) & _IOC_WRITE) {
- unsigned int n = _IOC_SIZE(cmd);
-
- /*
- * In some cases, only a few fields are used as input,
- * i.e. when the app sets "index" and then the driver
- * fills in the rest of the structure for the thing
- * with that index. We only need to copy up the first
- * non-input field.
- */
- if (v4l2_is_known_ioctl(cmd)) {
- u32 flags = v4l2_ioctls[_IOC_NR(cmd)].flags;
- if (flags & INFO_FL_CLEAR_MASK)
- n = (flags & INFO_FL_CLEAR_MASK) >> 16;
- }
+ unsigned long n = cmd_input_size(cmd);
if (copy_from_user(parg, (void __user *)arg, n))
goto out;
@@ -2311,45 +1899,43 @@ video_usercopy(struct file *file, unsigned int cmd, unsigned long arg,
}
}
- err = check_array_args(cmd, parg, &array_size, &user_ptr, &kernel_ptr);
- if (err < 0)
- goto out;
- has_array_args = err;
-
- if (has_array_args) {
- /*
- * When adding new types of array args, make sure that the
- * parent argument to ioctl (which contains the pointer to the
- * array) fits into sbuf (so that mbuf will still remain
- * unused up to here).
- */
- mbuf = kmalloc(array_size, GFP_KERNEL);
- err = -ENOMEM;
- if (NULL == mbuf)
- goto out_array_args;
- err = -EFAULT;
- if (copy_from_user(mbuf, user_ptr, array_size))
- goto out_array_args;
- *kernel_ptr = mbuf;
+ if (is_ext_ctrl) {
+ struct v4l2_ext_controls *p = parg;
+
+ /* In case of an error, tell the caller that it wasn't
+ a specific control that caused it. */
+ p->error_idx = p->count;
+ user_ptr = (void __user *)p->controls;
+ if (p->count) {
+ ctrls_size = sizeof(struct v4l2_ext_control) * p->count;
+ /* Note: v4l2_ext_controls fits in sbuf[] so mbuf is still NULL. */
+ mbuf = kmalloc(ctrls_size, GFP_KERNEL);
+ err = -ENOMEM;
+ if (NULL == mbuf)
+ goto out_ext_ctrl;
+ err = -EFAULT;
+ if (copy_from_user(mbuf, user_ptr, ctrls_size))
+ goto out_ext_ctrl;
+ p->controls = mbuf;
+ }
}
/* Handles IOCTL */
- err = func(file, cmd, parg);
+ err = __video_do_ioctl(file, cmd, parg);
if (err == -ENOIOCTLCMD)
- err = -ENOTTY;
+ err = -EINVAL;
+ if (is_ext_ctrl) {
+ struct v4l2_ext_controls *p = parg;
- if (has_array_args) {
- *kernel_ptr = user_ptr;
- if (copy_to_user(user_ptr, mbuf, array_size))
+ p->controls = (void *)user_ptr;
+ if (p->count && err == 0 && copy_to_user(user_ptr, mbuf, ctrls_size))
err = -EFAULT;
- goto out_array_args;
+ goto out_ext_ctrl;
}
- /* VIDIOC_QUERY_DV_TIMINGS can return an error, but still have valid
- results that must be returned. */
- if (err < 0 && cmd != VIDIOC_QUERY_DV_TIMINGS)
+ if (err < 0)
goto out;
-out_array_args:
+out_ext_ctrl:
/* Copy results into user buffer */
switch (_IOC_DIR(cmd)) {
case _IOC_READ:
@@ -2363,11 +1949,4 @@ out:
kfree(mbuf);
return err;
}
-EXPORT_SYMBOL(video_usercopy);
-
-long video_ioctl2(struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- return video_usercopy(file, cmd, arg, __video_do_ioctl);
-}
EXPORT_SYMBOL(video_ioctl2);
diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c
deleted file mode 100644
index da99cf72..00000000
--- a/drivers/media/v4l2-core/v4l2-mem2mem.c
+++ /dev/null
@@ -1,658 +0,0 @@
-/*
- * Memory-to-memory device framework for Video for Linux 2 and videobuf.
- *
- * Helper functions for devices that use videobuf buffers for both their
- * source and destination.
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- * Pawel Osciak, <pawel@osciak.com>
- * Marek Szyprowski, <m.szyprowski@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-
-#include <media/videobuf2-core.h>
-#include <media/v4l2-mem2mem.h>
-#include <media/v4l2-dev.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-event.h>
-
-MODULE_DESCRIPTION("Mem to mem device framework for videobuf");
-MODULE_AUTHOR("Pawel Osciak, <pawel@osciak.com>");
-MODULE_LICENSE("GPL");
-
-static bool debug;
-module_param(debug, bool, 0644);
-
-#define dprintk(fmt, arg...) \
- do { \
- if (debug) \
- printk(KERN_DEBUG "%s: " fmt, __func__, ## arg);\
- } while (0)
-
-
-/* Instance is already queued on the job_queue */
-#define TRANS_QUEUED (1 << 0)
-/* Instance is currently running in hardware */
-#define TRANS_RUNNING (1 << 1)
-
-
-/* Offset base for buffers on the destination queue - used to distinguish
- * between source and destination buffers when mmapping - they receive the same
- * offsets but for different queues */
-#define DST_QUEUE_OFF_BASE (1 << 30)
-
-
-/**
- * struct v4l2_m2m_dev - per-device context
- * @curr_ctx: currently running instance
- * @job_queue: instances queued to run
- * @job_spinlock: protects job_queue
- * @m2m_ops: driver callbacks
- */
-struct v4l2_m2m_dev {
- struct v4l2_m2m_ctx *curr_ctx;
-
- struct list_head job_queue;
- spinlock_t job_spinlock;
-
- const struct v4l2_m2m_ops *m2m_ops;
-};
-
-static struct v4l2_m2m_queue_ctx *get_queue_ctx(struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type)
-{
- if (V4L2_TYPE_IS_OUTPUT(type))
- return &m2m_ctx->out_q_ctx;
- else
- return &m2m_ctx->cap_q_ctx;
-}
-
-/**
- * v4l2_m2m_get_vq() - return vb2_queue for the given type
- */
-struct vb2_queue *v4l2_m2m_get_vq(struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type)
-{
- struct v4l2_m2m_queue_ctx *q_ctx;
-
- q_ctx = get_queue_ctx(m2m_ctx, type);
- if (!q_ctx)
- return NULL;
-
- return &q_ctx->q;
-}
-EXPORT_SYMBOL(v4l2_m2m_get_vq);
-
-/**
- * v4l2_m2m_next_buf() - return next buffer from the list of ready buffers
- */
-void *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx)
-{
- struct v4l2_m2m_buffer *b = NULL;
- unsigned long flags;
-
- spin_lock_irqsave(&q_ctx->rdy_spinlock, flags);
-
- if (list_empty(&q_ctx->rdy_queue)) {
- spin_unlock_irqrestore(&q_ctx->rdy_spinlock, flags);
- return NULL;
- }
-
- b = list_first_entry(&q_ctx->rdy_queue, struct v4l2_m2m_buffer, list);
- spin_unlock_irqrestore(&q_ctx->rdy_spinlock, flags);
- return &b->vb;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_next_buf);
-
-/**
- * v4l2_m2m_buf_remove() - take off a buffer from the list of ready buffers and
- * return it
- */
-void *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx)
-{
- struct v4l2_m2m_buffer *b = NULL;
- unsigned long flags;
-
- spin_lock_irqsave(&q_ctx->rdy_spinlock, flags);
- if (list_empty(&q_ctx->rdy_queue)) {
- spin_unlock_irqrestore(&q_ctx->rdy_spinlock, flags);
- return NULL;
- }
- b = list_first_entry(&q_ctx->rdy_queue, struct v4l2_m2m_buffer, list);
- list_del(&b->list);
- q_ctx->num_rdy--;
- spin_unlock_irqrestore(&q_ctx->rdy_spinlock, flags);
-
- return &b->vb;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_buf_remove);
-
-/*
- * Scheduling handlers
- */
-
-/**
- * v4l2_m2m_get_curr_priv() - return driver private data for the currently
- * running instance or NULL if no instance is running
- */
-void *v4l2_m2m_get_curr_priv(struct v4l2_m2m_dev *m2m_dev)
-{
- unsigned long flags;
- void *ret = NULL;
-
- spin_lock_irqsave(&m2m_dev->job_spinlock, flags);
- if (m2m_dev->curr_ctx)
- ret = m2m_dev->curr_ctx->priv;
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(v4l2_m2m_get_curr_priv);
-
-/**
- * v4l2_m2m_try_run() - select next job to perform and run it if possible
- *
- * Get next transaction (if present) from the waiting jobs list and run it.
- */
-static void v4l2_m2m_try_run(struct v4l2_m2m_dev *m2m_dev)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&m2m_dev->job_spinlock, flags);
- if (NULL != m2m_dev->curr_ctx) {
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
- dprintk("Another instance is running, won't run now\n");
- return;
- }
-
- if (list_empty(&m2m_dev->job_queue)) {
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
- dprintk("No job pending\n");
- return;
- }
-
- m2m_dev->curr_ctx = list_first_entry(&m2m_dev->job_queue,
- struct v4l2_m2m_ctx, queue);
- m2m_dev->curr_ctx->job_flags |= TRANS_RUNNING;
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
-
- m2m_dev->m2m_ops->device_run(m2m_dev->curr_ctx->priv);
-}
-
-/**
- * v4l2_m2m_try_schedule() - check whether an instance is ready to be added to
- * the pending job queue and add it if so.
- * @m2m_ctx: m2m context assigned to the instance to be checked
- *
- * There are three basic requirements an instance has to meet to be able to run:
- * 1) at least one source buffer has to be queued,
- * 2) at least one destination buffer has to be queued,
- * 3) streaming has to be on.
- *
- * There may also be additional, custom requirements. In such case the driver
- * should supply a custom callback (job_ready in v4l2_m2m_ops) that should
- * return 1 if the instance is ready.
- * An example of the above could be an instance that requires more than one
- * src/dst buffer per transaction.
- */
-static void v4l2_m2m_try_schedule(struct v4l2_m2m_ctx *m2m_ctx)
-{
- struct v4l2_m2m_dev *m2m_dev;
- unsigned long flags_job, flags;
-
- m2m_dev = m2m_ctx->m2m_dev;
- dprintk("Trying to schedule a job for m2m_ctx: %p\n", m2m_ctx);
-
- if (!m2m_ctx->out_q_ctx.q.streaming
- || !m2m_ctx->cap_q_ctx.q.streaming) {
- dprintk("Streaming needs to be on for both queues\n");
- return;
- }
-
- spin_lock_irqsave(&m2m_dev->job_spinlock, flags_job);
- if (m2m_ctx->job_flags & TRANS_QUEUED) {
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags_job);
- dprintk("On job queue already\n");
- return;
- }
-
- spin_lock_irqsave(&m2m_ctx->out_q_ctx.rdy_spinlock, flags);
- if (list_empty(&m2m_ctx->out_q_ctx.rdy_queue)) {
- spin_unlock_irqrestore(&m2m_ctx->out_q_ctx.rdy_spinlock, flags);
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags_job);
- dprintk("No input buffers available\n");
- return;
- }
- if (list_empty(&m2m_ctx->cap_q_ctx.rdy_queue)) {
- spin_unlock_irqrestore(&m2m_ctx->out_q_ctx.rdy_spinlock, flags);
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags_job);
- dprintk("No output buffers available\n");
- return;
- }
- spin_unlock_irqrestore(&m2m_ctx->out_q_ctx.rdy_spinlock, flags);
-
- if (m2m_dev->m2m_ops->job_ready
- && (!m2m_dev->m2m_ops->job_ready(m2m_ctx->priv))) {
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags_job);
- dprintk("Driver not ready\n");
- return;
- }
-
- list_add_tail(&m2m_ctx->queue, &m2m_dev->job_queue);
- m2m_ctx->job_flags |= TRANS_QUEUED;
-
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags_job);
-
- v4l2_m2m_try_run(m2m_dev);
-}
-
-/**
- * v4l2_m2m_job_finish() - inform the framework that a job has been finished
- * and have it clean up
- *
- * Called by a driver to yield back the device after it has finished with it.
- * Should be called as soon as possible after reaching a state which allows
- * other instances to take control of the device.
- *
- * This function has to be called only after device_run() callback has been
- * called on the driver. To prevent recursion, it should not be called directly
- * from the device_run() callback though.
- */
-void v4l2_m2m_job_finish(struct v4l2_m2m_dev *m2m_dev,
- struct v4l2_m2m_ctx *m2m_ctx)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&m2m_dev->job_spinlock, flags);
- if (!m2m_dev->curr_ctx || m2m_dev->curr_ctx != m2m_ctx) {
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
- dprintk("Called by an instance not currently running\n");
- return;
- }
-
- list_del(&m2m_dev->curr_ctx->queue);
- m2m_dev->curr_ctx->job_flags &= ~(TRANS_QUEUED | TRANS_RUNNING);
- wake_up(&m2m_dev->curr_ctx->finished);
- m2m_dev->curr_ctx = NULL;
-
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
-
- /* This instance might have more buffers ready, but since we do not
- * allow more than one job on the job_queue per instance, each has
- * to be scheduled separately after the previous one finishes. */
- v4l2_m2m_try_schedule(m2m_ctx);
- v4l2_m2m_try_run(m2m_dev);
-}
-EXPORT_SYMBOL(v4l2_m2m_job_finish);
-
-/**
- * v4l2_m2m_reqbufs() - multi-queue-aware REQBUFS multiplexer
- */
-int v4l2_m2m_reqbufs(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_requestbuffers *reqbufs)
-{
- struct vb2_queue *vq;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, reqbufs->type);
- return vb2_reqbufs(vq, reqbufs);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_reqbufs);
-
-/**
- * v4l2_m2m_querybuf() - multi-queue-aware QUERYBUF multiplexer
- *
- * See v4l2_m2m_mmap() documentation for details.
- */
-int v4l2_m2m_querybuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_buffer *buf)
-{
- struct vb2_queue *vq;
- int ret = 0;
- unsigned int i;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, buf->type);
- ret = vb2_querybuf(vq, buf);
-
- /* Adjust MMAP memory offsets for the CAPTURE queue */
- if (buf->memory == V4L2_MEMORY_MMAP && !V4L2_TYPE_IS_OUTPUT(vq->type)) {
- if (V4L2_TYPE_IS_MULTIPLANAR(vq->type)) {
- for (i = 0; i < buf->length; ++i)
- buf->m.planes[i].m.mem_offset
- += DST_QUEUE_OFF_BASE;
- } else {
- buf->m.offset += DST_QUEUE_OFF_BASE;
- }
- }
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_querybuf);
-
-/**
- * v4l2_m2m_qbuf() - enqueue a source or destination buffer, depending on
- * the type
- */
-int v4l2_m2m_qbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_buffer *buf)
-{
- struct vb2_queue *vq;
- int ret;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, buf->type);
- ret = vb2_qbuf(vq, buf);
- if (!ret)
- v4l2_m2m_try_schedule(m2m_ctx);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_qbuf);
-
-/**
- * v4l2_m2m_dqbuf() - dequeue a source or destination buffer, depending on
- * the type
- */
-int v4l2_m2m_dqbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_buffer *buf)
-{
- struct vb2_queue *vq;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, buf->type);
- return vb2_dqbuf(vq, buf, file->f_flags & O_NONBLOCK);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_dqbuf);
-
-/**
- * v4l2_m2m_expbuf() - export a source or destination buffer, depending on
- * the type
- */
-int v4l2_m2m_expbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_exportbuffer *eb)
-{
- struct vb2_queue *vq;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, eb->type);
- return vb2_expbuf(vq, eb);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_expbuf);
-/**
- * v4l2_m2m_streamon() - turn on streaming for a video queue
- */
-int v4l2_m2m_streamon(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type)
-{
- struct vb2_queue *vq;
- int ret;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, type);
- ret = vb2_streamon(vq, type);
- if (!ret)
- v4l2_m2m_try_schedule(m2m_ctx);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_streamon);
-
-/**
- * v4l2_m2m_streamoff() - turn off streaming for a video queue
- */
-int v4l2_m2m_streamoff(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type)
-{
- struct vb2_queue *vq;
-
- vq = v4l2_m2m_get_vq(m2m_ctx, type);
- return vb2_streamoff(vq, type);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_streamoff);
-
-/**
- * v4l2_m2m_poll() - poll replacement, for destination buffers only
- *
- * Call from the driver's poll() function. Will poll both queues. If a buffer
- * is available to dequeue (with dqbuf) from the source queue, this will
- * indicate that a non-blocking write can be performed, while read will be
- * returned in case of the destination queue.
- */
-unsigned int v4l2_m2m_poll(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct poll_table_struct *wait)
-{
- struct video_device *vfd = video_devdata(file);
- unsigned long req_events = poll_requested_events(wait);
- struct vb2_queue *src_q, *dst_q;
- struct vb2_buffer *src_vb = NULL, *dst_vb = NULL;
- unsigned int rc = 0;
- unsigned long flags;
-
- if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) {
- struct v4l2_fh *fh = file->private_data;
-
- if (v4l2_event_pending(fh))
- rc = POLLPRI;
- else if (req_events & POLLPRI)
- poll_wait(file, &fh->wait, wait);
- if (!(req_events & (POLLOUT | POLLWRNORM | POLLIN | POLLRDNORM)))
- return rc;
- }
-
- src_q = v4l2_m2m_get_src_vq(m2m_ctx);
- dst_q = v4l2_m2m_get_dst_vq(m2m_ctx);
-
- /*
- * There has to be at least one buffer queued on each queued_list, which
- * means either in driver already or waiting for driver to claim it
- * and start processing.
- */
- if ((!src_q->streaming || list_empty(&src_q->queued_list))
- && (!dst_q->streaming || list_empty(&dst_q->queued_list))) {
- rc |= POLLERR;
- goto end;
- }
-
- if (m2m_ctx->m2m_dev->m2m_ops->unlock)
- m2m_ctx->m2m_dev->m2m_ops->unlock(m2m_ctx->priv);
-
- poll_wait(file, &src_q->done_wq, wait);
- poll_wait(file, &dst_q->done_wq, wait);
-
- if (m2m_ctx->m2m_dev->m2m_ops->lock)
- m2m_ctx->m2m_dev->m2m_ops->lock(m2m_ctx->priv);
-
- spin_lock_irqsave(&src_q->done_lock, flags);
- if (!list_empty(&src_q->done_list))
- src_vb = list_first_entry(&src_q->done_list, struct vb2_buffer,
- done_entry);
- if (src_vb && (src_vb->state == VB2_BUF_STATE_DONE
- || src_vb->state == VB2_BUF_STATE_ERROR))
- rc |= POLLOUT | POLLWRNORM;
- spin_unlock_irqrestore(&src_q->done_lock, flags);
-
- spin_lock_irqsave(&dst_q->done_lock, flags);
- if (!list_empty(&dst_q->done_list))
- dst_vb = list_first_entry(&dst_q->done_list, struct vb2_buffer,
- done_entry);
- if (dst_vb && (dst_vb->state == VB2_BUF_STATE_DONE
- || dst_vb->state == VB2_BUF_STATE_ERROR))
- rc |= POLLIN | POLLRDNORM;
- spin_unlock_irqrestore(&dst_q->done_lock, flags);
-
-end:
- return rc;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_poll);
-
-/**
- * v4l2_m2m_mmap() - source and destination queues-aware mmap multiplexer
- *
- * Call from driver's mmap() function. Will handle mmap() for both queues
- * seamlessly for videobuffer, which will receive normal per-queue offsets and
- * proper videobuf queue pointers. The differentiation is made outside videobuf
- * by adding a predefined offset to buffers from one of the queues and
- * subtracting it before passing it back to videobuf. Only drivers (and
- * thus applications) receive modified offsets.
- */
-int v4l2_m2m_mmap(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct vm_area_struct *vma)
-{
- unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
- struct vb2_queue *vq;
-
- if (offset < DST_QUEUE_OFF_BASE) {
- vq = v4l2_m2m_get_src_vq(m2m_ctx);
- } else {
- vq = v4l2_m2m_get_dst_vq(m2m_ctx);
- vma->vm_pgoff -= (DST_QUEUE_OFF_BASE >> PAGE_SHIFT);
- }
-
- return vb2_mmap(vq, vma);
-}
-EXPORT_SYMBOL(v4l2_m2m_mmap);
-
-/**
- * v4l2_m2m_init() - initialize per-driver m2m data
- *
- * Usually called from driver's probe() function.
- */
-struct v4l2_m2m_dev *v4l2_m2m_init(const struct v4l2_m2m_ops *m2m_ops)
-{
- struct v4l2_m2m_dev *m2m_dev;
-
- if (!m2m_ops || WARN_ON(!m2m_ops->device_run) ||
- WARN_ON(!m2m_ops->job_abort))
- return ERR_PTR(-EINVAL);
-
- m2m_dev = kzalloc(sizeof *m2m_dev, GFP_KERNEL);
- if (!m2m_dev)
- return ERR_PTR(-ENOMEM);
-
- m2m_dev->curr_ctx = NULL;
- m2m_dev->m2m_ops = m2m_ops;
- INIT_LIST_HEAD(&m2m_dev->job_queue);
- spin_lock_init(&m2m_dev->job_spinlock);
-
- return m2m_dev;
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_init);
-
-/**
- * v4l2_m2m_release() - cleans up and frees a m2m_dev structure
- *
- * Usually called from driver's remove() function.
- */
-void v4l2_m2m_release(struct v4l2_m2m_dev *m2m_dev)
-{
- kfree(m2m_dev);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_release);
-
-/**
- * v4l2_m2m_ctx_init() - allocate and initialize a m2m context
- * @priv - driver's instance private data
- * @m2m_dev - a previously initialized m2m_dev struct
- * @vq_init - a callback for queue type-specific initialization function to be
- * used for initializing videobuf_queues
- *
- * Usually called from driver's open() function.
- */
-struct v4l2_m2m_ctx *v4l2_m2m_ctx_init(struct v4l2_m2m_dev *m2m_dev,
- void *drv_priv,
- int (*queue_init)(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq))
-{
- struct v4l2_m2m_ctx *m2m_ctx;
- struct v4l2_m2m_queue_ctx *out_q_ctx, *cap_q_ctx;
- int ret;
-
- m2m_ctx = kzalloc(sizeof *m2m_ctx, GFP_KERNEL);
- if (!m2m_ctx)
- return ERR_PTR(-ENOMEM);
-
- m2m_ctx->priv = drv_priv;
- m2m_ctx->m2m_dev = m2m_dev;
- init_waitqueue_head(&m2m_ctx->finished);
-
- out_q_ctx = &m2m_ctx->out_q_ctx;
- cap_q_ctx = &m2m_ctx->cap_q_ctx;
-
- INIT_LIST_HEAD(&out_q_ctx->rdy_queue);
- INIT_LIST_HEAD(&cap_q_ctx->rdy_queue);
- spin_lock_init(&out_q_ctx->rdy_spinlock);
- spin_lock_init(&cap_q_ctx->rdy_spinlock);
-
- INIT_LIST_HEAD(&m2m_ctx->queue);
-
- ret = queue_init(drv_priv, &out_q_ctx->q, &cap_q_ctx->q);
-
- if (ret)
- goto err;
-
- return m2m_ctx;
-err:
- kfree(m2m_ctx);
- return ERR_PTR(ret);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_ctx_init);
-
-/**
- * v4l2_m2m_ctx_release() - release m2m context
- *
- * Usually called from driver's release() function.
- */
-void v4l2_m2m_ctx_release(struct v4l2_m2m_ctx *m2m_ctx)
-{
- struct v4l2_m2m_dev *m2m_dev;
- unsigned long flags;
-
- m2m_dev = m2m_ctx->m2m_dev;
-
- spin_lock_irqsave(&m2m_dev->job_spinlock, flags);
- if (m2m_ctx->job_flags & TRANS_RUNNING) {
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
- m2m_dev->m2m_ops->job_abort(m2m_ctx->priv);
- dprintk("m2m_ctx %p running, will wait to complete", m2m_ctx);
- wait_event(m2m_ctx->finished, !(m2m_ctx->job_flags & TRANS_RUNNING));
- } else if (m2m_ctx->job_flags & TRANS_QUEUED) {
- list_del(&m2m_ctx->queue);
- m2m_ctx->job_flags &= ~(TRANS_QUEUED | TRANS_RUNNING);
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
- dprintk("m2m_ctx: %p had been on queue and was removed\n",
- m2m_ctx);
- } else {
- /* Do nothing, was not on queue/running */
- spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags);
- }
-
- vb2_queue_release(&m2m_ctx->cap_q_ctx.q);
- vb2_queue_release(&m2m_ctx->out_q_ctx.q);
-
- kfree(m2m_ctx);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_ctx_release);
-
-/**
- * v4l2_m2m_buf_queue() - add a buffer to the proper ready buffers list.
- *
- * Call from buf_queue(), videobuf_queue_ops callback.
- */
-void v4l2_m2m_buf_queue(struct v4l2_m2m_ctx *m2m_ctx, struct vb2_buffer *vb)
-{
- struct v4l2_m2m_buffer *b = container_of(vb, struct v4l2_m2m_buffer, vb);
- struct v4l2_m2m_queue_ctx *q_ctx;
- unsigned long flags;
-
- q_ctx = get_queue_ctx(m2m_ctx, vb->vb2_queue->type);
- if (!q_ctx)
- return;
-
- spin_lock_irqsave(&q_ctx->rdy_spinlock, flags);
- list_add_tail(&b->list, &q_ctx->rdy_queue);
- q_ctx->num_rdy++;
- spin_unlock_irqrestore(&q_ctx->rdy_spinlock, flags);
-}
-EXPORT_SYMBOL_GPL(v4l2_m2m_buf_queue);
-
diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c
deleted file mode 100644
index 996c248d..00000000
--- a/drivers/media/v4l2-core/v4l2-subdev.c
+++ /dev/null
@@ -1,476 +0,0 @@
-/*
- * V4L2 sub-device
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/ioctl.h>
-#include <linux/slab.h>
-#include <linux/types.h>
-#include <linux/videodev2.h>
-#include <linux/export.h>
-
-#include <media/v4l2-ctrls.h>
-#include <media/v4l2-device.h>
-#include <media/v4l2-ioctl.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-event.h>
-
-static int subdev_fh_init(struct v4l2_subdev_fh *fh, struct v4l2_subdev *sd)
-{
-#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
- fh->pad = kzalloc(sizeof(*fh->pad) * sd->entity.num_pads, GFP_KERNEL);
- if (fh->pad == NULL)
- return -ENOMEM;
-#endif
- return 0;
-}
-
-static void subdev_fh_free(struct v4l2_subdev_fh *fh)
-{
-#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
- kfree(fh->pad);
- fh->pad = NULL;
-#endif
-}
-
-static int subdev_open(struct file *file)
-{
- struct video_device *vdev = video_devdata(file);
- struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev);
- struct v4l2_subdev_fh *subdev_fh;
-#if defined(CONFIG_MEDIA_CONTROLLER)
- struct media_entity *entity = NULL;
-#endif
- int ret;
-
- subdev_fh = kzalloc(sizeof(*subdev_fh), GFP_KERNEL);
- if (subdev_fh == NULL)
- return -ENOMEM;
-
- ret = subdev_fh_init(subdev_fh, sd);
- if (ret) {
- kfree(subdev_fh);
- return ret;
- }
-
- v4l2_fh_init(&subdev_fh->vfh, vdev);
- v4l2_fh_add(&subdev_fh->vfh);
- file->private_data = &subdev_fh->vfh;
-#if defined(CONFIG_MEDIA_CONTROLLER)
- if (sd->v4l2_dev->mdev) {
- entity = media_entity_get(&sd->entity);
- if (!entity) {
- ret = -EBUSY;
- goto err;
- }
- }
-#endif
-
- if (sd->internal_ops && sd->internal_ops->open) {
- ret = sd->internal_ops->open(sd, subdev_fh);
- if (ret < 0)
- goto err;
- }
-
- return 0;
-
-err:
-#if defined(CONFIG_MEDIA_CONTROLLER)
- if (entity)
- media_entity_put(entity);
-#endif
- v4l2_fh_del(&subdev_fh->vfh);
- v4l2_fh_exit(&subdev_fh->vfh);
- subdev_fh_free(subdev_fh);
- kfree(subdev_fh);
-
- return ret;
-}
-
-static int subdev_close(struct file *file)
-{
- struct video_device *vdev = video_devdata(file);
- struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev);
- struct v4l2_fh *vfh = file->private_data;
- struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh);
-
- if (sd->internal_ops && sd->internal_ops->close)
- sd->internal_ops->close(sd, subdev_fh);
-#if defined(CONFIG_MEDIA_CONTROLLER)
- if (sd->v4l2_dev->mdev)
- media_entity_put(&sd->entity);
-#endif
- v4l2_fh_del(vfh);
- v4l2_fh_exit(vfh);
- subdev_fh_free(subdev_fh);
- kfree(subdev_fh);
- file->private_data = NULL;
-
- return 0;
-}
-
-static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg)
-{
- struct video_device *vdev = video_devdata(file);
- struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev);
- struct v4l2_fh *vfh = file->private_data;
-#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
- struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh);
-#endif
-
- switch (cmd) {
- case VIDIOC_QUERYCTRL:
- return v4l2_queryctrl(vfh->ctrl_handler, arg);
-
- case VIDIOC_QUERYMENU:
- return v4l2_querymenu(vfh->ctrl_handler, arg);
-
- case VIDIOC_G_CTRL:
- return v4l2_g_ctrl(vfh->ctrl_handler, arg);
-
- case VIDIOC_S_CTRL:
- return v4l2_s_ctrl(vfh, vfh->ctrl_handler, arg);
-
- case VIDIOC_G_EXT_CTRLS:
- return v4l2_g_ext_ctrls(vfh->ctrl_handler, arg);
-
- case VIDIOC_S_EXT_CTRLS:
- return v4l2_s_ext_ctrls(vfh, vfh->ctrl_handler, arg);
-
- case VIDIOC_TRY_EXT_CTRLS:
- return v4l2_try_ext_ctrls(vfh->ctrl_handler, arg);
-
- case VIDIOC_DQEVENT:
- if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS))
- return -ENOIOCTLCMD;
-
- return v4l2_event_dequeue(vfh, arg, file->f_flags & O_NONBLOCK);
-
- case VIDIOC_SUBSCRIBE_EVENT:
- return v4l2_subdev_call(sd, core, subscribe_event, vfh, arg);
-
- case VIDIOC_UNSUBSCRIBE_EVENT:
- return v4l2_subdev_call(sd, core, unsubscribe_event, vfh, arg);
-
-#ifdef CONFIG_VIDEO_ADV_DEBUG
- case VIDIOC_DBG_G_REGISTER:
- {
- struct v4l2_dbg_register *p = arg;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
- return v4l2_subdev_call(sd, core, g_register, p);
- }
- case VIDIOC_DBG_S_REGISTER:
- {
- struct v4l2_dbg_register *p = arg;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
- return v4l2_subdev_call(sd, core, s_register, p);
- }
-#endif
-
- case VIDIOC_LOG_STATUS: {
- int ret;
-
- pr_info("%s: ================= START STATUS =================\n",
- sd->name);
- ret = v4l2_subdev_call(sd, core, log_status);
- pr_info("%s: ================== END STATUS ==================\n",
- sd->name);
- return ret;
- }
-
-#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
- case VIDIOC_SUBDEV_G_FMT: {
- struct v4l2_subdev_format *format = arg;
-
- if (format->which != V4L2_SUBDEV_FORMAT_TRY &&
- format->which != V4L2_SUBDEV_FORMAT_ACTIVE)
- return -EINVAL;
-
- if (format->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(sd, pad, get_fmt, subdev_fh, format);
- }
-
- case VIDIOC_SUBDEV_S_FMT: {
- struct v4l2_subdev_format *format = arg;
-
- if (format->which != V4L2_SUBDEV_FORMAT_TRY &&
- format->which != V4L2_SUBDEV_FORMAT_ACTIVE)
- return -EINVAL;
-
- if (format->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(sd, pad, set_fmt, subdev_fh, format);
- }
-
- case VIDIOC_SUBDEV_G_CROP: {
- struct v4l2_subdev_crop *crop = arg;
- struct v4l2_subdev_selection sel;
- int rval;
-
- if (crop->which != V4L2_SUBDEV_FORMAT_TRY &&
- crop->which != V4L2_SUBDEV_FORMAT_ACTIVE)
- return -EINVAL;
-
- if (crop->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- rval = v4l2_subdev_call(sd, pad, get_crop, subdev_fh, crop);
- if (rval != -ENOIOCTLCMD)
- return rval;
-
- memset(&sel, 0, sizeof(sel));
- sel.which = crop->which;
- sel.pad = crop->pad;
- sel.target = V4L2_SEL_TGT_CROP;
-
- rval = v4l2_subdev_call(
- sd, pad, get_selection, subdev_fh, &sel);
-
- crop->rect = sel.r;
-
- return rval;
- }
-
- case VIDIOC_SUBDEV_S_CROP: {
- struct v4l2_subdev_crop *crop = arg;
- struct v4l2_subdev_selection sel;
- int rval;
-
- if (crop->which != V4L2_SUBDEV_FORMAT_TRY &&
- crop->which != V4L2_SUBDEV_FORMAT_ACTIVE)
- return -EINVAL;
-
- if (crop->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- rval = v4l2_subdev_call(sd, pad, set_crop, subdev_fh, crop);
- if (rval != -ENOIOCTLCMD)
- return rval;
-
- memset(&sel, 0, sizeof(sel));
- sel.which = crop->which;
- sel.pad = crop->pad;
- sel.target = V4L2_SEL_TGT_CROP;
- sel.r = crop->rect;
-
- rval = v4l2_subdev_call(
- sd, pad, set_selection, subdev_fh, &sel);
-
- crop->rect = sel.r;
-
- return rval;
- }
-
- case VIDIOC_SUBDEV_ENUM_MBUS_CODE: {
- struct v4l2_subdev_mbus_code_enum *code = arg;
-
- if (code->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(sd, pad, enum_mbus_code, subdev_fh,
- code);
- }
-
- case VIDIOC_SUBDEV_ENUM_FRAME_SIZE: {
- struct v4l2_subdev_frame_size_enum *fse = arg;
-
- if (fse->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(sd, pad, enum_frame_size, subdev_fh,
- fse);
- }
-
- case VIDIOC_SUBDEV_G_FRAME_INTERVAL:
- return v4l2_subdev_call(sd, video, g_frame_interval, arg);
-
- case VIDIOC_SUBDEV_S_FRAME_INTERVAL:
- return v4l2_subdev_call(sd, video, s_frame_interval, arg);
-
- case VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL: {
- struct v4l2_subdev_frame_interval_enum *fie = arg;
-
- if (fie->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(sd, pad, enum_frame_interval, subdev_fh,
- fie);
- }
-
- case VIDIOC_SUBDEV_G_SELECTION: {
- struct v4l2_subdev_selection *sel = arg;
-
- if (sel->which != V4L2_SUBDEV_FORMAT_TRY &&
- sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
- return -EINVAL;
-
- if (sel->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(
- sd, pad, get_selection, subdev_fh, sel);
- }
-
- case VIDIOC_SUBDEV_S_SELECTION: {
- struct v4l2_subdev_selection *sel = arg;
-
- if (sel->which != V4L2_SUBDEV_FORMAT_TRY &&
- sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
- return -EINVAL;
-
- if (sel->pad >= sd->entity.num_pads)
- return -EINVAL;
-
- return v4l2_subdev_call(
- sd, pad, set_selection, subdev_fh, sel);
- }
-
- case VIDIOC_SUBDEV_G_EDID:
- return v4l2_subdev_call(sd, pad, get_edid, arg);
-
- case VIDIOC_SUBDEV_S_EDID:
- return v4l2_subdev_call(sd, pad, set_edid, arg);
-#endif
- default:
- return v4l2_subdev_call(sd, core, ioctl, cmd, arg);
- }
-
- return 0;
-}
-
-static long subdev_ioctl(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- return video_usercopy(file, cmd, arg, subdev_do_ioctl);
-}
-
-static unsigned int subdev_poll(struct file *file, poll_table *wait)
-{
- struct video_device *vdev = video_devdata(file);
- struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev);
- struct v4l2_fh *fh = file->private_data;
-
- if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS))
- return POLLERR;
-
- poll_wait(file, &fh->wait, wait);
-
- if (v4l2_event_pending(fh))
- return POLLPRI;
-
- return 0;
-}
-
-const struct v4l2_file_operations v4l2_subdev_fops = {
- .owner = THIS_MODULE,
- .open = subdev_open,
- .unlocked_ioctl = subdev_ioctl,
- .release = subdev_close,
- .poll = subdev_poll,
-};
-
-#ifdef CONFIG_MEDIA_CONTROLLER
-int v4l2_subdev_link_validate_default(struct v4l2_subdev *sd,
- struct media_link *link,
- struct v4l2_subdev_format *source_fmt,
- struct v4l2_subdev_format *sink_fmt)
-{
- if (source_fmt->format.width != sink_fmt->format.width
- || source_fmt->format.height != sink_fmt->format.height
- || source_fmt->format.code != sink_fmt->format.code)
- return -EINVAL;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(v4l2_subdev_link_validate_default);
-
-static int
-v4l2_subdev_link_validate_get_format(struct media_pad *pad,
- struct v4l2_subdev_format *fmt)
-{
- if (media_entity_type(pad->entity) == MEDIA_ENT_T_V4L2_SUBDEV) {
- struct v4l2_subdev *sd =
- media_entity_to_v4l2_subdev(pad->entity);
-
- fmt->which = V4L2_SUBDEV_FORMAT_ACTIVE;
- fmt->pad = pad->index;
- return v4l2_subdev_call(sd, pad, get_fmt, NULL, fmt);
- }
-
- WARN(pad->entity->type != MEDIA_ENT_T_DEVNODE_V4L,
- "Driver bug! Wrong media entity type 0x%08x, entity %s\n",
- pad->entity->type, pad->entity->name);
-
- return -EINVAL;
-}
-
-int v4l2_subdev_link_validate(struct media_link *link)
-{
- struct v4l2_subdev *sink;
- struct v4l2_subdev_format sink_fmt, source_fmt;
- int rval;
-
- rval = v4l2_subdev_link_validate_get_format(
- link->source, &source_fmt);
- if (rval < 0)
- return 0;
-
- rval = v4l2_subdev_link_validate_get_format(
- link->sink, &sink_fmt);
- if (rval < 0)
- return 0;
-
- sink = media_entity_to_v4l2_subdev(link->sink->entity);
-
- rval = v4l2_subdev_call(sink, pad, link_validate, link,
- &source_fmt, &sink_fmt);
- if (rval != -ENOIOCTLCMD)
- return rval;
-
- return v4l2_subdev_link_validate_default(
- sink, link, &source_fmt, &sink_fmt);
-}
-EXPORT_SYMBOL_GPL(v4l2_subdev_link_validate);
-#endif /* CONFIG_MEDIA_CONTROLLER */
-
-void v4l2_subdev_init(struct v4l2_subdev *sd, const struct v4l2_subdev_ops *ops)
-{
- INIT_LIST_HEAD(&sd->list);
- BUG_ON(!ops);
- sd->ops = ops;
- sd->v4l2_dev = NULL;
- sd->flags = 0;
- sd->name[0] = '\0';
- sd->grp_id = 0;
- sd->dev_priv = NULL;
- sd->host_priv = NULL;
-#if defined(CONFIG_MEDIA_CONTROLLER)
- sd->entity.name = sd->name;
- sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
-#endif
-}
-EXPORT_SYMBOL(v4l2_subdev_init);
diff --git a/drivers/media/v4l2-core/videobuf-core.c b/drivers/media/v4l2-core/videobuf-core.c
index fb5ee5dd..a96b08d3 100644
--- a/drivers/media/v4l2-core/videobuf-core.c
+++ b/drivers/media/v4l2-core/videobuf-core.c
@@ -24,15 +24,10 @@
#include <media/videobuf-core.h>
#define MAGIC_BUFFER 0x20070728
-#define MAGIC_CHECK(is, should) \
- do { \
- if (unlikely((is) != (should))) { \
- printk(KERN_ERR \
- "magic mismatch: %x (expected %x)\n", \
- is, should); \
- BUG(); \
- } \
- } while (0)
+#define MAGIC_CHECK(is, should) do { \
+ if (unlikely((is) != (should))) { \
+ printk(KERN_ERR "magic mismatch: %x (expected %x)\n", is, should); \
+ BUG(); } } while (0)
static int debug;
module_param(debug, int, 0644);
@@ -41,80 +36,56 @@ MODULE_DESCRIPTION("helper module to manage video4linux buffers");
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
MODULE_LICENSE("GPL");
-#define dprintk(level, fmt, arg...) \
- do { \
- if (debug >= level) \
- printk(KERN_DEBUG "vbuf: " fmt, ## arg); \
- } while (0)
+#define dprintk(level, fmt, arg...) do { \
+ if (debug >= level) \
+ printk(KERN_DEBUG "vbuf: " fmt , ## arg); } while (0)
/* --------------------------------------------------------------------- */
#define CALL(q, f, arg...) \
((q->int_ops->f) ? q->int_ops->f(arg) : 0)
-struct videobuf_buffer *videobuf_alloc_vb(struct videobuf_queue *q)
+void *videobuf_alloc(struct videobuf_queue *q)
{
struct videobuf_buffer *vb;
BUG_ON(q->msize < sizeof(*vb));
- if (!q->int_ops || !q->int_ops->alloc_vb) {
+ if (!q->int_ops || !q->int_ops->alloc) {
printk(KERN_ERR "No specific ops defined!\n");
BUG();
}
- vb = q->int_ops->alloc_vb(q->msize);
+ vb = q->int_ops->alloc(q->msize);
+
if (NULL != vb) {
init_waitqueue_head(&vb->done);
- vb->magic = MAGIC_BUFFER;
+ vb->magic = MAGIC_BUFFER;
}
return vb;
}
-EXPORT_SYMBOL_GPL(videobuf_alloc_vb);
-
-static int is_state_active_or_queued(struct videobuf_queue *q, struct videobuf_buffer *vb)
-{
- unsigned long flags;
- bool rc;
-
- spin_lock_irqsave(q->irqlock, flags);
- rc = vb->state != VIDEOBUF_ACTIVE && vb->state != VIDEOBUF_QUEUED;
- spin_unlock_irqrestore(q->irqlock, flags);
- return rc;
-};
-int videobuf_waiton(struct videobuf_queue *q, struct videobuf_buffer *vb,
- int non_blocking, int intr)
+#define WAITON_CONDITION (vb->state != VIDEOBUF_ACTIVE &&\
+ vb->state != VIDEOBUF_QUEUED)
+int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr)
{
- bool is_ext_locked;
- int ret = 0;
-
MAGIC_CHECK(vb->magic, MAGIC_BUFFER);
if (non_blocking) {
- if (is_state_active_or_queued(q, vb))
+ if (WAITON_CONDITION)
return 0;
- return -EAGAIN;
+ else
+ return -EAGAIN;
}
- is_ext_locked = q->ext_lock && mutex_is_locked(q->ext_lock);
-
- /* Release vdev lock to prevent this wait from blocking outside access to
- the device. */
- if (is_ext_locked)
- mutex_unlock(q->ext_lock);
if (intr)
- ret = wait_event_interruptible(vb->done, is_state_active_or_queued(q, vb));
+ return wait_event_interruptible(vb->done, WAITON_CONDITION);
else
- wait_event(vb->done, is_state_active_or_queued(q, vb));
- /* Relock */
- if (is_ext_locked)
- mutex_lock(q->ext_lock);
+ wait_event(vb->done, WAITON_CONDITION);
- return ret;
+ return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_waiton);
int videobuf_iolock(struct videobuf_queue *q, struct videobuf_buffer *vb,
struct v4l2_framebuffer *fbuf)
@@ -124,35 +95,33 @@ int videobuf_iolock(struct videobuf_queue *q, struct videobuf_buffer *vb,
return CALL(q, iolock, q, vb, fbuf);
}
-EXPORT_SYMBOL_GPL(videobuf_iolock);
-void *videobuf_queue_to_vaddr(struct videobuf_queue *q,
- struct videobuf_buffer *buf)
+void *videobuf_queue_to_vmalloc (struct videobuf_queue *q,
+ struct videobuf_buffer *buf)
{
- if (q->int_ops->vaddr)
- return q->int_ops->vaddr(buf);
- return NULL;
+ if (q->int_ops->vmalloc)
+ return q->int_ops->vmalloc(buf);
+ else
+ return NULL;
}
-EXPORT_SYMBOL_GPL(videobuf_queue_to_vaddr);
+EXPORT_SYMBOL_GPL(videobuf_queue_to_vmalloc);
/* --------------------------------------------------------------------- */
void videobuf_queue_core_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
+ struct videobuf_queue_ops *ops,
struct device *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
void *priv,
- struct videobuf_qtype_ops *int_ops,
- struct mutex *ext_lock)
+ struct videobuf_qtype_ops *int_ops)
{
BUG_ON(!q);
memset(q, 0, sizeof(*q));
q->irqlock = irqlock;
- q->ext_lock = ext_lock;
q->dev = dev;
q->type = type;
q->field = field;
@@ -177,7 +146,6 @@ void videobuf_queue_core_init(struct videobuf_queue *q,
init_waitqueue_head(&q->wait);
INIT_LIST_HEAD(&q->stream);
}
-EXPORT_SYMBOL_GPL(videobuf_queue_core_init);
/* Locking: Only usage in bttv unsafe find way to remove */
int videobuf_queue_is_busy(struct videobuf_queue *q)
@@ -216,46 +184,6 @@ int videobuf_queue_is_busy(struct videobuf_queue *q)
}
return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_queue_is_busy);
-
-/**
- * __videobuf_free() - free all the buffers and their control structures
- *
- * This function can only be called if streaming/reading is off, i.e. no buffers
- * are under control of the driver.
- */
-/* Locking: Caller holds q->vb_lock */
-static int __videobuf_free(struct videobuf_queue *q)
-{
- int i;
-
- dprintk(1, "%s\n", __func__);
- if (!q)
- return 0;
-
- if (q->streaming || q->reading) {
- dprintk(1, "Cannot free buffers when streaming or reading\n");
- return -EBUSY;
- }
-
- MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
-
- for (i = 0; i < VIDEO_MAX_FRAME; i++)
- if (q->bufs[i] && q->bufs[i]->map) {
- dprintk(1, "Cannot free mmapped buffers\n");
- return -EBUSY;
- }
-
- for (i = 0; i < VIDEO_MAX_FRAME; i++) {
- if (NULL == q->bufs[i])
- continue;
- q->ops->buf_release(q, q->bufs[i]);
- kfree(q->bufs[i]);
- q->bufs[i] = NULL;
- }
-
- return 0;
-}
/* Locking: Caller holds q->vb_lock */
void videobuf_queue_cancel(struct videobuf_queue *q)
@@ -288,7 +216,6 @@ void videobuf_queue_cancel(struct videobuf_queue *q)
}
INIT_LIST_HEAD(&q->stream);
}
-EXPORT_SYMBOL_GPL(videobuf_queue_cancel);
/* --------------------------------------------------------------------- */
@@ -310,7 +237,6 @@ enum v4l2_field videobuf_next_field(struct videobuf_queue *q)
}
return field;
}
-EXPORT_SYMBOL_GPL(videobuf_next_field);
/* Locking: Caller holds q->vb_lock */
static void videobuf_status(struct videobuf_queue *q, struct v4l2_buffer *b,
@@ -335,12 +261,9 @@ static void videobuf_status(struct videobuf_queue *q, struct v4l2_buffer *b,
case V4L2_MEMORY_OVERLAY:
b->m.offset = vb->boff;
break;
- case V4L2_MEMORY_DMABUF:
- /* DMABUF is not handled in videobuf framework */
- break;
}
- b->flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+ b->flags = 0;
if (vb->map)
b->flags |= V4L2_BUF_FLAG_MAPPED;
@@ -350,10 +273,8 @@ static void videobuf_status(struct videobuf_queue *q, struct v4l2_buffer *b,
case VIDEOBUF_ACTIVE:
b->flags |= V4L2_BUF_FLAG_QUEUED;
break;
- case VIDEOBUF_ERROR:
- b->flags |= V4L2_BUF_FLAG_ERROR;
- /* fall through */
case VIDEOBUF_DONE:
+ case VIDEOBUF_ERROR:
b->flags |= V4L2_BUF_FLAG_DONE;
break;
case VIDEOBUF_NEEDS_INIT:
@@ -362,21 +283,55 @@ static void videobuf_status(struct videobuf_queue *q, struct v4l2_buffer *b,
break;
}
+ if (vb->input != UNSET) {
+ b->flags |= V4L2_BUF_FLAG_INPUT;
+ b->input = vb->input;
+ }
+
b->field = vb->field;
b->timestamp = vb->ts;
b->bytesused = vb->size;
b->sequence = vb->field_count >> 1;
}
+/* Locking: Caller holds q->vb_lock */
+static int __videobuf_mmap_free(struct videobuf_queue *q)
+{
+ int i;
+ int rc;
+
+ if (!q)
+ return 0;
+
+ MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
+
+
+ rc = CALL(q, mmap_free, q);
+
+ q->is_mmapped = 0;
+
+ if (rc < 0)
+ return rc;
+
+ for (i = 0; i < VIDEO_MAX_FRAME; i++) {
+ if (NULL == q->bufs[i])
+ continue;
+ q->ops->buf_release(q, q->bufs[i]);
+ kfree(q->bufs[i]);
+ q->bufs[i] = NULL;
+ }
+
+ return rc;
+}
+
int videobuf_mmap_free(struct videobuf_queue *q)
{
int ret;
- videobuf_queue_lock(q);
- ret = __videobuf_free(q);
- videobuf_queue_unlock(q);
+ mutex_lock(&q->vb_lock);
+ ret = __videobuf_mmap_free(q);
+ mutex_unlock(&q->vb_lock);
return ret;
}
-EXPORT_SYMBOL_GPL(videobuf_mmap_free);
/* Locking: Caller holds q->vb_lock */
int __videobuf_mmap_setup(struct videobuf_queue *q,
@@ -388,18 +343,19 @@ int __videobuf_mmap_setup(struct videobuf_queue *q,
MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
- err = __videobuf_free(q);
+ err = __videobuf_mmap_free(q);
if (0 != err)
return err;
/* Allocate and initialize buffers */
for (i = 0; i < bcount; i++) {
- q->bufs[i] = videobuf_alloc_vb(q);
+ q->bufs[i] = videobuf_alloc(q);
- if (NULL == q->bufs[i])
+ if (q->bufs[i] == NULL)
break;
q->bufs[i]->i = i;
+ q->bufs[i]->input = UNSET;
q->bufs[i]->memory = memory;
q->bufs[i]->bsize = bsize;
switch (memory) {
@@ -408,7 +364,6 @@ int __videobuf_mmap_setup(struct videobuf_queue *q,
break;
case V4L2_MEMORY_USERPTR:
case V4L2_MEMORY_OVERLAY:
- case V4L2_MEMORY_DMABUF:
/* nothing */
break;
}
@@ -417,23 +372,22 @@ int __videobuf_mmap_setup(struct videobuf_queue *q,
if (!i)
return -ENOMEM;
- dprintk(1, "mmap setup: %d buffers, %d bytes each\n", i, bsize);
+ dprintk(1, "mmap setup: %d buffers, %d bytes each\n",
+ i, bsize);
return i;
}
-EXPORT_SYMBOL_GPL(__videobuf_mmap_setup);
int videobuf_mmap_setup(struct videobuf_queue *q,
unsigned int bcount, unsigned int bsize,
enum v4l2_memory memory)
{
int ret;
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
ret = __videobuf_mmap_setup(q, bcount, bsize, memory);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
return ret;
}
-EXPORT_SYMBOL_GPL(videobuf_mmap_setup);
int videobuf_reqbufs(struct videobuf_queue *q,
struct v4l2_requestbuffers *req)
@@ -453,7 +407,7 @@ int videobuf_reqbufs(struct videobuf_queue *q,
return -EINVAL;
}
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
if (req->type != q->type) {
dprintk(1, "reqbufs: queue type invalid\n");
retval = -EINVAL;
@@ -476,9 +430,8 @@ int videobuf_reqbufs(struct videobuf_queue *q,
count = VIDEO_MAX_FRAME;
size = 0;
q->ops->buf_setup(q, &count, &size);
- dprintk(1, "reqbufs: bufs=%d, size=0x%x [%u pages total]\n",
- count, size,
- (unsigned int)((count * PAGE_ALIGN(size)) >> PAGE_SHIFT));
+ dprintk(1, "reqbufs: bufs=%d, size=0x%x [%d pages total]\n",
+ count, size, (count*PAGE_ALIGN(size))>>PAGE_SHIFT);
retval = __videobuf_mmap_setup(q, count, size, req->memory);
if (retval < 0) {
@@ -490,16 +443,15 @@ int videobuf_reqbufs(struct videobuf_queue *q,
retval = 0;
done:
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_reqbufs);
int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b)
{
int ret = -EINVAL;
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
if (unlikely(b->type != q->type)) {
dprintk(1, "querybuf: Wrong type.\n");
goto done;
@@ -517,12 +469,12 @@ int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b)
ret = 0;
done:
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
return ret;
}
-EXPORT_SYMBOL_GPL(videobuf_querybuf);
-int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b)
+int videobuf_qbuf(struct videobuf_queue *q,
+ struct v4l2_buffer *b)
{
struct videobuf_buffer *buf;
enum v4l2_field field;
@@ -534,7 +486,7 @@ int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b)
if (b->memory == V4L2_MEMORY_MMAP)
down_read(&current->mm->mmap_sem);
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
retval = -EBUSY;
if (q->reading) {
dprintk(1, "qbuf: Reading running...\n");
@@ -564,6 +516,16 @@ int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b)
goto done;
}
+ if (b->flags & V4L2_BUF_FLAG_INPUT) {
+ if (b->input >= q->inputs) {
+ dprintk(1, "qbuf: wrong input.\n");
+ goto done;
+ }
+ buf->input = b->input;
+ } else {
+ buf->input = UNSET;
+ }
+
switch (b->memory) {
case V4L2_MEMORY_MMAP:
if (0 == buf->baddr) {
@@ -571,13 +533,6 @@ int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b)
"but buffer addr is zero!\n");
goto done;
}
- if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT
- || q->type == V4L2_BUF_TYPE_VBI_OUTPUT
- || q->type == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT) {
- buf->size = b->bytesused;
- buf->field = b->field;
- buf->ts = b->timestamp;
- }
break;
case V4L2_MEMORY_USERPTR:
if (b->length < buf->bsize) {
@@ -611,19 +566,19 @@ int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b)
q->ops->buf_queue(q, buf);
spin_unlock_irqrestore(q->irqlock, flags);
}
- dprintk(1, "qbuf: succeeded\n");
+ dprintk(1, "qbuf: succeded\n");
retval = 0;
wake_up_interruptible_sync(&q->wait);
-done:
- videobuf_queue_unlock(q);
+ done:
+ mutex_unlock(&q->vb_lock);
if (b->memory == V4L2_MEMORY_MMAP)
up_read(&current->mm->mmap_sem);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_qbuf);
+
/* Locking: Caller holds q->vb_lock */
static int stream_next_buffer_check_queue(struct videobuf_queue *q, int noblock)
@@ -646,14 +601,14 @@ checks:
dprintk(2, "next_buffer: waiting on buffer\n");
/* Drop lock to avoid deadlock with qbuf */
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
/* Checking list_empty and streaming is safe without
* locks because we goto checks to validate while
* holding locks before proceeding */
retval = wait_event_interruptible(q->wait,
!list_empty(&q->stream) || !q->streaming);
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
if (retval)
goto done;
@@ -668,6 +623,7 @@ done:
return retval;
}
+
/* Locking: Caller holds q->vb_lock */
static int stream_next_buffer(struct videobuf_queue *q,
struct videobuf_buffer **vb, int nonblocking)
@@ -680,7 +636,7 @@ static int stream_next_buffer(struct videobuf_queue *q,
goto done;
buf = list_entry(q->stream.next, struct videobuf_buffer, stream);
- retval = videobuf_waiton(q, buf, nonblocking, 1);
+ retval = videobuf_waiton(buf, nonblocking, 1);
if (retval < 0)
goto done;
@@ -690,15 +646,14 @@ done:
}
int videobuf_dqbuf(struct videobuf_queue *q,
- struct v4l2_buffer *b, int nonblocking)
+ struct v4l2_buffer *b, int nonblocking)
{
struct videobuf_buffer *buf = NULL;
int retval;
MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
- memset(b, 0, sizeof(*b));
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
retval = stream_next_buffer(q, &buf, nonblocking);
if (retval < 0) {
@@ -709,25 +664,28 @@ int videobuf_dqbuf(struct videobuf_queue *q,
switch (buf->state) {
case VIDEOBUF_ERROR:
dprintk(1, "dqbuf: state is error\n");
+ retval = -EIO;
+ CALL(q, sync, q, buf);
+ buf->state = VIDEOBUF_IDLE;
break;
case VIDEOBUF_DONE:
dprintk(1, "dqbuf: state is done\n");
+ CALL(q, sync, q, buf);
+ buf->state = VIDEOBUF_IDLE;
break;
default:
dprintk(1, "dqbuf: state invalid\n");
retval = -EINVAL;
goto done;
}
- CALL(q, sync, q, buf);
- videobuf_status(q, b, buf, q->type);
list_del(&buf->stream);
- buf->state = VIDEOBUF_IDLE;
- b->flags &= ~V4L2_BUF_FLAG_DONE;
-done:
- videobuf_queue_unlock(q);
+ memset(b, 0, sizeof(*b));
+ videobuf_status(q, b, buf, q->type);
+
+ done:
+ mutex_unlock(&q->vb_lock);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_dqbuf);
int videobuf_streamon(struct videobuf_queue *q)
{
@@ -735,7 +693,7 @@ int videobuf_streamon(struct videobuf_queue *q)
unsigned long flags = 0;
int retval;
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
retval = -EBUSY;
if (q->reading)
goto done;
@@ -750,11 +708,10 @@ int videobuf_streamon(struct videobuf_queue *q)
spin_unlock_irqrestore(q->irqlock, flags);
wake_up_interruptible_sync(&q->wait);
-done:
- videobuf_queue_unlock(q);
+ done:
+ mutex_unlock(&q->vb_lock);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_streamon);
/* Locking: Caller holds q->vb_lock */
static int __videobuf_streamoff(struct videobuf_queue *q)
@@ -771,13 +728,12 @@ int videobuf_streamoff(struct videobuf_queue *q)
{
int retval;
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
retval = __videobuf_streamoff(q);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_streamoff);
/* Locking: Caller holds q->vb_lock */
static ssize_t videobuf_read_zerocopy(struct videobuf_queue *q,
@@ -791,7 +747,7 @@ static ssize_t videobuf_read_zerocopy(struct videobuf_queue *q,
MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
/* setup stuff */
- q->read_buf = videobuf_alloc_vb(q);
+ q->read_buf = videobuf_alloc(q);
if (NULL == q->read_buf)
return -ENOMEM;
@@ -808,7 +764,7 @@ static ssize_t videobuf_read_zerocopy(struct videobuf_queue *q,
spin_lock_irqsave(q->irqlock, flags);
q->ops->buf_queue(q, q->read_buf);
spin_unlock_irqrestore(q->irqlock, flags);
- retval = videobuf_waiton(q, q->read_buf, 0, 0);
+ retval = videobuf_waiton(q->read_buf, 0, 0);
if (0 == retval) {
CALL(q, sync, q, q->read_buf);
if (VIDEOBUF_ERROR == q->read_buf->state)
@@ -817,7 +773,7 @@ static ssize_t videobuf_read_zerocopy(struct videobuf_queue *q,
retval = q->read_buf->size;
}
-done:
+ done:
/* cleanup */
q->ops->buf_release(q, q->read_buf);
kfree(q->read_buf);
@@ -825,49 +781,6 @@ done:
return retval;
}
-static int __videobuf_copy_to_user(struct videobuf_queue *q,
- struct videobuf_buffer *buf,
- char __user *data, size_t count,
- int nonblocking)
-{
- void *vaddr = CALL(q, vaddr, buf);
-
- /* copy to userspace */
- if (count > buf->size - q->read_off)
- count = buf->size - q->read_off;
-
- if (copy_to_user(data, vaddr + q->read_off, count))
- return -EFAULT;
-
- return count;
-}
-
-static int __videobuf_copy_stream(struct videobuf_queue *q,
- struct videobuf_buffer *buf,
- char __user *data, size_t count, size_t pos,
- int vbihack, int nonblocking)
-{
- unsigned int *fc = CALL(q, vaddr, buf);
-
- if (vbihack) {
- /* dirty, undocumented hack -- pass the frame counter
- * within the last four bytes of each vbi data block.
- * We need that one to maintain backward compatibility
- * to all vbi decoding software out there ... */
- fc += (buf->size >> 2) - 1;
- *fc = buf->field_count >> 1;
- dprintk(1, "vbihack: %d\n", *fc);
- }
-
- /* copy stuff using the common method */
- count = __videobuf_copy_to_user(q, buf, data, count, nonblocking);
-
- if ((count == -EFAULT) && (pos == 0))
- return -EFAULT;
-
- return count;
-}
-
ssize_t videobuf_read_one(struct videobuf_queue *q,
char __user *data, size_t count, loff_t *ppos,
int nonblocking)
@@ -879,7 +792,7 @@ ssize_t videobuf_read_one(struct videobuf_queue *q,
MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
q->ops->buf_setup(q, &nbufs, &size);
@@ -896,7 +809,7 @@ ssize_t videobuf_read_one(struct videobuf_queue *q,
if (NULL == q->read_buf) {
/* need to capture a new frame */
retval = -ENOMEM;
- q->read_buf = videobuf_alloc_vb(q);
+ q->read_buf = videobuf_alloc(q);
dprintk(1, "video alloc=0x%p\n", q->read_buf);
if (NULL == q->read_buf)
@@ -920,7 +833,7 @@ ssize_t videobuf_read_one(struct videobuf_queue *q,
}
/* wait until capture is done */
- retval = videobuf_waiton(q, q->read_buf, nonblocking, 1);
+ retval = videobuf_waiton(q->read_buf, nonblocking, 1);
if (0 != retval)
goto done;
@@ -936,7 +849,7 @@ ssize_t videobuf_read_one(struct videobuf_queue *q,
}
/* Copy to userspace */
- retval = __videobuf_copy_to_user(q, q->read_buf, data, count, nonblocking);
+ retval = CALL(q, video_copy_to_user, q, data, count, nonblocking);
if (retval < 0)
goto done;
@@ -948,11 +861,10 @@ ssize_t videobuf_read_one(struct videobuf_queue *q,
q->read_buf = NULL;
}
-done:
- videobuf_queue_unlock(q);
+ done:
+ mutex_unlock(&q->vb_lock);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_read_one);
/* Locking: Caller holds q->vb_lock */
static int __videobuf_read_start(struct videobuf_queue *q)
@@ -995,7 +907,7 @@ static void __videobuf_read_stop(struct videobuf_queue *q)
int i;
videobuf_queue_cancel(q);
- __videobuf_free(q);
+ __videobuf_mmap_free(q);
INIT_LIST_HEAD(&q->stream);
for (i = 0; i < VIDEO_MAX_FRAME; i++) {
if (NULL == q->bufs[i])
@@ -1004,31 +916,30 @@ static void __videobuf_read_stop(struct videobuf_queue *q)
q->bufs[i] = NULL;
}
q->read_buf = NULL;
+
}
int videobuf_read_start(struct videobuf_queue *q)
{
int rc;
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
rc = __videobuf_read_start(q);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
return rc;
}
-EXPORT_SYMBOL_GPL(videobuf_read_start);
void videobuf_read_stop(struct videobuf_queue *q)
{
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
__videobuf_read_stop(q);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
}
-EXPORT_SYMBOL_GPL(videobuf_read_stop);
void videobuf_stop(struct videobuf_queue *q)
{
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
if (q->streaming)
__videobuf_streamoff(q);
@@ -1036,9 +947,9 @@ void videobuf_stop(struct videobuf_queue *q)
if (q->reading)
__videobuf_read_stop(q);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
}
-EXPORT_SYMBOL_GPL(videobuf_stop);
+
ssize_t videobuf_read_stream(struct videobuf_queue *q,
char __user *data, size_t count, loff_t *ppos,
@@ -1050,7 +961,7 @@ ssize_t videobuf_read_stream(struct videobuf_queue *q,
MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
dprintk(2, "%s\n", __func__);
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
retval = -EBUSY;
if (q->streaming)
goto done;
@@ -1070,7 +981,7 @@ ssize_t videobuf_read_stream(struct videobuf_queue *q,
list_del(&q->read_buf->stream);
q->read_off = 0;
}
- rc = videobuf_waiton(q, q->read_buf, nonblocking, 1);
+ rc = videobuf_waiton(q->read_buf, nonblocking, 1);
if (rc < 0) {
if (0 == retval)
retval = rc;
@@ -1078,7 +989,7 @@ ssize_t videobuf_read_stream(struct videobuf_queue *q,
}
if (q->read_buf->state == VIDEOBUF_DONE) {
- rc = __videobuf_copy_stream(q, q->read_buf, data + retval, count,
+ rc = CALL(q, copy_stream, q, data + retval, count,
retval, vbihack, nonblocking);
if (rc < 0) {
retval = rc;
@@ -1107,26 +1018,24 @@ ssize_t videobuf_read_stream(struct videobuf_queue *q,
break;
}
-done:
- videobuf_queue_unlock(q);
+ done:
+ mutex_unlock(&q->vb_lock);
return retval;
}
-EXPORT_SYMBOL_GPL(videobuf_read_stream);
unsigned int videobuf_poll_stream(struct file *file,
struct videobuf_queue *q,
poll_table *wait)
{
- unsigned long req_events = poll_requested_events(wait);
struct videobuf_buffer *buf = NULL;
unsigned int rc = 0;
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
if (q->streaming) {
if (!list_empty(&q->stream))
buf = list_entry(q->stream.next,
struct videobuf_buffer, stream);
- } else if (req_events & (POLLIN | POLLRDNORM)) {
+ } else {
if (!q->reading)
__videobuf_read_start(q);
if (!q->reading) {
@@ -1146,48 +1055,84 @@ unsigned int videobuf_poll_stream(struct file *file,
if (0 == rc) {
poll_wait(file, &buf->done, wait);
if (buf->state == VIDEOBUF_DONE ||
- buf->state == VIDEOBUF_ERROR) {
- switch (q->type) {
- case V4L2_BUF_TYPE_VIDEO_OUTPUT:
- case V4L2_BUF_TYPE_VBI_OUTPUT:
- case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
- rc = POLLOUT | POLLWRNORM;
- break;
- default:
- rc = POLLIN | POLLRDNORM;
- break;
- }
- }
+ buf->state == VIDEOBUF_ERROR)
+ rc = POLLIN|POLLRDNORM;
}
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
return rc;
}
-EXPORT_SYMBOL_GPL(videobuf_poll_stream);
-int videobuf_mmap_mapper(struct videobuf_queue *q, struct vm_area_struct *vma)
+int videobuf_mmap_mapper(struct videobuf_queue *q,
+ struct vm_area_struct *vma)
{
- int rc = -EINVAL;
- int i;
+ int retval;
MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
- if (!(vma->vm_flags & VM_WRITE) || !(vma->vm_flags & VM_SHARED)) {
- dprintk(1, "mmap appl bug: PROT_WRITE and MAP_SHARED are required\n");
- return -EINVAL;
- }
+ mutex_lock(&q->vb_lock);
+ retval = CALL(q, mmap_mapper, q, vma);
+ q->is_mmapped = 1;
+ mutex_unlock(&q->vb_lock);
- videobuf_queue_lock(q);
- for (i = 0; i < VIDEO_MAX_FRAME; i++) {
- struct videobuf_buffer *buf = q->bufs[i];
+ return retval;
+}
- if (buf && buf->memory == V4L2_MEMORY_MMAP &&
- buf->boff == (vma->vm_pgoff << PAGE_SHIFT)) {
- rc = CALL(q, mmap_mapper, q, buf, vma);
- break;
- }
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+int videobuf_cgmbuf(struct videobuf_queue *q,
+ struct video_mbuf *mbuf, int count)
+{
+ struct v4l2_requestbuffers req;
+ int rc, i;
+
+ MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS);
+
+ memset(&req, 0, sizeof(req));
+ req.type = q->type;
+ req.count = count;
+ req.memory = V4L2_MEMORY_MMAP;
+ rc = videobuf_reqbufs(q, &req);
+ if (rc < 0)
+ return rc;
+
+ mbuf->frames = req.count;
+ mbuf->size = 0;
+ for (i = 0; i < mbuf->frames; i++) {
+ mbuf->offsets[i] = q->bufs[i]->boff;
+ mbuf->size += PAGE_ALIGN(q->bufs[i]->bsize);
}
- videobuf_queue_unlock(q);
- return rc;
+ return 0;
}
+EXPORT_SYMBOL_GPL(videobuf_cgmbuf);
+#endif
+
+/* --------------------------------------------------------------------- */
+
+EXPORT_SYMBOL_GPL(videobuf_waiton);
+EXPORT_SYMBOL_GPL(videobuf_iolock);
+
+EXPORT_SYMBOL_GPL(videobuf_alloc);
+
+EXPORT_SYMBOL_GPL(videobuf_queue_core_init);
+EXPORT_SYMBOL_GPL(videobuf_queue_cancel);
+EXPORT_SYMBOL_GPL(videobuf_queue_is_busy);
+
+EXPORT_SYMBOL_GPL(videobuf_next_field);
+EXPORT_SYMBOL_GPL(videobuf_reqbufs);
+EXPORT_SYMBOL_GPL(videobuf_querybuf);
+EXPORT_SYMBOL_GPL(videobuf_qbuf);
+EXPORT_SYMBOL_GPL(videobuf_dqbuf);
+EXPORT_SYMBOL_GPL(videobuf_streamon);
+EXPORT_SYMBOL_GPL(videobuf_streamoff);
+
+EXPORT_SYMBOL_GPL(videobuf_read_start);
+EXPORT_SYMBOL_GPL(videobuf_read_stop);
+EXPORT_SYMBOL_GPL(videobuf_stop);
+EXPORT_SYMBOL_GPL(videobuf_read_stream);
+EXPORT_SYMBOL_GPL(videobuf_read_one);
+EXPORT_SYMBOL_GPL(videobuf_poll_stream);
+
+EXPORT_SYMBOL_GPL(__videobuf_mmap_setup);
+EXPORT_SYMBOL_GPL(videobuf_mmap_setup);
+EXPORT_SYMBOL_GPL(videobuf_mmap_free);
EXPORT_SYMBOL_GPL(videobuf_mmap_mapper);
diff --git a/drivers/media/v4l2-core/videobuf-dma-contig.c b/drivers/media/v4l2-core/videobuf-dma-contig.c
index 3a43ba09..75c299d6 100644
--- a/drivers/media/v4l2-core/videobuf-dma-contig.c
+++ b/drivers/media/v4l2-core/videobuf-dma-contig.c
@@ -27,8 +27,8 @@ struct videobuf_dma_contig_memory {
u32 magic;
void *vaddr;
dma_addr_t dma_handle;
- bool cached;
unsigned long size;
+ int is_userptr;
};
#define MAGIC_DC_MEM 0x0733ac61
@@ -38,58 +38,8 @@ struct videobuf_dma_contig_memory {
BUG(); \
}
-static int __videobuf_dc_alloc(struct device *dev,
- struct videobuf_dma_contig_memory *mem,
- unsigned long size, gfp_t flags)
-{
- mem->size = size;
- if (mem->cached) {
- mem->vaddr = alloc_pages_exact(mem->size, flags | GFP_DMA);
- if (mem->vaddr) {
- int err;
-
- mem->dma_handle = dma_map_single(dev, mem->vaddr,
- mem->size,
- DMA_FROM_DEVICE);
- err = dma_mapping_error(dev, mem->dma_handle);
- if (err) {
- dev_err(dev, "dma_map_single failed\n");
-
- free_pages_exact(mem->vaddr, mem->size);
- mem->vaddr = NULL;
- return err;
- }
- }
- } else
- mem->vaddr = dma_alloc_coherent(dev, mem->size,
- &mem->dma_handle, flags);
-
- if (!mem->vaddr) {
- dev_err(dev, "memory alloc size %ld failed\n", mem->size);
- return -ENOMEM;
- }
-
- dev_dbg(dev, "dma mapped data is at %p (%ld)\n", mem->vaddr, mem->size);
-
- return 0;
-}
-
-static void __videobuf_dc_free(struct device *dev,
- struct videobuf_dma_contig_memory *mem)
-{
- if (mem->cached) {
- if (!mem->vaddr)
- return;
- dma_unmap_single(dev, mem->dma_handle, mem->size,
- DMA_FROM_DEVICE);
- free_pages_exact(mem->vaddr, mem->size);
- } else
- dma_free_coherent(dev, mem->size, mem->vaddr, mem->dma_handle);
-
- mem->vaddr = NULL;
-}
-
-static void videobuf_vm_open(struct vm_area_struct *vma)
+static void
+videobuf_vm_open(struct vm_area_struct *vma)
{
struct videobuf_mapping *map = vma->vm_private_data;
@@ -105,15 +55,15 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
struct videobuf_queue *q = map->q;
int i;
- dev_dbg(q->dev, "vm_close %p [count=%u,vma=%08lx-%08lx]\n",
+ dev_dbg(map->q->dev, "vm_close %p [count=%u,vma=%08lx-%08lx]\n",
map, map->count, vma->vm_start, vma->vm_end);
map->count--;
if (0 == map->count) {
struct videobuf_dma_contig_memory *mem;
- dev_dbg(q->dev, "munmap %p q=%p\n", map, q);
- videobuf_queue_lock(q);
+ dev_dbg(map->q->dev, "munmap %p q=%p\n", map, q);
+ mutex_lock(&q->vb_lock);
/* We need first to cancel streams, before unmapping */
if (q->streaming)
@@ -139,26 +89,27 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
/* vfree is not atomic - can't be
called with IRQ's disabled
*/
- dev_dbg(q->dev, "buf[%d] freeing %p\n",
+ dev_dbg(map->q->dev, "buf[%d] freeing %p\n",
i, mem->vaddr);
- __videobuf_dc_free(q->dev, mem);
+ dma_free_coherent(q->dev, mem->size,
+ mem->vaddr, mem->dma_handle);
mem->vaddr = NULL;
}
- q->bufs[i]->map = NULL;
+ q->bufs[i]->map = NULL;
q->bufs[i]->baddr = 0;
}
kfree(map);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
}
}
static const struct vm_operations_struct videobuf_vm_ops = {
- .open = videobuf_vm_open,
- .close = videobuf_vm_close,
+ .open = videobuf_vm_open,
+ .close = videobuf_vm_close,
};
/**
@@ -169,6 +120,7 @@ static const struct vm_operations_struct videobuf_vm_ops = {
*/
static void videobuf_dma_contig_user_put(struct videobuf_dma_contig_memory *mem)
{
+ mem->is_userptr = 0;
mem->dma_handle = 0;
mem->size = 0;
}
@@ -195,6 +147,7 @@ static int videobuf_dma_contig_user_get(struct videobuf_dma_contig_memory *mem,
offset = vb->baddr & ~PAGE_MASK;
mem->size = PAGE_ALIGN(vb->size + offset);
+ mem->is_userptr = 0;
ret = -EINVAL;
down_read(&mm->mmap_sem);
@@ -228,39 +181,30 @@ static int videobuf_dma_contig_user_get(struct videobuf_dma_contig_memory *mem,
pages_done++;
}
-out_up:
+ if (!ret)
+ mem->is_userptr = 1;
+
+ out_up:
up_read(&current->mm->mmap_sem);
return ret;
}
-static struct videobuf_buffer *__videobuf_alloc_vb(size_t size, bool cached)
+static void *__videobuf_alloc(size_t size)
{
struct videobuf_dma_contig_memory *mem;
struct videobuf_buffer *vb;
vb = kzalloc(size + sizeof(*mem), GFP_KERNEL);
if (vb) {
- vb->priv = ((char *)vb) + size;
- mem = vb->priv;
+ mem = vb->priv = ((char *)vb) + size;
mem->magic = MAGIC_DC_MEM;
- mem->cached = cached;
}
return vb;
}
-static struct videobuf_buffer *__videobuf_alloc_uncached(size_t size)
-{
- return __videobuf_alloc_vb(size, false);
-}
-
-static struct videobuf_buffer *__videobuf_alloc_cached(size_t size)
-{
- return __videobuf_alloc_vb(size, true);
-}
-
-static void *__videobuf_to_vaddr(struct videobuf_buffer *buf)
+static void *__videobuf_to_vmalloc(struct videobuf_buffer *buf)
{
struct videobuf_dma_contig_memory *mem = buf->priv;
@@ -283,6 +227,7 @@ static int __videobuf_iolock(struct videobuf_queue *q,
case V4L2_MEMORY_MMAP:
dev_dbg(q->dev, "%s memory method MMAP\n", __func__);
+
/* All handling should be done by __videobuf_mmap_mapper() */
if (!mem->vaddr) {
dev_err(q->dev, "memory is not alloced/mmapped.\n");
@@ -297,115 +242,121 @@ static int __videobuf_iolock(struct videobuf_queue *q,
return videobuf_dma_contig_user_get(mem, vb);
/* allocate memory for the read() method */
- if (__videobuf_dc_alloc(q->dev, mem, PAGE_ALIGN(vb->size),
- GFP_KERNEL))
+ mem->size = PAGE_ALIGN(vb->size);
+ mem->vaddr = dma_alloc_coherent(q->dev, mem->size,
+ &mem->dma_handle, GFP_KERNEL);
+ if (!mem->vaddr) {
+ dev_err(q->dev, "dma_alloc_coherent %ld failed\n",
+ mem->size);
return -ENOMEM;
+ }
+
+ dev_dbg(q->dev, "dma_alloc_coherent data is at %p (%ld)\n",
+ mem->vaddr, mem->size);
break;
case V4L2_MEMORY_OVERLAY:
default:
- dev_dbg(q->dev, "%s memory method OVERLAY/unknown\n", __func__);
+ dev_dbg(q->dev, "%s memory method OVERLAY/unknown\n",
+ __func__);
return -EINVAL;
}
return 0;
}
-static int __videobuf_sync(struct videobuf_queue *q,
- struct videobuf_buffer *buf)
+static int __videobuf_mmap_free(struct videobuf_queue *q)
{
- struct videobuf_dma_contig_memory *mem = buf->priv;
- BUG_ON(!mem);
- MAGIC_CHECK(mem->magic, MAGIC_DC_MEM);
+ unsigned int i;
- dma_sync_single_for_cpu(q->dev, mem->dma_handle, mem->size,
- DMA_FROM_DEVICE);
+ dev_dbg(q->dev, "%s\n", __func__);
+ for (i = 0; i < VIDEO_MAX_FRAME; i++) {
+ if (q->bufs[i] && q->bufs[i]->map)
+ return -EBUSY;
+ }
return 0;
}
static int __videobuf_mmap_mapper(struct videobuf_queue *q,
- struct videobuf_buffer *buf,
struct vm_area_struct *vma)
{
struct videobuf_dma_contig_memory *mem;
struct videobuf_mapping *map;
+ unsigned int first;
int retval;
- unsigned long size;
- unsigned long pos, start = vma->vm_start;
- struct page *page;
+ unsigned long size, offset = vma->vm_pgoff << PAGE_SHIFT;
dev_dbg(q->dev, "%s\n", __func__);
+ if (!(vma->vm_flags & VM_WRITE) || !(vma->vm_flags & VM_SHARED))
+ return -EINVAL;
+
+ /* look for first buffer to map */
+ for (first = 0; first < VIDEO_MAX_FRAME; first++) {
+ if (!q->bufs[first])
+ continue;
+
+ if (V4L2_MEMORY_MMAP != q->bufs[first]->memory)
+ continue;
+ if (q->bufs[first]->boff == offset)
+ break;
+ }
+ if (VIDEO_MAX_FRAME == first) {
+ dev_dbg(q->dev, "invalid user space offset [offset=0x%lx]\n",
+ offset);
+ return -EINVAL;
+ }
/* create mapping + update buffer list */
map = kzalloc(sizeof(struct videobuf_mapping), GFP_KERNEL);
if (!map)
return -ENOMEM;
- buf->map = map;
+ q->bufs[first]->map = map;
+ map->start = vma->vm_start;
+ map->end = vma->vm_end;
map->q = q;
- buf->baddr = vma->vm_start;
+ q->bufs[first]->baddr = vma->vm_start;
- mem = buf->priv;
+ mem = q->bufs[first]->priv;
BUG_ON(!mem);
MAGIC_CHECK(mem->magic, MAGIC_DC_MEM);
- if (__videobuf_dc_alloc(q->dev, mem, PAGE_ALIGN(buf->bsize),
- GFP_KERNEL | __GFP_COMP))
+ mem->size = PAGE_ALIGN(q->bufs[first]->bsize);
+ mem->vaddr = dma_alloc_coherent(q->dev, mem->size,
+ &mem->dma_handle, GFP_KERNEL);
+ if (!mem->vaddr) {
+ dev_err(q->dev, "dma_alloc_coherent size %ld failed\n",
+ mem->size);
goto error;
+ }
+ dev_dbg(q->dev, "dma_alloc_coherent data is at addr %p (size %ld)\n",
+ mem->vaddr, mem->size);
/* Try to remap memory */
size = vma->vm_end - vma->vm_start;
size = (size < mem->size) ? size : mem->size;
- if (!mem->cached) {
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
- retval = remap_pfn_range(vma, vma->vm_start,
- mem->dma_handle >> PAGE_SHIFT,
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ retval = remap_pfn_range(vma, vma->vm_start,
+ mem->dma_handle >> PAGE_SHIFT,
size, vma->vm_page_prot);
- if (retval) {
- dev_err(q->dev, "mmap: remap failed with error %d. ",
- retval);
- dma_free_coherent(q->dev, mem->size,
- mem->vaddr, mem->dma_handle);
- goto error;
- }
- } else {
- pos = (unsigned long)mem->vaddr;
-
- while (size > 0) {
- page = virt_to_page((void *)pos);
- if (NULL == page) {
- dev_err(q->dev, "mmap: virt_to_page failed\n");
- __videobuf_dc_free(q->dev, mem);
- goto error;
- }
- retval = vm_insert_page(vma, start, page);
- if (retval) {
- dev_err(q->dev, "mmap: insert failed with error %d\n",
- retval);
- __videobuf_dc_free(q->dev, mem);
- goto error;
- }
- start += PAGE_SIZE;
- pos += PAGE_SIZE;
-
- if (size > PAGE_SIZE)
- size -= PAGE_SIZE;
- else
- size = 0;
- }
+ if (retval) {
+ dev_err(q->dev, "mmap: remap failed with error %d. ", retval);
+ dma_free_coherent(q->dev, mem->size,
+ mem->vaddr, mem->dma_handle);
+ goto error;
}
- vma->vm_ops = &videobuf_vm_ops;
- vma->vm_flags |= VM_DONTEXPAND;
+ vma->vm_ops = &videobuf_vm_ops;
+ vma->vm_flags |= VM_DONTEXPAND;
vma->vm_private_data = map;
dev_dbg(q->dev, "mmap %p: q=%p %08lx-%08lx (%lx) pgoff %08lx buf %d\n",
map, q, vma->vm_start, vma->vm_end,
- (long int)buf->bsize, vma->vm_pgoff, buf->i);
-
+ (long int) q->bufs[first]->bsize,
+ vma->vm_pgoff, first);
videobuf_vm_open(vma);
return 0;
@@ -415,52 +366,86 @@ error:
return -ENOMEM;
}
-static struct videobuf_qtype_ops qops = {
- .magic = MAGIC_QTYPE_OPS,
- .alloc_vb = __videobuf_alloc_uncached,
- .iolock = __videobuf_iolock,
- .mmap_mapper = __videobuf_mmap_mapper,
- .vaddr = __videobuf_to_vaddr,
-};
+static int __videobuf_copy_to_user(struct videobuf_queue *q,
+ char __user *data, size_t count,
+ int nonblocking)
+{
+ struct videobuf_dma_contig_memory *mem = q->read_buf->priv;
+ void *vaddr;
+
+ BUG_ON(!mem);
+ MAGIC_CHECK(mem->magic, MAGIC_DC_MEM);
+ BUG_ON(!mem->vaddr);
+
+ /* copy to userspace */
+ if (count > q->read_buf->size - q->read_off)
+ count = q->read_buf->size - q->read_off;
+
+ vaddr = mem->vaddr;
+
+ if (copy_to_user(data, vaddr + q->read_off, count))
+ return -EFAULT;
-static struct videobuf_qtype_ops qops_cached = {
- .magic = MAGIC_QTYPE_OPS,
- .alloc_vb = __videobuf_alloc_cached,
- .iolock = __videobuf_iolock,
- .sync = __videobuf_sync,
- .mmap_mapper = __videobuf_mmap_mapper,
- .vaddr = __videobuf_to_vaddr,
+ return count;
+}
+
+static int __videobuf_copy_stream(struct videobuf_queue *q,
+ char __user *data, size_t count, size_t pos,
+ int vbihack, int nonblocking)
+{
+ unsigned int *fc;
+ struct videobuf_dma_contig_memory *mem = q->read_buf->priv;
+
+ BUG_ON(!mem);
+ MAGIC_CHECK(mem->magic, MAGIC_DC_MEM);
+
+ if (vbihack) {
+ /* dirty, undocumented hack -- pass the frame counter
+ * within the last four bytes of each vbi data block.
+ * We need that one to maintain backward compatibility
+ * to all vbi decoding software out there ... */
+ fc = (unsigned int *)mem->vaddr;
+ fc += (q->read_buf->size >> 2) - 1;
+ *fc = q->read_buf->field_count >> 1;
+ dev_dbg(q->dev, "vbihack: %d\n", *fc);
+ }
+
+ /* copy stuff using the common method */
+ count = __videobuf_copy_to_user(q, data, count, nonblocking);
+
+ if ((count == -EFAULT) && (pos == 0))
+ return -EFAULT;
+
+ return count;
+}
+
+static struct videobuf_qtype_ops qops = {
+ .magic = MAGIC_QTYPE_OPS,
+
+ .alloc = __videobuf_alloc,
+ .iolock = __videobuf_iolock,
+ .mmap_free = __videobuf_mmap_free,
+ .mmap_mapper = __videobuf_mmap_mapper,
+ .video_copy_to_user = __videobuf_copy_to_user,
+ .copy_stream = __videobuf_copy_stream,
+ .vmalloc = __videobuf_to_vmalloc,
};
void videobuf_queue_dma_contig_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
+ struct videobuf_queue_ops *ops,
struct device *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
- void *priv,
- struct mutex *ext_lock)
+ void *priv)
{
+ //printk("videobuf_queue_dma_contig_init %x\r\n", msize);
videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,
- priv, &qops, ext_lock);
+ priv, &qops);
}
EXPORT_SYMBOL_GPL(videobuf_queue_dma_contig_init);
-void videobuf_queue_dma_contig_init_cached(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
- struct device *dev,
- spinlock_t *irqlock,
- enum v4l2_buf_type type,
- enum v4l2_field field,
- unsigned int msize,
- void *priv, struct mutex *ext_lock)
-{
- videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,
- priv, &qops_cached, ext_lock);
-}
-EXPORT_SYMBOL_GPL(videobuf_queue_dma_contig_init_cached);
-
dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf)
{
struct videobuf_dma_contig_memory *mem = buf->priv;
@@ -498,10 +483,8 @@ void videobuf_dma_contig_free(struct videobuf_queue *q,
}
/* read() method */
- if (mem->vaddr) {
- __videobuf_dc_free(q->dev, mem);
- mem->vaddr = NULL;
- }
+ dma_free_coherent(q->dev, mem->size, mem->vaddr, mem->dma_handle);
+ mem->vaddr = NULL;
}
EXPORT_SYMBOL_GPL(videobuf_dma_contig_free);
diff --git a/drivers/media/v4l2-core/videobuf-dma-sg.c b/drivers/media/v4l2-core/videobuf-dma-sg.c
index 828e7c10..a583d394 100644
--- a/drivers/media/v4l2-core/videobuf-dma-sg.c
+++ b/drivers/media/v4l2-core/videobuf-dma-sg.c
@@ -37,12 +37,8 @@
#define MAGIC_DMABUF 0x19721112
#define MAGIC_SG_MEM 0x17890714
-#define MAGIC_CHECK(is, should) \
- if (unlikely((is) != (should))) { \
- printk(KERN_ERR "magic mismatch: %x (expected %x)\n", \
- is, should); \
- BUG(); \
- }
+#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \
+ { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); }
static int debug;
module_param(debug, int, 0644);
@@ -51,27 +47,22 @@ MODULE_DESCRIPTION("helper module to manage video4linux dma sg buffers");
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
MODULE_LICENSE("GPL");
-#define dprintk(level, fmt, arg...) \
- if (debug >= level) \
- printk(KERN_DEBUG "vbuf-sg: " fmt , ## arg)
+#define dprintk(level, fmt, arg...) if (debug >= level) \
+ printk(KERN_DEBUG "vbuf-sg: " fmt , ## arg)
/* --------------------------------------------------------------------- */
-/*
- * Return a scatterlist for some page-aligned vmalloc()'ed memory
- * block (NULL on errors). Memory for the scatterlist is allocated
- * using kmalloc. The caller must free the memory.
- */
-static struct scatterlist *videobuf_vmalloc_to_sg(unsigned char *virt,
- int nr_pages)
+struct scatterlist*
+videobuf_vmalloc_to_sg(unsigned char *virt, int nr_pages)
{
struct scatterlist *sglist;
struct page *pg;
int i;
- sglist = vzalloc(nr_pages * sizeof(*sglist));
+ sglist = vmalloc(nr_pages * sizeof(*sglist));
if (NULL == sglist)
return NULL;
+ memset(sglist, 0, nr_pages * sizeof(*sglist));
sg_init_table(sglist, nr_pages);
for (i = 0; i < nr_pages; i++, virt += PAGE_SIZE) {
pg = vmalloc_to_page(virt);
@@ -82,18 +73,13 @@ static struct scatterlist *videobuf_vmalloc_to_sg(unsigned char *virt,
}
return sglist;
-err:
+ err:
vfree(sglist);
return NULL;
}
-/*
- * Return a scatterlist for a an array of userpages (NULL on errors).
- * Memory for the scatterlist is allocated using kmalloc. The caller
- * must free the memory.
- */
-static struct scatterlist *videobuf_pages_to_sg(struct page **pages,
- int nr_pages, int offset, size_t size)
+struct scatterlist*
+videobuf_pages_to_sg(struct page **pages, int nr_pages, int offset)
{
struct scatterlist *sglist;
int i;
@@ -108,33 +94,30 @@ static struct scatterlist *videobuf_pages_to_sg(struct page **pages,
if (PageHighMem(pages[0]))
/* DMA to highmem pages might not work */
goto highmem;
- sg_set_page(&sglist[0], pages[0],
- min_t(size_t, PAGE_SIZE - offset, size), offset);
- size -= min_t(size_t, PAGE_SIZE - offset, size);
+ sg_set_page(&sglist[0], pages[0], PAGE_SIZE - offset, offset);
for (i = 1; i < nr_pages; i++) {
if (NULL == pages[i])
goto nopage;
if (PageHighMem(pages[i]))
goto highmem;
- sg_set_page(&sglist[i], pages[i], min_t(size_t, PAGE_SIZE, size), 0);
- size -= min_t(size_t, PAGE_SIZE, size);
+ sg_set_page(&sglist[i], pages[i], PAGE_SIZE, 0);
}
return sglist;
-nopage:
- dprintk(2, "sgl: oops - no page\n");
+ nopage:
+ dprintk(2,"sgl: oops - no page\n");
vfree(sglist);
return NULL;
-highmem:
- dprintk(2, "sgl: oops - highmem page\n");
+ highmem:
+ dprintk(2,"sgl: oops - highmem page\n");
vfree(sglist);
return NULL;
}
/* --------------------------------------------------------------------- */
-struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf)
+struct videobuf_dmabuf *videobuf_to_dma (struct videobuf_buffer *buf)
{
struct videobuf_dma_sg_memory *mem = buf->priv;
BUG_ON(!mem);
@@ -143,19 +126,17 @@ struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf)
return &mem->dma;
}
-EXPORT_SYMBOL_GPL(videobuf_to_dma);
void videobuf_dma_init(struct videobuf_dmabuf *dma)
{
- memset(dma, 0, sizeof(*dma));
+ memset(dma,0,sizeof(*dma));
dma->magic = MAGIC_DMABUF;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_init);
static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma,
int direction, unsigned long data, unsigned long size)
{
- unsigned long first, last;
+ unsigned long first,last;
int err, rw = 0;
dma->direction = direction;
@@ -172,24 +153,23 @@ static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma,
first = (data & PAGE_MASK) >> PAGE_SHIFT;
last = ((data+size-1) & PAGE_MASK) >> PAGE_SHIFT;
- dma->offset = data & ~PAGE_MASK;
- dma->size = size;
+ dma->offset = data & ~PAGE_MASK;
dma->nr_pages = last-first+1;
- dma->pages = kmalloc(dma->nr_pages * sizeof(struct page *), GFP_KERNEL);
+ dma->pages = kmalloc(dma->nr_pages * sizeof(struct page*),
+ GFP_KERNEL);
if (NULL == dma->pages)
return -ENOMEM;
+ dprintk(1,"init user [0x%lx+0x%lx => %d pages]\n",
+ data,size,dma->nr_pages);
- dprintk(1, "init user [0x%lx+0x%lx => %d pages]\n",
- data, size, dma->nr_pages);
-
- err = get_user_pages(current, current->mm,
+ err = get_user_pages(current,current->mm,
data & PAGE_MASK, dma->nr_pages,
rw == READ, 1, /* force */
dma->pages, NULL);
if (err != dma->nr_pages) {
dma->nr_pages = (err >= 0) ? err : 0;
- dprintk(1, "get_user_pages: err=%d [%d]\n", err, dma->nr_pages);
+ dprintk(1,"get_user_pages: err=%d [%d]\n",err,dma->nr_pages);
return err < 0 ? err : -EINVAL;
}
return 0;
@@ -199,182 +179,196 @@ int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction,
unsigned long data, unsigned long size)
{
int ret;
-
down_read(&current->mm->mmap_sem);
ret = videobuf_dma_init_user_locked(dma, direction, data, size);
up_read(&current->mm->mmap_sem);
return ret;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_init_user);
int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction,
int nr_pages)
{
- dprintk(1, "init kernel [%d pages]\n", nr_pages);
-
+ dprintk(1,"init kernel [%d pages]\n",nr_pages);
dma->direction = direction;
- dma->vaddr = vmalloc_32(nr_pages << PAGE_SHIFT);
- if (NULL == dma->vaddr) {
- dprintk(1, "vmalloc_32(%d pages) failed\n", nr_pages);
+ dma->vmalloc = vmalloc_32(nr_pages << PAGE_SHIFT);
+ if (NULL == dma->vmalloc) {
+ dprintk(1,"vmalloc_32(%d pages) failed\n",nr_pages);
return -ENOMEM;
}
-
- dprintk(1, "vmalloc is at addr 0x%08lx, size=%d\n",
- (unsigned long)dma->vaddr,
+ dprintk(1,"vmalloc is at addr 0x%08lx, size=%d\n",
+ (unsigned long)dma->vmalloc,
nr_pages << PAGE_SHIFT);
-
- memset(dma->vaddr, 0, nr_pages << PAGE_SHIFT);
+ memset(dma->vmalloc,0,nr_pages << PAGE_SHIFT);
dma->nr_pages = nr_pages;
-
return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_init_kernel);
int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction,
dma_addr_t addr, int nr_pages)
{
- dprintk(1, "init overlay [%d pages @ bus 0x%lx]\n",
- nr_pages, (unsigned long)addr);
+ dprintk(1,"init overlay [%d pages @ bus 0x%lx]\n",
+ nr_pages,(unsigned long)addr);
dma->direction = direction;
-
if (0 == addr)
return -EINVAL;
dma->bus_addr = addr;
dma->nr_pages = nr_pages;
-
return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_init_overlay);
-int videobuf_dma_map(struct device *dev, struct videobuf_dmabuf *dma)
+int videobuf_dma_map(struct videobuf_queue* q, struct videobuf_dmabuf *dma)
{
- MAGIC_CHECK(dma->magic, MAGIC_DMABUF);
+ MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
BUG_ON(0 == dma->nr_pages);
if (dma->pages) {
dma->sglist = videobuf_pages_to_sg(dma->pages, dma->nr_pages,
- dma->offset, dma->size);
+ dma->offset);
}
- if (dma->vaddr) {
- dma->sglist = videobuf_vmalloc_to_sg(dma->vaddr,
- dma->nr_pages);
+ if (dma->vmalloc) {
+ dma->sglist = videobuf_vmalloc_to_sg
+ (dma->vmalloc,dma->nr_pages);
}
if (dma->bus_addr) {
dma->sglist = vmalloc(sizeof(*dma->sglist));
if (NULL != dma->sglist) {
- dma->sglen = 1;
- sg_dma_address(&dma->sglist[0]) = dma->bus_addr
- & PAGE_MASK;
- dma->sglist[0].offset = dma->bus_addr & ~PAGE_MASK;
- sg_dma_len(&dma->sglist[0]) = dma->nr_pages * PAGE_SIZE;
+ dma->sglen = 1;
+ sg_dma_address(&dma->sglist[0]) = dma->bus_addr & PAGE_MASK;
+ dma->sglist[0].offset = dma->bus_addr & ~PAGE_MASK;
+ sg_dma_len(&dma->sglist[0]) = dma->nr_pages * PAGE_SIZE;
}
}
if (NULL == dma->sglist) {
- dprintk(1, "scatterlist is NULL\n");
+ dprintk(1,"scatterlist is NULL\n");
return -ENOMEM;
}
if (!dma->bus_addr) {
- dma->sglen = dma_map_sg(dev, dma->sglist,
+ dma->sglen = dma_map_sg(q->dev, dma->sglist,
dma->nr_pages, dma->direction);
if (0 == dma->sglen) {
printk(KERN_WARNING
- "%s: videobuf_map_sg failed\n", __func__);
+ "%s: videobuf_map_sg failed\n",__func__);
vfree(dma->sglist);
dma->sglist = NULL;
dma->sglen = 0;
return -ENOMEM;
}
}
-
return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_map);
-int videobuf_dma_unmap(struct device *dev, struct videobuf_dmabuf *dma)
+int videobuf_dma_sync(struct videobuf_queue *q, struct videobuf_dmabuf *dma)
{
MAGIC_CHECK(dma->magic, MAGIC_DMABUF);
+ BUG_ON(!dma->sglen);
+ dma_sync_sg_for_cpu(q->dev, dma->sglist, dma->nr_pages, dma->direction);
+ return 0;
+}
+
+int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma)
+{
+ MAGIC_CHECK(dma->magic, MAGIC_DMABUF);
if (!dma->sglen)
return 0;
- dma_unmap_sg(dev, dma->sglist, dma->sglen, dma->direction);
+ dma_unmap_sg(q->dev, dma->sglist, dma->nr_pages, dma->direction);
vfree(dma->sglist);
dma->sglist = NULL;
dma->sglen = 0;
-
return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_unmap);
int videobuf_dma_free(struct videobuf_dmabuf *dma)
{
- int i;
- MAGIC_CHECK(dma->magic, MAGIC_DMABUF);
+ MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
BUG_ON(dma->sglen);
if (dma->pages) {
- for (i = 0; i < dma->nr_pages; i++)
+ int i;
+ for (i=0; i < dma->nr_pages; i++)
page_cache_release(dma->pages[i]);
kfree(dma->pages);
dma->pages = NULL;
}
- vfree(dma->vaddr);
- dma->vaddr = NULL;
+ vfree(dma->vmalloc);
+ dma->vmalloc = NULL;
- if (dma->bus_addr)
+ if (dma->bus_addr) {
dma->bus_addr = 0;
+ }
dma->direction = DMA_NONE;
-
return 0;
}
-EXPORT_SYMBOL_GPL(videobuf_dma_free);
/* --------------------------------------------------------------------- */
-static void videobuf_vm_open(struct vm_area_struct *vma)
+int videobuf_sg_dma_map(struct device *dev, struct videobuf_dmabuf *dma)
{
- struct videobuf_mapping *map = vma->vm_private_data;
+ struct videobuf_queue q;
- dprintk(2, "vm_open %p [count=%d,vma=%08lx-%08lx]\n", map,
- map->count, vma->vm_start, vma->vm_end);
+ q.dev = dev;
+ return videobuf_dma_map(&q, dma);
+}
+
+int videobuf_sg_dma_unmap(struct device *dev, struct videobuf_dmabuf *dma)
+{
+ struct videobuf_queue q;
+
+ q.dev = dev;
+
+ return videobuf_dma_unmap(&q, dma);
+}
+
+/* --------------------------------------------------------------------- */
+
+static void
+videobuf_vm_open(struct vm_area_struct *vma)
+{
+ struct videobuf_mapping *map = vma->vm_private_data;
+
+ dprintk(2,"vm_open %p [count=%d,vma=%08lx-%08lx]\n",map,
+ map->count,vma->vm_start,vma->vm_end);
map->count++;
}
-static void videobuf_vm_close(struct vm_area_struct *vma)
+static void
+videobuf_vm_close(struct vm_area_struct *vma)
{
struct videobuf_mapping *map = vma->vm_private_data;
struct videobuf_queue *q = map->q;
struct videobuf_dma_sg_memory *mem;
int i;
- dprintk(2, "vm_close %p [count=%d,vma=%08lx-%08lx]\n", map,
- map->count, vma->vm_start, vma->vm_end);
+ dprintk(2,"vm_close %p [count=%d,vma=%08lx-%08lx]\n",map,
+ map->count,vma->vm_start,vma->vm_end);
map->count--;
if (0 == map->count) {
- dprintk(1, "munmap %p q=%p\n", map, q);
- videobuf_queue_lock(q);
+ dprintk(1,"munmap %p q=%p\n",map,q);
+ mutex_lock(&q->vb_lock);
for (i = 0; i < VIDEO_MAX_FRAME; i++) {
if (NULL == q->bufs[i])
continue;
- mem = q->bufs[i]->priv;
+ mem=q->bufs[i]->priv;
+
if (!mem)
continue;
- MAGIC_CHECK(mem->magic, MAGIC_SG_MEM);
+ MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
if (q->bufs[i]->map != map)
continue;
q->bufs[i]->map = NULL;
q->bufs[i]->baddr = 0;
- q->ops->buf_release(q, q->bufs[i]);
+ q->ops->buf_release(q,q->bufs[i]);
}
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
kfree(map);
}
return;
@@ -386,27 +380,26 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
* now ...). Bounce buffers don't work very well for the data rates
* video capture has.
*/
-static int videobuf_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+static int
+videobuf_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
struct page *page;
- dprintk(3, "fault: fault @ %08lx [vma %08lx-%08lx]\n",
- (unsigned long)vmf->virtual_address,
- vma->vm_start, vma->vm_end);
-
+ dprintk(3,"fault: fault @ %08lx [vma %08lx-%08lx]\n",
+ (unsigned long)vmf->virtual_address,vma->vm_start,vma->vm_end);
page = alloc_page(GFP_USER | __GFP_DMA32);
if (!page)
return VM_FAULT_OOM;
clear_user_highpage(page, (unsigned long)vmf->virtual_address);
vmf->page = page;
-
return 0;
}
-static const struct vm_operations_struct videobuf_vm_ops = {
- .open = videobuf_vm_open,
- .close = videobuf_vm_close,
- .fault = videobuf_vm_fault,
+static const struct vm_operations_struct videobuf_vm_ops =
+{
+ .open = videobuf_vm_open,
+ .close = videobuf_vm_close,
+ .fault = videobuf_vm_fault,
};
/* ---------------------------------------------------------------------
@@ -419,42 +412,40 @@ static const struct vm_operations_struct videobuf_vm_ops = {
struct videobuf_dma_sg_memory
*/
-static struct videobuf_buffer *__videobuf_alloc_vb(size_t size)
+static void *__videobuf_alloc(size_t size)
{
struct videobuf_dma_sg_memory *mem;
struct videobuf_buffer *vb;
- vb = kzalloc(size + sizeof(*mem), GFP_KERNEL);
- if (!vb)
- return vb;
+ vb = kzalloc(size+sizeof(*mem),GFP_KERNEL);
- mem = vb->priv = ((char *)vb) + size;
- mem->magic = MAGIC_SG_MEM;
+ mem = vb->priv = ((char *)vb)+size;
+ mem->magic=MAGIC_SG_MEM;
videobuf_dma_init(&mem->dma);
- dprintk(1, "%s: allocated at %p(%ld+%ld) & %p(%ld)\n",
- __func__, vb, (long)sizeof(*vb), (long)size - sizeof(*vb),
- mem, (long)sizeof(*mem));
+ dprintk(1,"%s: allocated at %p(%ld+%ld) & %p(%ld)\n",
+ __func__,vb,(long)sizeof(*vb),(long)size-sizeof(*vb),
+ mem,(long)sizeof(*mem));
return vb;
}
-static void *__videobuf_to_vaddr(struct videobuf_buffer *buf)
+static void *__videobuf_to_vmalloc (struct videobuf_buffer *buf)
{
struct videobuf_dma_sg_memory *mem = buf->priv;
BUG_ON(!mem);
MAGIC_CHECK(mem->magic, MAGIC_SG_MEM);
- return mem->dma.vaddr;
+ return mem->dma.vmalloc;
}
-static int __videobuf_iolock(struct videobuf_queue *q,
- struct videobuf_buffer *vb,
- struct v4l2_framebuffer *fbuf)
+static int __videobuf_iolock (struct videobuf_queue* q,
+ struct videobuf_buffer *vb,
+ struct v4l2_framebuffer *fbuf)
{
- int err, pages;
+ int err,pages;
dma_addr_t bus;
struct videobuf_dma_sg_memory *mem = vb->priv;
BUG_ON(!mem);
@@ -467,16 +458,16 @@ static int __videobuf_iolock(struct videobuf_queue *q,
if (0 == vb->baddr) {
/* no userspace addr -- kernel bounce buffer */
pages = PAGE_ALIGN(vb->size) >> PAGE_SHIFT;
- err = videobuf_dma_init_kernel(&mem->dma,
- DMA_FROM_DEVICE,
- pages);
+ err = videobuf_dma_init_kernel( &mem->dma,
+ DMA_FROM_DEVICE,
+ pages );
if (0 != err)
return err;
} else if (vb->memory == V4L2_MEMORY_USERPTR) {
/* dma directly to userspace */
- err = videobuf_dma_init_user(&mem->dma,
- DMA_FROM_DEVICE,
- vb->baddr, vb->bsize);
+ err = videobuf_dma_init_user( &mem->dma,
+ DMA_FROM_DEVICE,
+ vb->baddr,vb->bsize );
if (0 != err)
return err;
} else {
@@ -511,7 +502,7 @@ static int __videobuf_iolock(struct videobuf_queue *q,
default:
BUG();
}
- err = videobuf_dma_map(q->dev, &mem->dma);
+ err = videobuf_dma_map(q, &mem->dma);
if (0 != err)
return err;
@@ -522,51 +513,94 @@ static int __videobuf_sync(struct videobuf_queue *q,
struct videobuf_buffer *buf)
{
struct videobuf_dma_sg_memory *mem = buf->priv;
- BUG_ON(!mem || !mem->dma.sglen);
+ BUG_ON(!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
- MAGIC_CHECK(mem->magic, MAGIC_SG_MEM);
- MAGIC_CHECK(mem->dma.magic, MAGIC_DMABUF);
+ return videobuf_dma_sync(q,&mem->dma);
+}
- dma_sync_sg_for_cpu(q->dev, mem->dma.sglist,
- mem->dma.sglen, mem->dma.direction);
+static int __videobuf_mmap_free(struct videobuf_queue *q)
+{
+ int i;
+
+ for (i = 0; i < VIDEO_MAX_FRAME; i++) {
+ if (q->bufs[i]) {
+ if (q->bufs[i]->map)
+ return -EBUSY;
+ }
+ }
return 0;
}
static int __videobuf_mmap_mapper(struct videobuf_queue *q,
- struct videobuf_buffer *buf,
- struct vm_area_struct *vma)
+ struct vm_area_struct *vma)
{
- struct videobuf_dma_sg_memory *mem = buf->priv;
+ struct videobuf_dma_sg_memory *mem;
struct videobuf_mapping *map;
- unsigned int first, last, size = 0, i;
+ unsigned int first,last,size,i;
int retval;
retval = -EINVAL;
+ if (!(vma->vm_flags & VM_WRITE)) {
+ dprintk(1,"mmap app bug: PROT_WRITE please\n");
+ goto done;
+ }
+ if (!(vma->vm_flags & VM_SHARED)) {
+ dprintk(1,"mmap app bug: MAP_SHARED please\n");
+ goto done;
+ }
- BUG_ON(!mem);
- MAGIC_CHECK(mem->magic, MAGIC_SG_MEM);
+ /* This function maintains backwards compatibility with V4L1 and will
+ * map more than one buffer if the vma length is equal to the combined
+ * size of multiple buffers than it will map them together. See
+ * VIDIOCGMBUF in the v4l spec
+ *
+ * TODO: Allow drivers to specify if they support this mode
+ */
/* look for first buffer to map */
for (first = 0; first < VIDEO_MAX_FRAME; first++) {
- if (buf == q->bufs[first]) {
- size = PAGE_ALIGN(q->bufs[first]->bsize);
+ if (NULL == q->bufs[first])
+ continue;
+ mem=q->bufs[first]->priv;
+ BUG_ON(!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
+
+ if (V4L2_MEMORY_MMAP != q->bufs[first]->memory)
+ continue;
+ if (q->bufs[first]->boff == (vma->vm_pgoff << PAGE_SHIFT))
break;
- }
}
-
- /* paranoia, should never happen since buf is always valid. */
- if (!size) {
- dprintk(1, "mmap app bug: offset invalid [offset=0x%lx]\n",
- (vma->vm_pgoff << PAGE_SHIFT));
+ if (VIDEO_MAX_FRAME == first) {
+ dprintk(1,"mmap app bug: offset invalid [offset=0x%lx]\n",
+ (vma->vm_pgoff << PAGE_SHIFT));
goto done;
}
- last = first;
+ /* look for last buffer to map */
+ for (size = 0, last = first; last < VIDEO_MAX_FRAME; last++) {
+ if (NULL == q->bufs[last])
+ continue;
+ if (V4L2_MEMORY_MMAP != q->bufs[last]->memory)
+ continue;
+ if (q->bufs[last]->map) {
+ retval = -EBUSY;
+ goto done;
+ }
+ size += PAGE_ALIGN(q->bufs[last]->bsize);
+ if (size == (vma->vm_end - vma->vm_start))
+ break;
+ }
+ if (VIDEO_MAX_FRAME == last) {
+ dprintk(1,"mmap app bug: size invalid [size=0x%lx]\n",
+ (vma->vm_end - vma->vm_start));
+ goto done;
+ }
/* create mapping + update buffer list */
retval = -ENOMEM;
- map = kmalloc(sizeof(struct videobuf_mapping), GFP_KERNEL);
+ map = kmalloc(sizeof(struct videobuf_mapping),GFP_KERNEL);
if (NULL == map)
goto done;
@@ -580,27 +614,79 @@ static int __videobuf_mmap_mapper(struct videobuf_queue *q,
}
map->count = 1;
+ map->start = vma->vm_start;
+ map->end = vma->vm_end;
map->q = q;
vma->vm_ops = &videobuf_vm_ops;
- vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
+ vma->vm_flags |= VM_DONTEXPAND | VM_RESERVED;
vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */
vma->vm_private_data = map;
- dprintk(1, "mmap %p: q=%p %08lx-%08lx pgoff %08lx bufs %d-%d\n",
- map, q, vma->vm_start, vma->vm_end, vma->vm_pgoff, first, last);
+ dprintk(1,"mmap %p: q=%p %08lx-%08lx pgoff %08lx bufs %d-%d\n",
+ map,q,vma->vm_start,vma->vm_end,vma->vm_pgoff,first,last);
retval = 0;
-done:
+ done:
return retval;
}
+static int __videobuf_copy_to_user ( struct videobuf_queue *q,
+ char __user *data, size_t count,
+ int nonblocking )
+{
+ struct videobuf_dma_sg_memory *mem = q->read_buf->priv;
+ BUG_ON(!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
+
+ /* copy to userspace */
+ if (count > q->read_buf->size - q->read_off)
+ count = q->read_buf->size - q->read_off;
+
+ if (copy_to_user(data, mem->dma.vmalloc+q->read_off, count))
+ return -EFAULT;
+
+ return count;
+}
+
+static int __videobuf_copy_stream ( struct videobuf_queue *q,
+ char __user *data, size_t count, size_t pos,
+ int vbihack, int nonblocking )
+{
+ unsigned int *fc;
+ struct videobuf_dma_sg_memory *mem = q->read_buf->priv;
+ BUG_ON(!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
+
+ if (vbihack) {
+ /* dirty, undocumented hack -- pass the frame counter
+ * within the last four bytes of each vbi data block.
+ * We need that one to maintain backward compatibility
+ * to all vbi decoding software out there ... */
+ fc = (unsigned int*)mem->dma.vmalloc;
+ fc += (q->read_buf->size>>2) -1;
+ *fc = q->read_buf->field_count >> 1;
+ dprintk(1,"vbihack: %d\n",*fc);
+ }
+
+ /* copy stuff using the common method */
+ count = __videobuf_copy_to_user (q,data,count,nonblocking);
+
+ if ( (count==-EFAULT) && (0 == pos) )
+ return -EFAULT;
+
+ return count;
+}
+
static struct videobuf_qtype_ops sg_ops = {
.magic = MAGIC_QTYPE_OPS,
- .alloc_vb = __videobuf_alloc_vb,
+ .alloc = __videobuf_alloc,
.iolock = __videobuf_iolock,
.sync = __videobuf_sync,
+ .mmap_free = __videobuf_mmap_free,
.mmap_mapper = __videobuf_mmap_mapper,
- .vaddr = __videobuf_to_vaddr,
+ .video_copy_to_user = __videobuf_copy_to_user,
+ .copy_stream = __videobuf_copy_stream,
+ .vmalloc = __videobuf_to_vmalloc,
};
void *videobuf_sg_alloc(size_t size)
@@ -612,22 +698,44 @@ void *videobuf_sg_alloc(size_t size)
q.msize = size;
- return videobuf_alloc_vb(&q);
+ return videobuf_alloc(&q);
}
-EXPORT_SYMBOL_GPL(videobuf_sg_alloc);
-void videobuf_queue_sg_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
+void videobuf_queue_sg_init(struct videobuf_queue* q,
+ struct videobuf_queue_ops *ops,
struct device *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
- void *priv,
- struct mutex *ext_lock)
+ void *priv)
{
videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,
- priv, &sg_ops, ext_lock);
+ priv, &sg_ops);
}
+
+/* --------------------------------------------------------------------- */
+
+EXPORT_SYMBOL_GPL(videobuf_vmalloc_to_sg);
+
+EXPORT_SYMBOL_GPL(videobuf_to_dma);
+EXPORT_SYMBOL_GPL(videobuf_dma_init);
+EXPORT_SYMBOL_GPL(videobuf_dma_init_user);
+EXPORT_SYMBOL_GPL(videobuf_dma_init_kernel);
+EXPORT_SYMBOL_GPL(videobuf_dma_init_overlay);
+EXPORT_SYMBOL_GPL(videobuf_dma_map);
+EXPORT_SYMBOL_GPL(videobuf_dma_sync);
+EXPORT_SYMBOL_GPL(videobuf_dma_unmap);
+EXPORT_SYMBOL_GPL(videobuf_dma_free);
+
+EXPORT_SYMBOL_GPL(videobuf_sg_dma_map);
+EXPORT_SYMBOL_GPL(videobuf_sg_dma_unmap);
+EXPORT_SYMBOL_GPL(videobuf_sg_alloc);
+
EXPORT_SYMBOL_GPL(videobuf_queue_sg_init);
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff --git a/drivers/media/v4l2-core/videobuf-dvb.c b/drivers/media/v4l2-core/videobuf-dvb.c
index b7efa451..0e7dcba8 100644
--- a/drivers/media/v4l2-core/videobuf-dvb.c
+++ b/drivers/media/v4l2-core/videobuf-dvb.c
@@ -19,7 +19,6 @@
#include <linux/fs.h>
#include <linux/kthread.h>
#include <linux/file.h>
-#include <linux/slab.h>
#include <linux/freezer.h>
@@ -45,6 +44,7 @@ static int videobuf_dvb_thread(void *data)
struct videobuf_dvb *dvb = data;
struct videobuf_buffer *buf;
unsigned long flags;
+ int err;
void *outp;
dprintk("dvb thread started\n");
@@ -56,7 +56,7 @@ static int videobuf_dvb_thread(void *data)
buf = list_entry(dvb->dvbq.stream.next,
struct videobuf_buffer, stream);
list_del(&buf->stream);
- videobuf_waiton(&dvb->dvbq, buf, 0, 1);
+ err = videobuf_waiton(buf,0,1);
/* no more feeds left or stop_feed() asked us to quit */
if (0 == dvb->nfeeds)
@@ -66,7 +66,7 @@ static int videobuf_dvb_thread(void *data)
try_to_freeze();
/* feed buffer data to demux */
- outp = videobuf_queue_to_vaddr(&dvb->dvbq, buf);
+ outp = videobuf_queue_to_vmalloc (&dvb->dvbq, buf);
if (buf->state == VIDEOBUF_DONE)
dvb_dmx_swfilter(&dvb->demux, outp,
@@ -222,10 +222,9 @@ static int videobuf_dvb_register_frontend(struct dvb_adapter *adapter,
}
/* register network adapter */
- result = dvb_net_init(adapter, &dvb->net, &dvb->demux.dmx);
- if (result < 0) {
- printk(KERN_WARNING "%s: dvb_net_init failed (errno = %d)\n",
- dvb->name, result);
+ dvb_net_init(adapter, &dvb->net, &dvb->demux.dmx);
+ if (dvb->net.dvbdev == NULL) {
+ result = -ENOMEM;
goto fail_fe_conn;
}
return 0;
diff --git a/drivers/media/v4l2-core/videobuf-vmalloc.c b/drivers/media/v4l2-core/videobuf-vmalloc.c
index 2ff7fcc7..70c8eafa 100644
--- a/drivers/media/v4l2-core/videobuf-vmalloc.c
+++ b/drivers/media/v4l2-core/videobuf-vmalloc.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/slab.h>
+#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
@@ -30,12 +31,8 @@
#define MAGIC_DMABUF 0x17760309
#define MAGIC_VMAL_MEM 0x18221223
-#define MAGIC_CHECK(is, should) \
- if (unlikely((is) != (should))) { \
- printk(KERN_ERR "magic mismatch: %x (expected %x)\n", \
- is, should); \
- BUG(); \
- }
+#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \
+ { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); }
static int debug;
module_param(debug, int, 0644);
@@ -44,19 +41,21 @@ MODULE_DESCRIPTION("helper module to manage video4linux vmalloc buffers");
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
MODULE_LICENSE("GPL");
-#define dprintk(level, fmt, arg...) \
- if (debug >= level) \
- printk(KERN_DEBUG "vbuf-vmalloc: " fmt , ## arg)
-
+#define dprintk(level, fmt, arg...) if (debug >= level) \
+ printk(KERN_DEBUG "vbuf-vmalloc: " fmt , ## arg)
+#ifndef VM_RESERVED
+#define VM_RESERVED (VM_DONTEXPAND | VM_DONTDUMP)
+#endif
/***************************************************************************/
-static void videobuf_vm_open(struct vm_area_struct *vma)
+static void
+videobuf_vm_open(struct vm_area_struct *vma)
{
struct videobuf_mapping *map = vma->vm_private_data;
- dprintk(2, "vm_open %p [count=%u,vma=%08lx-%08lx]\n", map,
- map->count, vma->vm_start, vma->vm_end);
+ dprintk(2,"vm_open %p [count=%u,vma=%08lx-%08lx]\n",map,
+ map->count,vma->vm_start,vma->vm_end);
map->count++;
}
@@ -67,7 +66,7 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
struct videobuf_queue *q = map->q;
int i;
- dprintk(2, "vm_close %p [count=%u,vma=%08lx-%08lx]\n", map,
+ dprintk(2,"vm_close %p [count=%u,vma=%08lx-%08lx]\n", map,
map->count, vma->vm_start, vma->vm_end);
map->count--;
@@ -75,7 +74,7 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
struct videobuf_vmalloc_memory *mem;
dprintk(1, "munmap %p q=%p\n", map, q);
- videobuf_queue_lock(q);
+ mutex_lock(&q->vb_lock);
/* We need first to cancel streams, before unmapping */
if (q->streaming)
@@ -102,10 +101,10 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
called with IRQ's disabled
*/
dprintk(1, "%s: buf[%d] freeing (%p)\n",
- __func__, i, mem->vaddr);
+ __func__, i, mem->vmalloc);
- vfree(mem->vaddr);
- mem->vaddr = NULL;
+ vfree(mem->vmalloc);
+ mem->vmalloc = NULL;
}
q->bufs[i]->map = NULL;
@@ -114,13 +113,14 @@ static void videobuf_vm_close(struct vm_area_struct *vma)
kfree(map);
- videobuf_queue_unlock(q);
+ mutex_unlock(&q->vb_lock);
}
return;
}
-static const struct vm_operations_struct videobuf_vm_ops = {
+static const struct vm_operations_struct videobuf_vm_ops =
+{
.open = videobuf_vm_open,
.close = videobuf_vm_close,
};
@@ -135,28 +135,26 @@ static const struct vm_operations_struct videobuf_vm_ops = {
struct videobuf_dma_sg_memory
*/
-static struct videobuf_buffer *__videobuf_alloc_vb(size_t size)
+static void *__videobuf_alloc(size_t size)
{
struct videobuf_vmalloc_memory *mem;
struct videobuf_buffer *vb;
- vb = kzalloc(size + sizeof(*mem), GFP_KERNEL);
- if (!vb)
- return vb;
+ vb = kzalloc(size+sizeof(*mem),GFP_KERNEL);
- mem = vb->priv = ((char *)vb) + size;
- mem->magic = MAGIC_VMAL_MEM;
+ mem = vb->priv = ((char *)vb)+size;
+ mem->magic=MAGIC_VMAL_MEM;
- dprintk(1, "%s: allocated at %p(%ld+%ld) & %p(%ld)\n",
- __func__, vb, (long)sizeof(*vb), (long)size - sizeof(*vb),
- mem, (long)sizeof(*mem));
+ dprintk(1,"%s: allocated at %p(%ld+%ld) & %p(%ld)\n",
+ __func__,vb,(long)sizeof(*vb),(long)size-sizeof(*vb),
+ mem,(long)sizeof(*mem));
return vb;
}
-static int __videobuf_iolock(struct videobuf_queue *q,
- struct videobuf_buffer *vb,
- struct v4l2_framebuffer *fbuf)
+static int __videobuf_iolock (struct videobuf_queue* q,
+ struct videobuf_buffer *vb,
+ struct v4l2_framebuffer *fbuf)
{
struct videobuf_vmalloc_memory *mem = vb->priv;
int pages;
@@ -170,7 +168,7 @@ static int __videobuf_iolock(struct videobuf_queue *q,
dprintk(1, "%s memory method MMAP\n", __func__);
/* All handling should be done by __videobuf_mmap_mapper() */
- if (!mem->vaddr) {
+ if (!mem->vmalloc) {
printk(KERN_ERR "memory is not alloced/mmapped.\n");
return -EINVAL;
}
@@ -180,22 +178,24 @@ static int __videobuf_iolock(struct videobuf_queue *q,
dprintk(1, "%s memory method USERPTR\n", __func__);
+#if 1
if (vb->baddr) {
printk(KERN_ERR "USERPTR is currently not supported\n");
return -EINVAL;
}
+#endif
/* The only USERPTR currently supported is the one needed for
- * read() method.
+ read() method.
*/
- mem->vaddr = vmalloc_user(pages);
- if (!mem->vaddr) {
+ mem->vmalloc = vmalloc_user(pages);
+ if (!mem->vmalloc) {
printk(KERN_ERR "vmalloc (%d pages) failed\n", pages);
return -ENOMEM;
}
dprintk(1, "vmalloc is at addr %p (%d pages)\n",
- mem->vaddr, pages);
+ mem->vmalloc, pages);
#if 0
int rc;
@@ -211,7 +211,7 @@ static int __videobuf_iolock(struct videobuf_queue *q,
/* Try to remap memory */
rc = remap_vmalloc_range(mem->vma, (void *)vb->baddr, 0);
if (rc < 0) {
- printk(KERN_ERR "mmap: remap failed with error %d", rc);
+ printk(KERN_ERR "mmap: remap failed with error %d. ", rc);
return -ENOMEM;
}
#endif
@@ -229,54 +229,97 @@ static int __videobuf_iolock(struct videobuf_queue *q,
return 0;
}
+static int __videobuf_sync(struct videobuf_queue *q,
+ struct videobuf_buffer *buf)
+{
+ return 0;
+}
+
+static int __videobuf_mmap_free(struct videobuf_queue *q)
+{
+ unsigned int i;
+
+ dprintk(1, "%s\n", __func__);
+ for (i = 0; i < VIDEO_MAX_FRAME; i++) {
+ if (q->bufs[i]) {
+ if (q->bufs[i]->map)
+ return -EBUSY;
+ }
+ }
+
+ return 0;
+}
+
static int __videobuf_mmap_mapper(struct videobuf_queue *q,
- struct videobuf_buffer *buf,
- struct vm_area_struct *vma)
+ struct vm_area_struct *vma)
{
struct videobuf_vmalloc_memory *mem;
struct videobuf_mapping *map;
+ unsigned int first;
int retval, pages;
+ unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
dprintk(1, "%s\n", __func__);
+ if (!(vma->vm_flags & VM_WRITE) || !(vma->vm_flags & VM_SHARED))
+ return -EINVAL;
+
+ /* look for first buffer to map */
+ for (first = 0; first < VIDEO_MAX_FRAME; first++) {
+ if (NULL == q->bufs[first])
+ continue;
+
+ if (V4L2_MEMORY_MMAP != q->bufs[first]->memory)
+ continue;
+ if (q->bufs[first]->boff == offset)
+ break;
+ }
+ if (VIDEO_MAX_FRAME == first) {
+ dprintk(1,"mmap app bug: offset invalid [offset=0x%lx]\n",
+ (vma->vm_pgoff << PAGE_SHIFT));
+ return -EINVAL;
+ }
/* create mapping + update buffer list */
map = kzalloc(sizeof(struct videobuf_mapping), GFP_KERNEL);
if (NULL == map)
return -ENOMEM;
- buf->map = map;
+ q->bufs[first]->map = map;
+ map->start = vma->vm_start;
+ map->end = vma->vm_end;
map->q = q;
- buf->baddr = vma->vm_start;
+ q->bufs[first]->baddr = vma->vm_start;
- mem = buf->priv;
+ mem = q->bufs[first]->priv;
BUG_ON(!mem);
MAGIC_CHECK(mem->magic, MAGIC_VMAL_MEM);
pages = PAGE_ALIGN(vma->vm_end - vma->vm_start);
- mem->vaddr = vmalloc_user(pages);
- if (!mem->vaddr) {
+ mem->vmalloc = vmalloc_user(pages);
+ if (!mem->vmalloc) {
printk(KERN_ERR "vmalloc (%d pages) failed\n", pages);
goto error;
}
- dprintk(1, "vmalloc is at addr %p (%d pages)\n", mem->vaddr, pages);
+ dprintk(1, "vmalloc is at addr %p (%d pages)\n",
+ mem->vmalloc, pages);
/* Try to remap memory */
- retval = remap_vmalloc_range(vma, mem->vaddr, 0);
+ retval = remap_vmalloc_range(vma, mem->vmalloc, 0);
if (retval < 0) {
printk(KERN_ERR "mmap: remap failed with error %d. ", retval);
- vfree(mem->vaddr);
+ vfree(mem->vmalloc);
goto error;
}
vma->vm_ops = &videobuf_vm_ops;
- vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
+ vma->vm_flags |= VM_DONTEXPAND | VM_RESERVED;
vma->vm_private_data = map;
- dprintk(1, "mmap %p: q=%p %08lx-%08lx (%lx) pgoff %08lx buf %d\n",
+ dprintk(1,"mmap %p: q=%p %08lx-%08lx (%lx) pgoff %08lx buf %d\n",
map, q, vma->vm_start, vma->vm_end,
- (long int)buf->bsize,
- vma->vm_pgoff, buf->i);
+ (long int) q->bufs[first]->bsize,
+ vma->vm_pgoff, first);
videobuf_vm_open(vma);
@@ -288,41 +331,94 @@ error:
return -ENOMEM;
}
+static int __videobuf_copy_to_user ( struct videobuf_queue *q,
+ char __user *data, size_t count,
+ int nonblocking )
+{
+ struct videobuf_vmalloc_memory *mem=q->read_buf->priv;
+ BUG_ON (!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
+
+ BUG_ON (!mem->vmalloc);
+
+ /* copy to userspace */
+ if (count > q->read_buf->size - q->read_off)
+ count = q->read_buf->size - q->read_off;
+
+ if (copy_to_user(data, mem->vmalloc+q->read_off, count))
+ return -EFAULT;
+
+ return count;
+}
+
+static int __videobuf_copy_stream ( struct videobuf_queue *q,
+ char __user *data, size_t count, size_t pos,
+ int vbihack, int nonblocking )
+{
+ unsigned int *fc;
+ struct videobuf_vmalloc_memory *mem=q->read_buf->priv;
+ BUG_ON (!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
+
+ if (vbihack) {
+ /* dirty, undocumented hack -- pass the frame counter
+ * within the last four bytes of each vbi data block.
+ * We need that one to maintain backward compatibility
+ * to all vbi decoding software out there ... */
+ fc = (unsigned int*)mem->vmalloc;
+ fc += (q->read_buf->size>>2) -1;
+ *fc = q->read_buf->field_count >> 1;
+ dprintk(1,"vbihack: %d\n",*fc);
+ }
+
+ /* copy stuff using the common method */
+ count = __videobuf_copy_to_user (q,data,count,nonblocking);
+
+ if ( (count==-EFAULT) && (0 == pos) )
+ return -EFAULT;
+
+ return count;
+}
+
static struct videobuf_qtype_ops qops = {
.magic = MAGIC_QTYPE_OPS,
- .alloc_vb = __videobuf_alloc_vb,
+ .alloc = __videobuf_alloc,
.iolock = __videobuf_iolock,
+ .sync = __videobuf_sync,
+ .mmap_free = __videobuf_mmap_free,
.mmap_mapper = __videobuf_mmap_mapper,
- .vaddr = videobuf_to_vmalloc,
+ .video_copy_to_user = __videobuf_copy_to_user,
+ .copy_stream = __videobuf_copy_stream,
+ .vmalloc = videobuf_to_vmalloc,
};
-void videobuf_queue_vmalloc_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
- struct device *dev,
+void videobuf_queue_vmalloc_init(struct videobuf_queue* q,
+ struct videobuf_queue_ops *ops,
+ void *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
- void *priv,
- struct mutex *ext_lock)
+ void *priv)
{
videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,
- priv, &qops, ext_lock);
+ priv, &qops);
}
+
EXPORT_SYMBOL_GPL(videobuf_queue_vmalloc_init);
-void *videobuf_to_vmalloc(struct videobuf_buffer *buf)
+void *videobuf_to_vmalloc (struct videobuf_buffer *buf)
{
- struct videobuf_vmalloc_memory *mem = buf->priv;
- BUG_ON(!mem);
- MAGIC_CHECK(mem->magic, MAGIC_VMAL_MEM);
+ struct videobuf_vmalloc_memory *mem=buf->priv;
+ BUG_ON (!mem);
+ MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
- return mem->vaddr;
+ return mem->vmalloc;
}
EXPORT_SYMBOL_GPL(videobuf_to_vmalloc);
-void videobuf_vmalloc_free(struct videobuf_buffer *buf)
+void videobuf_vmalloc_free (struct videobuf_buffer *buf)
{
struct videobuf_vmalloc_memory *mem = buf->priv;
@@ -340,10 +436,15 @@ void videobuf_vmalloc_free(struct videobuf_buffer *buf)
MAGIC_CHECK(mem->magic, MAGIC_VMAL_MEM);
- vfree(mem->vaddr);
- mem->vaddr = NULL;
+ vfree(mem->vmalloc);
+ mem->vmalloc = NULL;
return;
}
EXPORT_SYMBOL_GPL(videobuf_vmalloc_free);
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff --git a/drivers/media/v4l2-core/videobuf2-core.c b/drivers/media/v4l2-core/videobuf2-core.c
deleted file mode 100644
index db1235dc..00000000
--- a/drivers/media/v4l2-core/videobuf2-core.c
+++ /dev/null
@@ -1,2685 +0,0 @@
-/*
- * videobuf2-core.c - V4L2 driver helper framework
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- * Marek Szyprowski <m.szyprowski@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#include <linux/err.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/sched.h>
-
-#include <media/v4l2-dev.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-event.h>
-#include <media/videobuf2-core.h>
-
-static int debug;
-module_param(debug, int, 0644);
-
-#define dprintk(level, fmt, arg...) \
- do { \
- if (debug >= level) \
- printk(KERN_DEBUG "vb2: " fmt, ## arg); \
- } while (0)
-
-#define call_memop(q, op, args...) \
- (((q)->mem_ops->op) ? \
- ((q)->mem_ops->op(args)) : 0)
-
-#define call_qop(q, op, args...) \
- (((q)->ops->op) ? ((q)->ops->op(args)) : 0)
-
-#define V4L2_BUFFER_MASK_FLAGS (V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_QUEUED | \
- V4L2_BUF_FLAG_DONE | V4L2_BUF_FLAG_ERROR | \
- V4L2_BUF_FLAG_PREPARED | \
- V4L2_BUF_FLAG_TIMESTAMP_MASK)
-
-/**
- * __vb2_buf_mem_alloc() - allocate video memory for the given buffer
- */
-static int __vb2_buf_mem_alloc(struct vb2_buffer *vb)
-{
- struct vb2_queue *q = vb->vb2_queue;
- void *mem_priv;
- int plane;
-
- /* Allocate memory for all planes in this buffer */
- for (plane = 0; plane < vb->num_planes; ++plane) {
- mem_priv = call_memop(q, alloc, q->alloc_ctx[plane],
- q->plane_sizes[plane]);
- if (IS_ERR_OR_NULL(mem_priv))
- goto free;
-
- /* Associate allocator private data with this plane */
- vb->planes[plane].mem_priv = mem_priv;
- vb->v4l2_planes[plane].length = q->plane_sizes[plane];
- }
-
- return 0;
-free:
- /* Free already allocated memory if one of the allocations failed */
- for (; plane > 0; --plane) {
- call_memop(q, put, vb->planes[plane - 1].mem_priv);
- vb->planes[plane - 1].mem_priv = NULL;
- }
-
- return -ENOMEM;
-}
-
-/**
- * __vb2_buf_mem_free() - free memory of the given buffer
- */
-static void __vb2_buf_mem_free(struct vb2_buffer *vb)
-{
- struct vb2_queue *q = vb->vb2_queue;
- unsigned int plane;
-
- for (plane = 0; plane < vb->num_planes; ++plane) {
- call_memop(q, put, vb->planes[plane].mem_priv);
- vb->planes[plane].mem_priv = NULL;
- dprintk(3, "Freed plane %d of buffer %d\n", plane,
- vb->v4l2_buf.index);
- }
-}
-
-/**
- * __vb2_buf_userptr_put() - release userspace memory associated with
- * a USERPTR buffer
- */
-static void __vb2_buf_userptr_put(struct vb2_buffer *vb)
-{
- struct vb2_queue *q = vb->vb2_queue;
- unsigned int plane;
-
- for (plane = 0; plane < vb->num_planes; ++plane) {
- if (vb->planes[plane].mem_priv)
- call_memop(q, put_userptr, vb->planes[plane].mem_priv);
- vb->planes[plane].mem_priv = NULL;
- }
-}
-
-/**
- * __vb2_plane_dmabuf_put() - release memory associated with
- * a DMABUF shared plane
- */
-static void __vb2_plane_dmabuf_put(struct vb2_queue *q, struct vb2_plane *p)
-{
- if (!p->mem_priv)
- return;
-
- if (p->dbuf_mapped)
- call_memop(q, unmap_dmabuf, p->mem_priv);
-
- call_memop(q, detach_dmabuf, p->mem_priv);
- dma_buf_put(p->dbuf);
- memset(p, 0, sizeof(*p));
-}
-
-/**
- * __vb2_buf_dmabuf_put() - release memory associated with
- * a DMABUF shared buffer
- */
-static void __vb2_buf_dmabuf_put(struct vb2_buffer *vb)
-{
- struct vb2_queue *q = vb->vb2_queue;
- unsigned int plane;
-
- for (plane = 0; plane < vb->num_planes; ++plane)
- __vb2_plane_dmabuf_put(q, &vb->planes[plane]);
-}
-
-/**
- * __setup_offsets() - setup unique offsets ("cookies") for every plane in
- * every buffer on the queue
- */
-static void __setup_offsets(struct vb2_queue *q, unsigned int n)
-{
- unsigned int buffer, plane;
- struct vb2_buffer *vb;
- unsigned long off;
-
- if (q->num_buffers) {
- struct v4l2_plane *p;
- vb = q->bufs[q->num_buffers - 1];
- p = &vb->v4l2_planes[vb->num_planes - 1];
- off = PAGE_ALIGN(p->m.mem_offset + p->length);
- } else {
- off = 0;
- }
-
- for (buffer = q->num_buffers; buffer < q->num_buffers + n; ++buffer) {
- vb = q->bufs[buffer];
- if (!vb)
- continue;
-
- for (plane = 0; plane < vb->num_planes; ++plane) {
- vb->v4l2_planes[plane].length = q->plane_sizes[plane];
- vb->v4l2_planes[plane].m.mem_offset = off;
-
- dprintk(3, "Buffer %d, plane %d offset 0x%08lx\n",
- buffer, plane, off);
-
- off += vb->v4l2_planes[plane].length;
- off = PAGE_ALIGN(off);
- }
- }
-}
-
-/**
- * __vb2_queue_alloc() - allocate videobuf buffer structures and (for MMAP type)
- * video buffer memory for all buffers/planes on the queue and initializes the
- * queue
- *
- * Returns the number of buffers successfully allocated.
- */
-static int __vb2_queue_alloc(struct vb2_queue *q, enum v4l2_memory memory,
- unsigned int num_buffers, unsigned int num_planes)
-{
- unsigned int buffer;
- struct vb2_buffer *vb;
- int ret;
-
- for (buffer = 0; buffer < num_buffers; ++buffer) {
- /* Allocate videobuf buffer structures */
- vb = kzalloc(q->buf_struct_size, GFP_KERNEL);
- if (!vb) {
- dprintk(1, "Memory alloc for buffer struct failed\n");
- break;
- }
-
- /* Length stores number of planes for multiplanar buffers */
- if (V4L2_TYPE_IS_MULTIPLANAR(q->type))
- vb->v4l2_buf.length = num_planes;
-
- vb->state = VB2_BUF_STATE_DEQUEUED;
- vb->vb2_queue = q;
- vb->num_planes = num_planes;
- vb->v4l2_buf.index = q->num_buffers + buffer;
- vb->v4l2_buf.type = q->type;
- vb->v4l2_buf.memory = memory;
-
- /* Allocate video buffer memory for the MMAP type */
- if (memory == V4L2_MEMORY_MMAP) {
- ret = __vb2_buf_mem_alloc(vb);
- if (ret) {
- dprintk(1, "Failed allocating memory for "
- "buffer %d\n", buffer);
- kfree(vb);
- break;
- }
- /*
- * Call the driver-provided buffer initialization
- * callback, if given. An error in initialization
- * results in queue setup failure.
- */
- ret = call_qop(q, buf_init, vb);
- if (ret) {
- dprintk(1, "Buffer %d %p initialization"
- " failed\n", buffer, vb);
- __vb2_buf_mem_free(vb);
- kfree(vb);
- break;
- }
- }
-
- q->bufs[q->num_buffers + buffer] = vb;
- }
-
- __setup_offsets(q, buffer);
-
- dprintk(1, "Allocated %d buffers, %d plane(s) each\n",
- buffer, num_planes);
-
- return buffer;
-}
-
-/**
- * __vb2_free_mem() - release all video buffer memory for a given queue
- */
-static void __vb2_free_mem(struct vb2_queue *q, unsigned int buffers)
-{
- unsigned int buffer;
- struct vb2_buffer *vb;
-
- for (buffer = q->num_buffers - buffers; buffer < q->num_buffers;
- ++buffer) {
- vb = q->bufs[buffer];
- if (!vb)
- continue;
-
- /* Free MMAP buffers or release USERPTR buffers */
- if (q->memory == V4L2_MEMORY_MMAP)
- __vb2_buf_mem_free(vb);
- else if (q->memory == V4L2_MEMORY_DMABUF)
- __vb2_buf_dmabuf_put(vb);
- else
- __vb2_buf_userptr_put(vb);
- }
-}
-
-/**
- * __vb2_queue_free() - free buffers at the end of the queue - video memory and
- * related information, if no buffers are left return the queue to an
- * uninitialized state. Might be called even if the queue has already been freed.
- */
-static void __vb2_queue_free(struct vb2_queue *q, unsigned int buffers)
-{
- unsigned int buffer;
-
- /* Call driver-provided cleanup function for each buffer, if provided */
- if (q->ops->buf_cleanup) {
- for (buffer = q->num_buffers - buffers; buffer < q->num_buffers;
- ++buffer) {
- if (NULL == q->bufs[buffer])
- continue;
- q->ops->buf_cleanup(q->bufs[buffer]);
- }
- }
-
- /* Release video buffer memory */
- __vb2_free_mem(q, buffers);
-
- /* Free videobuf buffers */
- for (buffer = q->num_buffers - buffers; buffer < q->num_buffers;
- ++buffer) {
- kfree(q->bufs[buffer]);
- q->bufs[buffer] = NULL;
- }
-
- q->num_buffers -= buffers;
- if (!q->num_buffers)
- q->memory = 0;
- INIT_LIST_HEAD(&q->queued_list);
-}
-
-/**
- * __verify_planes_array() - verify that the planes array passed in struct
- * v4l2_buffer from userspace can be safely used
- */
-static int __verify_planes_array(struct vb2_buffer *vb, const struct v4l2_buffer *b)
-{
- if (!V4L2_TYPE_IS_MULTIPLANAR(b->type))
- return 0;
-
- /* Is memory for copying plane information present? */
- if (NULL == b->m.planes) {
- dprintk(1, "Multi-planar buffer passed but "
- "planes array not provided\n");
- return -EINVAL;
- }
-
- if (b->length < vb->num_planes || b->length > VIDEO_MAX_PLANES) {
- dprintk(1, "Incorrect planes array length, "
- "expected %d, got %d\n", vb->num_planes, b->length);
- return -EINVAL;
- }
-
- return 0;
-}
-
-/**
- * __buffer_in_use() - return true if the buffer is in use and
- * the queue cannot be freed (by the means of REQBUFS(0)) call
- */
-static bool __buffer_in_use(struct vb2_queue *q, struct vb2_buffer *vb)
-{
- unsigned int plane;
- for (plane = 0; plane < vb->num_planes; ++plane) {
- void *mem_priv = vb->planes[plane].mem_priv;
- /*
- * If num_users() has not been provided, call_memop
- * will return 0, apparently nobody cares about this
- * case anyway. If num_users() returns more than 1,
- * we are not the only user of the plane's memory.
- */
- if (mem_priv && call_memop(q, num_users, mem_priv) > 1)
- return true;
- }
- return false;
-}
-
-/**
- * __buffers_in_use() - return true if any buffers on the queue are in use and
- * the queue cannot be freed (by the means of REQBUFS(0)) call
- */
-static bool __buffers_in_use(struct vb2_queue *q)
-{
- unsigned int buffer;
- for (buffer = 0; buffer < q->num_buffers; ++buffer) {
- if (__buffer_in_use(q, q->bufs[buffer]))
- return true;
- }
- return false;
-}
-
-/**
- * __fill_v4l2_buffer() - fill in a struct v4l2_buffer with information to be
- * returned to userspace
- */
-static void __fill_v4l2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b)
-{
- struct vb2_queue *q = vb->vb2_queue;
-
- /* Copy back data such as timestamp, flags, etc. */
- memcpy(b, &vb->v4l2_buf, offsetof(struct v4l2_buffer, m));
- b->reserved2 = vb->v4l2_buf.reserved2;
- b->reserved = vb->v4l2_buf.reserved;
-
- if (V4L2_TYPE_IS_MULTIPLANAR(q->type)) {
- /*
- * Fill in plane-related data if userspace provided an array
- * for it. The caller has already verified memory and size.
- */
- b->length = vb->num_planes;
- memcpy(b->m.planes, vb->v4l2_planes,
- b->length * sizeof(struct v4l2_plane));
- } else {
- /*
- * We use length and offset in v4l2_planes array even for
- * single-planar buffers, but userspace does not.
- */
- b->length = vb->v4l2_planes[0].length;
- b->bytesused = vb->v4l2_planes[0].bytesused;
- if (q->memory == V4L2_MEMORY_MMAP)
- b->m.offset = vb->v4l2_planes[0].m.mem_offset;
- else if (q->memory == V4L2_MEMORY_USERPTR)
- b->m.userptr = vb->v4l2_planes[0].m.userptr;
- else if (q->memory == V4L2_MEMORY_DMABUF)
- b->m.fd = vb->v4l2_planes[0].m.fd;
- }
-
- /*
- * Clear any buffer state related flags.
- */
- b->flags &= ~V4L2_BUFFER_MASK_FLAGS;
- b->flags |= V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
-
- switch (vb->state) {
- case VB2_BUF_STATE_QUEUED:
- case VB2_BUF_STATE_ACTIVE:
- b->flags |= V4L2_BUF_FLAG_QUEUED;
- break;
- case VB2_BUF_STATE_ERROR:
- b->flags |= V4L2_BUF_FLAG_ERROR;
- /* fall through */
- case VB2_BUF_STATE_DONE:
- b->flags |= V4L2_BUF_FLAG_DONE;
- break;
- case VB2_BUF_STATE_PREPARED:
- b->flags |= V4L2_BUF_FLAG_PREPARED;
- break;
- case VB2_BUF_STATE_DEQUEUED:
- /* nothing */
- break;
- }
-
- if (__buffer_in_use(q, vb))
- b->flags |= V4L2_BUF_FLAG_MAPPED;
-}
-
-/**
- * vb2_querybuf() - query video buffer information
- * @q: videobuf queue
- * @b: buffer struct passed from userspace to vidioc_querybuf handler
- * in driver
- *
- * Should be called from vidioc_querybuf ioctl handler in driver.
- * This function will verify the passed v4l2_buffer structure and fill the
- * relevant information for the userspace.
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_querybuf handler in driver.
- */
-int vb2_querybuf(struct vb2_queue *q, struct v4l2_buffer *b)
-{
- struct vb2_buffer *vb;
- int ret;
-
- if (b->type != q->type) {
- dprintk(1, "querybuf: wrong buffer type\n");
- return -EINVAL;
- }
-
- if (b->index >= q->num_buffers) {
- dprintk(1, "querybuf: buffer index out of range\n");
- return -EINVAL;
- }
- vb = q->bufs[b->index];
- ret = __verify_planes_array(vb, b);
- if (!ret)
- __fill_v4l2_buffer(vb, b);
- return ret;
-}
-EXPORT_SYMBOL(vb2_querybuf);
-
-/**
- * __verify_userptr_ops() - verify that all memory operations required for
- * USERPTR queue type have been provided
- */
-static int __verify_userptr_ops(struct vb2_queue *q)
-{
- if (!(q->io_modes & VB2_USERPTR) || !q->mem_ops->get_userptr ||
- !q->mem_ops->put_userptr)
- return -EINVAL;
-
- return 0;
-}
-
-/**
- * __verify_mmap_ops() - verify that all memory operations required for
- * MMAP queue type have been provided
- */
-static int __verify_mmap_ops(struct vb2_queue *q)
-{
- if (!(q->io_modes & VB2_MMAP) || !q->mem_ops->alloc ||
- !q->mem_ops->put || !q->mem_ops->mmap)
- return -EINVAL;
-
- return 0;
-}
-
-/**
- * __verify_dmabuf_ops() - verify that all memory operations required for
- * DMABUF queue type have been provided
- */
-static int __verify_dmabuf_ops(struct vb2_queue *q)
-{
- if (!(q->io_modes & VB2_DMABUF) || !q->mem_ops->attach_dmabuf ||
- !q->mem_ops->detach_dmabuf || !q->mem_ops->map_dmabuf ||
- !q->mem_ops->unmap_dmabuf)
- return -EINVAL;
-
- return 0;
-}
-
-/**
- * __verify_memory_type() - Check whether the memory type and buffer type
- * passed to a buffer operation are compatible with the queue.
- */
-static int __verify_memory_type(struct vb2_queue *q,
- enum v4l2_memory memory, enum v4l2_buf_type type)
-{
- if (memory != V4L2_MEMORY_MMAP && memory != V4L2_MEMORY_USERPTR &&
- memory != V4L2_MEMORY_DMABUF) {
- dprintk(1, "reqbufs: unsupported memory type\n");
- return -EINVAL;
- }
-
- if (type != q->type) {
- dprintk(1, "reqbufs: requested type is incorrect\n");
- return -EINVAL;
- }
-
- /*
- * Make sure all the required memory ops for given memory type
- * are available.
- */
- if (memory == V4L2_MEMORY_MMAP && __verify_mmap_ops(q)) {
- dprintk(1, "reqbufs: MMAP for current setup unsupported\n");
- return -EINVAL;
- }
-
- if (memory == V4L2_MEMORY_USERPTR && __verify_userptr_ops(q)) {
- dprintk(1, "reqbufs: USERPTR for current setup unsupported\n");
- return -EINVAL;
- }
-
- if (memory == V4L2_MEMORY_DMABUF && __verify_dmabuf_ops(q)) {
- dprintk(1, "reqbufs: DMABUF for current setup unsupported\n");
- return -EINVAL;
- }
-
- /*
- * Place the busy tests at the end: -EBUSY can be ignored when
- * create_bufs is called with count == 0, but count == 0 should still
- * do the memory and type validation.
- */
- if (q->fileio) {
- dprintk(1, "reqbufs: file io in progress\n");
- return -EBUSY;
- }
- return 0;
-}
-
-/**
- * __reqbufs() - Initiate streaming
- * @q: videobuf2 queue
- * @req: struct passed from userspace to vidioc_reqbufs handler in driver
- *
- * Should be called from vidioc_reqbufs ioctl handler of a driver.
- * This function:
- * 1) verifies streaming parameters passed from the userspace,
- * 2) sets up the queue,
- * 3) negotiates number of buffers and planes per buffer with the driver
- * to be used during streaming,
- * 4) allocates internal buffer structures (struct vb2_buffer), according to
- * the agreed parameters,
- * 5) for MMAP memory type, allocates actual video memory, using the
- * memory handling/allocation routines provided during queue initialization
- *
- * If req->count is 0, all the memory will be freed instead.
- * If the queue has been allocated previously (by a previous vb2_reqbufs) call
- * and the queue is not busy, memory will be reallocated.
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_reqbufs handler in driver.
- */
-static int __reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
-{
- unsigned int num_buffers, allocated_buffers, num_planes = 0;
- int ret;
-
- if (q->streaming) {
- dprintk(1, "reqbufs: streaming active\n");
- return -EBUSY;
- }
-
- if (req->count == 0 || q->num_buffers != 0 || q->memory != req->memory) {
- /*
- * We already have buffers allocated, so first check if they
- * are not in use and can be freed.
- */
- if (q->memory == V4L2_MEMORY_MMAP && __buffers_in_use(q)) {
- dprintk(1, "reqbufs: memory in use, cannot free\n");
- return -EBUSY;
- }
-
- __vb2_queue_free(q, q->num_buffers);
-
- /*
- * In case of REQBUFS(0) return immediately without calling
- * driver's queue_setup() callback and allocating resources.
- */
- if (req->count == 0)
- return 0;
- }
-
- /*
- * Make sure the requested values and current defaults are sane.
- */
- num_buffers = min_t(unsigned int, req->count, VIDEO_MAX_FRAME);
- memset(q->plane_sizes, 0, sizeof(q->plane_sizes));
- memset(q->alloc_ctx, 0, sizeof(q->alloc_ctx));
- q->memory = req->memory;
-
- /*
- * Ask the driver how many buffers and planes per buffer it requires.
- * Driver also sets the size and allocator context for each plane.
- */
- ret = call_qop(q, queue_setup, q, NULL, &num_buffers, &num_planes,
- q->plane_sizes, q->alloc_ctx);
- if (ret)
- return ret;
-
- /* Finally, allocate buffers and video memory */
- ret = __vb2_queue_alloc(q, req->memory, num_buffers, num_planes);
- if (ret == 0) {
- dprintk(1, "Memory allocation failed\n");
- return -ENOMEM;
- }
-
- allocated_buffers = ret;
-
- /*
- * Check if driver can handle the allocated number of buffers.
- */
- if (allocated_buffers < num_buffers) {
- num_buffers = allocated_buffers;
-
- ret = call_qop(q, queue_setup, q, NULL, &num_buffers,
- &num_planes, q->plane_sizes, q->alloc_ctx);
-
- if (!ret && allocated_buffers < num_buffers)
- ret = -ENOMEM;
-
- /*
- * Either the driver has accepted a smaller number of buffers,
- * or .queue_setup() returned an error
- */
- }
-
- q->num_buffers = allocated_buffers;
-
- if (ret < 0) {
- __vb2_queue_free(q, allocated_buffers);
- return ret;
- }
-
- /*
- * Return the number of successfully allocated buffers
- * to the userspace.
- */
- req->count = allocated_buffers;
-
- return 0;
-}
-
-/**
- * vb2_reqbufs() - Wrapper for __reqbufs() that also verifies the memory and
- * type values.
- * @q: videobuf2 queue
- * @req: struct passed from userspace to vidioc_reqbufs handler in driver
- */
-int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
-{
- int ret = __verify_memory_type(q, req->memory, req->type);
-
- return ret ? ret : __reqbufs(q, req);
-}
-EXPORT_SYMBOL_GPL(vb2_reqbufs);
-
-/**
- * __create_bufs() - Allocate buffers and any required auxiliary structs
- * @q: videobuf2 queue
- * @create: creation parameters, passed from userspace to vidioc_create_bufs
- * handler in driver
- *
- * Should be called from vidioc_create_bufs ioctl handler of a driver.
- * This function:
- * 1) verifies parameter sanity
- * 2) calls the .queue_setup() queue operation
- * 3) performs any necessary memory allocations
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_create_bufs handler in driver.
- */
-static int __create_bufs(struct vb2_queue *q, struct v4l2_create_buffers *create)
-{
- unsigned int num_planes = 0, num_buffers, allocated_buffers;
- int ret;
-
- if (q->num_buffers == VIDEO_MAX_FRAME) {
- dprintk(1, "%s(): maximum number of buffers already allocated\n",
- __func__);
- return -ENOBUFS;
- }
-
- if (!q->num_buffers) {
- memset(q->plane_sizes, 0, sizeof(q->plane_sizes));
- memset(q->alloc_ctx, 0, sizeof(q->alloc_ctx));
- q->memory = create->memory;
- }
-
- num_buffers = min(create->count, VIDEO_MAX_FRAME - q->num_buffers);
-
- /*
- * Ask the driver, whether the requested number of buffers, planes per
- * buffer and their sizes are acceptable
- */
- ret = call_qop(q, queue_setup, q, &create->format, &num_buffers,
- &num_planes, q->plane_sizes, q->alloc_ctx);
- if (ret)
- return ret;
-
- /* Finally, allocate buffers and video memory */
- ret = __vb2_queue_alloc(q, create->memory, num_buffers,
- num_planes);
- if (ret == 0) {
- dprintk(1, "Memory allocation failed\n");
- return -ENOMEM;
- }
-
- allocated_buffers = ret;
-
- /*
- * Check if driver can handle the so far allocated number of buffers.
- */
- if (ret < num_buffers) {
- num_buffers = ret;
-
- /*
- * q->num_buffers contains the total number of buffers, that the
- * queue driver has set up
- */
- ret = call_qop(q, queue_setup, q, &create->format, &num_buffers,
- &num_planes, q->plane_sizes, q->alloc_ctx);
-
- if (!ret && allocated_buffers < num_buffers)
- ret = -ENOMEM;
-
- /*
- * Either the driver has accepted a smaller number of buffers,
- * or .queue_setup() returned an error
- */
- }
-
- q->num_buffers += allocated_buffers;
-
- if (ret < 0) {
- __vb2_queue_free(q, allocated_buffers);
- return -ENOMEM;
- }
-
- /*
- * Return the number of successfully allocated buffers
- * to the userspace.
- */
- create->count = allocated_buffers;
-
- return 0;
-}
-
-/**
- * vb2_create_bufs() - Wrapper for __create_bufs() that also verifies the
- * memory and type values.
- * @q: videobuf2 queue
- * @create: creation parameters, passed from userspace to vidioc_create_bufs
- * handler in driver
- */
-int vb2_create_bufs(struct vb2_queue *q, struct v4l2_create_buffers *create)
-{
- int ret = __verify_memory_type(q, create->memory, create->format.type);
-
- create->index = q->num_buffers;
- if (create->count == 0)
- return ret != -EBUSY ? ret : 0;
- return ret ? ret : __create_bufs(q, create);
-}
-EXPORT_SYMBOL_GPL(vb2_create_bufs);
-
-/**
- * vb2_plane_vaddr() - Return a kernel virtual address of a given plane
- * @vb: vb2_buffer to which the plane in question belongs to
- * @plane_no: plane number for which the address is to be returned
- *
- * This function returns a kernel virtual address of a given plane if
- * such a mapping exist, NULL otherwise.
- */
-void *vb2_plane_vaddr(struct vb2_buffer *vb, unsigned int plane_no)
-{
- struct vb2_queue *q = vb->vb2_queue;
-
- if (plane_no > vb->num_planes || !vb->planes[plane_no].mem_priv)
- return NULL;
-
- return call_memop(q, vaddr, vb->planes[plane_no].mem_priv);
-
-}
-EXPORT_SYMBOL_GPL(vb2_plane_vaddr);
-
-/**
- * vb2_plane_cookie() - Return allocator specific cookie for the given plane
- * @vb: vb2_buffer to which the plane in question belongs to
- * @plane_no: plane number for which the cookie is to be returned
- *
- * This function returns an allocator specific cookie for a given plane if
- * available, NULL otherwise. The allocator should provide some simple static
- * inline function, which would convert this cookie to the allocator specific
- * type that can be used directly by the driver to access the buffer. This can
- * be for example physical address, pointer to scatter list or IOMMU mapping.
- */
-void *vb2_plane_cookie(struct vb2_buffer *vb, unsigned int plane_no)
-{
- struct vb2_queue *q = vb->vb2_queue;
-
- if (plane_no > vb->num_planes || !vb->planes[plane_no].mem_priv)
- return NULL;
-
- return call_memop(q, cookie, vb->planes[plane_no].mem_priv);
-}
-EXPORT_SYMBOL_GPL(vb2_plane_cookie);
-
-/**
- * vb2_buffer_done() - inform videobuf that an operation on a buffer is finished
- * @vb: vb2_buffer returned from the driver
- * @state: either VB2_BUF_STATE_DONE if the operation finished successfully
- * or VB2_BUF_STATE_ERROR if the operation finished with an error
- *
- * This function should be called by the driver after a hardware operation on
- * a buffer is finished and the buffer may be returned to userspace. The driver
- * cannot use this buffer anymore until it is queued back to it by videobuf
- * by the means of buf_queue callback. Only buffers previously queued to the
- * driver by buf_queue can be passed to this function.
- */
-void vb2_buffer_done(struct vb2_buffer *vb, enum vb2_buffer_state state)
-{
- struct vb2_queue *q = vb->vb2_queue;
- unsigned long flags;
- unsigned int plane;
-
- if (vb->state != VB2_BUF_STATE_ACTIVE)
- return;
-
- if (state != VB2_BUF_STATE_DONE && state != VB2_BUF_STATE_ERROR)
- return;
-
- dprintk(4, "Done processing on buffer %d, state: %d\n",
- vb->v4l2_buf.index, vb->state);
-
- /* sync buffers */
- for (plane = 0; plane < vb->num_planes; ++plane)
- call_memop(q, finish, vb->planes[plane].mem_priv);
-
- /* Add the buffer to the done buffers list */
- spin_lock_irqsave(&q->done_lock, flags);
- vb->state = state;
- list_add_tail(&vb->done_entry, &q->done_list);
- atomic_dec(&q->queued_count);
- spin_unlock_irqrestore(&q->done_lock, flags);
-
- /* Inform any processes that may be waiting for buffers */
- wake_up(&q->done_wq);
-}
-EXPORT_SYMBOL_GPL(vb2_buffer_done);
-
-/**
- * __fill_vb2_buffer() - fill a vb2_buffer with information provided in a
- * v4l2_buffer by the userspace. The caller has already verified that struct
- * v4l2_buffer has a valid number of planes.
- */
-static void __fill_vb2_buffer(struct vb2_buffer *vb, const struct v4l2_buffer *b,
- struct v4l2_plane *v4l2_planes)
-{
- unsigned int plane;
-
- if (V4L2_TYPE_IS_MULTIPLANAR(b->type)) {
- /* Fill in driver-provided information for OUTPUT types */
- if (V4L2_TYPE_IS_OUTPUT(b->type)) {
- /*
- * Will have to go up to b->length when API starts
- * accepting variable number of planes.
- */
- for (plane = 0; plane < vb->num_planes; ++plane) {
- v4l2_planes[plane].bytesused =
- b->m.planes[plane].bytesused;
- v4l2_planes[plane].data_offset =
- b->m.planes[plane].data_offset;
- }
- }
-
- if (b->memory == V4L2_MEMORY_USERPTR) {
- for (plane = 0; plane < vb->num_planes; ++plane) {
- v4l2_planes[plane].m.userptr =
- b->m.planes[plane].m.userptr;
- v4l2_planes[plane].length =
- b->m.planes[plane].length;
- }
- }
- if (b->memory == V4L2_MEMORY_DMABUF) {
- for (plane = 0; plane < vb->num_planes; ++plane) {
- v4l2_planes[plane].m.fd =
- b->m.planes[plane].m.fd;
- v4l2_planes[plane].length =
- b->m.planes[plane].length;
- v4l2_planes[plane].data_offset =
- b->m.planes[plane].data_offset;
- }
- }
- } else {
- /*
- * Single-planar buffers do not use planes array,
- * so fill in relevant v4l2_buffer struct fields instead.
- * In videobuf we use our internal V4l2_planes struct for
- * single-planar buffers as well, for simplicity.
- */
- if (V4L2_TYPE_IS_OUTPUT(b->type)) {
- v4l2_planes[0].bytesused = b->bytesused;
- v4l2_planes[0].data_offset = 0;
- }
-
- if (b->memory == V4L2_MEMORY_USERPTR) {
- v4l2_planes[0].m.userptr = b->m.userptr;
- v4l2_planes[0].length = b->length;
- }
-
- if (b->memory == V4L2_MEMORY_DMABUF) {
- v4l2_planes[0].m.fd = b->m.fd;
- v4l2_planes[0].length = b->length;
- v4l2_planes[0].data_offset = 0;
- }
-
- }
-
- vb->v4l2_buf.field = b->field;
- vb->v4l2_buf.timestamp = b->timestamp;
- vb->v4l2_buf.flags = b->flags & ~V4L2_BUFFER_MASK_FLAGS;
-}
-
-/**
- * __qbuf_userptr() - handle qbuf of a USERPTR buffer
- */
-static int __qbuf_userptr(struct vb2_buffer *vb, const struct v4l2_buffer *b)
-{
- struct v4l2_plane planes[VIDEO_MAX_PLANES];
- struct vb2_queue *q = vb->vb2_queue;
- void *mem_priv;
- unsigned int plane;
- int ret;
- int write = !V4L2_TYPE_IS_OUTPUT(q->type);
-
- /* Copy relevant information provided by the userspace */
- __fill_vb2_buffer(vb, b, planes);
-
- for (plane = 0; plane < vb->num_planes; ++plane) {
- /* Skip the plane if already verified */
- if (vb->v4l2_planes[plane].m.userptr &&
- vb->v4l2_planes[plane].m.userptr == planes[plane].m.userptr
- && vb->v4l2_planes[plane].length == planes[plane].length)
- continue;
-
- dprintk(3, "qbuf: userspace address for plane %d changed, "
- "reacquiring memory\n", plane);
-
- /* Check if the provided plane buffer is large enough */
- if (planes[plane].length < q->plane_sizes[plane]) {
- ret = -EINVAL;
- goto err;
- }
-
- /* Release previously acquired memory if present */
- if (vb->planes[plane].mem_priv)
- call_memop(q, put_userptr, vb->planes[plane].mem_priv);
-
- vb->planes[plane].mem_priv = NULL;
- vb->v4l2_planes[plane].m.userptr = 0;
- vb->v4l2_planes[plane].length = 0;
-
- /* Acquire each plane's memory */
- mem_priv = call_memop(q, get_userptr, q->alloc_ctx[plane],
- planes[plane].m.userptr,
- planes[plane].length, write);
- if (IS_ERR_OR_NULL(mem_priv)) {
- dprintk(1, "qbuf: failed acquiring userspace "
- "memory for plane %d\n", plane);
- ret = mem_priv ? PTR_ERR(mem_priv) : -EINVAL;
- goto err;
- }
- vb->planes[plane].mem_priv = mem_priv;
- }
-
- /*
- * Call driver-specific initialization on the newly acquired buffer,
- * if provided.
- */
- ret = call_qop(q, buf_init, vb);
- if (ret) {
- dprintk(1, "qbuf: buffer initialization failed\n");
- goto err;
- }
-
- /*
- * Now that everything is in order, copy relevant information
- * provided by userspace.
- */
- for (plane = 0; plane < vb->num_planes; ++plane)
- vb->v4l2_planes[plane] = planes[plane];
-
- return 0;
-err:
- /* In case of errors, release planes that were already acquired */
- for (plane = 0; plane < vb->num_planes; ++plane) {
- if (vb->planes[plane].mem_priv)
- call_memop(q, put_userptr, vb->planes[plane].mem_priv);
- vb->planes[plane].mem_priv = NULL;
- vb->v4l2_planes[plane].m.userptr = 0;
- vb->v4l2_planes[plane].length = 0;
- }
-
- return ret;
-}
-
-/**
- * __qbuf_mmap() - handle qbuf of an MMAP buffer
- */
-static int __qbuf_mmap(struct vb2_buffer *vb, const struct v4l2_buffer *b)
-{
- __fill_vb2_buffer(vb, b, vb->v4l2_planes);
- return 0;
-}
-
-/**
- * __qbuf_dmabuf() - handle qbuf of a DMABUF buffer
- */
-static int __qbuf_dmabuf(struct vb2_buffer *vb, const struct v4l2_buffer *b)
-{
- struct v4l2_plane planes[VIDEO_MAX_PLANES];
- struct vb2_queue *q = vb->vb2_queue;
- void *mem_priv;
- unsigned int plane;
- int ret;
- int write = !V4L2_TYPE_IS_OUTPUT(q->type);
-
- /* Verify and copy relevant information provided by the userspace */
- __fill_vb2_buffer(vb, b, planes);
-
- for (plane = 0; plane < vb->num_planes; ++plane) {
- struct dma_buf *dbuf = dma_buf_get(planes[plane].m.fd);
-
- if (IS_ERR_OR_NULL(dbuf)) {
- dprintk(1, "qbuf: invalid dmabuf fd for plane %d\n",
- plane);
- ret = -EINVAL;
- goto err;
- }
-
- /* use DMABUF size if length is not provided */
- if (planes[plane].length == 0)
- planes[plane].length = dbuf->size;
-
- if (planes[plane].length < planes[plane].data_offset +
- q->plane_sizes[plane]) {
- ret = -EINVAL;
- goto err;
- }
-
- /* Skip the plane if already verified */
- if (dbuf == vb->planes[plane].dbuf &&
- vb->v4l2_planes[plane].length == planes[plane].length) {
- dma_buf_put(dbuf);
- continue;
- }
-
- dprintk(1, "qbuf: buffer for plane %d changed\n", plane);
-
- /* Release previously acquired memory if present */
- __vb2_plane_dmabuf_put(q, &vb->planes[plane]);
- memset(&vb->v4l2_planes[plane], 0, sizeof(struct v4l2_plane));
-
- /* Acquire each plane's memory */
- mem_priv = call_memop(q, attach_dmabuf, q->alloc_ctx[plane],
- dbuf, planes[plane].length, write);
- if (IS_ERR(mem_priv)) {
- dprintk(1, "qbuf: failed to attach dmabuf\n");
- ret = PTR_ERR(mem_priv);
- dma_buf_put(dbuf);
- goto err;
- }
-
- vb->planes[plane].dbuf = dbuf;
- vb->planes[plane].mem_priv = mem_priv;
- }
-
- /* TODO: This pins the buffer(s) with dma_buf_map_attachment()).. but
- * really we want to do this just before the DMA, not while queueing
- * the buffer(s)..
- */
- for (plane = 0; plane < vb->num_planes; ++plane) {
- ret = call_memop(q, map_dmabuf, vb->planes[plane].mem_priv);
- if (ret) {
- dprintk(1, "qbuf: failed to map dmabuf for plane %d\n",
- plane);
- goto err;
- }
- vb->planes[plane].dbuf_mapped = 1;
- }
-
- /*
- * Call driver-specific initialization on the newly acquired buffer,
- * if provided.
- */
- ret = call_qop(q, buf_init, vb);
- if (ret) {
- dprintk(1, "qbuf: buffer initialization failed\n");
- goto err;
- }
-
- /*
- * Now that everything is in order, copy relevant information
- * provided by userspace.
- */
- for (plane = 0; plane < vb->num_planes; ++plane)
- vb->v4l2_planes[plane] = planes[plane];
-
- return 0;
-err:
- /* In case of errors, release planes that were already acquired */
- __vb2_buf_dmabuf_put(vb);
-
- return ret;
-}
-
-/**
- * __enqueue_in_driver() - enqueue a vb2_buffer in driver for processing
- */
-static void __enqueue_in_driver(struct vb2_buffer *vb)
-{
- struct vb2_queue *q = vb->vb2_queue;
- unsigned int plane;
-
- vb->state = VB2_BUF_STATE_ACTIVE;
- atomic_inc(&q->queued_count);
-
- /* sync buffers */
- for (plane = 0; plane < vb->num_planes; ++plane)
- call_memop(q, prepare, vb->planes[plane].mem_priv);
-
- q->ops->buf_queue(vb);
-}
-
-static int __buf_prepare(struct vb2_buffer *vb, const struct v4l2_buffer *b)
-{
- struct vb2_queue *q = vb->vb2_queue;
- int ret;
-
- switch (q->memory) {
- case V4L2_MEMORY_MMAP:
- ret = __qbuf_mmap(vb, b);
- break;
- case V4L2_MEMORY_USERPTR:
- ret = __qbuf_userptr(vb, b);
- break;
- case V4L2_MEMORY_DMABUF:
- ret = __qbuf_dmabuf(vb, b);
- break;
- default:
- WARN(1, "Invalid queue type\n");
- ret = -EINVAL;
- }
-
- if (!ret)
- ret = call_qop(q, buf_prepare, vb);
- if (ret)
- dprintk(1, "qbuf: buffer preparation failed: %d\n", ret);
- else
- vb->state = VB2_BUF_STATE_PREPARED;
-
- return ret;
-}
-
-/**
- * vb2_prepare_buf() - Pass ownership of a buffer from userspace to the kernel
- * @q: videobuf2 queue
- * @b: buffer structure passed from userspace to vidioc_prepare_buf
- * handler in driver
- *
- * Should be called from vidioc_prepare_buf ioctl handler of a driver.
- * This function:
- * 1) verifies the passed buffer,
- * 2) calls buf_prepare callback in the driver (if provided), in which
- * driver-specific buffer initialization can be performed,
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_prepare_buf handler in driver.
- */
-int vb2_prepare_buf(struct vb2_queue *q, struct v4l2_buffer *b)
-{
- struct vb2_buffer *vb;
- int ret;
-
- if (q->fileio) {
- dprintk(1, "%s(): file io in progress\n", __func__);
- return -EBUSY;
- }
-
- if (b->type != q->type) {
- dprintk(1, "%s(): invalid buffer type\n", __func__);
- return -EINVAL;
- }
-
- if (b->index >= q->num_buffers) {
- dprintk(1, "%s(): buffer index out of range\n", __func__);
- return -EINVAL;
- }
-
- vb = q->bufs[b->index];
- if (NULL == vb) {
- /* Should never happen */
- dprintk(1, "%s(): buffer is NULL\n", __func__);
- return -EINVAL;
- }
-
- if (b->memory != q->memory) {
- dprintk(1, "%s(): invalid memory type\n", __func__);
- return -EINVAL;
- }
-
- if (vb->state != VB2_BUF_STATE_DEQUEUED) {
- dprintk(1, "%s(): invalid buffer state %d\n", __func__, vb->state);
- return -EINVAL;
- }
- ret = __verify_planes_array(vb, b);
- if (ret < 0)
- return ret;
- ret = __buf_prepare(vb, b);
- if (ret < 0)
- return ret;
-
- __fill_v4l2_buffer(vb, b);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_prepare_buf);
-
-/**
- * vb2_qbuf() - Queue a buffer from userspace
- * @q: videobuf2 queue
- * @b: buffer structure passed from userspace to vidioc_qbuf handler
- * in driver
- *
- * Should be called from vidioc_qbuf ioctl handler of a driver.
- * This function:
- * 1) verifies the passed buffer,
- * 2) if necessary, calls buf_prepare callback in the driver (if provided), in
- * which driver-specific buffer initialization can be performed,
- * 3) if streaming is on, queues the buffer in driver by the means of buf_queue
- * callback for processing.
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_qbuf handler in driver.
- */
-int vb2_qbuf(struct vb2_queue *q, struct v4l2_buffer *b)
-{
- struct rw_semaphore *mmap_sem = NULL;
- struct vb2_buffer *vb;
- int ret = 0;
-
- /*
- * In case of user pointer buffers vb2 allocator needs to get direct
- * access to userspace pages. This requires getting read access on
- * mmap semaphore in the current process structure. The same
- * semaphore is taken before calling mmap operation, while both mmap
- * and qbuf are called by the driver or v4l2 core with driver's lock
- * held. To avoid a AB-BA deadlock (mmap_sem then driver's lock in
- * mmap and driver's lock then mmap_sem in qbuf) the videobuf2 core
- * release driver's lock, takes mmap_sem and then takes again driver's
- * lock.
- *
- * To avoid race with other vb2 calls, which might be called after
- * releasing driver's lock, this operation is performed at the
- * beggining of qbuf processing. This way the queue status is
- * consistent after getting driver's lock back.
- */
- if (q->memory == V4L2_MEMORY_USERPTR) {
- mmap_sem = &current->mm->mmap_sem;
- call_qop(q, wait_prepare, q);
- down_read(mmap_sem);
- call_qop(q, wait_finish, q);
- }
-
- if (q->fileio) {
- dprintk(1, "qbuf: file io in progress\n");
- ret = -EBUSY;
- goto unlock;
- }
-
- if (b->type != q->type) {
- dprintk(1, "qbuf: invalid buffer type\n");
- ret = -EINVAL;
- goto unlock;
- }
-
- if (b->index >= q->num_buffers) {
- dprintk(1, "qbuf: buffer index out of range\n");
- ret = -EINVAL;
- goto unlock;
- }
-
- vb = q->bufs[b->index];
- if (NULL == vb) {
- /* Should never happen */
- dprintk(1, "qbuf: buffer is NULL\n");
- ret = -EINVAL;
- goto unlock;
- }
-
- if (b->memory != q->memory) {
- dprintk(1, "qbuf: invalid memory type\n");
- ret = -EINVAL;
- goto unlock;
- }
- ret = __verify_planes_array(vb, b);
- if (ret)
- goto unlock;
-
- switch (vb->state) {
- case VB2_BUF_STATE_DEQUEUED:
- ret = __buf_prepare(vb, b);
- if (ret)
- goto unlock;
- case VB2_BUF_STATE_PREPARED:
- break;
- default:
- dprintk(1, "qbuf: buffer already in use\n");
- ret = -EINVAL;
- goto unlock;
- }
-
- /*
- * Add to the queued buffers list, a buffer will stay on it until
- * dequeued in dqbuf.
- */
- list_add_tail(&vb->queued_entry, &q->queued_list);
- vb->state = VB2_BUF_STATE_QUEUED;
-
- /*
- * If already streaming, give the buffer to driver for processing.
- * If not, the buffer will be given to driver on next streamon.
- */
- if (q->streaming)
- __enqueue_in_driver(vb);
-
- /* Fill buffer information for the userspace */
- __fill_v4l2_buffer(vb, b);
-
- dprintk(1, "qbuf of buffer %d succeeded\n", vb->v4l2_buf.index);
-unlock:
- if (mmap_sem)
- up_read(mmap_sem);
- return ret;
-}
-EXPORT_SYMBOL_GPL(vb2_qbuf);
-
-/**
- * __vb2_wait_for_done_vb() - wait for a buffer to become available
- * for dequeuing
- *
- * Will sleep if required for nonblocking == false.
- */
-static int __vb2_wait_for_done_vb(struct vb2_queue *q, int nonblocking)
-{
- /*
- * All operations on vb_done_list are performed under done_lock
- * spinlock protection. However, buffers may be removed from
- * it and returned to userspace only while holding both driver's
- * lock and the done_lock spinlock. Thus we can be sure that as
- * long as we hold the driver's lock, the list will remain not
- * empty if list_empty() check succeeds.
- */
-
- for (;;) {
- int ret;
-
- if (!q->streaming) {
- dprintk(1, "Streaming off, will not wait for buffers\n");
- return -EINVAL;
- }
-
- if (!list_empty(&q->done_list)) {
- /*
- * Found a buffer that we were waiting for.
- */
- break;
- }
-
- if (nonblocking) {
- dprintk(1, "Nonblocking and no buffers to dequeue, "
- "will not wait\n");
- return -EAGAIN;
- }
-
- /*
- * We are streaming and blocking, wait for another buffer to
- * become ready or for streamoff. Driver's lock is released to
- * allow streamoff or qbuf to be called while waiting.
- */
- call_qop(q, wait_prepare, q);
-
- /*
- * All locks have been released, it is safe to sleep now.
- */
- dprintk(3, "Will sleep waiting for buffers\n");
- ret = wait_event_interruptible(q->done_wq,
- !list_empty(&q->done_list) || !q->streaming);
-
- /*
- * We need to reevaluate both conditions again after reacquiring
- * the locks or return an error if one occurred.
- */
- call_qop(q, wait_finish, q);
- if (ret) {
- dprintk(1, "Sleep was interrupted\n");
- return ret;
- }
- }
- return 0;
-}
-
-/**
- * __vb2_get_done_vb() - get a buffer ready for dequeuing
- *
- * Will sleep if required for nonblocking == false.
- */
-static int __vb2_get_done_vb(struct vb2_queue *q, struct vb2_buffer **vb,
- struct v4l2_buffer *b, int nonblocking)
-{
- unsigned long flags;
- int ret;
-
- /*
- * Wait for at least one buffer to become available on the done_list.
- */
- ret = __vb2_wait_for_done_vb(q, nonblocking);
- if (ret)
- return ret;
-
- /*
- * Driver's lock has been held since we last verified that done_list
- * is not empty, so no need for another list_empty(done_list) check.
- */
- spin_lock_irqsave(&q->done_lock, flags);
- *vb = list_first_entry(&q->done_list, struct vb2_buffer, done_entry);
- /*
- * Only remove the buffer from done_list if v4l2_buffer can handle all
- * the planes.
- */
- ret = __verify_planes_array(*vb, b);
- if (!ret)
- list_del(&(*vb)->done_entry);
- spin_unlock_irqrestore(&q->done_lock, flags);
-
- return ret;
-}
-
-/**
- * vb2_wait_for_all_buffers() - wait until all buffers are given back to vb2
- * @q: videobuf2 queue
- *
- * This function will wait until all buffers that have been given to the driver
- * by buf_queue() are given back to vb2 with vb2_buffer_done(). It doesn't call
- * wait_prepare, wait_finish pair. It is intended to be called with all locks
- * taken, for example from stop_streaming() callback.
- */
-int vb2_wait_for_all_buffers(struct vb2_queue *q)
-{
- if (!q->streaming) {
- dprintk(1, "Streaming off, will not wait for buffers\n");
- return -EINVAL;
- }
-
- wait_event(q->done_wq, !atomic_read(&q->queued_count));
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_wait_for_all_buffers);
-
-/**
- * __vb2_dqbuf() - bring back the buffer to the DEQUEUED state
- */
-static void __vb2_dqbuf(struct vb2_buffer *vb)
-{
- struct vb2_queue *q = vb->vb2_queue;
- unsigned int i;
-
- /* nothing to do if the buffer is already dequeued */
- if (vb->state == VB2_BUF_STATE_DEQUEUED)
- return;
-
- vb->state = VB2_BUF_STATE_DEQUEUED;
-
- /* unmap DMABUF buffer */
- if (q->memory == V4L2_MEMORY_DMABUF)
- for (i = 0; i < vb->num_planes; ++i) {
- if (!vb->planes[i].dbuf_mapped)
- continue;
- call_memop(q, unmap_dmabuf, vb->planes[i].mem_priv);
- vb->planes[i].dbuf_mapped = 0;
- }
-}
-
-/**
- * vb2_dqbuf() - Dequeue a buffer to the userspace
- * @q: videobuf2 queue
- * @b: buffer structure passed from userspace to vidioc_dqbuf handler
- * in driver
- * @nonblocking: if true, this call will not sleep waiting for a buffer if no
- * buffers ready for dequeuing are present. Normally the driver
- * would be passing (file->f_flags & O_NONBLOCK) here
- *
- * Should be called from vidioc_dqbuf ioctl handler of a driver.
- * This function:
- * 1) verifies the passed buffer,
- * 2) calls buf_finish callback in the driver (if provided), in which
- * driver can perform any additional operations that may be required before
- * returning the buffer to userspace, such as cache sync,
- * 3) the buffer struct members are filled with relevant information for
- * the userspace.
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_dqbuf handler in driver.
- */
-int vb2_dqbuf(struct vb2_queue *q, struct v4l2_buffer *b, bool nonblocking)
-{
- struct vb2_buffer *vb = NULL;
- int ret;
-
- if (q->fileio) {
- dprintk(1, "dqbuf: file io in progress\n");
- return -EBUSY;
- }
-
- if (b->type != q->type) {
- dprintk(1, "dqbuf: invalid buffer type\n");
- return -EINVAL;
- }
- ret = __vb2_get_done_vb(q, &vb, b, nonblocking);
- if (ret < 0)
- return ret;
-
- ret = call_qop(q, buf_finish, vb);
- if (ret) {
- dprintk(1, "dqbuf: buffer finish failed\n");
- return ret;
- }
-
- switch (vb->state) {
- case VB2_BUF_STATE_DONE:
- dprintk(3, "dqbuf: Returning done buffer\n");
- break;
- case VB2_BUF_STATE_ERROR:
- dprintk(3, "dqbuf: Returning done buffer with errors\n");
- break;
- default:
- dprintk(1, "dqbuf: Invalid buffer state\n");
- return -EINVAL;
- }
-
- /* Fill buffer information for the userspace */
- __fill_v4l2_buffer(vb, b);
- /* Remove from videobuf queue */
- list_del(&vb->queued_entry);
- /* go back to dequeued state */
- __vb2_dqbuf(vb);
-
- dprintk(1, "dqbuf of buffer %d, with state %d\n",
- vb->v4l2_buf.index, vb->state);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_dqbuf);
-
-/**
- * __vb2_queue_cancel() - cancel and stop (pause) streaming
- *
- * Removes all queued buffers from driver's queue and all buffers queued by
- * userspace from videobuf's queue. Returns to state after reqbufs.
- */
-static void __vb2_queue_cancel(struct vb2_queue *q)
-{
- unsigned int i;
-
- /*
- * Tell driver to stop all transactions and release all queued
- * buffers.
- */
- if (q->streaming)
- call_qop(q, stop_streaming, q);
- q->streaming = 0;
-
- /*
- * Remove all buffers from videobuf's list...
- */
- INIT_LIST_HEAD(&q->queued_list);
- /*
- * ...and done list; userspace will not receive any buffers it
- * has not already dequeued before initiating cancel.
- */
- INIT_LIST_HEAD(&q->done_list);
- atomic_set(&q->queued_count, 0);
- wake_up_all(&q->done_wq);
-
- /*
- * Reinitialize all buffers for next use.
- */
- for (i = 0; i < q->num_buffers; ++i)
- __vb2_dqbuf(q->bufs[i]);
-}
-
-/**
- * vb2_streamon - start streaming
- * @q: videobuf2 queue
- * @type: type argument passed from userspace to vidioc_streamon handler
- *
- * Should be called from vidioc_streamon handler of a driver.
- * This function:
- * 1) verifies current state
- * 2) passes any previously queued buffers to the driver and starts streaming
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_streamon handler in the driver.
- */
-int vb2_streamon(struct vb2_queue *q, enum v4l2_buf_type type)
-{
- struct vb2_buffer *vb;
- int ret;
-
- if (q->fileio) {
- dprintk(1, "streamon: file io in progress\n");
- return -EBUSY;
- }
-
- if (type != q->type) {
- dprintk(1, "streamon: invalid stream type\n");
- return -EINVAL;
- }
-
- if (q->streaming) {
- dprintk(1, "streamon: already streaming\n");
- return -EBUSY;
- }
-
- /*
- * If any buffers were queued before streamon,
- * we can now pass them to driver for processing.
- */
- list_for_each_entry(vb, &q->queued_list, queued_entry)
- __enqueue_in_driver(vb);
-
- /*
- * Let driver notice that streaming state has been enabled.
- */
- ret = call_qop(q, start_streaming, q, atomic_read(&q->queued_count));
- if (ret) {
- dprintk(1, "streamon: driver refused to start streaming\n");
- __vb2_queue_cancel(q);
- return ret;
- }
-
- q->streaming = 1;
-
- dprintk(3, "Streamon successful\n");
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_streamon);
-
-
-/**
- * vb2_streamoff - stop streaming
- * @q: videobuf2 queue
- * @type: type argument passed from userspace to vidioc_streamoff handler
- *
- * Should be called from vidioc_streamoff handler of a driver.
- * This function:
- * 1) verifies current state,
- * 2) stop streaming and dequeues any queued buffers, including those previously
- * passed to the driver (after waiting for the driver to finish).
- *
- * This call can be used for pausing playback.
- * The return values from this function are intended to be directly returned
- * from vidioc_streamoff handler in the driver
- */
-int vb2_streamoff(struct vb2_queue *q, enum v4l2_buf_type type)
-{
- if (q->fileio) {
- dprintk(1, "streamoff: file io in progress\n");
- return -EBUSY;
- }
-
- if (type != q->type) {
- dprintk(1, "streamoff: invalid stream type\n");
- return -EINVAL;
- }
-
- if (!q->streaming) {
- dprintk(1, "streamoff: not streaming\n");
- return -EINVAL;
- }
-
- /*
- * Cancel will pause streaming and remove all buffers from the driver
- * and videobuf, effectively returning control over them to userspace.
- */
- __vb2_queue_cancel(q);
-
- dprintk(3, "Streamoff successful\n");
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_streamoff);
-
-/**
- * __find_plane_by_offset() - find plane associated with the given offset off
- */
-static int __find_plane_by_offset(struct vb2_queue *q, unsigned long off,
- unsigned int *_buffer, unsigned int *_plane)
-{
- struct vb2_buffer *vb;
- unsigned int buffer, plane;
-
- /*
- * Go over all buffers and their planes, comparing the given offset
- * with an offset assigned to each plane. If a match is found,
- * return its buffer and plane numbers.
- */
- for (buffer = 0; buffer < q->num_buffers; ++buffer) {
- vb = q->bufs[buffer];
-
- for (plane = 0; plane < vb->num_planes; ++plane) {
- if (vb->v4l2_planes[plane].m.mem_offset == off) {
- *_buffer = buffer;
- *_plane = plane;
- return 0;
- }
- }
- }
-
- return -EINVAL;
-}
-
-/**
- * vb2_expbuf() - Export a buffer as a file descriptor
- * @q: videobuf2 queue
- * @eb: export buffer structure passed from userspace to vidioc_expbuf
- * handler in driver
- *
- * The return values from this function are intended to be directly returned
- * from vidioc_expbuf handler in driver.
- */
-int vb2_expbuf(struct vb2_queue *q, struct v4l2_exportbuffer *eb)
-{
- struct vb2_buffer *vb = NULL;
- struct vb2_plane *vb_plane;
- int ret;
- struct dma_buf *dbuf;
-
- if (q->memory != V4L2_MEMORY_MMAP) {
- dprintk(1, "Queue is not currently set up for mmap\n");
- return -EINVAL;
- }
-
- if (!q->mem_ops->get_dmabuf) {
- dprintk(1, "Queue does not support DMA buffer exporting\n");
- return -EINVAL;
- }
-
- if (eb->flags & ~O_CLOEXEC) {
- dprintk(1, "Queue does support only O_CLOEXEC flag\n");
- return -EINVAL;
- }
-
- if (eb->type != q->type) {
- dprintk(1, "qbuf: invalid buffer type\n");
- return -EINVAL;
- }
-
- if (eb->index >= q->num_buffers) {
- dprintk(1, "buffer index out of range\n");
- return -EINVAL;
- }
-
- vb = q->bufs[eb->index];
-
- if (eb->plane >= vb->num_planes) {
- dprintk(1, "buffer plane out of range\n");
- return -EINVAL;
- }
-
- vb_plane = &vb->planes[eb->plane];
-
- dbuf = call_memop(q, get_dmabuf, vb_plane->mem_priv);
- if (IS_ERR_OR_NULL(dbuf)) {
- dprintk(1, "Failed to export buffer %d, plane %d\n",
- eb->index, eb->plane);
- return -EINVAL;
- }
-
- ret = dma_buf_fd(dbuf, eb->flags);
- if (ret < 0) {
- dprintk(3, "buffer %d, plane %d failed to export (%d)\n",
- eb->index, eb->plane, ret);
- dma_buf_put(dbuf);
- return ret;
- }
-
- dprintk(3, "buffer %d, plane %d exported as %d descriptor\n",
- eb->index, eb->plane, ret);
- eb->fd = ret;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_expbuf);
-
-/**
- * vb2_mmap() - map video buffers into application address space
- * @q: videobuf2 queue
- * @vma: vma passed to the mmap file operation handler in the driver
- *
- * Should be called from mmap file operation handler of a driver.
- * This function maps one plane of one of the available video buffers to
- * userspace. To map whole video memory allocated on reqbufs, this function
- * has to be called once per each plane per each buffer previously allocated.
- *
- * When the userspace application calls mmap, it passes to it an offset returned
- * to it earlier by the means of vidioc_querybuf handler. That offset acts as
- * a "cookie", which is then used to identify the plane to be mapped.
- * This function finds a plane with a matching offset and a mapping is performed
- * by the means of a provided memory operation.
- *
- * The return values from this function are intended to be directly returned
- * from the mmap handler in driver.
- */
-int vb2_mmap(struct vb2_queue *q, struct vm_area_struct *vma)
-{
- unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
- struct vb2_buffer *vb;
- unsigned int buffer, plane;
- int ret;
-
- if (q->memory != V4L2_MEMORY_MMAP) {
- dprintk(1, "Queue is not currently set up for mmap\n");
- return -EINVAL;
- }
-
- /*
- * Check memory area access mode.
- */
- if (!(vma->vm_flags & VM_SHARED)) {
- dprintk(1, "Invalid vma flags, VM_SHARED needed\n");
- return -EINVAL;
- }
- if (V4L2_TYPE_IS_OUTPUT(q->type)) {
- if (!(vma->vm_flags & VM_WRITE)) {
- dprintk(1, "Invalid vma flags, VM_WRITE needed\n");
- return -EINVAL;
- }
- } else {
- if (!(vma->vm_flags & VM_READ)) {
- dprintk(1, "Invalid vma flags, VM_READ needed\n");
- return -EINVAL;
- }
- }
-
- /*
- * Find the plane corresponding to the offset passed by userspace.
- */
- ret = __find_plane_by_offset(q, off, &buffer, &plane);
- if (ret)
- return ret;
-
- vb = q->bufs[buffer];
-
- ret = call_memop(q, mmap, vb->planes[plane].mem_priv, vma);
- if (ret)
- return ret;
-
- dprintk(3, "Buffer %d, plane %d successfully mapped\n", buffer, plane);
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_mmap);
-
-#ifndef CONFIG_MMU
-unsigned long vb2_get_unmapped_area(struct vb2_queue *q,
- unsigned long addr,
- unsigned long len,
- unsigned long pgoff,
- unsigned long flags)
-{
- unsigned long off = pgoff << PAGE_SHIFT;
- struct vb2_buffer *vb;
- unsigned int buffer, plane;
- int ret;
-
- if (q->memory != V4L2_MEMORY_MMAP) {
- dprintk(1, "Queue is not currently set up for mmap\n");
- return -EINVAL;
- }
-
- /*
- * Find the plane corresponding to the offset passed by userspace.
- */
- ret = __find_plane_by_offset(q, off, &buffer, &plane);
- if (ret)
- return ret;
-
- vb = q->bufs[buffer];
-
- return (unsigned long)vb2_plane_vaddr(vb, plane);
-}
-EXPORT_SYMBOL_GPL(vb2_get_unmapped_area);
-#endif
-
-static int __vb2_init_fileio(struct vb2_queue *q, int read);
-static int __vb2_cleanup_fileio(struct vb2_queue *q);
-
-/**
- * vb2_poll() - implements poll userspace operation
- * @q: videobuf2 queue
- * @file: file argument passed to the poll file operation handler
- * @wait: wait argument passed to the poll file operation handler
- *
- * This function implements poll file operation handler for a driver.
- * For CAPTURE queues, if a buffer is ready to be dequeued, the userspace will
- * be informed that the file descriptor of a video device is available for
- * reading.
- * For OUTPUT queues, if a buffer is ready to be dequeued, the file descriptor
- * will be reported as available for writing.
- *
- * If the driver uses struct v4l2_fh, then vb2_poll() will also check for any
- * pending events.
- *
- * The return values from this function are intended to be directly returned
- * from poll handler in driver.
- */
-unsigned int vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait)
-{
- struct video_device *vfd = video_devdata(file);
- unsigned long req_events = poll_requested_events(wait);
- struct vb2_buffer *vb = NULL;
- unsigned int res = 0;
- unsigned long flags;
-
- if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) {
- struct v4l2_fh *fh = file->private_data;
-
- if (v4l2_event_pending(fh))
- res = POLLPRI;
- else if (req_events & POLLPRI)
- poll_wait(file, &fh->wait, wait);
- }
-
- if (!V4L2_TYPE_IS_OUTPUT(q->type) && !(req_events & (POLLIN | POLLRDNORM)))
- return res;
- if (V4L2_TYPE_IS_OUTPUT(q->type) && !(req_events & (POLLOUT | POLLWRNORM)))
- return res;
-
- /*
- * Start file I/O emulator only if streaming API has not been used yet.
- */
- if (q->num_buffers == 0 && q->fileio == NULL) {
- if (!V4L2_TYPE_IS_OUTPUT(q->type) && (q->io_modes & VB2_READ) &&
- (req_events & (POLLIN | POLLRDNORM))) {
- if (__vb2_init_fileio(q, 1))
- return res | POLLERR;
- }
- if (V4L2_TYPE_IS_OUTPUT(q->type) && (q->io_modes & VB2_WRITE) &&
- (req_events & (POLLOUT | POLLWRNORM))) {
- if (__vb2_init_fileio(q, 0))
- return res | POLLERR;
- /*
- * Write to OUTPUT queue can be done immediately.
- */
- return res | POLLOUT | POLLWRNORM;
- }
- }
-
- /*
- * There is nothing to wait for if no buffers have already been queued.
- */
- if (list_empty(&q->queued_list))
- return res | POLLERR;
-
- poll_wait(file, &q->done_wq, wait);
-
- /*
- * Take first buffer available for dequeuing.
- */
- spin_lock_irqsave(&q->done_lock, flags);
- if (!list_empty(&q->done_list))
- vb = list_first_entry(&q->done_list, struct vb2_buffer,
- done_entry);
- spin_unlock_irqrestore(&q->done_lock, flags);
-
- if (vb && (vb->state == VB2_BUF_STATE_DONE
- || vb->state == VB2_BUF_STATE_ERROR)) {
- return (V4L2_TYPE_IS_OUTPUT(q->type)) ?
- res | POLLOUT | POLLWRNORM :
- res | POLLIN | POLLRDNORM;
- }
- return res;
-}
-EXPORT_SYMBOL_GPL(vb2_poll);
-
-/**
- * vb2_queue_init() - initialize a videobuf2 queue
- * @q: videobuf2 queue; this structure should be allocated in driver
- *
- * The vb2_queue structure should be allocated by the driver. The driver is
- * responsible of clearing it's content and setting initial values for some
- * required entries before calling this function.
- * q->ops, q->mem_ops, q->type and q->io_modes are mandatory. Please refer
- * to the struct vb2_queue description in include/media/videobuf2-core.h
- * for more information.
- */
-int vb2_queue_init(struct vb2_queue *q)
-{
- /*
- * Sanity check
- */
- if (WARN_ON(!q) ||
- WARN_ON(!q->ops) ||
- WARN_ON(!q->mem_ops) ||
- WARN_ON(!q->type) ||
- WARN_ON(!q->io_modes) ||
- WARN_ON(!q->ops->queue_setup) ||
- WARN_ON(!q->ops->buf_queue))
- return -EINVAL;
-
- INIT_LIST_HEAD(&q->queued_list);
- INIT_LIST_HEAD(&q->done_list);
- spin_lock_init(&q->done_lock);
- init_waitqueue_head(&q->done_wq);
-
- if (q->buf_struct_size == 0)
- q->buf_struct_size = sizeof(struct vb2_buffer);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_queue_init);
-
-/**
- * vb2_queue_release() - stop streaming, release the queue and free memory
- * @q: videobuf2 queue
- *
- * This function stops streaming and performs necessary clean ups, including
- * freeing video buffer memory. The driver is responsible for freeing
- * the vb2_queue structure itself.
- */
-void vb2_queue_release(struct vb2_queue *q)
-{
- __vb2_cleanup_fileio(q);
- __vb2_queue_cancel(q);
- __vb2_queue_free(q, q->num_buffers);
-}
-EXPORT_SYMBOL_GPL(vb2_queue_release);
-
-/**
- * struct vb2_fileio_buf - buffer context used by file io emulator
- *
- * vb2 provides a compatibility layer and emulator of file io (read and
- * write) calls on top of streaming API. This structure is used for
- * tracking context related to the buffers.
- */
-struct vb2_fileio_buf {
- void *vaddr;
- unsigned int size;
- unsigned int pos;
- unsigned int queued:1;
-};
-
-/**
- * struct vb2_fileio_data - queue context used by file io emulator
- *
- * vb2 provides a compatibility layer and emulator of file io (read and
- * write) calls on top of streaming API. For proper operation it required
- * this structure to save the driver state between each call of the read
- * or write function.
- */
-struct vb2_fileio_data {
- struct v4l2_requestbuffers req;
- struct v4l2_buffer b;
- struct vb2_fileio_buf bufs[VIDEO_MAX_FRAME];
- unsigned int index;
- unsigned int q_count;
- unsigned int dq_count;
- unsigned int flags;
-};
-
-/**
- * __vb2_init_fileio() - initialize file io emulator
- * @q: videobuf2 queue
- * @read: mode selector (1 means read, 0 means write)
- */
-static int __vb2_init_fileio(struct vb2_queue *q, int read)
-{
- struct vb2_fileio_data *fileio;
- int i, ret;
- unsigned int count = 0;
-
- /*
- * Sanity check
- */
- if ((read && !(q->io_modes & VB2_READ)) ||
- (!read && !(q->io_modes & VB2_WRITE)))
- BUG();
-
- /*
- * Check if device supports mapping buffers to kernel virtual space.
- */
- if (!q->mem_ops->vaddr)
- return -EBUSY;
-
- /*
- * Check if streaming api has not been already activated.
- */
- if (q->streaming || q->num_buffers > 0)
- return -EBUSY;
-
- /*
- * Start with count 1, driver can increase it in queue_setup()
- */
- count = 1;
-
- dprintk(3, "setting up file io: mode %s, count %d, flags %08x\n",
- (read) ? "read" : "write", count, q->io_flags);
-
- fileio = kzalloc(sizeof(struct vb2_fileio_data), GFP_KERNEL);
- if (fileio == NULL)
- return -ENOMEM;
-
- fileio->flags = q->io_flags;
-
- /*
- * Request buffers and use MMAP type to force driver
- * to allocate buffers by itself.
- */
- fileio->req.count = count;
- fileio->req.memory = V4L2_MEMORY_MMAP;
- fileio->req.type = q->type;
- ret = vb2_reqbufs(q, &fileio->req);
- if (ret)
- goto err_kfree;
-
- /*
- * Check if plane_count is correct
- * (multiplane buffers are not supported).
- */
- if (q->bufs[0]->num_planes != 1) {
- ret = -EBUSY;
- goto err_reqbufs;
- }
-
- /*
- * Get kernel address of each buffer.
- */
- for (i = 0; i < q->num_buffers; i++) {
- fileio->bufs[i].vaddr = vb2_plane_vaddr(q->bufs[i], 0);
- if (fileio->bufs[i].vaddr == NULL)
- goto err_reqbufs;
- fileio->bufs[i].size = vb2_plane_size(q->bufs[i], 0);
- }
-
- /*
- * Read mode requires pre queuing of all buffers.
- */
- if (read) {
- /*
- * Queue all buffers.
- */
- for (i = 0; i < q->num_buffers; i++) {
- struct v4l2_buffer *b = &fileio->b;
- memset(b, 0, sizeof(*b));
- b->type = q->type;
- b->memory = q->memory;
- b->index = i;
- ret = vb2_qbuf(q, b);
- if (ret)
- goto err_reqbufs;
- fileio->bufs[i].queued = 1;
- }
-
- /*
- * Start streaming.
- */
- ret = vb2_streamon(q, q->type);
- if (ret)
- goto err_reqbufs;
- }
-
- q->fileio = fileio;
-
- return ret;
-
-err_reqbufs:
- fileio->req.count = 0;
- vb2_reqbufs(q, &fileio->req);
-
-err_kfree:
- kfree(fileio);
- return ret;
-}
-
-/**
- * __vb2_cleanup_fileio() - free resourced used by file io emulator
- * @q: videobuf2 queue
- */
-static int __vb2_cleanup_fileio(struct vb2_queue *q)
-{
- struct vb2_fileio_data *fileio = q->fileio;
-
- if (fileio) {
- /*
- * Hack fileio context to enable direct calls to vb2 ioctl
- * interface.
- */
- q->fileio = NULL;
-
- vb2_streamoff(q, q->type);
- fileio->req.count = 0;
- vb2_reqbufs(q, &fileio->req);
- kfree(fileio);
- dprintk(3, "file io emulator closed\n");
- }
- return 0;
-}
-
-/**
- * __vb2_perform_fileio() - perform a single file io (read or write) operation
- * @q: videobuf2 queue
- * @data: pointed to target userspace buffer
- * @count: number of bytes to read or write
- * @ppos: file handle position tracking pointer
- * @nonblock: mode selector (1 means blocking calls, 0 means nonblocking)
- * @read: access mode selector (1 means read, 0 means write)
- */
-static size_t __vb2_perform_fileio(struct vb2_queue *q, char __user *data, size_t count,
- loff_t *ppos, int nonblock, int read)
-{
- struct vb2_fileio_data *fileio;
- struct vb2_fileio_buf *buf;
- int ret, index;
-
- dprintk(3, "file io: mode %s, offset %ld, count %zd, %sblocking\n",
- read ? "read" : "write", (long)*ppos, count,
- nonblock ? "non" : "");
-
- if (!data)
- return -EINVAL;
-
- /*
- * Initialize emulator on first call.
- */
- if (!q->fileio) {
- ret = __vb2_init_fileio(q, read);
- dprintk(3, "file io: vb2_init_fileio result: %d\n", ret);
- if (ret)
- return ret;
- }
- fileio = q->fileio;
-
- /*
- * Hack fileio context to enable direct calls to vb2 ioctl interface.
- * The pointer will be restored before returning from this function.
- */
- q->fileio = NULL;
-
- index = fileio->index;
- buf = &fileio->bufs[index];
-
- /*
- * Check if we need to dequeue the buffer.
- */
- if (buf->queued) {
- struct vb2_buffer *vb;
-
- /*
- * Call vb2_dqbuf to get buffer back.
- */
- memset(&fileio->b, 0, sizeof(fileio->b));
- fileio->b.type = q->type;
- fileio->b.memory = q->memory;
- fileio->b.index = index;
- ret = vb2_dqbuf(q, &fileio->b, nonblock);
- dprintk(5, "file io: vb2_dqbuf result: %d\n", ret);
- if (ret)
- goto end;
- fileio->dq_count += 1;
-
- /*
- * Get number of bytes filled by the driver
- */
- vb = q->bufs[index];
- buf->size = vb2_get_plane_payload(vb, 0);
- buf->queued = 0;
- }
-
- /*
- * Limit count on last few bytes of the buffer.
- */
- if (buf->pos + count > buf->size) {
- count = buf->size - buf->pos;
- dprintk(5, "reducing read count: %zd\n", count);
- }
-
- /*
- * Transfer data to userspace.
- */
- dprintk(3, "file io: copying %zd bytes - buffer %d, offset %u\n",
- count, index, buf->pos);
- if (read)
- ret = copy_to_user(data, buf->vaddr + buf->pos, count);
- else
- ret = copy_from_user(buf->vaddr + buf->pos, data, count);
- if (ret) {
- dprintk(3, "file io: error copying data\n");
- ret = -EFAULT;
- goto end;
- }
-
- /*
- * Update counters.
- */
- buf->pos += count;
- *ppos += count;
-
- /*
- * Queue next buffer if required.
- */
- if (buf->pos == buf->size ||
- (!read && (fileio->flags & VB2_FILEIO_WRITE_IMMEDIATELY))) {
- /*
- * Check if this is the last buffer to read.
- */
- if (read && (fileio->flags & VB2_FILEIO_READ_ONCE) &&
- fileio->dq_count == 1) {
- dprintk(3, "file io: read limit reached\n");
- /*
- * Restore fileio pointer and release the context.
- */
- q->fileio = fileio;
- return __vb2_cleanup_fileio(q);
- }
-
- /*
- * Call vb2_qbuf and give buffer to the driver.
- */
- memset(&fileio->b, 0, sizeof(fileio->b));
- fileio->b.type = q->type;
- fileio->b.memory = q->memory;
- fileio->b.index = index;
- fileio->b.bytesused = buf->pos;
- ret = vb2_qbuf(q, &fileio->b);
- dprintk(5, "file io: vb2_dbuf result: %d\n", ret);
- if (ret)
- goto end;
-
- /*
- * Buffer has been queued, update the status
- */
- buf->pos = 0;
- buf->queued = 1;
- buf->size = q->bufs[0]->v4l2_planes[0].length;
- fileio->q_count += 1;
-
- /*
- * Switch to the next buffer
- */
- fileio->index = (index + 1) % q->num_buffers;
-
- /*
- * Start streaming if required.
- */
- if (!read && !q->streaming) {
- ret = vb2_streamon(q, q->type);
- if (ret)
- goto end;
- }
- }
-
- /*
- * Return proper number of bytes processed.
- */
- if (ret == 0)
- ret = count;
-end:
- /*
- * Restore the fileio context and block vb2 ioctl interface.
- */
- q->fileio = fileio;
- return ret;
-}
-
-size_t vb2_read(struct vb2_queue *q, char __user *data, size_t count,
- loff_t *ppos, int nonblocking)
-{
- return __vb2_perform_fileio(q, data, count, ppos, nonblocking, 1);
-}
-EXPORT_SYMBOL_GPL(vb2_read);
-
-size_t vb2_write(struct vb2_queue *q, char __user *data, size_t count,
- loff_t *ppos, int nonblocking)
-{
- return __vb2_perform_fileio(q, data, count, ppos, nonblocking, 0);
-}
-EXPORT_SYMBOL_GPL(vb2_write);
-
-
-/*
- * The following functions are not part of the vb2 core API, but are helper
- * functions that plug into struct v4l2_ioctl_ops, struct v4l2_file_operations
- * and struct vb2_ops.
- * They contain boilerplate code that most if not all drivers have to do
- * and so they simplify the driver code.
- */
-
-/* The queue is busy if there is a owner and you are not that owner. */
-static inline bool vb2_queue_is_busy(struct video_device *vdev, struct file *file)
-{
- return vdev->queue->owner && vdev->queue->owner != file->private_data;
-}
-
-/* vb2 ioctl helpers */
-
-int vb2_ioctl_reqbufs(struct file *file, void *priv,
- struct v4l2_requestbuffers *p)
-{
- struct video_device *vdev = video_devdata(file);
- int res = __verify_memory_type(vdev->queue, p->memory, p->type);
-
- if (res)
- return res;
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- res = __reqbufs(vdev->queue, p);
- /* If count == 0, then the owner has released all buffers and he
- is no longer owner of the queue. Otherwise we have a new owner. */
- if (res == 0)
- vdev->queue->owner = p->count ? file->private_data : NULL;
- return res;
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_reqbufs);
-
-int vb2_ioctl_create_bufs(struct file *file, void *priv,
- struct v4l2_create_buffers *p)
-{
- struct video_device *vdev = video_devdata(file);
- int res = __verify_memory_type(vdev->queue, p->memory, p->format.type);
-
- p->index = vdev->queue->num_buffers;
- /* If count == 0, then just check if memory and type are valid.
- Any -EBUSY result from __verify_memory_type can be mapped to 0. */
- if (p->count == 0)
- return res != -EBUSY ? res : 0;
- if (res)
- return res;
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- res = __create_bufs(vdev->queue, p);
- if (res == 0)
- vdev->queue->owner = file->private_data;
- return res;
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_create_bufs);
-
-int vb2_ioctl_prepare_buf(struct file *file, void *priv,
- struct v4l2_buffer *p)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- return vb2_prepare_buf(vdev->queue, p);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_prepare_buf);
-
-int vb2_ioctl_querybuf(struct file *file, void *priv, struct v4l2_buffer *p)
-{
- struct video_device *vdev = video_devdata(file);
-
- /* No need to call vb2_queue_is_busy(), anyone can query buffers. */
- return vb2_querybuf(vdev->queue, p);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_querybuf);
-
-int vb2_ioctl_qbuf(struct file *file, void *priv, struct v4l2_buffer *p)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- return vb2_qbuf(vdev->queue, p);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_qbuf);
-
-int vb2_ioctl_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- return vb2_dqbuf(vdev->queue, p, file->f_flags & O_NONBLOCK);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_dqbuf);
-
-int vb2_ioctl_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- return vb2_streamon(vdev->queue, i);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_streamon);
-
-int vb2_ioctl_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- return vb2_streamoff(vdev->queue, i);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_streamoff);
-
-int vb2_ioctl_expbuf(struct file *file, void *priv, struct v4l2_exportbuffer *p)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (vb2_queue_is_busy(vdev, file))
- return -EBUSY;
- return vb2_expbuf(vdev->queue, p);
-}
-EXPORT_SYMBOL_GPL(vb2_ioctl_expbuf);
-
-/* v4l2_file_operations helpers */
-
-int vb2_fop_mmap(struct file *file, struct vm_area_struct *vma)
-{
- struct video_device *vdev = video_devdata(file);
-
- return vb2_mmap(vdev->queue, vma);
-}
-EXPORT_SYMBOL_GPL(vb2_fop_mmap);
-
-int vb2_fop_release(struct file *file)
-{
- struct video_device *vdev = video_devdata(file);
-
- if (file->private_data == vdev->queue->owner) {
- vb2_queue_release(vdev->queue);
- vdev->queue->owner = NULL;
- }
- return v4l2_fh_release(file);
-}
-EXPORT_SYMBOL_GPL(vb2_fop_release);
-
-ssize_t vb2_fop_write(struct file *file, char __user *buf,
- size_t count, loff_t *ppos)
-{
- struct video_device *vdev = video_devdata(file);
- struct mutex *lock = vdev->queue->lock ? vdev->queue->lock : vdev->lock;
- int err = -EBUSY;
-
- if (lock && mutex_lock_interruptible(lock))
- return -ERESTARTSYS;
- if (vb2_queue_is_busy(vdev, file))
- goto exit;
- err = vb2_write(vdev->queue, buf, count, ppos,
- file->f_flags & O_NONBLOCK);
- if (vdev->queue->fileio)
- vdev->queue->owner = file->private_data;
-exit:
- if (lock)
- mutex_unlock(lock);
- return err;
-}
-EXPORT_SYMBOL_GPL(vb2_fop_write);
-
-ssize_t vb2_fop_read(struct file *file, char __user *buf,
- size_t count, loff_t *ppos)
-{
- struct video_device *vdev = video_devdata(file);
- struct mutex *lock = vdev->queue->lock ? vdev->queue->lock : vdev->lock;
- int err = -EBUSY;
-
- if (lock && mutex_lock_interruptible(lock))
- return -ERESTARTSYS;
- if (vb2_queue_is_busy(vdev, file))
- goto exit;
- err = vb2_read(vdev->queue, buf, count, ppos,
- file->f_flags & O_NONBLOCK);
- if (vdev->queue->fileio)
- vdev->queue->owner = file->private_data;
-exit:
- if (lock)
- mutex_unlock(lock);
- return err;
-}
-EXPORT_SYMBOL_GPL(vb2_fop_read);
-
-unsigned int vb2_fop_poll(struct file *file, poll_table *wait)
-{
- struct video_device *vdev = video_devdata(file);
- struct vb2_queue *q = vdev->queue;
- struct mutex *lock = q->lock ? q->lock : vdev->lock;
- unsigned long req_events = poll_requested_events(wait);
- unsigned res;
- void *fileio;
- bool must_lock = false;
-
- /* Try to be smart: only lock if polling might start fileio,
- otherwise locking will only introduce unwanted delays. */
- if (q->num_buffers == 0 && q->fileio == NULL) {
- if (!V4L2_TYPE_IS_OUTPUT(q->type) && (q->io_modes & VB2_READ) &&
- (req_events & (POLLIN | POLLRDNORM)))
- must_lock = true;
- else if (V4L2_TYPE_IS_OUTPUT(q->type) && (q->io_modes & VB2_WRITE) &&
- (req_events & (POLLOUT | POLLWRNORM)))
- must_lock = true;
- }
-
- /* If locking is needed, but this helper doesn't know how, then you
- shouldn't be using this helper but you should write your own. */
- WARN_ON(must_lock && !lock);
-
- if (must_lock && lock && mutex_lock_interruptible(lock))
- return POLLERR;
-
- fileio = q->fileio;
-
- res = vb2_poll(vdev->queue, file, wait);
-
- /* If fileio was started, then we have a new queue owner. */
- if (must_lock && !fileio && q->fileio)
- q->owner = file->private_data;
- if (must_lock && lock)
- mutex_unlock(lock);
- return res;
-}
-EXPORT_SYMBOL_GPL(vb2_fop_poll);
-
-#ifndef CONFIG_MMU
-unsigned long vb2_fop_get_unmapped_area(struct file *file, unsigned long addr,
- unsigned long len, unsigned long pgoff, unsigned long flags)
-{
- struct video_device *vdev = video_devdata(file);
-
- return vb2_get_unmapped_area(vdev->queue, addr, len, pgoff, flags);
-}
-EXPORT_SYMBOL_GPL(vb2_fop_get_unmapped_area);
-#endif
-
-/* vb2_ops helpers. Only use if vq->lock is non-NULL. */
-
-void vb2_ops_wait_prepare(struct vb2_queue *vq)
-{
- mutex_unlock(vq->lock);
-}
-EXPORT_SYMBOL_GPL(vb2_ops_wait_prepare);
-
-void vb2_ops_wait_finish(struct vb2_queue *vq)
-{
- mutex_lock(vq->lock);
-}
-EXPORT_SYMBOL_GPL(vb2_ops_wait_finish);
-
-MODULE_DESCRIPTION("Driver helper framework for Video for Linux 2");
-MODULE_AUTHOR("Pawel Osciak <pawel@osciak.com>, Marek Szyprowski");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/v4l2-core/videobuf2-dma-contig.c b/drivers/media/v4l2-core/videobuf2-dma-contig.c
deleted file mode 100644
index 10beaee7..00000000
--- a/drivers/media/v4l2-core/videobuf2-dma-contig.c
+++ /dev/null
@@ -1,776 +0,0 @@
-/*
- * videobuf2-dma-contig.c - DMA contig memory allocator for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#include <linux/dma-buf.h>
-#include <linux/module.h>
-#include <linux/scatterlist.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/dma-mapping.h>
-
-#include <media/videobuf2-core.h>
-#include <media/videobuf2-dma-contig.h>
-#include <media/videobuf2-memops.h>
-
-struct vb2_dc_conf {
- struct device *dev;
-};
-
-struct vb2_dc_buf {
- struct device *dev;
- void *vaddr;
- unsigned long size;
- dma_addr_t dma_addr;
- enum dma_data_direction dma_dir;
- struct sg_table *dma_sgt;
-
- /* MMAP related */
- struct vb2_vmarea_handler handler;
- atomic_t refcount;
- struct sg_table *sgt_base;
-
- /* USERPTR related */
- struct vm_area_struct *vma;
-
- /* DMABUF related */
- struct dma_buf_attachment *db_attach;
-};
-
-/*********************************************/
-/* scatterlist table functions */
-/*********************************************/
-
-
-static void vb2_dc_sgt_foreach_page(struct sg_table *sgt,
- void (*cb)(struct page *pg))
-{
- struct scatterlist *s;
- unsigned int i;
-
- for_each_sg(sgt->sgl, s, sgt->orig_nents, i) {
- struct page *page = sg_page(s);
- unsigned int n_pages = PAGE_ALIGN(s->offset + s->length)
- >> PAGE_SHIFT;
- unsigned int j;
-
- for (j = 0; j < n_pages; ++j, ++page)
- cb(page);
- }
-}
-
-static unsigned long vb2_dc_get_contiguous_size(struct sg_table *sgt)
-{
- struct scatterlist *s;
- dma_addr_t expected = sg_dma_address(sgt->sgl);
- unsigned int i;
- unsigned long size = 0;
-
- for_each_sg(sgt->sgl, s, sgt->nents, i) {
- if (sg_dma_address(s) != expected)
- break;
- expected = sg_dma_address(s) + sg_dma_len(s);
- size += sg_dma_len(s);
- }
- return size;
-}
-
-/*********************************************/
-/* callbacks for all buffers */
-/*********************************************/
-
-static void *vb2_dc_cookie(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
-
- return &buf->dma_addr;
-}
-
-static void *vb2_dc_vaddr(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
-
- return buf->vaddr;
-}
-
-static unsigned int vb2_dc_num_users(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
-
- return atomic_read(&buf->refcount);
-}
-
-static void vb2_dc_prepare(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
- struct sg_table *sgt = buf->dma_sgt;
-
- /* DMABUF exporter will flush the cache for us */
- if (!sgt || buf->db_attach)
- return;
-
- dma_sync_sg_for_device(buf->dev, sgt->sgl, sgt->nents, buf->dma_dir);
-}
-
-static void vb2_dc_finish(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
- struct sg_table *sgt = buf->dma_sgt;
-
- /* DMABUF exporter will flush the cache for us */
- if (!sgt || buf->db_attach)
- return;
-
- dma_sync_sg_for_cpu(buf->dev, sgt->sgl, sgt->nents, buf->dma_dir);
-}
-
-/*********************************************/
-/* callbacks for MMAP buffers */
-/*********************************************/
-
-static void vb2_dc_put(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
-
- if (!atomic_dec_and_test(&buf->refcount))
- return;
-
- if (buf->sgt_base) {
- sg_free_table(buf->sgt_base);
- kfree(buf->sgt_base);
- }
- dma_free_coherent(buf->dev, buf->size, buf->vaddr, buf->dma_addr);
- put_device(buf->dev);
- kfree(buf);
-}
-
-static void *vb2_dc_alloc(void *alloc_ctx, unsigned long size)
-{
- struct vb2_dc_conf *conf = alloc_ctx;
- struct device *dev = conf->dev;
- struct vb2_dc_buf *buf;
-
- buf = kzalloc(sizeof *buf, GFP_KERNEL);
- if (!buf)
- return ERR_PTR(-ENOMEM);
-
- /* align image size to PAGE_SIZE */
- size = PAGE_ALIGN(size);
-
- buf->vaddr = dma_alloc_coherent(dev, size, &buf->dma_addr, GFP_KERNEL);
- if (!buf->vaddr) {
- dev_err(dev, "dma_alloc_coherent of size %ld failed\n", size);
- kfree(buf);
- return ERR_PTR(-ENOMEM);
- }
-
- /* Prevent the device from being released while the buffer is used */
- buf->dev = get_device(dev);
- buf->size = size;
-
- buf->handler.refcount = &buf->refcount;
- buf->handler.put = vb2_dc_put;
- buf->handler.arg = buf;
-
- atomic_inc(&buf->refcount);
-
- return buf;
-}
-
-static int vb2_dc_mmap(void *buf_priv, struct vm_area_struct *vma)
-{
- struct vb2_dc_buf *buf = buf_priv;
- int ret;
-
- if (!buf) {
- printk(KERN_ERR "No buffer to map\n");
- return -EINVAL;
- }
-
- /*
- * dma_mmap_* uses vm_pgoff as in-buffer offset, but we want to
- * map whole buffer
- */
- vma->vm_pgoff = 0;
-
- ret = dma_mmap_coherent(buf->dev, vma, buf->vaddr,
- buf->dma_addr, buf->size);
-
- if (ret) {
- pr_err("Remapping memory failed, error: %d\n", ret);
- return ret;
- }
-
- vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
- vma->vm_private_data = &buf->handler;
- vma->vm_ops = &vb2_common_vm_ops;
-
- vma->vm_ops->open(vma);
-
- pr_debug("%s: mapped dma addr 0x%08lx at 0x%08lx, size %ld\n",
- __func__, (unsigned long)buf->dma_addr, vma->vm_start,
- buf->size);
-
- return 0;
-}
-
-/*********************************************/
-/* DMABUF ops for exporters */
-/*********************************************/
-
-struct vb2_dc_attachment {
- struct sg_table sgt;
- enum dma_data_direction dir;
-};
-
-static int vb2_dc_dmabuf_ops_attach(struct dma_buf *dbuf, struct device *dev,
- struct dma_buf_attachment *dbuf_attach)
-{
- struct vb2_dc_attachment *attach;
- unsigned int i;
- struct scatterlist *rd, *wr;
- struct sg_table *sgt;
- struct vb2_dc_buf *buf = dbuf->priv;
- int ret;
-
- attach = kzalloc(sizeof(*attach), GFP_KERNEL);
- if (!attach)
- return -ENOMEM;
-
- sgt = &attach->sgt;
- /* Copy the buf->base_sgt scatter list to the attachment, as we can't
- * map the same scatter list to multiple attachments at the same time.
- */
- ret = sg_alloc_table(sgt, buf->sgt_base->orig_nents, GFP_KERNEL);
- if (ret) {
- kfree(attach);
- return -ENOMEM;
- }
-
- rd = buf->sgt_base->sgl;
- wr = sgt->sgl;
- for (i = 0; i < sgt->orig_nents; ++i) {
- sg_set_page(wr, sg_page(rd), rd->length, rd->offset);
- rd = sg_next(rd);
- wr = sg_next(wr);
- }
-
- attach->dir = DMA_NONE;
- dbuf_attach->priv = attach;
-
- return 0;
-}
-
-static void vb2_dc_dmabuf_ops_detach(struct dma_buf *dbuf,
- struct dma_buf_attachment *db_attach)
-{
- struct vb2_dc_attachment *attach = db_attach->priv;
- struct sg_table *sgt;
-
- if (!attach)
- return;
-
- sgt = &attach->sgt;
-
- /* release the scatterlist cache */
- if (attach->dir != DMA_NONE)
- dma_unmap_sg(db_attach->dev, sgt->sgl, sgt->orig_nents,
- attach->dir);
- sg_free_table(sgt);
- kfree(attach);
- db_attach->priv = NULL;
-}
-
-static struct sg_table *vb2_dc_dmabuf_ops_map(
- struct dma_buf_attachment *db_attach, enum dma_data_direction dir)
-{
- struct vb2_dc_attachment *attach = db_attach->priv;
- /* stealing dmabuf mutex to serialize map/unmap operations */
- struct mutex *lock = &db_attach->dmabuf->lock;
- struct sg_table *sgt;
- int ret;
-
- mutex_lock(lock);
-
- sgt = &attach->sgt;
- /* return previously mapped sg table */
- if (attach->dir == dir) {
- mutex_unlock(lock);
- return sgt;
- }
-
- /* release any previous cache */
- if (attach->dir != DMA_NONE) {
- dma_unmap_sg(db_attach->dev, sgt->sgl, sgt->orig_nents,
- attach->dir);
- attach->dir = DMA_NONE;
- }
-
- /* mapping to the client with new direction */
- ret = dma_map_sg(db_attach->dev, sgt->sgl, sgt->orig_nents, dir);
- if (ret <= 0) {
- pr_err("failed to map scatterlist\n");
- mutex_unlock(lock);
- return ERR_PTR(-EIO);
- }
-
- attach->dir = dir;
-
- mutex_unlock(lock);
-
- return sgt;
-}
-
-static void vb2_dc_dmabuf_ops_unmap(struct dma_buf_attachment *db_attach,
- struct sg_table *sgt, enum dma_data_direction dir)
-{
- /* nothing to be done here */
-}
-
-static void vb2_dc_dmabuf_ops_release(struct dma_buf *dbuf)
-{
- /* drop reference obtained in vb2_dc_get_dmabuf */
- vb2_dc_put(dbuf->priv);
-}
-
-static void *vb2_dc_dmabuf_ops_kmap(struct dma_buf *dbuf, unsigned long pgnum)
-{
- struct vb2_dc_buf *buf = dbuf->priv;
-
- return buf->vaddr + pgnum * PAGE_SIZE;
-}
-
-static void *vb2_dc_dmabuf_ops_vmap(struct dma_buf *dbuf)
-{
- struct vb2_dc_buf *buf = dbuf->priv;
-
- return buf->vaddr;
-}
-
-static int vb2_dc_dmabuf_ops_mmap(struct dma_buf *dbuf,
- struct vm_area_struct *vma)
-{
- return vb2_dc_mmap(dbuf->priv, vma);
-}
-
-static struct dma_buf_ops vb2_dc_dmabuf_ops = {
- .attach = vb2_dc_dmabuf_ops_attach,
- .detach = vb2_dc_dmabuf_ops_detach,
- .map_dma_buf = vb2_dc_dmabuf_ops_map,
- .unmap_dma_buf = vb2_dc_dmabuf_ops_unmap,
- .kmap = vb2_dc_dmabuf_ops_kmap,
- .kmap_atomic = vb2_dc_dmabuf_ops_kmap,
- .vmap = vb2_dc_dmabuf_ops_vmap,
- .mmap = vb2_dc_dmabuf_ops_mmap,
- .release = vb2_dc_dmabuf_ops_release,
-};
-
-static struct sg_table *vb2_dc_get_base_sgt(struct vb2_dc_buf *buf)
-{
- int ret;
- struct sg_table *sgt;
-
- sgt = kmalloc(sizeof(*sgt), GFP_KERNEL);
- if (!sgt) {
- dev_err(buf->dev, "failed to alloc sg table\n");
- return NULL;
- }
-
- ret = dma_get_sgtable(buf->dev, sgt, buf->vaddr, buf->dma_addr,
- buf->size);
- if (ret < 0) {
- dev_err(buf->dev, "failed to get scatterlist from DMA API\n");
- kfree(sgt);
- return NULL;
- }
-
- return sgt;
-}
-
-static struct dma_buf *vb2_dc_get_dmabuf(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
- struct dma_buf *dbuf;
-
- if (!buf->sgt_base)
- buf->sgt_base = vb2_dc_get_base_sgt(buf);
-
- if (WARN_ON(!buf->sgt_base))
- return NULL;
-
- dbuf = dma_buf_export(buf, &vb2_dc_dmabuf_ops, buf->size, 0);
- if (IS_ERR(dbuf))
- return NULL;
-
- /* dmabuf keeps reference to vb2 buffer */
- atomic_inc(&buf->refcount);
-
- return dbuf;
-}
-
-/*********************************************/
-/* callbacks for USERPTR buffers */
-/*********************************************/
-
-static inline int vma_is_io(struct vm_area_struct *vma)
-{
- return !!(vma->vm_flags & (VM_IO | VM_PFNMAP));
-}
-
-static int vb2_dc_get_user_pages(unsigned long start, struct page **pages,
- int n_pages, struct vm_area_struct *vma, int write)
-{
- if (vma_is_io(vma)) {
- unsigned int i;
-
- for (i = 0; i < n_pages; ++i, start += PAGE_SIZE) {
- unsigned long pfn;
- int ret = follow_pfn(vma, start, &pfn);
-
- if (ret) {
- pr_err("no page for address %lu\n", start);
- return ret;
- }
- pages[i] = pfn_to_page(pfn);
- }
- } else {
- int n;
-
- n = get_user_pages(current, current->mm, start & PAGE_MASK,
- n_pages, write, 1, pages, NULL);
- /* negative error means that no page was pinned */
- n = max(n, 0);
- if (n != n_pages) {
- pr_err("got only %d of %d user pages\n", n, n_pages);
- while (n)
- put_page(pages[--n]);
- return -EFAULT;
- }
- }
-
- return 0;
-}
-
-static void vb2_dc_put_dirty_page(struct page *page)
-{
- set_page_dirty_lock(page);
- put_page(page);
-}
-
-static void vb2_dc_put_userptr(void *buf_priv)
-{
- struct vb2_dc_buf *buf = buf_priv;
- struct sg_table *sgt = buf->dma_sgt;
-
- dma_unmap_sg(buf->dev, sgt->sgl, sgt->orig_nents, buf->dma_dir);
- if (!vma_is_io(buf->vma))
- vb2_dc_sgt_foreach_page(sgt, vb2_dc_put_dirty_page);
-
- sg_free_table(sgt);
- kfree(sgt);
- vb2_put_vma(buf->vma);
- kfree(buf);
-}
-
-static void *vb2_dc_get_userptr(void *alloc_ctx, unsigned long vaddr,
- unsigned long size, int write)
-{
- struct vb2_dc_conf *conf = alloc_ctx;
- struct vb2_dc_buf *buf;
- unsigned long start;
- unsigned long end;
- unsigned long offset;
- struct page **pages;
- int n_pages;
- int ret = 0;
- struct vm_area_struct *vma;
- struct sg_table *sgt;
- unsigned long contig_size;
- unsigned long dma_align = dma_get_cache_alignment();
-
- /* Only cache aligned DMA transfers are reliable */
- if (!IS_ALIGNED(vaddr | size, dma_align)) {
- pr_debug("user data must be aligned to %lu bytes\n", dma_align);
- return ERR_PTR(-EINVAL);
- }
-
- if (!size) {
- pr_debug("size is zero\n");
- return ERR_PTR(-EINVAL);
- }
-
- buf = kzalloc(sizeof *buf, GFP_KERNEL);
- if (!buf)
- return ERR_PTR(-ENOMEM);
-
- buf->dev = conf->dev;
- buf->dma_dir = write ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
-
- start = vaddr & PAGE_MASK;
- offset = vaddr & ~PAGE_MASK;
- end = PAGE_ALIGN(vaddr + size);
- n_pages = (end - start) >> PAGE_SHIFT;
-
- pages = kmalloc(n_pages * sizeof(pages[0]), GFP_KERNEL);
- if (!pages) {
- ret = -ENOMEM;
- pr_err("failed to allocate pages table\n");
- goto fail_buf;
- }
-
- /* current->mm->mmap_sem is taken by videobuf2 core */
- vma = find_vma(current->mm, vaddr);
- if (!vma) {
- pr_err("no vma for address %lu\n", vaddr);
- ret = -EFAULT;
- goto fail_pages;
- }
-
- if (vma->vm_end < vaddr + size) {
- pr_err("vma at %lu is too small for %lu bytes\n", vaddr, size);
- ret = -EFAULT;
- goto fail_pages;
- }
-
- buf->vma = vb2_get_vma(vma);
- if (!buf->vma) {
- pr_err("failed to copy vma\n");
- ret = -ENOMEM;
- goto fail_pages;
- }
-
- /* extract page list from userspace mapping */
- ret = vb2_dc_get_user_pages(start, pages, n_pages, vma, write);
- if (ret) {
- pr_err("failed to get user pages\n");
- goto fail_vma;
- }
-
- sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
- if (!sgt) {
- pr_err("failed to allocate sg table\n");
- ret = -ENOMEM;
- goto fail_get_user_pages;
- }
-
- ret = sg_alloc_table_from_pages(sgt, pages, n_pages,
- offset, size, GFP_KERNEL);
- if (ret) {
- pr_err("failed to initialize sg table\n");
- goto fail_sgt;
- }
-
- /* pages are no longer needed */
- kfree(pages);
- pages = NULL;
-
- sgt->nents = dma_map_sg(buf->dev, sgt->sgl, sgt->orig_nents,
- buf->dma_dir);
- if (sgt->nents <= 0) {
- pr_err("failed to map scatterlist\n");
- ret = -EIO;
- goto fail_sgt_init;
- }
-
- contig_size = vb2_dc_get_contiguous_size(sgt);
- if (contig_size < size) {
- pr_err("contiguous mapping is too small %lu/%lu\n",
- contig_size, size);
- ret = -EFAULT;
- goto fail_map_sg;
- }
-
- buf->dma_addr = sg_dma_address(sgt->sgl);
- buf->size = size;
- buf->dma_sgt = sgt;
-
- return buf;
-
-fail_map_sg:
- dma_unmap_sg(buf->dev, sgt->sgl, sgt->orig_nents, buf->dma_dir);
-
-fail_sgt_init:
- if (!vma_is_io(buf->vma))
- vb2_dc_sgt_foreach_page(sgt, put_page);
- sg_free_table(sgt);
-
-fail_sgt:
- kfree(sgt);
-
-fail_get_user_pages:
- if (pages && !vma_is_io(buf->vma))
- while (n_pages)
- put_page(pages[--n_pages]);
-
-fail_vma:
- vb2_put_vma(buf->vma);
-
-fail_pages:
- kfree(pages); /* kfree is NULL-proof */
-
-fail_buf:
- kfree(buf);
-
- return ERR_PTR(ret);
-}
-
-/*********************************************/
-/* callbacks for DMABUF buffers */
-/*********************************************/
-
-static int vb2_dc_map_dmabuf(void *mem_priv)
-{
- struct vb2_dc_buf *buf = mem_priv;
- struct sg_table *sgt;
- unsigned long contig_size;
-
- if (WARN_ON(!buf->db_attach)) {
- pr_err("trying to pin a non attached buffer\n");
- return -EINVAL;
- }
-
- if (WARN_ON(buf->dma_sgt)) {
- pr_err("dmabuf buffer is already pinned\n");
- return 0;
- }
-
- /* get the associated scatterlist for this buffer */
- sgt = dma_buf_map_attachment(buf->db_attach, buf->dma_dir);
- if (IS_ERR_OR_NULL(sgt)) {
- pr_err("Error getting dmabuf scatterlist\n");
- return -EINVAL;
- }
-
- /* checking if dmabuf is big enough to store contiguous chunk */
- contig_size = vb2_dc_get_contiguous_size(sgt);
- if (contig_size < buf->size) {
- pr_err("contiguous chunk is too small %lu/%lu b\n",
- contig_size, buf->size);
- dma_buf_unmap_attachment(buf->db_attach, sgt, buf->dma_dir);
- return -EFAULT;
- }
-
- buf->dma_addr = sg_dma_address(sgt->sgl);
- buf->dma_sgt = sgt;
-
- return 0;
-}
-
-static void vb2_dc_unmap_dmabuf(void *mem_priv)
-{
- struct vb2_dc_buf *buf = mem_priv;
- struct sg_table *sgt = buf->dma_sgt;
-
- if (WARN_ON(!buf->db_attach)) {
- pr_err("trying to unpin a not attached buffer\n");
- return;
- }
-
- if (WARN_ON(!sgt)) {
- pr_err("dmabuf buffer is already unpinned\n");
- return;
- }
-
- dma_buf_unmap_attachment(buf->db_attach, sgt, buf->dma_dir);
-
- buf->dma_addr = 0;
- buf->dma_sgt = NULL;
-}
-
-static void vb2_dc_detach_dmabuf(void *mem_priv)
-{
- struct vb2_dc_buf *buf = mem_priv;
-
- /* if vb2 works correctly you should never detach mapped buffer */
- if (WARN_ON(buf->dma_addr))
- vb2_dc_unmap_dmabuf(buf);
-
- /* detach this attachment */
- dma_buf_detach(buf->db_attach->dmabuf, buf->db_attach);
- kfree(buf);
-}
-
-static void *vb2_dc_attach_dmabuf(void *alloc_ctx, struct dma_buf *dbuf,
- unsigned long size, int write)
-{
- struct vb2_dc_conf *conf = alloc_ctx;
- struct vb2_dc_buf *buf;
- struct dma_buf_attachment *dba;
-
- if (dbuf->size < size)
- return ERR_PTR(-EFAULT);
-
- buf = kzalloc(sizeof(*buf), GFP_KERNEL);
- if (!buf)
- return ERR_PTR(-ENOMEM);
-
- buf->dev = conf->dev;
- /* create attachment for the dmabuf with the user device */
- dba = dma_buf_attach(dbuf, buf->dev);
- if (IS_ERR(dba)) {
- pr_err("failed to attach dmabuf\n");
- kfree(buf);
- return dba;
- }
-
- buf->dma_dir = write ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
- buf->size = size;
- buf->db_attach = dba;
-
- return buf;
-}
-
-/*********************************************/
-/* DMA CONTIG exported functions */
-/*********************************************/
-
-const struct vb2_mem_ops vb2_dma_contig_memops = {
- .alloc = vb2_dc_alloc,
- .put = vb2_dc_put,
- .get_dmabuf = vb2_dc_get_dmabuf,
- .cookie = vb2_dc_cookie,
- .vaddr = vb2_dc_vaddr,
- .mmap = vb2_dc_mmap,
- .get_userptr = vb2_dc_get_userptr,
- .put_userptr = vb2_dc_put_userptr,
- .prepare = vb2_dc_prepare,
- .finish = vb2_dc_finish,
- .map_dmabuf = vb2_dc_map_dmabuf,
- .unmap_dmabuf = vb2_dc_unmap_dmabuf,
- .attach_dmabuf = vb2_dc_attach_dmabuf,
- .detach_dmabuf = vb2_dc_detach_dmabuf,
- .num_users = vb2_dc_num_users,
-};
-EXPORT_SYMBOL_GPL(vb2_dma_contig_memops);
-
-void *vb2_dma_contig_init_ctx(struct device *dev)
-{
- struct vb2_dc_conf *conf;
-
- conf = kzalloc(sizeof *conf, GFP_KERNEL);
- if (!conf)
- return ERR_PTR(-ENOMEM);
-
- conf->dev = dev;
-
- return conf;
-}
-EXPORT_SYMBOL_GPL(vb2_dma_contig_init_ctx);
-
-void vb2_dma_contig_cleanup_ctx(void *alloc_ctx)
-{
- kfree(alloc_ctx);
-}
-EXPORT_SYMBOL_GPL(vb2_dma_contig_cleanup_ctx);
-
-MODULE_DESCRIPTION("DMA-contig memory handling routines for videobuf2");
-MODULE_AUTHOR("Pawel Osciak <pawel@osciak.com>");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/v4l2-core/videobuf2-dma-sg.c b/drivers/media/v4l2-core/videobuf2-dma-sg.c
deleted file mode 100644
index 25c3b360..00000000
--- a/drivers/media/v4l2-core/videobuf2-dma-sg.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
- * videobuf2-dma-sg.c - dma scatter/gather memory allocator for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/scatterlist.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-
-#include <media/videobuf2-core.h>
-#include <media/videobuf2-memops.h>
-#include <media/videobuf2-dma-sg.h>
-
-struct vb2_dma_sg_buf {
- void *vaddr;
- struct page **pages;
- int write;
- int offset;
- struct vb2_dma_sg_desc sg_desc;
- atomic_t refcount;
- struct vb2_vmarea_handler handler;
-};
-
-static void vb2_dma_sg_put(void *buf_priv);
-
-static void *vb2_dma_sg_alloc(void *alloc_ctx, unsigned long size)
-{
- struct vb2_dma_sg_buf *buf;
- int i;
-
- buf = kzalloc(sizeof *buf, GFP_KERNEL);
- if (!buf)
- return NULL;
-
- buf->vaddr = NULL;
- buf->write = 0;
- buf->offset = 0;
- buf->sg_desc.size = size;
- buf->sg_desc.num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
-
- buf->sg_desc.sglist = vzalloc(buf->sg_desc.num_pages *
- sizeof(*buf->sg_desc.sglist));
- if (!buf->sg_desc.sglist)
- goto fail_sglist_alloc;
- sg_init_table(buf->sg_desc.sglist, buf->sg_desc.num_pages);
-
- buf->pages = kzalloc(buf->sg_desc.num_pages * sizeof(struct page *),
- GFP_KERNEL);
- if (!buf->pages)
- goto fail_pages_array_alloc;
-
- for (i = 0; i < buf->sg_desc.num_pages; ++i) {
- buf->pages[i] = alloc_page(GFP_KERNEL | __GFP_ZERO | __GFP_NOWARN);
- if (NULL == buf->pages[i])
- goto fail_pages_alloc;
- sg_set_page(&buf->sg_desc.sglist[i],
- buf->pages[i], PAGE_SIZE, 0);
- }
-
- buf->handler.refcount = &buf->refcount;
- buf->handler.put = vb2_dma_sg_put;
- buf->handler.arg = buf;
-
- atomic_inc(&buf->refcount);
-
- printk(KERN_DEBUG "%s: Allocated buffer of %d pages\n",
- __func__, buf->sg_desc.num_pages);
- return buf;
-
-fail_pages_alloc:
- while (--i >= 0)
- __free_page(buf->pages[i]);
- kfree(buf->pages);
-
-fail_pages_array_alloc:
- vfree(buf->sg_desc.sglist);
-
-fail_sglist_alloc:
- kfree(buf);
- return NULL;
-}
-
-static void vb2_dma_sg_put(void *buf_priv)
-{
- struct vb2_dma_sg_buf *buf = buf_priv;
- int i = buf->sg_desc.num_pages;
-
- if (atomic_dec_and_test(&buf->refcount)) {
- printk(KERN_DEBUG "%s: Freeing buffer of %d pages\n", __func__,
- buf->sg_desc.num_pages);
- if (buf->vaddr)
- vm_unmap_ram(buf->vaddr, buf->sg_desc.num_pages);
- vfree(buf->sg_desc.sglist);
- while (--i >= 0)
- __free_page(buf->pages[i]);
- kfree(buf->pages);
- kfree(buf);
- }
-}
-
-static void *vb2_dma_sg_get_userptr(void *alloc_ctx, unsigned long vaddr,
- unsigned long size, int write)
-{
- struct vb2_dma_sg_buf *buf;
- unsigned long first, last;
- int num_pages_from_user, i;
-
- buf = kzalloc(sizeof *buf, GFP_KERNEL);
- if (!buf)
- return NULL;
-
- buf->vaddr = NULL;
- buf->write = write;
- buf->offset = vaddr & ~PAGE_MASK;
- buf->sg_desc.size = size;
-
- first = (vaddr & PAGE_MASK) >> PAGE_SHIFT;
- last = ((vaddr + size - 1) & PAGE_MASK) >> PAGE_SHIFT;
- buf->sg_desc.num_pages = last - first + 1;
-
- buf->sg_desc.sglist = vzalloc(
- buf->sg_desc.num_pages * sizeof(*buf->sg_desc.sglist));
- if (!buf->sg_desc.sglist)
- goto userptr_fail_sglist_alloc;
-
- sg_init_table(buf->sg_desc.sglist, buf->sg_desc.num_pages);
-
- buf->pages = kzalloc(buf->sg_desc.num_pages * sizeof(struct page *),
- GFP_KERNEL);
- if (!buf->pages)
- goto userptr_fail_pages_array_alloc;
-
- num_pages_from_user = get_user_pages(current, current->mm,
- vaddr & PAGE_MASK,
- buf->sg_desc.num_pages,
- write,
- 1, /* force */
- buf->pages,
- NULL);
-
- if (num_pages_from_user != buf->sg_desc.num_pages)
- goto userptr_fail_get_user_pages;
-
- sg_set_page(&buf->sg_desc.sglist[0], buf->pages[0],
- PAGE_SIZE - buf->offset, buf->offset);
- size -= PAGE_SIZE - buf->offset;
- for (i = 1; i < buf->sg_desc.num_pages; ++i) {
- sg_set_page(&buf->sg_desc.sglist[i], buf->pages[i],
- min_t(size_t, PAGE_SIZE, size), 0);
- size -= min_t(size_t, PAGE_SIZE, size);
- }
- return buf;
-
-userptr_fail_get_user_pages:
- printk(KERN_DEBUG "get_user_pages requested/got: %d/%d]\n",
- num_pages_from_user, buf->sg_desc.num_pages);
- while (--num_pages_from_user >= 0)
- put_page(buf->pages[num_pages_from_user]);
- kfree(buf->pages);
-
-userptr_fail_pages_array_alloc:
- vfree(buf->sg_desc.sglist);
-
-userptr_fail_sglist_alloc:
- kfree(buf);
- return NULL;
-}
-
-/*
- * @put_userptr: inform the allocator that a USERPTR buffer will no longer
- * be used
- */
-static void vb2_dma_sg_put_userptr(void *buf_priv)
-{
- struct vb2_dma_sg_buf *buf = buf_priv;
- int i = buf->sg_desc.num_pages;
-
- printk(KERN_DEBUG "%s: Releasing userspace buffer of %d pages\n",
- __func__, buf->sg_desc.num_pages);
- if (buf->vaddr)
- vm_unmap_ram(buf->vaddr, buf->sg_desc.num_pages);
- while (--i >= 0) {
- if (buf->write)
- set_page_dirty_lock(buf->pages[i]);
- put_page(buf->pages[i]);
- }
- vfree(buf->sg_desc.sglist);
- kfree(buf->pages);
- kfree(buf);
-}
-
-static void *vb2_dma_sg_vaddr(void *buf_priv)
-{
- struct vb2_dma_sg_buf *buf = buf_priv;
-
- BUG_ON(!buf);
-
- if (!buf->vaddr)
- buf->vaddr = vm_map_ram(buf->pages,
- buf->sg_desc.num_pages,
- -1,
- PAGE_KERNEL);
-
- /* add offset in case userptr is not page-aligned */
- return buf->vaddr + buf->offset;
-}
-
-static unsigned int vb2_dma_sg_num_users(void *buf_priv)
-{
- struct vb2_dma_sg_buf *buf = buf_priv;
-
- return atomic_read(&buf->refcount);
-}
-
-static int vb2_dma_sg_mmap(void *buf_priv, struct vm_area_struct *vma)
-{
- struct vb2_dma_sg_buf *buf = buf_priv;
- unsigned long uaddr = vma->vm_start;
- unsigned long usize = vma->vm_end - vma->vm_start;
- int i = 0;
-
- if (!buf) {
- printk(KERN_ERR "No memory to map\n");
- return -EINVAL;
- }
-
- do {
- int ret;
-
- ret = vm_insert_page(vma, uaddr, buf->pages[i++]);
- if (ret) {
- printk(KERN_ERR "Remapping memory, error: %d\n", ret);
- return ret;
- }
-
- uaddr += PAGE_SIZE;
- usize -= PAGE_SIZE;
- } while (usize > 0);
-
-
- /*
- * Use common vm_area operations to track buffer refcount.
- */
- vma->vm_private_data = &buf->handler;
- vma->vm_ops = &vb2_common_vm_ops;
-
- vma->vm_ops->open(vma);
-
- return 0;
-}
-
-static void *vb2_dma_sg_cookie(void *buf_priv)
-{
- struct vb2_dma_sg_buf *buf = buf_priv;
-
- return &buf->sg_desc;
-}
-
-const struct vb2_mem_ops vb2_dma_sg_memops = {
- .alloc = vb2_dma_sg_alloc,
- .put = vb2_dma_sg_put,
- .get_userptr = vb2_dma_sg_get_userptr,
- .put_userptr = vb2_dma_sg_put_userptr,
- .vaddr = vb2_dma_sg_vaddr,
- .mmap = vb2_dma_sg_mmap,
- .num_users = vb2_dma_sg_num_users,
- .cookie = vb2_dma_sg_cookie,
-};
-EXPORT_SYMBOL_GPL(vb2_dma_sg_memops);
-
-MODULE_DESCRIPTION("dma scatter/gather memory handling routines for videobuf2");
-MODULE_AUTHOR("Andrzej Pietrasiewicz");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/v4l2-core/videobuf2-memops.c b/drivers/media/v4l2-core/videobuf2-memops.c
deleted file mode 100644
index 81c1ad8b..00000000
--- a/drivers/media/v4l2-core/videobuf2-memops.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * videobuf2-memops.c - generic memory handling routines for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- * Marek Szyprowski <m.szyprowski@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/dma-mapping.h>
-#include <linux/vmalloc.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/file.h>
-
-#include <media/videobuf2-core.h>
-#include <media/videobuf2-memops.h>
-
-/**
- * vb2_get_vma() - acquire and lock the virtual memory area
- * @vma: given virtual memory area
- *
- * This function attempts to acquire an area mapped in the userspace for
- * the duration of a hardware operation. The area is "locked" by performing
- * the same set of operation that are done when process calls fork() and
- * memory areas are duplicated.
- *
- * Returns a copy of a virtual memory region on success or NULL.
- */
-struct vm_area_struct *vb2_get_vma(struct vm_area_struct *vma)
-{
- struct vm_area_struct *vma_copy;
-
- vma_copy = kmalloc(sizeof(*vma_copy), GFP_KERNEL);
- if (vma_copy == NULL)
- return NULL;
-
- if (vma->vm_ops && vma->vm_ops->open)
- vma->vm_ops->open(vma);
-
- if (vma->vm_file)
- get_file(vma->vm_file);
-
- memcpy(vma_copy, vma, sizeof(*vma));
-
- vma_copy->vm_mm = NULL;
- vma_copy->vm_next = NULL;
- vma_copy->vm_prev = NULL;
-
- return vma_copy;
-}
-EXPORT_SYMBOL_GPL(vb2_get_vma);
-
-/**
- * vb2_put_userptr() - release a userspace virtual memory area
- * @vma: virtual memory region associated with the area to be released
- *
- * This function releases the previously acquired memory area after a hardware
- * operation.
- */
-void vb2_put_vma(struct vm_area_struct *vma)
-{
- if (!vma)
- return;
-
- if (vma->vm_ops && vma->vm_ops->close)
- vma->vm_ops->close(vma);
-
- if (vma->vm_file)
- fput(vma->vm_file);
-
- kfree(vma);
-}
-EXPORT_SYMBOL_GPL(vb2_put_vma);
-
-/**
- * vb2_get_contig_userptr() - lock physically contiguous userspace mapped memory
- * @vaddr: starting virtual address of the area to be verified
- * @size: size of the area
- * @res_paddr: will return physical address for the given vaddr
- * @res_vma: will return locked copy of struct vm_area for the given area
- *
- * This function will go through memory area of size @size mapped at @vaddr and
- * verify that the underlying physical pages are contiguous. If they are
- * contiguous the virtual memory area is locked and a @res_vma is filled with
- * the copy and @res_pa set to the physical address of the buffer.
- *
- * Returns 0 on success.
- */
-int vb2_get_contig_userptr(unsigned long vaddr, unsigned long size,
- struct vm_area_struct **res_vma, dma_addr_t *res_pa)
-{
- struct mm_struct *mm = current->mm;
- struct vm_area_struct *vma;
- unsigned long offset, start, end;
- unsigned long this_pfn, prev_pfn;
- dma_addr_t pa = 0;
-
- start = vaddr;
- offset = start & ~PAGE_MASK;
- end = start + size;
-
- vma = find_vma(mm, start);
-
- if (vma == NULL || vma->vm_end < end)
- return -EFAULT;
-
- for (prev_pfn = 0; start < end; start += PAGE_SIZE) {
- int ret = follow_pfn(vma, start, &this_pfn);
- if (ret)
- return ret;
-
- if (prev_pfn == 0)
- pa = this_pfn << PAGE_SHIFT;
- else if (this_pfn != prev_pfn + 1)
- return -EFAULT;
-
- prev_pfn = this_pfn;
- }
-
- /*
- * Memory is contigous, lock vma and return to the caller
- */
- *res_vma = vb2_get_vma(vma);
- if (*res_vma == NULL)
- return -ENOMEM;
-
- *res_pa = pa + offset;
- return 0;
-}
-EXPORT_SYMBOL_GPL(vb2_get_contig_userptr);
-
-/**
- * vb2_common_vm_open() - increase refcount of the vma
- * @vma: virtual memory region for the mapping
- *
- * This function adds another user to the provided vma. It expects
- * struct vb2_vmarea_handler pointer in vma->vm_private_data.
- */
-static void vb2_common_vm_open(struct vm_area_struct *vma)
-{
- struct vb2_vmarea_handler *h = vma->vm_private_data;
-
- pr_debug("%s: %p, refcount: %d, vma: %08lx-%08lx\n",
- __func__, h, atomic_read(h->refcount), vma->vm_start,
- vma->vm_end);
-
- atomic_inc(h->refcount);
-}
-
-/**
- * vb2_common_vm_close() - decrease refcount of the vma
- * @vma: virtual memory region for the mapping
- *
- * This function releases the user from the provided vma. It expects
- * struct vb2_vmarea_handler pointer in vma->vm_private_data.
- */
-static void vb2_common_vm_close(struct vm_area_struct *vma)
-{
- struct vb2_vmarea_handler *h = vma->vm_private_data;
-
- pr_debug("%s: %p, refcount: %d, vma: %08lx-%08lx\n",
- __func__, h, atomic_read(h->refcount), vma->vm_start,
- vma->vm_end);
-
- h->put(h->arg);
-}
-
-/**
- * vb2_common_vm_ops - common vm_ops used for tracking refcount of mmaped
- * video buffers
- */
-const struct vm_operations_struct vb2_common_vm_ops = {
- .open = vb2_common_vm_open,
- .close = vb2_common_vm_close,
-};
-EXPORT_SYMBOL_GPL(vb2_common_vm_ops);
-
-MODULE_DESCRIPTION("common memory handling routines for videobuf2");
-MODULE_AUTHOR("Pawel Osciak <pawel@osciak.com>");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/v4l2-core/videobuf2-vmalloc.c b/drivers/media/v4l2-core/videobuf2-vmalloc.c
deleted file mode 100644
index a47fd4f5..00000000
--- a/drivers/media/v4l2-core/videobuf2-vmalloc.c
+++ /dev/null
@@ -1,279 +0,0 @@
-/*
- * videobuf2-vmalloc.c - vmalloc memory allocator for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-
-#include <media/videobuf2-core.h>
-#include <media/videobuf2-vmalloc.h>
-#include <media/videobuf2-memops.h>
-
-struct vb2_vmalloc_buf {
- void *vaddr;
- struct page **pages;
- struct vm_area_struct *vma;
- int write;
- unsigned long size;
- unsigned int n_pages;
- atomic_t refcount;
- struct vb2_vmarea_handler handler;
- struct dma_buf *dbuf;
-};
-
-static void vb2_vmalloc_put(void *buf_priv);
-
-static void *vb2_vmalloc_alloc(void *alloc_ctx, unsigned long size)
-{
- struct vb2_vmalloc_buf *buf;
-
- buf = kzalloc(sizeof(*buf), GFP_KERNEL);
- if (!buf)
- return NULL;
-
- buf->size = size;
- buf->vaddr = vmalloc_user(buf->size);
- buf->handler.refcount = &buf->refcount;
- buf->handler.put = vb2_vmalloc_put;
- buf->handler.arg = buf;
-
- if (!buf->vaddr) {
- pr_debug("vmalloc of size %ld failed\n", buf->size);
- kfree(buf);
- return NULL;
- }
-
- atomic_inc(&buf->refcount);
- return buf;
-}
-
-static void vb2_vmalloc_put(void *buf_priv)
-{
- struct vb2_vmalloc_buf *buf = buf_priv;
-
- if (atomic_dec_and_test(&buf->refcount)) {
- vfree(buf->vaddr);
- kfree(buf);
- }
-}
-
-static void *vb2_vmalloc_get_userptr(void *alloc_ctx, unsigned long vaddr,
- unsigned long size, int write)
-{
- struct vb2_vmalloc_buf *buf;
- unsigned long first, last;
- int n_pages, offset;
- struct vm_area_struct *vma;
- dma_addr_t physp;
-
- buf = kzalloc(sizeof(*buf), GFP_KERNEL);
- if (!buf)
- return NULL;
-
- buf->write = write;
- offset = vaddr & ~PAGE_MASK;
- buf->size = size;
-
-
- vma = find_vma(current->mm, vaddr);
- if (vma && (vma->vm_flags & VM_PFNMAP) && (vma->vm_pgoff)) {
- if (vb2_get_contig_userptr(vaddr, size, &vma, &physp))
- goto fail_pages_array_alloc;
- buf->vma = vma;
- buf->vaddr = ioremap_nocache(physp, size);
- if (!buf->vaddr)
- goto fail_pages_array_alloc;
- } else {
- first = vaddr >> PAGE_SHIFT;
- last = (vaddr + size - 1) >> PAGE_SHIFT;
- buf->n_pages = last - first + 1;
- buf->pages = kzalloc(buf->n_pages * sizeof(struct page *),
- GFP_KERNEL);
- if (!buf->pages)
- goto fail_pages_array_alloc;
-
- /* current->mm->mmap_sem is taken by videobuf2 core */
- n_pages = get_user_pages(current, current->mm,
- vaddr & PAGE_MASK, buf->n_pages,
- write, 1, /* force */
- buf->pages, NULL);
- if (n_pages != buf->n_pages)
- goto fail_get_user_pages;
-
- buf->vaddr = vm_map_ram(buf->pages, buf->n_pages, -1,
- PAGE_KERNEL);
- if (!buf->vaddr)
- goto fail_get_user_pages;
- }
-
- buf->vaddr += offset;
- return buf;
-
-fail_get_user_pages:
- pr_debug("get_user_pages requested/got: %d/%d]\n", n_pages,
- buf->n_pages);
- while (--n_pages >= 0)
- put_page(buf->pages[n_pages]);
- kfree(buf->pages);
-
-fail_pages_array_alloc:
- kfree(buf);
-
- return NULL;
-}
-
-static void vb2_vmalloc_put_userptr(void *buf_priv)
-{
- struct vb2_vmalloc_buf *buf = buf_priv;
- unsigned long vaddr = (unsigned long)buf->vaddr & PAGE_MASK;
- unsigned int i;
-
- if (buf->pages) {
- if (vaddr)
- vm_unmap_ram((void *)vaddr, buf->n_pages);
- for (i = 0; i < buf->n_pages; ++i) {
- if (buf->write)
- set_page_dirty_lock(buf->pages[i]);
- put_page(buf->pages[i]);
- }
- kfree(buf->pages);
- } else {
- if (buf->vma)
- vb2_put_vma(buf->vma);
- iounmap(buf->vaddr);
- }
- kfree(buf);
-}
-
-static void *vb2_vmalloc_vaddr(void *buf_priv)
-{
- struct vb2_vmalloc_buf *buf = buf_priv;
-
- if (!buf->vaddr) {
- pr_err("Address of an unallocated plane requested "
- "or cannot map user pointer\n");
- return NULL;
- }
-
- return buf->vaddr;
-}
-
-static unsigned int vb2_vmalloc_num_users(void *buf_priv)
-{
- struct vb2_vmalloc_buf *buf = buf_priv;
- return atomic_read(&buf->refcount);
-}
-
-static int vb2_vmalloc_mmap(void *buf_priv, struct vm_area_struct *vma)
-{
- struct vb2_vmalloc_buf *buf = buf_priv;
- int ret;
-
- if (!buf) {
- pr_err("No memory to map\n");
- return -EINVAL;
- }
-
- ret = remap_vmalloc_range(vma, buf->vaddr, 0);
- if (ret) {
- pr_err("Remapping vmalloc memory, error: %d\n", ret);
- return ret;
- }
-
- /*
- * Make sure that vm_areas for 2 buffers won't be merged together
- */
- vma->vm_flags |= VM_DONTEXPAND;
-
- /*
- * Use common vm_area operations to track buffer refcount.
- */
- vma->vm_private_data = &buf->handler;
- vma->vm_ops = &vb2_common_vm_ops;
-
- vma->vm_ops->open(vma);
-
- return 0;
-}
-
-/*********************************************/
-/* callbacks for DMABUF buffers */
-/*********************************************/
-
-static int vb2_vmalloc_map_dmabuf(void *mem_priv)
-{
- struct vb2_vmalloc_buf *buf = mem_priv;
-
- buf->vaddr = dma_buf_vmap(buf->dbuf);
-
- return buf->vaddr ? 0 : -EFAULT;
-}
-
-static void vb2_vmalloc_unmap_dmabuf(void *mem_priv)
-{
- struct vb2_vmalloc_buf *buf = mem_priv;
-
- dma_buf_vunmap(buf->dbuf, buf->vaddr);
- buf->vaddr = NULL;
-}
-
-static void vb2_vmalloc_detach_dmabuf(void *mem_priv)
-{
- struct vb2_vmalloc_buf *buf = mem_priv;
-
- if (buf->vaddr)
- dma_buf_vunmap(buf->dbuf, buf->vaddr);
-
- kfree(buf);
-}
-
-static void *vb2_vmalloc_attach_dmabuf(void *alloc_ctx, struct dma_buf *dbuf,
- unsigned long size, int write)
-{
- struct vb2_vmalloc_buf *buf;
-
- if (dbuf->size < size)
- return ERR_PTR(-EFAULT);
-
- buf = kzalloc(sizeof(*buf), GFP_KERNEL);
- if (!buf)
- return ERR_PTR(-ENOMEM);
-
- buf->dbuf = dbuf;
- buf->write = write;
- buf->size = size;
-
- return buf;
-}
-
-
-const struct vb2_mem_ops vb2_vmalloc_memops = {
- .alloc = vb2_vmalloc_alloc,
- .put = vb2_vmalloc_put,
- .get_userptr = vb2_vmalloc_get_userptr,
- .put_userptr = vb2_vmalloc_put_userptr,
- .map_dmabuf = vb2_vmalloc_map_dmabuf,
- .unmap_dmabuf = vb2_vmalloc_unmap_dmabuf,
- .attach_dmabuf = vb2_vmalloc_attach_dmabuf,
- .detach_dmabuf = vb2_vmalloc_detach_dmabuf,
- .vaddr = vb2_vmalloc_vaddr,
- .mmap = vb2_vmalloc_mmap,
- .num_users = vb2_vmalloc_num_users,
-};
-EXPORT_SYMBOL_GPL(vb2_vmalloc_memops);
-
-MODULE_DESCRIPTION("vmalloc memory handling routines for videobuf2");
-MODULE_AUTHOR("Pawel Osciak <pawel@osciak.com>");
-MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/davinci_voicecodec.c b/drivers/mfd/davinci_voicecodec.c
index c0bcc872..035c6af8 100644
--- a/drivers/mfd/davinci_voicecodec.c
+++ b/drivers/mfd/davinci_voicecodec.c
@@ -29,7 +29,7 @@
#include <linux/clk.h>
#include <sound/pcm.h>
-
+#include <mach/hardware.h>
#include <linux/mfd/davinci_voicecodec.h>
u32 davinci_vc_read(struct davinci_vc *davinci_vc, int reg)
diff --git a/drivers/misc/vmw_vmci/Kconfig b/drivers/misc/vmw_vmci/Kconfig
index ea98f7e9..39c2ecad 100644
--- a/drivers/misc/vmw_vmci/Kconfig
+++ b/drivers/misc/vmw_vmci/Kconfig
@@ -4,7 +4,7 @@
config VMWARE_VMCI
tristate "VMware VMCI Driver"
- depends on X86 && PCI && NET
+ depends on X86 && PCI
help
This is VMware's Virtual Machine Communication Interface. It enables
high-speed communication between host and guest in a virtual
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index d88219e1..82907fb2 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -379,6 +379,14 @@ config MMC_GOLDFISH
This selects the Goldfish Multimedia card Interface emulation
found on the Goldfish Android virtual device emulation.
+config MMC_DONT_POLL_FOR_REMOVAL
+ bool "Don't Poll for SD card removals"
+ depends on MMC_DAVINCI
+ help
+ This turns off the periodic poll for the SD card removal.
+ Only enable this if it is impossible to remove the SD
+ card at runtime. If unsure, say N.
+
config MMC_SPI
tristate "MMC/SD/SDIO over SPI"
depends on SPI_MASTER && !HIGHMEM && HAS_DMA
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 20636772..07c2d4e9 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -34,7 +34,10 @@
#include <linux/dma-mapping.h>
#include <linux/edma.h>
#include <linux/mmc/mmc.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/mmc-davinci.h>
/*
@@ -522,14 +525,16 @@ static int __init davinci_acquire_dma_channels(struct mmc_davinci_host *host)
dma_cap_set(DMA_SLAVE, mask);
host->dma_tx =
- dma_request_channel(mask, edma_filter_fn, &host->txdma);
+ dma_request_slave_channel_compat(mask, edma_filter_fn,
+ &host->txdma, mmc_dev(host->mmc), "tx");
if (!host->dma_tx) {
dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n");
return -ENODEV;
}
host->dma_rx =
- dma_request_channel(mask, edma_filter_fn, &host->rxdma);
+ dma_request_slave_channel_compat(mask, edma_filter_fn,
+ &host->rxdma, mmc_dev(host->mmc), "rx");
if (!host->dma_rx) {
dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n");
r = -ENODEV;
@@ -1157,16 +1162,86 @@ static void __init init_mmcsd_host(struct mmc_davinci_host *host)
mmc_davinci_reset_ctrl(host, 0);
}
-static int __init davinci_mmcsd_probe(struct platform_device *pdev)
+static struct platform_device_id davinci_mmc_devtype[] = {
+ {
+ .name = "dm6441-mmc",
+ .driver_data = MMC_CTLR_VERSION_1,
+ }, {
+ .name = "dm365-mmc",
+ .driver_data = MMC_CTLR_VERSION_2,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(platform, davinci_mmc_devtype);
+
+static const struct of_device_id davinci_mmc_dt_ids[] = {
+ {
+ .compatible = "ti,dm6441-mmc",
+ .data = &davinci_mmc_devtype[MMC_CTLR_VERSION_1],
+ },
+ {
+ .compatible = "ti,dm365-mmc",
+ .data = &davinci_mmc_devtype[MMC_CTLR_VERSION_2],
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, davinci_mmc_dt_ids);
+
+static struct davinci_mmc_config
+ *mmc_parse_pdata(struct platform_device *pdev)
{
+ struct device_node *np;
struct davinci_mmc_config *pdata = pdev->dev.platform_data;
+ const struct of_device_id *match =
+ of_match_device(of_match_ptr(davinci_mmc_dt_ids), &pdev->dev);
+ u32 data;
+
+ np = pdev->dev.of_node;
+ if (!np)
+ return pdata;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ dev_err(&pdev->dev, "Failed to allocate memory for struct davinci_mmc_config\n");
+ goto nodata;
+ }
+
+ if (match)
+ pdev->id_entry = match->data;
+
+ if (of_property_read_u32(np, "max-frequency", &pdata->max_freq))
+ dev_info(&pdev->dev, "'max-frequency' property not specified, defaulting to 25MHz\n");
+
+ of_property_read_u32(np, "bus-width", &data);
+ switch (data) {
+ case 1:
+ case 4:
+ case 8:
+ pdata->wires = data;
+ break;
+ default:
+ pdata->wires = 1;
+ dev_info(&pdev->dev, "Unsupported buswidth, defaulting to 1 bit\n");
+ }
+nodata:
+ return pdata;
+}
+
+static int __init davinci_mmcsd_probe(struct platform_device *pdev)
+{
+ struct davinci_mmc_config *pdata = NULL;
struct mmc_davinci_host *host = NULL;
struct mmc_host *mmc = NULL;
struct resource *r, *mem = NULL;
int ret = 0, irq = 0;
size_t mem_size;
+ const struct platform_device_id *id_entry;
- /* REVISIT: when we're fully converted, fail if pdata is NULL */
+ pdata = mmc_parse_pdata(pdev);
+ if (pdata == NULL) {
+ dev_err(&pdev->dev, "Couldn't get platform data\n");
+ return -ENOENT;
+ }
ret = -ENODEV;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1190,13 +1265,15 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev)
r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
if (!r)
- goto out;
- host->rxdma = r->start;
+ dev_warn(&pdev->dev, "RX DMA resource not specified\n");
+ else
+ host->rxdma = r->start;
r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
if (!r)
- goto out;
- host->txdma = r->start;
+ dev_warn(&pdev->dev, "TX DMA resource not specified\n");
+ else
+ host->txdma = r->start;
host->mem_res = mem;
host->base = ioremap(mem->start, mem_size);
@@ -1227,17 +1304,25 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev)
if (host->use_dma && davinci_acquire_dma_channels(host) != 0)
host->use_dma = 0;
+
+#ifndef CONFIG_MMC_DONT_POLL_FOR_REMOVAL
+
/* REVISIT: someday, support IRQ-driven card detection. */
+
mmc->caps |= MMC_CAP_NEEDS_POLL;
mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
+#endif
+
if (pdata && (pdata->wires == 4 || pdata->wires == 0))
mmc->caps |= MMC_CAP_4_BIT_DATA;
if (pdata && (pdata->wires == 8))
mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA);
- host->version = pdata->version;
+ id_entry = platform_get_device_id(pdev);
+ if (id_entry)
+ host->version = id_entry->driver_data;
mmc->ops = &mmc_davinci_ops;
mmc->f_min = 312500;
@@ -1406,8 +1491,10 @@ static struct platform_driver davinci_mmcsd_driver = {
.name = "davinci_mmc",
.owner = THIS_MODULE,
.pm = davinci_mmcsd_pm_ops,
+ .of_match_table = of_match_ptr(davinci_mmc_dt_ids),
},
.remove = __exit_p(davinci_mmcsd_remove),
+ .id_table = davinci_mmc_devtype,
};
static int __init davinci_mmcsd_init(void)
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c
index dc571ebc..92ab30ab 100644
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@@ -1123,6 +1123,33 @@ static unsigned long mtdchar_get_unmapped_area(struct file *file,
}
#endif
+static inline unsigned long get_vm_size(struct vm_area_struct *vma)
+{
+ return vma->vm_end - vma->vm_start;
+}
+
+static inline resource_size_t get_vm_offset(struct vm_area_struct *vma)
+{
+ return (resource_size_t) vma->vm_pgoff << PAGE_SHIFT;
+}
+
+/*
+ * Set a new vm offset.
+ *
+ * Verify that the incoming offset really works as a page offset,
+ * and that the offset and size fit in a resource_size_t.
+ */
+static inline int set_vm_offset(struct vm_area_struct *vma, resource_size_t off)
+{
+ pgoff_t pgoff = off >> PAGE_SHIFT;
+ if (off != (resource_size_t) pgoff << PAGE_SHIFT)
+ return -EINVAL;
+ if (off + get_vm_size(vma) - 1 < off)
+ return -EINVAL;
+ vma->vm_pgoff = pgoff;
+ return 0;
+}
+
/*
* set up a mapping for shared memory segments
*/
@@ -1132,17 +1159,45 @@ static int mtdchar_mmap(struct file *file, struct vm_area_struct *vma)
struct mtd_file_info *mfi = file->private_data;
struct mtd_info *mtd = mfi->mtd;
struct map_info *map = mtd->priv;
+ resource_size_t start, off;
+ unsigned long len, vma_len;
/* This is broken because it assumes the MTD device is map-based
and that mtd->priv is a valid struct map_info. It should be
replaced with something that uses the mtd_get_unmapped_area()
operation properly. */
if (0 /*mtd->type == MTD_RAM || mtd->type == MTD_ROM*/) {
+ off = get_vm_offset(vma);
+ start = map->phys;
+ len = PAGE_ALIGN((start & ~PAGE_MASK) + map->size);
+ start &= PAGE_MASK;
+ vma_len = get_vm_size(vma);
+
+ /* Overflow in off+len? */
+ if (vma_len + off < off)
+ return -EINVAL;
+ /* Does it fit in the mapping? */
+ if (vma_len + off > len)
+ return -EINVAL;
+
+ off += start;
+ /* Did that overflow? */
+ if (off < start)
+ return -EINVAL;
+ if (set_vm_offset(vma, off) < 0)
+ return -EINVAL;
+ vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP;
+
#ifdef pgprot_noncached
- if (file->f_flags & O_DSYNC || map->phys >= __pa(high_memory))
+ if (file->f_flags & O_DSYNC || off >= __pa(high_memory))
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
#endif
- return vm_iomap_memory(vma, map->phys, map->size);
+ if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot))
+ return -EAGAIN;
+
+ return 0;
}
return -ENOSYS;
#else
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index dbbea0ee..171b10f1 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -846,10 +846,8 @@ static void bond_mc_swap(struct bonding *bond, struct slave *new_active,
if (bond->dev->flags & IFF_ALLMULTI)
dev_set_allmulti(old_active->dev, -1);
- netif_addr_lock_bh(bond->dev);
netdev_for_each_mc_addr(ha, bond->dev)
dev_mc_del(old_active->dev, ha->addr);
- netif_addr_unlock_bh(bond->dev);
}
if (new_active) {
@@ -860,10 +858,8 @@ static void bond_mc_swap(struct bonding *bond, struct slave *new_active,
if (bond->dev->flags & IFF_ALLMULTI)
dev_set_allmulti(new_active->dev, 1);
- netif_addr_lock_bh(bond->dev);
netdev_for_each_mc_addr(ha, bond->dev)
dev_mc_add(new_active->dev, ha->addr);
- netif_addr_unlock_bh(bond->dev);
}
}
@@ -1905,29 +1901,11 @@ err_dest_symlinks:
bond_destroy_slave_symlinks(bond_dev, slave_dev);
err_detach:
- if (!USES_PRIMARY(bond->params.mode)) {
- netif_addr_lock_bh(bond_dev);
- bond_mc_list_flush(bond_dev, slave_dev);
- netif_addr_unlock_bh(bond_dev);
- }
- bond_del_vlans_from_slave(bond, slave_dev);
write_lock_bh(&bond->lock);
bond_detach_slave(bond, new_slave);
- if (bond->primary_slave == new_slave)
- bond->primary_slave = NULL;
write_unlock_bh(&bond->lock);
- if (bond->curr_active_slave == new_slave) {
- read_lock(&bond->lock);
- write_lock_bh(&bond->curr_slave_lock);
- bond_change_active_slave(bond, NULL);
- bond_select_active_slave(bond);
- write_unlock_bh(&bond->curr_slave_lock);
- read_unlock(&bond->lock);
- }
- slave_disable_netpoll(new_slave);
err_close:
- slave_dev->priv_flags &= ~IFF_BONDING;
dev_close(slave_dev);
err_unset_master:
@@ -3190,20 +3168,11 @@ static int bond_slave_netdev_event(unsigned long event,
struct net_device *slave_dev)
{
struct slave *slave = bond_slave_get_rtnl(slave_dev);
- struct bonding *bond;
- struct net_device *bond_dev;
+ struct bonding *bond = slave->bond;
+ struct net_device *bond_dev = slave->bond->dev;
u32 old_speed;
u8 old_duplex;
- /* A netdev event can be generated while enslaving a device
- * before netdev_rx_handler_register is called in which case
- * slave will be NULL
- */
- if (!slave)
- return NOTIFY_DONE;
- bond_dev = slave->bond->dev;
- bond = slave->bond;
-
switch (event) {
case NETDEV_UNREGISTER:
if (bond->setup_by_slave)
@@ -3317,22 +3286,20 @@ static int bond_xmit_hash_policy_l2(struct sk_buff *skb, int count)
*/
static int bond_xmit_hash_policy_l23(struct sk_buff *skb, int count)
{
- const struct ethhdr *data;
- const struct iphdr *iph;
- const struct ipv6hdr *ipv6h;
+ struct ethhdr *data = (struct ethhdr *)skb->data;
+ struct iphdr *iph;
+ struct ipv6hdr *ipv6h;
u32 v6hash;
- const __be32 *s, *d;
+ __be32 *s, *d;
if (skb->protocol == htons(ETH_P_IP) &&
- pskb_network_may_pull(skb, sizeof(*iph))) {
+ skb_network_header_len(skb) >= sizeof(*iph)) {
iph = ip_hdr(skb);
- data = (struct ethhdr *)skb->data;
return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^
(data->h_dest[5] ^ data->h_source[5])) % count;
} else if (skb->protocol == htons(ETH_P_IPV6) &&
- pskb_network_may_pull(skb, sizeof(*ipv6h))) {
+ skb_network_header_len(skb) >= sizeof(*ipv6h)) {
ipv6h = ipv6_hdr(skb);
- data = (struct ethhdr *)skb->data;
s = &ipv6h->saddr.s6_addr32[0];
d = &ipv6h->daddr.s6_addr32[0];
v6hash = (s[1] ^ d[1]) ^ (s[2] ^ d[2]) ^ (s[3] ^ d[3]);
@@ -3351,36 +3318,33 @@ static int bond_xmit_hash_policy_l23(struct sk_buff *skb, int count)
static int bond_xmit_hash_policy_l34(struct sk_buff *skb, int count)
{
u32 layer4_xor = 0;
- const struct iphdr *iph;
- const struct ipv6hdr *ipv6h;
- const __be32 *s, *d;
- const __be16 *l4 = NULL;
- __be16 _l4[2];
- int noff = skb_network_offset(skb);
- int poff;
+ struct iphdr *iph;
+ struct ipv6hdr *ipv6h;
+ __be32 *s, *d;
+ __be16 *layer4hdr;
if (skb->protocol == htons(ETH_P_IP) &&
- pskb_may_pull(skb, noff + sizeof(*iph))) {
+ skb_network_header_len(skb) >= sizeof(*iph)) {
iph = ip_hdr(skb);
- poff = proto_ports_offset(iph->protocol);
-
- if (!ip_is_fragment(iph) && poff >= 0) {
- l4 = skb_header_pointer(skb, noff + (iph->ihl << 2) + poff,
- sizeof(_l4), &_l4);
- if (l4)
- layer4_xor = ntohs(l4[0] ^ l4[1]);
+ if (!ip_is_fragment(iph) &&
+ (iph->protocol == IPPROTO_TCP ||
+ iph->protocol == IPPROTO_UDP) &&
+ (skb_headlen(skb) - skb_network_offset(skb) >=
+ iph->ihl * sizeof(u32) + sizeof(*layer4hdr) * 2)) {
+ layer4hdr = (__be16 *)((u32 *)iph + iph->ihl);
+ layer4_xor = ntohs(*layer4hdr ^ *(layer4hdr + 1));
}
return (layer4_xor ^
((ntohl(iph->saddr ^ iph->daddr)) & 0xffff)) % count;
} else if (skb->protocol == htons(ETH_P_IPV6) &&
- pskb_may_pull(skb, noff + sizeof(*ipv6h))) {
+ skb_network_header_len(skb) >= sizeof(*ipv6h)) {
ipv6h = ipv6_hdr(skb);
- poff = proto_ports_offset(ipv6h->nexthdr);
- if (poff >= 0) {
- l4 = skb_header_pointer(skb, noff + sizeof(*ipv6h) + poff,
- sizeof(_l4), &_l4);
- if (l4)
- layer4_xor = ntohs(l4[0] ^ l4[1]);
+ if ((ipv6h->nexthdr == IPPROTO_TCP ||
+ ipv6h->nexthdr == IPPROTO_UDP) &&
+ (skb_headlen(skb) - skb_network_offset(skb) >=
+ sizeof(*ipv6h) + sizeof(*layer4hdr) * 2)) {
+ layer4hdr = (__be16 *)(ipv6h + 1);
+ layer4_xor = ntohs(*layer4hdr ^ *(layer4hdr + 1));
}
s = &ipv6h->saddr.s6_addr32[0];
d = &ipv6h->daddr.s6_addr32[0];
@@ -4882,18 +4846,9 @@ static int __net_init bond_net_init(struct net *net)
static void __net_exit bond_net_exit(struct net *net)
{
struct bond_net *bn = net_generic(net, bond_net_id);
- struct bonding *bond, *tmp_bond;
- LIST_HEAD(list);
bond_destroy_sysfs(bn);
bond_destroy_proc_dir(bn);
-
- /* Kill off any bonds created after unregistering bond rtnl ops */
- rtnl_lock();
- list_for_each_entry_safe(bond, tmp_bond, &bn->dev_list, bond_list)
- unregister_netdevice_queue(bond->dev, &list);
- unregister_netdevice_many(&list);
- rtnl_unlock();
}
static struct pernet_operations bond_net_ops = {
@@ -4947,8 +4902,8 @@ static void __exit bonding_exit(void)
bond_destroy_debugfs();
- rtnl_link_unregister(&bond_link_ops);
unregister_pernet_subsys(&bond_net_ops);
+ rtnl_link_unregister(&bond_link_ops);
#ifdef CONFIG_NET_POLL_CONTROLLER
/*
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c
index 9aa0c64c..f32b9fc6 100644
--- a/drivers/net/can/mcp251x.c
+++ b/drivers/net/can/mcp251x.c
@@ -929,7 +929,6 @@ static int mcp251x_open(struct net_device *net)
struct mcp251x_priv *priv = netdev_priv(net);
struct spi_device *spi = priv->spi;
struct mcp251x_platform_data *pdata = spi->dev.platform_data;
- unsigned long flags;
int ret;
ret = open_candev(net);
@@ -946,14 +945,9 @@ static int mcp251x_open(struct net_device *net)
priv->tx_skb = NULL;
priv->tx_len = 0;
- flags = IRQF_ONESHOT;
- if (pdata->irq_flags)
- flags |= pdata->irq_flags;
- else
- flags |= IRQF_TRIGGER_FALLING;
-
ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist,
- flags, DEVICE_NAME, priv);
+ pdata->irq_flags ? pdata->irq_flags : IRQF_TRIGGER_FALLING,
+ DEVICE_NAME, priv);
if (ret) {
dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
if (pdata->transceiver_enable)
diff --git a/drivers/net/can/sja1000/sja1000_of_platform.c b/drivers/net/can/sja1000/sja1000_of_platform.c
index 8e0c4a00..6433b812 100644
--- a/drivers/net/can/sja1000/sja1000_of_platform.c
+++ b/drivers/net/can/sja1000/sja1000_of_platform.c
@@ -96,8 +96,8 @@ static int sja1000_ofp_probe(struct platform_device *ofdev)
struct net_device *dev;
struct sja1000_priv *priv;
struct resource res;
- u32 prop;
- int err, irq, res_size;
+ const u32 *prop;
+ int err, irq, res_size, prop_size;
void __iomem *base;
err = of_address_to_resource(np, 0, &res);
@@ -138,27 +138,27 @@ static int sja1000_ofp_probe(struct platform_device *ofdev)
priv->read_reg = sja1000_ofp_read_reg;
priv->write_reg = sja1000_ofp_write_reg;
- err = of_property_read_u32(np, "nxp,external-clock-frequency", &prop);
- if (!err)
- priv->can.clock.freq = prop / 2;
+ prop = of_get_property(np, "nxp,external-clock-frequency", &prop_size);
+ if (prop && (prop_size == sizeof(u32)))
+ priv->can.clock.freq = *prop / 2;
else
priv->can.clock.freq = SJA1000_OFP_CAN_CLOCK; /* default */
- err = of_property_read_u32(np, "nxp,tx-output-mode", &prop);
- if (!err)
- priv->ocr |= prop & OCR_MODE_MASK;
+ prop = of_get_property(np, "nxp,tx-output-mode", &prop_size);
+ if (prop && (prop_size == sizeof(u32)))
+ priv->ocr |= *prop & OCR_MODE_MASK;
else
priv->ocr |= OCR_MODE_NORMAL; /* default */
- err = of_property_read_u32(np, "nxp,tx-output-config", &prop);
- if (!err)
- priv->ocr |= (prop << OCR_TX_SHIFT) & OCR_TX_MASK;
+ prop = of_get_property(np, "nxp,tx-output-config", &prop_size);
+ if (prop && (prop_size == sizeof(u32)))
+ priv->ocr |= (*prop << OCR_TX_SHIFT) & OCR_TX_MASK;
else
priv->ocr |= OCR_TX0_PULLDOWN; /* default */
- err = of_property_read_u32(np, "nxp,clock-out-frequency", &prop);
- if (!err && prop) {
- u32 divider = priv->can.clock.freq * 2 / prop;
+ prop = of_get_property(np, "nxp,clock-out-frequency", &prop_size);
+ if (prop && (prop_size == sizeof(u32)) && *prop) {
+ u32 divider = priv->can.clock.freq * 2 / *prop;
if (divider > 1)
priv->cdr |= divider / 2 - 1;
@@ -168,7 +168,8 @@ static int sja1000_ofp_probe(struct platform_device *ofdev)
priv->cdr |= CDR_CLK_OFF; /* default */
}
- if (!of_property_read_bool(np, "nxp,no-comparator-bypass"))
+ prop = of_get_property(np, "nxp,no-comparator-bypass", NULL);
+ if (!prop)
priv->cdr |= CDR_CBP; /* default */
priv->irq_flags = IRQF_SHARED;
diff --git a/drivers/net/ethernet/8390/ax88796.c b/drivers/net/ethernet/8390/ax88796.c
index e1d26433..cab306a9 100644
--- a/drivers/net/ethernet/8390/ax88796.c
+++ b/drivers/net/ethernet/8390/ax88796.c
@@ -828,7 +828,7 @@ static int ax_probe(struct platform_device *pdev)
struct ei_device *ei_local;
struct ax_device *ax;
struct resource *irq, *mem, *mem2;
- unsigned long mem_size, mem2_size = 0;
+ resource_size_t mem_size, mem2_size = 0;
int ret = 0;
dev = ax__alloc_ei_netdev(sizeof(struct ax_device));
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 57619dd4..4046f973 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -2614,9 +2614,6 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
}
}
- /* initialize FW coalescing state machines in RAM */
- bnx2x_update_coalesce(bp);
-
/* setup the leading queue */
rc = bnx2x_setup_leading(bp);
if (rc) {
@@ -4583,11 +4580,11 @@ static void storm_memset_hc_disable(struct bnx2x *bp, u8 port,
u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
u32 addr = BAR_CSTRORM_INTMEM +
CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
- u8 flags = REG_RD8(bp, addr);
+ u16 flags = REG_RD16(bp, addr);
/* clear and set */
flags &= ~HC_INDEX_DATA_HC_ENABLED;
flags |= enable_flag;
- REG_WR8(bp, addr, flags);
+ REG_WR16(bp, addr, flags);
DP(NETIF_MSG_IFUP,
"port %x fw_sb_id %d sb_index %d disable %d\n",
port, fw_sb_id, sb_index, disable);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index 0283f343..77ebae0a 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -13437,7 +13437,13 @@ static void bnx2x_check_kr2_wa(struct link_params *params,
{
struct bnx2x *bp = params->bp;
u16 base_page, next_page, not_kr2_device, lane;
- int sigdet;
+ int sigdet = bnx2x_warpcore_get_sigdet(phy, params);
+
+ if (!sigdet) {
+ if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE))
+ bnx2x_kr2_recovery(params, vars, phy);
+ return;
+ }
/* Once KR2 was disabled, wait 5 seconds before checking KR2 recovery
* since some switches tend to reinit the AN process and clear the
@@ -13448,16 +13454,6 @@ static void bnx2x_check_kr2_wa(struct link_params *params,
vars->check_kr2_recovery_cnt--;
return;
}
-
- sigdet = bnx2x_warpcore_get_sigdet(phy, params);
- if (!sigdet) {
- if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) {
- bnx2x_kr2_recovery(params, vars, phy);
- DP(NETIF_MSG_LINK, "No sigdet\n");
- }
- return;
- }
-
lane = bnx2x_get_warpcore_lane(phy, params);
CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,
MDIO_AER_BLOCK_AER_REG, lane);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index c50696b3..e81a747e 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -4947,7 +4947,7 @@ static void bnx2x_after_function_update(struct bnx2x *bp)
q);
}
- if (!NO_FCOE(bp) && CNIC_ENABLED(bp)) {
+ if (!NO_FCOE(bp)) {
fp = &bp->fp[FCOE_IDX(bp)];
queue_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
@@ -9878,10 +9878,6 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp)
REG_RD(bp, NIG_REG_NIG_INT_STS_CLR_0);
}
}
- if (!CHIP_IS_E1x(bp))
- /* block FW from writing to host */
- REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0);
-
/* wait until BRB is empty */
tmp_reg = REG_RD(bp, BRB1_REG_NUM_OF_FULL_BLOCKS);
while (timer_count) {
@@ -13358,7 +13354,6 @@ static int bnx2x_unregister_cnic(struct net_device *dev)
RCU_INIT_POINTER(bp->cnic_ops, NULL);
mutex_unlock(&bp->cnic_mutex);
synchronize_rcu();
- bp->cnic_enabled = false;
kfree(bp->cnic_kwq);
bp->cnic_kwq = NULL;
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c
index 2886c9b6..08e54f3d 100644
--- a/drivers/net/ethernet/emulex/benet/be_main.c
+++ b/drivers/net/ethernet/emulex/benet/be_main.c
@@ -759,9 +759,8 @@ static struct sk_buff *be_insert_vlan_in_pkt(struct be_adapter *adapter,
if (vlan_tx_tag_present(skb)) {
vlan_tag = be_get_tx_vlan_tag(adapter, skb);
- skb = __vlan_put_tag(skb, vlan_tag);
- if (skb)
- skb->vlan_tci = 0;
+ __vlan_put_tag(skb, vlan_tag);
+ skb->vlan_tci = 0;
}
return skb;
diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c
index 73195f64..f292c3aa 100644
--- a/drivers/net/ethernet/freescale/fec.c
+++ b/drivers/net/ethernet/freescale/fec.c
@@ -1002,7 +1002,6 @@ static void fec_enet_adjust_link(struct net_device *ndev)
} else {
if (fep->link) {
fec_stop(ndev);
- fep->link = phy_dev->link;
status_change = 1;
}
}
diff --git a/drivers/net/ethernet/intel/e100.c b/drivers/net/ethernet/intel/e100.c
index d2bea3f0..ec800b09 100644
--- a/drivers/net/ethernet/intel/e100.c
+++ b/drivers/net/ethernet/intel/e100.c
@@ -870,7 +870,7 @@ err_unlock:
}
static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
- int (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
+ void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
{
struct cb *cb;
unsigned long flags;
@@ -888,13 +888,10 @@ static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
nic->cbs_avail--;
cb->skb = skb;
- err = cb_prepare(nic, cb, skb);
- if (err)
- goto err_unlock;
-
if (unlikely(!nic->cbs_avail))
err = -ENOSPC;
+ cb_prepare(nic, cb, skb);
/* Order is important otherwise we'll be in a race with h/w:
* set S-bit in current first, then clear S-bit in previous. */
@@ -1094,7 +1091,7 @@ static void e100_get_defaults(struct nic *nic)
nic->mii.mdio_write = mdio_write;
}
-static int e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
+static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
{
struct config *config = &cb->u.config;
u8 *c = (u8 *)config;
@@ -1184,7 +1181,6 @@ static int e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
"[16-23]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]);
- return 0;
}
/*************************************************************************
@@ -1335,7 +1331,7 @@ static const struct firmware *e100_request_firmware(struct nic *nic)
return fw;
}
-static int e100_setup_ucode(struct nic *nic, struct cb *cb,
+static void e100_setup_ucode(struct nic *nic, struct cb *cb,
struct sk_buff *skb)
{
const struct firmware *fw = (void *)skb;
@@ -1362,7 +1358,6 @@ static int e100_setup_ucode(struct nic *nic, struct cb *cb,
cb->u.ucode[min_size] |= cpu_to_le32((BUNDLESMALL) ? 0xFFFF : 0xFF80);
cb->command = cpu_to_le16(cb_ucode | cb_el);
- return 0;
}
static inline int e100_load_ucode_wait(struct nic *nic)
@@ -1405,20 +1400,18 @@ static inline int e100_load_ucode_wait(struct nic *nic)
return err;
}
-static int e100_setup_iaaddr(struct nic *nic, struct cb *cb,
+static void e100_setup_iaaddr(struct nic *nic, struct cb *cb,
struct sk_buff *skb)
{
cb->command = cpu_to_le16(cb_iaaddr);
memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN);
- return 0;
}
-static int e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
+static void e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
{
cb->command = cpu_to_le16(cb_dump);
cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr +
offsetof(struct mem, dump_buf));
- return 0;
}
static int e100_phy_check_without_mii(struct nic *nic)
@@ -1588,7 +1581,7 @@ static int e100_hw_init(struct nic *nic)
return 0;
}
-static int e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
+static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
{
struct net_device *netdev = nic->netdev;
struct netdev_hw_addr *ha;
@@ -1603,7 +1596,6 @@ static int e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
memcpy(&cb->u.multi.addr[i++ * ETH_ALEN], &ha->addr,
ETH_ALEN);
}
- return 0;
}
static void e100_set_multicast_list(struct net_device *netdev)
@@ -1764,18 +1756,11 @@ static void e100_watchdog(unsigned long data)
round_jiffies(jiffies + E100_WATCHDOG_PERIOD));
}
-static int e100_xmit_prepare(struct nic *nic, struct cb *cb,
+static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
struct sk_buff *skb)
{
- dma_addr_t dma_addr;
cb->command = nic->tx_command;
- dma_addr = pci_map_single(nic->pdev,
- skb->data, skb->len, PCI_DMA_TODEVICE);
- /* If we can't map the skb, have the upper layer try later */
- if (pci_dma_mapping_error(nic->pdev, dma_addr))
- return -ENOMEM;
-
/*
* Use the last 4 bytes of the SKB payload packet as the CRC, used for
* testing, ie sending frames with bad CRC.
@@ -1792,10 +1777,11 @@ static int e100_xmit_prepare(struct nic *nic, struct cb *cb,
cb->u.tcb.tcb_byte_count = 0;
cb->u.tcb.threshold = nic->tx_threshold;
cb->u.tcb.tbd_count = 1;
- cb->u.tcb.tbd.buf_addr = cpu_to_le32(dma_addr);
+ cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev,
+ skb->data, skb->len, PCI_DMA_TODEVICE));
+ /* check for mapping failure? */
cb->u.tcb.tbd.size = cpu_to_le16(skb->len);
skb_tx_timestamp(skb);
- return 0;
}
static netdev_tx_t e100_xmit_frame(struct sk_buff *skb,
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h
index ab577a76..25151401 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -284,10 +284,18 @@ struct igb_q_vector {
enum e1000_ring_flags_t {
IGB_RING_FLAG_RX_SCTP_CSUM,
IGB_RING_FLAG_RX_LB_VLAN_BSWAP,
+ IGB_RING_FLAG_RX_BUILD_SKB_ENABLED,
IGB_RING_FLAG_TX_CTX_IDX,
IGB_RING_FLAG_TX_DETECT_HANG
};
+#define ring_uses_build_skb(ring) \
+ test_bit(IGB_RING_FLAG_RX_BUILD_SKB_ENABLED, &(ring)->flags)
+#define set_ring_build_skb_enabled(ring) \
+ set_bit(IGB_RING_FLAG_RX_BUILD_SKB_ENABLED, &(ring)->flags)
+#define clear_ring_build_skb_enabled(ring) \
+ clear_bit(IGB_RING_FLAG_RX_BUILD_SKB_ENABLED, &(ring)->flags)
+
#define IGB_TXD_DCMD (E1000_ADVTXD_DCMD_EOP | E1000_ADVTXD_DCMD_RS)
#define IGB_RX_DESC(R, i) \
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 64f75291..8496adfc 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -3350,6 +3350,20 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,
wr32(E1000_RXDCTL(reg_idx), rxdctl);
}
+static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
+ struct igb_ring *rx_ring)
+{
+#define IGB_MAX_BUILD_SKB_SIZE \
+ (SKB_WITH_OVERHEAD(IGB_RX_BUFSZ) - \
+ (NET_SKB_PAD + NET_IP_ALIGN + IGB_TS_HDR_LEN))
+
+ /* set build_skb flag */
+ if (adapter->max_frame_size <= IGB_MAX_BUILD_SKB_SIZE)
+ set_ring_build_skb_enabled(rx_ring);
+ else
+ clear_ring_build_skb_enabled(rx_ring);
+}
+
/**
* igb_configure_rx - Configure receive Unit after Reset
* @adapter: board private structure
@@ -3369,8 +3383,11 @@ static void igb_configure_rx(struct igb_adapter *adapter)
/* Setup the HW Rx Head and Tail Descriptor Pointers and
* the Base and Length of the Rx Descriptor Ring */
- for (i = 0; i < adapter->num_rx_queues; i++)
- igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
+ for (i = 0; i < adapter->num_rx_queues; i++) {
+ struct igb_ring *rx_ring = adapter->rx_ring[i];
+ igb_set_rx_buffer_len(adapter, rx_ring);
+ igb_configure_rx_ring(adapter, rx_ring);
+ }
}
/**
@@ -6186,6 +6203,78 @@ static bool igb_add_rx_frag(struct igb_ring *rx_ring,
return igb_can_reuse_rx_page(rx_buffer, page, truesize);
}
+static struct sk_buff *igb_build_rx_buffer(struct igb_ring *rx_ring,
+ union e1000_adv_rx_desc *rx_desc)
+{
+ struct igb_rx_buffer *rx_buffer;
+ struct sk_buff *skb;
+ struct page *page;
+ void *page_addr;
+ unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
+#if (PAGE_SIZE < 8192)
+ unsigned int truesize = IGB_RX_BUFSZ;
+#else
+ unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
+ SKB_DATA_ALIGN(NET_SKB_PAD +
+ NET_IP_ALIGN +
+ size);
+#endif
+
+ /* If we spanned a buffer we have a huge mess so test for it */
+ BUG_ON(unlikely(!igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)));
+
+ rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
+ page = rx_buffer->page;
+ prefetchw(page);
+
+ page_addr = page_address(page) + rx_buffer->page_offset;
+
+ /* prefetch first cache line of first page */
+ prefetch(page_addr + NET_SKB_PAD + NET_IP_ALIGN);
+#if L1_CACHE_BYTES < 128
+ prefetch(page_addr + L1_CACHE_BYTES + NET_SKB_PAD + NET_IP_ALIGN);
+#endif
+
+ /* build an skb to around the page buffer */
+ skb = build_skb(page_addr, truesize);
+ if (unlikely(!skb)) {
+ rx_ring->rx_stats.alloc_failed++;
+ return NULL;
+ }
+
+ /* we are reusing so sync this buffer for CPU use */
+ dma_sync_single_range_for_cpu(rx_ring->dev,
+ rx_buffer->dma,
+ rx_buffer->page_offset,
+ IGB_RX_BUFSZ,
+ DMA_FROM_DEVICE);
+
+ /* update pointers within the skb to store the data */
+ skb_reserve(skb, NET_IP_ALIGN + NET_SKB_PAD);
+ __skb_put(skb, size);
+
+ /* pull timestamp out of packet data */
+ if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
+ igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
+ __skb_pull(skb, IGB_TS_HDR_LEN);
+ }
+
+ if (igb_can_reuse_rx_page(rx_buffer, page, truesize)) {
+ /* hand second half of page back to the ring */
+ igb_reuse_rx_page(rx_ring, rx_buffer);
+ } else {
+ /* we are not reusing the buffer so unmap it */
+ dma_unmap_page(rx_ring->dev, rx_buffer->dma,
+ PAGE_SIZE, DMA_FROM_DEVICE);
+ }
+
+ /* clear contents of buffer_info */
+ rx_buffer->dma = 0;
+ rx_buffer->page = NULL;
+
+ return skb;
+}
+
static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
union e1000_adv_rx_desc *rx_desc,
struct sk_buff *skb)
@@ -6601,7 +6690,10 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
rmb();
/* retrieve a buffer from the ring */
- skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
+ if (ring_uses_build_skb(rx_ring))
+ skb = igb_build_rx_buffer(rx_ring, rx_desc);
+ else
+ skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
/* exit if we failed to retrieve a buffer */
if (!skb)
@@ -6688,6 +6780,14 @@ static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
return true;
}
+static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
+{
+ if (ring_uses_build_skb(rx_ring))
+ return NET_SKB_PAD + NET_IP_ALIGN;
+ else
+ return 0;
+}
+
/**
* igb_alloc_rx_buffers - Replace used receive buffers; packet split
* @adapter: address of board private structure
@@ -6714,7 +6814,9 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
* Refresh the desc even if buffer_addrs didn't change
* because each write-back erases this info.
*/
- rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
+ rx_desc->read.pkt_addr = cpu_to_le64(bi->dma +
+ bi->page_offset +
+ igb_rx_offset(rx_ring));
rx_desc++;
bi++;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
index 97e33669..d44b4d21 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
@@ -1049,12 +1049,6 @@ int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos)
if ((vf >= adapter->num_vfs) || (vlan > 4095) || (qos > 7))
return -EINVAL;
if (vlan || qos) {
- if (adapter->vfinfo[vf].pf_vlan)
- err = ixgbe_set_vf_vlan(adapter, false,
- adapter->vfinfo[vf].pf_vlan,
- vf);
- if (err)
- goto out;
err = ixgbe_set_vf_vlan(adapter, true, vlan, vf);
if (err)
goto out;
diff --git a/drivers/net/ethernet/marvell/Kconfig b/drivers/net/ethernet/marvell/Kconfig
index 434e33c5..edfba937 100644
--- a/drivers/net/ethernet/marvell/Kconfig
+++ b/drivers/net/ethernet/marvell/Kconfig
@@ -33,7 +33,6 @@ config MV643XX_ETH
config MVMDIO
tristate "Marvell MDIO interface support"
- select PHYLIB
---help---
This driver supports the MDIO interface found in the network
interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
@@ -46,6 +45,7 @@ config MVMDIO
config MVNETA
tristate "Marvell Armada 370/XP network interface support"
depends on MACH_ARMADA_370_XP
+ select PHYLIB
select MVMDIO
---help---
This driver supports the network interface units in the
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index a47a097c..cd345b89 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -374,6 +374,7 @@ static int rxq_number = 8;
static int txq_number = 8;
static int rxq_def;
+static int txq_def;
#define MVNETA_DRIVER_NAME "mvneta"
#define MVNETA_DRIVER_VERSION "1.0"
@@ -1474,8 +1475,7 @@ error:
static int mvneta_tx(struct sk_buff *skb, struct net_device *dev)
{
struct mvneta_port *pp = netdev_priv(dev);
- u16 txq_id = skb_get_queue_mapping(skb);
- struct mvneta_tx_queue *txq = &pp->txqs[txq_id];
+ struct mvneta_tx_queue *txq = &pp->txqs[txq_def];
struct mvneta_tx_desc *tx_desc;
struct netdev_queue *nq;
int frags = 0;
@@ -1485,7 +1485,7 @@ static int mvneta_tx(struct sk_buff *skb, struct net_device *dev)
goto out;
frags = skb_shinfo(skb)->nr_frags + 1;
- nq = netdev_get_tx_queue(dev, txq_id);
+ nq = netdev_get_tx_queue(dev, txq_def);
/* Get a descriptor for the first part of the packet */
tx_desc = mvneta_txq_next_desc_get(txq);
@@ -2689,7 +2689,7 @@ static int mvneta_probe(struct platform_device *pdev)
return -EINVAL;
}
- dev = alloc_etherdev_mqs(sizeof(struct mvneta_port), txq_number, rxq_number);
+ dev = alloc_etherdev_mq(sizeof(struct mvneta_port), 8);
if (!dev)
return -ENOMEM;
@@ -2771,17 +2771,16 @@ static int mvneta_probe(struct platform_device *pdev)
netif_napi_add(dev, &pp->napi, mvneta_poll, pp->weight);
- dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
- dev->hw_features |= NETIF_F_SG | NETIF_F_IP_CSUM;
- dev->vlan_features |= NETIF_F_SG | NETIF_F_IP_CSUM;
- dev->priv_flags |= IFF_UNICAST_FLT;
-
err = register_netdev(dev);
if (err < 0) {
dev_err(&pdev->dev, "failed to register\n");
goto err_deinit;
}
+ dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
+ dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM;
+ dev->priv_flags |= IFF_UNICAST_FLT;
+
netdev_info(dev, "mac: %pM\n", dev->dev_addr);
platform_set_drvdata(pdev, pp->dev);
@@ -2844,3 +2843,4 @@ module_param(rxq_number, int, S_IRUGO);
module_param(txq_number, int, S_IRUGO);
module_param(rxq_def, int, S_IRUGO);
+module_param(txq_def, int, S_IRUGO);
diff --git a/drivers/net/ethernet/micrel/ks8851.c b/drivers/net/ethernet/micrel/ks8851.c
index 8fb48125..97f87aee 100644
--- a/drivers/net/ethernet/micrel/ks8851.c
+++ b/drivers/net/ethernet/micrel/ks8851.c
@@ -11,7 +11,13 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-#define DEBUG
+//#define DEBUG
+//#define DEBUG_REGS
+#ifdef DEBUG_REGS
+#define dbg_reg(netdev, ...) netdev_dbg(netdev, __VA_ARGS__)
+#else
+#define dbg_reg(netdev, ...)
+#endif
#include <linux/interrupt.h>
#include <linux/module.h>
@@ -28,6 +34,10 @@
#include "ks8851.h"
+#include <mach/mux.h>
+#include <mach/gpio.h>
+#define GPIO_RESET 78
+
/**
* struct ks8851_rxctrl - KS8851 driver rx control
* @mchash: Multicast hash-table data.
@@ -57,7 +67,7 @@ struct ks8851_rxctrl {
*/
union ks8851_tx_hdr {
u8 txb[6];
- __le16 txw[3];
+ u16 txw[3];
};
/**
@@ -103,10 +113,11 @@ struct ks8851_net {
struct mutex lock;
spinlock_t statelock;
- union ks8851_tx_hdr txh ____cacheline_aligned;
+ u8 txh[8] ____cacheline_aligned;
u8 rxd[8];
u8 txd[8];
+
u32 msg_enable ____cacheline_aligned;
u16 tx_space;
u8 fid;
@@ -129,10 +140,15 @@ struct ks8851_net {
struct spi_transfer spi_xfer1;
struct spi_transfer spi_xfer2[2];
+ struct spi_message msg_send_pkt;
+ struct spi_transfer xfer_send_pkt[5];
+ u8 buf_send_pkt[20] ____cacheline_aligned;
+
struct eeprom_93cx6 eeprom;
};
static int msg_enable;
+static char * hwaddr_string = NULL;
/* shift for byte-enable data */
#define BYTE_EN(_x) ((_x) << 2)
@@ -155,23 +171,70 @@ static int msg_enable;
*
* Issue a write to put the value @val into the register specified in @reg.
*/
-static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
+static void fill_xfer(struct spi_transfer *xfer, u8 *tx, u8 *rx, u16 len, u8 cs_change) {
+ xfer->tx_buf = tx;
+ xfer->rx_buf = rx;
+ xfer->len = len;
+ xfer->cs_change = cs_change;
+}
+#define XFER_TX(xfer, ptr, cs_change, buf_func, ...) \
+ do { \
+ u8 __len = buf_func(ptr, ##__VA_ARGS__); \
+ fill_xfer(xfer++, ptr, NULL, __len, cs_change); \
+ ptr += __len; \
+ } while (0)
+
+static inline u8 wrreg16_buf(u8 *buf, unsigned reg, unsigned val)
+{
+ u16 *b = (u16*)buf;
+ b[0] = (MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
+ b[1] = (val);
+ return 4;
+}
+
+static inline u8 txpkt_header_buf(u8 *buf, u16 control, u16 len)
+{
+ buf[0] = KS_SPIOP_TXFIFO;
+ *(uint16_t*)(buf+1) = control;
+ *(uint16_t*)(buf+3) = len;
+ return 5;
+}
+
+static inline void build_msg_send_pkt(struct ks8851_net *ks)
+{
+ struct spi_transfer *xfer = &ks->xfer_send_pkt[0];
+ u8 *ptr = ks->buf_send_pkt;
+ u16 rxqcr =
+ (RXQCR_RXFCTE | /* IRQ on frame count exceeded */
+ RXQCR_RXDBCTE | /* IRQ on byte count exceeded */
+ RXQCR_RXDTTE); /* IRQ on time exceeded */
+
+ XFER_TX(xfer, ptr, 1, wrreg16_buf, KS_RXQCR, rxqcr | RXQCR_SDA);
+ XFER_TX(xfer, ptr, 0, txpkt_header_buf, 0, 0);
+
+ xfer++; // xfer with packet body, will fill it later
+ xfer->cs_change = 1;
+
+ XFER_TX(xfer, ptr, 1, wrreg16_buf, KS_RXQCR, rxqcr);
+ XFER_TX(xfer, ptr, 0, wrreg16_buf, KS_TXQCR, TXQCR_METFE);
+
+ spi_message_init_with_transfers(&ks->msg_send_pkt, ks->xfer_send_pkt, 5);
+}
+
+static int ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
{
struct spi_transfer *xfer = &ks->spi_xfer1;
struct spi_message *msg = &ks->spi_msg1;
- __le16 txb[2];
+ u8 txb[4], *ptr = txb;
int ret;
- txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
- txb[1] = cpu_to_le16(val);
-
- xfer->tx_buf = txb;
- xfer->rx_buf = NULL;
- xfer->len = 4;
+ dbg_reg(ks->netdev, "wr16(0x%x, 0x%x)\n", reg, val);
+ XFER_TX(xfer, ptr, 0, wrreg16_buf, reg, val);
ret = spi_sync(ks->spidev, msg);
if (ret < 0)
- netdev_err(ks->netdev, "spi_sync() failed\n");
+ netdev_dbg(ks->netdev, "%s(%x, %x): spi_sync() failed\n", __func__, reg, val);
+ return ret;
}
/**
@@ -186,13 +249,13 @@ static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
{
struct spi_transfer *xfer = &ks->spi_xfer1;
struct spi_message *msg = &ks->spi_msg1;
- __le16 txb[2];
+ u16 txb[2];
int ret;
int bit;
bit = 1 << (reg & 3);
- txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
+ txb[0] = (MK_OP(bit, reg) | KS_SPIOP_WR);
txb[1] = val;
xfer->tx_buf = txb;
@@ -201,26 +264,7 @@ static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
ret = spi_sync(ks->spidev, msg);
if (ret < 0)
- netdev_err(ks->netdev, "spi_sync() failed\n");
-}
-
-/**
- * ks8851_rx_1msg - select whether to use one or two messages for spi read
- * @ks: The device structure
- *
- * Return whether to generate a single message with a tx and rx buffer
- * supplied to spi_sync(), or alternatively send the tx and rx buffers
- * as separate messages.
- *
- * Depending on the hardware in use, a single message may be more efficient
- * on interrupts or work done by the driver.
- *
- * This currently always returns true until we add some per-device data passed
- * from the platform code to specify which mode is better.
- */
-static inline bool ks8851_rx_1msg(struct ks8851_net *ks)
-{
- return true;
+ netdev_dbg(ks->netdev, "%s(%x, %x): spi_sync() failed\n", __func__, reg, val);
}
/**
@@ -233,45 +277,31 @@ static inline bool ks8851_rx_1msg(struct ks8851_net *ks)
* This is the low level read call that issues the necessary spi message(s)
* to read data from the register specified in @op.
*/
-static void ks8851_rdreg(struct ks8851_net *ks, unsigned op,
+static int ks8851_rdreg(struct ks8851_net *ks, unsigned op,
u8 *rxb, unsigned rxl)
{
struct spi_transfer *xfer;
struct spi_message *msg;
- __le16 *txb = (__le16 *)ks->txd;
+ u16 *txb = (u16 *)ks->txd;
u8 *trx = ks->rxd;
int ret;
- txb[0] = cpu_to_le16(op | KS_SPIOP_RD);
+ txb[0] = (op | KS_SPIOP_RD);
- if (ks8851_rx_1msg(ks)) {
- msg = &ks->spi_msg1;
- xfer = &ks->spi_xfer1;
+ msg = &ks->spi_msg1;
+ xfer = &ks->spi_xfer1;
- xfer->tx_buf = txb;
- xfer->rx_buf = trx;
- xfer->len = rxl + 2;
- } else {
- msg = &ks->spi_msg2;
- xfer = ks->spi_xfer2;
-
- xfer->tx_buf = txb;
- xfer->rx_buf = NULL;
- xfer->len = 2;
-
- xfer++;
- xfer->tx_buf = NULL;
- xfer->rx_buf = trx;
- xfer->len = rxl;
- }
+ xfer->tx_buf = txb;
+ xfer->rx_buf = trx;
+ xfer->len = rxl + 2;
ret = spi_sync(ks->spidev, msg);
if (ret < 0)
- netdev_err(ks->netdev, "read: spi_sync() failed\n");
- else if (ks8851_rx_1msg(ks))
- memcpy(rxb, trx + 2, rxl);
+ netdev_dbg(ks->netdev, "rdreg: spi_sync() failed\n");
else
- memcpy(rxb, trx, rxl);
+ memcpy(rxb, trx + 2, rxl);
+
+ return ret;
}
/**
@@ -298,10 +328,11 @@ static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg)
*/
static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
{
- __le16 rx = 0;
+ u16 rx = 0;
ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2);
- return le16_to_cpu(rx);
+ dbg_reg(ks->netdev, "rd16(0x%x) = 0x%x\n", reg, rx);
+ return (rx);
}
/**
@@ -315,12 +346,12 @@ static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
*/
static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
{
- __le32 rx = 0;
+ u32 rx = 0;
WARN_ON(reg & 3);
ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4);
- return le32_to_cpu(rx);
+ return (rx);
}
/**
@@ -338,6 +369,12 @@ static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
*/
static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
{
+ gpio_direction_output(GPIO_RESET, 0);
+ mdelay(1);
+ gpio_set_value(GPIO_RESET, 1);
+ mdelay(1);
+ gpio_set_value(GPIO_RESET, 0);
+ mdelay(1);
ks8851_wrreg16(ks, KS_GRR, op);
mdelay(1); /* wait a short time to effect reset */
ks8851_wrreg16(ks, KS_GRR, 0);
@@ -414,6 +451,29 @@ static void ks8851_read_mac_addr(struct net_device *dev)
mutex_unlock(&ks->lock);
}
+/**
+ * ks8851_parse_mac_address - parse mac address from cmdline and write to device
+ * @str: pointer to mac string in cmdline
+ * @dev: The device structure
+ */
+static void ks8851_parse_mac_address(char * str, struct net_device *dev) {
+ int i;
+ char tmp[3];
+ int res = 0;
+
+ printk("set ks8851 fixed hwaddr %s\n", hwaddr_string);
+
+ for (i = 0; i < 6; i++) {
+ memcpy(tmp, str + i * 2, 2);
+ tmp[2] = 0;
+ kstrtoint(tmp, 16, &res);
+ dev->dev_addr[i] = res;
+ }
+
+ ks8851_write_mac_addr(dev);
+}
+
+
/**
* ks8851_init_mac - initialise the mac address
* @ks: The device structure
@@ -426,7 +486,13 @@ static void ks8851_read_mac_addr(struct net_device *dev)
static void ks8851_init_mac(struct ks8851_net *ks)
{
struct net_device *dev = ks->netdev;
+ printk("Init mac address\r\n");
+ /* if hwaddr is set in cmdline */
+ if (hwaddr_string) {
+ ks8851_parse_mac_address(hwaddr_string, dev);
+ return;
+ } else
/* first, try reading what we've got already */
if (ks->rc_ccr & CCR_EEPROM) {
ks8851_read_mac_addr(dev);
@@ -450,7 +516,7 @@ static void ks8851_init_mac(struct ks8851_net *ks)
* Issue an RXQ FIFO read command and read the @len amount of data from
* the FIFO into the buffer specified by @buff.
*/
-static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
+static int ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
{
struct spi_transfer *xfer = ks->spi_xfer2;
struct spi_message *msg = &ks->spi_msg2;
@@ -475,6 +541,7 @@ static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
ret = spi_sync(ks->spidev, msg);
if (ret < 0)
netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
+ return ret;
}
/**
@@ -504,17 +571,16 @@ static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt)
static void ks8851_rx_pkts(struct ks8851_net *ks)
{
struct sk_buff *skb;
+ unsigned rxh;
unsigned rxfc;
unsigned rxlen;
unsigned rxstat;
- u32 rxh;
- u8 *rxpkt;
+ void *rxpkt;
+ int ret = 0;
rxfc = ks8851_rdreg8(ks, KS_RXFC);
-
netif_dbg(ks, rx_status, ks->netdev,
"%s: %d packets\n", __func__, rxfc);
-
/* Currently we're issuing a read per packet, but we could possibly
* improve the code by issuing a single read, getting the receive
* header, allocating the packet and then reading the packet data
@@ -531,16 +597,20 @@ static void ks8851_rx_pkts(struct ks8851_net *ks)
rxlen = (rxh >> 16) & 0xfff;
netif_dbg(ks, rx_status, ks->netdev,
- "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
-
- /* the length of the packet includes the 32bit CRC */
+ "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
+ if (!(rxstat & RXFSHR_RXFV)) { /* frame invalid */
+ netif_err(ks, rx_status, ks->netdev,
+ "rx: invalid frame stat=0x%x\n", rxstat);
+ continue;
+ }
+
/* set dma read address */
ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00);
/* start the packet dma process, and set auto-dequeue rx */
ks8851_wrreg16(ks, KS_RXQCR,
- ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
+ ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
if (rxlen > 4) {
unsigned int rxalign;
@@ -555,22 +625,21 @@ static void ks8851_rx_pkts(struct ks8851_net *ks)
* header, so that they are copied,
* but ignored.
*/
-
rxpkt = skb_put(skb, rxlen) - 8;
- ks8851_rdfifo(ks, rxpkt, rxalign + 8);
-
- if (netif_msg_pktdata(ks))
- ks8851_dbg_dumpkkt(ks, rxpkt);
-
- skb->protocol = eth_type_trans(skb, ks->netdev);
- netif_rx_ni(skb);
-
- ks->netdev->stats.rx_packets++;
- ks->netdev->stats.rx_bytes += rxlen;
+ ret = ks8851_rdfifo(ks, rxpkt, rxalign + 8);
+ if (!ret) {
+ skb->protocol = eth_type_trans(skb, ks->netdev);
+ netif_rx_ni(skb);
+
+ ks->netdev->stats.rx_packets++;
+ ks->netdev->stats.rx_bytes += rxlen;
+ }
+ else {
+ dev_kfree_skb(skb);
+ }
}
}
-
ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
}
}
@@ -594,7 +663,13 @@ static irqreturn_t ks8851_irq(int irq, void *_ks)
unsigned handled = 0;
mutex_lock(&ks->lock);
-
+ /*
+ * Turn off hardware interrupt during receive processing. This fixes
+ * the receive problem under heavy TCP traffic while transmit done
+ * is enabled.
+ */
+ ks8851_wrreg16(ks, KS_IER, 0);
+ //
status = ks8851_rdreg16(ks, KS_ISR);
netif_dbg(ks, intr, ks->netdev,
@@ -630,8 +705,14 @@ static irqreturn_t ks8851_irq(int irq, void *_ks)
if (status & IRQ_RXI)
handled |= IRQ_RXI;
+ if (status & IRQ_RXOI) {
+ netdev_err(ks->netdev, "%s: rx overrun\n", __func__);
+
+ handled |= IRQ_RXOI;
+ }
+
if (status & IRQ_SPIBEI) {
- dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__);
+ netdev_err(ks->netdev, "%s: spi bus error\n", __func__);
handled |= IRQ_SPIBEI;
}
@@ -642,7 +723,6 @@ static irqreturn_t ks8851_irq(int irq, void *_ks)
* packet read-out, however we're masking the interrupt
* from the device so do not bother masking just the RX
* from the device. */
-
ks8851_rx_pkts(ks);
}
@@ -662,6 +742,9 @@ static irqreturn_t ks8851_irq(int irq, void *_ks)
ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1);
}
+ /* Re-enable hardware interrupt. */
+ ks8851_wrreg16(ks, KS_IER, ks->rc_ier);
+
mutex_unlock(&ks->lock);
if (status & IRQ_LCI)
@@ -696,39 +779,34 @@ static inline unsigned calc_txlen(unsigned len)
* needs, such as IRQ on completion. Send the header and the packet data to
* the device.
*/
-static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
+static int ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
{
- struct spi_transfer *xfer = ks->spi_xfer2;
- struct spi_message *msg = &ks->spi_msg2;
- unsigned fid = 0;
+ struct spi_message *msg = &ks->msg_send_pkt;
+ struct spi_transfer *xfer = ks->xfer_send_pkt + 2;
+ u8 *buf = ks->buf_send_pkt;
int ret;
netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
__func__, txp, txp->len, txp->data, irq);
- fid = ks->fid++;
- fid &= TXFR_TXFID_MASK;
-
- if (irq)
- fid |= TXFR_TXIC; /* irq on completion */
+ // update packet header:
+ // control
+ *(u16 *)(buf+5) =
+ ((ks->fid++) & TXFR_TXFID_MASK) |
+ (irq ? TXFR_TXIC : 0);
+ // length
+ *(u16 *)(buf+7) = txp->len & 0xFFFF;
- /* start header at txb[1] to align txw entries */
- ks->txh.txb[1] = KS_SPIOP_TXFIFO;
- ks->txh.txw[1] = cpu_to_le16(fid);
- ks->txh.txw[2] = cpu_to_le16(txp->len);
-
- xfer->tx_buf = &ks->txh.txb[1];
- xfer->rx_buf = NULL;
- xfer->len = 5;
-
- xfer++;
- xfer->tx_buf = txp->data;
- xfer->rx_buf = NULL;
- xfer->len = ALIGN(txp->len, 4);
+ // update xfer with packet data
+ fill_xfer(xfer, txp->data, NULL, ALIGN(txp->len, 4), 1);
+// print_hex_dump_debug("pkt head: ", DUMP_PREFIX_NONE, 16, 1, buf, 9, 0);
+// print_hex_dump_debug("pkt tail: ", DUMP_PREFIX_NONE, 16, 1, buf+9, 8, 0);
ret = spi_sync(ks->spidev, msg);
if (ret < 0)
- netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
+ netdev_dbg(ks->netdev, "%s: spi_sync() failed\n", __func__);
+ netif_dbg(ks, tx_queued, ks->netdev, "%s: done\n", __func__);
+ return ret;
}
/**
@@ -766,11 +844,7 @@ static void ks8851_tx_work(struct work_struct *work)
last = skb_queue_empty(&ks->txq);
if (txb != NULL) {
- ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
ks8851_wrpkt(ks, txb, last);
- ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
- ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
-
ks8851_done_tx(ks, txb);
}
}
@@ -793,7 +867,7 @@ static int ks8851_net_open(struct net_device *dev)
* else at the moment */
mutex_lock(&ks->lock);
- netif_dbg(ks, ifup, ks->netdev, "opening\n");
+ //netif_dbg(ks, ifup, ks->netdev, "opening\n");
/* bring chip out of any power saving mode it was in */
ks8851_set_powermode(ks, PMECR_PM_NORMAL);
@@ -849,7 +923,7 @@ static int ks8851_net_open(struct net_device *dev)
netif_start_queue(ks->netdev);
- netif_dbg(ks, ifup, ks->netdev, "network device up\n");
+ //netif_dbg(ks, ifup, ks->netdev, "network device up\n");
mutex_unlock(&ks->lock);
return 0;
@@ -896,8 +970,8 @@ static int ks8851_net_stop(struct net_device *dev)
while (!skb_queue_empty(&ks->txq)) {
struct sk_buff *txb = skb_dequeue(&ks->txq);
- netif_dbg(ks, ifdown, ks->netdev,
- "%s: freeing txb %p\n", __func__, txb);
+ //netif_dbg(ks, ifdown, ks->netdev,
+ // "%s: freeing txb %p\n", __func__, txb);
dev_kfree_skb(txb);
}
@@ -931,6 +1005,8 @@ static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb,
spin_lock(&ks->statelock);
if (needed > ks->tx_space) {
+ netif_dbg(ks, tx_queued, ks->netdev,
+ "%s: stop queue\n", __func__);
netif_stop_queue(dev);
ret = NETDEV_TX_BUSY;
} else {
@@ -1227,7 +1303,7 @@ static int ks8851_get_eeprom(struct net_device *dev,
ee->magic = KS_EEPROM_MAGIC;
- eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2);
+ eeprom_93cx6_multiread(&ks->eeprom, offset/2, (u16 *)data, len/2);
ks8851_eeprom_release(ks);
return 0;
@@ -1401,10 +1477,12 @@ static int ks8851_probe(struct spi_device *spi)
struct ks8851_net *ks;
int ret;
unsigned cider;
-
+ printk("Network ethernet (ks8851) probe\r\n");
ndev = alloc_etherdev(sizeof(struct ks8851_net));
- if (!ndev)
+ if (!ndev){
+ printk("Network ethernet failed to allocate ndev\r\n");
return -ENOMEM;
+ }
spi->bits_per_word = 8;
@@ -1429,6 +1507,9 @@ static int ks8851_probe(struct spi_device *spi)
spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
+
+ build_msg_send_pkt(ks);
+
/* setup EEPROM state */
ks->eeprom.data = ks;
@@ -1468,14 +1549,15 @@ static int ks8851_probe(struct spi_device *spi)
/* simple check for a valid chip being connected to the bus */
cider = ks8851_rdreg16(ks, KS_CIDER);
if ((cider & ~CIDER_REV_MASK) != CIDER_ID) {
- dev_err(&spi->dev, "failed to read device ID\n");
+ dev_err(&spi->dev, "failed to read device ID, cider=%x\n", cider);
+ printk("Network ethernet failed to read device ID\r\n");
ret = -ENODEV;
goto err_id;
}
/* cache the contents of the CCR register for EEPROM, etc. */
ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR);
-
+ ks->rc_ccr |= CCR_EEPROM;
if (ks->rc_ccr & CCR_EEPROM)
ks->eeprom_size = 128;
else
@@ -1485,22 +1567,27 @@ static int ks8851_probe(struct spi_device *spi)
ks8851_init_mac(ks);
ret = request_threaded_irq(spi->irq, NULL, ks8851_irq,
- IRQF_TRIGGER_LOW | IRQF_ONESHOT,
+ IRQF_TRIGGER_FALLING /*| IRQF_ONESHOT*/,
ndev->name, ks);
if (ret < 0) {
dev_err(&spi->dev, "failed to get irq\n");
+ printk("Network ethernet failed to failed to get irq\r\n");
goto err_irq;
}
ret = register_netdev(ndev);
if (ret) {
dev_err(&spi->dev, "failed to register network device\n");
+ printk("Network ethernet failed to register network device\r\n");
goto err_netdev;
}
netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
CIDER_REV_GET(cider), ndev->dev_addr, ndev->irq,
ks->rc_ccr & CCR_EEPROM ? "has" : "no");
+ printk("revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
+ CIDER_REV_GET(cider), ndev->dev_addr, ndev->irq,
+ ks->rc_ccr & CCR_EEPROM ? "has" : "no");
return 0;
@@ -1556,6 +1643,8 @@ MODULE_DESCRIPTION("KS8851 Network driver");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_LICENSE("GPL");
+module_param_named(hwaddr, hwaddr_string, charp, 0000);
+
module_param_named(message, msg_enable, int, 0);
MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");
MODULE_ALIAS("spi:ks8851");
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
index edd63f12..cd5ae881 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
@@ -1500,12 +1500,6 @@ int qlcnic_83xx_loopback_test(struct net_device *netdev, u8 mode)
}
} while ((adapter->ahw->linkup && ahw->has_link_events) != 1);
- /* Make sure carrier is off and queue is stopped during loopback */
- if (netif_running(netdev)) {
- netif_carrier_off(netdev);
- netif_stop_queue(netdev);
- }
-
ret = qlcnic_do_lb_test(adapter, mode);
qlcnic_83xx_clear_lb_mode(adapter, mode);
@@ -2786,7 +2780,6 @@ static u64 *qlcnic_83xx_fill_stats(struct qlcnic_adapter *adapter,
void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data)
{
struct qlcnic_cmd_args cmd;
- struct net_device *netdev = adapter->netdev;
int ret = 0;
qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_STATISTICS);
@@ -2796,7 +2789,7 @@ void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data)
data = qlcnic_83xx_fill_stats(adapter, &cmd, data,
QLC_83XX_STAT_TX, &ret);
if (ret) {
- netdev_err(netdev, "Error getting Tx stats\n");
+ dev_info(&adapter->pdev->dev, "Error getting MAC stats\n");
goto out;
}
/* Get MAC stats */
@@ -2806,7 +2799,8 @@ void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data)
data = qlcnic_83xx_fill_stats(adapter, &cmd, data,
QLC_83XX_STAT_MAC, &ret);
if (ret) {
- netdev_err(netdev, "Error getting MAC stats\n");
+ dev_info(&adapter->pdev->dev,
+ "Error getting Rx stats\n");
goto out;
}
/* Get Rx stats */
@@ -2816,7 +2810,8 @@ void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data)
data = qlcnic_83xx_fill_stats(adapter, &cmd, data,
QLC_83XX_STAT_RX, &ret);
if (ret)
- netdev_err(netdev, "Error getting Rx stats\n");
+ dev_info(&adapter->pdev->dev,
+ "Error getting Tx stats\n");
out:
qlcnic_free_mbx_args(&cmd);
}
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
index 5fa847fe..0e630061 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
@@ -358,7 +358,8 @@ set_flags:
memcpy(&first_desc->eth_addr, skb->data, ETH_ALEN);
}
opcode = TX_ETHER_PKT;
- if (skb_is_gso(skb)) {
+ if ((adapter->netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) &&
+ skb_shinfo(skb)->gso_size > 0) {
hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
first_desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
first_desc->total_hdr_length = hdr_len;
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
index 5ef328af..987fb6f8 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
@@ -200,10 +200,10 @@ beacon_err:
}
err = qlcnic_config_led(adapter, b_state, b_rate);
- if (!err) {
+ if (!err)
err = len;
+ else
ahw->beacon_state = b_state;
- }
if (test_and_clear_bit(__QLCNIC_DIAG_RES_ALLOC, &adapter->state))
qlcnic_diag_free_res(adapter->netdev, max_sds_rings);
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge.h b/drivers/net/ethernet/qlogic/qlge/qlge.h
index 7e8d6826..a131d7b5 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge.h
+++ b/drivers/net/ethernet/qlogic/qlge/qlge.h
@@ -18,7 +18,7 @@
*/
#define DRV_NAME "qlge"
#define DRV_STRING "QLogic 10 Gigabit PCI-E Ethernet Driver "
-#define DRV_VERSION "v1.00.00.32"
+#define DRV_VERSION "v1.00.00.31"
#define WQ_ADDR_ALIGN 0x3 /* 4 byte alignment */
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c b/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c
index 0780e039..6f316ab2 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c
@@ -379,13 +379,13 @@ static int ql_get_settings(struct net_device *ndev,
ecmd->supported = SUPPORTED_10000baseT_Full;
ecmd->advertising = ADVERTISED_10000baseT_Full;
+ ecmd->autoneg = AUTONEG_ENABLE;
ecmd->transceiver = XCVR_EXTERNAL;
if ((qdev->link_status & STS_LINK_TYPE_MASK) ==
STS_LINK_TYPE_10GBASET) {
ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
ecmd->advertising |= (ADVERTISED_TP | ADVERTISED_Autoneg);
ecmd->port = PORT_TP;
- ecmd->autoneg = AUTONEG_ENABLE;
} else {
ecmd->supported |= SUPPORTED_FIBRE;
ecmd->advertising |= ADVERTISED_FIBRE;
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
index 8033555e..b13ab544 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge_main.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
@@ -1434,13 +1434,11 @@ map_error:
}
/* Categorizing receive firmware frame errors */
-static void ql_categorize_rx_err(struct ql_adapter *qdev, u8 rx_err,
- struct rx_ring *rx_ring)
+static void ql_categorize_rx_err(struct ql_adapter *qdev, u8 rx_err)
{
struct nic_stats *stats = &qdev->nic_stats;
stats->rx_err_count++;
- rx_ring->rx_errors++;
switch (rx_err & IB_MAC_IOCB_RSP_ERR_MASK) {
case IB_MAC_IOCB_RSP_ERR_CODE_ERR:
@@ -1476,12 +1474,6 @@ static void ql_process_mac_rx_gro_page(struct ql_adapter *qdev,
struct bq_desc *lbq_desc = ql_get_curr_lchunk(qdev, rx_ring);
struct napi_struct *napi = &rx_ring->napi;
- /* Frame error, so drop the packet. */
- if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) {
- ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring);
- put_page(lbq_desc->p.pg_chunk.page);
- return;
- }
napi->dev = qdev->ndev;
skb = napi_get_frags(napi);
@@ -1537,12 +1529,6 @@ static void ql_process_mac_rx_page(struct ql_adapter *qdev,
addr = lbq_desc->p.pg_chunk.va;
prefetch(addr);
- /* Frame error, so drop the packet. */
- if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) {
- ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring);
- goto err_out;
- }
-
/* The max framesize filter on this chip is set higher than
* MTU since FCoE uses 2k frames.
*/
@@ -1628,13 +1614,6 @@ static void ql_process_mac_rx_skb(struct ql_adapter *qdev,
memcpy(skb_put(new_skb, length), skb->data, length);
skb = new_skb;
- /* Frame error, so drop the packet. */
- if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) {
- ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring);
- dev_kfree_skb_any(skb);
- return;
- }
-
/* loopback self test for ethtool */
if (test_bit(QL_SELFTEST, &qdev->flags)) {
ql_check_lb_frame(qdev, skb);
@@ -1940,13 +1919,6 @@ static void ql_process_mac_split_rx_intr(struct ql_adapter *qdev,
return;
}
- /* Frame error, so drop the packet. */
- if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) {
- ql_categorize_rx_err(qdev, ib_mac_rsp->flags2, rx_ring);
- dev_kfree_skb_any(skb);
- return;
- }
-
/* The max framesize filter on this chip is set higher than
* MTU since FCoE uses 2k frames.
*/
@@ -2028,6 +2000,12 @@ static unsigned long ql_process_mac_rx_intr(struct ql_adapter *qdev,
QL_DUMP_IB_MAC_RSP(ib_mac_rsp);
+ /* Frame error, so drop the packet. */
+ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) {
+ ql_categorize_rx_err(qdev, ib_mac_rsp->flags2);
+ return (unsigned long)length;
+ }
+
if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) {
/* The data and headers are split into
* separate buffers.
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index 50617c5a..0c74a702 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -149,7 +149,6 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
{
writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
- writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK);
}
/* This reads the MAC core counters (if actaully supported).
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 4781d3d8..80cad06e 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -1380,7 +1380,7 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
if (data->dual_emac) {
- if (of_property_read_u32(slave_node, "dual_emac_res_vlan",
+ if (of_property_read_u32(node, "dual_emac_res_vlan",
&prop)) {
pr_err("Missing dual_emac_res_vlan in DT.\n");
slave_data->dual_emac_res_vlan = i+1;
diff --git a/drivers/net/hyperv/netvsc.c b/drivers/net/hyperv/netvsc.c
index f5f0f09e..1cd77483 100644
--- a/drivers/net/hyperv/netvsc.c
+++ b/drivers/net/hyperv/netvsc.c
@@ -470,10 +470,8 @@ static void netvsc_send_completion(struct hv_device *device,
packet->trans_id;
/* Notify the layer above us */
- if (nvsc_packet)
- nvsc_packet->completion.send.send_completion(
- nvsc_packet->completion.send.
- send_completion_ctx);
+ nvsc_packet->completion.send.send_completion(
+ nvsc_packet->completion.send.send_completion_ctx);
num_outstanding_sends =
atomic_dec_return(&net_device->num_outstanding_sends);
@@ -500,7 +498,6 @@ int netvsc_send(struct hv_device *device,
int ret = 0;
struct nvsp_message sendMessage;
struct net_device *ndev;
- u64 req_id;
net_device = get_outbound_net_device(device);
if (!net_device)
@@ -521,24 +518,20 @@ int netvsc_send(struct hv_device *device,
0xFFFFFFFF;
sendMessage.msg.v1_msg.send_rndis_pkt.send_buf_section_size = 0;
- if (packet->completion.send.send_completion)
- req_id = (u64)packet;
- else
- req_id = 0;
-
if (packet->page_buf_cnt) {
ret = vmbus_sendpacket_pagebuffer(device->channel,
packet->page_buf,
packet->page_buf_cnt,
&sendMessage,
sizeof(struct nvsp_message),
- req_id);
+ (unsigned long)packet);
} else {
ret = vmbus_sendpacket(device->channel, &sendMessage,
sizeof(struct nvsp_message),
- req_id,
+ (unsigned long)packet,
VM_PKT_DATA_INBAND,
VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
+
}
if (ret == 0) {
diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index 8341b62e..5f85205c 100644
--- a/drivers/net/hyperv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -241,11 +241,13 @@ void netvsc_linkstatus_callback(struct hv_device *device_obj,
if (status == 1) {
netif_carrier_on(net);
+ netif_wake_queue(net);
ndev_ctx = netdev_priv(net);
schedule_delayed_work(&ndev_ctx->dwork, 0);
schedule_delayed_work(&ndev_ctx->dwork, msecs_to_jiffies(20));
} else {
netif_carrier_off(net);
+ netif_tx_disable(net);
}
}
diff --git a/drivers/net/hyperv/rndis_filter.c b/drivers/net/hyperv/rndis_filter.c
index 0775f0ae..2b657d4d 100644
--- a/drivers/net/hyperv/rndis_filter.c
+++ b/drivers/net/hyperv/rndis_filter.c
@@ -61,6 +61,9 @@ struct rndis_request {
static void rndis_filter_send_completion(void *ctx);
+static void rndis_filter_send_request_completion(void *ctx);
+
+
static struct rndis_device *get_rndis_device(void)
{
@@ -238,7 +241,10 @@ static int rndis_filter_send_request(struct rndis_device *dev,
packet->page_buf[0].len;
}
- packet->completion.send.send_completion = NULL;
+ packet->completion.send.send_completion_ctx = req;/* packet; */
+ packet->completion.send.send_completion =
+ rndis_filter_send_request_completion;
+ packet->completion.send.send_completion_tid = (unsigned long)dev;
ret = netvsc_send(dev->net_dev->dev, packet);
return ret;
@@ -993,3 +999,9 @@ static void rndis_filter_send_completion(void *ctx)
/* Pass it back to the original handler */
filter_pkt->completion(filter_pkt->completion_ctx);
}
+
+
+static void rndis_filter_send_request_completion(void *ctx)
+{
+ /* Noop */
+}
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 729ed533..b7c457ad 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1594,7 +1594,7 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)
if (tun->flags & TUN_TAP_MQ &&
(tun->numqueues + tun->numdisabled > 1))
- return -EBUSY;
+ return err;
}
else {
char *name;
diff --git a/drivers/net/usb/cdc_mbim.c b/drivers/net/usb/cdc_mbim.c
index 6bd91676..16c84299 100644
--- a/drivers/net/usb/cdc_mbim.c
+++ b/drivers/net/usb/cdc_mbim.c
@@ -134,7 +134,7 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb
goto error;
if (skb) {
- if (skb->len <= ETH_HLEN)
+ if (skb->len <= sizeof(ETH_HLEN))
goto error;
/* mapping VLANs to MBIM sessions:
diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index 2a3579f6..968d5d50 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -13,7 +13,6 @@
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/ethtool.h>
-#include <linux/etherdevice.h>
#include <linux/mii.h>
#include <linux/usb.h>
#include <linux/usb/cdc.h>
@@ -53,96 +52,6 @@ struct qmi_wwan_state {
struct usb_interface *data;
};
-/* default ethernet address used by the modem */
-static const u8 default_modem_addr[ETH_ALEN] = {0x02, 0x50, 0xf3};
-
-/* Make up an ethernet header if the packet doesn't have one.
- *
- * A firmware bug common among several devices cause them to send raw
- * IP packets under some circumstances. There is no way for the
- * driver/host to know when this will happen. And even when the bug
- * hits, some packets will still arrive with an intact header.
- *
- * The supported devices are only capably of sending IPv4, IPv6 and
- * ARP packets on a point-to-point link. Any packet with an ethernet
- * header will have either our address or a broadcast/multicast
- * address as destination. ARP packets will always have a header.
- *
- * This means that this function will reliably add the appropriate
- * header iff necessary, provided our hardware address does not start
- * with 4 or 6.
- *
- * Another common firmware bug results in all packets being addressed
- * to 00:a0:c6:00:00:00 despite the host address being different.
- * This function will also fixup such packets.
- */
-static int qmi_wwan_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
-{
- __be16 proto;
-
- /* usbnet rx_complete guarantees that skb->len is at least
- * hard_header_len, so we can inspect the dest address without
- * checking skb->len
- */
- switch (skb->data[0] & 0xf0) {
- case 0x40:
- proto = htons(ETH_P_IP);
- break;
- case 0x60:
- proto = htons(ETH_P_IPV6);
- break;
- case 0x00:
- if (is_multicast_ether_addr(skb->data))
- return 1;
- /* possibly bogus destination - rewrite just in case */
- skb_reset_mac_header(skb);
- goto fix_dest;
- default:
- /* pass along other packets without modifications */
- return 1;
- }
- if (skb_headroom(skb) < ETH_HLEN)
- return 0;
- skb_push(skb, ETH_HLEN);
- skb_reset_mac_header(skb);
- eth_hdr(skb)->h_proto = proto;
- memset(eth_hdr(skb)->h_source, 0, ETH_ALEN);
-fix_dest:
- memcpy(eth_hdr(skb)->h_dest, dev->net->dev_addr, ETH_ALEN);
- return 1;
-}
-
-/* very simplistic detection of IPv4 or IPv6 headers */
-static bool possibly_iphdr(const char *data)
-{
- return (data[0] & 0xd0) == 0x40;
-}
-
-/* disallow addresses which may be confused with IP headers */
-static int qmi_wwan_mac_addr(struct net_device *dev, void *p)
-{
- int ret;
- struct sockaddr *addr = p;
-
- ret = eth_prepare_mac_addr_change(dev, p);
- if (ret < 0)
- return ret;
- if (possibly_iphdr(addr->sa_data))
- return -EADDRNOTAVAIL;
- eth_commit_mac_addr_change(dev, p);
- return 0;
-}
-
-static const struct net_device_ops qmi_wwan_netdev_ops = {
- .ndo_open = usbnet_open,
- .ndo_stop = usbnet_stop,
- .ndo_start_xmit = usbnet_start_xmit,
- .ndo_tx_timeout = usbnet_tx_timeout,
- .ndo_change_mtu = usbnet_change_mtu,
- .ndo_set_mac_address = qmi_wwan_mac_addr,
- .ndo_validate_addr = eth_validate_addr,
-};
-
/* using a counter to merge subdriver requests with our own into a combined state */
static int qmi_wwan_manage_power(struct usbnet *dev, int on)
{
@@ -320,18 +229,6 @@ next_desc:
usb_driver_release_interface(driver, info->data);
}
- /* Never use the same address on both ends of the link, even
- * if the buggy firmware told us to.
- */
- if (!compare_ether_addr(dev->net->dev_addr, default_modem_addr))
- eth_hw_addr_random(dev->net);
-
- /* make MAC addr easily distinguishable from an IP header */
- if (possibly_iphdr(dev->net->dev_addr)) {
- dev->net->dev_addr[0] |= 0x02; /* set local assignment bit */
- dev->net->dev_addr[0] &= 0xbf; /* clear "IP" bit */
- }
- dev->net->netdev_ops = &qmi_wwan_netdev_ops;
err:
return status;
}
@@ -410,7 +307,6 @@ static const struct driver_info qmi_wwan_info = {
.bind = qmi_wwan_bind,
.unbind = qmi_wwan_unbind,
.manage_power = qmi_wwan_manage_power,
- .rx_fixup = qmi_wwan_rx_fixup,
};
#define HUAWEI_VENDOR_ID 0x12D1
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index f8f0156d..bce25a74 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -45,6 +45,16 @@ config LIBERTAS_THINFIRM_DEBUG
---help---
Debugging support.
+config LIBERTAS_THINFIRM_SDIO
+ tristate "Marvell Libertas 8686 SDIO 802.11b/g cards"
+ depends on LIBERTAS_THINFIRM && MMC
+ ---help---
+ A driver for Marvell Libertas 8686 SDIO devices and those that include
+ the 88W8686 core, such as the Wi2Wi devices. Special SDIO specific
+ firmware is required to use this driver, see the OLPC site for details:
+
+ <http://wiki.laptop.org/go/Thinfirm_1.5>
+
config LIBERTAS_THINFIRM_USB
tristate "Marvell Libertas 8388 USB 802.11b/g cards with thin firmware"
depends on LIBERTAS_THINFIRM && USB
@@ -277,6 +287,7 @@ source "drivers/net/wireless/orinoco/Kconfig"
source "drivers/net/wireless/p54/Kconfig"
source "drivers/net/wireless/rt2x00/Kconfig"
source "drivers/net/wireless/rtlwifi/Kconfig"
+source "drivers/net/wireless/sd8686_uap/Kconfig"
source "drivers/net/wireless/ti/Kconfig"
source "drivers/net/wireless/zd1211rw/Kconfig"
source "drivers/net/wireless/mwifiex/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 67156efe..8b457595 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_ZD1211RW) += zd1211rw/
obj-$(CONFIG_RTL8180) += rtl818x/
obj-$(CONFIG_RTL8187) += rtl818x/
obj-$(CONFIG_RTLWIFI) += rtlwifi/
+obj-$(CONFIG_SD8686_UAP) += sd8686_uap/
# 16-bit wireless PCMCIA client drivers
obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o
diff --git a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
index bdee2ed6..28fd9920 100644
--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
@@ -519,7 +519,7 @@ static const u32 ar9580_1p0_mac_core[][2] = {
{0x00008258, 0x00000000},
{0x0000825c, 0x40000000},
{0x00008260, 0x00080922},
- {0x00008264, 0x9d400010},
+ {0x00008264, 0x9bc00010},
{0x00008268, 0xffffffff},
{0x0000826c, 0x0000ffff},
{0x00008270, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c
index 73fe8d6d..467b6001 100644
--- a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c
+++ b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c
@@ -143,14 +143,14 @@ channel_detector_create(struct dfs_pattern_detector *dpd, u16 freq)
u32 sz, i;
struct channel_detector *cd;
- cd = kmalloc(sizeof(*cd), GFP_ATOMIC);
+ cd = kmalloc(sizeof(*cd), GFP_KERNEL);
if (cd == NULL)
goto fail;
INIT_LIST_HEAD(&cd->head);
cd->freq = freq;
sz = sizeof(cd->detectors) * dpd->num_radar_types;
- cd->detectors = kzalloc(sz, GFP_ATOMIC);
+ cd->detectors = kzalloc(sz, GFP_KERNEL);
if (cd->detectors == NULL)
goto fail;
diff --git a/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c b/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c
index 5e48c551..91b8dcee 100644
--- a/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c
+++ b/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c
@@ -218,7 +218,7 @@ static bool pulse_queue_enqueue(struct pri_detector *pde, u64 ts)
{
struct pulse_elem *p = pool_get_pulse_elem();
if (p == NULL) {
- p = kmalloc(sizeof(*p), GFP_ATOMIC);
+ p = kmalloc(sizeof(*p), GFP_KERNEL);
if (p == NULL) {
DFS_POOL_STAT_INC(pulse_alloc_error);
return false;
@@ -299,7 +299,7 @@ static bool pseq_handler_create_sequences(struct pri_detector *pde,
ps.deadline_ts = ps.first_ts + ps.dur;
new_ps = pool_get_pseq_elem();
if (new_ps == NULL) {
- new_ps = kmalloc(sizeof(*new_ps), GFP_ATOMIC);
+ new_ps = kmalloc(sizeof(*new_ps), GFP_KERNEL);
if (new_ps == NULL) {
DFS_POOL_STAT_INC(pseq_alloc_error);
return false;
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
index a47f5e05..716058b6 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
@@ -796,7 +796,7 @@ static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
* required version.
*/
if (priv->fw_version_major != MAJOR_VERSION_REQ ||
- priv->fw_version_minor < MINOR_VERSION_REQ) {
+ priv->fw_version_minor != MINOR_VERSION_REQ) {
dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
return -EINVAL;
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 811007ec..7da15214 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -689,7 +689,7 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset)
{
#define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */
struct ath_common *common = ath9k_hw_common(ah);
- u32 mac_status, last_mac_status = 0;
+ u32 mac_status = 0, last_mac_status = 0;
int i;
/* Enable access to the DMA observation bus */
@@ -719,6 +719,15 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset)
}
if (i == 0) {
+ if (!AR_SREV_9300_20_OR_LATER(ah) && (mac_status & 0x700) == 0) {
+ /*
+ * DMA is idle but the MAC is still stuck
+ * processing events
+ */
+ *reset = true;
+ return true;
+ }
+
ath_err(common,
"DMA failed to stop in %d ms AR_CR=0x%08x AR_DIAG_SW=0x%08x DMADBG_7=0x%08x\n",
AH_RX_STOP_DMA_TIMEOUT / 1000,
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 988372d2..6e66f9c6 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -280,10 +280,6 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
if (r) {
ath_err(common,
"Unable to reset channel, reset status %d\n", r);
-
- ath9k_hw_enable_interrupts(ah);
- ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
-
goto out;
}
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index b70f220b..e8486c1e 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -5165,8 +5165,7 @@ static void b43_nphy_pmu_spur_avoid(struct b43_wldev *dev, bool avoid)
#endif
#ifdef CONFIG_B43_SSB
case B43_BUS_SSB:
- ssb_pmu_spuravoid_pllupdate(&dev->dev->sdev->bus->chipco,
- avoid);
+ /* FIXME */
break;
#endif
}
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
index 35fc68be..4469321c 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
@@ -3317,15 +3317,15 @@ static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
goto err;
}
+ /* External image takes precedence if specified */
if (brcmf_sdbrcm_download_code_file(bus)) {
brcmf_err("dongle image file download failed\n");
goto err;
}
- if (brcmf_sdbrcm_download_nvram(bus)) {
+ /* External nvram takes precedence if specified */
+ if (brcmf_sdbrcm_download_nvram(bus))
brcmf_err("dongle nvram file download failed\n");
- goto err;
- }
/* Take arm out of reset */
if (brcmf_sdbrcm_download_state(bus, false)) {
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
index 78da3eff..2af9c0f0 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
@@ -1891,10 +1891,8 @@ static s32
brcmf_add_keyext(struct wiphy *wiphy, struct net_device *ndev,
u8 key_idx, const u8 *mac_addr, struct key_params *params)
{
- struct brcmf_if *ifp = netdev_priv(ndev);
struct brcmf_wsec_key key;
s32 err = 0;
- u8 keybuf[8];
memset(&key, 0, sizeof(key));
key.index = (u32) key_idx;
@@ -1918,9 +1916,8 @@ brcmf_add_keyext(struct wiphy *wiphy, struct net_device *ndev,
brcmf_dbg(CONN, "Setting the key index %d\n", key.index);
memcpy(key.data, params->key, key.len);
- if ((ifp->vif->mode != WL_MODE_AP) &&
- (params->cipher == WLAN_CIPHER_SUITE_TKIP)) {
- brcmf_dbg(CONN, "Swapping RX/TX MIC key\n");
+ if (params->cipher == WLAN_CIPHER_SUITE_TKIP) {
+ u8 keybuf[8];
memcpy(keybuf, &key.data[24], sizeof(keybuf));
memcpy(&key.data[24], &key.data[16], sizeof(keybuf));
memcpy(&key.data[16], keybuf, sizeof(keybuf));
@@ -2016,7 +2013,7 @@ brcmf_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
break;
case WLAN_CIPHER_SUITE_TKIP:
if (ifp->vif->mode != WL_MODE_AP) {
- brcmf_dbg(CONN, "Swapping RX/TX MIC key\n");
+ brcmf_dbg(CONN, "Swapping key\n");
memcpy(keybuf, &key.data[24], sizeof(keybuf));
memcpy(&key.data[24], &key.data[16], sizeof(keybuf));
memcpy(&key.data[16], keybuf, sizeof(keybuf));
@@ -2121,7 +2118,8 @@ brcmf_cfg80211_get_key(struct wiphy *wiphy, struct net_device *ndev,
err = -EAGAIN;
goto done;
}
- if (wsec & WEP_ENABLED) {
+ switch (wsec & ~SES_OW_ENABLED) {
+ case WEP_ENABLED:
sec = &profile->sec;
if (sec->cipher_pairwise & WLAN_CIPHER_SUITE_WEP40) {
params.cipher = WLAN_CIPHER_SUITE_WEP40;
@@ -2130,13 +2128,16 @@ brcmf_cfg80211_get_key(struct wiphy *wiphy, struct net_device *ndev,
params.cipher = WLAN_CIPHER_SUITE_WEP104;
brcmf_dbg(CONN, "WLAN_CIPHER_SUITE_WEP104\n");
}
- } else if (wsec & TKIP_ENABLED) {
+ break;
+ case TKIP_ENABLED:
params.cipher = WLAN_CIPHER_SUITE_TKIP;
brcmf_dbg(CONN, "WLAN_CIPHER_SUITE_TKIP\n");
- } else if (wsec & AES_ENABLED) {
+ break;
+ case AES_ENABLED:
params.cipher = WLAN_CIPHER_SUITE_AES_CMAC;
brcmf_dbg(CONN, "WLAN_CIPHER_SUITE_AES_CMAC\n");
- } else {
+ break;
+ default:
brcmf_err("Invalid algo (0x%x)\n", wsec);
err = -EINVAL;
goto done;
@@ -3823,9 +3824,8 @@ exit:
static int brcmf_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev)
{
struct brcmf_if *ifp = netdev_priv(ndev);
- s32 err;
+ s32 err = -EPERM;
struct brcmf_fil_bss_enable_le bss_enable;
- struct brcmf_join_params join_params;
brcmf_dbg(TRACE, "Enter\n");
@@ -3833,21 +3833,16 @@ static int brcmf_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev)
/* Due to most likely deauths outstanding we sleep */
/* first to make sure they get processed by fw. */
msleep(400);
-
- memset(&join_params, 0, sizeof(join_params));
- err = brcmf_fil_cmd_data_set(ifp, BRCMF_C_SET_SSID,
- &join_params, sizeof(join_params));
- if (err < 0)
- brcmf_err("SET SSID error (%d)\n", err);
- err = brcmf_fil_cmd_int_set(ifp, BRCMF_C_UP, 0);
- if (err < 0)
- brcmf_err("BRCMF_C_UP error %d\n", err);
err = brcmf_fil_cmd_int_set(ifp, BRCMF_C_SET_AP, 0);
- if (err < 0)
+ if (err < 0) {
brcmf_err("setting AP mode failed %d\n", err);
- err = brcmf_fil_cmd_int_set(ifp, BRCMF_C_SET_INFRA, 0);
- if (err < 0)
- brcmf_err("setting INFRA mode failed %d\n", err);
+ goto exit;
+ }
+ err = brcmf_fil_cmd_int_set(ifp, BRCMF_C_UP, 0);
+ if (err < 0) {
+ brcmf_err("BRCMF_C_UP error %d\n", err);
+ goto exit;
+ }
} else {
bss_enable.bsscfg_idx = cpu_to_le32(ifp->bssidx);
bss_enable.enable = cpu_to_le32(0);
@@ -3860,6 +3855,7 @@ static int brcmf_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev)
set_bit(BRCMF_VIF_STATUS_AP_CREATING, &ifp->vif->sme_state);
clear_bit(BRCMF_VIF_STATUS_AP_CREATED, &ifp->vif->sme_state);
+exit:
return err;
}
@@ -4126,6 +4122,10 @@ static const struct ieee80211_iface_limit brcmf_iface_limits[] = {
BIT(NL80211_IFTYPE_ADHOC) |
BIT(NL80211_IFTYPE_AP)
},
+ {
+ .max = 1,
+ .types = BIT(NL80211_IFTYPE_P2P_DEVICE)
+ },
{
.max = 1,
.types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
@@ -4183,7 +4183,8 @@ static struct wiphy *brcmf_setup_wiphy(struct device *phydev)
BIT(NL80211_IFTYPE_ADHOC) |
BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_P2P_CLIENT) |
- BIT(NL80211_IFTYPE_P2P_GO);
+ BIT(NL80211_IFTYPE_P2P_GO) |
+ BIT(NL80211_IFTYPE_P2P_DEVICE);
wiphy->iface_combinations = brcmf_iface_combos;
wiphy->n_iface_combinations = ARRAY_SIZE(brcmf_iface_combos);
wiphy->bands[IEEE80211_BAND_2GHZ] = &__wl_band_2ghz;
diff --git a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
index e2340b23..c6451c61 100644
--- a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
+++ b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
@@ -274,130 +274,6 @@ static void brcms_set_basic_rate(struct brcm_rateset *rs, u16 rate, bool is_br)
}
}
-/**
- * This function frees the WL per-device resources.
- *
- * This function frees resources owned by the WL device pointed to
- * by the wl parameter.
- *
- * precondition: can both be called locked and unlocked
- *
- */
-static void brcms_free(struct brcms_info *wl)
-{
- struct brcms_timer *t, *next;
-
- /* free ucode data */
- if (wl->fw.fw_cnt)
- brcms_ucode_data_free(&wl->ucode);
- if (wl->irq)
- free_irq(wl->irq, wl);
-
- /* kill dpc */
- tasklet_kill(&wl->tasklet);
-
- if (wl->pub) {
- brcms_debugfs_detach(wl->pub);
- brcms_c_module_unregister(wl->pub, "linux", wl);
- }
-
- /* free common resources */
- if (wl->wlc) {
- brcms_c_detach(wl->wlc);
- wl->wlc = NULL;
- wl->pub = NULL;
- }
-
- /* virtual interface deletion is deferred so we cannot spinwait */
-
- /* wait for all pending callbacks to complete */
- while (atomic_read(&wl->callbacks) > 0)
- schedule();
-
- /* free timers */
- for (t = wl->timers; t; t = next) {
- next = t->next;
-#ifdef DEBUG
- kfree(t->name);
-#endif
- kfree(t);
- }
-}
-
-/*
-* called from both kernel as from this kernel module (error flow on attach)
-* precondition: perimeter lock is not acquired.
-*/
-static void brcms_remove(struct bcma_device *pdev)
-{
- struct ieee80211_hw *hw = bcma_get_drvdata(pdev);
- struct brcms_info *wl = hw->priv;
-
- if (wl->wlc) {
- wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false);
- wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy);
- ieee80211_unregister_hw(hw);
- }
-
- brcms_free(wl);
-
- bcma_set_drvdata(pdev, NULL);
- ieee80211_free_hw(hw);
-}
-
-/*
- * Precondition: Since this function is called in brcms_pci_probe() context,
- * no locking is required.
- */
-static void brcms_release_fw(struct brcms_info *wl)
-{
- int i;
- for (i = 0; i < MAX_FW_IMAGES; i++) {
- release_firmware(wl->fw.fw_bin[i]);
- release_firmware(wl->fw.fw_hdr[i]);
- }
-}
-
-/*
- * Precondition: Since this function is called in brcms_pci_probe() context,
- * no locking is required.
- */
-static int brcms_request_fw(struct brcms_info *wl, struct bcma_device *pdev)
-{
- int status;
- struct device *device = &pdev->dev;
- char fw_name[100];
- int i;
-
- memset(&wl->fw, 0, sizeof(struct brcms_firmware));
- for (i = 0; i < MAX_FW_IMAGES; i++) {
- if (brcms_firmwares[i] == NULL)
- break;
- sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i],
- UCODE_LOADER_API_VER);
- status = request_firmware(&wl->fw.fw_bin[i], fw_name, device);
- if (status) {
- wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n",
- KBUILD_MODNAME, fw_name);
- return status;
- }
- sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i],
- UCODE_LOADER_API_VER);
- status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device);
- if (status) {
- wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n",
- KBUILD_MODNAME, fw_name);
- return status;
- }
- wl->fw.hdr_num_entries[i] =
- wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr));
- }
- wl->fw.fw_cnt = i;
- status = brcms_ucode_data_init(wl, &wl->ucode);
- brcms_release_fw(wl);
- return status;
-}
-
static void brcms_ops_tx(struct ieee80211_hw *hw,
struct ieee80211_tx_control *control,
struct sk_buff *skb)
@@ -430,14 +306,6 @@ static int brcms_ops_start(struct ieee80211_hw *hw)
if (!blocked)
wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy);
- if (!wl->ucode.bcm43xx_bomminor) {
- err = brcms_request_fw(wl, wl->wlc->hw->d11core);
- if (err) {
- brcms_remove(wl->wlc->hw->d11core);
- return -ENOENT;
- }
- }
-
spin_lock_bh(&wl->lock);
/* avoid acknowledging frames before a non-monitor device is added */
wl->mute_tx = true;
@@ -925,6 +793,128 @@ void brcms_dpc(unsigned long data)
wake_up(&wl->tx_flush_wq);
}
+/*
+ * Precondition: Since this function is called in brcms_pci_probe() context,
+ * no locking is required.
+ */
+static int brcms_request_fw(struct brcms_info *wl, struct bcma_device *pdev)
+{
+ int status;
+ struct device *device = &pdev->dev;
+ char fw_name[100];
+ int i;
+
+ memset(&wl->fw, 0, sizeof(struct brcms_firmware));
+ for (i = 0; i < MAX_FW_IMAGES; i++) {
+ if (brcms_firmwares[i] == NULL)
+ break;
+ sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i],
+ UCODE_LOADER_API_VER);
+ status = request_firmware(&wl->fw.fw_bin[i], fw_name, device);
+ if (status) {
+ wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n",
+ KBUILD_MODNAME, fw_name);
+ return status;
+ }
+ sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i],
+ UCODE_LOADER_API_VER);
+ status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device);
+ if (status) {
+ wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n",
+ KBUILD_MODNAME, fw_name);
+ return status;
+ }
+ wl->fw.hdr_num_entries[i] =
+ wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr));
+ }
+ wl->fw.fw_cnt = i;
+ return brcms_ucode_data_init(wl, &wl->ucode);
+}
+
+/*
+ * Precondition: Since this function is called in brcms_pci_probe() context,
+ * no locking is required.
+ */
+static void brcms_release_fw(struct brcms_info *wl)
+{
+ int i;
+ for (i = 0; i < MAX_FW_IMAGES; i++) {
+ release_firmware(wl->fw.fw_bin[i]);
+ release_firmware(wl->fw.fw_hdr[i]);
+ }
+}
+
+/**
+ * This function frees the WL per-device resources.
+ *
+ * This function frees resources owned by the WL device pointed to
+ * by the wl parameter.
+ *
+ * precondition: can both be called locked and unlocked
+ *
+ */
+static void brcms_free(struct brcms_info *wl)
+{
+ struct brcms_timer *t, *next;
+
+ /* free ucode data */
+ if (wl->fw.fw_cnt)
+ brcms_ucode_data_free(&wl->ucode);
+ if (wl->irq)
+ free_irq(wl->irq, wl);
+
+ /* kill dpc */
+ tasklet_kill(&wl->tasklet);
+
+ if (wl->pub) {
+ brcms_debugfs_detach(wl->pub);
+ brcms_c_module_unregister(wl->pub, "linux", wl);
+ }
+
+ /* free common resources */
+ if (wl->wlc) {
+ brcms_c_detach(wl->wlc);
+ wl->wlc = NULL;
+ wl->pub = NULL;
+ }
+
+ /* virtual interface deletion is deferred so we cannot spinwait */
+
+ /* wait for all pending callbacks to complete */
+ while (atomic_read(&wl->callbacks) > 0)
+ schedule();
+
+ /* free timers */
+ for (t = wl->timers; t; t = next) {
+ next = t->next;
+#ifdef DEBUG
+ kfree(t->name);
+#endif
+ kfree(t);
+ }
+}
+
+/*
+* called from both kernel as from this kernel module (error flow on attach)
+* precondition: perimeter lock is not acquired.
+*/
+static void brcms_remove(struct bcma_device *pdev)
+{
+ struct ieee80211_hw *hw = bcma_get_drvdata(pdev);
+ struct brcms_info *wl = hw->priv;
+
+ if (wl->wlc) {
+ wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false);
+ wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy);
+ ieee80211_unregister_hw(hw);
+ }
+
+ brcms_free(wl);
+
+ bcma_set_drvdata(pdev, NULL);
+ ieee80211_free_hw(hw);
+}
+
static irqreturn_t brcms_isr(int irq, void *dev_id)
{
struct brcms_info *wl;
@@ -1057,8 +1047,18 @@ static struct brcms_info *brcms_attach(struct bcma_device *pdev)
spin_lock_init(&wl->lock);
spin_lock_init(&wl->isr_lock);
+ /* prepare ucode */
+ if (brcms_request_fw(wl, pdev) < 0) {
+ wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in "
+ "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm");
+ brcms_release_fw(wl);
+ brcms_remove(pdev);
+ return NULL;
+ }
+
/* common load-time initialization */
wl->wlc = brcms_c_attach((void *)wl, pdev, unit, false, &err);
+ brcms_release_fw(wl);
if (!wl->wlc) {
wiphy_err(wl->wiphy, "%s: attach() failed with code %d\n",
KBUILD_MODNAME, err);
diff --git a/drivers/net/wireless/libertas/cmd.h b/drivers/net/wireless/libertas/cmd.h
index 4279e8ab..38298e05 100644
--- a/drivers/net/wireless/libertas/cmd.h
+++ b/drivers/net/wireless/libertas/cmd.h
@@ -8,6 +8,9 @@
#include "host.h"
#include "dev.h"
+// added by Gol
+#define HZ 1000
+
/* Command & response transfer between host and card */
diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c
index 45578335..b0330788 100644
--- a/drivers/net/wireless/libertas/if_sdio.c
+++ b/drivers/net/wireless/libertas/if_sdio.c
@@ -1088,9 +1088,11 @@ static void if_sdio_reset_card_worker(struct work_struct *work)
* instance for that reason.
*/
- pr_info("Resetting card...");
- mmc_remove_host(reset_host);
- mmc_add_host(reset_host);
+ /* turn off card reset */
+
+ // pr_info("Resetting card...");
+ //mmc_remove_host(reset_host);
+ //mmc_add_host(reset_host);
}
static DECLARE_WORK(card_reset_work, if_sdio_reset_card_worker);
diff --git a/drivers/net/wireless/libertas_tf/Makefile b/drivers/net/wireless/libertas_tf/Makefile
index ff5544d6..1a443404 100644
--- a/drivers/net/wireless/libertas_tf/Makefile
+++ b/drivers/net/wireless/libertas_tf/Makefile
@@ -1,6 +1,8 @@
libertas_tf-objs := main.o cmd.o
libertas_tf_usb-objs += if_usb.o
+libertas_tf_sdio-objs += if_sdio.o
obj-$(CONFIG_LIBERTAS_THINFIRM) += libertas_tf.o
obj-$(CONFIG_LIBERTAS_THINFIRM_USB) += libertas_tf_usb.o
+obj-$(CONFIG_LIBERTAS_THINFIRM_SDIO) += libertas_tf_sdio.o
diff --git a/drivers/net/wireless/libertas_tf/cmd.c b/drivers/net/wireless/libertas_tf/cmd.c
index 909ac368..3a2db128 100644
--- a/drivers/net/wireless/libertas_tf/cmd.c
+++ b/drivers/net/wireless/libertas_tf/cmd.c
@@ -9,9 +9,8 @@
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-#include <linux/hardirq.h>
#include <linux/slab.h>
-#include <linux/export.h>
+#include <linux/module.h>
#include "libertas_tf.h"
@@ -103,7 +102,7 @@ int lbtf_update_hw_spec(struct lbtf_private *priv)
priv->fwrelease = (priv->fwrelease << 8) |
(priv->fwrelease >> 24 & 0xff);
- printk(KERN_INFO "libertastf: %pM, fw %u.%u.%up%u, cap 0x%08x\n",
+ printk(KERN_INFO "libertas_tf: %pM, fw %u.%u.%up%u, cap 0x%08x\n",
cmd.permanentaddr,
priv->fwrelease >> 24 & 0xff,
priv->fwrelease >> 16 & 0xff,
@@ -254,7 +253,7 @@ static void lbtf_submit_command(struct lbtf_private *priv,
lbtf_deb_cmd("DNLD_CMD: command 0x%04x, seq %d, size %d\n",
command, le16_to_cpu(cmd->seqnum), cmdsize);
- lbtf_deb_hex(LBTF_DEB_CMD, "DNLD_CMD", (void *) cmdnode->cmdbuf, cmdsize);
+ lbtf_deb_hex(LBTF_DEB_CMD, "DNLD_CMD ", (void *) cmdnode->cmdbuf, cmdsize);
ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) cmd, cmdsize);
spin_unlock_irqrestore(&priv->driver_lock, flags);
@@ -349,6 +348,7 @@ void lbtf_set_mode(struct lbtf_private *priv, enum lbtf_mode mode)
lbtf_deb_wext("Switching to mode: 0x%x\n", mode);
lbtf_cmd_async(priv, CMD_802_11_SET_MODE, &cmd.hdr, sizeof(cmd));
+ priv->mode = mode;
lbtf_deb_leave(LBTF_DEB_WEXT);
}
@@ -356,7 +356,7 @@ void lbtf_set_bssid(struct lbtf_private *priv, bool activate, const u8 *bssid)
{
struct cmd_ds_set_bssid cmd;
lbtf_deb_enter(LBTF_DEB_CMD);
-
+ lbtf_deb_cmd("Set BSSID: %pM a: %d", bssid, activate);
cmd.hdr.size = cpu_to_le16(sizeof(cmd));
cmd.activate = activate ? 1 : 0;
if (activate)
@@ -366,13 +366,13 @@ void lbtf_set_bssid(struct lbtf_private *priv, bool activate, const u8 *bssid)
lbtf_deb_leave(LBTF_DEB_CMD);
}
-int lbtf_set_mac_address(struct lbtf_private *priv, uint8_t *mac_addr)
+int _lbtf_change_mac_address(struct lbtf_private *priv, uint8_t *mac_addr, int action)
{
struct cmd_ds_802_11_mac_address cmd;
lbtf_deb_enter(LBTF_DEB_CMD);
cmd.hdr.size = cpu_to_le16(sizeof(cmd));
- cmd.action = cpu_to_le16(CMD_ACT_SET);
+ cmd.action = cpu_to_le16(action);
memcpy(cmd.macadd, mac_addr, ETH_ALEN);
@@ -381,6 +381,21 @@ int lbtf_set_mac_address(struct lbtf_private *priv, uint8_t *mac_addr)
return 0;
}
+int lbtf_set_mac_address(struct lbtf_private *priv, uint8_t *mac_addr)
+{
+ return _lbtf_change_mac_address( priv, mac_addr, CMD_ACT_SET );
+}
+
+int lbtf_add_mac_address(struct lbtf_private *priv, uint8_t *mac_addr)
+{
+ return _lbtf_change_mac_address( priv, mac_addr, CMD_ACT_ADD );
+}
+
+int lbtf_remove_mac_address(struct lbtf_private *priv, uint8_t *mac_addr)
+{
+ return _lbtf_change_mac_address( priv, mac_addr, CMD_ACT_REMOVE );
+}
+
int lbtf_set_radio_control(struct lbtf_private *priv)
{
int ret = 0;
@@ -674,6 +689,12 @@ int __lbtf_cmd(struct lbtf_private *priv, uint16_t command,
lbtf_deb_enter(LBTF_DEB_HOST);
+ if (priv->surpriseremoved) {
+ lbtf_deb_host("CMD: card removed\n");
+ cmdnode = ERR_PTR(-ENOENT);
+ goto done;
+ }
+
cmdnode = __lbtf_cmd_async(priv, command, in_cmd, in_cmd_size,
callback, callback_arg);
if (IS_ERR(cmdnode)) {
@@ -737,10 +758,13 @@ int lbtf_process_rx_command(struct lbtf_private *priv)
respcmd = le16_to_cpu(resp->command);
result = le16_to_cpu(resp->result);
+#ifdef CONFIG_LIBERTAS_THINFIRM_DEBUG
if (net_ratelimit())
- pr_info("libertastf: cmd response 0x%04x, seq %d, size %d\n",
+ pr_info("libertastf: cmd response 0x%04x, seq %d, size %d, result %d\n",
respcmd, le16_to_cpu(resp->seqnum),
- le16_to_cpu(resp->size));
+ le16_to_cpu(resp->size),
+ result);
+#endif
if (resp->seqnum != priv->cur_cmd->cmdbuf->seqnum) {
spin_unlock_irqrestore(&priv->driver_lock, flags);
diff --git a/drivers/net/wireless/libertas_tf/deb_defs.h b/drivers/net/wireless/libertas_tf/deb_defs.h
index 4bd3dc5a..8e86e114 100644
--- a/drivers/net/wireless/libertas_tf/deb_defs.h
+++ b/drivers/net/wireless/libertas_tf/deb_defs.h
@@ -11,6 +11,9 @@
#include <linux/spinlock.h>
+#undef pr_fmt
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#ifdef CONFIG_LIBERTAS_THINFIRM_DEBUG
#define DEBUG
#define PROC_DEBUG
@@ -40,6 +43,9 @@
#define LBTF_DEB_HEX 0x00200000
#define LBTF_DEB_SDIO 0x00400000
#define LBTF_DEB_MACOPS 0x00800000
+#define LBTF_DEB_STATS 0x01000000
+#define LBTF_DEB_INT 0x02000000
+#define LBTF_DEB_SCRATCH 0x04000000
extern unsigned int lbtf_debug;
@@ -82,8 +88,10 @@ do { if ((lbtf_debug & (grp)) == (grp)) \
#define lbtf_deb_usbd(dev, fmt, args...) LBTF_DEB_LL(LBTF_DEB_USB, " usbd", "%s:" fmt, dev_name(dev), ##args)
#define lbtf_deb_cs(fmt, args...) LBTF_DEB_LL(LBTF_DEB_CS, " cs", fmt, ##args)
#define lbtf_deb_thread(fmt, args...) LBTF_DEB_LL(LBTF_DEB_THREAD, " thread", fmt, ##args)
-#define lbtf_deb_sdio(fmt, args...) LBTF_DEB_LL(LBTF_DEB_SDIO, " thread", fmt, ##args)
+#define lbtf_deb_sdio(fmt, args...) LBTF_DEB_LL(LBTF_DEB_SDIO, " sdio", fmt, ##args)
#define lbtf_deb_macops(fmt, args...) LBTF_DEB_LL(LBTF_DEB_MACOPS, " thread", fmt, ##args)
+#define lbtf_deb_stats(fmt, args...) LBTF_DEB_LL(LBTF_DEB_STATS, " statistics", fmt, ##args)
+#define lbtf_deb_int(fmt, args...) LBTF_DEB_LL(LBTF_DEB_INT, " int", fmt, ##args)
#ifdef DEBUG
static inline void lbtf_deb_hex(unsigned int grp, const char *prompt, u8 *buf, int len)
diff --git a/drivers/net/wireless/libertas_tf/if_sdio.c b/drivers/net/wireless/libertas_tf/if_sdio.c
new file mode 100644
index 00000000..5925c86b
--- /dev/null
+++ b/drivers/net/wireless/libertas_tf/if_sdio.c
@@ -0,0 +1,1430 @@
+/*
+ * linux/drivers/net/wireless/libertas_tf/if_sdio.c
+ *
+ * Copyright (C) 2010, cozybit Inc.
+ *
+ * Portions Copyright 2007-2008 Pierre Ossman
+ * Inspired by if_cs.c, Copyright 2007 Holger Schurig
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/firmware.h>
+#include <linux/netdevice.h>
+#include <linux/delay.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/host.h>
+#include <linux/module.h>
+
+#define DRV_NAME "lbtf_sdio"
+
+#include "deb_defs.h"
+#include "libertas_tf.h"
+#include "if_sdio.h"
+
+static char *lbtf_helper_name = NULL;
+module_param_named(helper_name, lbtf_helper_name, charp, 0644);
+
+static char *lbtf_fw_name = NULL;
+module_param_named(fw_name, lbtf_fw_name, charp, 0644);
+
+static const struct sdio_device_id if_sdio_ids[] = {
+ { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL,
+ SDIO_DEVICE_ID_MARVELL_LIBERTAS) },
+ { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL,
+ SDIO_DEVICE_ID_MARVELL_8688WLAN) },
+ { /* end: all zeroes */ },
+};
+
+MODULE_DEVICE_TABLE(sdio, if_sdio_ids);
+
+struct if_sdio_model {
+ int model;
+ const char *helper;
+ const char *firmware;
+};
+
+extern unsigned int lbtf_reset_fw;
+
+static struct if_sdio_model if_sdio_models[] = {
+ {
+ /* 8686 */
+ .model = IF_SDIO_MODEL_8686,
+ .helper = "sd8686_helper.bin",
+ .firmware = "sd8686tf.bin",
+ },
+};
+MODULE_FIRMWARE("sd8686_helper.bin");
+MODULE_FIRMWARE("sd8686tf.bin");
+
+struct if_sdio_packet {
+ struct if_sdio_packet *next;
+ u16 nb;
+ u8 buffer[0] __attribute__((aligned(4)));
+};
+
+struct if_sdio_card {
+ struct sdio_func *func;
+ struct lbtf_private *priv;
+
+ int model;
+ unsigned long ioport;
+ unsigned int scratch_reg;
+
+ const char *helper;
+ const char *firmware;
+
+ u8 buffer[65536];
+
+ spinlock_t lock;
+ struct if_sdio_packet *packets;
+
+ struct workqueue_struct *workqueue;
+ struct work_struct packet_worker;
+
+ u8 hw_addr[ETH_ALEN];
+ u32 fwrelease;
+ u32 fwcapinfo;
+
+ u8 rx_unit;
+};
+
+static int _if_sdio_enable_interrupts(struct if_sdio_card *card)
+{
+ int ret;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ sdio_claim_host(card->func);
+ sdio_writeb(card->func, 0x0f, IF_SDIO_H_INT_MASK, &ret);
+ sdio_release_host(card->func);
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+ return (ret);
+}
+
+static int if_sdio_enable_interrupts(struct lbtf_private *priv)
+{
+ struct if_sdio_card *card = priv->card;
+ return _if_sdio_enable_interrupts(card);
+}
+
+static int _if_sdio_disable_interrupts(struct if_sdio_card *card)
+{
+ int ret;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ sdio_claim_host(card->func);
+ sdio_writeb(card->func, 0x00, IF_SDIO_H_INT_MASK, &ret);
+ sdio_release_host(card->func);
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+ return (ret);
+}
+
+static int if_sdio_disable_interrupts(struct lbtf_private *priv)
+{
+ struct if_sdio_card *card = priv->card;
+ return _if_sdio_disable_interrupts(card);
+}
+
+/*
+ * For SD8385/SD8686, this function reads firmware status after
+ * the image is downloaded, or reads RX packet length when
+ * interrupt (with IF_SDIO_H_INT_UPLD bit set) is received.
+ */
+static u16 if_sdio_read_scratch(struct if_sdio_card *card, int *err)
+{
+ int ret;
+ u16 scratch;
+
+ lbtf_deb_enter(LBTF_DEB_SCRATCH);
+
+ scratch = sdio_readb(card->func, card->scratch_reg, &ret);
+ if (!ret)
+ scratch |= sdio_readb(card->func, card->scratch_reg + 1,
+ &ret) << 8;
+
+ if (err)
+ *err = ret;
+
+ if (ret)
+ return 0xffff;
+
+ lbtf_deb_leave_args(LBTF_DEB_SCRATCH, "scratch %x", scratch);
+ return scratch;
+}
+
+/********************************************************************/
+/* I/O */
+/********************************************************************/
+static u16 if_sdio_read_rx_len(struct if_sdio_card *card, int *err)
+{
+ int ret;
+ u16 rx_len;
+
+ switch (card->model) {
+ case IF_SDIO_MODEL_8385:
+ case IF_SDIO_MODEL_8686:
+ rx_len = if_sdio_read_scratch(card, &ret);
+ break;
+ case IF_SDIO_MODEL_8688:
+ default: /* for newer chipsets */
+ rx_len = sdio_readb(card->func, IF_SDIO_RX_LEN, &ret);
+ if (!ret)
+ rx_len <<= card->rx_unit;
+ else
+ rx_len = 0xffff; /* invalid length */
+
+ break;
+ }
+
+ if (err)
+ *err = ret;
+
+ return rx_len;
+}
+
+static int if_sdio_handle_cmd(struct if_sdio_card *card,
+ u8 *buffer, unsigned size)
+{
+ struct lbtf_private *priv = card->priv;
+ int ret;
+ unsigned long flags;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ if (size > LBS_CMD_BUFFER_SIZE) {
+ lbtf_deb_sdio("response packet too large (%u bytes)\n",
+ size);
+ ret = -E2BIG;
+ goto out;
+ }
+
+ spin_lock_irqsave(&priv->driver_lock, flags);
+
+ memcpy(priv->cmd_resp_buff, buffer, size);
+ lbtf_cmd_response_rx(priv);
+
+ spin_unlock_irqrestore(&card->priv->driver_lock, flags);
+
+ ret = 0;
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+ return ret;
+}
+
+static int if_sdio_handle_data(struct if_sdio_card *card,
+ u8 *buffer, unsigned size)
+{
+ int ret;
+ struct sk_buff *skb;
+ char *data;
+
+ lbtf_deb_enter(LBTF_DEB_INT);
+
+ if (size > MRVDRV_ETH_RX_PACKET_BUFFER_SIZE) {
+ lbtf_deb_sdio("response packet too large (%u bytes)\n",
+ size);
+ ret = -E2BIG;
+ goto out;
+ }
+
+ skb = dev_alloc_skb(MRVDRV_ETH_RX_PACKET_BUFFER_SIZE + NET_IP_ALIGN);
+ if (!skb) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ skb_reserve(skb, NET_IP_ALIGN);
+
+ data = skb_put(skb, size);
+
+ memcpy(data, buffer, size);
+
+ lbtf_rx(card->priv, skb);
+
+ ret = 0;
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_INT, "ret %d", ret);
+
+ return ret;
+}
+
+static int if_sdio_handle_event(struct if_sdio_card *card,
+ u8 *buffer, unsigned size)
+{
+ int ret = 0;
+ u32 event;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ if (card->model == IF_SDIO_MODEL_8385) {
+ event = sdio_readb(card->func, IF_SDIO_EVENT, &ret);
+ if (ret)
+ goto out;
+
+ /* right shift 3 bits to get the event id */
+ event >>= 3;
+ } else {
+ if (size < 4) {
+ lbtf_deb_sdio("event packet too small (%u bytes)\n",
+ size);
+ ret = -EINVAL;
+ goto out;
+ }
+ event = buffer[3] << 24;
+ event |= buffer[2] << 16;
+ event |= buffer[1] << 8;
+ event |= buffer[0] << 0;
+ }
+
+ lbtf_deb_stats("**EVENT** 0x%X\n", event);
+
+ if (event & 0xffff0000) {
+ u16 tmp;
+ u8 retrycnt;
+ u8 failure;
+
+ tmp = event >> 16;
+ retrycnt = tmp & 0x00ff;
+ failure = (tmp & 0xff00) >> 8;
+ lbtf_deb_stats("Got feedback event. retry: %d, failure: %d", retrycnt, failure);
+ lbtf_send_tx_feedback(card->priv, retrycnt, failure);
+ } else if (event == LBTF_EVENT_BCN_SENT) {
+ lbtf_bcn_sent(card->priv);
+ } else {
+ lbtf_deb_stats("UNKNOWN HOST EVENT: 0x%x", event);
+ }
+
+ ret = 0;
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+}
+
+static int if_sdio_wait_status(struct if_sdio_card *card, const u8 condition)
+{
+ u8 status;
+ unsigned long timeout;
+ int ret = 0;
+
+ timeout = jiffies + HZ;
+ while (1) {
+ status = sdio_readb(card->func, IF_SDIO_STATUS, &ret);
+ if (ret)
+ return ret;
+ if ((status & condition) == condition)
+ break;
+ if (time_after(jiffies, timeout))
+ return -ETIMEDOUT;
+ mdelay(1);
+ }
+
+ return ret;
+}
+
+static int if_sdio_card_to_host(struct if_sdio_card *card)
+{
+ int ret;
+ u16 size, type, chunk;
+
+ lbtf_deb_enter(LBTF_DEB_INT);
+
+
+ size = if_sdio_read_rx_len(card, &ret);
+ if (ret)
+ goto out;
+
+ if (size < 4) {
+ lbtf_deb_sdio("invalid packet size (%hu bytes) from firmware\n",
+ size);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ ret = if_sdio_wait_status(card, IF_SDIO_IO_RDY);
+ if (ret)
+ goto out;
+
+ /*
+ * The transfer must be in one transaction or the firmware
+ * goes suicidal. There's no way to guarantee that for all
+ * controllers, but we can at least try.
+ */
+ chunk = sdio_align_size(card->func, size);
+
+ ret = sdio_readsb(card->func, card->buffer, card->ioport, chunk);
+ if (ret)
+ goto out;
+
+ chunk = card->buffer[0] | (card->buffer[1] << 8);
+ type = card->buffer[2] | (card->buffer[3] << 8);
+
+ lbtf_deb_int("packet of type %hu and size %hu bytes\n",
+ type, chunk);
+
+ if (chunk > size) {
+ lbtf_deb_sdio("packet fragment (%hu > %hu)\n",
+ chunk, size);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (chunk < size) {
+ lbtf_deb_sdio("packet fragment (%hu < %hu)\n",
+ chunk, size);
+ }
+
+ switch (type) {
+ case MVMS_CMD:
+ ret = if_sdio_handle_cmd(card, card->buffer + 4, chunk - 4);
+ if (ret)
+ goto out;
+ break;
+ case MVMS_DAT:
+ ret = if_sdio_handle_data(card, card->buffer + 4, chunk - 4);
+ if (ret)
+ goto out;
+ break;
+ case MVMS_EVENT:
+ ret = if_sdio_handle_event(card, card->buffer + 4, chunk - 4);
+ if (ret)
+ goto out;
+ break;
+ default:
+ lbtf_deb_sdio("invalid type (%hu) from firmware\n",
+ type);
+ ret = -EINVAL;
+ goto out;
+ }
+
+out:
+ if (ret)
+ pr_err("problem fetching packet from firmware\n");
+
+ lbtf_deb_leave_args(LBTF_DEB_INT, "ret %d", ret);
+
+ return ret;
+}
+
+static void if_sdio_host_to_card_worker(struct work_struct *work)
+{
+ struct if_sdio_card *card;
+ struct if_sdio_packet *packet;
+ int ret;
+ unsigned long flags;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ card = container_of(work, struct if_sdio_card, packet_worker);
+
+ while (1) {
+ spin_lock_irqsave(&card->lock, flags);
+ packet = card->packets;
+ if (packet)
+ card->packets = packet->next;
+ spin_unlock_irqrestore(&card->lock, flags);
+
+ if (!packet)
+ break;
+
+ // Check for removed device
+ if (card->priv) {
+ if (card->priv->surpriseremoved) {
+ lbtf_deb_sdio("Device removed\n");
+ kfree(packet);
+ break;
+ }
+ } else {
+ lbtf_deb_sdio("host->card called during init, assuming device exists");
+ }
+
+ sdio_claim_host(card->func);
+
+ ret = if_sdio_wait_status(card, IF_SDIO_IO_RDY);
+ if (ret == 0) {
+ ret = sdio_writesb(card->func, card->ioport,
+ packet->buffer, packet->nb);
+ }
+
+ if (ret)
+ pr_err("error %d sending packet to firmware\n", ret);
+
+ sdio_release_host(card->func);
+
+ kfree(packet);
+ }
+
+ lbtf_deb_leave(LBTF_DEB_SDIO);
+}
+
+/********************************************************************/
+/* Firmware */
+/********************************************************************/
+
+#define FW_DL_READY_STATUS (IF_SDIO_IO_RDY | IF_SDIO_DL_RDY)
+
+static int if_sdio_prog_helper(struct if_sdio_card *card)
+{
+ int ret;
+ const struct firmware *fw;
+ unsigned long timeout;
+ u8 *chunk_buffer;
+ u32 chunk_size;
+ const u8 *firmware;
+ size_t size;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ ret = request_firmware(&fw, card->helper, &card->func->dev);
+
+ if (ret) {
+ pr_err("failed to load helper firmware\n");
+ goto out;
+ }
+
+ chunk_buffer = kzalloc(64, GFP_KERNEL);
+ if (!chunk_buffer) {
+ ret = -ENOMEM;
+ goto release_fw;
+ }
+
+ sdio_claim_host(card->func);
+
+ ret = sdio_set_block_size(card->func, 32);
+ if (ret)
+ goto release;
+
+ firmware = fw->data;
+ size = fw->size;
+
+ lbtf_deb_sdio("Helper size: %d", size);
+
+ while (size) {
+ ret = if_sdio_wait_status(card, FW_DL_READY_STATUS);
+ if (ret)
+ goto release;
+
+ /* On some platforms (like Davinci) the chip needs more time
+ * between helper blocks.
+ */
+ mdelay(2);
+
+ chunk_size = min(size, 60U);
+
+ *((__le32*)chunk_buffer) = cpu_to_le32(chunk_size);
+ memcpy(chunk_buffer + 4, firmware, chunk_size);
+
+ // lbtf_deb_sdio("sending %d bytes chunk\n", chunk_size);
+
+ ret = sdio_writesb(card->func, card->ioport,
+ chunk_buffer, 64);
+ if (ret)
+ goto release;
+
+ firmware += chunk_size;
+ size -= chunk_size;
+ }
+
+ /* an empty block marks the end of the transfer */
+ memset(chunk_buffer, 0, 4);
+ ret = sdio_writesb(card->func, card->ioport, chunk_buffer, 64);
+ if (ret)
+ goto release;
+
+ lbtf_deb_sdio("waiting for helper to boot...\n");
+
+ /* wait for the helper to boot by looking at the size register */
+ timeout = jiffies + HZ;
+ while (1) {
+ u16 req_size;
+
+ req_size = sdio_readb(card->func, IF_SDIO_RD_BASE, &ret);
+ if (ret)
+ goto release;
+
+ req_size |= sdio_readb(card->func, IF_SDIO_RD_BASE + 1, &ret) << 8;
+ if (ret)
+ goto release;
+
+ if (req_size != 0)
+ break;
+
+ if (time_after(jiffies, timeout)) {
+ ret = -ETIMEDOUT;
+ goto release;
+ }
+
+ msleep(10);
+ }
+
+ ret = 0;
+
+release:
+ sdio_release_host(card->func);
+ kfree(chunk_buffer);
+release_fw:
+ release_firmware(fw);
+
+out:
+ if (ret)
+ pr_err("failed to load helper firmware\n");
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+}
+
+static int if_sdio_prog_real(struct if_sdio_card *card)
+{
+ int ret;
+ const struct firmware *fw;
+ unsigned long timeout;
+ u8 *chunk_buffer;
+ u32 chunk_size;
+ const u8 *firmware;
+ size_t size, req_size;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ ret = request_firmware(&fw, card->firmware, &card->func->dev);
+ if (ret) {
+ pr_err("can't load firmware\n");
+ goto out;
+ }
+
+ chunk_buffer = kzalloc(512, GFP_KERNEL);
+ if (!chunk_buffer) {
+ ret = -ENOMEM;
+ goto release_fw;
+ }
+
+ sdio_claim_host(card->func);
+
+ ret = sdio_set_block_size(card->func, 32);
+ if (ret)
+ goto release;
+
+ firmware = fw->data;
+ size = fw->size;
+
+ lbtf_deb_sdio("Firmware size: %d", size);
+
+ while (size) {
+ ret = if_sdio_wait_status(card, FW_DL_READY_STATUS);
+ if (ret)
+ goto release;
+
+ req_size = sdio_readb(card->func, IF_SDIO_RD_BASE, &ret);
+ if (ret)
+ goto release;
+
+ req_size |= sdio_readb(card->func, IF_SDIO_RD_BASE + 1, &ret) << 8;
+ if (ret)
+ goto release;
+
+ if (req_size == 0) {
+ lbtf_deb_sdio("firmware helper gave up early\n");
+ ret = -EIO;
+ goto release;
+ }
+
+ if (req_size & 0x01) {
+ lbtf_deb_sdio("firmware helper signalled error\n");
+ ret = -EIO;
+ goto release;
+ }
+
+ if (req_size > size)
+ req_size = size;
+
+ while (req_size) {
+ chunk_size = min(req_size, (size_t)512);
+
+ memcpy(chunk_buffer, firmware, chunk_size);
+ ret = sdio_writesb(card->func, card->ioport,
+ chunk_buffer, roundup(chunk_size, 32));
+ if (ret)
+ goto release;
+
+ firmware += chunk_size;
+ size -= chunk_size;
+ req_size -= chunk_size;
+ }
+ }
+
+ ret = 0;
+
+ lbtf_deb_sdio("waiting for firmware to boot...\n");
+
+ /* wait for the firmware to boot */
+ timeout = jiffies + HZ;
+ while (1) {
+ u16 scratch;
+
+ scratch = if_sdio_read_scratch(card, &ret);
+ if (ret)
+ goto release;
+
+ if (scratch == IF_SDIO_FIRMWARE_OK)
+ break;
+
+ if (time_after(jiffies, timeout)) {
+ ret = -ETIMEDOUT;
+ goto release;
+ }
+
+ msleep(10);
+ }
+
+ ret = 0;
+
+release:
+ sdio_release_host(card->func);
+ kfree(chunk_buffer);
+release_fw:
+ release_firmware(fw);
+
+out:
+ if (ret)
+ pr_err("failed to load firmware\n");
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+}
+
+static void if_sdio_reset_device(struct if_sdio_card *card);
+
+static int if_sdio_prog_firmware(struct if_sdio_card *card)
+{
+ int ret;
+ u16 scratch;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ /*
+ * Disable interrupts
+ */
+ ret = _if_sdio_disable_interrupts(card);
+ if (ret)
+ pr_warning("unable to disable interrupts: %d", ret);
+
+ sdio_claim_host(card->func);
+ scratch = if_sdio_read_scratch(card, &ret);
+ sdio_release_host(card->func);
+
+ lbtf_deb_sdio("firmware status = %#x\n", scratch);
+ lbtf_deb_sdio("scratch ret = %d\n", ret);
+
+ if (ret)
+ goto out;
+
+ if (scratch == IF_SDIO_FIRMWARE_OK) {
+ lbtf_deb_sdio("firmware already loaded\n");
+ goto success;
+ } else if ((card->model == IF_SDIO_MODEL_8686) && ((scratch & 0x7fff) != 0)) {
+ lbtf_deb_sdio("firmware may be running\n");
+ if( lbtf_reset_fw == 0 ) {
+ goto success;
+ } else {
+ lbtf_deb_sdio("attempting to reset and reload firmware\n");
+
+ if_sdio_reset_device(card);
+ lbtf_reset_fw=0;
+
+ ret = if_sdio_prog_firmware(card);
+ goto out;
+ }
+ }
+
+ ret = if_sdio_prog_helper(card);
+ if (ret)
+ goto out;
+
+ lbtf_deb_sdio("Helper firmware loaded\n");
+
+ ret = if_sdio_prog_real(card);
+ if (ret)
+ goto out;
+
+ lbtf_deb_sdio("Firmware loaded\n");
+
+success:
+ sdio_claim_host(card->func);
+ sdio_set_block_size(card->func, IF_SDIO_BLOCK_SIZE);
+ sdio_release_host(card->func);
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+}
+
+/*******************************************************************/
+/* Libertas callbacks */
+/*******************************************************************/
+
+static int _if_sdio_host_to_card(struct if_sdio_card *card,
+ u8 type, u8 *buf, u16 nb)
+{
+ int ret;
+ struct if_sdio_packet *packet, *cur;
+ u16 size;
+ unsigned long flags;
+
+ lbtf_deb_enter_args(LBTF_DEB_SDIO, "type %d, bytes %d", type, nb);
+
+ if (nb > (65536 - sizeof(struct if_sdio_packet) - 4)) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ /*
+ * The transfer must be in one transaction or the firmware
+ * goes suicidal. There's no way to guarantee that for all
+ * controllers, but we can at least try.
+ */
+ size = sdio_align_size(card->func, nb + 4);
+
+ packet = kzalloc(sizeof(struct if_sdio_packet) + size,
+ GFP_ATOMIC);
+ if (!packet) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ packet->next = NULL;
+ packet->nb = size;
+
+ /*
+ * SDIO specific header.
+ */
+ packet->buffer[0] = (nb + 4) & 0xff;
+ packet->buffer[1] = ((nb + 4) >> 8) & 0xff;
+ packet->buffer[2] = type;
+ packet->buffer[3] = 0;
+
+ memcpy(packet->buffer + 4, buf, nb);
+
+ spin_lock_irqsave(&card->lock, flags);
+
+ if (!card->packets)
+ card->packets = packet;
+ else {
+ cur = card->packets;
+ while (cur->next)
+ cur = cur->next;
+ cur->next = packet;
+ }
+
+ spin_unlock_irqrestore(&card->lock, flags);
+
+ queue_work(card->workqueue, &card->packet_worker);
+
+ ret = 0;
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+}
+
+static int if_sdio_host_to_card(struct lbtf_private *priv,
+ u8 type, u8 *buf, u16 nb)
+{
+ struct if_sdio_card *card;
+ unsigned long flags;
+
+ card = priv->card;
+
+ spin_lock_irqsave(&card->lock, flags);
+ /* TODO: the dndl_sent has to do with sleep stuff.
+ * Commented out till we add that.
+ */
+ switch (type) {
+ case MVMS_CMD:
+ /* priv->dnld_sent = DNLD_CMD_SENT;
+ break; */
+ case MVMS_DAT:
+ /*priv->dnld_sent = DNLD_DATA_SENT;*/
+ break;
+ default:
+ lbtf_deb_sdio("unknown packet type %d\n", (int)type);
+ }
+ spin_unlock_irqrestore(&card->lock, flags);
+
+ return _if_sdio_host_to_card(card, type, buf, nb);
+}
+
+static int if_sdio_enter_deep_sleep(struct lbtf_private *priv)
+{
+ int ret = -1;
+ return ret;
+}
+
+static int if_sdio_exit_deep_sleep(struct lbtf_private *priv)
+{
+ int ret = -1;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+ return ret;
+}
+
+static int if_sdio_reset_deep_sleep_wakeup(struct lbtf_private *priv)
+{
+ int ret = -1;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+ return ret;
+}
+
+static void if_sdio_reset_device(struct if_sdio_card *card)
+{
+ struct cmd_ds_802_11_reset cmd;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.hdr.command = cpu_to_le16(CMD_802_11_RESET);
+ cmd.hdr.size = cpu_to_le16(sizeof(cmd));
+ cmd.action = cpu_to_le16(CMD_ACT_HALT);
+
+ _if_sdio_host_to_card(card, MVMS_CMD, (u8 *) &cmd, sizeof(cmd));
+
+ msleep(1000);
+
+ lbtf_deb_leave(LBTF_DEB_SDIO);
+
+ return;
+}
+EXPORT_SYMBOL_GPL(if_sdio_reset_device);
+
+/**
+ * lbtf_update_hw_spec: Updates the hardware details.
+ *
+ * @priv A pointer to struct lbtf_private structure
+ *
+ * Returns: 0 on success, error on failure
+ */
+int if_sdio_update_hw_spec(struct if_sdio_card *card)
+{
+ struct cmd_ds_get_hw_spec cmd;
+ int ret = -1;
+ unsigned long timeout;
+ u16 size, type, chunk;
+ int wait_cmd_done = 0;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ /* Send hw spec command */
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.hdr.size = cpu_to_le16(sizeof(cmd));
+ cmd.hdr.command = cpu_to_le16(CMD_GET_HW_SPEC);
+ memcpy(cmd.permanentaddr, card->hw_addr, ETH_ALEN);
+ ret = _if_sdio_host_to_card(card, MVMS_CMD, (u8 *) &cmd, sizeof(cmd));
+ if (ret) {
+ goto out;
+ }
+
+ flush_workqueue(card->workqueue);
+
+ /* Wait for and retrieve response */
+ timeout = jiffies + HZ;
+ while (wait_cmd_done < 1) {
+ /* Wait for response to cmd */
+ sdio_claim_host(card->func);
+ ret = if_sdio_wait_status(card, IF_SDIO_UL_RDY);
+ sdio_release_host(card->func);
+ if (ret) {
+ /* time-out */
+ lbtf_deb_sdio("error waiting on IO ready");
+ goto out;
+ }
+
+ /* get the rx size */
+ sdio_claim_host(card->func);
+ size = if_sdio_read_rx_len(card, &ret);
+ sdio_release_host(card->func);
+ if (ret)
+ goto out;
+
+ if (size == 0) {
+ } else if (size < 4) {
+ lbtf_deb_sdio("invalid packet size (%d bytes) from firmware\n",
+ (int)size);
+ ret = -EINVAL;
+ goto out;
+ } else /* size > 4 */ {
+ /*
+ * Get command response.
+ *
+ * The transfer must be in one transaction or the firmware
+ * goes suicidal. There's no way to guarantee that for all
+ * controllers, but we can at least try.
+ */
+ sdio_claim_host(card->func);
+ chunk = sdio_align_size(card->func, size);
+
+ ret = sdio_readsb(card->func, card->buffer, card->ioport, chunk);
+ sdio_release_host(card->func);
+ if (ret)
+ goto out;
+
+ chunk = card->buffer[0] | (card->buffer[1] << 8);
+ type = card->buffer[2] | (card->buffer[3] << 8);
+
+ lbtf_deb_sdio("packet of type %hu and size %hu bytes\n",
+ type, chunk);
+
+ lbtf_deb_hex(LBTF_DEB_SDIO, "SDIO Rx: ", card->buffer,
+ min_t(unsigned int, size, 100));
+
+ if (chunk > size) {
+ lbtf_deb_sdio("packet fragment (%hu > %hu)\n",
+ chunk, size);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (chunk < size) {
+ lbtf_deb_sdio("packet fragment (%hu < %hu)\n",
+ chunk, size);
+ }
+
+ switch (type) {
+ case MVMS_DAT:
+ lbtf_deb_sdio("Got MVMS_DAT");
+ continue;
+ case MVMS_CMD:
+ lbtf_deb_sdio("Got MVMS_CMD");
+ memcpy(&cmd, card->buffer +4, sizeof(cmd));
+ wait_cmd_done = 1;
+ break;
+ case MVMS_EVENT:
+ lbtf_deb_sdio("Got MVMS_EVENT");
+ continue;
+ default:
+ lbtf_deb_sdio("invalid type (%hu) from firmware\n",
+ type);
+ ret = -EINVAL;
+ goto out;
+ }
+ } /* size > 4 */
+
+ if (!wait_cmd_done) {
+ if (time_after(jiffies, timeout)) {
+ ret = -ETIMEDOUT;
+ pr_warning("Update hw spec cmd timed out\n");
+ ret = -1;
+ goto out;
+ }
+
+ msleep(10);
+ }
+ }
+
+ lbtf_deb_sdio("Got hw spec command response");
+
+ /* Process cmd return */
+ card->fwcapinfo = le32_to_cpu(cmd.fwcapinfo);
+
+ /* The firmware release is in an interesting format: the patch
+ * level is in the most significant nibble ... so fix that: */
+ card->fwrelease = le32_to_cpu(cmd.fwrelease);
+ card->fwrelease = (card->fwrelease << 8) |
+ (card->fwrelease >> 24 & 0xff);
+
+ printk(KERN_INFO "libertas_tf_sdio: %pM, fw %u.%u.%up%u, cap 0x%08x\n",
+ cmd.permanentaddr,
+ card->fwrelease >> 24 & 0xff,
+ card->fwrelease >> 16 & 0xff,
+ card->fwrelease >> 8 & 0xff,
+ card->fwrelease & 0xff,
+ card->fwcapinfo);
+ lbtf_deb_sdio("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n",
+ cmd.hwifversion, cmd.version);
+
+ memmove(card->hw_addr, cmd.permanentaddr, ETH_ALEN);
+
+out:
+ lbtf_deb_leave(LBTF_DEB_SDIO);
+ return ret;
+}
+
+
+/*******************************************************************/
+/* SDIO callbacks */
+/*******************************************************************/
+
+static void if_sdio_interrupt(struct sdio_func *func)
+{
+ int ret;
+ struct if_sdio_card *card;
+ u8 cause;
+
+ lbtf_deb_enter(LBTF_DEB_INT);
+
+ card = sdio_get_drvdata(func);
+
+ cause = sdio_readb(card->func, IF_SDIO_H_INT_STATUS, &ret);
+ lbtf_deb_int("interrupt: 0x%hhX\n", cause);
+ lbtf_deb_int("interrupt ret: 0x%X\n", ret);
+ if (ret)
+ goto out;
+
+ sdio_writeb(card->func, ~cause, IF_SDIO_H_INT_STATUS, &ret);
+ if (ret)
+ goto out;
+
+ /*
+ * Ignore the define name, this really means the card has
+ * successfully received the command or packet.
+ */
+ if (cause & IF_SDIO_H_INT_DNLD)
+ if (card->priv)
+ lbtf_host_to_card_done(card->priv);
+
+ if (cause & IF_SDIO_H_INT_UPLD) {
+ ret = if_sdio_card_to_host(card);
+ if (ret)
+ goto out;
+ }
+
+ ret = 0;
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_INT, "ret %d", ret);
+}
+
+static int if_sdio_probe(struct sdio_func *func,
+ const struct sdio_device_id *id)
+{
+ struct if_sdio_card *card;
+ struct lbtf_private *priv;
+ int ret, i;
+ unsigned int model;
+ struct if_sdio_packet *packet;
+ struct mmc_host *host = func->card->host;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ for (i = 0;i < func->card->num_info;i++) {
+ if (sscanf(func->card->info[i],
+ "802.11 SDIO ID: %x", &model) == 1)
+ break;
+ if (sscanf(func->card->info[i],
+ "ID: %x", &model) == 1)
+ break;
+ if (!strcmp(func->card->info[i], "IBIS Wireless SDIO Card")) {
+ model = IF_SDIO_MODEL_8385;
+ break;
+ }
+ }
+
+ if (i == func->card->num_info) {
+ pr_err("unable to identify card model\n");
+ return -ENODEV;
+ }
+
+ lbtf_deb_sdio("Found model: 0x%x", model);
+
+ card = kzalloc(sizeof(struct if_sdio_card), GFP_KERNEL);
+ if (!card)
+ return -ENOMEM;
+
+ card->func = func;
+ card->model = model;
+
+ switch (card->model) {
+ case IF_SDIO_MODEL_8385:
+ card->scratch_reg = IF_SDIO_SCRATCH_OLD;
+ break;
+ case IF_SDIO_MODEL_8686:
+ lbtf_deb_sdio("Found Marvell 8686");
+ card->scratch_reg = IF_SDIO_SCRATCH;
+ break;
+ case IF_SDIO_MODEL_8688:
+ default: /* for newer chipsets */
+ card->scratch_reg = IF_SDIO_FW_STATUS;
+ break;
+ }
+
+ spin_lock_init(&card->lock);
+ card->workqueue = create_workqueue("libertas_tf_sdio");
+ INIT_WORK(&card->packet_worker, if_sdio_host_to_card_worker);
+
+ for (i = 0;i < ARRAY_SIZE(if_sdio_models);i++) {
+ if (card->model == if_sdio_models[i].model)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(if_sdio_models)) {
+ pr_err("unknown card model 0x%x\n", card->model);
+ ret = -ENODEV;
+ goto free;
+ }
+
+ card->helper = if_sdio_models[i].helper;
+ card->firmware = if_sdio_models[i].firmware;
+
+ if (lbtf_helper_name) {
+ lbtf_deb_sdio("overriding helper firmware: %s\n",
+ lbtf_helper_name);
+ card->helper = lbtf_helper_name;
+ }
+
+ if (lbtf_fw_name) {
+ lbtf_deb_sdio("overriding firmware: %s\n", lbtf_fw_name);
+ card->firmware = lbtf_fw_name;
+ }
+
+ sdio_claim_host(func);
+
+ ret = sdio_enable_func(func);
+ if (ret)
+ goto release;
+
+ ret = sdio_claim_irq(func, if_sdio_interrupt);
+ if (ret)
+ goto disable;
+
+ /* For 1-bit transfers to the 8686 model, we need to enable the
+ * interrupt flag in the CCCR register. Set the MMC_QUIRK_LENIENT_FN0
+ * bit to allow access to non-vendor registers. */
+ if ((card->model == IF_SDIO_MODEL_8686) &&
+ (host->caps & MMC_CAP_SDIO_IRQ) &&
+ (host->ios.bus_width == MMC_BUS_WIDTH_1)) {
+ u8 reg;
+
+ func->card->quirks |= MMC_QUIRK_LENIENT_FN0;
+ reg = sdio_f0_readb(func, SDIO_CCCR_IF, &ret);
+ if (ret)
+ goto release_int;
+
+ reg |= SDIO_BUS_ECSI;
+ sdio_f0_writeb(func, reg, SDIO_CCCR_IF, &ret);
+ if (ret)
+ goto release_int;
+ }
+
+ card->ioport = sdio_readb(func, IF_SDIO_IOPORT, &ret);
+ if (ret)
+ goto release_int;
+
+ card->ioport |= sdio_readb(func, IF_SDIO_IOPORT + 1, &ret) << 8;
+ if (ret)
+ goto release_int;
+
+ card->ioport |= sdio_readb(func, IF_SDIO_IOPORT + 2, &ret) << 16;
+ if (ret)
+ goto release_int;
+
+ sdio_release_host(func);
+ sdio_set_drvdata(func, card);
+
+ lbtf_deb_sdio("class = 0x%X, vendor = 0x%X, "
+ "device = 0x%X, model = 0x%X, ioport = 0x%luX\n",
+ func->class, func->vendor, func->device,
+ model, card->ioport);
+
+ /* Upload firmware */
+ lbtf_deb_sdio("Going to upload fw...");
+ if (if_sdio_prog_firmware(card))
+ goto reclaim;
+
+ /*
+ * We need to get the hw spec here because we must have the
+ * MAC address before we call lbtf_add_card
+ *
+ * Read priv address from HW
+ */
+ memset(card->hw_addr, 0xff, ETH_ALEN);
+ ret = if_sdio_update_hw_spec(card);
+ if (ret) {
+ ret = -1;
+ pr_err("Error fetching MAC address from hardware.");
+ goto reclaim;
+ }
+
+ priv = lbtf_add_card(card, &func->dev, card->hw_addr);
+ if (!priv) {
+ ret = -ENOMEM;
+ goto reclaim;
+ }
+
+ card->priv = priv;
+ priv->card = card;
+
+ priv->hw_host_to_card = if_sdio_host_to_card;
+ priv->enter_deep_sleep = if_sdio_enter_deep_sleep;
+ priv->exit_deep_sleep = if_sdio_exit_deep_sleep;
+ priv->reset_deep_sleep_wakeup = if_sdio_reset_deep_sleep_wakeup;
+ priv->enable_interrupts = if_sdio_enable_interrupts;
+ priv->disable_interrupts = if_sdio_disable_interrupts;
+
+ /* SD8385 & SD8686 do not have rx_unit. */
+ card->rx_unit = 0;
+
+ /*
+ * Enable interrupts now that everything is set up
+ */
+ ret = _if_sdio_enable_interrupts(card);
+ if (ret) {
+ pr_err("Error enabling interrupts: %d", ret);
+ goto err_activate_card;
+ }
+
+ priv->fw_ready = 1;
+
+out:
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+
+err_activate_card:
+ lbtf_deb_sdio("prob error jump: err_activate_card");
+ flush_workqueue(card->workqueue);
+ lbtf_remove_card(priv);
+reclaim:
+ lbtf_deb_sdio("prob error jump: reclaim");
+ sdio_claim_host(func);
+release_int:
+ lbtf_deb_sdio("prob error jump: release_int");
+ sdio_release_irq(func);
+disable:
+ lbtf_deb_sdio("prob error jump: disable");
+ sdio_disable_func(func);
+release:
+ lbtf_deb_sdio("prob error jump: release");
+ sdio_release_host(func);
+free:
+ lbtf_deb_sdio("prob error jump: free");
+ destroy_workqueue(card->workqueue);
+ while (card->packets) {
+ packet = card->packets;
+ card->packets = card->packets->next;
+ kfree(packet);
+ }
+
+ kfree(card);
+
+ goto out;
+}
+
+static void if_sdio_remove(struct sdio_func *func)
+{
+ struct if_sdio_card *card;
+ struct if_sdio_packet *packet;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ card = sdio_get_drvdata(func);
+
+ card->priv->surpriseremoved = 1;
+
+ lbtf_deb_sdio("call remove card\n");
+ lbtf_remove_card(card->priv);
+
+ flush_workqueue(card->workqueue);
+ destroy_workqueue(card->workqueue);
+
+ sdio_claim_host(func);
+ sdio_release_irq(func);
+ sdio_disable_func(func);
+ sdio_set_drvdata(func, NULL);
+ sdio_release_host(func);
+
+ while (card->packets) {
+ packet = card->packets;
+ card->packets = card->packets->next;
+ kfree(packet);
+ }
+
+ kfree(card);
+
+ lbtf_deb_leave(LBTF_DEB_SDIO);
+}
+
+static int if_sdio_suspend(struct device *dev)
+{
+ return 0;
+}
+
+static int if_sdio_resume(struct device *dev)
+{
+ return 0;
+}
+
+static struct dev_pm_ops if_sdio_pm_ops = {
+ .suspend = if_sdio_suspend,
+ .resume = if_sdio_resume,
+};
+
+static struct sdio_driver if_sdio_driver = {
+ .name = "libertas_tf_sdio",
+ .id_table = if_sdio_ids,
+ .probe = if_sdio_probe,
+ .remove = if_sdio_remove,
+ .drv = {
+ .pm = &if_sdio_pm_ops,
+ },
+};
+
+/*******************************************************************/
+/* Module functions */
+/*******************************************************************/
+
+static int __init if_sdio_init_module(void)
+{
+ int ret = 0;
+
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+ printk(KERN_INFO "libertas_tf_sdio: Libertas Thinfirmware SDIO driver\n");
+ printk(KERN_INFO "libertas_tf_sdio: Copyright cozybit Inc.\n");
+ printk(KERN_INFO "libertas_tf_sdio: buildstamp: 6\n");
+
+ ret = sdio_register_driver(&if_sdio_driver);
+
+ lbtf_deb_leave_args(LBTF_DEB_SDIO, "ret %d", ret);
+
+ return ret;
+}
+
+static void __exit if_sdio_exit_module(void)
+{
+ lbtf_deb_enter(LBTF_DEB_SDIO);
+
+
+ sdio_unregister_driver(&if_sdio_driver);
+
+ lbtf_deb_leave(LBTF_DEB_SDIO);
+}
+
+module_init(if_sdio_init_module);
+module_exit(if_sdio_exit_module);
+
+MODULE_DESCRIPTION("Libertas_tf SDIO WLAN Driver");
+MODULE_AUTHOR("Steve deRosier");
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/libertas_tf/if_sdio.h b/drivers/net/wireless/libertas_tf/if_sdio.h
new file mode 100644
index 00000000..12179c1d
--- /dev/null
+++ b/drivers/net/wireless/libertas_tf/if_sdio.h
@@ -0,0 +1,56 @@
+/*
+ * linux/drivers/net/wireless/libertas/if_sdio.h
+ *
+ * Copyright 2007 Pierre Ossman
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#ifndef _LBS_IF_SDIO_H
+#define _LBS_IF_SDIO_H
+
+#define IF_SDIO_MODEL_8385 0x04
+#define IF_SDIO_MODEL_8686 0x0b
+#define IF_SDIO_MODEL_8688 0x10
+
+#define IF_SDIO_IOPORT 0x00
+
+#define IF_SDIO_H_INT_MASK 0x04
+#define IF_SDIO_H_INT_OFLOW 0x08
+#define IF_SDIO_H_INT_UFLOW 0x04
+#define IF_SDIO_H_INT_DNLD 0x02
+#define IF_SDIO_H_INT_UPLD 0x01
+
+#define IF_SDIO_H_INT_STATUS 0x05
+#define IF_SDIO_H_INT_RSR 0x06
+#define IF_SDIO_H_INT_STATUS2 0x07
+
+#define IF_SDIO_RD_BASE 0x10
+
+#define IF_SDIO_STATUS 0x20
+#define IF_SDIO_IO_RDY 0x08
+#define IF_SDIO_CIS_RDY 0x04
+#define IF_SDIO_UL_RDY 0x02
+#define IF_SDIO_DL_RDY 0x01
+
+#define IF_SDIO_C_INT_MASK 0x24
+#define IF_SDIO_C_INT_STATUS 0x28
+#define IF_SDIO_C_INT_RSR 0x2C
+
+#define IF_SDIO_SCRATCH 0x34
+#define IF_SDIO_SCRATCH_OLD 0x80fe
+#define IF_SDIO_FW_STATUS 0x40
+#define IF_SDIO_FIRMWARE_OK 0xfedc
+
+#define IF_SDIO_RX_LEN 0x42
+#define IF_SDIO_RX_UNIT 0x43
+
+#define IF_SDIO_EVENT 0x80fc
+
+#define IF_SDIO_BLOCK_SIZE 256
+#define CONFIGURATION_REG 0x03
+#define HOST_POWER_UP (0x1U << 1)
+#endif
diff --git a/drivers/net/wireless/libertas_tf/if_usb.c b/drivers/net/wireless/libertas_tf/if_usb.c
index d576dd66..a92da67c 100644
--- a/drivers/net/wireless/libertas_tf/if_usb.c
+++ b/drivers/net/wireless/libertas_tf/if_usb.c
@@ -15,11 +15,12 @@
#include "if_usb.h"
#include <linux/delay.h>
-#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/firmware.h>
#include <linux/netdevice.h>
#include <linux/slab.h>
#include <linux/usb.h>
+#include <linux/module.h>
#define INSANEDEBUG 0
#define lbtf_deb_usb2(...) do { if (INSANEDEBUG) lbtf_deb_usbd(__VA_ARGS__); } while (0)
@@ -43,6 +44,8 @@ MODULE_DEVICE_TABLE(usb, if_usb_table);
static void if_usb_receive(struct urb *urb);
static void if_usb_receive_fwload(struct urb *urb);
static int if_usb_prog_firmware(struct if_usb_card *cardp);
+static int _if_usb_host_to_card(struct if_usb_card *cardp, uint8_t type,
+ uint8_t *payload, uint16_t nb);
static int if_usb_host_to_card(struct lbtf_private *priv, uint8_t type,
uint8_t *payload, uint16_t nb);
static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,
@@ -50,6 +53,8 @@ static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,
static void if_usb_free(struct if_usb_card *cardp);
static int if_usb_submit_rx_urb(struct if_usb_card *cardp);
static int if_usb_reset_device(struct if_usb_card *cardp);
+static int __if_usb_submit_rx_urb(struct if_usb_card *cardp,
+ void (*callbackfn)(struct urb *urb));
/**
* if_usb_wrike_bulk_callback - call back to handle URB status
@@ -97,22 +102,143 @@ static void if_usb_free(struct if_usb_card *cardp)
lbtf_deb_leave(LBTF_DEB_USB);
}
-static void if_usb_setup_firmware(struct lbtf_private *priv)
+/**
+ * if_usb_receive_hw_spec - read data received from the device.
+ *
+ * @urb pointer to struct urb
+ */
+static void if_usb_receive_cmd_response(struct urb *urb)
+{
+ struct if_usb_card *cardp = urb->context;
+ struct sk_buff *skb = cardp->rx_skb;
+ int recvlength = urb->actual_length;
+ uint8_t *recvbuff = NULL;
+ uint32_t recvtype = 0;
+ __le32 *pkt = (__le32 *)(skb->data);
+ struct cmd_ds_get_hw_spec *cmd;
+
+ lbtf_deb_enter(LBTF_DEB_USB);
+
+ if (recvlength>0) {
+ if (urb->status) {
+ lbtf_deb_usbd(&cardp->udev->dev, "RX URB failed: %d\n",
+ urb->status);
+ kfree_skb(skb);
+ goto setup_for_next;
+ }
+
+ recvbuff = skb->data;
+ recvtype = le32_to_cpu(pkt[0]);
+ lbtf_deb_usb("Recv length = 0x%x, Recv type = 0x%X",
+ recvlength, recvtype);
+
+ lbtf_deb_hex(LBTF_DEB_CMD, "CMD Data ", recvbuff, min_t(unsigned int, recvlength, 100));
+
+ } else if (urb->status) {
+ kfree_skb(skb);
+ lbtf_deb_leave(LBTF_DEB_USB);
+ return;
+ }
+
+ if (CMD_TYPE_REQUEST == recvtype) {
+ if (recvlength > LBS_CMD_BUFFER_SIZE) {
+ lbtf_deb_usbd(&cardp->udev->dev,
+ "The receive buffer is too large\n");
+ kfree_skb(skb);
+ goto setup_for_next;
+ }
+
+ BUG_ON(!in_interrupt());
+
+ cmd = (struct cmd_ds_get_hw_spec *)(recvbuff + MESSAGE_HEADER_LEN);
+
+ switch (le16_to_cpu(cmd->hdr.command)) {
+ case (CMD_GET_HW_SPEC | 0x8000):
+ lbtf_deb_usb("received hw spec reponse");
+
+ /* Process cmd return */
+ cardp->fwcapinfo = le32_to_cpu(cmd->fwcapinfo);
+
+ /* The firmware release is in an interesting format: the patch
+ * level is in the most significant nibble ... so fix that: */
+ cardp->fwrelease = le32_to_cpu(cmd->fwrelease);
+ cardp->fwrelease = (cardp->fwrelease << 8) |
+ (cardp->fwrelease >> 24 & 0xff);
+
+ printk(KERN_INFO "libertas_tf_usb: %pM, fw %u.%u.%up%u, cap 0x%08x\n",
+ cmd->permanentaddr,
+ cardp->fwrelease >> 24 & 0xff,
+ cardp->fwrelease >> 16 & 0xff,
+ cardp->fwrelease >> 8 & 0xff,
+ cardp->fwrelease & 0xff,
+ cardp->fwcapinfo);
+ lbtf_deb_usb("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n",
+ cmd->hwifversion, cmd->version);
+
+ memmove(cardp->hw_addr, cmd->permanentaddr, ETH_ALEN);
+
+ cardp->cmdresp = 1;
+ wake_up(&cardp->fw_wq);
+ break;
+
+ case (CMD_SET_BOOT2_VER | 0x8000):
+ lbtf_deb_usb("received boot2 ver reponse");
+ cardp->cmdresp = 1;
+ wake_up(&cardp->fw_wq);
+ break;
+
+ default:
+ lbtf_deb_usb("received unhandled cmd reponse 0x%x",
+ le16_to_cpu(cmd->hdr.command));
+ break;
+ }
+
+ kfree_skb(skb);
+ } else {
+ lbtf_deb_usbd(&cardp->udev->dev,
+ "libertastf: unknown command type 0x%X\n", recvtype);
+ kfree_skb(skb);
+ }
+
+
+setup_for_next:
+ if (!cardp->cmdresp)
+ __if_usb_submit_rx_urb(cardp, &if_usb_receive_cmd_response);
+ lbtf_deb_leave(LBTF_DEB_USB);
+}
+
+/**
+ * if_usb_setup_firmware - Setup firmware by sending boot2 ver command
+ *
+ * Returns: 0
+ */
+static void if_usb_setup_firmware(struct if_usb_card *cardp)
{
- struct if_usb_card *cardp = priv->card;
struct cmd_ds_set_boot2_ver b2_cmd;
lbtf_deb_enter(LBTF_DEB_USB);
- if_usb_submit_rx_urb(cardp);
- b2_cmd.hdr.size = cpu_to_le16(sizeof(b2_cmd));
+ if (__if_usb_submit_rx_urb(cardp, &if_usb_receive_cmd_response) < 0) {
+ lbtf_deb_usbd(&cardp->udev->dev, "URB submission is failed\n");
+ }
+
+ memset(&b2_cmd, 0, sizeof(struct cmd_ds_set_boot2_ver));
+
+ b2_cmd.hdr.command = cpu_to_le16(CMD_SET_BOOT2_VER);
+ b2_cmd.hdr.size = cpu_to_le16(sizeof(struct cmd_ds_set_boot2_ver));
b2_cmd.action = 0;
b2_cmd.version = cardp->boot2_version;
- if (lbtf_cmd_with_response(priv, CMD_SET_BOOT2_VER, &b2_cmd))
- lbtf_deb_usb("Setting boot2 version failed\n");
+ cardp->cmdresp = 0;
+
+ _if_usb_host_to_card(cardp, MVMS_CMD, (uint8_t *)&b2_cmd, sizeof(b2_cmd));
+
+ wait_event_interruptible_timeout(cardp->fw_wq, cardp->cmdresp, 5 * (HZ));
+
+ usb_kill_urb(cardp->rx_urb);
lbtf_deb_leave(LBTF_DEB_USB);
+ return;
}
static void if_usb_fw_timeo(unsigned long priv)
@@ -131,6 +257,69 @@ static void if_usb_fw_timeo(unsigned long priv)
lbtf_deb_leave(LBTF_DEB_USB);
}
+/**
+ * if_usb_issue_hw_spec_command - Issue hw spec command.
+ *
+ * Returns: 0
+ */
+static int if_usb_issue_hw_spec_command(struct if_usb_card *cardp)
+{
+ struct cmd_ds_get_hw_spec cmd;
+ lbtf_deb_enter(LBTF_DEB_USB);
+
+ memset(&cmd, 0, sizeof(struct cmd_ds_get_hw_spec));
+ cmd.hdr.command = cpu_to_le16(CMD_GET_HW_SPEC);
+ cmd.hdr.size = cpu_to_le16(sizeof(struct cmd_ds_get_hw_spec));
+ memcpy(cmd.permanentaddr, cardp->hw_addr, ETH_ALEN);
+
+ _if_usb_host_to_card(cardp, MVMS_CMD, (uint8_t *)&cmd, sizeof(cmd));
+
+ lbtf_deb_leave(LBTF_DEB_USB);
+ return 0;
+}
+
+/**
+ * if_usb_update_hw_spec: Updates the hardware details.
+ *
+ * @card A pointer to card structure
+ *
+ * Returns: 0 on success, error on failure
+ */
+int if_usb_update_hw_spec(struct if_usb_card *cardp)
+{
+ int ret = -1;
+
+ lbtf_deb_enter(LBTF_DEB_USB);
+
+ if (__if_usb_submit_rx_urb(cardp, &if_usb_receive_cmd_response) < 0) {
+ lbtf_deb_usbd(&cardp->udev->dev, "URB submission is failed\n");
+ }
+
+ /* Send and wait for the response */
+ cardp->cmdresp = 0;
+
+ /* Issue hw spec command */
+ if_usb_issue_hw_spec_command(cardp);
+
+ /* wait for command response */
+ wait_event_interruptible_timeout(cardp->fw_wq, cardp->cmdresp, 5 * (HZ));
+
+ /* Process response */
+ if (cardp->cmdresp) {
+ lbtf_deb_usb("Getting hw spec succeded\n");
+ ret = 0;
+ } else {
+ lbtf_deb_usb("Getting hw spec failed\n");
+ ret = 1;
+ }
+
+ usb_kill_urb(cardp->rx_urb);
+
+ lbtf_deb_leave(LBTF_DEB_USB);
+ return ret;
+}
+
+
/**
* if_usb_probe - sets the configuration values
*
@@ -148,13 +337,16 @@ static int if_usb_probe(struct usb_interface *intf,
struct lbtf_private *priv;
struct if_usb_card *cardp;
int i;
+ int ret = 0;
lbtf_deb_enter(LBTF_DEB_USB);
udev = interface_to_usbdev(intf);
cardp = kzalloc(sizeof(struct if_usb_card), GFP_KERNEL);
- if (!cardp)
+ if (!cardp) {
+ pr_err("Out of memory allocating private data.\n");
goto error;
+ }
setup_timer(&cardp->fw_timeout, if_usb_fw_timeo, (unsigned long)cardp);
init_waitqueue_head(&cardp->fw_wq);
@@ -222,7 +414,33 @@ static int if_usb_probe(struct usb_interface *intf,
goto dealloc;
}
- priv = lbtf_add_card(cardp, &udev->dev);
+ cardp->boot2_version = udev->descriptor.bcdDevice;
+
+ usb_get_dev(udev);
+ usb_set_intfdata(intf, cardp);
+
+ /* Upload firmware */
+ lbtf_deb_usbd(&udev->dev, "Going to upload fw...");
+ if (if_usb_prog_firmware(cardp))
+ goto dealloc;
+
+ if_usb_setup_firmware(cardp);
+
+ /*
+ * We need to get the hw spec here because we must have the
+ * MAC address before we call lbtf_add_card
+ *
+ * Read priv address from HW
+ */
+ memset(cardp->hw_addr, 0xff, ETH_ALEN);
+
+ ret = if_usb_update_hw_spec(cardp);
+ if (ret) {
+ ret = -1;
+ pr_err("Error fetching MAC address from hardware.");
+ }
+
+ priv = lbtf_add_card(cardp, &udev->dev, cardp->hw_addr);
if (!priv)
goto dealloc;
@@ -231,10 +449,11 @@ static int if_usb_probe(struct usb_interface *intf,
priv->hw_host_to_card = if_usb_host_to_card;
priv->hw_prog_firmware = if_usb_prog_firmware;
priv->hw_reset_device = if_usb_reset_device;
- cardp->boot2_version = udev->descriptor.bcdDevice;
- usb_get_dev(udev);
- usb_set_intfdata(intf, cardp);
+ cardp->priv->fw_ready = 1;
+
+ /* "turn on" rx */
+ if_usb_submit_rx_urb(cardp);
return 0;
@@ -385,9 +604,11 @@ static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,
lbtf_deb_enter(LBTF_DEB_USB);
/* check if device is removed */
- if (cardp->priv->surpriseremoved) {
- lbtf_deb_usbd(&cardp->udev->dev, "Device removed\n");
- goto tx_ret;
+ if (cardp->priv) {
+ if (cardp->priv->surpriseremoved) {
+ lbtf_deb_usbd(&cardp->udev->dev, "Device removed\n");
+ goto tx_ret;
+ }
}
if (data)
@@ -711,19 +932,18 @@ setup_for_next:
}
/**
- * if_usb_host_to_card - Download data to the device
+ * _if_usb_host_to_card - Download data to the device
*
- * @priv pointer to struct lbtf_private structure
+ * @cardp pointer to struct if_usb_card structure
* @type type of data
* @buf pointer to data buffer
* @len number of bytes
*
* Returns: 0 on success, nonzero otherwise
*/
-static int if_usb_host_to_card(struct lbtf_private *priv, uint8_t type,
+static int _if_usb_host_to_card(struct if_usb_card *cardp, uint8_t type,
uint8_t *payload, uint16_t nb)
{
- struct if_usb_card *cardp = priv->card;
u8 data = 0;
lbtf_deb_usbd(&cardp->udev->dev, "*** type = %u\n", type);
@@ -742,6 +962,22 @@ static int if_usb_host_to_card(struct lbtf_private *priv, uint8_t type,
data);
}
+/**
+ * if_usb_host_to_card - Download data to the device
+ *
+ * @priv pointer to struct lbtf_private structure
+ * @type type of data
+ * @buf pointer to data buffer
+ * @len number of bytes
+ *
+ * Returns: 0 on success, nonzero otherwise
+ */
+static int if_usb_host_to_card(struct lbtf_private *priv, uint8_t type,
+ uint8_t *payload, uint16_t nb)
+{
+ return _if_usb_host_to_card(priv->card, type, payload, nb);
+}
+
/**
* if_usb_issue_boot_command - Issue boot command to Boot2.
*
@@ -877,8 +1113,11 @@ restart:
if_usb_send_fw_pkt(cardp);
/* ... and wait for the process to complete */
- wait_event_interruptible(cardp->fw_wq, cardp->priv->surpriseremoved ||
- cardp->fwdnldover);
+ if (cardp->priv)
+ wait_event_interruptible(cardp->fw_wq, cardp->priv->surpriseremoved ||
+ cardp->fwdnldover);
+ else
+ wait_event_interruptible(cardp->fw_wq, cardp->fwdnldover);
del_timer_sync(&cardp->fw_timeout);
usb_kill_urb(cardp->rx_urb);
@@ -895,14 +1134,13 @@ restart:
goto release_fw;
}
- cardp->priv->fw_ready = 1;
+ if (cardp->priv)
+ cardp->priv->fw_ready = 1;
release_fw:
release_firmware(cardp->fw);
cardp->fw = NULL;
- if_usb_setup_firmware(cardp->priv);
-
done:
lbtf_deb_leave_args(LBTF_DEB_USB, "ret %d", ret);
return ret;
@@ -920,10 +1158,29 @@ static struct usb_driver if_usb_driver = {
.id_table = if_usb_table,
.suspend = if_usb_suspend,
.resume = if_usb_resume,
- .disable_hub_initiated_lpm = 1,
};
-module_usb_driver(if_usb_driver);
+static int __init if_usb_init_module(void)
+{
+ int ret = 0;
+
+ lbtf_deb_enter(LBTF_DEB_MAIN);
+
+ ret = usb_register(&if_usb_driver);
+
+ lbtf_deb_leave_args(LBTF_DEB_MAIN, "ret %d", ret);
+ return ret;
+}
+
+static void __exit if_usb_exit_module(void)
+{
+ lbtf_deb_enter(LBTF_DEB_MAIN);
+ usb_deregister(&if_usb_driver);
+ lbtf_deb_leave(LBTF_DEB_MAIN);
+}
+
+module_init(if_usb_init_module);
+module_exit(if_usb_exit_module);
MODULE_DESCRIPTION("8388 USB WLAN Thinfirm Driver");
MODULE_AUTHOR("Cozybit Inc.");
diff --git a/drivers/net/wireless/libertas_tf/if_usb.h b/drivers/net/wireless/libertas_tf/if_usb.h
index 6fa5b3f5..ea44a0ed 100644
--- a/drivers/net/wireless/libertas_tf/if_usb.h
+++ b/drivers/net/wireless/libertas_tf/if_usb.h
@@ -70,6 +70,11 @@ struct if_usb_card {
uint8_t fwfinalblk;
__le16 boot2_version;
+
+ int cmdresp;
+ u8 hw_addr[ETH_ALEN];
+ u32 fwrelease;
+ u32 fwcapinfo;
};
/** fwheader */
diff --git a/drivers/net/wireless/libertas_tf/libertas_tf.h b/drivers/net/wireless/libertas_tf/libertas_tf.h
index ad77b92d..675136ac 100644
--- a/drivers/net/wireless/libertas_tf/libertas_tf.h
+++ b/drivers/net/wireless/libertas_tf/libertas_tf.h
@@ -46,6 +46,8 @@
#define CMD_ACT_GET 0x0000
#define CMD_ACT_SET 0x0001
+#define CMD_ACT_ADD 0x0002
+#define CMD_ACT_REMOVE 0x0004
/* Define action or option for CMD_802_11_RESET */
#define CMD_ACT_HALT 0x0003
@@ -80,6 +82,7 @@ enum lbtf_mode {
LBTF_PASSIVE_MODE,
LBTF_STA_MODE,
LBTF_AP_MODE,
+ LBTF_FULLMAC_MODE,
};
/** Card Event definition */
@@ -103,6 +106,7 @@ enum lbtf_mode {
#define LBS_CMD_BUFFER_SIZE (2 * 1024)
#define MRVDRV_MAX_CHANNEL_SIZE 14
#define MRVDRV_SNAP_HEADER_LEN 8
+#define LBS_NUM_BUFFERS 7
#define LBS_UPLD_SIZE 2312
#define DEV_NAME_LEN 32
@@ -185,14 +189,20 @@ struct lbtf_private {
bit1 1/0=cmd_sent/cmd_tx_done,
all other bits reserved 0 */
struct ieee80211_vif *vif;
+ struct ieee80211_vif *sec_vif; /* only allow a single secondary vif */
+ enum lbtf_mode mode;
struct work_struct cmd_work;
struct work_struct tx_work;
/** Hardware access */
int (*hw_host_to_card) (struct lbtf_private *priv, u8 type, u8 *payload, u16 nb);
- int (*hw_prog_firmware) (struct if_usb_card *cardp);
- int (*hw_reset_device) (struct if_usb_card *cardp);
-
+ int (*hw_prog_firmware) (void *cardp);
+ int (*hw_reset_device) (void *cardp);
+ int (*enter_deep_sleep) (struct lbtf_private *priv);
+ int (*exit_deep_sleep) (struct lbtf_private *priv);
+ int (*reset_deep_sleep_wakeup) (struct lbtf_private *priv);
+ int (*enable_interrupts) (struct lbtf_private *priv);
+ int (*disable_interrupts) (struct lbtf_private *priv);
/** Wlan adapter data structure*/
/** STATUS variables */
@@ -236,6 +246,8 @@ struct lbtf_private {
struct sk_buff *skb_to_tx;
struct sk_buff *tx_skb;
+ struct sk_buff *tx_skb_old;
+ struct sk_buff_head tx_skb_buf;
/** NIC Operation characteristics */
u16 mac_control;
@@ -256,6 +268,17 @@ struct lbtf_private {
/* Most recently reported noise in dBm */
s8 noise;
+
+ /* Command responses sent from the hardware to the driver */
+ int cur_cmd_retcode;
+ u8 resp_idx;
+ u8 resp_buf[2][LBS_UPLD_SIZE];
+ u32 resp_len[2];
+
+ /* beacon status info */
+ bool beacon_enable;
+ u16 beacon_int;
+
};
/* 802.11-related definitions */
@@ -470,6 +493,8 @@ int lbtf_cmd_set_mac_multicast_addr(struct lbtf_private *priv);
void lbtf_set_mode(struct lbtf_private *priv, enum lbtf_mode mode);
void lbtf_set_bssid(struct lbtf_private *priv, bool activate, const u8 *bssid);
int lbtf_set_mac_address(struct lbtf_private *priv, uint8_t *mac_addr);
+int lbtf_add_mac_address(struct lbtf_private *priv, uint8_t *mac_addr);
+int lbtf_remove_mac_address(struct lbtf_private *priv, uint8_t *mac_addr);
int lbtf_set_channel(struct lbtf_private *priv, u8 channel);
@@ -486,11 +511,11 @@ void lbtf_cmd_response_rx(struct lbtf_private *priv);
/* main.c */
struct chan_freq_power *lbtf_get_region_cfp_table(u8 region,
int *cfp_no);
-struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev);
+struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev, u8 mac_addr[ETH_ALEN]);
int lbtf_remove_card(struct lbtf_private *priv);
-int lbtf_start_card(struct lbtf_private *priv);
int lbtf_rx(struct lbtf_private *priv, struct sk_buff *skb);
void lbtf_send_tx_feedback(struct lbtf_private *priv, u8 retrycnt, u8 fail);
+void lbtf_host_to_card_done(struct lbtf_private *priv );
void lbtf_bcn_sent(struct lbtf_private *priv);
/* support functions for cmd.c */
diff --git a/drivers/net/wireless/libertas_tf/main.c b/drivers/net/wireless/libertas_tf/main.c
index 70018562..a1d97cd0 100644
--- a/drivers/net/wireless/libertas_tf/main.c
+++ b/drivers/net/wireless/libertas_tf/main.c
@@ -9,17 +9,15 @@
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-#include <linux/hardirq.h>
#include <linux/slab.h>
-
#include <linux/etherdevice.h>
-#include <linux/module.h>
#include "libertas_tf.h"
+#include <linux/module.h>
#define DRIVER_RELEASE_VERSION "004.p0"
/* thinfirm version: 5.132.X.pX */
#define LBTF_FW_VER_MIN 0x05840300
-#define LBTF_FW_VER_MAX 0x0584ffff
+#define LBTF_FW_VER_MAX 0x0900ffff
#define QOS_CONTROL_LEN 2
/* Module parameters */
@@ -27,6 +25,10 @@ unsigned int lbtf_debug;
EXPORT_SYMBOL_GPL(lbtf_debug);
module_param_named(libertas_tf_debug, lbtf_debug, int, 0644);
+unsigned int lbtf_reset_fw;
+EXPORT_SYMBOL_GPL(lbtf_reset_fw);
+module_param_named(libertas_tf_reset_fw, lbtf_reset_fw, int, 0644);
+
static const char lbtf_driver_version[] = "THINFIRM-USB8388-" DRIVER_RELEASE_VERSION
#ifdef DEBUG
"-dbg"
@@ -149,20 +151,23 @@ static int lbtf_setup_firmware(struct lbtf_private *priv)
int ret = -1;
lbtf_deb_enter(LBTF_DEB_FW);
+
/*
* Read priv address from HW
*/
memset(priv->current_addr, 0xff, ETH_ALEN);
ret = lbtf_update_hw_spec(priv);
if (ret) {
- ret = -1;
- goto done;
+ ret = -1;
+ goto done;
}
lbtf_set_mac_control(priv);
lbtf_set_radio_control(priv);
+ lbtf_set_mode(priv, LBTF_PASSIVE_MODE);
ret = 0;
+
done:
lbtf_deb_leave_args(LBTF_DEB_FW, "ret: %d", ret);
return ret;
@@ -181,12 +186,12 @@ static void command_timer_fn(unsigned long data)
spin_lock_irqsave(&priv->driver_lock, flags);
if (!priv->cur_cmd) {
- printk(KERN_DEBUG "libertastf: command timer expired; "
+ printk(KERN_DEBUG "libertas_tf: command timer expired; "
"no pending command\n");
goto out;
}
- printk(KERN_DEBUG "libertas: command %x timed out\n",
+ printk(KERN_DEBUG "libertas_tf: command %x timed out\n",
le16_to_cpu(priv->cur_cmd->cmdbuf->command));
priv->cmd_timed_out = 1;
@@ -203,6 +208,8 @@ static int lbtf_init_adapter(struct lbtf_private *priv)
mutex_init(&priv->lock);
priv->vif = NULL;
+ priv->sec_vif = NULL;
+ priv->mode = LBTF_FULLMAC_MODE;
setup_timer(&priv->command_timer, command_timer_fn,
(unsigned long)priv);
@@ -233,6 +240,8 @@ static void lbtf_op_tx(struct ieee80211_hw *hw,
{
struct lbtf_private *priv = hw->priv;
+ lbtf_deb_enter(LBTF_DEB_TX);
+
priv->skb_to_tx = skb;
queue_work(lbtf_wq, &priv->tx_work);
/*
@@ -240,6 +249,9 @@ static void lbtf_op_tx(struct ieee80211_hw *hw,
* there are no buffered multicast frames to send
*/
ieee80211_stop_queues(priv->hw);
+
+ lbtf_deb_leave(LBTF_DEB_TX);
+ return NETDEV_TX_OK;
}
static void lbtf_tx_work(struct work_struct *work)
@@ -254,9 +266,20 @@ static void lbtf_tx_work(struct work_struct *work)
lbtf_deb_enter(LBTF_DEB_MACOPS | LBTF_DEB_TX);
- if ((priv->vif->type == NL80211_IFTYPE_AP) &&
- (!skb_queue_empty(&priv->bc_ps_buf)))
+ /* Below are some extra debugging prints that normally we don't want */
+ /* Change to 1 to reenable */
+#if 0
+ lbtf_deb_tx("priv: %p", priv);
+ lbtf_deb_tx("priv->vif: %p", priv->vif);
+ lbtf_deb_tx("&(priv->bc_ps_buf): %p", &priv->bc_ps_buf);
+#endif
+
+ if (priv->vif &&
+ (priv->vif->type == NL80211_IFTYPE_AP) &&
+ (!skb_queue_empty(&priv->bc_ps_buf))) {
+ lbtf_deb_tx("bc_ps_buf");
skb = skb_dequeue(&priv->bc_ps_buf);
+ }
else if (priv->skb_to_tx) {
skb = priv->skb_to_tx;
priv->skb_to_tx = NULL;
@@ -279,22 +302,28 @@ static void lbtf_tx_work(struct work_struct *work)
/* Activate per-packet rate selection */
txpd->tx_control |= cpu_to_le32(MRVL_PER_PACKET_RATE |
ieee80211_get_tx_rate(priv->hw, info)->hw_value);
+ lbtf_deb_tx("tx_control: %x", txpd->tx_control );
/* copy destination address from 802.11 header */
memcpy(txpd->tx_dest_addr_high, skb->data + sizeof(struct txpd) + 4,
ETH_ALEN);
txpd->tx_packet_length = cpu_to_le16(len);
txpd->tx_packet_location = cpu_to_le32(sizeof(struct txpd));
- lbtf_deb_hex(LBTF_DEB_TX, "TX Data", skb->data, min_t(unsigned int, skb->len, 100));
- BUG_ON(priv->tx_skb);
+
+ lbtf_deb_hex(LBTF_DEB_TX, "TX Data ", skb->data, min_t(unsigned int, skb->len, 100));
+
spin_lock_irq(&priv->driver_lock);
- priv->tx_skb = skb;
+ skb_queue_tail(&priv->tx_skb_buf, skb);
err = priv->hw_host_to_card(priv, MVMS_DAT, skb->data, skb->len);
spin_unlock_irq(&priv->driver_lock);
if (err) {
dev_kfree_skb_any(skb);
- priv->tx_skb = NULL;
+ skb_dequeue_tail(&priv->tx_skb_buf);
pr_err("TX error: %d", err);
+ } else {
+ if (LBS_NUM_BUFFERS > skb_queue_len(&priv->tx_skb_buf))
+ ieee80211_wake_queues(priv->hw);
+ lbtf_deb_tx("TX success");
}
lbtf_deb_leave(LBTF_DEB_MACOPS | LBTF_DEB_TX);
}
@@ -307,12 +336,24 @@ static int lbtf_op_start(struct ieee80211_hw *hw)
lbtf_deb_enter(LBTF_DEB_MACOPS);
- if (!priv->fw_ready)
+ if (!priv->fw_ready) {
+ lbtf_deb_main("Going to upload fw...");
/* Upload firmware */
- if (priv->hw_prog_firmware(card))
- goto err_prog_firmware;
+ if (priv->hw_prog_firmware) {
+ if (priv->hw_prog_firmware(card))
+ goto err_prog_firmware;
+ else
+ priv->fw_ready = 1;
+ }
+ } else {
+ if (priv->enable_interrupts) {
+ priv->enable_interrupts(priv);
+ }
+ lbtf_deb_main("FW was already ready...");
+ }
/* poke the firmware */
+ lbtf_deb_main("Poking fw...");
priv->capability = WLAN_CAPABILITY_SHORT_PREAMBLE;
priv->radioon = RADIO_ON;
priv->mac_control = CMD_ACT_MAC_RX_ON | CMD_ACT_MAC_TX_ON;
@@ -326,12 +367,21 @@ static int lbtf_op_start(struct ieee80211_hw *hw)
goto err_prog_firmware;
}
- printk(KERN_INFO "libertastf: Marvell WLAN 802.11 thinfirm adapter\n");
+ printk(KERN_INFO "libertas_tf: Marvell WLAN 802.11 thinfirm adapter\n");
+
+ SET_IEEE80211_PERM_ADDR(hw, priv->current_addr);
+
+ if (priv->hw != NULL)
+ ieee80211_wake_queues(priv->hw);
+ else
+ printk("call to wake_queues with null\n");
+
lbtf_deb_leave(LBTF_DEB_MACOPS);
return 0;
err_prog_firmware:
- priv->hw_reset_device(card);
+ if (priv->hw_reset_device)
+ priv->hw_reset_device(card);
lbtf_deb_leave_args(LBTF_DEB_MACOPS, "error programing fw; ret=%d", ret);
return ret;
}
@@ -346,6 +396,8 @@ static void lbtf_op_stop(struct ieee80211_hw *hw)
lbtf_deb_enter(LBTF_DEB_MACOPS);
+ ieee80211_stop_queues(hw);
+
/* Flush pending command nodes */
spin_lock_irqsave(&priv->driver_lock, flags);
list_for_each_entry(cmdnode, &priv->cmdpendingq, list) {
@@ -362,47 +414,128 @@ static void lbtf_op_stop(struct ieee80211_hw *hw)
priv->radioon = RADIO_OFF;
lbtf_set_radio_control(priv);
+ if (priv->disable_interrupts) {
+ priv->disable_interrupts(priv);
+ }
+
lbtf_deb_leave(LBTF_DEB_MACOPS);
}
static int lbtf_op_add_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif)
{
+ struct ieee80211_vif **priv_vif = NULL;
+ u8 null_addr[ETH_ALEN] = {0};
struct lbtf_private *priv = hw->priv;
lbtf_deb_enter(LBTF_DEB_MACOPS);
- if (priv->vif != NULL)
- return -EOPNOTSUPP;
+ if (priv->vif != NULL) {
+ lbtf_deb_macops("priv->vif != NULL");
+ if (priv->sec_vif != NULL)
+ return -EOPNOTSUPP;
+ else {
+ /* Check types of primary and secondary vif. We only support
+ * simultaneous STA and Mesh vifs
+ */
+ if (!((priv->vif->type == NL80211_IFTYPE_STATION &&
+ vif->type == NL80211_IFTYPE_MESH_POINT) ||
+ (priv->vif->type == NL80211_IFTYPE_MESH_POINT &&
+ vif->type == NL80211_IFTYPE_STATION)))
+ return -EOPNOTSUPP;
+ else {
+ priv_vif = &priv->sec_vif;
+ }
+ }
+ } else
+ priv_vif = &priv->vif;
- priv->vif = vif;
+ *priv_vif = vif;
switch (vif->type) {
case NL80211_IFTYPE_MESH_POINT:
case NL80211_IFTYPE_AP:
+ case NL80211_IFTYPE_ADHOC:
lbtf_set_mode(priv, LBTF_AP_MODE);
break;
case NL80211_IFTYPE_STATION:
- lbtf_set_mode(priv, LBTF_STA_MODE);
+ if (priv->mode != LBTF_AP_MODE)
+ lbtf_set_mode(priv, LBTF_STA_MODE);
break;
default:
- priv->vif = NULL;
+ *priv_vif = NULL;
+ lbtf_deb_macops("Unsupported interface mode: %d", vif->type);
return -EOPNOTSUPP;
}
- lbtf_set_mac_address(priv, (u8 *) vif->addr);
+
+ if (compare_ether_addr(null_addr, vif->addr) != 0) {
+ lbtf_deb_macops("Setting mac addr: %pM\n", vif->addr);
+ if (priv->sec_vif != NULL)
+ lbtf_add_mac_address(priv, (u8 *) vif->addr);
+ else
+ lbtf_set_mac_address(priv, (u8 *) vif->addr);
+ }
+
+
lbtf_deb_leave(LBTF_DEB_MACOPS);
return 0;
}
+struct ieee80211_vif **_lbtf_choose_vif(struct ieee80211_vif *vif,
+ struct lbtf_private *priv, struct ieee80211_vif **other_vif)
+{
+ struct ieee80211_vif ** priv_vif = NULL;
+ if (priv->sec_vif != NULL && priv->sec_vif == vif) {
+ priv_vif = &priv->sec_vif;
+ if (other_vif)
+ *other_vif = priv->vif;
+ }
+ else if (priv->vif != NULL && priv->vif == vif) {
+ priv_vif = &priv->vif;
+ if (other_vif)
+ *other_vif = priv->sec_vif;
+ }
+
+ return priv_vif;
+}
+
static void lbtf_op_remove_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif)
{
struct lbtf_private *priv = hw->priv;
+ struct ieee80211_vif **priv_vif;
+ struct ieee80211_vif *other_vif;
lbtf_deb_enter(LBTF_DEB_MACOPS);
- if (priv->vif->type == NL80211_IFTYPE_AP ||
- priv->vif->type == NL80211_IFTYPE_MESH_POINT)
+ if (!(priv_vif = _lbtf_choose_vif(vif, priv,&other_vif))) {
+ lbtf_deb_macops("vif not found\n");
+ return;
+ }
+
+ if ((*priv_vif)->type == NL80211_IFTYPE_AP ||
+ (*priv_vif)->type == NL80211_IFTYPE_MESH_POINT)
lbtf_beacon_ctrl(priv, 0, 0);
- lbtf_set_mode(priv, LBTF_PASSIVE_MODE);
- lbtf_set_bssid(priv, 0, NULL);
- priv->vif = NULL;
+
+ if (other_vif) {
+ switch (other_vif->type) {
+ case NL80211_IFTYPE_MESH_POINT:
+ case NL80211_IFTYPE_AP:
+ case NL80211_IFTYPE_ADHOC:
+ lbtf_set_mode(priv, LBTF_AP_MODE);
+ lbtf_set_bssid(priv, 0, NULL);
+ break;
+ case NL80211_IFTYPE_STATION:
+ lbtf_set_mode(priv, LBTF_STA_MODE);
+ break;
+ default:
+ lbtf_deb_macops("Unsupported interface mode: %d", other_vif->type);
+ }
+ } else {
+ lbtf_set_mode(priv, LBTF_PASSIVE_MODE);
+ lbtf_set_bssid(priv, 0, NULL);
+ }
+ *priv_vif = NULL;
+
+ if (priv_vif == &priv->sec_vif)
+ lbtf_remove_mac_address(priv, (u8 *) vif->addr);
+
lbtf_deb_leave(LBTF_DEB_MACOPS);
}
@@ -427,6 +560,7 @@ static u64 lbtf_op_prepare_multicast(struct ieee80211_hw *hw,
int i;
struct netdev_hw_addr *ha;
int mc_count = netdev_hw_addr_list_count(mc_list);
+ lbtf_deb_enter(LBTF_DEB_MACOPS);
if (!mc_count || mc_count > MRVDRV_MAX_MULTICAST_LIST_SIZE)
return mc_count;
@@ -436,6 +570,7 @@ static u64 lbtf_op_prepare_multicast(struct ieee80211_hw *hw,
netdev_hw_addr_list_for_each(ha, mc_list)
memcpy(&priv->multicastlist[i++], ha->addr, ETH_ALEN);
+ lbtf_deb_leave_args(LBTF_DEB_MACOPS, "count: %d", mc_count);
return mc_count;
}
@@ -454,10 +589,13 @@ static void lbtf_op_configure_filter(struct ieee80211_hw *hw,
*new_flags &= SUPPORTED_FIF_FLAGS;
if (!changed_flags) {
+ lbtf_deb_macops("no flags changed");
lbtf_deb_leave(LBTF_DEB_MACOPS);
return;
}
+ lbtf_deb_macops("New flags 0x%x", *new_flags);
+
if (*new_flags & (FIF_PROMISC_IN_BSS))
priv->mac_control |= CMD_ACT_MAC_PROMISCUOUS_ENABLE;
else
@@ -493,17 +631,29 @@ static void lbtf_op_bss_info_changed(struct ieee80211_hw *hw,
{
struct lbtf_private *priv = hw->priv;
struct sk_buff *beacon;
+ struct ieee80211_vif **priv_vif;
+ struct ieee80211_vif *other_vif;
lbtf_deb_enter(LBTF_DEB_MACOPS);
- if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_INT)) {
- switch (priv->vif->type) {
+ if (!(priv_vif = _lbtf_choose_vif(vif, priv, &other_vif))) {
+ lbtf_deb_macops("vif not found\n");
+ return;
+ }
+
+ lbtf_deb_macops("bss info changed: 0x%x", changes);
+ if (changes & (BSS_CHANGED_BEACON |
+ BSS_CHANGED_BEACON_INT |
+ BSS_CHANGED_BEACON_ENABLED)) {
+ switch (vif->type) {
case NL80211_IFTYPE_AP:
case NL80211_IFTYPE_MESH_POINT:
beacon = ieee80211_beacon_get(hw, vif);
if (beacon) {
lbtf_beacon_set(priv, beacon);
kfree_skb(beacon);
- lbtf_beacon_ctrl(priv, 1,
+ priv->beacon_enable = bss_conf->enable_beacon;
+ priv->beacon_int = bss_conf->beacon_int;
+ lbtf_beacon_ctrl(priv, bss_conf->enable_beacon,
bss_conf->beacon_int);
}
break;
@@ -512,6 +662,21 @@ static void lbtf_op_bss_info_changed(struct ieee80211_hw *hw,
}
}
+ if (changes & (BSS_CHANGED_BEACON_INT |
+ BSS_CHANGED_BEACON_ENABLED)) {
+ switch (vif->type) {
+ case NL80211_IFTYPE_AP:
+ case NL80211_IFTYPE_MESH_POINT:
+ priv->beacon_enable = bss_conf->enable_beacon;
+ priv->beacon_int = bss_conf->beacon_int;
+ lbtf_beacon_ctrl(priv, bss_conf->enable_beacon,
+ bss_conf->beacon_int);
+ break;
+ default:
+ break;
+ }
+ }
+
if (changes & BSS_CHANGED_BSSID) {
bool activate = !is_zero_ether_addr(bss_conf->bssid);
lbtf_set_bssid(priv, activate, bss_conf->bssid);
@@ -600,7 +765,7 @@ int lbtf_rx(struct lbtf_private *priv, struct sk_buff *skb)
lbtf_deb_rx("rx data: skb->len-sizeof(RxPd) = %d-%zd = %zd\n",
skb->len, sizeof(struct rxpd), skb->len - sizeof(struct rxpd));
- lbtf_deb_hex(LBTF_DEB_RX, "RX Data", skb->data,
+ lbtf_deb_hex(LBTF_DEB_RX, "RX Data ", skb->data,
min_t(unsigned int, skb->len, 100));
ieee80211_rx_irqsafe(priv->hw, skb);
@@ -617,7 +782,7 @@ EXPORT_SYMBOL_GPL(lbtf_rx);
*
* Returns: pointer to struct lbtf_priv.
*/
-struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev)
+struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev, u8 mac_addr[ETH_ALEN])
{
struct ieee80211_hw *hw;
struct lbtf_private *priv = NULL;
@@ -635,6 +800,7 @@ struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev)
priv->hw = hw;
priv->card = card;
priv->tx_skb = NULL;
+ priv->tx_skb_old = NULL;
hw->queues = 1;
hw->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
@@ -648,13 +814,21 @@ struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev)
hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
hw->wiphy->interface_modes =
BIT(NL80211_IFTYPE_STATION) |
- BIT(NL80211_IFTYPE_ADHOC);
+ BIT(NL80211_IFTYPE_ADHOC) |
+ BIT(NL80211_IFTYPE_AP) |
+ BIT(NL80211_IFTYPE_MESH_POINT);
skb_queue_head_init(&priv->bc_ps_buf);
+ skb_queue_head_init(&priv->tx_skb_buf);
SET_IEEE80211_DEV(hw, dmdev);
INIT_WORK(&priv->cmd_work, lbtf_cmd_work);
INIT_WORK(&priv->tx_work, lbtf_tx_work);
+
+ printk(KERN_INFO "libertas_tf: Marvell WLAN 802.11 thinfirm adapter\n");
+
+ SET_IEEE80211_PERM_ADDR(hw, mac_addr);
+
if (ieee80211_register_hw(hw))
goto err_init_adapter;
@@ -671,13 +845,20 @@ done:
}
EXPORT_SYMBOL_GPL(lbtf_add_card);
-
int lbtf_remove_card(struct lbtf_private *priv)
{
+ struct sk_buff *skb = NULL;
struct ieee80211_hw *hw = priv->hw;
lbtf_deb_enter(LBTF_DEB_MAIN);
+ ieee80211_stop_queues(priv->hw);
+
+ while (!skb_queue_empty(&priv->tx_skb_buf)) {
+ skb = skb_dequeue(&priv->tx_skb_buf);
+ dev_kfree_skb_any(skb);
+ }
+
priv->surpriseremoved = 1;
del_timer(&priv->command_timer);
lbtf_free_adapter(priv);
@@ -692,40 +873,109 @@ EXPORT_SYMBOL_GPL(lbtf_remove_card);
void lbtf_send_tx_feedback(struct lbtf_private *priv, u8 retrycnt, u8 fail)
{
- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(priv->tx_skb);
+ struct ieee80211_tx_info *info;
+ struct sk_buff *skb = NULL;
+ lbtf_deb_enter(LBTF_DEB_MAIN);
+
+ if (!skb_queue_empty(&priv->tx_skb_buf)) {
+ skb = skb_dequeue(&priv->tx_skb_buf);
+ }
+
+ if(skb == 0) {
+ lbtf_deb_stats("skb is null");
+ } else {
+
+ lbtf_deb_stats("skb is ok");
+
+ info = IEEE80211_SKB_CB(skb);
+ ieee80211_tx_info_clear_status(info);
+ /*
+ * Commented out, otherwise we never go beyond 1Mbit/s using mac80211
+ * default pid rc algorithm.
+ *
+ * info->status.retry_count = MRVL_DEFAULT_RETRIES - retrycnt;
+ */
+ if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && !fail) {
+ info->flags |= IEEE80211_TX_STAT_ACK;
+ }
+ skb_pull(skb, sizeof(struct txpd));
+ ieee80211_tx_status_irqsafe(priv->hw, skb);
+ }
- ieee80211_tx_info_clear_status(info);
- /*
- * Commented out, otherwise we never go beyond 1Mbit/s using mac80211
- * default pid rc algorithm.
- *
- * info->status.retry_count = MRVL_DEFAULT_RETRIES - retrycnt;
- */
- if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && !fail)
- info->flags |= IEEE80211_TX_STAT_ACK;
- skb_pull(priv->tx_skb, sizeof(struct txpd));
- ieee80211_tx_status_irqsafe(priv->hw, priv->tx_skb);
- priv->tx_skb = NULL;
if (!priv->skb_to_tx && skb_queue_empty(&priv->bc_ps_buf))
ieee80211_wake_queues(priv->hw);
else
queue_work(lbtf_wq, &priv->tx_work);
+
+ lbtf_deb_leave(LBTF_DEB_MAIN);
}
EXPORT_SYMBOL_GPL(lbtf_send_tx_feedback);
+void lbtf_host_to_card_done(struct lbtf_private *priv )
+{
+ lbtf_deb_enter(LBTF_DEB_MAIN);
+
+ /* Below are some extra debugging prints that normally we don't want */
+ /* Change to 1 to reenable */
+#if 0
+ lbtf_deb_main("priv: %p", priv);
+ lbtf_deb_main("priv->hw: %p", priv->hw);
+ lbtf_deb_main("priv->tx_skb: %p", priv->tx_skb);
+ lbtf_deb_main("priv->skb_to_tx: %p", priv->skb_to_tx);
+#endif
+
+ if (priv->tx_skb) {
+ lbtf_deb_main("Got done on packet.");
+ } else {
+ lbtf_deb_main("Got done on command.");
+ }
+
+ lbtf_deb_leave(LBTF_DEB_MAIN);
+}
+EXPORT_SYMBOL_GPL(lbtf_host_to_card_done);
+
+struct ieee80211_vif **_lbtf_choose_vif_by_type(enum nl80211_iftype type,
+ struct lbtf_private *priv)
+{
+ struct ieee80211_vif ** priv_vif = NULL;
+ if (priv->sec_vif != NULL && priv->sec_vif->type == type)
+ priv_vif = &priv->sec_vif;
+ else if (priv->vif != NULL && priv->vif->type == type)
+ priv_vif = &priv->vif;
+
+ return priv_vif;
+}
+
void lbtf_bcn_sent(struct lbtf_private *priv)
{
struct sk_buff *skb = NULL;
+ struct ieee80211_vif ** priv_vif = NULL;
- if (priv->vif->type != NL80211_IFTYPE_AP)
+ lbtf_deb_enter(LBTF_DEB_MAIN);
+
+ if (!priv) {
+ lbtf_deb_main("got bcn sent with priv == NULL");
+ return;
+ }
+
+ if (!(priv_vif = _lbtf_choose_vif_by_type(NL80211_IFTYPE_AP, priv))) {
+ if (!(priv_vif = _lbtf_choose_vif_by_type(NL80211_IFTYPE_MESH_POINT, priv))) {
+ lbtf_deb_macops("vif not found\n");
+ return;
+ }
+ return;
+ }
+
+ if ((*priv_vif)->type != NL80211_IFTYPE_AP &&
+ (*priv_vif)->type != NL80211_IFTYPE_MESH_POINT)
return;
if (skb_queue_empty(&priv->bc_ps_buf)) {
- bool tx_buff_bc = false;
+ bool tx_buff_bc = 0;
- while ((skb = ieee80211_get_buffered_bc(priv->hw, priv->vif))) {
+ while ((skb = ieee80211_get_buffered_bc(priv->hw, (*priv_vif)))) {
skb_queue_tail(&priv->bc_ps_buf, skb);
- tx_buff_bc = true;
+ tx_buff_bc = 1;
}
if (tx_buff_bc) {
ieee80211_stop_queues(priv->hw);
@@ -733,12 +983,15 @@ void lbtf_bcn_sent(struct lbtf_private *priv)
}
}
- skb = ieee80211_beacon_get(priv->hw, priv->vif);
+ skb = ieee80211_beacon_get(priv->hw, (*priv_vif));
if (skb) {
- lbtf_beacon_set(priv, skb);
+ lbtf_beacon_set(priv, skb);
kfree_skb(skb);
+ lbtf_beacon_ctrl(priv, priv->beacon_enable, priv->beacon_int);
}
+
+ lbtf_deb_leave(LBTF_DEB_MAIN);
}
EXPORT_SYMBOL_GPL(lbtf_bcn_sent);
diff --git a/drivers/net/wireless/mwifiex/scan.c b/drivers/net/wireless/mwifiex/scan.c
index e7f6deaf..d215b4d3 100644
--- a/drivers/net/wireless/mwifiex/scan.c
+++ b/drivers/net/wireless/mwifiex/scan.c
@@ -1393,10 +1393,8 @@ int mwifiex_scan_networks(struct mwifiex_private *priv,
queue_work(adapter->workqueue, &adapter->main_work);
/* Perform internal scan synchronously */
- if (!priv->scan_request) {
- dev_dbg(adapter->dev, "wait internal scan\n");
+ if (!priv->scan_request)
mwifiex_wait_queue_complete(adapter, cmd_node);
- }
} else {
spin_unlock_irqrestore(&adapter->scan_pending_q_lock,
flags);
@@ -1795,12 +1793,7 @@ check_next_scan:
/* Need to indicate IOCTL complete */
if (adapter->curr_cmd->wait_q_enabled) {
adapter->cmd_wait_q.status = 0;
- if (!priv->scan_request) {
- dev_dbg(adapter->dev,
- "complete internal scan\n");
- mwifiex_complete_cmd(adapter,
- adapter->curr_cmd);
- }
+ mwifiex_complete_cmd(adapter, adapter->curr_cmd);
}
if (priv->report_scan_result)
priv->report_scan_result = false;
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig
index 76cd47eb..2bf4efa3 100644
--- a/drivers/net/wireless/rt2x00/Kconfig
+++ b/drivers/net/wireless/rt2x00/Kconfig
@@ -20,7 +20,6 @@ if RT2X00
config RT2400PCI
tristate "Ralink rt2400 (PCI/PCMCIA) support"
depends on PCI
- select RT2X00_LIB_MMIO
select RT2X00_LIB_PCI
select EEPROM_93CX6
---help---
@@ -32,7 +31,6 @@ config RT2400PCI
config RT2500PCI
tristate "Ralink rt2500 (PCI/PCMCIA) support"
depends on PCI
- select RT2X00_LIB_MMIO
select RT2X00_LIB_PCI
select EEPROM_93CX6
---help---
@@ -45,7 +43,6 @@ config RT61PCI
tristate "Ralink rt2501/rt61 (PCI/PCMCIA) support"
depends on PCI
select RT2X00_LIB_PCI
- select RT2X00_LIB_MMIO
select RT2X00_LIB_FIRMWARE
select RT2X00_LIB_CRYPTO
select CRC_ITU_T
@@ -60,7 +57,6 @@ config RT2800PCI
tristate "Ralink rt27xx/rt28xx/rt30xx (PCI/PCIe/PCMCIA) support"
depends on PCI || SOC_RT288X || SOC_RT305X
select RT2800_LIB
- select RT2X00_LIB_MMIO
select RT2X00_LIB_PCI if PCI
select RT2X00_LIB_SOC if SOC_RT288X || SOC_RT305X
select RT2X00_LIB_FIRMWARE
@@ -189,9 +185,6 @@ endif
config RT2800_LIB
tristate
-config RT2X00_LIB_MMIO
- tristate
-
config RT2X00_LIB_PCI
tristate
select RT2X00_LIB
diff --git a/drivers/net/wireless/rt2x00/Makefile b/drivers/net/wireless/rt2x00/Makefile
index f069d8bc..349d5b82 100644
--- a/drivers/net/wireless/rt2x00/Makefile
+++ b/drivers/net/wireless/rt2x00/Makefile
@@ -9,7 +9,6 @@ rt2x00lib-$(CONFIG_RT2X00_LIB_FIRMWARE) += rt2x00firmware.o
rt2x00lib-$(CONFIG_RT2X00_LIB_LEDS) += rt2x00leds.o
obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o
-obj-$(CONFIG_RT2X00_LIB_MMIO) += rt2x00mmio.o
obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o
obj-$(CONFIG_RT2X00_LIB_SOC) += rt2x00soc.o
obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index dcfb54e0..221beaaa 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -34,7 +34,6 @@
#include <linux/slab.h>
#include "rt2x00.h"
-#include "rt2x00mmio.h"
#include "rt2x00pci.h"
#include "rt2400pci.h"
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index e1d2dc9e..39edc59e 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -34,7 +34,6 @@
#include <linux/slab.h>
#include "rt2x00.h"
-#include "rt2x00mmio.h"
#include "rt2x00pci.h"
#include "rt2500pci.h"
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index ba5a0562..ded73da4 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -41,7 +41,6 @@
#include <linux/eeprom_93cx6.h>
#include "rt2x00.h"
-#include "rt2x00mmio.h"
#include "rt2x00pci.h"
#include "rt2x00soc.h"
#include "rt2800lib.h"
diff --git a/drivers/net/wireless/rt2x00/rt2x00mmio.c b/drivers/net/wireless/rt2x00/rt2x00mmio.c
deleted file mode 100644
index d84a680b..00000000
--- a/drivers/net/wireless/rt2x00/rt2x00mmio.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
- <http://rt2x00.serialmonkey.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the
- Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-/*
- Module: rt2x00mmio
- Abstract: rt2x00 generic mmio device routines.
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-
-#include "rt2x00.h"
-#include "rt2x00mmio.h"
-
-/*
- * Register access.
- */
-int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- const struct rt2x00_field32 field,
- u32 *reg)
-{
- unsigned int i;
-
- if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
- return 0;
-
- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00pci_register_read(rt2x00dev, offset, reg);
- if (!rt2x00_get_field32(*reg, field))
- return 1;
- udelay(REGISTER_BUSY_DELAY);
- }
-
- printk_once(KERN_ERR "%s() Indirect register access failed: "
- "offset=0x%.08x, value=0x%.08x\n", __func__, offset, *reg);
- *reg = ~0;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
-
-bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
-{
- struct data_queue *queue = rt2x00dev->rx;
- struct queue_entry *entry;
- struct queue_entry_priv_pci *entry_priv;
- struct skb_frame_desc *skbdesc;
- int max_rx = 16;
-
- while (--max_rx) {
- entry = rt2x00queue_get_entry(queue, Q_INDEX);
- entry_priv = entry->priv_data;
-
- if (rt2x00dev->ops->lib->get_entry_state(entry))
- break;
-
- /*
- * Fill in desc fields of the skb descriptor
- */
- skbdesc = get_skb_frame_desc(entry->skb);
- skbdesc->desc = entry_priv->desc;
- skbdesc->desc_len = entry->queue->desc_size;
-
- /*
- * DMA is already done, notify rt2x00lib that
- * it finished successfully.
- */
- rt2x00lib_dmastart(entry);
- rt2x00lib_dmadone(entry);
-
- /*
- * Send the frame to rt2x00lib for further processing.
- */
- rt2x00lib_rxdone(entry, GFP_ATOMIC);
- }
-
- return !max_rx;
-}
-EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
-
-void rt2x00pci_flush_queue(struct data_queue *queue, bool drop)
-{
- unsigned int i;
-
- for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
- msleep(10);
-}
-EXPORT_SYMBOL_GPL(rt2x00pci_flush_queue);
-
-/*
- * Device initialization handlers.
- */
-static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
- struct data_queue *queue)
-{
- struct queue_entry_priv_pci *entry_priv;
- void *addr;
- dma_addr_t dma;
- unsigned int i;
-
- /*
- * Allocate DMA memory for descriptor and buffer.
- */
- addr = dma_alloc_coherent(rt2x00dev->dev,
- queue->limit * queue->desc_size,
- &dma, GFP_KERNEL);
- if (!addr)
- return -ENOMEM;
-
- memset(addr, 0, queue->limit * queue->desc_size);
-
- /*
- * Initialize all queue entries to contain valid addresses.
- */
- for (i = 0; i < queue->limit; i++) {
- entry_priv = queue->entries[i].priv_data;
- entry_priv->desc = addr + i * queue->desc_size;
- entry_priv->desc_dma = dma + i * queue->desc_size;
- }
-
- return 0;
-}
-
-static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
- struct data_queue *queue)
-{
- struct queue_entry_priv_pci *entry_priv =
- queue->entries[0].priv_data;
-
- if (entry_priv->desc)
- dma_free_coherent(rt2x00dev->dev,
- queue->limit * queue->desc_size,
- entry_priv->desc, entry_priv->desc_dma);
- entry_priv->desc = NULL;
-}
-
-int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
-{
- struct data_queue *queue;
- int status;
-
- /*
- * Allocate DMA
- */
- queue_for_each(rt2x00dev, queue) {
- status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
- if (status)
- goto exit;
- }
-
- /*
- * Register interrupt handler.
- */
- status = request_irq(rt2x00dev->irq,
- rt2x00dev->ops->lib->irq_handler,
- IRQF_SHARED, rt2x00dev->name, rt2x00dev);
- if (status) {
- ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
- rt2x00dev->irq, status);
- goto exit;
- }
-
- return 0;
-
-exit:
- queue_for_each(rt2x00dev, queue)
- rt2x00pci_free_queue_dma(rt2x00dev, queue);
-
- return status;
-}
-EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
-
-void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
-{
- struct data_queue *queue;
-
- /*
- * Free irq line.
- */
- free_irq(rt2x00dev->irq, rt2x00dev);
-
- /*
- * Free DMA
- */
- queue_for_each(rt2x00dev, queue)
- rt2x00pci_free_queue_dma(rt2x00dev, queue);
-}
-EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
-
-/*
- * rt2x00mmio module information.
- */
-MODULE_AUTHOR(DRV_PROJECT);
-MODULE_VERSION(DRV_VERSION);
-MODULE_DESCRIPTION("rt2x00 mmio library");
-MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/rt2x00/rt2x00mmio.h b/drivers/net/wireless/rt2x00/rt2x00mmio.h
deleted file mode 100644
index 4ecaf601..00000000
--- a/drivers/net/wireless/rt2x00/rt2x00mmio.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
- <http://rt2x00.serialmonkey.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the
- Free Software Foundation, Inc.,
- 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-/*
- Module: rt2x00mmio
- Abstract: Data structures for the rt2x00mmio module.
- */
-
-#ifndef RT2X00MMIO_H
-#define RT2X00MMIO_H
-
-#include <linux/io.h>
-
-/*
- * Register access.
- */
-static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- u32 *value)
-{
- *value = readl(rt2x00dev->csr.base + offset);
-}
-
-static inline void rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- void *value, const u32 length)
-{
- memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
-}
-
-static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- u32 value)
-{
- writel(value, rt2x00dev->csr.base + offset);
-}
-
-static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- const void *value,
- const u32 length)
-{
- __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
-}
-
-/**
- * rt2x00pci_regbusy_read - Read from register with busy check
- * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
- * @offset: Register offset
- * @field: Field to check if register is busy
- * @reg: Pointer to where register contents should be stored
- *
- * This function will read the given register, and checks if the
- * register is busy. If it is, it will sleep for a couple of
- * microseconds before reading the register again. If the register
- * is not read after a certain timeout, this function will return
- * FALSE.
- */
-int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- const struct rt2x00_field32 field,
- u32 *reg);
-
-/**
- * struct queue_entry_priv_pci: Per entry PCI specific information
- *
- * @desc: Pointer to device descriptor
- * @desc_dma: DMA pointer to &desc.
- * @data: Pointer to device's entry memory.
- * @data_dma: DMA pointer to &data.
- */
-struct queue_entry_priv_pci {
- __le32 *desc;
- dma_addr_t desc_dma;
-};
-
-/**
- * rt2x00pci_rxdone - Handle RX done events
- * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
- *
- * Returns true if there are still rx frames pending and false if all
- * pending rx frames were processed.
- */
-bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
-
-/**
- * rt2x00pci_flush_queue - Flush data queue
- * @queue: Data queue to stop
- * @drop: True to drop all pending frames.
- *
- * This will wait for a maximum of 100ms, waiting for the queues
- * to become empty.
- */
-void rt2x00pci_flush_queue(struct data_queue *queue, bool drop);
-
-/*
- * Device initialization handlers.
- */
-int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
-void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
-
-#endif /* RT2X00MMIO_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c
index e87865e3..a0c8caef 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.c
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.c
@@ -32,6 +32,182 @@
#include "rt2x00.h"
#include "rt2x00pci.h"
+/*
+ * Register access.
+ */
+int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const struct rt2x00_field32 field,
+ u32 *reg)
+{
+ unsigned int i;
+
+ if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
+ return 0;
+
+ for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
+ rt2x00pci_register_read(rt2x00dev, offset, reg);
+ if (!rt2x00_get_field32(*reg, field))
+ return 1;
+ udelay(REGISTER_BUSY_DELAY);
+ }
+
+ ERROR(rt2x00dev, "Indirect register access failed: "
+ "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
+ *reg = ~0;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
+
+bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
+{
+ struct data_queue *queue = rt2x00dev->rx;
+ struct queue_entry *entry;
+ struct queue_entry_priv_pci *entry_priv;
+ struct skb_frame_desc *skbdesc;
+ int max_rx = 16;
+
+ while (--max_rx) {
+ entry = rt2x00queue_get_entry(queue, Q_INDEX);
+ entry_priv = entry->priv_data;
+
+ if (rt2x00dev->ops->lib->get_entry_state(entry))
+ break;
+
+ /*
+ * Fill in desc fields of the skb descriptor
+ */
+ skbdesc = get_skb_frame_desc(entry->skb);
+ skbdesc->desc = entry_priv->desc;
+ skbdesc->desc_len = entry->queue->desc_size;
+
+ /*
+ * DMA is already done, notify rt2x00lib that
+ * it finished successfully.
+ */
+ rt2x00lib_dmastart(entry);
+ rt2x00lib_dmadone(entry);
+
+ /*
+ * Send the frame to rt2x00lib for further processing.
+ */
+ rt2x00lib_rxdone(entry, GFP_ATOMIC);
+ }
+
+ return !max_rx;
+}
+EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
+
+void rt2x00pci_flush_queue(struct data_queue *queue, bool drop)
+{
+ unsigned int i;
+
+ for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
+ msleep(10);
+}
+EXPORT_SYMBOL_GPL(rt2x00pci_flush_queue);
+
+/*
+ * Device initialization handlers.
+ */
+static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
+ struct data_queue *queue)
+{
+ struct queue_entry_priv_pci *entry_priv;
+ void *addr;
+ dma_addr_t dma;
+ unsigned int i;
+
+ /*
+ * Allocate DMA memory for descriptor and buffer.
+ */
+ addr = dma_alloc_coherent(rt2x00dev->dev,
+ queue->limit * queue->desc_size,
+ &dma, GFP_KERNEL);
+ if (!addr)
+ return -ENOMEM;
+
+ memset(addr, 0, queue->limit * queue->desc_size);
+
+ /*
+ * Initialize all queue entries to contain valid addresses.
+ */
+ for (i = 0; i < queue->limit; i++) {
+ entry_priv = queue->entries[i].priv_data;
+ entry_priv->desc = addr + i * queue->desc_size;
+ entry_priv->desc_dma = dma + i * queue->desc_size;
+ }
+
+ return 0;
+}
+
+static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
+ struct data_queue *queue)
+{
+ struct queue_entry_priv_pci *entry_priv =
+ queue->entries[0].priv_data;
+
+ if (entry_priv->desc)
+ dma_free_coherent(rt2x00dev->dev,
+ queue->limit * queue->desc_size,
+ entry_priv->desc, entry_priv->desc_dma);
+ entry_priv->desc = NULL;
+}
+
+int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
+{
+ struct data_queue *queue;
+ int status;
+
+ /*
+ * Allocate DMA
+ */
+ queue_for_each(rt2x00dev, queue) {
+ status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
+ if (status)
+ goto exit;
+ }
+
+ /*
+ * Register interrupt handler.
+ */
+ status = request_irq(rt2x00dev->irq,
+ rt2x00dev->ops->lib->irq_handler,
+ IRQF_SHARED, rt2x00dev->name, rt2x00dev);
+ if (status) {
+ ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
+ rt2x00dev->irq, status);
+ goto exit;
+ }
+
+ return 0;
+
+exit:
+ queue_for_each(rt2x00dev, queue)
+ rt2x00pci_free_queue_dma(rt2x00dev, queue);
+
+ return status;
+}
+EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
+
+void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
+{
+ struct data_queue *queue;
+
+ /*
+ * Free irq line.
+ */
+ free_irq(rt2x00dev->irq, rt2x00dev);
+
+ /*
+ * Free DMA
+ */
+ queue_for_each(rt2x00dev, queue)
+ rt2x00pci_free_queue_dma(rt2x00dev, queue);
+}
+EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
+
/*
* PCI driver handlers.
*/
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h
index 60d90b20..e2c99f2b 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.h
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.h
@@ -35,6 +35,94 @@
*/
#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
+/*
+ * Register access.
+ */
+static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ u32 *value)
+{
+ *value = readl(rt2x00dev->csr.base + offset);
+}
+
+static inline void rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ void *value, const u32 length)
+{
+ memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
+}
+
+static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ u32 value)
+{
+ writel(value, rt2x00dev->csr.base + offset);
+}
+
+static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const void *value,
+ const u32 length)
+{
+ __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
+}
+
+/**
+ * rt2x00pci_regbusy_read - Read from register with busy check
+ * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
+ * @offset: Register offset
+ * @field: Field to check if register is busy
+ * @reg: Pointer to where register contents should be stored
+ *
+ * This function will read the given register, and checks if the
+ * register is busy. If it is, it will sleep for a couple of
+ * microseconds before reading the register again. If the register
+ * is not read after a certain timeout, this function will return
+ * FALSE.
+ */
+int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const struct rt2x00_field32 field,
+ u32 *reg);
+
+/**
+ * struct queue_entry_priv_pci: Per entry PCI specific information
+ *
+ * @desc: Pointer to device descriptor
+ * @desc_dma: DMA pointer to &desc.
+ * @data: Pointer to device's entry memory.
+ * @data_dma: DMA pointer to &data.
+ */
+struct queue_entry_priv_pci {
+ __le32 *desc;
+ dma_addr_t desc_dma;
+};
+
+/**
+ * rt2x00pci_rxdone - Handle RX done events
+ * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
+ *
+ * Returns true if there are still rx frames pending and false if all
+ * pending rx frames were processed.
+ */
+bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
+
+/**
+ * rt2x00pci_flush_queue - Flush data queue
+ * @queue: Data queue to stop
+ * @drop: True to drop all pending frames.
+ *
+ * This will wait for a maximum of 100ms, waiting for the queues
+ * to become empty.
+ */
+void rt2x00pci_flush_queue(struct data_queue *queue, bool drop);
+
+/*
+ * Device initialization handlers.
+ */
+int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
+void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
+
/*
* PCI driver handlers.
*/
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 9e3c8ff5..f95792cf 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -35,7 +35,6 @@
#include <linux/eeprom_93cx6.h>
#include "rt2x00.h"
-#include "rt2x00mmio.h"
#include "rt2x00pci.h"
#include "rt61pci.h"
diff --git a/drivers/net/wireless/sd8686_uap/Kconfig b/drivers/net/wireless/sd8686_uap/Kconfig
new file mode 100644
index 00000000..3615714f
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/Kconfig
@@ -0,0 +1,6 @@
+config SD8686_UAP
+ tristate "Marvell 8xxx UAP support"
+ default y
+ ---help---
+ A User Access Point driver for Marvell sd8686 devices.
+
diff --git a/drivers/net/wireless/sd8686_uap/Makefile b/drivers/net/wireless/sd8686_uap/Makefile
new file mode 100644
index 00000000..2f02fef3
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/Makefile
@@ -0,0 +1,7 @@
+EXTRA_CFLAGS += -I$(KERNELDIR)/include
+EXTRA_CFLAGS += -DFPNUM='"52"' -DDEBUG_LEVEL1
+
+UAPOBJS = uap_main.o uap_proc.o uap_debug.o uap_sdio_mmc.o
+obj-m := uap8xxx.o
+uap8xxx-objs := $(UAPOBJS)
+
diff --git a/drivers/net/wireless/sd8686_uap/README b/drivers/net/wireless/sd8686_uap/README
new file mode 100644
index 00000000..2d6954c1
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/README
@@ -0,0 +1,76 @@
+http://github.com/chrisw957/sd8686_uap
+
+
+Update: For gumstix users, I have a single patch which can be added to your kernel recipe
+which will add this driver. See:
+https://github.com/chrisw957/meta-gumstix/commit/d0dbc51e1643860f9066c5e817db023fb062362c
+
+Original Posting:
+
+This module works well with my 3.5.0 kernel (I'm using Angstrom on an Overo IronStorm).
+
+It is based on the GPL'ed marvell code and patches at:
+
+ https://github.com/bauermann/dreamplug
+
+ and
+
+ http://www.xilka.com/sheeva/kernel/3/3.2/3.2.9/source/linux-3.0-SDIO-micro-AP.patch
+
+You do need sdio interrupt support in your kernel. I'm using:
+
+ http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux.git;a=commitdiff_plain;h=010810d22f6f49ac03da4ba384969432e0320453
+
+
+Building...
+
+ I'm building outside of bitbake/openembedded, no particular reason.
+
+ # ARM_TOOLCHAIN_PATH=~/setup-scripts/build/tmp-angstrom_v2012_05-eglibc/sysroots/x86_64-linux/usr/bin/armv7a-angstrom-linux-gnueabi
+ # PATH=$ARM_TOOLCHAIN_PATH:$PATH
+ # export ARCH=arm
+ # export CROSS_COMPILE=arm-angstrom-linux-gnueabi-
+ # make
+
+
+
+Getting the firmware...
+
+ The uap firmware can be found on the internet in the Palm Pre jar files...
+
+ # wget http://downloads.help.palm.com/webosdoctor/rom/pre/p1411r0d03312010/sr1ntp1411rod/webosdoctorp100ewwsprint.jar
+ # fastjar xfv ./webosdoctorp100ewwsprint.jar
+ # cd resources
+ # tar -xvf ./webOS.tar ./nova-cust-image-castle.rootfs.tar.gz
+ # tar -zxvf ./nova-cust-image-castle.rootfs.tar.gz ./lib/firmware
+
+
+
+Using...
+
+ On the target, put helper_sd.bin and sd8686_ap.bin in /lib/firmware/mrvl
+ then...
+ # insmod ./uap8xxx.ko
+ # ifconfig uap0 192.168.3.1 up
+ # ./wpa.sh
+ (also need to start a dhcp server)
+
+
+
+
+Example wpa.sh...
+
+ ./uaputl sys_cfg_ssid "marvell_wpa2"
+ ./uaputl sys_cfg_protocol 32
+ ./uaputl sys_cfg_wpa_passphrase "abcdefgh"
+ ./uaputl sys_cfg_cipher 8 8
+ ./uaputl sys_cfg_channel 0 1
+ ./uaputl bss_start
+
+
+
+Binaries...
+
+ Are in the "binaries" directory, and are for the gumstix overos.
+ Module is for my 3.5.0 kernel.
+
diff --git a/drivers/net/wireless/sd8686_uap/uap_debug.c b/drivers/net/wireless/sd8686_uap/uap_debug.c
new file mode 100644
index 00000000..e21c4aad
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_debug.c
@@ -0,0 +1,261 @@
+/** @file uap_debug.c
+ * @brief This file contains functions for debug proc file.
+ *
+ * Copyright (C) 2008-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+#ifdef CONFIG_PROC_FS
+#include "uap_headers.h"
+
+/********************************************************
+ Local Variables
+********************************************************/
+
+#define item_size(n) (sizeof ((uap_adapter *)0)->n)
+#define item_addr(n) ((u32) &((uap_adapter *)0)->n)
+
+#define item_dbg_size(n) (sizeof (((uap_adapter *)0)->dbg.n))
+#define item_dbg_addr(n) ((u32) &(((uap_adapter *)0)->dbg.n))
+
+#define item_dev_size(n) (sizeof ((uap_dev_t *)0)->n)
+#define item_dev_addr(n) ((u32) &((uap_dev_t *)0)->n)
+
+/** MicroAp device offset */
+#define OFFSET_UAP_DEV 0x01
+/** Bluetooth adapter offset */
+#define OFFSET_UAP_ADAPTER 0x02
+
+struct debug_data
+{
+ /** Name */
+ char name[32];
+ /** Size */
+ u32 size;
+ /** Address */
+ u32 addr;
+ /** Offset */
+ u32 offset;
+ /** Flag */
+ u32 flag;
+};
+
+/* To debug any member of uap_adapter, simply add one line here.
+ */
+static struct debug_data items[] = {
+ {"cmd_sent", item_dev_size(cmd_sent), 0, item_dev_addr(cmd_sent),
+ OFFSET_UAP_DEV},
+ {"data_sent", item_dev_size(data_sent), 0, item_dev_addr(data_sent),
+ OFFSET_UAP_DEV},
+ {"IntCounter", item_size(IntCounter), 0, item_addr(IntCounter),
+ OFFSET_UAP_ADAPTER},
+ {"cmd_pending", item_size(cmd_pending), 0, item_addr(cmd_pending),
+ OFFSET_UAP_ADAPTER},
+ {"num_cmd_h2c_fail", item_dbg_size(num_cmd_host_to_card_failure), 0,
+ item_dbg_addr(num_cmd_host_to_card_failure), OFFSET_UAP_ADAPTER},
+ {"num_tx_h2c_fail", item_dbg_size(num_tx_host_to_card_failure), 0,
+ item_dbg_addr(num_tx_host_to_card_failure), OFFSET_UAP_ADAPTER},
+ {"psmode", item_size(psmode), 0, item_addr(psmode), OFFSET_UAP_ADAPTER},
+ {"ps_state", item_size(ps_state), 0, item_addr(ps_state),
+ OFFSET_UAP_ADAPTER},
+#ifdef DEBUG_LEVEL1
+ {"drvdbg", sizeof(drvdbg), (u32) & drvdbg, 0, 0}
+#endif
+};
+
+static int num_of_items = sizeof(items) / sizeof(items[0]);
+
+/********************************************************
+ Global Variables
+********************************************************/
+
+/********************************************************
+ Local Functions
+********************************************************/
+/**
+ * @brief proc read function
+ *
+ * @param page pointer to buffer
+ * @param s read data starting position
+ * @param off offset
+ * @param cnt counter
+ * @param eof end of file flag
+ * @param data data to output
+ * @return number of output data
+ */
+static int
+uap_debug_read(char *page, char **s, off_t off, int cnt, int *eof, void *data)
+{
+ int val = 0;
+ char *p = page;
+ int i;
+
+ struct debug_data *d = (struct debug_data *) data;
+
+ if (MODULE_GET == 0)
+ return UAP_STATUS_FAILURE;
+
+ for (i = 0; i < num_of_items; i++) {
+ if (d[i].size == 1)
+ val = *((u8 *) d[i].addr);
+ else if (d[i].size == 2)
+ val = *((u16 *) d[i].addr);
+ else if (d[i].size == 4)
+ val = *((u32 *) d[i].addr);
+
+ p += sprintf(p, "%s=%d\n", d[i].name, val);
+ }
+ MODULE_PUT;
+ return p - page;
+}
+
+/**
+ * @brief proc write function
+ *
+ * @param f file pointer
+ * @param buf pointer to data buffer
+ * @param cnt data number to write
+ * @param data data to write
+ * @return number of data
+ */
+static int
+uap_debug_write(struct file *f, const char *buf, unsigned long cnt, void *data)
+{
+ int r, i;
+ char *pdata;
+ char *p;
+ char *p0;
+ char *p1;
+ char *p2;
+ struct debug_data *d = (struct debug_data *) data;
+
+ if (MODULE_GET == 0)
+ return UAP_STATUS_FAILURE;
+
+ pdata = (char *) kmalloc(cnt, GFP_KERNEL);
+ if (pdata == NULL) {
+ MODULE_PUT;
+ return 0;
+ }
+
+ if (copy_from_user(pdata, buf, cnt)) {
+ PRINTM(INFO, "Copy from user failed\n");
+ kfree(pdata);
+ MODULE_PUT;
+ return 0;
+ }
+
+ p0 = pdata;
+ for (i = 0; i < num_of_items; i++) {
+ do {
+ p = strstr(p0, d[i].name);
+ if (p == NULL)
+ break;
+ p1 = strchr(p, '\n');
+ if (p1 == NULL)
+ break;
+ p0 = p1++;
+ p2 = strchr(p, '=');
+ if (!p2)
+ break;
+ p2++;
+ r = string_to_number(p2);
+ if (d[i].size == 1)
+ *((u8 *) d[i].addr) = (u8) r;
+ else if (d[i].size == 2)
+ *((u16 *) d[i].addr) = (u16) r;
+ else if (d[i].size == 4)
+ *((u32 *) d[i].addr) = (u32) r;
+ break;
+ } while (TRUE);
+ }
+ kfree(pdata);
+#ifdef DEBUG_LEVEL1
+ printk(KERN_ALERT "drvdbg = 0x%x\n", drvdbg);
+ printk(KERN_ALERT "INFO (%08lx) %s\n", DBG_INFO,
+ (drvdbg & DBG_INFO) ? "X" : "");
+ printk(KERN_ALERT "WARN (%08lx) %s\n", DBG_WARN,
+ (drvdbg & DBG_WARN) ? "X" : "");
+ printk(KERN_ALERT "ENTRY (%08lx) %s\n", DBG_ENTRY,
+ (drvdbg & DBG_ENTRY) ? "X" : "");
+ printk(KERN_ALERT "CMD_D (%08lx) %s\n", DBG_CMD_D,
+ (drvdbg & DBG_CMD_D) ? "X" : "");
+ printk(KERN_ALERT "DAT_D (%08lx) %s\n", DBG_DAT_D,
+ (drvdbg & DBG_DAT_D) ? "X" : "");
+ printk(KERN_ALERT "CMND (%08lx) %s\n", DBG_CMND,
+ (drvdbg & DBG_CMND) ? "X" : "");
+ printk(KERN_ALERT "DATA (%08lx) %s\n", DBG_DATA,
+ (drvdbg & DBG_DATA) ? "X" : "");
+ printk(KERN_ALERT "ERROR (%08lx) %s\n", DBG_ERROR,
+ (drvdbg & DBG_ERROR) ? "X" : "");
+ printk(KERN_ALERT "FATAL (%08lx) %s\n", DBG_FATAL,
+ (drvdbg & DBG_FATAL) ? "X" : "");
+ printk(KERN_ALERT "MSG (%08lx) %s\n", DBG_MSG,
+ (drvdbg & DBG_MSG) ? "X" : "");
+#endif
+ MODULE_PUT;
+ return cnt;
+}
+
+/********************************************************
+ Global Functions
+********************************************************/
+/**
+ * @brief create debug proc file
+ *
+ * @param priv pointer uap_private
+ * @param dev pointer net_device
+ * @return N/A
+ */
+void
+uap_debug_entry(uap_private * priv, struct net_device *dev)
+{
+ int i;
+ struct proc_dir_entry *r;
+
+ if (priv->proc_entry == NULL)
+ return;
+
+ for (i = 0; i < num_of_items; i++) {
+ if (items[i].flag & OFFSET_UAP_ADAPTER)
+ items[i].addr = items[i].offset + (u32) priv->adapter;
+ if (items[i].flag & OFFSET_UAP_DEV)
+ items[i].addr = items[i].offset + (u32) & priv->uap_dev;
+ }
+ r = create_proc_entry("debug", 0644, priv->proc_entry);
+ if (r == NULL)
+ return;
+
+ r->data = &items[0];
+ r->read_proc = uap_debug_read;
+ r->write_proc = uap_debug_write;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+ r->owner = THIS_MODULE;
+#endif
+}
+
+/**
+ * @brief remove proc file
+ *
+ * @param priv pointer uap_private
+ * @return N/A
+ */
+void
+uap_debug_remove(uap_private * priv)
+{
+ remove_proc_entry("debug", priv->proc_entry);
+}
+
+#endif
diff --git a/drivers/net/wireless/sd8686_uap/uap_drv.h b/drivers/net/wireless/sd8686_uap/uap_drv.h
new file mode 100644
index 00000000..67741cc8
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_drv.h
@@ -0,0 +1,667 @@
+/** @file uap_drv.h
+ * @brief This file contains Linux OS related definitions and
+ * declarations, uAP driver
+ *
+ * Copyright (C) 2008-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+
+#ifndef _UAP_DRV_H
+#define _UAP_DRV_H
+
+/** Driver release version */
+#define DRIVER_VERSION "26146"
+
+/** True */
+#ifndef TRUE
+#define TRUE 1
+#endif
+/** False */
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+/** Bit definitions */
+#ifndef BIT
+#define BIT(x) (1UL << (x))
+#endif
+
+/** Dma addresses are 32-bits wide. */
+#ifndef __ATTRIB_ALIGN__
+#define __ATTRIB_ALIGN__ __attribute__((aligned(4)))
+#endif
+
+/** attribute pack */
+#ifndef __ATTRIB_PACK__
+#define __ATTRIB_PACK__ __attribute__ ((packed))
+#endif
+
+/** Debug Macro definition*/
+#ifdef DEBUG_LEVEL1
+
+extern u32 drvdbg;
+
+/** Debug message control bit definition for drvdbg */
+/** Debug message */
+#define DBG_MSG BIT(0)
+/** Debug fatal message */
+#define DBG_FATAL BIT(1)
+/** Debug error message */
+#define DBG_ERROR BIT(2)
+/** Debug data message */
+#define DBG_DATA BIT(3)
+/** Debug command message */
+#define DBG_CMND BIT(4)
+
+/** Debug data */
+#define DBG_DAT_D BIT(16)
+/** Debug command */
+#define DBG_CMD_D BIT(17)
+
+/** Debug entry */
+#define DBG_ENTRY BIT(28)
+/** Debug warning */
+#define DBG_WARN BIT(29)
+/** Debug info */
+#define DBG_INFO BIT(30)
+
+/** Print info */
+#define PRINTM_INFO(msg...) {if (drvdbg & DBG_INFO) printk(KERN_DEBUG msg);}
+/** Print warn message */
+#define PRINTM_WARN(msg...) {if (drvdbg & DBG_WARN) printk(KERN_DEBUG msg);}
+/** Print entry */
+#define PRINTM_ENTRY(msg...) {if (drvdbg & DBG_ENTRY) printk(KERN_DEBUG msg);}
+/** Print cmd_d */
+#define PRINTM_CMD_D(msg...) {if (drvdbg & DBG_CMD_D) printk(KERN_DEBUG msg);}
+/** Print data_d */
+#define PRINTM_DAT_D(msg...) {if (drvdbg & DBG_DAT_D) printk(KERN_DEBUG msg);}
+/** Print command */
+#define PRINTM_CMND(msg...) {if (drvdbg & DBG_CMND) printk(KERN_DEBUG msg);}
+/** Print data */
+#define PRINTM_DATA(msg...) {if (drvdbg & DBG_DATA) printk(KERN_DEBUG msg);}
+/** Print error message */
+#define PRINTM_ERROR(msg...) {if (drvdbg & DBG_ERROR) printk(KERN_DEBUG msg);}
+/** Print fatal message */
+#define PRINTM_FATAL(msg...) {if (drvdbg & DBG_FATAL) printk(KERN_DEBUG msg);}
+/** Print message */
+#define PRINTM_MSG(msg...) {if (drvdbg & DBG_MSG) printk(KERN_ALERT msg);}
+/** Print level */
+#define PRINTM(level,msg...) PRINTM_##level(msg)
+
+#else
+
+#define PRINTM(level,msg...) do {} while (0)
+
+#endif /* DEBUG_LEVEL1 */
+
+/** Wait until a condition becomes true */
+#define ASSERT(cond) \
+do { \
+ if (!(cond)) \
+ PRINTM(INFO, "ASSERT: %s, %s:%i\n", \
+ __FUNCTION__, __FILE__, __LINE__); \
+} while(0)
+
+/** Log enrty point for debugging */
+#define ENTER() PRINTM(ENTRY, "Enter: %s, %s:%i\n", __FUNCTION__, \
+ __FILE__, __LINE__)
+/** Log exit point for debugging */
+#define LEAVE() PRINTM(ENTRY, "Leave: %s, %s:%i\n", __FUNCTION__, \
+ __FILE__, __LINE__)
+
+#ifdef DEBUG_LEVEL1
+/** Dump buffer length */
+#define DBG_DUMP_BUF_LEN 64
+/** Maximum dump per line */
+#define MAX_DUMP_PER_LINE 16
+/** Data dump length */
+#define DATA_DUMP_LEN 32
+
+static inline void
+hexdump(char *prompt, u8 * buf, int len)
+{
+ int i;
+ char dbgdumpbuf[DBG_DUMP_BUF_LEN];
+ char *ptr = dbgdumpbuf;
+
+ printk(KERN_DEBUG "%s:\n", prompt);
+ for (i = 1; i <= len; i++) {
+ ptr += sprintf(ptr, "%02x ", *buf);
+ buf++;
+ if (i % MAX_DUMP_PER_LINE == 0) {
+ *ptr = 0;
+ printk(KERN_DEBUG "%s\n", dbgdumpbuf);
+ ptr = dbgdumpbuf;
+ }
+ }
+ if (len % MAX_DUMP_PER_LINE) {
+ *ptr = 0;
+ printk(KERN_DEBUG "%s\n", dbgdumpbuf);
+ }
+}
+
+/** Debug command */
+#define DBG_HEXDUMP_CMD_D(x,y,z) {if (drvdbg & DBG_CMD_D) hexdump(x,y,z);}
+/** Debug data */
+#define DBG_HEXDUMP_DAT_D(x,y,z) {if (drvdbg & DBG_DAT_D) hexdump(x,y,z);}
+/** Debug hexdump */
+#define DBG_HEXDUMP(level,x,y,z) DBG_HEXDUMP_##level(x,y,z)
+/** hexdump */
+#define HEXDUMP(x,y,z) {if (drvdbg & DBG_INFO) hexdump(x,y,z);}
+#else
+/** Do nothing since debugging is not turned on */
+#define DBG_HEXDUMP(level,x,y,z) do {} while (0)
+/** Do nothing since debugging is not turned on */
+#define HEXDUMP(x,y,z) do {} while (0)
+#endif
+
+/**
+ * Typedefs
+ */
+/** Unsigned char */
+typedef u8 BOOLEAN;
+
+/*
+ * OS macro definitions
+ */
+/** OS macro to get time */
+#define os_time_get() jiffies
+
+/** OS macro to update transfer start time */
+#define UpdateTransStart(dev) { \
+ dev->trans_start = jiffies; \
+}
+
+/** Try to get a reference to the module */
+#define MODULE_GET try_module_get(THIS_MODULE)
+/** Decrease module reference count */
+#define MODULE_PUT module_put(THIS_MODULE)
+
+/** OS macro to initialize semaphore */
+#define OS_INIT_SEMAPHORE(x) sema_init(x,1)
+/** OS macro to acquire blocking semaphore */
+#define OS_ACQ_SEMAPHORE_BLOCK(x) down_interruptible(x)
+/** OS macro to acquire non-blocking semaphore */
+#define OS_ACQ_SEMAPHORE_NOBLOCK(x) down_trylock(x)
+/** OS macro to release semaphore */
+#define OS_REL_SEMAPHORE(x) up(x)
+
+static inline void
+os_sched_timeout(u32 millisec)
+{
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout((millisec * HZ) / 1000);
+}
+
+/** Maximum size of ethernet packet */
+#define MRVDRV_MAXIMUM_ETH_PACKET_SIZE 1514
+
+/** Maximum size of multicast list */
+#define MRVDRV_MAX_MULTICAST_LIST_SIZE 32
+
+/** Find minimum */
+#ifndef MIN
+#define MIN(a,b) ((a) < (b) ? (a) : (b))
+#endif
+
+/** Find maximum */
+#ifndef MAX
+#define MAX(a,b) ((a) > (b) ? (a) : (b))
+#endif
+
+/** Find number of elements */
+#ifndef NELEMENTS
+#define NELEMENTS(x) (sizeof(x)/sizeof(x[0]))
+#endif
+
+/** Buffer Constants */
+
+/** Size of command buffer */
+#define MRVDRV_SIZE_OF_CMD_BUFFER (2 * 1024)
+
+/** Length of device length */
+#define DEV_NAME_LEN 32
+
+/** Length of ethernet address */
+#ifndef ETH_ALEN
+#define ETH_ALEN 6
+#endif
+
+/** Default watchdog timeout */
+#define MRVDRV_DEFAULT_WATCHDOG_TIMEOUT (2 * HZ)
+
+/** Success */
+#define UAP_STATUS_SUCCESS (0)
+/** Failure */
+#define UAP_STATUS_FAILURE (-1)
+/** Not accepted */
+#define UAP_STATUS_NOT_ACCEPTED (-2)
+
+/** Max loop count (* 100ms) for waiting device ready at init time */
+#define MAX_WAIT_DEVICE_READY_COUNT 50
+
+/** Tx high watermark. Stop Tx queue after this is crossed */
+#define TX_HIGH_WATERMARK 4
+/** Tx low watermark. Restart Tx queue after this is crossed */
+#define TX_LOW_WATERMARK 2
+
+/** Netlink protocol number */
+#define NETLINK_MARVELL (MAX_LINKS - 1)
+/** Netlink maximum payload size */
+#define NL_MAX_PAYLOAD 1024
+/** Netlink multicast group number */
+#define NL_MULTICAST_GROUP 1
+
+/** 20 seconds */
+#define MRVDRV_TIMER_20S 20000
+
+/** Host Command option for wait till Send */
+#define HostCmd_OPTION_WAITFORSEND 0x0001
+/** Host Command option for wait for RSP */
+#define HostCmd_OPTION_WAITFORRSP 0x0002
+/** Host Command option for wait for RSP or Timeout */
+#define HostCmd_OPTION_WAITFORRSP_TIMEOUT 0x0003
+/** Host Command option for wait for RSP of sleep confirm */
+#define HostCmd_OPTION_WAITFORRSP_SLEEPCONFIRM 0x0004
+
+/** Sleep until a condition gets true or a timeout elapses */
+#define os_wait_interruptible_timeout(waitq, cond, timeout) \
+ wait_event_interruptible_timeout(waitq, cond, ((timeout) * HZ / 1000))
+
+/** Private command ID to Host command */
+#define UAPHOSTCMD (SIOCDEVPRIVATE + 1)
+
+/** Private command ID to Power Mode */
+#define UAP_POWER_MODE (SIOCDEVPRIVATE + 3)
+/** sleep_param */
+typedef struct _ps_sleep_param
+{
+ /** control bitmap */
+ u32 ctrl_bitmap;
+ /** minimum sleep period (micro second) */
+ u32 min_sleep;
+ /** maximum sleep period (micro second) */
+ u32 max_sleep;
+} ps_sleep_param;
+
+/** inactivity sleep_param */
+typedef struct _inact_sleep_param
+{
+ /** inactivity timeout (micro second) */
+ u32 inactivity_to;
+ /** miniumu awake period (micro second) */
+ u32 min_awake;
+ /** maximum awake period (micro second) */
+ u32 max_awake;
+} inact_sleep_param;
+
+/** flag for ps mode */
+#define PS_FLAG_PS_MODE 1
+/** flag for sleep param */
+#define PS_FLAG_SLEEP_PARAM 2
+/** flag for inactivity sleep param */
+#define PS_FLAG_INACT_SLEEP_PARAM 4
+
+/** Disable power mode */
+#define PS_MODE_DISABLE 0
+/** Enable periodic dtim ps */
+#define PS_MODE_PERIODIC_DTIM 1
+/** Enable inactivity ps */
+#define PS_MODE_INACTIVITY 2
+
+/** sleep parameter */
+#define SLEEP_PARAMETER 1
+/** inactivity sleep parameter */
+#define INACTIVITY_SLEEP_PARAMETER 2
+/** ps_mgmt */
+typedef struct _ps_mgmt
+{
+ /** flags for valid field */
+ u16 flags;
+ /** power mode */
+ u16 ps_mode;
+ /** sleep param */
+ ps_sleep_param sleep_param;
+ /** inactivity sleep param */
+ inact_sleep_param inact_param;
+} ps_mgmt;
+
+/** Semaphore structure */
+typedef struct semaphore SEMAPHORE;
+
+/** Global Varibale Declaration */
+/** Private data structure of the device */
+typedef struct _uap_private uap_private;
+/** Adapter data structure of the device */
+typedef struct _uap_adapter uap_adapter;
+/** private structure */
+extern uap_private *uappriv;
+
+/** ENUM definition*/
+
+/** Hardware status codes */
+typedef enum _HARDWARE_STATUS
+{
+ HWReady,
+ HWInitializing,
+ HWReset,
+ HWClosing,
+ HWNotReady
+} HARDWARE_STATUS;
+
+/** info for debug purpose */
+typedef struct _uap_dbg
+{
+ /** Number of host to card command failures */
+ u32 num_cmd_host_to_card_failure;
+ /** Number of host to card Tx failures */
+ u32 num_tx_host_to_card_failure;
+} uap_dbg;
+
+/** Set thread state */
+#define OS_SET_THREAD_STATE(x) set_current_state(x)
+
+typedef struct
+{
+ /** Task */
+ struct task_struct *task;
+ /** Queue */
+ wait_queue_head_t waitQ;
+ /** PID */
+ pid_t pid;
+ /** Private structure */
+ void *priv;
+} uap_thread;
+
+static inline void
+uap_activate_thread(uap_thread * thr)
+{
+ /** Record the thread pid */
+ thr->pid = current->pid;
+
+ /** Initialize the wait queue */
+ init_waitqueue_head(&thr->waitQ);
+}
+
+static inline void
+uap_deactivate_thread(uap_thread * thr)
+{
+ thr->pid = 0;
+ return;
+}
+
+static inline void
+uap_create_thread(int (*uapfunc) (void *), uap_thread * thr, char *name)
+{
+ thr->task = kthread_run(uapfunc, thr, "%s", name);
+}
+
+static inline int
+uap_terminate_thread(uap_thread * thr)
+{
+ /* Check if the thread is active or not */
+ if (!thr->pid)
+ return -1;
+ kthread_stop(thr->task);
+ return 0;
+}
+
+/** Data structure for the Marvell uAP device */
+typedef struct _uap_dev
+{
+ /** device name */
+ char name[DEV_NAME_LEN];
+ /** card pointer */
+ void *card;
+ /** IO port */
+ u32 ioport;
+ /** Rx unit */
+ u8 rx_unit;
+ /** Data sent:
+ TRUE - Data is sent to fw, no Tx Done received
+ FALSE - Tx done received for previous Tx */
+ BOOLEAN data_sent;
+ /** CMD sent:
+ TRUE - CMD is sent to fw, no CMD Done received
+ FALSE - CMD done received for previous CMD */
+ BOOLEAN cmd_sent;
+ /** netdev pointer */
+ struct net_device *netdev;
+} uap_dev_t, *puap_dev_t;
+
+/** Private structure for the MV device */
+struct _uap_private
+{
+ /** Device open */
+ int open;
+
+ /** Device adapter structure */
+ uap_adapter *adapter;
+ /** Device structure */
+ uap_dev_t uap_dev;
+
+ /** Net device statistics structure */
+ struct net_device_stats stats;
+
+ /** Number of Tx timeouts */
+ u32 num_tx_timeout;
+
+ /** Media connection status */
+ BOOLEAN MediaConnected;
+
+#ifdef CONFIG_PROC_FS
+ struct proc_dir_entry *proc_uap;
+ struct proc_dir_entry *proc_entry;
+#endif /* CONFIG_PROC_FS */
+
+ /** Firmware helper */
+ const struct firmware *fw_helper;
+ /** Firmware */
+ const struct firmware *firmware;
+ /** Hotplug device */
+ struct device *hotplug_device;
+ /** thread to service interrupts */
+ uap_thread MainThread;
+ /** Driver lock */
+ spinlock_t driver_lock;
+ /** Driver lock flags */
+ ulong driver_flags;
+
+};
+
+/** PS_CMD_ConfirmSleep */
+typedef struct _PS_CMD_ConfirmSleep
+{
+ /** SDIO Length */
+ u16 SDLen;
+ /** SDIO Type */
+ u16 SDType;
+ /** Command */
+ u16 Command;
+ /** Size */
+ u16 Size;
+ /** Sequence number */
+ u16 SeqNum;
+ /** Result */
+ u16 Result;
+} __ATTRIB_PACK__ PS_CMD_ConfirmSleep, *PPS_CMD_ConfirmSleep;
+
+/** Wlan Adapter data structure*/
+struct _uap_adapter
+{
+ /** Power save confirm sleep command */
+ PS_CMD_ConfirmSleep PSConfirmSleep;
+ /** Device status */
+ HARDWARE_STATUS HardwareStatus;
+ /** Interrupt counter */
+ u32 IntCounter;
+ /** Tx packet queue */
+ struct sk_buff_head tx_queue;
+ /** Cmd packet queue */
+ struct sk_buff_head cmd_queue;
+ /** Command sequence number */
+ u16 SeqNum;
+ /** Command buffer */
+ u8 *CmdBuf;
+ /** cmd pending flag */
+ u8 cmd_pending;
+ /** cmd wait option */
+ u8 cmd_wait_option;
+ /** Command buffer length */
+ u32 CmdSize;
+ /** Command wait queue */
+ wait_queue_head_t cmdwait_q __ATTRIB_ALIGN__;
+ /** Command wait queue state flag */
+ u8 CmdWaitQWoken;
+ /** PnP support */
+ BOOLEAN SurpriseRemoved;
+ /** Debug */
+ uap_dbg dbg;
+ /** Netlink kernel socket */
+ struct sock *nl_sk;
+ /** Semaphore for CMD */
+ SEMAPHORE CmdSem;
+ /** Power Save mode */
+ u8 psmode;
+ /** Power Save state */
+ u8 ps_state;
+ /** Number of wakeup tries */
+ u32 WakeupTries;
+};
+
+static inline int
+os_upload_rx_packet(uap_private * priv, struct sk_buff *skb)
+{
+ skb->dev = priv->uap_dev.netdev;
+ skb->protocol = eth_type_trans(skb, priv->uap_dev.netdev);
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ if (in_interrupt())
+ netif_rx(skb);
+ else
+ netif_rx_ni(skb);
+ return 0;
+}
+
+/*
+ * netif carrier_on/off and start(wake)/stop_queue handling
+ */
+static inline void
+os_carrier_on(uap_private * priv)
+{
+ if (!netif_carrier_ok(priv->uap_dev.netdev) &&
+ (priv->MediaConnected == TRUE)) {
+ netif_carrier_on(priv->uap_dev.netdev);
+ }
+}
+
+static inline void
+os_carrier_off(uap_private * priv)
+{
+ if (netif_carrier_ok(priv->uap_dev.netdev)) {
+ netif_carrier_off(priv->uap_dev.netdev);
+ }
+}
+
+static inline void
+os_start_queue(uap_private * priv)
+{
+ if (netif_queue_stopped(priv->uap_dev.netdev) &&
+ (priv->MediaConnected == TRUE)) {
+ netif_wake_queue(priv->uap_dev.netdev);
+ }
+}
+
+static inline void
+os_stop_queue(uap_private * priv)
+{
+ if (!netif_queue_stopped(priv->uap_dev.netdev)) {
+ netif_stop_queue(priv->uap_dev.netdev);
+ }
+}
+
+/** Interface specific header */
+#define INTF_HEADER_LEN 4
+
+/** headroom alignment for tx packet */
+#define HEADER_ALIGNMENT 8
+
+/** The number of times to try when polling for status bits */
+#define MAX_POLL_TRIES 100
+
+/** Length of SNAP header */
+#define MRVDRV_SNAP_HEADER_LEN 8
+
+/** Extra length of Tx packet buffer */
+#define EXTRA_LEN 36
+
+/** Buffer size for ethernet Tx packets */
+#define MRVDRV_ETH_TX_PACKET_BUFFER_SIZE \
+ (ETH_FRAME_LEN + sizeof(TxPD) + EXTRA_LEN)
+
+/** Buffer size for ethernet Rx packets */
+#define MRVDRV_ETH_RX_PACKET_BUFFER_SIZE \
+ (ETH_FRAME_LEN + sizeof(RxPD) \
+ + MRVDRV_SNAP_HEADER_LEN + EXTRA_LEN)
+
+/** Packet type: data, command & event */
+typedef enum _mv_type
+{
+ MV_TYPE_DAT = 0,
+ MV_TYPE_CMD = 1,
+ MV_TYPE_EVENT = 3
+} mv_type;
+
+/** Disable interrupt */
+#define OS_INT_DISABLE spin_lock_irqsave(&priv->driver_lock, priv->driver_flags)
+/** Enable interrupt */
+#define OS_INT_RESTORE spin_unlock_irqrestore(&priv->driver_lock, priv->driver_flags)
+
+int uap_process_rx_packet(uap_private * priv, struct sk_buff *skb);
+void uap_interrupt(uap_private * priv);
+uap_private *uap_add_card(void *card);
+int uap_remove_card(void *card);
+int uap_process_event(uap_private * priv, u8 * payload, uint len);
+int uap_soft_reset(uap_private * priv);
+int uap_process_sleep_confirm_resp(uap_private * priv, u8 * resp, int resp_len);
+
+#ifdef CONFIG_PROC_FS
+/** The proc fs interface */
+void uap_proc_entry(uap_private * priv, struct net_device *dev);
+void uap_proc_remove(uap_private * priv);
+int string_to_number(char *s);
+void uap_debug_entry(uap_private * priv, struct net_device *dev);
+void uap_debug_remove(uap_private * priv);
+#endif /* CONFIG_PROC_FS */
+
+int sbi_register(void);
+void sbi_unregister(void);
+int sbi_register_dev(uap_private * priv);
+int sbi_unregister_dev(uap_private * priv);
+int sbi_prog_fw_w_helper(uap_private *);
+
+int sbi_host_to_card(uap_private * priv, u8 * payload, u16 nb);
+int sbi_claim_irq(uap_private * priv);
+int sbi_enable_host_int(uap_private * priv);
+int sbi_disable_host_int(uap_private * priv);
+
+int sbi_get_int_status(uap_private * priv, u8 * ireg);
+/** Check firmware status */
+int sbi_check_fw_status(uap_private *, int);
+int sbi_prog_helper(uap_private *);
+
+int sbi_wakeup_firmware(uap_private * priv);
+
+#endif /* _UAP_DRV_H */
diff --git a/drivers/net/wireless/sd8686_uap/uap_fw.h b/drivers/net/wireless/sd8686_uap/uap_fw.h
new file mode 100644
index 00000000..23a40d6f
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_fw.h
@@ -0,0 +1,359 @@
+/** @file uap_fw.h
+ *
+ * @brief This file contains firmware specific defines.
+ *
+ * Copyright (C) 2008-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+/********************************************************
+Change log:
+ 02/26/08: Initial creation
+********************************************************/
+
+#ifndef _UAP_FW_H
+#define _UAP_FW_H
+
+/** uap upload size */
+#define UAP_UPLD_SIZE 2312
+/** Packet type Micro AP */
+#define PKT_TYPE_MICROAP 1
+/** Packet type client */
+#define PKT_TYPE_CLIENT 0
+
+/** TxPD descriptor */
+typedef struct _TxPD
+{
+ /** Bss Type */
+ u8 BssType;
+ /** Bss num */
+ u8 BssNum;
+ /** Tx packet length */
+ u16 TxPktLength;
+ /** Tx packet offset */
+ u16 TxPktOffset;
+ /** Tx packet type */
+ u16 TxPktType;
+ /** Tx Control */
+ u32 TxControl;
+ /** reserved */
+ u32 reserved[2];
+} __ATTRIB_PACK__ TxPD, *PTxPD;
+
+/** RxPD Descriptor */
+typedef struct _RxPD
+{
+ /** Bss Type */
+ u8 BssType;
+ /** Bss Num */
+ u8 BssNum;
+ /** Tx packet length */
+ u16 RxPktLength;
+ /** Tx packet offset */
+ u16 RxPktOffset;
+} __ATTRIB_PACK__ RxPD, *PRxPD;
+
+#ifdef BIG_ENDIAN
+/** Convert from 16 bit little endian format to CPU format */
+#define uap_le16_to_cpu(x) le16_to_cpu(x)
+/** Convert from 32 bit little endian format to CPU format */
+#define uap_le32_to_cpu(x) le32_to_cpu(x)
+/** Convert from 64 bit little endian format to CPU format */
+#define uap_le64_to_cpu(x) le64_to_cpu(x)
+/** Convert to 16 bit little endian format from CPU format */
+#define uap_cpu_to_le16(x) cpu_to_le16(x)
+/** Convert to 32 bit little endian format from CPU format */
+#define uap_cpu_to_le32(x) cpu_to_le32(x)
+/** Convert to 64 bit little endian format from CPU format */
+#define uap_cpu_to_le64(x) cpu_to_le64(x)
+
+/** Convert TxPD to little endian format from CPU format */
+#define endian_convert_TxPD(x); \
+ { \
+ (x)->TxPktLength = uap_cpu_to_le16((x)->TxPktLength); \
+ (x)->TxPktOffset = uap_cpu_to_le32((x)->TxPktOffset); \
+ (x)->TxControl = uap_cpu_to_le32((x)->TxControl); \
+ (x)->TxPktType = uap_cpu_to_le32((x)->TxPktType); \
+ }
+
+/** Convert RxPD from little endian format to CPU format */
+#define endian_convert_RxPD(x); \
+ { \
+ (x)->RxPktLength = uap_le16_to_cpu((x)->RxPktLength); \
+ (x)->RxPktOffset = uap_le32_to_cpu((x)->RxPktOffset); \
+ }
+#else /* BIG_ENDIAN */
+/** Do nothing */
+#define uap_le16_to_cpu(x) x
+/** Do nothing */
+#define uap_le32_to_cpu(x) x
+/** Do nothing */
+#define uap_le64_to_cpu(x) x
+/** Do nothing */
+#define uap_cpu_to_le16(x) x
+/** Do nothing */
+#define uap_cpu_to_le32(x) x
+/** Do nothing */
+#define uap_cpu_to_le64(x) x
+
+/** Do nothing */
+#define endian_convert_TxPD(x)
+/** Do nothing */
+#define endian_convert_RxPD(x)
+#endif /* BIG_ENDIAN */
+
+/** Host Command ID : Function initialization */
+#define HostCmd_CMD_FUNC_INIT 0x00a9
+/** Host Command ID : Function shutdown */
+#define HostCmd_CMD_FUNC_SHUTDOWN 0x00aa
+
+/** Host Command id: SYS_INFO */
+#define HOST_CMD_APCMD_SYS_INFO 0x00ae
+/** Host Command id: SYS_RESET */
+#define HOST_CMD_APCMD_SYS_RESET 0x00af
+/** Host Command id: SYS_CONFIGURE */
+#define HOST_CMD_APCMD_SYS_CONFIGURE 0x00b0
+/** Host Command id: BSS_START */
+#define HOST_CMD_APCMD_BSS_START 0x00b1
+/** Host Command id: SYS_STOP */
+#define HOST_CMD_APCMD_BSS_STOP 0x00b2
+/** Host Command id: STA_LIST */
+#define HOST_CMD_APCMD_STA_LIST 0x00b3
+/** Host Command id: STA_FILTER_TABLE */
+#define HOST_CMD_APCMD_STA_FILTER_TABLE 0x00b4
+/** Host Command id: STA_DEAUTH */
+#define HOST_CMD_APCMD_STA_DEAUTH 0x00b5
+/** Host Command id: SOFT_RESET */
+#define HOST_CMD_APCMD_SOFT_RESET 0x00d5
+/** Host Command id: POWER_MGMT_EXT */
+#define HOST_CMD_POWER_MGMT_EXT 0x00ef
+/** Host Command id: SLEEP_CONFIRM*/
+#define HOST_CMD_SLEEP_CONFIRM 0x00d8
+
+/** TLV type : SSID */
+#define TLV_TYPE_SSID 0x0000
+/** TLV type : Rates */
+#define TLV_TYPE_RATES 0x0001
+/** TLV type : PHY DS */
+#define TLV_TYPE_PHY_DS 0x0003
+
+/** TLV Id : Base id */
+#define PROPRIETARY_TLV_BASE_ID 0x0100
+/** TLV Id : AP_MAC_ADDRESS */
+#define MRVL_AP_MAC_ADDRESS_TLV_ID (PROPRIETARY_TLV_BASE_ID + 43)
+/** TLV Id : Beacon period */
+#define MRVL_BEACON_PERIOD_TLV_ID (PROPRIETARY_TLV_BASE_ID + 44)
+/** TLV Id : Dtim period */
+#define MRVL_DTIM_PERIOD_TLV_ID (PROPRIETARY_TLV_BASE_ID + 45)
+/** TLV Id : Basic rates */
+#define MRVL_BASIC_RATES_TLV_ID (PROPRIETARY_TLV_BASE_ID + 46)
+/** TLV Id : Tx Power */
+#define MRVL_TX_POWER_TLV_ID (PROPRIETARY_TLV_BASE_ID + 47)
+/** TLV Id : Broadcast SSID control */
+#define MRVL_BCAST_SSID_CTL_TLV_ID (PROPRIETARY_TLV_BASE_ID + 48)
+/** TLV Id : Preamble control */
+#define MRVL_PREAMBLE_CTL_TLV_ID (PROPRIETARY_TLV_BASE_ID + 49)
+/** TLV Id : Antenna control */
+#define MRVL_ANTENNA_CTL_TLV_ID (PROPRIETARY_TLV_BASE_ID + 50)
+/** TLV Id : RTS threshold */
+#define MRVL_RTS_THRESHOLD_TLV_ID (PROPRIETARY_TLV_BASE_ID + 51)
+/** TLV Id : Radio control */
+#define MRVL_RADIO_CTL_TLV_ID (PROPRIETARY_TLV_BASE_ID + 52)
+/** TLV Id : TX data rate */
+#define MRVL_TX_DATA_RATE_TLV_ID (PROPRIETARY_TLV_BASE_ID + 53)
+/** TLV Id : Packet forward control */
+#define MRVL_PKT_FWD_CTL_TLV_ID (PROPRIETARY_TLV_BASE_ID + 54)
+/** TLV Id : STA info */
+#define MRVL_STA_INFO_TLV_ID (PROPRIETARY_TLV_BASE_ID + 55)
+/** TLV Id : STA MAC address filter */
+#define MRVL_STA_MAC_ADDR_FILTER_TLV_ID (PROPRIETARY_TLV_BASE_ID + 56)
+/** TLV Id : STA ageout timer */
+#define MRVL_STA_AGEOUT_TIMER_TLV_ID (PROPRIETARY_TLV_BASE_ID + 57)
+/** TLV Id : Security config */
+#define MRVL_SECURITY_CFG_TLV_ID (PROPRIETARY_TLV_BASE_ID + 58)
+/** TLV Id : WEP KEY */
+#define MRVL_WEP_KEY_TLV_ID (PROPRIETARY_TLV_BASE_ID + 59)
+/** TLV Id : WPA Passphrase */
+#define MRVL_WPA_PASSPHRASE_TLV_ID (PROPRIETARY_TLV_BASE_ID + 60)
+
+/** Action get */
+#define ACTION_GET 0
+/** Action set */
+#define ACTION_SET 1
+/** Length of ethernet address */
+#ifndef ETH_ALEN
+#define ETH_ALEN 6
+#endif
+
+/** HostCmd_DS_GEN */
+typedef struct
+{
+ /** Command */
+ u16 Command;
+ /** Size */
+ u16 Size;
+ /** Sequence number */
+ u16 SeqNum;
+ /** Result */
+ u16 Result;
+} __ATTRIB_PACK__ HostCmd_DS_GEN;
+
+/** Size of HostCmd_DS_GEN */
+#define S_DS_GEN sizeof(HostCmd_DS_GEN)
+
+/** _HostCmd_HEADER*/
+typedef struct
+{
+ /** Command Header : Command */
+ u16 Command;
+ /** Command Header : Size */
+ u16 Size;
+} __ATTRIB_PACK__ HostCmd_HEADER;
+
+/** HostCmd_SYS_CONFIG */
+typedef struct _HostCmd_SYS_CONFIG
+{
+ /** CMD Action GET/SET*/
+ u16 Action;
+ /** Tlv buffer */
+ u8 TlvBuffer[0];
+} __ATTRIB_PACK__ HostCmd_SYS_CONFIG;
+
+/** HostCmd_DS_POWER_MGMT_EXT */
+typedef struct _HostCmd_DS_POWER_MGMT_EXT
+{
+ /** CMD Action Get/Set*/
+ u16 action;
+ /** power mode */
+ u16 power_mode;
+} __ATTRIB_PACK__ HostCmd_DS_POWER_MGMT_EXT;
+
+/** _HostCmd_DS_COMMAND*/
+typedef struct _HostCmd_DS_COMMAND
+{
+
+ /** Command Header : Command */
+ u16 Command;
+ /** Command Header : Size */
+ u16 Size;
+ /** Command Header : Sequence number */
+ u16 SeqNum;
+ /** Command Header : Result */
+ u16 Result;
+ /** Command Body */
+ union
+ {
+ HostCmd_SYS_CONFIG sys_config;
+ HostCmd_DS_POWER_MGMT_EXT pm_cfg;
+
+ } params;
+} __ATTRIB_PACK__ HostCmd_DS_COMMAND;
+
+/** MrvlIEtypesHeader_*/
+typedef struct _MrvlIEtypesHeader
+{
+ /** Header type */
+ u16 Type;
+ /** Header length */
+ u16 Len;
+} __ATTRIB_PACK__ MrvlIEtypesHeader_t;
+
+/** MrvlIEtypes_Data_t */
+typedef struct _MrvlIEtypes_Data_t
+{
+ /** Header */
+ MrvlIEtypesHeader_t Header;
+ /** Data */
+ u8 Data[1];
+} __ATTRIB_PACK__ MrvlIEtypes_Data_t;
+
+/** MrvlIEtypes_ChanListParamSet_t */
+typedef struct _MrvlIEtypes_MacAddr_t
+{
+ /** Header */
+ MrvlIEtypesHeader_t Header;
+ /** AP MAC address */
+ u8 ApMacAddr[ETH_ALEN];
+} __ATTRIB_PACK__ MrvlIEtypes_MacAddr_t;
+
+/** Event ID: BSS started */
+#define MICRO_AP_EV_ID_BSS_START 46
+
+/** Event ID: BSS idle event */
+#define MICRO_AP_EV_BSS_IDLE 67
+
+/** Event ID: BSS active event */
+#define MICRO_AP_EV_BSS_ACTIVE 68
+
+/** Event ID: PS_AWAKE */
+#define EVENT_PS_AWAKE 0x0a
+
+/** Event ID: PS_SLEEP */
+#define EVENT_PS_SLEEP 0x0b
+
+/** PS_STATE */
+typedef enum _PS_STATE
+{
+ PS_STATE_AWAKE,
+ PS_STATE_PRE_SLEEP,
+ PS_STATE_SLEEP
+} PS_STATE;
+
+/** TLV type: AP Sleep param */
+#define TLV_TYPE_AP_SLEEP_PARAM (PROPRIETARY_TLV_BASE_ID + 106)
+/** TLV type: AP Inactivity Sleep param */
+#define TLV_TYPE_AP_INACT_SLEEP_PARAM (PROPRIETARY_TLV_BASE_ID + 107)
+
+/** MrvlIEtypes_sleep_param_t */
+typedef struct _MrvlIEtypes_sleep_param_t
+{
+ /** Header */
+ MrvlIEtypesHeader_t header;
+ /** control bitmap */
+ u32 ctrl_bitmap;
+ /** min_sleep */
+ u32 min_sleep;
+ /** max_sleep */
+ u32 max_sleep;
+} __ATTRIB_PACK__ MrvlIEtypes_sleep_param_t;
+
+/** MrvlIEtypes_inact_sleep_param_t */
+typedef struct _MrvlIEtypes_inact_sleep_param_t
+{
+ /** Header */
+ MrvlIEtypesHeader_t header;
+ /** inactivity timeout */
+ u32 inactivity_to;
+ /** min_awake */
+ u32 min_awake;
+ /** max_awake */
+ u32 max_awake;
+} __ATTRIB_PACK__ MrvlIEtypes_inact_sleep_param_t;
+
+/** AP_Event */
+typedef struct _AP_Event
+{
+ /** Event ID */
+ u32 EventId;
+ /*
+ * Reserved for STA_ASSOCIATED event and contains
+ * status information for the MIC_COUNTERMEASURES event.
+ */
+ /** Reserved/status */
+ u16 status;
+ /** AP MAC address */
+ u8 MacAddr[ETH_ALEN];
+} __ATTRIB_PACK__ AP_Event;
+#endif /* _UAP_FW_H */
diff --git a/drivers/net/wireless/sd8686_uap/uap_headers.h b/drivers/net/wireless/sd8686_uap/uap_headers.h
new file mode 100644
index 00000000..fa09af45
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_headers.h
@@ -0,0 +1,64 @@
+/** @file uap_headers.h
+ *
+ * @brief This file contains all the necessary include file.
+ *
+ * Copyright (C) 2008-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+#ifndef _UAP_HEADERS_H
+#define _UAP_HEADERS_H
+
+/* Linux header files */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/version.h>
+#include <linux/param.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/proc_fs.h>
+#include <linux/kthread.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+#include <linux/semaphore.h>
+#else
+#include <asm/semaphore.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+#include <linux/config.h>
+#endif
+
+/* Net header files */
+#include <linux/netdevice.h>
+#include <linux/net.h>
+#include <linux/skbuff.h>
+#include <linux/if_ether.h>
+#include <linux/etherdevice.h>
+#include <net/sock.h>
+#include <linux/netlink.h>
+#include <linux/firmware.h>
+#include <linux/delay.h>
+
+#include "uap_drv.h"
+#include "uap_fw.h"
+
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/card.h>
+#include "uap_sdio_mmc.h"
+
+#endif /* _UAP_HEADERS_H */
diff --git a/drivers/net/wireless/sd8686_uap/uap_main.c b/drivers/net/wireless/sd8686_uap/uap_main.c
new file mode 100644
index 00000000..977c78a2
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_main.c
@@ -0,0 +1,1801 @@
+/** @file uap_main.c
+ * @brief This file contains the major functions in uAP
+ * driver. It includes init, exit etc..
+ * This file also contains the initialization for SW,
+ * FW and HW
+ *
+ * Copyright (C) 2008-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+/**
+ * @mainpage uAP Linux Driver
+ *
+ * @section overview_sec Overview
+ *
+ * This is Linux reference driver for Marvell uAP.
+ *
+ * @section copyright_sec Copyright
+ *
+ * Copyright (C) 2008, Marvell International Ltd.
+ *
+ */
+
+#include "uap_headers.h"
+
+/**
+ * the global variable of a pointer to uap_private
+ * structure variable
+ */
+uap_private *uappriv = NULL;
+#ifdef DEBUG_LEVEL1
+#define DEFAULT_DEBUG_MASK (DBG_MSG | DBG_FATAL | DBG_ERROR)
+u32 drvdbg = DEFAULT_DEBUG_MASK;
+#endif
+/** Helper name */
+char *helper_name = NULL;
+/** Firmware name */
+char *fw_name = NULL;
+
+/** Semaphore for add/remove card */
+SEMAPHORE AddRemoveCardSem;
+
+/********************************************************
+ Local Functions
+********************************************************/
+/**
+ * @brief This function send sleep confirm command to firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS for success otherwise UAP_STATUS_FAILURE
+ */
+static int
+uap_dnld_sleep_confirm_cmd(uap_private * priv)
+{
+ uap_adapter *Adapter = priv->adapter;
+ int ret = UAP_STATUS_SUCCESS;
+ ENTER();
+ PRINTM(CMND, "Sleep confirm\n");
+ Adapter->cmd_pending = TRUE;
+ Adapter->cmd_wait_option = HostCmd_OPTION_WAITFORRSP_SLEEPCONFIRM;
+ ret =
+ sbi_host_to_card(priv, (u8 *) & Adapter->PSConfirmSleep,
+ sizeof(PS_CMD_ConfirmSleep));
+ if (ret != UAP_STATUS_SUCCESS) {
+ Adapter->ps_state = PS_STATE_AWAKE;
+ Adapter->cmd_pending = FALSE;
+ Adapter->cmd_wait_option = FALSE;
+ }
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function process sleep confirm resp from firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @param resp A pointer to resp buf
+ * @param resp_len resp buf len
+ * @return UAP_STATUS_SUCCESS for success otherwise UAP_STATUS_FAILURE
+ */
+int
+uap_process_sleep_confirm_resp(uap_private * priv, u8 * resp, int resp_len)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ HostCmd_DS_COMMAND *cmd;
+ uap_adapter *Adapter = priv->adapter;
+ ENTER();
+ PRINTM(CMND, "Sleep confirm resp\n");
+ if (!resp_len) {
+ PRINTM(ERROR, "Cmd Size is 0\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ cmd = (HostCmd_DS_COMMAND *) resp;
+ cmd->Result = uap_le16_to_cpu(cmd->Result);
+ if (cmd->Result != UAP_STATUS_SUCCESS) {
+ PRINTM(ERROR, "HOST_CMD_APCMD_PS_SLEEP_CONFIRM fail=%x\n", cmd->Result);
+ ret = -EFAULT;
+ }
+ done:
+ if (ret == UAP_STATUS_SUCCESS)
+ Adapter->ps_state = PS_STATE_SLEEP;
+ else
+ Adapter->ps_state = PS_STATE_AWAKE;
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function checks condition and prepares to
+ * send sleep confirm command to firmware if OK.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return n/a
+ */
+static void
+uap_ps_cond_check(uap_private * priv)
+{
+ uap_adapter *Adapter = priv->adapter;
+
+ ENTER();
+ if (!priv->uap_dev.cmd_sent &&
+ !Adapter->cmd_pending && !Adapter->IntCounter) {
+ uap_dnld_sleep_confirm_cmd(priv);
+ } else {
+ PRINTM(INFO, "Delay Sleep Confirm (%s%s%s)\n",
+ (priv->uap_dev.cmd_sent) ? "D" : "",
+ (Adapter->cmd_pending) ? "C" : "",
+ (Adapter->IntCounter) ? "I" : "");
+ }
+ LEAVE();
+}
+
+/**
+ * @brief This function add cmd to cmdQ and waiting for response
+ *
+ * @param priv A pointer to uap_private structure
+ * @param skb A pointer to the skb for process
+ * @param wait_option Wait option
+ * @return UAP_STATUS_SUCCESS for success otherwise UAP_STATUS_FAILURE
+ */
+static int
+uap_process_cmd(uap_private * priv, struct sk_buff *skb, u8 wait_option)
+{
+ uap_adapter *Adapter = priv->adapter;
+ int ret = UAP_STATUS_SUCCESS;
+ HostCmd_DS_COMMAND *cmd;
+ u8 *headptr;
+ ENTER();
+
+ if (Adapter->HardwareStatus != HWReady) {
+ PRINTM(ERROR, "Hw not ready, uap_process_cmd\n");
+ kfree(skb);
+ LEAVE();
+ return -EFAULT;
+ }
+ skb->cb[0] = wait_option;
+ headptr = skb->data;
+ *(u16 *) & headptr[0] = uap_cpu_to_le16(skb->len);
+ *(u16 *) & headptr[2] = uap_cpu_to_le16(MV_TYPE_CMD);
+ cmd = (HostCmd_DS_COMMAND *) (skb->data + INTF_HEADER_LEN);
+ Adapter->SeqNum++;
+ cmd->SeqNum = uap_cpu_to_le16(Adapter->SeqNum);
+ DBG_HEXDUMP(CMD_D, "process_cmd", (u8 *) cmd, cmd->Size);
+ if (!wait_option) {
+ skb_queue_tail(&priv->adapter->cmd_queue, skb);
+ wake_up_interruptible(&priv->MainThread.waitQ);
+ LEAVE();
+ return ret;
+ }
+ if (OS_ACQ_SEMAPHORE_BLOCK(&Adapter->CmdSem)) {
+ PRINTM(ERROR, "Acquire semaphore error, uap_prepare_cmd\n");
+ kfree(skb);
+ LEAVE();
+ return -EBUSY;
+ }
+ skb_queue_tail(&priv->adapter->cmd_queue, skb);
+ Adapter->CmdWaitQWoken = FALSE;
+ wake_up_interruptible(&priv->MainThread.waitQ);
+ /* Sleep until response is generated by FW */
+ if (wait_option == HostCmd_OPTION_WAITFORRSP_TIMEOUT) {
+ if (!os_wait_interruptible_timeout
+ (Adapter->cmdwait_q, Adapter->CmdWaitQWoken, MRVDRV_TIMER_20S)) {
+ PRINTM(ERROR, "Cmd timeout\n");
+ Adapter->cmd_pending = FALSE;
+ ret = -EFAULT;
+ }
+ } else
+ wait_event_interruptible(Adapter->cmdwait_q, Adapter->CmdWaitQWoken);
+ OS_REL_SEMAPHORE(&Adapter->CmdSem);
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief Inspect the response buffer for pointers to expected TLVs
+ *
+ *
+ * @param pTlv Pointer to the start of the TLV buffer to parse
+ * @param tlvBufSize Size of the TLV buffer
+ * @param reqTlvType request tlv's tlvtype
+ * @param ppTlv Output parameter: Pointer to the request TLV if found
+ *
+ * @return void
+ */
+static void
+uap_get_tlv_ptrs(MrvlIEtypes_Data_t * pTlv, int tlvBufSize,
+ u16 reqTlvType, MrvlIEtypes_Data_t ** ppTlv)
+{
+ MrvlIEtypes_Data_t *pCurrentTlv;
+ int tlvBufLeft;
+ u16 tlvType;
+ u16 tlvLen;
+
+ ENTER();
+ pCurrentTlv = pTlv;
+ tlvBufLeft = tlvBufSize;
+ *ppTlv = NULL;
+ PRINTM(INFO, "uap_get_tlv: tlvBufSize = %d, reqTlvType=%x\n", tlvBufSize,
+ reqTlvType);
+ while (tlvBufLeft >= sizeof(MrvlIEtypesHeader_t)) {
+ tlvType = uap_le16_to_cpu(pCurrentTlv->Header.Type);
+ tlvLen = uap_le16_to_cpu(pCurrentTlv->Header.Len);
+ if (reqTlvType == tlvType)
+ *ppTlv = (MrvlIEtypes_Data_t *) pCurrentTlv;
+ if (*ppTlv) {
+ HEXDUMP("TLV Buf", (u8 *) * ppTlv, tlvLen);
+ break;
+ }
+ tlvBufLeft -= (sizeof(pTlv->Header) + tlvLen);
+ pCurrentTlv = (MrvlIEtypes_Data_t *) (pCurrentTlv->Data + tlvLen);
+ } /* while */
+ LEAVE();
+}
+
+/**
+ * @brief This function get mac
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS on success, otherwise failure code
+ */
+static int
+uap_get_mac_address(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u32 CmdSize;
+ HostCmd_DS_COMMAND *cmd;
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb;
+ MrvlIEtypes_MacAddr_t *pMacAddrTlv;
+ MrvlIEtypes_Data_t *pTlv;
+ u16 tlvBufSize;
+ ENTER();
+ skb = dev_alloc_skb(MRVDRV_SIZE_OF_CMD_BUFFER);
+ if (!skb) {
+ PRINTM(ERROR, "No free skb\n");
+ ret = -ENOMEM;
+ goto done;
+ }
+ CmdSize =
+ S_DS_GEN + sizeof(HostCmd_SYS_CONFIG) + sizeof(MrvlIEtypes_MacAddr_t);
+ cmd = (HostCmd_DS_COMMAND *) (skb->data + INTF_HEADER_LEN);
+ cmd->Command = uap_cpu_to_le16(HOST_CMD_APCMD_SYS_CONFIGURE);
+ cmd->Size = uap_cpu_to_le16(CmdSize);
+ cmd->params.sys_config.Action = uap_cpu_to_le16(ACTION_GET);
+ pMacAddrTlv =
+ (MrvlIEtypes_MacAddr_t *) (skb->data + INTF_HEADER_LEN + S_DS_GEN +
+ sizeof(HostCmd_SYS_CONFIG));
+ pMacAddrTlv->Header.Type = uap_cpu_to_le16(MRVL_AP_MAC_ADDRESS_TLV_ID);
+ pMacAddrTlv->Header.Len = uap_cpu_to_le16(ETH_ALEN);
+ skb_put(skb, CmdSize + INTF_HEADER_LEN);
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORRSP_TIMEOUT)) {
+ PRINTM(ERROR, "Fail to process cmd SYS_CONFIGURE Query\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ if (!Adapter->CmdSize) {
+ PRINTM(ERROR, "Cmd Size is 0\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ cmd = (HostCmd_DS_COMMAND *) Adapter->CmdBuf;
+ cmd->Result = uap_le16_to_cpu(cmd->Result);
+ if (cmd->Result != UAP_STATUS_SUCCESS) {
+ PRINTM(ERROR, "uap_get_mac_address fail=%x\n", cmd->Result);
+ ret = -EFAULT;
+ goto done;
+ }
+ pTlv =
+ (MrvlIEtypes_Data_t *) (Adapter->CmdBuf + S_DS_GEN +
+ sizeof(HostCmd_SYS_CONFIG));
+ tlvBufSize = Adapter->CmdSize - S_DS_GEN - sizeof(HostCmd_SYS_CONFIG);
+ uap_get_tlv_ptrs(pTlv, tlvBufSize, MRVL_AP_MAC_ADDRESS_TLV_ID,
+ (MrvlIEtypes_Data_t **) & pMacAddrTlv);
+ if (pMacAddrTlv) {
+ memcpy(priv->uap_dev.netdev->dev_addr, pMacAddrTlv->ApMacAddr,
+ ETH_ALEN);
+ HEXDUMP("Original MAC addr", priv->uap_dev.netdev->dev_addr, ETH_ALEN);
+ }
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function checks the conditions and sends packet to device
+ *
+ * @param priv A pointer to uap_private structure
+ * @param skb A pointer to the skb for process
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+uap_process_tx(uap_private * priv, struct sk_buff *skb)
+{
+ uap_adapter *Adapter = priv->adapter;
+ int ret = UAP_STATUS_SUCCESS;
+ TxPD *pLocalTxPD;
+ u8 *headptr;
+ struct sk_buff *newskb;
+ int newheadlen;
+ ENTER();
+ ASSERT(skb);
+ if (!skb) {
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+ if (skb_headroom(skb) < (sizeof(TxPD) + INTF_HEADER_LEN + HEADER_ALIGNMENT)) {
+ newheadlen = sizeof(TxPD) + INTF_HEADER_LEN + HEADER_ALIGNMENT;
+ PRINTM(WARN, "Tx: Insufficient skb headroom %d\n", skb_headroom(skb));
+ /* Insufficient skb headroom - allocate a new skb */
+ newskb = skb_realloc_headroom(skb, newheadlen);
+ if (unlikely(newskb == NULL)) {
+ PRINTM(ERROR, "Tx: Cannot allocate skb\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ kfree_skb(skb);
+ skb = newskb;
+ PRINTM(INFO, "new skb headroom %d\n", skb_headroom(skb));
+ }
+ /* headptr should be aligned */
+ headptr = skb->data - sizeof(TxPD) - INTF_HEADER_LEN;
+ headptr = (u8 *) ((u32) headptr & ~((u32) (HEADER_ALIGNMENT - 1)));
+
+ pLocalTxPD = (TxPD *) (headptr + INTF_HEADER_LEN);
+ memset(pLocalTxPD, 0, sizeof(TxPD));
+ pLocalTxPD->BssType = PKT_TYPE_MICROAP;
+ pLocalTxPD->TxPktLength = skb->len;
+ /* offset of actual data */
+ pLocalTxPD->TxPktOffset = (long) skb->data - (long) pLocalTxPD;
+ endian_convert_TxPD(pLocalTxPD);
+ *(u16 *) & headptr[0] =
+ uap_cpu_to_le16(skb->len + ((long) skb->data - (long) headptr));
+ *(u16 *) & headptr[2] = uap_cpu_to_le16(MV_TYPE_DAT);
+ ret =
+ sbi_host_to_card(priv, headptr,
+ skb->len + ((long) skb->data - (long) headptr));
+ if (ret) {
+ PRINTM(ERROR, "uap_process_tx Error: sbi_host_to_card failed: 0x%X\n",
+ ret);
+ Adapter->dbg.num_tx_host_to_card_failure++;
+ goto done;
+ }
+ PRINTM(DATA, "Data => FW\n");
+ DBG_HEXDUMP(DAT_D, "Tx", headptr,
+ MIN(skb->len + sizeof(TxPD), DATA_DUMP_LEN));
+ done:
+ /* Freed skb */
+ kfree_skb(skb);
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function initializes the adapter structure
+ * and set default value to the member of adapter.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+uap_init_sw(uap_private * priv)
+{
+ uap_adapter *Adapter = priv->adapter;
+
+ ENTER();
+
+ if (!(Adapter->CmdBuf = kmalloc(MRVDRV_SIZE_OF_CMD_BUFFER, GFP_KERNEL))) {
+ PRINTM(INFO, "Failed to allocate command buffer!\n");
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+
+ Adapter->cmd_pending = FALSE;
+ Adapter->CmdWaitQWoken = FALSE;
+ Adapter->ps_state = PS_STATE_AWAKE;
+ Adapter->WakeupTries = 0;
+
+ memset(&Adapter->PSConfirmSleep, 0, sizeof(PS_CMD_ConfirmSleep));
+ /** SDIO header */
+ Adapter->PSConfirmSleep.SDLen =
+ uap_cpu_to_le16(sizeof(PS_CMD_ConfirmSleep));
+ Adapter->PSConfirmSleep.SDType = uap_cpu_to_le16(MV_TYPE_CMD);
+ Adapter->PSConfirmSleep.SeqNum = 0;
+ Adapter->PSConfirmSleep.Command = uap_cpu_to_le16(HOST_CMD_SLEEP_CONFIRM);
+ Adapter->PSConfirmSleep.Size = uap_cpu_to_le16(sizeof(HostCmd_DS_GEN));
+ Adapter->PSConfirmSleep.Result = 0;
+
+ init_waitqueue_head(&Adapter->cmdwait_q);
+ OS_INIT_SEMAPHORE(&Adapter->CmdSem);
+
+ skb_queue_head_init(&Adapter->tx_queue);
+ skb_queue_head_init(&Adapter->cmd_queue);
+
+ /* Status variable */
+ Adapter->HardwareStatus = HWInitializing;
+
+ /* PnP support */
+ Adapter->SurpriseRemoved = FALSE;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+ Adapter->nl_sk = netlink_kernel_create(NETLINK_MARVELL,
+ NL_MULTICAST_GROUP, NULL,
+ THIS_MODULE);
+#else
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+ Adapter->nl_sk = netlink_kernel_create(NETLINK_MARVELL,
+ NL_MULTICAST_GROUP, NULL, NULL,
+ THIS_MODULE);
+#else
+// Adapter->nl_sk = netlink_kernel_create(&init_net, NETLINK_MARVELL,
+// NL_MULTICAST_GROUP, NULL, NULL,
+// THIS_MODULE);
+
+
+struct netlink_kernel_cfg cfg = {
+ .input = NULL,
+};
+
+ Adapter->nl_sk = netlink_kernel_create(&init_net, NETLINK_MARVELL, &cfg);
+
+#endif
+#endif
+ if (!Adapter->nl_sk) {
+ PRINTM(ERROR,
+ "Could not initialize netlink event passing mechanism!\n");
+ }
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function sends FUNC_SHUTDOWN command to firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS on success, otherwise failure code
+ */
+static int __exit
+uap_func_shutdown(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u32 CmdSize;
+ HostCmd_DS_GEN *cmd;
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb;
+ ENTER();
+ if (Adapter->HardwareStatus != HWReady) {
+ PRINTM(ERROR, "uap_func_shutdown:Hardware is not ready!\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ skb = dev_alloc_skb(MRVDRV_SIZE_OF_CMD_BUFFER);
+ if (!skb) {
+ PRINTM(ERROR, "No free skb\n");
+ ret = -ENOMEM;
+ goto done;
+ }
+ CmdSize = sizeof(HostCmd_DS_GEN);
+ cmd = (HostCmd_DS_GEN *) (skb->data + INTF_HEADER_LEN);
+ cmd->Command = uap_cpu_to_le16(HostCmd_CMD_FUNC_SHUTDOWN);
+ cmd->Size = uap_cpu_to_le16(CmdSize);
+ skb_put(skb, CmdSize + INTF_HEADER_LEN);
+ PRINTM(CMND, "HostCmd_CMD_FUNC_SHUTDOWN\n");
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORRSP_TIMEOUT)) {
+ PRINTM(ERROR, "Fail to process cmd HostCmd_CMD_FUNC_SHUTDOWN\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function initializes firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+uap_init_fw(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ ENTER();
+
+ sbi_disable_host_int(priv);
+ /* Check if firmware is already running */
+ if (sbi_check_fw_status(priv, 1) == UAP_STATUS_SUCCESS) {
+ PRINTM(MSG, "UAP FW already running! Skip FW download\n");
+ } else {
+ if ((ret = request_firmware(&priv->fw_helper, helper_name,
+ priv->hotplug_device)) < 0) {
+ PRINTM(FATAL,
+ "request_firmware() failed (helper), error code = %#x\n",
+ ret);
+ goto done;
+ }
+
+ /* Download the helper */
+ ret = sbi_prog_helper(priv);
+
+ if (ret) {
+ PRINTM(FATAL,
+ "Bootloader in invalid state! Helper download failed!\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ if ((ret = request_firmware(&priv->firmware, fw_name,
+ priv->hotplug_device)) < 0) {
+ PRINTM(FATAL, "request_firmware() failed, error code = %#x\n", ret);
+ goto done;
+ }
+
+ /* Download the main firmware via the helper firmware */
+ if (sbi_prog_fw_w_helper(priv)) {
+ PRINTM(FATAL, "UAP FW download failed!\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ /* Check if the firmware is downloaded successfully or not */
+ if (sbi_check_fw_status(priv, MAX_FIRMWARE_POLL_TRIES) ==
+ UAP_STATUS_FAILURE) {
+ PRINTM(FATAL, "FW failed to be active in time!\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ PRINTM(MSG, "UAP FW is active\n");
+ }
+
+ sbi_claim_irq(priv);
+ sbi_enable_host_int(priv);
+ priv->adapter->HardwareStatus = HWReady;
+
+#if 0
+ if (uap_func_init(priv) != UAP_STATUS_SUCCESS) {
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+#endif
+
+ done:
+ if (priv->fw_helper)
+ release_firmware(priv->fw_helper);
+ if (priv->firmware)
+ release_firmware(priv->firmware);
+ LEAVE();
+ return ret;
+
+}
+
+/**
+ * @brief This function frees the structure of adapter
+ *
+ * @param priv A pointer to uap_private structure
+ * @return n/a
+ */
+static void
+uap_free_adapter(uap_private * priv)
+{
+ uap_adapter *Adapter = priv->adapter;
+
+ ENTER();
+
+ if (Adapter) {
+ if ((Adapter->nl_sk) && ((Adapter->nl_sk)->sk_socket)) {
+ sock_release((Adapter->nl_sk)->sk_socket);
+ Adapter->nl_sk = NULL;
+ }
+ if (Adapter->CmdBuf)
+ kfree(Adapter->CmdBuf);
+ skb_queue_purge(&priv->adapter->tx_queue);
+ skb_queue_purge(&priv->adapter->cmd_queue);
+ /* Free the adapter object itself */
+ kfree(Adapter);
+ priv->adapter = NULL;
+ }
+
+ LEAVE();
+}
+
+/**
+ * @brief This function handles the major job in uap driver.
+ * it handles the event generated by firmware, rx data received
+ * from firmware and tx data sent from kernel.
+ *
+ * @param data A pointer to uap_thread structure
+ * @return BT_STATUS_SUCCESS
+ */
+static int
+uap_service_main_thread(void *data)
+{
+ uap_thread *thread = data;
+ uap_private *priv = thread->priv;
+ uap_adapter *Adapter = priv->adapter;
+ wait_queue_t wait;
+ u8 ireg = 0;
+ struct sk_buff *skb;
+ ENTER();
+ uap_activate_thread(thread);
+ init_waitqueue_entry(&wait, current);
+ current->flags |= PF_NOFREEZE;
+
+ for (;;) {
+ add_wait_queue(&thread->waitQ, &wait);
+ OS_SET_THREAD_STATE(TASK_INTERRUPTIBLE);
+ if ((Adapter->WakeupTries) ||
+ (!Adapter->IntCounter && Adapter->ps_state == PS_STATE_PRE_SLEEP) ||
+ (!priv->adapter->IntCounter
+ && (priv->uap_dev.data_sent ||
+ skb_queue_empty(&priv->adapter->tx_queue))
+ && (priv->uap_dev.cmd_sent || Adapter->cmd_pending ||
+ skb_queue_empty(&priv->adapter->cmd_queue))
+ )) {
+ PRINTM(INFO, "Main: Thread sleeping...\n");
+ schedule();
+ }
+ OS_SET_THREAD_STATE(TASK_RUNNING);
+ remove_wait_queue(&thread->waitQ, &wait);
+ if (kthread_should_stop() || Adapter->SurpriseRemoved) {
+ PRINTM(INFO, "main-thread: break from main thread: "
+ "SurpriseRemoved=0x%x\n", Adapter->SurpriseRemoved);
+ /* Cancel pending command */
+ if (Adapter->cmd_pending == TRUE) {
+ /* Wake up cmd Q */
+ Adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&Adapter->cmdwait_q);
+ }
+ break;
+ }
+
+ PRINTM(INFO, "Main: Thread waking up...\n");
+ if (priv->adapter->IntCounter) {
+ OS_INT_DISABLE;
+ Adapter->IntCounter = 0;
+ OS_INT_RESTORE;
+ sbi_get_int_status(priv, &ireg);
+ } else if ((priv->adapter->ps_state == PS_STATE_SLEEP) &&
+ (!skb_queue_empty(&priv->adapter->cmd_queue) ||
+ !skb_queue_empty(&priv->adapter->tx_queue))) {
+ priv->adapter->WakeupTries++;
+ PRINTM(CMND, "%lu : Wakeup device...\n", os_time_get());
+ sbi_wakeup_firmware(priv);
+ continue;
+ }
+ if (Adapter->ps_state == PS_STATE_PRE_SLEEP)
+ uap_ps_cond_check(priv);
+
+ /* The PS state is changed during processing of Sleep Request event
+ above */
+ if ((Adapter->ps_state == PS_STATE_SLEEP) ||
+ (Adapter->ps_state == PS_STATE_PRE_SLEEP))
+ continue;
+ /* Execute the next command */
+ if (!priv->uap_dev.cmd_sent && !Adapter->cmd_pending &&
+ (Adapter->HardwareStatus == HWReady)) {
+ if (!skb_queue_empty(&priv->adapter->cmd_queue)) {
+ skb = skb_dequeue(&priv->adapter->cmd_queue);
+ if (skb) {
+ Adapter->CmdSize = 0;
+ Adapter->cmd_pending = TRUE;
+ Adapter->cmd_wait_option = skb->cb[0];
+ if (sbi_host_to_card(priv, skb->data, skb->len)) {
+ PRINTM(ERROR, "Cmd:sbi_host_to_card failed!\n");
+ Adapter->cmd_pending = FALSE;
+ Adapter->dbg.num_cmd_host_to_card_failure++;
+ /* Wake up cmd Q */
+ Adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&Adapter->cmdwait_q);
+ } else {
+ if (Adapter->cmd_wait_option ==
+ HostCmd_OPTION_WAITFORSEND) {
+ /* Wake up cmd Q */
+ Adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&Adapter->cmdwait_q);
+ Adapter->cmd_wait_option = FALSE;
+ }
+ }
+ kfree_skb(skb);
+ }
+ }
+ }
+ if (!priv->uap_dev.data_sent && (Adapter->HardwareStatus == HWReady)) {
+ if (!skb_queue_empty(&priv->adapter->tx_queue)) {
+ skb = skb_dequeue(&priv->adapter->tx_queue);
+ if (skb) {
+ if (uap_process_tx(priv, skb)) {
+ priv->stats.tx_dropped++;
+ priv->stats.tx_errors++;
+ os_start_queue(priv);
+ } else {
+ priv->stats.tx_packets++;
+ priv->stats.tx_bytes += skb->len;
+ }
+
+ }
+ }
+ }
+ }
+ uap_deactivate_thread(thread);
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief uap hostcmd ioctl handler
+ *
+ * @param dev A pointer to net_device structure
+ * @param req A pointer to ifreq structure
+ * @return UAP_STATUS_SUCCESS --success, otherwise fail
+ */
+/********* format of ifr_data *************/
+/* buf_len + Hostcmd_body */
+/* buf_len: 4 bytes */
+/* the length of the buf which */
+/* can be used to return data */
+/* to application */
+/* Hostcmd_body */
+/*******************************************/
+static int
+uap_hostcmd_ioctl(struct net_device *dev, struct ifreq *req)
+{
+ u32 buf_len;
+ HostCmd_HEADER head;
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+ uap_adapter *Adapter = priv->adapter;
+ int ret = UAP_STATUS_SUCCESS;
+ struct sk_buff *skb;
+
+ ENTER();
+
+ /* Sanity check */
+ if (req->ifr_data == NULL) {
+ PRINTM(ERROR, "uap_hostcmd_ioctl() corrupt data\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ if (copy_from_user(&buf_len, req->ifr_data, sizeof(buf_len))) {
+ PRINTM(ERROR, "Copy from user failed\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ memset(&head, 0, sizeof(HostCmd_HEADER));
+ /* Get the command size from user space */
+ if (copy_from_user
+ (&head, req->ifr_data + sizeof(buf_len), sizeof(HostCmd_HEADER))) {
+ PRINTM(ERROR, "Copy from user failed\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ head.Size = uap_le16_to_cpu(head.Size);
+ if (head.Size > MRVDRV_SIZE_OF_CMD_BUFFER) {
+ PRINTM(ERROR, "CmdSize too big=%d\n", head.Size);
+ LEAVE();
+ return -EFAULT;
+ }
+ PRINTM(CMND, "ioctl: hostcmd=%x, size=%d,buf_len=%d\n", head.Command,
+ head.Size, buf_len);
+ skb = dev_alloc_skb(head.Size + INTF_HEADER_LEN);
+ if (!skb) {
+ PRINTM(ERROR, "No free skb\n");
+ LEAVE();
+ return -ENOMEM;
+ }
+
+ /* Get the command from user space */
+ if (copy_from_user
+ (skb->data + INTF_HEADER_LEN, req->ifr_data + sizeof(buf_len),
+ head.Size)) {
+ PRINTM(ERROR, "Copy from user failed\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ skb_put(skb, head.Size + INTF_HEADER_LEN);
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORRSP)) {
+ PRINTM(ERROR, "Fail to process cmd\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ if (!Adapter->CmdSize) {
+ PRINTM(ERROR, "Cmd Size is 0\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ if (Adapter->CmdSize > buf_len) {
+ PRINTM(ERROR, "buf_len is too small\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ /* Copy to user */
+ if (copy_to_user
+ (req->ifr_data + sizeof(buf_len), Adapter->CmdBuf, Adapter->CmdSize)) {
+ PRINTM(ERROR, "Copy to user failed!\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief uap power mode ioctl handler
+ *
+ * @param dev A pointer to net_device structure
+ * @param req A pointer to ifreq structure
+ * @return UAP_STATUS_SUCCESS --success, otherwise fail
+ */
+static int
+uap_power_mode_ioctl(struct net_device *dev, struct ifreq *req)
+{
+ ps_mgmt pm_cfg;
+ int ret = UAP_STATUS_SUCCESS;
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb = NULL;
+ HostCmd_DS_COMMAND *cmd;
+ u32 CmdSize;
+ u8 *tlv = NULL;
+ MrvlIEtypes_sleep_param_t *sleep_tlv = NULL;
+ MrvlIEtypes_inact_sleep_param_t *inact_tlv = NULL;
+ u16 tlv_buf_left = 0;
+ MrvlIEtypesHeader_t *tlvbuf = NULL;
+ u16 tlv_type = 0;
+ u16 tlv_len = 0;
+
+ ENTER();
+
+ /* Sanity check */
+ if (req->ifr_data == NULL) {
+ PRINTM(ERROR, "uap_power_mode_ioctl() corrupt data\n");
+ LEAVE();
+ return -EFAULT;
+ }
+
+ memset(&pm_cfg, 0, sizeof(ps_mgmt));
+ if (copy_from_user(&pm_cfg, req->ifr_data, sizeof(ps_mgmt))) {
+ PRINTM(ERROR, "Copy from user failed\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ PRINTM(CMND,
+ "ioctl power: flag=0x%x ps_mode=%d ctrl_bitmap=%d min_sleep=%d max_sleep=%d "
+ "inact_to=%d min_awake=%d max_awake=%d\n", pm_cfg.flags,
+ (int) pm_cfg.ps_mode, (int) pm_cfg.sleep_param.ctrl_bitmap,
+ (int) pm_cfg.sleep_param.min_sleep,
+ (int) pm_cfg.sleep_param.max_sleep,
+ (int) pm_cfg.inact_param.inactivity_to,
+ (int) pm_cfg.inact_param.min_awake,
+ (int) pm_cfg.inact_param.max_awake);
+
+ if (pm_cfg.
+ flags & ~(PS_FLAG_PS_MODE | PS_FLAG_SLEEP_PARAM |
+ PS_FLAG_INACT_SLEEP_PARAM)) {
+ PRINTM(ERROR, "Invalid parameter: flags = 0x%x\n", pm_cfg.flags);
+ ret = -EINVAL;
+ goto done;
+ }
+ if (pm_cfg.ps_mode > PS_MODE_INACTIVITY) {
+ PRINTM(ERROR, "Invalid parameter: ps_mode = %d\n", (int) pm_cfg.flags);
+ ret = -EINVAL;
+ goto done;
+ }
+
+ skb = dev_alloc_skb(MRVDRV_SIZE_OF_CMD_BUFFER);
+ if (!skb) {
+ PRINTM(INFO, "No free skb\n");
+ ret = -ENOMEM;
+ goto done;
+ }
+
+ CmdSize = S_DS_GEN + sizeof(HostCmd_DS_POWER_MGMT_EXT);
+
+ cmd = (HostCmd_DS_COMMAND *) (skb->data + INTF_HEADER_LEN);
+ cmd->Command = uap_cpu_to_le16(HOST_CMD_POWER_MGMT_EXT);
+ if (!pm_cfg.flags) {
+ cmd->params.pm_cfg.action = uap_cpu_to_le16(ACTION_GET);
+ } else {
+ cmd->params.pm_cfg.action = uap_cpu_to_le16(ACTION_SET);
+ cmd->params.pm_cfg.power_mode = uap_cpu_to_le16(pm_cfg.ps_mode);
+ tlv = (u8 *) & cmd->params.pm_cfg + sizeof(HostCmd_DS_POWER_MGMT_EXT);
+
+ if ((pm_cfg.ps_mode) && (pm_cfg.flags & PS_FLAG_SLEEP_PARAM)) {
+ sleep_tlv = (MrvlIEtypes_sleep_param_t *) tlv;
+ sleep_tlv->header.Type = uap_cpu_to_le16(TLV_TYPE_AP_SLEEP_PARAM);
+ sleep_tlv->header.Len =
+ uap_cpu_to_le16(sizeof(MrvlIEtypes_sleep_param_t) -
+ sizeof(MrvlIEtypesHeader_t));
+ sleep_tlv->ctrl_bitmap =
+ uap_cpu_to_le32(pm_cfg.sleep_param.ctrl_bitmap);
+ sleep_tlv->min_sleep =
+ uap_cpu_to_le32(pm_cfg.sleep_param.min_sleep);
+ sleep_tlv->max_sleep =
+ uap_cpu_to_le32(pm_cfg.sleep_param.max_sleep);
+ CmdSize += sizeof(MrvlIEtypes_sleep_param_t);
+ tlv += sizeof(MrvlIEtypes_sleep_param_t);
+ }
+ if ((pm_cfg.ps_mode == PS_MODE_INACTIVITY) &&
+ (pm_cfg.flags & PS_FLAG_INACT_SLEEP_PARAM)) {
+ inact_tlv = (MrvlIEtypes_inact_sleep_param_t *) tlv;
+ inact_tlv->header.Type =
+ uap_cpu_to_le16(TLV_TYPE_AP_INACT_SLEEP_PARAM);
+ inact_tlv->header.Len =
+ uap_cpu_to_le16(sizeof(MrvlIEtypes_inact_sleep_param_t) -
+ sizeof(MrvlIEtypesHeader_t));
+ inact_tlv->inactivity_to =
+ uap_cpu_to_le32(pm_cfg.inact_param.inactivity_to);
+ inact_tlv->min_awake =
+ uap_cpu_to_le32(pm_cfg.inact_param.min_awake);
+ inact_tlv->max_awake =
+ uap_cpu_to_le32(pm_cfg.inact_param.max_awake);
+ CmdSize += sizeof(MrvlIEtypes_inact_sleep_param_t);
+ tlv += sizeof(MrvlIEtypes_inact_sleep_param_t);
+ }
+ }
+ cmd->Size = uap_cpu_to_le16(CmdSize);
+ skb_put(skb, CmdSize + INTF_HEADER_LEN);
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORRSP)) {
+ PRINTM(ERROR, "Fail to process cmd POWER_MODE\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ if (!Adapter->CmdSize) {
+ PRINTM(ERROR, "Cmd Size is 0\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ cmd = (HostCmd_DS_COMMAND *) Adapter->CmdBuf;
+ cmd->Result = uap_le16_to_cpu(cmd->Result);
+ if (cmd->Result != UAP_STATUS_SUCCESS) {
+ PRINTM(ERROR, "HOST_CMD_APCMD_POWER_MODE fail=%x\n", cmd->Result);
+ ret = -EFAULT;
+ goto done;
+ }
+ if (pm_cfg.flags) {
+ Adapter->psmode = uap_le16_to_cpu(cmd->params.pm_cfg.power_mode);
+ } else {
+ pm_cfg.flags = PS_FLAG_PS_MODE;
+ pm_cfg.ps_mode = uap_le16_to_cpu(cmd->params.pm_cfg.power_mode);
+ tlv_buf_left =
+ cmd->Size - (sizeof(HostCmd_DS_POWER_MGMT_EXT) + S_DS_GEN);
+ tlvbuf =
+ (MrvlIEtypesHeader_t *) ((u8 *) & cmd->params.pm_cfg +
+ sizeof(HostCmd_DS_POWER_MGMT_EXT));
+ while (tlv_buf_left >= sizeof(MrvlIEtypesHeader_t)) {
+ tlv_type = uap_le16_to_cpu(tlvbuf->Type);
+ tlv_len = uap_le16_to_cpu(tlvbuf->Len);
+ switch (tlv_type) {
+ case TLV_TYPE_AP_SLEEP_PARAM:
+ sleep_tlv = (MrvlIEtypes_sleep_param_t *) tlvbuf;
+ pm_cfg.flags |= PS_FLAG_SLEEP_PARAM;
+ pm_cfg.sleep_param.ctrl_bitmap =
+ uap_le32_to_cpu(sleep_tlv->ctrl_bitmap);
+ pm_cfg.sleep_param.min_sleep =
+ uap_le32_to_cpu(sleep_tlv->min_sleep);
+ pm_cfg.sleep_param.max_sleep =
+ uap_le32_to_cpu(sleep_tlv->max_sleep);
+ break;
+ case TLV_TYPE_AP_INACT_SLEEP_PARAM:
+ inact_tlv = (MrvlIEtypes_inact_sleep_param_t *) tlvbuf;
+ pm_cfg.flags |= PS_FLAG_INACT_SLEEP_PARAM;
+ pm_cfg.inact_param.inactivity_to =
+ uap_le32_to_cpu(inact_tlv->inactivity_to);
+ pm_cfg.inact_param.min_awake =
+ uap_le32_to_cpu(inact_tlv->min_awake);
+ pm_cfg.inact_param.max_awake =
+ uap_le32_to_cpu(inact_tlv->max_awake);
+ break;
+ }
+ tlv_buf_left -= tlv_len + sizeof(MrvlIEtypesHeader_t);
+ tlvbuf =
+ (MrvlIEtypesHeader_t *) ((u8 *) tlvbuf + tlv_len +
+ sizeof(MrvlIEtypesHeader_t));
+ }
+ /* Copy to user */
+ if (copy_to_user(req->ifr_data, &pm_cfg, sizeof(ps_mgmt))) {
+ PRINTM(ERROR, "Copy to user failed!\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ }
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function send bss_stop command to firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS on success, otherwise failure code
+ */
+static int
+uap_bss_stop(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u32 CmdSize;
+ HostCmd_DS_GEN *cmd;
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb;
+ ENTER();
+ if (Adapter->HardwareStatus != HWReady) {
+ PRINTM(ERROR, "uap_bss_stop:Hardware is not ready!\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ skb = dev_alloc_skb(MRVDRV_SIZE_OF_CMD_BUFFER);
+ if (!skb) {
+ PRINTM(ERROR, "No free skb\n");
+ ret = -ENOMEM;
+ goto done;
+ }
+ CmdSize = sizeof(HostCmd_DS_GEN);
+ cmd = (HostCmd_DS_GEN *) (skb->data + INTF_HEADER_LEN);
+ cmd->Command = uap_cpu_to_le16(HOST_CMD_APCMD_BSS_STOP);
+ cmd->Size = uap_cpu_to_le16(CmdSize);
+ skb_put(skb, CmdSize + INTF_HEADER_LEN);
+ PRINTM(CMND, "APCMD_BSS_STOP\n");
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORRSP_TIMEOUT)) {
+ PRINTM(ERROR, "Fail to process cmd BSS_STOP\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ done:
+ LEAVE();
+ return ret;
+}
+
+/********************************************************
+ Global Functions
+********************************************************/
+/**
+ * @brief This function send soft_reset command to firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS on success, otherwise failure code
+ */
+int
+uap_soft_reset(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u32 CmdSize;
+ HostCmd_DS_GEN *cmd;
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb;
+ ENTER();
+
+ ret = uap_bss_stop(priv);
+ if (ret != UAP_STATUS_SUCCESS)
+ goto done;
+ skb = dev_alloc_skb(MRVDRV_SIZE_OF_CMD_BUFFER);
+ if (!skb) {
+ PRINTM(ERROR, "No free skb\n");
+ ret = -ENOMEM;
+ goto done;
+ }
+ CmdSize = sizeof(HostCmd_DS_GEN);
+ cmd = (HostCmd_DS_GEN *) (skb->data + INTF_HEADER_LEN);
+ cmd->Command = uap_cpu_to_le16(HOST_CMD_APCMD_SOFT_RESET);
+ cmd->Size = uap_cpu_to_le16(CmdSize);
+ skb_put(skb, CmdSize + INTF_HEADER_LEN);
+ PRINTM(CMND, "APCMD_SOFT_RESET\n");
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORSEND)) {
+ PRINTM(ERROR, "Fail to process cmd SOFT_RESET\n");
+ ret = -EFAULT;
+ goto done;
+ }
+ Adapter->SurpriseRemoved = TRUE;
+ /* delay to allow hardware complete reset */
+ os_sched_timeout(5);
+ if (priv->MediaConnected == TRUE) {
+ os_stop_queue(priv);
+ os_carrier_off(priv);
+ priv->MediaConnected = FALSE;
+ }
+ Adapter->CmdSize = 0;
+ Adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&Adapter->cmdwait_q);
+ skb_queue_purge(&priv->adapter->tx_queue);
+ skb_queue_purge(&priv->adapter->cmd_queue);
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function processes received packet and forwards it
+ * to kernel/upper layer
+ *
+ * @param priv A pointer to uap_private
+ * @param skb A pointer to skb which includes the received packet
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+uap_process_rx_packet(uap_private * priv, struct sk_buff *skb)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ RxPD *pRxPD;
+ ENTER();
+ priv->adapter->ps_state = PS_STATE_AWAKE;
+ pRxPD = (RxPD *) skb->data;
+ endian_convert_RxPD(pRxPD);
+ DBG_HEXDUMP(DAT_D, "Rx", skb->data, MIN(skb->len, DATA_DUMP_LEN));
+ skb_pull(skb, pRxPD->RxPktOffset);
+ priv->stats.rx_packets++;
+ priv->stats.rx_bytes += skb->len;
+ os_upload_rx_packet(priv, skb);
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function opens the network device
+ *
+ * @param dev A pointer to net_device structure
+ * @return UAP_STATUS_SUCCESS
+ */
+static int
+uap_open(struct net_device *dev)
+{
+ uap_private *priv = (uap_private *) (uap_private *) netdev_priv(dev);
+ uap_adapter *Adapter = priv->adapter;
+ int i = 0;
+
+ ENTER();
+
+ /* On some systems the device open handler will be called before HW ready. */
+ /* Use the following flag check and wait function to work around the issue. */
+ while ((Adapter->HardwareStatus != HWReady) &&
+ (i < MAX_WAIT_DEVICE_READY_COUNT)) {
+ i++;
+ os_sched_timeout(100);
+ }
+ if (i >= MAX_WAIT_DEVICE_READY_COUNT) {
+ PRINTM(FATAL, "HW not ready, uap_open() return failure\n");
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+
+ if (MODULE_GET == 0)
+ return UAP_STATUS_FAILURE;
+
+ priv->open = TRUE;
+ if (priv->MediaConnected == TRUE) {
+ os_carrier_on(priv);
+ os_start_queue(priv);
+ } else {
+ os_stop_queue(priv);
+ os_carrier_off(priv);
+ }
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function closes the network device
+ *
+ * @param dev A pointer to net_device structure
+ * @return UAP_STATUS_SUCCESS
+ */
+static int
+uap_close(struct net_device *dev)
+{
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+
+ ENTER();
+ skb_queue_purge(&priv->adapter->tx_queue);
+ os_stop_queue(priv);
+ os_carrier_off(priv);
+
+ MODULE_PUT;
+ priv->open = FALSE;
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function returns the network statistics
+ *
+ * @param dev A pointer to uap_private structure
+ * @return A pointer to net_device_stats structure
+ */
+static struct net_device_stats *
+uap_get_stats(struct net_device *dev)
+{
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+
+ return &priv->stats;
+}
+
+/**
+ * @brief This function sets the MAC address to firmware.
+ *
+ * @param dev A pointer to uap_private structure
+ * @param addr MAC address to set
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+uap_set_mac_address(struct net_device *dev, void *addr)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+ struct sockaddr *pHwAddr = (struct sockaddr *) addr;
+ u32 CmdSize;
+ HostCmd_DS_COMMAND *cmd;
+ MrvlIEtypes_MacAddr_t *pMacAddrTlv;
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb;
+
+ ENTER();
+
+ /* Dump MAC address */
+ DBG_HEXDUMP(CMD_D, "Original MAC addr", dev->dev_addr, ETH_ALEN);
+ DBG_HEXDUMP(CMD_D, "New MAC addr", pHwAddr->sa_data, ETH_ALEN);
+ if (priv->open && (priv->MediaConnected == TRUE)) {
+ os_carrier_on(priv);
+ os_start_queue(priv);
+ }
+ skb = dev_alloc_skb(MRVDRV_SIZE_OF_CMD_BUFFER);
+ if (!skb) {
+ PRINTM(ERROR, "No free skb\n");
+ LEAVE();
+ return -ENOMEM;
+ }
+ CmdSize =
+ S_DS_GEN + sizeof(HostCmd_SYS_CONFIG) + sizeof(MrvlIEtypes_MacAddr_t);
+ cmd = (HostCmd_DS_COMMAND *) (skb->data + INTF_HEADER_LEN);
+ cmd->Command = uap_cpu_to_le16(HOST_CMD_APCMD_SYS_CONFIGURE);
+ cmd->Size = uap_cpu_to_le16(CmdSize);
+ cmd->params.sys_config.Action = uap_cpu_to_le16(ACTION_SET);
+ pMacAddrTlv =
+ (MrvlIEtypes_MacAddr_t *) ((u8 *) cmd + S_DS_GEN +
+ sizeof(HostCmd_SYS_CONFIG));
+ pMacAddrTlv->Header.Type = uap_cpu_to_le16(MRVL_AP_MAC_ADDRESS_TLV_ID);
+ pMacAddrTlv->Header.Len = uap_cpu_to_le16(ETH_ALEN);
+ memcpy(pMacAddrTlv->ApMacAddr, pHwAddr->sa_data, ETH_ALEN);
+ skb_put(skb, CmdSize + INTF_HEADER_LEN);
+ PRINTM(CMND, "set_mac_address\n");
+ if (UAP_STATUS_SUCCESS !=
+ uap_process_cmd(priv, skb, HostCmd_OPTION_WAITFORRSP_TIMEOUT)) {
+ PRINTM(ERROR, "Fail to set mac address\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ if (!Adapter->CmdSize) {
+ PRINTM(ERROR, "Cmd Size is 0\n");
+ LEAVE();
+ return -EFAULT;
+ }
+ cmd = (HostCmd_DS_COMMAND *) Adapter->CmdBuf;
+ cmd->Result = uap_cpu_to_le16(cmd->Result);
+ if (cmd->Result != UAP_STATUS_SUCCESS) {
+ PRINTM(ERROR, "set mac addrress fail,cmd result=%x\n", cmd->Result);
+ ret = -EFAULT;
+ } else
+ memcpy(dev->dev_addr, pHwAddr->sa_data, ETH_ALEN);
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function sets multicast addresses to firmware
+ *
+ * @param dev A pointer to net_device structure
+ * @return n/a
+ */
+static void
+uap_set_multicast_list(struct net_device *dev)
+{
+ ENTER();
+#warning uap_set_multicast_list not implemented. Expect problems with IPv6.
+ LEAVE();
+}
+
+/**
+ * @brief This function handles the timeout of packet
+ * transmission
+ *
+ * @param dev A pointer to net_device structure
+ * @return n/a
+ */
+static void
+uap_tx_timeout(struct net_device *dev)
+{
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+
+ ENTER();
+ PRINTM(DATA, "Tx timeout\n");
+ UpdateTransStart(dev);
+ priv->num_tx_timeout++;
+ priv->adapter->IntCounter++;
+ wake_up_interruptible(&priv->MainThread.waitQ);
+
+ LEAVE();
+}
+
+/**
+ * @brief This function handles packet transmission
+ *
+ * @param skb A pointer to sk_buff structure
+ * @param dev A pointer to net_device structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+uap_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+ uap_private *priv = (uap_private *) netdev_priv(dev);
+ int ret = UAP_STATUS_SUCCESS;
+
+ ENTER();
+
+ PRINTM(DATA, "Data <= kernel\n");
+ DBG_HEXDUMP(DAT_D, "Tx", skb->data, MIN(skb->len, DATA_DUMP_LEN));
+ /* skb sanity check */
+ if (!skb->len || (skb->len > MRVDRV_MAXIMUM_ETH_PACKET_SIZE)) {
+ PRINTM(ERROR, "Tx Error: Bad skb length %d : %d\n", skb->len,
+ MRVDRV_MAXIMUM_ETH_PACKET_SIZE);
+ priv->stats.tx_dropped++;
+ kfree(skb);
+ goto done;
+ }
+ skb_queue_tail(&priv->adapter->tx_queue, skb);
+ wake_up_interruptible(&priv->MainThread.waitQ);
+ if (skb_queue_len(&priv->adapter->tx_queue) > TX_HIGH_WATERMARK) {
+ UpdateTransStart(dev);
+ os_stop_queue(priv);
+ }
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief ioctl function - entry point
+ *
+ * @param dev A pointer to net_device structure
+ * @param req A pointer to ifreq structure
+ * @param cmd command
+ * @return UAP_STATUS_SUCCESS--success, otherwise fail
+ */
+static int
+uap_do_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
+{
+ int ret = UAP_STATUS_SUCCESS;
+
+ ENTER();
+
+ PRINTM(CMND, "uap_do_ioctl: ioctl cmd = 0x%x\n", cmd);
+
+ switch (cmd) {
+ case UAPHOSTCMD:
+ ret = uap_hostcmd_ioctl(dev, req);
+ break;
+ case UAP_POWER_MODE:
+ ret = uap_power_mode_ioctl(dev, req);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function handles events generated by firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @param payload A pointer to payload buffer
+ * @param len Length of the payload
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+uap_process_event(uap_private * priv, u8 * payload, uint len)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ uap_adapter *Adapter = priv->adapter;
+ struct sk_buff *skb = NULL;
+ struct nlmsghdr *nlh = NULL;
+ struct sock *sk = Adapter->nl_sk;
+ AP_Event *pEvent;
+
+ ENTER();
+
+ Adapter->ps_state = PS_STATE_AWAKE;
+ if (len > NL_MAX_PAYLOAD) {
+ PRINTM(ERROR, "event size is too big!!! len=%d\n", len);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ pEvent = (AP_Event *) payload;
+ switch (pEvent->EventId) {
+ case MICRO_AP_EV_ID_BSS_START:
+ memcpy(priv->uap_dev.netdev->dev_addr, pEvent->MacAddr, ETH_ALEN);
+ DBG_HEXDUMP(CMD_D, "BSS MAC addr", priv->uap_dev.netdev->dev_addr,
+ ETH_ALEN);
+ break;
+ case MICRO_AP_EV_BSS_ACTIVE:
+ // carrier on
+ priv->MediaConnected = TRUE;
+ os_carrier_on(priv);
+ os_start_queue(priv);
+ break;
+ case MICRO_AP_EV_BSS_IDLE:
+ os_stop_queue(priv);
+ os_carrier_off(priv);
+ priv->MediaConnected = FALSE;
+ break;
+ case EVENT_PS_AWAKE:
+ PRINTM(CMND, "UAP: PS_AWAKE\n");
+ Adapter->ps_state = PS_STATE_AWAKE;
+ Adapter->WakeupTries = 0;
+ break;
+ case EVENT_PS_SLEEP:
+ PRINTM(CMND, "UAP: PS_SLEEP\n");
+ Adapter->ps_state = PS_STATE_PRE_SLEEP;
+ break;
+ default:
+ break;
+ }
+ if ((pEvent->EventId == EVENT_PS_AWAKE) ||
+ (pEvent->EventId == EVENT_PS_SLEEP))
+ goto done;
+ if (sk) {
+ /* Allocate skb */
+ if (!(skb = alloc_skb(NLMSG_SPACE(NL_MAX_PAYLOAD), GFP_ATOMIC))) {
+ PRINTM(ERROR, "Could not allocate skb for netlink.\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ nlh = (struct nlmsghdr *) skb->data;
+ nlh->nlmsg_len = NLMSG_SPACE(len);
+
+ /* From kernel */
+ nlh->nlmsg_pid = 0;
+ nlh->nlmsg_flags = 0;
+
+ /* Data */
+ skb_put(skb, nlh->nlmsg_len);
+ memcpy(NLMSG_DATA(nlh), payload, len);
+
+ /* From Kernel */
+ NETLINK_CB(skb).portid = 0;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+ /* Multicast message */
+ NETLINK_CB(skb).dst_pid = 0;
+#endif
+
+ /* Multicast group number */
+ NETLINK_CB(skb).dst_group = NL_MULTICAST_GROUP;
+
+ /* Send message */
+ netlink_broadcast(sk, skb, 0, NL_MULTICAST_GROUP, GFP_KERNEL);
+
+ ret = UAP_STATUS_SUCCESS;
+ } else {
+ PRINTM(ERROR, "Could not send event through NETLINK. Link down.\n");
+ ret = UAP_STATUS_FAILURE;
+ }
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function handles the interrupt. it will change PS
+ * state if applicable. it will wake up main_thread to handle
+ * the interrupt event as well.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return n/a
+ */
+void
+uap_interrupt(uap_private * priv)
+{
+ ENTER();
+ priv->adapter->IntCounter++;
+ priv->adapter->WakeupTries = 0;
+ wake_up_interruptible(&priv->MainThread.waitQ);
+
+ LEAVE();
+
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+/** Network device handlers */
+static const struct net_device_ops uap_netdev_ops = {
+ .ndo_open = uap_open,
+ .ndo_start_xmit = uap_hard_start_xmit,
+ .ndo_stop = uap_close,
+ .ndo_do_ioctl = uap_do_ioctl,
+ .ndo_set_mac_address = uap_set_mac_address,
+ .ndo_tx_timeout = uap_tx_timeout,
+ .ndo_get_stats = uap_get_stats,
+};
+#endif
+
+/**
+ * @brief This function adds the card. it will probe the
+ * card, allocate the uap_priv and initialize the device.
+ *
+ * @param card A pointer to card
+ * @return A pointer to uap_private structure
+ */
+uap_private *
+uap_add_card(void *card)
+{
+ struct net_device *dev = NULL;
+ uap_private *priv = NULL;
+
+ ENTER();
+
+ if (OS_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+ goto exit_sem_err;
+
+ /* Allocate an Ethernet device */
+ if (!(dev = alloc_etherdev(sizeof(uap_private)))) {
+ PRINTM(FATAL, "Init ethernet device failed!\n");
+ goto error;
+ }
+ priv = (uap_private *) netdev_priv(dev);
+
+ /* Allocate name */
+ if (dev_alloc_name(dev, "uap%d") < 0) {
+ PRINTM(ERROR, "Could not allocate device name!\n");
+ goto error;
+ }
+
+ /* Allocate buffer for uap_adapter */
+ if (!(priv->adapter = kmalloc(sizeof(uap_adapter), GFP_KERNEL))) {
+ PRINTM(FATAL, "Allocate buffer for uap_adapter failed!\n");
+ goto error;
+ }
+ memset(priv->adapter, 0, sizeof(uap_adapter));
+
+ priv->uap_dev.netdev = dev;
+ priv->uap_dev.card = card;
+ priv->MediaConnected = FALSE;
+ uappriv = priv;
+ ((struct sdio_mmc_card *) card)->priv = priv;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+ SET_MODULE_OWNER(dev);
+#endif
+
+ /* Setup the OS Interface to our functions */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+ dev->open = uap_open;
+ dev->stop = uap_close;
+ dev->hard_start_xmit = uap_hard_start_xmit;
+ dev->tx_timeout = uap_tx_timeout;
+ dev->get_stats = uap_get_stats;
+ dev->do_ioctl = uap_do_ioctl;
+ dev->set_mac_address = uap_set_mac_address;
+ dev->set_multicast_list = uap_set_multicast_list;
+#else
+ dev->netdev_ops = &uap_netdev_ops;
+#endif
+ dev->watchdog_timeo = MRVDRV_DEFAULT_WATCHDOG_TIMEOUT;
+ dev->hard_header_len += sizeof(TxPD) + INTF_HEADER_LEN;
+ dev->hard_header_len += HEADER_ALIGNMENT;
+#define NETIF_F_DYNALLOC 16
+ dev->features |= NETIF_F_DYNALLOC;
+ dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
+
+ /* Init SW */
+ if (uap_init_sw(priv)) {
+ PRINTM(FATAL, "Software Init Failed\n");
+ goto error;
+ }
+
+ PRINTM(INFO, "Starting kthread...\n");
+ priv->MainThread.priv = priv;
+ spin_lock_init(&priv->driver_lock);
+ uap_create_thread(uap_service_main_thread, &priv->MainThread,
+ "uap_main_service");
+ while (priv->MainThread.pid == 0) {
+ os_sched_timeout(2);
+ }
+
+ /* Register the device */
+ if (sbi_register_dev(priv) < 0) {
+ PRINTM(FATAL, "Failed to register uap device!\n");
+ goto err_registerdev;
+ }
+#ifdef FW_DNLD_NEEDED
+ SET_NETDEV_DEV(dev, priv->hotplug_device);
+#endif
+
+ /* Init FW and HW */
+ if (uap_init_fw(priv)) {
+ PRINTM(FATAL, "Firmware Init Failed\n");
+ goto err_init_fw;
+ }
+
+ priv->uap_dev.cmd_sent = FALSE;
+ priv->uap_dev.data_sent = FALSE;
+
+ /* Get mac address from firmware */
+ if (uap_get_mac_address(priv)) {
+ PRINTM(FATAL, "Fail to get mac address\n");
+ goto err_init_fw;
+ }
+ /* Register network device */
+ if (register_netdev(dev)) {
+ printk(KERN_ERR "Cannot register network device!\n");
+ goto err_init_fw;
+ }
+#ifdef CONFIG_PROC_FS
+ uap_proc_entry(priv, dev);
+ uap_debug_entry(priv, dev);
+#endif /* CPNFIG_PROC_FS */
+ OS_REL_SEMAPHORE(&AddRemoveCardSem);
+
+ LEAVE();
+ return priv;
+ err_init_fw:
+ sbi_unregister_dev(priv);
+ err_registerdev:
+ ((struct sdio_mmc_card *) card)->priv = NULL;
+ /* Stop the thread servicing the interrupts */
+ priv->adapter->SurpriseRemoved = TRUE;
+ wake_up_interruptible(&priv->MainThread.waitQ);
+ while (priv->MainThread.pid) {
+ os_sched_timeout(1);
+ }
+ error:
+ if (dev) {
+ if (dev->reg_state == NETREG_REGISTERED)
+ unregister_netdev(dev);
+ if (priv->adapter)
+ uap_free_adapter(priv);
+ free_netdev(dev);
+ uappriv = NULL;
+ }
+ OS_REL_SEMAPHORE(&AddRemoveCardSem);
+ exit_sem_err:
+ LEAVE();
+ return NULL;
+}
+
+/**
+ * @brief This function removes the card.
+ *
+ * @param card A pointer to card
+ * @return UAP_STATUS_SUCCESS
+ */
+int
+uap_remove_card(void *card)
+{
+ uap_private *priv = uappriv;
+ uap_adapter *Adapter;
+ struct net_device *dev;
+
+ ENTER();
+
+ if (OS_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+ goto exit_sem_err;
+
+ if (!priv || !(Adapter = priv->adapter)) {
+ goto exit_remove;
+ }
+ Adapter->SurpriseRemoved = TRUE;
+ if (Adapter->cmd_pending == TRUE) {
+ /* Wake up cmd Q */
+ Adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&Adapter->cmdwait_q);
+ }
+ dev = priv->uap_dev.netdev;
+ if (priv->MediaConnected == TRUE) {
+ os_stop_queue(priv);
+ os_carrier_off(priv);
+ priv->MediaConnected = FALSE;
+ }
+ Adapter->CmdSize = 0;
+ Adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&Adapter->cmdwait_q);
+ skb_queue_purge(&priv->adapter->tx_queue);
+ skb_queue_purge(&priv->adapter->cmd_queue);
+
+ /* Disable interrupts on the card */
+ sbi_disable_host_int(priv);
+ PRINTM(INFO, "netdev_finish_unregister: %s%s.\n", dev->name,
+ (dev->features & NETIF_F_DYNALLOC) ? "" : ", old style");
+ unregister_netdev(dev);
+ PRINTM(INFO, "Unregister finish\n");
+ wake_up_interruptible(&priv->MainThread.waitQ);
+ while (priv->MainThread.pid) {
+ os_sched_timeout(1);
+ }
+
+ if ((Adapter->nl_sk) && ((Adapter->nl_sk)->sk_socket)) {
+ sock_release((Adapter->nl_sk)->sk_socket);
+ Adapter->nl_sk = NULL;
+ }
+#ifdef CONFIG_PROC_FS
+ uap_debug_remove(priv);
+ uap_proc_remove(priv);
+#endif
+ sbi_unregister_dev(priv);
+ PRINTM(INFO, "Free Adapter\n");
+ uap_free_adapter(priv);
+ priv->uap_dev.netdev = NULL;
+ free_netdev(dev);
+ uappriv = NULL;
+
+ exit_remove:
+ OS_REL_SEMAPHORE(&AddRemoveCardSem);
+ exit_sem_err:
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function initializes module.
+ *
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int __init
+uap_init_module(void)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ ENTER();
+
+ OS_INIT_SEMAPHORE(&AddRemoveCardSem);
+ ret = sbi_register();
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function cleans module
+ *
+ * @return n/a
+ */
+static void __exit
+uap_cleanup_module(void)
+{
+ ENTER();
+
+ if (OS_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+ goto exit_sem_err;
+
+ if ((uappriv) && (uappriv->adapter)) {
+ uap_func_shutdown(uappriv);
+ }
+ OS_REL_SEMAPHORE(&AddRemoveCardSem);
+ exit_sem_err:
+ sbi_unregister();
+ LEAVE();
+}
+
+module_init(uap_init_module);
+module_exit(uap_cleanup_module);
+module_param(helper_name, charp, 0);
+MODULE_PARM_DESC(helper_name, "Helper name");
+module_param(fw_name, charp, 0);
+MODULE_PARM_DESC(fw_name, "Firmware name");
+
+MODULE_DESCRIPTION("M-UAP Driver");
+MODULE_AUTHOR("Marvell International Ltd.");
+MODULE_VERSION(DRIVER_VERSION);
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/sd8686_uap/uap_proc.c b/drivers/net/wireless/sd8686_uap/uap_proc.c
new file mode 100644
index 00000000..a28a9a66
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_proc.c
@@ -0,0 +1,296 @@
+/** @file uap_proc.c
+ * @brief This file contains functions for proc file.
+ *
+ * Copyright (C) 2008-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+#ifdef CONFIG_PROC_FS
+#include "uap_headers.h"
+
+/** /proc directory root */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#define PROC_DIR NULL
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#define PROC_DIR &proc_root
+#else
+#define PROC_DIR proc_net
+#endif
+
+/********************************************************
+ Local Variables
+********************************************************/
+
+/********************************************************
+ Global Variables
+********************************************************/
+
+/********************************************************
+ Local Functions
+********************************************************/
+
+/**
+ * @brief proc read function
+ *
+ * @param page pointer to buffer
+ * @param start read data starting position
+ * @param offset offset
+ * @param count counter
+ * @param eof end of file flag
+ * @param data data to output
+ * @return number of output data
+ */
+static int
+uap_proc_read(char *page, char **start, off_t offset,
+ int count, int *eof, void *data)
+{
+ int i;
+ char *p = page;
+ struct net_device *netdev = data;
+ struct netdev_hw_addr *ha;
+ char fmt[64];
+ uap_private *priv = (uap_private *) netdev_priv(netdev);
+
+ if (offset != 0) {
+ *eof = 1;
+ goto exit;
+ }
+
+ strcpy(fmt, DRIVER_VERSION);
+
+ p += sprintf(p, "driver_name = " "\"uap\"\n");
+ p += sprintf(p, "driver_version = %s-(FP%s)", fmt, FPNUM);
+ p += sprintf(p, "\nInterfaceName=\"%s\"\n", netdev->name);
+ p += sprintf(p, "State=\"%s\"\n",
+ ((priv->MediaConnected ==
+ FALSE) ? "Disconnected" : "Connected"));
+ p += sprintf(p, "MACAddress=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n",
+ netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
+ netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
+ i = 0;
+ netdev_for_each_mc_addr(ha, netdev) {
+ ++i;
+ }
+ p += sprintf(p, "MCCount=\"%d\"\n", i);
+
+ /*
+ * Put out the multicast list
+ */
+ i = 0;
+ netdev_for_each_mc_addr(ha, netdev) {
+ p += sprintf(p,
+ "MCAddr[%d]=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n",
+ i++,
+ ha->addr[0], ha->addr[1],
+ ha->addr[2], ha->addr[3],
+ ha->addr[4], ha->addr[5]);
+ }
+
+ p += sprintf(p, "num_tx_bytes = %lu\n", priv->stats.tx_bytes);
+ p += sprintf(p, "num_rx_bytes = %lu\n", priv->stats.rx_bytes);
+ p += sprintf(p, "num_tx_pkts = %lu\n", priv->stats.tx_packets);
+ p += sprintf(p, "num_rx_pkts = %lu\n", priv->stats.rx_packets);
+ p += sprintf(p, "num_tx_pkts_dropped = %lu\n", priv->stats.tx_dropped);
+ p += sprintf(p, "num_rx_pkts_dropped = %lu\n", priv->stats.rx_dropped);
+ p += sprintf(p, "num_tx_pkts_err = %lu\n", priv->stats.tx_errors);
+ p += sprintf(p, "num_rx_pkts_err = %lu\n", priv->stats.rx_errors);
+ p += sprintf(p, "num_tx_timeout = %u\n", priv->num_tx_timeout);
+ p += sprintf(p, "carrier %s\n",
+ ((netif_carrier_ok(priv->uap_dev.netdev)) ? "on" : "off"));
+ p += sprintf(p, "tx queue %s\n",
+ ((netif_queue_stopped(priv->uap_dev.netdev)) ? "stopped" :
+ "started"));
+
+ exit:
+ return (p - page);
+}
+
+/**
+ * @brief hwstatus proc write function
+ *
+ * @param f file pointer
+ * @param buf pointer to data buffer
+ * @param cnt data number to write
+ * @param data data to write
+ * @return number of data
+ */
+static int
+uap_hwstatus_write(struct file *f, const char *buf, unsigned long cnt,
+ void *data)
+{
+ struct net_device *netdev = data;
+ uap_private *priv = (uap_private *) netdev_priv(netdev);
+ char databuf[10];
+ int hwstatus;
+ MODULE_GET;
+ if (cnt > 10) {
+ MODULE_PUT;
+ return cnt;
+ }
+ if (copy_from_user(databuf, buf, cnt)) {
+ MODULE_PUT;
+ return 0;
+ }
+ hwstatus = string_to_number(databuf);
+ switch (hwstatus) {
+ case HWReset:
+ PRINTM(MSG, "reset hw\n");
+ uap_soft_reset(priv);
+ priv->adapter->HardwareStatus = HWReset;
+ break;
+ default:
+ break;
+ }
+ MODULE_PUT;
+ return cnt;
+}
+
+/**
+ * @brief hwstatus proc read function
+ *
+ * @param page pointer to buffer
+ * @param s read data starting position
+ * @param off offset
+ * @param cnt counter
+ * @param eof end of file flag
+ * @param data data to output
+ * @return number of output data
+ */
+static int
+uap_hwstatus_read(char *page, char **s, off_t off, int cnt, int *eof,
+ void *data)
+{
+ char *p = page;
+ struct net_device *netdev = data;
+ uap_private *priv = (uap_private *) netdev_priv(netdev);
+ MODULE_GET;
+ p += sprintf(p, "%d\n", priv->adapter->HardwareStatus);
+ MODULE_PUT;
+ return p - page;
+}
+
+/********************************************************
+ Global Functions
+********************************************************/
+/**
+ * @brief create uap proc file
+ *
+ * @param priv pointer uap_private
+ * @param dev pointer net_device
+ * @return N/A
+ */
+void
+uap_proc_entry(uap_private * priv, struct net_device *dev)
+{
+ struct proc_dir_entry *r = PROC_DIR;
+
+ PRINTM(INFO, "Creating Proc Interface\n");
+ /* Check if uap directory already exists */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+ for (r = r->subdir; r; r = r->next) {
+ if (r->namelen && !strcmp("uap", r->name)) {
+ /* Directory exists */
+ PRINTM(WARN, "proc directory already exists!\n");
+ priv->proc_uap = r;
+ break;
+ }
+ }
+#endif
+ if (!priv->proc_uap) {
+ priv->proc_uap = proc_mkdir("uap", PROC_DIR);
+ if (!priv->proc_uap)
+ return;
+ else
+ atomic_set(&priv->proc_uap->count, 1);
+ } else {
+ atomic_inc(&priv->proc_uap->count);
+ }
+ priv->proc_entry = proc_mkdir(dev->name, priv->proc_uap);
+
+ if (priv->proc_entry) {
+ r = create_proc_read_entry("info", 0, priv->proc_entry, uap_proc_read,
+ dev);
+ r = create_proc_entry("hwstatus", 0644, priv->proc_entry);
+ if (r) {
+ r->data = dev;
+ r->read_proc = uap_hwstatus_read;
+ r->write_proc = uap_hwstatus_write;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+ r->owner = THIS_MODULE;
+#endif
+ } else
+ PRINTM(MSG, "Fail to create proc hwstatus\n");
+ }
+}
+
+/**
+ * @brief remove proc file
+ *
+ * @param priv pointer uap_private
+ * @return N/A
+ */
+void
+uap_proc_remove(uap_private * priv)
+{
+ if (priv->proc_uap) {
+ if (priv->proc_entry) {
+ remove_proc_entry("info", priv->proc_entry);
+ remove_proc_entry("hwstatus", priv->proc_entry);
+ }
+ remove_proc_entry(priv->uap_dev.netdev->name, priv->proc_uap);
+ atomic_dec(&priv->proc_uap->count);
+ if (atomic_read(&(priv->proc_uap->count)) == 0)
+ remove_proc_entry("uap", PROC_DIR);
+ }
+}
+
+/**
+ * @brief convert string to number
+ *
+ * @param s pointer to numbered string
+ * @return converted number from string s
+ */
+int
+string_to_number(char *s)
+{
+ int r = 0;
+ int base = 0;
+ int pn = 1;
+
+ if (strncmp(s, "-", 1) == 0) {
+ pn = -1;
+ s++;
+ }
+ if ((strncmp(s, "0x", 2) == 0) || (strncmp(s, "0X", 2) == 0)) {
+ base = 16;
+ s += 2;
+ } else
+ base = 10;
+
+ for (s = s; *s != 0; s++) {
+ if ((*s >= '0') && (*s <= '9'))
+ r = (r * base) + (*s - '0');
+ else if ((*s >= 'A') && (*s <= 'F'))
+ r = (r * base) + (*s - 'A' + 10);
+ else if ((*s >= 'a') && (*s <= 'f'))
+ r = (r * base) + (*s - 'a' + 10);
+ else
+ break;
+ }
+
+ return (r * pn);
+}
+
+#endif
diff --git a/drivers/net/wireless/sd8686_uap/uap_sdio_mmc.c b/drivers/net/wireless/sd8686_uap/uap_sdio_mmc.c
new file mode 100644
index 00000000..44a3ccf7
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_sdio_mmc.c
@@ -0,0 +1,1465 @@
+/** @file uap_sdio_mmc.c
+ * @brief This file contains SDIO IF (interface) module
+ * related functions.
+ *
+ * Copyright (C) 2007-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+/****************************************************
+Change log:
+****************************************************/
+
+#include "uap_sdio_mmc.h"
+
+#include <linux/firmware.h>
+#include <linux/mmc/host.h>
+
+/** define SDIO block size */
+/* We support up to 480-byte block size due to FW buffer limitation. */
+#define SD_BLOCK_SIZE 256
+
+/** define allocated buffer size */
+#define ALLOC_BUF_SIZE (((MAX(MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, \
+ MRVDRV_SIZE_OF_CMD_BUFFER) + INTF_HEADER_LEN \
+ + SD_BLOCK_SIZE - 1) / SD_BLOCK_SIZE) * SD_BLOCK_SIZE)
+
+/** Max retry number of CMD53 write */
+#define MAX_WRITE_IOMEM_RETRY 2
+
+/********************************************************
+ Local Variables
+********************************************************/
+
+/** SDIO Rx unit */
+static u8 sdio_rx_unit = 0;
+
+/**Interrupt status */
+static u8 sd_ireg = 0;
+/********************************************************
+ Global Variables
+********************************************************/
+extern u8 *helper_name;
+extern u8 *fw_name;
+/** Default helper name */
+#define DEFAULT_HELPER_NAME "mrvl/helper_sd.bin"
+/** Default firmware name */
+#define DEFAULT_FW_NAME "mrvl/sd8686_ap.bin"
+
+/********************************************************
+ Local Functions
+********************************************************/
+/**
+ * @brief This function reads the IO register.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param reg register to be read
+ * @param dat A pointer to variable that keeps returned value
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+sbi_read_ioreg(uap_private * priv, u32 reg, u8 * dat)
+{
+ struct sdio_mmc_card *card;
+ int ret = UAP_STATUS_FAILURE;
+
+ card = priv->uap_dev.card;
+ if (!card || !card->func) {
+ PRINTM(ERROR, "sbi_read_ioreg(): card or function is NULL!\n");
+ goto done;
+ }
+
+ *dat = sdio_readb(card->func, reg, &ret);
+ if (ret) {
+ PRINTM(ERROR, "sbi_read_ioreg(): sdio_readb failed! ret=%d\n", ret);
+ goto done;
+ }
+
+ PRINTM(INFO, "sbi_read_ioreg() priv=%p func=%d reg=%#x dat=%#x\n", priv,
+ card->func->num, reg, *dat);
+
+ done:
+ return ret;
+}
+
+/**
+ * @brief This function writes the IO register.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param reg register to be written
+ * @param dat the value to be written
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+sbi_write_ioreg(uap_private * priv, u32 reg, u8 dat)
+{
+ struct sdio_mmc_card *card;
+ int ret = UAP_STATUS_FAILURE;
+
+ ENTER();
+
+ card = priv->uap_dev.card;
+ if (!card || !card->func) {
+ PRINTM(ERROR, "sbi_write_ioreg(): card or function is NULL!\n");
+ goto done;
+ }
+
+ PRINTM(INFO, "sbi_write_ioreg() priv=%p func=%d reg=%#x dat=%#x\n", priv,
+ card->func->num, reg, dat);
+
+ sdio_writeb(card->func, dat, reg, &ret);
+ if (ret) {
+ PRINTM(ERROR, "sbi_write_ioreg(): sdio_readb failed! ret=%d\n", ret);
+ goto done;
+ }
+
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function get rx_unit value
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+sd_get_rx_unit(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u8 reg;
+
+ ENTER();
+
+ ret = sbi_read_ioreg(priv, CARD_RX_UNIT_REG, &reg);
+ if (ret == UAP_STATUS_SUCCESS)
+ {
+ sdio_rx_unit = reg;
+ }
+
+ LEAVE();
+ return ret;
+}
+
+static int
+sd_read_scratch(uap_private * priv, u16 * dat)
+{
+ int ret;
+ u8 scr0;
+ u8 scr1;
+
+ ENTER();
+
+ ret =
+ sbi_read_ioreg(priv, CARD_FW_STATUS0_REG, &scr0);
+ if (ret < 0)
+ return UAP_STATUS_FAILURE;
+
+ ret =
+ sbi_read_ioreg(priv, CARD_FW_STATUS1_REG, &scr1);
+ PRINTM(INFO, "CARD_OCR_0_REG = 0x%x, CARD_OCR_1_REG = 0x%x\n", scr0, scr1);
+ if (ret < 0)
+ return UAP_STATUS_FAILURE;
+
+ *dat = (((u16) scr1) << 8) | scr0;
+
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function reads rx length
+ *
+ * @param priv A pointer to uap_private structure
+ * @param dat A pointer to keep returned data
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+sd_read_rx_len(uap_private * priv, u16 * dat)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u8 reg;
+
+ ENTER();
+
+ // For sd8686, you read scratch reg instead of len reg.
+ ret = sbi_read_ioreg(priv, CARD_RX_LEN_REG, &reg);
+
+ if (ret == UAP_STATUS_SUCCESS)
+ *dat = (u16) reg << sdio_rx_unit;
+
+ LEAVE();
+ return ret;
+}
+
+
+/**
+ * @brief This function reads fw status registers
+ *
+ * @param priv A pointer to uap_private structure
+ * @param dat A pointer to keep returned data
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+sd_read_firmware_status(uap_private * priv, u16 * dat)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u16 x;
+
+ ret = sd_read_scratch(priv, &x);
+ if (ret < 0) {
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+
+ *dat = x;
+
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function polls the card status register.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param bits the bit mask
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+mv_sdio_poll_card_status(uap_private * priv, u8 bits)
+{
+ int tries;
+ u8 cs;
+
+ ENTER();
+
+ for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
+ if (sbi_read_ioreg(priv, CARD_STATUS_REG, &cs) < 0)
+ break;
+ else if ((cs & bits) == bits) {
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+ }
+ udelay(10);
+ }
+
+ PRINTM(WARN, "mv_sdio_poll_card_status failed, tries = %d\n", tries);
+
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+}
+
+/**
+ * @brief This function set the sdio bus width.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param mode 1--1 bit mode, 4--4 bit mode
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+#if 0
+static int
+sdio_set_bus_width(uap_private * priv, u8 mode)
+{
+ ENTER();
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+#endif
+
+/**
+ * @brief This function reads data from the card.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+sd_card_to_host(uap_private * priv)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u16 buf_len = 0;
+ u16 chunk = 0;
+ int buf_block_len;
+ int blksz;
+ struct sk_buff *skb = NULL;
+ u16 type;
+ u8 *payload = NULL;
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "card or function is NULL!\n");
+ ret = UAP_STATUS_FAILURE;
+ goto exit;
+ }
+
+ ret = sd_read_rx_len(priv, &buf_len);
+ if (ret < 0) {
+ PRINTM(ERROR, "card_to_host, read scratch reg failed\n");
+ ret = UAP_STATUS_FAILURE;
+ goto exit;
+ }
+
+ /* Allocate buffer */
+ blksz = SD_BLOCK_SIZE;
+ buf_block_len = (buf_len + blksz - 1) / blksz;
+ if (buf_len <= INTF_HEADER_LEN || (buf_block_len * blksz) > ALLOC_BUF_SIZE) {
+ PRINTM(ERROR, "card_to_host, invalid packet length: %d\n", buf_len);
+ ret = UAP_STATUS_FAILURE;
+ goto exit;
+ }
+
+ skb = dev_alloc_skb(buf_block_len * blksz);
+
+ if (skb == NULL) {
+ PRINTM(WARN, "No free skb\n");
+ goto exit;
+ }
+
+ payload = skb->tail;
+ ret = sdio_readsb(card->func, payload, priv->uap_dev.ioport,
+ buf_block_len * blksz);
+ if (ret < 0) {
+ PRINTM(ERROR, "card_to_host, read iomem failed: %d\n", ret);
+ ret = UAP_STATUS_FAILURE;
+ goto exit;
+ }
+ HEXDUMP("SDIO Blk Rd", payload, blksz * buf_block_len);
+ /*
+ * This is SDIO specific header
+ * u16 length,
+ * u16 type (MV_TYPE_DAT = 0, MV_TYPE_CMD = 1, MV_TYPE_EVENT = 3)
+ */
+ chunk = uap_le16_to_cpu(*(u16 *) & payload[0]);
+ type = uap_le16_to_cpu(*(u16 *) & payload[2]);
+ if (chunk > buf_len) {
+ printk("Packet fragment\n");
+ ret = -EINVAL;
+ goto exit;
+ }
+ buf_len = chunk;
+
+ switch (type) {
+ case MV_TYPE_EVENT:
+ skb_put(skb, buf_len);
+ skb_pull(skb, INTF_HEADER_LEN);
+ uap_process_event(priv, skb->data, skb->len);
+ kfree_skb(skb);
+ skb = NULL;
+ break;
+ case MV_TYPE_CMD:
+ skb_put(skb, buf_len);
+ skb_pull(skb, INTF_HEADER_LEN);
+ priv->adapter->cmd_pending = FALSE;
+ if (priv->adapter->cmd_wait_option ==
+ HostCmd_OPTION_WAITFORRSP_SLEEPCONFIRM) {
+ priv->adapter->cmd_wait_option = FALSE;
+ uap_process_sleep_confirm_resp(priv, skb->data, skb->len);
+ } else if (priv->adapter->cmd_wait_option) {
+ memcpy(priv->adapter->CmdBuf, skb->data, skb->len);
+ priv->adapter->CmdSize = skb->len;
+ priv->adapter->cmd_wait_option = FALSE;
+ priv->adapter->CmdWaitQWoken = TRUE;
+ wake_up_interruptible(&priv->adapter->cmdwait_q);
+ }
+ kfree_skb(skb);
+ skb = NULL;
+ break;
+ case MV_TYPE_DAT:
+ skb_put(skb, buf_len);
+ skb_pull(skb, INTF_HEADER_LEN);
+ uap_process_rx_packet(priv, skb);
+ break;
+ default:
+ priv->stats.rx_errors++;
+ priv->stats.rx_dropped++;
+ /* Driver specified event and command resp should be handle here */
+ PRINTM(INFO, "Unknown PKT type:%d\n", type);
+ kfree_skb(skb);
+ skb = NULL;
+ break;
+ }
+ exit:
+ if (ret) {
+ if (skb)
+ kfree_skb(skb);
+ }
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function enables the host interrupts mask
+ *
+ * @param priv A pointer to uap_private structure
+ * @param mask the interrupt mask
+ * @return UAP_STATUS_SUCCESS
+ */
+static int
+enable_host_int_mask(uap_private * priv, u8 mask)
+{
+ int ret = UAP_STATUS_SUCCESS;
+
+ ENTER();
+
+ /* Simply write the mask to the register */
+ ret = sbi_write_ioreg(priv, HOST_INT_MASK_REG, mask);
+
+ if (ret) {
+ PRINTM(WARN, "Unable to enable the host interrupt!\n");
+ ret = UAP_STATUS_FAILURE;
+ }
+
+ LEAVE();
+ return ret;
+}
+
+/** @brief This function disables the host interrupts mask.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param mask the interrupt mask
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+disable_host_int_mask(uap_private * priv, u8 mask)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u8 host_int_mask;
+
+ ENTER();
+
+ /* Read back the host_int_mask register */
+ ret = sbi_read_ioreg(priv, HOST_INT_MASK_REG, &host_int_mask);
+ if (ret) {
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+
+ /* Update with the mask and write back to the register */
+ host_int_mask &= ~mask;
+ ret = sbi_write_ioreg(priv, HOST_INT_MASK_REG, host_int_mask);
+ if (ret < 0) {
+ PRINTM(WARN, "Unable to diable the host interrupt!\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+
+ done:
+ LEAVE();
+ return ret;
+}
+
+/********************************************************
+ Global Functions
+********************************************************/
+
+/**
+ * @brief This function handles the interrupt.
+ *
+ * @param func A pointer to sdio_func structure.
+ * @return n/a
+ */
+static void
+sbi_interrupt(struct sdio_func *func)
+{
+ struct sdio_mmc_card *card;
+ uap_private *priv;
+ u8 ireg = 0;
+ int ret = UAP_STATUS_SUCCESS;
+
+ ENTER();
+
+ card = sdio_get_drvdata(func);
+ if (!card || !card->priv) {
+ PRINTM(MSG, "%s: sbi_interrupt(%p) card or priv is NULL, card=%p\n",
+ __FUNCTION__, func, card);
+ LEAVE();
+ return;
+ }
+ priv = card->priv;
+#ifdef FW_WAKEUP_TIME
+ if ((priv->adapter->wt_pwrup_sending != 0L) &&
+ (priv->adapter->wt_int == 0L))
+ priv->adapter->wt_int = get_utimeofday();
+#endif
+
+ ireg = sdio_readb(card->func, HOST_INTSTATUS_REG, &ret);
+ if (ret) {
+ PRINTM(WARN, "sdio_read_ioreg: read int status register failed\n");
+ goto done;
+ }
+ if (ireg != 0) {
+ /*
+ * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
+ * Clear the interrupt status register and re-enable the interrupt
+ */
+ PRINTM(INFO, "sdio_ireg = 0x%x\n", ireg);
+ sdio_writeb(card->func,
+ ~(ireg) & (DN_LD_HOST_INT_STATUS | UP_LD_HOST_INT_STATUS),
+ HOST_INTSTATUS_REG, &ret);
+ if (ret) {
+ PRINTM(WARN,
+ "sdio_write_ioreg: clear int status register failed\n");
+ goto done;
+ }
+ }
+ OS_INT_DISABLE;
+ sd_ireg |= ireg;
+ OS_INT_RESTORE;
+
+ uap_interrupt(priv);
+ done:
+ LEAVE();
+}
+
+/**
+ * @brief This function probe the card
+ *
+ * @param func A pointer to sdio_func structure
+ * @param id A pointer to structure sd_device_id
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+static int
+uap_probe(struct sdio_func *func, const struct sdio_device_id *id)
+{
+ int ret = UAP_STATUS_FAILURE;
+ struct sdio_mmc_card *card = NULL;
+
+ ENTER();
+
+ PRINTM(MSG, "%s: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n",
+ __FUNCTION__, func->vendor, func->device, func->class, func->num);
+
+ card = kzalloc(sizeof(struct sdio_mmc_card), GFP_KERNEL);
+ if (!card) {
+ ret = -ENOMEM;
+ goto done;
+ }
+
+ card->func = func;
+
+ if (!uap_add_card(card)) {
+ PRINTM(ERROR, "%s: uap_add_callback failed\n", __FUNCTION__);
+ kfree(card);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+
+ ret = UAP_STATUS_SUCCESS;
+
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function removes the card
+ *
+ * @param func A pointer to sdio_func structure
+ * @return N/A
+ */
+static void
+uap_remove(struct sdio_func *func)
+{
+ struct sdio_mmc_card *card;
+
+ ENTER();
+
+ if (func) {
+ card = sdio_get_drvdata(func);
+ if (card) {
+ uap_remove_card(card);
+ kfree(card);
+ }
+ }
+
+ LEAVE();
+}
+
+#ifdef CONFIG_PM
+/**
+ * @brief This function handles client driver suspend
+ *
+ * @param func A pointer to sdio_func structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+uap_suspend(struct sdio_func *func)
+{
+ ENTER();
+ LEAVE();
+ return 0;
+}
+
+/**
+ * @brief This function handles client driver resume
+ *
+ * @param func A pointer to sdio_func structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+uap_resume(struct sdio_func *func)
+{
+ ENTER();
+ LEAVE();
+ return 0;
+}
+#endif
+
+/** Device ID for SD8688 */
+#define SD_DEVICE_ID_8688_UAP 0x9103
+/** UAP IDs */
+static const struct sdio_device_id uap_ids[] = {
+ {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SD_DEVICE_ID_8688_UAP)},
+ {},
+};
+
+MODULE_DEVICE_TABLE(sdio, uap_ids);
+
+static struct sdio_driver uap_sdio = {
+ .name = "uap_sdio",
+ .id_table = uap_ids,
+ .probe = uap_probe,
+ .remove = uap_remove,
+#ifdef CONFIG_PM
+/* .suspend = uap_suspend, */
+/* .resume = uap_resume, */
+#endif
+
+};
+
+/**
+ * @brief This function registers the IF module in bus driver.
+ *
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int __init
+sbi_register()
+{
+ int ret = UAP_STATUS_SUCCESS;
+
+ ENTER();
+
+ /* SDIO Driver Registration */
+ if (sdio_register_driver(&uap_sdio) != 0) {
+ PRINTM(FATAL, "SDIO Driver Registration Failed \n");
+ ret = UAP_STATUS_FAILURE;
+ }
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function de-registers the IF module in bus driver.
+ *
+ * @return n/a
+ */
+void __exit
+sbi_unregister(void)
+{
+ ENTER();
+
+ /* SDIO Driver Unregistration */
+ sdio_unregister_driver(&uap_sdio);
+
+ LEAVE();
+}
+
+/**
+ * @brief This function checks the interrupt status and handle it accordingly.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param ireg A pointer to variable that keeps returned value
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_get_int_status(uap_private * priv, u8 * ireg)
+{
+ int ret = UAP_STATUS_SUCCESS;
+ u8 sdio_ireg = 0;
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+
+ ENTER();
+
+ *ireg = 0;
+ OS_INT_DISABLE;
+ sdio_ireg = sd_ireg;
+ sd_ireg = 0;
+ OS_INT_RESTORE;
+
+ sdio_claim_host(card->func);
+
+ if (sdio_ireg & DN_LD_HOST_INT_STATUS) { /* tx_done INT */
+ if (!priv->uap_dev.cmd_sent) { /* tx_done already received */
+ PRINTM(INFO,
+ "warning: tx_done already received: tx_dnld_rdy=0x%x int status=0x%x\n",
+ priv->uap_dev.cmd_sent, sdio_ireg);
+ } else {
+ priv->uap_dev.cmd_sent = FALSE;
+ priv->uap_dev.data_sent = FALSE;
+ if ( (priv->uap_dev.netdev->reg_state == NETREG_REGISTERED) && (skb_queue_len(&priv->adapter->tx_queue) < TX_LOW_WATERMARK)) {
+ os_start_queue(priv);
+ }
+ }
+ }
+ if (sdio_ireg & UP_LD_HOST_INT_STATUS) {
+ sd_card_to_host(priv);
+ }
+
+ *ireg = sdio_ireg;
+ ret = UAP_STATUS_SUCCESS;
+ sdio_release_host(card->func);
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function disables the host interrupts.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_disable_host_int(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ int ret;
+
+ ENTER();
+
+ sdio_claim_host(card->func);
+ ret = disable_host_int_mask(priv, HIM_DISABLE);
+ sdio_release_host(card->func);
+
+ LEAVE();
+ return ret;
+}
+
+int sbi_claim_irq(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ struct sdio_func *func;
+ int ret;
+
+ ENTER();
+ func = card->func;
+
+ sdio_claim_host(func);
+
+ ret = sdio_claim_irq(func, sbi_interrupt);
+ if (ret) {
+ PRINTM(FATAL, "sdio_claim_irq failed: ret=%d\n", ret);
+ }
+
+ sdio_release_host(card->func);
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function enables the host interrupts.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS
+ */
+int
+sbi_enable_host_int(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ int ret;
+
+ ENTER();
+
+ sdio_claim_host(card->func);
+ ret = enable_host_int_mask(priv, HIM_ENABLE);
+ sdio_release_host(card->func);
+
+ if(card->func->card->host->caps & MMC_CAP_SDIO_IRQ)
+ card->func->card->host->ops->enable_sdio_irq
+ (card->func->card->host, 1);
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function de-registers the device.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS
+ */
+int
+sbi_unregister_dev(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "Error: card or function is NULL!\n");
+ goto done;
+ }
+
+ sdio_claim_host(card->func);
+ sdio_release_irq(card->func);
+ sdio_disable_func(card->func);
+ sdio_release_host(card->func);
+
+ sdio_set_drvdata(card->func, NULL);
+
+ done:
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function registers the device.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_register_dev(uap_private * priv)
+{
+ int ret = UAP_STATUS_FAILURE;
+ u8 reg;
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ struct sdio_func *func;
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "Error: card or function is NULL!\n");
+ goto done;
+ }
+
+ func = card->func;
+
+ /* Initialize the private structure */
+ priv->uap_dev.ioport = 0;
+
+ sdio_claim_host(func);
+
+ ret = sdio_enable_func(func);
+ if (ret) {
+ PRINTM(FATAL, "sdio_enable_func() failed: ret=%d\n", ret);
+ goto release_host;
+ }
+
+ /* Read the IO port */
+ ret = sbi_read_ioreg(priv, IO_PORT_0_REG, &reg);
+ if (ret)
+ goto disable_func;
+ else
+ priv->uap_dev.ioport |= reg;
+
+ ret = sbi_read_ioreg(priv, IO_PORT_1_REG, &reg);
+ if (ret)
+ goto disable_func;
+ else
+ priv->uap_dev.ioport |= (reg << 8);
+
+ ret = sbi_read_ioreg(priv, IO_PORT_2_REG, &reg);
+ if (ret)
+ goto disable_func;
+ else
+ priv->uap_dev.ioport |= (reg << 16);
+
+ PRINTM(INFO, "SDIO FUNC #%d IO port: 0x%x\n", func->num,
+ priv->uap_dev.ioport);
+
+ ret = sdio_set_block_size(card->func, SD_BLOCK_SIZE);
+ if (ret) {
+ PRINTM(ERROR, "%s: cannot set SDIO block size\n", __FUNCTION__);
+ ret = UAP_STATUS_FAILURE;
+ goto disable_func;
+ }
+ priv->hotplug_device = &func->dev;
+
+ if (helper_name == NULL) {
+ helper_name = DEFAULT_HELPER_NAME;
+ }
+ if (fw_name == NULL) {
+ fw_name = DEFAULT_FW_NAME;
+ }
+ sdio_release_host(func);
+
+ sdio_set_drvdata(func, card);
+
+ ret = UAP_STATUS_SUCCESS;
+ goto done;
+
+ disable_func:
+ sdio_disable_func(func);
+ release_host:
+ sdio_release_host(func);
+
+ done:
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function sends data to the card.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param payload A pointer to the data/cmd buffer
+ * @param nb the length of data/cmd
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_host_to_card(uap_private * priv, u8 * payload, u16 nb)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ int ret = UAP_STATUS_SUCCESS;
+ int buf_block_len;
+ int blksz;
+ int i = 0;
+ u8 *buf = NULL;
+#ifdef PXA3XX_DMA_ALIGN
+ void *tmpbuf = NULL;
+ int tmpbufsz;
+#endif
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "card or function is NULL!\n");
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+ buf = payload;
+#ifdef PXA3XX_DMA_ALIGN
+ if ((u32) payload & (PXA3XX_DMA_ALIGNMENT - 1)) {
+ tmpbufsz = ALIGN_SZ(nb, PXA3XX_DMA_ALIGNMENT);
+ tmpbuf = kmalloc(tmpbufsz, GFP_KERNEL);
+ memset(tmpbuf, 0, tmpbufsz);
+ /* Ensure 8-byte aligned CMD buffer */
+ buf = (u8 *) ALIGN_ADDR(tmpbuf, PXA3XX_DMA_ALIGNMENT);
+ memcpy(buf, payload, nb);
+ }
+#endif
+ /* Allocate buffer and copy payload */
+ blksz = SD_BLOCK_SIZE;
+ buf_block_len = (nb + blksz - 1) / blksz;
+ sdio_claim_host(card->func);
+#define MAX_WRITE_IOMEM_RETRY 2
+ priv->uap_dev.cmd_sent = TRUE;
+ priv->uap_dev.data_sent = TRUE;
+ do {
+ /* Transfer data to card */
+ ret = sdio_writesb(card->func, priv->uap_dev.ioport, buf,
+ buf_block_len * blksz);
+ if (ret < 0) {
+ i++;
+ PRINTM(ERROR, "host_to_card, write iomem (%d) failed: %d\n", i,
+ ret);
+ ret = UAP_STATUS_FAILURE;
+ if (i > MAX_WRITE_IOMEM_RETRY)
+ goto exit;
+ } else {
+ HEXDUMP("SDIO Blk Wr", payload, nb);
+ }
+ } while (ret == UAP_STATUS_FAILURE);
+ exit:
+ sdio_release_host(card->func);
+#ifdef PXA3XX_DMA_ALIGN
+ if (tmpbuf)
+ kfree(tmpbuf);
+#endif
+ if (ret == UAP_STATUS_FAILURE) {
+ priv->uap_dev.cmd_sent = FALSE;
+ priv->uap_dev.data_sent = FALSE;
+ }
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function reads CIS information.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param cisinfo A pointer to CIS information output buffer
+ * @param cislen A pointer to length of CIS info output buffer
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+#if 0
+static int
+sbi_get_cis_info(uap_private * priv, void *cisinfo, int *cislen)
+{
+#define CIS_PTR (0x8000)
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ unsigned int i, cis_ptr = CIS_PTR;
+ int ret = UAP_STATUS_FAILURE;
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "sbi_get_cis_info(): card or function is NULL!\n");
+ goto exit;
+ }
+#define MAX_SDIO_CIS_INFO_LEN (256)
+ if (!cisinfo || (*cislen < MAX_SDIO_CIS_INFO_LEN)) {
+ PRINTM(WARN, "ERROR! get_cis_info: insufficient buffer passed\n");
+ goto exit;
+ }
+
+ *cislen = MAX_SDIO_CIS_INFO_LEN;
+
+ sdio_claim_host(card->func);
+
+ PRINTM(INFO, "cis_ptr=%#x\n", cis_ptr);
+
+ /* Read the Tuple Data */
+ for (i = 0; i < *cislen; i++) {
+ ((unsigned char *) cisinfo)[i] =
+ sdio_readb(card->func, cis_ptr + i, &ret);
+ if (ret) {
+ PRINTM(WARN, "get_cis_info error: ret=%d\n", ret);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ PRINTM(INFO, "cisinfo[%d]=%#x\n", i, ((unsigned char *) cisinfo)[i]);
+ }
+
+ done:
+ sdio_release_host(card->func);
+ exit:
+ LEAVE();
+ return ret;
+}
+#endif
+/**
+ * @brief This function downloads helper image to the card.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_prog_helper(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ u8 *helper = NULL;
+ int helperlen;
+ int ret = UAP_STATUS_SUCCESS;
+ void *tmphlprbuf = NULL;
+ int tmphlprbufsz;
+ u8 *hlprbuf;
+ int hlprblknow;
+ u32 tx_len;
+#ifdef FW_DOWNLOAD_SPEED
+ u32 tv1, tv2;
+#endif
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "sbi_prog_helper(): card or function is NULL!\n");
+ goto done;
+ }
+
+ if (priv->fw_helper) {
+ helper = (u8 *) priv->fw_helper->data;
+ helperlen = priv->fw_helper->size;
+ } else {
+ PRINTM(MSG, "No helper image found! Terminating download.\n");
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+
+ PRINTM(INFO, "Downloading helper image (%d bytes), block size %d bytes\n",
+ helperlen, SD_BLOCK_SIZE);
+
+#ifdef FW_DOWNLOAD_SPEED
+ tv1 = get_utimeofday();
+#endif
+
+#ifdef PXA3XX_DMA_ALIGN
+ tmphlprbufsz = ALIGN_SZ(UAP_UPLD_SIZE, PXA3XX_DMA_ALIGNMENT);
+#else /* !PXA3XX_DMA_ALIGN */
+ tmphlprbufsz = UAP_UPLD_SIZE;
+#endif /* !PXA3XX_DMA_ALIGN */
+ tmphlprbuf = kmalloc(tmphlprbufsz, GFP_KERNEL);
+ if (!tmphlprbuf) {
+ PRINTM(ERROR,
+ "Unable to allocate buffer for helper. Terminating download\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ memset(tmphlprbuf, 0, tmphlprbufsz);
+#ifdef PXA3XX_DMA_ALIGN
+ hlprbuf = (u8 *) ALIGN_ADDR(tmphlprbuf, PXA3XX_DMA_ALIGNMENT);
+#else /* !PXA3XX_DMA_ALIGN */
+ hlprbuf = (u8 *) tmphlprbuf;
+#endif /* !PXA3XX_DMA_ALIGN */
+
+ sdio_claim_host(card->func);
+
+ /* Perform helper data transfer */
+ tx_len = (FIRMWARE_TRANSFER_NBLOCK * SD_BLOCK_SIZE) - INTF_HEADER_LEN;
+ hlprblknow = 0;
+ do {
+ /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY bits */
+ ret = mv_sdio_poll_card_status(priv, CARD_IO_READY | DN_LD_CARD_RDY);
+ if (ret < 0) {
+ PRINTM(FATAL, "Helper download poll status timeout @ %d\n",
+ hlprblknow);
+ goto done;
+ }
+
+ /* More data? */
+ if (hlprblknow >= helperlen)
+ break;
+
+ /* Set blocksize to transfer - checking for last block */
+ if (helperlen - hlprblknow < tx_len)
+ tx_len = helperlen - hlprblknow;
+
+ /* Set length to the 4-byte header */
+ *(u32 *) hlprbuf = uap_cpu_to_le32(tx_len);
+
+ /* Copy payload to buffer */
+ memcpy(&hlprbuf[INTF_HEADER_LEN], &helper[hlprblknow], tx_len);
+
+ PRINTM(INFO, ".");
+
+ /* Send data */
+ ret = sdio_writesb(card->func, priv->uap_dev.ioport,
+ hlprbuf, FIRMWARE_TRANSFER_NBLOCK * SD_BLOCK_SIZE);
+
+ if (ret < 0) {
+ PRINTM(FATAL, "IO error during helper download @ %d\n", hlprblknow);
+ goto done;
+ }
+
+ hlprblknow += tx_len;
+ } while (TRUE);
+
+#ifdef FW_DOWNLOAD_SPEED
+ tv2 = get_utimeofday();
+ PRINTM(INFO, "helper: %ld.%03ld.%03ld ", tv1 / 1000000,
+ (tv1 % 1000000) / 1000, tv1 % 1000);
+ PRINTM(INFO, " -> %ld.%03ld.%03ld ", tv2 / 1000000, (tv2 % 1000000) / 1000,
+ tv2 % 1000);
+ tv2 -= tv1;
+ PRINTM(INFO, " == %ld.%03ld.%03ld\n", tv2 / 1000000, (tv2 % 1000000) / 1000,
+ tv2 % 1000);
+#endif
+
+ /* Write last EOF data */
+ PRINTM(INFO, "\nTransferring helper image EOF block\n");
+ memset(hlprbuf, 0x0, SD_BLOCK_SIZE);
+ ret = sdio_writesb(card->func, priv->uap_dev.ioport,
+ hlprbuf, SD_BLOCK_SIZE);
+
+ if (ret < 0) {
+ PRINTM(FATAL, "IO error in writing helper image EOF block\n");
+ goto done;
+ }
+
+ ret = UAP_STATUS_SUCCESS;
+
+ done:
+ sdio_release_host(card->func);
+ if (tmphlprbuf)
+ kfree(tmphlprbuf);
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function downloads firmware image to the card.
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_prog_fw_w_helper(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ u8 *firmware = NULL;
+ int firmwarelen;
+ u8 base0;
+ u8 base1;
+ int ret = UAP_STATUS_SUCCESS;
+ int offset;
+ void *tmpfwbuf = NULL;
+ int tmpfwbufsz;
+ u8 *fwbuf;
+ u16 len;
+ int txlen = 0;
+ int tx_blocks = 0;
+ int i = 0;
+ int tries = 0;
+#ifdef FW_DOWNLOAD_SPEED
+ u32 tv1, tv2;
+#endif
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "sbi_prog_fw_w_helper(): card or function is NULL!\n");
+ goto done;
+ }
+
+ if (priv->firmware) {
+ firmware = (u8 *) priv->firmware->data;
+ firmwarelen = priv->firmware->size;
+ } else {
+ PRINTM(MSG, "No firmware image found! Terminating download.\n");
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+
+ PRINTM(INFO, "Downloading FW image (%d bytes)\n", firmwarelen);
+
+#ifdef FW_DOWNLOAD_SPEED
+ tv1 = get_utimeofday();
+#endif
+
+#ifdef PXA3XX_DMA_ALIGN
+ tmpfwbufsz = ALIGN_SZ(UAP_UPLD_SIZE, PXA3XX_DMA_ALIGNMENT);
+#else /* PXA3XX_DMA_ALIGN */
+ tmpfwbufsz = UAP_UPLD_SIZE;
+#endif /* PXA3XX_DMA_ALIGN */
+ tmpfwbuf = kmalloc(tmpfwbufsz, GFP_KERNEL);
+ if (!tmpfwbuf) {
+ PRINTM(ERROR,
+ "Unable to allocate buffer for firmware. Terminating download.\n");
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ memset(tmpfwbuf, 0, tmpfwbufsz);
+#ifdef PXA3XX_DMA_ALIGN
+ /* Ensure 8-byte aligned firmware buffer */
+ fwbuf = (u8 *) ALIGN_ADDR(tmpfwbuf, PXA3XX_DMA_ALIGNMENT);
+#else /* PXA3XX_DMA_ALIGN */
+ fwbuf = (u8 *) tmpfwbuf;
+#endif /* PXA3XX_DMA_ALIGN */
+
+ sdio_claim_host(card->func);
+
+ /* Perform firmware data transfer */
+ offset = 0;
+ do {
+ /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY bits */
+ ret = mv_sdio_poll_card_status(priv, CARD_IO_READY | DN_LD_CARD_RDY);
+ if (ret < 0) {
+ PRINTM(FATAL, "FW download with helper poll status timeout @ %d\n",
+ offset);
+ goto done;
+ }
+
+ /* More data? */
+ if (offset >= firmwarelen)
+ break;
+
+ for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
+ if ((ret = sbi_read_ioreg(priv, HOST_F1_RD_BASE_0, &base0)) < 0) {
+ PRINTM(WARN, "Dev BASE0 register read failed:"
+ " base0=0x%04X(%d). Terminating download.\n", base0,
+ base0);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ if ((ret = sbi_read_ioreg(priv, HOST_F1_RD_BASE_1, &base1)) < 0) {
+ PRINTM(WARN, "Dev BASE1 register read failed:"
+ " base1=0x%04X(%d). Terminating download.\n", base1,
+ base1);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ len = (((u16) base1) << 8) | base0;
+
+ /* For SD8688 wait until the length is not 0, 1 or 2 before
+ downloading the first FW block, since BOOT code writes the
+ register to indicate the helper/FW download winner, the value
+ could be 1 or 2 (Func1 or Func2). */
+ if ((len && offset) || (len > 2))
+ break;
+ udelay(10);
+ }
+
+ if (len == 0)
+ break;
+ else if (len > UAP_UPLD_SIZE) {
+ PRINTM(FATAL, "FW download failure @ %d, invalid length %d\n",
+ offset, len);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+
+ txlen = len;
+
+ if (len & BIT(0)) {
+ i++;
+ if (i > MAX_WRITE_IOMEM_RETRY) {
+ PRINTM(FATAL,
+ "FW download failure @ %d, over max retry count\n",
+ offset);
+ ret = UAP_STATUS_FAILURE;
+ goto done;
+ }
+ PRINTM(ERROR, "FW CRC error indicated by the helper:"
+ " len = 0x%04X, txlen = %d\n", len, txlen);
+ len &= ~BIT(0);
+ /* Setting this to 0 to resend from same offset */
+ txlen = 0;
+ } else {
+ i = 0;
+
+ /* Set blocksize to transfer - checking for last block */
+ if (firmwarelen - offset < txlen) {
+ txlen = firmwarelen - offset;
+ }
+ PRINTM(INFO, ".");
+
+ tx_blocks = (txlen + SD_BLOCK_SIZE - 1) / SD_BLOCK_SIZE;
+
+ /* Copy payload to buffer */
+ memcpy(fwbuf, &firmware[offset], txlen);
+ }
+
+ /* Send data */
+ ret = sdio_writesb(card->func, priv->uap_dev.ioport,
+ fwbuf, tx_blocks * SD_BLOCK_SIZE);
+
+ if (ret < 0) {
+ PRINTM(ERROR, "FW download, write iomem (%d) failed @ %d\n", i,
+ offset);
+ if (sbi_write_ioreg(priv, CONFIGURATION_REG, 0x04) < 0) {
+ PRINTM(ERROR, "write ioreg failed (CFG)\n");
+ }
+ }
+
+ offset += txlen;
+ } while (TRUE);
+
+ PRINTM(INFO, "\nFW download over, size %d bytes\n", offset);
+
+ ret = UAP_STATUS_SUCCESS;
+ done:
+#ifdef FW_DOWNLOAD_SPEED
+ tv2 = get_utimeofday();
+ PRINTM(INFO, "FW: %ld.%03ld.%03ld ", tv1 / 1000000,
+ (tv1 % 1000000) / 1000, tv1 % 1000);
+ PRINTM(INFO, " -> %ld.%03ld.%03ld ", tv2 / 1000000,
+ (tv2 % 1000000) / 1000, tv2 % 1000);
+ tv2 -= tv1;
+ PRINTM(INFO, " == %ld.%03ld.%03ld\n", tv2 / 1000000,
+ (tv2 % 1000000) / 1000, tv2 % 1000);
+#endif
+ sdio_release_host(card->func);
+ if (tmpfwbuf)
+ kfree(tmpfwbuf);
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function checks if the firmware is ready to accept
+ * command or not.
+ *
+ * @param priv A pointer to uap_private structure
+ * @param pollnum Poll number
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_check_fw_status(uap_private * priv, int pollnum)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ int ret = UAP_STATUS_SUCCESS;
+ u16 firmwarestat;
+ int tries;
+
+ ENTER();
+
+ sdio_claim_host(card->func);
+
+ /* Wait for firmware initialization event */
+ for (tries = 0; tries < pollnum; tries++) {
+ if ((ret = sd_read_firmware_status(priv, &firmwarestat)) < 0)
+ continue;
+
+ if (firmwarestat == FIRMWARE_READY) {
+ ret = UAP_STATUS_SUCCESS;
+ break;
+ } else {
+ mdelay(10);
+ ret = UAP_STATUS_FAILURE;
+ }
+ }
+
+ if (ret < 0)
+ goto done;
+
+ ret = UAP_STATUS_SUCCESS;
+
+ sd_get_rx_unit(priv);
+
+ done:
+ sdio_release_host(card->func);
+
+ LEAVE();
+ return ret;
+}
+
+/**
+ * @brief This function set bus clock on/off
+ *
+ * @param priv A pointer to uap_private structure
+ * @param option TRUE--on , FALSE--off
+ * @return UAP_STATUS_SUCCESS
+ */
+#if 0
+static int
+sbi_set_bus_clock(uap_private * priv, u8 option)
+{
+ ENTER();
+ LEAVE();
+ return UAP_STATUS_SUCCESS;
+}
+#endif
+
+/**
+ * @brief This function wakeup firmware
+ *
+ * @param priv A pointer to uap_private structure
+ * @return UAP_STATUS_SUCCESS or UAP_STATUS_FAILURE
+ */
+int
+sbi_wakeup_firmware(uap_private * priv)
+{
+ struct sdio_mmc_card *card = priv->uap_dev.card;
+ int ret = UAP_STATUS_SUCCESS;
+
+ ENTER();
+
+ if (!card || !card->func) {
+ PRINTM(ERROR, "card or function is NULL!\n");
+ LEAVE();
+ return UAP_STATUS_FAILURE;
+ }
+ sdio_claim_host(card->func);
+ sdio_writeb(card->func, HOST_POWER_UP, CONFIGURATION_REG, &ret);
+ sdio_release_host(card->func);
+ LEAVE();
+ return ret;
+}
diff --git a/drivers/net/wireless/sd8686_uap/uap_sdio_mmc.h b/drivers/net/wireless/sd8686_uap/uap_sdio_mmc.h
new file mode 100644
index 00000000..00298f10
--- /dev/null
+++ b/drivers/net/wireless/sd8686_uap/uap_sdio_mmc.h
@@ -0,0 +1,136 @@
+/** @file uap_sdio_mmc.h
+ * @brief This file contains SDIO IF (interface) module
+ * related macros, enum, and structure.
+ *
+ * Copyright (C) 2007-2009, Marvell International Ltd.
+ *
+ * This software file (the "File") is distributed by Marvell International
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+ * (the "License"). You may use, redistribute and/or modify this File in
+ * accordance with the terms and conditions of the License, a copy of which
+ * is available along with the File in the gpl.txt file or by writing to
+ * the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307 or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+ * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
+ * this warranty disclaimer.
+ *
+ */
+/****************************************************
+Change log:
+ 10/10/07: initial version
+****************************************************/
+
+#ifndef _UAP_SDIO_MMC_H
+#define _UAP_SDIO_MMC_H
+
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/card.h>
+
+#include "uap_headers.h"
+
+/** The number of times to try when waiting for downloaded firmware to
+ become active. (polling the scratch register). */
+#define MAX_FIRMWARE_POLL_TRIES 100
+
+/** Firmware ready */
+#define FIRMWARE_READY 0xfedc
+
+/** Number of firmware blocks to transfer */
+#define FIRMWARE_TRANSFER_NBLOCK 2
+
+/* Host Control Registers */
+/** Host Control Registers : I/O port 0 */
+#define IO_PORT_0_REG 0x00
+/** Host Control Registers : I/O port 1 */
+#define IO_PORT_1_REG 0x01
+/** Host Control Registers : I/O port 2 */
+#define IO_PORT_2_REG 0x02
+
+/** Host Control Registers : Configuration */
+#define CONFIGURATION_REG 0x03
+/** Host Control Registers : Host without Command 53 finish host */
+#define HOST_WO_CMD53_FINISH_HOST (0x1U << 2)
+/** Host Control Registers : Host power up */
+#define HOST_POWER_UP (0x1U << 1)
+/** Host Control Registers : Host power down */
+#define HOST_POWER_DOWN (0x1U << 0)
+
+/** Host Control Registers : Host interrupt mask */
+#define HOST_INT_MASK_REG 0x04
+/** Host Control Registers : Upload host interrupt mask */
+#define UP_LD_HOST_INT_MASK (0x1U)
+/** Host Control Registers : Download host interrupt mask */
+#define DN_LD_HOST_INT_MASK (0x2U)
+/** Enable Host interrupt mask */
+#define HIM_ENABLE (UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK)
+/** Disable Host interrupt mask */
+#define HIM_DISABLE 0xff
+
+/** Host Control Registers : Host interrupt status */
+#define HOST_INTSTATUS_REG 0x05
+/** Host Control Registers : Upload host interrupt status */
+#define UP_LD_HOST_INT_STATUS (0x1U)
+/** Host Control Registers : Download host interrupt status */
+#define DN_LD_HOST_INT_STATUS (0x2U)
+
+/** Host F1 read base 0 */
+#define HOST_F1_RD_BASE_0 0x10
+/** Host F1 read base 1 */
+#define HOST_F1_RD_BASE_1 0x11
+
+/** Card Control Registers : Card status register */
+#define CARD_STATUS_REG 0x20
+/** Card Control Registers : Card I/O ready */
+#define CARD_IO_READY (0x1U << 3)
+/** Card Control Registers : CIS card ready */
+#define CIS_CARD_RDY (0x1U << 2)
+/** Card Control Registers : Upload card ready */
+#define UP_LD_CARD_RDY (0x1U << 1)
+/** Card Control Registers : Download card ready */
+#define DN_LD_CARD_RDY (0x1U << 0)
+
+/** Card Control Registers : Card OCR 0 register */
+#define CARD_OCR_0_REG 0x34
+/** Card Control Registers : Card OCR 1 register */
+#define CARD_OCR_1_REG 0x35
+
+/** Firmware status 0 register */
+#define CARD_FW_STATUS0_REG 0x34//0x40
+/** Firmware status 1 register */
+#define CARD_FW_STATUS1_REG 0x35//0x41
+/** Rx length register */
+#define CARD_RX_LEN_REG 0x80fd//0x42
+/** Rx unit register */
+#define CARD_RX_UNIT_REG 0x80fc//0x43
+
+/** Chip Id Register 0 */
+#define CARD_CHIP_ID_0_REG 0x801c
+/** Chip Id Register 1 */
+#define CARD_CHIP_ID_1_REG 0x801d
+
+#ifdef PXA3XX_DMA_ALIGN
+/** DMA alignment value for PXA3XX platforms */
+#define PXA3XX_DMA_ALIGNMENT 8
+/** Macros for Data Alignment : size */
+#define ALIGN_SZ(p, a) \
+ (((p) + ((a) - 1)) & ~((a) - 1))
+
+/** Macros for Data Alignment : address */
+#define ALIGN_ADDR(p, a) \
+ ((((u32)(p)) + (((u32)(a)) - 1)) & ~(((u32)(a)) - 1))
+#endif /* PXA3XX_DMA_ALIGN */
+
+struct sdio_mmc_card
+{
+ /** sdio_func structure pointer */
+ struct sdio_func *func;
+ /** uap_private structure pointer */
+ uap_private *priv;
+};
+
+#endif /* _UAP_SDIO_MMC_H */
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index 1a779bbf..45cacf79 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -134,6 +134,7 @@ static const struct key_entry hp_wmi_keymap[] = {
{ KE_KEY, 0x2142, { KEY_MEDIA } },
{ KE_KEY, 0x213b, { KEY_INFO } },
{ KE_KEY, 0x2169, { KEY_DIRECTION } },
+ { KE_KEY, 0x216a, { KEY_SETUP } },
{ KE_KEY, 0x231b, { KEY_HELP } },
{ KE_END, 0 }
};
@@ -924,6 +925,9 @@ static int __init hp_wmi_init(void)
err = hp_wmi_input_setup();
if (err)
return err;
+
+ //Enable magic for hotkeys that run on the SMBus
+ ec_write(0xe6,0x6e);
}
if (bios_capable) {
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index edec135b..9a907567 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -1964,6 +1964,9 @@ struct tp_nvram_state {
/* kthread for the hotkey poller */
static struct task_struct *tpacpi_hotkey_task;
+/* Acquired while the poller kthread is running, use to sync start/stop */
+static struct mutex hotkey_thread_mutex;
+
/*
* Acquire mutex to write poller control variables as an
* atomic block.
@@ -2459,6 +2462,8 @@ static int hotkey_kthread(void *data)
unsigned int poll_freq;
bool was_frozen;
+ mutex_lock(&hotkey_thread_mutex);
+
if (tpacpi_lifecycle == TPACPI_LIFE_EXITING)
goto exit;
@@ -2518,6 +2523,7 @@ static int hotkey_kthread(void *data)
}
exit:
+ mutex_unlock(&hotkey_thread_mutex);
return 0;
}
@@ -2527,6 +2533,9 @@ static void hotkey_poll_stop_sync(void)
if (tpacpi_hotkey_task) {
kthread_stop(tpacpi_hotkey_task);
tpacpi_hotkey_task = NULL;
+ mutex_lock(&hotkey_thread_mutex);
+ /* at this point, the thread did exit */
+ mutex_unlock(&hotkey_thread_mutex);
}
}
@@ -3225,6 +3234,7 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
mutex_init(&hotkey_mutex);
#ifdef CONFIG_THINKPAD_ACPI_HOTKEY_POLL
+ mutex_init(&hotkey_thread_mutex);
mutex_init(&hotkey_thread_data_mutex);
#endif
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index c6d77e20..cc1f7bf5 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -4,7 +4,7 @@ menu "Remoteproc drivers"
config REMOTEPROC
tristate
depends on HAS_DMA
- select FW_LOADER
+ select FW_CONFIG
select VIRTIO
config OMAP_REMOTEPROC
diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c
index 8edb4aed..29387df4 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -217,7 +217,7 @@ int rproc_alloc_vring(struct rproc_vdev *rvdev, int i)
* TODO: support predefined notifyids (via resource table)
*/
ret = idr_alloc(&rproc->notifyids, rvring, 0, 0, GFP_KERNEL);
- if (ret < 0) {
+ if (ret) {
dev_err(dev, "idr_alloc failed: %d\n", ret);
dma_free_coherent(dev->parent, size, va, dma);
return ret;
@@ -366,12 +366,10 @@ static int rproc_handle_vdev(struct rproc *rproc, struct fw_rsc_vdev *rsc,
/* it is now safe to add the virtio device */
ret = rproc_add_virtio_dev(rvdev, rsc->id);
if (ret)
- goto remove_rvdev;
+ goto free_rvdev;
return 0;
-remove_rvdev:
- list_del(&rvdev->node);
free_rvdev:
kfree(rvdev);
return ret;
diff --git a/drivers/remoteproc/ste_modem_rproc.c b/drivers/remoteproc/ste_modem_rproc.c
index fb95c422..a7743c06 100644
--- a/drivers/remoteproc/ste_modem_rproc.c
+++ b/drivers/remoteproc/ste_modem_rproc.c
@@ -240,8 +240,6 @@ static int sproc_drv_remove(struct platform_device *pdev)
/* Unregister as remoteproc device */
rproc_del(sproc->rproc);
- dma_free_coherent(sproc->rproc->dev.parent, SPROC_FW_SIZE,
- sproc->fw_addr, sproc->fw_dma_addr);
rproc_put(sproc->rproc);
mdev->drv_data = NULL;
@@ -299,13 +297,10 @@ static int sproc_probe(struct platform_device *pdev)
/* Register as a remoteproc device */
err = rproc_add(rproc);
if (err)
- goto free_mem;
+ goto free_rproc;
return 0;
-free_mem:
- dma_free_coherent(rproc->dev.parent, SPROC_FW_SIZE,
- sproc->fw_addr, sproc->fw_dma_addr);
free_rproc:
/* Reset device data upon error */
mdev->drv_data = NULL;
diff --git a/drivers/rtc/rtc-davinci.c b/drivers/rtc/rtc-davinci.c
index 56b73089..be4f2d83 100644
--- a/drivers/rtc/rtc-davinci.c
+++ b/drivers/rtc/rtc-davinci.c
@@ -119,8 +119,6 @@ static DEFINE_SPINLOCK(davinci_rtc_lock);
struct davinci_rtc {
struct rtc_device *rtc;
void __iomem *base;
- resource_size_t pbase;
- size_t base_size;
int irq;
};
@@ -478,47 +476,36 @@ static struct rtc_class_ops davinci_rtc_ops = {
.set_alarm = davinci_rtc_set_alarm,
};
-static int __init davinci_rtc_probe(struct platform_device *pdev)
+static int davinci_rtc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct davinci_rtc *davinci_rtc;
- struct resource *res, *mem;
+ struct resource *res;
int ret = 0;
- davinci_rtc = devm_kzalloc(&pdev->dev, sizeof(struct davinci_rtc), GFP_KERNEL);
+ davinci_rtc = devm_kzalloc(&pdev->dev, sizeof(struct davinci_rtc),
+ GFP_KERNEL);
if (!davinci_rtc) {
dev_dbg(dev, "could not allocate memory for private data\n");
return -ENOMEM;
}
- davinci_rtc->irq = platform_get_irq(pdev, 0);
- if (davinci_rtc->irq < 0) {
- dev_err(dev, "no RTC irq\n");
- return davinci_rtc->irq;
- }
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "no mem resource\n");
return -EINVAL;
}
- davinci_rtc->pbase = res->start;
- davinci_rtc->base_size = resource_size(res);
-
- mem = devm_request_mem_region(dev, davinci_rtc->pbase,
- davinci_rtc->base_size, pdev->name);
- if (!mem) {
- dev_err(dev, "RTC registers at %08x are not free\n",
- davinci_rtc->pbase);
+ davinci_rtc->base = devm_request_and_ioremap(&pdev->dev, res);
+ if (!davinci_rtc->base) {
+ dev_err(&pdev->dev, "Unable to request mem region and grab IOs for device.\n");
return -EBUSY;
}
- davinci_rtc->base = devm_ioremap(dev, davinci_rtc->pbase,
- davinci_rtc->base_size);
- if (!davinci_rtc->base) {
- dev_err(dev, "unable to ioremap MEM resource\n");
- return -ENOMEM;
+ davinci_rtc->irq = platform_get_irq(pdev, 0);
+ if (davinci_rtc->irq < 0) {
+ dev_err(dev, "no RTC irq\n");
+ return davinci_rtc->irq;
}
platform_set_drvdata(pdev, davinci_rtc);
@@ -527,9 +514,9 @@ static int __init davinci_rtc_probe(struct platform_device *pdev)
&davinci_rtc_ops, THIS_MODULE);
if (IS_ERR(davinci_rtc->rtc)) {
ret = PTR_ERR(davinci_rtc->rtc);
- dev_err(dev, "unable to register RTC device, err %d\n",
- ret);
- goto fail1;
+ dev_err(dev, "unable to register RTC device, err %ld\n",
+ PTR_ERR(davinci_rtc->rtc));
+ return ret;
}
rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS, PRTCIF_INTFLG);
@@ -543,7 +530,7 @@ static int __init davinci_rtc_probe(struct platform_device *pdev)
0, "davinci_rtc", davinci_rtc);
if (ret < 0) {
dev_err(dev, "unable to register davinci RTC interrupt\n");
- goto fail2;
+ goto err_dev_unreg;
}
/* Enable interrupts */
@@ -552,15 +539,21 @@ static int __init davinci_rtc_probe(struct platform_device *pdev)
PRTCSS_RTC_INTC_EXTENA1);
rtcss_write(davinci_rtc, PRTCSS_RTC_CCTRL_CAEN, PRTCSS_RTC_CCTRL);
-
+ {
+ u8 rtc_res = 0xFF;
+ rtc_res = rtcss_read(davinci_rtc, 0x04);
+ printk("Setting 32 kHz output in RTC driver: start %d, %x\r\n", rtc_res, (unsigned int)davinci_rtc->base);
+ rtcss_write(davinci_rtc, 0x01, 0x04);
+ rtc_res = rtcss_read(davinci_rtc, 0x04);
+ printk("Setting 32 kHz output in RTC driver: finish %d\r\n", rtc_res);
+ }
device_init_wakeup(&pdev->dev, 0);
return 0;
-fail2:
+err_dev_unreg:
rtc_device_unregister(davinci_rtc->rtc);
-fail1:
- platform_set_drvdata(pdev, NULL);
+
return ret;
}
diff --git a/drivers/s390/net/qeth_core.h b/drivers/s390/net/qeth_core.h
index 6ccb7457..8c062239 100644
--- a/drivers/s390/net/qeth_core.h
+++ b/drivers/s390/net/qeth_core.h
@@ -769,7 +769,6 @@ struct qeth_card {
unsigned long thread_start_mask;
unsigned long thread_allowed_mask;
unsigned long thread_running_mask;
- struct task_struct *recovery_task;
spinlock_t ip_lock;
struct list_head ip_list;
struct list_head *ip_tbd_list;
@@ -863,8 +862,6 @@ extern struct qeth_card_list_struct qeth_core_card_list;
extern struct kmem_cache *qeth_core_header_cache;
extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
-void qeth_set_recovery_task(struct qeth_card *);
-void qeth_clear_recovery_task(struct qeth_card *);
void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
int qeth_threads_running(struct qeth_card *, unsigned long);
int qeth_wait_for_threads(struct qeth_card *, unsigned long);
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c
index 451f9202..0d73a999 100644
--- a/drivers/s390/net/qeth_core_main.c
+++ b/drivers/s390/net/qeth_core_main.c
@@ -177,23 +177,6 @@ const char *qeth_get_cardname_short(struct qeth_card *card)
return "n/a";
}
-void qeth_set_recovery_task(struct qeth_card *card)
-{
- card->recovery_task = current;
-}
-EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
-
-void qeth_clear_recovery_task(struct qeth_card *card)
-{
- card->recovery_task = NULL;
-}
-EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
-
-static bool qeth_is_recovery_task(const struct qeth_card *card)
-{
- return card->recovery_task == current;
-}
-
void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
int clear_start_mask)
{
@@ -222,8 +205,6 @@ EXPORT_SYMBOL_GPL(qeth_threads_running);
int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
{
- if (qeth_is_recovery_task(card))
- return 0;
return wait_event_interruptible(card->wait_q,
qeth_threads_running(card, threads) == 0);
}
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c
index 155b101b..d690166e 100644
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -1143,7 +1143,6 @@ static int qeth_l2_recover(void *ptr)
QETH_CARD_TEXT(card, 2, "recover2");
dev_warn(&card->gdev->dev,
"A recovery process has been started for the device\n");
- qeth_set_recovery_task(card);
__qeth_l2_set_offline(card->gdev, 1);
rc = __qeth_l2_set_online(card->gdev, 1);
if (!rc)
@@ -1154,7 +1153,6 @@ static int qeth_l2_recover(void *ptr)
dev_warn(&card->gdev->dev, "The qeth device driver "
"failed to recover an error on the device\n");
}
- qeth_clear_recovery_task(card);
qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
qeth_clear_thread_running_bit(card, QETH_RECOVER_THREAD);
return 0;
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c
index 1f7edf1b..8710337d 100644
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -3515,7 +3515,6 @@ static int qeth_l3_recover(void *ptr)
QETH_CARD_TEXT(card, 2, "recover2");
dev_warn(&card->gdev->dev,
"A recovery process has been started for the device\n");
- qeth_set_recovery_task(card);
__qeth_l3_set_offline(card->gdev, 1);
rc = __qeth_l3_set_online(card->gdev, 1);
if (!rc)
@@ -3526,7 +3525,6 @@ static int qeth_l3_recover(void *ptr)
dev_warn(&card->gdev->dev, "The qeth device driver "
"failed to recover an error on the device\n");
}
- qeth_clear_recovery_task(card);
qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
qeth_clear_thread_running_bit(card, QETH_RECOVER_THREAD);
return 0;
diff --git a/drivers/sbus/char/bbc_i2c.c b/drivers/sbus/char/bbc_i2c.c
index c1441ed2..1a9d1e3c 100644
--- a/drivers/sbus/char/bbc_i2c.c
+++ b/drivers/sbus/char/bbc_i2c.c
@@ -282,7 +282,7 @@ static irqreturn_t bbc_i2c_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static void reset_one_i2c(struct bbc_i2c_bus *bp)
+static void __init reset_one_i2c(struct bbc_i2c_bus *bp)
{
writeb(I2C_PCF_PIN, bp->i2c_control_regs + 0x0);
writeb(bp->own, bp->i2c_control_regs + 0x1);
@@ -291,7 +291,7 @@ static void reset_one_i2c(struct bbc_i2c_bus *bp)
writeb(I2C_PCF_IDLE, bp->i2c_control_regs + 0x0);
}
-static struct bbc_i2c_bus * attach_one_i2c(struct platform_device *op, int index)
+static struct bbc_i2c_bus * __init attach_one_i2c(struct platform_device *op, int index)
{
struct bbc_i2c_bus *bp;
struct device_node *dp;
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index d0fa4b6c..a044f593 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -1899,8 +1899,8 @@ static int ibmvscsi_slave_configure(struct scsi_device *sdev)
sdev->allow_restart = 1;
blk_queue_rq_timeout(sdev->request_queue, 120 * HZ);
}
- spin_unlock_irqrestore(shost->host_lock, lock_flags);
scsi_adjust_queue_depth(sdev, 0, shost->cmd_per_lun);
+ spin_unlock_irqrestore(shost->host_lock, lock_flags);
return 0;
}
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 2197b57f..f328089a 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -5148,7 +5148,7 @@ static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
ipr_trace;
}
- list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
+ list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
if (!ipr_is_naca_model(res))
res->needs_sync_complete = 1;
@@ -9349,10 +9349,7 @@ static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
- if (ioa_cfg->intr_flag == IPR_USE_MSIX)
- rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
- else
- rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
+ rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
if (rc) {
dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
return rc;
@@ -9374,10 +9371,7 @@ static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
- if (ioa_cfg->intr_flag == IPR_USE_MSIX)
- free_irq(ioa_cfg->vectors_info[0].vec, ioa_cfg);
- else
- free_irq(pdev->irq, ioa_cfg);
+ free_irq(pdev->irq, ioa_cfg);
LEAVE;
@@ -9728,7 +9722,6 @@ static void __ipr_remove(struct pci_dev *pdev)
spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
flush_work(&ioa_cfg->work_q);
- INIT_LIST_HEAD(&ioa_cfg->used_res_q);
spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
spin_lock(&ipr_driver_lock);
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c
index 55cbd018..aec2e0da 100644
--- a/drivers/scsi/libsas/sas_expander.c
+++ b/drivers/scsi/libsas/sas_expander.c
@@ -235,17 +235,6 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)
linkrate = phy->linkrate;
memcpy(sas_addr, phy->attached_sas_addr, SAS_ADDR_SIZE);
- /* Handle vacant phy - rest of dr data is not valid so skip it */
- if (phy->phy_state == PHY_VACANT) {
- memset(phy->attached_sas_addr, 0, SAS_ADDR_SIZE);
- phy->attached_dev_type = NO_DEVICE;
- if (!test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state)) {
- phy->phy_id = phy_id;
- goto skip;
- } else
- goto out;
- }
-
phy->attached_dev_type = to_dev_type(dr);
if (test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state))
goto out;
@@ -283,7 +272,6 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)
phy->phy->maximum_linkrate = dr->pmax_linkrate;
phy->phy->negotiated_linkrate = phy->linkrate;
- skip:
if (new_phy)
if (sas_phy_add(phy->phy)) {
sas_phy_free(phy->phy);
@@ -400,7 +388,7 @@ int sas_ex_phy_discover(struct domain_device *dev, int single)
if (!disc_req)
return -ENOMEM;
- disc_resp = alloc_smp_resp(DISCOVER_RESP_SIZE);
+ disc_resp = alloc_smp_req(DISCOVER_RESP_SIZE);
if (!disc_resp) {
kfree(disc_req);
return -ENOMEM;
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index d43faf34..74b67d98 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -438,12 +438,11 @@ lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
struct lpfc_rqe *temp_hrqe;
struct lpfc_rqe *temp_drqe;
struct lpfc_register doorbell;
- int put_index;
+ int put_index = hq->host_index;
/* sanity check on queue memory */
if (unlikely(!hq) || unlikely(!dq))
return -ENOMEM;
- put_index = hq->host_index;
temp_hrqe = hq->qe[hq->host_index].rqe;
temp_drqe = dq->qe[dq->host_index].rqe;
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index b3db9dcc..1d82eef4 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -1938,6 +1938,11 @@ qla24xx_vport_delete(struct fc_vport *fc_vport)
"Timer for the VP[%d] has stopped\n", vha->vp_idx);
}
+ /* No pending activities shall be there on the vha now */
+ if (ql2xextended_error_logging & ql_dbg_user)
+ msleep(random32()%10); /* Just to see if something falls on
+ * the net we have placed below */
+
BUG_ON(atomic_read(&vha->vref_count));
qla2x00_free_fcports(vha);
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index fbc305f1..1626de52 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -15,7 +15,6 @@
* | Mailbox commands | 0x115b | 0x111a-0x111b |
* | | | 0x112c-0x112e |
* | | | 0x113a |
- * | | | 0x1155-0x1158 |
* | Device Discovery | 0x2087 | 0x2020-0x2022, |
* | | | 0x2016 |
* | Queue Command and IO tracing | 0x3031 | 0x3006-0x300b |
@@ -402,7 +401,7 @@ qla2xxx_copy_atioqueues(struct qla_hw_data *ha, void *ptr,
void *ring;
} aq, *aqp;
- if (!ha->tgt.atio_ring)
+ if (!ha->tgt.atio_q_length)
return ptr;
num_queues = 1;
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 65c5ff75..c6509911 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -863,6 +863,7 @@ typedef struct {
#define MBX_1 BIT_1
#define MBX_0 BIT_0
+#define RNID_TYPE_SET_VERSION 0x9
#define RNID_TYPE_ASIC_TEMP 0xC
/*
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index b310fa97..eb3ca21a 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -357,6 +357,9 @@ qla2x00_enable_fce_trace(scsi_qla_host_t *, dma_addr_t, uint16_t , uint16_t *,
extern int
qla2x00_disable_fce_trace(scsi_qla_host_t *, uint64_t *, uint64_t *);
+extern int
+qla2x00_set_driver_version(scsi_qla_host_t *, char *);
+
extern int
qla2x00_read_sfp(scsi_qla_host_t *, dma_addr_t, uint8_t *,
uint16_t, uint16_t, uint16_t, uint16_t);
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index b5920339..edf4d14a 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -619,6 +619,8 @@ qla2x00_initialize_adapter(scsi_qla_host_t *vha)
if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
qla24xx_read_fcp_prio_cfg(vha);
+ qla2x00_set_driver_version(vha, QLA2XXX_VERSION);
+
return (rval);
}
@@ -1397,7 +1399,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
mq_size += ha->max_rsp_queues *
(rsp->length * sizeof(response_t));
}
- if (ha->tgt.atio_ring)
+ if (ha->tgt.atio_q_length)
mq_size += ha->tgt.atio_q_length * sizeof(request_t);
/* Allocate memory for Fibre Channel Event Buffer. */
if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 43345af5..186dd59c 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -3866,6 +3866,64 @@ qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
return rval;
}
+int
+qla2x00_set_driver_version(scsi_qla_host_t *vha, char *version)
+{
+ int rval;
+ mbx_cmd_t mc;
+ mbx_cmd_t *mcp = &mc;
+ int len;
+ uint16_t dwlen;
+ uint8_t *str;
+ dma_addr_t str_dma;
+ struct qla_hw_data *ha = vha->hw;
+
+ if (!IS_FWI2_CAPABLE(ha) || IS_QLA82XX(ha))
+ return QLA_FUNCTION_FAILED;
+
+ ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1155,
+ "Entered %s.\n", __func__);
+
+ str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
+ if (!str) {
+ ql_log(ql_log_warn, vha, 0x1156,
+ "Failed to allocate driver version param.\n");
+ return QLA_MEMORY_ALLOC_FAILED;
+ }
+
+ memcpy(str, "\x7\x3\x11\x0", 4);
+ dwlen = str[0];
+ len = dwlen * sizeof(uint32_t) - 4;
+ memset(str + 4, 0, len);
+ if (len > strlen(version))
+ len = strlen(version);
+ memcpy(str + 4, version, len);
+
+ mcp->mb[0] = MBC_SET_RNID_PARAMS;
+ mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
+ mcp->mb[2] = MSW(LSD(str_dma));
+ mcp->mb[3] = LSW(LSD(str_dma));
+ mcp->mb[6] = MSW(MSD(str_dma));
+ mcp->mb[7] = LSW(MSD(str_dma));
+ mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
+ mcp->in_mb = MBX_0;
+ mcp->tov = MBX_TOV_SECONDS;
+ mcp->flags = 0;
+ rval = qla2x00_mailbox_command(vha, mcp);
+
+ if (rval != QLA_SUCCESS) {
+ ql_dbg(ql_dbg_mbx, vha, 0x1157,
+ "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
+ } else {
+ ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1158,
+ "Done %s.\n", __func__);
+ }
+
+ dma_pool_free(ha->s_dma_pool, str, str_dma);
+
+ return rval;
+}
+
static int
qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
{
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index ec54036d..2b6e478d 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
/*
* Driver version
*/
-#define QLA2XXX_VERSION "8.04.00.13-k"
+#define QLA2XXX_VERSION "8.04.00.08-k"
#define QLA_DRIVER_MAJOR_VER 8
#define QLA_DRIVER_MINOR_VER 4
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c
index 2a32036a..86974471 100644
--- a/drivers/scsi/st.c
+++ b/drivers/scsi/st.c
@@ -4112,10 +4112,6 @@ static int st_probe(struct device *dev)
tpnt->disk = disk;
disk->private_data = &tpnt->driver;
disk->queue = SDp->request_queue;
- /* SCSI tape doesn't register this gendisk via add_disk(). Manually
- * take queue reference that release_disk() expects. */
- if (!blk_get_queue(disk->queue))
- goto out_put_disk;
tpnt->driver = &st_template;
tpnt->device = SDp;
@@ -4189,7 +4185,7 @@ static int st_probe(struct device *dev)
idr_preload_end();
if (error < 0) {
pr_warn("st: idr allocation failed: %d\n", error);
- goto out_put_queue;
+ goto out_put_disk;
}
tpnt->index = error;
sprintf(disk->disk_name, "st%d", tpnt->index);
@@ -4215,8 +4211,6 @@ out_remove_devs:
spin_lock(&st_index_lock);
idr_remove(&st_index_idr, tpnt->index);
spin_unlock(&st_index_lock);
-out_put_queue:
- blk_put_queue(disk->queue);
out_put_disk:
put_disk(disk);
kfree(tpnt);
diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c
index a537f8df..c6386e27 100644
--- a/drivers/spi/spi-altera.c
+++ b/drivers/spi/spi-altera.c
@@ -215,7 +215,7 @@ static irqreturn_t altera_spi_irq(int irq, void *dev)
return IRQ_HANDLED;
}
-static int altera_spi_probe(struct platform_device *pdev)
+static int __devinit altera_spi_probe(struct platform_device *pdev)
{
struct altera_spi_platform_data *platp = pdev->dev.platform_data;
struct altera_spi *hw;
@@ -290,7 +290,7 @@ exit:
return err;
}
-static int altera_spi_remove(struct platform_device *dev)
+static int __devexit altera_spi_remove(struct platform_device *dev)
{
struct altera_spi *hw = platform_get_drvdata(dev);
struct spi_master *master = hw->bitbang.master;
@@ -311,7 +311,7 @@ MODULE_DEVICE_TABLE(of, altera_spi_match);
static struct platform_driver altera_spi_driver = {
.probe = altera_spi_probe,
- .remove = altera_spi_remove,
+ .remove = __devexit_p(altera_spi_remove),
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index e504b763..2275e87d 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -206,7 +206,7 @@ static u32 ath79_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
}
-static int ath79_spi_probe(struct platform_device *pdev)
+static __devinit int ath79_spi_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct ath79_spi *sp;
@@ -293,7 +293,7 @@ err_put_master:
return ret;
}
-static int ath79_spi_remove(struct platform_device *pdev)
+static __devexit int ath79_spi_remove(struct platform_device *pdev)
{
struct ath79_spi *sp = platform_get_drvdata(pdev);
@@ -315,8 +315,7 @@ static void ath79_spi_shutdown(struct platform_device *pdev)
static struct platform_driver ath79_spi_driver = {
.probe = ath79_spi_probe,
- .remove = ath79_spi_remove,
- .shutdown = ath79_spi_shutdown,
+ .remove = __devexit_p(ath79_spi_remove),
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 656d137d..9cdfb4a0 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -912,7 +912,7 @@ static void atmel_spi_cleanup(struct spi_device *spi)
/*-------------------------------------------------------------------------*/
-static int atmel_spi_probe(struct platform_device *pdev)
+static int __devinit atmel_spi_probe(struct platform_device *pdev)
{
struct resource *regs;
int irq;
@@ -1009,7 +1009,7 @@ out_free:
return ret;
}
-static int atmel_spi_remove(struct platform_device *pdev)
+static int __devexit atmel_spi_remove(struct platform_device *pdev)
{
struct spi_master *master = platform_get_drvdata(pdev);
struct atmel_spi *as = spi_master_get_devdata(master);
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c
index d7df435d..cd4c1fe1 100644
--- a/drivers/spi/spi-bcm63xx.c
+++ b/drivers/spi/spi-bcm63xx.c
@@ -399,7 +399,7 @@ static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id)
}
-static int bcm63xx_spi_probe(struct platform_device *pdev)
+static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
{
struct resource *r;
struct device *dev = &pdev->dev;
@@ -519,7 +519,7 @@ out:
return ret;
}
-static int bcm63xx_spi_remove(struct platform_device *pdev)
+static int __devexit bcm63xx_spi_remove(struct platform_device *pdev)
{
struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
struct bcm63xx_spi *bs = spi_master_get_devdata(master);
@@ -584,7 +584,7 @@ static struct platform_driver bcm63xx_spi_driver = {
.pm = BCM63XX_SPI_PM_OPS,
},
.probe = bcm63xx_spi_probe,
- .remove = bcm63xx_spi_remove,
+ .remove = __devexit_p(bcm63xx_spi_remove),
};
module_platform_driver(bcm63xx_spi_driver);
diff --git a/drivers/spi/spi-bfin-sport.c b/drivers/spi/spi-bfin-sport.c
index 39b0d171..f9bab7e1 100644
--- a/drivers/spi/spi-bfin-sport.c
+++ b/drivers/spi/spi-bfin-sport.c
@@ -754,7 +754,8 @@ bfin_sport_spi_destroy_queue(struct bfin_sport_spi_master_data *drv_data)
return 0;
}
-static int bfin_sport_spi_probe(struct platform_device *pdev)
+static int __devinit
+bfin_sport_spi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct bfin5xx_spi_master *platform_info;
@@ -861,7 +862,8 @@ static int bfin_sport_spi_probe(struct platform_device *pdev)
}
/* stop hardware and remove the driver */
-static int bfin_sport_spi_remove(struct platform_device *pdev)
+static int __devexit
+bfin_sport_spi_remove(struct platform_device *pdev)
{
struct bfin_sport_spi_master_data *drv_data = platform_get_drvdata(pdev);
int status = 0;
@@ -932,7 +934,7 @@ static struct platform_driver bfin_sport_spi_driver = {
.owner = THIS_MODULE,
},
.probe = bfin_sport_spi_probe,
- .remove = bfin_sport_spi_remove,
+ .remove = __devexit_p(bfin_sport_spi_remove),
.suspend = bfin_sport_spi_suspend,
.resume = bfin_sport_spi_resume,
};
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c
index 317f564c..dd62ffba 100644
--- a/drivers/spi/spi-bfin5xx.c
+++ b/drivers/spi/spi-bfin5xx.c
@@ -1386,7 +1386,7 @@ out_error_get_res:
}
/* stop hardware and remove the driver */
-static int bfin_spi_remove(struct platform_device *pdev)
+static int __devexit bfin_spi_remove(struct platform_device *pdev)
{
struct bfin_spi_master_data *drv_data = platform_get_drvdata(pdev);
int status = 0;
@@ -1476,7 +1476,7 @@ static struct platform_driver bfin_spi_driver = {
},
.suspend = bfin_spi_suspend,
.resume = bfin_spi_resume,
- .remove = bfin_spi_remove,
+ .remove = __devexit_p(bfin_spi_remove),
};
static int __init bfin_spi_init(void)
diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c
index a11cbf02..57b5712f 100644
--- a/drivers/spi/spi-clps711x.c
+++ b/drivers/spi/spi-clps711x.c
@@ -163,7 +163,7 @@ static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static int spi_clps711x_probe(struct platform_device *pdev)
+static int __devinit spi_clps711x_probe(struct platform_device *pdev)
{
int i, ret;
struct spi_master *master;
@@ -261,7 +261,7 @@ err_out:
return ret;
}
-static int spi_clps711x_remove(struct platform_device *pdev)
+static int __devexit spi_clps711x_remove(struct platform_device *pdev)
{
int i;
struct spi_master *master = platform_get_drvdata(pdev);
@@ -287,7 +287,7 @@ static struct platform_driver clps711x_spi_driver = {
.owner = THIS_MODULE,
},
.probe = spi_clps711x_probe,
- .remove = spi_clps711x_remove,
+ .remove = __devexit_p(spi_clps711x_remove),
};
module_platform_driver(clps711x_spi_driver);
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c
index 7b5cc9e4..0c108baa 100644
--- a/drivers/spi/spi-coldfire-qspi.c
+++ b/drivers/spi/spi-coldfire-qspi.c
@@ -400,7 +400,7 @@ static int mcfqspi_setup(struct spi_device *spi)
return 0;
}
-static int mcfqspi_probe(struct platform_device *pdev)
+static int __devinit mcfqspi_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct mcfqspi *mcfqspi;
@@ -514,7 +514,7 @@ fail0:
return status;
}
-static int mcfqspi_remove(struct platform_device *pdev)
+static int __devexit mcfqspi_remove(struct platform_device *pdev)
{
struct spi_master *master = platform_get_drvdata(pdev);
struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
@@ -593,7 +593,7 @@ static struct platform_driver mcfqspi_driver = {
.driver.owner = THIS_MODULE,
.driver.pm = &mcfqspi_pm,
.probe = mcfqspi_probe,
- .remove = mcfqspi_remove,
+ .remove = __devexit_p(mcfqspi_remove),
};
module_platform_driver(mcfqspi_driver);
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index 8234d225..3bfe3bc8 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -17,6 +17,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+//#define DEBUG
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/gpio.h>
@@ -25,16 +26,13 @@
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/clk.h>
-#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
-#include <linux/edma.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/slab.h>
#include <linux/platform_data/spi-davinci.h>
+#include <linux/platform_data/edma.h>
#define SPI_NO_RESOURCE ((resource_size_t)-1)
@@ -116,6 +114,14 @@
#define SPIDEF 0x4c
#define SPIFMT0 0x50
+/* We have 2 DMA channels per CS, one for RX and one for TX */
+struct davinci_spi_dma {
+ int tx_channel;
+ int rx_channel;
+ int dummy_param_slot;
+ enum dma_event_q eventq;
+};
+
/* SPI Controller driver's private data. */
struct davinci_spi {
struct spi_bitbang bitbang;
@@ -129,15 +135,13 @@ struct davinci_spi {
const void *tx;
void *rx;
+#define SPI_TMP_BUFSZ (SMP_CACHE_BYTES + 1)
+ u8 rx_tmp_buf[SPI_TMP_BUFSZ];
int rcount;
int wcount;
-
- struct dma_chan *dma_rx;
- struct dma_chan *dma_tx;
- int dma_rx_chnum;
- int dma_tx_chnum;
-
- struct davinci_spi_platform_data pdata;
+ int rerror;
+ struct davinci_spi_dma dma;
+ struct davinci_spi_platform_data *pdata;
void (*get_rx)(u32 rx_data, struct davinci_spi *);
u32 (*get_tx)(struct davinci_spi *);
@@ -215,7 +219,7 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
bool gpio_chipsel = false;
dspi = spi_master_get_devdata(spi->master);
- pdata = &dspi->pdata;
+ pdata = dspi->pdata;
if (pdata->chip_sel && chip_sel < pdata->num_chipselect &&
pdata->chip_sel[chip_sel] != SPI_INTERN_CS)
@@ -256,7 +260,7 @@ static inline int davinci_spi_get_prescale(struct davinci_spi *dspi,
int ret;
ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz);
-
+ //printk("SPI CLK=%d, MAX_SPEED=%d, PRESCALER=%d\r\n", clk_get_rate(dspi->clk), max_speed_hz, ret);
if (ret < 3 || ret > 256)
return -EINVAL;
@@ -394,7 +398,7 @@ static int davinci_spi_setup(struct spi_device *spi)
struct davinci_spi_platform_data *pdata;
dspi = spi_master_get_devdata(spi->master);
- pdata = &dspi->pdata;
+ pdata = dspi->pdata;
/* if bits per word length is zero then set it default 8 */
if (!spi->bits_per_word)
@@ -494,23 +498,25 @@ out:
return errors;
}
-static void davinci_spi_dma_rx_callback(void *data)
+static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
{
- struct davinci_spi *dspi = (struct davinci_spi *)data;
-
- dspi->rcount = 0;
-
- if (!dspi->wcount && !dspi->rcount)
- complete(&dspi->done);
-}
+ struct davinci_spi *dspi = data;
+ struct davinci_spi_dma *dma = &dspi->dma;
-static void davinci_spi_dma_tx_callback(void *data)
-{
- struct davinci_spi *dspi = (struct davinci_spi *)data;
+ edma_stop(lch);
- dspi->wcount = 0;
+ if (status == EDMA_DMA_COMPLETE) {
+ if (lch == dma->rx_channel)
+ dspi->rcount = 0;
+ if (lch == dma->tx_channel)
+ dspi->wcount = 0;
+ }
+ if (status == EDMA_DMA_CC_ERROR) {
+ dspi->rerror = 1;
+ pr_info("dma cc_error ch=%d\n", lch);
+ }
- if (!dspi->wcount && !dspi->rcount)
+ if (!dspi->wcount && (!dspi->rcount || dspi->rerror))
complete(&dspi->done);
}
@@ -526,20 +532,21 @@ static void davinci_spi_dma_tx_callback(void *data)
static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
{
struct davinci_spi *dspi;
- int data_type, ret = -ENOMEM;
+ int data_type, ret;
u32 tx_data, spidat1;
u32 errors = 0;
struct davinci_spi_config *spicfg;
struct davinci_spi_platform_data *pdata;
unsigned uninitialized_var(rx_buf_count);
- void *dummy_buf = NULL;
- struct scatterlist sg_rx, sg_tx;
+ struct device *sdev;
+ u8 io_type;
dspi = spi_master_get_devdata(spi->master);
- pdata = &dspi->pdata;
+ pdata = dspi->pdata;
spicfg = (struct davinci_spi_config *)spi->controller_data;
if (!spicfg)
spicfg = &davinci_spi_default_cfg;
+ sdev = dspi->bitbang.master->dev.parent;
/* convert len to words based on bits_per_word */
data_type = dspi->bytes_per_word[spi->chip_select];
@@ -547,19 +554,33 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
dspi->tx = t->tx_buf;
dspi->rx = t->rx_buf;
dspi->wcount = t->len / data_type;
- dspi->rcount = dspi->wcount;
+ dspi->rcount = (t->rx_buf ? dspi->wcount : 0);
+ dspi->rerror = 0;
spidat1 = ioread32(dspi->base + SPIDAT1);
clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
- INIT_COMPLETION(dspi->done);
+ io_type = spicfg->io_type;
+ /* Achtung, kludge!
+ * - The fastest way to transfer a few bytes is polling
+ * - The most reliable and not very CPU-abusive way to receive anything
+ * is IRQs
+ * - Finally, DMA is used only for long unidirectional writes
+ */
+ if (dspi->wcount < 8)
+ io_type = SPI_IO_TYPE_POLL;
+ else if (t->rx_buf)
+ io_type = SPI_IO_TYPE_INTR;
+
+ if (io_type != SPI_IO_TYPE_POLL)
+ INIT_COMPLETION(dspi->done);
- if (spicfg->io_type == SPI_IO_TYPE_INTR)
+ if (io_type == SPI_IO_TYPE_INTR)
set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT);
- if (spicfg->io_type != SPI_IO_TYPE_DMA) {
+ if (io_type != SPI_IO_TYPE_DMA) {
/* start the transfer */
dspi->wcount--;
tx_data = dspi->get_tx(dspi);
@@ -567,88 +588,113 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
spidat1 |= tx_data & 0xFFFF;
iowrite32(spidat1, dspi->base + SPIDAT1);
} else {
- struct dma_slave_config dma_rx_conf = {
- .direction = DMA_DEV_TO_MEM,
- .src_addr = (unsigned long)dspi->pbase + SPIBUF,
- .src_addr_width = data_type,
- .src_maxburst = 1,
- };
- struct dma_slave_config dma_tx_conf = {
- .direction = DMA_MEM_TO_DEV,
- .dst_addr = (unsigned long)dspi->pbase + SPIDAT1,
- .dst_addr_width = data_type,
- .dst_maxburst = 1,
- };
- struct dma_async_tx_descriptor *rxdesc;
- struct dma_async_tx_descriptor *txdesc;
- void *buf;
-
- dummy_buf = kzalloc(t->len, GFP_KERNEL);
- if (!dummy_buf)
- goto err_alloc_dummy_buf;
-
- dmaengine_slave_config(dspi->dma_rx, &dma_rx_conf);
- dmaengine_slave_config(dspi->dma_tx, &dma_tx_conf);
-
- sg_init_table(&sg_rx, 1);
- if (!t->rx_buf)
- buf = dummy_buf;
- else
- buf = t->rx_buf;
- t->rx_dma = dma_map_single(&spi->dev, buf,
- t->len, DMA_FROM_DEVICE);
- if (!t->rx_dma) {
- ret = -EFAULT;
- goto err_rx_map;
+ struct davinci_spi_dma *dma;
+ unsigned long tx_reg, rx_reg;
+ struct edmacc_param param;
+ int b, c;
+
+ dma = &dspi->dma;
+
+ tx_reg = (unsigned long)dspi->pbase + SPIDAT1;
+ rx_reg = (unsigned long)dspi->pbase + SPIBUF;
+
+ /*
+ * Transmit DMA setup
+ *
+ * If there is transmit data, map the transmit buffer, set it
+ * as the source of data and set the source B index to data
+ * size. If there is no transmit data, set the transmit register
+ * as the source of data, and set the source B index to zero.
+ *
+ * The destination is always the transmit register itself. And
+ * the destination never increments.
+ */
+
+ if (t->tx_buf) {
+ t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
+ t->len, DMA_TO_DEVICE);
+ if (dma_mapping_error(&spi->dev, t->tx_dma)) {
+ dev_dbg(sdev, "Unable to DMA map %d bytes"
+ "TX buffer\n", t->len);
+ return -ENOMEM;
+ }
}
- sg_dma_address(&sg_rx) = t->rx_dma;
- sg_dma_len(&sg_rx) = t->len;
- sg_init_table(&sg_tx, 1);
- if (!t->tx_buf)
- buf = dummy_buf;
+ /*
+ * If number of words is greater than 65535, then we need
+ * to configure a 3 dimension transfer. Use the BCNTRLD
+ * feature to allow for transfers that aren't even multiples
+ * of 65535 (or any other possible b size) by first transferring
+ * the remainder amount then grabbing the next N blocks of
+ * 65535 words.
+ */
+
+ c = dspi->wcount / (SZ_64K - 1); /* N 65535 Blocks */
+ b = dspi->wcount - c * (SZ_64K - 1); /* Remainder */
+ if (b)
+ c++;
else
- buf = (void *)t->tx_buf;
- t->tx_dma = dma_map_single(&spi->dev, buf,
- t->len, DMA_FROM_DEVICE);
- if (!t->tx_dma) {
- ret = -EFAULT;
- goto err_tx_map;
+ b = SZ_64K - 1;
+
+ param.opt = TCINTEN | EDMA_TCC(dma->tx_channel);
+ param.src = t->tx_buf ? t->tx_dma : tx_reg;
+ param.a_b_cnt = b << 16 | data_type;
+ param.dst = tx_reg;
+ param.src_dst_bidx = t->tx_buf ? data_type : 0;
+ param.link_bcntrld = 0xffffffff;
+ param.src_dst_cidx = t->tx_buf ? data_type : 0;
+ param.ccnt = c;
+ edma_write_slot(dma->tx_channel, &param);
+ edma_link(dma->tx_channel, dma->dummy_param_slot);
+
+ /*
+ * Receive DMA setup
+ *
+ * If there is receive buffer, use it to receive data. If there
+ * is none provided, use a temporary receive buffer. Set the
+ * destination B index to 0 so effectively only one byte is used
+ * in the temporary buffer (address does not increment).
+ *
+ * The source of receive data is the receive data register. The
+ * source address never increments.
+ */
+
+ if (t->rx_buf) {
+ rx_buf_count = t->len;
+
+ t->rx_dma = dma_map_single(&spi->dev, t->rx_buf, t->len,
+ DMA_FROM_DEVICE);
+ if (dma_mapping_error(&spi->dev, t->rx_dma)) {
+ dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
+ t->len);
+ if (t->tx_buf)
+ dma_unmap_single(&spi->dev, t->tx_dma, t->len,
+ DMA_TO_DEVICE);
+ return -ENOMEM;
+ }
+
+ param.opt = TCINTEN | EDMA_TCC(dma->rx_channel);
+ param.src = rx_reg;
+ param.a_b_cnt = b << 16 | data_type;
+ param.dst = t->rx_dma;
+ param.src_dst_bidx = data_type << 16;
+ param.link_bcntrld = 0xffffffff;
+ param.src_dst_cidx = data_type << 16;
+ param.ccnt = c;
+ edma_write_slot(dma->rx_channel, &param);
}
- sg_dma_address(&sg_tx) = t->tx_dma;
- sg_dma_len(&sg_tx) = t->len;
-
- rxdesc = dmaengine_prep_slave_sg(dspi->dma_rx,
- &sg_rx, 1, DMA_DEV_TO_MEM,
- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
- if (!rxdesc)
- goto err_desc;
-
- txdesc = dmaengine_prep_slave_sg(dspi->dma_tx,
- &sg_tx, 1, DMA_MEM_TO_DEV,
- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
- if (!txdesc)
- goto err_desc;
-
- rxdesc->callback = davinci_spi_dma_rx_callback;
- rxdesc->callback_param = (void *)dspi;
- txdesc->callback = davinci_spi_dma_tx_callback;
- txdesc->callback_param = (void *)dspi;
if (pdata->cshold_bug)
iowrite16(spidat1 >> 16, dspi->base + SPIDAT1 + 2);
- dmaengine_submit(rxdesc);
- dmaengine_submit(txdesc);
-
- dma_async_issue_pending(dspi->dma_rx);
- dma_async_issue_pending(dspi->dma_tx);
-
+ if (t->rx_buf)
+ edma_start(dma->rx_channel);
+ edma_start(dma->tx_channel);
set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
}
/* Wait for the transfer to complete */
- if (spicfg->io_type != SPI_IO_TYPE_POLL) {
+ if (io_type != SPI_IO_TYPE_POLL) {
wait_for_completion_interruptible(&(dspi->done));
} else {
while (dspi->rcount > 0 || dspi->wcount > 0) {
@@ -660,14 +706,16 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
}
clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL);
- if (spicfg->io_type == SPI_IO_TYPE_DMA) {
- clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
+ if (io_type == SPI_IO_TYPE_DMA) {
- dma_unmap_single(&spi->dev, t->rx_dma,
- t->len, DMA_FROM_DEVICE);
- dma_unmap_single(&spi->dev, t->tx_dma,
- t->len, DMA_TO_DEVICE);
- kfree(dummy_buf);
+ if (t->tx_buf)
+ dma_unmap_single(&spi->dev, t->tx_dma, t->len,
+ DMA_TO_DEVICE);
+ if (t->rx_buf)
+ dma_unmap_single(&spi->dev, t->rx_dma, rx_buf_count,
+ DMA_FROM_DEVICE);
+
+ clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
}
clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
@@ -685,33 +733,11 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
}
if (dspi->rcount != 0 || dspi->wcount != 0) {
- dev_err(&spi->dev, "SPI data transfer error\n");
+ dev_err(sdev, "SPI data transfer error\n");
return -EIO;
}
return t->len;
-
-err_desc:
- dma_unmap_single(&spi->dev, t->tx_dma, t->len, DMA_TO_DEVICE);
-err_tx_map:
- dma_unmap_single(&spi->dev, t->rx_dma, t->len, DMA_FROM_DEVICE);
-err_rx_map:
- kfree(dummy_buf);
-err_alloc_dummy_buf:
- return ret;
-}
-
-/**
- * dummy_thread_fn - dummy thread function
- * @irq: IRQ number for this SPI Master
- * @context_data: structure for SPI Master controller davinci_spi
- *
- * This is to satisfy the request_threaded_irq() API so that the irq
- * handler is called in interrupt context.
- */
-static irqreturn_t dummy_thread_fn(s32 irq, void *data)
-{
- return IRQ_HANDLED;
}
/**
@@ -742,101 +768,43 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *data)
static int davinci_spi_request_dma(struct davinci_spi *dspi)
{
- dma_cap_mask_t mask;
- struct device *sdev = dspi->bitbang.master->dev.parent;
int r;
+ struct davinci_spi_dma *dma = &dspi->dma;
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
-
- dspi->dma_rx = dma_request_channel(mask, edma_filter_fn,
- &dspi->dma_rx_chnum);
- if (!dspi->dma_rx) {
- dev_err(sdev, "request RX DMA channel failed\n");
- r = -ENODEV;
+ r = edma_alloc_channel(dma->rx_channel, davinci_spi_dma_callback, dspi,
+ dma->eventq);
+ if (r < 0) {
+ pr_err("Unable to request DMA channel for SPI RX\n");
+ r = -EAGAIN;
goto rx_dma_failed;
}
- dspi->dma_tx = dma_request_channel(mask, edma_filter_fn,
- &dspi->dma_tx_chnum);
- if (!dspi->dma_tx) {
- dev_err(sdev, "request TX DMA channel failed\n");
- r = -ENODEV;
+ r = edma_alloc_channel(dma->tx_channel, davinci_spi_dma_callback, dspi,
+ dma->eventq);
+ if (r < 0) {
+ pr_err("Unable to request DMA channel for SPI TX\n");
+ r = -EAGAIN;
goto tx_dma_failed;
}
- return 0;
+ r = edma_alloc_slot(EDMA_CTLR(dma->tx_channel), EDMA_SLOT_ANY);
+ if (r < 0) {
+ pr_err("Unable to request SPI TX DMA param slot\n");
+ r = -EAGAIN;
+ goto param_failed;
+ }
+ dma->dummy_param_slot = r;
+ edma_link(dma->dummy_param_slot, dma->dummy_param_slot);
+ return 0;
+param_failed:
+ edma_free_channel(dma->tx_channel);
tx_dma_failed:
- dma_release_channel(dspi->dma_rx);
+ edma_free_channel(dma->rx_channel);
rx_dma_failed:
return r;
}
-#if defined(CONFIG_OF)
-static const struct of_device_id davinci_spi_of_match[] = {
- {
- .compatible = "ti,dm644x-spi",
- },
- {
- .compatible = "ti,da8xx-spi",
- .data = (void *)SPI_VERSION_2,
- },
- { },
-};
-MODULE_DEVICE_TABLE(of, davini_spi_of_match);
-
-/**
- * spi_davinci_get_pdata - Get platform data from DTS binding
- * @pdev: ptr to platform data
- * @dspi: ptr to driver data
- *
- * Parses and populates pdata in dspi from device tree bindings.
- *
- * NOTE: Not all platform data params are supported currently.
- */
-static int spi_davinci_get_pdata(struct platform_device *pdev,
- struct davinci_spi *dspi)
-{
- struct device_node *node = pdev->dev.of_node;
- struct davinci_spi_platform_data *pdata;
- unsigned int num_cs, intr_line = 0;
- const struct of_device_id *match;
-
- pdata = &dspi->pdata;
-
- pdata->version = SPI_VERSION_1;
- match = of_match_device(of_match_ptr(davinci_spi_of_match),
- &pdev->dev);
- if (!match)
- return -ENODEV;
-
- /* match data has the SPI version number for SPI_VERSION_2 */
- if (match->data == (void *)SPI_VERSION_2)
- pdata->version = SPI_VERSION_2;
-
- /*
- * default num_cs is 1 and all chipsel are internal to the chip
- * indicated by chip_sel being NULL. GPIO based CS is not
- * supported yet in DT bindings.
- */
- num_cs = 1;
- of_property_read_u32(node, "num-cs", &num_cs);
- pdata->num_chipselect = num_cs;
- of_property_read_u32(node, "ti,davinci-spi-intr-line", &intr_line);
- pdata->intr_line = intr_line;
- return 0;
-}
-#else
-#define davinci_spi_of_match NULL
-static struct davinci_spi_platform_data
- *spi_davinci_get_pdata(struct platform_device *pdev,
- struct davinci_spi *dspi)
-{
- return -ENODEV;
-}
-#endif
-
/**
* davinci_spi_probe - probe function for SPI Master Controller
* @pdev: platform_device structure which contains plateform specific data
@@ -855,10 +823,16 @@ static int davinci_spi_probe(struct platform_device *pdev)
struct davinci_spi_platform_data *pdata;
struct resource *r, *mem;
resource_size_t dma_rx_chan = SPI_NO_RESOURCE;
- resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
+ resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
int i = 0, ret = 0;
u32 spipc0;
+ pdata = pdev->dev.platform_data;
+ if (pdata == NULL) {
+ ret = -ENODEV;
+ goto err;
+ }
+
master = spi_alloc_master(&pdev->dev, sizeof(struct davinci_spi));
if (master == NULL) {
ret = -ENOMEM;
@@ -873,19 +847,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
goto free_master;
}
- if (pdev->dev.platform_data) {
- pdata = pdev->dev.platform_data;
- dspi->pdata = *pdata;
- } else {
- /* update dspi pdata with that from the DT */
- ret = spi_davinci_get_pdata(pdev, dspi);
- if (ret < 0)
- goto free_master;
- }
-
- /* pdata in dspi is now updated and point pdata to that */
- pdata = &dspi->pdata;
-
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) {
ret = -ENOENT;
@@ -893,6 +854,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
}
dspi->pbase = r->start;
+ dspi->pdata = pdata;
mem = request_mem_region(r->start, resource_size(r), pdev->name);
if (mem == NULL) {
@@ -912,8 +874,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
goto unmap_io;
}
- ret = request_threaded_irq(dspi->irq, davinci_spi_irq, dummy_thread_fn,
- 0, dev_name(&pdev->dev), dspi);
+ ret = request_irq(dspi->irq, davinci_spi_irq, 0, dev_name(&pdev->dev),
+ dspi);
if (ret)
goto unmap_io;
@@ -928,9 +890,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
ret = -ENODEV;
goto put_master;
}
- clk_prepare_enable(dspi->clk);
+ clk_enable(dspi->clk);
- master->dev.of_node = pdev->dev.of_node;
master->bus_num = pdev->id;
master->num_chipselect = pdata->num_chipselect;
master->setup = davinci_spi_setup;
@@ -954,8 +915,9 @@ static int davinci_spi_probe(struct platform_device *pdev)
dspi->bitbang.txrx_bufs = davinci_spi_bufs;
if (dma_rx_chan != SPI_NO_RESOURCE &&
dma_tx_chan != SPI_NO_RESOURCE) {
- dspi->dma_rx_chnum = dma_rx_chan;
- dspi->dma_tx_chnum = dma_tx_chan;
+ dspi->dma.rx_channel = dma_rx_chan;
+ dspi->dma.tx_channel = dma_tx_chan;
+ dspi->dma.eventq = pdata->dma_event_q;
ret = davinci_spi_request_dma(dspi);
if (ret)
@@ -1010,10 +972,11 @@ static int davinci_spi_probe(struct platform_device *pdev)
return ret;
free_dma:
- dma_release_channel(dspi->dma_rx);
- dma_release_channel(dspi->dma_tx);
+ edma_free_channel(dspi->dma.tx_channel);
+ edma_free_channel(dspi->dma.rx_channel);
+ edma_free_slot(dspi->dma.dummy_param_slot);
free_clk:
- clk_disable_unprepare(dspi->clk);
+ clk_disable(dspi->clk);
clk_put(dspi->clk);
put_master:
spi_master_put(master);
@@ -1043,13 +1006,16 @@ static int davinci_spi_remove(struct platform_device *pdev)
struct davinci_spi *dspi;
struct spi_master *master;
struct resource *r;
+ struct davinci_spi_dma *dma;
master = dev_get_drvdata(&pdev->dev);
dspi = spi_master_get_devdata(master);
+ dma = &dspi->dma;
spi_bitbang_stop(&dspi->bitbang);
-
- clk_disable_unprepare(dspi->clk);
+ edma_free_channel(dma->tx_channel);
+ edma_free_channel(dma->rx_channel);
+ clk_disable(dspi->clk);
clk_put(dspi->clk);
spi_master_put(master);
free_irq(dspi->irq, dspi);
@@ -1064,7 +1030,6 @@ static struct platform_driver davinci_spi_driver = {
.driver = {
.name = "spi_davinci",
.owner = THIS_MODULE,
- .of_match_table = davinci_spi_of_match,
},
.probe = davinci_spi_probe,
.remove = davinci_spi_remove,
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 4a6d5c90..db2f1ba0 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -26,7 +26,7 @@ struct dw_spi_mmio {
struct clk *clk;
};
-static int dw_spi_mmio_probe(struct platform_device *pdev)
+static int __devinit dw_spi_mmio_probe(struct platform_device *pdev)
{
struct dw_spi_mmio *dwsmmio;
struct dw_spi *dws;
@@ -106,7 +106,7 @@ err_end:
return ret;
}
-static int dw_spi_mmio_remove(struct platform_device *pdev)
+static int __devexit dw_spi_mmio_remove(struct platform_device *pdev)
{
struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev);
struct resource *mem;
@@ -129,7 +129,7 @@ static int dw_spi_mmio_remove(struct platform_device *pdev)
static struct platform_driver dw_spi_mmio_driver = {
.probe = dw_spi_mmio_probe,
- .remove = dw_spi_mmio_remove,
+ .remove = __devexit_p(dw_spi_mmio_remove),
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index 6055c8d9..ff81abbb 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -32,7 +32,7 @@ struct dw_spi_pci {
struct dw_spi dws;
};
-static int spi_pci_probe(struct pci_dev *pdev,
+static int __devinit spi_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct dw_spi_pci *dwpci;
@@ -105,7 +105,7 @@ err_disable:
return ret;
}
-static void spi_pci_remove(struct pci_dev *pdev)
+static void __devexit spi_pci_remove(struct pci_dev *pdev)
{
struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
@@ -159,7 +159,7 @@ static struct pci_driver dw_spi_driver = {
.name = DRIVER_NAME,
.id_table = pci_ids,
.probe = spi_pci_probe,
- .remove = spi_pci_remove,
+ .remove = __devexit_p(spi_pci_remove),
.suspend = spi_suspend,
.resume = spi_resume,
};
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index c1abc068..d1a495f6 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -696,7 +696,7 @@ static void dw_spi_cleanup(struct spi_device *spi)
kfree(chip);
}
-static int init_queue(struct dw_spi *dws)
+static int __devinit init_queue(struct dw_spi *dws)
{
INIT_LIST_HEAD(&dws->queue);
spin_lock_init(&dws->lock);
@@ -795,7 +795,7 @@ static void spi_hw_init(struct dw_spi *dws)
}
}
-int dw_spi_add_host(struct dw_spi *dws)
+int __devinit dw_spi_add_host(struct dw_spi *dws)
{
struct spi_master *master;
int ret;
@@ -877,7 +877,7 @@ exit:
}
EXPORT_SYMBOL_GPL(dw_spi_add_host);
-void dw_spi_remove_host(struct dw_spi *dws)
+void __devexit dw_spi_remove_host(struct dw_spi *dws)
{
int status = 0;
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c
index d7bac602..af38aa08 100644
--- a/drivers/spi/spi-ep93xx.c
+++ b/drivers/spi/spi-ep93xx.c
@@ -1023,7 +1023,7 @@ static void ep93xx_spi_release_dma(struct ep93xx_spi *espi)
free_page((unsigned long)espi->zeropage);
}
-static int ep93xx_spi_probe(struct platform_device *pdev)
+static int __devinit ep93xx_spi_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct ep93xx_spi_info *info;
@@ -1137,7 +1137,7 @@ fail_release_master:
return error;
}
-static int ep93xx_spi_remove(struct platform_device *pdev)
+static int __devexit ep93xx_spi_remove(struct platform_device *pdev)
{
struct spi_master *master = platform_get_drvdata(pdev);
struct ep93xx_spi *espi = spi_master_get_devdata(master);
@@ -1179,7 +1179,7 @@ static struct platform_driver ep93xx_spi_driver = {
.owner = THIS_MODULE,
},
.probe = ep93xx_spi_probe,
- .remove = ep93xx_spi_remove,
+ .remove = __devexit_p(ep93xx_spi_remove),
};
module_platform_driver(ep93xx_spi_driver);
diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c
index c7a74f0e..230eab8d 100644
--- a/drivers/spi/spi-falcon.c
+++ b/drivers/spi/spi-falcon.c
@@ -403,7 +403,7 @@ static int falcon_sflash_xfer_one(struct spi_master *master,
return 0;
}
-static int falcon_sflash_probe(struct platform_device *pdev)
+static int __devinit falcon_sflash_probe(struct platform_device *pdev)
{
struct falcon_sflash *priv;
struct spi_master *master;
@@ -439,7 +439,7 @@ static int falcon_sflash_probe(struct platform_device *pdev)
return ret;
}
-static int falcon_sflash_remove(struct platform_device *pdev)
+static int __devexit falcon_sflash_remove(struct platform_device *pdev)
{
struct falcon_sflash *priv = platform_get_drvdata(pdev);
@@ -456,7 +456,7 @@ MODULE_DEVICE_TABLE(of, falcon_sflash_match);
static struct platform_driver falcon_sflash_driver = {
.probe = falcon_sflash_probe,
- .remove = falcon_sflash_remove,
+ .remove = __devexit_p(falcon_sflash_remove),
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c
index 24610ca8..27bdc47b 100644
--- a/drivers/spi/spi-fsl-espi.c
+++ b/drivers/spi/spi-fsl-espi.c
@@ -587,7 +587,7 @@ static void fsl_espi_remove(struct mpc8xxx_spi *mspi)
iounmap(mspi->reg_base);
}
-static struct spi_master * fsl_espi_probe(struct device *dev,
+static struct spi_master * __devinit fsl_espi_probe(struct device *dev,
struct resource *mem, unsigned int irq)
{
struct fsl_spi_platform_data *pdata = dev->platform_data;
@@ -686,7 +686,7 @@ static int of_fsl_espi_get_chipselects(struct device *dev)
return 0;
}
-static int of_fsl_espi_probe(struct platform_device *ofdev)
+static int __devinit of_fsl_espi_probe(struct platform_device *ofdev)
{
struct device *dev = &ofdev->dev;
struct device_node *np = ofdev->dev.of_node;
@@ -725,7 +725,7 @@ err:
return ret;
}
-static int of_fsl_espi_remove(struct platform_device *dev)
+static int __devexit of_fsl_espi_remove(struct platform_device *dev)
{
return mpc8xxx_spi_remove(&dev->dev);
}
@@ -743,7 +743,7 @@ static struct platform_driver fsl_espi_driver = {
.of_match_table = of_fsl_espi_match,
},
.probe = of_fsl_espi_probe,
- .remove = of_fsl_espi_remove,
+ .remove = __devexit_p(of_fsl_espi_remove),
};
module_platform_driver(fsl_espi_driver);
diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c
index 8ade675a..1503574b 100644
--- a/drivers/spi/spi-fsl-lib.c
+++ b/drivers/spi/spi-fsl-lib.c
@@ -169,7 +169,7 @@ err:
return ret;
}
-int mpc8xxx_spi_remove(struct device *dev)
+int __devexit mpc8xxx_spi_remove(struct device *dev)
{
struct mpc8xxx_spi *mpc8xxx_spi;
struct spi_master *master;
@@ -189,7 +189,7 @@ int mpc8xxx_spi_remove(struct device *dev)
return 0;
}
-int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
+int __devinit of_mpc8xxx_spi_probe(struct platform_device *ofdev)
{
struct device *dev = &ofdev->dev;
struct device_node *np = ofdev->dev.of_node;
diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
index 086a9eef..8d8cb120 100644
--- a/drivers/spi/spi-fsl-spi.c
+++ b/drivers/spi/spi-fsl-spi.c
@@ -843,7 +843,7 @@ static void fsl_spi_remove(struct mpc8xxx_spi *mspi)
fsl_spi_cpm_free(mspi);
}
-static struct spi_master * fsl_spi_probe(struct device *dev,
+static struct spi_master * __devinit fsl_spi_probe(struct device *dev,
struct resource *mem, unsigned int irq)
{
struct fsl_spi_platform_data *pdata = dev->platform_data;
@@ -1041,7 +1041,7 @@ static int of_fsl_spi_free_chipselects(struct device *dev)
return 0;
}
-static int of_fsl_spi_probe(struct platform_device *ofdev)
+static int __devinit of_fsl_spi_probe(struct platform_device *ofdev)
{
struct device *dev = &ofdev->dev;
struct device_node *np = ofdev->dev.of_node;
@@ -1081,7 +1081,7 @@ err:
return ret;
}
-static int of_fsl_spi_remove(struct platform_device *ofdev)
+static int __devexit of_fsl_spi_remove(struct platform_device *ofdev)
{
int ret;
@@ -1105,7 +1105,7 @@ static struct platform_driver of_fsl_spi_driver = {
.of_match_table = of_fsl_spi_match,
},
.probe = of_fsl_spi_probe,
- .remove = of_fsl_spi_remove,
+ .remove = __devexit_p(of_fsl_spi_remove),
};
#ifdef CONFIG_MPC832x_RDB
@@ -1116,7 +1116,7 @@ static struct platform_driver of_fsl_spi_driver = {
* tree can work with OpenFirmware driver. But for now we support old trees
* as well.
*/
-static int plat_mpc8xxx_spi_probe(struct platform_device *pdev)
+static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev)
{
struct resource *mem;
int irq;
@@ -1139,7 +1139,7 @@ static int plat_mpc8xxx_spi_probe(struct platform_device *pdev)
return 0;
}
-static int plat_mpc8xxx_spi_remove(struct platform_device *pdev)
+static int __devexit plat_mpc8xxx_spi_remove(struct platform_device *pdev)
{
return mpc8xxx_spi_remove(&pdev->dev);
}
@@ -1147,7 +1147,7 @@ static int plat_mpc8xxx_spi_remove(struct platform_device *pdev)
MODULE_ALIAS("platform:mpc8xxx_spi");
static struct platform_driver mpc8xxx_spi_driver = {
.probe = plat_mpc8xxx_spi_probe,
- .remove = plat_mpc8xxx_spi_remove,
+ .remove = __devexit_p(plat_mpc8xxx_spi_remove),
.driver = {
.name = "mpc8xxx_spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c
index 9ddef55a..76bd77a6 100644
--- a/drivers/spi/spi-gpio.c
+++ b/drivers/spi/spi-gpio.c
@@ -287,7 +287,7 @@ static void spi_gpio_cleanup(struct spi_device *spi)
spi_bitbang_cleanup(spi);
}
-static int spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
+static int __devinit spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
{
int value;
@@ -301,8 +301,9 @@ static int spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
return value;
}
-static int spi_gpio_request(struct spi_gpio_platform_data *pdata,
- const char *label, u16 *res_flags)
+static int __devinit
+spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label,
+ u16 *res_flags)
{
int value;
@@ -408,7 +409,7 @@ static inline int spi_gpio_probe_dt(struct platform_device *pdev)
}
#endif
-static int spi_gpio_probe(struct platform_device *pdev)
+static int __devinit spi_gpio_probe(struct platform_device *pdev)
{
int status;
struct spi_master *master;
@@ -501,7 +502,7 @@ gpio_free:
return status;
}
-static int spi_gpio_remove(struct platform_device *pdev)
+static int __devexit spi_gpio_remove(struct platform_device *pdev)
{
struct spi_gpio *spi_gpio;
struct spi_gpio_platform_data *pdata;
@@ -534,7 +535,7 @@ static struct platform_driver spi_gpio_driver = {
.of_match_table = of_match_ptr(spi_gpio_dt_ids),
},
.probe = spi_gpio_probe,
- .remove = spi_gpio_remove,
+ .remove = __devexit_p(spi_gpio_remove),
};
module_platform_driver(spi_gpio_driver);
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 0befeeb5..e3a06899 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -750,7 +750,7 @@ static void spi_imx_cleanup(struct spi_device *spi)
{
}
-static int spi_imx_probe(struct platform_device *pdev)
+static int __devinit spi_imx_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_id =
@@ -906,7 +906,7 @@ out_gpio_free:
return ret;
}
-static int spi_imx_remove(struct platform_device *pdev)
+static int __devexit spi_imx_remove(struct platform_device *pdev)
{
struct spi_master *master = platform_get_drvdata(pdev);
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -942,7 +942,7 @@ static struct platform_driver spi_imx_driver = {
},
.id_table = spi_imx_devtype,
.probe = spi_imx_probe,
- .remove = spi_imx_remove,
+ .remove = __devexit_p(spi_imx_remove),
};
module_platform_driver(spi_imx_driver);
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c
index 3e490ee7..ea19f623 100644
--- a/drivers/spi/spi-mpc512x-psc.c
+++ b/drivers/spi/spi-mpc512x-psc.c
@@ -406,7 +406,7 @@ static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
}
/* bus_num is used only for the case dev->platform_data == NULL */
-static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
+static int __devinit mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
u32 size, unsigned int irq,
s16 bus_num)
{
@@ -493,7 +493,7 @@ free_master:
return ret;
}
-static int mpc512x_psc_spi_do_remove(struct device *dev)
+static int __devexit mpc512x_psc_spi_do_remove(struct device *dev)
{
struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
@@ -509,7 +509,7 @@ static int mpc512x_psc_spi_do_remove(struct device *dev)
return 0;
}
-static int mpc512x_psc_spi_of_probe(struct platform_device *op)
+static int __devinit mpc512x_psc_spi_of_probe(struct platform_device *op)
{
const u32 *regaddr_p;
u64 regaddr64, size64;
@@ -534,7 +534,7 @@ static int mpc512x_psc_spi_of_probe(struct platform_device *op)
irq_of_parse_and_map(op->dev.of_node, 0), id);
}
-static int mpc512x_psc_spi_of_remove(struct platform_device *op)
+static int __devexit mpc512x_psc_spi_of_remove(struct platform_device *op)
{
return mpc512x_psc_spi_do_remove(&op->dev);
}
@@ -548,7 +548,7 @@ MODULE_DEVICE_TABLE(of, mpc512x_psc_spi_of_match);
static struct platform_driver mpc512x_psc_spi_of_driver = {
.probe = mpc512x_psc_spi_of_probe,
- .remove = mpc512x_psc_spi_of_remove,
+ .remove = __devexit_p(mpc512x_psc_spi_of_remove),
.driver = {
.name = "mpc512x-psc-spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-mpc52xx-psc.c b/drivers/spi/spi-mpc52xx-psc.c
index 291120b3..bd47d262 100644
--- a/drivers/spi/spi-mpc52xx-psc.c
+++ b/drivers/spi/spi-mpc52xx-psc.c
@@ -363,7 +363,7 @@ static irqreturn_t mpc52xx_psc_spi_isr(int irq, void *dev_id)
}
/* bus_num is used only for the case dev->platform_data == NULL */
-static int mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
+static int __devinit mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
u32 size, unsigned int irq, s16 bus_num)
{
struct fsl_spi_platform_data *pdata = dev->platform_data;
@@ -450,7 +450,7 @@ free_master:
return ret;
}
-static int mpc52xx_psc_spi_of_probe(struct platform_device *op)
+static int __devinit mpc52xx_psc_spi_of_probe(struct platform_device *op)
{
const u32 *regaddr_p;
u64 regaddr64, size64;
@@ -479,7 +479,7 @@ static int mpc52xx_psc_spi_of_probe(struct platform_device *op)
irq_of_parse_and_map(op->dev.of_node, 0), id);
}
-static int mpc52xx_psc_spi_of_remove(struct platform_device *op)
+static int __devexit mpc52xx_psc_spi_of_remove(struct platform_device *op)
{
struct spi_master *master = spi_master_get(dev_get_drvdata(&op->dev));
struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master);
@@ -505,7 +505,7 @@ MODULE_DEVICE_TABLE(of, mpc52xx_psc_spi_of_match);
static struct platform_driver mpc52xx_psc_spi_of_driver = {
.probe = mpc52xx_psc_spi_of_probe,
- .remove = mpc52xx_psc_spi_of_remove,
+ .remove = __devexit_p(mpc52xx_psc_spi_of_remove),
.driver = {
.name = "mpc52xx-psc-spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c
index 29f77056..04541065 100644
--- a/drivers/spi/spi-mpc52xx.c
+++ b/drivers/spi/spi-mpc52xx.c
@@ -390,7 +390,7 @@ static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
/*
* OF Platform Bus Binding
*/
-static int mpc52xx_spi_probe(struct platform_device *op)
+static int __devinit mpc52xx_spi_probe(struct platform_device *op)
{
struct spi_master *master;
struct mpc52xx_spi *ms;
@@ -527,7 +527,7 @@ static int mpc52xx_spi_probe(struct platform_device *op)
return rc;
}
-static int mpc52xx_spi_remove(struct platform_device *op)
+static int __devexit mpc52xx_spi_remove(struct platform_device *op)
{
struct spi_master *master = spi_master_get(dev_get_drvdata(&op->dev));
struct mpc52xx_spi *ms = spi_master_get_devdata(master);
@@ -547,7 +547,7 @@ static int mpc52xx_spi_remove(struct platform_device *op)
return 0;
}
-static const struct of_device_id mpc52xx_spi_match[] = {
+static const struct of_device_id mpc52xx_spi_match[] __devinitconst = {
{ .compatible = "fsl,mpc5200-spi", },
{}
};
@@ -560,6 +560,6 @@ static struct platform_driver mpc52xx_spi_of_driver = {
.of_match_table = mpc52xx_spi_match,
},
.probe = mpc52xx_spi_probe,
- .remove = mpc52xx_spi_remove,
+ .remove = __devexit_p(mpc52xx_spi_remove),
};
module_platform_driver(mpc52xx_spi_of_driver);
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
index 22a0af01..333b08a0 100644
--- a/drivers/spi/spi-mxs.c
+++ b/drivers/spi/spi-mxs.c
@@ -512,7 +512,7 @@ static const struct of_device_id mxs_spi_dt_ids[] = {
};
MODULE_DEVICE_TABLE(of, mxs_spi_dt_ids);
-static int mxs_spi_probe(struct platform_device *pdev)
+static int __devinit mxs_spi_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id =
of_match_device(mxs_spi_dt_ids, &pdev->dev);
@@ -639,7 +639,7 @@ out_master_free:
return ret;
}
-static int mxs_spi_remove(struct platform_device *pdev)
+static int __devexit mxs_spi_remove(struct platform_device *pdev)
{
struct spi_master *master;
struct mxs_spi *spi;
@@ -662,7 +662,7 @@ static int mxs_spi_remove(struct platform_device *pdev)
static struct platform_driver mxs_spi_driver = {
.probe = mxs_spi_probe,
- .remove = mxs_spi_remove,
+ .remove = __devexit_p(mxs_spi_remove),
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-nuc900.c b/drivers/spi/spi-nuc900.c
index b3f9ec83..a6eca6ff 100644
--- a/drivers/spi/spi-nuc900.c
+++ b/drivers/spi/spi-nuc900.c
@@ -346,7 +346,7 @@ static void nuc900_init_spi(struct nuc900_spi *hw)
nuc900_enable_int(hw);
}
-static int nuc900_spi_probe(struct platform_device *pdev)
+static int __devinit nuc900_spi_probe(struct platform_device *pdev)
{
struct nuc900_spi *hw;
struct spi_master *master;
@@ -453,7 +453,7 @@ err_nomem:
return err;
}
-static int nuc900_spi_remove(struct platform_device *dev)
+static int __devexit nuc900_spi_remove(struct platform_device *dev)
{
struct nuc900_spi *hw = platform_get_drvdata(dev);
@@ -477,7 +477,7 @@ static int nuc900_spi_remove(struct platform_device *dev)
static struct platform_driver nuc900_spi_driver = {
.probe = nuc900_spi_probe,
- .remove = nuc900_spi_remove,
+ .remove = __devexit_p(nuc900_spi_remove),
.driver = {
.name = "nuc900-spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-oc-tiny.c b/drivers/spi/spi-oc-tiny.c
index cb2e284b..13f508ad 100644
--- a/drivers/spi/spi-oc-tiny.c
+++ b/drivers/spi/spi-oc-tiny.c
@@ -243,7 +243,7 @@ static irqreturn_t tiny_spi_irq(int irq, void *dev)
#ifdef CONFIG_OF
#include <linux/of_gpio.h>
-static int tiny_spi_of_probe(struct platform_device *pdev)
+static int __devinit tiny_spi_of_probe(struct platform_device *pdev)
{
struct tiny_spi *hw = platform_get_drvdata(pdev);
struct device_node *np = pdev->dev.of_node;
@@ -277,13 +277,13 @@ static int tiny_spi_of_probe(struct platform_device *pdev)
return 0;
}
#else /* !CONFIG_OF */
-static int tiny_spi_of_probe(struct platform_device *pdev)
+static int __devinit tiny_spi_of_probe(struct platform_device *pdev)
{
return 0;
}
#endif /* CONFIG_OF */
-static int tiny_spi_probe(struct platform_device *pdev)
+static int __devinit tiny_spi_probe(struct platform_device *pdev)
{
struct tiny_spi_platform_data *platp = pdev->dev.platform_data;
struct tiny_spi *hw;
@@ -373,7 +373,7 @@ exit:
return err;
}
-static int tiny_spi_remove(struct platform_device *pdev)
+static int __devexit tiny_spi_remove(struct platform_device *pdev)
{
struct tiny_spi *hw = platform_get_drvdata(pdev);
struct spi_master *master = hw->bitbang.master;
@@ -399,7 +399,7 @@ MODULE_DEVICE_TABLE(of, tiny_spi_match);
static struct platform_driver tiny_spi_driver = {
.probe = tiny_spi_probe,
- .remove = tiny_spi_remove,
+ .remove = __devexit_p(tiny_spi_remove),
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c
index 24daf964..ea8fb2ef 100644
--- a/drivers/spi/spi-octeon.c
+++ b/drivers/spi/spi-octeon.c
@@ -266,7 +266,7 @@ static int octeon_spi_nop_transfer_hardware(struct spi_master *master)
return 0;
}
-static int octeon_spi_probe(struct platform_device *pdev)
+static int __devinit octeon_spi_probe(struct platform_device *pdev)
{
struct resource *res_mem;
@@ -326,7 +326,7 @@ fail:
return err;
}
-static int octeon_spi_remove(struct platform_device *pdev)
+static int __devexit octeon_spi_remove(struct platform_device *pdev)
{
struct octeon_spi *p = platform_get_drvdata(pdev);
u64 register_base = p->register_base;
@@ -352,7 +352,7 @@ static struct platform_driver octeon_spi_driver = {
.of_match_table = octeon_spi_match,
},
.probe = octeon_spi_probe,
- .remove = octeon_spi_remove,
+ .remove = __devexit_p(octeon_spi_remove),
};
module_platform_driver(octeon_spi_driver);
diff --git a/drivers/spi/spi-omap-100k.c b/drivers/spi/spi-omap-100k.c
index 78d29a18..d2c545a4 100644
--- a/drivers/spi/spi-omap-100k.c
+++ b/drivers/spi/spi-omap-100k.c
@@ -486,7 +486,7 @@ static int omap1_spi100k_reset(struct omap1_spi100k *spi100k)
return 0;
}
-static int omap1_spi100k_probe(struct platform_device *pdev)
+static int __devinit omap1_spi100k_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct omap1_spi100k *spi100k;
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 893c3d78..cf88bba1 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -1106,7 +1106,7 @@ static int omap2_mcspi_transfer_one_message(struct spi_master *master,
return 0;
}
-static int omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
+static int __devinit omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
{
struct spi_master *master = mcspi->master;
struct omap2_mcspi_regs *ctx = &mcspi->ctx;
@@ -1159,7 +1159,7 @@ static const struct of_device_id omap_mcspi_of_match[] = {
};
MODULE_DEVICE_TABLE(of, omap_mcspi_of_match);
-static int omap2_mcspi_probe(struct platform_device *pdev)
+static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
{
struct spi_master *master;
const struct omap2_mcspi_platform_config *pdata;
@@ -1295,7 +1295,7 @@ free_master:
return status;
}
-static int omap2_mcspi_remove(struct platform_device *pdev)
+static int __devexit omap2_mcspi_remove(struct platform_device *pdev)
{
struct spi_master *master;
struct omap2_mcspi *mcspi;
@@ -1364,7 +1364,7 @@ static struct platform_driver omap2_mcspi_driver = {
.of_match_table = omap_mcspi_of_match,
},
.probe = omap2_mcspi_probe,
- .remove = omap2_mcspi_remove,
+ .remove = __devexit_p(omap2_mcspi_remove),
};
module_platform_driver(omap2_mcspi_driver);
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c
index 66a5f82c..505be959 100644
--- a/drivers/spi/spi-orion.c
+++ b/drivers/spi/spi-orion.c
@@ -501,7 +501,7 @@ static int orion_spi_remove(struct platform_device *pdev)
MODULE_ALIAS("platform:" DRIVER_NAME);
-static const struct of_device_id orion_spi_of_match_table[] = {
+static const struct of_device_id orion_spi_of_match_table[] __devinitdata = {
{ .compatible = "marvell,orion-spi", },
{}
};
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index b0fe393c..1361868f 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -1089,7 +1089,7 @@ err_alloc_rx_sg:
return -ENOMEM;
}
-static int pl022_dma_probe(struct pl022 *pl022)
+static int __devinit pl022_dma_probe(struct pl022 *pl022)
{
dma_cap_mask_t mask;
@@ -2058,7 +2058,8 @@ pl022_platform_data_dt_get(struct device *dev)
return pd;
}
-static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
+static int __devinit
+pl022_probe(struct amba_device *adev, const struct amba_id *id)
{
struct device *dev = &adev->dev;
struct pl022_ssp_controller *platform_info = adev->dev.platform_data;
@@ -2274,7 +2275,7 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
return status;
}
-static int
+static int __devexit
pl022_remove(struct amba_device *adev)
{
struct pl022 *pl022 = amba_get_drvdata(adev);
@@ -2483,7 +2484,7 @@ static struct amba_driver pl022_driver = {
},
.id_table = pl022_ids,
.probe = pl022_probe,
- .remove = pl022_remove,
+ .remove = __devexit_p(pl022_remove),
};
static int __init pl022_init(void)
diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index 364964d2..378a458d 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -8,7 +8,50 @@
#include <linux/module.h>
#include <linux/spi/pxa2xx_spi.h>
-static int ce4100_spi_probe(struct pci_dev *dev,
+struct ce4100_info {
+ struct ssp_device ssp;
+ struct platform_device *spi_pdev;
+};
+
+static DEFINE_MUTEX(ssp_lock);
+static LIST_HEAD(ssp_list);
+
+struct ssp_device *pxa_ssp_request(int port, const char *label)
+{
+ struct ssp_device *ssp = NULL;
+
+ mutex_lock(&ssp_lock);
+
+ list_for_each_entry(ssp, &ssp_list, node) {
+ if (ssp->port_id == port && ssp->use_count == 0) {
+ ssp->use_count++;
+ ssp->label = label;
+ break;
+ }
+ }
+
+ mutex_unlock(&ssp_lock);
+
+ if (&ssp->node == &ssp_list)
+ return NULL;
+
+ return ssp;
+}
+EXPORT_SYMBOL_GPL(pxa_ssp_request);
+
+void pxa_ssp_free(struct ssp_device *ssp)
+{
+ mutex_lock(&ssp_lock);
+ if (ssp->use_count) {
+ ssp->use_count--;
+ ssp->label = NULL;
+ } else
+ dev_err(&ssp->pdev->dev, "device already free\n");
+ mutex_unlock(&ssp_lock);
+}
+EXPORT_SYMBOL_GPL(pxa_ssp_free);
+
+static int __devinit ce4100_spi_probe(struct pci_dev *dev,
const struct pci_device_id *ent)
{
struct platform_device_info pi;
@@ -55,7 +98,7 @@ static int ce4100_spi_probe(struct pci_dev *dev,
return 0;
}
-static void ce4100_spi_remove(struct pci_dev *dev)
+static void __devexit ce4100_spi_remove(struct pci_dev *dev)
{
struct platform_device *pdev = pci_get_drvdata(dev);
@@ -72,7 +115,7 @@ static struct pci_driver ce4100_spi_driver = {
.name = "ce4100_spi",
.id_table = ce4100_spi_devices,
.probe = ce4100_spi_probe,
- .remove = ce4100_spi_remove,
+ .remove = __devexit_p(ce4100_spi_remove),
};
module_pci_driver(ce4100_spi_driver);
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 81041388..9aea3548 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1033,8 +1033,7 @@ static void cleanup(struct spi_device *spi)
kfree(chip);
}
-#ifdef CONFIG_ACPI
-static int pxa2xx_spi_acpi_add_dma(struct acpi_resource *res, void *data)
+static int __devinit init_queue(struct driver_data *drv_data)
{
struct pxa2xx_spi_master *pdata = data;
@@ -1126,7 +1125,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
}
#endif
-static int pxa2xx_spi_probe(struct platform_device *pdev)
+static int __devinit pxa2xx_spi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct pxa2xx_spi_master *platform_info;
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 902f2fb9..30faf6d4 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -661,7 +661,7 @@ static irqreturn_t rspi_irq(int irq, void *_sr)
return ret;
}
-static int rspi_request_dma(struct rspi_data *rspi,
+static int __devinit rspi_request_dma(struct rspi_data *rspi,
struct platform_device *pdev)
{
struct rspi_plat_data *rspi_pd = pdev->dev.platform_data;
@@ -709,7 +709,7 @@ static int rspi_request_dma(struct rspi_data *rspi,
return 0;
}
-static void rspi_release_dma(struct rspi_data *rspi)
+static void __devexit rspi_release_dma(struct rspi_data *rspi)
{
if (rspi->chan_tx)
dma_release_channel(rspi->chan_tx);
@@ -717,7 +717,7 @@ static void rspi_release_dma(struct rspi_data *rspi)
dma_release_channel(rspi->chan_rx);
}
-static int rspi_remove(struct platform_device *pdev)
+static int __devexit rspi_remove(struct platform_device *pdev)
{
struct rspi_data *rspi = dev_get_drvdata(&pdev->dev);
@@ -731,7 +731,7 @@ static int rspi_remove(struct platform_device *pdev)
return 0;
}
-static int rspi_probe(struct platform_device *pdev)
+static int __devinit rspi_probe(struct platform_device *pdev)
{
struct resource *res;
struct spi_master *master;
@@ -827,7 +827,7 @@ error1:
static struct platform_driver rspi_driver = {
.probe = rspi_probe,
- .remove = rspi_remove,
+ .remove = __devexit_p(rspi_remove),
.driver = {
.name = "rspi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c
index 02d64603..a2a080b7 100644
--- a/drivers/spi/spi-s3c24xx.c
+++ b/drivers/spi/spi-s3c24xx.c
@@ -506,7 +506,7 @@ static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw)
}
}
-static int s3c24xx_spi_probe(struct platform_device *pdev)
+static int __devinit s3c24xx_spi_probe(struct platform_device *pdev)
{
struct s3c2410_spi_info *pdata;
struct s3c24xx_spi *hw;
@@ -663,7 +663,7 @@ static int s3c24xx_spi_probe(struct platform_device *pdev)
return err;
}
-static int s3c24xx_spi_remove(struct platform_device *dev)
+static int __devexit s3c24xx_spi_remove(struct platform_device *dev)
{
struct s3c24xx_spi *hw = platform_get_drvdata(dev);
@@ -722,7 +722,7 @@ static const struct dev_pm_ops s3c24xx_spi_pmops = {
MODULE_ALIAS("platform:s3c2410-spi");
static struct platform_driver s3c24xx_spi_driver = {
.probe = s3c24xx_spi_probe,
- .remove = s3c24xx_spi_remove,
+ .remove = __devexit_p(s3c24xx_spi_remove),
.driver = {
.name = "s3c2410-spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 4188b2fa..c079680a 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1060,6 +1060,49 @@ static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel)
flush_fifo(sdd);
}
+static int __devinit s3c64xx_spi_get_dmares(
+ struct s3c64xx_spi_driver_data *sdd, bool tx)
+{
+ struct platform_device *pdev = sdd->pdev;
+ struct s3c64xx_spi_dma_data *dma_data;
+ struct property *prop;
+ struct resource *res;
+ char prop_name[15], *chan_str;
+
+ if (tx) {
+ dma_data = &sdd->tx_dma;
+ dma_data->direction = DMA_MEM_TO_DEV;
+ chan_str = "tx";
+ } else {
+ dma_data = &sdd->rx_dma;
+ dma_data->direction = DMA_DEV_TO_MEM;
+ chan_str = "rx";
+ }
+
+ if (!sdd->pdev->dev.of_node) {
+ res = platform_get_resource(pdev, IORESOURCE_DMA, tx ? 0 : 1);
+ if (!res) {
+ dev_err(&pdev->dev, "Unable to get SPI-%s dma "
+ "resource\n", chan_str);
+ return -ENXIO;
+ }
+ dma_data->dmach = res->start;
+ return 0;
+ }
+
+ sprintf(prop_name, "%s-dma-channel", chan_str);
+ prop = of_find_property(pdev->dev.of_node, prop_name, NULL);
+ if (!prop) {
+ dev_err(&pdev->dev, "%s dma channel property not specified\n",
+ chan_str);
+ return -ENXIO;
+ }
+
+ dma_data->dmach = DMACH_DT_PROP;
+ dma_data->dma_prop = prop;
+ return 0;
+}
+
#ifdef CONFIG_OF
static int s3c64xx_spi_parse_dt_gpio(struct s3c64xx_spi_driver_data *sdd)
{
@@ -1096,7 +1139,8 @@ static void s3c64xx_spi_dt_gpio_free(struct s3c64xx_spi_driver_data *sdd)
gpio_free(sdd->gpios[idx]);
}
-static struct s3c64xx_spi_info *s3c64xx_spi_parse_dt(struct device *dev)
+static struct __devinit s3c64xx_spi_info * s3c64xx_spi_parse_dt(
+ struct device *dev)
{
struct s3c64xx_spi_info *sci;
u32 temp;
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c
index 60cfae51..8470ea76 100644
--- a/drivers/spi/spi-sh-hspi.c
+++ b/drivers/spi/spi-sh-hspi.c
@@ -268,7 +268,7 @@ static void hspi_cleanup(struct spi_device *spi)
dev_dbg(dev, "%s cleanup\n", spi->modalias);
}
-static int hspi_probe(struct platform_device *pdev)
+static int __devinit hspi_probe(struct platform_device *pdev)
{
struct resource *res;
struct spi_master *master;
@@ -339,7 +339,7 @@ static int hspi_probe(struct platform_device *pdev)
return ret;
}
-static int hspi_remove(struct platform_device *pdev)
+static int __devexit hspi_remove(struct platform_device *pdev)
{
struct hspi_priv *hspi = dev_get_drvdata(&pdev->dev);
@@ -353,7 +353,7 @@ static int hspi_remove(struct platform_device *pdev)
static struct platform_driver hspi_driver = {
.probe = hspi_probe,
- .remove = hspi_remove,
+ .remove = __devexit_p(hspi_remove),
.driver = {
.name = "sh-hspi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c
index 3c3600a9..79442c31 100644
--- a/drivers/spi/spi-sh.c
+++ b/drivers/spi/spi-sh.c
@@ -432,7 +432,7 @@ static irqreturn_t spi_sh_irq(int irq, void *_ss)
return IRQ_HANDLED;
}
-static int spi_sh_remove(struct platform_device *pdev)
+static int __devexit spi_sh_remove(struct platform_device *pdev)
{
struct spi_sh_data *ss = dev_get_drvdata(&pdev->dev);
@@ -444,7 +444,7 @@ static int spi_sh_remove(struct platform_device *pdev)
return 0;
}
-static int spi_sh_probe(struct platform_device *pdev)
+static int __devinit spi_sh_probe(struct platform_device *pdev)
{
struct resource *res;
struct spi_master *master;
@@ -539,7 +539,7 @@ static int spi_sh_probe(struct platform_device *pdev)
static struct platform_driver spi_sh_driver = {
.probe = spi_sh_probe,
- .remove = spi_sh_remove,
+ .remove = __devexit_p(spi_sh_remove),
.driver = {
.name = "sh_spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index f59d4177..257e8c70 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -478,7 +478,7 @@ static int spi_sirfsoc_setup(struct spi_device *spi)
return spi_sirfsoc_setup_transfer(spi, NULL);
}
-static int spi_sirfsoc_probe(struct platform_device *pdev)
+static int __devinit spi_sirfsoc_probe(struct platform_device *pdev)
{
struct sirfsoc_spi *sspi;
struct spi_master *master;
@@ -602,7 +602,7 @@ err_cs:
return ret;
}
-static int spi_sirfsoc_remove(struct platform_device *pdev)
+static int __devexit spi_sirfsoc_remove(struct platform_device *pdev)
{
struct spi_master *master;
struct sirfsoc_spi *sspi;
@@ -672,7 +672,7 @@ static struct platform_driver spi_sirfsoc_driver = {
.of_match_table = spi_sirfsoc_of_match,
},
.probe = spi_sirfsoc_probe,
- .remove = spi_sirfsoc_remove,
+ .remove = __devexit_p(spi_sirfsoc_remove),
};
module_platform_driver(spi_sirfsoc_driver);
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c
index 3d6a12b2..71146c2d 100644
--- a/drivers/spi/spi-tegra20-sflash.c
+++ b/drivers/spi/spi-tegra20-sflash.c
@@ -458,13 +458,13 @@ static struct tegra_spi_platform_data *tegra_sflash_parse_dt(
return pdata;
}
-static struct of_device_id tegra_sflash_of_match[] = {
+static struct of_device_id tegra_sflash_of_match[] __devinitconst = {
{ .compatible = "nvidia,tegra20-sflash", },
{}
};
MODULE_DEVICE_TABLE(of, tegra_sflash_of_match);
-static int tegra_sflash_probe(struct platform_device *pdev)
+static int __devinit tegra_sflash_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct tegra_sflash_data *tsd;
@@ -581,7 +581,7 @@ exit_free_master:
return ret;
}
-static int tegra_sflash_remove(struct platform_device *pdev)
+static int __devexit tegra_sflash_remove(struct platform_device *pdev)
{
struct spi_master *master = dev_get_drvdata(&pdev->dev);
struct tegra_sflash_data *tsd = spi_master_get_devdata(master);
@@ -661,7 +661,7 @@ static struct platform_driver tegra_sflash_driver = {
.of_match_table = of_match_ptr(tegra_sflash_of_match),
},
.probe = tegra_sflash_probe,
- .remove = tegra_sflash_remove,
+ .remove = __devexit_p(tegra_sflash_remove),
};
module_platform_driver(tegra_sflash_driver);
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
index a829563f..e50764e9 100644
--- a/drivers/spi/spi-tegra20-slink.c
+++ b/drivers/spi/spi-tegra20-slink.c
@@ -1098,14 +1098,14 @@ const struct tegra_slink_chip_data tegra20_spi_cdata = {
.cs_hold_time = false,
};
-static struct of_device_id tegra_slink_of_match[] = {
+static struct of_device_id tegra_slink_of_match[] __devinitconst = {
{ .compatible = "nvidia,tegra30-slink", .data = &tegra30_spi_cdata, },
{ .compatible = "nvidia,tegra20-slink", .data = &tegra20_spi_cdata, },
{}
};
MODULE_DEVICE_TABLE(of, tegra_slink_of_match);
-static int tegra_slink_probe(struct platform_device *pdev)
+static int __devinit tegra_slink_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct tegra_slink_data *tspi;
@@ -1247,7 +1247,7 @@ exit_free_master:
return ret;
}
-static int tegra_slink_remove(struct platform_device *pdev)
+static int __devexit tegra_slink_remove(struct platform_device *pdev)
{
struct spi_master *master = dev_get_drvdata(&pdev->dev);
struct tegra_slink_data *tspi = spi_master_get_devdata(master);
@@ -1334,7 +1334,7 @@ static struct platform_driver tegra_slink_driver = {
.of_match_table = of_match_ptr(tegra_slink_of_match),
},
.probe = tegra_slink_probe,
- .remove = tegra_slink_remove,
+ .remove = __devexit_p(tegra_slink_remove),
};
module_platform_driver(tegra_slink_driver);
diff --git a/drivers/spi/spi-ti-ssp.c b/drivers/spi/spi-ti-ssp.c
index 46992cab..3f6f6e81 100644
--- a/drivers/spi/spi-ti-ssp.c
+++ b/drivers/spi/spi-ti-ssp.c
@@ -289,7 +289,7 @@ error_unlock:
return error;
}
-static int ti_ssp_spi_probe(struct platform_device *pdev)
+static int __devinit ti_ssp_spi_probe(struct platform_device *pdev)
{
const struct ti_ssp_spi_data *pdata;
struct ti_ssp_spi *hw;
@@ -357,7 +357,7 @@ error_wq:
return error;
}
-static int ti_ssp_spi_remove(struct platform_device *pdev)
+static int __devexit ti_ssp_spi_remove(struct platform_device *pdev)
{
struct ti_ssp_spi *hw = platform_get_drvdata(pdev);
int error;
@@ -378,7 +378,7 @@ static int ti_ssp_spi_remove(struct platform_device *pdev)
static struct platform_driver ti_ssp_spi_driver = {
.probe = ti_ssp_spi_probe,
- .remove = ti_ssp_spi_remove,
+ .remove = __devexit_p(ti_ssp_spi_remove),
.driver = {
.name = "ti-ssp-spi",
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi-tle62x0.c b/drivers/spi/spi-tle62x0.c
index 6b0874d7..24421024 100644
--- a/drivers/spi/spi-tle62x0.c
+++ b/drivers/spi/spi-tle62x0.c
@@ -240,7 +240,7 @@ static int to_gpio_num(struct device_attribute *attr)
return -1;
}
-static int tle62x0_probe(struct spi_device *spi)
+static int __devinit tle62x0_probe(struct spi_device *spi)
{
struct tle62x0_state *st;
struct tle62x0_pdata *pdata;
@@ -294,7 +294,7 @@ static int tle62x0_probe(struct spi_device *spi)
return ret;
}
-static int tle62x0_remove(struct spi_device *spi)
+static int __devexit tle62x0_remove(struct spi_device *spi)
{
struct tle62x0_state *st = spi_get_drvdata(spi);
int ptr;
@@ -313,7 +313,7 @@ static struct spi_driver tle62x0_driver = {
.owner = THIS_MODULE,
},
.probe = tle62x0_probe,
- .remove = tle62x0_remove,
+ .remove = __devexit_p(tle62x0_remove),
};
module_spi_driver(tle62x0_driver);
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
index f756481b..135f7406 100644
--- a/drivers/spi/spi-topcliff-pch.c
+++ b/drivers/spi/spi-topcliff-pch.c
@@ -1401,7 +1401,7 @@ static void pch_alloc_dma_buf(struct pch_spi_board_data *board_dat,
PCH_BUF_SIZE, &dma->rx_buf_dma, GFP_KERNEL);
}
-static int pch_spi_pd_probe(struct platform_device *plat_dev)
+static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev)
{
int ret;
struct spi_master *master;
@@ -1498,7 +1498,7 @@ err_pci_iomap:
return ret;
}
-static int pch_spi_pd_remove(struct platform_device *plat_dev)
+static int __devexit pch_spi_pd_remove(struct platform_device *plat_dev)
{
struct pch_spi_board_data *board_dat = dev_get_platdata(&plat_dev->dev);
struct pch_spi_data *data = platform_get_drvdata(plat_dev);
@@ -1619,12 +1619,12 @@ static struct platform_driver pch_spi_pd_driver = {
.owner = THIS_MODULE,
},
.probe = pch_spi_pd_probe,
- .remove = pch_spi_pd_remove,
+ .remove = __devexit_p(pch_spi_pd_remove),
.suspend = pch_spi_pd_suspend,
.resume = pch_spi_pd_resume
};
-static int pch_spi_probe(struct pci_dev *pdev,
+static int __devinit pch_spi_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct pch_spi_board_data *board_dat;
@@ -1705,7 +1705,7 @@ err_no_mem:
return retval;
}
-static void pch_spi_remove(struct pci_dev *pdev)
+static void __devexit pch_spi_remove(struct pci_dev *pdev)
{
int i;
struct pch_pd_dev_save *pd_dev_save = pci_get_drvdata(pdev);
@@ -1776,7 +1776,7 @@ static struct pci_driver pch_spi_pcidev_driver = {
.name = "pch_spi",
.id_table = pch_spi_pcidev_id,
.probe = pch_spi_probe,
- .remove = pch_spi_remove,
+ .remove = __devexit_p(pch_spi_remove),
.suspend = pch_spi_suspend,
.resume = pch_spi_resume,
};
diff --git a/drivers/spi/spi-xcomm.c b/drivers/spi/spi-xcomm.c
index 4d3ec8b9..266a847e 100644
--- a/drivers/spi/spi-xcomm.c
+++ b/drivers/spi/spi-xcomm.c
@@ -217,7 +217,7 @@ static int spi_xcomm_setup(struct spi_device *spi)
return 0;
}
-static int spi_xcomm_probe(struct i2c_client *i2c,
+static int __devinit spi_xcomm_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct spi_xcomm *spi_xcomm;
@@ -246,7 +246,7 @@ static int spi_xcomm_probe(struct i2c_client *i2c,
return ret;
}
-static int spi_xcomm_remove(struct i2c_client *i2c)
+static int __devexit spi_xcomm_remove(struct i2c_client *i2c)
{
struct spi_master *master = i2c_get_clientdata(i2c);
@@ -267,7 +267,7 @@ static struct i2c_driver spi_xcomm_driver = {
},
.id_table = spi_xcomm_ids,
.probe = spi_xcomm_probe,
- .remove = spi_xcomm_remove,
+ .remove = __devexit_p(spi_xcomm_remove),
};
module_i2c_driver(spi_xcomm_driver);
diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index e1d76960..4c5a663b 100644
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -462,7 +462,7 @@ void xilinx_spi_deinit(struct spi_master *master)
}
EXPORT_SYMBOL(xilinx_spi_deinit);
-static int xilinx_spi_probe(struct platform_device *dev)
+static int __devinit xilinx_spi_probe(struct platform_device *dev)
{
struct xspi_platform_data *pdata;
struct resource *r;
@@ -518,7 +518,7 @@ static int xilinx_spi_probe(struct platform_device *dev)
return 0;
}
-static int xilinx_spi_remove(struct platform_device *dev)
+static int __devexit xilinx_spi_remove(struct platform_device *dev)
{
xilinx_spi_deinit(platform_get_drvdata(dev));
platform_set_drvdata(dev, 0);
@@ -531,7 +531,7 @@ MODULE_ALIAS("platform:" XILINX_SPI_NAME);
static struct platform_driver xilinx_spi_driver = {
.probe = xilinx_spi_probe,
- .remove = xilinx_spi_remove,
+ .remove = __devexit_p(xilinx_spi_remove),
.driver = {
.name = XILINX_SPI_NAME,
.owner = THIS_MODULE,
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 004b10f1..2d1709a7 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -498,7 +498,8 @@ static void spi_match_master_to_boardinfo(struct spi_master *master,
* The board info passed can safely be __initdata ... but be careful of
* any embedded pointers (platform_data, etc), they're copied as-is.
*/
-int spi_register_board_info(struct spi_board_info const *info, unsigned n)
+int
+spi_register_board_info(struct spi_board_info const *info, unsigned n)
{
struct boardinfo *bi;
int i;
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c
index 7b0bce93..4c0f6d88 100644
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -675,32 +675,3 @@ u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc)
return 0;
}
}
-
-void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)
-{
- u32 pmu_ctl = 0;
-
- switch (cc->dev->bus->chip_id) {
- case 0x4322:
- ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070);
- ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a);
- ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854);
- if (spuravoid == 1)
- ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828);
- else
- ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828);
- pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
- break;
- case 43222:
- /* TODO: BCM43222 requires updating PLLs too */
- return;
- default:
- ssb_printk(KERN_ERR PFX
- "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
- cc->dev->bus->chip_id);
- return;
- }
-
- chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl);
-}
-EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);
diff --git a/drivers/staging/media/davinci_vpfe/dm365_isif.c b/drivers/staging/media/davinci_vpfe/dm365_isif.c
index ebeea72e..5e4407cc 100644
--- a/drivers/staging/media/davinci_vpfe/dm365_isif.c
+++ b/drivers/staging/media/davinci_vpfe/dm365_isif.c
@@ -21,6 +21,7 @@
#include "dm365_isif.h"
#include "vpfe_mc_capture.h"
+#include <linux/delay.h>
#define MAX_WIDTH 4096
#define MAX_HEIGHT 4096
diff --git a/drivers/staging/media/davinci_vpfe/vpfe.h b/drivers/staging/media/davinci_vpfe/vpfe.h
index 0587bc52..8ef1a770 100644
--- a/drivers/staging/media/davinci_vpfe/vpfe.h
+++ b/drivers/staging/media/davinci_vpfe/vpfe.h
@@ -41,6 +41,7 @@ enum vpfe_subdev_id {
VPFE_SUBDEV_MT9T031 = 2,
VPFE_SUBDEV_TVP7002 = 3,
VPFE_SUBDEV_MT9P031 = 4,
+ VPFE_SUBDEV_OV2643 = 5
};
struct vpfe_ext_subdev_info {
diff --git a/drivers/target/target_core_alua.c b/drivers/target/target_core_alua.c
index cbe48ab4..ff1c5ee3 100644
--- a/drivers/target/target_core_alua.c
+++ b/drivers/target/target_core_alua.c
@@ -409,7 +409,6 @@ static inline int core_alua_state_standby(
case REPORT_LUNS:
case RECEIVE_DIAGNOSTIC:
case SEND_DIAGNOSTIC:
- return 0;
case MAINTENANCE_IN:
switch (cdb[1] & 0x1f) {
case MI_REPORT_TARGET_PGS:
@@ -452,7 +451,6 @@ static inline int core_alua_state_unavailable(
switch (cdb[0]) {
case INQUIRY:
case REPORT_LUNS:
- return 0;
case MAINTENANCE_IN:
switch (cdb[1] & 0x1f) {
case MI_REPORT_TARGET_PGS:
@@ -493,7 +491,6 @@ static inline int core_alua_state_transition(
switch (cdb[0]) {
case INQUIRY:
case REPORT_LUNS:
- return 0;
case MAINTENANCE_IN:
switch (cdb[1] & 0x1f) {
case MI_REPORT_TARGET_PGS:
diff --git a/drivers/tty/mxser.c b/drivers/tty/mxser.c
index 302909cc..484b6a3c 100644
--- a/drivers/tty/mxser.c
+++ b/drivers/tty/mxser.c
@@ -2643,9 +2643,9 @@ static int mxser_probe(struct pci_dev *pdev,
mxvar_sdriver, brd->idx + i, &pdev->dev);
if (IS_ERR(tty_dev)) {
retval = PTR_ERR(tty_dev);
- for (; i > 0; i--)
+ for (i--; i >= 0; i--)
tty_unregister_device(mxvar_sdriver,
- brd->idx + i - 1);
+ brd->idx + i);
goto err_relbrd;
}
}
@@ -2751,9 +2751,9 @@ static int __init mxser_module_init(void)
tty_dev = tty_port_register_device(&brd->ports[i].port,
mxvar_sdriver, brd->idx + i, NULL);
if (IS_ERR(tty_dev)) {
- for (; i > 0; i--)
+ for (i--; i >= 0; i--)
tty_unregister_device(mxvar_sdriver,
- brd->idx + i - 1);
+ brd->idx + i);
for (i = 0; i < brd->info->nports; i++)
tty_port_destroy(&brd->ports[i].port);
free_irq(brd->irq, brd);
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 35f9c96a..ebf2d5e1 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -435,7 +435,6 @@ static void io_serial_out(struct uart_port *p, int offset, int value)
}
static int serial8250_default_handle_irq(struct uart_port *port);
-static int exar_handle_irq(struct uart_port *port);
static void set_io_from_upio(struct uart_port *p)
{
@@ -546,19 +545,6 @@ EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
*/
static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
{
- /*
- * Exar UARTs have a SLEEP register that enables or disables
- * each UART to enter sleep mode separately. On the XR17V35x the
- * register is accessible to each UART at the UART_EXAR_SLEEP
- * offset but the UART channel may only write to the corresponding
- * bit.
- */
- if ((p->port.type == PORT_XR17V35X) ||
- (p->port.type == PORT_XR17D15X)) {
- serial_out(p, UART_EXAR_SLEEP, 0xff);
- return;
- }
-
if (p->capabilities & UART_CAP_SLEEP) {
if (p->capabilities & UART_CAP_EFR) {
serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
@@ -866,27 +852,6 @@ static void autoconfig_16550a(struct uart_8250_port *up)
up->port.type = PORT_16550A;
up->capabilities |= UART_CAP_FIFO;
- /*
- * XR17V35x UARTs have an extra divisor register, DLD
- * that gets enabled with when DLAB is set which will
- * cause the device to incorrectly match and assign
- * port type to PORT_16650. The EFR for this UART is
- * found at offset 0x09. Instead check the Deice ID (DVID)
- * register for a 2, 4 or 8 port UART.
- */
- if (up->port.flags & UPF_EXAR_EFR) {
- status1 = serial_in(up, UART_EXAR_DVID);
- if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
- DEBUG_AUTOCONF("Exar XR17V35x ");
- up->port.type = PORT_XR17V35X;
- up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
- UART_CAP_SLEEP;
-
- return;
- }
-
- }
-
/*
* Check for presence of the EFR when DLAB is set.
* Only ST16C650V1 UARTs pass this test.
@@ -1019,12 +984,8 @@ static void autoconfig_16550a(struct uart_8250_port *up)
* Exar uarts have EFR in a weird location
*/
if (up->port.flags & UPF_EXAR_EFR) {
- DEBUG_AUTOCONF("Exar XR17D15x ");
up->port.type = PORT_XR17D15X;
- up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
- UART_CAP_SLEEP;
-
- return;
+ up->capabilities |= UART_CAP_AFE | UART_CAP_EFR;
}
/*
@@ -1296,9 +1257,7 @@ static void serial8250_start_tx(struct uart_port *port)
struct uart_8250_port *up =
container_of(port, struct uart_8250_port, port);
- if (up->dma && !serial8250_tx_dma(up)) {
- return;
- } else if (!(up->ier & UART_IER_THRI)) {
+ if (!(up->ier & UART_IER_THRI)) {
up->ier |= UART_IER_THRI;
serial_port_out(port, UART_IER, up->ier);
@@ -1501,7 +1460,6 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
unsigned long flags;
struct uart_8250_port *up =
container_of(port, struct uart_8250_port, port);
- int dma_err = 0;
if (iir & UART_IIR_NO_INT)
return 0;
@@ -1512,13 +1470,8 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
DEBUG_INTR("status = %x...", status);
- if (status & (UART_LSR_DR | UART_LSR_BI)) {
- if (up->dma)
- dma_err = serial8250_rx_dma(up, iir);
-
- if (!up->dma || dma_err)
- status = serial8250_rx_chars(up, status);
- }
+ if (status & (UART_LSR_DR | UART_LSR_BI))
+ status = serial8250_rx_chars(up, status);
serial8250_modem_status(up);
if (status & UART_LSR_THRE)
serial8250_tx_chars(up);
@@ -1535,31 +1488,6 @@ static int serial8250_default_handle_irq(struct uart_port *port)
return serial8250_handle_irq(port, iir);
}
-/*
- * These Exar UARTs have an extra interrupt indicator that could
- * fire for a few unimplemented interrupts. One of which is a
- * wakeup event when coming out of sleep. Put this here just
- * to be on the safe side that these interrupts don't go unhandled.
- */
-static int exar_handle_irq(struct uart_port *port)
-{
- unsigned char int0, int1, int2, int3;
- unsigned int iir = serial_port_in(port, UART_IIR);
- int ret;
-
- ret = serial8250_handle_irq(port, iir);
-
- if ((port->type == PORT_XR17V35X) ||
- (port->type == PORT_XR17D15X)) {
- int0 = serial_port_in(port, 0x80);
- int1 = serial_port_in(port, 0x81);
- int2 = serial_port_in(port, 0x82);
- int3 = serial_port_in(port, 0x83);
- }
-
- return ret;
-}
-
/*
* This is the serial driver's interrupt routine.
*
@@ -2160,18 +2088,6 @@ dont_test_tx_en:
up->lsr_saved_flags = 0;
up->msr_saved_flags = 0;
- /*
- * Request DMA channels for both RX and TX.
- */
- if (up->dma) {
- retval = serial8250_request_dma(up);
- if (retval) {
- pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
- serial_index(port));
- up->dma = NULL;
- }
- }
-
/*
* Finally, enable interrupts. Note: Modem status interrupts
* are set via set_termios(), which will be occurring imminently
@@ -2205,9 +2121,6 @@ static void serial8250_shutdown(struct uart_port *port)
up->ier = 0;
serial_port_out(port, UART_IER, 0);
- if (up->dma)
- serial8250_release_dma(up);
-
spin_lock_irqsave(&port->lock, flags);
if (port->flags & UPF_FOURPORT) {
/* reset interrupts on the AST Fourport board */
@@ -2412,14 +2325,16 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
serial_port_out(port, UART_EFR, efr);
}
+#ifdef CONFIG_ARCH_OMAP1
/* Workaround to enable 115200 baud on OMAP1510 internal ports */
- if (is_omap1510_8250(up)) {
+ if (cpu_is_omap1510() && is_omap_port(up)) {
if (baud == 115200) {
quot = 1;
serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
} else
serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
}
+#endif
/*
* For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
@@ -2500,9 +2415,10 @@ static unsigned int serial8250_port_size(struct uart_8250_port *pt)
{
if (pt->port.iotype == UPIO_AU)
return 0x1000;
- if (is_omap1_8250(pt))
+#ifdef CONFIG_ARCH_OMAP1
+ if (is_omap_port(pt))
return 0x16 << pt->port.regshift;
-
+#endif
return 8 << pt->port.regshift;
}
@@ -2677,11 +2593,6 @@ static void serial8250_config_port(struct uart_port *port, int flags)
serial8250_release_rsa_resource(up);
if (port->type == PORT_UNKNOWN)
serial8250_release_std_resource(up);
-
- /* Fixme: probably not the best place for this */
- if ((port->type == PORT_XR17V35X) ||
- (port->type == PORT_XR17D15X))
- port->handle_irq = exar_handle_irq;
}
static int
@@ -3272,8 +3183,6 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
uart->dl_read = up->dl_read;
if (up->dl_write)
uart->dl_write = up->dl_write;
- if (up->dma)
- uart->dma = up->dma;
if (serial8250_isa_config != NULL)
serial8250_isa_config(0, &uart->port,
diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c
index b9f7fd28..d1af1d1f 100644
--- a/drivers/tty/serial/8250/8250_dma.c
+++ b/drivers/tty/serial/8250/8250_dma.c
@@ -183,7 +183,7 @@ int serial8250_request_dma(struct uart_8250_port *p)
UART_XMIT_SIZE,
DMA_TO_DEVICE);
- dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
+ //dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
return 0;
}
@@ -211,6 +211,6 @@ void serial8250_release_dma(struct uart_8250_port *p)
dma->txchan = NULL;
dma->tx_running = 0;
- dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
+ //dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
}
EXPORT_SYMBOL_GPL(serial8250_release_dma);
diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c
index 35d9ab95..b3455a97 100644
--- a/drivers/tty/serial/8250/8250_pnp.c
+++ b/drivers/tty/serial/8250/8250_pnp.c
@@ -429,6 +429,7 @@ serial_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
{
struct uart_8250_port uart;
int ret, line, flags = dev_id->driver_data;
+ struct resource *res = NULL;
if (flags & UNKNOWN_DEV) {
ret = serial_pnp_guess_board(dev);
@@ -439,11 +440,12 @@ serial_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
memset(&uart, 0, sizeof(uart));
if (pnp_irq_valid(dev, 0))
uart.port.irq = pnp_irq(dev, 0);
- if ((flags & CIR_PORT) && pnp_port_valid(dev, 2)) {
- uart.port.iobase = pnp_port_start(dev, 2);
- uart.port.iotype = UPIO_PORT;
- } else if (pnp_port_valid(dev, 0)) {
- uart.port.iobase = pnp_port_start(dev, 0);
+ if ((flags & CIR_PORT) && pnp_port_valid(dev, 2))
+ res = pnp_get_resource(dev, IORESOURCE_IO, 2);
+ else if (pnp_port_valid(dev, 0))
+ res = pnp_get_resource(dev, IORESOURCE_IO, 0);
+ if (pnp_resource_enabled(res)) {
+ uart.port.iobase = res->start;
uart.port.iotype = UPIO_PORT;
} else if (pnp_mem_valid(dev, 0)) {
uart.port.mapbase = pnp_mem_start(dev, 0);
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 30d4f7a7..4dc41408 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -886,17 +886,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
/* FIFO ENABLE, DMA MODE */
- up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
- /*
- * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK
- * sets Enables the granularity of 1 for TRIGGER RX
- * level. Along with setting RX FIFO trigger level
- * to 1 (as noted below, 16 characters) and TLR[3:0]
- * to zero this will result RX FIFO threshold level
- * to 1 character, instead of 16 as noted in comment
- * below.
- */
-
/* Set receive FIFO threshold to 16 characters and
* transmit FIFO threshold to 16 spaces
*/
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index b0452688..05400acb 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -941,14 +941,6 @@ void start_tty(struct tty_struct *tty)
EXPORT_SYMBOL(start_tty);
-static void tty_update_time(struct timespec *time)
-{
- unsigned long sec = get_seconds();
- sec -= sec % 60;
- if ((long)(sec - time->tv_sec) > 0)
- time->tv_sec = sec;
-}
-
/**
* tty_read - read method for tty device files
* @file: pointer to tty file
@@ -968,11 +960,10 @@ static ssize_t tty_read(struct file *file, char __user *buf, size_t count,
loff_t *ppos)
{
int i;
- struct inode *inode = file_inode(file);
struct tty_struct *tty = file_tty(file);
struct tty_ldisc *ld;
- if (tty_paranoia_check(tty, inode, "tty_read"))
+ if (tty_paranoia_check(tty, file_inode(file), "tty_read"))
return -EIO;
if (!tty || (test_bit(TTY_IO_ERROR, &tty->flags)))
return -EIO;
@@ -986,9 +977,6 @@ static ssize_t tty_read(struct file *file, char __user *buf, size_t count,
i = -EIO;
tty_ldisc_deref(ld);
- if (i > 0)
- tty_update_time(&inode->i_atime);
-
return i;
}
@@ -1089,10 +1077,8 @@ static inline ssize_t do_tty_write(
break;
cond_resched();
}
- if (written) {
- tty_update_time(&file_inode(file)->i_mtime);
+ if (written)
ret = written;
- }
out:
tty_write_unlock(tty);
return ret;
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 05e51432..01c34d88 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -34,6 +34,8 @@ choice
config USB_MUSB_DAVINCI
tristate "DaVinci"
depends on ARCH_DAVINCI_DMx
+config USB_MUSB_SOC
+ default y
config USB_MUSB_DA8XX
tristate "DA8xx/OMAP-L1x"
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index e040d910..de9786df 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -69,10 +69,19 @@ static inline void phy_on(void)
{
u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
- /* power everything up; start the on-chip PHY and its PLL */
- phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
- phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
- __raw_writel(phy_ctrl, USB_PHY_CTRL);
+ if (cpu_is_davinci_dm365())
+ /*
+ * DM365 PHYCLKFREQ field [15:12] is set to 2
+ * to get clock from 24MHz crystal
+ */
+ __raw_writel(USBPHY_SESNDEN | USBPHY_VBDTCTEN |
+ USBPHY_CLKFREQ_24MHZ, USB_PHY_CTRL);
+ else {
+ /* power everything up; start the on-chip PHY and its PLL */
+ phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
+ phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
+ __raw_writel(phy_ctrl, USB_PHY_CTRL);
+ }
/* wait for PLL to lock before proceeding */
while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
@@ -190,6 +199,7 @@ static void davinci_musb_source_power(struct musb *musb, int is_on, int immediat
if (immediate)
vbus_state = is_on;
#endif
+ if (cpu_is_davinci_dm365()) gpio_set_value(66, is_on);
}
static void davinci_musb_set_vbus(struct musb *musb, int is_on)
diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h
index 371baa0e..971be4a7 100644
--- a/drivers/usb/musb/davinci.h
+++ b/drivers/usb/musb/davinci.h
@@ -16,6 +16,7 @@
/* Integrated highspeed/otg PHY */
#define USBPHY_CTL_PADDR 0x01c40034
+#define USBPHY_CLKFREQ_24MHZ BIT(13)
#define USBPHY_DATAPOL BIT(11) /* (dm355) switch D+/D- */
#define USBPHY_PHYCLKGD BIT(8)
#define USBPHY_SESNDEN BIT(7) /* v(sess_end) comparator */
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 7abc5c81..8189cb6a 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -346,7 +346,6 @@ static long vfio_pci_ioctl(void *device_data,
if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
size_t size;
- int max = vfio_pci_get_irq_count(vdev, hdr.index);
if (hdr.flags & VFIO_IRQ_SET_DATA_BOOL)
size = sizeof(uint8_t);
@@ -356,7 +355,7 @@ static long vfio_pci_ioctl(void *device_data,
return -EINVAL;
if (hdr.argsz - minsz < hdr.count * size ||
- hdr.start >= max || hdr.start + hdr.count > max)
+ hdr.count > vfio_pci_get_irq_count(vdev, hdr.index))
return -EINVAL;
data = memdup_user((void __user *)(arg + minsz),
diff --git a/drivers/vhost/tcm_vhost.c b/drivers/vhost/tcm_vhost.c
index 957a0b98..2968b493 100644
--- a/drivers/vhost/tcm_vhost.c
+++ b/drivers/vhost/tcm_vhost.c
@@ -74,8 +74,9 @@ enum {
struct vhost_scsi {
/* Protected by vhost_scsi->dev.mutex */
- struct tcm_vhost_tpg **vs_tpg;
+ struct tcm_vhost_tpg *vs_tpg[VHOST_SCSI_MAX_TARGET];
char vs_vhost_wwpn[TRANSPORT_IQN_LEN];
+ bool vs_endpoint;
struct vhost_dev dev;
struct vhost_virtqueue vqs[VHOST_SCSI_MAX_VQ];
@@ -578,27 +579,9 @@ static void tcm_vhost_submission_work(struct work_struct *work)
}
}
-static void vhost_scsi_send_bad_target(struct vhost_scsi *vs,
- struct vhost_virtqueue *vq, int head, unsigned out)
-{
- struct virtio_scsi_cmd_resp __user *resp;
- struct virtio_scsi_cmd_resp rsp;
- int ret;
-
- memset(&rsp, 0, sizeof(rsp));
- rsp.response = VIRTIO_SCSI_S_BAD_TARGET;
- resp = vq->iov[out].iov_base;
- ret = __copy_to_user(resp, &rsp, sizeof(rsp));
- if (!ret)
- vhost_add_used_and_signal(&vs->dev, vq, head, 0);
- else
- pr_err("Faulted on virtio_scsi_cmd_resp\n");
-}
-
static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
struct vhost_virtqueue *vq)
{
- struct tcm_vhost_tpg **vs_tpg;
struct virtio_scsi_cmd_req v_req;
struct tcm_vhost_tpg *tv_tpg;
struct tcm_vhost_cmd *tv_cmd;
@@ -607,16 +590,8 @@ static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
int head, ret;
u8 target;
- /*
- * We can handle the vq only after the endpoint is setup by calling the
- * VHOST_SCSI_SET_ENDPOINT ioctl.
- *
- * TODO: Check that we are running from vhost_worker which acts
- * as read-side critical section for vhost kind of RCU.
- * See the comments in struct vhost_virtqueue in drivers/vhost/vhost.h
- */
- vs_tpg = rcu_dereference_check(vq->private_data, 1);
- if (!vs_tpg)
+ /* Must use ioctl VHOST_SCSI_SET_ENDPOINT */
+ if (unlikely(!vs->vs_endpoint))
return;
mutex_lock(&vq->mutex);
@@ -686,11 +661,23 @@ static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
/* Extract the tpgt */
target = v_req.lun[1];
- tv_tpg = ACCESS_ONCE(vs_tpg[target]);
+ tv_tpg = vs->vs_tpg[target];
/* Target does not exist, fail the request */
if (unlikely(!tv_tpg)) {
- vhost_scsi_send_bad_target(vs, vq, head, out);
+ struct virtio_scsi_cmd_resp __user *resp;
+ struct virtio_scsi_cmd_resp rsp;
+
+ memset(&rsp, 0, sizeof(rsp));
+ rsp.response = VIRTIO_SCSI_S_BAD_TARGET;
+ resp = vq->iov[out].iov_base;
+ ret = __copy_to_user(resp, &rsp, sizeof(rsp));
+ if (!ret)
+ vhost_add_used_and_signal(&vs->dev,
+ vq, head, 0);
+ else
+ pr_err("Faulted on virtio_scsi_cmd_resp\n");
+
continue;
}
@@ -703,13 +690,22 @@ static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
if (IS_ERR(tv_cmd)) {
vq_err(vq, "vhost_scsi_allocate_cmd failed %ld\n",
PTR_ERR(tv_cmd));
- goto err_cmd;
+ break;
}
pr_debug("Allocated tv_cmd: %p exp_data_len: %d, data_direction"
": %d\n", tv_cmd, exp_data_len, data_direction);
tv_cmd->tvc_vhost = vs;
tv_cmd->tvc_vq = vq;
+
+ if (unlikely(vq->iov[out].iov_len !=
+ sizeof(struct virtio_scsi_cmd_resp))) {
+ vq_err(vq, "Expecting virtio_scsi_cmd_resp, got %zu"
+ " bytes, out: %d, in: %d\n",
+ vq->iov[out].iov_len, out, in);
+ break;
+ }
+
tv_cmd->tvc_resp = vq->iov[out].iov_base;
/*
@@ -729,7 +725,7 @@ static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
" exceeds SCSI_MAX_VARLEN_CDB_SIZE: %d\n",
scsi_command_size(tv_cmd->tvc_cdb),
TCM_VHOST_MAX_CDB_SIZE);
- goto err_free;
+ break; /* TODO */
}
tv_cmd->tvc_lun = ((v_req.lun[2] << 8) | v_req.lun[3]) & 0x3FFF;
@@ -742,7 +738,7 @@ static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
data_direction == DMA_TO_DEVICE);
if (unlikely(ret)) {
vq_err(vq, "Failed to map iov to sgl\n");
- goto err_free;
+ break; /* TODO */
}
}
@@ -763,13 +759,6 @@ static void vhost_scsi_handle_vq(struct vhost_scsi *vs,
}
mutex_unlock(&vq->mutex);
- return;
-
-err_free:
- vhost_scsi_free_cmd(tv_cmd);
-err_cmd:
- vhost_scsi_send_bad_target(vs, vq, head, out);
- mutex_unlock(&vq->mutex);
}
static void vhost_scsi_ctl_handle_kick(struct vhost_work *work)
@@ -791,20 +780,6 @@ static void vhost_scsi_handle_kick(struct vhost_work *work)
vhost_scsi_handle_vq(vs, vq);
}
-static void vhost_scsi_flush_vq(struct vhost_scsi *vs, int index)
-{
- vhost_poll_flush(&vs->dev.vqs[index].poll);
-}
-
-static void vhost_scsi_flush(struct vhost_scsi *vs)
-{
- int i;
-
- for (i = 0; i < VHOST_SCSI_MAX_VQ; i++)
- vhost_scsi_flush_vq(vs, i);
- vhost_work_flush(&vs->dev, &vs->vs_completion_work);
-}
-
/*
* Called from vhost_scsi_ioctl() context to walk the list of available
* tcm_vhost_tpg with an active struct tcm_vhost_nexus
@@ -815,10 +790,8 @@ static int vhost_scsi_set_endpoint(
{
struct tcm_vhost_tport *tv_tport;
struct tcm_vhost_tpg *tv_tpg;
- struct tcm_vhost_tpg **vs_tpg;
- struct vhost_virtqueue *vq;
- int index, ret, i, len;
bool match = false;
+ int index, ret;
mutex_lock(&vs->dev.mutex);
/* Verify that ring has been setup correctly. */
@@ -830,15 +803,6 @@ static int vhost_scsi_set_endpoint(
}
}
- len = sizeof(vs_tpg[0]) * VHOST_SCSI_MAX_TARGET;
- vs_tpg = kzalloc(len, GFP_KERNEL);
- if (!vs_tpg) {
- mutex_unlock(&vs->dev.mutex);
- return -ENOMEM;
- }
- if (vs->vs_tpg)
- memcpy(vs_tpg, vs->vs_tpg, len);
-
mutex_lock(&tcm_vhost_mutex);
list_for_each_entry(tv_tpg, &tcm_vhost_list, tv_tpg_list) {
mutex_lock(&tv_tpg->tv_tpg_mutex);
@@ -853,15 +817,14 @@ static int vhost_scsi_set_endpoint(
tv_tport = tv_tpg->tport;
if (!strcmp(tv_tport->tport_name, t->vhost_wwpn)) {
- if (vs->vs_tpg && vs->vs_tpg[tv_tpg->tport_tpgt]) {
+ if (vs->vs_tpg[tv_tpg->tport_tpgt]) {
mutex_unlock(&tv_tpg->tv_tpg_mutex);
mutex_unlock(&tcm_vhost_mutex);
mutex_unlock(&vs->dev.mutex);
- kfree(vs_tpg);
return -EEXIST;
}
tv_tpg->tv_tpg_vhost_count++;
- vs_tpg[tv_tpg->tport_tpgt] = tv_tpg;
+ vs->vs_tpg[tv_tpg->tport_tpgt] = tv_tpg;
smp_mb__after_atomic_inc();
match = true;
}
@@ -872,27 +835,12 @@ static int vhost_scsi_set_endpoint(
if (match) {
memcpy(vs->vs_vhost_wwpn, t->vhost_wwpn,
sizeof(vs->vs_vhost_wwpn));
- for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {
- vq = &vs->vqs[i];
- /* Flushing the vhost_work acts as synchronize_rcu */
- mutex_lock(&vq->mutex);
- rcu_assign_pointer(vq->private_data, vs_tpg);
- vhost_init_used(vq);
- mutex_unlock(&vq->mutex);
- }
+ vs->vs_endpoint = true;
ret = 0;
} else {
ret = -EEXIST;
}
- /*
- * Act as synchronize_rcu to make sure access to
- * old vs->vs_tpg is finished.
- */
- vhost_scsi_flush(vs);
- kfree(vs->vs_tpg);
- vs->vs_tpg = vs_tpg;
-
mutex_unlock(&vs->dev.mutex);
return ret;
}
@@ -903,8 +851,6 @@ static int vhost_scsi_clear_endpoint(
{
struct tcm_vhost_tport *tv_tport;
struct tcm_vhost_tpg *tv_tpg;
- struct vhost_virtqueue *vq;
- bool match = false;
int index, ret, i;
u8 target;
@@ -916,14 +862,9 @@ static int vhost_scsi_clear_endpoint(
goto err_dev;
}
}
-
- if (!vs->vs_tpg) {
- mutex_unlock(&vs->dev.mutex);
- return 0;
- }
-
for (i = 0; i < VHOST_SCSI_MAX_TARGET; i++) {
target = i;
+
tv_tpg = vs->vs_tpg[target];
if (!tv_tpg)
continue;
@@ -945,27 +886,10 @@ static int vhost_scsi_clear_endpoint(
}
tv_tpg->tv_tpg_vhost_count--;
vs->vs_tpg[target] = NULL;
- match = true;
+ vs->vs_endpoint = false;
mutex_unlock(&tv_tpg->tv_tpg_mutex);
}
- if (match) {
- for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {
- vq = &vs->vqs[i];
- /* Flushing the vhost_work acts as synchronize_rcu */
- mutex_lock(&vq->mutex);
- rcu_assign_pointer(vq->private_data, NULL);
- mutex_unlock(&vq->mutex);
- }
- }
- /*
- * Act as synchronize_rcu to make sure access to
- * old vs->vs_tpg is finished.
- */
- vhost_scsi_flush(vs);
- kfree(vs->vs_tpg);
- vs->vs_tpg = NULL;
mutex_unlock(&vs->dev.mutex);
-
return 0;
err_tpg:
@@ -975,24 +899,6 @@ err_dev:
return ret;
}
-static int vhost_scsi_set_features(struct vhost_scsi *vs, u64 features)
-{
- if (features & ~VHOST_SCSI_FEATURES)
- return -EOPNOTSUPP;
-
- mutex_lock(&vs->dev.mutex);
- if ((features & (1 << VHOST_F_LOG_ALL)) &&
- !vhost_log_access_ok(&vs->dev)) {
- mutex_unlock(&vs->dev.mutex);
- return -EFAULT;
- }
- vs->dev.acked_features = features;
- smp_wmb();
- vhost_scsi_flush(vs);
- mutex_unlock(&vs->dev.mutex);
- return 0;
-}
-
static int vhost_scsi_open(struct inode *inode, struct file *f)
{
struct vhost_scsi *s;
@@ -1033,6 +939,38 @@ static int vhost_scsi_release(struct inode *inode, struct file *f)
return 0;
}
+static void vhost_scsi_flush_vq(struct vhost_scsi *vs, int index)
+{
+ vhost_poll_flush(&vs->dev.vqs[index].poll);
+}
+
+static void vhost_scsi_flush(struct vhost_scsi *vs)
+{
+ int i;
+
+ for (i = 0; i < VHOST_SCSI_MAX_VQ; i++)
+ vhost_scsi_flush_vq(vs, i);
+ vhost_work_flush(&vs->dev, &vs->vs_completion_work);
+}
+
+static int vhost_scsi_set_features(struct vhost_scsi *vs, u64 features)
+{
+ if (features & ~VHOST_SCSI_FEATURES)
+ return -EOPNOTSUPP;
+
+ mutex_lock(&vs->dev.mutex);
+ if ((features & (1 << VHOST_F_LOG_ALL)) &&
+ !vhost_log_access_ok(&vs->dev)) {
+ mutex_unlock(&vs->dev.mutex);
+ return -EFAULT;
+ }
+ vs->dev.acked_features = features;
+ smp_wmb();
+ vhost_scsi_flush(vs);
+ mutex_unlock(&vs->dev.mutex);
+ return 0;
+}
+
static long vhost_scsi_ioctl(struct file *f, unsigned int ioctl,
unsigned long arg)
{
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 4c1546f7..94074e41 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2174,6 +2174,21 @@ config FB_IBM_GXT4500
found on some IBM System P (pSeries) machines. This driver
doesn't use Geometry Engine GT1000.
+config FB_DAVINCI
+ bool "Davinci Framebuffer support"
+ depends on FB && ARCH_DAVINCI
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+ help
+ This is the frame buffer device driver for the DaVinci video
+ hardware found on the TI DaVinci EVM. If
+ unsure, say N.
+
+config FB_VIRTUAL
+ tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
+ depends on FB
+
config FB_PS3
tristate "PS3 GPU framebuffer driver"
depends on FB && PS3_PS3AV
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 9df38733..fe739d1a 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -165,6 +165,7 @@ obj-$(CONFIG_FB_MX3) += mx3fb.o
obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
obj-$(CONFIG_FB_MXS) += mxsfb.o
obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o
+obj-$(CONFIG_FB_DAVINCI) += davincifb.o
# the test framebuffer is last
obj-$(CONFIG_FB_VIRTUAL) += vfb.o
diff --git a/drivers/video/davincifb.c b/drivers/video/davincifb.c
new file mode 100644
index 00000000..f63aa1cb
--- /dev/null
+++ b/drivers/video/davincifb.c
@@ -0,0 +1,2479 @@
+/*
+ * Copyright (C) 2007 MontaVista Software Inc.
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * Andy Lowe (alowe@mvista.com), MontaVista Software
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/tty.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/dma-mapping.h>
+#include <asm/uaccess.h>
+#include <linux/moduleparam.h> /* for module_param() */
+#include <linux/platform_device.h>
+#include <asm/system.h>
+#include <video/davinci_vpbe.h>
+#include <video/davinci_osd.h>
+#include <media/davinci/vid_encoder_types.h>
+#include <media/davinci/davinci_enc.h>
+#include <video/davincifb.h>
+#include <video/davincifb_ioctl.h>
+#include <mach/cputype.h>
+
+struct davincifb_state {
+ bool invert_field;
+};
+
+static struct davincifb_state fb_state;
+static struct davincifb_state *fb = &fb_state;
+
+static struct davincifb_platform_data davincifb_pdata_default = {
+ .invert_field = false,
+};
+
+/* return non-zero if the info structure corresponds to OSD0 or OSD1 */
+static int is_osd_win(const struct fb_info *info)
+{
+ const struct vpbe_dm_win_info *win = info->par;
+
+ if (win->layer == WIN_OSD0 || win->layer == WIN_OSD1)
+ return 1;
+ else
+ return 0;
+}
+
+/* return non-zero if the info structure corresponds to VID0 or VID1 */
+#define is_vid_win(info) (!is_osd_win(info))
+
+/*
+ * Convert a framebuffer info pointer to a davinci_osd_layer enumeration.
+ * It is up to the caller to verify that the info structure corresponds to
+ * either OSD0 or OSD1.
+ */
+static enum davinci_osd_layer fb_info_to_osd_enum(const struct fb_info *info)
+{
+ const struct vpbe_dm_win_info *win = info->par;
+
+ if (win->layer == WIN_OSD1)
+ return OSDWIN_OSD1;
+ else
+ return OSDWIN_OSD0;
+}
+
+/* macros for testing fb_var_screeninfo attributes */
+#define is_attribute_mode(var) (((var)->bits_per_pixel == 4) && \
+ ((var)->nonstd != 0))
+#define is_yuv(var) ((((var)->bits_per_pixel == 16) || \
+ ((var)->bits_per_pixel == 8)) \
+ && ((var)->nonstd != 0))
+#define is_window_interlaced(var) (((var)->vmode & FB_VMODE_INTERLACED) \
+ == FB_VMODE_INTERLACED)
+
+/* macros for testing fb_videomode attributes */
+#define is_display_interlaced(mode) (((mode)->vmode & FB_VMODE_INTERLACED) \
+ == FB_VMODE_INTERLACED)
+
+/*
+ * Convert an fb_var_screeninfo struct to a Davinci display layer configuration.
+ * lconfig->xpos, lconfig->ypos, and lconfig->line_length are not modified
+ * because no information about them is contained in var.
+ * The value of the yc_pixfmt argument is returned in lconfig->pixfmt if a
+ * the var specifies a YC pixel format. The value of yc_pixfmt must be either
+ * PIXFMT_YCbCrI or PIXFMT_YCrCbI.
+ */
+static void convert_fb_var_to_osd(const struct fb_var_screeninfo *var,
+ struct davinci_layer_config *lconfig,
+ enum davinci_pix_format yc_pixfmt)
+{
+ lconfig->xsize = var->xres;
+ lconfig->ysize = var->yres;
+ lconfig->interlaced = is_window_interlaced(var);
+
+ switch (var->bits_per_pixel) {
+ case 1:
+ lconfig->pixfmt = PIXFMT_1BPP;
+ break;
+ case 2:
+ lconfig->pixfmt = PIXFMT_2BPP;
+ break;
+ case 4:
+ if (is_attribute_mode(var))
+ lconfig->pixfmt = PIXFMT_OSD_ATTR;
+ else
+ lconfig->pixfmt = PIXFMT_4BPP;
+ break;
+ case 8:
+ if (is_yuv(var))
+ lconfig->pixfmt = PIXFMT_NV12;
+ else
+ lconfig->pixfmt = PIXFMT_8BPP;
+ break;
+ case 16:
+ default:
+ if (is_yuv(var))
+ lconfig->pixfmt = yc_pixfmt;
+ else
+ lconfig->pixfmt = PIXFMT_RGB565;
+ break;
+ case 24:
+ case 32:
+ lconfig->pixfmt = PIXFMT_RGB888;
+ break;
+ }
+}
+
+/*
+ * Convert an fb_info struct to a Davinci display layer configuration.
+ */
+static void convert_fb_info_to_osd(const struct fb_info *info,
+ struct davinci_layer_config *lconfig)
+{
+ const struct vpbe_dm_win_info *win = info->par;
+
+ lconfig->line_length = info->fix.line_length;
+ lconfig->xpos = win->xpos;
+ lconfig->ypos = win->ypos;
+ convert_fb_var_to_osd(&info->var, lconfig, win->dm->yc_pixfmt);
+}
+
+/*
+ * Convert a Davinci display layer configuration to var info.
+ * The following members of var are not modified:
+ * var->xres_virtual
+ * var->yres_virtual
+ * var->xoffset
+ * var->yoffset
+ * var->pixclock
+ * var->left_margin
+ * var->right_margin
+ * var->upper_margin
+ * var->lower_margin
+ * var->hsync_len
+ * var->vsync_len
+ * var->sync
+ * Only bit 0 of var->vmode (FB_VMODE_INTERLACED) is modified. All other bits
+ * of var->vmode are retained.
+ */
+static void convert_osd_to_fb_var(const struct davinci_layer_config *lconfig,
+ struct fb_var_screeninfo *var)
+{
+ var->xres = lconfig->xsize;
+ var->yres = lconfig->ysize;
+ if (lconfig->interlaced)
+ var->vmode |= FB_VMODE_INTERLACED;
+ else
+ var->vmode &= ~FB_VMODE_INTERLACED;
+
+ var->red.offset = var->green.offset = var->blue.offset = 0;
+ var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
+ var->transp.offset = var->transp.length = var->transp.msb_right = 0;
+ var->nonstd = 0;
+
+ switch (lconfig->pixfmt) {
+ case PIXFMT_1BPP:
+ var->bits_per_pixel = 1;
+ var->red.length = var->green.length = var->blue.length =
+ var->bits_per_pixel;
+ break;
+ case PIXFMT_2BPP:
+ var->bits_per_pixel = 2;
+ var->red.length = var->green.length = var->blue.length =
+ var->bits_per_pixel;
+ break;
+ case PIXFMT_4BPP:
+ var->bits_per_pixel = 4;
+ var->red.length = var->green.length = var->blue.length =
+ var->bits_per_pixel;
+ break;
+ case PIXFMT_8BPP:
+ var->bits_per_pixel = 8;
+ var->red.length = var->green.length = var->blue.length =
+ var->bits_per_pixel;
+ break;
+ case PIXFMT_RGB565:
+ var->bits_per_pixel = 16;
+ var->red.offset = 11;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 6;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ break;
+ case PIXFMT_YCbCrI:
+ case PIXFMT_YCrCbI:
+ var->bits_per_pixel = 16;
+ var->red.length = var->green.length = var->blue.length = 0;
+ var->nonstd = 1;
+ break;
+ case PIXFMT_NV12:
+ if (cpu_is_davinci_dm365()) {
+ var->bits_per_pixel = 8;
+ var->red.length = var->green.length = var->blue.length =
+ 0;
+ var->nonstd = 1;
+ }
+ case PIXFMT_RGB888:
+ if (cpu_is_davinci_dm644x()) {
+ var->bits_per_pixel = 24;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 16;
+ var->blue.length = 8;
+ } else {
+ var->bits_per_pixel = 32;
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.offset = 24;
+ var->transp.length = 3;
+ }
+ break;
+ case PIXFMT_OSD_ATTR:
+ var->bits_per_pixel = 4;
+ var->red.length = var->green.length = var->blue.length = 0;
+ var->nonstd = 1;
+ break;
+ }
+
+ var->grayscale = 0;
+ var->activate = FB_ACTIVATE_NOW;
+ var->height = 0;
+ var->width = 0;
+ var->accel_flags = 0;
+ var->rotate = 0;
+}
+
+/*
+ * Get the video mode from the encoder manager.
+ */
+static int get_video_mode(struct fb_videomode *mode)
+{
+ struct vid_enc_mode_info mode_info;
+ int ret;
+
+ memset(&mode_info, 0, sizeof(mode_info));
+ memset(mode, 0, sizeof(*mode));
+
+ ret = davinci_enc_get_mode(0, &mode_info);
+
+ mode->name = mode_info.name;
+ if (mode_info.fps.denominator) {
+ unsigned fps_1000; /* frames per 1000 seconds */
+ unsigned lps; /* lines per second */
+ unsigned pps; /* pixels per second */
+ unsigned vtotal; /* total lines per frame */
+ unsigned htotal; /* total pixels per line */
+ unsigned interlace = (mode_info.interlaced) ? 2 : 1;
+
+ fps_1000 =
+ (1000 * mode_info.fps.numerator +
+ mode_info.fps.denominator / 2) / mode_info.fps.denominator;
+ mode->refresh = (interlace * fps_1000 + 1000 / 2) / 1000;
+
+ vtotal =
+ mode_info.yres + mode_info.lower_margin +
+ mode_info.vsync_len + mode_info.upper_margin;
+ lps = (fps_1000 * vtotal + 1000 / 2) / 1000;
+
+ htotal =
+ mode_info.xres + mode_info.right_margin +
+ mode_info.hsync_len + mode_info.left_margin;
+ pps = lps * htotal;
+
+ if (pps)
+ mode->pixclock =
+ ((1000000000UL + pps / 2) / pps) * 1000;
+ }
+ mode->xres = mode_info.xres;
+ mode->yres = mode_info.yres;
+ mode->left_margin = mode_info.left_margin;
+ mode->right_margin = mode_info.right_margin;
+ mode->upper_margin = mode_info.upper_margin;
+ mode->lower_margin = mode_info.lower_margin;
+ mode->hsync_len = mode_info.hsync_len;
+ mode->vsync_len = mode_info.vsync_len;
+ if (mode_info.flags & (1 << 0))
+ mode->sync |= FB_SYNC_HOR_HIGH_ACT;
+ if (mode_info.flags & (1 << 1))
+ mode->sync |= FB_SYNC_VERT_HIGH_ACT;
+ if (mode_info.std)
+ mode->sync |= FB_SYNC_BROADCAST;
+ if (mode_info.interlaced)
+ mode->vmode |= FB_VMODE_INTERLACED;
+
+ return ret;
+}
+
+/*
+ * Set a video mode with the encoder manager.
+ */
+static int set_video_mode(struct fb_videomode *mode)
+{
+ struct vid_enc_mode_info mode_info;
+ int ret;
+
+ davinci_enc_get_mode(0, &mode_info);
+
+ mode_info.name = (unsigned char *)mode->name;
+ mode_info.fps.numerator = 0;
+ mode_info.fps.denominator = 0;
+ if (mode->pixclock && mode->xres && mode->yres) {
+ unsigned fps_1000; /* frames per 1000 seconds */
+ unsigned lps; /* lines per second */
+ unsigned pps; /* pixels per second */
+ unsigned vtotal; /* total lines per frame */
+ unsigned htotal; /* total pixels per line */
+
+ pps =
+ ((1000000000UL +
+ mode->pixclock / 2) / mode->pixclock) * 1000;
+
+ htotal =
+ mode->xres + mode->right_margin + mode->hsync_len +
+ mode->left_margin;
+ lps = (pps + htotal / 2) / htotal;
+
+ vtotal =
+ mode->yres + mode->lower_margin + mode->vsync_len +
+ mode->upper_margin;
+ fps_1000 = (lps * 1000 + vtotal / 2) / vtotal;
+
+ mode_info.fps.numerator = fps_1000;
+ mode_info.fps.denominator = 1000;
+
+ /*
+ * 1000 == 2*2*2*5*5*5, so factor out any common multiples of 2
+ * or 5
+ */
+ while ((((mode_info.fps.numerator / 2) * 2) ==
+ mode_info.fps.numerator)
+ && (((mode_info.fps.denominator / 2) * 2) ==
+ mode_info.fps.denominator)) {
+ mode_info.fps.numerator = mode_info.fps.numerator / 2;
+ mode_info.fps.denominator =
+ mode_info.fps.denominator / 2;
+ }
+ while ((((mode_info.fps.numerator / 5) * 5) ==
+ mode_info.fps.numerator)
+ && (((mode_info.fps.denominator / 5) * 5) ==
+ mode_info.fps.denominator)) {
+ mode_info.fps.numerator = mode_info.fps.numerator / 5;
+ mode_info.fps.denominator =
+ mode_info.fps.denominator / 5;
+ }
+ }
+ mode_info.xres = mode->xres;
+ mode_info.yres = mode->yres;
+ mode_info.left_margin = mode->left_margin;
+ mode_info.right_margin = mode->right_margin;
+ mode_info.upper_margin = mode->upper_margin;
+ mode_info.lower_margin = mode->lower_margin;
+ mode_info.hsync_len = mode->hsync_len;
+ mode_info.vsync_len = mode->vsync_len;
+ if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
+ mode_info.flags |= (1 << 0);
+ else
+ mode_info.flags &= ~(1 << 0);
+ if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
+ mode_info.flags |= (1 << 1);
+ else
+ mode_info.flags &= ~(1 << 1);
+ if (mode->sync & FB_SYNC_BROADCAST)
+ mode_info.std = 1;
+ else
+ mode_info.std = 0;
+ if (mode->vmode & FB_VMODE_INTERLACED)
+ mode_info.interlaced = 1;
+ else
+ mode_info.interlaced = 0;
+
+ ret = davinci_enc_set_mode(0, &mode_info);
+
+ return ret;
+}
+
+/*
+ * Construct an fb_var_screeninfo structure from an fb_videomode structure
+ * describing the display and a davinci_layer_config structure describing a window.
+ * The following members of var not modified:
+ * var->xoffset
+ * var->yoffset
+ * var->xres_virtual
+ * var->yres_virtual
+ * The following members of var are loaded with values derived from mode:
+ * var->pixclock
+ * var->left_margin
+ * var->hsync_len
+ * var->vsync_len
+ * var->right_margin
+ * var->upper_margin
+ * var->lower_margin
+ * var->sync
+ * var->vmode (all bits except bit 0: FB_VMODE_INTERLACED)
+ * The following members of var are loaded with values derived from lconfig:
+ * var->xres
+ * var->yres
+ * var->bits_per_pixel
+ * var->red
+ * var->green
+ * var->blue
+ * var->transp
+ * var->nonstd
+ * var->grayscale
+ * var->activate
+ * var->height
+ * var->width
+ * var->accel_flags
+ * var->rotate
+ * var->vmode (only bit 0: FB_VMODE_INTERLACED)
+ *
+ * If the display resolution (xres and yres) specified in mode matches the
+ * window resolution specified in lconfig, then the display timing info returned
+ * in var is valid and var->pixclock will be the value derived from mode.
+ * If the display resolution does not match the window resolution, then
+ * var->pixclock will be set to 0 to indicate that the display timing info
+ * returned in var is not valid.
+ *
+ * mode and lconfig are not modified.
+ */
+static void construct_fb_var(struct fb_var_screeninfo *var,
+ struct fb_videomode *mode,
+ struct davinci_layer_config *lconfig)
+{
+ fb_videomode_to_var(var, mode);
+ convert_osd_to_fb_var(lconfig, var);
+ if (lconfig->xsize != mode->xres || lconfig->ysize != mode->yres)
+ var->pixclock = 0;
+}
+
+/*
+ * Update the values in an fb_fix_screeninfo structure based on the values in an
+ * fb_var_screeninfo structure.
+ * The following members of fix are updated:
+ * fix->visual
+ * fix->xpanstep
+ * fix->ypanstep
+ * fix->ywrapstep
+ * fix->line_length
+ * All other members of fix are unmodified.
+ */
+static void update_fix_info(const struct fb_var_screeninfo *var,
+ struct fb_fix_screeninfo *fix)
+{
+ fix->visual =
+ (var->bits_per_pixel >
+ 8) ? FB_VISUAL_TRUECOLOR : FB_VISUAL_PSEUDOCOLOR;
+ /*
+ * xpanstep must correspond to a multiple of the 32-byte cache line size
+ */
+ switch (var->bits_per_pixel) {
+ case 1:
+ case 2:
+ case 4:
+ case 8:
+ case 12:
+ case 16:
+ case 32:
+ fix->xpanstep = (8 * 32) / var->bits_per_pixel;
+ break;
+ case 24:
+ fix->xpanstep = 32; /* 32 pixels = 3 cache lines */
+ break;
+ default:
+ fix->xpanstep = 0;
+ break;
+ }
+ fix->ypanstep = 1;
+ fix->ywrapstep = 0;
+ fix->line_length = (var->xres_virtual * var->bits_per_pixel + 7) / 8;
+ /* line_length must be a multiple of the 32-byte cache line size */
+ fix->line_length = ((fix->line_length + 31) / 32) * 32;
+}
+
+/*
+ * Determine if the window configuration specified by var will fit in a
+ * framebuffer of size fb_size.
+ * Returns 1 if the window will fit in the framebuffer, or 0 otherwise.
+ */
+static int window_will_fit_framebuffer(const struct fb_var_screeninfo *var,
+ unsigned fb_size)
+{
+ unsigned line_length;
+
+ line_length = (var->bits_per_pixel * var->xres_virtual + 7) / 8;
+ /* line length must be a multiple of the cache line size (32) */
+ line_length = ((line_length + 31) / 32) * 32;
+
+ if (var->yres_virtual * line_length <= fb_size)
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * FBIO_WAITFORVSYNC handler
+ */
+static int davincifb_wait_for_vsync(struct fb_info *info)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ wait_queue_t wq;
+ unsigned long cnt;
+ int ret;
+
+ init_waitqueue_entry(&wq, current);
+
+ cnt = win->dm->vsync_cnt;
+ ret = wait_event_interruptible_timeout(win->dm->vsync_wait,
+ cnt != win->dm->vsync_cnt,
+ win->dm->timeout);
+ if (ret < 0)
+ return ret;
+ if (ret == 0)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static void davincifb_vsync_callback(unsigned event, void *arg)
+{
+ struct vpbe_dm_info *dm = (struct vpbe_dm_info *)arg;
+ unsigned long addr = 0;
+ static unsigned last_event;
+
+ event &= ~DAVINCI_DISP_END_OF_FRAME;
+ if (event == last_event) {
+ /* progressive */
+ xchg(&addr, dm->win[WIN_OSD0].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_OSD0].layer,
+ dm->win[WIN_OSD0].
+ sdram_address,
+ NULL);
+ dm->win[WIN_OSD0].sdram_address = 0;
+ }
+ addr = 0;
+ xchg(&addr, dm->win[WIN_OSD1].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_OSD1].layer,
+ dm->win[WIN_OSD1].
+ sdram_address,
+ NULL);
+ dm->win[WIN_OSD1].sdram_address = 0;
+ }
+ addr = 0;
+ xchg(&addr, dm->win[WIN_VID0].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_VID0].layer,
+ dm->win[WIN_VID0].
+ sdram_address,
+ NULL);
+ dm->win[WIN_VID0].sdram_address = 0;
+ }
+ addr = 0;
+ xchg(&addr, dm->win[WIN_VID1].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_VID1].layer,
+ dm->win[WIN_VID1].
+ sdram_address,
+ NULL);
+ dm->win[WIN_VID1].sdram_address = 0;
+ }
+ ++dm->vsync_cnt;
+ wake_up_interruptible(&dm->vsync_wait);
+ } else {
+ /* interlaced */
+ if (event & DAVINCI_DISP_SECOND_FIELD) {
+ xchg(&addr, dm->win[WIN_OSD0].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_OSD0].
+ layer,
+ dm->win[WIN_OSD0].
+ sdram_address,
+ NULL);
+ dm->win[WIN_OSD0].sdram_address = 0;
+ }
+ addr = 0;
+ xchg(&addr, dm->win[WIN_OSD1].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_OSD1].
+ layer,
+ dm->win[WIN_OSD1].
+ sdram_address,
+ NULL);
+ dm->win[WIN_OSD1].sdram_address = 0;
+ }
+ addr = 0;
+ xchg(&addr, dm->win[WIN_VID0].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_VID0].
+ layer,
+ dm->win[WIN_VID0].
+ sdram_address,
+ NULL);
+ dm->win[WIN_VID0].sdram_address = 0;
+ }
+ addr = 0;
+ xchg(&addr, dm->win[WIN_VID1].sdram_address);
+ if (addr) {
+ davinci_disp_start_layer(dm->win[WIN_VID1].
+ layer,
+ dm->win[WIN_VID1].
+ sdram_address,
+ NULL);
+ dm->win[WIN_VID1].sdram_address = 0;
+ }
+ } else {
+ ++dm->vsync_cnt;
+ wake_up_interruptible(&dm->vsync_wait);
+ }
+ }
+ last_event = event;
+}
+
+/*
+ * FBIO_SETATTRIBUTE handler
+ *
+ * This ioctl is deprecated. The user can write the attribute values directly
+ * to the OSD1 framebuffer.
+ *
+ * Set a uniform attribute value over a rectangular area on the attribute
+ * window. The attribute value (0 to 15) is passed through the fb_fillrect's
+ * color parameter. r->dx and r->width must both be even. If not, they are
+ * rounded down.
+ */
+static int vpbe_set_attr_blend(struct fb_info *info, struct fb_fillrect *r)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_var_screeninfo *var = &info->var;
+ char __iomem *start;
+ u8 blend;
+ u32 width_bytes;
+
+ if (win->layer != WIN_OSD1)
+ return -EINVAL;
+
+ if (!is_attribute_mode(var))
+ return -EINVAL;
+
+ if (r->dx + r->width > var->xres_virtual)
+ return -EINVAL;
+ if (r->dy + r->height > var->yres_virtual)
+ return -EINVAL;
+ if (r->color > 15)
+ return -EINVAL;
+
+ width_bytes = (r->width * var->bits_per_pixel) / 8;
+ start =
+ info->screen_base + r->dy * info->fix.line_length +
+ (r->dx * var->bits_per_pixel) / 8;
+
+ blend = (((u8) r->color & 0xf) << 4) | ((u8) r->color);
+ while (r->height--) {
+ memset(start, blend, width_bytes);
+ start += info->fix.line_length;
+ }
+
+ return 0;
+}
+
+/*
+ * FBIO_SETPOSX handler
+ */
+static int vpbe_setposx(struct fb_info *info, unsigned xpos)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_var_screeninfo *var = &info->var;
+ struct fb_var_screeninfo v;
+ unsigned old_xpos = win->xpos;
+ int retval;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ memcpy(&v, var, sizeof(v));
+ win->xpos = xpos;
+ retval = info->fbops->fb_check_var(&v, info);
+ if (retval) {
+ win->xpos = old_xpos;
+ return retval;
+ }
+
+ /* update the window position */
+ memcpy(var, &v, sizeof(v));
+ retval = info->fbops->fb_set_par(info);
+
+ return retval;
+}
+
+/*
+ * FBIO_SETPOSY handler
+ */
+static int vpbe_setposy(struct fb_info *info, unsigned ypos)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_var_screeninfo *var = &info->var;
+ struct fb_var_screeninfo v;
+ unsigned old_ypos = win->ypos;
+ int retval;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ memcpy(&v, var, sizeof(v));
+ win->ypos = ypos;
+ retval = info->fbops->fb_check_var(&v, info);
+ if (retval) {
+ win->ypos = old_ypos;
+ return retval;
+ }
+
+ /* update the window position */
+ memcpy(var, &v, sizeof(v));
+ retval = info->fbops->fb_set_par(info);
+
+ return retval;
+}
+
+/*
+ * FBIO_SETZOOM handler
+ */
+static int vpbe_set_zoom(struct fb_info *info, struct zoom_params *zoom)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ enum davinci_zoom_factor h_zoom, v_zoom;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ switch (zoom->zoom_h) {
+ case 0:
+ h_zoom = ZOOM_X1;
+ break;
+ case 1:
+ h_zoom = ZOOM_X2;
+ break;
+ case 2:
+ h_zoom = ZOOM_X4;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ switch (zoom->zoom_v) {
+ case 0:
+ v_zoom = ZOOM_X1;
+ break;
+ case 1:
+ v_zoom = ZOOM_X2;
+ break;
+ case 2:
+ v_zoom = ZOOM_X4;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ davinci_disp_set_zoom(win->layer, h_zoom, v_zoom);
+
+ return 0;
+}
+
+/*
+ * FBIO_ENABLE_DISABLE_WIN handler
+ *
+ * This ioctl is deprecated. Use the standard FBIOBLANK ioctl instead.
+ */
+static int vpbe_enable_disable_win(struct fb_info *info, int enable)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ int retval = 0;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ if (enable) {
+ win->display_window = 1;
+ retval = info->fbops->fb_check_var(&info->var, info);
+ if (retval)
+ return retval;
+ retval = info->fbops->fb_set_par(info);
+ } else {
+ win->display_window = 0;
+ davinci_disp_disable_layer(win->layer);
+ }
+
+ return retval;
+}
+
+/*
+ * FBIO_SET_BITMAP_BLEND_FACTOR handler
+ */
+static int vpbe_bitmap_set_blend_factor(struct fb_info *info, struct vpbe_bitmap_blend_params
+ *blend_para)
+{
+ enum davinci_osd_layer osdwin = fb_info_to_osd_enum(info);
+
+ if (!is_osd_win(info))
+ return -EINVAL;
+
+ if (blend_para->bf > OSD_8_VID_0)
+ return -EINVAL;
+
+ davinci_disp_set_blending_factor(osdwin, blend_para->bf);
+ if (blend_para->enable_colorkeying)
+ davinci_disp_enable_color_key(osdwin, blend_para->colorkey);
+ else
+ davinci_disp_disable_color_key(osdwin);
+
+ return 0;
+}
+
+/*
+ * FBIO_SET_BITMAP_WIN_RAM_CLUT handler
+ *
+ * This ioctl is deprecated. Use the standard framebuffer ioctl FBIOPUTCMAP
+ * instead. Note that FBIOPUTCMAP colors are expressed in RGB space instead of
+ * YCbCr space.
+ */
+static int vpbe_bitmap_set_ram_clut(struct fb_info *info,
+ unsigned char ram_clut[256][3])
+{
+ int i;
+
+ if (!is_osd_win(info))
+ return -EINVAL;
+
+ for (i = 0; i < 256; i++) {
+ davinci_disp_set_clut_ycbcr(i, ram_clut[i][0], ram_clut[i][1],
+ ram_clut[i][2]);
+ }
+ return 0;
+}
+
+/*
+ * FBIO_ENABLE_DISABLE_ATTRIBUTE_WIN handler
+ *
+ * This ioctl is deprecated. Attribute mode can be enabled via the standard
+ * framebuffer ioctl FBIOPUT_VSCREENINFO by setting var->bits_per_pixel to 4
+ * and var->nonstd to a non-zero value. Attribute mode can be disabled by using
+ * FBIOPUT_VSCREENINFO to set a standard pixel format.
+ *
+ * The enabled/disabled status of OSD1 is unchanged by this ioctl. To avoid
+ * display glitches, you should disable OSD1 prior to calling this ioctl.
+ *
+ * When enabling attribute mode, var->bits_per_pixel is set to 4. var->xres,
+ * var->yres, var->xres_virtual, var->yres_virtual, win->xpos, and win->ypos are
+ * all copied from OSD0. var->xoffset and var->yoffset are set to 0.
+ * fix->line_length is updated to be consistent with 4 bits per pixel. No
+ * changes are made to the OSD1 configuration if OSD1 is already in attribute
+ * mode.
+ *
+ * When disabling attribute mode, the window geometry is unchanged.
+ * var->bits_per_pixel remains set to 4. No changes are made to the OSD1
+ * configuration if OSD1 is not in attribute mode.
+ */
+static int vpbe_enable_disable_attribute_window(struct fb_info *info, u32 flag)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_var_screeninfo *var = &info->var;
+ struct fb_var_screeninfo v;
+ struct davinci_layer_config lconfig;
+ int retval;
+
+ if (win->layer != WIN_OSD1)
+ return -EINVAL;
+
+ /* return with no error if there is nothing to do */
+ if ((is_attribute_mode(var) && flag)
+ || (!is_attribute_mode(var) && !flag))
+ return 0;
+
+ /* start with the current OSD1 var */
+ memcpy(&v, var, sizeof(v));
+
+ if (flag) { /* enable attribute mode */
+ const struct vpbe_dm_win_info *osd0 = &win->dm->win[WIN_OSD0];
+ const struct fb_var_screeninfo *osd0_var = &osd0->info->var;
+ unsigned old_xpos = win->xpos;
+ unsigned old_ypos = win->ypos;
+ /* get the OSD0 window configuration */
+ convert_fb_var_to_osd(osd0_var, &lconfig, win->dm->yc_pixfmt);
+ /* change the pixfmt to attribute mode */
+ lconfig.pixfmt = PIXFMT_OSD_ATTR;
+ /* update the var for OSD1 */
+ convert_osd_to_fb_var(&lconfig, &v);
+ /* copy xres_virtual and yres_virtual from OSD0 */
+ v.xres_virtual = osd0_var->xres_virtual;
+ v.yres_virtual = osd0_var->yres_virtual;
+ /* zero xoffset and yoffset */
+ v.xoffset = 0;
+ v.yoffset = 0;
+ /* copy xpos and ypos from OSD0 */
+ win->xpos = osd0->xpos;
+ win->ypos = osd0->ypos;
+
+ retval = info->fbops->fb_check_var(&v, info);
+ if (retval) {
+ win->xpos = old_xpos;
+ win->ypos = old_ypos;
+ return retval;
+ }
+
+ /*
+ * Enable attribute mode by replacing info->var and calling
+ * the fb_set_par method to activate it.
+ */
+ memcpy(var, &v, sizeof(v));
+ retval = info->fbops->fb_set_par(info);
+ } else { /* disable attribute mode */
+ /* get the current OSD1 window configuration */
+ convert_fb_var_to_osd(var, &lconfig, win->dm->yc_pixfmt);
+ /* change the pixfmt to 4-bits-per-pixel bitmap */
+ lconfig.pixfmt = PIXFMT_4BPP;
+ /* update the var for OSD1 */
+ convert_osd_to_fb_var(&lconfig, &v);
+
+ retval = info->fbops->fb_check_var(&v, info);
+ if (retval)
+ return retval;
+
+ /*
+ * Disable attribute mode by replacing info->var and calling
+ * the fb_set_par method to activate it.
+ */
+ memcpy(var, &v, sizeof(v));
+ retval = info->fbops->fb_set_par(info);
+ }
+
+ return retval;
+}
+
+/*
+ * FBIO_GET_BLINK_INTERVAL handler
+ */
+static int vpbe_get_blinking(struct fb_info *info,
+ struct vpbe_blink_option *blink_option)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ enum davinci_blink_interval blink;
+ int enabled;
+
+ if (win->layer != WIN_OSD1)
+ return -EINVAL;
+
+ davinci_disp_get_blink_attribute(&enabled, &blink);
+ blink_option->blinking = enabled;
+ blink_option->interval = blink;
+
+ return 0;
+}
+
+/*
+ * FBIO_SET_BLINK_INTERVAL handler
+ */
+static int vpbe_set_blinking(struct fb_info *info,
+ struct vpbe_blink_option *blink_option)
+{
+ struct vpbe_dm_win_info *win = info->par;
+
+ if (win->layer != WIN_OSD1)
+ return -EINVAL;
+
+ if (blink_option->interval > BLINK_X4)
+ return -EINVAL;
+
+ davinci_disp_set_blink_attribute(blink_option->blinking,
+ blink_option->interval);
+
+ return 0;
+}
+
+/*
+ * FBIO_GET_VIDEO_CONFIG_PARAMS handler
+ *
+ * Despite the name, this ioctl can be used on both video windows and OSD
+ * (bitmap) windows.
+ */
+static int vpbe_get_vid_params(struct fb_info *info,
+ struct vpbe_video_config_params *vid_conf_params)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ enum davinci_h_exp_ratio h_exp;
+ enum davinci_v_exp_ratio v_exp;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ if (is_vid_win(info))
+ davinci_disp_get_vid_expansion(&h_exp, &v_exp);
+ else
+ davinci_disp_get_osd_expansion(&h_exp, &v_exp);
+
+ vid_conf_params->cb_cr_order =
+ (win->dm->yc_pixfmt == PIXFMT_YCbCrI) ? 0 : 1;
+ vid_conf_params->exp_info.horizontal = h_exp;
+ vid_conf_params->exp_info.vertical = v_exp;
+
+ return 0;
+}
+
+/*
+ * FBIO_SET_VIDEO_CONFIG_PARAMS handler
+ *
+ * Despite the name, this ioctl can be used on both video windows and OSD
+ * (bitmap) windows.
+ *
+ * NOTE: If the cb_cr_order is changed, it won't take effect until an
+ * FBIOPUT_VSCREENINFO ioctl is executed on a window with a YC pixel format.
+ */
+static int vpbe_set_vid_params(struct fb_info *info,
+ struct vpbe_video_config_params *vid_conf_params)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ enum davinci_h_exp_ratio h_exp;
+ enum davinci_v_exp_ratio v_exp;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ if (vid_conf_params->exp_info.horizontal > H_EXP_3_OVER_2)
+ return -EINVAL;
+
+ if (vid_conf_params->exp_info.vertical > V_EXP_6_OVER_5)
+ return -EINVAL;
+
+ win->dm->yc_pixfmt =
+ vid_conf_params->cb_cr_order ? PIXFMT_YCrCbI : PIXFMT_YCbCrI;
+
+ h_exp = vid_conf_params->exp_info.horizontal;
+ v_exp = vid_conf_params->exp_info.vertical;
+ if (is_vid_win(info))
+ davinci_disp_set_vid_expansion(h_exp, v_exp);
+ else
+ davinci_disp_set_osd_expansion(h_exp, v_exp);
+
+ return 0;
+}
+
+/*
+ * FBIO_GET_BITMAP_CONFIG_PARAMS handler
+ */
+static int vpbe_bitmap_get_params(struct fb_info *info, struct vpbe_bitmap_config_params
+ *bitmap_conf_params)
+{
+ enum davinci_osd_layer osdwin = fb_info_to_osd_enum(info);
+ enum davinci_clut clut;
+
+ if (!is_osd_win(info))
+ return -EINVAL;
+
+ clut = davinci_disp_get_osd_clut(osdwin);
+ if (clut == ROM_CLUT)
+ bitmap_conf_params->clut_select = davinci_disp_get_rom_clut();
+ else
+ bitmap_conf_params->clut_select = 2;
+
+ bitmap_conf_params->attenuation_enable =
+ davinci_disp_get_rec601_attenuation(osdwin);
+
+ memset(&bitmap_conf_params->clut_idx, 0,
+ sizeof(bitmap_conf_params->clut_idx));
+
+ switch (info->var.bits_per_pixel) {
+ case 1:
+ bitmap_conf_params->clut_idx.for_1bit_bitmap.bitmap_val_0 =
+ davinci_disp_get_palette_map(osdwin, 0);
+ bitmap_conf_params->clut_idx.for_1bit_bitmap.bitmap_val_1 =
+ davinci_disp_get_palette_map(osdwin, 1);
+ break;
+ case 2:
+ bitmap_conf_params->clut_idx.for_2bit_bitmap.bitmap_val_0 =
+ davinci_disp_get_palette_map(osdwin, 0);
+ bitmap_conf_params->clut_idx.for_2bit_bitmap.bitmap_val_1 =
+ davinci_disp_get_palette_map(osdwin, 1);
+ bitmap_conf_params->clut_idx.for_2bit_bitmap.bitmap_val_2 =
+ davinci_disp_get_palette_map(osdwin, 2);
+ bitmap_conf_params->clut_idx.for_2bit_bitmap.bitmap_val_3 =
+ davinci_disp_get_palette_map(osdwin, 3);
+ break;
+ case 4:
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_0 =
+ davinci_disp_get_palette_map(osdwin, 0);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_1 =
+ davinci_disp_get_palette_map(osdwin, 1);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_2 =
+ davinci_disp_get_palette_map(osdwin, 2);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_3 =
+ davinci_disp_get_palette_map(osdwin, 3);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_4 =
+ davinci_disp_get_palette_map(osdwin, 4);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_5 =
+ davinci_disp_get_palette_map(osdwin, 5);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_6 =
+ davinci_disp_get_palette_map(osdwin, 6);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_7 =
+ davinci_disp_get_palette_map(osdwin, 7);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_8 =
+ davinci_disp_get_palette_map(osdwin, 8);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_9 =
+ davinci_disp_get_palette_map(osdwin, 9);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_10 =
+ davinci_disp_get_palette_map(osdwin, 10);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_11 =
+ davinci_disp_get_palette_map(osdwin, 11);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_12 =
+ davinci_disp_get_palette_map(osdwin, 12);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_13 =
+ davinci_disp_get_palette_map(osdwin, 13);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_14 =
+ davinci_disp_get_palette_map(osdwin, 14);
+ bitmap_conf_params->clut_idx.for_4bit_bitmap.bitmap_val_15 =
+ davinci_disp_get_palette_map(osdwin, 15);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+/*
+ * FBIO_SET_BITMAP_CONFIG_PARAMS handler
+ *
+ * The palette map is ignored unless the color depth is set to 1, 2, or 4 bits
+ * per pixel. A default palette map is supplied for these color depths where
+ * the clut index is equal to the pixel value. It is not necessary to change
+ * the default palette map when using the RAM clut, because the RAM clut values
+ * can be changed. It is only necessary to modify the default palette map when
+ * using a ROM clut.
+ */
+static int vpbe_bitmap_set_params(struct fb_info *info, struct vpbe_bitmap_config_params
+ *bitmap_conf_params)
+{
+ enum davinci_osd_layer osdwin = fb_info_to_osd_enum(info);
+ enum davinci_clut clut = ROM_CLUT;
+
+ if (!is_osd_win(info))
+ return -EINVAL;
+
+ if (bitmap_conf_params->clut_select == 0)
+ davinci_disp_set_rom_clut(ROM_CLUT0);
+ else if (bitmap_conf_params->clut_select == 1)
+ davinci_disp_set_rom_clut(ROM_CLUT1);
+ else if (bitmap_conf_params->clut_select == 2)
+ clut = RAM_CLUT;
+ else
+ return -EINVAL;
+
+ davinci_disp_set_osd_clut(osdwin, clut);
+ davinci_disp_set_rec601_attenuation(osdwin,
+ bitmap_conf_params->
+ attenuation_enable);
+
+ switch (info->var.bits_per_pixel) {
+ case 1:
+ davinci_disp_set_palette_map(osdwin, 0,
+ bitmap_conf_params->clut_idx.
+ for_1bit_bitmap.bitmap_val_0);
+ davinci_disp_set_palette_map(osdwin, 1,
+ bitmap_conf_params->clut_idx.
+ for_1bit_bitmap.bitmap_val_1);
+ break;
+ case 2:
+ davinci_disp_set_palette_map(osdwin, 0,
+ bitmap_conf_params->clut_idx.
+ for_2bit_bitmap.bitmap_val_0);
+ davinci_disp_set_palette_map(osdwin, 1,
+ bitmap_conf_params->clut_idx.
+ for_2bit_bitmap.bitmap_val_1);
+ davinci_disp_set_palette_map(osdwin, 2,
+ bitmap_conf_params->clut_idx.
+ for_2bit_bitmap.bitmap_val_2);
+ davinci_disp_set_palette_map(osdwin, 3,
+ bitmap_conf_params->clut_idx.
+ for_2bit_bitmap.bitmap_val_3);
+ break;
+ case 4:
+ davinci_disp_set_palette_map(osdwin, 0,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_0);
+ davinci_disp_set_palette_map(osdwin, 1,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_1);
+ davinci_disp_set_palette_map(osdwin, 2,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_2);
+ davinci_disp_set_palette_map(osdwin, 3,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_3);
+ davinci_disp_set_palette_map(osdwin, 4,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_4);
+ davinci_disp_set_palette_map(osdwin, 5,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_5);
+ davinci_disp_set_palette_map(osdwin, 6,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_6);
+ davinci_disp_set_palette_map(osdwin, 7,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_7);
+ davinci_disp_set_palette_map(osdwin, 8,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_8);
+ davinci_disp_set_palette_map(osdwin, 9,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_9);
+ davinci_disp_set_palette_map(osdwin, 10,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_10);
+ davinci_disp_set_palette_map(osdwin, 11,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_11);
+ davinci_disp_set_palette_map(osdwin, 12,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_12);
+ davinci_disp_set_palette_map(osdwin, 13,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_13);
+ davinci_disp_set_palette_map(osdwin, 14,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_14);
+ davinci_disp_set_palette_map(osdwin, 15,
+ bitmap_conf_params->clut_idx.
+ for_4bit_bitmap.bitmap_val_15);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+/*
+ * FBIO_SET_BACKG_COLOR handler
+ */
+static int vpbe_set_backg_color(struct fb_info *info,
+ struct vpbe_backg_color *backg_color)
+{
+ enum davinci_clut clut = ROM_CLUT;
+
+ if (backg_color->clut_select == 0)
+ davinci_disp_set_rom_clut(ROM_CLUT0);
+ else if (backg_color->clut_select == 1)
+ davinci_disp_set_rom_clut(ROM_CLUT1);
+ else if (backg_color->clut_select == 2)
+ clut = RAM_CLUT;
+ else
+ return -EINVAL;
+
+ davinci_disp_set_background(clut, backg_color->color_offset);
+
+ return 0;
+}
+
+/*
+ * FBIO_SETPOS handler
+ */
+static int vpbe_setpos(struct fb_info *info,
+ struct vpbe_window_position *win_pos)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_var_screeninfo *var = &info->var;
+ struct fb_var_screeninfo v;
+ unsigned old_xpos = win->xpos;
+ unsigned old_ypos = win->ypos;
+ int retval;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ memcpy(&v, var, sizeof(v));
+ win->xpos = win_pos->xpos;
+ win->ypos = win_pos->ypos;
+ retval = info->fbops->fb_check_var(&v, info);
+ if (retval) {
+ win->xpos = old_xpos;
+ win->ypos = old_ypos;
+ return retval;
+ }
+
+ /* update the window position */
+ memcpy(var, &v, sizeof(v));
+ retval = info->fbops->fb_set_par(info);
+
+ return retval;
+}
+
+/*
+ * FBIO_SET_CURSOR handler
+ */
+static int vpbe_set_cursor_params(struct fb_info *info,
+ struct fb_cursor *fbcursor)
+{
+ struct davinci_cursor_config cursor;
+
+ if (!fbcursor->enable) {
+ davinci_disp_cursor_disable();
+ return 0;
+ }
+
+ cursor.xsize = fbcursor->image.width;
+ cursor.ysize = fbcursor->image.height;
+ cursor.xpos = fbcursor->image.dx;
+ cursor.ypos = fbcursor->image.dy;
+ cursor.interlaced = is_window_interlaced(&info->var);
+ cursor.h_width =
+ (fbcursor->image.depth > 7) ? 7 : fbcursor->image.depth;
+ cursor.v_width = cursor.h_width;
+ cursor.clut = ROM_CLUT;
+ cursor.clut_index = fbcursor->image.fg_color;
+
+ davinci_disp_set_cursor_config(&cursor);
+
+ davinci_disp_cursor_enable();
+
+ return 0;
+}
+
+/*
+ * fb_ioctl method
+ */
+static int
+davincifb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ void __user *argp = (void __user *)arg;
+ struct fb_fillrect rect;
+ struct zoom_params zoom;
+ int retval = 0;
+ struct vpbe_bitmap_blend_params blend_para;
+ struct vpbe_blink_option blink_option;
+ struct vpbe_video_config_params vid_conf_params;
+ struct vpbe_bitmap_config_params bitmap_conf_params;
+ struct vpbe_backg_color backg_color;
+ struct vpbe_window_position win_pos;
+ struct fb_cursor cursor;
+
+ switch (cmd) {
+ case FBIO_WAITFORVSYNC:
+ /* This ioctl accepts an integer argument to specify a
+ * display. We only support one display, so we will
+ * simply ignore the argument.
+ */
+ return davincifb_wait_for_vsync(info);
+
+ case FBIO_SETATTRIBUTE:
+ if (copy_from_user(&rect, argp, sizeof(rect)))
+ return -EFAULT;
+ return vpbe_set_attr_blend(info, &rect);
+
+ case FBIO_SETPOSX:
+ return vpbe_setposx(info, arg);
+
+ case FBIO_SETPOSY:
+ return vpbe_setposy(info, arg);
+
+ case FBIO_SETZOOM:
+ if (copy_from_user(&zoom, argp, sizeof(zoom)))
+ return -EFAULT;
+ return vpbe_set_zoom(info, &zoom);
+
+ case FBIO_ENABLE_DISABLE_WIN:
+ return vpbe_enable_disable_win(info, arg);
+
+ case FBIO_SET_BITMAP_BLEND_FACTOR:
+ if (copy_from_user(&blend_para, argp, sizeof(blend_para)))
+ return -EFAULT;
+ return vpbe_bitmap_set_blend_factor(info, &blend_para);
+
+ case FBIO_SET_BITMAP_WIN_RAM_CLUT:
+ if (copy_from_user(win->dm->ram_clut[0], argp, RAM_CLUT_SIZE))
+ return -EFAULT;
+ return vpbe_bitmap_set_ram_clut(info, win->dm->ram_clut);
+
+ case FBIO_ENABLE_DISABLE_ATTRIBUTE_WIN:
+ return vpbe_enable_disable_attribute_window(info, arg);
+
+ case FBIO_GET_BLINK_INTERVAL:
+ if ((retval = vpbe_get_blinking(info, &blink_option)) < 0)
+ return retval;
+ if (copy_to_user(argp, &blink_option, sizeof(blink_option)))
+ return -EFAULT;
+ return 0;
+
+ case FBIO_SET_BLINK_INTERVAL:
+ if (copy_from_user(&blink_option, argp, sizeof(blink_option)))
+ return -EFAULT;
+ return vpbe_set_blinking(info, &blink_option);
+
+ case FBIO_GET_VIDEO_CONFIG_PARAMS:
+ if ((retval = vpbe_get_vid_params(info, &vid_conf_params)) < 0)
+ return retval;
+ if (copy_to_user
+ (argp, &vid_conf_params, sizeof(vid_conf_params)))
+ return -EFAULT;
+ return 0;
+
+ case FBIO_SET_VIDEO_CONFIG_PARAMS:
+ if (copy_from_user
+ (&vid_conf_params, argp, sizeof(vid_conf_params)))
+ return -EFAULT;
+ return vpbe_set_vid_params(info, &vid_conf_params);
+
+ case FBIO_GET_BITMAP_CONFIG_PARAMS:
+ if ((retval =
+ vpbe_bitmap_get_params(info, &bitmap_conf_params)) < 0)
+ return retval;
+ if (copy_to_user
+ (argp, &bitmap_conf_params, sizeof(bitmap_conf_params)))
+ return -EFAULT;
+ return 0;
+
+ case FBIO_SET_BITMAP_CONFIG_PARAMS:
+ if (copy_from_user
+ (&bitmap_conf_params, argp, sizeof(bitmap_conf_params)))
+ return -EFAULT;
+ return vpbe_bitmap_set_params(info, &bitmap_conf_params);
+
+ case FBIO_SET_BACKG_COLOR:
+ if (copy_from_user(&backg_color, argp, sizeof(backg_color)))
+ return -EFAULT;
+ return vpbe_set_backg_color(info, &backg_color);
+
+ case FBIO_SETPOS:
+ if (copy_from_user(&win_pos, argp, sizeof(win_pos)))
+ return -EFAULT;
+ return vpbe_setpos(info, &win_pos);
+
+ case FBIO_SET_CURSOR:
+ if (copy_from_user(&cursor, argp, sizeof(cursor)))
+ return -EFAULT;
+ return vpbe_set_cursor_params(info, &cursor);
+
+ default:
+ return -EINVAL;
+ }
+}
+
+
+/*
+ * fb_check_var method
+ */
+static int
+davincifb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_videomode *mode = &win->dm->mode;
+ struct davinci_layer_config lconfig;
+ struct fb_fix_screeninfo fix;
+
+ /*
+ * Get an updated copy of the video mode from the encoder manager, just
+ * in case the display has been switched.
+ */
+ get_video_mode(mode);
+
+ /*
+ * xres, yres, xres_virtual, or yres_virtual equal to zero is treated as
+ * a special case. It indicates that the window should be disabled. If
+ * the window is a video window, it will also be released.
+ */
+ if (var->xres == 0 || var->yres == 0 || var->xres_virtual == 0
+ || var->yres_virtual == 0) {
+ var->xres = 0;
+ var->yres = 0;
+ var->xres_virtual = 0;
+ var->yres_virtual = 0;
+ return 0;
+ }
+
+ switch (var->bits_per_pixel) {
+ case 1:
+ case 2:
+ case 4:
+ case 8:
+ case 16:
+ break;
+ case 24:
+ if (cpu_is_davinci_dm355())
+ return -EINVAL;
+ break;
+ case 32:
+ if (cpu_is_davinci_dm644x())
+ return -EINVAL;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (var->xres_virtual < var->xres || var->yres_virtual < var->yres)
+ return -EINVAL;
+ if (var->xoffset > var->xres_virtual - var->xres)
+ return -EINVAL;
+ if (var->yoffset > var->yres_virtual - var->yres)
+ return -EINVAL;
+ if (mode->xres < var->xres || mode->yres < var->yres)
+ return -EINVAL;
+ if (win->xpos > mode->xres - var->xres)
+ return -EINVAL;
+ if (win->ypos > mode->yres - var->yres)
+ return -EINVAL;
+ convert_fb_var_to_osd(var, &lconfig, win->dm->yc_pixfmt);
+
+ update_fix_info(var, &fix);
+ lconfig.line_length = fix.line_length;
+ lconfig.xpos = win->xpos;
+ lconfig.ypos = win->ypos;
+ /* xoffset must be a multiple of xpanstep */
+ if (var->xoffset & ~(fix.xpanstep - 1))
+ return -EINVAL;
+
+ /* check if we have enough video memory to support this mode */
+ if (!window_will_fit_framebuffer(var, info->fix.smem_len))
+ return -EINVAL;
+
+ /* see if the OSD manager approves of this configuration */
+ if (davinci_disp_try_layer_config(win->layer, &lconfig))
+ return -EINVAL;
+ /*
+ * Reject this var if the OSD manager would have to modify the window
+ * geometry to make it work.
+ */
+ if (lconfig.xsize != var->xres || lconfig.ysize != var->yres)
+ return -EINVAL;
+ if (lconfig.xpos != win->xpos || lconfig.ypos != win->ypos)
+ return -EINVAL;
+
+ /*
+ * At this point we have accepted the var, so now we convert our layer
+ * configuration struct back to the var in order to make all of the
+ * pixel format and geometry values consistent. The var timing values
+ * will be unmodified, as we have no way to verify them.
+ */
+ convert_osd_to_fb_var(&lconfig, var);
+
+ return 0;
+}
+
+/*
+ * fb_set_par method
+ */
+static int davincifb_set_par(struct fb_info *info)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ struct fb_var_screeninfo *var = &info->var;
+ struct davinci_layer_config lconfig;
+ struct fb_videomode mode;
+ unsigned start;
+
+ /* update the fix info to be consistent with the var */
+ update_fix_info(var, &info->fix);
+ convert_fb_info_to_osd(info, &lconfig);
+
+ /* See if we need to pass the timing values to the encoder manager. */
+ memcpy(&mode, &win->dm->mode, sizeof(mode));
+ fb_var_to_videomode(&mode, var);
+ mode.name = win->dm->mode.name;
+ if (mode.xres == win->dm->mode.xres && mode.yres == win->dm->mode.yres
+ && mode.pixclock != 0) {
+ /*
+ * If the timing parameters from the var are different than the
+ * timing parameters from the encoder, try to update the
+ * timing parameters with the encoder manager.
+ */
+ if (!fb_mode_is_equal(&mode, &win->dm->mode))
+ set_video_mode(&mode);
+ }
+ /* update our copy of the encoder video mode */
+ get_video_mode(&win->dm->mode);
+
+ /* turn off ping-pong buffer and field inversion to fix
+ the image shaking problem in 1080I mode. The problem i.d. by the
+ DM6446 Advisory 1.3.8 is not seen in 1080I mode, but the ping-pong
+ buffer workaround created a shaking problem. */
+ if (win->layer == WIN_VID0 &&
+ strcmp(mode.name, VID_ENC_STD_1080I_30) == 0 &&
+ fb->invert_field)
+ davinci_disp_set_field_inversion(0);
+
+ /*
+ * Update the var with the encoder timing info. The window geometry
+ * will be preserved.
+ */
+ construct_fb_var(var, &win->dm->mode, &lconfig);
+
+ /* need to update interlaced since the mode may have changed */
+ lconfig.interlaced = var->vmode = win->dm->mode.vmode;
+ /*
+ * xres, yres, xres_virtual, or yres_virtual equal to zero is treated as
+ * a special case. It indicates that the window should be disabled. If
+ * the window is a video window, it will also be released.
+ * Note that we disable the window, but we do not set the
+ * win->disable_window flag. This allows the window to be re-enabled
+ * simply by using the FBIOPUT_VSCREENINFO ioctl to set a valid
+ * configuration.
+ */
+ if (lconfig.xsize == 0 || lconfig.ysize == 0) {
+ if (win->own_window) {
+ davinci_disp_disable_layer(win->layer);
+ if (is_vid_win(info)) {
+ win->own_window = 0;
+ davinci_disp_release_layer(win->layer);
+ }
+ }
+ return 0;
+ }
+
+ /*
+ * If we don't currently own this window, we must claim it from the OSD
+ * manager.
+ */
+ if (!win->own_window) {
+ if (davinci_disp_request_layer(win->layer))
+ return -ENODEV;
+ win->own_window = 1;
+ }
+
+ /* DM365 YUV420 Planar */
+ if (cpu_is_davinci_dm365() &&
+ info->var.bits_per_pixel == 8 &&
+ (win->layer == WIN_VID0 || win->layer == WIN_VID1)
+ ) {
+ start =
+ info->fix.smem_start +
+ (var->xoffset * 12) / 8 +
+ var->yoffset * 3 / 2 * info->fix.line_length;
+ } else {
+ start =
+ info->fix.smem_start + (var->xoffset * var->bits_per_pixel) / 8
+ + var->yoffset * info->fix.line_length;
+ }
+ davinci_disp_set_layer_config(win->layer, &lconfig);
+ davinci_disp_start_layer(win->layer, start, NULL);
+ if (win->display_window)
+ davinci_disp_enable_layer(win->layer, 0);
+
+ return 0;
+}
+
+/*
+ * This macro converts a 16-bit color passed to fb_setcolreg to the width
+ * supported by the pixel format.
+ */
+#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
+
+/*
+ * fb_setcolreg method
+ */
+static int davincifb_setcolreg(unsigned regno, unsigned red, unsigned green,
+ unsigned blue, unsigned transp,
+ struct fb_info *info)
+{
+ unsigned r, g, b, t;
+
+ if (regno >= 256) /* no. of hw registers */
+ return -EINVAL;
+
+ /*
+ * An RGB color palette isn't applicable to a window with a YUV pixel
+ * format or to a window in attribute mode.
+ */
+ if (is_yuv(&info->var) || is_attribute_mode(&info->var))
+ return -EINVAL;
+
+ switch (info->fix.visual) {
+ case FB_VISUAL_TRUECOLOR:
+ r = CNVT_TOHW(red, info->var.red.length);
+ g = CNVT_TOHW(green, info->var.green.length);
+ b = CNVT_TOHW(blue, info->var.blue.length);
+ t = CNVT_TOHW(transp, info->var.transp.length);
+ break;
+ case FB_VISUAL_PSEUDOCOLOR:
+ default:
+ r = CNVT_TOHW(red, 8);
+ g = CNVT_TOHW(green, 8);
+ b = CNVT_TOHW(blue, 8);
+ t = 0;
+ break;
+ }
+
+ /* Truecolor has hardware independent palette */
+ if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
+ u32 v;
+
+ if (regno >= 16)
+ return -EINVAL;
+
+ v = (r << info->var.red.offset) |
+ (g << info->var.green.offset) |
+ (b << info->var.blue.offset) |
+ (t << info->var.transp.offset);
+
+ switch (info->var.bits_per_pixel) {
+ case 16:
+ ((u16 *) (info->pseudo_palette))[regno] = v;
+ break;
+ case 24:
+ case 32:
+ ((u32 *) (info->pseudo_palette))[regno] = v;
+ break;
+ }
+ return 0;
+ }
+
+ if (!is_osd_win(info))
+ return -EINVAL;
+
+ davinci_disp_set_clut_rgb(regno, r, g, b);
+
+ return 0;
+}
+
+/*
+ * fb_pan_display method
+ *
+ * Pan the display using the `xoffset' and `yoffset' fields of the `var'
+ * structure. We don't support wrapping and ignore the FB_VMODE_YWRAP flag.
+ */
+static int
+davincifb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ unsigned start;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ if (var->xoffset > info->var.xres_virtual - info->var.xres)
+ return -EINVAL;
+ if (var->yoffset > info->var.yres_virtual - info->var.yres)
+ return -EINVAL;
+
+ /* xoffset must be a multiple of xpanstep */
+ if (var->xoffset & ~(info->fix.xpanstep - 1))
+ return -EINVAL;
+
+ /* For DM365 video windows:
+ * using bits_per_pixel to calculate start/offset address
+ * needs to be changed for YUV420 planar format since
+ * it is 8. But consider CbCr the real (avg) bits per pixel
+ * is 12. line_length is calcuate using 8, so offset needs
+ * to time 1.5 to take C plane into account.
+ */
+ if (cpu_is_davinci_dm365() &&
+ info->var.bits_per_pixel == 8 &&
+ (win->layer == WIN_VID0 || win->layer == WIN_VID1)
+ ) {
+ start =
+ info->fix.smem_start +
+ (var->xoffset * 12) / 8 +
+ var->yoffset * 3 / 2 * info->fix.line_length;
+ } else {
+ start =
+ info->fix.smem_start +
+ (var->xoffset * info->var.bits_per_pixel) / 8 +
+ var->yoffset * info->fix.line_length;
+ }
+ if (davinci_disp_is_second_field()) {
+ davinci_disp_start_layer(win->layer, start, NULL);
+ } else
+ win->sdram_address = start;
+
+ return 0;
+}
+
+/*
+ * fb_blank method
+ *
+ * Blank the screen if blank_mode != 0, else unblank.
+ */
+int davincifb_blank(int blank_mode, struct fb_info *info)
+{
+ struct vpbe_dm_win_info *win = info->par;
+ int retval = 0;
+
+ if (!win->own_window)
+ return -ENODEV;
+
+ if (!blank_mode) {
+ win->display_window = 1;
+ retval = info->fbops->fb_check_var(&info->var, info);
+ if (retval)
+ return retval;
+ retval = info->fbops->fb_set_par(info);
+ } else {
+ win->display_window = 0;
+ davinci_disp_disable_layer(win->layer);
+ }
+
+ return retval;
+}
+
+/*
+ * Frame buffer operations
+ */
+static struct fb_ops davincifb_ops = {
+ .owner = THIS_MODULE,
+ .fb_check_var = davincifb_check_var,
+ .fb_set_par = davincifb_set_par,
+ .fb_setcolreg = davincifb_setcolreg,
+ .fb_blank = davincifb_blank,
+ .fb_pan_display = davincifb_pan_display,
+ .fb_fillrect = cfb_fillrect,
+ .fb_copyarea = cfb_copyarea,
+ .fb_imageblit = cfb_imageblit,
+ .fb_rotate = NULL,
+ .fb_sync = NULL,
+ .fb_ioctl = davincifb_ioctl,
+};
+
+static void davincifb_release_window(struct device *dev,
+ struct vpbe_dm_win_info *win)
+{
+ struct fb_info *info = win->info;
+
+ if (info) {
+ unregister_framebuffer(info);
+ win->info = NULL;
+ }
+
+ if (win->own_window) {
+ davinci_disp_release_layer(win->layer);
+ win->own_window = 0;
+ }
+ win->display_window = 0;
+
+ if (info) {
+ dma_free_coherent(dev, info->fix.smem_len, info->screen_base,
+ info->fix.smem_start);
+ fb_dealloc_cmap(&info->cmap);
+ kfree(info);
+ }
+}
+
+static int davincifb_init_window(struct device *dev,
+ struct vpbe_dm_win_info *win,
+ struct davinci_layer_config *lconfig,
+ unsigned fb_size, const char *name)
+{
+ struct fb_info *info;
+ int err;
+
+ if (!fb_size)
+ return 0;
+
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!info) {
+ dev_err(dev, "%s: Can't allocate memory for fb_info struct.\n",
+ name);
+ return -ENOMEM;
+ }
+ win->info = info;
+
+ /* initialize fb_info */
+ info->par = win;
+ info->flags =
+ FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
+ FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_XPAN |
+ FBINFO_HWACCEL_YPAN;
+ info->fbops = &davincifb_ops;
+ info->screen_size = fb_size;
+ info->pseudo_palette = win->pseudo_palette;
+ if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
+ dev_err(dev, "%s: Can't allocate color map.\n", name);
+ err = -ENODEV;
+ goto cmap_out;
+ }
+
+ /* initialize fb_fix_screeninfo */
+ strlcpy(info->fix.id, name, sizeof(info->fix.id));
+ info->fix.smem_len = fb_size;
+ info->fix.type = FB_TYPE_PACKED_PIXELS;
+
+ /* allocate the framebuffer */
+ info->screen_base =
+ dma_alloc_coherent(dev, info->fix.smem_len,
+ (dma_addr_t *) & info->fix.smem_start,
+ GFP_KERNEL | GFP_DMA);
+ if (!info->screen_base) {
+ dev_err(dev, "%s: dma_alloc_coherent failed when allocating "
+ "framebuffer.\n", name);
+ err = -ENOMEM;
+ goto fb_alloc_out;
+ }
+
+ /*
+ * Fill the framebuffer with zeros unless it is an OSD1 window in
+ * attribute mode, in which case we fill it with 0x77 to make the OSD0
+ * pixels opaque.
+ */
+ memset(info->screen_base,
+ (lconfig->pixfmt == PIXFMT_OSD_ATTR) ? 0x77 : 0,
+ info->fix.smem_len);
+
+ /* initialize fb_var_screeninfo */
+ construct_fb_var(&info->var, &win->dm->mode, lconfig);
+ win->xpos = lconfig->xpos;
+ win->ypos = lconfig->ypos;
+ info->var.xres_virtual = info->var.xres;
+ info->var.yres_virtual = info->var.yres;
+
+ /* update the fix info to be consistent with the var */
+ update_fix_info(&info->var, &info->fix);
+
+ /*
+ * Request ownership of the window from the OSD manager unless this is
+ * a video window and the window size is 0.
+ */
+ if (is_osd_win(info) || (info->var.xres != 0 && info->var.yres != 0)) {
+ if (!davinci_disp_request_layer(win->layer))
+ win->own_window = 1;
+ }
+ /* bail out if this is an OSD window and we don't own it */
+ if (is_osd_win(info) && !win->own_window) {
+ dev_err(dev, "%s: Failed to obtain ownership of OSD "
+ "window.\n", name);
+ err = -ENODEV;
+ goto own_out;
+ }
+
+ win->display_window = 1;
+
+ if (win->own_window) {
+ /* check if our initial window configuration is valid */
+ if (info->fbops->fb_check_var(&info->var, info)) {
+ dev_warn(dev, "%s: Initial window configuration is "
+ "invalid.\n", name);
+ } else
+ info->fbops->fb_set_par(info);
+ }
+
+ /* register the framebuffer */
+ if (register_framebuffer(info)) {
+ dev_err(dev, "%s: Failed to register framebuffer.\n", name);
+ err = -ENODEV;
+ goto register_out;
+ }
+
+ dev_info(dev, "%s: %dx%dx%d@%d,%d with framebuffer size %dKB\n",
+ info->fix.id, info->var.xres, info->var.yres,
+ info->var.bits_per_pixel, win->xpos, win->ypos,
+ info->fix.smem_len >> 10);
+
+ return 0;
+
+ register_out:
+ if (win->own_window)
+ davinci_disp_release_layer(win->layer);
+ win->own_window = 0;
+ own_out:
+ dma_free_coherent(dev, info->fix.smem_len, info->screen_base,
+ info->fix.smem_start);
+ fb_alloc_out:
+ fb_dealloc_cmap(&info->cmap);
+ cmap_out:
+ kfree(info);
+
+ return err;
+}
+
+static int davincifb_remove(struct device *dev)
+{
+// struct device *dev = &pdev->dev;
+ struct vpbe_dm_info *dm = dev_get_drvdata(dev);
+
+ dev_set_drvdata(dev, NULL);
+
+ davinci_disp_unregister_callback(&dm->vsync_callback);
+
+ davincifb_release_window(dev, &dm->win[WIN_VID1]);
+ davincifb_release_window(dev, &dm->win[WIN_OSD1]);
+ davincifb_release_window(dev, &dm->win[WIN_VID0]);
+ davincifb_release_window(dev, &dm->win[WIN_OSD0]);
+
+ kfree(dm);
+
+ return 0;
+}
+
+/*
+ * Return the maximum number of bytes per screen for a display layer at a
+ * resolution specified by an fb_videomode struct.
+ */
+static unsigned davincifb_max_screen_size(enum davinci_disp_layer layer,
+ const struct fb_videomode *mode)
+{
+ unsigned max_bpp = 32;
+ unsigned line_length;
+ unsigned size;
+
+ switch (layer) {
+ case WIN_OSD0:
+ case WIN_OSD1:
+ if (cpu_is_davinci_dm355())
+ max_bpp = 32;
+ else
+ max_bpp = 16;
+ break;
+ case WIN_VID0:
+ case WIN_VID1:
+ if (cpu_is_davinci_dm355())
+ max_bpp = 16;
+ else
+ max_bpp = 24;
+ break;
+ }
+
+ line_length = (mode->xres * max_bpp + 7) / 8;
+ line_length = ((line_length + 31) / 32) * 32;
+ size = mode->yres * line_length;
+
+ return size;
+}
+
+static void parse_win_params(struct vpbe_dm_win_info *win,
+ struct davinci_layer_config *lconfig,
+ unsigned *fb_size, char *opt)
+{
+ char *s, *p, c = 0;
+ unsigned bits_per_pixel;
+
+ if (!opt)
+ return;
+
+ /* xsize */
+ p = strpbrk(opt, "x,@");
+ if (p)
+ c = *p;
+ if ((s = strsep(&opt, "x,@")) == NULL)
+ return;
+ if (*s)
+ lconfig->xsize = simple_strtoul(s, NULL, 0);
+ if (!p || !opt)
+ return;
+
+ /* ysize */
+ if (c == 'x') {
+ p = strpbrk(opt, "x,@");
+ if (p)
+ c = *p;
+ if ((s = strsep(&opt, "x,@")) == NULL)
+ return;
+ if (*s)
+ lconfig->ysize = simple_strtoul(s, NULL, 0);
+ if (!p || !opt)
+ return;
+ }
+
+ /* bits per pixel */
+ if (c == 'x') {
+ p = strpbrk(opt, ",@");
+ if (p)
+ c = *p;
+ if ((s = strsep(&opt, ",@")) == NULL)
+ return;
+ if (*s) {
+ bits_per_pixel = simple_strtoul(s, NULL, 0);
+ switch (bits_per_pixel) {
+ case 1:
+ if (win->layer == WIN_OSD0
+ || win->layer == WIN_OSD1)
+ lconfig->pixfmt = PIXFMT_1BPP;
+ break;
+ case 2:
+ if (win->layer == WIN_OSD0
+ || win->layer == WIN_OSD1)
+ lconfig->pixfmt = PIXFMT_2BPP;
+ break;
+ case 4:
+ if (win->layer == WIN_OSD0
+ || win->layer == WIN_OSD1)
+ lconfig->pixfmt = PIXFMT_4BPP;
+ break;
+ case 8:
+ if (win->layer == WIN_OSD0
+ || win->layer == WIN_OSD1)
+ lconfig->pixfmt = PIXFMT_8BPP;
+ if (cpu_is_davinci_dm365())
+ if (win->layer == WIN_VID0 ||
+ win->layer == WIN_VID1)
+ lconfig->pixfmt = PIXFMT_NV12;
+ break;
+ case 16:
+ if (win->layer == WIN_OSD0
+ || win->layer == WIN_OSD1)
+ lconfig->pixfmt = PIXFMT_RGB565;
+ else
+ lconfig->pixfmt = win->dm->yc_pixfmt;
+ break;
+ case 24:
+ if (cpu_is_davinci_dm644x()
+ && (win->layer == WIN_VID0
+ || win->layer == WIN_VID1))
+ lconfig->pixfmt = PIXFMT_RGB888;
+ break;
+ case 32:
+ if (cpu_is_davinci_dm355()
+ && (win->layer == WIN_OSD0
+ || win->layer == WIN_OSD1))
+ lconfig->pixfmt = PIXFMT_RGB888;
+ break;
+ default:
+ break;
+ }
+ }
+ if (!p || !opt)
+ return;
+ }
+
+ /* framebuffer size */
+ if (c == ',') {
+ p = strpbrk(opt, "@");
+ if (p)
+ c = *p;
+ if ((s = strsep(&opt, "@")) == NULL)
+ return;
+ if (*s) {
+ *fb_size = simple_strtoul(s, &s, 0);
+ if (*s == 'K')
+ *fb_size <<= 10;
+ if (*s == 'M')
+ *fb_size <<= 20;
+ }
+ if (!p || !opt)
+ return;
+ }
+
+ /* xpos */
+ if (c == '@') {
+ p = strpbrk(opt, ",");
+ if (p)
+ c = *p;
+ if ((s = strsep(&opt, ",")) == NULL)
+ return;
+ if (*s)
+ lconfig->xpos = simple_strtoul(s, NULL, 0);
+ if (!p || !opt)
+ return;
+ }
+
+ /* ypos */
+ if (c == ',') {
+ s = opt;
+ if (*s)
+ lconfig->ypos = simple_strtoul(s, NULL, 0);
+ }
+
+ return;
+}
+
+/*
+ * Pass boot-time options by adding the following string to the boot params:
+ * video=davincifb:options
+ * Valid options:
+ * osd0=[MxNxP,S@X,Y]
+ * osd1=[MxNxP,S@X,Y]
+ * vid0=[off|MxNxP,S@X,Y]
+ * vid1=[off|MxNxP,S@X,Y]
+ * MxN are the horizontal and vertical window size
+ * P is the color depth (bits per pixel)
+ * S is the framebuffer size with a size suffix such as 'K' or 'M'
+ * X,Y are the window position
+ *
+ * Only video windows can be turned off. Turning off a video window means that
+ * no framebuffer device will be registered for it,
+ *
+ * To cause a window to be supported by the framebuffer driver but not displayed
+ * initially, pass a value of 0 for the window size.
+ *
+ * For example:
+ * video=davincifb:osd0=720x480x16@0,0:osd1=720x480:vid0=off:vid1=off
+ *
+ * This routine returns 1 if the window is to be turned off, or 0 otherwise.
+ */
+static int davincifb_get_default_win_config(struct device *dev,
+ struct vpbe_dm_win_info *win,
+ struct davinci_layer_config
+ *lconfig, unsigned *fb_size,
+ const char *options)
+{
+ const char *win_names[] = { "osd0=", "vid0=", "osd1=", "vid1=" };
+ const char *this_opt, *next_opt;
+ int this_len, opt_len;
+ static char opt_buf[128];
+
+ /* supply default values for lconfig and fb_size */
+ switch (win->layer) {
+ case WIN_OSD0:
+ lconfig->pixfmt = PIXFMT_RGB565;
+ lconfig->xsize = win->dm->mode.xres;
+ lconfig->ysize = win->dm->mode.yres;
+ break;
+ case WIN_OSD1:
+ lconfig->pixfmt = PIXFMT_OSD_ATTR;
+ lconfig->xsize = win->dm->mode.xres;
+ lconfig->ysize = win->dm->mode.yres;
+ break;
+ case WIN_VID0:
+ case WIN_VID1:
+ lconfig->pixfmt = win->dm->yc_pixfmt;
+ lconfig->xsize = 0;
+ lconfig->ysize = 0;
+ break;
+ }
+ lconfig->xpos = 0;
+ lconfig->ypos = 0;
+
+ lconfig->interlaced = is_display_interlaced(&win->dm->mode);
+ *fb_size = davincifb_max_screen_size(win->layer, &win->dm->mode);
+
+ next_opt = options;
+ while ((this_opt = next_opt)) {
+ this_len = strcspn(this_opt, ":");
+ next_opt = strpbrk(this_opt, ":");
+ if (next_opt)
+ ++next_opt;
+
+ opt_len = strlen(win_names[win->layer]);
+ if (this_len >= opt_len) {
+ if (strncmp(this_opt, win_names[win->layer], opt_len))
+ continue;
+ this_len -= opt_len;
+ this_opt += opt_len;
+ if ((this_len >= strlen("off"))
+ && !strncmp(this_opt, "off", strlen("off")))
+ return 1;
+ else {
+ strlcpy(opt_buf, this_opt,
+ min_t(int, sizeof(opt_buf),
+ this_len + 1));
+ parse_win_params(win, lconfig, fb_size,
+ opt_buf);
+ return 0;
+ }
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * Module parameter definitions
+ */
+static char *options = "";
+
+module_param(options, charp, S_IRUGO);
+
+static int davincifb_probe(struct device *dev)
+{
+ struct vpbe_dm_info *dm;
+ struct davinci_layer_config lconfig;
+ unsigned fb_size;
+ int err;
+ struct davincifb_platform_data *pdata = dev->platform_data;
+
+ if (!pdata)
+ pdata = &davincifb_pdata_default;
+
+ dm = kzalloc(sizeof(*dm), GFP_KERNEL);
+ if (!dm) {
+ dev_err(dev, "Can't allocate memory for driver state.\n");
+ return -ENOMEM;
+ }
+ dev_set_drvdata(dev, dm);
+
+ /* get the video mode from the encoder manager */
+ get_video_mode(&dm->mode);
+
+ /* set the default Cb/Cr order */
+ dm->yc_pixfmt = PIXFMT_YCbCrI;
+
+ /* initialize OSD0 */
+ dm->win[WIN_OSD0].layer = WIN_OSD0;
+ dm->win[WIN_OSD0].dm = dm;
+ dm->win[WIN_OSD0].sdram_address = 0;
+ davincifb_get_default_win_config(dev, &dm->win[WIN_OSD0], &lconfig,
+ &fb_size, options);
+ err =
+ davincifb_init_window(dev, &dm->win[WIN_OSD0], &lconfig, fb_size,
+ OSD0_FBNAME);
+ if (err)
+ goto osd0_out;
+
+ /* initialize VID0 */
+ dm->win[WIN_VID0].layer = WIN_VID0;
+ dm->win[WIN_VID0].dm = dm;
+ dm->win[WIN_VID0].sdram_address = 0;
+ if (!davincifb_get_default_win_config
+ (dev, &dm->win[WIN_VID0], &lconfig, &fb_size, options)) {
+ err =
+ davincifb_init_window(dev, &dm->win[WIN_VID0], &lconfig,
+ fb_size, VID0_FBNAME);
+ if (err)
+ goto vid0_out;
+ }
+
+ /* initialize OSD1 */
+ dm->win[WIN_OSD1].layer = WIN_OSD1;
+ dm->win[WIN_OSD1].dm = dm;
+ dm->win[WIN_OSD1].sdram_address = 0;
+ davincifb_get_default_win_config(dev, &dm->win[WIN_OSD1], &lconfig,
+ &fb_size, options);
+ err =
+ davincifb_init_window(dev, &dm->win[WIN_OSD1], &lconfig, fb_size,
+ OSD1_FBNAME);
+ if (err)
+ goto osd1_out;
+
+ /* initialize VID1 */
+ dm->win[WIN_VID1].layer = WIN_VID1;
+ dm->win[WIN_VID1].dm = dm;
+ dm->win[WIN_VID1].sdram_address = 0;
+ if (!davincifb_get_default_win_config
+ (dev, &dm->win[WIN_VID1], &lconfig, &fb_size, options)) {
+ err =
+ davincifb_init_window(dev, &dm->win[WIN_VID1], &lconfig,
+ fb_size, VID1_FBNAME);
+ if (err)
+ goto vid1_out;
+ }
+
+ /* initialize the vsync wait queue */
+ init_waitqueue_head(&dm->vsync_wait);
+ dm->timeout = HZ / 5;
+
+ /* register the end-of-frame callback */
+ dm->vsync_callback.mask = DAVINCI_DISP_FIRST_FIELD |
+ DAVINCI_DISP_SECOND_FIELD | DAVINCI_DISP_END_OF_FRAME;
+
+ dm->vsync_callback.handler = davincifb_vsync_callback;
+ dm->vsync_callback.arg = dm;
+ davinci_disp_register_callback(&dm->vsync_callback);
+
+ fb->invert_field = pdata->invert_field;
+
+ return 0;
+
+ vid1_out:
+ davincifb_release_window(dev, &dm->win[WIN_OSD1]);
+ osd1_out:
+ davincifb_release_window(dev, &dm->win[WIN_VID0]);
+ vid0_out:
+ davincifb_release_window(dev, &dm->win[WIN_OSD0]);
+ osd0_out:
+ kfree(dm);
+
+ return err;
+}
+
+static void davincifb_release_dev(struct device *dev)
+{
+}
+
+static u64 davincifb_dmamask = ~(u32) 0;
+
+/* FIXME: move to board setup file */
+static struct platform_device davincifb_device = {
+ .name = "davincifb",
+ .id = 0,
+ .dev = {
+ .release = davincifb_release_dev,
+ .dma_mask = &davincifb_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = 0,
+};
+
+static struct device_driver davincifb_driver = {
+ .name = "davincifb",
+ .bus = &platform_bus_type,
+ .probe = davincifb_probe,
+ .remove = davincifb_remove,
+ .suspend = NULL,
+ .resume = NULL,
+};
+#if 0
+static struct platform_driver davincifb_driver = {
+ .probe = davincifb_probe,
+ .remove = davincifb_remove,
+ .driver = {
+ .name = "davincifb",
+ .owner = THIS_MODULE,
+ },
+};
+#endif
+static int __init davincifb_init(void)
+{
+ struct device *dev = &davincifb_device.dev;
+#ifndef MODULE
+ {
+ char *names[] = { "davincifb", "dm64xxfb", "dm355fb" };
+ int i, num_names = 3;
+
+ for (i = 0; i < num_names; i++) {
+ if (fb_get_options(names[i], &options)) {
+ dev_err(dev, " Disabled on command-line.\n");
+ return -ENODEV;
+ }
+ if (options)
+ break;
+ }
+ }
+#endif
+
+ /* Register the device with LDM */
+ if (platform_device_register(&davincifb_device)) {
+ pr_debug("failed to register davincifb device\n");
+ return -ENODEV;
+ }
+
+ /* Register the driver with LDM */
+ if (driver_register(&davincifb_driver)) {
+ dev_err(dev, "failed to register davincifb driver\n");
+ platform_device_unregister(&davincifb_device);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static void __exit davincifb_cleanup(void)
+{
+ driver_unregister(&davincifb_driver);
+ platform_device_unregister(&davincifb_device);
+}
+
+module_init(davincifb_init);
+module_exit(davincifb_cleanup);
+
+MODULE_DESCRIPTION("Framebuffer driver for TI DaVinci");
+MODULE_AUTHOR("MontaVista Software");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c
index 86291dcd..c56b6939 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -1060,9 +1060,13 @@ fb_blank(struct fb_info *info, int blank)
if (info->fbops->fb_blank)
ret = info->fbops->fb_blank(blank, info);
- if (!ret)
+ if (!ret) {
+ struct fb_event event;
+
+ event.info = info;
+ event.data = &blank;
fb_notifier_call_chain(FB_EVENT_BLANK, &event);
- else {
+ } else {
/*
* if fb_blank is failed then revert effects of
* the early blank event.
@@ -1373,12 +1377,15 @@ fb_mmap(struct file *file, struct vm_area_struct * vma)
{
struct fb_info *info = file_fb_info(file);
struct fb_ops *fb;
- unsigned long mmio_pgoff;
+ unsigned long off;
unsigned long start;
u32 len;
if (!info)
return -ENODEV;
+ if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
+ return -EINVAL;
+ off = vma->vm_pgoff << PAGE_SHIFT;
fb = info->fbops;
if (!fb)
return -ENODEV;
@@ -1390,24 +1397,32 @@ fb_mmap(struct file *file, struct vm_area_struct * vma)
return res;
}
- /*
- * Ugh. This can be either the frame buffer mapping, or
- * if pgoff points past it, the mmio mapping.
- */
+ /* frame buffer memory */
start = info->fix.smem_start;
- len = info->fix.smem_len;
- mmio_pgoff = PAGE_ALIGN((start & ~PAGE_MASK) + len) >> PAGE_SHIFT;
- if (vma->vm_pgoff >= mmio_pgoff) {
- vma->vm_pgoff -= mmio_pgoff;
+ len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.smem_len);
+ if (off >= len) {
+ /* memory mapped io */
+ off -= len;
+ if (info->var.accel_flags) {
+ mutex_unlock(&info->mm_lock);
+ return -EINVAL;
+ }
start = info->fix.mmio_start;
- len = info->fix.mmio_len;
+ len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len);
}
mutex_unlock(&info->mm_lock);
-
+ start &= PAGE_MASK;
+ if ((vma->vm_end - vma->vm_start + off) > len)
+ return -EINVAL;
+ off += start;
+ vma->vm_pgoff = off >> PAGE_SHIFT;
+ /* VM_IO | VM_DONTEXPAND | VM_DONTDUMP are set by io_remap_pfn_range()*/
vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
- fb_pgprotect(file, vma, start);
-
- return vm_iomap_memory(vma, start, len);
+ fb_pgprotect(file, vma, off);
+ if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
+ vma->vm_end - vma->vm_start, vma->vm_page_prot))
+ return -EAGAIN;
+ return 0;
}
static int
diff --git a/drivers/video/mmp/core.c b/drivers/video/mmp/core.c
index 84de2632..9ed83419 100644
--- a/drivers/video/mmp/core.c
+++ b/drivers/video/mmp/core.c
@@ -252,5 +252,7 @@ void mmp_unregister_path(struct mmp_path *path)
kfree(path);
mutex_unlock(&disp_lock);
+
+ dev_info(path->dev, "de-register %s\n", path->name);
}
EXPORT_SYMBOL_GPL(mmp_unregister_path);
diff --git a/drivers/w1/masters/w1-gpio.c b/drivers/w1/masters/w1-gpio.c
index 46d97014..13137a35 100644
--- a/drivers/w1/masters/w1-gpio.c
+++ b/drivers/w1/masters/w1-gpio.c
@@ -122,6 +122,7 @@ static int w1_gpio_probe(struct platform_device *pdev)
}
}
+
master->data = pdata;
master->read_bit = w1_gpio_read_bit;
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index e89fc313..9fcc70c1 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -117,7 +117,7 @@ config ARM_SP805_WATCHDOG
config AT91RM9200_WATCHDOG
tristate "AT91RM9200 watchdog"
- depends on ARCH_AT91RM9200
+ depends on ARCH_AT91
help
Watchdog timer embedded into AT91RM9200 chips. This will reboot your
system when the timeout is reached.
diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index 2647ad8e..aa85881d 100644
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -1316,7 +1316,7 @@ static void __xen_evtchn_do_upcall(void)
{
int start_word_idx, start_bit_idx;
int word_idx, bit_idx;
- int i, irq;
+ int i;
int cpu = get_cpu();
struct shared_info *s = HYPERVISOR_shared_info;
struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
@@ -1324,8 +1324,6 @@ static void __xen_evtchn_do_upcall(void)
do {
xen_ulong_t pending_words;
- xen_ulong_t pending_bits;
- struct irq_desc *desc;
vcpu_info->evtchn_upcall_pending = 0;
@@ -1337,17 +1335,6 @@ static void __xen_evtchn_do_upcall(void)
* selector flag. xchg_xen_ulong must contain an
* appropriate barrier.
*/
- if ((irq = per_cpu(virq_to_irq, cpu)[VIRQ_TIMER]) != -1) {
- int evtchn = evtchn_from_irq(irq);
- word_idx = evtchn / BITS_PER_LONG;
- pending_bits = evtchn % BITS_PER_LONG;
- if (active_evtchns(cpu, s, word_idx) & (1ULL << pending_bits)) {
- desc = irq_to_desc(irq);
- if (desc)
- generic_handle_irq_desc(irq, desc);
- }
- }
-
pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
start_word_idx = __this_cpu_read(current_word_idx);
@@ -1356,6 +1343,7 @@ static void __xen_evtchn_do_upcall(void)
word_idx = start_word_idx;
for (i = 0; pending_words != 0; i++) {
+ xen_ulong_t pending_bits;
xen_ulong_t words;
words = MASK_LSBS(pending_words, word_idx);
@@ -1384,7 +1372,8 @@ static void __xen_evtchn_do_upcall(void)
do {
xen_ulong_t bits;
- int port;
+ int port, irq;
+ struct irq_desc *desc;
bits = MASK_LSBS(pending_bits, bit_idx);
diff --git a/fs/aio.c b/fs/aio.c
index 1dc8786f..3f941f2a 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -1029,9 +1029,9 @@ static int aio_read_evt(struct kioctx *ioctx, struct io_event *ent)
spin_unlock(&info->ring_lock);
out:
+ kunmap_atomic(ring);
dprintk("leaving aio_read_evt: %d h%lu t%lu\n", ret,
(unsigned long)ring->head, (unsigned long)ring->tail);
- kunmap_atomic(ring);
return ret;
}
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 86af964c..3939829f 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -1137,7 +1137,6 @@ static unsigned long vma_dump_size(struct vm_area_struct *vma,
goto whole;
if (!(vma->vm_flags & VM_SHARED) && FILTER(HUGETLB_PRIVATE))
goto whole;
- return 0;
}
/* Do not dump I/O mapped devices or special mappings */
diff --git a/fs/bio.c b/fs/bio.c
index b96fc6ce..bb5768f5 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -1428,6 +1428,8 @@ void bio_endio(struct bio *bio, int error)
else if (!test_bit(BIO_UPTODATE, &bio->bi_flags))
error = -EIO;
+ trace_block_bio_complete(bio, error);
+
if (bio->bi_end_io)
bio->bi_end_io(bio, error);
}
diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index ef963815..451fad96 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -317,7 +317,6 @@ static noinline int overwrite_item(struct btrfs_trans_handle *trans,
unsigned long src_ptr;
unsigned long dst_ptr;
int overwrite_root = 0;
- bool inode_item = key->type == BTRFS_INODE_ITEM_KEY;
if (root->root_key.objectid != BTRFS_TREE_LOG_OBJECTID)
overwrite_root = 1;
@@ -327,9 +326,6 @@ static noinline int overwrite_item(struct btrfs_trans_handle *trans,
/* look for the key in the destination tree */
ret = btrfs_search_slot(NULL, root, key, path, 0, 0);
- if (ret < 0)
- return ret;
-
if (ret == 0) {
char *src_copy;
char *dst_copy;
@@ -371,30 +367,6 @@ static noinline int overwrite_item(struct btrfs_trans_handle *trans,
return 0;
}
- /*
- * We need to load the old nbytes into the inode so when we
- * replay the extents we've logged we get the right nbytes.
- */
- if (inode_item) {
- struct btrfs_inode_item *item;
- u64 nbytes;
-
- item = btrfs_item_ptr(path->nodes[0], path->slots[0],
- struct btrfs_inode_item);
- nbytes = btrfs_inode_nbytes(path->nodes[0], item);
- item = btrfs_item_ptr(eb, slot,
- struct btrfs_inode_item);
- btrfs_set_inode_nbytes(eb, item, nbytes);
- }
- } else if (inode_item) {
- struct btrfs_inode_item *item;
-
- /*
- * New inode, set nbytes to 0 so that the nbytes comes out
- * properly when we replay the extents.
- */
- item = btrfs_item_ptr(eb, slot, struct btrfs_inode_item);
- btrfs_set_inode_nbytes(eb, item, 0);
}
insert:
btrfs_release_path(path);
@@ -514,7 +486,7 @@ static noinline int replay_one_extent(struct btrfs_trans_handle *trans,
int found_type;
u64 extent_end;
u64 start = key->offset;
- u64 nbytes = 0;
+ u64 saved_nbytes;
struct btrfs_file_extent_item *item;
struct inode *inode = NULL;
unsigned long size;
@@ -524,19 +496,10 @@ static noinline int replay_one_extent(struct btrfs_trans_handle *trans,
found_type = btrfs_file_extent_type(eb, item);
if (found_type == BTRFS_FILE_EXTENT_REG ||
- found_type == BTRFS_FILE_EXTENT_PREALLOC) {
- nbytes = btrfs_file_extent_num_bytes(eb, item);
- extent_end = start + nbytes;
-
- /*
- * We don't add to the inodes nbytes if we are prealloc or a
- * hole.
- */
- if (btrfs_file_extent_disk_bytenr(eb, item) == 0)
- nbytes = 0;
- } else if (found_type == BTRFS_FILE_EXTENT_INLINE) {
+ found_type == BTRFS_FILE_EXTENT_PREALLOC)
+ extent_end = start + btrfs_file_extent_num_bytes(eb, item);
+ else if (found_type == BTRFS_FILE_EXTENT_INLINE) {
size = btrfs_file_extent_inline_len(eb, item);
- nbytes = btrfs_file_extent_ram_bytes(eb, item);
extent_end = ALIGN(start + size, root->sectorsize);
} else {
ret = 0;
@@ -585,6 +548,7 @@ static noinline int replay_one_extent(struct btrfs_trans_handle *trans,
}
btrfs_release_path(path);
+ saved_nbytes = inode_get_bytes(inode);
/* drop any overlapping extents */
ret = btrfs_drop_extents(trans, root, inode, start, extent_end, 1);
BUG_ON(ret);
@@ -671,7 +635,7 @@ static noinline int replay_one_extent(struct btrfs_trans_handle *trans,
BUG_ON(ret);
}
- inode_add_bytes(inode, nbytes);
+ inode_set_bytes(inode, saved_nbytes);
ret = btrfs_update_inode(trans, root, inode);
out:
if (inode)
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index 21b3a291..991c63c6 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -1575,24 +1575,14 @@ cifs_parse_mount_options(const char *mountdata, const char *devname,
}
break;
case Opt_blank_pass:
+ vol->password = NULL;
+ break;
+ case Opt_pass:
/* passwords have to be handled differently
* to allow the character used for deliminator
* to be passed within them
*/
- /*
- * Check if this is a case where the password
- * starts with a delimiter
- */
- tmp_end = strchr(data, '=');
- tmp_end++;
- if (!(tmp_end < end && tmp_end[1] == delim)) {
- /* No it is not. Set the password to NULL */
- vol->password = NULL;
- break;
- }
- /* Yes it is. Drop down to Opt_pass below.*/
- case Opt_pass:
/* Obtain the value string */
value = strchr(data, '=');
value++;
diff --git a/fs/ecryptfs/miscdev.c b/fs/ecryptfs/miscdev.c
index e4141f25..412e6eda 100644
--- a/fs/ecryptfs/miscdev.c
+++ b/fs/ecryptfs/miscdev.c
@@ -80,6 +80,13 @@ ecryptfs_miscdev_open(struct inode *inode, struct file *file)
int rc;
mutex_lock(&ecryptfs_daemon_hash_mux);
+ rc = try_module_get(THIS_MODULE);
+ if (rc == 0) {
+ rc = -EIO;
+ printk(KERN_ERR "%s: Error attempting to increment module use "
+ "count; rc = [%d]\n", __func__, rc);
+ goto out_unlock_daemon_list;
+ }
rc = ecryptfs_find_daemon_by_euid(&daemon);
if (!rc) {
rc = -EINVAL;
@@ -89,7 +96,7 @@ ecryptfs_miscdev_open(struct inode *inode, struct file *file)
if (rc) {
printk(KERN_ERR "%s: Error attempting to spawn daemon; "
"rc = [%d]\n", __func__, rc);
- goto out_unlock_daemon_list;
+ goto out_module_put_unlock_daemon_list;
}
mutex_lock(&daemon->mux);
if (daemon->flags & ECRYPTFS_DAEMON_MISCDEV_OPEN) {
@@ -101,6 +108,9 @@ ecryptfs_miscdev_open(struct inode *inode, struct file *file)
atomic_inc(&ecryptfs_num_miscdev_opens);
out_unlock_daemon:
mutex_unlock(&daemon->mux);
+out_module_put_unlock_daemon_list:
+ if (rc)
+ module_put(THIS_MODULE);
out_unlock_daemon_list:
mutex_unlock(&ecryptfs_daemon_hash_mux);
return rc;
@@ -137,6 +147,7 @@ ecryptfs_miscdev_release(struct inode *inode, struct file *file)
"bug.\n", __func__, rc);
BUG();
}
+ module_put(THIS_MODULE);
return rc;
}
@@ -460,7 +471,6 @@ out_free:
static const struct file_operations ecryptfs_miscdev_fops = {
- .owner = THIS_MODULE,
.open = ecryptfs_miscdev_open,
.poll = ecryptfs_miscdev_poll,
.read = ecryptfs_miscdev_read,
diff --git a/fs/hfsplus/extents.c b/fs/hfsplus/extents.c
index fe0a7621..a94f0f77 100644
--- a/fs/hfsplus/extents.c
+++ b/fs/hfsplus/extents.c
@@ -533,7 +533,7 @@ void hfsplus_file_truncate(struct inode *inode)
struct address_space *mapping = inode->i_mapping;
struct page *page;
void *fsdata;
- loff_t size = inode->i_size;
+ u32 size = inode->i_size;
res = pagecache_write_begin(NULL, mapping, size, 0,
AOP_FLAG_UNINTERRUPTIBLE,
diff --git a/fs/hostfs/Makefile b/fs/hostfs/Makefile
index d5beaffa..a3039ec1 100644
--- a/fs/hostfs/Makefile
+++ b/fs/hostfs/Makefile
@@ -8,4 +8,4 @@ hostfs-objs := hostfs_kern.o hostfs_user.o
obj-y :=
obj-$(CONFIG_HOSTFS) += hostfs.o
-include arch/um/scripts/Makefile.rules
+# include arch/um/scripts/Makefile.rules
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
index 523464e6..84e3d856 100644
--- a/fs/hugetlbfs/inode.c
+++ b/fs/hugetlbfs/inode.c
@@ -110,7 +110,7 @@ static int hugetlbfs_file_mmap(struct file *file, struct vm_area_struct *vma)
* way when do_mmap_pgoff unwinds (may be important on powerpc
* and ia64).
*/
- vma->vm_flags |= VM_HUGETLB | VM_DONTEXPAND;
+ vma->vm_flags |= VM_HUGETLB | VM_DONTEXPAND | VM_DONTDUMP;
vma->vm_ops = &hugetlb_vm_ops;
if (vma->vm_pgoff & (~huge_page_mask(h) >> PAGE_SHIFT))
diff --git a/fs/inode.c b/fs/inode.c
index a898b3d4..f5f7c06c 100644
--- a/fs/inode.c
+++ b/fs/inode.c
@@ -725,7 +725,7 @@ void prune_icache_sb(struct super_block *sb, int nr_to_scan)
* inode to the back of the list so we don't spin on it.
*/
if (!spin_trylock(&inode->i_lock)) {
- list_move(&inode->i_lru, &sb->s_inode_lru);
+ list_move_tail(&inode->i_lru, &sb->s_inode_lru);
continue;
}
diff --git a/fs/namespace.c b/fs/namespace.c
index 341d3f56..d581e45c 100644
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -1690,7 +1690,7 @@ static int do_loopback(struct path *path, const char *old_name,
if (IS_ERR(mnt)) {
err = PTR_ERR(mnt);
- goto out2;
+ goto out;
}
err = graft_tree(mnt, path);
diff --git a/fs/nfs/nfs4client.c b/fs/nfs/nfs4client.c
index 66b6664d..ac4fc9a8 100644
--- a/fs/nfs/nfs4client.c
+++ b/fs/nfs/nfs4client.c
@@ -300,7 +300,7 @@ int nfs40_walk_client_list(struct nfs_client *new,
struct rpc_cred *cred)
{
struct nfs_net *nn = net_generic(new->cl_net, nfs_net_id);
- struct nfs_client *pos, *prev = NULL;
+ struct nfs_client *pos, *n, *prev = NULL;
struct nfs4_setclientid_res clid = {
.clientid = new->cl_clientid,
.confirm = new->cl_confirm,
@@ -308,23 +308,10 @@ int nfs40_walk_client_list(struct nfs_client *new,
int status = -NFS4ERR_STALE_CLIENTID;
spin_lock(&nn->nfs_client_lock);
- list_for_each_entry(pos, &nn->nfs_client_list, cl_share_link) {
+ list_for_each_entry_safe(pos, n, &nn->nfs_client_list, cl_share_link) {
/* If "pos" isn't marked ready, we can't trust the
* remaining fields in "pos" */
- if (pos->cl_cons_state > NFS_CS_READY) {
- atomic_inc(&pos->cl_count);
- spin_unlock(&nn->nfs_client_lock);
-
- if (prev)
- nfs_put_client(prev);
- prev = pos;
-
- status = nfs_wait_client_init_complete(pos);
- spin_lock(&nn->nfs_client_lock);
- if (status < 0)
- continue;
- }
- if (pos->cl_cons_state != NFS_CS_READY)
+ if (pos->cl_cons_state < NFS_CS_READY)
continue;
if (pos->rpc_ops != new->rpc_ops)
@@ -436,16 +423,16 @@ int nfs41_walk_client_list(struct nfs_client *new,
struct rpc_cred *cred)
{
struct nfs_net *nn = net_generic(new->cl_net, nfs_net_id);
- struct nfs_client *pos, *prev = NULL;
+ struct nfs_client *pos, *n, *prev = NULL;
int status = -NFS4ERR_STALE_CLIENTID;
spin_lock(&nn->nfs_client_lock);
- list_for_each_entry(pos, &nn->nfs_client_list, cl_share_link) {
+ list_for_each_entry_safe(pos, n, &nn->nfs_client_list, cl_share_link) {
/* If "pos" isn't marked ready, we can't trust the
* remaining fields in "pos", especially the client
* ID and serverowner fields. Wait for CREATE_SESSION
* to finish. */
- if (pos->cl_cons_state > NFS_CS_READY) {
+ if (pos->cl_cons_state < NFS_CS_READY) {
atomic_inc(&pos->cl_count);
spin_unlock(&nn->nfs_client_lock);
@@ -453,17 +440,18 @@ int nfs41_walk_client_list(struct nfs_client *new,
nfs_put_client(prev);
prev = pos;
+ nfs4_schedule_lease_recovery(pos);
status = nfs_wait_client_init_complete(pos);
- if (status == 0) {
- nfs4_schedule_lease_recovery(pos);
- status = nfs4_wait_clnt_recover(pos);
+ if (status < 0) {
+ nfs_put_client(pos);
+ spin_lock(&nn->nfs_client_lock);
+ continue;
}
+ status = pos->cl_cons_state;
spin_lock(&nn->nfs_client_lock);
if (status < 0)
continue;
}
- if (pos->cl_cons_state != NFS_CS_READY)
- continue;
if (pos->rpc_ops != new->rpc_ops)
continue;
@@ -481,18 +469,17 @@ int nfs41_walk_client_list(struct nfs_client *new,
continue;
atomic_inc(&pos->cl_count);
- *result = pos;
- status = 0;
+ spin_unlock(&nn->nfs_client_lock);
dprintk("NFS: <-- %s using nfs_client = %p ({%d})\n",
__func__, pos, atomic_read(&pos->cl_count));
- break;
+
+ *result = pos;
+ return 0;
}
/* No matching nfs_client found. */
spin_unlock(&nn->nfs_client_lock);
dprintk("NFS: <-- %s status = %d\n", __func__, status);
- if (prev)
- nfs_put_client(prev);
return status;
}
#endif /* CONFIG_NFS_V4_1 */
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 0ad025eb..26431cf6 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -1046,7 +1046,6 @@ static struct nfs4_state *nfs4_try_open_cached(struct nfs4_opendata *opendata)
/* Save the delegation */
nfs4_stateid_copy(&stateid, &delegation->stateid);
rcu_read_unlock();
- nfs_release_seqid(opendata->o_arg.seqid);
ret = nfs_may_open(state->inode, state->owner->so_cred, open_mode);
if (ret != 0)
goto out;
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index d41a3518..6ace365c 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -1886,13 +1886,7 @@ again:
status = PTR_ERR(clnt);
break;
}
- /* Note: this is safe because we haven't yet marked the
- * client as ready, so we are the only user of
- * clp->cl_rpcclient
- */
- clnt = xchg(&clp->cl_rpcclient, clnt);
- rpc_shutdown_client(clnt);
- clnt = clp->cl_rpcclient;
+ clp->cl_rpcclient = clnt;
goto again;
case -NFS4ERR_MINOR_VERS_MISMATCH:
diff --git a/fs/proc/array.c b/fs/proc/array.c
index cbd0f1b3..f7ed9ee4 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -143,7 +143,6 @@ static const char * const task_state_array[] = {
"x (dead)", /* 64 */
"K (wakekill)", /* 128 */
"W (waking)", /* 256 */
- "P (parked)", /* 512 */
};
static inline const char *get_task_state(struct task_struct *tsk)
diff --git a/fs/proc/generic.c b/fs/proc/generic.c
index 21e1a8f1..4b3b3ffb 100644
--- a/fs/proc/generic.c
+++ b/fs/proc/generic.c
@@ -755,8 +755,37 @@ void pde_put(struct proc_dir_entry *pde)
free_proc_entry(pde);
}
-static void entry_rundown(struct proc_dir_entry *de)
+/*
+ * Remove a /proc entry and free it if it's not currently in use.
+ */
+void remove_proc_entry(const char *name, struct proc_dir_entry *parent)
{
+ struct proc_dir_entry **p;
+ struct proc_dir_entry *de = NULL;
+ const char *fn = name;
+ unsigned int len;
+
+ spin_lock(&proc_subdir_lock);
+ if (__xlate_proc_name(name, &parent, &fn) != 0) {
+ spin_unlock(&proc_subdir_lock);
+ return;
+ }
+ len = strlen(fn);
+
+ for (p = &parent->subdir; *p; p=&(*p)->next ) {
+ if (proc_match(len, fn, *p)) {
+ de = *p;
+ *p = de->next;
+ de->next = NULL;
+ break;
+ }
+ }
+ spin_unlock(&proc_subdir_lock);
+ if (!de) {
+ WARN(1, "name '%s'\n", name);
+ return;
+ }
+
spin_lock(&de->pde_unload_lock);
/*
* Stop accepting new callers into module. If you're
@@ -788,40 +817,6 @@ static void entry_rundown(struct proc_dir_entry *de)
spin_lock(&de->pde_unload_lock);
}
spin_unlock(&de->pde_unload_lock);
-}
-
-/*
- * Remove a /proc entry and free it if it's not currently in use.
- */
-void remove_proc_entry(const char *name, struct proc_dir_entry *parent)
-{
- struct proc_dir_entry **p;
- struct proc_dir_entry *de = NULL;
- const char *fn = name;
- unsigned int len;
-
- spin_lock(&proc_subdir_lock);
- if (__xlate_proc_name(name, &parent, &fn) != 0) {
- spin_unlock(&proc_subdir_lock);
- return;
- }
- len = strlen(fn);
-
- for (p = &parent->subdir; *p; p=&(*p)->next ) {
- if (proc_match(len, fn, *p)) {
- de = *p;
- *p = de->next;
- de->next = NULL;
- break;
- }
- }
- spin_unlock(&proc_subdir_lock);
- if (!de) {
- WARN(1, "name '%s'\n", name);
- return;
- }
-
- entry_rundown(de);
if (S_ISDIR(de->mode))
parent->nlink--;
@@ -832,57 +827,3 @@ void remove_proc_entry(const char *name, struct proc_dir_entry *parent)
pde_put(de);
}
EXPORT_SYMBOL(remove_proc_entry);
-
-int remove_proc_subtree(const char *name, struct proc_dir_entry *parent)
-{
- struct proc_dir_entry **p;
- struct proc_dir_entry *root = NULL, *de, *next;
- const char *fn = name;
- unsigned int len;
-
- spin_lock(&proc_subdir_lock);
- if (__xlate_proc_name(name, &parent, &fn) != 0) {
- spin_unlock(&proc_subdir_lock);
- return -ENOENT;
- }
- len = strlen(fn);
-
- for (p = &parent->subdir; *p; p=&(*p)->next ) {
- if (proc_match(len, fn, *p)) {
- root = *p;
- *p = root->next;
- root->next = NULL;
- break;
- }
- }
- if (!root) {
- spin_unlock(&proc_subdir_lock);
- return -ENOENT;
- }
- de = root;
- while (1) {
- next = de->subdir;
- if (next) {
- de->subdir = next->next;
- next->next = NULL;
- de = next;
- continue;
- }
- spin_unlock(&proc_subdir_lock);
-
- entry_rundown(de);
- next = de->parent;
- if (S_ISDIR(de->mode))
- next->nlink--;
- de->nlink = 0;
- if (de == root)
- break;
- pde_put(de);
-
- spin_lock(&proc_subdir_lock);
- de = next;
- }
- pde_put(root);
- return 0;
-}
-EXPORT_SYMBOL(remove_proc_subtree);
diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
index b1b1fa6f..25f01d0b 100644
--- a/include/asm-generic/tlb.h
+++ b/include/asm-generic/tlb.h
@@ -99,12 +99,7 @@ struct mmu_gather {
unsigned int need_flush : 1, /* Did free PTEs */
fast_mode : 1; /* No batching */
- /* we are in the middle of an operation to clear
- * a full mm and can make some optimizations */
- unsigned int fullmm : 1,
- /* we have performed an operation which
- * requires a complete flush of the tlb */
- need_flush_all : 1;
+ unsigned int fullmm;
struct mmu_gather_batch *active;
struct mmu_gather_batch local;
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 2d94d741..5d2b24cc 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1804,8 +1804,8 @@ extern int drm_get_platform_dev(struct platform_device *pdev,
/* returns true if currently okay to sleep */
static __inline__ bool drm_can_sleep(void)
{
- if (in_atomic() || in_dbg_master() || irqs_disabled())
- return false;
+ //if (in_atomic() || in_dbg_master() || irqs_disabled())
+ // return false;
return true;
}
diff --git a/include/linux/ata.h b/include/linux/ata.h
index ee0bd952..8f7a3d68 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -954,7 +954,7 @@ static inline int atapi_cdb_len(const u16 *dev_id)
}
}
-static inline int atapi_command_packet_set(const u16 *dev_id)
+static inline bool atapi_command_packet_set(const u16 *dev_id)
{
return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
}
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h
index 7c2e030e..0ea61e07 100644
--- a/include/linux/blktrace_api.h
+++ b/include/linux/blktrace_api.h
@@ -12,6 +12,7 @@
struct blk_trace {
int trace_state;
+ bool rq_based;
struct rchan *rchan;
unsigned long __percpu *sequence;
unsigned char __percpu *msg_data;
diff --git a/include/linux/capability.h b/include/linux/capability.h
index d9a4f7f4..98503b79 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -35,7 +35,6 @@ struct cpu_vfs_cap_data {
#define _KERNEL_CAP_T_SIZE (sizeof(kernel_cap_t))
-struct file;
struct inode;
struct dentry;
struct user_namespace;
@@ -212,7 +211,6 @@ extern bool capable(int cap);
extern bool ns_capable(struct user_namespace *ns, int cap);
extern bool nsown_capable(int cap);
extern bool inode_capable(const struct inode *inode, int cap);
-extern bool file_ns_capable(const struct file *file, struct user_namespace *ns, int cap);
/* audit system wants to get cap info from files as well */
extern int get_vfs_caps_from_disk(const struct dentry *dentry, struct cpu_vfs_cap_data *cpu_caps);
diff --git a/include/linux/davinci_resizer.h b/include/linux/davinci_resizer.h
new file mode 100644
index 00000000..bbd9a2ce
--- /dev/null
+++ b/include/linux/davinci_resizer.h
@@ -0,0 +1,362 @@
+/* *
+* Copyright (C) 2006 Texas Instruments Inc
+*
+* This program is free software you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation either version 2 of the License, or
+* (at your option) any later version.
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not,write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+#ifndef DAVINVI_RESIZER_H
+#define DAVINVI_RESIZER_H
+
+#ifdef __KERNEL__
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/kdev_t.h>
+#include <linux/cdev.h>
+#include <linux/string.h>
+#include <linux/tty.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/ioport.h>
+#include <linux/version.h>
+#include <linux/sched.h>
+#include <linux/err.h>
+#include <linux/proc_fs.h>
+#include <linux/sysctl.h>
+#include <asm/irq.h>
+#include <asm/page.h>
+#include <mach/hardware.h>
+#define CONFIG_PREEMPT_RT
+#ifdef CONFIG_PREEMPT_RT
+#include <linux/completion.h>
+#endif
+
+#endif
+
+/* ioctls definition */
+#pragma pack(1)
+#define RSZ_IOC_BASE 'R'
+#define RSZ_IOC_MAXNR 11
+
+/* Ioctl options which are to be passed while calling the ioctl */
+#define RSZ_REQBUF _IOWR(RSZ_IOC_BASE, 1, struct rsz_reqbufs *)
+#define RSZ_QUERYBUF _IOWR(RSZ_IOC_BASE, 2, struct rsz_buffer *)
+#define RSZ_S_PARAM _IOWR(RSZ_IOC_BASE, 3, struct rsz_params *)
+#define RSZ_G_PARAM _IOWR(RSZ_IOC_BASE, 4, struct rsz_params *)
+#define RSZ_RESIZE _IOWR(RSZ_IOC_BASE, 5, struct rsz_resize *)
+#define RSZ_G_STATUS _IOWR(RSZ_IOC_BASE, 6, struct rsz_status *)
+#define RSZ_S_PRIORITY _IOWR(RSZ_IOC_BASE, 7, struct rsz_priority *)
+#define RSZ_G_PRIORITY _IOWR(RSZ_IOC_BASE, 9, struct rsz_priority *)
+#define RSZ_GET_CROPSIZE _IOWR(RSZ_IOC_BASE, 10, struct rsz_cropsize *)
+#define RSZ_S_EXP _IOWR(RSZ_IOC_BASE, 11, int *)
+#pragma pack()
+
+#define RSZ_BUF_IN 0
+#define RSZ_BUF_OUT 1
+#define RSZ_YENH_DISABLE 0
+#define RSZ_YENH_3TAP_HPF 1
+#define RSZ_YENH_5TAP_HPF 2
+
+#ifdef __KERNEL__
+/* Defines and Constants */
+#define MAX_BUFFER 3
+#define MAX_CHANNELS 16
+#define MAX_PRIORITY 5
+#define MIN_PRIORITY 0
+#define DEFAULT_PRIORITY 3
+#define MAX_IMAGE_WIDTH 1280
+#define MAX_IMAGE_WIDTH_HIGH 640
+#define MAX_IMAGE_HEIGHT 960
+#define MAX_INPUT_BUFFERS 8
+#define MAX_OUTPUT_BUFFERS 8
+#define DRIVER_NAME "Resizer"
+#define FREE_BUFFER 0
+#define ALIGNMENT 16
+#define CHANNEL_BUSY 1
+#define CHANNEL_FREE 0
+#define PIXEL_EVEN 2
+#define RATIO_MULTIPLIER 256
+
+/* Bit position Macro */
+/* macro for bit set and clear */
+#define BITSET(variable, bit) ((variable) | (1 << bit))
+#define BITRESET(variable, bit) ((variable) & (~(0x00000001 << (bit))))
+
+/* RSZ_CNT */
+#define CSL_RESZ_RSZ_CNT_CBILIN_MASK (0x20000000u)
+#define CSL_RESZ_RSZ_CNT_CBILIN_SHIFT (0x0000001Du)
+
+#define RSZ_VSTPH_MASK (0xfC7fffffu)
+#define RSZ_HSTPH_MASK (0xff8fffffu)
+
+#define RSZ_CNT_VRSZ_MASK (0xfff002ffu)
+#define RSZ_CNT_HRSZ_MASK (0xfffffc00u)
+/* OUT_SIZE */
+#define RSZ_OUT_SIZE_VERT_MASK (0xf800ffffu)
+#define RSZ_OUT_SIZE_HORZ_MASK (0xfffff800u)
+/* IN_START */
+
+#define RSZ_IN_START_VERT_ST_MASK (0xE000FFFFu)
+#define RSZ_IN_START_HORZ_ST_MASK (0xFFFFE000u)
+/* IN_SIZE */
+#define RSZ_IN_SIZE_VERT_MASK (0xe000ffffu)
+#define RSZ_IN_SIZE_HORZ_MASK (0xffffe000u)
+/* SDR_INOFF */
+#define RSZ_SDR_INOFF_OFFSET_MASK (0xffff0000u)
+#define RSZ_SDR_OUTOFF_OFFSET_MASK (0xffff0000u)
+#define RSZ_UWORD_MASK (0x03FF0000u)
+#define RSZ_LWORD_MASK (0x000003FFu)
+/* YENH */
+#define RSZ_YEHN_CORE_MASK (0xffffff00u)
+#define RSZ_YEHN_SLOP_MASK (0xfffff0ffu)
+#define RSZ_YEHN_GAIN_MASK (0xffff0fffu)
+#define RSZ_YEHN_ALGO_MASK (0xfffcffffu)
+/* Filter coeefceints */
+#define RSZ_FILTER_COEFF0_MASK (0xfffffc00u)
+#define RSZ_FILTER_COEFF1_MASK (0xfc00ffffu)
+#define RSZ_CNT_CBILIN_MASK (0x20000000u)
+#define RSZ_CNT_INPTYP_MASK (0x08000000u)
+#define RSZ_CNT_PIXFMT_MASK (0x04000000u)
+#define RSZ_HSTP_SHIFT 20
+#define RSZ_HRSZ_MASK (0xfffffc00)
+#define RSZ_VRSZ_MASK (0xfff003ff)
+#define RSZ_VRSZ_SHIFT 10
+#define RSZ_OUT_VSIZE_SHIFT 16
+#define SET_BIT_CBLIN 29
+#define SET_BIT_INPUTRAM 28
+#define INPUT_RAM 1
+#define SET_BIT_INPTYP 27
+#define SET_BIT_YCPOS 26
+#define RSZ_VSTPH_SHIFT 23
+#define RSZ_FILTER_COEFF_SHIFT 16
+#define RSZ_YENH_TYPE_SHIFT 16
+#define RSZ_YENH_GAIN_SHIFT 12
+#define RSZ_YENH_SLOP_SHIFT 8
+#define UP_RSZ_RATIO 64
+#define DOWN_RSZ_RATIO 512
+#define UP_RSZ_RATIO1 513
+#define DOWN_RSZ_RATIO1 1024
+#define SET_ENABLE_BIT 0
+#define RSZ_IN_SIZE_VERT_SHIFT 16
+#define MAX_HORZ_PIXEL_8BIT 31
+#define MAX_HORZ_PIXEL_16BIT 15
+#define BYTES_PER_PIXEL 2
+#define NUM_PHASES 8
+#define NUM_TAPS 4
+#define NUM_D2PH 4 /* for downsampling
+ 2+x ~ 4x, numberof phases */
+#define NUM_D2TAPS 7 /* for downsampling
+ 2+x ~ 4x,number of taps */
+#define NUM_COEFS (NUM_PHASES * NUM_TAPS)
+#define ALIGN32 32
+#define ADDRESS_FOUND 1
+#define NEXT 1
+#define RESIZER_IOBASE_VADDR IO_ADDRESS(0x01C70C00)
+#define MAX_COEF_COUNTER 16
+#define ZERO 0
+#define FIRSTENTRY 0
+#define SECONDENTRY 1
+#define EMPTY 0
+#define SUCESS 0
+#endif
+
+#define RSZ_INTYPE_YCBCR422_16BIT 0
+#define RSZ_INTYPE_PLANAR_8BIT 1
+#define RSZ_PIX_FMT_PLANAR 2 /* 8-bit planar input */
+#define RSZ_PIX_FMT_UYVY 0 /* cb:y:cr:y */
+#define RSZ_PIX_FMT_YUYV 1 /* y:cb:y:cr */
+
+#ifdef __KERNEL__
+#define isbusy() ((regr(PCR) & 0x02)>>1)
+
+enum config_done {
+ STATE_CONFIGURED, /* Resizer driver configured by application */
+ STATE_NOT_CONFIGURED /* Resizer driver not configured by
+ application */
+};
+
+#endif
+
+/* Structure Definitions */
+/* To allocate the memory */
+struct rsz_reqbufs {
+ int buf_type; /* type of frame buffer */
+ int size; /* size of the frame bufferto be allocated */
+ int count; /* number of frame buffer to be allocated */
+};
+
+/* assed for quering the buffer to get physical address */
+struct rsz_buffer {
+ int index; /* buffer index number, 0 -> N-1 */
+ int buf_type; /* buffer type, input or output */
+ int offset; /* physical address of the buffer,
+ used in the mmap() system call */
+ int size;
+};
+
+/* used to luma enhancement options */
+struct rsz_yenh {
+ int type; /* represents luma enable or disable */
+ unsigned char gain; /* represents gain */
+ unsigned char slop; /* represents slop */
+ unsigned char core; /* Represents core value */
+};
+
+/*
+ * Conatins all the parameters for resizing. This structure
+ * is used to configure resiser parameters
+ */
+struct rsz_params {
+ int in_hsize; /* input frame horizontal size */
+ int in_vsize; /* input frame vertical size */
+ int in_pitch; /* offset between two rows of input frame */
+ int inptyp; /* for determining 16 bit or 8 bit data */
+ int vert_starting_pixel; /* for specifying vertical
+ starting pixel in input */
+ int horz_starting_pixel; /* for specyfing horizontal
+ starting pixel in input */
+ int cbilin; /* # defined, filter with luma or bi-linear
+ interpolation */
+ int pix_fmt; /* # defined, UYVY or YUYV */
+ int out_hsize; /* output frame horizontal size */
+ int out_vsize; /* output frame vertical size */
+ int out_pitch; /* offset between two rows of output frame */
+ int hstph; /* for specifying horizontal starting phase */
+ int vstph; /* for specifying vertical starting phase */
+ short hfilt_coeffs[32]; /* horizontal filter coefficients */
+ short vfilt_coeffs[32]; /* vertical filter coefficients */
+ struct rsz_yenh yenh_params;
+};
+
+/* resize structure passed during the resize IOCTL */
+struct rsz_resize {
+ struct rsz_buffer in_buf;
+ struct rsz_buffer out_buf;
+};
+
+/* Contains the status of hardware and channel */
+struct rsz_status {
+ int chan_busy; /* 1: channel is busy, 0: channel is not busy */
+ int hw_busy; /* 1: hardware is busy,
+ 0: hardware is not busy */
+ int src; /* # defined, can be either
+ SD-RAM or CCDC/PREVIEWER */
+};
+
+/* structure to set the priroity of the the channel */
+struct rsz_priority {
+ int priority; /* 0=>5, with 5 the highest priority */
+};
+
+/* Passed by application for getting crop size */
+struct rsz_cropsize {
+ unsigned int hcrop; /* number of pixels per line c
+ ropped in output image */
+ unsigned int vcrop; /* number of lines cropped
+ in output image */
+};
+
+#ifdef __KERNEL__
+
+/*
+ * Register mapped structure which contains the every register
+ * information
+ */
+struct resizer_config {
+ int rsz_pcr; /*pcr register mapping variable */
+ int rsz_in_start; /* in_start register mapping variable */
+ int rsz_in_size; /* in_size register mapping variable */
+ int rsz_out_size; /* out_size register mapping variable */
+ int rsz_cnt; /* rsz_cnt register mapping variable */
+ int rsz_sdr_inadd; /* sdr_inadd register mapping variable */
+ int rsz_sdr_inoff; /* sdr_inoff register mapping variable */
+ int rsz_sdr_outadd; /* sdr_outadd register mapping variable */
+ int rsz_sdr_outoff; /* sdr_outbuff register mapping variable */
+ int rsz_coeff_horz[16]; /* horizontal coefficients mapping array */
+ int rsz_coeff_vert[16]; /* vertical coefficients mapping array */
+ int rsz_yehn; /* yehn(luma)register mapping variable */
+};
+
+/*
+ * Channel specific structure contains information regarding
+ * the every channel
+ */
+struct channel_config {
+ struct resizer_config register_config; /* instance of register set
+ mapping structure */
+
+ void *input_buffer[MAX_INPUT_BUFFERS]; /* for storing input buffers
+ pointers */
+
+ void *output_buffer[MAX_OUTPUT_BUFFERS]; /* for storing output
+ buffers pointers */
+
+ int in_bufsize, out_bufsize; /* Contains input and output buffer
+ size */
+
+ int status; /* specifies whether the channel is busy
+ or not */
+
+ int priority; /* stores priority of the application */
+#ifdef CONFIG_PREEMPT_RT
+ struct completion channel_sem;
+#else
+ struct semaphore channel_sem;
+#endif
+ struct semaphore chanprotection_sem;
+ enum config_done config_state;
+};
+
+/*
+ * Global structure which contains information about number of chanels
+ * and protection variables
+ */
+struct device_params {
+ int module_usage_count; /* For counting no of channels
+ created */
+ struct completion sem_isr; /* Semaphore for interrupt */
+ struct semaphore array_sem; /* Semaphore for array */
+ struct semaphore device_mutex; /* mutex protecting device_params */
+ struct channel_config *channel_configuration[MAX_CHANNELS];
+ int array_count; /* for counting number of elements
+ in arrray */
+};
+
+extern struct device *rsz_device;
+
+/* Functions Definition */
+
+int malloc_buff(struct rsz_reqbufs *, struct channel_config *);
+int get_buf_address(struct rsz_buffer *, struct channel_config *);
+int rsz_start(struct rsz_resize *, struct channel_config *);
+int add_to_array(struct channel_config *rsz_configuration_channel);
+int delete_from_array(struct channel_config *rsz_configuration_channel);
+int rsz_set_params(struct rsz_params *, struct channel_config *);
+int rsz_get_params(struct rsz_params *, struct channel_config *);
+int free_buff(struct channel_config *rsz_configuration_channel);
+irqreturn_t rsz_isr(int, void *);
+void rsz_calculate_crop(struct channel_config *rsz_conf_chan,
+ struct rsz_cropsize *cropsize);
+#endif /* __KERNEL__ */
+
+#endif /* DAVINCI_RESIZER_H */
diff --git a/include/linux/davinci_vdce.h b/include/linux/davinci_vdce.h
new file mode 100644
index 00000000..122e3a0f
--- /dev/null
+++ b/include/linux/davinci_vdce.h
@@ -0,0 +1,457 @@
+/* *
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option any) later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not,write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* davinci_vdce.h file */
+
+#ifndef DAVINCI_VDCE_H
+#define DAVINCI_VDCE_H
+#ifdef __KERNEL__
+/* include Linux files */
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#endif
+//#include <mach/davinci_vdce_hw.h>
+#define VDCE_IOC_BASE 'G'
+#define VDCE_IOC_MAXNR 9
+/* Ioctl options which are to be passed while calling the ioctl */
+#define VDCE_SET_PARAMS _IOWR(VDCE_IOC_BASE, 1, vdce_params_t)
+#define VDCE_GET_PARAMS _IOR(VDCE_IOC_BASE, 2, vdce_params_t)
+#define VDCE_START _IOWR(VDCE_IOC_BASE, 3, vdce_address_start_t)
+#define VDCE_REQBUF _IOWR(VDCE_IOC_BASE, 4, vdce_reqbufs_t)
+#define VDCE_QUERYBUF _IOWR(VDCE_IOC_BASE, 5, vdce_buffer_t)
+#define VDCE_GET_DEFAULT _IOWR(VDCE_IOC_BASE, 6, vdce_params_t)
+
+#define VDCE_MAX_PRIORITY 5
+#define VDCE_MIN_PRIORITY 0
+#define VDCE_DEFAULT_PRIORITY 0
+#define MAX_BUFFERS 8
+
+#define MAX_BLEND_TABLE (4)
+
+#ifdef __KERNEL__
+#define MAX_RSZ_INTENSITY 128
+#define MIN_RSZ_MAG_RATIO 256
+#define MAX_RSZ_MAG_RATIO 2048
+#define DRIVER_NAME "VDCE"
+#define MAX_CHANNELS 16
+#define FIRSTENTRY 0
+#define SECONDENTRY 1
+#define EMPTY 0
+#define FREE_BUFFER 0
+#define CHECK_MODE_RANGE(mode, limit) ((mode < 0 || mode > limit)?1:0)
+#define GET_DIVIDE_FACTOR(format) ((format == 0)?3:4)
+#define GET_CHROMA_DIVIDE_FACTOR(format) ((format == 0)?4:2)
+#define GET_VAL(reg, mask, shift)
+#define RSZ_ENABLE_MASK 0x1
+#define BLEND_ENABLE_MASK 0x2
+#define RMAP_ENABLE_MASK 0x4
+#define CCV_ENABLE_MASK 0x8
+#endif
+
+/* enum for selected VDCE mode */
+typedef enum vdce_mode_operation {
+ VDCE_OPERATION_PRE_CODECMODE = 0,/* set pre codec mode */
+ VDCE_OPERATION_POST_CODECMODE, /* set post codec mode */
+ VDCE_OPERATION_TRANS_CODECMODE, /* set trans codec mode */
+ VDCE_OPERATION_EDGE_PADDING, /* enable edge padding */
+ VDCE_OPERATION_RESIZING, /* For doing chrominance conversion */
+ VDCE_OPERATION_CHROMINANCE_CONVERSION, /* For doing resizing */
+ VDCE_OPERATION_RANGE_MAPPING, /* For doing range mapping */
+ VDCE_OPERATION_BLENDING /* for doing blending */
+} vdce_mode_operation_t;
+
+/* enum for enable disable status */
+typedef enum vdce_status {
+ VDCE_FEATURE_DISABLE = 0, /* Suggest disable status */
+ VDCE_FEATURE_ENABLE /* Suggest Enable status */
+} vdce_status_t;
+
+/* enum for image_type */
+typedef enum vdce_image_type {
+ VDCE_BUF_IN = 0, /* Suggest buffer is of output type */
+ VDCE_BUF_OUT, /* Suggest buffer is of input type */
+ VDCE_BUF_BMP /* Suggest buffer is of bitmap type */
+} vdce_image_type_t;
+
+/* enum to enable disable luma/chroma processing */
+typedef enum vdce_proc_control {
+ VDCE_LUMA_ENABLE = 0, /* suggest luma processing is enable */
+ VDCE_CHROMA_ENABLE, /* suggest chroma processing is enable */
+ VDCE_LUMA_CHROMA_ENABLE /* suggest both processing is enable */
+} vdce_proc_control_t;
+
+/* enum to enable disable field status */
+typedef enum vdce_field_status {
+ VDCE_TOP_ENABLE = 0,/* suggest top field processing is enable */
+ VDCE_BOTTOM_ENABLE,/* suggest bottom field processing is enable */
+ VDCE_TOP_BOT_ENABLE/* suggest both processing is enable */
+} vdce_field_status_t;
+
+/* enum for codec mode */
+typedef enum vdce_codec_mode {
+ VDCE_CODECMODE_MPEG2_MPEG4 = 0, /* suggest mpeg2 is selected */
+ VDCE_CODECMODE_MPEG1 /* suggest mpeg1 is selected */
+} vdce_codec_mode_t;
+
+/* ALF mode for resizing */
+typedef enum vdce_alfmode {
+ VDCE_ALFMODE_AUTOMATIC = 0, /* tap-4 */
+ VDCE_ALFMODE_MANUAL /* tap linear */
+} vdce_alfmode_t;
+
+/* type of algo*/
+typedef enum vdce_algo_type {
+ VDCE_ALGO_TAP_4CUBIC_CONVOLUTION = 0, /* cubic convolution */
+ VDCE_ALGO_TAP_4LINEAR_INTERPOLATION /* linear interpolation */
+} vdce_algo_type_t;
+
+/* for mode */
+typedef enum vdce_io_mode {
+ VDCE_FIELD_MODE = 0, /* Indicate that field mode */
+ VDCE_FRAME_MODE /* Indicate that frame mode */
+} vdce_io_mode_t;
+
+/* hardware and channel status */
+typedef enum vdce_processing_status {
+ VDCE_CHAN_FREE = 0, /* channel free */
+ VDCE_CHAN_BUSY, /* channel busy */
+ VDCE_CHAN_PENDING, /* Request pending */
+ VDCE_CHAN_UNINITIALISED, /* Parameters uninitialised */
+ VDCE_CHAN_PARAMS_INITIALISED, /* Parameters initialised */
+} vdce_processing_status_t;
+
+/* processing mode of image */
+typedef enum vdce_processing_mode {
+ VDCE_INTERLACED = 0, /* interlaced mode */
+ VDCE_PROGRESSIVE /* progressive mode */
+} vdce_processing_mode_t;
+
+/* image format */
+typedef enum vdce_image_fmt {
+ VDCE_IMAGE_FMT_420 = 0, /* 4:2:0 image format */
+ VDCE_IMAGE_FMT_422 = 1 /* 4:2:2 image format */
+} vdce_image_fmt_t;
+
+/*CCV operation mode */
+typedef enum vdce_ccv_mode {
+ VDCE_CCV_MODE_422_420 = 0, /* 4:2:2 to 4:2:0 */
+ VDCE_CCV_MODE_420_422, /* 4:2:0 to 4:2:2 */
+ VDCE_CCV_MODE_420_420 /* 4:2:0 to 4:2:0 */
+} vdce_ccv_mode_t;
+
+/*Resize operation mode */
+typedef enum vdce_rsz_mode {
+ VDCE_MODE_420 = 0, /* 4:2:2 */
+ VDCE_MODE_422, /* 4:2:0 */
+} vdce_rsz_blend_mode_t;
+
+/* ---------------Interface Data structures-----------------------------------*/
+/* Structure to configure the resize parameters */
+typedef struct vdce_rsz_params {
+ vdce_rsz_blend_mode_t rsz_mode; /* Value will not be used in native */
+ /*Mode. It will be used for stanalone */
+ /*resizing only */
+ vdce_codec_mode_t rsz_op_mode;
+ vdce_algo_type_t hrsz_mode;/* To suggest horizontal resizing mode */
+ /* eg convolution */
+ vdce_algo_type_t vrsz_mode; /* To suggest Vertical resizing mode */
+ /* eg convolution */
+ vdce_status_t hrsz_alf_enable; /* Suggest horizontal anti alias */
+ /* filter is on */
+ vdce_status_t vrsz_alf_enable; /* Suggest vertical anti alias filter */
+ /* is on */
+ vdce_alfmode_t hrsz_alf_mode; /* Suggest the anti alias filter mode */
+ unsigned char hrsz_alf_intensity;/* Intensity for coefficients calc */
+} vdce_rsz_params_t;
+
+/* Structure to configure the chrominance conversion parameters */
+typedef struct vdce_ccv_params {
+ vdce_ccv_mode_t conversion_type; /* Value will not be used in native */
+ /*Mode. It will be used for stanalone */
+ /*CCV only */
+ /* Below both parameters will be used only in case for trans codec */
+ vdce_codec_mode_t codec_mode_in;/* Type of input of codec conversion */
+ /*eg mpeg1 or other */
+ vdce_codec_mode_t codec_mode_out;/*Type of output of codec conversion */
+ /*eg mpeg2 or other */
+ vdce_algo_type_t hccv_type; /* Chrominance conversion functional */
+ /*type selection bit (for horz) */
+ vdce_algo_type_t vccv_type; /* Chrominance conversion functional */
+ /* type selection bit(for vert) */
+} vdce_ccv_params_t;
+
+/* Structure to configure the range maping parameters */
+typedef struct vdce_rmap_params {
+
+ unsigned char coeff_y; /* coeffcients of range mapping */
+ /*for Y component */
+ vdce_status_t rmap_yenable; /* Suggest that luminance range */
+ /*mapping is enable */
+ unsigned char coeff_c; /* coeffcients of range mapping for */
+ /* chroma component */
+ vdce_status_t rmap_cenable; /* Suggest that chrominace range */
+ /* mapping is enable */
+} vdce_rmap_params_t;
+
+/* Structure to configure the blending parameters */
+typedef struct blend_table {
+
+ unsigned char blend_cr; /* blend value for cr component */
+ unsigned char blend_cb; /* blend value for cb component */
+ unsigned char blend_y; /* blend value for y component */
+ unsigned char blend_value; /* Blend factor */
+} blend_table_t;
+
+typedef struct vdce_blend_params {
+ vdce_rsz_blend_mode_t blend_mode;
+ blend_table_t bld_lut[MAX_BLEND_TABLE]; /* 4 bitmap defined for blend */
+} vdce_blend_params_t;
+
+/* Structure to configure edge padding parameters */
+typedef struct vdce_epad_params {
+
+ unsigned char vext_chroma; /* Vertical extension value for */
+ /* chroma component */
+ unsigned char hext_chroma; /* horizontal extension value for */
+ /*chroma component */
+ unsigned char vext_luma; /* Vertical extension value for */
+ /* luma component */
+ unsigned char hext_luma; /* horizontal extension value for */
+ /*chroma component */
+} vdce_epad_params_t;
+
+/* Structure to configure input output format and sizes */
+typedef struct vdce_common_params {
+
+ vdce_processing_mode_t src_processing_mode;/* source processing mode */
+ /*interlaced or progressive */
+ vdce_io_mode_t src_mode; /* src mode field or frame */
+ vdce_io_mode_t res_mode; /* res mode field or frame */
+ vdce_io_mode_t src_bmp_mode; /* bmp mode field or frame */
+ vdce_proc_control_t proc_control; /* Luminace processing */
+ /*enable or not */
+ vdce_field_status_t field_status; /* Top field enable or not */
+
+ unsigned short src_hsz_luminance;/* input horizontal size for */
+ /*luminance component */
+ unsigned short src_vsz_luminance;/* input vertical size for */
+ /*luminance component */
+ unsigned short bmp_vsize; /* input vertical size for */
+ /*bitmap component */
+ unsigned short bmp_hsize; /* input horizontal size for */
+ /* bitmap component */
+ unsigned char src_hsp_luminance;/*horizontal starting position */
+ /* for luminance */
+ unsigned char src_vsp_luminance;/* vertical starting position */
+ /* for luminance */
+ unsigned char bmp_hsp_bitmap; /* hrz starting position for */
+ /* bitmap */
+ unsigned char res_hsp_luminance;/* Hrz starting position for */
+ /*luminance component for res */
+ unsigned char res_vsp_luminance;/* Vertical starting position for */
+ /*luminance component for res */
+ unsigned short dst_hsz_luminance;/* Hrz starting size for */
+ /*luminance component for res */
+ unsigned short dst_vsz_luminance;/* Vertical size for */
+ /* luminance */
+ /*component for result */
+ unsigned short res_hsp_bitmap; /* Horizontal starting pos */
+ /*for bitmap component */
+ unsigned short res_vsp_bitmap; /* vertical starting position */
+ /* for bitmap component */
+ unsigned short prcs_unit_value;/* Hold the prcs value by app */
+} vdce_common_params_t;
+
+/* precodec parameters configuration structure */
+typedef struct vdce_precodec_params {
+ vdce_rsz_params_t rsz_params;
+ vdce_ccv_params_t ccv_params;
+} vdce_precodec_params_t;
+
+/* postcodec parameters configuration structure */
+typedef struct vdce_postcodec_params {
+ vdce_rsz_params_t rsz_params;
+ vdce_rmap_params_t rmap_params;
+ vdce_blend_params_t blend_params;
+ vdce_ccv_params_t ccv_params;
+} vdce_postcodec_params_t;
+
+/* transcodec parameters configuration structure */
+typedef struct vdce_transcodec_params {
+ vdce_rsz_params_t rsz_params;
+ vdce_rmap_params_t rmap_params;
+ vdce_blend_params_t blend_params;
+ vdce_epad_params_t epad_params;
+ vdce_ccv_params_t ccv_params;
+} vdce_transcodec_params_t;
+
+/* Passed for setting VDCE parameters */
+typedef struct vdce_params {
+ vdce_mode_operation_t vdce_mode;
+ /* Bits position for enabling the various sub-modes */
+ /* 1 bit defienes resizing 2 blending 3 range mapping and 4 ccv */
+ unsigned char modes_control;
+ vdce_common_params_t common_params;
+ union {
+ vdce_precodec_params_t precodec_params;
+ vdce_postcodec_params_t postcodec_params;
+ vdce_transcodec_params_t transcodec_params;
+ vdce_epad_params_t epad_params;
+ vdce_rsz_params_t rsz_params;
+ vdce_rmap_params_t rmap_params;
+ vdce_blend_params_t blend_params;
+ vdce_ccv_params_t ccv_params;
+ } vdce_mode_params;
+} vdce_params_t;
+
+/* status parameters structure */
+typedef struct vdce_hw_status {
+ vdce_processing_status_t chan_status; /* get channel status */
+} vdce_hw_status_t;
+
+/* to allocate the memory*/
+typedef struct vdce_reqbufs {
+
+ vdce_image_type_t buf_type; /* typeof frame buffer */
+ int count; /* number of frame buffers to be allocated */
+ int num_lines; /* Number of lines i.e.vertical pitch for */
+ /* luma componenet */
+ int bytes_per_line; /* Number of lines i.e.horizontal pitch for */
+ /* luma componenet */
+ vdce_image_fmt_t image_type; /* Input image format */
+} vdce_reqbufs_t;
+
+/* assessed for quering the buffer to get physical address*/
+typedef struct vdce_buffer {
+
+ int index; /* buffer index number, 0 -> N-1 */
+ vdce_image_type_t buf_type;/* buffer type, input or output */
+ union {
+ unsigned int offset; /* physical address of the buffer, */
+ unsigned int virt_ptr;
+ };/* used in the mmap() system call */
+ int size; /* size */
+} vdce_buffer_t;
+
+/* structure to be passed while VDCE oparation */
+typedef struct vdce_address_start {
+ /* 0 is input buffer 1 is output and 2 in bitmap buffer */
+ vdce_buffer_t buffers[3];
+ /* Horizontal and vertical pitch */
+ unsigned int src_horz_pitch;
+ unsigned int res_horz_pitch;
+ unsigned int bmp_pitch;
+} vdce_address_start_t;
+
+#ifdef __KERNEL__
+/* ---------------Driver Structures-------------------------------------------*/
+/* enum for suggesting num of passes required */
+typedef enum vdce_num_pass {
+ VDCE_SINGLE_PASS = 1, /* VDCE driver will operate in single pass */
+ VDCE_MULTIPASS /* VDCE driver will operate in Multipass pass */
+} vdce_num_pass_t;
+
+/* enum for suggesting channel mode */
+typedef enum vdce_mode {
+ VDCE_MODE_BLOCKING = 0, /* channel opeend in blocking mode */
+ VDCE_MODE_NON_BLOCKING /* channel opened in non-blocking */
+} vdce_mode_t;
+
+typedef enum vdce_start_status {
+ VDCE_PASS1_STARTED = 0,
+ VDCE_PASS2_STARTED,
+ VDCE_COMPLETED
+} vdce_start_status_t;
+
+/* Global structure in driver */
+typedef struct device_params {
+ int module_usage_count; /* Keeps track of number of open chan */
+ struct completion sem_isr; /* sem to indicate the completion */
+ /*in case for blocking call */
+ /*struct semaphore array_sem;*/ /* sem to protect array entry */
+ spinlock_t irqlock;
+ void *inter_buffer; /* Address for inter buffer */
+ unsigned int inter_size; /* Size of intermediate buffer */
+ struct completion edma_sem;
+ struct completion device_access;
+} device_params_t;
+typedef struct vdce_buffer_info {
+ void *buffers[MAX_BUFFERS];
+ int size;
+ int num_allocated;
+} vdce_buffer_info_t;
+/* Channel specific device structure */
+typedef struct channel_config {
+ struct vdce_hw_config register_config[2];/* Instance of register */
+ /* mapping structure */
+ vdce_num_pass_t num_pass; /* Single pass or multipass */
+ vdce_buffer_info_t vdce_buffer[3];
+ vdce_params_t get_params; /*Instance for parameters send */
+ /* by application */
+ vdce_params_t get_params1;
+
+ vdce_mode_operation_t mode_state; /* VDCE channel mode */
+ vdce_mode_t channel_mode; /* Indiacte the blocking or */
+ /* non blocking */
+ int luma_chroma_phased; /* if 1 indicates luma is phased */
+ vdce_processing_status_t status; /* Indicates channel free/used*/
+ vdce_start_status_t vdce_complete; /* To keep track of isr */
+ vdce_image_fmt_t image_type_out; /* Input image type */
+ vdce_image_fmt_t image_type_in; /* Output image type */
+ unsigned int edma_operation; /* Keeps track whether edma
+ operation is required for
+ this channel. */
+
+} channel_config_t;
+
+typedef struct vdce_debug_info {
+ /* keeps track of number of interrupts */
+ int vdce_interrupt_count;
+ /* keeps track of number of non-block calls */
+ int vdce_nonblock_count;
+ /* keeps track of number of blocking calls */
+ int vdce_block_count;
+} vdce_debug_info_t;
+
+/* ---------------Function definition-----------------------------------------*/
+int malloc_buff(vdce_reqbufs_t *, channel_config_t *);
+int get_buf_address(vdce_buffer_t *, channel_config_t *);
+int free_buff(channel_config_t *);
+int vdce_set_multipass_address(vdce_address_start_t *, channel_config_t *);
+int vdce_set_address(vdce_address_start_t *, channel_config_t *,
+ int, u32, u32, u32);
+int vdce_start(vdce_address_start_t *, channel_config_t *);
+int add_to_array(channel_config_t *);
+int delete_from_array(void);
+void process_bottomhalf(unsigned long);
+int vdce_get_default(vdce_params_t *);
+int vdce_check_common_params(vdce_params_t *);
+int vdce_set_size_fmt(vdce_common_params_t *, channel_config_t *, int);
+int vdce_set_rszparams(vdce_params_t *, channel_config_t *,
+ vdce_mode_operation_t, int);
+int vdce_set_epadparams(vdce_epad_params_t *, channel_config_t *, int);
+int vdce_set_ccvparams(vdce_ccv_params_t *, channel_config_t *, int, int);
+int vdce_set_blendparams(vdce_blend_params_t *, channel_config_t *, int, int);
+int vdce_set_rmapparams(vdce_rmap_params_t *, channel_config_t *, int);
+int vdce_set_params(vdce_params_t *, channel_config_t *);
+int vdce_get_params(vdce_params_t *, channel_config_t *);
+int vdce_set_priority(int, channel_config_t *);
+int vdce_get_priority(int *, channel_config_t *);
+int vdce_get_status(vdce_hw_status_t *, channel_config_t *);
+int free_num_buffers(int *, unsigned long, unsigned long);
+irqreturn_t vdce_isr(int, void *);
+#endif
+#endif
diff --git a/include/linux/device.h b/include/linux/device.h
index 9d6464ea..1f347781 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -1007,7 +1007,7 @@ int _dev_info(const struct device *dev, const char *fmt, ...)
* Note that the definition of dev_info below is actually _dev_info
* and a macro is used to avoid redefining dev_info
*/
-
+//#define DEBUG
#define dev_info(dev, fmt, arg...) _dev_info(dev, fmt, ##arg)
#if defined(CONFIG_DYNAMIC_DEBUG)
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 94af4185..8bb6f0ab 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -97,8 +97,39 @@ static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
}
#endif
+/*
+ * Set both the DMA mask and the coherent DMA mask to the same thing.
+ * Note that we don't check the return value from dma_set_coherent_mask()
+ * as the DMA API guarantees that the coherent DMA mask can be set to
+ * the same or smaller than the streaming DMA mask.
+ */
+static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
+{
+ int rc = dma_set_mask(dev, mask);
+ if (rc == 0)
+ dma_set_coherent_mask(dev, mask);
+ return rc;
+}
+
+/*
+ * Similar to the above, except it deals with the case where the device
+ * does not have dev->dma_mask appropriately setup.
+ */
+static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
+{
+ dev->dma_mask = &dev->coherent_dma_mask;
+ return dma_set_mask_and_coherent(dev, mask);
+}
+
extern u64 dma_get_required_mask(struct device *dev);
+#ifndef set_arch_dma_coherent_ops
+static inline int set_arch_dma_coherent_ops(struct device *dev)
+{
+ return 0;
+}
+#endif
+
static inline unsigned int dma_get_max_seg_size(struct device *dev)
{
return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
@@ -129,6 +160,13 @@ static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
return -EIO;
}
+#ifndef dma_max_pfn
+static inline unsigned long dma_max_pfn(struct device *dev)
+{
+ return *dev->dma_mask >> PAGE_SHIFT;
+}
+#endif
+
static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag)
{
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 91ac8da2..c47376aa 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -22,6 +22,7 @@
#define LINUX_DMAENGINE_H
#include <linux/device.h>
+#include <linux/err.h>
#include <linux/uio.h>
#include <linux/bug.h>
#include <linux/scatterlist.h>
@@ -36,19 +37,22 @@
*/
typedef s32 dma_cookie_t;
#define DMA_MIN_COOKIE 1
-#define DMA_MAX_COOKIE INT_MAX
-#define dma_submit_error(cookie) ((cookie) < 0 ? 1 : 0)
+static inline int dma_submit_error(dma_cookie_t cookie)
+{
+ return cookie < 0 ? cookie : 0;
+}
/**
* enum dma_status - DMA transaction status
- * @DMA_SUCCESS: transaction completed successfully
+ * @DMA_COMPLETE: transaction completed
* @DMA_IN_PROGRESS: transaction not yet processed
* @DMA_PAUSED: transaction is paused
* @DMA_ERROR: transaction failed
*/
+
enum dma_status {
- DMA_SUCCESS,
+ DMA_COMPLETE,
DMA_IN_PROGRESS,
DMA_PAUSED,
DMA_ERROR,
@@ -186,14 +190,10 @@ struct dma_interleaved_template {
enum dma_ctrl_flags {
DMA_PREP_INTERRUPT = (1 << 0),
DMA_CTRL_ACK = (1 << 1),
- DMA_COMPL_SKIP_SRC_UNMAP = (1 << 2),
- DMA_COMPL_SKIP_DEST_UNMAP = (1 << 3),
- DMA_COMPL_SRC_UNMAP_SINGLE = (1 << 4),
- DMA_COMPL_DEST_UNMAP_SINGLE = (1 << 5),
- DMA_PREP_PQ_DISABLE_P = (1 << 6),
- DMA_PREP_PQ_DISABLE_Q = (1 << 7),
- DMA_PREP_CONTINUE = (1 << 8),
- DMA_PREP_FENCE = (1 << 9),
+ DMA_PREP_PQ_DISABLE_P = (1 << 2),
+ DMA_PREP_PQ_DISABLE_Q = (1 << 3),
+ DMA_PREP_CONTINUE = (1 << 4),
+ DMA_PREP_FENCE = (1 << 5),
};
/**
@@ -306,6 +306,7 @@ enum dma_slave_buswidth {
DMA_SLAVE_BUSWIDTH_UNDEFINED = 0,
DMA_SLAVE_BUSWIDTH_1_BYTE = 1,
DMA_SLAVE_BUSWIDTH_2_BYTES = 2,
+ DMA_SLAVE_BUSWIDTH_3_BYTES = 3,
DMA_SLAVE_BUSWIDTH_4_BYTES = 4,
DMA_SLAVE_BUSWIDTH_8_BYTES = 8,
};
@@ -371,6 +372,53 @@ struct dma_slave_config {
unsigned int slave_id;
};
+/**
+ * enum dma_residue_granularity - Granularity of the reported transfer residue
+ * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The
+ * DMA channel is only able to tell whether a descriptor has been completed or
+ * not, which means residue reporting is not supported by this channel. The
+ * residue field of the dma_tx_state field will always be 0.
+ * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully
+ * completed segment of the transfer (For cyclic transfers this is after each
+ * period). This is typically implemented by having the hardware generate an
+ * interrupt after each transferred segment and then the drivers updates the
+ * outstanding residue by the size of the segment. Another possibility is if
+ * the hardware supports scatter-gather and the segment descriptor has a field
+ * which gets set after the segment has been completed. The driver then counts
+ * the number of segments without the flag set to compute the residue.
+ * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred
+ * burst. This is typically only supported if the hardware has a progress
+ * register of some sort (E.g. a register with the current read/write address
+ * or a register with the amount of bursts/beats/bytes that have been
+ * transferred or still need to be transferred).
+ */
+enum dma_residue_granularity {
+ DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0,
+ DMA_RESIDUE_GRANULARITY_SEGMENT = 1,
+ DMA_RESIDUE_GRANULARITY_BURST = 2,
+};
+
+/* struct dma_slave_caps - expose capabilities of a slave channel only
+ *
+ * @src_addr_widths: bit mask of src addr widths the channel supports
+ * @dstn_addr_widths: bit mask of dstn addr widths the channel supports
+ * @directions: bit mask of slave direction the channel supported
+ * since the enum dma_transfer_direction is not defined as bits for each
+ * type of direction, the dma controller should fill (1 << <TYPE>) and same
+ * should be checked by controller as well
+ * @cmd_pause: true, if pause and thereby resume is supported
+ * @cmd_terminate: true, if terminate cmd is supported
+ * @residue_granularity: granularity of the reported transfer residue
+ */
+struct dma_slave_caps {
+ u32 src_addr_widths;
+ u32 dstn_addr_widths;
+ u32 directions;
+ bool cmd_pause;
+ bool cmd_terminate;
+ enum dma_residue_granularity residue_granularity;
+};
+
static inline const char *dma_chan_name(struct dma_chan *chan)
{
return dev_name(&chan->dev->device);
@@ -392,6 +440,16 @@ void dma_chan_cleanup(struct kref *kref);
typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
typedef void (*dma_async_tx_callback)(void *dma_async_param);
+struct dmaengine_unmap_data {
+ u8 map_cnt;
+ u8 to_cnt;
+ u8 from_cnt;
+ u8 bidi_cnt;
+ struct device *dev;
+ struct kref kref;
+ size_t len;
+ dma_addr_t addr[0];
+};
/**
* struct dma_async_tx_descriptor - async transaction descriptor
* ---dma generic offload fields---
@@ -417,12 +475,46 @@ struct dma_async_tx_descriptor {
dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx);
dma_async_tx_callback callback;
void *callback_param;
+ struct dmaengine_unmap_data *unmap;
#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
struct dma_async_tx_descriptor *next;
struct dma_async_tx_descriptor *parent;
spinlock_t lock;
#endif
};
+#ifdef CONFIG_DMA_ENGINE
+static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
+ struct dmaengine_unmap_data *unmap)
+{
+ kref_get(&unmap->kref);
+ tx->unmap = unmap;
+}
+
+struct dmaengine_unmap_data *
+dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags);
+void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap);
+#else
+static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
+ struct dmaengine_unmap_data *unmap)
+{
+}
+static inline struct dmaengine_unmap_data *
+dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
+{
+ return NULL;
+}
+static inline void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
+{
+}
+#endif
+
+static inline void dma_descriptor_unmap(struct dma_async_tx_descriptor *tx)
+{
+ if (tx->unmap) {
+ dmaengine_unmap_put(tx->unmap);
+ tx->unmap = NULL;
+ }
+}
#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
static inline void txd_lock(struct dma_async_tx_descriptor *txd)
@@ -591,7 +683,7 @@ struct dma_device {
struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
size_t period_len, enum dma_transfer_direction direction,
- unsigned long flags, void *context);
+ unsigned long flags);
struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
struct dma_chan *chan, struct dma_interleaved_template *xt,
unsigned long flags);
@@ -602,6 +694,7 @@ struct dma_device {
dma_cookie_t cookie,
struct dma_tx_state *txstate);
void (*device_issue_pending)(struct dma_chan *chan);
+ int (*device_slave_caps)(struct dma_chan *chan, struct dma_slave_caps *caps);
};
static inline int dmaengine_device_control(struct dma_chan *chan,
@@ -665,7 +758,7 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
unsigned long flags)
{
return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
- period_len, dir, flags, NULL);
+ period_len, dir, flags);
}
static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
@@ -675,6 +768,21 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
return chan->device->device_prep_interleaved_dma(chan, xt, flags);
}
+static inline int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
+{
+ if (!chan || !caps)
+ return -EINVAL;
+
+ /* check if the channel supports slave transactions */
+ if (!test_bit(DMA_SLAVE, chan->device->cap_mask.bits))
+ return -ENXIO;
+
+ if (chan->device->device_slave_caps)
+ return chan->device->device_slave_caps(chan, caps);
+
+ return -ENXIO;
+}
+
static inline int dmaengine_terminate_all(struct dma_chan *chan)
{
return dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
@@ -945,10 +1053,10 @@ static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie,
{
if (last_complete <= last_used) {
if ((cookie <= last_complete) || (cookie > last_used))
- return DMA_SUCCESS;
+ return DMA_COMPLETE;
} else {
if ((cookie <= last_complete) && (cookie > last_used))
- return DMA_SUCCESS;
+ return DMA_COMPLETE;
}
return DMA_IN_PROGRESS;
}
@@ -963,28 +1071,45 @@ dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used,
}
}
-enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
#ifdef CONFIG_DMA_ENGINE
+struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
+enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
void dma_issue_pending_all(void);
-struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param);
-struct dma_chan *dma_request_slave_channel(struct device *dev, char *name);
+struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
+ dma_filter_fn fn, void *fn_param);
+struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
+ const char *name);
+struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name);
void dma_release_channel(struct dma_chan *chan);
#else
+static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
+{
+ return NULL;
+}
+static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
+{
+ return DMA_COMPLETE;
+}
static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
{
- return DMA_SUCCESS;
+ return DMA_COMPLETE;
}
static inline void dma_issue_pending_all(void)
{
}
-static inline struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask,
+static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
dma_filter_fn fn, void *fn_param)
{
return NULL;
}
+static inline struct dma_chan *dma_request_slave_channel_reason(
+ struct device *dev, const char *name)
+{
+ return ERR_PTR(-ENODEV);
+}
static inline struct dma_chan *dma_request_slave_channel(struct device *dev,
- char *name)
+ const char *name)
{
return NULL;
}
@@ -998,16 +1123,17 @@ static inline void dma_release_channel(struct dma_chan *chan)
int dma_async_device_register(struct dma_device *device);
void dma_async_device_unregister(struct dma_device *device);
void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
-struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
+struct dma_chan *dma_get_slave_channel(struct dma_chan *chan);
+struct dma_chan *dma_get_any_slave_channel(struct dma_device *device);
struct dma_chan *net_dma_find_channel(void);
#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
#define dma_request_slave_channel_compat(mask, x, y, dev, name) \
__dma_request_slave_channel_compat(&(mask), x, y, dev, name)
static inline struct dma_chan
-*__dma_request_slave_channel_compat(dma_cap_mask_t *mask, dma_filter_fn fn,
- void *fn_param, struct device *dev,
- char *name)
+*__dma_request_slave_channel_compat(const dma_cap_mask_t *mask,
+ dma_filter_fn fn, void *fn_param,
+ struct device *dev, char *name)
{
struct dma_chan *chan;
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 3d7df3d3..9bf2f1fc 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -333,7 +333,6 @@ typedef efi_status_t efi_query_capsule_caps_t(efi_capsule_header_t **capsules,
unsigned long count,
u64 *max_size,
int *reset_type);
-typedef efi_status_t efi_query_variable_store_t(u32 attributes, unsigned long size);
/*
* EFI Configuration Table and GUID definitions
@@ -576,15 +575,9 @@ extern void efi_enter_virtual_mode (void); /* switch EFI to virtual mode, if pos
#ifdef CONFIG_X86
extern void efi_late_init(void);
extern void efi_free_boot_services(void);
-extern efi_status_t efi_query_variable_store(u32 attributes, unsigned long size);
#else
static inline void efi_late_init(void) {}
static inline void efi_free_boot_services(void) {}
-
-static inline efi_status_t efi_query_variable_store(u32 attributes, unsigned long size)
-{
- return EFI_SUCCESS;
-}
#endif
extern void __iomem *efi_lookup_mapped_addr(u64 phys_addr);
extern u64 efi_get_iobase (void);
@@ -738,7 +731,7 @@ struct efivar_operations {
efi_get_variable_t *get_variable;
efi_get_next_variable_t *get_next_variable;
efi_set_variable_t *set_variable;
- efi_query_variable_store_t *query_variable_store;
+ efi_query_variable_info_t *query_variable_info;
};
struct efivars {
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index 52da2a25..e5ca8ef5 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -89,7 +89,6 @@ typedef void (*ftrace_func_t)(unsigned long ip, unsigned long parent_ip,
* that the call back has its own recursion protection. If it does
* not set this, then the ftrace infrastructure will add recursion
* protection for the caller.
- * STUB - The ftrace_ops is just a place holder.
*/
enum {
FTRACE_OPS_FL_ENABLED = 1 << 0,
@@ -99,7 +98,6 @@ enum {
FTRACE_OPS_FL_SAVE_REGS = 1 << 4,
FTRACE_OPS_FL_SAVE_REGS_IF_SUPPORTED = 1 << 5,
FTRACE_OPS_FL_RECURSION_SAFE = 1 << 6,
- FTRACE_OPS_FL_STUB = 1 << 7,
};
struct ftrace_ops {
@@ -396,6 +394,7 @@ ssize_t ftrace_filter_write(struct file *file, const char __user *ubuf,
size_t cnt, loff_t *ppos);
ssize_t ftrace_notrace_write(struct file *file, const char __user *ubuf,
size_t cnt, loff_t *ppos);
+loff_t ftrace_regex_lseek(struct file *file, loff_t offset, int whence);
int ftrace_regex_release(struct inode *inode, struct file *file);
void __init
@@ -568,8 +567,6 @@ static inline int
ftrace_regex_release(struct inode *inode, struct file *file) { return -ENODEV; }
#endif /* CONFIG_DYNAMIC_FTRACE */
-loff_t ftrace_filter_lseek(struct file *file, loff_t offset, int whence);
-
/* totally disable ftrace - can not re-enable after this */
void ftrace_kill(void);
diff --git a/include/linux/kexec.h b/include/linux/kexec.h
index d78d28a7..d2e6927b 100644
--- a/include/linux/kexec.h
+++ b/include/linux/kexec.h
@@ -200,8 +200,6 @@ extern size_t vmcoreinfo_max_size;
int __init parse_crashkernel(char *cmdline, unsigned long long system_ram,
unsigned long long *crash_size, unsigned long long *crash_base);
-int parse_crashkernel_high(char *cmdline, unsigned long long system_ram,
- unsigned long long *crash_size, unsigned long long *crash_base);
int parse_crashkernel_low(char *cmdline, unsigned long long system_ram,
unsigned long long *crash_size, unsigned long long *crash_base);
int crash_shrink_memory(unsigned long new_size);
diff --git a/include/linux/libata.h b/include/linux/libata.h
index eae7a053..91c9d109 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -398,7 +398,6 @@ enum {
ATA_HORKAGE_NOSETXFER = (1 << 14), /* skip SETXFER, SATA only */
ATA_HORKAGE_BROKEN_FPDMA_AA = (1 << 15), /* skip AA */
ATA_HORKAGE_DUMP_ID = (1 << 16), /* dump IDENTIFY data */
- ATA_HORKAGE_MAX_SEC_LBA48 = (1 << 17), /* Set max sects to 65535 */
/* DMA mask for user DMA control: User visible values; DO NOT
renumber */
diff --git a/include/linux/media.h b/include/linux/media.h
new file mode 100644
index 00000000..f0c23386
--- /dev/null
+++ b/include/linux/media.h
@@ -0,0 +1,133 @@
+/*
+ * Multimedia device API
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ * Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __LINUX_MEDIA_H
+#define __LINUX_MEDIA_H
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+#include <linux/version.h>
+
+#define MEDIA_API_VERSION KERNEL_VERSION(0, 1, 0)
+
+struct media_device_info {
+ char driver[16];
+ char model[32];
+ char serial[40];
+ char bus_info[32];
+ __u32 media_version;
+ __u32 hw_revision;
+ __u32 driver_version;
+ __u32 reserved[31];
+};
+
+#define MEDIA_ENT_ID_FLAG_NEXT (1 << 31)
+
+#define MEDIA_ENT_TYPE_SHIFT 16
+#define MEDIA_ENT_TYPE_MASK 0x00ff0000
+#define MEDIA_ENT_SUBTYPE_MASK 0x0000ffff
+
+#define MEDIA_ENT_T_DEVNODE (1 << MEDIA_ENT_TYPE_SHIFT)
+#define MEDIA_ENT_T_DEVNODE_V4L (MEDIA_ENT_T_DEVNODE + 1)
+#define MEDIA_ENT_T_DEVNODE_FB (MEDIA_ENT_T_DEVNODE + 2)
+#define MEDIA_ENT_T_DEVNODE_ALSA (MEDIA_ENT_T_DEVNODE + 3)
+#define MEDIA_ENT_T_DEVNODE_DVB (MEDIA_ENT_T_DEVNODE + 4)
+
+#define MEDIA_ENT_T_V4L2_SUBDEV (2 << MEDIA_ENT_TYPE_SHIFT)
+#define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR (MEDIA_ENT_T_V4L2_SUBDEV + 1)
+#define MEDIA_ENT_T_V4L2_SUBDEV_FLASH (MEDIA_ENT_T_V4L2_SUBDEV + 2)
+#define MEDIA_ENT_T_V4L2_SUBDEV_LENS (MEDIA_ENT_T_V4L2_SUBDEV + 3)
+#define MEDIA_ENT_T_V4L2_SUBDEV_DECODER (MEDIA_ENT_T_V4L2_SUBDEV + 4)
+
+#define MEDIA_ENT_FL_DEFAULT (1 << 0)
+
+struct media_entity_desc {
+ __u32 id;
+ char name[32];
+ __u32 type;
+ __u32 revision;
+ __u32 flags;
+ __u32 group_id;
+ __u16 pads;
+ __u16 links;
+
+ __u32 reserved[4];
+
+ union {
+ /* Node specifications */
+ struct {
+ __u32 major;
+ __u32 minor;
+ } v4l;
+ struct {
+ __u32 major;
+ __u32 minor;
+ } fb;
+ struct {
+ __u32 card;
+ __u32 device;
+ __u32 subdevice;
+ } alsa;
+ int dvb;
+
+ /* Sub-device specifications */
+ /* Nothing needed yet */
+ __u8 raw[184];
+ };
+};
+
+#define MEDIA_PAD_FL_INPUT (1 << 0)
+#define MEDIA_PAD_FL_OUTPUT (1 << 1)
+
+struct media_pad_desc {
+ __u32 entity; /* entity ID */
+ __u16 index; /* pad index */
+ __u32 flags; /* pad flags */
+ __u32 reserved[2];
+};
+
+#define MEDIA_LNK_FL_ENABLED (1 << 0)
+#define MEDIA_LNK_FL_IMMUTABLE (1 << 1)
+#define MEDIA_LNK_FL_DYNAMIC (1 << 2)
+
+struct media_link_desc {
+ struct media_pad_desc source;
+ struct media_pad_desc sink;
+ __u32 flags;
+ __u32 reserved[2];
+};
+
+struct media_links_enum {
+ __u32 entity;
+ /* Should have enough room for pads elements */
+ struct media_pad_desc __user *pads;
+ /* Should have enough room for links elements */
+ struct media_link_desc __user *links;
+ __u32 reserved[4];
+};
+
+#define MEDIA_IOC_DEVICE_INFO _IOWR('M', 1, struct media_device_info)
+#define MEDIA_IOC_ENUM_ENTITIES _IOWR('M', 2, struct media_entity_desc)
+#define MEDIA_IOC_ENUM_LINKS _IOWR('M', 3, struct media_links_enum)
+#define MEDIA_IOC_SETUP_LINK _IOWR('M', 4, struct media_link_desc)
+
+#endif /* __LINUX_MEDIA_H */
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 0ab61320..543d3045 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -26,8 +26,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
-
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/*
* Register values.
@@ -42,8 +41,15 @@
#define DAVINCI_VC_WFIFO 0x24
#define DAVINCI_VC_FIFOSTAT 0x28
#define DAVINCI_VC_TST_CTRL 0x2C
+#define DAVINCI_VC_REG00 0x80
+#define DAVINCI_VC_REG01 0x84
+#define DAVINCI_VC_REG02 0x88
+#define DAVINCI_VC_REG03 0x8C
+#define DAVINCI_VC_REG04 0x90
#define DAVINCI_VC_REG05 0x94
+#define DAVINCI_VC_REG06 0x98
#define DAVINCI_VC_REG09 0xA4
+#define DAVINCI_VC_REG10 0xA8
#define DAVINCI_VC_REG12 0xB0
/* DAVINCI_VC_CTRL bit fields */
diff --git a/include/linux/mm.h b/include/linux/mm.h
index e2091b88..e19ff30a 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1611,8 +1611,6 @@ int vm_insert_pfn(struct vm_area_struct *vma, unsigned long addr,
unsigned long pfn);
int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
unsigned long pfn);
-int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, unsigned long len);
-
struct page *follow_page_mask(struct vm_area_struct *vma,
unsigned long address, unsigned int foll_flags,
diff --git a/include/linux/netfilter/ipset/ip_set_ahash.h b/include/linux/netfilter/ipset/ip_set_ahash.h
index 0214c4c1..01d25e6f 100644
--- a/include/linux/netfilter/ipset/ip_set_ahash.h
+++ b/include/linux/netfilter/ipset/ip_set_ahash.h
@@ -291,7 +291,6 @@ ip_set_hash_destroy(struct ip_set *set)
#define type_pf_data_tlist TOKEN(TYPE, PF, _data_tlist)
#define type_pf_data_next TOKEN(TYPE, PF, _data_next)
#define type_pf_data_flags TOKEN(TYPE, PF, _data_flags)
-#define type_pf_data_reset_flags TOKEN(TYPE, PF, _data_reset_flags)
#ifdef IP_SET_HASH_WITH_NETS
#define type_pf_data_match TOKEN(TYPE, PF, _data_match)
#else
@@ -386,9 +385,9 @@ type_pf_resize(struct ip_set *set, bool retried)
struct ip_set_hash *h = set->data;
struct htable *t, *orig = h->table;
u8 htable_bits = orig->htable_bits;
- struct type_pf_elem *data;
+ const struct type_pf_elem *data;
struct hbucket *n, *m;
- u32 i, j, flags = 0;
+ u32 i, j;
int ret;
retry:
@@ -413,16 +412,9 @@ retry:
n = hbucket(orig, i);
for (j = 0; j < n->pos; j++) {
data = ahash_data(n, j);
-#ifdef IP_SET_HASH_WITH_NETS
- flags = 0;
- type_pf_data_reset_flags(data, &flags);
-#endif
m = hbucket(t, HKEY(data, h->initval, htable_bits));
- ret = type_pf_elem_add(m, data, AHASH_MAX(h), flags);
+ ret = type_pf_elem_add(m, data, AHASH_MAX(h), 0);
if (ret < 0) {
-#ifdef IP_SET_HASH_WITH_NETS
- type_pf_data_flags(data, flags);
-#endif
read_unlock_bh(&set->lock);
ahash_destroy(t);
if (ret == -EAGAIN)
@@ -844,9 +836,9 @@ type_pf_tresize(struct ip_set *set, bool retried)
struct ip_set_hash *h = set->data;
struct htable *t, *orig = h->table;
u8 htable_bits = orig->htable_bits;
- struct type_pf_elem *data;
+ const struct type_pf_elem *data;
struct hbucket *n, *m;
- u32 i, j, flags = 0;
+ u32 i, j;
int ret;
/* Try to cleanup once */
@@ -881,17 +873,10 @@ retry:
n = hbucket(orig, i);
for (j = 0; j < n->pos; j++) {
data = ahash_tdata(n, j);
-#ifdef IP_SET_HASH_WITH_NETS
- flags = 0;
- type_pf_data_reset_flags(data, &flags);
-#endif
m = hbucket(t, HKEY(data, h->initval, htable_bits));
- ret = type_pf_elem_tadd(m, data, AHASH_MAX(h), flags,
- ip_set_timeout_get(type_pf_data_timeout(data)));
+ ret = type_pf_elem_tadd(m, data, AHASH_MAX(h), 0,
+ ip_set_timeout_get(type_pf_data_timeout(data)));
if (ret < 0) {
-#ifdef IP_SET_HASH_WITH_NETS
- type_pf_data_flags(data, flags);
-#endif
read_unlock_bh(&set->lock);
ahash_destroy(t);
if (ret == -EAGAIN)
@@ -1202,7 +1187,6 @@ type_pf_gc_init(struct ip_set *set)
#undef type_pf_data_tlist
#undef type_pf_data_next
#undef type_pf_data_flags
-#undef type_pf_data_reset_flags
#undef type_pf_data_match
#undef type_pf_elem
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
new file mode 100644
index 00000000..d3901b0b
--- /dev/null
+++ b/include/linux/platform_data/edma.h
@@ -0,0 +1,187 @@
+/*
+ * TI EDMA definitions
+ *
+ * Copyright (C) 2006-2013 Texas Instruments.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/*
+ * This EDMA3 programming framework exposes two basic kinds of resource:
+ *
+ * Channel Triggers transfers, usually from a hardware event but
+ * also manually or by "chaining" from DMA completions.
+ * Each channel is coupled to a Parameter RAM (PaRAM) slot.
+ *
+ * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
+ * "set"), source and destination addresses, a link to a
+ * next PaRAM slot (if any), options for the transfer, and
+ * instructions for updating those addresses. There are
+ * more than twice as many slots as event channels.
+ *
+ * Each PaRAM set describes a sequence of transfers, either for one large
+ * buffer or for several discontiguous smaller buffers. An EDMA transfer
+ * is driven only from a channel, which performs the transfers specified
+ * in its PaRAM slot until there are no more transfers. When that last
+ * transfer completes, the "link" field may be used to reload the channel's
+ * PaRAM slot with a new transfer descriptor.
+ *
+ * The EDMA Channel Controller (CC) maps requests from channels into physical
+ * Transfer Controller (TC) requests when the channel triggers (by hardware
+ * or software events, or by chaining). The two physical DMA channels provided
+ * by the TCs are thus shared by many logical channels.
+ *
+ * DaVinci hardware also has a "QDMA" mechanism which is not currently
+ * supported through this interface. (DSP firmware uses it though.)
+ */
+
+#ifndef EDMA_H_
+#define EDMA_H_
+
+/* PaRAM slots are laid out like this */
+struct edmacc_param {
+ unsigned int opt;
+ unsigned int src;
+ unsigned int a_b_cnt;
+ unsigned int dst;
+ unsigned int src_dst_bidx;
+ unsigned int link_bcntrld;
+ unsigned int src_dst_cidx;
+ unsigned int ccnt;
+};
+
+/* fields in edmacc_param.opt */
+#define SAM BIT(0)
+#define DAM BIT(1)
+#define SYNCDIM BIT(2)
+#define STATIC BIT(3)
+#define EDMA_FWID (0x07 << 8)
+#define TCCMODE BIT(11)
+#define EDMA_TCC(t) ((t) << 12)
+#define TCINTEN BIT(20)
+#define ITCINTEN BIT(21)
+#define TCCHEN BIT(22)
+#define ITCCHEN BIT(23)
+
+/*ch_status paramater of callback function possible values*/
+#define EDMA_DMA_COMPLETE 1
+#define EDMA_DMA_CC_ERROR 2
+#define EDMA_DMA_TC1_ERROR 3
+#define EDMA_DMA_TC2_ERROR 4
+
+enum address_mode {
+ INCR = 0,
+ FIFO = 1
+};
+
+enum fifo_width {
+ W8BIT = 0,
+ W16BIT = 1,
+ W32BIT = 2,
+ W64BIT = 3,
+ W128BIT = 4,
+ W256BIT = 5
+};
+
+enum dma_event_q {
+ EVENTQ_0 = 0,
+ EVENTQ_1 = 1,
+ EVENTQ_2 = 2,
+ EVENTQ_3 = 3,
+ EVENTQ_DEFAULT = -1
+};
+
+enum sync_dimension {
+ ASYNC = 0,
+ ABSYNC = 1
+};
+
+#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
+#define EDMA_CTLR(i) ((i) >> 16)
+#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
+
+#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
+#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
+#define EDMA_CONT_PARAMS_ANY 1001
+#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
+#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
+
+#define EDMA_MAX_CC 2
+
+/* alloc/free DMA channels and their dedicated parameter RAM slots */
+int edma_alloc_channel(int channel,
+ void (*callback)(unsigned channel, u16 ch_status, void *data),
+ void *data, enum dma_event_q);
+void edma_free_channel(unsigned channel);
+
+/* alloc/free parameter RAM slots */
+int edma_alloc_slot(unsigned ctlr, int slot);
+void edma_free_slot(unsigned slot);
+
+/* alloc/free a set of contiguous parameter RAM slots */
+int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
+int edma_free_cont_slots(unsigned slot, int count);
+
+/* calls that operate on part of a parameter RAM slot */
+void edma_set_src(unsigned slot, dma_addr_t src_port,
+ enum address_mode mode, enum fifo_width);
+void edma_set_dest(unsigned slot, dma_addr_t dest_port,
+ enum address_mode mode, enum fifo_width);
+dma_addr_t edma_get_position(unsigned slot, bool dst);
+//void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
+void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
+void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
+ u16 bcnt_rld, enum sync_dimension sync_mode);
+void edma_link(unsigned from, unsigned to);
+void edma_unlink(unsigned from);
+
+/* calls that operate on an entire parameter RAM slot */
+void edma_write_slot(unsigned slot, const struct edmacc_param *params);
+void edma_read_slot(unsigned slot, struct edmacc_param *params);
+
+/* channel control operations */
+int edma_start(unsigned channel);
+void edma_stop(unsigned channel);
+void edma_clean_channel(unsigned channel);
+void edma_clear_event(unsigned channel);
+void edma_pause(unsigned channel);
+void edma_resume(unsigned channel);
+
+void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no);
+
+struct edma_rsv_info {
+
+ const s16 (*rsv_chans)[2];
+ const s16 (*rsv_slots)[2];
+};
+
+/* platform_data for EDMA driver */
+struct edma_soc_info {
+
+ /* how many dma resources of each type */
+ unsigned n_channel;
+ unsigned n_region;
+ unsigned n_slot;
+ unsigned n_tc;
+ unsigned n_cc;
+ /*
+ * Default queue is expected to be a low-priority queue.
+ * This way, long transfers on the default queue started
+ * by the codec engine will not cause audio defects.
+ */
+ enum dma_event_q default_queue;
+
+ /* Resource reservation for other cores */
+ struct edma_rsv_info *rsv;
+
+ const s8 (*queue_tc_mapping)[2];
+ /*const*/ s8 (*queue_priority_mapping)[2];
+};
+
+int edma_trigger_channel(unsigned);
+
+#endif
diff --git a/include/linux/platform_data/mmc-davinci.h b/include/linux/platform_data/mmc-davinci.h
index 5ba6b22c..9cea4ee3 100644
--- a/include/linux/platform_data/mmc-davinci.h
+++ b/include/linux/platform_data/mmc-davinci.h
@@ -23,9 +23,6 @@ struct davinci_mmc_config {
/* any additional host capabilities: OR'd in to mmc->f_caps */
u32 caps;
- /* Version of the MMC/SD controller */
- u8 version;
-
/* Number of sg segments */
u8 nr_sg;
};
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b3..c0dd2478 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
#ifndef __ARCH_ARM_DAVINCI_SPI_H
#define __ARCH_ARM_DAVINCI_SPI_H
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#define SPI_INTERN_CS 0xFF
@@ -52,7 +52,10 @@ struct davinci_spi_platform_data {
bool cshold_bug;
enum dma_event_q dma_event_q;
};
-
+/* resource flags for IORESOURCE_DMA resources */
+#define IORESOURCE_DMA_RX_CHAN 0x01
+#define IORESOURCE_DMA_TX_CHAN 0x02
+#define IORESOURCE_DMA_EVENT_Q 0x04
/**
* davinci_spi_config - Per-chip-select configuration for SPI slave devices
*
diff --git a/include/linux/preempt.h b/include/linux/preempt.h
index 87a03c74..5a710b9c 100644
--- a/include/linux/preempt.h
+++ b/include/linux/preempt.h
@@ -93,20 +93,14 @@ do { \
#else /* !CONFIG_PREEMPT_COUNT */
-/*
- * Even if we don't have any preemption, we need preempt disable/enable
- * to be barriers, so that we don't have things like get_user/put_user
- * that can cause faults and scheduling migrate into our preempt-protected
- * region.
- */
-#define preempt_disable() barrier()
-#define sched_preempt_enable_no_resched() barrier()
-#define preempt_enable_no_resched() barrier()
-#define preempt_enable() barrier()
-
-#define preempt_disable_notrace() barrier()
-#define preempt_enable_no_resched_notrace() barrier()
-#define preempt_enable_notrace() barrier()
+#define preempt_disable() do { } while (0)
+#define sched_preempt_enable_no_resched() do { } while (0)
+#define preempt_enable_no_resched() do { } while (0)
+#define preempt_enable() do { } while (0)
+
+#define preempt_disable_notrace() do { } while (0)
+#define preempt_enable_no_resched_notrace() do { } while (0)
+#define preempt_enable_notrace() do { } while (0)
#endif /* CONFIG_PREEMPT_COUNT */
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 94dfb2aa..8307f2f9 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -117,7 +117,6 @@ struct proc_dir_entry *proc_create_data(const char *name, umode_t mode,
const struct file_operations *proc_fops,
void *data);
extern void remove_proc_entry(const char *name, struct proc_dir_entry *parent);
-extern int remove_proc_subtree(const char *name, struct proc_dir_entry *parent);
struct pid_namespace;
@@ -203,7 +202,6 @@ static inline struct proc_dir_entry *proc_create_data(const char *name,
return NULL;
}
#define remove_proc_entry(name, parent) do {} while (0)
-#define remove_proc_subtree(name, parent) do {} while (0)
static inline struct proc_dir_entry *proc_symlink(const char *name,
struct proc_dir_entry *parent,const char *dest) {return NULL;}
diff --git a/include/linux/sched.h b/include/linux/sched.h
index e692a022..d35d2b6d 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -163,10 +163,9 @@ print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq)
#define TASK_DEAD 64
#define TASK_WAKEKILL 128
#define TASK_WAKING 256
-#define TASK_PARKED 512
-#define TASK_STATE_MAX 1024
+#define TASK_STATE_MAX 512
-#define TASK_STATE_TO_CHAR_STR "RSDTtZXxKWP"
+#define TASK_STATE_TO_CHAR_STR "RSDTtZXxKW"
extern char ___assert_task_state[1 - 2*!!(
sizeof(TASK_STATE_TO_CHAR_STR)-1 != ilog2(TASK_STATE_MAX)+1)];
diff --git a/include/linux/security.h b/include/linux/security.h
index 032c366e..eee7478c 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -1012,10 +1012,6 @@ static inline void security_free_mnt_opts(struct security_mnt_opts *opts)
* This hook can be used by the module to update any security state
* associated with the TUN device's security structure.
* @security pointer to the TUN devices's security structure.
- * @skb_owned_by:
- * This hook sets the packet's owning sock.
- * @skb is the packet.
- * @sk the sock which owns the packet.
*
* Security hooks for XFRM operations.
*
@@ -1642,7 +1638,6 @@ struct security_operations {
int (*tun_dev_attach_queue) (void *security);
int (*tun_dev_attach) (struct sock *sk, void *security);
int (*tun_dev_open) (void *security);
- void (*skb_owned_by) (struct sk_buff *skb, struct sock *sk);
#endif /* CONFIG_SECURITY_NETWORK */
#ifdef CONFIG_SECURITY_NETWORK_XFRM
@@ -2593,8 +2588,6 @@ int security_tun_dev_attach_queue(void *security);
int security_tun_dev_attach(struct sock *sk, void *security);
int security_tun_dev_open(void *security);
-void security_skb_owned_by(struct sk_buff *skb, struct sock *sk);
-
#else /* CONFIG_SECURITY_NETWORK */
static inline int security_unix_stream_connect(struct sock *sock,
struct sock *other,
@@ -2786,11 +2779,6 @@ static inline int security_tun_dev_open(void *security)
{
return 0;
}
-
-static inline void security_skb_owned_by(struct sk_buff *skb, struct sock *sk)
-{
-}
-
#endif /* CONFIG_SECURITY_NETWORK */
#ifdef CONFIG_SECURITY_NETWORK_XFRM
diff --git a/include/linux/spinlock_up.h b/include/linux/spinlock_up.h
index e2369c16..a26e2fb6 100644
--- a/include/linux/spinlock_up.h
+++ b/include/linux/spinlock_up.h
@@ -16,10 +16,7 @@
* In the debug case, 1 means unlocked, 0 means locked. (the values
* are inverted, to catch initialization bugs)
*
- * No atomicity anywhere, we are on UP. However, we still need
- * the compiler barriers, because we do not want the compiler to
- * move potentially faulting instructions (notably user accesses)
- * into the locked sequence, resulting in non-atomic execution.
+ * No atomicity anywhere, we are on UP.
*/
#ifdef CONFIG_DEBUG_SPINLOCK
@@ -28,7 +25,6 @@
static inline void arch_spin_lock(arch_spinlock_t *lock)
{
lock->slock = 0;
- barrier();
}
static inline void
@@ -36,7 +32,6 @@ arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
{
local_irq_save(flags);
lock->slock = 0;
- barrier();
}
static inline int arch_spin_trylock(arch_spinlock_t *lock)
@@ -44,34 +39,32 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
char oldval = lock->slock;
lock->slock = 0;
- barrier();
return oldval > 0;
}
static inline void arch_spin_unlock(arch_spinlock_t *lock)
{
- barrier();
lock->slock = 1;
}
/*
* Read-write spinlocks. No debug version.
*/
-#define arch_read_lock(lock) do { barrier(); (void)(lock); } while (0)
-#define arch_write_lock(lock) do { barrier(); (void)(lock); } while (0)
-#define arch_read_trylock(lock) ({ barrier(); (void)(lock); 1; })
-#define arch_write_trylock(lock) ({ barrier(); (void)(lock); 1; })
-#define arch_read_unlock(lock) do { barrier(); (void)(lock); } while (0)
-#define arch_write_unlock(lock) do { barrier(); (void)(lock); } while (0)
+#define arch_read_lock(lock) do { (void)(lock); } while (0)
+#define arch_write_lock(lock) do { (void)(lock); } while (0)
+#define arch_read_trylock(lock) ({ (void)(lock); 1; })
+#define arch_write_trylock(lock) ({ (void)(lock); 1; })
+#define arch_read_unlock(lock) do { (void)(lock); } while (0)
+#define arch_write_unlock(lock) do { (void)(lock); } while (0)
#else /* DEBUG_SPINLOCK */
#define arch_spin_is_locked(lock) ((void)(lock), 0)
/* for sched.c and kernel_lock.c: */
-# define arch_spin_lock(lock) do { barrier(); (void)(lock); } while (0)
-# define arch_spin_lock_flags(lock, flags) do { barrier(); (void)(lock); } while (0)
-# define arch_spin_unlock(lock) do { barrier(); (void)(lock); } while (0)
-# define arch_spin_trylock(lock) ({ barrier(); (void)(lock); 1; })
+# define arch_spin_lock(lock) do { (void)(lock); } while (0)
+# define arch_spin_lock_flags(lock, flags) do { (void)(lock); } while (0)
+# define arch_spin_unlock(lock) do { (void)(lock); } while (0)
+# define arch_spin_trylock(lock) ({ (void)(lock); 1; })
#endif /* DEBUG_SPINLOCK */
#define arch_spin_is_contended(lock) (((void)(lock), 0))
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h
index 6fcfe99b..9e492be5 100644
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -219,7 +219,6 @@
#define SSB_CHIPCO_PMU_CTL 0x0600 /* PMU control */
#define SSB_CHIPCO_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
#define SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT 16
-#define SSB_CHIPCO_PMU_CTL_PLL_UPD 0x00000400
#define SSB_CHIPCO_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
#define SSB_CHIPCO_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
#define SSB_CHIPCO_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */
@@ -668,6 +667,5 @@ enum ssb_pmu_ldo_volt_id {
void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
enum ssb_pmu_ldo_volt_id id, u32 voltage);
void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on);
-void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid);
#endif /* LINUX_SSB_CHIPCO_H_ */
diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
index a5ffd326..2de42f94 100644
--- a/include/linux/swiotlb.h
+++ b/include/linux/swiotlb.h
@@ -25,7 +25,6 @@ extern int swiotlb_force;
extern void swiotlb_init(int verbose);
int swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose);
extern unsigned long swiotlb_nr_tbl(void);
-unsigned long swiotlb_size_or_default(void);
extern int swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs);
/*
diff --git a/include/linux/ucs2_string.h b/include/linux/ucs2_string.h
deleted file mode 100644
index cbb20afd..00000000
--- a/include/linux/ucs2_string.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef _LINUX_UCS2_STRING_H_
-#define _LINUX_UCS2_STRING_H_
-
-#include <linux/types.h> /* for size_t */
-#include <linux/stddef.h> /* for NULL */
-
-typedef u16 ucs2_char_t;
-
-unsigned long ucs2_strnlen(const ucs2_char_t *s, size_t maxlength);
-unsigned long ucs2_strlen(const ucs2_char_t *s);
-unsigned long ucs2_strsize(const ucs2_char_t *data, unsigned long maxlength);
-int ucs2_strncmp(const ucs2_char_t *a, const ucs2_char_t *b, size_t len);
-
-#endif /* _LINUX_UCS2_STRING_H_ */
diff --git a/include/linux/v4l2-mediabus.h b/include/linux/v4l2-mediabus.h
new file mode 100644
index 00000000..7054a7a8
--- /dev/null
+++ b/include/linux/v4l2-mediabus.h
@@ -0,0 +1,108 @@
+/*
+ * Media Bus API header
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_V4L2_MEDIABUS_H
+#define __LINUX_V4L2_MEDIABUS_H
+
+#include <linux/types.h>
+#include <linux/videodev2.h>
+
+/*
+ * These pixel codes uniquely identify data formats on the media bus. Mostly
+ * they correspond to similarly named V4L2_PIX_FMT_* formats, format 0 is
+ * reserved, V4L2_MBUS_FMT_FIXED shall be used by host-client pairs, where the
+ * data format is fixed. Additionally, "2X8" means that one pixel is transferred
+ * in two 8-bit samples, "BE" or "LE" specify in which order those samples are
+ * transferred over the bus: "LE" means that the least significant bits are
+ * transferred first, "BE" means that the most significant bits are transferred
+ * first, and "PADHI" and "PADLO" define which bits - low or high, in the
+ * incomplete high byte, are filled with padding bits.
+ *
+ * The pixel codes are grouped by type, bus_width, bits per component, samples
+ * per pixel and order of subsamples. Numerical values are sorted using generic
+ * numerical sort order (8 thus comes before 10).
+ *
+ * As their value can't change when a new pixel code is inserted in the
+ * enumeration, the pixel codes are explicitly given a numerical value. The next
+ * free values for each category are listed below, update them when inserting
+ * new pixel codes.
+ */
+enum v4l2_mbus_pixelcode {
+ V4L2_MBUS_FMT_FIXED = 0x0001,
+
+ /* RGB - next is 0x1009 */
+ V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
+ V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
+ V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
+ V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE = 0x1004,
+ V4L2_MBUS_FMT_BGR565_2X8_BE = 0x1005,
+ V4L2_MBUS_FMT_BGR565_2X8_LE = 0x1006,
+ V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007,
+ V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008,
+
+ /* YUV (including grey) - next is 0x2013 */
+ V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
+ V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
+ V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003,
+ V4L2_MBUS_FMT_YUYV8_1_5X8 = 0x2004,
+ V4L2_MBUS_FMT_YVYU8_1_5X8 = 0x2005,
+ V4L2_MBUS_FMT_UYVY8_2X8 = 0x2006,
+ V4L2_MBUS_FMT_VYUY8_2X8 = 0x2007,
+ V4L2_MBUS_FMT_YUYV8_2X8 = 0x2008,
+ V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009,
+ V4L2_MBUS_FMT_Y10_1X10 = 0x200a,
+ V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b,
+ V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c,
+ V4L2_MBUS_FMT_UYVY8_1X16 = 0x200f,
+ V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010,
+ V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
+ V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
+ V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
+ V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
+
+ /* Bayer - next is 0x3013 */
+ V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
+ V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002,
+ V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b,
+ V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c,
+ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009,
+ V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8 = 0x300d,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE = 0x3003,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE = 0x3004,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE = 0x3005,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE = 0x3006,
+ V4L2_MBUS_FMT_SBGGR10_1X10 = 0x3007,
+ V4L2_MBUS_FMT_SGBRG10_1X10 = 0x300e,
+ V4L2_MBUS_FMT_SGRBG10_1X10 = 0x300a,
+ V4L2_MBUS_FMT_SRGGB10_1X10 = 0x300f,
+ V4L2_MBUS_FMT_SBGGR12_1X12 = 0x3008,
+ V4L2_MBUS_FMT_SGBRG12_1X12 = 0x3010,
+ V4L2_MBUS_FMT_SGRBG12_1X12 = 0x3011,
+ V4L2_MBUS_FMT_SRGGB12_1X12 = 0x3012,
+};
+
+/**
+ * struct v4l2_mbus_framefmt - frame format on the media bus
+ * @width: frame width
+ * @height: frame height
+ * @code: data format code (from enum v4l2_mbus_pixelcode)
+ * @field: used interlacing type (from enum v4l2_field)
+ * @colorspace: colorspace of the data (from enum v4l2_colorspace)
+ */
+struct v4l2_mbus_framefmt {
+ __u32 width;
+ __u32 height;
+ __u32 code;
+ __u32 field;
+ __u32 colorspace;
+ __u32 reserved[7];
+};
+
+#endif
diff --git a/include/linux/v4l2-subdev.h b/include/linux/v4l2-subdev.h
new file mode 100644
index 00000000..887c9c15
--- /dev/null
+++ b/include/linux/v4l2-subdev.h
@@ -0,0 +1,141 @@
+/*
+ * V4L2 subdev userspace API
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ * Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __LINUX_V4L2_SUBDEV_H
+#define __LINUX_V4L2_SUBDEV_H
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+#include <linux/v4l2-mediabus.h>
+#include <uapi/linux/v4l2-subdev.h>
+/**
+ * enum v4l2_subdev_format_whence - Media bus format type
+ * @V4L2_SUBDEV_FORMAT_TRY: try format, for negotiation only
+ * @V4L2_SUBDEV_FORMAT_ACTIVE: active format, applied to the device
+ */
+enum v4l2_subdev_format_whence {
+ V4L2_SUBDEV_FORMAT_TRY = 0,
+ V4L2_SUBDEV_FORMAT_ACTIVE = 1,
+};
+
+/**
+ * struct v4l2_subdev_format - Pad-level media bus format
+ * @which: format type (from enum v4l2_subdev_format_whence)
+ * @pad: pad number, as reported by the media API
+ * @format: media bus format (format code and frame size)
+ */
+struct v4l2_subdev_format {
+ __u32 which;
+ __u32 pad;
+ struct v4l2_mbus_framefmt format;
+ __u32 reserved[8];
+};
+
+/**
+ * struct v4l2_subdev_crop - Pad-level crop settings
+ * @which: format type (from enum v4l2_subdev_format_whence)
+ * @pad: pad number, as reported by the media API
+ * @rect: pad crop rectangle boundaries
+ */
+struct v4l2_subdev_crop {
+ __u32 which;
+ __u32 pad;
+ struct v4l2_rect rect;
+ __u32 reserved[8];
+};
+
+/**
+ * struct v4l2_subdev_mbus_code_enum - Media bus format enumeration
+ * @pad: pad number, as reported by the media API
+ * @index: format index during enumeration
+ * @code: format code (from enum v4l2_mbus_pixelcode)
+ */
+struct v4l2_subdev_mbus_code_enum {
+ __u32 pad;
+ __u32 index;
+ __u32 code;
+ __u32 reserved[9];
+};
+
+/**
+ * struct v4l2_subdev_frame_size_enum - Media bus format enumeration
+ * @pad: pad number, as reported by the media API
+ * @index: format index during enumeration
+ * @code: format code (from enum v4l2_mbus_pixelcode)
+ */
+struct v4l2_subdev_frame_size_enum {
+ __u32 index;
+ __u32 pad;
+ __u32 code;
+ __u32 min_width;
+ __u32 max_width;
+ __u32 min_height;
+ __u32 max_height;
+ __u32 reserved[9];
+};
+
+/**
+ * struct v4l2_subdev_frame_interval - Pad-level frame rate
+ * @pad: pad number, as reported by the media API
+ * @interval: frame interval in seconds
+ */
+struct v4l2_subdev_frame_interval {
+ __u32 pad;
+ struct v4l2_fract interval;
+ __u32 reserved[9];
+};
+
+/**
+ * struct v4l2_subdev_frame_interval_enum - Frame interval enumeration
+ * @pad: pad number, as reported by the media API
+ * @index: frame interval index during enumeration
+ * @code: format code (from enum v4l2_mbus_pixelcode)
+ * @width: frame width in pixels
+ * @height: frame height in pixels
+ * @interval: frame interval in seconds
+ */
+struct v4l2_subdev_frame_interval_enum {
+ __u32 index;
+ __u32 pad;
+ __u32 code;
+ __u32 width;
+ __u32 height;
+ struct v4l2_fract interval;
+ __u32 reserved[9];
+};
+
+#define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format)
+#define VIDIOC_SUBDEV_S_FMT _IOWR('V', 5, struct v4l2_subdev_format)
+#define VIDIOC_SUBDEV_G_FRAME_INTERVAL \
+ _IOWR('V', 21, struct v4l2_subdev_frame_interval)
+#define VIDIOC_SUBDEV_S_FRAME_INTERVAL \
+ _IOWR('V', 22, struct v4l2_subdev_frame_interval)
+#define VIDIOC_SUBDEV_ENUM_MBUS_CODE \
+ _IOWR('V', 2, struct v4l2_subdev_mbus_code_enum)
+#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE \
+ _IOWR('V', 74, struct v4l2_subdev_frame_size_enum)
+#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \
+ _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum)
+#define VIDIOC_SUBDEV_G_CROP _IOWR('V', 59, struct v4l2_subdev_crop)
+#define VIDIOC_SUBDEV_S_CROP _IOWR('V', 60, struct v4l2_subdev_crop)
+
+#endif
diff --git a/include/linux/video_output.h b/include/linux/video_output.h
index ed5cdeb3..2fb46bc9 100644
--- a/include/linux/video_output.h
+++ b/include/linux/video_output.h
@@ -23,7 +23,6 @@
#ifndef _LINUX_VIDEO_OUTPUT_H
#define _LINUX_VIDEO_OUTPUT_H
#include <linux/device.h>
-#include <linux/err.h>
struct output_device;
struct output_properties {
int (*set_state)(struct output_device *);
@@ -35,23 +34,9 @@ struct output_device {
struct device dev;
};
#define to_output_device(obj) container_of(obj, struct output_device, dev)
-#if defined(CONFIG_VIDEO_OUTPUT_CONTROL) || defined(CONFIG_VIDEO_OUTPUT_CONTROL_MODULE)
struct output_device *video_output_register(const char *name,
struct device *dev,
void *devdata,
struct output_properties *op);
void video_output_unregister(struct output_device *dev);
-#else
-static struct output_device *video_output_register(const char *name,
- struct device *dev,
- void *devdata,
- struct output_properties *op)
-{
- return ERR_PTR(-ENODEV);
-}
-static void video_output_unregister(struct output_device *dev)
-{
- return;
-}
-#endif
#endif
diff --git a/include/linux/videodev.h b/include/linux/videodev.h
new file mode 100644
index 00000000..b19eab14
--- /dev/null
+++ b/include/linux/videodev.h
@@ -0,0 +1,340 @@
+/*
+ * Video for Linux version 1 - OBSOLETE
+ *
+ * Header file for v4l1 drivers and applications, for
+ * Linux kernels 2.2.x or 2.4.x.
+ *
+ * Provides header for legacy drivers and applications
+ *
+ * See http://linuxtv.org for more info
+ *
+ */
+#ifndef __LINUX_VIDEODEV_H
+#define __LINUX_VIDEODEV_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+#include <linux/videodev2.h>
+
+#if defined(__MIN_V4L1) && defined (__KERNEL__)
+
+/*
+ * Used by those V4L2 core functions that need a minimum V4L1 support,
+ * in order to allow V4L1 Compatibilty code compilation.
+ */
+
+struct video_mbuf
+{
+ int size; /* Total memory to map */
+ int frames; /* Frames */
+ int offsets[VIDEO_MAX_FRAME];
+};
+
+#define VIDIOCGMBUF _IOR('v',20, struct video_mbuf) /* Memory map buffer info */
+
+#else
+#if defined(CONFIG_VIDEO_V4L1_COMPAT) || !defined (__KERNEL__)
+
+#define VID_TYPE_CAPTURE 1 /* Can capture */
+#define VID_TYPE_TUNER 2 /* Can tune */
+#define VID_TYPE_TELETEXT 4 /* Does teletext */
+#define VID_TYPE_OVERLAY 8 /* Overlay onto frame buffer */
+#define VID_TYPE_CHROMAKEY 16 /* Overlay by chromakey */
+#define VID_TYPE_CLIPPING 32 /* Can clip */
+#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */
+#define VID_TYPE_SCALES 128 /* Scalable */
+#define VID_TYPE_MONOCHROME 256 /* Monochrome only */
+#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */
+#define VID_TYPE_MPEG_DECODER 1024 /* Can decode MPEG streams */
+#define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */
+#define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */
+#define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */
+
+struct video_capability
+{
+ char name[32];
+ int type;
+ int channels; /* Num channels */
+ int audios; /* Num audio devices */
+ int maxwidth; /* Supported width */
+ int maxheight; /* And height */
+ int minwidth; /* Supported width */
+ int minheight; /* And height */
+};
+
+
+struct video_channel
+{
+ int channel;
+ char name[32];
+ int tuners;
+ __u32 flags;
+#define VIDEO_VC_TUNER 1 /* Channel has a tuner */
+#define VIDEO_VC_AUDIO 2 /* Channel has audio */
+ __u16 type;
+#define VIDEO_TYPE_TV 1
+#define VIDEO_TYPE_CAMERA 2
+ __u16 norm; /* Norm set by channel */
+};
+
+struct video_tuner
+{
+ int tuner;
+ char name[32];
+ unsigned long rangelow, rangehigh; /* Tuner range */
+ __u32 flags;
+#define VIDEO_TUNER_PAL 1
+#define VIDEO_TUNER_NTSC 2
+#define VIDEO_TUNER_SECAM 4
+#define VIDEO_TUNER_LOW 8 /* Uses KHz not MHz */
+#define VIDEO_TUNER_NORM 16 /* Tuner can set norm */
+#define VIDEO_TUNER_STEREO_ON 128 /* Tuner is seeing stereo */
+#define VIDEO_TUNER_RDS_ON 256 /* Tuner is seeing an RDS datastream */
+#define VIDEO_TUNER_MBS_ON 512 /* Tuner is seeing an MBS datastream */
+ __u16 mode; /* PAL/NTSC/SECAM/OTHER */
+#define VIDEO_MODE_PAL 0
+#define VIDEO_MODE_NTSC 1
+#define VIDEO_MODE_SECAM 2
+#define VIDEO_MODE_AUTO 3
+ __u16 signal; /* Signal strength 16bit scale */
+};
+
+struct video_picture
+{
+ __u16 brightness;
+ __u16 hue;
+ __u16 colour;
+ __u16 contrast;
+ __u16 whiteness; /* Black and white only */
+ __u16 depth; /* Capture depth */
+ __u16 palette; /* Palette in use */
+#define VIDEO_PALETTE_GREY 1 /* Linear greyscale */
+#define VIDEO_PALETTE_HI240 2 /* High 240 cube (BT848) */
+#define VIDEO_PALETTE_RGB565 3 /* 565 16 bit RGB */
+#define VIDEO_PALETTE_RGB24 4 /* 24bit RGB */
+#define VIDEO_PALETTE_RGB32 5 /* 32bit RGB */
+#define VIDEO_PALETTE_RGB555 6 /* 555 15bit RGB */
+#define VIDEO_PALETTE_YUV422 7 /* YUV422 capture */
+#define VIDEO_PALETTE_YUYV 8
+#define VIDEO_PALETTE_UYVY 9 /* The great thing about standards is ... */
+#define VIDEO_PALETTE_YUV420 10
+#define VIDEO_PALETTE_YUV411 11 /* YUV411 capture */
+#define VIDEO_PALETTE_RAW 12 /* RAW capture (BT848) */
+#define VIDEO_PALETTE_YUV422P 13 /* YUV 4:2:2 Planar */
+#define VIDEO_PALETTE_YUV411P 14 /* YUV 4:1:1 Planar */
+#define VIDEO_PALETTE_YUV420P 15 /* YUV 4:2:0 Planar */
+#define VIDEO_PALETTE_YUV410P 16 /* YUV 4:1:0 Planar */
+#define VIDEO_PALETTE_PLANAR 13 /* start of planar entries */
+#define VIDEO_PALETTE_COMPONENT 7 /* start of component entries */
+};
+
+struct video_audio
+{
+ int audio; /* Audio channel */
+ __u16 volume; /* If settable */
+ __u16 bass, treble;
+ __u32 flags;
+#define VIDEO_AUDIO_MUTE 1
+#define VIDEO_AUDIO_MUTABLE 2
+#define VIDEO_AUDIO_VOLUME 4
+#define VIDEO_AUDIO_BASS 8
+#define VIDEO_AUDIO_TREBLE 16
+#define VIDEO_AUDIO_BALANCE 32
+ char name[16];
+#define VIDEO_SOUND_MONO 1
+#define VIDEO_SOUND_STEREO 2
+#define VIDEO_SOUND_LANG1 4
+#define VIDEO_SOUND_LANG2 8
+ __u16 mode;
+ __u16 balance; /* Stereo balance */
+ __u16 step; /* Step actual volume uses */
+};
+
+struct video_clip
+{
+ __s32 x,y;
+ __s32 width, height;
+ struct video_clip *next; /* For user use/driver use only */
+};
+
+struct video_window
+{
+ __u32 x,y; /* Position of window */
+ __u32 width,height; /* Its size */
+ __u32 chromakey;
+ __u32 flags;
+ struct video_clip __user *clips; /* Set only */
+ int clipcount;
+#define VIDEO_WINDOW_INTERLACE 1
+#define VIDEO_WINDOW_CHROMAKEY 16 /* Overlay by chromakey */
+#define VIDEO_CLIP_BITMAP -1
+/* bitmap is 1024x625, a '1' bit represents a clipped pixel */
+#define VIDEO_CLIPMAP_SIZE (128 * 625)
+};
+
+struct video_capture
+{
+ __u32 x,y; /* Offsets into image */
+ __u32 width, height; /* Area to capture */
+ __u16 decimation; /* Decimation divider */
+ __u16 flags; /* Flags for capture */
+#define VIDEO_CAPTURE_ODD 0 /* Temporal */
+#define VIDEO_CAPTURE_EVEN 1
+};
+
+struct video_buffer
+{
+ void *base;
+ int height,width;
+ int depth;
+ int bytesperline;
+};
+
+struct video_mmap
+{
+ unsigned int frame; /* Frame (0 - n) for double buffer */
+ int height,width;
+ unsigned int format; /* should be VIDEO_PALETTE_* */
+};
+
+struct video_key
+{
+ __u8 key[8];
+ __u32 flags;
+};
+
+struct video_mbuf
+{
+ int size; /* Total memory to map */
+ int frames; /* Frames */
+ int offsets[VIDEO_MAX_FRAME];
+};
+
+#define VIDEO_NO_UNIT (-1)
+
+struct video_unit
+{
+ int video; /* Video minor */
+ int vbi; /* VBI minor */
+ int radio; /* Radio minor */
+ int audio; /* Audio minor */
+ int teletext; /* Teletext minor */
+};
+
+struct vbi_format {
+ __u32 sampling_rate; /* in Hz */
+ __u32 samples_per_line;
+ __u32 sample_format; /* VIDEO_PALETTE_RAW only (1 byte) */
+ __s32 start[2]; /* starting line for each frame */
+ __u32 count[2]; /* count of lines for each frame */
+ __u32 flags;
+#define VBI_UNSYNC 1 /* can distingues between top/bottom field */
+#define VBI_INTERLACED 2 /* lines are interlaced */
+};
+
+/* video_info is biased towards hardware mpeg encode/decode */
+/* but it could apply generically to any hardware compressor/decompressor */
+struct video_info
+{
+ __u32 frame_count; /* frames output since decode/encode began */
+ __u32 h_size; /* current unscaled horizontal size */
+ __u32 v_size; /* current unscaled veritcal size */
+ __u32 smpte_timecode; /* current SMPTE timecode (for current GOP) */
+ __u32 picture_type; /* current picture type */
+ __u32 temporal_reference; /* current temporal reference */
+ __u8 user_data[256]; /* user data last found in compressed stream */
+ /* user_data[0] contains user data flags, user_data[1] has count */
+};
+
+/* generic structure for setting playback modes */
+struct video_play_mode
+{
+ int mode;
+ int p1;
+ int p2;
+};
+
+/* for loading microcode / fpga programming */
+struct video_code
+{
+ char loadwhat[16]; /* name or tag of file being passed */
+ int datasize;
+ __u8 *data;
+};
+
+#define VIDIOCGCAP _IOR('v',1,struct video_capability) /* Get capabilities */
+#define VIDIOCGCHAN _IOWR('v',2,struct video_channel) /* Get channel info (sources) */
+#define VIDIOCSCHAN _IOW('v',3,struct video_channel) /* Set channel */
+#define VIDIOCGTUNER _IOWR('v',4,struct video_tuner) /* Get tuner abilities */
+#define VIDIOCSTUNER _IOW('v',5,struct video_tuner) /* Tune the tuner for the current channel */
+#define VIDIOCGPICT _IOR('v',6,struct video_picture) /* Get picture properties */
+#define VIDIOCSPICT _IOW('v',7,struct video_picture) /* Set picture properties */
+#define VIDIOCCAPTURE _IOW('v',8,int) /* Start, end capture */
+#define VIDIOCGWIN _IOR('v',9, struct video_window) /* Get the video overlay window */
+#define VIDIOCSWIN _IOW('v',10, struct video_window) /* Set the video overlay window - passes clip list for hardware smarts , chromakey etc */
+#define VIDIOCGFBUF _IOR('v',11, struct video_buffer) /* Get frame buffer */
+#define VIDIOCSFBUF _IOW('v',12, struct video_buffer) /* Set frame buffer - root only */
+#define VIDIOCKEY _IOR('v',13, struct video_key) /* Video key event - to dev 255 is to all - cuts capture on all DMA windows with this key (0xFFFFFFFF == all) */
+#define VIDIOCGFREQ _IOR('v',14, unsigned long) /* Set tuner */
+#define VIDIOCSFREQ _IOW('v',15, unsigned long) /* Set tuner */
+#define VIDIOCGAUDIO _IOR('v',16, struct video_audio) /* Get audio info */
+#define VIDIOCSAUDIO _IOW('v',17, struct video_audio) /* Audio source, mute etc */
+#define VIDIOCSYNC _IOW('v',18, int) /* Sync with mmap grabbing */
+#define VIDIOCMCAPTURE _IOW('v',19, struct video_mmap) /* Grab frames */
+#define VIDIOCGMBUF _IOR('v',20, struct video_mbuf) /* Memory map buffer info */
+#define VIDIOCGUNIT _IOR('v',21, struct video_unit) /* Get attached units */
+#define VIDIOCGCAPTURE _IOR('v',22, struct video_capture) /* Get subcapture */
+#define VIDIOCSCAPTURE _IOW('v',23, struct video_capture) /* Set subcapture */
+#define VIDIOCSPLAYMODE _IOW('v',24, struct video_play_mode) /* Set output video mode/feature */
+#define VIDIOCSWRITEMODE _IOW('v',25, int) /* Set write mode */
+#define VIDIOCGPLAYINFO _IOR('v',26, struct video_info) /* Get current playback info from hardware */
+#define VIDIOCSMICROCODE _IOW('v',27, struct video_code) /* Load microcode into hardware */
+#define VIDIOCGVBIFMT _IOR('v',28, struct vbi_format) /* Get VBI information */
+#define VIDIOCSVBIFMT _IOW('v',29, struct vbi_format) /* Set VBI information */
+
+
+#define BASE_VIDIOCPRIVATE 192 /* 192-255 are private */
+
+/* VIDIOCSWRITEMODE */
+#define VID_WRITE_MPEG_AUD 0
+#define VID_WRITE_MPEG_VID 1
+#define VID_WRITE_OSD 2
+#define VID_WRITE_TTX 3
+#define VID_WRITE_CC 4
+#define VID_WRITE_MJPEG 5
+
+/* VIDIOCSPLAYMODE */
+#define VID_PLAY_VID_OUT_MODE 0
+ /* p1: = VIDEO_MODE_PAL, VIDEO_MODE_NTSC, etc ... */
+#define VID_PLAY_GENLOCK 1
+ /* p1: 0 = OFF, 1 = ON */
+ /* p2: GENLOCK FINE DELAY value */
+#define VID_PLAY_NORMAL 2
+#define VID_PLAY_PAUSE 3
+#define VID_PLAY_SINGLE_FRAME 4
+#define VID_PLAY_FAST_FORWARD 5
+#define VID_PLAY_SLOW_MOTION 6
+#define VID_PLAY_IMMEDIATE_NORMAL 7
+#define VID_PLAY_SWITCH_CHANNELS 8
+#define VID_PLAY_FREEZE_FRAME 9
+#define VID_PLAY_STILL_MODE 10
+#define VID_PLAY_MASTER_MODE 11
+ /* p1: see below */
+#define VID_PLAY_MASTER_NONE 1
+#define VID_PLAY_MASTER_VIDEO 2
+#define VID_PLAY_MASTER_AUDIO 3
+#define VID_PLAY_ACTIVE_SCANLINES 12
+ /* p1 = first active; p2 = last active */
+#define VID_PLAY_RESET 13
+#define VID_PLAY_END_MARK 14
+
+#endif /* CONFIG_VIDEO_V4L1_COMPAT */
+#endif /* __MIN_V4L1 */
+
+#endif /* __LINUX_VIDEODEV_H */
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 73ea2fb0..b59e78c5 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1,7 +1,7 @@
/*
* Video for Linux Two header file
*
- * Copyright (C) 1999-2012 the contributors
+ * Copyright (C) 1999-2007 the contributors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -56,7 +56,1582 @@
#ifndef __LINUX_VIDEODEV2_H
#define __LINUX_VIDEODEV2_H
+#ifdef __KERNEL__
#include <linux/time.h> /* need struct timeval */
-#include <uapi/linux/videodev2.h>
+#else
+#include <sys/time.h>
+#endif
+#include <linux/compiler.h>
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+/*
+ * Common stuff for both V4L1 and V4L2
+ * Moved from videodev.h
+ */
+#define VIDEO_MAX_FRAME 32
+
+#ifndef __KERNEL__
+
+/* These defines are V4L1 specific and should not be used with the V4L2 API!
+ They will be removed from this header in the future. */
+
+#define VID_TYPE_CAPTURE 1 /* Can capture */
+#define VID_TYPE_TUNER 2 /* Can tune */
+#define VID_TYPE_TELETEXT 4 /* Does teletext */
+#define VID_TYPE_OVERLAY 8 /* Overlay onto frame buffer */
+#define VID_TYPE_CHROMAKEY 16 /* Overlay by chromakey */
+#define VID_TYPE_CLIPPING 32 /* Can clip */
+#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */
+#define VID_TYPE_SCALES 128 /* Scalable */
+#define VID_TYPE_MONOCHROME 256 /* Monochrome only */
+#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */
+#define VID_TYPE_MPEG_DECODER 1024 /* Can decode MPEG streams */
+#define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */
+#define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */
+#define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */
+#endif
+
+/*
+ * M I S C E L L A N E O U S
+ */
+
+/* Four-character-code (FOURCC) */
+#define v4l2_fourcc(a, b, c, d)\
+ ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
+
+/*
+ * E N U M S
+ */
+enum v4l2_field {
+ V4L2_FIELD_ANY = 0, /* driver can choose from none,
+ top, bottom, interlaced
+ depending on whatever it thinks
+ is approximate ... */
+ V4L2_FIELD_NONE = 1, /* this device has no fields ... */
+ V4L2_FIELD_TOP = 2, /* top field only */
+ V4L2_FIELD_BOTTOM = 3, /* bottom field only */
+ V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */
+ V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one
+ buffer, top-bottom order */
+ V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */
+ V4L2_FIELD_ALTERNATE = 7, /* both fields alternating into
+ separate buffers */
+ V4L2_FIELD_INTERLACED_TB = 8, /* both fields interlaced, top field
+ first and the top field is
+ transmitted first */
+ V4L2_FIELD_INTERLACED_BT = 9, /* both fields interlaced, top field
+ first and the bottom field is
+ transmitted first */
+};
+#define V4L2_FIELD_HAS_TOP(field) \
+ ((field) == V4L2_FIELD_TOP ||\
+ (field) == V4L2_FIELD_INTERLACED ||\
+ (field) == V4L2_FIELD_INTERLACED_TB ||\
+ (field) == V4L2_FIELD_INTERLACED_BT ||\
+ (field) == V4L2_FIELD_SEQ_TB ||\
+ (field) == V4L2_FIELD_SEQ_BT)
+#define V4L2_FIELD_HAS_BOTTOM(field) \
+ ((field) == V4L2_FIELD_BOTTOM ||\
+ (field) == V4L2_FIELD_INTERLACED ||\
+ (field) == V4L2_FIELD_INTERLACED_TB ||\
+ (field) == V4L2_FIELD_INTERLACED_BT ||\
+ (field) == V4L2_FIELD_SEQ_TB ||\
+ (field) == V4L2_FIELD_SEQ_BT)
+#define V4L2_FIELD_HAS_BOTH(field) \
+ ((field) == V4L2_FIELD_INTERLACED ||\
+ (field) == V4L2_FIELD_INTERLACED_TB ||\
+ (field) == V4L2_FIELD_INTERLACED_BT ||\
+ (field) == V4L2_FIELD_SEQ_TB ||\
+ (field) == V4L2_FIELD_SEQ_BT)
+
+enum v4l2_buf_type {
+ V4L2_BUF_TYPE_VIDEO_CAPTURE = 1,
+ V4L2_BUF_TYPE_VIDEO_OUTPUT = 2,
+ V4L2_BUF_TYPE_VIDEO_OVERLAY = 3,
+ V4L2_BUF_TYPE_VBI_CAPTURE = 4,
+ V4L2_BUF_TYPE_VBI_OUTPUT = 5,
+ V4L2_BUF_TYPE_SLICED_VBI_CAPTURE = 6,
+ V4L2_BUF_TYPE_SLICED_VBI_OUTPUT = 7,
+#if 1
+ /* Experimental */
+ V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY = 8,
+#endif
+ V4L2_BUF_TYPE_PRIVATE = 0x80,
+};
+
+enum v4l2_ctrl_type {
+ V4L2_CTRL_TYPE_INTEGER = 1,
+ V4L2_CTRL_TYPE_BOOLEAN = 2,
+ V4L2_CTRL_TYPE_MENU = 3,
+ V4L2_CTRL_TYPE_BUTTON = 4,
+ V4L2_CTRL_TYPE_INTEGER64 = 5,
+ V4L2_CTRL_TYPE_CTRL_CLASS = 6,
+ V4L2_CTRL_TYPE_STRING = 7,
+};
+
+enum v4l2_tuner_type {
+ V4L2_TUNER_RADIO = 1,
+ V4L2_TUNER_ANALOG_TV = 2,
+ V4L2_TUNER_DIGITAL_TV = 3,
+};
+
+enum v4l2_memory {
+ V4L2_MEMORY_MMAP = 1,
+ V4L2_MEMORY_USERPTR = 2,
+ V4L2_MEMORY_OVERLAY = 3,
+};
+
+/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
+enum v4l2_colorspace {
+ /* ITU-R 601 -- broadcast NTSC/PAL */
+ V4L2_COLORSPACE_SMPTE170M = 1,
+
+ /* 1125-Line (US) HDTV */
+ V4L2_COLORSPACE_SMPTE240M = 2,
+
+ /* HD and modern captures. */
+ V4L2_COLORSPACE_REC709 = 3,
+
+ /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */
+ V4L2_COLORSPACE_BT878 = 4,
+
+ /* These should be useful. Assume 601 extents. */
+ V4L2_COLORSPACE_470_SYSTEM_M = 5,
+ V4L2_COLORSPACE_470_SYSTEM_BG = 6,
+
+ /* I know there will be cameras that send this. So, this is
+ * unspecified chromaticities and full 0-255 on each of the
+ * Y'CbCr components
+ */
+ V4L2_COLORSPACE_JPEG = 7,
+
+ /* For RGB colourspaces, this is probably a good start. */
+ V4L2_COLORSPACE_SRGB = 8,
+};
+
+enum v4l2_priority {
+ V4L2_PRIORITY_UNSET = 0, /* not initialized */
+ V4L2_PRIORITY_BACKGROUND = 1,
+ V4L2_PRIORITY_INTERACTIVE = 2,
+ V4L2_PRIORITY_RECORD = 3,
+ V4L2_PRIORITY_DEFAULT = V4L2_PRIORITY_INTERACTIVE,
+};
+
+struct v4l2_rect {
+ __s32 left;
+ __s32 top;
+ __s32 width;
+ __s32 height;
+};
+
+struct v4l2_fract {
+ __u32 numerator;
+ __u32 denominator;
+};
+
+/*
+ * D R I V E R C A P A B I L I T I E S
+ */
+struct v4l2_capability {
+ __u8 driver[16]; /* i.e. "bttv" */
+ __u8 card[32]; /* i.e. "Hauppauge WinTV" */
+ __u8 bus_info[32]; /* "PCI:" + pci_name(pci_dev) */
+ __u32 version; /* should use KERNEL_VERSION() */
+ __u32 capabilities; /* Device capabilities */
+ __u32 reserved[4];
+};
+
+/* Values for 'capabilities' field */
+#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */
+#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */
+#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */
+#define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a raw VBI capture device */
+#define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a raw VBI output device */
+#define V4L2_CAP_SLICED_VBI_CAPTURE 0x00000040 /* Is a sliced VBI capture device */
+#define V4L2_CAP_SLICED_VBI_OUTPUT 0x00000080 /* Is a sliced VBI output device */
+#define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */
+#define V4L2_CAP_VIDEO_OUTPUT_OVERLAY 0x00000200 /* Can do video output overlay */
+#define V4L2_CAP_HW_FREQ_SEEK 0x00000400 /* Can do hardware frequency seek */
+#define V4L2_CAP_RDS_OUTPUT 0x00000800 /* Is an RDS encoder */
+
+#define V4L2_CAP_TUNER 0x00010000 /* has a tuner */
+#define V4L2_CAP_AUDIO 0x00020000 /* has audio support */
+#define V4L2_CAP_RADIO 0x00040000 /* is a radio device */
+#define V4L2_CAP_MODULATOR 0x00080000 /* has a modulator */
+
+#define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */
+#define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */
+#define V4L2_CAP_STREAMING 0x04000000 /* streaming I/O ioctls */
+
+/*
+ * V I D E O I M A G E F O R M A T
+ */
+struct v4l2_pix_format {
+ __u32 width;
+ __u32 height;
+ __u32 pixelformat;
+ enum v4l2_field field;
+ __u32 bytesperline; /* for padding, zero if unused */
+ __u32 sizeimage;
+ enum v4l2_colorspace colorspace;
+ __u32 priv; /* private data, depends on pixelformat */
+};
+
+/* Pixel format FOURCC depth Description */
+
+/* RGB formats */
+#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R', 'G', 'B', '1') /* 8 RGB-3-3-2 */
+#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R', '4', '4', '4') /* 16 xxxxrrrr ggggbbbb */
+#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R', 'G', 'B', 'O') /* 16 RGB-5-5-5 */
+#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R', 'G', 'B', 'P') /* 16 RGB-5-6-5 */
+#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */
+#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */
+#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */
+#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R', 'G', 'B', '3') /* 24 RGB-8-8-8 */
+#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B', 'G', 'R', '4') /* 32 BGR-8-8-8-8 */
+#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R', 'G', 'B', '4') /* 32 RGB-8-8-8-8 */
+
+/* Grey formats */
+#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y') /* 8 Greyscale */
+#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y', '1', '6', ' ') /* 16 Greyscale */
+
+/* Palette formats */
+#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */
+
+/* Luminance+Chrominance formats */
+#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y', 'V', 'U', '9') /* 9 YVU 4:1:0 */
+#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y', 'V', '1', '2') /* 12 YVU 4:2:0 */
+#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y', 'U', 'Y', 'V') /* 16 YUV 4:2:2 */
+#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y', 'Y', 'U', 'V') /* 16 YUV 4:2:2 */
+#define V4L2_PIX_FMT_YVYU v4l2_fourcc('Y', 'V', 'Y', 'U') /* 16 YVU 4:2:2 */
+#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U', 'Y', 'V', 'Y') /* 16 YUV 4:2:2 */
+#define V4L2_PIX_FMT_VYUY v4l2_fourcc('V', 'Y', 'U', 'Y') /* 16 YUV 4:2:2 */
+#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4', '2', '2', 'P') /* 16 YVU422 planar */
+#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P') /* 16 YVU411 planar */
+#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y', '4', '1', 'P') /* 12 YUV 4:1:1 */
+#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y', '4', '4', '4') /* 16 xxxxyyyy uuuuvvvv */
+#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */
+#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */
+#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */
+#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9') /* 9 YUV 4:1:0 */
+#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y', 'U', '1', '2') /* 12 YUV 4:2:0 */
+#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */
+#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */
+
+/* two planes -- one Y, one Cr + Cb interleaved */
+#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
+#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */
+#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */
+#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */
+
+/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */
+#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */
+#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */
+#define V4L2_PIX_FMT_SGRBG8 v4l2_fourcc('G', 'R', 'B', 'G') /* 8 GRGR.. BGBG.. */
+#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') /* 10bit raw bayer */
+ /* 10bit raw bayer DPCM compressed to 8 bits */
+#define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0')
+ /*
+ * 10bit raw bayer, expanded to 16 bits
+ * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb...
+ */
+#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */
+
+/* compressed formats */
+#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */
+#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */
+#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */
+#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */
+
+/* Vendor-specific formats */
+#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */
+#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */
+#define V4L2_PIX_FMT_SN9C20X_I420 v4l2_fourcc('S', '9', '2', '0') /* SN9C20x YUV 4:2:0 */
+#define V4L2_PIX_FMT_PWC1 v4l2_fourcc('P', 'W', 'C', '1') /* pwc older webcam */
+#define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */
+#define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */
+#define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */
+#define V4L2_PIX_FMT_SPCA505 v4l2_fourcc('S', '5', '0', '5') /* YYUV per line */
+#define V4L2_PIX_FMT_SPCA508 v4l2_fourcc('S', '5', '0', '8') /* YUVY per line */
+#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */
+#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */
+#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */
+#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */
+#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */
+#define V4L2_PIX_FMT_OV511 v4l2_fourcc('O', '5', '1', '1') /* ov511 JPEG */
+#define V4L2_PIX_FMT_OV518 v4l2_fourcc('O', '5', '1', '8') /* ov518 JPEG */
+
+/*
+ * F O R M A T E N U M E R A T I O N
+ */
+struct v4l2_fmtdesc {
+ __u32 index; /* Format number */
+ enum v4l2_buf_type type; /* buffer type */
+ __u32 flags;
+ __u8 description[32]; /* Description string */
+ __u32 pixelformat; /* Format fourcc */
+ __u32 reserved[4];
+};
+
+#define V4L2_FMT_FLAG_COMPRESSED 0x0001
+#define V4L2_FMT_FLAG_EMULATED 0x0002
+
+#if 1
+ /* Experimental Frame Size and frame rate enumeration */
+/*
+ * F R A M E S I Z E E N U M E R A T I O N
+ */
+enum v4l2_frmsizetypes {
+ V4L2_FRMSIZE_TYPE_DISCRETE = 1,
+ V4L2_FRMSIZE_TYPE_CONTINUOUS = 2,
+ V4L2_FRMSIZE_TYPE_STEPWISE = 3,
+};
+
+struct v4l2_frmsize_discrete {
+ __u32 width; /* Frame width [pixel] */
+ __u32 height; /* Frame height [pixel] */
+};
+
+struct v4l2_frmsize_stepwise {
+ __u32 min_width; /* Minimum frame width [pixel] */
+ __u32 max_width; /* Maximum frame width [pixel] */
+ __u32 step_width; /* Frame width step size [pixel] */
+ __u32 min_height; /* Minimum frame height [pixel] */
+ __u32 max_height; /* Maximum frame height [pixel] */
+ __u32 step_height; /* Frame height step size [pixel] */
+};
+
+struct v4l2_frmsizeenum {
+ __u32 index; /* Frame size number */
+ __u32 pixel_format; /* Pixel format */
+ __u32 type; /* Frame size type the device supports. */
+
+ union { /* Frame size */
+ struct v4l2_frmsize_discrete discrete;
+ struct v4l2_frmsize_stepwise stepwise;
+ };
+
+ __u32 reserved[2]; /* Reserved space for future use */
+};
+
+/*
+ * F R A M E R A T E E N U M E R A T I O N
+ */
+enum v4l2_frmivaltypes {
+ V4L2_FRMIVAL_TYPE_DISCRETE = 1,
+ V4L2_FRMIVAL_TYPE_CONTINUOUS = 2,
+ V4L2_FRMIVAL_TYPE_STEPWISE = 3,
+};
+
+struct v4l2_frmival_stepwise {
+ struct v4l2_fract min; /* Minimum frame interval [s] */
+ struct v4l2_fract max; /* Maximum frame interval [s] */
+ struct v4l2_fract step; /* Frame interval step size [s] */
+};
+
+struct v4l2_frmivalenum {
+ __u32 index; /* Frame format index */
+ __u32 pixel_format; /* Pixel format */
+ __u32 width; /* Frame width */
+ __u32 height; /* Frame height */
+ __u32 type; /* Frame interval type the device supports. */
+
+ union { /* Frame interval */
+ struct v4l2_fract discrete;
+ struct v4l2_frmival_stepwise stepwise;
+ };
+
+ __u32 reserved[2]; /* Reserved space for future use */
+};
+#endif
+
+/*
+ * T I M E C O D E
+ */
+struct v4l2_timecode {
+ __u32 type;
+ __u32 flags;
+ __u8 frames;
+ __u8 seconds;
+ __u8 minutes;
+ __u8 hours;
+ __u8 userbits[4];
+};
+
+/* Type */
+#define V4L2_TC_TYPE_24FPS 1
+#define V4L2_TC_TYPE_25FPS 2
+#define V4L2_TC_TYPE_30FPS 3
+#define V4L2_TC_TYPE_50FPS 4
+#define V4L2_TC_TYPE_60FPS 5
+
+/* Flags */
+#define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */
+#define V4L2_TC_FLAG_COLORFRAME 0x0002
+#define V4L2_TC_USERBITS_field 0x000C
+#define V4L2_TC_USERBITS_USERDEFINED 0x0000
+#define V4L2_TC_USERBITS_8BITCHARS 0x0008
+/* The above is based on SMPTE timecodes */
+
+struct v4l2_jpegcompression {
+ int quality;
+
+ int APPn; /* Number of APP segment to be written,
+ * must be 0..15 */
+ int APP_len; /* Length of data in JPEG APPn segment */
+ char APP_data[60]; /* Data in the JPEG APPn segment. */
+
+ int COM_len; /* Length of data in JPEG COM segment */
+ char COM_data[60]; /* Data in JPEG COM segment */
+
+ __u32 jpeg_markers; /* Which markers should go into the JPEG
+ * output. Unless you exactly know what
+ * you do, leave them untouched.
+ * Inluding less markers will make the
+ * resulting code smaller, but there will
+ * be fewer aplications which can read it.
+ * The presence of the APP and COM marker
+ * is influenced by APP_len and COM_len
+ * ONLY, not by this property! */
+
+#define V4L2_JPEG_MARKER_DHT (1<<3) /* Define Huffman Tables */
+#define V4L2_JPEG_MARKER_DQT (1<<4) /* Define Quantization Tables */
+#define V4L2_JPEG_MARKER_DRI (1<<5) /* Define Restart Interval */
+#define V4L2_JPEG_MARKER_COM (1<<6) /* Comment segment */
+#define V4L2_JPEG_MARKER_APP (1<<7) /* App segment, driver will
+ * allways use APP0 */
+};
+
+/*
+ * M E M O R Y - M A P P I N G B U F F E R S
+ */
+struct v4l2_requestbuffers {
+ __u32 count;
+ enum v4l2_buf_type type;
+ enum v4l2_memory memory;
+ __u32 reserved[2];
+};
+
+struct v4l2_buffer {
+ __u32 index;
+ enum v4l2_buf_type type;
+ __u32 bytesused;
+ __u32 flags;
+ enum v4l2_field field;
+ struct timeval timestamp;
+ struct v4l2_timecode timecode;
+ __u32 sequence;
+
+ /* memory location */
+ enum v4l2_memory memory;
+ union {
+ __u32 offset;
+ unsigned long userptr;
+ } m;
+ __u32 length;
+ __u32 input;
+ __u32 reserved;
+};
+
+/* Flags for 'flags' field */
+#define V4L2_BUF_FLAG_MAPPED 0x0001 /* Buffer is mapped (flag) */
+#define V4L2_BUF_FLAG_QUEUED 0x0002 /* Buffer is queued for processing */
+#define V4L2_BUF_FLAG_DONE 0x0004 /* Buffer is ready */
+#define V4L2_BUF_FLAG_KEYFRAME 0x0008 /* Image is a keyframe (I-frame) */
+#define V4L2_BUF_FLAG_PFRAME 0x0010 /* Image is a P-frame */
+#define V4L2_BUF_FLAG_BFRAME 0x0020 /* Image is a B-frame */
+#define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */
+#define V4L2_BUF_FLAG_INPUT 0x0200 /* input field is valid */
+
+/*
+ * O V E R L A Y P R E V I E W
+ */
+struct v4l2_framebuffer {
+ __u32 capability;
+ __u32 flags;
+/* FIXME: in theory we should pass something like PCI device + memory
+ * region + offset instead of some physical address */
+ void *base;
+ struct v4l2_pix_format fmt;
+};
+/* Flags for the 'capability' field. Read only */
+#define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001
+#define V4L2_FBUF_CAP_CHROMAKEY 0x0002
+#define V4L2_FBUF_CAP_LIST_CLIPPING 0x0004
+#define V4L2_FBUF_CAP_BITMAP_CLIPPING 0x0008
+#define V4L2_FBUF_CAP_LOCAL_ALPHA 0x0010
+#define V4L2_FBUF_CAP_GLOBAL_ALPHA 0x0020
+#define V4L2_FBUF_CAP_LOCAL_INV_ALPHA 0x0040
+/* Flags for the 'flags' field. */
+#define V4L2_FBUF_FLAG_PRIMARY 0x0001
+#define V4L2_FBUF_FLAG_OVERLAY 0x0002
+#define V4L2_FBUF_FLAG_CHROMAKEY 0x0004
+#define V4L2_FBUF_FLAG_LOCAL_ALPHA 0x0008
+#define V4L2_FBUF_FLAG_GLOBAL_ALPHA 0x0010
+#define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA 0x0020
+
+struct v4l2_clip {
+ struct v4l2_rect c;
+ struct v4l2_clip __user *next;
+};
+
+struct v4l2_window {
+ struct v4l2_rect w;
+ enum v4l2_field field;
+ __u32 chromakey;
+ struct v4l2_clip __user *clips;
+ __u32 clipcount;
+ void __user *bitmap;
+ __u8 global_alpha;
+};
+
+/*
+ * C A P T U R E P A R A M E T E R S
+ */
+struct v4l2_captureparm {
+ __u32 capability; /* Supported modes */
+ __u32 capturemode; /* Current mode */
+ struct v4l2_fract timeperframe; /* Time per frame in .1us units */
+ __u32 extendedmode; /* Driver-specific extensions */
+ __u32 readbuffers; /* # of buffers for read */
+ __u32 reserved[4];
+};
+
+/* Flags for 'capability' and 'capturemode' fields */
+#define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */
+#define V4L2_CAP_TIMEPERFRAME 0x1000 /* timeperframe field is supported */
+
+struct v4l2_outputparm {
+ __u32 capability; /* Supported modes */
+ __u32 outputmode; /* Current mode */
+ struct v4l2_fract timeperframe; /* Time per frame in seconds */
+ __u32 extendedmode; /* Driver-specific extensions */
+ __u32 writebuffers; /* # of buffers for write */
+ __u32 reserved[4];
+};
+
+/*
+ * I N P U T I M A G E C R O P P I N G
+ */
+struct v4l2_cropcap {
+ enum v4l2_buf_type type;
+ struct v4l2_rect bounds;
+ struct v4l2_rect defrect;
+ struct v4l2_fract pixelaspect;
+};
+
+struct v4l2_crop {
+ enum v4l2_buf_type type;
+ struct v4l2_rect c;
+};
+
+/*
+ * A N A L O G V I D E O S T A N D A R D
+ */
+
+typedef __u64 v4l2_std_id;
+
+/* one bit for each */
+#define V4L2_STD_PAL_B ((v4l2_std_id)0x00000001)
+#define V4L2_STD_PAL_B1 ((v4l2_std_id)0x00000002)
+#define V4L2_STD_PAL_G ((v4l2_std_id)0x00000004)
+#define V4L2_STD_PAL_H ((v4l2_std_id)0x00000008)
+#define V4L2_STD_PAL_I ((v4l2_std_id)0x00000010)
+#define V4L2_STD_PAL_D ((v4l2_std_id)0x00000020)
+#define V4L2_STD_PAL_D1 ((v4l2_std_id)0x00000040)
+#define V4L2_STD_PAL_K ((v4l2_std_id)0x00000080)
+
+#define V4L2_STD_PAL_M ((v4l2_std_id)0x00000100)
+#define V4L2_STD_PAL_N ((v4l2_std_id)0x00000200)
+#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400)
+#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800)
+
+#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000)
+#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000)
+#define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000)
+#define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000)
+
+#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000)
+#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000)
+#define V4L2_STD_SECAM_G ((v4l2_std_id)0x00040000)
+#define V4L2_STD_SECAM_H ((v4l2_std_id)0x00080000)
+#define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000)
+#define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000)
+#define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000)
+#define V4L2_STD_SECAM_LC ((v4l2_std_id)0x00800000)
+
+/* ATSC/HDTV */
+#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000)
+#define V4L2_STD_ATSC_16_VSB ((v4l2_std_id)0x02000000)
+
+/* FIXME:
+ Although std_id is 64 bits, there is an issue on PPC32 architecture that
+ makes switch(__u64) to break. So, there's a hack on v4l2-common.c rounding
+ this value to 32 bits.
+ As, currently, the max value is for V4L2_STD_ATSC_16_VSB (30 bits wide),
+ it should work fine. However, if needed to add more than two standards,
+ v4l2-common.c should be fixed.
+ */
+
+/* some merged standards */
+#define V4L2_STD_MN (V4L2_STD_PAL_M|V4L2_STD_PAL_N|V4L2_STD_PAL_Nc|V4L2_STD_NTSC)
+#define V4L2_STD_B (V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_SECAM_B)
+#define V4L2_STD_GH (V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_SECAM_G|V4L2_STD_SECAM_H)
+#define V4L2_STD_DK (V4L2_STD_PAL_DK|V4L2_STD_SECAM_DK)
+
+/* some common needed stuff */
+#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\
+ V4L2_STD_PAL_B1 |\
+ V4L2_STD_PAL_G)
+#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\
+ V4L2_STD_PAL_D1 |\
+ V4L2_STD_PAL_K)
+#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\
+ V4L2_STD_PAL_DK |\
+ V4L2_STD_PAL_H |\
+ V4L2_STD_PAL_I)
+#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\
+ V4L2_STD_NTSC_M_JP |\
+ V4L2_STD_NTSC_M_KR)
+#define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\
+ V4L2_STD_SECAM_K |\
+ V4L2_STD_SECAM_K1)
+#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\
+ V4L2_STD_SECAM_G |\
+ V4L2_STD_SECAM_H |\
+ V4L2_STD_SECAM_DK |\
+ V4L2_STD_SECAM_L |\
+ V4L2_STD_SECAM_LC)
+
+#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\
+ V4L2_STD_PAL_60 |\
+ V4L2_STD_NTSC |\
+ V4L2_STD_NTSC_443)
+#define V4L2_STD_625_50 (V4L2_STD_PAL |\
+ V4L2_STD_PAL_N |\
+ V4L2_STD_PAL_Nc |\
+ V4L2_STD_SECAM)
+#define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\
+ V4L2_STD_ATSC_16_VSB)
+
+#define V4L2_STD_UNKNOWN 0
+#define V4L2_STD_ALL (V4L2_STD_525_60 |\
+ V4L2_STD_625_50)
+
+struct v4l2_standard {
+ __u32 index;
+ v4l2_std_id id;
+ __u8 name[24];
+ struct v4l2_fract frameperiod; /* Frames, not fields */
+ __u32 framelines;
+ __u32 reserved[4];
+};
+
+/*
+ * V I D E O I N P U T S
+ */
+struct v4l2_input {
+ __u32 index; /* Which input */
+ __u8 name[32]; /* Label */
+ __u32 type; /* Type of input */
+ __u32 audioset; /* Associated audios (bitfield) */
+ __u32 tuner; /* Associated tuner */
+ v4l2_std_id std;
+ __u32 status;
+ __u32 reserved[4];
+};
+
+/* Values for the 'type' field */
+#define V4L2_INPUT_TYPE_TUNER 1
+#define V4L2_INPUT_TYPE_CAMERA 2
+
+/* field 'status' - general */
+#define V4L2_IN_ST_NO_POWER 0x00000001 /* Attached device is off */
+#define V4L2_IN_ST_NO_SIGNAL 0x00000002
+#define V4L2_IN_ST_NO_COLOR 0x00000004
+
+/* field 'status' - sensor orientation */
+/* If sensor is mounted upside down set both bits */
+#define V4L2_IN_ST_HFLIP 0x00000010 /* Frames are flipped horizontally */
+#define V4L2_IN_ST_VFLIP 0x00000020 /* Frames are flipped vertically */
+
+/* field 'status' - analog */
+#define V4L2_IN_ST_NO_H_LOCK 0x00000100 /* No horizontal sync lock */
+#define V4L2_IN_ST_COLOR_KILL 0x00000200 /* Color killer is active */
+
+/* field 'status' - digital */
+#define V4L2_IN_ST_NO_SYNC 0x00010000 /* No synchronization lock */
+#define V4L2_IN_ST_NO_EQU 0x00020000 /* No equalizer lock */
+#define V4L2_IN_ST_NO_CARRIER 0x00040000 /* Carrier recovery failed */
+
+/* field 'status' - VCR and set-top box */
+#define V4L2_IN_ST_MACROVISION 0x01000000 /* Macrovision detected */
+#define V4L2_IN_ST_NO_ACCESS 0x02000000 /* Conditional access denied */
+#define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */
+
+/*
+ * V I D E O O U T P U T S
+ */
+struct v4l2_output {
+ __u32 index; /* Which output */
+ __u8 name[32]; /* Label */
+ __u32 type; /* Type of output */
+ __u32 audioset; /* Associated audios (bitfield) */
+ __u32 modulator; /* Associated modulator */
+ v4l2_std_id std;
+ __u32 reserved[4];
+};
+/* Values for the 'type' field */
+#define V4L2_OUTPUT_TYPE_MODULATOR 1
+#define V4L2_OUTPUT_TYPE_ANALOG 2
+#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3
+
+/*
+ * C O N T R O L S
+ */
+struct v4l2_control {
+ __u32 id;
+ __s32 value;
+};
+
+struct v4l2_ext_control {
+ __u32 id;
+ __u32 size;
+ __u32 reserved2[1];
+ union {
+ __s32 value;
+ __s64 value64;
+ char *string;
+ };
+} __attribute__ ((packed));
+
+struct v4l2_ext_controls {
+ __u32 ctrl_class;
+ __u32 count;
+ __u32 error_idx;
+ __u32 reserved[2];
+ struct v4l2_ext_control *controls;
+};
+
+/* Values for ctrl_class field */
+#define V4L2_CTRL_CLASS_USER 0x00980000 /* Old-style 'user' controls */
+#define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */
+#define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */
+#define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */
+
+#define V4L2_CTRL_ID_MASK (0x0fffffff)
+#define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL)
+#define V4L2_CTRL_DRIVER_PRIV(id) (((id) & 0xffff) >= 0x1000)
+
+/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
+struct v4l2_queryctrl {
+ __u32 id;
+ enum v4l2_ctrl_type type;
+ __u8 name[32]; /* Whatever */
+ __s32 minimum; /* Note signedness */
+ __s32 maximum;
+ __s32 step;
+ __s32 default_value;
+ __u32 flags;
+ __u32 reserved[2];
+};
+
+/* Used in the VIDIOC_QUERYMENU ioctl for querying menu items */
+struct v4l2_querymenu {
+ __u32 id;
+ __u32 index;
+ __u8 name[32]; /* Whatever */
+ __u32 reserved;
+};
+
+/* Control flags */
+#define V4L2_CTRL_FLAG_DISABLED 0x0001
+#define V4L2_CTRL_FLAG_GRABBED 0x0002
+#define V4L2_CTRL_FLAG_READ_ONLY 0x0004
+#define V4L2_CTRL_FLAG_UPDATE 0x0008
+#define V4L2_CTRL_FLAG_INACTIVE 0x0010
+#define V4L2_CTRL_FLAG_SLIDER 0x0020
+#define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040
+
+/* Query flag, to be ORed with the control ID */
+#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000
+
+/* User-class control IDs defined by V4L2 */
+#define V4L2_CID_BASE (V4L2_CTRL_CLASS_USER | 0x900)
+#define V4L2_CID_USER_BASE V4L2_CID_BASE
+/* IDs reserved for driver specific controls */
+#define V4L2_CID_PRIVATE_BASE 0x08000000
+
+#define V4L2_CID_USER_CLASS (V4L2_CTRL_CLASS_USER | 1)
+#define V4L2_CID_BRIGHTNESS (V4L2_CID_BASE+0)
+#define V4L2_CID_CONTRAST (V4L2_CID_BASE+1)
+#define V4L2_CID_SATURATION (V4L2_CID_BASE+2)
+#define V4L2_CID_HUE (V4L2_CID_BASE+3)
+#define V4L2_CID_AUDIO_VOLUME (V4L2_CID_BASE+5)
+#define V4L2_CID_AUDIO_BALANCE (V4L2_CID_BASE+6)
+#define V4L2_CID_AUDIO_BASS (V4L2_CID_BASE+7)
+#define V4L2_CID_AUDIO_TREBLE (V4L2_CID_BASE+8)
+#define V4L2_CID_AUDIO_MUTE (V4L2_CID_BASE+9)
+#define V4L2_CID_AUDIO_LOUDNESS (V4L2_CID_BASE+10)
+#define V4L2_CID_BLACK_LEVEL (V4L2_CID_BASE+11) /* Deprecated */
+#define V4L2_CID_AUTO_WHITE_BALANCE (V4L2_CID_BASE+12)
+#define V4L2_CID_DO_WHITE_BALANCE (V4L2_CID_BASE+13)
+#define V4L2_CID_RED_BALANCE (V4L2_CID_BASE+14)
+#define V4L2_CID_BLUE_BALANCE (V4L2_CID_BASE+15)
+#define V4L2_CID_GAMMA (V4L2_CID_BASE+16)
+#define V4L2_CID_WHITENESS (V4L2_CID_GAMMA) /* Deprecated */
+#define V4L2_CID_EXPOSURE (V4L2_CID_BASE+17)
+#define V4L2_CID_AUTOGAIN (V4L2_CID_BASE+18)
+#define V4L2_CID_GAIN (V4L2_CID_BASE+19)
+#define V4L2_CID_HFLIP (V4L2_CID_BASE+20)
+#define V4L2_CID_VFLIP (V4L2_CID_BASE+21)
+
+/* Deprecated; use V4L2_CID_PAN_RESET and V4L2_CID_TILT_RESET */
+#define V4L2_CID_HCENTER (V4L2_CID_BASE+22)
+#define V4L2_CID_VCENTER (V4L2_CID_BASE+23)
+
+#define V4L2_CID_POWER_LINE_FREQUENCY (V4L2_CID_BASE+24)
+enum v4l2_power_line_frequency {
+ V4L2_CID_POWER_LINE_FREQUENCY_DISABLED = 0,
+ V4L2_CID_POWER_LINE_FREQUENCY_50HZ = 1,
+ V4L2_CID_POWER_LINE_FREQUENCY_60HZ = 2,
+};
+#define V4L2_CID_HUE_AUTO (V4L2_CID_BASE+25)
+#define V4L2_CID_WHITE_BALANCE_TEMPERATURE (V4L2_CID_BASE+26)
+#define V4L2_CID_SHARPNESS (V4L2_CID_BASE+27)
+#define V4L2_CID_BACKLIGHT_COMPENSATION (V4L2_CID_BASE+28)
+#define V4L2_CID_CHROMA_AGC (V4L2_CID_BASE+29)
+#define V4L2_CID_COLOR_KILLER (V4L2_CID_BASE+30)
+#define V4L2_CID_COLORFX (V4L2_CID_BASE+31)
+enum v4l2_colorfx {
+ V4L2_COLORFX_NONE = 0,
+ V4L2_COLORFX_BW = 1,
+ V4L2_COLORFX_SEPIA = 2,
+};
+#define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32)
+#define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33)
+
+/* last CID + 1 */
+#define V4L2_CID_LASTP1 (V4L2_CID_BASE+34)
+
+/* MPEG-class control IDs defined by V4L2 */
+#define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900)
+#define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1)
+
+/* MPEG streams */
+#define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0)
+enum v4l2_mpeg_stream_type {
+ V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */
+ V4L2_MPEG_STREAM_TYPE_MPEG2_TS = 1, /* MPEG-2 transport stream */
+ V4L2_MPEG_STREAM_TYPE_MPEG1_SS = 2, /* MPEG-1 system stream */
+ V4L2_MPEG_STREAM_TYPE_MPEG2_DVD = 3, /* MPEG-2 DVD-compatible stream */
+ V4L2_MPEG_STREAM_TYPE_MPEG1_VCD = 4, /* MPEG-1 VCD-compatible stream */
+ V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD = 5, /* MPEG-2 SVCD-compatible stream */
+};
+#define V4L2_CID_MPEG_STREAM_PID_PMT (V4L2_CID_MPEG_BASE+1)
+#define V4L2_CID_MPEG_STREAM_PID_AUDIO (V4L2_CID_MPEG_BASE+2)
+#define V4L2_CID_MPEG_STREAM_PID_VIDEO (V4L2_CID_MPEG_BASE+3)
+#define V4L2_CID_MPEG_STREAM_PID_PCR (V4L2_CID_MPEG_BASE+4)
+#define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO (V4L2_CID_MPEG_BASE+5)
+#define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO (V4L2_CID_MPEG_BASE+6)
+#define V4L2_CID_MPEG_STREAM_VBI_FMT (V4L2_CID_MPEG_BASE+7)
+enum v4l2_mpeg_stream_vbi_fmt {
+ V4L2_MPEG_STREAM_VBI_FMT_NONE = 0, /* No VBI in the MPEG stream */
+ V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */
+};
+
+/* MPEG audio */
+#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100)
+enum v4l2_mpeg_audio_sampling_freq {
+ V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
+ V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000 = 1,
+ V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000 = 2,
+};
+#define V4L2_CID_MPEG_AUDIO_ENCODING (V4L2_CID_MPEG_BASE+101)
+enum v4l2_mpeg_audio_encoding {
+ V4L2_MPEG_AUDIO_ENCODING_LAYER_1 = 0,
+ V4L2_MPEG_AUDIO_ENCODING_LAYER_2 = 1,
+ V4L2_MPEG_AUDIO_ENCODING_LAYER_3 = 2,
+ V4L2_MPEG_AUDIO_ENCODING_AAC = 3,
+ V4L2_MPEG_AUDIO_ENCODING_AC3 = 4,
+};
+#define V4L2_CID_MPEG_AUDIO_L1_BITRATE (V4L2_CID_MPEG_BASE+102)
+enum v4l2_mpeg_audio_l1_bitrate {
+ V4L2_MPEG_AUDIO_L1_BITRATE_32K = 0,
+ V4L2_MPEG_AUDIO_L1_BITRATE_64K = 1,
+ V4L2_MPEG_AUDIO_L1_BITRATE_96K = 2,
+ V4L2_MPEG_AUDIO_L1_BITRATE_128K = 3,
+ V4L2_MPEG_AUDIO_L1_BITRATE_160K = 4,
+ V4L2_MPEG_AUDIO_L1_BITRATE_192K = 5,
+ V4L2_MPEG_AUDIO_L1_BITRATE_224K = 6,
+ V4L2_MPEG_AUDIO_L1_BITRATE_256K = 7,
+ V4L2_MPEG_AUDIO_L1_BITRATE_288K = 8,
+ V4L2_MPEG_AUDIO_L1_BITRATE_320K = 9,
+ V4L2_MPEG_AUDIO_L1_BITRATE_352K = 10,
+ V4L2_MPEG_AUDIO_L1_BITRATE_384K = 11,
+ V4L2_MPEG_AUDIO_L1_BITRATE_416K = 12,
+ V4L2_MPEG_AUDIO_L1_BITRATE_448K = 13,
+};
+#define V4L2_CID_MPEG_AUDIO_L2_BITRATE (V4L2_CID_MPEG_BASE+103)
+enum v4l2_mpeg_audio_l2_bitrate {
+ V4L2_MPEG_AUDIO_L2_BITRATE_32K = 0,
+ V4L2_MPEG_AUDIO_L2_BITRATE_48K = 1,
+ V4L2_MPEG_AUDIO_L2_BITRATE_56K = 2,
+ V4L2_MPEG_AUDIO_L2_BITRATE_64K = 3,
+ V4L2_MPEG_AUDIO_L2_BITRATE_80K = 4,
+ V4L2_MPEG_AUDIO_L2_BITRATE_96K = 5,
+ V4L2_MPEG_AUDIO_L2_BITRATE_112K = 6,
+ V4L2_MPEG_AUDIO_L2_BITRATE_128K = 7,
+ V4L2_MPEG_AUDIO_L2_BITRATE_160K = 8,
+ V4L2_MPEG_AUDIO_L2_BITRATE_192K = 9,
+ V4L2_MPEG_AUDIO_L2_BITRATE_224K = 10,
+ V4L2_MPEG_AUDIO_L2_BITRATE_256K = 11,
+ V4L2_MPEG_AUDIO_L2_BITRATE_320K = 12,
+ V4L2_MPEG_AUDIO_L2_BITRATE_384K = 13,
+};
+#define V4L2_CID_MPEG_AUDIO_L3_BITRATE (V4L2_CID_MPEG_BASE+104)
+enum v4l2_mpeg_audio_l3_bitrate {
+ V4L2_MPEG_AUDIO_L3_BITRATE_32K = 0,
+ V4L2_MPEG_AUDIO_L3_BITRATE_40K = 1,
+ V4L2_MPEG_AUDIO_L3_BITRATE_48K = 2,
+ V4L2_MPEG_AUDIO_L3_BITRATE_56K = 3,
+ V4L2_MPEG_AUDIO_L3_BITRATE_64K = 4,
+ V4L2_MPEG_AUDIO_L3_BITRATE_80K = 5,
+ V4L2_MPEG_AUDIO_L3_BITRATE_96K = 6,
+ V4L2_MPEG_AUDIO_L3_BITRATE_112K = 7,
+ V4L2_MPEG_AUDIO_L3_BITRATE_128K = 8,
+ V4L2_MPEG_AUDIO_L3_BITRATE_160K = 9,
+ V4L2_MPEG_AUDIO_L3_BITRATE_192K = 10,
+ V4L2_MPEG_AUDIO_L3_BITRATE_224K = 11,
+ V4L2_MPEG_AUDIO_L3_BITRATE_256K = 12,
+ V4L2_MPEG_AUDIO_L3_BITRATE_320K = 13,
+};
+#define V4L2_CID_MPEG_AUDIO_MODE (V4L2_CID_MPEG_BASE+105)
+enum v4l2_mpeg_audio_mode {
+ V4L2_MPEG_AUDIO_MODE_STEREO = 0,
+ V4L2_MPEG_AUDIO_MODE_JOINT_STEREO = 1,
+ V4L2_MPEG_AUDIO_MODE_DUAL = 2,
+ V4L2_MPEG_AUDIO_MODE_MONO = 3,
+};
+#define V4L2_CID_MPEG_AUDIO_MODE_EXTENSION (V4L2_CID_MPEG_BASE+106)
+enum v4l2_mpeg_audio_mode_extension {
+ V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4 = 0,
+ V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8 = 1,
+ V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12 = 2,
+ V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16 = 3,
+};
+#define V4L2_CID_MPEG_AUDIO_EMPHASIS (V4L2_CID_MPEG_BASE+107)
+enum v4l2_mpeg_audio_emphasis {
+ V4L2_MPEG_AUDIO_EMPHASIS_NONE = 0,
+ V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS = 1,
+ V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17 = 2,
+};
+#define V4L2_CID_MPEG_AUDIO_CRC (V4L2_CID_MPEG_BASE+108)
+enum v4l2_mpeg_audio_crc {
+ V4L2_MPEG_AUDIO_CRC_NONE = 0,
+ V4L2_MPEG_AUDIO_CRC_CRC16 = 1,
+};
+#define V4L2_CID_MPEG_AUDIO_MUTE (V4L2_CID_MPEG_BASE+109)
+#define V4L2_CID_MPEG_AUDIO_AAC_BITRATE (V4L2_CID_MPEG_BASE+110)
+#define V4L2_CID_MPEG_AUDIO_AC3_BITRATE (V4L2_CID_MPEG_BASE+111)
+enum v4l2_mpeg_audio_ac3_bitrate {
+ V4L2_MPEG_AUDIO_AC3_BITRATE_32K = 0,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_40K = 1,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_48K = 2,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_56K = 3,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_64K = 4,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_80K = 5,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_96K = 6,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_112K = 7,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_128K = 8,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_160K = 9,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_192K = 10,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_224K = 11,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_256K = 12,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_320K = 13,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_384K = 14,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_448K = 15,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_512K = 16,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_576K = 17,
+ V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
+};
+
+/* MPEG video */
+#define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200)
+enum v4l2_mpeg_video_encoding {
+ V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0,
+ V4L2_MPEG_VIDEO_ENCODING_MPEG_2 = 1,
+ V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC = 2,
+};
+#define V4L2_CID_MPEG_VIDEO_ASPECT (V4L2_CID_MPEG_BASE+201)
+enum v4l2_mpeg_video_aspect {
+ V4L2_MPEG_VIDEO_ASPECT_1x1 = 0,
+ V4L2_MPEG_VIDEO_ASPECT_4x3 = 1,
+ V4L2_MPEG_VIDEO_ASPECT_16x9 = 2,
+ V4L2_MPEG_VIDEO_ASPECT_221x100 = 3,
+};
+#define V4L2_CID_MPEG_VIDEO_B_FRAMES (V4L2_CID_MPEG_BASE+202)
+#define V4L2_CID_MPEG_VIDEO_GOP_SIZE (V4L2_CID_MPEG_BASE+203)
+#define V4L2_CID_MPEG_VIDEO_GOP_CLOSURE (V4L2_CID_MPEG_BASE+204)
+#define V4L2_CID_MPEG_VIDEO_PULLDOWN (V4L2_CID_MPEG_BASE+205)
+#define V4L2_CID_MPEG_VIDEO_BITRATE_MODE (V4L2_CID_MPEG_BASE+206)
+enum v4l2_mpeg_video_bitrate_mode {
+ V4L2_MPEG_VIDEO_BITRATE_MODE_VBR = 0,
+ V4L2_MPEG_VIDEO_BITRATE_MODE_CBR = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_BITRATE (V4L2_CID_MPEG_BASE+207)
+#define V4L2_CID_MPEG_VIDEO_BITRATE_PEAK (V4L2_CID_MPEG_BASE+208)
+#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209)
+#define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210)
+#define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211)
+
+/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
+#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
+enum v4l2_mpeg_cx2341x_video_spatial_filter_mode {
+ V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL = 0,
+ V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO = 1,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER (V4L2_CID_MPEG_CX2341X_BASE+1)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE (V4L2_CID_MPEG_CX2341X_BASE+2)
+enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type {
+ V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF = 0,
+ V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
+ V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT = 2,
+ V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE = 3,
+ V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE = 4,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE (V4L2_CID_MPEG_CX2341X_BASE+3)
+enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type {
+ V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF = 0,
+ V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+4)
+enum v4l2_mpeg_cx2341x_video_temporal_filter_mode {
+ V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL = 0,
+ V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO = 1,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER (V4L2_CID_MPEG_CX2341X_BASE+5)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE (V4L2_CID_MPEG_CX2341X_BASE+6)
+enum v4l2_mpeg_cx2341x_video_median_filter_type {
+ V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF = 0,
+ V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR = 1,
+ V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT = 2,
+ V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT = 3,
+ V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG = 4,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM (V4L2_CID_MPEG_CX2341X_BASE+7)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+8)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM (V4L2_CID_MPEG_CX2341X_BASE+9)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10)
+#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11)
+
+/* Camera class control IDs */
+#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
+#define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1)
+
+#define V4L2_CID_EXPOSURE_AUTO (V4L2_CID_CAMERA_CLASS_BASE+1)
+enum v4l2_exposure_auto_type {
+ V4L2_EXPOSURE_AUTO = 0,
+ V4L2_EXPOSURE_MANUAL = 1,
+ V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
+ V4L2_EXPOSURE_APERTURE_PRIORITY = 3
+};
+#define V4L2_CID_EXPOSURE_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+2)
+#define V4L2_CID_EXPOSURE_AUTO_PRIORITY (V4L2_CID_CAMERA_CLASS_BASE+3)
+
+#define V4L2_CID_PAN_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+4)
+#define V4L2_CID_TILT_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+5)
+#define V4L2_CID_PAN_RESET (V4L2_CID_CAMERA_CLASS_BASE+6)
+#define V4L2_CID_TILT_RESET (V4L2_CID_CAMERA_CLASS_BASE+7)
+
+#define V4L2_CID_PAN_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+8)
+#define V4L2_CID_TILT_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+9)
+
+#define V4L2_CID_FOCUS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+10)
+#define V4L2_CID_FOCUS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+11)
+#define V4L2_CID_FOCUS_AUTO (V4L2_CID_CAMERA_CLASS_BASE+12)
+
+#define V4L2_CID_ZOOM_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+13)
+#define V4L2_CID_ZOOM_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+14)
+#define V4L2_CID_ZOOM_CONTINUOUS (V4L2_CID_CAMERA_CLASS_BASE+15)
+
+#define V4L2_CID_PRIVACY (V4L2_CID_CAMERA_CLASS_BASE+16)
+
+/* FM Modulator class control IDs */
+#define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900)
+#define V4L2_CID_FM_TX_CLASS (V4L2_CTRL_CLASS_FM_TX | 1)
+
+#define V4L2_CID_RDS_TX_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 1)
+#define V4L2_CID_RDS_TX_PI (V4L2_CID_FM_TX_CLASS_BASE + 2)
+#define V4L2_CID_RDS_TX_PTY (V4L2_CID_FM_TX_CLASS_BASE + 3)
+#define V4L2_CID_RDS_TX_PS_NAME (V4L2_CID_FM_TX_CLASS_BASE + 5)
+#define V4L2_CID_RDS_TX_RADIO_TEXT (V4L2_CID_FM_TX_CLASS_BASE + 6)
+
+#define V4L2_CID_AUDIO_LIMITER_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 64)
+#define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 65)
+#define V4L2_CID_AUDIO_LIMITER_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 66)
+
+#define V4L2_CID_AUDIO_COMPRESSION_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 80)
+#define V4L2_CID_AUDIO_COMPRESSION_GAIN (V4L2_CID_FM_TX_CLASS_BASE + 81)
+#define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD (V4L2_CID_FM_TX_CLASS_BASE + 82)
+#define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME (V4L2_CID_FM_TX_CLASS_BASE + 83)
+#define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 84)
+
+#define V4L2_CID_PILOT_TONE_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 96)
+#define V4L2_CID_PILOT_TONE_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 97)
+#define V4L2_CID_PILOT_TONE_FREQUENCY (V4L2_CID_FM_TX_CLASS_BASE + 98)
+
+#define V4L2_CID_TUNE_PREEMPHASIS (V4L2_CID_FM_TX_CLASS_BASE + 112)
+enum v4l2_preemphasis {
+ V4L2_PREEMPHASIS_DISABLED = 0,
+ V4L2_PREEMPHASIS_50_uS = 1,
+ V4L2_PREEMPHASIS_75_uS = 2,
+};
+#define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113)
+#define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114)
+
+/*
+ * T U N I N G
+ */
+struct v4l2_tuner {
+ __u32 index;
+ __u8 name[32];
+ enum v4l2_tuner_type type;
+ __u32 capability;
+ __u32 rangelow;
+ __u32 rangehigh;
+ __u32 rxsubchans;
+ __u32 audmode;
+ __s32 signal;
+ __s32 afc;
+ __u32 reserved[4];
+};
+
+struct v4l2_modulator {
+ __u32 index;
+ __u8 name[32];
+ __u32 capability;
+ __u32 rangelow;
+ __u32 rangehigh;
+ __u32 txsubchans;
+ __u32 reserved[4];
+};
+
+/* Flags for the 'capability' field */
+#define V4L2_TUNER_CAP_LOW 0x0001
+#define V4L2_TUNER_CAP_NORM 0x0002
+#define V4L2_TUNER_CAP_STEREO 0x0010
+#define V4L2_TUNER_CAP_LANG2 0x0020
+#define V4L2_TUNER_CAP_SAP 0x0020
+#define V4L2_TUNER_CAP_LANG1 0x0040
+#define V4L2_TUNER_CAP_RDS 0x0080
+
+/* Flags for the 'rxsubchans' field */
+#define V4L2_TUNER_SUB_MONO 0x0001
+#define V4L2_TUNER_SUB_STEREO 0x0002
+#define V4L2_TUNER_SUB_LANG2 0x0004
+#define V4L2_TUNER_SUB_SAP 0x0004
+#define V4L2_TUNER_SUB_LANG1 0x0008
+#define V4L2_TUNER_SUB_RDS 0x0010
+
+/* Values for the 'audmode' field */
+#define V4L2_TUNER_MODE_MONO 0x0000
+#define V4L2_TUNER_MODE_STEREO 0x0001
+#define V4L2_TUNER_MODE_LANG2 0x0002
+#define V4L2_TUNER_MODE_SAP 0x0002
+#define V4L2_TUNER_MODE_LANG1 0x0003
+#define V4L2_TUNER_MODE_LANG1_LANG2 0x0004
+
+struct v4l2_frequency {
+ __u32 tuner;
+ enum v4l2_tuner_type type;
+ __u32 frequency;
+ __u32 reserved[8];
+};
+
+struct v4l2_hw_freq_seek {
+ __u32 tuner;
+ enum v4l2_tuner_type type;
+ __u32 seek_upward;
+ __u32 wrap_around;
+ __u32 reserved[8];
+};
+
+/*
+ * R D S
+ */
+
+struct v4l2_rds_data {
+ __u8 lsb;
+ __u8 msb;
+ __u8 block;
+} __attribute__ ((packed));
+
+#define V4L2_RDS_BLOCK_MSK 0x7
+#define V4L2_RDS_BLOCK_A 0
+#define V4L2_RDS_BLOCK_B 1
+#define V4L2_RDS_BLOCK_C 2
+#define V4L2_RDS_BLOCK_D 3
+#define V4L2_RDS_BLOCK_C_ALT 4
+#define V4L2_RDS_BLOCK_INVALID 7
+
+#define V4L2_RDS_BLOCK_CORRECTED 0x40
+#define V4L2_RDS_BLOCK_ERROR 0x80
+
+/*
+ * A U D I O
+ */
+struct v4l2_audio {
+ __u32 index;
+ __u8 name[32];
+ __u32 capability;
+ __u32 mode;
+ __u32 reserved[2];
+};
+
+/* Flags for the 'capability' field */
+#define V4L2_AUDCAP_STEREO 0x00001
+#define V4L2_AUDCAP_AVL 0x00002
+
+/* Flags for the 'mode' field */
+#define V4L2_AUDMODE_AVL 0x00001
+
+struct v4l2_audioout {
+ __u32 index;
+ __u8 name[32];
+ __u32 capability;
+ __u32 mode;
+ __u32 reserved[2];
+};
+
+/*
+ * M P E G S E R V I C E S
+ *
+ * NOTE: EXPERIMENTAL API
+ */
+#if 1
+#define V4L2_ENC_IDX_FRAME_I (0)
+#define V4L2_ENC_IDX_FRAME_P (1)
+#define V4L2_ENC_IDX_FRAME_B (2)
+#define V4L2_ENC_IDX_FRAME_MASK (0xf)
+
+struct v4l2_enc_idx_entry {
+ __u64 offset;
+ __u64 pts;
+ __u32 length;
+ __u32 flags;
+ __u32 reserved[2];
+};
+
+#define V4L2_ENC_IDX_ENTRIES (64)
+struct v4l2_enc_idx {
+ __u32 entries;
+ __u32 entries_cap;
+ __u32 reserved[4];
+ struct v4l2_enc_idx_entry entry[V4L2_ENC_IDX_ENTRIES];
+};
+
+
+#define V4L2_ENC_CMD_START (0)
+#define V4L2_ENC_CMD_STOP (1)
+#define V4L2_ENC_CMD_PAUSE (2)
+#define V4L2_ENC_CMD_RESUME (3)
+
+/* Flags for V4L2_ENC_CMD_STOP */
+#define V4L2_ENC_CMD_STOP_AT_GOP_END (1 << 0)
+
+struct v4l2_encoder_cmd {
+ __u32 cmd;
+ __u32 flags;
+ union {
+ struct {
+ __u32 data[8];
+ } raw;
+ };
+};
+
+#endif
+
+
+/*
+ * D A T A S E R V I C E S ( V B I )
+ *
+ * Data services API by Michael Schimek
+ */
+
+/* Raw VBI */
+struct v4l2_vbi_format {
+ __u32 sampling_rate; /* in 1 Hz */
+ __u32 offset;
+ __u32 samples_per_line;
+ __u32 sample_format; /* V4L2_PIX_FMT_* */
+ __s32 start[2];
+ __u32 count[2];
+ __u32 flags; /* V4L2_VBI_* */
+ __u32 reserved[2]; /* must be zero */
+};
+
+/* VBI flags */
+#define V4L2_VBI_UNSYNC (1 << 0)
+#define V4L2_VBI_INTERLACED (1 << 1)
+
+/* Sliced VBI
+ *
+ * This implements is a proposal V4L2 API to allow SLICED VBI
+ * required for some hardware encoders. It should change without
+ * notice in the definitive implementation.
+ */
+
+struct v4l2_sliced_vbi_format {
+ __u16 service_set;
+ /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field
+ service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field
+ (equals frame lines 313-336 for 625 line video
+ standards, 263-286 for 525 line standards) */
+ __u16 service_lines[2][24];
+ __u32 io_size;
+ __u32 reserved[2]; /* must be zero */
+};
+
+/* Teletext World System Teletext
+ (WST), defined on ITU-R BT.653-2 */
+#define V4L2_SLICED_TELETEXT_B (0x0001)
+/* Video Program System, defined on ETS 300 231*/
+#define V4L2_SLICED_VPS (0x0400)
+/* Closed Caption, defined on EIA-608 */
+#define V4L2_SLICED_CAPTION_525 (0x1000)
+/* Wide Screen System, defined on ITU-R BT1119.1 */
+#define V4L2_SLICED_WSS_625 (0x4000)
+
+#define V4L2_SLICED_VBI_525 (V4L2_SLICED_CAPTION_525)
+#define V4L2_SLICED_VBI_625 (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625)
+
+struct v4l2_sliced_vbi_cap {
+ __u16 service_set;
+ /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field
+ service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field
+ (equals frame lines 313-336 for 625 line video
+ standards, 263-286 for 525 line standards) */
+ __u16 service_lines[2][24];
+ enum v4l2_buf_type type;
+ __u32 reserved[3]; /* must be 0 */
+};
+
+struct v4l2_sliced_vbi_data {
+ __u32 id;
+ __u32 field; /* 0: first field, 1: second field */
+ __u32 line; /* 1-23 */
+ __u32 reserved; /* must be 0 */
+ __u8 data[48];
+};
+
+/*
+ * Sliced VBI data inserted into MPEG Streams
+ */
+
+/*
+ * V4L2_MPEG_STREAM_VBI_FMT_IVTV:
+ *
+ * Structure of payload contained in an MPEG 2 Private Stream 1 PES Packet in an
+ * MPEG-2 Program Pack that contains V4L2_MPEG_STREAM_VBI_FMT_IVTV Sliced VBI
+ * data
+ *
+ * Note, the MPEG-2 Program Pack and Private Stream 1 PES packet header
+ * definitions are not included here. See the MPEG-2 specifications for details
+ * on these headers.
+ */
+
+/* Line type IDs */
+#define V4L2_MPEG_VBI_IVTV_TELETEXT_B (1)
+#define V4L2_MPEG_VBI_IVTV_CAPTION_525 (4)
+#define V4L2_MPEG_VBI_IVTV_WSS_625 (5)
+#define V4L2_MPEG_VBI_IVTV_VPS (7)
+
+struct v4l2_mpeg_vbi_itv0_line {
+ __u8 id; /* One of V4L2_MPEG_VBI_IVTV_* above */
+ __u8 data[42]; /* Sliced VBI data for the line */
+} __attribute__ ((packed));
+
+struct v4l2_mpeg_vbi_itv0 {
+ __le32 linemask[2]; /* Bitmasks of VBI service lines present */
+ struct v4l2_mpeg_vbi_itv0_line line[35];
+} __attribute__ ((packed));
+
+struct v4l2_mpeg_vbi_ITV0 {
+ struct v4l2_mpeg_vbi_itv0_line line[36];
+} __attribute__ ((packed));
+
+#define V4L2_MPEG_VBI_IVTV_MAGIC0 "itv0"
+#define V4L2_MPEG_VBI_IVTV_MAGIC1 "ITV0"
+
+struct v4l2_mpeg_vbi_fmt_ivtv {
+ __u8 magic[4];
+ union {
+ struct v4l2_mpeg_vbi_itv0 itv0;
+ struct v4l2_mpeg_vbi_ITV0 ITV0;
+ };
+} __attribute__ ((packed));
+
+/*
+ * A G G R E G A T E S T R U C T U R E S
+ */
+
+/* Stream data format
+ */
+struct v4l2_format {
+ enum v4l2_buf_type type;
+ union {
+ struct v4l2_pix_format pix; /* V4L2_BUF_TYPE_VIDEO_CAPTURE */
+ struct v4l2_window win; /* V4L2_BUF_TYPE_VIDEO_OVERLAY */
+ struct v4l2_vbi_format vbi; /* V4L2_BUF_TYPE_VBI_CAPTURE */
+ struct v4l2_sliced_vbi_format sliced; /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */
+ __u8 raw_data[200]; /* user-defined */
+ } fmt;
+};
+
+
+/* Stream type-dependent parameters
+ */
+struct v4l2_streamparm {
+ enum v4l2_buf_type type;
+ union {
+ struct v4l2_captureparm capture;
+ struct v4l2_outputparm output;
+ __u8 raw_data[200]; /* user-defined */
+ } parm;
+};
+
+/*
+ * A D V A N C E D D E B U G G I N G
+ *
+ * NOTE: EXPERIMENTAL API, NEVER RELY ON THIS IN APPLICATIONS!
+ * FOR DEBUGGING, TESTING AND INTERNAL USE ONLY!
+ */
+
+/* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */
+
+#define V4L2_CHIP_MATCH_HOST 0 /* Match against chip ID on host (0 for the host) */
+#define V4L2_CHIP_MATCH_I2C_DRIVER 1 /* Match against I2C driver name */
+#define V4L2_CHIP_MATCH_I2C_ADDR 2 /* Match against I2C 7-bit address */
+#define V4L2_CHIP_MATCH_AC97 3 /* Match against anciliary AC97 chip */
+
+struct v4l2_dbg_match {
+ __u32 type; /* Match type */
+ union { /* Match this chip, meaning determined by type */
+ __u32 addr;
+ char name[32];
+ };
+} __attribute__ ((packed));
+
+struct v4l2_dbg_register {
+ struct v4l2_dbg_match match;
+ __u32 size; /* register size in bytes */
+ __u64 reg;
+ __u64 val;
+} __attribute__ ((packed));
+
+/* VIDIOC_DBG_G_CHIP_IDENT */
+struct v4l2_dbg_chip_ident {
+ struct v4l2_dbg_match match;
+ __u32 ident; /* chip identifier as specified in <media/v4l2-chip-ident.h> */
+ __u32 revision; /* chip revision, chip specific */
+} __attribute__ ((packed));
+
+/*
+ * I O C T L C O D E S F O R V I D E O D E V I C E S
+ *
+ */
+#define VIDIOC_QUERYCAP _IOR('V', 0, struct v4l2_capability)
+#define VIDIOC_RESERVED _IO('V', 1)
+#define VIDIOC_ENUM_FMT _IOWR('V', 2, struct v4l2_fmtdesc)
+#define VIDIOC_G_FMT _IOWR('V', 4, struct v4l2_format)
+#define VIDIOC_S_FMT _IOWR('V', 5, struct v4l2_format)
+#define VIDIOC_REQBUFS _IOWR('V', 8, struct v4l2_requestbuffers)
+#define VIDIOC_QUERYBUF _IOWR('V', 9, struct v4l2_buffer)
+#define VIDIOC_G_FBUF _IOR('V', 10, struct v4l2_framebuffer)
+#define VIDIOC_S_FBUF _IOW('V', 11, struct v4l2_framebuffer)
+#define VIDIOC_OVERLAY _IOW('V', 14, int)
+#define VIDIOC_QBUF _IOWR('V', 15, struct v4l2_buffer)
+#define VIDIOC_DQBUF _IOWR('V', 17, struct v4l2_buffer)
+#define VIDIOC_STREAMON _IOW('V', 18, int)
+#define VIDIOC_STREAMOFF _IOW('V', 19, int)
+#define VIDIOC_G_PARM _IOWR('V', 21, struct v4l2_streamparm)
+#define VIDIOC_S_PARM _IOWR('V', 22, struct v4l2_streamparm)
+#define VIDIOC_G_STD _IOR('V', 23, v4l2_std_id)
+#define VIDIOC_S_STD _IOW('V', 24, v4l2_std_id)
+#define VIDIOC_ENUMSTD _IOWR('V', 25, struct v4l2_standard)
+#define VIDIOC_ENUMINPUT _IOWR('V', 26, struct v4l2_input)
+#define VIDIOC_G_CTRL _IOWR('V', 27, struct v4l2_control)
+#define VIDIOC_S_CTRL _IOWR('V', 28, struct v4l2_control)
+#define VIDIOC_G_TUNER _IOWR('V', 29, struct v4l2_tuner)
+#define VIDIOC_S_TUNER _IOW('V', 30, struct v4l2_tuner)
+#define VIDIOC_G_AUDIO _IOR('V', 33, struct v4l2_audio)
+#define VIDIOC_S_AUDIO _IOW('V', 34, struct v4l2_audio)
+#define VIDIOC_QUERYCTRL _IOWR('V', 36, struct v4l2_queryctrl)
+#define VIDIOC_QUERYMENU _IOWR('V', 37, struct v4l2_querymenu)
+#define VIDIOC_G_INPUT _IOR('V', 38, int)
+#define VIDIOC_S_INPUT _IOWR('V', 39, int)
+#define VIDIOC_G_OUTPUT _IOR('V', 46, int)
+#define VIDIOC_S_OUTPUT _IOWR('V', 47, int)
+#define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct v4l2_output)
+#define VIDIOC_G_AUDOUT _IOR('V', 49, struct v4l2_audioout)
+#define VIDIOC_S_AUDOUT _IOW('V', 50, struct v4l2_audioout)
+#define VIDIOC_G_MODULATOR _IOWR('V', 54, struct v4l2_modulator)
+#define VIDIOC_S_MODULATOR _IOW('V', 55, struct v4l2_modulator)
+#define VIDIOC_G_FREQUENCY _IOWR('V', 56, struct v4l2_frequency)
+#define VIDIOC_S_FREQUENCY _IOW('V', 57, struct v4l2_frequency)
+#define VIDIOC_CROPCAP _IOWR('V', 58, struct v4l2_cropcap)
+#define VIDIOC_G_CROP _IOWR('V', 59, struct v4l2_crop)
+#define VIDIOC_S_CROP _IOW('V', 60, struct v4l2_crop)
+#define VIDIOC_G_JPEGCOMP _IOR('V', 61, struct v4l2_jpegcompression)
+#define VIDIOC_S_JPEGCOMP _IOW('V', 62, struct v4l2_jpegcompression)
+#define VIDIOC_QUERYSTD _IOR('V', 63, v4l2_std_id)
+#define VIDIOC_TRY_FMT _IOWR('V', 64, struct v4l2_format)
+#define VIDIOC_ENUMAUDIO _IOWR('V', 65, struct v4l2_audio)
+#define VIDIOC_ENUMAUDOUT _IOWR('V', 66, struct v4l2_audioout)
+#define VIDIOC_G_PRIORITY _IOR('V', 67, enum v4l2_priority)
+#define VIDIOC_S_PRIORITY _IOW('V', 68, enum v4l2_priority)
+#define VIDIOC_G_SLICED_VBI_CAP _IOWR('V', 69, struct v4l2_sliced_vbi_cap)
+#define VIDIOC_LOG_STATUS _IO('V', 70)
+#define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct v4l2_ext_controls)
+#define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct v4l2_ext_controls)
+#define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct v4l2_ext_controls)
+#if 1
+#define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct v4l2_frmsizeenum)
+#define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum)
+#define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct v4l2_enc_idx)
+#define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct v4l2_encoder_cmd)
+#define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct v4l2_encoder_cmd)
+#endif
+
+#if 1
+/* Experimental, meant for debugging, testing and internal use.
+ Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined.
+ You must be root to use these ioctls. Never use these in applications! */
+#define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct v4l2_dbg_register)
+#define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register)
+
+/* Experimental, meant for debugging, testing and internal use.
+ Never use this ioctl in applications! */
+#define VIDIOC_DBG_G_CHIP_IDENT _IOWR('V', 81, struct v4l2_dbg_chip_ident)
+#endif
+
+#define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek)
+/* Reminder: when adding new ioctls please add support for them to
+ drivers/media/video/v4l2-compat-ioctl32.c as well! */
+
+#ifdef __OLD_VIDIOC_
+/* for compatibility, will go away some day */
+#define VIDIOC_OVERLAY_OLD _IOWR('V', 14, int)
+#define VIDIOC_S_PARM_OLD _IOW('V', 22, struct v4l2_streamparm)
+#define VIDIOC_S_CTRL_OLD _IOW('V', 28, struct v4l2_control)
+#define VIDIOC_G_AUDIO_OLD _IOWR('V', 33, struct v4l2_audio)
+#define VIDIOC_G_AUDOUT_OLD _IOWR('V', 49, struct v4l2_audioout)
+#define VIDIOC_CROPCAP_OLD _IOR('V', 58, struct v4l2_cropcap)
+#endif
+
+#define BASE_VIDIOC_PRIVATE 192 /* 192-255 are private */
#endif /* __LINUX_VIDEODEV2_H */
diff --git a/include/linux/videotext.h b/include/linux/videotext.h
new file mode 100644
index 00000000..3e68c8d1
--- /dev/null
+++ b/include/linux/videotext.h
@@ -0,0 +1,125 @@
+#ifndef _VTX_H
+#define _VTX_H
+
+/*
+ * Teletext (=Videotext) hardware decoders using interface /dev/vtx
+ * Do not confuse with drivers using /dev/vbi which decode videotext by software
+ *
+ * Videotext IOCTLs changed in order to use _IO() macros defined in <linux/ioctl.h>,
+ * unused tuner IOCTLs cleaned up by
+ * Michael Geng <linux@MichaelGeng.de>
+ *
+ * Copyright (c) 1994-97 Martin Buck <martin-2.buck@student.uni-ulm.de>
+ * Read COPYING for more information
+ *
+ */
+
+
+/*
+ * Videotext ioctls
+ */
+#define VTXIOCGETINFO _IOR (0x81, 1, vtx_info_t)
+#define VTXIOCCLRPAGE _IOW (0x81, 2, vtx_pagereq_t)
+#define VTXIOCCLRFOUND _IOW (0x81, 3, vtx_pagereq_t)
+#define VTXIOCPAGEREQ _IOW (0x81, 4, vtx_pagereq_t)
+#define VTXIOCGETSTAT _IOW (0x81, 5, vtx_pagereq_t)
+#define VTXIOCGETPAGE _IOW (0x81, 6, vtx_pagereq_t)
+#define VTXIOCSTOPDAU _IOW (0x81, 7, vtx_pagereq_t)
+#define VTXIOCPUTPAGE _IO (0x81, 8)
+#define VTXIOCSETDISP _IO (0x81, 9)
+#define VTXIOCPUTSTAT _IO (0x81, 10)
+#define VTXIOCCLRCACHE _IO (0x81, 11)
+#define VTXIOCSETVIRT _IOW (0x81, 12, long)
+
+/* for compatibility, will go away some day */
+#define VTXIOCGETINFO_OLD 0x7101 /* get version of driver & capabilities of vtx-chipset */
+#define VTXIOCCLRPAGE_OLD 0x7102 /* clear page-buffer */
+#define VTXIOCCLRFOUND_OLD 0x7103 /* clear bits indicating that page was found */
+#define VTXIOCPAGEREQ_OLD 0x7104 /* search for page */
+#define VTXIOCGETSTAT_OLD 0x7105 /* get status of page-buffer */
+#define VTXIOCGETPAGE_OLD 0x7106 /* get contents of page-buffer */
+#define VTXIOCSTOPDAU_OLD 0x7107 /* stop data acquisition unit */
+#define VTXIOCPUTPAGE_OLD 0x7108 /* display page on TV-screen */
+#define VTXIOCSETDISP_OLD 0x7109 /* set TV-mode */
+#define VTXIOCPUTSTAT_OLD 0x710a /* set status of TV-output-buffer */
+#define VTXIOCCLRCACHE_OLD 0x710b /* clear cache on VTX-interface (if avail.) */
+#define VTXIOCSETVIRT_OLD 0x710c /* turn on virtual mode (this disables TV-display) */
+
+/*
+ * Definitions for VTXIOCGETINFO
+ */
+
+#define SAA5243 0
+#define SAA5246 1
+#define SAA5249 2
+#define SAA5248 3
+#define XSTV5346 4
+
+typedef struct {
+ int version_major, version_minor; /* version of driver; if version_major changes, driver */
+ /* is not backward compatible!!! CHECK THIS!!! */
+ int numpages; /* number of page-buffers of vtx-chipset */
+ int cct_type; /* type of vtx-chipset (SAA5243, SAA5246, SAA5248 or
+ * SAA5249) */
+}
+vtx_info_t;
+
+
+/*
+ * Definitions for VTXIOC{CLRPAGE,CLRFOUND,PAGEREQ,GETSTAT,GETPAGE,STOPDAU,PUTPAGE,SETDISP}
+ */
+
+#define MIN_UNIT (1<<0)
+#define MIN_TEN (1<<1)
+#define HR_UNIT (1<<2)
+#define HR_TEN (1<<3)
+#define PG_UNIT (1<<4)
+#define PG_TEN (1<<5)
+#define PG_HUND (1<<6)
+#define PGMASK_MAX (1<<7)
+#define PGMASK_PAGE (PG_HUND | PG_TEN | PG_UNIT)
+#define PGMASK_HOUR (HR_TEN | HR_UNIT)
+#define PGMASK_MINUTE (MIN_TEN | MIN_UNIT)
+
+typedef struct
+{
+ int page; /* number of requested page (hexadecimal) */
+ int hour; /* requested hour (hexadecimal) */
+ int minute; /* requested minute (hexadecimal) */
+ int pagemask; /* mask defining which values of the above are set */
+ int pgbuf; /* buffer where page will be stored */
+ int start; /* start of requested part of page */
+ int end; /* end of requested part of page */
+ void __user *buffer; /* pointer to beginning of destination buffer */
+}
+vtx_pagereq_t;
+
+
+/*
+ * Definitions for VTXIOC{GETSTAT,PUTSTAT}
+ */
+
+#define VTX_PAGESIZE (40 * 24)
+#define VTX_VIRTUALSIZE (40 * 49)
+
+typedef struct
+{
+ int pagenum; /* number of page (hexadecimal) */
+ int hour; /* hour (hexadecimal) */
+ int minute; /* minute (hexadecimal) */
+ int charset; /* national charset */
+ unsigned delete : 1; /* delete page (C4) */
+ unsigned headline : 1; /* insert headline (C5) */
+ unsigned subtitle : 1; /* insert subtitle (C6) */
+ unsigned supp_header : 1; /* suppress header (C7) */
+ unsigned update : 1; /* update page (C8) */
+ unsigned inter_seq : 1; /* interrupted sequence (C9) */
+ unsigned dis_disp : 1; /* disable/suppress display (C10) */
+ unsigned serial : 1; /* serial mode (C11) */
+ unsigned notfound : 1; /* /FOUND */
+ unsigned pblf : 1; /* PBLF */
+ unsigned hamming : 1; /* hamming-error occurred */
+}
+vtx_pageinfo_t;
+
+#endif /* _VTX_H */
diff --git a/include/media/davinci/avnetlcd_encoder.h b/include/media/davinci/avnetlcd_encoder.h
new file mode 100644
index 00000000..1ca52c27
--- /dev/null
+++ b/include/media/davinci/avnetlcd_encoder.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef AVNETLCD_ENCODER_H
+#define AVNETLCD_ENCODER_H
+
+#ifdef __KERNEL__
+/* Kernel Header files */
+#include <linux/i2c.h>
+#include <linux/device.h>
+#endif
+
+#ifdef __KERNEL__
+/* encoder standard related strctures */
+#define AVNETLCD_ENCODER_MAX_NO_OUTPUTS (1)
+#define AVNETLCD_ENCODER_GRAPHICS_NUM_STD (1)
+
+struct avnetlcd_encoder_params {
+ int outindex;
+ char *mode;
+};
+
+struct avnetlcd_encoder_config {
+ int no_of_outputs;
+ struct {
+ char *output_name;
+ int no_of_standard;
+ struct vid_enc_mode_info
+ standards[AVNETLCD_ENCODER_GRAPHICS_NUM_STD];
+ } output[AVNETLCD_ENCODER_MAX_NO_OUTPUTS];
+};
+
+struct avnetlcd_encoder_channel {
+ struct encoder_device *enc_device;
+ struct avnetlcd_encoder_params params;
+};
+
+#endif /* End of #ifdef __KERNEL__ */
+
+#endif /* End of #ifndef AVNETLCD_ENCODER_H */
diff --git a/include/media/davinci/davinci_display.h b/include/media/davinci/davinci_display.h
new file mode 100644
index 00000000..0fffacbd
--- /dev/null
+++ b/include/media/davinci/davinci_display.h
@@ -0,0 +1,200 @@
+/*
+ * Copyright (C) 2005-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DAVINCI_DISPLAY_H
+#define DAVINCI_DISPLAY_H
+
+#include <linux/ioctl.h>
+
+/* Application calls this ioctl for setting the C-plane buffer offset
+ * relative to the start of Y-plane buffer address
+ */
+#define VIDIOC_S_COFST _IOWR('V', 200, int)
+
+/* Application calls this ioctl for setting the offset into the Y-plane
+ * that represents the beginning of the displayed image. This is useful
+ * for cropping codec padding at the top of the Y-plane.
+ */
+#define VIDIOC_S_YDOFST _IOWR('V', 201, int)
+
+#ifdef __KERNEL__
+
+/* Header files */
+#include <linux/videodev.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-common.h>
+#include <media/videobuf-dma-contig.h>
+#include <video/davinci_osd.h>
+#include <media/davinci/vid_encoder_types.h>
+
+#define DAVINCI_DISPLAY_MAX_DEVICES 2
+
+enum davinci_display_device_id {
+ DAVINCI_DISPLAY_DEVICE_0,
+ DAVINCI_DISPLAY_DEVICE_1
+};
+
+#define DAVINCI_DISPLAY_MAJOR_RELEASE 1
+#define DAVINCI_DISPLAY_MINOR_RELEASE 0
+#define DAVINCI_DISPLAY_BUILD 1
+#define DAVINCI_DISPLAY_VERSION_CODE ((DAVINCI_DISPLAY_MAJOR_RELEASE << 16) | \
+ (DAVINCI_DISPLAY_MINOR_RELEASE << 8) | \
+ DAVINCI_DISPLAY_BUILD)
+
+#define DAVINCI_DISPLAY_VALID_FIELD(field) ((V4L2_FIELD_NONE == field) || \
+ (V4L2_FIELD_ANY == field) || (V4L2_FIELD_INTERLACED == field))
+
+/* Macros */
+#define ISNULL(p) ((NULL) == (p))
+#define ISALIGNED(a) (0 == (a % 8))
+
+/* Exp ratio numerator and denominator constants */
+#define DAVINCI_DISPLAY_H_EXP_RATIO_N (9)
+#define DAVINCI_DISPLAY_H_EXP_RATIO_D (8)
+#define DAVINCI_DISPLAY_V_EXP_RATIO_N (6)
+#define DAVINCI_DISPLAY_V_EXP_RATIO_D (5)
+
+/* Zoom multiplication factor */
+#define DAVINCI_DISPLAY_ZOOM_4X (4)
+#define DAVINCI_DISPLAY_ZOOM_2X (2)
+
+#define DAVINCI_DISPLAY_PIXELASPECT_NTSC {11, 10}
+#define DAVINCI_DISPLAY_PIXELASPECT_PAL {54, 59}
+#define DAVINCI_DISPLAY_PIXELASPECT_SP {1, 1}
+
+/* settings for commonly used video formats */
+#define DAVINCI_DISPLAY_WIN_NTSC {0, 0, 720, 480}
+#define DAVINCI_DISPLAY_WIN_PAL {0, 0, 720, 576}
+#define DAVINCI_DISPLAY_WIN_640_480 {0, 0, 640, 480}
+#define DAVINCI_DISPLAY_WIN_640_400 {0, 0, 640, 400}
+#define DAVINCI_DISPLAY_WIN_640_350 {0, 0, 640, 350}
+#define DAVINCI_DISPLAY_WIN_720P {0, 0, 1280, 720}
+#define DAVINCI_DISPLAY_WIN_1080I {0, 0, 1920, 1080}
+
+/* Structures */
+struct display_layer_info {
+ int enable;
+ /* Layer ID used by Display Manager */
+ enum davinci_disp_layer id;
+ struct davinci_layer_config config;
+ enum davinci_zoom_factor h_zoom;
+ enum davinci_zoom_factor v_zoom;
+ enum davinci_h_exp_ratio h_exp;
+ enum davinci_v_exp_ratio v_exp;
+};
+
+/* Frame rate simulation information */
+struct davinci_timeperframe_info {
+ /* Framerate of display hardware */
+ struct v4l2_fract hw_timeperframe;
+ /* Framerate to simulate by skipping irq requests */
+ struct v4l2_fract sim_timeperframe;
+ /* irq service rate (how often do we service an irq) */
+ u32 irq_service_rate;
+ /* Next irq to service */
+ u32 next_irq;
+ /* irq count since last one serviced */
+ u32 irq_count;
+};
+
+/* display object structure */
+struct display_obj {
+ /* Buffer specific parameters
+ * List of buffer pointers for storing frames
+ */
+ u32 fbuffers[VIDEO_MAX_FRAME];
+ /* number of buffers in fbuffers */
+ u32 numbuffers;
+ /* Pointer pointing to current v4l2_buffer */
+ struct videobuf_buffer *curFrm;
+ /* Pointer pointing to next v4l2_buffer */
+ struct videobuf_buffer *nextFrm;
+ /* videobuf specific parameters
+ * Buffer queue used in video-buf
+ */
+ struct videobuf_queue buffer_queue;
+ /* Queue of filled frames */
+ struct list_head dma_queue;
+ /* Used in video-buf */
+ spinlock_t irqlock;
+ /* V4l2 specific parameters */
+ /* Identifies video device for this layer */
+ struct video_device *video_dev;
+ /* This field keeps track of type of buffer exchange mechanism user
+ * has selected
+ */
+ enum v4l2_memory memory;
+ /* Used to keep track of state of the priority */
+ struct v4l2_prio_state prio;
+ /* Used to store pixel format */
+ struct v4l2_pix_format pix_fmt;
+ enum v4l2_field buf_field;
+ /* Video layer configuration params */
+ struct display_layer_info layer_info;
+ /* vpbe specific parameters
+ * enable window for display
+ */
+ unsigned char window_enable;
+ /* number of open instances of the layer */
+ u32 usrs;
+ /* number of users performing IO */
+ u32 io_usrs;
+ /* Indicates id of the field which is being displayed */
+ u32 field_id;
+ /* Indicates whether streaming started */
+ u8 started;
+ /* Identifies device object */
+ enum davinci_display_device_id device_id;
+ /* Frame rate information */
+ struct davinci_timeperframe_info tpf_info;
+};
+
+/* File handle structure */
+struct davinci_fh {
+ /* pointer to layer object for opened device */
+ struct display_obj *layer;
+ /* Indicates whether this file handle is doing IO */
+ u8 io_allowed;
+ /* Used to keep track priority of this instance */
+ enum v4l2_priority prio;
+};
+
+/* vpbe device structure */
+struct davinci_display {
+ /* layer specifc parameters */
+ /* lock used to access this structure */
+ struct mutex lock;
+ /* Display mode information */
+ struct vid_enc_mode_info mode_info;
+ /* Frame buffer information */
+ struct davinci_fb_desc fb_desc;
+ /* interrupt callback */
+ struct davinci_disp_callback event_callback;
+ struct display_obj *dev[DAVINCI_DISPLAY_MAX_DEVICES];
+};
+
+struct buf_config_params {
+ u8 min_numbuffers;
+ u8 numbuffers[DAVINCI_DISPLAY_MAX_DEVICES];
+ u32 min_bufsize[DAVINCI_DISPLAY_MAX_DEVICES];
+ u32 layer_bufsize[DAVINCI_DISPLAY_MAX_DEVICES];
+ u32 video_limit[DAVINCI_DISPLAY_MAX_DEVICES];
+};
+
+#endif /* End of __KERNEL__ */
+#endif /* DAVINCI_DISPLAY_H */
diff --git a/include/media/davinci/davinci_enc.h b/include/media/davinci/davinci_enc.h
new file mode 100644
index 00000000..a36a5f6c
--- /dev/null
+++ b/include/media/davinci/davinci_enc.h
@@ -0,0 +1,248 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ *
+ * davinci_enc.h.
+ * This file contains APIs exported by Davinci Encoder Manager. Davinci Encoder
+ * manager uses the services from encoder interface for implementing it's
+ * functionality.
+ * It also configure the VENC/DLCD to support a specific video/graphics mode
+ * This interface allows set/get of output, mode , parameters and controls at
+ * the encoder. encoder may support multiple channels, each with a set of
+ * encoders So encoder manager support registration of encoders and APIs
+ * on a per channel basis.
+ */
+
+#ifndef DAVINCI_ENC_H
+#define DAVINCI_ENC_H
+
+#ifdef __KERNEL__
+#include <media/davinci/vid_encoder_types.h>
+
+/**
+ * Maximum channels supported by encoder manager. Set to 1 for DM355 & DM6446.
+ * If a platform support multiple channel, this needs to be changed. Channel
+ * number starts with 0
+ */
+#define DAVINCI_ENC_MAX_CHANNELS CONFIG_ENC_MNGR_MAX_CHANNELS
+
+/**
+ * function davinci_enc_setparams
+ * @params: pointer to params structure.
+ * @channel: channel number.
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Set parameters at current active encoder. params will be defined by
+ * the specific encoder and used by user space applications to set
+ * encoder parameters.
+ */
+int davinci_enc_setparams(int channel, void *params);
+
+/**
+ * function davinci_enc_getparams
+ * @params: pointer to params structure.
+ * @channel: channel number, 0 for first channel and so forth
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Get parameters at current active encoder. params will be defined by
+ * the specific encoder and used by user space applications to get
+ * encoder parameters.
+ */
+int davinci_enc_getparams(int channel, void *params);
+
+/**
+ * function davinci_enc_set_mode
+ * @channel: channel number.
+ * @mode_info: ptr to vid_enc_mode_info structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * set standard or non-standard mode at current encoder's active output.
+ * Encoder Manager first configure the VENC or associated SoC hardware
+ * before calling the setmode() API of the encoder. To do so, encoder Manager
+ * calls the getmode() to get the mode_info for this mode and configure the
+ * mode based on the timing information present in this structure.
+ */
+int davinci_enc_set_mode(int channel, struct vid_enc_mode_info *mode_info);
+/**
+ * function davinci_enc_get_mode
+ * @channel: channel number, starting index 0.
+ * @mode_info: ptr to vid_enc_mode_info structure. This is updated by
+ * encoder manager
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * get video or graphics mode at current encoder's active output.
+ *
+ */
+int davinci_enc_get_mode(int channel, struct vid_enc_mode_info *mode_info);
+
+/**
+ * function davinci_enc_set_control
+ * @channel: channel number.
+ * @ctrl: davinci_vid_enc_control type
+ * @val: control value to be set
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Set controls at the current encoder's output.
+ *
+ */
+int davinci_enc_set_control(int channel, enum vid_enc_ctrl_id ctrl, char val);
+
+/**
+ * function davinci_enc_get_control
+ * @channel: channel number.
+ * @ctrl: control type as per davinci_vid_enc_ctrl_type
+ * @val: ptr to value that gets updated
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Get controls at the current encoder's output.
+ *
+ */
+int davinci_enc_get_control(int channel, enum vid_enc_ctrl_id ctrl, char *val);
+
+/**
+ * function davinci_enc_set_output
+ * @channel: channel number.
+ * @output: ptr to output name string
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Set output - Set channel's output to the one identified by output string
+ * The encoder manager calls enumoutput() of each of the encoder to determine
+ * the encoder that supports this output and set this encoder as the current
+ * encoder. It calls setoutput() of the selected encoder. Encoder is expected
+ * to set a default mode on this output internally. Manager calls the getmode()
+ * to get information about the mode to configure the SoC hardware (VENC/DLCD
+ * for Davinci/DM355. During configuration of the SoC hardware for timing,
+ * mgr would call enable() to disable and re-enable the output of the encoder
+ * to avoid noise at the display. It may also call reset() to make sure the
+ * encoder is reset if required by the encoder hardware.
+ */
+int davinci_enc_set_output(int channel, char *output);
+
+/**
+ * function davinci_enc_get_output
+ * @channel: channel number.
+ * @output: ptr to array of char to hold output name. size
+ * VID_ENC_NAME_MAX_CHARS
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Get output - Get channel's output. User call this to get the current
+ * output name
+ */
+int davinci_enc_get_output(int channel, char *output);
+
+/**
+ * function davinci_enc_reset
+ * @channel: channel number. DAVINCI_ENC_MAX_CHANNELS set to 1
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Do a software Reset the current encoder. Some of the encoders require this.
+ * This shouldn't affect the contents of the registers configured already for
+ * for output, standard, control etc. If there is no support, encoder doesn't
+ * implement this API.
+ */
+int davinci_enc_reset(int channel);
+
+/**
+ * function davinci_enc_enable_output
+ * @channel: channel number. DAVINCI_ENC_MAX_CHANNELS set to 1
+ * @flag: flag to indicate enable or disable, 0 - disable, 1 - enable
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Enable/Disable the current ouput. While the VPSS is configured for a
+ * video mode or graphics mode, you may observe noise on the display device
+ * due to timing changes. To avoid this, the output may be disabled during
+ * configuration of the VENC or related hardware in the VPSS and re-enabled
+ * using this API. This will switch the output DACs Off or On based on the
+ * flag.
+ */
+int davinci_enc_enable_output(int channel, int flag);
+
+/**
+ * davinci_enc_enable_vbi
+ * @flag: flag which tells whether to enable or disable raw vbi
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * This function is used to enable/disable RAW VBI sending in
+ * the encoder.
+ */
+int davinci_enc_enable_vbi(int channel, int flag);
+
+/**
+ * davinci_enc_enable_hbi
+ * @channel: channel number (0 to MAX_CHANNELS-1)
+ * @flag: flag which tells whether to enable or disable raw hbi
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * This function is used to enable/disable RAW HBI sending in
+ * the encoder.
+ */
+int davinci_enc_enable_hbi(int channel, int flag);
+
+/**
+ * davinci_enc_enable_sliced_vbi
+ * @channel: channel number.
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Following funcion is used to enable support for
+ * sending set of sliced vbi services. Caller calls
+ * this function with pointer to the structure vid_enc_sliced_vbi_service
+ */
+int davinci_enc_enable_sliced_vbi(int channel,
+ struct vid_enc_sliced_vbi_service *service);
+/**
+ * davinci_enc_enable_sliced_vbi
+ * @channel: channel number.
+ * @service: pointer to the structure vid_enc_sliced_vbi_service
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Following funcion is used to enable support for
+ * sending set of sliced vbi services. Caller calls
+ * this function with pointer to the structure vid_enc_sliced_vbi_service
+ */
+int davinci_enc_get_sliced_cap(int channel,
+ struct vid_enc_sliced_vbi_service *services);
+
+/**
+ * davinci_enc_write_sliced_vbi_data
+ * @channel: channel number.
+ * @data: pointer to the structure vid_enc_sliced_vbi_data
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Register the encoder module with the encoder manager
+ * This is implemented by the encoder Manager
+ */
+int davinci_enc_write_sliced_vbi_data(int channel,
+ struct vid_enc_sliced_vbi_data *data);
+
+#endif /* #ifdef __KERNEL__ */
+#endif /* #ifdef DAVINCI_ENC_H */
diff --git a/include/media/davinci/davinci_enc_mngr.h b/include/media/davinci/davinci_enc_mngr.h
new file mode 100644
index 00000000..fd3892de
--- /dev/null
+++ b/include/media/davinci/davinci_enc_mngr.h
@@ -0,0 +1,56 @@
+
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DAVINCI_ENC_MNGR_H
+#define DAVINCI_ENC_MNGR_H
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/semaphore.h>
+#include <mach/hardware.h>
+#include <mach/mux.h>
+#include <mach/cputype.h>
+#include <media/davinci/davinci_enc.h>
+#include <media/davinci/vid_encoder_types.h>
+#include <video/davinci_vpbe.h>
+
+#ifdef __KERNEL__
+
+#define DAVINCI_ENC_MAX_ENCODERS (4)
+
+struct vid_enc_device_mgr {
+ struct semaphore lock;
+ int num_encoders; /* number of encoders in this channel */
+ int current_encoder; /* index to current encoder */
+ char current_output[VID_ENC_NAME_MAX_CHARS]; /* current output */
+ struct vid_enc_mode_info current_mode; /* current mode */
+ struct vid_encoder_device *encoder[DAVINCI_ENC_MAX_ENCODERS];
+};
+
+struct enc_config {
+ char output[VID_ENC_NAME_MAX_CHARS];
+ char mode[VID_ENC_NAME_MAX_CHARS];
+};
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/include/media/davinci/davinci_platform.h b/include/media/davinci/davinci_platform.h
new file mode 100644
index 00000000..1ba6211e
--- /dev/null
+++ b/include/media/davinci/davinci_platform.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DAVINCI_PLATFORM_H
+#define DAVINCI_PLATFORM_H
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <mach/hardware.h>
+#include <mach/mux.h>
+#include <mach/cputype.h>
+#include <media/davinci/davinci_enc.h>
+#include <media/davinci/vid_encoder_types.h>
+#include <video/davinci_vpbe.h>
+#include <media/davinci/davinci_enc_mngr.h>
+
+#ifdef __KERNEL__
+extern void enable_lcd(void);
+extern void enable_hd_clk(void);
+int davinci_enc_select_venc_clock(int clk);
+void davinci_enc_set_display_timing(struct vid_enc_mode_info *mode);
+void davinci_enc_set_mode_platform(int channel, struct vid_enc_device_mgr *mgr);
+
+u32 venc_reg_in(u32 offset);
+u32 venc_reg_out(u32 offset, u32 val);
+u32 venc_reg_merge(u32 offset, u32 val, u32 mask);
+#endif /* End of __KERNEL__ */
+
+#endif /* End of ifndef DAVINCI_PLATFORM_H */
diff --git a/include/media/davinci/dm365_a3_hw.h b/include/media/davinci/dm365_a3_hw.h
new file mode 100644
index 00000000..815550c4
--- /dev/null
+++ b/include/media/davinci/dm365_a3_hw.h
@@ -0,0 +1,255 @@
+/* *
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DM365_A3_HW_H
+#define DM365_A3_HW_H
+
+#ifdef __KERNEL__
+#include <asm/io.h>
+#include <linux/device.h>
+#include <mach/hardware.h>
+#include "dm365_aew.h"
+#include "dm365_af.h"
+
+/* AF/AE/AWB Base address and range */
+#define DM365_A3_HW_ADDR 0x1c71400
+#define DM365_A3_HW_ADDR_SIZE 128
+/* AF Register Offsets */
+
+/* Peripheral Revision and Class Information */
+#define AFPID 0x0
+/* Peripheral Control Register */
+#define AFPCR 0x4
+/* Setup for the Paxel Configuration */
+#define AFPAX1 0x8
+/* Setup for the Paxel Configuration */
+#define AFPAX2 0xc
+/* Start Position for AF Engine Paxels */
+#define AFPAXSTART 0x10
+/* Start Position for IIRSH */
+#define AFIIRSH 0x14
+/* SDRAM/DDRAM Start address */
+#define AFBUFST 0x18
+/* IIR filter coefficient data for SET 0 */
+#define AFCOEF010 0x1c
+/* IIR filter coefficient data for SET 0 */
+#define AFCOEF032 0x20
+/* IIR filter coefficient data for SET 0 */
+#define AFCOEF054 0x24
+/* IIR filter coefficient data for SET 0 */
+#define AFCOEF076 0x28
+/* IIR filter coefficient data for SET 0 */
+#define AFCOEF098 0x2c
+/* IIR filter coefficient data for SET 0 */
+#define AFCOEF0010 0x30
+/* IIR filter coefficient data for SET 1 */
+#define AFCOEF110 0x34
+/* IIR filter coefficient data for SET 1 */
+#define AFCOEF132 0x38
+/* IIR filter coefficient data for SET 1 */
+#define AFCOEF154 0x3c
+/* IIR filter coefficient data for SET 1 */
+#define AFCOEF176 0x40
+/* IIR filter coefficient data for SET 1 */
+#define AFCOEF198 0x44
+/* IIR filter coefficient data for SET 1 */
+#define AFCOEF1010 0x48
+
+/* Vertical Focus vlaue configuration 1 */
+#define AF_VFV_CFG1 0x68
+/* Vertical Focus vlaue configuration 2 */
+#define AF_VFV_CFG2 0x6c
+/* Vertical Focus vlaue configuration 3 */
+#define AF_VFV_CFG3 0x70
+/* Vertical Focus vlaue configuration 4 */
+#define AF_VFV_CFG4 0x74
+/* Horizontal Focus vlaue Threshold */
+#define AF_HFV_THR 0x78
+/* COEFFICIENT BASE ADDRESS */
+
+#define AF_OFFSET 0x00000004
+
+/* AEW Register offsets */
+#define AEWPID AFPID
+/* Peripheral Control Register */
+#define AEWPCR AFPCR
+/* Configuration for AE/AWB Windows */
+#define AEWWIN1 0x4c
+/* Start position for AE/AWB Windows */
+#define AEWINSTART 0x50
+/* Start position and height for black linr of AE/AWB Windows */
+#define AEWINBLK 0x54
+/* Configuration for subsampled data in AE/AWB windows */
+#define AEWSUBWIN 0x58
+/* SDRAM/DDRAM Start address for AEW Engine */
+#define AEWBUFST 0x5c
+/* Line start */
+#define LINE_START 0x64
+
+/* AEW Engine configuration */
+#define AEW_CFG 0x60
+
+/* PID fields */
+#define PID_MINOR (0x3f << 0)
+#define PID_MAJOR (7 << 8)
+#define PID_RTL (0x1f << 11)
+#define PID_FUNC (0xFFF << 16)
+#define PID_SCHEME (3 << 30)
+
+/* PCR FIELDS */
+
+/*Saturation Limit */
+#define AVE2LMT (0x3ff << 22)
+#define AF_VF_EN (1 << 20)
+#define AEW_MED_EN (1 << 19)
+/* Busy bit for AEW */
+#define AEW_BUSYAEWB (1 << 18)
+/* Alaw Enable/Disable Bit */
+#define AEW_ALAW_EN (1 << 17)
+/* AEW Engine Enable/Disable bit */
+#define AEW_EN (1 << 16)
+/* Busy Bit for AF */
+#define AF_BUSYAF (1 << 15)
+#define FVMODE (1 << 14)
+#define RGBPOS (7 << 11)
+#define MED_TH (0xFF << 3)
+#define AF_MED_EN (1 << 2)
+#define AF_ALAW_EN (1 << 1)
+#define AF_EN (1 << 0)
+
+/*
+ * AFPAX1 fields
+ */
+#define PAXW (0xFF << 16)
+#define PAXH (0xFF)
+
+/*
+ * AFPAX2 fields
+ */
+#define AFINCH (0xF << 17)
+#define AFINCV (0xF << 13)
+#define PAXVC (0x7F << 6)
+#define PAXHC (0x3F)
+
+/*
+ * AFPAXSTART fields
+ */
+#define PAXSH (0xFFF << 16)
+#define PAXSV (0xFFF)
+
+/*
+ * IIR COEFFICIENT MASKS
+ */
+#define COEF_MASK0 (0xFFF)
+#define COEF_MASK1 (0xFFF << 16)
+
+/*
+ * VFV_CFGX COEFFICIENT MASKS
+ */
+#define VFV_COEF_MASK0 (0xFF)
+#define VFV_COEF_MASK1 (0xFF << 8)
+#define VFV_COEF_MASK2 (0xFF << 16)
+#define VFV_COEF_MASK3 (0xFF << 24)
+
+/* HFV THR MASKS */
+#define HFV_THR0_MASK (0xFFFF)
+#define HFV_THR2_SHIFT (16)
+#define HFV_THR2_MASK (0xFFFF << HFV_THR2_SHIFT)
+
+/* VFV THR MASKS */
+#define VFV_THR_SHIFT (16)
+#define VFV_THR_MASK (0xFFFF << VFV_THR_SHIFT)
+
+/* BIT SHIFTS */
+#define AF_BUSYAF_SHIFT 15
+#define AEW_EN_SHIFT 16
+#define AEW_BUSYAEW_SHIFT 18
+#define AF_RGBPOS_SHIFT 11
+#define AF_MED_TH_SHIFT 3
+#define AF_PAXW_SHIFT 16
+#define AF_LINE_INCR_SHIFT 13
+#define AF_COLUMN_INCR_SHIFT 17
+#define AF_VT_COUNT_SHIFT 6
+#define AF_HZ_START_SHIFT 16
+#define AF_COEF_SHIFT 16
+
+/* AEWWIN1 fields */
+/* Window Height */
+#define WINH (0x7F << 24)
+/* Window Width */
+#define WINW (0x7f << 13)
+/* Window vertical Count */
+#define WINVC (0x7f << 6)
+/* Window Horizontal Count */
+#define WINHC (0x3f)
+
+/* AEWWINSTART fields */
+/* Window Vertical Start */
+#define WINSV (0xfff << 16)
+/* Window Horizontal start */
+#define WINSH (0xfff)
+
+/* AEWWINBLK fields
+ * Black Window Vertical Start
+ */
+#define BLKWINSV (0xfff << 16)
+/* Black Window height */
+#define BLKWINH (0x7f)
+
+/* AEWSUBWIN fields
+ * Vertical Lime Increment
+ */
+#define AEWINCV (0xf << 8)
+/* Horizontal Line Increment */
+#define AEWINCH (0xf)
+
+/* BIT POSITIONS */
+#define AEW_AVE2LMT_SHIFT 22
+
+#define AEW_WINH_SHIFT 24
+#define AEW_WINW_SHIFT 13
+#define AEW_VT_COUNT_SHIFT 6
+#define AEW_VT_START_SHIFT 16
+#define AEW_LINE_INCR_SHIFT 8
+#define AEW_BLKWIN_VT_START_SHIFT 16
+#define AEW_EN_SHIFT 16
+#define AEW_BUSYAEWB_SHIFT 18
+
+#define AEFMT_SHFT 8
+#define AEFMT_MASK (3 << AEFMT_SHFT)
+#define AEW_SUMSHFT_MASK (0xf)
+
+#define SET_VAL(x) (((x) / 2) - 1)
+#define NOT_EVEN 1
+#define CHECK_EVEN(x) ((x) % 2)
+
+/* Function declaration for af */
+int af_register_setup(struct device *, struct af_device *);
+void af_engine_setup(struct device *, int);
+void af_set_address(struct device *, unsigned long);
+/* Function Declaration for aew */
+int aew_register_setup(struct device *, struct aew_device *);
+void aew_engine_setup(struct device *, int);
+void aew_set_address(struct device *, unsigned long);
+u32 af_get_hw_state(void);
+u32 aew_get_hw_state(void);
+u32 af_get_enable(void);
+u32 aew_get_enable(void);
+
+#endif /*end of #ifdef __KERNEL__ */
+#endif /*end of #ifdef __DAVINCI_A3_HW_H */
diff --git a/include/media/davinci/dm365_aew.h b/include/media/davinci/dm365_aew.h
new file mode 100644
index 00000000..ad96108d
--- /dev/null
+++ b/include/media/davinci/dm365_aew.h
@@ -0,0 +1,199 @@
+/* *
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef DM365_AEW_DRIVER_H
+#define DM365_AEW_DRIVER_H
+
+#include <linux/ioctl.h>
+#ifdef __KERNEL__
+#include <linux/wait.h>
+#include <linux/mutex.h>
+#include <asm/io.h>
+#endif /* end of #ifdef __KERNEL__ */
+
+/* Driver Range Constants */
+#define AEW_WINDOW_VERTICAL_COUNT_MIN 1
+#define AEW_WINDOW_VERTICAL_COUNT_MAX 128
+#define AEW_WINDOW_HORIZONTAL_COUNT_MIN 2
+#define AEW_WINDOW_HORIZONTAL_COUNT_MAX 36
+
+#define AEW_WIDTH_MIN 8
+#define AEW_WIDTH_MAX 256
+
+#define AEW_AVELMT_MAX 1023
+
+#define AEW_HZ_LINEINCR_MIN 2
+#define AEW_HZ_LINEINCR_MAX 32
+
+#define AEW_VT_LINEINCR_MIN 2
+#define AEW_VT_LINEINCR_MAX 32
+
+#define AEW_HEIGHT_MIN 2
+#define AEW_HEIGHT_MAX 256
+
+#define AEW_HZSTART_MIN 0
+#define AEW_HZSTART_MAX 4095
+
+#define AEW_VTSTART_MIN 0
+#define AEW_VTSTART_MAX 4095
+
+#define AEW_BLKWINHEIGHT_MIN 2
+#define AEW_BLKWINHEIGHT_MAX 256
+
+#define AEW_BLKWINVTSTART_MIN 0
+#define AEW_BLKWINVTSTART_MAX 4095
+
+#define AEW_SUMSHIFT_MAX 15
+
+/* Statistics data size per window */
+#define AEW_WINDOW_SIZE 32
+#define AEW_WINDOW_SIZE_SUM_ONLY 16
+
+#ifdef __KERNEL__
+
+/* Device Constants */
+#define AEW_NR_DEVS 1
+#define AEW_DEVICE_NAME "dm365_aew"
+#define AEW_MAJOR_NUMBER 0
+#define AEW_IOC_MAXNR 4
+#define AEW_TIMEOUT ((300 * HZ) / 1000)
+#endif
+
+
+/* List of ioctls */
+#pragma pack(1)
+#define AEW_MAGIC_NO 'e'
+#define AEW_S_PARAM _IOWR(AEW_MAGIC_NO, 1, struct aew_configuration *)
+#define AEW_G_PARAM _IOWR(AEW_MAGIC_NO, 2, struct aew_configuration *)
+#define AEW_ENABLE _IO(AEW_MAGIC_NO, 3)
+#define AEW_DISABLE _IO(AEW_MAGIC_NO, 4)
+#pragma pack()
+
+/* Enum for device usage */
+enum aew_in_use_flag {
+ /* Device is not in use */
+ AEW_NOT_IN_USE,
+ /* Device in use */
+ AEW_IN_USE
+};
+
+/* Enum for Enable/Disable specific feature */
+enum aew_enable_flag {
+ H3A_AEW_DISABLE,
+ H3A_AEW_ENABLE
+};
+
+enum aew_config_flag {
+ H3A_AEW_CONFIG_NOT_DONE,
+ H3A_AEW_CONFIG
+};
+
+
+/* Contains the information regarding Window Structure in AEW Engine */
+struct aew_window {
+ /* Width of the window */
+ unsigned int width;
+ /* Height of the window */
+ unsigned int height;
+ /* Horizontal Start of the window */
+ unsigned int hz_start;
+ /* Vertical Start of the window */
+ unsigned int vt_start;
+ /* Horizontal Count */
+ unsigned int hz_cnt;
+ /* Vertical Count */
+ unsigned int vt_cnt;
+ /* Horizontal Line Increment */
+ unsigned int hz_line_incr;
+ /* Vertical Line Increment */
+ unsigned int vt_line_incr;
+};
+
+/* Contains the information regarding the AEW Black Window Structure */
+struct aew_black_window {
+ /* Height of the Black Window */
+ unsigned int height;
+ /* Vertical Start of the black Window */
+ unsigned int vt_start;
+};
+
+/* Contains the information regarding the Horizontal Median Filter */
+struct aew_hmf {
+ /* Status of Horizontal Median Filter */
+ enum aew_enable_flag enable;
+ /* Threshhold Value for Horizontal Median Filter. Make sure
+ * to keep this same as AF threshold since we have a common
+ * threshold for both
+ */
+ unsigned int threshold;
+};
+
+/* AE/AWB output format */
+enum aew_output_format {
+ AEW_OUT_SUM_OF_SQUARES,
+ AEW_OUT_MIN_MAX,
+ AEW_OUT_SUM_ONLY
+};
+
+/* Contains configuration required for setup of AEW engine */
+struct aew_configuration {
+ /* A-law status */
+ enum aew_enable_flag alaw_enable;
+ /* AE/AWB output format */
+ enum aew_output_format out_format;
+ /* AW/AWB right shift value for sum of pixels */
+ char sum_shift;
+ /* Saturation Limit */
+ int saturation_limit;
+ /* HMF configurations */
+ struct aew_hmf hmf_config;
+ /* Window for AEW Engine */
+ struct aew_window window_config;
+ /* Black Window */
+ struct aew_black_window blackwindow_config;
+};
+#ifdef __KERNEL__
+/* Contains information about device structure of AEW*/
+struct aew_device {
+ /* Driver usage flag */
+ enum aew_in_use_flag in_use;
+ /* Device configuration */
+ struct aew_configuration *config;
+ /* Contains latest statistics */
+ void *buff_old;
+ /* Buffer in which HW will fill the statistics or HW is already
+ * filling
+ */
+ void *buff_curr;
+ /* statistics Buffer which will be passed */
+ void *buff_app;
+ /* to user on read call. Flag indicates statistics are available */
+ int buffer_filled;
+ /* Window size in bytes */
+ unsigned int size_window;
+ /* Wait queue for the driver */
+ wait_queue_head_t aew_wait_queue;
+ /* Mutex for driver */
+ struct mutex read_blocked;
+ /* Flag indicates Engine is configured */
+ enum aew_config_flag aew_config;
+};
+
+int aew_hardware_setup(void);
+int aew_validate_parameters(void);
+#endif /* End of #ifdef __KERNEL__ */
+#endif /*End of DM365_AEW_H */
diff --git a/include/media/davinci/dm365_af.h b/include/media/davinci/dm365_af.h
new file mode 100644
index 00000000..df25ae81
--- /dev/null
+++ b/include/media/davinci/dm365_af.h
@@ -0,0 +1,245 @@
+/* *
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef AF_DM365_DRIVER_H
+#define AF_DM365_DRIVER_H
+
+#include <linux/ioctl.h>
+#ifdef __KERNEL__
+#include <linux/wait.h>
+#include <linux/mutex.h>
+#include <asm/io.h>
+#endif /* End of __KERNEL_ */
+
+#ifdef __KERNEL__
+/* Device Constants */
+#define AF_MAJOR_NUMBER 0
+#define AF_NR_DEVS 1
+#define AF_TIMEOUT ((300 * HZ) / 1000)
+#endif /* End of #ifdef __KERNEL__ */
+
+/* Range Constants */
+
+#define AF_PAXEL_HORIZONTAL_COUNT_MIN 1
+#define AF_PAXEL_HORIZONTAL_COUNT_MAX 36
+
+#define AF_PAXEL_VERTICAL_COUNT_MIN 1
+#define AF_PAXEL_VERTICAL_COUNT_MAX 128
+
+#define AF_PAXEL_HF_VF_COUNT_MAX 12
+#define AF_PAXEL_HF_VF_COUNT_MIN 1
+
+#define AF_WIDTH_MIN 8
+#define AF_WIDTH_MAX 512
+
+#define AF_LINE_INCR_MIN 2
+#define AF_LINE_INCR_MAX 32
+
+#define AF_COLUMN_INCR_MIN 2
+#define AF_COLUMN_INCR_MAX 32
+
+#define AF_HEIGHT_MIN 2
+#define AF_HEIGHT_MAX 512
+
+#define AF_HZSTART_MIN 2
+#define AF_HZSTART_MAX 4094
+
+#define AF_VTSTART_MIN 0
+#define AF_VTSTART_MAX 4095
+
+#define AF_MEDTH_MAX 255
+
+#define AF_IIRSH_MAX 4094
+
+/* Statistics data size per paxel */
+#define AF_PAXEL_SIZE_HF_ONLY 48
+#define AF_PAXEL_SIZE_HF_VF 64
+
+#define AF_NUMBER_OF_HFV_COEF 11
+#define AF_NUMBER_OF_VFV_COEF 5
+#define AF_HFV_COEF_MASK 0xFFF
+#define AF_VFV_COEF_MASK 0xFF
+#define AF_HFV_THR_MAX 0xFFFF
+#define AF_VFV_THR_MAX 0xFFFF
+
+/* list of ioctls */
+#pragma pack(1)
+#define AF_IOC_MAXNR 5
+#define AF_MAGIC_NO 'a'
+#define AF_S_PARAM _IOWR(AF_MAGIC_NO, 1, struct af_configuration *)
+#define AF_G_PARAM _IOWR(AF_MAGIC_NO, 2, struct af_configuration *)
+#define AF_ENABLE _IO(AF_MAGIC_NO, 3)
+#define AF_DISABLE _IO(AF_MAGIC_NO, 4)
+#pragma pack()
+
+/* enum used for status of specific feature */
+enum af_enable_flag {
+ H3A_AF_DISABLE,
+ H3A_AF_ENABLE
+};
+
+enum af_config_flag {
+ H3A_AF_CONFIG_NOT_DONE,
+ H3A_AF_CONFIG
+};
+
+struct af_reg_dump {
+ unsigned int addr;
+ unsigned int val;
+};
+
+/* enum used for keep track of whether hardware is used */
+enum af_in_use_flag {
+ AF_NOT_IN_USE,
+ AF_IN_USE
+};
+
+enum af_mode {
+ ACCUMULATOR_SUMMED,
+ ACCUMULATOR_PEAK
+};
+
+/* Focus value selection */
+enum af_focus_val_sel {
+ /* 4 color Horizontal focus value only */
+ AF_HFV_ONLY,
+ /* 1 color Horizontal focus value & 1 color Vertical focus vlaue */
+ AF_HFV_AND_VFV
+};
+
+
+/* Red, Green, and blue pixel location in the AF windows */
+enum rgbpos {
+ /* GR and GB as Bayer pattern */
+ GR_GB_BAYER,
+ /* RG and GB as Bayer pattern */
+ RG_GB_BAYER,
+ /* GR and BG as Bayer pattern */
+ GR_BG_BAYER,
+ /* RG and BG as Bayer pattern */
+ RG_BG_BAYER,
+ /* GG and RB as custom pattern */
+ GG_RB_CUSTOM,
+ /* RB and GG as custom pattern */
+ RB_GG_CUSTOM
+};
+
+/* Contains the information regarding the Horizontal Median Filter */
+struct af_hmf {
+ /* Status of Horizontal Median Filter */
+ enum af_enable_flag enable;
+ /* Threshhold Value for Horizontal Median Filter */
+ unsigned int threshold;
+};
+
+/* Contains the information regarding the IIR Filters */
+struct af_iir {
+ /* IIR Start Register Value */
+ unsigned int hz_start_pos;
+ /* IIR Filter Coefficient for Set 0 */
+ int coeff_set0[AF_NUMBER_OF_HFV_COEF];
+ /* IIR Filter Coefficient for Set 1 */
+ int coeff_set1[AF_NUMBER_OF_HFV_COEF];
+};
+
+/* Contains the information regarding the VFV FIR filters */
+struct af_fir {
+ /* FIR 1 coefficents */
+ int coeff_1[AF_NUMBER_OF_VFV_COEF];
+ /* FIR 2 coefficents */
+ int coeff_2[AF_NUMBER_OF_VFV_COEF];
+ /* Horizontal FV threshold for FIR 1 */
+ unsigned int hfv_thr1;
+ /* Horizontal FV threshold for FIR 2 */
+ unsigned int hfv_thr2;
+ /* Vertical FV threshold for FIR 1 */
+ unsigned int vfv_thr1;
+ /* Vertical FV threshold for FIR 2 */
+ unsigned int vfv_thr2;
+};
+/* Contains the information regarding the Paxels Structure in AF Engine */
+struct af_paxel {
+ /* Width of the Paxel */
+ unsigned int width;
+ /* Height of the Paxel */
+ unsigned int height;
+ /* Horizontal Start Position */
+ unsigned int hz_start;
+ /* Vertical Start Position */
+ unsigned int vt_start;
+ /* Horizontal Count */
+ unsigned int hz_cnt;
+ /* Vertical Count */
+ unsigned int vt_cnt;
+ /* Line Increment */
+ unsigned int line_incr;
+ /* Column Increment. Only for VFV */
+ unsigned int column_incr;
+};
+
+
+/* Contains the parameters required for hardware set up of AF Engine */
+struct af_configuration {
+ /* ALAW status */
+ enum af_enable_flag alaw_enable;
+ /* Focus value selection */
+ enum af_focus_val_sel fv_sel;
+ /* HMF configurations */
+ struct af_hmf hmf_config;
+ /* RGB Positions. Only applicable with AF_HFV_ONLY selection */
+ enum rgbpos rgb_pos;
+ /* IIR filter configurations */
+ struct af_iir iir_config;
+ /* FIR filter configuration */
+ struct af_fir fir_config;
+ /* Paxel parameters */
+ struct af_paxel paxel_config;
+ /* Accumulator mode */
+ enum af_mode mode;
+};
+
+#ifdef __KERNEL__
+/* Structure for device of AF Engine */
+struct af_device {
+ /* Driver usage counter */
+ enum af_in_use_flag in_use;
+ /* Device configuration structure */
+ struct af_configuration *config;
+ /* Contains the latest statistics */
+ void *buff_old;
+ /* Buffer in which HW will fill the statistics or HW is already
+ * filling statistics
+ */
+ void *buff_curr;
+ /* Buffer which will be passed to */
+ void *buff_app;
+ /* user space on read call Size of image buffer */
+ unsigned int buff_size;
+ /* Flag indicates */
+ int buffer_filled;
+ /* statistics are available Paxel size in bytes */
+ int size_paxel;
+ /* Wait queue for driver */
+ wait_queue_head_t af_wait_queue;
+ /* mutex for driver */
+ struct mutex read_blocked;
+ /* Flag indicates Engine is configured */
+ enum af_config_flag af_config;
+};
+
+#endif /* __KERNEL__ */
+#endif /* AF_DM365_DRIVER_H */
diff --git a/include/media/davinci/dm365_ccdc.h b/include/media/davinci/dm365_ccdc.h
new file mode 100644
index 00000000..156e1397
--- /dev/null
+++ b/include/media/davinci/dm365_ccdc.h
@@ -0,0 +1,722 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * ccdc header file for DM365 ISIF
+ */
+
+#ifndef _DM365_CCDC_H
+#define _DM365_CCDC_H
+#include <media/davinci/ccdc_types.h>
+#include <media/davinci/vpfe_types.h>
+/**
+ * ccdc float type S8Q8/U8Q8
+ */
+struct ccdc_float_8 {
+ /* 8 bit integer part */
+ unsigned char integer;
+ /* 8 bit decimal part */
+ unsigned char decimal;
+};
+
+/**
+ * brief ccdc float type U16Q16/S16Q16
+ */
+struct ccdc_float_16 {
+ /* 16 bit integer part */
+ unsigned short integer;
+ /* 16 bit decimal part */
+ unsigned short decimal;
+};
+
+/*
+ * ccdc image(target) window parameters
+ */
+struct ccdc_cropwin {
+ /* horzontal offset of the top left corner in pixels */
+ unsigned int left;
+ /* vertical offset of the top left corner in pixels */
+ unsigned int top;
+ /* width in pixels of the rectangle */
+ unsigned int width;
+ /* height in lines of the rectangle */
+ unsigned int height;
+};
+
+/************************************************************************
+ * Vertical Defect Correction parameters
+ ***********************************************************************/
+
+/**
+ * vertical defect correction methods
+ */
+enum ccdc_vdfc_corr_mode {
+ /* Defect level subtraction. Just fed through if saturating */
+ CCDC_VDFC_NORMAL,
+ /**
+ * Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2
+ * if data saturating
+ */
+ CCDC_VDFC_HORZ_INTERPOL_IF_SAT,
+ /* Horizontal interpolation (((i-2)+(i+2))/2) */
+ CCDC_VDFC_HORZ_INTERPOL
+};
+
+/**
+ * Max Size of the Vertical Defect Correction table
+ */
+#define CCDC_VDFC_TABLE_SIZE 8
+
+/**
+ * Values used for shifting up the vdfc defect level
+ */
+enum ccdc_vdfc_shift {
+ /* No Shift */
+ CCDC_VDFC_NO_SHIFT,
+ /* Shift by 1 bit */
+ CCDC_VDFC_SHIFT_1,
+ /* Shift by 2 bit */
+ CCDC_VDFC_SHIFT_2,
+ /* Shift by 3 bit */
+ CCDC_VDFC_SHIFT_3,
+ /* Shift by 4 bit */
+ CCDC_VDFC_SHIFT_4
+};
+
+/**
+ * Defect Correction (DFC) table entry
+ */
+struct ccdc_vdfc_entry {
+ /* vertical position of defect */
+ unsigned short pos_vert;
+ /* horizontal position of defect */
+ unsigned short pos_horz;
+ /**
+ * Defect level of Vertical line defect position. This is subtracted
+ * from the data at the defect position
+ */
+ unsigned char level_at_pos;
+ /**
+ * Defect level of the pixels upper than the vertical line defect.
+ * This is subtracted from the data
+ */
+ unsigned char level_up_pixels;
+ /**
+ * Defect level of the pixels lower than the vertical line defect.
+ * This is subtracted from the data
+ */
+ unsigned char level_low_pixels;
+};
+
+/**
+ * Structure for Defect Correction (DFC) parameter
+ */
+struct ccdc_dfc {
+ /* enable vertical defect correction */
+ unsigned char en;
+ /* Correction methods */
+ enum ccdc_vdfc_corr_mode corr_mode;
+ /**
+ * 0 - whole line corrected, 1 - not
+ * pixels upper than the defect
+ */
+ unsigned char corr_whole_line;
+ /**
+ * defect level shift value. level_at_pos, level_upper_pos,
+ * and level_lower_pos can be shifted up by this value
+ */
+ enum ccdc_vdfc_shift def_level_shift;
+ /* defect saturation level */
+ unsigned short def_sat_level;
+ /* number of vertical defects. Max is CCDC_VDFC_TABLE_SIZE */
+ short num_vdefects;
+ /* VDFC table ptr */
+ struct ccdc_vdfc_entry table[CCDC_VDFC_TABLE_SIZE];
+};
+
+/************************************************************************
+* Digital/Black clamp or DC Subtract parameters
+************************************************************************/
+/**
+ * Horizontal Black Clamp modes
+ */
+enum ccdc_horz_bc_mode {
+ /**
+ * Horizontal clamp disabled. Only vertical clamp
+ * value is subtracted
+ */
+ CCDC_HORZ_BC_DISABLE,
+ /**
+ * Horizontal clamp value is calculated and subtracted
+ * from image data along with vertical clamp value
+ */
+ CCDC_HORZ_BC_CLAMP_CALC_ENABLED,
+ /**
+ * Horizontal clamp value calculated from previous image
+ * is subtracted from image data along with vertical clamp
+ * value. How the horizontal clamp value for the first image
+ * is calculated in this case ???
+ */
+ CCDC_HORZ_BC_CLAMP_NOT_UPDATED
+};
+
+/**
+ * Base window selection for Horizontal Black Clamp calculations
+ */
+enum ccdc_horz_bc_base_win_sel {
+ /* Select Most left window for bc calculation */
+ CCDC_SEL_MOST_LEFT_WIN,
+
+ /* Select Most right window for bc calculation */
+ CCDC_SEL_MOST_RIGHT_WIN,
+};
+
+/* Size of window in horizontal direction for horizontal bc */
+enum ccdc_horz_bc_sz_h {
+ CCDC_HORZ_BC_SZ_H_2PIXELS,
+ CCDC_HORZ_BC_SZ_H_4PIXELS,
+ CCDC_HORZ_BC_SZ_H_8PIXELS,
+ CCDC_HORZ_BC_SZ_H_16PIXELS
+};
+
+/* Size of window in vertcal direction for vertical bc */
+enum ccdc_horz_bc_sz_v {
+ CCDC_HORZ_BC_SZ_H_32PIXELS,
+ CCDC_HORZ_BC_SZ_H_64PIXELS,
+ CCDC_HORZ_BC_SZ_H_128PIXELS,
+ CCDC_HORZ_BC_SZ_H_256PIXELS
+};
+
+/**
+ * Structure for Horizontal Black Clamp config params
+ */
+struct ccdc_horz_bclamp {
+ /* horizontal clamp mode */
+ enum ccdc_horz_bc_mode mode;
+ /**
+ * pixel value limit enable.
+ * 0 - limit disabled
+ * 1 - pixel value limited to 1023
+ */
+ unsigned char clamp_pix_limit;
+ /**
+ * Select most left or right window for clamp val
+ * calculation
+ */
+ enum ccdc_horz_bc_base_win_sel base_win_sel_calc;
+ /* Window count per color for calculation. range 1-32 */
+ unsigned char win_count_calc;
+ /* Window start position - horizontal for calculation. 0 - 8191 */
+ unsigned short win_start_h_calc;
+ /* Window start position - vertical for calculation 0 - 8191 */
+ unsigned short win_start_v_calc;
+ /* Width of the sample window in pixels for calculation */
+ enum ccdc_horz_bc_sz_h win_h_sz_calc;
+ /* Height of the sample window in pixels for calculation */
+ enum ccdc_horz_bc_sz_v win_v_sz_calc;
+};
+
+/**
+ * Black Clamp vertical reset values
+ */
+enum ccdc_vert_bc_reset_val_sel {
+ /* Reset value used is the clamp value calculated */
+ CCDC_VERT_BC_USE_HORZ_CLAMP_VAL,
+ /* Reset value used is reset_clamp_val configured */
+ CCDC_VERT_BC_USE_CONFIG_CLAMP_VAL,
+ /* No update, previous image value is used */
+ CCDC_VERT_BC_NO_UPDATE
+};
+
+enum ccdc_vert_bc_sz_h {
+ CCDC_VERT_BC_SZ_H_2PIXELS,
+ CCDC_VERT_BC_SZ_H_4PIXELS,
+ CCDC_VERT_BC_SZ_H_8PIXELS,
+ CCDC_VERT_BC_SZ_H_16PIXELS,
+ CCDC_VERT_BC_SZ_H_32PIXELS,
+ CCDC_VERT_BC_SZ_H_64PIXELS
+};
+
+/**
+ * Structure for Vetical Black Clamp configuration params
+ */
+struct ccdc_vert_bclamp {
+ /* Reset value selection for vertical clamp calculation */
+ enum ccdc_vert_bc_reset_val_sel reset_val_sel;
+ /* U12 value if reset_sel = CCDC_BC_VERT_USE_CONFIG_CLAMP_VAL */
+ unsigned short reset_clamp_val;
+ /**
+ * U8Q8. Line average coefficient used in vertical clamp
+ * calculation
+ */
+ unsigned char line_ave_coef;
+ /* Width in pixels of the optical black region used for calculation. */
+ enum ccdc_vert_bc_sz_h ob_h_sz_calc;
+ /* Height of the optical black region for calculation */
+ unsigned short ob_v_sz_calc;
+ /* Optical black region start position - horizontal. 0 - 8191 */
+ unsigned short ob_start_h;
+ /* Optical black region start position - vertical 0 - 8191 */
+ unsigned short ob_start_v;
+};
+
+/**
+ * Structure for Black Clamp configuration params
+ */
+struct ccdc_black_clamp {
+ /**
+ * this offset value is added irrespective of the clamp
+ * enable status. S13
+ */
+ unsigned short dc_offset;
+ /**
+ * Enable black/digital clamp value to be subtracted
+ * from the image data
+ */
+ unsigned char en;
+ /**
+ * black clamp mode. same/separate clamp for 4 colors
+ * 0 - disable - same clamp value for all colors
+ * 1 - clamp value calculated separately for all colors
+ */
+ unsigned char bc_mode_color;
+ /* Vrtical start position for bc subtraction */
+ unsigned short vert_start_sub;
+ /* Black clamp for horizontal direction */
+ struct ccdc_horz_bclamp horz;
+ /* Black clamp for vertical direction */
+ struct ccdc_vert_bclamp vert;
+};
+
+/*************************************************************************
+** Color Space Convertion (CSC)
+*************************************************************************/
+/**
+ * Number of Coefficient values used for CSC
+ */
+#define CCDC_CSC_NUM_COEFF 16
+
+/*************************************************************************
+** Color Space Conversion parameters
+*************************************************************************/
+/**
+ * Structure used for CSC config params
+ */
+struct ccdc_color_space_conv {
+ /* Enable color space conversion */
+ unsigned char en;
+ /**
+ * csc coeffient table. S8Q5, M00 at index 0, M01 at index 1, and
+ * so forth
+ */
+ struct ccdc_float_8 coeff[CCDC_CSC_NUM_COEFF];
+};
+
+/**
+ * CCDC image data size
+ */
+enum ccdc_data_size {
+ /* 8 bits */
+ CCDC_8_BITS,
+ /* 9 bits */
+ CCDC_9_BITS,
+ /* 10 bits */
+ CCDC_10_BITS,
+ /* 11 bits */
+ CCDC_11_BITS,
+ /* 12 bits */
+ CCDC_12_BITS,
+ /* 13 bits */
+ CCDC_13_BITS,
+ /* 14 bits */
+ CCDC_14_BITS,
+ /* 15 bits */
+ CCDC_15_BITS,
+ /* 16 bits */
+ CCDC_16_BITS
+};
+
+/**
+ * CCDC image data shift to right
+ */
+enum ccdc_datasft {
+ /* No Shift */
+ CCDC_NO_SHIFT,
+ /* 1 bit Shift */
+ CCDC_1BIT_SHIFT,
+ /* 2 bit Shift */
+ CCDC_2BIT_SHIFT,
+ /* 3 bit Shift */
+ CCDC_3BIT_SHIFT,
+ /* 4 bit Shift */
+ CCDC_4BIT_SHIFT,
+ /* 5 bit Shift */
+ CCDC_5BIT_SHIFT,
+ /* 6 bit Shift */
+ CCDC_6BIT_SHIFT
+};
+
+/**
+ * MSB of image data connected to sensor port
+ */
+enum ccdc_data_msb {
+ /* MSB b15 */
+ CCDC_BIT_MSB_15,
+ /* MSB b14 */
+ CCDC_BIT_MSB_14,
+ /* MSB b13 */
+ CCDC_BIT_MSB_13,
+ /* MSB b12 */
+ CCDC_BIT_MSB_12,
+ /* MSB b11 */
+ CCDC_BIT_MSB_11,
+ /* MSB b10 */
+ CCDC_BIT_MSB_10,
+ /* MSB b9 */
+ CCDC_BIT_MSB_9,
+ /* MSB b8 */
+ CCDC_BIT_MSB_8,
+ /* MSB b7 */
+ CCDC_BIT_MSB_7
+};
+
+/*************************************************************************
+** Black Compensation parameters
+*************************************************************************/
+/**
+ * Structure used for Black Compensation
+ */
+struct ccdc_black_comp {
+ /* Comp for Red */
+ char r_comp;
+ /* Comp for Gr */
+ char gr_comp;
+ /* Comp for Blue */
+ char b_comp;
+ /* Comp for Gb */
+ char gb_comp;
+};
+
+/*************************************************************************
+** Gain parameters
+*************************************************************************/
+/**
+ * Structure for Gain parameters
+ */
+struct ccdc_gain {
+ /* Gain for Red or ye */
+ struct ccdc_float_16 r_ye;
+ /* Gain for Gr or cy */
+ struct ccdc_float_16 gr_cy;
+ /* Gain for Gb or g */
+ struct ccdc_float_16 gb_g;
+ /* Gain for Blue or mg */
+ struct ccdc_float_16 b_mg;
+};
+
+/**
+ * Predicator types for DPCM compression
+ */
+enum ccdc_dpcm_predictor {
+ /* Choose Predictor1 for DPCM compression */
+ CCDC_DPCM_PRED1,
+ /* Choose Predictor2 for DPCM compression */
+ CCDC_DPCM_PRED2
+};
+
+#define CCDC_LINEAR_TAB_SIZE 192
+/*************************************************************************
+** Linearization parameters
+*************************************************************************/
+/**
+ * Structure for Sensor data linearization
+ */
+struct ccdc_linearize {
+ /* Enable or Disable linearization of data */
+ unsigned char en;
+ /* Shift value applied */
+ enum ccdc_datasft corr_shft;
+ /* scale factor applied U11Q10 */
+ struct ccdc_float_16 scale_fact;
+ /* Size of the linear table */
+ unsigned short table[CCDC_LINEAR_TAB_SIZE];
+};
+
+enum ccdc_cfa_pattern {
+ CCDC_CFA_PAT_MOSAIC,
+ CCDC_CFA_PAT_STRIPE
+};
+
+enum ccdc_colpats {
+ CCDC_RED,
+ CCDC_GREEN_RED,
+ CCDC_GREEN_BLUE,
+ CCDC_BLUE
+};
+
+struct ccdc_col_pat {
+ enum ccdc_colpats olop;
+ enum ccdc_colpats olep;
+ enum ccdc_colpats elop;
+ enum ccdc_colpats elep;
+};
+
+/*************************************************************************
+** CCDC Raw configuration parameters
+*************************************************************************/
+enum ccdc_fmt_mode {
+ CCDC_SPLIT,
+ CCDC_COMBINE
+};
+
+enum ccdc_lnum {
+ CCDC_1LINE,
+ CCDC_2LINES,
+ CCDC_3LINES,
+ CCDC_4LINES
+};
+
+enum ccdc_line {
+ CCDC_1STLINE,
+ CCDC_2NDLINE,
+ CCDC_3RDLINE,
+ CCDC_4THLINE
+};
+
+struct ccdc_fmtplen {
+ /**
+ * number of program entries for SET0, range 1 - 16
+ * when fmtmode is CCDC_SPLIT, 1 - 8 when fmtmode is
+ * CCDC_COMBINE
+ */
+ unsigned short plen0;
+ /**
+ * number of program entries for SET1, range 1 - 16
+ * when fmtmode is CCDC_SPLIT, 1 - 8 when fmtmode is
+ * CCDC_COMBINE
+ */
+ unsigned short plen1;
+ /**
+ * number of program entries for SET2, range 1 - 16
+ * when fmtmode is CCDC_SPLIT, 1 - 8 when fmtmode is
+ * CCDC_COMBINE
+ */
+ unsigned short plen2;
+ /**
+ * number of program entries for SET3, range 1 - 16
+ * when fmtmode is CCDC_SPLIT, 1 - 8 when fmtmode is
+ * CCDC_COMBINE
+ */
+ unsigned short plen3;
+};
+
+struct ccdc_fmt_cfg {
+ /* Split or combine or line alternate */
+ enum ccdc_fmt_mode fmtmode;
+ /* enable or disable line alternating mode */
+ unsigned char ln_alter_en;
+ /* Split/combine line number */
+ enum ccdc_lnum lnum;
+ /* Address increment Range 1 - 16 */
+ unsigned int addrinc;
+};
+
+struct ccdc_fmt_addr_ptr {
+ /* Initial address */
+ unsigned int init_addr;
+ /* output line number */
+ enum ccdc_line out_line;
+};
+
+struct ccdc_fmtpgm_ap {
+ /* program address pointer */
+ unsigned char pgm_aptr;
+ /* program address increment or decrement */
+ unsigned char pgmupdt;
+};
+
+struct ccdc_data_formatter {
+ /* Enable/Disable data formatter */
+ unsigned char en;
+ /* data formatter configuration */
+ struct ccdc_fmt_cfg cfg;
+ /* Formatter program entries length */
+ struct ccdc_fmtplen plen;
+ /* first pixel in a line fed to formatter */
+ unsigned short fmtrlen;
+ /* HD interval for output line. Only valid when split line */
+ unsigned short fmthcnt;
+ /* formatter address pointers */
+ struct ccdc_fmt_addr_ptr fmtaddr_ptr[16];
+ /* program enable/disable */
+ unsigned char pgm_en[32];
+ /* program address pointers */
+ struct ccdc_fmtpgm_ap fmtpgm_ap[32];
+};
+
+struct ccdc_df_csc {
+ /* Color Space Conversion confguration, 0 - csc, 1 - df */
+ unsigned int df_or_csc;
+ /* csc configuration valid if df_or_csc is 0 */
+ struct ccdc_color_space_conv csc;
+ /* data formatter configuration valid if df_or_csc is 1 */
+ struct ccdc_data_formatter df;
+ /* start pixel in a line at the input */
+ unsigned int start_pix;
+ /* number of pixels in input line */
+ unsigned int num_pixels;
+ /* start line at the input */
+ unsigned int start_line;
+ /* number of lines at the input */
+ unsigned int num_lines;
+};
+
+struct ccdc_gain_offsets_adj {
+ /* Gain adjustment per color */
+ struct ccdc_gain gain;
+ /* Offset adjustment */
+ unsigned short offset;
+ /* Enable or Disable Gain adjustment for SDRAM data */
+ unsigned char gain_sdram_en;
+ /* Enable or Disable Gain adjustment for IPIPE data */
+ unsigned char gain_ipipe_en;
+ /* Enable or Disable Gain adjustment for H3A data */
+ unsigned char gain_h3a_en;
+ /* Enable or Disable Gain adjustment for SDRAM data */
+ unsigned char offset_sdram_en;
+ /* Enable or Disable Gain adjustment for IPIPE data */
+ unsigned char offset_ipipe_en;
+ /* Enable or Disable Gain adjustment for H3A data */
+ unsigned char offset_h3a_en;
+};
+
+struct ccdc_cul {
+ /* Horizontal Cull pattern for odd lines */
+ unsigned char hcpat_odd;
+ /* Horizontal Cull pattern for even lines */
+ unsigned char hcpat_even;
+ /* Vertical Cull pattern */
+ unsigned char vcpat;
+ /* Enable or disable lpf. Apply when cull is enabled */
+ unsigned char en_lpf;
+};
+
+enum ccdc_compress_alg {
+ CCDC_ALAW,
+ CCDC_DPCM,
+ CCDC_NO_COMPRESSION
+};
+
+struct ccdc_compress {
+ /* Enable or diable A-Law or DPCM compression. */
+ enum ccdc_compress_alg alg;
+ /* Predictor for DPCM compression */
+ enum ccdc_dpcm_predictor pred;
+};
+
+/* all the stuff in this struct will be provided by userland */
+struct ccdc_config_params_raw {
+ /* Linearization parameters for image sensor data input */
+ struct ccdc_linearize linearize;
+ /* Data formatter or CSC */
+ struct ccdc_df_csc df_csc;
+ /* Defect Pixel Correction (DFC) confguration */
+ struct ccdc_dfc dfc;
+ /* Black/Digital Clamp configuration */
+ struct ccdc_black_clamp bclamp;
+ /* Gain, offset adjustments */
+ struct ccdc_gain_offsets_adj gain_offset;
+ /* Culling */
+ struct ccdc_cul culling;
+ /* A-Law and DPCM compression options */
+ struct ccdc_compress compress;
+ /* horizontal offset for Gain/LSC/DFC */
+ unsigned short horz_offset;
+ /* vertical offset for Gain/LSC/DFC */
+ unsigned short vert_offset;
+ /* color pattern for field 0 */
+ struct ccdc_col_pat col_pat_field0;
+ /* color pattern for field 1 */
+ struct ccdc_col_pat col_pat_field1;
+ /* data size from 8 to 16 bits */
+ enum ccdc_data_size data_size;
+ /* Data shift applied before storing to SDRAM */
+ enum ccdc_datasft data_shift;
+ /* enable input test pattern generation */
+ unsigned char test_pat_gen;
+};
+
+#ifdef __KERNEL__
+struct ccdc_ycbcr_config {
+ /* ccdc pixel format */
+ enum ccdc_pixfmt pix_fmt;
+ /* ccdc frame format */
+ enum ccdc_frmfmt frm_fmt;
+ /* CCDC crop window */
+ struct v4l2_rect win;
+ /* field polarity */
+ enum vpfe_pin_pol fid_pol;
+ /* interface VD polarity */
+ enum vpfe_pin_pol vd_pol;
+ /* interface HD polarity */
+ enum vpfe_pin_pol hd_pol;
+ /* ccdc pix order. Only used for ycbcr capture */
+ enum ccdc_pixorder pix_order;
+ /* ccdc buffer type. Only used for ycbcr capture */
+ enum ccdc_buftype buf_type;
+};
+
+struct ccdc_params_raw {
+ /* ccdc pixel format */
+ enum ccdc_pixfmt pix_fmt;
+ /* ccdc frame format */
+ enum ccdc_frmfmt frm_fmt;
+ /* video window */
+ struct v4l2_rect win;
+ /* field polarity */
+ enum vpfe_pin_pol fid_pol;
+ /* interface VD polarity */
+ enum vpfe_pin_pol vd_pol;
+ /* interface HD polarity */
+ enum vpfe_pin_pol hd_pol;
+ /* buffer type. Applicable for interlaced mode */
+ enum ccdc_buftype buf_type;
+ /* Gain values */
+ struct ccdc_gain gain;
+ /* cfa pattern */
+ enum ccdc_cfa_pattern cfa_pat;
+ /* Data MSB position */
+ enum ccdc_data_msb data_msb;
+ /* Enable horizontal flip */
+ unsigned char horz_flip_en;
+ /* Enable image invert vertically */
+ unsigned char image_invert_en;
+
+ /*all the userland defined stuff*/
+ struct ccdc_config_params_raw config_params;
+};
+
+enum ccdc_data_pack {
+ CCDC_PACK_16BIT,
+ CCDC_PACK_12BIT,
+ CCDC_PACK_8BIT
+};
+
+#define CCDC_WIN_NTSC {0, 0, 720, 480}
+#define CCDC_WIN_VGA {0, 0, 640, 480}
+#define ISP5_CCDCMUX 0x20
+#endif
+#endif
diff --git a/include/media/davinci/dm365_generic_prgb_encoder.h b/include/media/davinci/dm365_generic_prgb_encoder.h
new file mode 100644
index 00000000..512bbcb1
--- /dev/null
+++ b/include/media/davinci/dm365_generic_prgb_encoder.h
@@ -0,0 +1,79 @@
+/*
+ *Copyright (C) 2011 Ridgerun (http://www.ridgerun.com)
+ *
+ * Author: Natanel Castro <natanael.castro@ridgerun.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef GEN_PRGB_ENCODER_H
+#define GEN_PRGB_ENCODER_H
+
+#ifdef __KERNEL__
+/* Kernel Header files */
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <media/davinci/vid_encoder_types.h>
+#endif
+
+#ifdef __KERNEL__
+/* encoder standard related strctures */
+#define GEN_PRGB_ENCODER_MAX_NO_OUTPUTS (1)
+#define GEN_PRGB_ENCODER_NUM_STD (1)
+
+
+#define PRGB_ENCODER_DRV_NAME "generic_prgb"
+
+#define DAVINCI_PLL1_RATE 486000 /*PLL1 clock rate (KHz)*/
+#define PLL1DIV6_MAX_NUM 31
+
+struct davinci_gen_prgb_pdata {
+ unsigned int xres;
+ unsigned int yres;
+ struct vid_enc_fract fps;
+ unsigned int pixel_clock_khz;
+ unsigned int left_margin;
+ unsigned int right_margin;
+ unsigned int upper_margin;
+ unsigned int lower_margin;
+ unsigned int hsync_len;
+ unsigned int vsync_len;
+ unsigned int flags;
+ int (*clock_set_function)(unsigned int);
+};
+
+struct gen_prgb_encoder_params {
+ int outindex;
+ char *mode;
+};
+
+struct gen_prgb_encoder_config {
+ int no_of_outputs;
+ struct {
+ char *output_name;
+ int no_of_standard;
+ struct vid_enc_mode_info
+ standards[GEN_PRGB_ENCODER_NUM_STD];
+ } output[GEN_PRGB_ENCODER_MAX_NO_OUTPUTS];
+};
+
+struct gen_prgb_encoder_channel {
+ struct encoder_device *enc_device;
+ struct gen_prgb_encoder_params params;
+};
+
+#endif /* End of #ifdef __KERNEL__ */
+
+#endif /* End of #ifndef GEN_PRGB_ENCODER_H */
diff --git a/include/media/davinci/dm365_ipipe.h b/include/media/davinci/dm365_ipipe.h
new file mode 100644
index 00000000..7ef17e98
--- /dev/null
+++ b/include/media/davinci/dm365_ipipe.h
@@ -0,0 +1,1359 @@
+/*
+ *
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Feature description
+ * ===================
+ *
+ * VPFE hardware setup
+ *
+ * case 1: Capture to SDRAM with out IPIPE
+ * ****************************************
+ *
+ * parallel
+ * port
+ *
+ * Image sensor/ ________
+ * Yuv decoder ---->| CCDC |--> SDRAM
+ * |______|
+ *
+ * case 2: Capture to SDRAM with IPIPE Preview modules in Continuous
+ * (On the Fly mode)
+ *
+ * Image sensor/ ________ ____________________
+ * Yuv decoder ---->| CCDC |--> | Previewer modules |--> SDRAM
+ * |______| |___________________|
+ *
+ * case 3: Capture to SDRAM with IPIPE Preview modules & Resizer
+ * in continuous (On the Fly mode)
+ *
+ * Image sensor/ ________ _____________ ___________
+ * Yuv decoder ---->| CCDC |--> | Previewer |->| Resizer |-> SDRAM
+ * |______| |____________| |__________|
+ *
+ * case 4: Capture to SDRAM with IPIPE Resizer
+ * in continuous (On the Fly mode)
+ *
+ * Image sensor/ ________ ___________
+ * Yuv decoder ---->| CCDC |--> | Resizer |-> SDRAM
+ * |______| |__________|
+ *
+ * case 5: Read from SDRAM and do preview and/or Resize
+ * in Single shot mode
+ *
+ * _____________ ___________
+ * SDRAM ----> | Previewer |->| Resizer |-> SDRAM
+ * |____________| |__________|
+ *
+ *
+ * Previewer allows fine tuning of the input image using different
+ * tuning modules in IPIPE. Some examples :- Noise filter, Defect
+ * pixel correction etc. It essentially operate on Bayer Raw data
+ * or YUV raw data. To do image tuning, application call,
+ * PREV_QUERY_CAP, and then call PREV_SET_PARAM to set parameter
+ * for a module.
+ *
+ *
+ * Resizer allows upscaling or downscaling a image to a desired
+ * resolution. There are 2 resizer modules. both operating on the
+ * same input image, but can have different output resolution.
+ */
+
+#ifndef DM365_IPIPE_H
+#define DM365_IPIPE_H
+
+#include <media/davinci/dm3xx_ipipe.h>
+
+/**********************************************************************
+** Previewer API Structures
+**********************************************************************/
+
+/* Previewer module IDs used in PREV_SET/GET_PARAM IOCTL. Some
+ * modules can be also be updated during IPIPE operation. They are
+ * marked as control ID
+ */
+/* LUT based Defect Pixel Correction */
+#define PREV_LUTDPC 1
+/* On the fly (OTF) Defect Pixel Correction */
+#define PREV_OTFDPC 2
+/* Noise Filter - 1 */
+#define PREV_NF1 3
+/* Noise Filter - 2 */
+#define PREV_NF2 4
+/* White Balance. Also a control ID */
+#define PREV_WB 5
+/* 1st RGB to RBG Blend module */
+#define PREV_RGB2RGB_1 6
+/* 2nd RGB to RBG Blend module */
+#define PREV_RGB2RGB_2 7
+/* Gamma Correction */
+#define PREV_GAMMA 8
+/* 3D LUT color conversion */
+#define PREV_3D_LUT 9
+/* RGB to YCbCr module */
+#define PREV_RGB2YUV 10
+/* YUV 422 conversion module */
+#define PREV_YUV422_CONV 11
+/* Luminance Adjustment module. Also a control ID */
+#define PREV_LUM_ADJ 12
+/* Edge Enhancement */
+#define PREV_YEE 13
+/* Green Imbalance Correction */
+#define PREV_GIC 14
+/* CFA Interpolation */
+#define PREV_CFA 15
+/* Chroma Artifact Reduction */
+#define PREV_CAR 16
+/* Chroma Gain Suppression */
+#define PREV_CGS 17
+/* Global brighness and contrast control */
+#define PREV_GBCE 18
+/* Last module ID */
+#define PREV_MAX_MODULES 18
+
+struct ipipe_float_u16 {
+ unsigned short integer;
+ unsigned short decimal;
+};
+
+struct ipipe_float_s16 {
+ short integer;
+ unsigned short decimal;
+};
+
+struct ipipe_float_u8 {
+ unsigned char integer;
+ unsigned char decimal;
+};
+
+struct ipipe_win {
+ /* vertical start line */
+ unsigned int vst;
+ /* horizontal start pixel */
+ unsigned int hst;
+ /* width */
+ unsigned int width;
+ /* height */
+ unsigned int height;
+};
+
+/* Copy method selection for vertical correction
+ * Used when ipipe_dfc_corr_meth is PREV_DPC_CTORB_AFTER_HINT
+ */
+enum ipipe_dpc_corr_meth {
+ /* replace by black or white dot specified by repl_white */
+ IPIPE_DPC_REPL_BY_DOT = 0,
+ /* Copy from left */
+ IPIPE_DPC_CL,
+ /* Copy from right */
+ IPIPE_DPC_CR,
+ /* Horizontal interpolation */
+ IPIPE_DPC_H_INTP,
+ /* Vertical interpolation */
+ IPIPE_DPC_V_INTP,
+ /* Copy from top */
+ IPIPE_DPC_CT,
+ /* Copy from bottom */
+ IPIPE_DPC_CB,
+ /* 2D interpolation */
+ IPIPE_DPC_2D_INTP,
+};
+
+struct ipipe_lutdpc_entry {
+ /* Horizontal position */
+ unsigned short horz_pos;
+ /* vertical position */
+ unsigned short vert_pos;
+ enum ipipe_dpc_corr_meth method;
+};
+
+#define MAX_SIZE_DPC 256
+/* Struct for configuring DPC module */
+struct prev_lutdpc {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* 0 - replace with black dot, 1 - white dot when correction
+ * method is IPIPE_DFC_REPL_BY_DOT=0,
+ */
+ unsigned char repl_white;
+ /* number of entries in the correction table. Currently only
+ * support upto 256 entries. infinite mode is not supported
+ */
+ unsigned short dpc_size;
+ struct ipipe_lutdpc_entry *table;
+};
+
+enum ipipe_otfdpc_det_meth {
+ IPIPE_DPC_OTF_MIN_MAX,
+ IPIPE_DPC_OTF_MIN_MAX2
+};
+
+struct ipipe_otfdpc_thr {
+ unsigned short r;
+ unsigned short gr;
+ unsigned short gb;
+ unsigned short b;
+};
+
+enum ipipe_otfdpc_alg {
+ IPIPE_OTFDPC_2_0,
+ IPIPE_OTFDPC_3_0
+};
+
+struct prev_otfdpc_2_0 {
+ /* defect detection threshold for MIN_MAX2 method (DPC 2.0 alg) */
+ struct ipipe_otfdpc_thr det_thr;
+ /* defect correction threshold for MIN_MAX2 method (DPC 2.0 alg) or
+ * maximum value for MIN_MAX method
+ */
+ struct ipipe_otfdpc_thr corr_thr;
+};
+
+struct prev_otfdpc_3_0 {
+ /* DPC3.0 activity adj shf. activity = (max2-min2) >> (6 -shf)
+ */
+ unsigned char act_adj_shf;
+ /* DPC3.0 detection threshold, THR */
+ unsigned short det_thr;
+ /* DPC3.0 detection threshold slope, SLP */
+ unsigned short det_slp;
+ /* DPC3.0 detection threshold min, MIN */
+ unsigned short det_thr_min;
+ /* DPC3.0 detection threshold max, MAX */
+ unsigned short det_thr_max;
+ /* DPC3.0 correction threshold, THR */
+ unsigned short corr_thr;
+ /* DPC3.0 correction threshold slope, SLP */
+ unsigned short corr_slp;
+ /* DPC3.0 correction threshold min, MIN */
+ unsigned short corr_thr_min;
+ /* DPC3.0 correction threshold max, MAX */
+ unsigned short corr_thr_max;
+};
+
+struct prev_otfdpc {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* defect detection method */
+ enum ipipe_otfdpc_det_meth det_method;
+ /* Algorith used. Applicable only when IPIPE_DPC_OTF_MIN_MAX2 is
+ * used
+ */
+ enum ipipe_otfdpc_alg alg;
+ union {
+ /* if alg is IPIPE_OTFDPC_2_0 */
+ struct prev_otfdpc_2_0 dpc_2_0;
+ /* if alg is IPIPE_OTFDPC_3_0 */
+ struct prev_otfdpc_3_0 dpc_3_0;
+ } alg_cfg;
+};
+
+/* Threshold values table size */
+#define IPIPE_NF_THR_TABLE_SIZE 8
+/* Intensity values table size */
+#define IPIPE_NF_STR_TABLE_SIZE 8
+
+/* NF, sampling method for green pixels */
+enum ipipe_nf_sampl_meth {
+ /* Same as R or B */
+ IPIPE_NF_BOX,
+ /* Diamond mode */
+ IPIPE_NF_DIAMOND
+};
+
+/* Struct for configuring NF module */
+struct prev_nf {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* Sampling method for green pixels */
+ enum ipipe_nf_sampl_meth gr_sample_meth;
+ /* Down shift value in LUT reference address
+ */
+ unsigned char shft_val;
+ /* Spread value in NF algorithm
+ */
+ unsigned char spread_val;
+ /* Apply LSC gain to threshold. Enable this only if
+ * LSC is enabled in ISIF
+ */
+ unsigned char apply_lsc_gain;
+ /* Threshold values table */
+ unsigned short thr[IPIPE_NF_THR_TABLE_SIZE];
+ /* intensity values table */
+ unsigned char str[IPIPE_NF_STR_TABLE_SIZE];
+ /* Edge detection minimum threshold */
+ unsigned short edge_det_min_thr;
+ /* Edge detection maximum threshold */
+ unsigned short edge_det_max_thr;
+};
+
+enum ipipe_gic_alg {
+ IPIPE_GIC_ALG_CONST_GAIN,
+ IPIPE_GIC_ALG_ADAPT_GAIN
+};
+
+enum ipipe_gic_thr_sel {
+ IPIPE_GIC_THR_REG,
+ IPIPE_GIC_THR_NF
+};
+
+enum ipipe_gic_wt_fn_type {
+ /* Use difference as index */
+ IPIPE_GIC_WT_FN_TYP_DIF,
+ /* Use weight function as index */
+ IPIPE_GIC_WT_FN_TYP_HP_VAL
+};
+
+/* structure for Green Imbalance Correction */
+struct prev_gic {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* 0 - Constant gain , 1 - Adaptive gain algorithm */
+ enum ipipe_gic_alg gic_alg;
+ /* GIC gain or weight. Used for Constant gain and Adaptive algorithms
+ */
+ unsigned short gain;
+ /* Threshold selection. GIC register values or NF2 thr table */
+ enum ipipe_gic_thr_sel thr_sel;
+ /* thr1. Used when thr_sel is IPIPE_GIC_THR_REG */
+ unsigned short thr;
+ /* this value is used for thr2-thr1, thr3-thr2 or
+ * thr4-thr3 when wt_fn_type is index. Otherwise it
+ * is the
+ */
+ unsigned short slope;
+ /* Apply LSC gain to threshold. Enable this only if
+ * LSC is enabled in ISIF & thr_sel is IPIPE_GIC_THR_REG
+ */
+ unsigned char apply_lsc_gain;
+ /* Multiply Nf2 threshold by this gain. Use this when thr_sel
+ * is IPIPE_GIC_THR_NF
+ */
+ struct ipipe_float_u8 nf2_thr_gain;
+ /* Weight function uses difference as index or high pass value.
+ * Used for adaptive gain algorithm
+ */
+ enum ipipe_gic_wt_fn_type wt_fn_type;
+};
+
+/* Struct for configuring WB module */
+struct prev_wb {
+ /* Offset (S12) for R */
+ short ofst_r;
+ /* Offset (S12) for Gr */
+ short ofst_gr;
+ /* Offset (S12) for Gb */
+ short ofst_gb;
+ /* Offset (S12) for B */
+ short ofst_b;
+ /* Gain (U13Q9) for Red */
+ struct ipipe_float_u16 gain_r;
+ /* Gain (U13Q9) for Gr */
+ struct ipipe_float_u16 gain_gr;
+ /* Gain (U13Q9) for Gb */
+ struct ipipe_float_u16 gain_gb;
+ /* Gain (U13Q9) for Blue */
+ struct ipipe_float_u16 gain_b;
+};
+
+enum ipipe_cfa_alg {
+ /* Algorithm is 2DirAC */
+ IPIPE_CFA_ALG_2DIRAC,
+ /* Algorithm is 2DirAC + Digital Antialiasing (DAA) */
+ IPIPE_CFA_ALG_2DIRAC_DAA,
+ /* Algorithm is DAA */
+ IPIPE_CFA_ALG_DAA
+};
+
+/* Structure for CFA Interpolation */
+struct prev_cfa {
+ /* 2DirAC or 2DirAC + DAA */
+ enum ipipe_cfa_alg alg;
+ /* 2Dir CFA HP value Low Threshold */
+ unsigned short hpf_thr_2dir;
+ /* 2Dir CFA HP value slope */
+ unsigned short hpf_slp_2dir;
+ /* 2Dir CFA HP mix threshold */
+ unsigned short hp_mix_thr_2dir;
+ /* 2Dir CFA HP mix slope */
+ unsigned short hp_mix_slope_2dir;
+ /* 2Dir Direction threshold */
+ unsigned short dir_thr_2dir;
+ /* 2Dir Direction slope */
+ unsigned short dir_slope_2dir;
+ /* 2Dir NonDirectional Weight */
+ unsigned short nd_wt_2dir;
+ /* DAA Mono Hue Fraction */
+ unsigned short hue_fract_daa;
+ /* DAA Mono Edge threshold */
+ unsigned short edge_thr_daa;
+ /* DAA Mono threshold minimum */
+ unsigned short thr_min_daa;
+ /* DAA Mono threshold slope */
+ unsigned short thr_slope_daa;
+ /* DAA Mono slope minimum */
+ unsigned short slope_min_daa;
+ /* DAA Mono slope slope */
+ unsigned short slope_slope_daa;
+ /* DAA Mono LP wight */
+ unsigned short lp_wt_daa;
+};
+
+/* Struct for configuring RGB2RGB blending module */
+struct prev_rgb2rgb {
+ /* Matrix coefficient for RR S12Q8 for ID = 1 and S11Q8 for ID = 2 */
+ struct ipipe_float_s16 coef_rr;
+ /* Matrix coefficient for GR S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_gr;
+ /* Matrix coefficient for BR S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_br;
+ /* Matrix coefficient for RG S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_rg;
+ /* Matrix coefficient for GG S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_gg;
+ /* Matrix coefficient for BG S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_bg;
+ /* Matrix coefficient for RB S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_rb;
+ /* Matrix coefficient for GB S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_gb;
+ /* Matrix coefficient for BB S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_bb;
+ /* Output offset for R S13/S11 */
+ int out_ofst_r;
+ /* Output offset for G S13/S11 */
+ int out_ofst_g;
+ /* Output offset for B S13/S11 */
+ int out_ofst_b;
+};
+
+#define MAX_SIZE_GAMMA 512
+
+enum ipipe_gamma_tbl_size {
+ IPIPE_GAMMA_TBL_SZ_64,
+ IPIPE_GAMMA_TBL_SZ_128,
+ IPIPE_GAMMA_TBL_SZ_256,
+ IPIPE_GAMMA_TBL_SZ_512
+};
+
+enum ipipe_gamma_tbl_sel {
+ IPIPE_GAMMA_TBL_RAM,
+ IPIPE_GAMMA_TBL_ROM
+};
+
+struct ipipe_gamma_entry {
+ /* 10 bit slope */
+ short slope;
+ /* 10 bit offset */
+ unsigned short offset;
+};
+
+/* Struct for configuring Gamma correction module */
+struct prev_gamma {
+ /* 0 - Enable Gamma correction for Red
+ * 1 - bypass Gamma correction. Data is divided by 16
+ */
+ unsigned char bypass_r;
+ /* 0 - Enable Gamma correction for Blue
+ * 1 - bypass Gamma correction. Data is divided by 16
+ */
+ unsigned char bypass_b;
+ /* 0 - Enable Gamma correction for Green
+ * 1 - bypass Gamma correction. Data is divided by 16
+ */
+ unsigned char bypass_g;
+ /* PREV_GAMMA_TBL_RAM or PREV_GAMMA_TBL_ROM */
+ enum ipipe_gamma_tbl_sel tbl_sel;
+ /* Table size for RAM gamma table.
+ */
+ enum ipipe_gamma_tbl_size tbl_size;
+ /* R table */
+ struct ipipe_gamma_entry *table_r;
+ /* Blue table */
+ struct ipipe_gamma_entry *table_b;
+ /* Green table */
+ struct ipipe_gamma_entry *table_g;
+};
+
+#define MAX_SIZE_3D_LUT (729)
+
+struct ipipe_3d_lut_entry {
+ /* 10 bit entry for red */
+ unsigned short r;
+ /* 10 bit entry for green */
+ unsigned short g;
+ /* 10 bit entry for blue */
+ unsigned short b;
+};
+
+/* structure for 3D-LUT */
+struct prev_3d_lut {
+ /* enable/disable 3D lut */
+ unsigned char en;
+ /* 3D - LUT table entry */
+ struct ipipe_3d_lut_entry *table;
+};
+
+/* Struct for configuring Luminance Adjustment module */
+struct prev_lum_adj {
+ /* Brightness adjustments */
+ unsigned char brightness;
+ /* contrast adjustments */
+ unsigned char contrast;
+};
+
+/* Struct for configuring rgb2ycbcr module */
+struct prev_rgb2yuv {
+ /* Matrix coefficient for RY S12Q8 */
+ struct ipipe_float_s16 coef_ry;
+ /* Matrix coefficient for GY S12Q8 */
+ struct ipipe_float_s16 coef_gy;
+ /* Matrix coefficient for BY S12Q8 */
+ struct ipipe_float_s16 coef_by;
+ /* Matrix coefficient for RCb S12Q8 */
+ struct ipipe_float_s16 coef_rcb;
+ /* Matrix coefficient for GCb S12Q8 */
+ struct ipipe_float_s16 coef_gcb;
+ /* Matrix coefficient for BCb S12Q8 */
+ struct ipipe_float_s16 coef_bcb;
+ /* Matrix coefficient for RCr S12Q8 */
+ struct ipipe_float_s16 coef_rcr;
+ /* Matrix coefficient for GCr S12Q8 */
+ struct ipipe_float_s16 coef_gcr;
+ /* Matrix coefficient for BCr S12Q8 */
+ struct ipipe_float_s16 coef_bcr;
+ /* Output offset for R S11 */
+ int out_ofst_y;
+ /* Output offset for Cb S11 */
+ int out_ofst_cb;
+ /* Output offset for Cr S11 */
+ int out_ofst_cr;
+};
+
+enum ipipe_gbce_type {
+ IPIPE_GBCE_Y_VAL_TBL,
+ IPIPE_GBCE_GAIN_TBL
+};
+
+#define MAX_SIZE_GBCE_LUT 1024
+
+/* structure for Global brighness and Contrast */
+struct prev_gbce {
+ /* enable/disable GBCE */
+ unsigned char en;
+ /* Y - value table or Gain table */
+ enum ipipe_gbce_type type;
+ /* ptr to LUT for GBCE with 1024 entries */
+ unsigned short *table;
+};
+
+/* Chrominance position. Applicable only for YCbCr input
+ * Applied after edge enhancement
+ */
+enum ipipe_chr_pos {
+ /* Cositing, same position with luminance */
+ IPIPE_YUV422_CHR_POS_COSITE,
+ /* Centering, In the middle of luminance */
+ IPIPE_YUV422_CHR_POS_CENTRE
+};
+
+/* Struct for configuring yuv422 conversion module */
+struct prev_yuv422_conv {
+ /* Max Chrominance value */
+ unsigned char en_chrom_lpf;
+ /* 1 - enable LPF for chrminance, 0 - disable */
+ enum ipipe_chr_pos chrom_pos;
+};
+
+#define MAX_SIZE_YEE_LUT 1024
+
+enum ipipe_yee_merge_meth {
+ IPIPE_YEE_ABS_MAX,
+ IPIPE_YEE_EE_ES
+};
+
+/* Struct for configuring YUV Edge Enhancement module */
+struct prev_yee {
+ /* 1 - enable enhancement, 0 - disable */
+ unsigned char en;
+ /* enable/disable halo reduction in edge sharpner */
+ unsigned char en_halo_red;
+ /* Merge method between Edge Enhancer and Edge sharpner */
+ enum ipipe_yee_merge_meth merge_meth;
+ /* HPF Shift length */
+ unsigned char hpf_shft;
+ /* HPF Coefficient 00, S10 */
+ short hpf_coef_00;
+ /* HPF Coefficient 01, S10 */
+ short hpf_coef_01;
+ /* HPF Coefficient 02, S10 */
+ short hpf_coef_02;
+ /* HPF Coefficient 10, S10 */
+ short hpf_coef_10;
+ /* HPF Coefficient 11, S10 */
+ short hpf_coef_11;
+ /* HPF Coefficient 12, S10 */
+ short hpf_coef_12;
+ /* HPF Coefficient 20, S10 */
+ short hpf_coef_20;
+ /* HPF Coefficient 21, S10 */
+ short hpf_coef_21;
+ /* HPF Coefficient 22, S10 */
+ short hpf_coef_22;
+ /* Lower threshold before refering to LUT */
+ unsigned short yee_thr;
+ /* Edge sharpener Gain */
+ unsigned short es_gain;
+ /* Edge sharpener lowe threshold */
+ unsigned short es_thr1;
+ /* Edge sharpener upper threshold */
+ unsigned short es_thr2;
+ /* Edge sharpener gain on gradient */
+ unsigned short es_gain_grad;
+ /* Edge sharpener offset on gradient */
+ unsigned short es_ofst_grad;
+ /* Ptr to EE table. Must have 1024 entries */
+ short *table;
+};
+
+enum ipipe_car_meth {
+ /* Chromatic Gain Control */
+ IPIPE_CAR_CHR_GAIN_CTRL,
+ /* Dynamic switching between CHR_GAIN_CTRL
+ * and MED_FLTR
+ */
+ IPIPE_CAR_DYN_SWITCH,
+ /* Median Filter */
+ IPIPE_CAR_MED_FLTR
+};
+
+enum ipipe_car_hpf_type {
+ IPIPE_CAR_HPF_Y,
+ IPIPE_CAR_HPF_H,
+ IPIPE_CAR_HPF_V,
+ IPIPE_CAR_HPF_2D,
+ /* 2D HPF from YUV Edge Enhancement */
+ IPIPE_CAR_HPF_2D_YEE
+};
+
+struct ipipe_car_gain {
+ /* csup_gain */
+ unsigned char gain;
+ /* csup_shf. */
+ unsigned char shft;
+ /* gain minimum */
+ unsigned short gain_min;
+};
+
+/* Structure for Chromatic Artifact Reduction */
+struct prev_car {
+ /* enable/disable */
+ unsigned char en;
+ /* Gain control or Dynamic switching */
+ enum ipipe_car_meth meth;
+ /* Gain1 function configuration for Gain control */
+ struct ipipe_car_gain gain1;
+ /* Gain2 function configuration for Gain control */
+ struct ipipe_car_gain gain2;
+ /* HPF type used for CAR */
+ enum ipipe_car_hpf_type hpf;
+ /* csup_thr: HPF threshold for Gain control */
+ unsigned char hpf_thr;
+ /* Down shift value for hpf. 2 bits */
+ unsigned char hpf_shft;
+ /* switch limit for median filter */
+ unsigned char sw0;
+ /* switch coefficient for Gain control */
+ unsigned char sw1;
+};
+
+/* structure for Chromatic Gain Suppression */
+struct prev_cgs {
+ /* enable/disable */
+ unsigned char en;
+ /* gain1 bright side threshold */
+ unsigned char h_thr;
+ /* gain1 bright side slope */
+ unsigned char h_slope;
+ /* gain1 down shift value for bright side */
+ unsigned char h_shft;
+ /* gain1 bright side minimum gain */
+ unsigned char h_min;
+};
+
+/* various pixel formats supported */
+enum ipipe_pix_formats {
+ IPIPE_BAYER_8BIT_PACK,
+ IPIPE_BAYER_8BIT_PACK_ALAW,
+ IPIPE_BAYER_8BIT_PACK_DPCM,
+ IPIPE_BAYER_12BIT_PACK,
+ IPIPE_BAYER, /* 16 bit */
+ IPIPE_UYVY,
+ IPIPE_YUYV,
+ IPIPE_RGB565,
+ IPIPE_RGB888,
+ IPIPE_YUV420SP,
+ IPIPE_420SP_Y,
+ IPIPE_420SP_C
+};
+
+enum ipipe_dpaths_bypass_t {
+ IPIPE_BYPASS_OFF,
+ IPIPE_BYPASS_ON
+};
+
+enum ipipe_colpat_t {
+ IPIPE_RED,
+ IPIPE_GREEN_RED,
+ IPIPE_GREEN_BLUE,
+ IPIPE_BLUE
+};
+
+enum down_scale_ave_sz {
+ IPIPE_DWN_SCALE_1_OVER_2,
+ IPIPE_DWN_SCALE_1_OVER_4,
+ IPIPE_DWN_SCALE_1_OVER_8,
+ IPIPE_DWN_SCALE_1_OVER_16,
+ IPIPE_DWN_SCALE_1_OVER_32,
+ IPIPE_DWN_SCALE_1_OVER_64,
+ IPIPE_DWN_SCALE_1_OVER_128,
+ IPIPE_DWN_SCALE_1_OVER_256
+};
+
+/* Max pixels allowed in the input. If above this either decimation
+ * or frame division mode to be enabled
+ */
+#define IPIPE_MAX_INPUT_WIDTH 2600
+
+/* Max pixels in resizer - A output. In downscale
+ * (DSCALE) mode, image quality is better, but has lesser
+ * maximum width allowed
+ */
+#define IPIPE_MAX_OUTPUT1_WIDTH_NORMAL 2176
+#define IPIPE_MAX_OUTPUT1_WIDTH_DSCALE 1088
+
+/* Max pixels in resizer - B output. In downscale
+ * (DSCALE) mode, image quality is better, but has lesser
+ * maximum width allowed
+ */
+#define IPIPE_MAX_OUTPUT2_WIDTH_NORMAL 1088
+#define IPIPE_MAX_OUTPUT2_WIDTH_DSCALE 544
+
+/* Structure for configuring Single Shot mode in the previewer
+ * channel
+ */
+struct prev_ss_input_spec {
+ /* width of the image in SDRAM. */
+ unsigned int image_width;
+ /* height of the image in SDRAM */
+ unsigned int image_height;
+ /* line length. This will allow application to set a
+ * different line length than that calculated based on
+ * width. Set it to zero, if not used,
+ */
+ unsigned int line_length;
+ /* vertical start position of the image
+ * data to IPIPE
+ */
+ unsigned int vst;
+ /* horizontal start position of the image
+ * data to IPIPE
+ */
+ unsigned int hst;
+ /* Global frame HD rate */
+ unsigned int ppln;
+ /* Global frame VD rate */
+ unsigned int lpfr;
+ /* dpcm predicator selection */
+ enum ipipeif_dpcm_pred pred;
+ /* clock divide to bring down the pixel clock */
+ struct ipipeif_5_1_clkdiv clk_div;
+ /* Shift data as per image sensor capture format
+ * only applicable for RAW Bayer inputs
+ */
+ enum ipipeif_5_1_data_shift data_shift;
+ /* Enable decimation 1 - enable, 0 - disable
+ * This is used when image width is greater than
+ * ipipe line buffer size
+ */
+ enum ipipeif_decimation dec_en;
+ /* used when en_dec = 1. Resize ratio for decimation
+ * when frame size is greater than what hw can handle.
+ * 16 to 112. IPIPE input width is calculated as follows.
+ * width = image_width * 16/ipipeif_rsz. For example
+ * if image_width is 1920 and user want to scale it down
+ * to 1280, use ipipeif_rsz = 24. 1920*16/24 = 1280
+ */
+ unsigned char rsz;
+ /* When input image width is greater that line buffer
+ * size, use this to do resize using frame division. The
+ * frame is divided into two vertical slices and resize
+ * is performed on each slice. Use either frame division
+ * mode or decimation, NOT both
+ */
+ unsigned char frame_div_mode_en;
+ /* Enable/Disable avg filter at IPIPEIF.
+ * 1 - enable, 0 - disable
+ */
+ unsigned char avg_filter_en;
+ /* Simple defect pixel correction based on a threshold value */
+ struct ipipeif_dpc dpc;
+ /* gain applied to the ipipeif output */
+ unsigned short gain;
+ /* clipped to this value at the ipipeif */
+ unsigned short clip;
+ /* Align HSync and VSync to rsz_start */
+ unsigned char align_sync;
+ /* ipipeif resize start position */
+ unsigned int rsz_start;
+ /* Input pixels formats
+ */
+ enum ipipe_pix_formats pix_fmt;
+ /* pix order for YUV */
+ enum ipipeif_pixel_order pix_order;
+ /* Color pattern for odd line, odd pixel */
+ enum ipipe_colpat_t colp_olop;
+ /* Color pattern for odd line, even pixel */
+ enum ipipe_colpat_t colp_olep;
+ /* Color pattern for even line, odd pixel */
+ enum ipipe_colpat_t colp_elop;
+ /* Color pattern for even line, even pixel */
+ enum ipipe_colpat_t colp_elep;
+};
+
+struct prev_ss_output_spec {
+ /* output pixel format */
+ enum ipipe_pix_formats pix_fmt;
+};
+
+struct prev_single_shot_config {
+ /* Bypass image processing. RAW -> RAW */
+ enum ipipe_dpaths_bypass_t bypass;
+ /* Input specification for the image data */
+ struct prev_ss_input_spec input;
+ /* Output specification for the image data */
+ struct prev_ss_output_spec output;
+};
+
+struct prev_cont_input_spec {
+ /* 1 - enable, 0 - disable df subtraction */
+ unsigned char en_df_sub;
+ /* DF gain enable */
+ unsigned char en_df_gain;
+ /* DF gain value */
+ unsigned int df_gain;
+ /* DF gain threshold value */
+ unsigned short df_gain_thr;
+ /* Enable decimation 1 - enable, 0 - disable
+ * This is used for bringing down the line size
+ * to that supported by IPIPE. DM355 IPIPE
+ * can process only 1344 pixels per line.
+ */
+ enum ipipeif_decimation dec_en;
+ /* used when en_dec = 1. Resize ratio for decimation
+ * when frame size is greater than what hw can handle.
+ * 16 to 112. IPIPE input width is calculated as follows.
+ * width = image_width * 16/ipipeif_rsz. For example
+ * if image_width is 1920 and user want to scale it down
+ * to 1280, use ipipeif_rsz = 24. 1920*16/24 = 1280
+ */
+ unsigned char rsz;
+ /* Enable/Disable avg filter at IPIPEIF.
+ * 1 - enable, 0 - disable
+ */
+ unsigned char avg_filter_en;
+ /* Gain applied at IPIPEIF. 1 - 1023. divided by 512.
+ * So can be from 1/512 to 1/1023.
+ */
+ unsigned short gain;
+ /* clipped to this value at the output of IPIPEIF */
+ unsigned short clip;
+ /* Align HSync and VSync to rsz_start */
+ unsigned char align_sync;
+ /* ipipeif resize start position */
+ unsigned int rsz_start;
+ /* Simple defect pixel correction based on a threshold value */
+ struct ipipeif_dpc dpc;
+ /* Color pattern for odd line, odd pixel */
+ enum ipipe_colpat_t colp_olop;
+ /* Color pattern for odd line, even pixel */
+ enum ipipe_colpat_t colp_olep;
+ /* Color pattern for even line, odd pixel */
+ enum ipipe_colpat_t colp_elop;
+ /* Color pattern for even line, even pixel */
+ enum ipipe_colpat_t colp_elep;
+};
+
+/* Structure for configuring Continuous mode in the previewer
+ * channel . In continuous mode, only following parameters are
+ * available for configuration from user. Rest are configured
+ * through S_CROP and S_FMT IOCTLs in CCDC driver. In this mode
+ * data to IPIPEIF comes from CCDC
+ */
+struct prev_continuous_config {
+ /* Bypass image processing. RAW -> RAW */
+ enum ipipe_dpaths_bypass_t bypass;
+ /* Input specification for the image data */
+ struct prev_cont_input_spec input;
+};
+
+/*******************************************************************
+** Resizer API structures
+*******************************************************************/
+/* Interpolation types used for horizontal rescale */
+enum rsz_intp_t {
+ RSZ_INTP_CUBIC,
+ RSZ_INTP_LINEAR
+};
+
+/* Horizontal LPF intensity selection */
+enum rsz_h_lpf_lse_t {
+ RSZ_H_LPF_LSE_INTERN,
+ RSZ_H_LPF_LSE_USER_VAL
+};
+
+/* Structure for configuring resizer in single shot mode.
+ * This structure is used when operation mode of the
+ * resizer is single shot. The related IOCTL is
+ * RSZ_S_CONFIG & RSZ_G_CONFIG. When chained, data to
+ * resizer comes from previewer. When not chained, only
+ * UYVY data input is allowed for resizer operation.
+ * To operate on RAW Bayer data from CCDC, chain resizer
+ * with previewer by setting chain field in the
+ * rsz_channel_config structure.
+ */
+
+struct rsz_ss_input_spec {
+ /* width of the image in SDRAM. */
+ unsigned int image_width;
+ /* height of the image in SDRAM */
+ unsigned int image_height;
+ /* line length. This will allow application to set a
+ * different line length than that calculated based on
+ * width. Set it to zero, if not used,
+ */
+ unsigned int line_length;
+ /* vertical start position of the image
+ * data to IPIPE
+ */
+ unsigned int vst;
+ /* horizontal start position of the image
+ * data to IPIPE
+ */
+ unsigned int hst;
+ /* Global frame HD rate */
+ unsigned int ppln;
+ /* Global frame VD rate */
+ unsigned int lpfr;
+ /* clock divide to bring down the pixel clock */
+ struct ipipeif_5_1_clkdiv clk_div;
+ /* Enable decimation 1 - enable, 0 - disable.
+ * Used when input image width is greater than ipipe
+ * line buffer size, this is enabled to do resize
+ * at the input of the IPIPE to clip the size
+ */
+ enum ipipeif_decimation dec_en;
+ /* used when en_dec = 1. Resize ratio for decimation
+ * when frame size is greater than what hw can handle.
+ * 16 to 112. IPIPE input width is calculated as follows.
+ * width = image_width * 16/ipipeif_rsz. For example
+ * if image_width is 1920 and user want to scale it down
+ * to 1280, use ipipeif_rsz = 24. 1920*16/24 = 1280
+ */
+ unsigned char rsz;
+ /* When input image width is greater that line buffer
+ * size, use this to do resize using frame division. The
+ * frame is divided into two vertical slices and resize
+ * is performed on each slice
+ */
+ unsigned char frame_div_mode_en;
+ /* Enable/Disable avg filter at IPIPEIF.
+ * 1 - enable, 0 - disable
+ */
+ unsigned char avg_filter_en;
+ /* Align HSync and VSync to rsz_start */
+ unsigned char align_sync;
+ /* ipipeif resize start position */
+ unsigned int rsz_start;
+ /* Input pixels formats
+ */
+ enum ipipe_pix_formats pix_fmt;
+};
+
+struct rsz_output_spec {
+ /* enable the resizer output */
+ unsigned char enable;
+ /* output pixel format. Has to be UYVY */
+ enum ipipe_pix_formats pix_fmt;
+ /* enable horizontal flip */
+ unsigned char h_flip;
+ /* enable vertical flip */
+ unsigned char v_flip;
+ /* width in pixels. must be multiple of 16. */
+ unsigned int width;
+ /* height in lines */
+ unsigned int height;
+ /* line start offset for y. */
+ unsigned int vst_y;
+ /* line start offset for c. Only for 420 */
+ unsigned int vst_c;
+ /* vertical rescale interpolation type, YCbCr or Luminance */
+ enum rsz_intp_t v_typ_y;
+ /* vertical rescale interpolation type for Chrominance */
+ enum rsz_intp_t v_typ_c;
+ /* vertical lpf intensity - Luminance */
+ unsigned char v_lpf_int_y;
+ /* vertical lpf intensity - Chrominance */
+ unsigned char v_lpf_int_c;
+ /* horizontal rescale interpolation types, YCbCr or Luminance */
+ enum rsz_intp_t h_typ_y;
+ /* horizontal rescale interpolation types, Chrominance */
+ enum rsz_intp_t h_typ_c;
+ /* horizontal lpf intensity - Luminance */
+ unsigned char h_lpf_int_y;
+ /* horizontal lpf intensity - Chrominance */
+ unsigned char h_lpf_int_c;
+ /* Use down scale mode for scale down */
+ unsigned char en_down_scale;
+ /* if downscale, set the downscale more average size for horizontal
+ * direction. Used only if output width and height is less than
+ * input sizes
+ */
+ enum down_scale_ave_sz h_dscale_ave_sz;
+ /* if downscale, set the downscale more average size for vertical
+ * direction. Used only if output width and height is less than
+ * input sizes
+ */
+ enum down_scale_ave_sz v_dscale_ave_sz;
+ /* Y offset. If set, the offset would be added to the base address
+ */
+ unsigned int user_y_ofst;
+ /* C offset. If set, the offset would be added to the base address
+ */
+ unsigned int user_c_ofst;
+};
+
+/* In continuous mode, few parameters are set by ccdc driver. So only
+ * part of the output spec is available for user configuration
+ */
+struct rsz_part_output_spec {
+ /* enable the resizer output */
+ unsigned char enable;
+ /* enable horizontal flip */
+ unsigned char h_flip;
+ /* vertical rescale interpolation type, YCbCr or Luminance */
+ unsigned char v_flip;
+ /* vertical rescale interpolation type for Chrominance */
+ enum rsz_intp_t v_typ_y;
+ /* vertical rescale interpolation types */
+ enum rsz_intp_t v_typ_c;
+ /* vertical lpf intensity - Luminance */
+ unsigned char v_lpf_int_y;
+ /* horizontal rescale interpolation types, YCbCr or Luminance */
+ unsigned char v_lpf_int_c;
+ /* horizontal rescale interpolation types, Chrominance */
+ enum rsz_intp_t h_typ_y;
+ /* vertical lpf intensity - Chrominance */
+ enum rsz_intp_t h_typ_c;
+ /* horizontal lpf intensity - Luminance */
+ unsigned char h_lpf_int_y;
+ /* Use down scale mode for scale down */
+ unsigned char h_lpf_int_c;
+ /* horizontal lpf intensity - Chrominance */
+ unsigned char en_down_scale;
+ /* if downscale, set the downscale more average size for horizontal
+ * direction. Used only if output width and height is less than
+ * input sizes
+ */
+ enum down_scale_ave_sz h_dscale_ave_sz;
+ /* if downscale, set the downscale more average size for vertical
+ * direction. Used only if output width and height is less than
+ * input sizes
+ */
+ enum down_scale_ave_sz v_dscale_ave_sz;
+ /* Y offset. If set, the offset would be added to the base address
+ */
+ unsigned int user_y_ofst;
+ /* C offset. If set, the offset would be added to the base address
+ */
+ unsigned int user_c_ofst;
+};
+
+struct rsz_single_shot_config {
+ /* input spec of the image data (UYVY). non-chained
+ * mode. Only valid when not chained. For chained
+ * operation, previewer settings are used
+ */
+ struct rsz_ss_input_spec input;
+ /* output spec of the image data coming out of resizer - 0(UYVY).
+ */
+ struct rsz_output_spec output1;
+ /* output spec of the image data coming out of resizer - 1(UYVY).
+ */
+ struct rsz_output_spec output2;
+ /* 0 , chroma sample at odd pixel, 1 - even pixel */
+ unsigned char chroma_sample_even;
+ unsigned char yuv_y_min;
+ unsigned char yuv_y_max;
+ unsigned char yuv_c_min;
+ unsigned char yuv_c_max;
+ enum ipipe_chr_pos out_chr_pos;
+};
+
+struct rsz_continuous_config {
+ /* A subset of output spec is configured by application.
+ * Others such as size, position etc are set by CCDC driver
+ */
+ struct rsz_part_output_spec output1;
+ struct rsz_output_spec output2;
+ /* output spec of the image data coming out of resizer - 1(UYVY).
+ */
+ unsigned char chroma_sample_even;
+ /* 0 , chroma sample at odd pixel, 1 - even pixel */
+ unsigned char yuv_y_min;
+ unsigned char yuv_y_max;
+ unsigned char yuv_c_min;
+ unsigned char yuv_c_max;
+ enum ipipe_chr_pos out_chr_pos;
+};
+
+#ifdef __KERNEL__
+#include <media/davinci/imp_common.h>
+
+/* Used for driver storage */
+struct ipipe_otfdpc_2_0 {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* defect detection method */
+ enum ipipe_otfdpc_det_meth det_method;
+ /* Algorith used. Applicable only when IPIPE_DPC_OTF_MIN_MAX2 is
+ * used
+ */
+ enum ipipe_otfdpc_alg alg;
+ struct prev_otfdpc_2_0 otfdpc_2_0;
+};
+
+struct ipipe_otfdpc_3_0 {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* defect detection method */
+ enum ipipe_otfdpc_det_meth det_method;
+ /* Algorith used. Applicable only when IPIPE_DPC_OTF_MIN_MAX2 is
+ * used
+ */
+ enum ipipe_otfdpc_alg alg;
+ struct prev_otfdpc_3_0 otfdpc_3_0;
+};
+
+enum enable_disable_t {
+ DISABLE,
+ ENABLE
+};
+
+#define CEIL(a, b) (((a) + (b-1)) / (b))
+#define IPIPE_MAX_PASSES 2
+
+struct f_div_pass {
+ unsigned int o_hsz;
+ unsigned int i_hps;
+ unsigned int h_phs;
+ unsigned int src_hps;
+ unsigned int src_hsz;
+};
+
+struct f_div_param {
+ unsigned char en;
+ unsigned int num_passes;
+ struct f_div_pass pass[IPIPE_MAX_PASSES];
+};
+
+/* Resizer Rescale Parameters*/
+struct ipipe_rsz_rescale_param {
+ enum ipipe_oper_mode mode;
+ enum enable_disable_t h_flip;
+ enum enable_disable_t v_flip;
+ enum enable_disable_t cen;
+ enum enable_disable_t yen;
+ unsigned short i_vps;
+ unsigned short i_hps;
+ unsigned short o_vsz;
+ unsigned short o_hsz;
+ unsigned short v_phs_y;
+ unsigned short v_phs_c;
+ unsigned short v_dif;
+ /* resize method - Luminance */
+ enum rsz_intp_t v_typ_y;
+ /* resize method - Chrominance */
+ enum rsz_intp_t v_typ_c;
+ /* vertical lpf intensity - Luminance */
+ unsigned char v_lpf_int_y;
+ /* vertical lpf intensity - Chrominance */
+ unsigned char v_lpf_int_c;
+ unsigned short h_phs;
+ unsigned short h_dif;
+ /* resize method - Luminance */
+ enum rsz_intp_t h_typ_y;
+ /* resize method - Chrominance */
+ enum rsz_intp_t h_typ_c;
+ /* horizontal lpf intensity - Luminance */
+ unsigned char h_lpf_int_y;
+ /* horizontal lpf intensity - Chrominance */
+ unsigned char h_lpf_int_c;
+ enum enable_disable_t dscale_en;
+ enum down_scale_ave_sz h_dscale_ave_sz;
+ enum down_scale_ave_sz v_dscale_ave_sz;
+ /* store the calculated frame division parameter */
+ struct f_div_param f_div;
+};
+
+enum ipipe_rsz_rgb_t {
+ OUTPUT_32BIT,
+ OUTPUT_16BIT
+};
+
+enum ipipe_rsz_rgb_msk_t {
+ NOMASK,
+ MASKLAST2
+};
+
+/* Resizer RGB Conversion Parameters */
+struct ipipe_rsz_resize2rgb {
+ enum enable_disable_t rgb_en;
+ enum ipipe_rsz_rgb_t rgb_typ;
+ enum ipipe_rsz_rgb_msk_t rgb_msk0;
+ enum ipipe_rsz_rgb_msk_t rgb_msk1;
+ unsigned int rgb_alpha_val;
+};
+
+/* Resizer External Memory Parameters */
+struct ipipe_ext_mem_param {
+ unsigned int rsz_sdr_oft_y;
+ unsigned int rsz_sdr_ptr_s_y;
+ unsigned int rsz_sdr_ptr_e_y;
+ unsigned int rsz_sdr_oft_c;
+ unsigned int rsz_sdr_ptr_s_c;
+ unsigned int rsz_sdr_ptr_e_c;
+ /* offset to be added to buffer start when flipping for y/ycbcr */
+ unsigned int flip_ofst_y;
+ /* offset to be added to buffer start when flipping for c */
+ unsigned int flip_ofst_c;
+ /* c offset for YUV 420SP */
+ unsigned int c_offset;
+ /* User Defined Y offset for YUV 420SP or YUV420ILE data */
+ unsigned int user_y_ofst;
+ /* User Defined C offset for YUV 420SP data */
+ unsigned int user_c_ofst;
+};
+
+enum rsz_data_source {
+ IPIPE_DATA,
+ IPIPEIF_DATA
+};
+
+/* data paths */
+enum ipipe_data_paths {
+ IPIPE_RAW2YUV,
+ /* Bayer RAW input to YCbCr output */
+ IPIPE_RAW2RAW,
+ /* Bayer Raw to Bayer output */
+ IPIPE_RAW2BOX,
+ /* Bayer Raw to Boxcar output */
+ IPIPE_YUV2YUV
+ /* YUV Raw to YUV Raw output */
+};
+
+enum rsz_src_img_fmt {
+ RSZ_IMG_422,
+ RSZ_IMG_420
+};
+
+struct rsz_common_params {
+ unsigned int vps;
+ unsigned int vsz;
+ unsigned int hps;
+ unsigned int hsz;
+ /* 420 or 422 */
+ enum rsz_src_img_fmt src_img_fmt;
+ /* Y or C when src_fmt is 420, 0 - y, 1 - c */
+ unsigned char y_c;
+ /* flip raw or ycbcr */
+ unsigned char raw_flip;
+ /* IPIPE or IPIPEIF data */
+ enum rsz_data_source source;
+ enum ipipe_dpaths_bypass_t passthrough;
+ unsigned char yuv_y_min;
+ unsigned char yuv_y_max;
+ unsigned char yuv_c_min;
+ unsigned char yuv_c_max;
+ enum enable_disable_t rsz_seq_crv;
+ enum ipipe_chr_pos out_chr_pos;
+};
+
+struct ipipe_params {
+ struct ipipeif ipipeif_param;
+ enum ipipe_oper_mode ipipe_mode;
+ /* input/output datapath through IPIPE */
+ enum ipipe_data_paths ipipe_dpaths_fmt;
+ /* color pattern register */
+ enum ipipe_colpat_t ipipe_colpat_elep;
+ enum ipipe_colpat_t ipipe_colpat_elop;
+ enum ipipe_colpat_t ipipe_colpat_olep;
+ enum ipipe_colpat_t ipipe_colpat_olop;
+ /* horizontal/vertical start, horizontal/vertical size
+ * for both IPIPE and RSZ input
+ */
+ unsigned int ipipe_vps;
+ unsigned int ipipe_vsz;
+ unsigned int ipipe_hps;
+ unsigned int ipipe_hsz;
+
+ struct rsz_common_params rsz_common;
+ struct ipipe_rsz_rescale_param rsz_rsc_param[2];
+ struct ipipe_rsz_resize2rgb rsz2rgb[2];
+ struct ipipe_ext_mem_param ext_mem_param[2];
+ enum enable_disable_t rsz_en[2];
+
+};
+
+void ipipe_hw_dump_config(void);
+int ipipe_hw_setup(struct ipipe_params *config);
+int ipipe_set_lutdpc_regs(struct prev_lutdpc *lutdpc);
+int ipipe_set_otfdpc_regs(struct prev_otfdpc *otfdpc);
+int ipipe_set_d2f_regs(unsigned int id, struct prev_nf *noise_filter);
+int ipipe_set_wb_regs(struct prev_wb *wb);
+int ipipe_set_gic_regs(struct prev_gic *gic);
+int ipipe_set_cfa_regs(struct prev_cfa *cfa);
+int ipipe_set_rgb2rgb_regs(unsigned int id, struct prev_rgb2rgb *rgb);
+int ipipe_set_gamma_regs(struct prev_gamma *gamma);
+int ipipe_set_3d_lut_regs(struct prev_3d_lut *lut_3d);
+int ipipe_set_lum_adj_regs(struct prev_lum_adj *lum_adj);
+int ipipe_set_rgb2ycbcr_regs(struct prev_rgb2yuv *yuv);
+int ipipe_set_yuv422_conv_regs(struct prev_yuv422_conv *conv);
+int ipipe_set_gbce_regs(struct prev_gbce *gbce);
+int ipipe_set_ee_regs(struct prev_yee *ee);
+int ipipe_set_car_regs(struct prev_car *car);
+int ipipe_set_cgs_regs(struct prev_cgs *cgs);
+int rsz_enable(int rsz_id, int enable);
+void rsz_src_enable(int enable);
+int rsz_set_output_address(struct ipipe_params *params,
+ int resize_no, unsigned int address);
+int rsz_set_in_pix_format(unsigned char y_c);
+#ifdef CONFIG_VIDEO_YCBCR
+int ipipe_hw_set_ipipeif_addr(struct ipipe_params *config, unsigned int address);
+#endif
+#endif
+#endif
diff --git a/include/media/davinci/dm3xx_ipipe.h b/include/media/davinci/dm3xx_ipipe.h
new file mode 100644
index 00000000..5d4bf970
--- /dev/null
+++ b/include/media/davinci/dm3xx_ipipe.h
@@ -0,0 +1,298 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Contains all ipipeif specific types used by applications and driver
+ */
+
+#ifndef _DM3XX_IPIPE_H
+#define _DM3XX_IPIPE_H
+/* Used to shift input image data based on the data lines connected
+ * to parallel port
+ */
+/* IPIPE base specific types */
+enum ipipeif_data_shift {
+ IPIPEIF_BITS15_2,
+ IPIPEIF_BITS14_1,
+ IPIPEIF_BITS13_0,
+ IPIPEIF_BITS12_0,
+ IPIPEIF_BITS11_0,
+ IPIPEIF_BITS10_0,
+ IPIPEIF_BITS9_0
+};
+
+enum ipipeif_clkdiv {
+ IPIPEIF_DIVIDE_HALF,
+ IPIPEIF_DIVIDE_THIRD,
+ IPIPEIF_DIVIDE_FOURTH,
+ IPIPEIF_DIVIDE_FIFTH,
+ IPIPEIF_DIVIDE_SIXTH,
+ IPIPEIF_DIVIDE_EIGHTH,
+ IPIPEIF_DIVIDE_SIXTEENTH,
+ IPIPEIF_DIVIDE_THIRTY
+};
+
+/* IPIPE 5.1 interface types */
+/* dpcm predicator for IPIPE 5.1 */
+enum ipipeif_dpcm_pred {
+ DPCM_SIMPLE_PRED,
+ DPCM_ADV_PRED
+};
+/* data shift for IPIPE 5.1 */
+enum ipipeif_5_1_data_shift {
+ IPIPEIF_5_1_BITS11_0,
+ IPIPEIF_5_1_BITS10_0,
+ IPIPEIF_5_1_BITS9_0,
+ IPIPEIF_5_1_BITS8_0,
+ IPIPEIF_5_1_BITS7_0,
+ IPIPEIF_5_1_BITS15_4,
+};
+
+/* clockdiv for IPIPE 5.1 */
+struct ipipeif_5_1_clkdiv {
+ unsigned char m;
+ unsigned char n;
+};
+
+/* DPC at the if for IPIPE 5.1 */
+struct ipipeif_dpc {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* threshold */
+ unsigned short thr;
+};
+
+enum ipipeif_decimation {
+ IPIPEIF_DECIMATION_OFF,
+ IPIPEIF_DECIMATION_ON
+};
+
+enum ipipeif_pixel_order {
+ IPIPEIF_CBCR_Y,
+ IPIPEIF_Y_CBCR
+};
+
+#ifdef __KERNEL__
+#include <linux/kernel.h>
+//#include <asm/arch/cpu.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+#include <media/davinci/vpss.h>
+#include <media/davinci/vpfe_types.h>
+
+enum ipipeif_clock {
+ PIXCEL_CLK,
+ SDRAM_CLK
+};
+
+enum ipipeif_pack_mode {
+ IPIPEIF_PACK_16_BIT,
+ IPIPEIF_PACK_8_BIT
+};
+
+enum ipipe_oper_mode {
+ CONTINUOUS,
+ ONE_SHOT
+};
+
+enum ipipeif_5_1_pack_mode {
+ IPIPEIF_5_1_PACK_16_BIT,
+ IPIPEIF_5_1_PACK_8_BIT,
+ IPIPEIF_5_1_PACK_8_BIT_A_LAW,
+ IPIPEIF_5_1_PACK_12_BIT
+};
+
+enum ipipeif_avg_filter {
+ AVG_OFF,
+ AVG_ON
+};
+
+enum ipipeif_input_source {
+ CCDC,
+ SDRAM_RAW,
+ CCDC_DARKFM,
+ SDRAM_YUV
+};
+
+enum ipipeif_ialaw {
+ ALAW_OFF,
+ ALAW_ON
+};
+
+struct ipipeif_base {
+ enum ipipeif_ialaw ialaw;
+ enum ipipeif_pack_mode pack_mode;
+ enum ipipeif_data_shift data_shift;
+ enum ipipeif_clkdiv clk_div;
+};
+
+enum ipipeif_input_src1 {
+ SRC1_PARALLEL_PORT,
+ SRC1_SDRAM_RAW,
+ SRC1_ISIF_DARKFM,
+ SRC1_SDRAM_YUV
+};
+
+enum ipipeif_dpcm_type {
+ DPCM_8BIT_10BIT,
+ DPCM_8BIT_12BIT
+};
+
+struct ipipeif_dpcm_decomp {
+ unsigned char en;
+ enum ipipeif_dpcm_type type;
+ enum ipipeif_dpcm_pred pred;
+};
+
+enum ipipeif_dfs_dir {
+ IPIPEIF_PORT_MINUS_SDRAM,
+ IPIPEIF_SDRAM_MINUS_PORT
+};
+
+struct ipipeif_5_1 {
+ enum ipipeif_5_1_pack_mode pack_mode;
+ enum ipipeif_5_1_data_shift data_shift;
+ enum ipipeif_input_src1 source1;
+ struct ipipeif_5_1_clkdiv clk_div;
+ /* Defect pixel correction */
+ struct ipipeif_dpc dpc;
+ /* DPCM decompression */
+ struct ipipeif_dpcm_decomp dpcm;
+ /* ISIF port pixel order */
+ enum ipipeif_pixel_order pix_order;
+ /* interface parameters from isif */
+ struct vpfe_hw_if_param isif_port;
+ /* clipped to this value */
+ unsigned short clip;
+ /* Align HSync and VSync to rsz_start */
+ unsigned char align_sync;
+ /* resizer start position */
+ unsigned int rsz_start;
+ /* DF gain enable */
+ unsigned char df_gain_en;
+ /* DF gain value */
+ unsigned short df_gain;
+ /* DF gain threshold value */
+ unsigned short df_gain_thr;
+};
+
+/* ipipeif structures common to DM350 and DM365 used by ipipeif API */
+struct ipipeif {
+ enum ipipe_oper_mode mode;
+ enum ipipeif_input_source source;
+ enum ipipeif_clock clock_select;
+ unsigned int glob_hor_size;
+ unsigned int glob_ver_size;
+ unsigned int hnum;
+ unsigned int vnum;
+ unsigned int adofs;
+ unsigned char rsz;
+ enum ipipeif_decimation decimation;
+ enum ipipeif_avg_filter avg_filter;
+ unsigned short gain;
+ /* IPIPE 5.1 */
+ union var_part {
+ struct ipipeif_base if_base;
+ struct ipipeif_5_1 if_5_1;
+ } var;
+};
+
+/* IPIPEIF Register Offsets from the base address */
+#define IPIPEIF_ENABLE (0x00)
+#define IPIPEIF_GFG1 (0x04)
+#define IPIPEIF_PPLN (0x08)
+#define IPIPEIF_LPFR (0x0C)
+#define IPIPEIF_HNUM (0x10)
+#define IPIPEIF_VNUM (0x14)
+#define IPIPEIF_ADDRU (0x18)
+#define IPIPEIF_ADDRL (0x1C)
+#define IPIPEIF_ADOFS (0x20)
+#define IPIPEIF_RSZ (0x24)
+#define IPIPEIF_GAIN (0x28)
+
+/* Below registers are available only on IPIPE 5.1 */
+#define IPIPEIF_DPCM (0x2C)
+#define IPIPEIF_CFG2 (0x30)
+#define IPIPEIF_INIRSZ (0x34)
+#define IPIPEIF_OCLIP (0x38)
+#define IPIPEIF_DTUDF (0x3C)
+#define IPIPEIF_CLKDIV (0x40)
+#define IPIPEIF_DPC1 (0x44)
+#define IPIPEIF_DPC2 (0x48)
+#define IPIPEIF_DFSGVL (0x4C)
+#define IPIPEIF_DFSGTH (0x50)
+#define IPIPEIF_RSZ3A (0x54)
+#define IPIPEIF_INIRSZ3A (0x58)
+#define IPIPEIF_RSZ_MIN (16)
+#define IPIPEIF_RSZ_MAX (112)
+#define IPIPEIF_RSZ_CONST (16)
+#define SETBIT(reg, bit) (reg = ((reg) | ((0x00000001)<<(bit))))
+#define RESETBIT(reg, bit) (reg = ((reg) & (~(0x00000001<<(bit)))))
+
+#define IPIPEIF_ADOFS_LSB_MASK (0x1FF)
+#define IPIPEIF_ADOFS_LSB_SHIFT (5)
+#define IPIPEIF_ADOFS_MSB_MASK (0x200)
+#define IPIPEIF_ADDRU_MASK (0x7FF)
+#define IPIPEIF_ADDRL_SHIFT (5)
+#define IPIPEIF_ADDRL_MASK (0xFFFF)
+#define IPIPEIF_ADDRU_SHIFT (21)
+#define IPIPEIF_ADDRMSB_SHIFT (31)
+#define IPIPEIF_ADDRMSB_LEFT_SHIFT (10)
+
+/* CFG1 Masks and shifts */
+#define ONESHOT_SHIFT (0)
+#define DECIM_SHIFT (1)
+#define INPSRC_SHIFT (2)
+#define CLKDIV_SHIFT (4)
+#define AVGFILT_SHIFT (7)
+#define PACK8IN_SHIFT (8)
+#define IALAW_SHIFT (9)
+#define CLKSEL_SHIFT (10)
+#define DATASFT_SHIFT (11)
+#define INPSRC1_SHIFT (14)
+
+/* DPC2 */
+#define IPIPEIF_DPC2_EN_SHIFT (12)
+#define IPIPEIF_DPC2_THR_MASK (0xFFF)
+#define IPIPEIF_DF_GAIN_EN_SHIFT (10)
+#define IPIPEIF_DF_GAIN_MASK (0x3FF)
+#define IPIPEIF_DF_GAIN_THR_MASK (0xFFF)
+/* DPCM */
+#define IPIPEIF_DPCM_BITS_SHIFT (2)
+#define IPIPEIF_DPCM_PRED_SHIFT (1)
+/* CFG2 */
+#define IPIPEIF_CFG2_HDPOL_SHIFT (1)
+#define IPIPEIF_CFG2_VDPOL_SHIFT (2)
+#define IPIPEIF_CFG2_YUV8_SHIFT (6)
+#define IPIPEIF_CFG2_YUV16_SHIFT (3)
+#define IPIPEIF_CFG2_YUV8P_SHIFT (7)
+
+/* INIRSZ */
+#define IPIPEIF_INIRSZ_ALNSYNC_SHIFT (13)
+#define IPIPEIF_INIRSZ_MASK (0x1FFF)
+
+/* CLKDIV */
+#define IPIPEIF_CLKDIV_M_SHIFT 8
+
+int ipipeif_hw_setup(struct ipipeif *if_params);
+int ipipeif_set_address(struct ipipeif *if_params, unsigned int address);
+void ipipeif_set_enable(char en, unsigned int mode);
+u32 ipipeif_get_enable(void);
+void ipipeif_dump_register(void);
+
+#endif
+#endif
+
diff --git a/include/media/davinci/imp_common.h b/include/media/davinci/imp_common.h
new file mode 100644
index 00000000..d15e67d9
--- /dev/null
+++ b/include/media/davinci/imp_common.h
@@ -0,0 +1,348 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * imp_common.h file
+ **************************************************************************/
+#ifndef _IMP_COMMON_H
+#define _IMP_COMMON_H
+
+#define IMP_MODE_CONTINUOUS 0
+#define IMP_MODE_SINGLE_SHOT 1
+#define IMP_MODE_INVALID 2
+#define IMP_MAX_NAME_SIZE 40
+
+/* input buffer */
+#define IMP_BUF_IN 0
+/* output buffer */
+#define IMP_BUF_OUT1 1
+/* output buffer */
+#define IMP_BUF_OUT2 2
+
+
+/* structure for request buffer */
+struct imp_reqbufs {
+ /* type of frame buffer */
+ int buf_type;
+ /* size of the frame buffer to be allocated */
+ int size;
+ /* number of frame buffer to be allocated */
+ int count;
+};
+
+/* structure buffer */
+struct imp_buffer {
+ /* index number, 0 -> N-1 */
+ int index;
+ /* buffer type, input or output */
+ int buf_type;
+ /* address of the buffer used in the mmap() system call */
+ int offset;
+ /* size of the buffer */
+ int size;
+};
+
+struct imp_convert {
+ struct imp_buffer in_buff;
+ struct imp_buffer out_buff1;
+ struct imp_buffer out_buff2;
+};
+
+enum imp_data_paths {
+ IMP_RAW2RAW = 1,
+ IMP_RAW2YUV = 2,
+ IMP_YUV2YUV = 4
+};
+
+enum imp_pix_formats {
+ IMP_BAYER_8BIT_PACK,
+ IMP_BAYER_8BIT_PACK_ALAW,
+ IMP_BAYER_8BIT_PACK_DPCM,
+ IMP_BAYER_12BIT_PACK,
+ IMP_BAYER, /* 16 bit */
+ IMP_UYVY,
+ IMP_YUYV,
+ IMP_RGB565,
+ IMP_RGB888,
+ IMP_YUV420SP,
+ IMP_420SP_Y,
+ IMP_420SP_C,
+};
+
+struct imp_window {
+ /* horizontal size */
+ unsigned int width;
+ /* vertical size */
+ unsigned int height;
+ /* horizontal start position */
+ unsigned int hst;
+ /* vertical start position */
+ unsigned int vst;
+};
+
+/* structure used by application to query the modules
+ * available in the image processorr for preview the input
+ * image. Used for PREV_QUERY_CAP IOCTL
+ */
+struct prev_cap {
+ /* application use this to iterate over the available
+ * modules. stop when -EINVAL return code is returned by
+ * the driver
+ */
+ unsigned short index;
+ /* Version of the preview module */
+ char version[IMP_MAX_NAME_SIZE];
+ /* Module IDs as defined above */
+ unsigned short module_id;
+ /* control operation allowed in continuous mode ?
+ * 1 - allowed, 0 - not allowed
+ */
+ char control;
+ /* path on which the module is sitting */
+ enum imp_data_paths path;
+ char module_name[IMP_MAX_NAME_SIZE];
+};
+
+/* struct to configure preview modules for which structures
+ * are defined above. Used by PREV_SET_PARAM or PREV_GET_PARAM IOCTLs.
+ */
+struct prev_module_param {
+ /* Version of the preview module */
+ char version[IMP_MAX_NAME_SIZE];
+ /* Length of the module config structure */
+ unsigned short len;
+ /* Module IDs as defined above */
+ unsigned short module_id;
+ /* Ptr to module config parameter. If SET command and is NULL
+ * module is reset to power on reset values
+ */
+ void *param;
+};
+
+/* Structure for configuring the previewer driver.
+ * Used in PREV_SET_CONFIG/PREV_GET_CONFIG IOCTLs
+ */
+struct prev_channel_config {
+ /* 1 - single shot, 0 - continuous */
+ unsigned int oper_mode;
+ /* Length of the user configuration */
+ unsigned short len;
+ /* Ptr to either preview_single_shot_config or
+ * preview_continuous_config depending on oper_mode
+ */
+ void *config;
+};
+
+struct prev_control {
+ /* Version of the preview module */
+ char version[IMP_MAX_NAME_SIZE];
+ /* Length of the module config structure */
+ unsigned short len;
+ /* Module IDs as defined above */
+ unsigned short module_id;
+ /* Ptr to module config parameter. If SET command and is NULL
+ * module is reset to power on reset values
+ */
+ void *param;
+};
+
+/* Structure for RSZ_SET_CONFIG and RSZ_GET_CONFIG IOCTLs */
+struct rsz_channel_config {
+ /* 1 - single shot, 0 - continuous */
+ unsigned int oper_mode;
+ /* Chain this resizer at the previewer output */
+ unsigned char chain;
+ /* Length of the user configuration */
+ unsigned short len;
+ /* ptr to either rsz_single_shot_config or rsz_continuous_config
+ * depending on oper_mode
+ */
+ void *config;
+};
+
+/* RSZ_RECONFIG IOCTL. Used for re-configuring resizer
+ * before doing RSZ_RESIZE. This is a IOCTL to do fast reconfiguration
+ * of resizer. This assumes that corresponding resizer is already enabled
+ * through SET_CONFIG. This is used when the input image to be resized
+ * is either Y or C plane of a YUV 420 image. Typically, when channel is
+ * first configured, it is set up to resize Y plane. Then if application
+ * needs to resize C plane, this ioctl is called to switch the channel
+ * to resize C plane.
+ */
+struct rsz_reconfig {
+ enum imp_pix_formats pix_format;
+};
+
+/* Structure for setting dark frame in the IPIPE interface.
+ * Used in the PREV_SET_DARK_FRAME IOCTL
+ * Application captures a dark frame from CCDC with camera shutter
+ * closed and then call this ioctl to set this frame in ipipe interface.
+ * IPIPE operates in continuous mode for dark frame subtraction.
+ */
+struct prev_dark_frame {
+ /* address of the buffer used in the mmap system call.
+ This buffer has user captured dark frame
+ */
+ int offset;
+ /* size of the buffer */
+ int size;
+ /* width of the dark frame. Should match with current
+ * input capture area at CCDC driver
+ */
+ int width;
+ /* height of the dark frame. Should match with current
+ * input capture area at the ccdc driver
+ */
+ int height;
+};
+
+#ifdef __KERNEL__
+#include <linux/completion.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/mutex.h>
+#define MAX_CHANNELS 2
+#define MAX_BUFFERS 6
+#define MAX_PRIORITY 5
+#define MIN_PRIORITY 0
+#define DEFAULT_PRIORITY 3
+#define ENABLED 1
+#define DISABLED 0
+#define CHANNEL_BUSY 1
+#define CHANNEL_FREE 0
+#define ISNULL(val) ((val == NULL) ? 1:0)
+
+/* driver configured by application */
+#define STATE_CONFIGURED 1
+/* driver not configured by application */
+#define STATE_NOT_CONFIGURED 0
+
+enum imp_log_chan_t {
+ IMP_PREVIEWER,
+ IMP_RESIZER,
+ IMP_HISTOGRAM,
+ IMP_BOXCAR
+};
+
+struct irq_numbers {
+ int sdram;
+ int update;
+};
+
+/* IMP channel structure */
+struct imp_logical_channel {
+ /* channel type */
+ enum imp_log_chan_t type;
+ /* operation mode */
+ unsigned int mode;
+ /* If this channel is chained with another channel, this is set */
+ char chained;
+ /* Set if there is a primary user of this channel */
+ char primary_user;
+ /* channel configuration for this logial channel */
+ void *config;
+ /* Size of the user configuration block */
+ int user_config_size;
+ /* Saves the user configuration */
+ void *user_config;
+ /* configure State of the channel */
+ unsigned int config_state;
+ /* number of input buffers */
+ unsigned char in_numbufs;
+ /* number of output buffers1 */
+ unsigned char out_numbuf1s;
+ /* number of output buffers1 */
+ unsigned char out_numbuf2s;
+ /* input buffers */
+ struct imp_buffer *in_bufs[MAX_BUFFERS];
+ /* output buffer1s */
+ struct imp_buffer *out_buf1s[MAX_BUFFERS];
+ /* output buffer2s. Used only by resizes */
+ struct imp_buffer *out_buf2s[MAX_BUFFERS];
+ /* stores priority of the application */
+ int priority;
+ /* channel processing completion */
+ struct completion channel_sem;
+ /* channel protection lock */
+ struct mutex lock;
+};
+
+/* Where hardware channel is shared, this is used for serialisation */
+struct imp_serializer {
+ /* channel config array for serialization */
+ struct imp_logical_channel *channel_config[MAX_CHANNELS];
+ /* number of elements in the array */
+ int array_count;
+ /* Semaphore for above config array */
+ struct mutex array_sem;
+ /* Completion semaphore when hw channel is common
+ * Use device specific completion semaphore when request is serialized
+ */
+ struct completion sem_isr;
+};
+
+/* function prototypes */
+int imp_common_free_buffers(struct device *dev,
+ struct imp_logical_channel *channel);
+
+int imp_common_mmap(struct file *filp,
+ struct vm_area_struct *vma,
+ struct imp_logical_channel *channel);
+
+int imp_common_query_buffer(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct imp_buffer *buffer);
+
+int imp_common_start_preview(struct device *dev,
+ struct imp_logical_channel *chan,
+ struct imp_convert *convert);
+
+int imp_common_request_buffer(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct imp_reqbufs *reqbufs);
+
+struct prev_module_if *imp_get_module_interface(struct device *dev,
+ unsigned short module_id);
+
+int imp_set_preview_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct prev_channel_config *config);
+
+int imp_get_preview_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct prev_channel_config *config);
+
+int imp_init_serializer(void);
+
+
+int imp_set_resizer_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct rsz_channel_config *chan_config);
+
+int imp_common_start_resize(struct device *dev,
+ struct imp_logical_channel *chan,
+ struct imp_convert *convert);
+
+int imp_get_resize_config(struct device *dev,
+ struct imp_logical_channel *channel,
+ struct rsz_channel_config *chan_config);
+
+int imp_common_reconfig_resizer(struct device *dev,
+ struct rsz_reconfig *reconfig,
+ struct imp_logical_channel *chan);
+
+#endif
+#endif
diff --git a/include/media/davinci/imp_hw_if.h b/include/media/davinci/imp_hw_if.h
new file mode 100644
index 00000000..4f5550db
--- /dev/null
+++ b/include/media/davinci/imp_hw_if.h
@@ -0,0 +1,186 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ **************************************************************************/
+
+#ifndef _IMP_HW_IF_H
+#define _IMP_HW_IF_H
+
+#ifdef __KERNEL__
+#include <media/davinci/imp_common.h>
+#include <media/davinci/vpfe_types.h>
+
+struct prev_module_if {
+ /* Version of the preview module */
+ char *version;
+ /* Module IDs as defined above */
+ unsigned short module_id;
+ /* Name of the module */
+ char *module_name;
+ /* control allowed in continous mode ? 1 - allowed , 0 - not allowed */
+ char control;
+ /* path in which module sits */
+ enum imp_data_paths path;
+ int (*set)(struct device *dev, void *param, int len);
+ int (*get)(struct device *dev, void *param, int len);
+};
+
+struct imp_hw_interface {
+ /* Name of the image processor hardware */
+ char *name;
+ /* module owner */
+ struct module *owner;
+ /*
+ * enumerate preview modules. Return interface to the
+ * the module
+ */
+ struct prev_module_if *(*prev_enum_modules) (struct device *dev,
+ int index);
+ /*
+ * get preview operation mode
+ */
+ unsigned int (*get_preview_oper_mode) (void);
+ /* get resize operation mode */
+ unsigned int (*get_resize_oper_mode) (void);
+ /* check if hw is busy in continuous mode.
+ * Used for checking if hw is used by ccdc driver in
+ * continuous mode. If streaming is ON, this will be
+ * set to busy
+ */
+ unsigned int (*get_hw_state) (void);
+ /* set hw state */
+ void (*set_hw_state) (unsigned int state);
+ /* is resizer chained ? */
+ unsigned int (*resizer_chain) (void);
+ /* this is used to lock shared resource */
+ void (*lock_chain) (void);
+ /* this is used unlock shared resouce */
+ void (*unlock_chain) (void);
+ /* Allocate a shared or exclusive config block for hardware
+ * configuration
+ */
+ void *(*alloc_config_block) (struct device *dev, int shared);
+ /* hw serialization enabled ?? */
+ int (*serialize) (void);
+ /* De-allocate the exclusive config block */
+ void (*dealloc_config_block) (struct device *dev, void *config);
+ /* Allocate a user confguration block */
+ void *(*alloc_user_config_block) (struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode, int *len);
+
+ /* de-allocate user config block */
+ void (*dealloc_user_config_block) (struct device *dev, void *config);
+
+ /* set default configuration in the config block */
+ void (*set_user_config_defaults) (struct device *dev,
+ enum imp_log_chan_t chan_type,
+ unsigned int oper_mode,
+ void *user_config);
+ /* set user configuration for preview */
+ int (*set_preview_config) (struct device *dev,
+ unsigned int oper_mode,
+ void *user_config, void *config);
+ /* set user configuration for resize */
+ int (*set_resizer_config) (struct device *dev,
+ unsigned int oper_mode,
+ int resizer_chained,
+ void *user_config, void *config);
+
+ int (*reconfig_resizer) (struct device *dev,
+ struct rsz_reconfig *user_config,
+ void *config);
+
+ /* update output buffer address for a channel
+ * if config is NULL, the shared config is assumed
+ * this is used only in single shot mode
+ */
+ int (*update_inbuf_address) (void *config, unsigned int address);
+ /* update output buffer address for a channel
+ * if config is NULL, the shared config is assumed
+ */
+ int (*update_outbuf1_address) (void *config, unsigned int address);
+ /* update output buffer address for a channel
+ * if config is NULL, the shared config is assumed
+ */
+ int (*update_outbuf2_address) (void *config, unsigned int address);
+ /* enable or disable hw */
+ void (*enable) (unsigned char en, void *config);
+ /* enable or disable resizer to allow frame by frame resize in
+ * continuous mode
+ */
+ void (*enable_resize) (int en);
+ /* setup hardware for processing. if config is NULL,
+ * shared channel is assumed
+ */
+ int (*hw_setup) (struct device *dev, void *config);
+ /* Get preview irq numbers */
+ void (*get_preview_irq) (struct irq_numbers *irq);
+ /* Get resize irq numbers */
+ void (*get_rsz_irq) (struct irq_numbers *irq);
+ /* Get configuration state of resizer in continuous mode */
+ unsigned int (*get_resizer_config_state) (void);
+ /* Get configuration state of previewer in continuous mode */
+ unsigned int (*get_previewer_config_state) (void);
+
+ /* Below APIs assume we are using shared configuration since
+ * oper mode is continuous
+ */
+ /* Set the input crop window at the IMP interface and IMP */
+ int (*set_input_win) (struct imp_window *win);
+ /* Get current input crop window param at the IMP */
+ int (*get_input_win) (struct imp_window *win);
+ /* Set interface parameter at IPIPEIF. Only valid for DM360 */
+ int (*set_hw_if_param) (struct vpfe_hw_if_param *param);
+ /* Set input pixel format */
+ int (*set_in_pixel_format) (enum imp_pix_formats pix_fmt);
+ /* set output pixel format */
+ int (*set_out_pixel_format) (enum imp_pix_formats pix_fmt);
+ /* 0 - interleaved, 1 - field seperated */
+ int (*set_buftype) (unsigned char buf_type);
+ /* 0 - interlaced, 1 - progressive */
+ int (*set_frame_format) (unsigned char frm_fmt);
+ /* Set the output window at the IMP, output selection
+ * done by out_sel. 0 - output 1 and 1 - output 2
+ */
+ int (*set_output_win) (struct imp_window *win);
+ /* Get output enable/disable status */
+ int (*get_output_state) (unsigned char out_sel);
+ /* Get output line lenght */
+ int (*get_line_length) (unsigned char out_sel);
+ /* Get the output image height */
+ int (*get_image_height) (unsigned char out_sel);
+ /* Get current output window param at the IMP */
+ int (*get_output_win) (struct imp_window *win);
+ /* Dump HW configuration to console. only for debug purpose */
+ void (*dump_hw_config) (void);
+ /* get maximum output width of rsz-a or rsz_b*/
+ int (*get_max_output_width) (int rsz);
+ /* get maximum output height of rsa-a or rsz-b */
+ int (*get_max_output_height) (int rsz);
+ /* Enumerate pixel format for a given input format */
+ int (*enum_pix) (u32 *output_pix, int index);
+#ifdef CONFIG_VIDEO_YCBCR
+ int (*set_ipipif_addr ) (struct device *dev, void *config, unsigned int address);
+#endif
+
+};
+
+struct imp_hw_interface *imp_get_hw_if(void);
+
+#endif
+#endif
diff --git a/include/media/davinci/imp_previewer.h b/include/media/davinci/imp_previewer.h
new file mode 100644
index 00000000..90378a76
--- /dev/null
+++ b/include/media/davinci/imp_previewer.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2008 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * Description
+ * -----------
+ * Previewer device is used for accessing the image tuning capabilities
+ * of the hardware. The hardware channel has many modules, each with a set
+ * of parameters. The channel operates in 2 modes :-
+ * 1. continuous mode. In this mode, the modules are chained in the data
+ * path from ISIF/CCDC and does image tuning on the fly. No IO
+ * allowed in this mode.
+ * 2. Single shot mode. In this mode, modules are configured to tune the
+ * image stored in SDRAM. Only one IO instance allowed.
+ *
+ * device name : davinci_previewer
+ ************************************************************************/
+
+#ifndef _IMP_PREVIEWER_H
+#define _IMP_PREVIEWER_H
+
+#include <linux/ioctl.h>
+#include <media/davinci/imp_common.h>
+
+/* Operation modes of previewer and resizer */
+#define PREV_MODE_SINGLE_SHOT IMP_MODE_SINGLE_SHOT
+#define PREV_MODE_CONTINUOUS IMP_MODE_CONTINUOUS
+#define PREV_MODE_INVALID IMP_MODE_INVALID
+
+#define PREV_BUF_IN 0 /* input buffer */
+#define PREV_BUF_OUT1 1 /* output buffer */
+#define PREV_BUF_OUT2 2 /* output buffer */
+
+/* ioctls definition for previewer operations */
+#define PREV_IOC_BASE 'P'
+#define PREV_REQBUF _IOWR(PREV_IOC_BASE, 1, struct imp_reqbufs)
+#define PREV_QUERYBUF _IOWR(PREV_IOC_BASE, 2, struct imp_buffer)
+#define PREV_S_PARAM _IOWR(PREV_IOC_BASE, 3,\
+ struct prev_module_param)
+#define PREV_G_PARAM _IOWR(PREV_IOC_BASE, 4,\
+ struct prev_module_param)
+#define PREV_PREVIEW _IOWR(PREV_IOC_BASE, 5, struct imp_convert)
+#define PREV_ENUM_CAP _IOWR(PREV_IOC_BASE, 6, struct prev_cap)
+#define PREV_S_CONFIG _IOWR(PREV_IOC_BASE, 7,\
+ struct prev_channel_config)
+#define PREV_G_CONFIG _IOWR(PREV_IOC_BASE, 8,\
+ struct prev_channel_config)
+#define PREV_S_OPER_MODE _IOW(PREV_IOC_BASE, 9, unsigned long)
+#define PREV_G_OPER_MODE _IOR(PREV_IOC_BASE, 10, unsigned long)
+#define PREV_S_CONTROL _IOWR(PREV_IOC_BASE, 11, struct prev_control)
+#define PREV_G_CONTROL _IOWR(PREV_IOC_BASE, 12, struct prev_control)
+#define PREV_S_DARK_FRAME _IOW(PREV_IOC_BASE, 13, struct prev_dark_frame)
+/* only for debug purpose */
+#define PREV_DUMP_HW_CONFIG _IOW(PREV_IOC_BASE, 14, unsigned long)
+#define PREV_IOC_MAXNR 14
+
+#ifdef __KERNEL__
+
+struct prev_device {
+ /* mutex lock for this device */
+ struct mutex lock;
+ /* number of users of this channel */
+ int users;
+ /* Channel structure. Either shared or independent */
+ struct imp_logical_channel *chan;
+};
+
+struct prev_fh {
+ /* This is primary uses configured the previewer channel */
+ char primary_user;
+ /* channel associated with this file handle */
+ struct imp_logical_channel *chan;
+};
+
+#endif
+#endif
diff --git a/include/media/davinci/imp_resizer.h b/include/media/davinci/imp_resizer.h
new file mode 100644
index 00000000..5de58550
--- /dev/null
+++ b/include/media/davinci/imp_resizer.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2008-2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * Description
+ * -----------
+ * Resizer device is used for upscale or downscale the YCbCr image to
+ * desired resolution.
+ * The channel operates in 2 modes :-
+ * 1. continuous mode. In this mode, the resizer modules are chained in
+ * the data path from ISIF/CCDC and does resizing on the fly.
+ * No IO allowed in this mode.
+ * 2. Single shot mode. In this mode, modules are configured to resize
+ * the image stored in SDRAM. Multiple IO instances are allowed in
+ * this mode and each IO instance is allocated a logical channel.
+ *
+ * device name : davinci_resizer
+ ************************************************************************/
+
+#ifndef _IMP_RESIZER_H
+#define _IMP_RESIZER_H
+
+#include <linux/ioctl.h>
+#include <media/davinci/imp_common.h>
+
+/* ioctls definitions for resizer operations */
+#define RSZ_IOC_BASE 'R'
+#define RSZ_REQBUF _IOWR(RSZ_IOC_BASE, 1, struct imp_reqbufs)
+#define RSZ_QUERYBUF _IOWR(RSZ_IOC_BASE, 2, struct imp_buffer)
+#define RSZ_RESIZE _IOWR(RSZ_IOC_BASE, 3, struct imp_convert)
+#define RSZ_S_CONFIG _IOWR(RSZ_IOC_BASE, 4,\
+ struct rsz_channel_config)
+#define RSZ_G_CONFIG _IOWR(RSZ_IOC_BASE, 5,\
+ struct rsz_channel_config)
+#define RSZ_S_OPER_MODE _IOW(RSZ_IOC_BASE, 6, unsigned long)
+#define RSZ_G_OPER_MODE _IOR(RSZ_IOC_BASE, 7, unsigned long)
+#define RSZ_G_PRIORITY _IOR(RSZ_IOC_BASE, 8, unsigned long)
+#define RSZ_S_PRIORITY _IOW(RSZ_IOC_BASE, 9, unsigned long)
+#define RSZ_RECONFIG _IOWR(RSZ_IOC_BASE, 10, struct rsz_reconfig)
+/* only for debug purpose */
+#define RSZ_DUMP_HW_CONFIG _IOW(RSZ_IOC_BASE, 11, unsigned long)
+#define RSZ_IOC_MAXNR 11
+
+#ifdef __KERNEL__
+
+struct rsz_device {
+ /* mutex lock for this device */
+ struct mutex lock;
+ /* number of users */
+ int users;
+};
+#endif
+#endif
diff --git a/include/media/davinci/isif.h b/include/media/davinci/isif.h
deleted file mode 100644
index 7f3d76a4..00000000
--- a/include/media/davinci/isif.h
+++ /dev/null
@@ -1,531 +0,0 @@
-/*
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * isif header file
- */
-#ifndef _ISIF_H
-#define _ISIF_H
-
-#include <media/davinci/ccdc_types.h>
-#include <media/davinci/vpfe_types.h>
-
-/* isif float type S8Q8/U8Q8 */
-struct isif_float_8 {
- /* 8 bit integer part */
- __u8 integer;
- /* 8 bit decimal part */
- __u8 decimal;
-};
-
-/* isif float type U16Q16/S16Q16 */
-struct isif_float_16 {
- /* 16 bit integer part */
- __u16 integer;
- /* 16 bit decimal part */
- __u16 decimal;
-};
-
-/************************************************************************
- * Vertical Defect Correction parameters
- ***********************************************************************/
-/* Defect Correction (DFC) table entry */
-struct isif_vdfc_entry {
- /* vertical position of defect */
- __u16 pos_vert;
- /* horizontal position of defect */
- __u16 pos_horz;
- /*
- * Defect level of Vertical line defect position. This is subtracted
- * from the data at the defect position
- */
- __u8 level_at_pos;
- /*
- * Defect level of the pixels upper than the vertical line defect.
- * This is subtracted from the data
- */
- __u8 level_up_pixels;
- /*
- * Defect level of the pixels lower than the vertical line defect.
- * This is subtracted from the data
- */
- __u8 level_low_pixels;
-};
-
-#define ISIF_VDFC_TABLE_SIZE 8
-struct isif_dfc {
- /* enable vertical defect correction */
- __u8 en;
- /* Defect level subtraction. Just fed through if saturating */
-#define ISIF_VDFC_NORMAL 0
- /*
- * Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2
- * if data saturating
- */
-#define ISIF_VDFC_HORZ_INTERPOL_IF_SAT 1
- /* Horizontal interpolation (((i-2)+(i+2))/2) */
-#define ISIF_VDFC_HORZ_INTERPOL 2
- /* one of the vertical defect correction modes above */
- __u8 corr_mode;
- /* 0 - whole line corrected, 1 - not pixels upper than the defect */
- __u8 corr_whole_line;
-#define ISIF_VDFC_NO_SHIFT 0
-#define ISIF_VDFC_SHIFT_1 1
-#define ISIF_VDFC_SHIFT_2 2
-#define ISIF_VDFC_SHIFT_3 3
-#define ISIF_VDFC_SHIFT_4 4
- /*
- * defect level shift value. level_at_pos, level_upper_pos,
- * and level_lower_pos can be shifted up by this value. Choose
- * one of the values above
- */
- __u8 def_level_shift;
- /* defect saturation level */
- __u16 def_sat_level;
- /* number of vertical defects. Max is ISIF_VDFC_TABLE_SIZE */
- __u16 num_vdefects;
- /* VDFC table ptr */
- struct isif_vdfc_entry table[ISIF_VDFC_TABLE_SIZE];
-};
-
-struct isif_horz_bclamp {
-
- /* Horizontal clamp disabled. Only vertical clamp value is subtracted */
-#define ISIF_HORZ_BC_DISABLE 0
- /*
- * Horizontal clamp value is calculated and subtracted from image data
- * along with vertical clamp value
- */
-#define ISIF_HORZ_BC_CLAMP_CALC_ENABLED 1
- /*
- * Horizontal clamp value calculated from previous image is subtracted
- * from image data along with vertical clamp value.
- */
-#define ISIF_HORZ_BC_CLAMP_NOT_UPDATED 2
- /* horizontal clamp mode. One of the values above */
- __u8 mode;
- /*
- * pixel value limit enable.
- * 0 - limit disabled
- * 1 - pixel value limited to 1023
- */
- __u8 clamp_pix_limit;
- /* Select Most left window for bc calculation */
-#define ISIF_SEL_MOST_LEFT_WIN 0
- /* Select Most right window for bc calculation */
-#define ISIF_SEL_MOST_RIGHT_WIN 1
- /* Select most left or right window for clamp val calculation */
- __u8 base_win_sel_calc;
- /* Window count per color for calculation. range 1-32 */
- __u8 win_count_calc;
- /* Window start position - horizontal for calculation. 0 - 8191 */
- __u16 win_start_h_calc;
- /* Window start position - vertical for calculation 0 - 8191 */
- __u16 win_start_v_calc;
-#define ISIF_HORZ_BC_SZ_H_2PIXELS 0
-#define ISIF_HORZ_BC_SZ_H_4PIXELS 1
-#define ISIF_HORZ_BC_SZ_H_8PIXELS 2
-#define ISIF_HORZ_BC_SZ_H_16PIXELS 3
- /* Width of the sample window in pixels for calculation */
- __u8 win_h_sz_calc;
-#define ISIF_HORZ_BC_SZ_V_32PIXELS 0
-#define ISIF_HORZ_BC_SZ_V_64PIXELS 1
-#define ISIF_HORZ_BC_SZ_V_128PIXELS 2
-#define ISIF_HORZ_BC_SZ_V_256PIXELS 3
- /* Height of the sample window in pixels for calculation */
- __u8 win_v_sz_calc;
-};
-
-/************************************************************************
- * Black Clamp parameters
- ***********************************************************************/
-struct isif_vert_bclamp {
- /* Reset value used is the clamp value calculated */
-#define ISIF_VERT_BC_USE_HORZ_CLAMP_VAL 0
- /* Reset value used is reset_clamp_val configured */
-#define ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL 1
- /* No update, previous image value is used */
-#define ISIF_VERT_BC_NO_UPDATE 2
- /*
- * Reset value selector for vertical clamp calculation. Use one of
- * the above values
- */
- __u8 reset_val_sel;
- /* U8Q8. Line average coefficient used in vertical clamp calculation */
- __u8 line_ave_coef;
- /* Height of the optical black region for calculation */
- __u16 ob_v_sz_calc;
- /* Optical black region start position - horizontal. 0 - 8191 */
- __u16 ob_start_h;
- /* Optical black region start position - vertical 0 - 8191 */
- __u16 ob_start_v;
-};
-
-struct isif_black_clamp {
- /*
- * This offset value is added irrespective of the clamp enable status.
- * S13
- */
- __u16 dc_offset;
- /*
- * Enable black/digital clamp value to be subtracted from the image data
- */
- __u8 en;
- /*
- * black clamp mode. same/separate clamp for 4 colors
- * 0 - disable - same clamp value for all colors
- * 1 - clamp value calculated separately for all colors
- */
- __u8 bc_mode_color;
- /* Vrtical start position for bc subtraction */
- __u16 vert_start_sub;
- /* Black clamp for horizontal direction */
- struct isif_horz_bclamp horz;
- /* Black clamp for vertical direction */
- struct isif_vert_bclamp vert;
-};
-
-/*************************************************************************
-** Color Space Conversion (CSC)
-*************************************************************************/
-#define ISIF_CSC_NUM_COEFF 16
-struct isif_color_space_conv {
- /* Enable color space conversion */
- __u8 en;
- /*
- * csc coeffient table. S8Q5, M00 at index 0, M01 at index 1, and
- * so forth
- */
- struct isif_float_8 coeff[ISIF_CSC_NUM_COEFF];
-};
-
-
-/*************************************************************************
-** Black Compensation parameters
-*************************************************************************/
-struct isif_black_comp {
- /* Comp for Red */
- __s8 r_comp;
- /* Comp for Gr */
- __s8 gr_comp;
- /* Comp for Blue */
- __s8 b_comp;
- /* Comp for Gb */
- __s8 gb_comp;
-};
-
-/*************************************************************************
-** Gain parameters
-*************************************************************************/
-struct isif_gain {
- /* Gain for Red or ye */
- struct isif_float_16 r_ye;
- /* Gain for Gr or cy */
- struct isif_float_16 gr_cy;
- /* Gain for Gb or g */
- struct isif_float_16 gb_g;
- /* Gain for Blue or mg */
- struct isif_float_16 b_mg;
-};
-
-#define ISIF_LINEAR_TAB_SIZE 192
-/*************************************************************************
-** Linearization parameters
-*************************************************************************/
-struct isif_linearize {
- /* Enable or Disable linearization of data */
- __u8 en;
- /* Shift value applied */
- __u8 corr_shft;
- /* scale factor applied U11Q10 */
- struct isif_float_16 scale_fact;
- /* Size of the linear table */
- __u16 table[ISIF_LINEAR_TAB_SIZE];
-};
-
-/* Color patterns */
-#define ISIF_RED 0
-#define ISIF_GREEN_RED 1
-#define ISIF_GREEN_BLUE 2
-#define ISIF_BLUE 3
-struct isif_col_pat {
- __u8 olop;
- __u8 olep;
- __u8 elop;
- __u8 elep;
-};
-
-/*************************************************************************
-** Data formatter parameters
-*************************************************************************/
-struct isif_fmtplen {
- /*
- * number of program entries for SET0, range 1 - 16
- * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
- * ISIF_COMBINE
- */
- __u16 plen0;
- /*
- * number of program entries for SET1, range 1 - 16
- * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
- * ISIF_COMBINE
- */
- __u16 plen1;
- /**
- * number of program entries for SET2, range 1 - 16
- * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
- * ISIF_COMBINE
- */
- __u16 plen2;
- /**
- * number of program entries for SET3, range 1 - 16
- * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
- * ISIF_COMBINE
- */
- __u16 plen3;
-};
-
-struct isif_fmt_cfg {
-#define ISIF_SPLIT 0
-#define ISIF_COMBINE 1
- /* Split or combine or line alternate */
- __u8 fmtmode;
- /* enable or disable line alternating mode */
- __u8 ln_alter_en;
-#define ISIF_1LINE 0
-#define ISIF_2LINES 1
-#define ISIF_3LINES 2
-#define ISIF_4LINES 3
- /* Split/combine line number */
- __u8 lnum;
- /* Address increment Range 1 - 16 */
- __u8 addrinc;
-};
-
-struct isif_fmt_addr_ptr {
- /* Initial address */
- __u32 init_addr;
- /* output line number */
-#define ISIF_1STLINE 0
-#define ISIF_2NDLINE 1
-#define ISIF_3RDLINE 2
-#define ISIF_4THLINE 3
- __u8 out_line;
-};
-
-struct isif_fmtpgm_ap {
- /* program address pointer */
- __u8 pgm_aptr;
- /* program address increment or decrement */
- __u8 pgmupdt;
-};
-
-struct isif_data_formatter {
- /* Enable/Disable data formatter */
- __u8 en;
- /* data formatter configuration */
- struct isif_fmt_cfg cfg;
- /* Formatter program entries length */
- struct isif_fmtplen plen;
- /* first pixel in a line fed to formatter */
- __u16 fmtrlen;
- /* HD interval for output line. Only valid when split line */
- __u16 fmthcnt;
- /* formatter address pointers */
- struct isif_fmt_addr_ptr fmtaddr_ptr[16];
- /* program enable/disable */
- __u8 pgm_en[32];
- /* program address pointers */
- struct isif_fmtpgm_ap fmtpgm_ap[32];
-};
-
-struct isif_df_csc {
- /* Color Space Conversion confguration, 0 - csc, 1 - df */
- __u8 df_or_csc;
- /* csc configuration valid if df_or_csc is 0 */
- struct isif_color_space_conv csc;
- /* data formatter configuration valid if df_or_csc is 1 */
- struct isif_data_formatter df;
- /* start pixel in a line at the input */
- __u32 start_pix;
- /* number of pixels in input line */
- __u32 num_pixels;
- /* start line at the input */
- __u32 start_line;
- /* number of lines at the input */
- __u32 num_lines;
-};
-
-struct isif_gain_offsets_adj {
- /* Gain adjustment per color */
- struct isif_gain gain;
- /* Offset adjustment */
- __u16 offset;
- /* Enable or Disable Gain adjustment for SDRAM data */
- __u8 gain_sdram_en;
- /* Enable or Disable Gain adjustment for IPIPE data */
- __u8 gain_ipipe_en;
- /* Enable or Disable Gain adjustment for H3A data */
- __u8 gain_h3a_en;
- /* Enable or Disable Gain adjustment for SDRAM data */
- __u8 offset_sdram_en;
- /* Enable or Disable Gain adjustment for IPIPE data */
- __u8 offset_ipipe_en;
- /* Enable or Disable Gain adjustment for H3A data */
- __u8 offset_h3a_en;
-};
-
-struct isif_cul {
- /* Horizontal Cull pattern for odd lines */
- __u8 hcpat_odd;
- /* Horizontal Cull pattern for even lines */
- __u8 hcpat_even;
- /* Vertical Cull pattern */
- __u8 vcpat;
- /* Enable or disable lpf. Apply when cull is enabled */
- __u8 en_lpf;
-};
-
-struct isif_compress {
-#define ISIF_ALAW 0
-#define ISIF_DPCM 1
-#define ISIF_NO_COMPRESSION 2
- /* Compression Algorithm used */
- __u8 alg;
- /* Choose Predictor1 for DPCM compression */
-#define ISIF_DPCM_PRED1 0
- /* Choose Predictor2 for DPCM compression */
-#define ISIF_DPCM_PRED2 1
- /* Predictor for DPCM compression */
- __u8 pred;
-};
-
-/* all the stuff in this struct will be provided by userland */
-struct isif_config_params_raw {
- /* Linearization parameters for image sensor data input */
- struct isif_linearize linearize;
- /* Data formatter or CSC */
- struct isif_df_csc df_csc;
- /* Defect Pixel Correction (DFC) confguration */
- struct isif_dfc dfc;
- /* Black/Digital Clamp configuration */
- struct isif_black_clamp bclamp;
- /* Gain, offset adjustments */
- struct isif_gain_offsets_adj gain_offset;
- /* Culling */
- struct isif_cul culling;
- /* A-Law and DPCM compression options */
- struct isif_compress compress;
- /* horizontal offset for Gain/LSC/DFC */
- __u16 horz_offset;
- /* vertical offset for Gain/LSC/DFC */
- __u16 vert_offset;
- /* color pattern for field 0 */
- struct isif_col_pat col_pat_field0;
- /* color pattern for field 1 */
- struct isif_col_pat col_pat_field1;
-#define ISIF_NO_SHIFT 0
-#define ISIF_1BIT_SHIFT 1
-#define ISIF_2BIT_SHIFT 2
-#define ISIF_3BIT_SHIFT 3
-#define ISIF_4BIT_SHIFT 4
-#define ISIF_5BIT_SHIFT 5
-#define ISIF_6BIT_SHIFT 6
- /* Data shift applied before storing to SDRAM */
- __u8 data_shift;
- /* enable input test pattern generation */
- __u8 test_pat_gen;
-};
-
-#ifdef __KERNEL__
-struct isif_ycbcr_config {
- /* isif pixel format */
- enum ccdc_pixfmt pix_fmt;
- /* isif frame format */
- enum ccdc_frmfmt frm_fmt;
- /* ISIF crop window */
- struct v4l2_rect win;
- /* field polarity */
- enum vpfe_pin_pol fid_pol;
- /* interface VD polarity */
- enum vpfe_pin_pol vd_pol;
- /* interface HD polarity */
- enum vpfe_pin_pol hd_pol;
- /* isif pix order. Only used for ycbcr capture */
- enum ccdc_pixorder pix_order;
- /* isif buffer type. Only used for ycbcr capture */
- enum ccdc_buftype buf_type;
-};
-
-/* MSB of image data connected to sensor port */
-enum isif_data_msb {
- ISIF_BIT_MSB_15,
- ISIF_BIT_MSB_14,
- ISIF_BIT_MSB_13,
- ISIF_BIT_MSB_12,
- ISIF_BIT_MSB_11,
- ISIF_BIT_MSB_10,
- ISIF_BIT_MSB_9,
- ISIF_BIT_MSB_8,
- ISIF_BIT_MSB_7
-};
-
-enum isif_cfa_pattern {
- ISIF_CFA_PAT_MOSAIC,
- ISIF_CFA_PAT_STRIPE
-};
-
-struct isif_params_raw {
- /* isif pixel format */
- enum ccdc_pixfmt pix_fmt;
- /* isif frame format */
- enum ccdc_frmfmt frm_fmt;
- /* video window */
- struct v4l2_rect win;
- /* field polarity */
- enum vpfe_pin_pol fid_pol;
- /* interface VD polarity */
- enum vpfe_pin_pol vd_pol;
- /* interface HD polarity */
- enum vpfe_pin_pol hd_pol;
- /* buffer type. Applicable for interlaced mode */
- enum ccdc_buftype buf_type;
- /* Gain values */
- struct isif_gain gain;
- /* cfa pattern */
- enum isif_cfa_pattern cfa_pat;
- /* Data MSB position */
- enum isif_data_msb data_msb;
- /* Enable horizontal flip */
- unsigned char horz_flip_en;
- /* Enable image invert vertically */
- unsigned char image_invert_en;
-
- /* all the userland defined stuff*/
- struct isif_config_params_raw config_params;
-};
-
-enum isif_data_pack {
- ISIF_PACK_16BIT,
- ISIF_PACK_12BIT,
- ISIF_PACK_8BIT
-};
-
-#define ISIF_WIN_NTSC {0, 0, 720, 480}
-#define ISIF_WIN_VGA {0, 0, 640, 480}
-
-#endif
-#endif
diff --git a/include/media/davinci/logicpd_encoder.h b/include/media/davinci/logicpd_encoder.h
new file mode 100644
index 00000000..cc5900d4
--- /dev/null
+++ b/include/media/davinci/logicpd_encoder.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef LOGICPD_ENCODER_H
+#define LOGICPD_ENCODER_H
+
+#ifdef __KERNEL__
+/* Kernel Header files */
+#include <linux/i2c.h>
+#include <linux/device.h>
+#endif
+
+#ifdef __KERNEL__
+/* encoder standard related strctures */
+#define LOGICPD_ENCODER_MAX_NO_OUTPUTS (1)
+#define LOGICPD_ENCODER_GRAPHICS_NUM_STD (5)
+
+struct logicpd_encoder_params {
+ int outindex;
+ char *mode;
+};
+
+struct logicpd_encoder_config {
+ int no_of_outputs;
+ struct {
+ char *output_name;
+ int no_of_standard;
+ struct vid_enc_mode_info
+ standards[LOGICPD_ENCODER_GRAPHICS_NUM_STD];
+ } output[LOGICPD_ENCODER_MAX_NO_OUTPUTS];
+};
+
+struct logicpd_encoder_channel {
+ struct encoder_device *enc_device;
+ struct logicpd_encoder_params params;
+};
+
+#endif /* End of #ifdef __KERNEL__ */
+
+#endif /* End of #ifndef LOGICPD_ENCODER_H */
diff --git a/include/media/davinci/vid_encoder_if.h b/include/media/davinci/vid_encoder_if.h
new file mode 100644
index 00000000..618b29c1
--- /dev/null
+++ b/include/media/davinci/vid_encoder_if.h
@@ -0,0 +1,287 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * File: vid_encoder_if.h
+ * Description:
+ * ============
+ * This file defines the interface to allow abstraction of an encoder hardware
+ * to an encoder module. Each encoder module support one or more display
+ * channels. It registers with the encoder manager at init and
+ * unregisters at exit. Encoder modules implement a set of operations defines
+ * by this interface. For each display channel, encoder manager selects
+ * one of the encoder registered with it to support the user specified output
+ * and video/graphics modes on that output. First step is to set the output
+ * as requested by the user. To do so, encoder manager iterates through
+ * all supported encoders to match a given output name as requested by the user
+ * by calling enumoutput(). Once there is a match, this encoder is set as the
+ * current active encoder. Encoder manager calls initialize() to init the
+ * encoder and then calls setouput() set the output. If another encoder was
+ * active before this, encoder manager calls deinitialize() to make it
+ * inactive. Encoder must select a default mode for this output as part of
+ * setoutput() call. To set a mode, user call setmode(). All output names and
+ * mode names are defined in vid_encoder_types.h
+ */
+
+#ifndef VID_ENCODER_IF_H
+#define VID_ENCODER_IF_H
+
+#ifdef __KERNEL__
+#include <media/davinci/vid_encoder_types.h>
+
+struct vid_encoder_device;
+/**
+ * struct vid_enc_param_ops
+ * @setparams:
+ * @getparams:
+ *
+ * Description:
+ * Operation used for setting and getting encoder specific parameters.
+ * Operations are applied to the current encoder selected by the
+ * encoder manager
+ * @setparams: pointer to setparams function. This Set Encoder parameters.
+ * @params - params structure type ptr declared by encoder
+ * @enc - encoder device ptr
+ * Returns - zero on success and non-zero otherwise
+ * @getparams: pointer to getparams function. This Get encoder parameters
+ * @params - params structure type ptr declared by encoder
+ * @enc - encoder device ptr
+ * Returns - zero on success and non-zero otherwise
+ */
+struct vid_enc_param_ops {
+ int (*setparams) (void *params, struct vid_encoder_device * enc);
+ int (*getparams) (void *params, struct vid_encoder_device * enc);
+};
+
+/**
+ * struct vid_enc_mode_ops
+ * @setmode:
+ * @getmode:
+ *
+ * Description:
+ * video/graphics mode ops structure. Operations are applied to the
+ * current output selected by the encoder
+ * @setmode: Function pointer to setmode. set video/graphics mode or standard
+ * for current output encoder first check if the std flag is present in the
+ * mode_info. if yes, it will use name field to match a standard mode. If std
+ * flag is reset, it may reject the command if non-standard mode
+ * is not implemented. If non-standard mode is implemented, it would
+ * save the timing information in the internal structure with a
+ * key,VID_ENC_STD_NON_STANDARD as defined in vid_encoder_types.h
+ * It is expected that only one such instance is defined in the video driver.
+ * Please consider defining a mode in the vid_encoder_types.h
+ * and use that instead if encoder is to be extended to support additional
+ * modes not already supported by existing encoders.
+ * mode_info - ptr to mode information structure.
+ * enc - encoder device ptr.
+ * Returns - zero on success and non-zero otherwise.
+ * @getmode: Function pointer to getmode. get current video/graphics mode
+ * information at the outpu.t
+ * mode_info - ptr to mode information structure.
+ * enc - encoder device ptr.
+ * Returns - zero on success and non-zero otherwise.
+ */
+struct vid_enc_mode_ops {
+ int (*setmode) (struct vid_enc_mode_info * mode_info,
+ struct vid_encoder_device * enc);
+ int (*getmode) (struct vid_enc_mode_info * mode_info,
+ struct vid_encoder_device * enc);
+};
+
+/**
+ * struct vid_enc_control_ops
+ * @setcontrol:
+ * @getcontrol:
+ *
+ * Description:
+ * Control ops structure. Control operations are performed for the current
+ * output. Control brightness, hue, contrast, saturation etc.
+ * @setcontrol: Function pointer to setcontrol. Set control value.
+ * ctrl - control type.
+ * val - value to be set for the control.
+ * enc - ptr to encoder device.
+ * Returns - zero on success and non-zero otherwise.
+ * @getcontrol: Function pointer to getcontrol. Get control value.
+ * ctrl - control type.
+ * val - ptr to value that gets updated
+ * enc - ptr to encoder device
+ * Returns - zero on success and non-zero otherwise
+ */
+struct vid_enc_control_ops {
+ int (*setcontrol) (enum vid_enc_ctrl_id ctrl,
+ unsigned char val, struct vid_encoder_device * enc);
+ int (*getcontrol) (enum vid_enc_ctrl_id ctrl,
+ unsigned char *val, struct vid_encoder_device * enc);
+};
+
+/**
+ * struct vid_enc_output_ops
+ * @count: Indicates number of outputs supported
+ * @enumoutput:
+ * @setoutput:
+ * @getoutput:
+ *
+ * Description:
+ * output ops structure. enumoutput() is called to iterate
+ * through all outputs supported by the encoder. Encoder manager ues
+ * this API to select an encoder based on the output to be supported.
+ * setoutput is called to set output at the encoder. getoutput is called
+ * for getting the current output at the encoder.
+ * @enumoutput:
+ * Function pointer.
+ * index - index of the output.
+ * output - ptr to char array to hold output name.(size
+ * VID_ENC_NAME_MAX_CHARS).
+ * enc - pointer to encoder device.
+ * Returns - zero on success and non-zero otherwise.
+ * enumerates the outputs supported by encoder. To iterate the output, caller
+ * call this successively, starting with an index set to 0, and incrementing
+ * the same until this function returns non-zero. Each time name of the output
+ * at the given index is copied to output. Beware that this API assumes the
+* passed in output array size is VID_ENC_NAME_MAX_CHARS.
+ * @setoutput:
+ * Function pointer.
+ * setoutput to the given output identifed by name. Encoder also must set a
+ * default mode on the selected output.
+* output - ptr to output name string.
+* enc - pointer to encoder device.
+ * Returns - zero on success and non-zero otherwise.
+ * @getoutput:
+ * Function pointer.
+ * getoutput returns name of current output selected at the encoder.
+ * output - ptr to char array to hold the output name. (size
+ * VID_ENC_NAME_MAX_CHARS).
+ * enc - pointer to encoder device.
+ * Returns - zero on success and non-zero otherwise.
+ */
+struct vid_enc_output_ops {
+ int count;
+ int (*enumoutput) (int index,
+ char *output, struct vid_encoder_device * enc);
+ int (*setoutput) (char *output, struct vid_encoder_device * enc);
+ int (*getoutput) (char *output, struct vid_encoder_device * enc);
+};
+
+/**
+ * struct vid_enc_misc_ops
+ * @reset:
+ * @enable: *
+ * Description:
+ * misc ops structure. Applied for the current encoder selected by the
+ * encoder manager
+ * @reset: Function pointer to reset.
+ * For soft reset. Encoder may implement a soft reset that doesn't affect
+ * any configured registers. Some of the encoder hardware may require
+ * this if the input signal timings are changed after configuring it's
+ * mode registers.
+ * enc - ptr to encoder device.
+ * Returns - zero on success and non-zero otherwise
+ * @enable: Function pointer to enable.
+ * enable/disable output. To eliminate noise on the display during SoC mode
+ * timing configuration, user may call this function to switch Off/On
+ * the output. Encoder must implement this API call if there is a hardware
+ * support for the same.
+ * flag - 0 - disable, 1 - enable.
+ * enc - ptr to encoder device.
+ * Returns - zero on success and non-zero otherwise
+ */
+struct vid_enc_misc_ops {
+ int (*reset) (struct vid_encoder_device * enc);
+ int (*enable) (int flag, struct vid_encoder_device * enc);
+};
+
+/**
+ * struct vid_encoder_device
+ * @name: Name of the encoder device
+ * @channel_id: Id of the channel to which encoder is connected
+ * @capabilities: encoder capabilities. This is only for VBI capabilities
+ * @initialize: Pointer to initialize function to initialize encoder
+ * @mode_ops: Set of functions pointers for standard related functions
+ * @ctrl_ops: Set of functions pointers for control related functions
+ * @output_ops: Set of functions pointers for output related functions
+ * @fmt_ops: Set of functions pointers for format related functions
+ * @params_ops: Set of functions pointers for params related functions
+ * @misc_ops: Set of functions pointers for miscellaneous functions functions
+ * @deinitialize: functions pointer to de-initialize functio
+ * @start_display: function to start display.
+ * @stop_display: function to stop display.
+ * @write_vbi_data: function to write sliced vbi data.
+ * @enable_vbi: Function to enable support for RAW VBI.
+ * @enable_hbi: Function to enable support for RAW HBI.
+ * @set_vbi_services: function to enable sliced vbi services
+ *
+ * Description:
+ * output ops structure
+ * Channel_id is used when encoder support multiple channels. In this case
+ * encoder module will use the channel id to select the channel for
+ * which the operation applies.
+ * initialize() called by encoder manager to initialize the encoder. Usually
+ * called before invoking any operations on the encoder.flag may be used by
+ * the encoder module to do different level of initialization. Encoder
+ * module must set a default output and mode in this code.
+ * deinitialize() called to deinitialize the current encoder that is active
+ * before initializing the new encoder.
+ */
+struct vid_encoder_device {
+ u8 name[VID_ENC_NAME_MAX_CHARS];
+ int channel_id;
+ u32 capabilities;
+ int (*initialize) (struct vid_encoder_device * enc, int flag);
+ struct vid_enc_mode_ops *mode_ops;
+ struct vid_enc_control_ops *ctrl_ops;
+ struct vid_enc_output_ops *output_ops;
+ struct vid_enc_param_ops *params_ops;
+ struct vid_enc_misc_ops *misc_ops;
+ int (*write_vbi_data) (struct vid_enc_sliced_vbi_data * data,
+ struct vid_encoder_device * enc);
+ int (*enable_vbi) (int flag, struct vid_encoder_device * enc);
+ int (*enable_hbi) (int flag, struct vid_encoder_device * enc);
+ int (*set_vbi_services) (struct vid_enc_sliced_vbi_service * services,
+ struct vid_encoder_device * enc);
+ int (*get_sliced_cap) (struct vid_enc_sliced_vbi_service *,
+ struct vid_encoder_device * enc);
+ int (*deinitialize) (struct vid_encoder_device * enc);
+ int (*start_display) (struct vid_encoder_device * enc);
+ int (*stop_display) (struct vid_encoder_device * enc);
+};
+
+/**
+ * vid_enc_register_encoder
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Register the encoder module with the encoder manager
+ * This is implemented by the encoder Manager
+ */
+int vid_enc_register_encoder(struct vid_encoder_device
+ *encoder);
+
+/**
+ * vid_enc_unregister_encoder
+ * @encoder: pointer to the encoder device structure
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Unregister the encoder module with the encoder manager
+ * This is implemented by the encoder Manager
+ */
+int vid_enc_unregister_encoder(struct vid_encoder_device
+ *encoder);
+
+#endif /* #ifdef __KERNEL__ */
+
+#endif /* #ifdef VID_ENCODER_IF_H */
diff --git a/include/media/davinci/vid_encoder_types.h b/include/media/davinci/vid_encoder_types.h
new file mode 100644
index 00000000..de67b362
--- /dev/null
+++ b/include/media/davinci/vid_encoder_types.h
@@ -0,0 +1,237 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * vid_encoder_types.h
+ * This file contains data types which will be used across encoder manager
+ * , encoders and users of both interfaces */
+
+#ifndef VID_ENCODER_TYPES_H
+#define VID_ENCODER_TYPES_H
+
+#ifdef __KERNEL__
+
+/**
+ * enum vid_enc_init_flag
+ * @VID_ENC_I2C_BIND_FLAG: Only I2C bind
+ * @VID_ENC_FULL_INIT_FLAG: Full initialization
+ *
+ * Description:
+ * An enumeration of the encoder initialization flag.
+ */
+enum vid_enc_init_flag {
+ VID_ENC_I2C_BIND_FLAG,
+ VID_ENC_FULL_INIT_FLAG,
+};
+
+/**
+ * enum vid_enc_frame_type
+ * @VID_ENC_FRAME_INTERLACED: Interlaced frame
+ * @VID_ENC_FRAME_PROGRESSIVE: Progressive frame
+ *
+ * Description:
+ * An enumeration of the Frame Formats.
+ */
+enum vid_enc_frame_type {
+ VID_ENC_FRAME_INTERLACED,
+ VID_ENC_FRAME_PROGRESSIVE,
+};
+
+/** VID_ENC_NAME_MAX_CHARS
+ *
+ * Description:
+ * MAX characters in the name.
+ */
+#define VID_ENC_NAME_MAX_CHARS 30
+
+/**
+ * enum vid_enc_if_type
+ * @VID_ENC_IF_INT: for internal DAC
+ * @VID_ENC_IF_BT656: for BT656 input format
+ * @VID_ENC_IF_BT1120: for BT1120 input format
+ * @VID_ENC_IF_YCC8: for YCC8 input format
+ * @VID_ENC_IF_YCC16: for YCC16 input format
+ * @VID_ENC_IF_SRGB: for SRGB input format
+ * @VID_ENC_IF_PRGB: for PRGB input format
+ *
+ * Description:
+ * An enumeration of the encoder interface types.
+ *
+ */
+enum vid_enc_if_type {
+ VID_ENC_IF_INT,
+ VID_ENC_IF_BT656,
+ VID_ENC_IF_BT1120,
+ VID_ENC_IF_YCC8,
+ VID_ENC_IF_YCC16,
+ VID_ENC_IF_SRGB,
+ VID_ENC_IF_PRGB,
+};
+
+/**
+ * constant strings for standard names or mode names. All modules uses this to
+ * refer a specific standard or mode name
+ */
+#define VID_ENC_STD_NTSC "NTSC"
+#define VID_ENC_STD_NTSC_RGB "NTSC-RGB"
+#define VID_ENC_STD_PAL "PAL"
+#define VID_ENC_STD_PAL_RGB "PAL-RGB"
+#define VID_ENC_STD_720P_24 "720P-24"
+#define VID_ENC_STD_720P_25 "720P-25"
+#define VID_ENC_STD_720P_30 "720P-30"
+#define VID_ENC_STD_720P_50 "720P-50"
+#define VID_ENC_STD_720P_60 "720P-60"
+#define VID_ENC_STD_1080I_25 "1080I-25"
+#define VID_ENC_STD_1080I_30 "1080I-30"
+#define VID_ENC_STD_1080P_24 "1080P-24"
+#define VID_ENC_STD_1080P_25 "1080P-25"
+#define VID_ENC_STD_1080P_30 "1080P-30"
+#define VID_ENC_STD_1080P_50 "1080P-50"
+#define VID_ENC_STD_1080P_60 "1080P-60"
+#define VID_ENC_STD_480P_60 "480P-60"
+#define VID_ENC_STD_576P_50 "576P-50"
+#define VID_ENC_STD_640x480 "640x480"
+#define VID_ENC_STD_640x400 "640x400"
+#define VID_ENC_STD_640x350 "640x350"
+#define VID_ENC_STD_480x272 "480x272"
+#define VID_ENC_STD_800x480 "800x480"
+#define VID_ENC_STD_PRGB_DEFAULT "PRGB"
+#define VID_ENC_STD_NON_STANDARD "NON-STANDARD"
+
+/**
+ * enum vid_enc_ctrl_id
+ * @VID_ENC_CTRL_GAIN: Gain control
+ * @VID_ENC_CTRL_BRIGHTNESS: Brighness control
+ * @VID_ENC_CTRL_CONTRAST: Contrast control
+ * @VID_ENC_CTRL_HUE: Hue control
+ * @VID_ENC_CTRL_SATURATION: Saturation Control
+ *
+ * Description:
+ * Constants used for control type IDs
+*/
+enum vid_enc_ctrl_id {
+ VID_ENC_CTRL_GAIN,
+ VID_ENC_CTRL_BRIGHTNESS,
+ VID_ENC_CTRL_CONTRAST,
+ VID_ENC_CTRL_HUE,
+ VID_ENC_CTRL_SATURATION,
+};
+
+/**
+ * constant strings for output names. All modules uses this to
+ * refer a specific output at the encoder hardware or VPBE analog output.
+ * May add additional output names as per following convention. First
+ * output of a type is always with out a suffix, and subsequent outputs
+ * of the same type is defined with suffix x increasing from 1 to max
+ * output names supported as shown below.
+ */
+#define VID_ENC_OUTPUT_COMPOSITE "COMPOSITE"
+#define VID_ENC_OUTPUT_COMPOSITE1 "COMPOSITE1"
+#define VID_ENC_OUTPUT_SVIDEO "SVIDEO"
+#define VID_ENC_OUTPUT_SVIDEO1 "SVIDEO1"
+#define VID_ENC_OUTPUT_COMPONENT "COMPONENT"
+#define VID_ENC_OUTPUT_COMPONENT1 "COMPONENT1"
+#define VID_ENC_OUTPUT_LCD "LCD"
+#define VID_ENC_OUTPUT_LCD1 "LCD1"
+#define VID_ENC_OUTPUT_PRGB "PRGB"
+#define VID_ENC_OUTPUT_PRGB1 "PRGB1"
+
+/**
+ * struct vid_enc_fract
+ * @numerator: numerator part of a fractional number
+ * @denominator: denominator part of a fractional number
+ *
+ * Description:
+ * Structure used to represent fractional numbers
+ */
+struct vid_enc_fract {
+ unsigned int numerator;
+ unsigned int denominator;
+};
+
+/* Set of macros for sliced vbi services */
+#define VID_ENC_SLICED_VBI_WSS_PAL 0x0001
+#define VID_ENC_SLICED_VBI_CGMS_NTSC 0x0002
+#define VID_ENC_SLICED_VBI_CC_NTSC 0x0004
+
+/**
+ * struct vid_enc_sliced_vbi_service
+ * @service_set: set of services to be enabled in encoder
+ * @line: line number of the field in which data for these
+ * services is to be included.
+ *
+ * Description:
+ * Structure used to enable set of sliced VBI services in encoder
+ */
+struct vid_enc_sliced_vbi_data {
+
+ unsigned int service_id;
+ unsigned char field;
+ unsigned char data[48];
+};
+
+struct vid_enc_sliced_vbi_service {
+ unsigned short service_set;
+ unsigned int line[2][23];
+};
+
+/**
+ * struct vid_enc_mode_info
+ * @name: ptr to name string of the standard, "NTSC", "PAL" etc
+ * @std: standard or non-standard mode. 1 - standard, 0 - nonstandard
+ * @if_type: interface type used for this standard configuration
+ * @interlaced: 1 - interlaced, 0 - non interlaced/progressive
+ * @xres: x or horizontal resolution of the display
+ * @yres: y or vertical resolution of the display
+ * @fps: frame per second
+ * @left_margin: left margin of the display
+ * @right_margin: right margin of the display
+ * @upper_margin: upper margin of the display
+ * @lower_margin: lower margin of the display
+ * @hsync_len: h-sync length
+ * @vsync_len: v-sync length
+ * @flags: bit field: bit usage is documented below
+ *
+ * Description:
+ * Structure holding timing and resolution information of a standard.
+ * Notes
+ * ------
+ * if_type should be used only by encoder manager and encoder.
+ * flags usage
+ * b0 (LSB) - hsync polarity, 0 - negative, 1 - positive
+ * b1 - vsync polarity, 0 - negative, 1 - positive
+ * b2 - field id polarity, 0 - negative, 1 - positive
+ */
+struct vid_enc_mode_info {
+ unsigned char *name;
+ unsigned int std;
+ enum vid_enc_if_type if_type;
+ unsigned int interlaced;
+ unsigned int xres;
+ unsigned int yres;
+ struct vid_enc_fract fps;
+ unsigned int left_margin;
+ unsigned int right_margin;
+ unsigned int upper_margin;
+ unsigned int lower_margin;
+ unsigned int hsync_len;
+ unsigned int vsync_len;
+ unsigned int flags;
+};
+
+#endif /* #ifdef __KERNEL__ */
+
+#endif /* #ifdef VID_ENCODER_TYPES_H */
diff --git a/include/media/davinci/videohd.h b/include/media/davinci/videohd.h
new file mode 100644
index 00000000..70525127
--- /dev/null
+++ b/include/media/davinci/videohd.h
@@ -0,0 +1,37 @@
+/*
+* videohd.h - Defines temporary HD standards for video drivers
+*
+* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License as
+* published by the Free Software Foundation version 2.
+*
+* This program is distributed .as is. WITHOUT ANY WARRANTY of any
+* kind, whether express or implied; without even the implied warranty
+* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* This header file will hold all Digital TV video HD/ED standards until same is
+* supported by v4l2 sub system. Moving this to this file will help avoid
+* unnecessary merge issues. Once the support is available, we could discard
+* this file
+*/
+
+ /* videohd.h - Defines temporary HD standards for video drivers*/
+#ifndef __VIDEOHD_H
+#define __VIDEOHD_H
+
+/* Digital TV standards */
+#define V4L2_STD_525P_60 ((v4l2_std_id)(0x0001000000000000ULL))
+#define V4L2_STD_625P_50 ((v4l2_std_id)(0x0002000000000000ULL))
+#define V4L2_STD_720P_60 ((v4l2_std_id)(0x0004000000000000ULL))
+#define V4L2_STD_720P_50 ((v4l2_std_id)(0x0008000000000000ULL))
+#define V4L2_STD_1080I_60 ((v4l2_std_id)(0x0010000000000000ULL))
+#define V4L2_STD_1080I_50 ((v4l2_std_id)(0x0020000000000000ULL))
+#define V4L2_STD_1080P_60 ((v4l2_std_id)(0x0040000000000000ULL))
+#define V4L2_STD_1080P_50 ((v4l2_std_id)(0x0080000000000000ULL))
+#define V4L2_STD_720P_30 ((v4l2_std_id)(0x0100000000000000ULL))
+#define V4L2_STD_1080I_30 ((v4l2_std_id)(0x0200000000000000ULL))
+#define V4L2_STD_1080P_30 ((v4l2_std_id)(0x0400000000000000ULL))
+#endif
diff --git a/include/media/davinci/vpbe.h b/include/media/davinci/vpbe.h
deleted file mode 100644
index a7ca4884..00000000
--- a/include/media/davinci/vpbe.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _VPBE_H
-#define _VPBE_H
-
-#include <linux/videodev2.h>
-#include <linux/i2c.h>
-
-#include <media/v4l2-dev.h>
-#include <media/v4l2-ioctl.h>
-#include <media/v4l2-device.h>
-#include <media/davinci/vpbe_osd.h>
-#include <media/davinci/vpbe_venc.h>
-#include <media/davinci/vpbe_types.h>
-
-/* OSD configuration info */
-struct osd_config_info {
- char module_name[32];
-};
-
-struct vpbe_output {
- struct v4l2_output output;
- /*
- * If output capabilities include dv_timings, list supported timings
- * below
- */
- char *subdev_name;
- /*
- * defualt_mode identifies the default timings set at the venc or
- * external encoder.
- */
- char *default_mode;
- /*
- * Fields below are used for supporting multiple modes. For example,
- * LCD panel might support different modes and they are listed here.
- * Similarly for supporting external encoders, lcd controller port
- * requires a set of non-standard timing values to be listed here for
- * each supported mode since venc is used in non-standard timing mode
- * for interfacing with external encoder similar to configuring lcd
- * panel timings
- */
- unsigned int num_modes;
- struct vpbe_enc_mode_info *modes;
- /*
- * Bus configuration goes here for external encoders. Some encoders
- * may require multiple interface types for each of the output. For
- * example, SD modes would use YCC8 where as HD mode would use YCC16.
- * Not sure if this is needed on a per mode basis instead of per
- * output basis. If per mode is needed, we may have to move this to
- * mode_info structure
- */
- enum v4l2_mbus_pixelcode if_params;
-};
-
-/* encoder configuration info */
-struct encoder_config_info {
- char module_name[32];
- /* Is this an i2c device ? */
- unsigned int is_i2c:1;
- /* i2c subdevice board info */
- struct i2c_board_info board_info;
-};
-
-/*amplifier configuration info */
-struct amp_config_info {
- char module_name[32];
- /* Is this an i2c device ? */
- unsigned int is_i2c:1;
- /* i2c subdevice board info */
- struct i2c_board_info board_info;
-};
-
-/* structure for defining vpbe display subsystem components */
-struct vpbe_config {
- char module_name[32];
- /* i2c bus adapter no */
- int i2c_adapter_id;
- struct osd_config_info osd;
- struct encoder_config_info venc;
- /* external encoder information goes here */
- int num_ext_encoders;
- struct encoder_config_info *ext_encoders;
- /* amplifier information goes here */
- struct amp_config_info *amp;
- int num_outputs;
- /* Order is venc outputs followed by LCD and then external encoders */
- struct vpbe_output *outputs;
-};
-
-struct vpbe_device;
-
-struct vpbe_device_ops {
- /* crop cap for the display */
- int (*g_cropcap)(struct vpbe_device *vpbe_dev,
- struct v4l2_cropcap *cropcap);
-
- /* Enumerate the outputs */
- int (*enum_outputs)(struct vpbe_device *vpbe_dev,
- struct v4l2_output *output);
-
- /* Set output to the given index */
- int (*set_output)(struct vpbe_device *vpbe_dev,
- int index);
-
- /* Get current output */
- unsigned int (*get_output)(struct vpbe_device *vpbe_dev);
-
- /* Set DV preset at current output */
- int (*s_dv_timings)(struct vpbe_device *vpbe_dev,
- struct v4l2_dv_timings *dv_timings);
-
- /* Get DV presets supported at the output */
- int (*g_dv_timings)(struct vpbe_device *vpbe_dev,
- struct v4l2_dv_timings *dv_timings);
-
- /* Enumerate the DV Presets supported at the output */
- int (*enum_dv_timings)(struct vpbe_device *vpbe_dev,
- struct v4l2_enum_dv_timings *timings_info);
-
- /* Set std at the output */
- int (*s_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id);
-
- /* Get the current std at the output */
- int (*g_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id);
-
- /* initialize the device */
- int (*initialize)(struct device *dev, struct vpbe_device *vpbe_dev);
-
- /* De-initialize the device */
- void (*deinitialize)(struct device *dev, struct vpbe_device *vpbe_dev);
-
- /* Get the current mode info */
- int (*get_mode_info)(struct vpbe_device *vpbe_dev,
- struct vpbe_enc_mode_info*);
-
- /*
- * Set the current mode in the encoder. Alternate way of setting
- * standard or DV preset or custom timings in the encoder
- */
- int (*set_mode)(struct vpbe_device *vpbe_dev,
- struct vpbe_enc_mode_info*);
- /* Power management operations */
- int (*suspend)(struct vpbe_device *vpbe_dev);
- int (*resume)(struct vpbe_device *vpbe_dev);
-};
-
-/* struct for vpbe device */
-struct vpbe_device {
- /* V4l2 device */
- struct v4l2_device v4l2_dev;
- /* vpbe dispay controller cfg */
- struct vpbe_config *cfg;
- /* parent device */
- struct device *pdev;
- /* external encoder v4l2 sub devices */
- struct v4l2_subdev **encoders;
- /* current encoder index */
- int current_sd_index;
- /* external amplifier v4l2 subdevice */
- struct v4l2_subdev *amp;
- struct mutex lock;
- /* device initialized */
- int initialized;
- /* vpbe dac clock */
- struct clk *dac_clk;
- /* osd_device pointer */
- struct osd_state *osd_device;
- /* venc device pointer */
- struct venc_platform_data *venc_device;
- /*
- * fields below are accessed by users of vpbe_device. Not the
- * ones above
- */
-
- /* current output */
- int current_out_index;
- /* lock used by caller to do atomic operation on vpbe device */
- /* current timings set in the controller */
- struct vpbe_enc_mode_info current_timings;
- /* venc sub device */
- struct v4l2_subdev *venc;
- /* device operations below */
- struct vpbe_device_ops ops;
-};
-
-#endif
diff --git a/include/media/davinci/vpbe_display.h b/include/media/davinci/vpbe_display.h
deleted file mode 100644
index 8dffffed..00000000
--- a/include/media/davinci/vpbe_display.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#ifndef VPBE_DISPLAY_H
-#define VPBE_DISPLAY_H
-
-/* Header files */
-#include <linux/videodev2.h>
-#include <media/v4l2-common.h>
-#include <media/videobuf2-dma-contig.h>
-#include <media/davinci/vpbe_types.h>
-#include <media/davinci/vpbe_osd.h>
-#include <media/davinci/vpbe.h>
-
-#define VPBE_DISPLAY_MAX_DEVICES 2
-
-enum vpbe_display_device_id {
- VPBE_DISPLAY_DEVICE_0,
- VPBE_DISPLAY_DEVICE_1
-};
-
-#define VPBE_DISPLAY_DRV_NAME "vpbe-display"
-
-#define VPBE_DISPLAY_MAJOR_RELEASE 1
-#define VPBE_DISPLAY_MINOR_RELEASE 0
-#define VPBE_DISPLAY_BUILD 1
-#define VPBE_DISPLAY_VERSION_CODE ((VPBE_DISPLAY_MAJOR_RELEASE << 16) | \
- (VPBE_DISPLAY_MINOR_RELEASE << 8) | \
- VPBE_DISPLAY_BUILD)
-
-#define VPBE_DISPLAY_VALID_FIELD(field) ((V4L2_FIELD_NONE == field) || \
- (V4L2_FIELD_ANY == field) || (V4L2_FIELD_INTERLACED == field))
-
-/* Exp ratio numerator and denominator constants */
-#define VPBE_DISPLAY_H_EXP_RATIO_N 9
-#define VPBE_DISPLAY_H_EXP_RATIO_D 8
-#define VPBE_DISPLAY_V_EXP_RATIO_N 6
-#define VPBE_DISPLAY_V_EXP_RATIO_D 5
-
-/* Zoom multiplication factor */
-#define VPBE_DISPLAY_ZOOM_4X 4
-#define VPBE_DISPLAY_ZOOM_2X 2
-
-/* Structures */
-struct display_layer_info {
- int enable;
- /* Layer ID used by Display Manager */
- enum osd_layer id;
- struct osd_layer_config config;
- enum osd_zoom_factor h_zoom;
- enum osd_zoom_factor v_zoom;
- enum osd_h_exp_ratio h_exp;
- enum osd_v_exp_ratio v_exp;
-};
-
-struct vpbe_disp_buffer {
- struct vb2_buffer vb;
- struct list_head list;
-};
-
-/* vpbe display object structure */
-struct vpbe_layer {
- /* number of buffers in fbuffers */
- unsigned int numbuffers;
- /* Pointer to the vpbe_display */
- struct vpbe_display *disp_dev;
- /* Pointer pointing to current v4l2_buffer */
- struct vpbe_disp_buffer *cur_frm;
- /* Pointer pointing to next v4l2_buffer */
- struct vpbe_disp_buffer *next_frm;
- /* videobuf specific parameters
- * Buffer queue used in video-buf
- */
- struct vb2_queue buffer_queue;
- /* allocator-specific contexts for each plane */
- struct vb2_alloc_ctx *alloc_ctx;
- /* Queue of filled frames */
- struct list_head dma_queue;
- /* Used in video-buf */
- spinlock_t irqlock;
- /* V4l2 specific parameters */
- /* Identifies video device for this layer */
- struct video_device video_dev;
- /* This field keeps track of type of buffer exchange mechanism user
- * has selected
- */
- enum v4l2_memory memory;
- /* Used to keep track of state of the priority */
- struct v4l2_prio_state prio;
- /* Used to store pixel format */
- struct v4l2_pix_format pix_fmt;
- enum v4l2_field buf_field;
- /* Video layer configuration params */
- struct display_layer_info layer_info;
- /* vpbe specific parameters
- * enable window for display
- */
- unsigned char window_enable;
- /* number of open instances of the layer */
- unsigned int usrs;
- /* number of users performing IO */
- unsigned int io_usrs;
- /* Indicates id of the field which is being displayed */
- unsigned int field_id;
- /* Indicates whether streaming started */
- unsigned char started;
- /* Identifies device object */
- enum vpbe_display_device_id device_id;
- /* facilitation of ioctl ops lock by v4l2*/
- struct mutex opslock;
- u8 layer_first_int;
-};
-
-/* vpbe device structure */
-struct vpbe_display {
- /* layer specific parameters */
- /* lock for isr updates to buf layers*/
- spinlock_t dma_queue_lock;
- /* C-Plane offset from start of y-plane */
- unsigned int cbcr_ofst;
- struct vpbe_layer *dev[VPBE_DISPLAY_MAX_DEVICES];
- struct vpbe_device *vpbe_dev;
- struct osd_state *osd_device;
-};
-
-/* File handle structure */
-struct vpbe_fh {
- /* vpbe device structure */
- struct vpbe_display *disp_dev;
- /* pointer to layer object for opened device */
- struct vpbe_layer *layer;
- /* Indicates whether this file handle is doing IO */
- unsigned char io_allowed;
- /* Used to keep track priority of this instance */
- enum v4l2_priority prio;
-};
-
-struct buf_config_params {
- unsigned char min_numbuffers;
- unsigned char numbuffers[VPBE_DISPLAY_MAX_DEVICES];
- unsigned int min_bufsize[VPBE_DISPLAY_MAX_DEVICES];
- unsigned int layer_bufsize[VPBE_DISPLAY_MAX_DEVICES];
-};
-
-#endif /* VPBE_DISPLAY_H */
diff --git a/include/media/davinci/vpbe_encoder.h b/include/media/davinci/vpbe_encoder.h
new file mode 100644
index 00000000..21dfeae6
--- /dev/null
+++ b/include/media/davinci/vpbe_encoder.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2007 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef VPBE_ENCODER_H
+#define VPBE_ENCODER_H
+
+#ifdef __KERNEL__
+/* Kernel Header files */
+#include <linux/i2c.h>
+#include <linux/device.h>
+#endif
+
+#ifdef __KERNEL__
+/* encoder standard related strctures */
+#define VPBE_ENCODER_MAX_NO_OUTPUTS (3)
+#define VPBE_ENCODER_MAX_NUM_STD (13)
+#define VPBE_DM355_ENCODER_MAX_NO_OUTPUTS (1)
+#define VPBE_DM355_ENCODER_COMPOSITE_NUM_STD (2)
+#define VPBE_DM355_ENCODER_MAX_NUM_STD (2)
+
+#define VPBE_DM644X_ENCODER_MAX_NO_OUTPUTS (3)
+#define VPBE_DM644X_ENCODER_COMPONENT_NUM_STD (6)
+#define VPBE_DM644X_ENCODER_SVIDEO_NUM_STD (2)
+#define VPBE_DM644X_ENCODER_COMPOSITE_NUM_STD (2)
+
+#define VPBE_DM365_ENCODER_MAX_NO_OUTPUTS (3)
+#define VPBE_DM365_ENCODER_COMPOSITE_NUM_STD (2)
+#define VPBE_DM365_ENCODER_COMPONENT_NUM_STD (9)
+#define VPBE_DM365_ENCODER_SVIDEO_NUM_STD (2)
+
+
+#endif /* End of #ifdef __KERNEL__ */
+
+#endif /* End of #ifndef VPBE_VENC_H */
diff --git a/include/media/davinci/vpbe_osd.h b/include/media/davinci/vpbe_osd.h
deleted file mode 100644
index 42628fcf..00000000
--- a/include/media/davinci/vpbe_osd.h
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * Copyright (C) 2007-2009 Texas Instruments Inc
- * Copyright (C) 2007 MontaVista Software, Inc.
- *
- * Andy Lowe (alowe@mvista.com), MontaVista Software
- * - Initial version
- * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
- * - ported to sub device interface
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2..
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-#ifndef _OSD_H
-#define _OSD_H
-
-#include <media/davinci/vpbe_types.h>
-
-#define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd"
-#define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd"
-#define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd"
-
-/**
- * enum osd_layer
- * @WIN_OSD0: On-Screen Display Window 0
- * @WIN_VID0: Video Window 0
- * @WIN_OSD1: On-Screen Display Window 1
- * @WIN_VID1: Video Window 1
- *
- * Description:
- * An enumeration of the osd display layers.
- */
-enum osd_layer {
- WIN_OSD0,
- WIN_VID0,
- WIN_OSD1,
- WIN_VID1,
-};
-
-/**
- * enum osd_win_layer
- * @OSDWIN_OSD0: On-Screen Display Window 0
- * @OSDWIN_OSD1: On-Screen Display Window 1
- *
- * Description:
- * An enumeration of the OSD Window layers.
- */
-enum osd_win_layer {
- OSDWIN_OSD0,
- OSDWIN_OSD1,
-};
-
-/**
- * enum osd_pix_format
- * @PIXFMT_1BPP: 1-bit-per-pixel bitmap
- * @PIXFMT_2BPP: 2-bits-per-pixel bitmap
- * @PIXFMT_4BPP: 4-bits-per-pixel bitmap
- * @PIXFMT_8BPP: 8-bits-per-pixel bitmap
- * @PIXFMT_RGB565: 16-bits-per-pixel RGB565
- * @PIXFMT_YCbCrI: YUV 4:2:2
- * @PIXFMT_RGB888: 24-bits-per-pixel RGB888
- * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
- * @PIXFMT_NV12: YUV 4:2:0 planar
- * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
- *
- * Description:
- * An enumeration of the DaVinci pixel formats.
- */
-enum osd_pix_format {
- PIXFMT_1BPP = 0,
- PIXFMT_2BPP,
- PIXFMT_4BPP,
- PIXFMT_8BPP,
- PIXFMT_RGB565,
- PIXFMT_YCbCrI,
- PIXFMT_RGB888,
- PIXFMT_YCrCbI,
- PIXFMT_NV12,
- PIXFMT_OSD_ATTR,
-};
-
-/**
- * enum osd_h_exp_ratio
- * @H_EXP_OFF: no expansion (1/1)
- * @H_EXP_9_OVER_8: 9/8 expansion ratio
- * @H_EXP_3_OVER_2: 3/2 expansion ratio
- *
- * Description:
- * An enumeration of the available horizontal expansion ratios.
- */
-enum osd_h_exp_ratio {
- H_EXP_OFF,
- H_EXP_9_OVER_8,
- H_EXP_3_OVER_2,
-};
-
-/**
- * enum osd_v_exp_ratio
- * @V_EXP_OFF: no expansion (1/1)
- * @V_EXP_6_OVER_5: 6/5 expansion ratio
- *
- * Description:
- * An enumeration of the available vertical expansion ratios.
- */
-enum osd_v_exp_ratio {
- V_EXP_OFF,
- V_EXP_6_OVER_5,
-};
-
-/**
- * enum osd_zoom_factor
- * @ZOOM_X1: no zoom (x1)
- * @ZOOM_X2: x2 zoom
- * @ZOOM_X4: x4 zoom
- *
- * Description:
- * An enumeration of the available zoom factors.
- */
-enum osd_zoom_factor {
- ZOOM_X1,
- ZOOM_X2,
- ZOOM_X4,
-};
-
-/**
- * enum osd_clut
- * @ROM_CLUT: ROM CLUT
- * @RAM_CLUT: RAM CLUT
- *
- * Description:
- * An enumeration of the available Color Lookup Tables (CLUTs).
- */
-enum osd_clut {
- ROM_CLUT,
- RAM_CLUT,
-};
-
-/**
- * enum osd_rom_clut
- * @ROM_CLUT0: Macintosh CLUT
- * @ROM_CLUT1: CLUT from DM270 and prior devices
- *
- * Description:
- * An enumeration of the ROM Color Lookup Table (CLUT) options.
- */
-enum osd_rom_clut {
- ROM_CLUT0,
- ROM_CLUT1,
-};
-
-/**
- * enum osd_blending_factor
- * @OSD_0_VID_8: OSD pixels are fully transparent
- * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
- * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
- * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
- * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
- * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
- * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
- * @OSD_8_VID_0: OSD pixels are fully opaque
- *
- * Description:
- * An enumeration of the DaVinci pixel blending factor options.
- */
-enum osd_blending_factor {
- OSD_0_VID_8,
- OSD_1_VID_7,
- OSD_2_VID_6,
- OSD_3_VID_5,
- OSD_4_VID_4,
- OSD_5_VID_3,
- OSD_6_VID_2,
- OSD_8_VID_0,
-};
-
-/**
- * enum osd_blink_interval
- * @BLINK_X1: blink interval is 1 vertical refresh cycle
- * @BLINK_X2: blink interval is 2 vertical refresh cycles
- * @BLINK_X3: blink interval is 3 vertical refresh cycles
- * @BLINK_X4: blink interval is 4 vertical refresh cycles
- *
- * Description:
- * An enumeration of the DaVinci pixel blinking interval options.
- */
-enum osd_blink_interval {
- BLINK_X1,
- BLINK_X2,
- BLINK_X3,
- BLINK_X4,
-};
-
-/**
- * enum osd_cursor_h_width
- * @H_WIDTH_1: horizontal line width is 1 pixel
- * @H_WIDTH_4: horizontal line width is 4 pixels
- * @H_WIDTH_8: horizontal line width is 8 pixels
- * @H_WIDTH_12: horizontal line width is 12 pixels
- * @H_WIDTH_16: horizontal line width is 16 pixels
- * @H_WIDTH_20: horizontal line width is 20 pixels
- * @H_WIDTH_24: horizontal line width is 24 pixels
- * @H_WIDTH_28: horizontal line width is 28 pixels
- */
-enum osd_cursor_h_width {
- H_WIDTH_1,
- H_WIDTH_4,
- H_WIDTH_8,
- H_WIDTH_12,
- H_WIDTH_16,
- H_WIDTH_20,
- H_WIDTH_24,
- H_WIDTH_28,
-};
-
-/**
- * enum davinci_cursor_v_width
- * @V_WIDTH_1: vertical line width is 1 line
- * @V_WIDTH_2: vertical line width is 2 lines
- * @V_WIDTH_4: vertical line width is 4 lines
- * @V_WIDTH_6: vertical line width is 6 lines
- * @V_WIDTH_8: vertical line width is 8 lines
- * @V_WIDTH_10: vertical line width is 10 lines
- * @V_WIDTH_12: vertical line width is 12 lines
- * @V_WIDTH_14: vertical line width is 14 lines
- */
-enum osd_cursor_v_width {
- V_WIDTH_1,
- V_WIDTH_2,
- V_WIDTH_4,
- V_WIDTH_6,
- V_WIDTH_8,
- V_WIDTH_10,
- V_WIDTH_12,
- V_WIDTH_14,
-};
-
-/**
- * struct osd_cursor_config
- * @xsize: horizontal size in pixels
- * @ysize: vertical size in lines
- * @xpos: horizontal offset in pixels from the left edge of the display
- * @ypos: vertical offset in lines from the top of the display
- * @interlaced: Non-zero if the display is interlaced, or zero otherwise
- * @h_width: horizontal line width
- * @v_width: vertical line width
- * @clut: the CLUT selector (ROM or RAM) for the cursor color
- * @clut_index: an index into the CLUT for the cursor color
- *
- * Description:
- * A structure describing the configuration parameters of the hardware
- * rectangular cursor.
- */
-struct osd_cursor_config {
- unsigned xsize;
- unsigned ysize;
- unsigned xpos;
- unsigned ypos;
- int interlaced;
- enum osd_cursor_h_width h_width;
- enum osd_cursor_v_width v_width;
- enum osd_clut clut;
- unsigned char clut_index;
-};
-
-/**
- * struct osd_layer_config
- * @pixfmt: pixel format
- * @line_length: offset in bytes between start of each line in memory
- * @xsize: number of horizontal pixels displayed per line
- * @ysize: number of lines displayed
- * @xpos: horizontal offset in pixels from the left edge of the display
- * @ypos: vertical offset in lines from the top of the display
- * @interlaced: Non-zero if the display is interlaced, or zero otherwise
- *
- * Description:
- * A structure describing the configuration parameters of an On-Screen Display
- * (OSD) or video layer related to how the image is stored in memory.
- * @line_length must be a multiple of the cache line size (32 bytes).
- */
-struct osd_layer_config {
- enum osd_pix_format pixfmt;
- unsigned line_length;
- unsigned xsize;
- unsigned ysize;
- unsigned xpos;
- unsigned ypos;
- int interlaced;
-};
-
-/* parameters that apply on a per-window (OSD or video) basis */
-struct osd_window_state {
- int is_allocated;
- int is_enabled;
- unsigned long fb_base_phys;
- enum osd_zoom_factor h_zoom;
- enum osd_zoom_factor v_zoom;
- struct osd_layer_config lconfig;
-};
-
-/* parameters that apply on a per-OSD-window basis */
-struct osd_osdwin_state {
- enum osd_clut clut;
- enum osd_blending_factor blend;
- int colorkey_blending;
- unsigned colorkey;
- int rec601_attenuation;
- /* index is pixel value */
- unsigned char palette_map[16];
-};
-
-/* hardware rectangular cursor parameters */
-struct osd_cursor_state {
- int is_enabled;
- struct osd_cursor_config config;
-};
-
-struct osd_state;
-
-struct vpbe_osd_ops {
- int (*initialize)(struct osd_state *sd);
- int (*request_layer)(struct osd_state *sd, enum osd_layer layer);
- void (*release_layer)(struct osd_state *sd, enum osd_layer layer);
- int (*enable_layer)(struct osd_state *sd, enum osd_layer layer,
- int otherwin);
- void (*disable_layer)(struct osd_state *sd, enum osd_layer layer);
- int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer,
- struct osd_layer_config *lconfig);
- void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer,
- struct osd_layer_config *lconfig);
- void (*start_layer)(struct osd_state *sd, enum osd_layer layer,
- unsigned long fb_base_phys,
- unsigned long cbcr_ofst);
- void (*set_left_margin)(struct osd_state *sd, u32 val);
- void (*set_top_margin)(struct osd_state *sd, u32 val);
- void (*set_interpolation_filter)(struct osd_state *sd, int filter);
- int (*set_vid_expansion)(struct osd_state *sd,
- enum osd_h_exp_ratio h_exp,
- enum osd_v_exp_ratio v_exp);
- void (*get_vid_expansion)(struct osd_state *sd,
- enum osd_h_exp_ratio *h_exp,
- enum osd_v_exp_ratio *v_exp);
- void (*set_zoom)(struct osd_state *sd, enum osd_layer layer,
- enum osd_zoom_factor h_zoom,
- enum osd_zoom_factor v_zoom);
-};
-
-struct osd_state {
- enum vpbe_version vpbe_type;
- spinlock_t lock;
- struct device *dev;
- dma_addr_t osd_base_phys;
- void __iomem *osd_base;
- unsigned long osd_size;
- /* 1-->the isr will toggle the VID0 ping-pong buffer */
- int pingpong;
- int interpolation_filter;
- int field_inversion;
- enum osd_h_exp_ratio osd_h_exp;
- enum osd_v_exp_ratio osd_v_exp;
- enum osd_h_exp_ratio vid_h_exp;
- enum osd_v_exp_ratio vid_v_exp;
- enum osd_clut backg_clut;
- unsigned backg_clut_index;
- enum osd_rom_clut rom_clut;
- int is_blinking;
- /* attribute window blinking enabled */
- enum osd_blink_interval blink;
- /* YCbCrI or YCrCbI */
- enum osd_pix_format yc_pixfmt;
- /* columns are Y, Cb, Cr */
- unsigned char clut_ram[256][3];
- struct osd_cursor_state cursor;
- /* OSD0, VID0, OSD1, VID1 */
- struct osd_window_state win[4];
- /* OSD0, OSD1 */
- struct osd_osdwin_state osdwin[2];
- /* OSD device Operations */
- struct vpbe_osd_ops ops;
-};
-
-struct osd_platform_data {
- int field_inv_wa_enable;
-};
-
-#endif
diff --git a/include/media/davinci/vpbe_types.h b/include/media/davinci/vpbe_types.h
deleted file mode 100644
index 9b853965..00000000
--- a/include/media/davinci/vpbe_types.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _VPBE_TYPES_H
-#define _VPBE_TYPES_H
-
-enum vpbe_version {
- VPBE_VERSION_1 = 1,
- VPBE_VERSION_2,
- VPBE_VERSION_3,
-};
-
-/* vpbe_timing_type - Timing types used in vpbe device */
-enum vpbe_enc_timings_type {
- VPBE_ENC_STD = 0x1,
- VPBE_ENC_DV_PRESET = 0x2,
- VPBE_ENC_CUSTOM_TIMINGS = 0x4,
- /* Used when set timings through FB device interface */
- VPBE_ENC_TIMINGS_INVALID = 0x8,
-};
-
-/*
- * struct vpbe_enc_mode_info
- * @name: ptr to name string of the standard, "NTSC", "PAL" etc
- * @std: standard or non-standard mode. 1 - standard, 0 - nonstandard
- * @interlaced: 1 - interlaced, 0 - non interlaced/progressive
- * @xres: x or horizontal resolution of the display
- * @yres: y or vertical resolution of the display
- * @fps: frame per second
- * @left_margin: left margin of the display
- * @right_margin: right margin of the display
- * @upper_margin: upper margin of the display
- * @lower_margin: lower margin of the display
- * @hsync_len: h-sync length
- * @vsync_len: v-sync length
- * @flags: bit field: bit usage is documented below
- *
- * Description:
- * Structure holding timing and resolution information of a standard.
- * Used by vpbe_device to set required non-standard timing in the
- * venc when lcd controller output is connected to a external encoder.
- * A table of timings is maintained in vpbe device to set this in
- * venc when external encoder is connected to lcd controller output.
- * Encoder may provide a g_dv_timings() API to override these values
- * as needed.
- *
- * Notes
- * ------
- * if_type should be used only by encoder manager and encoder.
- * flags usage
- * b0 (LSB) - hsync polarity, 0 - negative, 1 - positive
- * b1 - vsync polarity, 0 - negative, 1 - positive
- * b2 - field id polarity, 0 - negative, 1 - positive
- */
-struct vpbe_enc_mode_info {
- unsigned char *name;
- enum vpbe_enc_timings_type timings_type;
- v4l2_std_id std_id;
- struct v4l2_dv_timings dv_timings;
- unsigned int interlaced;
- unsigned int xres;
- unsigned int yres;
- struct v4l2_fract aspect;
- struct v4l2_fract fps;
- unsigned int left_margin;
- unsigned int right_margin;
- unsigned int upper_margin;
- unsigned int lower_margin;
- unsigned int hsync_len;
- unsigned int vsync_len;
- unsigned int flags;
-};
-
-#endif
diff --git a/include/media/davinci/vpbe_venc.h b/include/media/davinci/vpbe_venc.h
deleted file mode 100644
index 476fafc2..00000000
--- a/include/media/davinci/vpbe_venc.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _VPBE_VENC_H
-#define _VPBE_VENC_H
-
-#include <media/v4l2-subdev.h>
-#include <media/davinci/vpbe_types.h>
-
-#define DM644X_VPBE_VENC_SUBDEV_NAME "dm644x,vpbe-venc"
-#define DM365_VPBE_VENC_SUBDEV_NAME "dm365,vpbe-venc"
-#define DM355_VPBE_VENC_SUBDEV_NAME "dm355,vpbe-venc"
-
-/* venc events */
-#define VENC_END_OF_FRAME BIT(0)
-#define VENC_FIRST_FIELD BIT(1)
-#define VENC_SECOND_FIELD BIT(2)
-
-struct venc_platform_data {
- int (*setup_pinmux)(enum v4l2_mbus_pixelcode if_type,
- int field);
- int (*setup_clock)(enum vpbe_enc_timings_type type,
- unsigned int pixclock);
- int (*setup_if_config)(enum v4l2_mbus_pixelcode pixcode);
- /* Number of LCD outputs supported */
- int num_lcd_outputs;
- struct vpbe_if_params *lcd_if_params;
-};
-
-enum venc_ioctls {
- VENC_GET_FLD = 1,
-};
-
-/* exported functions */
-struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
- const char *venc_name);
-#endif
diff --git a/include/media/davinci/vpfe_capture.h b/include/media/davinci/vpfe_capture.h
index cc973ed8..6cc5f110 100644
--- a/include/media/davinci/vpfe_capture.h
+++ b/include/media/davinci/vpfe_capture.h
@@ -1,20 +1,20 @@
/*
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
+* Copyright (C) 2008-2009 Texas Instruments Inc
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
#ifndef _VPFE_CAPTURE_H
#define _VPFE_CAPTURE_H
@@ -47,6 +47,8 @@ struct vpfe_pixel_format {
struct v4l2_fmtdesc fmtdesc;
/* bytes per pixel */
int bpp;
+ /* decoder format */
+ u32 subdev_pix_fmt;
};
struct vpfe_std_info {
@@ -54,6 +56,7 @@ struct vpfe_std_info {
int active_lines;
/* current frame format */
int frame_format;
+ struct v4l2_fract fps;
};
struct vpfe_route {
@@ -61,9 +64,18 @@ struct vpfe_route {
u32 output;
};
+enum vpfe_subdev_id {
+ VPFE_SUBDEV_TVP5146 = 1,
+ VPFE_SUBDEV_MT9T031 = 2,
+ VPFE_SUBDEV_TVP7002 = 3,
+ VPFE_SUBDEV_MT9P031 = 4,
+ VPFE_SUBDEV_OV2643 = 5,
+ VPFE_SUBDEV_OV7690 = 6
+};
+
struct vpfe_subdev_info {
- /* Sub device name */
- char name[32];
+ /* Sub device module name */
+ char module_name[32];
/* Sub device group id */
int grp_id;
/* Number of inputs supported */
@@ -72,30 +84,40 @@ struct vpfe_subdev_info {
struct v4l2_input *inputs;
/* Sub dev routing information for each input */
struct vpfe_route *routes;
- /* check if sub dev supports routing */
- int can_route;
/* ccdc bus/interface configuration */
struct vpfe_hw_if_param ccdc_if_params;
/* i2c subdevice board info */
struct i2c_board_info board_info;
+ /* Is this a camera sub device ? */
+ unsigned is_camera:1;
+ /* check if sub dev supports routing */
+ unsigned can_route:1;
+ /* registered ? */
+ unsigned registered:1;
};
struct vpfe_config {
/* Number of sub devices connected to vpfe */
int num_subdevs;
- /* i2c bus adapter no */
- int i2c_adapter_id;
/* information about each subdev */
struct vpfe_subdev_info *sub_devs;
/* evm card info */
char *card_name;
/* ccdc name */
char *ccdc;
- /* vpfe clock */
- struct clk *vpssclk;
- struct clk *slaveclk;
- /* Function for Clearing the interrupt */
- void (*clr_intr)(int vdint);
+ /* setup function for the input path */
+ int (*setup_input)(enum vpfe_subdev_id id);
+ /* number of clocks */
+ int num_clocks;
+ /* clocks used for vpfe capture */
+ char *clocks[];
+};
+
+/* TODO - revisit for MC */
+enum output_src {
+ VPFE_CCDC_OUT,
+ VPFE_IMP_PREV_OUT,
+ VPFE_IMP_RSZ_OUT
};
struct vpfe_device {
@@ -106,6 +128,8 @@ struct vpfe_device {
struct v4l2_subdev **sd;
/* vpfe cfg */
struct vpfe_config *cfg;
+ /* clock ptrs for vpfe capture */
+ struct clk **clks;
/* V4l2 device */
struct v4l2_device v4l2_dev;
/* parent device */
@@ -118,8 +142,27 @@ struct vpfe_device {
u32 field_id;
/* flag to indicate whether decoder is initialized */
u8 initialized;
- /* current interface type */
- struct vpfe_hw_if_param vpfe_if_params;
+ /* TODO for MC. Previewer is always present if IMP is chained */
+ unsigned char imp_chained;
+ /* Resizer is chained at the output of previewer */
+ unsigned char rsz_present;
+ /* if second resolution output is present */
+ unsigned char second_output;
+ /* offset where second buffer starts from the starting of
+ * the buffer. This is for storing the second IPIPE resizer
+ * output
+ */
+ u32 second_off;
+ /* Size of second output image */
+ int second_out_img_sz;
+ /* output from CCDC or IPIPE */
+ enum output_src out_from;
+ /* skip frame count */
+ u8 skip_frame_count;
+ /* skip frame count init value */
+ u8 skip_frame_count_init;
+ /* time per frame for skipping */
+ struct v4l2_fract timeperframe;
/* ptr to currently selected sub device */
struct vpfe_subdev_info *current_subdev;
/* current input at the sub device */
@@ -128,6 +171,10 @@ struct vpfe_device {
struct vpfe_std_info std_info;
/* std index into std table */
int std_index;
+ /* IRQ number for DMA transfer completion at the image processor */
+ unsigned int imp_dma_irq;
+ /* IRQ number for Update resizer imp registers */
+ unsigned int imp_update_irq;
/* CCDC IRQs used when CCDC/ISIF output to SDRAM */
unsigned int ccdc_irq0;
unsigned int ccdc_irq1;
@@ -167,7 +214,7 @@ struct vpfe_device {
u8 started;
/*
* offset where second field starts from the starting of the
- * buffer for field separated YCbCr formats
+ * buffer for field seperated YCbCr formats
*/
u32 field_off;
};
@@ -186,6 +233,7 @@ struct vpfe_config_params {
u8 numbuffers;
u32 min_bufsize;
u32 device_bufsize;
+ u32 video_limit;
};
#endif /* End of __KERNEL__ */
@@ -199,4 +247,7 @@ struct vpfe_config_params {
**/
#define VPFE_CMD_S_CCDC_RAW_PARAMS _IOW('V', BASE_VIDIOC_PRIVATE + 1, \
void *)
+#define VPFE_CMD_G_CCDC_RAW_PARAMS _IOR('V', BASE_VIDIOC_PRIVATE + 2, \
+ void *)
+
#endif /* _DAVINCI_VPFE_H */
diff --git a/include/media/davinci/vpfe_types.h b/include/media/davinci/vpfe_types.h
index 76fb74ba..ec68e6e6 100644
--- a/include/media/davinci/vpfe_types.h
+++ b/include/media/davinci/vpfe_types.h
@@ -1,20 +1,20 @@
/*
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option)any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
+* Copyright (C) 2008-2009 Texas Instruments Inc
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option)any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
#ifndef _VPFE_TYPES_H
#define _VPFE_TYPES_H
diff --git a/include/media/davinci/vpss.h b/include/media/davinci/vpss.h
index 153473da..d4ec2f72 100644
--- a/include/media/davinci/vpss.h
+++ b/include/media/davinci/vpss.h
@@ -1,37 +1,38 @@
/*
- * Copyright (C) 2009 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * vpss - video processing subsystem module header file.
- *
- * Include this header file if a driver needs to configure vpss system
- * module. It exports a set of library functions for video drivers to
- * configure vpss system module functions such as clock enable/disable,
- * vpss interrupt mux to arm, and other common vpss system module
- * functions.
- */
+* Copyright (C) 2009 Texas Instruments Inc
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*
+* vpss - video processing subsystem module header file.
+*
+* Include this header file if a driver needs to configure vpss system
+* module. It exports a set of library functions for video drivers to
+* configure vpss system module functions such as clock enable/disable,
+* vpss interrupt mux to arm, and other common vpss system module
+* functions.
+*/
#ifndef _VPSS_H
#define _VPSS_H
+
/* selector for ccdc input selection on DM355 */
enum vpss_ccdc_source_sel {
VPSS_CCDCIN,
VPSS_HSSIIN,
- VPSS_PGLPBK, /* for DM365 only */
- VPSS_CCDCPG /* for DM365 only */
+ VPSS_PGLPBK,
+ VPSS_CCDCPG
};
struct vpss_sync_pol {
@@ -44,7 +45,7 @@ struct vpss_pg_frame_size {
short pplen;
};
-/* Used for enable/disable VPSS Clock */
+/* Used for enable/diable VPSS Clock */
enum vpss_clock_sel {
/* DM355/DM365 */
VPSS_CCDC_CLOCK,
@@ -87,10 +88,10 @@ enum vpss_clock_sel {
int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel);
/* enable/disable a vpss clock, 0 - success, -1 - failure */
int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en);
-/* set sync polarity, only for DM365*/
-void dm365_vpss_set_sync_pol(struct vpss_sync_pol);
-/* set the PG_FRAME_SIZE register, only for DM365 */
-void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size);
+/* set sync polarity, only applicable for DM365*/
+void vpss_set_sync_pol(struct vpss_sync_pol);
+/* set the PG_FRAME_SIZE register, only implemented for DM365 */
+void vpss_set_pg_frame_size(struct vpss_pg_frame_size);
/* wbl reset for dm644x */
enum vpss_wbl_sel {
@@ -106,17 +107,38 @@ enum vpss_wbl_sel {
/* clear wbl overflow flag for DM6446 */
int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel);
-/* set sync polarity*/
-void vpss_set_sync_pol(struct vpss_sync_pol sync);
-/* set the PG_FRAME_SIZE register */
-void vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size);
-/*
+enum dm355_int_mem_sel {
+ DM355_INT_MEM_IPIPE,
+ DM355_INT_MEM_CFALD,
+};
+void vpss_dm355_assign_int_memory_master(enum dm355_int_mem_sel master);
+
+enum dm355_dfc_mem_sel {
+ DM355_DFC_MEM_IPIPE,
+ DM355_DFC_MEM_CCDC,
+};
+void vpss_dm355_assign_dfc_memory_master(enum dm355_dfc_mem_sel master);
+
+enum dm355_rblctrl {
+ DM355_RBLCTRL_IPIPEIF,
+ DM355_RBLCTRL_CFALD,
+ DM355_RBLCTRL_H3A,
+};
+void vpss_dm355_assign_rblctrl_master(enum dm355_rblctrl master);
+
+enum dm355_wblctrl {
+ DM355_WBLCTRL_IPIPE,
+ DM355_WBLCTRL_CFALD,
+};
+void vpss_dm355_assign_wblctrl_master(enum dm355_wblctrl master);
+void vpss_dm355_ipipe_enable_any_address(int en);
+/**
* vpss_check_and_clear_interrupt - check and clear interrupt
* @irq - common enumerator for IRQ
*
* Following return values used:-
- * 0 - interrupt occurred and cleared
- * 1 - interrupt not occurred
+ * 0 - interrupt occured and cleared
+ * 1 - interrupt not occured
* 2 - interrupt status not available
*/
int vpss_dma_complete_interrupt(void);
diff --git a/include/media/media-device.h b/include/media/media-device.h
deleted file mode 100644
index eaade981..00000000
--- a/include/media/media-device.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Media device
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef _MEDIA_DEVICE_H
-#define _MEDIA_DEVICE_H
-
-#include <linux/list.h>
-#include <linux/mutex.h>
-#include <linux/spinlock.h>
-
-#include <media/media-devnode.h>
-#include <media/media-entity.h>
-
-struct device;
-
-/**
- * struct media_device - Media device
- * @dev: Parent device
- * @devnode: Media device node
- * @model: Device model name
- * @serial: Device serial number (optional)
- * @bus_info: Unique and stable device location identifier
- * @hw_revision: Hardware device revision
- * @driver_version: Device driver version
- * @entity_id: ID of the next entity to be registered
- * @entities: List of registered entities
- * @lock: Entities list lock
- * @graph_mutex: Entities graph operation lock
- *
- * This structure represents an abstract high-level media device. It allows easy
- * access to entities and provides basic media device-level support. The
- * structure can be allocated directly or embedded in a larger structure.
- *
- * The parent @dev is a physical device. It must be set before registering the
- * media device.
- *
- * @model is a descriptive model name exported through sysfs. It doesn't have to
- * be unique.
- */
-struct media_device {
- /* dev->driver_data points to this struct. */
- struct device *dev;
- struct media_devnode devnode;
-
- char model[32];
- char serial[40];
- char bus_info[32];
- u32 hw_revision;
- u32 driver_version;
-
- u32 entity_id;
- struct list_head entities;
-
- /* Protects the entities list */
- spinlock_t lock;
- /* Serializes graph operations. */
- struct mutex graph_mutex;
-
- int (*link_notify)(struct media_pad *source,
- struct media_pad *sink, u32 flags);
-};
-
-/* media_devnode to media_device */
-#define to_media_device(node) container_of(node, struct media_device, devnode)
-
-int __must_check media_device_register(struct media_device *mdev);
-void media_device_unregister(struct media_device *mdev);
-
-int __must_check media_device_register_entity(struct media_device *mdev,
- struct media_entity *entity);
-void media_device_unregister_entity(struct media_entity *entity);
-
-/* Iterate over all entities. */
-#define media_device_for_each_entity(entity, mdev) \
- list_for_each_entry(entity, &(mdev)->entities, list)
-
-#endif
diff --git a/include/media/media-devnode.h b/include/media/media-devnode.h
deleted file mode 100644
index f6caafc8..00000000
--- a/include/media/media-devnode.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Media device node
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * --
- *
- * Common functions for media-related drivers to register and unregister media
- * device nodes.
- */
-
-#ifndef _MEDIA_DEVNODE_H
-#define _MEDIA_DEVNODE_H
-
-#include <linux/poll.h>
-#include <linux/fs.h>
-#include <linux/device.h>
-#include <linux/cdev.h>
-
-/*
- * Flag to mark the media_devnode struct as registered. Drivers must not touch
- * this flag directly, it will be set and cleared by media_devnode_register and
- * media_devnode_unregister.
- */
-#define MEDIA_FLAG_REGISTERED 0
-
-struct media_file_operations {
- struct module *owner;
- ssize_t (*read) (struct file *, char __user *, size_t, loff_t *);
- ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *);
- unsigned int (*poll) (struct file *, struct poll_table_struct *);
- long (*ioctl) (struct file *, unsigned int, unsigned long);
- int (*open) (struct file *);
- int (*release) (struct file *);
-};
-
-/**
- * struct media_devnode - Media device node
- * @parent: parent device
- * @minor: device node minor number
- * @flags: flags, combination of the MEDIA_FLAG_* constants
- *
- * This structure represents a media-related device node.
- *
- * The @parent is a physical device. It must be set by core or device drivers
- * before registering the node.
- */
-struct media_devnode {
- /* device ops */
- const struct media_file_operations *fops;
-
- /* sysfs */
- struct device dev; /* media device */
- struct cdev cdev; /* character device */
- struct device *parent; /* device parent */
-
- /* device info */
- int minor;
- unsigned long flags; /* Use bitops to access flags */
-
- /* callbacks */
- void (*release)(struct media_devnode *mdev);
-};
-
-/* dev to media_devnode */
-#define to_media_devnode(cd) container_of(cd, struct media_devnode, dev)
-
-int __must_check media_devnode_register(struct media_devnode *mdev);
-void media_devnode_unregister(struct media_devnode *mdev);
-
-static inline struct media_devnode *media_devnode_data(struct file *filp)
-{
- return filp->private_data;
-}
-
-static inline int media_devnode_is_registered(struct media_devnode *mdev)
-{
- return test_bit(MEDIA_FLAG_REGISTERED, &mdev->flags);
-}
-
-#endif /* _MEDIA_DEVNODE_H */
diff --git a/include/media/media-entity.h b/include/media/media-entity.h
deleted file mode 100644
index 0c16f518..00000000
--- a/include/media/media-entity.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Media entity
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- * Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef _MEDIA_ENTITY_H
-#define _MEDIA_ENTITY_H
-
-#include <linux/list.h>
-#include <linux/media.h>
-
-struct media_pipeline {
-};
-
-struct media_link {
- struct media_pad *source; /* Source pad */
- struct media_pad *sink; /* Sink pad */
- struct media_link *reverse; /* Link in the reverse direction */
- unsigned long flags; /* Link flags (MEDIA_LNK_FL_*) */
-};
-
-struct media_pad {
- struct media_entity *entity; /* Entity this pad belongs to */
- u16 index; /* Pad index in the entity pads array */
- unsigned long flags; /* Pad flags (MEDIA_PAD_FL_*) */
-};
-
-struct media_entity_operations {
- int (*link_setup)(struct media_entity *entity,
- const struct media_pad *local,
- const struct media_pad *remote, u32 flags);
- int (*link_validate)(struct media_link *link);
-};
-
-struct media_entity {
- struct list_head list;
- struct media_device *parent; /* Media device this entity belongs to*/
- u32 id; /* Entity ID, unique in the parent media
- * device context */
- const char *name; /* Entity name */
- u32 type; /* Entity type (MEDIA_ENT_T_*) */
- u32 revision; /* Entity revision, driver specific */
- unsigned long flags; /* Entity flags (MEDIA_ENT_FL_*) */
- u32 group_id; /* Entity group ID */
-
- u16 num_pads; /* Number of sink and source pads */
- u16 num_links; /* Number of existing links, both
- * enabled and disabled */
- u16 num_backlinks; /* Number of backlinks */
- u16 max_links; /* Maximum number of links */
-
- struct media_pad *pads; /* Pads array (num_pads elements) */
- struct media_link *links; /* Links array (max_links elements)*/
-
- const struct media_entity_operations *ops; /* Entity operations */
-
- /* Reference counts must never be negative, but are signed integers on
- * purpose: a simple WARN_ON(<0) check can be used to detect reference
- * count bugs that would make them negative.
- */
- int stream_count; /* Stream count for the entity. */
- int use_count; /* Use count for the entity. */
-
- struct media_pipeline *pipe; /* Pipeline this entity belongs to. */
-
- union {
- /* Node specifications */
- struct {
- u32 major;
- u32 minor;
- } v4l;
- struct {
- u32 major;
- u32 minor;
- } fb;
- struct {
- u32 card;
- u32 device;
- u32 subdevice;
- } alsa;
- int dvb;
-
- /* Sub-device specifications */
- /* Nothing needed yet */
- } info;
-};
-
-static inline u32 media_entity_type(struct media_entity *entity)
-{
- return entity->type & MEDIA_ENT_TYPE_MASK;
-}
-
-static inline u32 media_entity_subtype(struct media_entity *entity)
-{
- return entity->type & MEDIA_ENT_SUBTYPE_MASK;
-}
-
-#define MEDIA_ENTITY_ENUM_MAX_DEPTH 16
-
-struct media_entity_graph {
- struct {
- struct media_entity *entity;
- int link;
- } stack[MEDIA_ENTITY_ENUM_MAX_DEPTH];
- int top;
-};
-
-int media_entity_init(struct media_entity *entity, u16 num_pads,
- struct media_pad *pads, u16 extra_links);
-void media_entity_cleanup(struct media_entity *entity);
-
-int media_entity_create_link(struct media_entity *source, u16 source_pad,
- struct media_entity *sink, u16 sink_pad, u32 flags);
-int __media_entity_setup_link(struct media_link *link, u32 flags);
-int media_entity_setup_link(struct media_link *link, u32 flags);
-struct media_link *media_entity_find_link(struct media_pad *source,
- struct media_pad *sink);
-struct media_pad *media_entity_remote_source(struct media_pad *pad);
-
-struct media_entity *media_entity_get(struct media_entity *entity);
-void media_entity_put(struct media_entity *entity);
-
-void media_entity_graph_walk_start(struct media_entity_graph *graph,
- struct media_entity *entity);
-struct media_entity *
-media_entity_graph_walk_next(struct media_entity_graph *graph);
-__must_check int media_entity_pipeline_start(struct media_entity *entity,
- struct media_pipeline *pipe);
-void media_entity_pipeline_stop(struct media_entity *entity);
-
-#define media_entity_call(entity, operation, args...) \
- (((entity)->ops && (entity)->ops->operation) ? \
- (entity)->ops->operation((entity) , ##args) : -ENOIOCTLCMD)
-
-#endif
diff --git a/include/media/ov7690.h b/include/media/ov7690.h
new file mode 100755
index 00000000..985b0f41
--- /dev/null
+++ b/include/media/ov7690.h
@@ -0,0 +1,19 @@
+/*
+ *
+ * OVM OV7690 CameraCube module driver media header
+ *
+ * Copyright (C) 2012 Alexander V. Shadrin <alex.virt2real@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef OV7690_H
+#define OV7690_H
+
+#define OV7690_I2C_ADDR 0x21
+
+
+
+#endif /* ifndef OV7690_H */
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
index 2cc70cf3..3d74e600 100644
--- a/include/media/soc_camera.h
+++ b/include/media/soc_camera.h
@@ -12,58 +12,48 @@
#ifndef SOC_CAMERA_H
#define SOC_CAMERA_H
-#include <linux/bitops.h>
-#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm.h>
#include <linux/videodev2.h>
#include <media/videobuf-core.h>
-#include <media/videobuf2-core.h>
-#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
-struct file;
-struct soc_camera_desc;
-
struct soc_camera_device {
- struct list_head list; /* list of all registered devices */
- struct soc_camera_desc *sdesc;
+ struct list_head list;
+ struct device dev;
struct device *pdev; /* Platform device */
- struct device *parent; /* Camera host device */
- struct device *control; /* E.g., the i2c client */
s32 user_width;
s32 user_height;
- u32 bytesperline; /* for padding, zero if unused */
- u32 sizeimage;
- enum v4l2_colorspace colorspace;
+ unsigned short width_min;
+ unsigned short height_min;
+ unsigned short y_skip_top; /* Lines to skip at the top */
unsigned char iface; /* Host number */
unsigned char devnum; /* Device number per host */
+ unsigned char buswidth; /* See comment in .c */
struct soc_camera_sense *sense; /* See comment in struct definition */
+ struct soc_camera_ops *ops;
struct video_device *vdev;
- struct v4l2_ctrl_handler ctrl_handler;
- const struct soc_camera_format_xlate *current_fmt;
+ const struct soc_camera_data_format *current_fmt;
+ const struct soc_camera_data_format *formats;
+ int num_formats;
struct soc_camera_format_xlate *user_formats;
int num_user_formats;
enum v4l2_field field; /* Preserve field over close() */
void *host_priv; /* Per-device host private data */
- /* soc_camera.c private count. Only accessed with .host_lock held */
+ /* soc_camera.c private count. Only accessed with .video_lock held */
int use_count;
- struct file *streamer; /* stream owner */
- union {
- struct videobuf_queue vb_vidq;
- struct vb2_queue vb2_vidq;
- };
+ struct mutex video_lock; /* Protects device data */
};
-/* Host supports programmable stride */
-#define SOCAM_HOST_CAP_STRIDE (1 << 0)
+struct soc_camera_file {
+ struct soc_camera_device *icd;
+ struct videobuf_queue vb_vidq;
+};
struct soc_camera_host {
struct v4l2_device v4l2_dev;
struct list_head list;
- struct mutex host_lock; /* Protect pipeline modifications */
- unsigned char nr; /* Host number */
- u32 capabilities;
+ unsigned char nr; /* Host number */
void *priv;
const char *drv_name;
struct soc_camera_host_ops *ops;
@@ -73,38 +63,32 @@ struct soc_camera_host_ops {
struct module *owner;
int (*add)(struct soc_camera_device *);
void (*remove)(struct soc_camera_device *);
+ int (*suspend)(struct soc_camera_device *, pm_message_t);
+ int (*resume)(struct soc_camera_device *);
/*
* .get_formats() is called for each client device format, but
* .put_formats() is only called once. Further, if any of the calls to
* .get_formats() fail, .put_formats() will not be called at all, the
* failing .get_formats() must then clean up internally.
*/
- int (*get_formats)(struct soc_camera_device *, unsigned int,
+ int (*get_formats)(struct soc_camera_device *, int,
struct soc_camera_format_xlate *);
void (*put_formats)(struct soc_camera_device *);
int (*cropcap)(struct soc_camera_device *, struct v4l2_cropcap *);
int (*get_crop)(struct soc_camera_device *, struct v4l2_crop *);
- int (*set_crop)(struct soc_camera_device *, const struct v4l2_crop *);
- int (*get_selection)(struct soc_camera_device *, struct v4l2_selection *);
- int (*set_selection)(struct soc_camera_device *, struct v4l2_selection *);
- /*
- * The difference to .set_crop() is, that .set_livecrop is not allowed
- * to change the output sizes
- */
- int (*set_livecrop)(struct soc_camera_device *, const struct v4l2_crop *);
+ int (*set_crop)(struct soc_camera_device *, struct v4l2_crop *);
int (*set_fmt)(struct soc_camera_device *, struct v4l2_format *);
int (*try_fmt)(struct soc_camera_device *, struct v4l2_format *);
void (*init_videobuf)(struct videobuf_queue *,
struct soc_camera_device *);
- int (*init_videobuf2)(struct vb2_queue *,
- struct soc_camera_device *);
- int (*reqbufs)(struct soc_camera_device *, struct v4l2_requestbuffers *);
+ int (*reqbufs)(struct soc_camera_file *, struct v4l2_requestbuffers *);
int (*querycap)(struct soc_camera_host *, struct v4l2_capability *);
- int (*set_bus_param)(struct soc_camera_device *);
- int (*get_parm)(struct soc_camera_device *, struct v4l2_streamparm *);
- int (*set_parm)(struct soc_camera_device *, struct v4l2_streamparm *);
- int (*enum_framesizes)(struct soc_camera_device *, struct v4l2_frmsizeenum *);
+ int (*set_bus_param)(struct soc_camera_device *, __u32);
+ int (*get_ctrl)(struct soc_camera_device *, struct v4l2_control *);
+ int (*set_ctrl)(struct soc_camera_device *, struct v4l2_control *);
unsigned int (*poll)(struct file *, poll_table *);
+ const struct v4l2_queryctrl *controls;
+ int num_controls;
};
#define SOCAM_SENSOR_INVERT_PCLK (1 << 0)
@@ -114,74 +98,21 @@ struct soc_camera_host_ops {
#define SOCAM_SENSOR_INVERT_DATA (1 << 4)
struct i2c_board_info;
-struct regulator_bulk_data;
-struct soc_camera_subdev_desc {
- /* Per camera SOCAM_SENSOR_* bus flags */
- unsigned long flags;
-
- /* sensor driver private platform data */
- void *drv_priv;
-
- /* Optional regulators that have to be managed on power on/off events */
- struct regulator_bulk_data *regulators;
- int num_regulators;
-
- /* Optional callbacks to power on or off and reset the sensor */
- int (*power)(struct device *, int);
- int (*reset)(struct device *);
-
- /*
- * some platforms may support different data widths than the sensors
- * native ones due to different data line routing. Let the board code
- * overwrite the width flags.
- */
- int (*set_bus_param)(struct soc_camera_subdev_desc *, unsigned long flags);
- unsigned long (*query_bus_param)(struct soc_camera_subdev_desc *);
- void (*free_bus)(struct soc_camera_subdev_desc *);
-};
-
-struct soc_camera_host_desc {
+struct soc_camera_link {
/* Camera bus id, used to match a camera and a bus */
int bus_id;
+ /* Per camera SOCAM_SENSOR_* bus flags */
+ unsigned long flags;
int i2c_adapter_id;
struct i2c_board_info *board_info;
const char *module_name;
-
/*
- * For non-I2C devices platform has to provide methods to add a device
- * to the system and to remove it
+ * For non-I2C devices platform platform has to provide methods to
+ * add a device to the system and to remove
*/
- int (*add_device)(struct soc_camera_device *);
- void (*del_device)(struct soc_camera_device *);
-};
-
-/*
- * This MUST be kept binary-identical to struct soc_camera_link below, until
- * it is completely replaced by this one, after which we can split it into its
- * two components.
- */
-struct soc_camera_desc {
- struct soc_camera_subdev_desc subdev_desc;
- struct soc_camera_host_desc host_desc;
-};
-
-/* Prepare to replace this struct: don't change its layout any more! */
-struct soc_camera_link {
- /*
- * Subdevice part - keep at top and compatible to
- * struct soc_camera_subdev_desc
- */
-
- /* Per camera SOCAM_SENSOR_* bus flags */
- unsigned long flags;
-
- void *priv;
-
- /* Optional regulators that have to be managed on power on/off events */
- struct regulator_bulk_data *regulators;
- int num_regulators;
-
+ int (*add_device)(struct soc_camera_link *, struct device *);
+ void (*del_device)(struct soc_camera_link *);
/* Optional callbacks to power on or off and reset the sensor */
int (*power)(struct device *, int);
int (*reset)(struct device *);
@@ -193,26 +124,14 @@ struct soc_camera_link {
int (*set_bus_param)(struct soc_camera_link *, unsigned long flags);
unsigned long (*query_bus_param)(struct soc_camera_link *);
void (*free_bus)(struct soc_camera_link *);
-
- /*
- * Host part - keep at bottom and compatible to
- * struct soc_camera_host_desc
- */
-
- /* Camera bus id, used to match a camera and a bus */
- int bus_id;
- int i2c_adapter_id;
- struct i2c_board_info *board_info;
- const char *module_name;
-
- /*
- * For non-I2C devices platform has to provide methods to add a device
- * to the system and to remove it
- */
- int (*add_device)(struct soc_camera_device *);
- void (*del_device)(struct soc_camera_device *);
};
+static inline struct soc_camera_device *to_soc_camera_dev(
+ const struct device *dev)
+{
+ return container_of(dev, struct soc_camera_device, dev);
+}
+
static inline struct soc_camera_host *to_soc_camera_host(
const struct device *dev)
{
@@ -221,16 +140,16 @@ static inline struct soc_camera_host *to_soc_camera_host(
return container_of(v4l2_dev, struct soc_camera_host, v4l2_dev);
}
-static inline struct soc_camera_desc *to_soc_camera_desc(
+static inline struct soc_camera_link *to_soc_camera_link(
const struct soc_camera_device *icd)
{
- return icd->sdesc;
+ return icd->dev.platform_data;
}
static inline struct device *to_soc_camera_control(
const struct soc_camera_device *icd)
{
- return icd->control;
+ return dev_get_drvdata(&icd->dev);
}
static inline struct v4l2_subdev *soc_camera_to_subdev(
@@ -243,13 +162,23 @@ static inline struct v4l2_subdev *soc_camera_to_subdev(
int soc_camera_host_register(struct soc_camera_host *ici);
void soc_camera_host_unregister(struct soc_camera_host *ici);
+const struct soc_camera_data_format *soc_camera_format_by_fourcc(
+ struct soc_camera_device *icd, unsigned int fourcc);
const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
struct soc_camera_device *icd, unsigned int fourcc);
+struct soc_camera_data_format {
+ const char *name;
+ unsigned int depth;
+ __u32 fourcc;
+ enum v4l2_colorspace colorspace;
+};
+
/**
* struct soc_camera_format_xlate - match between host and sensor formats
- * @code: code of a sensor provided format
- * @host_fmt: host format after host translation from code
+ * @cam_fmt: sensor format provided by the sensor
+ * @host_fmt: host format after host translation from cam_fmt
+ * @buswidth: bus width for this format
*
* Host and sensor translation structure. Used in table of host and sensor
* formats matchings in soc_camera_device. A host can override the generic list
@@ -257,8 +186,19 @@ const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
* format setup.
*/
struct soc_camera_format_xlate {
- enum v4l2_mbus_pixelcode code;
- const struct soc_mbus_pixelfmt *host_fmt;
+ const struct soc_camera_data_format *cam_fmt;
+ const struct soc_camera_data_format *host_fmt;
+ unsigned char buswidth;
+};
+
+struct soc_camera_ops {
+ int (*suspend)(struct soc_camera_device *, pm_message_t state);
+ int (*resume)(struct soc_camera_device *);
+ unsigned long (*query_bus_param)(struct soc_camera_device *);
+ int (*set_bus_param)(struct soc_camera_device *, unsigned long);
+ int (*enum_input)(struct soc_camera_device *, struct v4l2_input *);
+ const struct v4l2_queryctrl *controls;
+ int num_controls;
};
#define SOCAM_SENSE_PCLK_CHANGED (1 << 0)
@@ -287,20 +227,59 @@ struct soc_camera_sense {
unsigned long pixel_clock;
};
-#define SOCAM_DATAWIDTH(x) BIT((x) - 1)
-#define SOCAM_DATAWIDTH_4 SOCAM_DATAWIDTH(4)
-#define SOCAM_DATAWIDTH_8 SOCAM_DATAWIDTH(8)
-#define SOCAM_DATAWIDTH_9 SOCAM_DATAWIDTH(9)
-#define SOCAM_DATAWIDTH_10 SOCAM_DATAWIDTH(10)
-#define SOCAM_DATAWIDTH_15 SOCAM_DATAWIDTH(15)
-#define SOCAM_DATAWIDTH_16 SOCAM_DATAWIDTH(16)
+static inline struct v4l2_queryctrl const *soc_camera_find_qctrl(
+ struct soc_camera_ops *ops, int id)
+{
+ int i;
+
+ for (i = 0; i < ops->num_controls; i++)
+ if (ops->controls[i].id == id)
+ return &ops->controls[i];
+
+ return NULL;
+}
+
+#define SOCAM_MASTER (1 << 0)
+#define SOCAM_SLAVE (1 << 1)
+#define SOCAM_HSYNC_ACTIVE_HIGH (1 << 2)
+#define SOCAM_HSYNC_ACTIVE_LOW (1 << 3)
+#define SOCAM_VSYNC_ACTIVE_HIGH (1 << 4)
+#define SOCAM_VSYNC_ACTIVE_LOW (1 << 5)
+#define SOCAM_DATAWIDTH_4 (1 << 6)
+#define SOCAM_DATAWIDTH_8 (1 << 7)
+#define SOCAM_DATAWIDTH_9 (1 << 8)
+#define SOCAM_DATAWIDTH_10 (1 << 9)
+#define SOCAM_DATAWIDTH_15 (1 << 10)
+#define SOCAM_DATAWIDTH_16 (1 << 11)
+#define SOCAM_PCLK_SAMPLE_RISING (1 << 12)
+#define SOCAM_PCLK_SAMPLE_FALLING (1 << 13)
+#define SOCAM_DATA_ACTIVE_HIGH (1 << 14)
+#define SOCAM_DATA_ACTIVE_LOW (1 << 15)
#define SOCAM_DATAWIDTH_MASK (SOCAM_DATAWIDTH_4 | SOCAM_DATAWIDTH_8 | \
SOCAM_DATAWIDTH_9 | SOCAM_DATAWIDTH_10 | \
SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_16)
-static inline void soc_camera_limit_side(int *start, int *length,
- unsigned int start_min,
+static inline unsigned long soc_camera_bus_param_compatible(
+ unsigned long camera_flags, unsigned long bus_flags)
+{
+ unsigned long common_flags, hsync, vsync, pclk, data, buswidth, mode;
+
+ common_flags = camera_flags & bus_flags;
+
+ hsync = common_flags & (SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW);
+ vsync = common_flags & (SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW);
+ pclk = common_flags & (SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING);
+ data = common_flags & (SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW);
+ mode = common_flags & (SOCAM_MASTER | SOCAM_SLAVE);
+ buswidth = common_flags & SOCAM_DATAWIDTH_MASK;
+
+ return (!hsync || !vsync || !pclk || !data || !mode || !buswidth) ? 0 :
+ common_flags;
+}
+
+static inline void soc_camera_limit_side(unsigned int *start,
+ unsigned int *length, unsigned int start_min,
unsigned int length_min, unsigned int length_max)
{
if (*length < length_min)
@@ -314,55 +293,7 @@ static inline void soc_camera_limit_side(int *start, int *length,
*start = start_min + length_max - *length;
}
-unsigned long soc_camera_apply_board_flags(struct soc_camera_subdev_desc *ssdd,
- const struct v4l2_mbus_config *cfg);
-
-int soc_camera_power_on(struct device *dev, struct soc_camera_subdev_desc *ssdd);
-int soc_camera_power_off(struct device *dev, struct soc_camera_subdev_desc *ssdd);
-
-static inline int soc_camera_set_power(struct device *dev,
- struct soc_camera_subdev_desc *ssdd, bool on)
-{
- return on ? soc_camera_power_on(dev, ssdd)
- : soc_camera_power_off(dev, ssdd);
-}
-
-/* This is only temporary here - until v4l2-subdev begins to link to video_device */
-#include <linux/i2c.h>
-static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client)
-{
- struct v4l2_subdev *sd = i2c_get_clientdata(client);
- struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd);
- return icd ? icd->vdev : NULL;
-}
-
-static inline struct soc_camera_subdev_desc *soc_camera_i2c_to_desc(const struct i2c_client *client)
-{
- return client->dev.platform_data;
-}
-
-static inline struct v4l2_subdev *soc_camera_vdev_to_subdev(const struct video_device *vdev)
-{
- struct soc_camera_device *icd = dev_get_drvdata(vdev->parent);
- return soc_camera_to_subdev(icd);
-}
-
-static inline struct soc_camera_device *soc_camera_from_vb2q(const struct vb2_queue *vq)
-{
- return container_of(vq, struct soc_camera_device, vb2_vidq);
-}
-
-static inline struct soc_camera_device *soc_camera_from_vbq(const struct videobuf_queue *vq)
-{
- return container_of(vq, struct soc_camera_device, vb_vidq);
-}
-
-static inline u32 soc_camera_grp_id(const struct soc_camera_device *icd)
-{
- return (icd->iface << 8) | (icd->devnum + 1);
-}
-
-void soc_camera_lock(struct vb2_queue *vq);
-void soc_camera_unlock(struct vb2_queue *vq);
+extern unsigned long soc_camera_apply_sensor_flags(struct soc_camera_link *icl,
+ unsigned long flags);
#endif
diff --git a/include/media/soc_camera_platform.h b/include/media/soc_camera_platform.h
index 1e5065da..bb70401b 100644
--- a/include/media/soc_camera_platform.h
+++ b/include/media/soc_camera_platform.h
@@ -13,71 +13,17 @@
#include <linux/videodev2.h>
#include <media/soc_camera.h>
-#include <media/v4l2-mediabus.h>
struct device;
struct soc_camera_platform_info {
const char *format_name;
unsigned long format_depth;
- struct v4l2_mbus_framefmt format;
- unsigned long mbus_param;
- enum v4l2_mbus_type mbus_type;
- struct soc_camera_device *icd;
+ struct v4l2_pix_format format;
+ unsigned long bus_param;
+ struct device *dev;
int (*set_capture)(struct soc_camera_platform_info *info, int enable);
+ struct soc_camera_link link;
};
-static inline void soc_camera_platform_release(struct platform_device **pdev)
-{
- *pdev = NULL;
-}
-
-static inline int soc_camera_platform_add(struct soc_camera_device *icd,
- struct platform_device **pdev,
- struct soc_camera_link *plink,
- void (*release)(struct device *dev),
- int id)
-{
- struct soc_camera_subdev_desc *ssdd =
- (struct soc_camera_subdev_desc *)plink;
- struct soc_camera_platform_info *info = ssdd->drv_priv;
- int ret;
-
- if (&icd->sdesc->subdev_desc != ssdd)
- return -ENODEV;
-
- if (*pdev)
- return -EBUSY;
-
- *pdev = platform_device_alloc("soc_camera_platform", id);
- if (!*pdev)
- return -ENOMEM;
-
- info->icd = icd;
-
- (*pdev)->dev.platform_data = info;
- (*pdev)->dev.release = release;
-
- ret = platform_device_add(*pdev);
- if (ret < 0) {
- platform_device_put(*pdev);
- *pdev = NULL;
- info->icd = NULL;
- }
-
- return ret;
-}
-
-static inline void soc_camera_platform_del(const struct soc_camera_device *icd,
- struct platform_device *pdev,
- const struct soc_camera_link *plink)
-{
- const struct soc_camera_subdev_desc *ssdd =
- (const struct soc_camera_subdev_desc *)plink;
- if (&icd->sdesc->subdev_desc != ssdd || !pdev)
- return;
-
- platform_device_unregister(pdev);
-}
-
#endif /* __SOC_CAMERA_H__ */
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h
index 4ee125ba..bf317f73 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -77,7 +77,8 @@ enum {
V4L2_IDENT_OV2640 = 259,
V4L2_IDENT_OV9740 = 260,
V4L2_IDENT_OV5642 = 261,
-
+ V4L2_IDENT_OV2643 = 262,
+ V4L2_IDENT_OV7690 = 263,
/* module saa7146: reserved range 300-309 */
V4L2_IDENT_SAA7146 = 300,
@@ -307,8 +308,7 @@ enum {
V4L2_IDENT_MT9V022IX7ATC = 45010, /* No way to detect "normal" I77ATx */
V4L2_IDENT_MT9V022IX7ATM = 45015, /* and "lead free" IA7ATx chips */
V4L2_IDENT_MT9T031 = 45020,
- V4L2_IDENT_MT9T111 = 45021,
- V4L2_IDENT_MT9T112 = 45022,
+ V4L2_IDENT_MT9P031 = 45021,
V4L2_IDENT_MT9V111 = 45031,
V4L2_IDENT_MT9V112 = 45032,
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index ec7c9c00..1c25b10d 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -80,15 +80,30 @@
/* ------------------------------------------------------------------------- */
+/* Priority helper functions */
+
+struct v4l2_prio_state {
+ atomic_t prios[4];
+};
+int v4l2_prio_init(struct v4l2_prio_state *global);
+int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
+ enum v4l2_priority new);
+int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local);
+int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local);
+enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global);
+int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local);
+
+/* ------------------------------------------------------------------------- */
+
/* Control helper functions */
int v4l2_ctrl_check(struct v4l2_ext_control *ctrl, struct v4l2_queryctrl *qctrl,
- const char * const *menu_items);
+ const char **menu_items);
const char *v4l2_ctrl_get_name(u32 id);
-const char * const *v4l2_ctrl_get_menu(u32 id);
+const char **v4l2_ctrl_get_menu(u32 id);
int v4l2_ctrl_query_fill(struct v4l2_queryctrl *qctrl, s32 min, s32 max, s32 step, s32 def);
int v4l2_ctrl_query_menu(struct v4l2_querymenu *qmenu,
- struct v4l2_queryctrl *qctrl, const char * const *menu_items);
+ struct v4l2_queryctrl *qctrl, const char **menu_items);
#define V4L2_CTRL_MENU_IDS_END (0xffffffff)
int v4l2_ctrl_query_menu_valid_items(struct v4l2_querymenu *qmenu, const u32 *ids);
@@ -122,18 +137,33 @@ struct v4l2_subdev_ops;
/* Load an i2c module and return an initialized v4l2_subdev struct.
+ Only call request_module if module_name != NULL.
The client_type argument is the name of the chip that's on the adapter. */
-struct v4l2_subdev *v4l2_i2c_new_subdev(struct v4l2_device *v4l2_dev,
- struct i2c_adapter *adapter, const char *client_type,
+struct v4l2_subdev *v4l2_i2c_new_subdev_cfg(struct v4l2_device *v4l2_dev,
+ struct i2c_adapter *adapter,
+ const char *module_name, const char *client_type,
+ int irq, void *platform_data,
u8 addr, const unsigned short *probe_addrs);
+/* Load an i2c module and return an initialized v4l2_subdev struct.
+ Only call request_module if module_name != NULL.
+ The client_type argument is the name of the chip that's on the adapter. */
+static inline struct v4l2_subdev *v4l2_i2c_new_subdev(struct v4l2_device *v4l2_dev,
+ struct i2c_adapter *adapter,
+ const char *module_name, const char *client_type,
+ u8 addr, const unsigned short *probe_addrs)
+{
+ return v4l2_i2c_new_subdev_cfg(v4l2_dev, adapter, module_name,
+ client_type, 0, NULL, addr, probe_addrs);
+}
+
struct i2c_board_info;
struct v4l2_subdev *v4l2_i2c_new_subdev_board(struct v4l2_device *v4l2_dev,
- struct i2c_adapter *adapter, struct i2c_board_info *info,
- const unsigned short *probe_addrs);
+ struct i2c_adapter *adapter, const char *module_name,
+ struct i2c_board_info *info, const unsigned short *probe_addrs);
-/* Initialize a v4l2_subdev with data from an i2c_client struct */
+/* Initialize an v4l2_subdev with data from an i2c_client struct */
void v4l2_i2c_subdev_init(struct v4l2_subdev *sd, struct i2c_client *client,
const struct v4l2_subdev_ops *ops);
/* Return i2c client address of v4l2_subdev. */
@@ -154,25 +184,6 @@ const unsigned short *v4l2_i2c_tuner_addrs(enum v4l2_i2c_tuner_type type);
/* ------------------------------------------------------------------------- */
-/* SPI Helper functions */
-#if defined(CONFIG_SPI)
-
-#include <linux/spi/spi.h>
-
-struct spi_device;
-
-/* Load an spi module and return an initialized v4l2_subdev struct.
- The client_type argument is the name of the chip that's on the adapter. */
-struct v4l2_subdev *v4l2_spi_new_subdev(struct v4l2_device *v4l2_dev,
- struct spi_master *master, struct spi_board_info *info);
-
-/* Initialize a v4l2_subdev with data from an spi_device struct */
-void v4l2_spi_subdev_init(struct v4l2_subdev *sd, struct spi_device *spi,
- const struct v4l2_subdev_ops *ops);
-#endif
-
-/* ------------------------------------------------------------------------- */
-
/* Note: these remaining ioctls/structs should be removed as well, but they are
still used in tuner-simple.c (TUNER_SET_CONFIG), cx18/ivtv (RESET) and
v4l2-int-device.h (v4l2_routing). To remove these ioctls some more cleanup
@@ -201,30 +212,5 @@ void v4l_bound_align_image(unsigned int *w, unsigned int wmin,
unsigned int *h, unsigned int hmin,
unsigned int hmax, unsigned int halign,
unsigned int salign);
-int v4l_fill_dv_preset_info(u32 preset, struct v4l2_dv_enum_preset *info);
-
-struct v4l2_discrete_probe {
- const struct v4l2_frmsize_discrete *sizes;
- int num_sizes;
-};
-
-const struct v4l2_frmsize_discrete *v4l2_find_nearest_format(
- const struct v4l2_discrete_probe *probe,
- s32 width, s32 height);
-
-bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
- const struct v4l2_dv_timings *t2,
- unsigned pclock_delta);
-
-bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
- u32 polarities, struct v4l2_dv_timings *fmt);
-
-bool v4l2_detect_gtf(unsigned frame_height, unsigned hfreq, unsigned vsync,
- u32 polarities, struct v4l2_fract aspect,
- struct v4l2_dv_timings *fmt);
-
-struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait);
-
-void v4l2_get_timestamp(struct timeval *tv);
#endif /* V4L2_COMMON_H_ */
diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h
deleted file mode 100644
index f00d42bc..00000000
--- a/include/media/v4l2-ctrls.h
+++ /dev/null
@@ -1,665 +0,0 @@
-/*
- V4L2 controls support header.
-
- Copyright (C) 2010 Hans Verkuil <hverkuil@xs4all.nl>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef _V4L2_CTRLS_H
-#define _V4L2_CTRLS_H
-
-#include <linux/list.h>
-#include <linux/videodev2.h>
-
-/* forward references */
-struct file;
-struct v4l2_ctrl_handler;
-struct v4l2_ctrl_helper;
-struct v4l2_ctrl;
-struct video_device;
-struct v4l2_subdev;
-struct v4l2_subscribed_event;
-struct v4l2_fh;
-struct poll_table_struct;
-
-/** struct v4l2_ctrl_ops - The control operations that the driver has to provide.
- * @g_volatile_ctrl: Get a new value for this control. Generally only relevant
- * for volatile (and usually read-only) controls such as a control
- * that returns the current signal strength which changes
- * continuously.
- * If not set, then the currently cached value will be returned.
- * @try_ctrl: Test whether the control's value is valid. Only relevant when
- * the usual min/max/step checks are not sufficient.
- * @s_ctrl: Actually set the new control value. s_ctrl is compulsory. The
- * ctrl->handler->lock is held when these ops are called, so no
- * one else can access controls owned by that handler.
- */
-struct v4l2_ctrl_ops {
- int (*g_volatile_ctrl)(struct v4l2_ctrl *ctrl);
- int (*try_ctrl)(struct v4l2_ctrl *ctrl);
- int (*s_ctrl)(struct v4l2_ctrl *ctrl);
-};
-
-typedef void (*v4l2_ctrl_notify_fnc)(struct v4l2_ctrl *ctrl, void *priv);
-
-/** struct v4l2_ctrl - The control structure.
- * @node: The list node.
- * @ev_subs: The list of control event subscriptions.
- * @handler: The handler that owns the control.
- * @cluster: Point to start of cluster array.
- * @ncontrols: Number of controls in cluster array.
- * @done: Internal flag: set for each processed control.
- * @is_new: Set when the user specified a new value for this control. It
- * is also set when called from v4l2_ctrl_handler_setup. Drivers
- * should never set this flag.
- * @is_private: If set, then this control is private to its handler and it
- * will not be added to any other handlers. Drivers can set
- * this flag.
- * @is_auto: If set, then this control selects whether the other cluster
- * members are in 'automatic' mode or 'manual' mode. This is
- * used for autogain/gain type clusters. Drivers should never
- * set this flag directly.
- * @has_volatiles: If set, then one or more members of the cluster are volatile.
- * Drivers should never touch this flag.
- * @call_notify: If set, then call the handler's notify function whenever the
- * control's value changes.
- * @manual_mode_value: If the is_auto flag is set, then this is the value
- * of the auto control that determines if that control is in
- * manual mode. So if the value of the auto control equals this
- * value, then the whole cluster is in manual mode. Drivers should
- * never set this flag directly.
- * @ops: The control ops.
- * @id: The control ID.
- * @name: The control name.
- * @type: The control type.
- * @minimum: The control's minimum value.
- * @maximum: The control's maximum value.
- * @default_value: The control's default value.
- * @step: The control's step value for non-menu controls.
- * @menu_skip_mask: The control's skip mask for menu controls. This makes it
- * easy to skip menu items that are not valid. If bit X is set,
- * then menu item X is skipped. Of course, this only works for
- * menus with <= 32 menu items. There are no menus that come
- * close to that number, so this is OK. Should we ever need more,
- * then this will have to be extended to a u64 or a bit array.
- * @qmenu: A const char * array for all menu items. Array entries that are
- * empty strings ("") correspond to non-existing menu items (this
- * is in addition to the menu_skip_mask above). The last entry
- * must be NULL.
- * @flags: The control's flags.
- * @cur: The control's current value.
- * @val: The control's new s32 value.
- * @val64: The control's new s64 value.
- * @string: The control's new string value.
- * @priv: The control's private pointer. For use by the driver. It is
- * untouched by the control framework. Note that this pointer is
- * not freed when the control is deleted. Should this be needed
- * then a new internal bitfield can be added to tell the framework
- * to free this pointer.
- */
-struct v4l2_ctrl {
- /* Administrative fields */
- struct list_head node;
- struct list_head ev_subs;
- struct v4l2_ctrl_handler *handler;
- struct v4l2_ctrl **cluster;
- unsigned ncontrols;
- unsigned int done:1;
-
- unsigned int is_new:1;
- unsigned int is_private:1;
- unsigned int is_auto:1;
- unsigned int has_volatiles:1;
- unsigned int call_notify:1;
- unsigned int manual_mode_value:8;
-
- const struct v4l2_ctrl_ops *ops;
- u32 id;
- const char *name;
- enum v4l2_ctrl_type type;
- s32 minimum, maximum, default_value;
- union {
- u32 step;
- u32 menu_skip_mask;
- };
- union {
- const char * const *qmenu;
- const s64 *qmenu_int;
- };
- unsigned long flags;
- union {
- s32 val;
- s64 val64;
- char *string;
- } cur;
- union {
- s32 val;
- s64 val64;
- char *string;
- };
- void *priv;
-};
-
-/** struct v4l2_ctrl_ref - The control reference.
- * @node: List node for the sorted list.
- * @next: Single-link list node for the hash.
- * @ctrl: The actual control information.
- * @helper: Pointer to helper struct. Used internally in prepare_ext_ctrls().
- *
- * Each control handler has a list of these refs. The list_head is used to
- * keep a sorted-by-control-ID list of all controls, while the next pointer
- * is used to link the control in the hash's bucket.
- */
-struct v4l2_ctrl_ref {
- struct list_head node;
- struct v4l2_ctrl_ref *next;
- struct v4l2_ctrl *ctrl;
- struct v4l2_ctrl_helper *helper;
-};
-
-/** struct v4l2_ctrl_handler - The control handler keeps track of all the
- * controls: both the controls owned by the handler and those inherited
- * from other handlers.
- * @_lock: Default for "lock".
- * @lock: Lock to control access to this handler and its controls.
- * May be replaced by the user right after init.
- * @ctrls: The list of controls owned by this handler.
- * @ctrl_refs: The list of control references.
- * @cached: The last found control reference. It is common that the same
- * control is needed multiple times, so this is a simple
- * optimization.
- * @buckets: Buckets for the hashing. Allows for quick control lookup.
- * @notify: A notify callback that is called whenever the control changes value.
- * Note that the handler's lock is held when the notify function
- * is called!
- * @notify_priv: Passed as argument to the v4l2_ctrl notify callback.
- * @nr_of_buckets: Total number of buckets in the array.
- * @error: The error code of the first failed control addition.
- */
-struct v4l2_ctrl_handler {
- struct mutex _lock;
- struct mutex *lock;
- struct list_head ctrls;
- struct list_head ctrl_refs;
- struct v4l2_ctrl_ref *cached;
- struct v4l2_ctrl_ref **buckets;
- v4l2_ctrl_notify_fnc notify;
- void *notify_priv;
- u16 nr_of_buckets;
- int error;
-};
-
-/** struct v4l2_ctrl_config - Control configuration structure.
- * @ops: The control ops.
- * @id: The control ID.
- * @name: The control name.
- * @type: The control type.
- * @min: The control's minimum value.
- * @max: The control's maximum value.
- * @step: The control's step value for non-menu controls.
- * @def: The control's default value.
- * @flags: The control's flags.
- * @menu_skip_mask: The control's skip mask for menu controls. This makes it
- * easy to skip menu items that are not valid. If bit X is set,
- * then menu item X is skipped. Of course, this only works for
- * menus with <= 32 menu items. There are no menus that come
- * close to that number, so this is OK. Should we ever need more,
- * then this will have to be extended to a u64 or a bit array.
- * @qmenu: A const char * array for all menu items. Array entries that are
- * empty strings ("") correspond to non-existing menu items (this
- * is in addition to the menu_skip_mask above). The last entry
- * must be NULL.
- * @is_private: If set, then this control is private to its handler and it
- * will not be added to any other handlers.
- */
-struct v4l2_ctrl_config {
- const struct v4l2_ctrl_ops *ops;
- u32 id;
- const char *name;
- enum v4l2_ctrl_type type;
- s32 min;
- s32 max;
- u32 step;
- s32 def;
- u32 flags;
- u32 menu_skip_mask;
- const char * const *qmenu;
- const s64 *qmenu_int;
- unsigned int is_private:1;
-};
-
-/** v4l2_ctrl_fill() - Fill in the control fields based on the control ID.
- *
- * This works for all standard V4L2 controls.
- * For non-standard controls it will only fill in the given arguments
- * and @name will be NULL.
- *
- * This function will overwrite the contents of @name, @type and @flags.
- * The contents of @min, @max, @step and @def may be modified depending on
- * the type.
- *
- * Do not use in drivers! It is used internally for backwards compatibility
- * control handling only. Once all drivers are converted to use the new
- * control framework this function will no longer be exported.
- */
-void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
- s32 *min, s32 *max, s32 *step, s32 *def, u32 *flags);
-
-
-/** v4l2_ctrl_handler_init() - Initialize the control handler.
- * @hdl: The control handler.
- * @nr_of_controls_hint: A hint of how many controls this handler is
- * expected to refer to. This is the total number, so including
- * any inherited controls. It doesn't have to be precise, but if
- * it is way off, then you either waste memory (too many buckets
- * are allocated) or the control lookup becomes slower (not enough
- * buckets are allocated, so there are more slow list lookups).
- * It will always work, though.
- *
- * Returns an error if the buckets could not be allocated. This error will
- * also be stored in @hdl->error.
- */
-int v4l2_ctrl_handler_init(struct v4l2_ctrl_handler *hdl,
- unsigned nr_of_controls_hint);
-
-/** v4l2_ctrl_handler_free() - Free all controls owned by the handler and free
- * the control list.
- * @hdl: The control handler.
- *
- * Does nothing if @hdl == NULL.
- */
-void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl);
-
-/** v4l2_ctrl_handler_setup() - Call the s_ctrl op for all controls belonging
- * to the handler to initialize the hardware to the current control values.
- * @hdl: The control handler.
- *
- * Button controls will be skipped, as are read-only controls.
- *
- * If @hdl == NULL, then this just returns 0.
- */
-int v4l2_ctrl_handler_setup(struct v4l2_ctrl_handler *hdl);
-
-/** v4l2_ctrl_handler_log_status() - Log all controls owned by the handler.
- * @hdl: The control handler.
- * @prefix: The prefix to use when logging the control values. If the
- * prefix does not end with a space, then ": " will be added
- * after the prefix. If @prefix == NULL, then no prefix will be
- * used.
- *
- * For use with VIDIOC_LOG_STATUS.
- *
- * Does nothing if @hdl == NULL.
- */
-void v4l2_ctrl_handler_log_status(struct v4l2_ctrl_handler *hdl,
- const char *prefix);
-
-/** v4l2_ctrl_new_custom() - Allocate and initialize a new custom V4L2
- * control.
- * @hdl: The control handler.
- * @cfg: The control's configuration data.
- * @priv: The control's driver-specific private data.
- *
- * If the &v4l2_ctrl struct could not be allocated then NULL is returned
- * and @hdl->error is set to the error code (if it wasn't set already).
- */
-struct v4l2_ctrl *v4l2_ctrl_new_custom(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_config *cfg, void *priv);
-
-/** v4l2_ctrl_new_std() - Allocate and initialize a new standard V4L2 non-menu control.
- * @hdl: The control handler.
- * @ops: The control ops.
- * @id: The control ID.
- * @min: The control's minimum value.
- * @max: The control's maximum value.
- * @step: The control's step value
- * @def: The control's default value.
- *
- * If the &v4l2_ctrl struct could not be allocated, or the control
- * ID is not known, then NULL is returned and @hdl->error is set to the
- * appropriate error code (if it wasn't set already).
- *
- * If @id refers to a menu control, then this function will return NULL.
- *
- * Use v4l2_ctrl_new_std_menu() when adding menu controls.
- */
-struct v4l2_ctrl *v4l2_ctrl_new_std(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, s32 min, s32 max, u32 step, s32 def);
-
-/** v4l2_ctrl_new_std_menu() - Allocate and initialize a new standard V4L2 menu control.
- * @hdl: The control handler.
- * @ops: The control ops.
- * @id: The control ID.
- * @max: The control's maximum value.
- * @mask: The control's skip mask for menu controls. This makes it
- * easy to skip menu items that are not valid. If bit X is set,
- * then menu item X is skipped. Of course, this only works for
- * menus with <= 32 menu items. There are no menus that come
- * close to that number, so this is OK. Should we ever need more,
- * then this will have to be extended to a u64 or a bit array.
- * @def: The control's default value.
- *
- * Same as v4l2_ctrl_new_std(), but @min is set to 0 and the @mask value
- * determines which menu items are to be skipped.
- *
- * If @id refers to a non-menu control, then this function will return NULL.
- */
-struct v4l2_ctrl *v4l2_ctrl_new_std_menu(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, s32 max, s32 mask, s32 def);
-
-/** v4l2_ctrl_new_std_menu_items() - Create a new standard V4L2 menu control
- * with driver specific menu.
- * @hdl: The control handler.
- * @ops: The control ops.
- * @id: The control ID.
- * @max: The control's maximum value.
- * @mask: The control's skip mask for menu controls. This makes it
- * easy to skip menu items that are not valid. If bit X is set,
- * then menu item X is skipped. Of course, this only works for
- * menus with <= 32 menu items. There are no menus that come
- * close to that number, so this is OK. Should we ever need more,
- * then this will have to be extended to a u64 or a bit array.
- * @def: The control's default value.
- * @qmenu: The new menu.
- *
- * Same as v4l2_ctrl_new_std_menu(), but @qmenu will be the driver specific
- * menu of this control.
- *
- */
-struct v4l2_ctrl *v4l2_ctrl_new_std_menu_items(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops, u32 id, s32 max,
- s32 mask, s32 def, const char * const *qmenu);
-
-/** v4l2_ctrl_new_int_menu() - Create a new standard V4L2 integer menu control.
- * @hdl: The control handler.
- * @ops: The control ops.
- * @id: The control ID.
- * @max: The control's maximum value.
- * @def: The control's default value.
- * @qmenu_int: The control's menu entries.
- *
- * Same as v4l2_ctrl_new_std_menu(), but @mask is set to 0 and it additionaly
- * takes as an argument an array of integers determining the menu items.
- *
- * If @id refers to a non-integer-menu control, then this function will return NULL.
- */
-struct v4l2_ctrl *v4l2_ctrl_new_int_menu(struct v4l2_ctrl_handler *hdl,
- const struct v4l2_ctrl_ops *ops,
- u32 id, s32 max, s32 def, const s64 *qmenu_int);
-
-/** v4l2_ctrl_add_ctrl() - Add a control from another handler to this handler.
- * @hdl: The control handler.
- * @ctrl: The control to add.
- *
- * It will return NULL if it was unable to add the control reference.
- * If the control already belonged to the handler, then it will do
- * nothing and just return @ctrl.
- */
-struct v4l2_ctrl *v4l2_ctrl_add_ctrl(struct v4l2_ctrl_handler *hdl,
- struct v4l2_ctrl *ctrl);
-
-/** v4l2_ctrl_add_handler() - Add all controls from handler @add to
- * handler @hdl.
- * @hdl: The control handler.
- * @add: The control handler whose controls you want to add to
- * the @hdl control handler.
- * @filter: This function will filter which controls should be added.
- *
- * Does nothing if either of the two handlers is a NULL pointer.
- * If @filter is NULL, then all controls are added. Otherwise only those
- * controls for which @filter returns true will be added.
- * In case of an error @hdl->error will be set to the error code (if it
- * wasn't set already).
- */
-int v4l2_ctrl_add_handler(struct v4l2_ctrl_handler *hdl,
- struct v4l2_ctrl_handler *add,
- bool (*filter)(const struct v4l2_ctrl *ctrl));
-
-/** v4l2_ctrl_radio_filter() - Standard filter for radio controls.
- * @ctrl: The control that is filtered.
- *
- * This will return true for any controls that are valid for radio device
- * nodes. Those are all of the V4L2_CID_AUDIO_* user controls and all FM
- * transmitter class controls.
- *
- * This function is to be used with v4l2_ctrl_add_handler().
- */
-bool v4l2_ctrl_radio_filter(const struct v4l2_ctrl *ctrl);
-
-/** v4l2_ctrl_cluster() - Mark all controls in the cluster as belonging to that cluster.
- * @ncontrols: The number of controls in this cluster.
- * @controls: The cluster control array of size @ncontrols.
- */
-void v4l2_ctrl_cluster(unsigned ncontrols, struct v4l2_ctrl **controls);
-
-
-/** v4l2_ctrl_auto_cluster() - Mark all controls in the cluster as belonging to
- * that cluster and set it up for autofoo/foo-type handling.
- * @ncontrols: The number of controls in this cluster.
- * @controls: The cluster control array of size @ncontrols. The first control
- * must be the 'auto' control (e.g. autogain, autoexposure, etc.)
- * @manual_val: The value for the first control in the cluster that equals the
- * manual setting.
- * @set_volatile: If true, then all controls except the first auto control will
- * be volatile.
- *
- * Use for control groups where one control selects some automatic feature and
- * the other controls are only active whenever the automatic feature is turned
- * off (manual mode). Typical examples: autogain vs gain, auto-whitebalance vs
- * red and blue balance, etc.
- *
- * The behavior of such controls is as follows:
- *
- * When the autofoo control is set to automatic, then any manual controls
- * are set to inactive and any reads will call g_volatile_ctrl (if the control
- * was marked volatile).
- *
- * When the autofoo control is set to manual, then any manual controls will
- * be marked active, and any reads will just return the current value without
- * going through g_volatile_ctrl.
- *
- * In addition, this function will set the V4L2_CTRL_FLAG_UPDATE flag
- * on the autofoo control and V4L2_CTRL_FLAG_INACTIVE on the foo control(s)
- * if autofoo is in auto mode.
- */
-void v4l2_ctrl_auto_cluster(unsigned ncontrols, struct v4l2_ctrl **controls,
- u8 manual_val, bool set_volatile);
-
-
-/** v4l2_ctrl_find() - Find a control with the given ID.
- * @hdl: The control handler.
- * @id: The control ID to find.
- *
- * If @hdl == NULL this will return NULL as well. Will lock the handler so
- * do not use from inside &v4l2_ctrl_ops.
- */
-struct v4l2_ctrl *v4l2_ctrl_find(struct v4l2_ctrl_handler *hdl, u32 id);
-
-/** v4l2_ctrl_activate() - Make the control active or inactive.
- * @ctrl: The control to (de)activate.
- * @active: True if the control should become active.
- *
- * This sets or clears the V4L2_CTRL_FLAG_INACTIVE flag atomically.
- * Does nothing if @ctrl == NULL.
- * This will usually be called from within the s_ctrl op.
- * The V4L2_EVENT_CTRL event will be generated afterwards.
- *
- * This function assumes that the control handler is locked.
- */
-void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active);
-
-/** v4l2_ctrl_grab() - Mark the control as grabbed or not grabbed.
- * @ctrl: The control to (de)activate.
- * @grabbed: True if the control should become grabbed.
- *
- * This sets or clears the V4L2_CTRL_FLAG_GRABBED flag atomically.
- * Does nothing if @ctrl == NULL.
- * The V4L2_EVENT_CTRL event will be generated afterwards.
- * This will usually be called when starting or stopping streaming in the
- * driver.
- *
- * This function assumes that the control handler is not locked and will
- * take the lock itself.
- */
-void v4l2_ctrl_grab(struct v4l2_ctrl *ctrl, bool grabbed);
-
-/** v4l2_ctrl_modify_range() - Update the range of a control.
- * @ctrl: The control to update.
- * @min: The control's minimum value.
- * @max: The control's maximum value.
- * @step: The control's step value
- * @def: The control's default value.
- *
- * Update the range of a control on the fly. This works for control types
- * INTEGER, BOOLEAN, MENU, INTEGER MENU and BITMASK. For menu controls the
- * @step value is interpreted as a menu_skip_mask.
- *
- * An error is returned if one of the range arguments is invalid for this
- * control type.
- *
- * This function assumes that the control handler is not locked and will
- * take the lock itself.
- */
-int v4l2_ctrl_modify_range(struct v4l2_ctrl *ctrl,
- s32 min, s32 max, u32 step, s32 def);
-
-/** v4l2_ctrl_lock() - Helper function to lock the handler
- * associated with the control.
- * @ctrl: The control to lock.
- */
-static inline void v4l2_ctrl_lock(struct v4l2_ctrl *ctrl)
-{
- mutex_lock(ctrl->handler->lock);
-}
-
-/** v4l2_ctrl_lock() - Helper function to unlock the handler
- * associated with the control.
- * @ctrl: The control to unlock.
- */
-static inline void v4l2_ctrl_unlock(struct v4l2_ctrl *ctrl)
-{
- mutex_unlock(ctrl->handler->lock);
-}
-
-/** v4l2_ctrl_notify() - Function to set a notify callback for a control.
- * @ctrl: The control.
- * @notify: The callback function.
- * @priv: The callback private handle, passed as argument to the callback.
- *
- * This function sets a callback function for the control. If @ctrl is NULL,
- * then it will do nothing. If @notify is NULL, then the notify callback will
- * be removed.
- *
- * There can be only one notify. If another already exists, then a WARN_ON
- * will be issued and the function will do nothing.
- */
-void v4l2_ctrl_notify(struct v4l2_ctrl *ctrl, v4l2_ctrl_notify_fnc notify, void *priv);
-
-/** v4l2_ctrl_g_ctrl() - Helper function to get the control's value from within a driver.
- * @ctrl: The control.
- *
- * This returns the control's value safely by going through the control
- * framework. This function will lock the control's handler, so it cannot be
- * used from within the &v4l2_ctrl_ops functions.
- *
- * This function is for integer type controls only.
- */
-s32 v4l2_ctrl_g_ctrl(struct v4l2_ctrl *ctrl);
-
-/** v4l2_ctrl_s_ctrl() - Helper function to set the control's value from within a driver.
- * @ctrl: The control.
- * @val: The new value.
- *
- * This set the control's new value safely by going through the control
- * framework. This function will lock the control's handler, so it cannot be
- * used from within the &v4l2_ctrl_ops functions.
- *
- * This function is for integer type controls only.
- */
-int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val);
-
-/** v4l2_ctrl_g_ctrl_int64() - Helper function to get a 64-bit control's value from within a driver.
- * @ctrl: The control.
- *
- * This returns the control's value safely by going through the control
- * framework. This function will lock the control's handler, so it cannot be
- * used from within the &v4l2_ctrl_ops functions.
- *
- * This function is for 64-bit integer type controls only.
- */
-s64 v4l2_ctrl_g_ctrl_int64(struct v4l2_ctrl *ctrl);
-
-/** v4l2_ctrl_s_ctrl_int64() - Helper function to set a 64-bit control's value from within a driver.
- * @ctrl: The control.
- * @val: The new value.
- *
- * This set the control's new value safely by going through the control
- * framework. This function will lock the control's handler, so it cannot be
- * used from within the &v4l2_ctrl_ops functions.
- *
- * This function is for 64-bit integer type controls only.
- */
-int v4l2_ctrl_s_ctrl_int64(struct v4l2_ctrl *ctrl, s64 val);
-
-/* Internal helper functions that deal with control events. */
-extern const struct v4l2_subscribed_event_ops v4l2_ctrl_sub_ev_ops;
-void v4l2_ctrl_replace(struct v4l2_event *old, const struct v4l2_event *new);
-void v4l2_ctrl_merge(const struct v4l2_event *old, struct v4l2_event *new);
-
-/* Can be used as a vidioc_log_status function that just dumps all controls
- associated with the filehandle. */
-int v4l2_ctrl_log_status(struct file *file, void *fh);
-
-/* Can be used as a vidioc_subscribe_event function that just subscribes
- control events. */
-int v4l2_ctrl_subscribe_event(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub);
-
-/* Can be used as a poll function that just polls for control events. */
-unsigned int v4l2_ctrl_poll(struct file *file, struct poll_table_struct *wait);
-
-/* Helpers for ioctl_ops. If hdl == NULL then they will all return -EINVAL. */
-int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc);
-int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm);
-int v4l2_g_ctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_control *ctrl);
-int v4l2_s_ctrl(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl,
- struct v4l2_control *ctrl);
-int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c);
-int v4l2_try_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c);
-int v4l2_s_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl,
- struct v4l2_ext_controls *c);
-
-/* Helpers for subdevices. If the associated ctrl_handler == NULL then they
- will all return -EINVAL. */
-int v4l2_subdev_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc);
-int v4l2_subdev_querymenu(struct v4l2_subdev *sd, struct v4l2_querymenu *qm);
-int v4l2_subdev_g_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs);
-int v4l2_subdev_try_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs);
-int v4l2_subdev_s_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs);
-int v4l2_subdev_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl);
-int v4l2_subdev_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl);
-
-/* Can be used as a subscribe_event function that just subscribes control
- events. */
-int v4l2_ctrl_subdev_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
- struct v4l2_event_subscription *sub);
-
-/* Log all controls owned by subdev's control handler. */
-int v4l2_ctrl_subdev_log_status(struct v4l2_subdev *sd);
-
-#endif
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index 95d1c917..73c9867d 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -16,50 +16,22 @@
#include <linux/mutex.h>
#include <linux/videodev2.h>
-#include <media/media-entity.h>
-
#define VIDEO_MAJOR 81
#define VFL_TYPE_GRABBER 0
#define VFL_TYPE_VBI 1
#define VFL_TYPE_RADIO 2
-#define VFL_TYPE_SUBDEV 3
+#define VFL_TYPE_VTX 3
#define VFL_TYPE_MAX 4
-/* Is this a receiver, transmitter or mem-to-mem? */
-/* Ignored for VFL_TYPE_SUBDEV. */
-#define VFL_DIR_RX 0
-#define VFL_DIR_TX 1
-#define VFL_DIR_M2M 2
-
struct v4l2_ioctl_callbacks;
struct video_device;
struct v4l2_device;
-struct v4l2_ctrl_handler;
-
-/* Flag to mark the video_device struct as registered.
- Drivers can clear this flag if they want to block all future
- device access. It is cleared by video_unregister_device. */
-#define V4L2_FL_REGISTERED (0)
-/* file->private_data points to struct v4l2_fh */
-#define V4L2_FL_USES_V4L2_FH (1)
-/* Use the prio field of v4l2_fh for core priority checking */
-#define V4L2_FL_USE_FH_PRIO (2)
-
-/* Priority helper functions */
-
-struct v4l2_prio_state {
- atomic_t prios[4];
-};
-
-void v4l2_prio_init(struct v4l2_prio_state *global);
-int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
- enum v4l2_priority new);
-void v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local);
-void v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority local);
-enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global);
-int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority local);
+/* Flag to mark the video_device struct as unregistered.
+ Drivers can set this flag if they want to block all future
+ device access. It is set by video_unregister_device. */
+#define V4L2_FL_UNREGISTERED (0)
struct v4l2_file_operations {
struct module *owner;
@@ -68,9 +40,6 @@ struct v4l2_file_operations {
unsigned int (*poll) (struct file *, struct poll_table_struct *);
long (*ioctl) (struct file *, unsigned int, unsigned long);
long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
-#ifdef CONFIG_COMPAT
- long (*compat_ioctl32) (struct file *, unsigned int, unsigned long);
-#endif
unsigned long (*get_unmapped_area) (struct file *, unsigned long,
unsigned long, unsigned long, unsigned long);
int (*mmap) (struct file *, struct vm_area_struct *);
@@ -86,9 +55,6 @@ struct v4l2_file_operations {
struct video_device
{
-#if defined(CONFIG_MEDIA_CONTROLLER)
- struct media_entity entity;
-#endif
/* device ops */
const struct v4l2_file_operations *fops;
@@ -100,19 +66,9 @@ struct video_device
struct device *parent; /* device parent */
struct v4l2_device *v4l2_dev; /* v4l2_device parent */
- /* Control handler associated with this device node. May be NULL. */
- struct v4l2_ctrl_handler *ctrl_handler;
-
- /* vb2_queue associated with this device node. May be NULL. */
- struct vb2_queue *queue;
-
- /* Priority state. If NULL, then v4l2_dev->prio will be used. */
- struct v4l2_prio_state *prio;
-
/* device info */
char name[32];
- int vfl_type; /* device type */
- int vfl_dir; /* receiver, transmitter or m2m */
+ int vfl_type;
/* 'minor' is set to -1 if the registration failed */
int minor;
u16 num;
@@ -121,10 +77,6 @@ struct video_device
/* attribute to differentiate multiple indices on one physical device */
int index;
- /* V4L2 file handles */
- spinlock_t fh_lock; /* Lock for all v4l2_fhs */
- struct list_head fh_list; /* List of struct v4l2_fh */
-
int debug; /* Activates debug level*/
/* Video standard vars */
@@ -136,41 +88,25 @@ struct video_device
/* ioctl callbacks */
const struct v4l2_ioctl_ops *ioctl_ops;
- DECLARE_BITMAP(valid_ioctls, BASE_VIDIOC_PRIVATE);
-
- /* serialization lock */
- DECLARE_BITMAP(disable_locking, BASE_VIDIOC_PRIVATE);
- struct mutex *lock;
};
-#define media_entity_to_video_device(__e) \
- container_of(__e, struct video_device, entity)
/* dev to video-device */
#define to_video_device(cd) container_of(cd, struct video_device, dev)
-int __must_check __video_register_device(struct video_device *vdev, int type,
- int nr, int warn_if_nr_in_use, struct module *owner);
-
/* Register video devices. Note that if video_register_device fails,
the release() callback of the video_device structure is *not* called, so
the caller is responsible for freeing any data. Usually that means that
- you call video_device_release() on failure. */
-static inline int __must_check video_register_device(struct video_device *vdev,
- int type, int nr)
-{
- return __video_register_device(vdev, type, nr, 1, vdev->fops->owner);
-}
+ you call video_device_release() on failure.
+
+ Also note that vdev->minor is set to -1 if the registration failed. */
+int __must_check video_register_device(struct video_device *vdev, int type, int nr);
/* Same as video_register_device, but no warning is issued if the desired
device node number was already in use. */
-static inline int __must_check video_register_device_no_warn(
- struct video_device *vdev, int type, int nr)
-{
- return __video_register_device(vdev, type, nr, 0, vdev->fops->owner);
-}
+int __must_check video_register_device_no_warn(struct video_device *vdev, int type, int nr);
/* Unregister video devices. Will do nothing if vdev == NULL or
- video_is_registered() returns false. */
+ vdev->minor < 0. */
void video_unregister_device(struct video_device *vdev);
/* helper functions to alloc/release struct video_device, the
@@ -185,26 +121,6 @@ void video_device_release(struct video_device *vdev);
a dubious construction at best. */
void video_device_release_empty(struct video_device *vdev);
-/* returns true if cmd is a known V4L2 ioctl */
-bool v4l2_is_known_ioctl(unsigned int cmd);
-
-/* mark that this command shouldn't use core locking */
-static inline void v4l2_disable_ioctl_locking(struct video_device *vdev, unsigned int cmd)
-{
- if (_IOC_NR(cmd) < BASE_VIDIOC_PRIVATE)
- set_bit(_IOC_NR(cmd), vdev->disable_locking);
-}
-
-/* Mark that this command isn't implemented. This must be called before
- video_device_register. See also the comments in determine_valid_ioctls().
- This function allows drivers to provide just one v4l2_ioctl_ops struct, but
- disable ioctls based on the specific card that is actually found. */
-static inline void v4l2_disable_ioctl(struct video_device *vdev, unsigned int cmd)
-{
- if (_IOC_NR(cmd) < BASE_VIDIOC_PRIVATE)
- set_bit(_IOC_NR(cmd), vdev->valid_ioctls);
-}
-
/* helper functions to access driver private data. */
static inline void *video_get_drvdata(struct video_device *vdev)
{
@@ -225,14 +141,9 @@ static inline void *video_drvdata(struct file *file)
return video_get_drvdata(video_devdata(file));
}
-static inline const char *video_device_node_name(struct video_device *vdev)
-{
- return dev_name(&vdev->dev);
-}
-
-static inline int video_is_registered(struct video_device *vdev)
+static inline int video_is_unregistered(struct video_device *vdev)
{
- return test_bit(V4L2_FL_REGISTERED, &vdev->flags);
+ return test_bit(V4L2_FL_UNREGISTERED, &vdev->flags);
}
#endif /* _V4L2_DEV_H */
diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h
index d61febfb..5d5d550e 100644
--- a/include/media/v4l2-device.h
+++ b/include/media/v4l2-device.h
@@ -21,9 +21,7 @@
#ifndef _V4L2_DEVICE_H
#define _V4L2_DEVICE_H
-#include <media/media-device.h>
#include <media/v4l2-subdev.h>
-#include <media/v4l2-dev.h>
/* Each instance of a V4L2 device should create the v4l2_device struct,
either stand-alone or embedded in a larger struct.
@@ -34,16 +32,11 @@
#define V4L2_DEVICE_NAME_SIZE (20 + 16)
-struct v4l2_ctrl_handler;
-
struct v4l2_device {
/* dev->driver_data points to this struct.
Note: dev might be NULL if there is no parent device
as is the case with e.g. ISA devices. */
struct device *dev;
-#if defined(CONFIG_MEDIA_CONTROLLER)
- struct media_device *mdev;
-#endif
/* used to keep track of the registered subdevs */
struct list_head subdevs;
/* lock this struct; can be used by the driver as well if this
@@ -54,25 +47,8 @@ struct v4l2_device {
/* notify callback called by some sub-devices. */
void (*notify)(struct v4l2_subdev *sd,
unsigned int notification, void *arg);
- /* The control handler. May be NULL. */
- struct v4l2_ctrl_handler *ctrl_handler;
- /* Device's priority state */
- struct v4l2_prio_state prio;
- /* BKL replacement mutex. Temporary solution only. */
- struct mutex ioctl_lock;
- /* Keep track of the references to this struct. */
- struct kref ref;
- /* Release function that is called when the ref count goes to 0. */
- void (*release)(struct v4l2_device *v4l2_dev);
};
-static inline void v4l2_device_get(struct v4l2_device *v4l2_dev)
-{
- kref_get(&v4l2_dev->ref);
-}
-
-int v4l2_device_put(struct v4l2_device *v4l2_dev);
-
/* Initialize v4l2_dev and make dev->driver_data point to v4l2_dev.
dev may be NULL in rare cases (ISA devices). In that case you
must fill in the v4l2_dev->name field before calling this function. */
@@ -114,12 +90,6 @@ int __must_check v4l2_device_register_subdev(struct v4l2_device *v4l2_dev,
wasn't registered. In that case it will do nothing. */
void v4l2_device_unregister_subdev(struct v4l2_subdev *sd);
-/* Register device nodes for all subdev of the v4l2 device that are marked with
- * the V4L2_SUBDEV_FL_HAS_DEVNODE flag.
- */
-int __must_check
-v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev);
-
/* Iterate over all subdevs. */
#define v4l2_device_for_each_subdev(sd, v4l2_dev) \
list_for_each_entry(sd, &(v4l2_dev)->subdevs, list)
@@ -127,67 +97,46 @@ v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev);
/* Call the specified callback for all subdevs matching the condition.
Ignore any errors. Note that you cannot add or delete a subdev
while walking the subdevs list. */
-#define __v4l2_device_call_subdevs_p(v4l2_dev, sd, cond, o, f, args...) \
+#define __v4l2_device_call_subdevs(v4l2_dev, cond, o, f, args...) \
do { \
- list_for_each_entry((sd), &(v4l2_dev)->subdevs, list) \
- if ((cond) && (sd)->ops->o && (sd)->ops->o->f) \
- (sd)->ops->o->f((sd) , ##args); \
- } while (0)
-
-#define __v4l2_device_call_subdevs(v4l2_dev, cond, o, f, args...) \
- do { \
- struct v4l2_subdev *__sd; \
+ struct v4l2_subdev *sd; \
\
- __v4l2_device_call_subdevs_p(v4l2_dev, __sd, cond, o, \
- f , ##args); \
+ list_for_each_entry(sd, &(v4l2_dev)->subdevs, list) \
+ if ((cond) && sd->ops->o && sd->ops->o->f) \
+ sd->ops->o->f(sd , ##args); \
} while (0)
/* Call the specified callback for all subdevs matching the condition.
If the callback returns an error other than 0 or -ENOIOCTLCMD, then
return with that error code. Note that you cannot add or delete a
subdev while walking the subdevs list. */
-#define __v4l2_device_call_subdevs_until_err_p(v4l2_dev, sd, cond, o, f, args...) \
+#define __v4l2_device_call_subdevs_until_err(v4l2_dev, cond, o, f, args...) \
({ \
- long __err = 0; \
+ struct v4l2_subdev *sd; \
+ long err = 0; \
\
- list_for_each_entry((sd), &(v4l2_dev)->subdevs, list) { \
- if ((cond) && (sd)->ops->o && (sd)->ops->o->f) \
- __err = (sd)->ops->o->f((sd) , ##args); \
- if (__err && __err != -ENOIOCTLCMD) \
+ list_for_each_entry(sd, &(v4l2_dev)->subdevs, list) { \
+ if ((cond) && sd->ops->o && sd->ops->o->f) \
+ err = sd->ops->o->f(sd , ##args); \
+ if (err && err != -ENOIOCTLCMD) \
break; \
} \
- (__err == -ENOIOCTLCMD) ? 0 : __err; \
-})
-
-#define __v4l2_device_call_subdevs_until_err(v4l2_dev, cond, o, f, args...) \
-({ \
- struct v4l2_subdev *__sd; \
- __v4l2_device_call_subdevs_until_err_p(v4l2_dev, __sd, cond, o, \
- f , ##args); \
+ (err == -ENOIOCTLCMD) ? 0 : err; \
})
/* Call the specified callback for all subdevs matching grp_id (if 0, then
match them all). Ignore any errors. Note that you cannot add or delete
a subdev while walking the subdevs list. */
-#define v4l2_device_call_all(v4l2_dev, grpid, o, f, args...) \
- do { \
- struct v4l2_subdev *__sd; \
- \
- __v4l2_device_call_subdevs_p(v4l2_dev, __sd, \
- !(grpid) || __sd->grp_id == (grpid), o, f , \
- ##args); \
- } while (0)
+#define v4l2_device_call_all(v4l2_dev, grpid, o, f, args...) \
+ __v4l2_device_call_subdevs(v4l2_dev, \
+ !(grpid) || sd->grp_id == (grpid), o, f , ##args)
/* Call the specified callback for all subdevs matching grp_id (if 0, then
match them all). If the callback returns an error other than 0 or
-ENOIOCTLCMD, then return with that error code. Note that you cannot
add or delete a subdev while walking the subdevs list. */
#define v4l2_device_call_until_err(v4l2_dev, grpid, o, f, args...) \
-({ \
- struct v4l2_subdev *__sd; \
- __v4l2_device_call_subdevs_until_err_p(v4l2_dev, __sd, \
- !(grpid) || __sd->grp_id == (grpid), o, f , \
- ##args); \
-})
+ __v4l2_device_call_subdevs_until_err(v4l2_dev, \
+ !(grpid) || sd->grp_id == (grpid), o, f , ##args)
#endif
diff --git a/include/media/v4l2-event.h b/include/media/v4l2-event.h
deleted file mode 100644
index be05d019..00000000
--- a/include/media/v4l2-event.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * v4l2-event.h
- *
- * V4L2 events.
- *
- * Copyright (C) 2009--2010 Nokia Corporation.
- *
- * Contact: Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- */
-
-#ifndef V4L2_EVENT_H
-#define V4L2_EVENT_H
-
-#include <linux/types.h>
-#include <linux/videodev2.h>
-#include <linux/wait.h>
-
-/*
- * Overview:
- *
- * Events are subscribed per-filehandle. An event specification consists of a
- * type and is optionally associated with an object identified through the
- * 'id' field. So an event is uniquely identified by the (type, id) tuple.
- *
- * The v4l2-fh struct has a list of subscribed events. The v4l2_subscribed_event
- * struct is added to that list, one for every subscribed event.
- *
- * Each v4l2_subscribed_event struct ends with an array of v4l2_kevent structs.
- * This array (ringbuffer, really) is used to store any events raised by the
- * driver. The v4l2_kevent struct links into the 'available' list of the
- * v4l2_fh struct so VIDIOC_DQEVENT will know which event to dequeue first.
- *
- * Finally, if the event subscription is associated with a particular object
- * such as a V4L2 control, then that object needs to know about that as well
- * so that an event can be raised by that object. So the 'node' field can
- * be used to link the v4l2_subscribed_event struct into a list of that
- * object.
- *
- * So to summarize:
- *
- * struct v4l2_fh has two lists: one of the subscribed events, and one of the
- * pending events.
- *
- * struct v4l2_subscribed_event has a ringbuffer of raised (pending) events of
- * that particular type.
- *
- * If struct v4l2_subscribed_event is associated with a specific object, then
- * that object will have an internal list of struct v4l2_subscribed_event so
- * it knows who subscribed an event to that object.
- */
-
-struct v4l2_fh;
-struct v4l2_subdev;
-struct v4l2_subscribed_event;
-struct video_device;
-
-/** struct v4l2_kevent - Internal kernel event struct.
- * @list: List node for the v4l2_fh->available list.
- * @sev: Pointer to parent v4l2_subscribed_event.
- * @event: The event itself.
- */
-struct v4l2_kevent {
- struct list_head list;
- struct v4l2_subscribed_event *sev;
- struct v4l2_event event;
-};
-
-/** struct v4l2_subscribed_event_ops - Subscribed event operations.
- * @add: Optional callback, called when a new listener is added
- * @del: Optional callback, called when a listener stops listening
- * @replace: Optional callback that can replace event 'old' with event 'new'.
- * @merge: Optional callback that can merge event 'old' into event 'new'.
- */
-struct v4l2_subscribed_event_ops {
- int (*add)(struct v4l2_subscribed_event *sev, unsigned elems);
- void (*del)(struct v4l2_subscribed_event *sev);
- void (*replace)(struct v4l2_event *old, const struct v4l2_event *new);
- void (*merge)(const struct v4l2_event *old, struct v4l2_event *new);
-};
-
-/** struct v4l2_subscribed_event - Internal struct representing a subscribed event.
- * @list: List node for the v4l2_fh->subscribed list.
- * @type: Event type.
- * @id: Associated object ID (e.g. control ID). 0 if there isn't any.
- * @flags: Copy of v4l2_event_subscription->flags.
- * @fh: Filehandle that subscribed to this event.
- * @node: List node that hooks into the object's event list (if there is one).
- * @ops: v4l2_subscribed_event_ops
- * @elems: The number of elements in the events array.
- * @first: The index of the events containing the oldest available event.
- * @in_use: The number of queued events.
- * @events: An array of @elems events.
- */
-struct v4l2_subscribed_event {
- struct list_head list;
- u32 type;
- u32 id;
- u32 flags;
- struct v4l2_fh *fh;
- struct list_head node;
- const struct v4l2_subscribed_event_ops *ops;
- unsigned elems;
- unsigned first;
- unsigned in_use;
- struct v4l2_kevent events[];
-};
-
-int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event,
- int nonblocking);
-void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev);
-void v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev);
-int v4l2_event_pending(struct v4l2_fh *fh);
-int v4l2_event_subscribe(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub, unsigned elems,
- const struct v4l2_subscribed_event_ops *ops);
-int v4l2_event_unsubscribe(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub);
-void v4l2_event_unsubscribe_all(struct v4l2_fh *fh);
-int v4l2_event_subdev_unsubscribe(struct v4l2_subdev *sd, struct v4l2_fh *fh,
- struct v4l2_event_subscription *sub);
-#endif /* V4L2_EVENT_H */
diff --git a/include/media/v4l2-fh.h b/include/media/v4l2-fh.h
deleted file mode 100644
index a62ee18c..00000000
--- a/include/media/v4l2-fh.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * v4l2-fh.h
- *
- * V4L2 file handle. Store per file handle data for the V4L2
- * framework. Using file handles is optional for the drivers.
- *
- * Copyright (C) 2009--2010 Nokia Corporation.
- *
- * Contact: Sakari Ailus <sakari.ailus@iki.fi>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- */
-
-#ifndef V4L2_FH_H
-#define V4L2_FH_H
-
-#include <linux/list.h>
-
-struct video_device;
-struct v4l2_ctrl_handler;
-
-struct v4l2_fh {
- struct list_head list;
- struct video_device *vdev;
- struct v4l2_ctrl_handler *ctrl_handler;
- enum v4l2_priority prio;
-
- /* Events */
- wait_queue_head_t wait;
- struct list_head subscribed; /* Subscribed events */
- struct list_head available; /* Dequeueable event */
- unsigned int navailable;
- u32 sequence;
-};
-
-/*
- * Initialise the file handle. Parts of the V4L2 framework using the
- * file handles should be initialised in this function. Must be called
- * from driver's v4l2_file_operations->open() handler if the driver
- * uses v4l2_fh.
- */
-void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev);
-/*
- * Add the fh to the list of file handles on a video_device. The file
- * handle must be initialised first.
- */
-void v4l2_fh_add(struct v4l2_fh *fh);
-/*
- * Can be used as the open() op of v4l2_file_operations.
- * It allocates a v4l2_fh and inits and adds it to the video_device associated
- * with the file pointer.
- */
-int v4l2_fh_open(struct file *filp);
-/*
- * Remove file handle from the list of file handles. Must be called in
- * v4l2_file_operations->release() handler if the driver uses v4l2_fh.
- * On error filp->private_data will be NULL, otherwise it will point to
- * the v4l2_fh struct.
- */
-void v4l2_fh_del(struct v4l2_fh *fh);
-/*
- * Release resources related to a file handle. Parts of the V4L2
- * framework using the v4l2_fh must release their resources here, too.
- * Must be called in v4l2_file_operations->release() handler if the
- * driver uses v4l2_fh.
- */
-void v4l2_fh_exit(struct v4l2_fh *fh);
-/*
- * Can be used as the release() op of v4l2_file_operations.
- * It deletes and exits the v4l2_fh associated with the file pointer and
- * frees it. It will do nothing if filp->private_data (the pointer to the
- * v4l2_fh struct) is NULL. This function always returns 0.
- */
-int v4l2_fh_release(struct file *filp);
-/*
- * Returns 1 if this filehandle is the only filehandle opened for the
- * associated video_device. If fh is NULL, then it returns 0.
- */
-int v4l2_fh_is_singular(struct v4l2_fh *fh);
-/*
- * Helper function with struct file as argument. If filp->private_data is
- * NULL, then it will return 0.
- */
-static inline int v4l2_fh_is_singular_file(struct file *filp)
-{
- return v4l2_fh_is_singular(filp->private_data);
-}
-
-#endif /* V4L2_EVENT_H */
diff --git a/include/media/v4l2-i2c-drv.h b/include/media/v4l2-i2c-drv.h
new file mode 100644
index 00000000..74bf741d
--- /dev/null
+++ b/include/media/v4l2-i2c-drv.h
@@ -0,0 +1,80 @@
+/*
+ * v4l2-i2c-drv.h - contains I2C handling code that's identical for
+ * all V4L2 I2C drivers. Use this header if the
+ * I2C driver is only used by drivers converted
+ * to the bus-based I2C API.
+ *
+ * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* NOTE: the full version of this header is in the v4l-dvb repository
+ * and allows v4l i2c drivers to be compiled on pre-2.6.26 kernels.
+ * The version of this header as it appears in the kernel is a stripped
+ * version (without all the backwards compatibility stuff) and so it
+ * looks a bit odd.
+ *
+ * If you look at the full version then you will understand the reason
+ * for introducing this header since you really don't want to have all
+ * the tricky backwards compatibility code in each and every i2c driver.
+ *
+ * If the i2c driver will never be compiled for pre-2.6.26 kernels, then
+ * DO NOT USE this header! Just write it as a regular i2c driver.
+ */
+
+#ifndef __V4L2_I2C_DRV_H__
+#define __V4L2_I2C_DRV_H__
+
+#include <media/v4l2-common.h>
+
+struct v4l2_i2c_driver_data {
+ const char * const name;
+ int (*command)(struct i2c_client *client, unsigned int cmd, void *arg);
+ int (*probe)(struct i2c_client *client, const struct i2c_device_id *id);
+ int (*remove)(struct i2c_client *client);
+ int (*suspend)(struct i2c_client *client, pm_message_t state);
+ int (*resume)(struct i2c_client *client);
+ const struct i2c_device_id *id_table;
+};
+
+static struct v4l2_i2c_driver_data v4l2_i2c_data;
+static struct i2c_driver v4l2_i2c_driver;
+
+
+/* Bus-based I2C implementation for kernels >= 2.6.26 */
+
+static int __init v4l2_i2c_drv_init(void)
+{
+ v4l2_i2c_driver.driver.name = v4l2_i2c_data.name;
+ v4l2_i2c_driver.command = v4l2_i2c_data.command;
+ v4l2_i2c_driver.probe = v4l2_i2c_data.probe;
+ v4l2_i2c_driver.remove = v4l2_i2c_data.remove;
+ v4l2_i2c_driver.suspend = v4l2_i2c_data.suspend;
+ v4l2_i2c_driver.resume = v4l2_i2c_data.resume;
+ v4l2_i2c_driver.id_table = v4l2_i2c_data.id_table;
+ return i2c_add_driver(&v4l2_i2c_driver);
+}
+
+
+static void __exit v4l2_i2c_drv_cleanup(void)
+{
+ i2c_del_driver(&v4l2_i2c_driver);
+}
+
+module_init(v4l2_i2c_drv_init);
+module_exit(v4l2_i2c_drv_cleanup);
+
+#endif /* __V4L2_I2C_DRV_H__ */
diff --git a/include/media/v4l2-image-sizes.h b/include/media/v4l2-image-sizes.h
deleted file mode 100644
index 10daf92f..00000000
--- a/include/media/v4l2-image-sizes.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Standard image size definitions
- *
- * Copyright (C) 2013, Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef _IMAGE_SIZES_H
-#define _IMAGE_SIZES_H
-
-#define CIF_WIDTH 352
-#define CIF_HEIGHT 288
-
-#define QCIF_WIDTH 176
-#define QCIF_HEIGHT 144
-
-#define QQCIF_WIDTH 88
-#define QQCIF_HEIGHT 72
-
-#define QQVGA_WIDTH 160
-#define QQVGA_HEIGHT 120
-
-#define QVGA_WIDTH 320
-#define QVGA_HEIGHT 240
-
-#define SXGA_WIDTH 1280
-#define SXGA_HEIGHT 1024
-
-#define VGA_WIDTH 640
-#define VGA_HEIGHT 480
-
-#endif /* _IMAGE_SIZES_H */
diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h
index e6aa2318..fbf58556 100644
--- a/include/media/v4l2-int-device.h
+++ b/include/media/v4l2-int-device.h
@@ -25,6 +25,7 @@
#ifndef V4L2_INT_DEVICE_H
#define V4L2_INT_DEVICE_H
+#include <linux/module.h>
#include <media/v4l2-common.h>
#define V4L2NAMESIZE 32
@@ -40,8 +41,6 @@ enum v4l2_int_type {
v4l2_int_type_slave
};
-struct module;
-
struct v4l2_int_device;
struct v4l2_int_master {
diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h
index 4118ad13..7a4529de 100644
--- a/include/media/v4l2-ioctl.h
+++ b/include/media/v4l2-ioctl.h
@@ -11,11 +11,15 @@
#include <linux/poll.h>
#include <linux/fs.h>
+#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/compiler.h> /* need __user */
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+#define __MIN_V4L1
+#include <linux/videodev.h>
+#else
#include <linux/videodev2.h>
-
-struct v4l2_fh;
+#endif
struct v4l2_ioctl_ops {
/* ioctl callbacks */
@@ -36,10 +40,8 @@ struct v4l2_ioctl_ops {
struct v4l2_fmtdesc *f);
int (*vidioc_enum_fmt_vid_out) (struct file *file, void *fh,
struct v4l2_fmtdesc *f);
- int (*vidioc_enum_fmt_vid_cap_mplane)(struct file *file, void *fh,
- struct v4l2_fmtdesc *f);
- int (*vidioc_enum_fmt_vid_out_mplane)(struct file *file, void *fh,
- struct v4l2_fmtdesc *f);
+ int (*vidioc_enum_fmt_type_private)(struct file *file, void *fh,
+ struct v4l2_fmtdesc *f);
/* VIDIOC_G_FMT handlers */
int (*vidioc_g_fmt_vid_cap) (struct file *file, void *fh,
@@ -58,10 +60,8 @@ struct v4l2_ioctl_ops {
struct v4l2_format *f);
int (*vidioc_g_fmt_sliced_vbi_out)(struct file *file, void *fh,
struct v4l2_format *f);
- int (*vidioc_g_fmt_vid_cap_mplane)(struct file *file, void *fh,
- struct v4l2_format *f);
- int (*vidioc_g_fmt_vid_out_mplane)(struct file *file, void *fh,
- struct v4l2_format *f);
+ int (*vidioc_g_fmt_type_private)(struct file *file, void *fh,
+ struct v4l2_format *f);
/* VIDIOC_S_FMT handlers */
int (*vidioc_s_fmt_vid_cap) (struct file *file, void *fh,
@@ -80,10 +80,8 @@ struct v4l2_ioctl_ops {
struct v4l2_format *f);
int (*vidioc_s_fmt_sliced_vbi_out)(struct file *file, void *fh,
struct v4l2_format *f);
- int (*vidioc_s_fmt_vid_cap_mplane)(struct file *file, void *fh,
- struct v4l2_format *f);
- int (*vidioc_s_fmt_vid_out_mplane)(struct file *file, void *fh,
- struct v4l2_format *f);
+ int (*vidioc_s_fmt_type_private)(struct file *file, void *fh,
+ struct v4l2_format *f);
/* VIDIOC_TRY_FMT handlers */
int (*vidioc_try_fmt_vid_cap) (struct file *file, void *fh,
@@ -102,27 +100,25 @@ struct v4l2_ioctl_ops {
struct v4l2_format *f);
int (*vidioc_try_fmt_sliced_vbi_out)(struct file *file, void *fh,
struct v4l2_format *f);
- int (*vidioc_try_fmt_vid_cap_mplane)(struct file *file, void *fh,
- struct v4l2_format *f);
- int (*vidioc_try_fmt_vid_out_mplane)(struct file *file, void *fh,
- struct v4l2_format *f);
+ int (*vidioc_try_fmt_type_private)(struct file *file, void *fh,
+ struct v4l2_format *f);
/* Buffer handlers */
int (*vidioc_reqbufs) (struct file *file, void *fh, struct v4l2_requestbuffers *b);
int (*vidioc_querybuf)(struct file *file, void *fh, struct v4l2_buffer *b);
int (*vidioc_qbuf) (struct file *file, void *fh, struct v4l2_buffer *b);
- int (*vidioc_expbuf) (struct file *file, void *fh,
- struct v4l2_exportbuffer *e);
int (*vidioc_dqbuf) (struct file *file, void *fh, struct v4l2_buffer *b);
- int (*vidioc_create_bufs)(struct file *file, void *fh, struct v4l2_create_buffers *b);
- int (*vidioc_prepare_buf)(struct file *file, void *fh, struct v4l2_buffer *b);
int (*vidioc_overlay) (struct file *file, void *fh, unsigned int i);
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+ /* buffer type is struct vidio_mbuf * */
+ int (*vidiocgmbuf) (struct file *file, void *fh, struct video_mbuf *p);
+#endif
int (*vidioc_g_fbuf) (struct file *file, void *fh,
struct v4l2_framebuffer *a);
int (*vidioc_s_fbuf) (struct file *file, void *fh,
- const struct v4l2_framebuffer *a);
+ struct v4l2_framebuffer *a);
/* Stream on/off */
int (*vidioc_streamon) (struct file *file, void *fh, enum v4l2_buf_type i);
@@ -169,7 +165,7 @@ struct v4l2_ioctl_ops {
int (*vidioc_g_audio) (struct file *file, void *fh,
struct v4l2_audio *a);
int (*vidioc_s_audio) (struct file *file, void *fh,
- const struct v4l2_audio *a);
+ struct v4l2_audio *a);
/* Audio out ioctls */
int (*vidioc_enumaudout) (struct file *file, void *fh,
@@ -177,37 +173,29 @@ struct v4l2_ioctl_ops {
int (*vidioc_g_audout) (struct file *file, void *fh,
struct v4l2_audioout *a);
int (*vidioc_s_audout) (struct file *file, void *fh,
- const struct v4l2_audioout *a);
+ struct v4l2_audioout *a);
int (*vidioc_g_modulator) (struct file *file, void *fh,
struct v4l2_modulator *a);
int (*vidioc_s_modulator) (struct file *file, void *fh,
- const struct v4l2_modulator *a);
+ struct v4l2_modulator *a);
/* Crop ioctls */
int (*vidioc_cropcap) (struct file *file, void *fh,
struct v4l2_cropcap *a);
int (*vidioc_g_crop) (struct file *file, void *fh,
struct v4l2_crop *a);
int (*vidioc_s_crop) (struct file *file, void *fh,
- const struct v4l2_crop *a);
- int (*vidioc_g_selection) (struct file *file, void *fh,
- struct v4l2_selection *s);
- int (*vidioc_s_selection) (struct file *file, void *fh,
- struct v4l2_selection *s);
+ struct v4l2_crop *a);
/* Compression ioctls */
int (*vidioc_g_jpegcomp) (struct file *file, void *fh,
struct v4l2_jpegcompression *a);
int (*vidioc_s_jpegcomp) (struct file *file, void *fh,
- const struct v4l2_jpegcompression *a);
+ struct v4l2_jpegcompression *a);
int (*vidioc_g_enc_index) (struct file *file, void *fh,
struct v4l2_enc_idx *a);
int (*vidioc_encoder_cmd) (struct file *file, void *fh,
struct v4l2_encoder_cmd *a);
int (*vidioc_try_encoder_cmd) (struct file *file, void *fh,
struct v4l2_encoder_cmd *a);
- int (*vidioc_decoder_cmd) (struct file *file, void *fh,
- struct v4l2_decoder_cmd *a);
- int (*vidioc_try_decoder_cmd) (struct file *file, void *fh,
- struct v4l2_decoder_cmd *a);
/* Stream type-dependent parameter ioctls */
int (*vidioc_g_parm) (struct file *file, void *fh,
@@ -224,8 +212,6 @@ struct v4l2_ioctl_ops {
struct v4l2_frequency *a);
int (*vidioc_s_frequency) (struct file *file, void *fh,
struct v4l2_frequency *a);
- int (*vidioc_enum_freq_bands) (struct file *file, void *fh,
- struct v4l2_frequency_band *band);
/* Sliced VBI cap */
int (*vidioc_g_sliced_vbi_cap) (struct file *file, void *fh,
@@ -235,7 +221,7 @@ struct v4l2_ioctl_ops {
int (*vidioc_log_status) (struct file *file, void *fh);
int (*vidioc_s_hw_freq_seek) (struct file *file, void *fh,
- const struct v4l2_hw_freq_seek *a);
+ struct v4l2_hw_freq_seek *a);
/* Debugging ioctls */
#ifdef CONFIG_VIDEO_ADV_DEBUG
@@ -253,35 +239,9 @@ struct v4l2_ioctl_ops {
int (*vidioc_enum_frameintervals) (struct file *file, void *fh,
struct v4l2_frmivalenum *fival);
- /* DV Timings IOCTLs */
- int (*vidioc_enum_dv_presets) (struct file *file, void *fh,
- struct v4l2_dv_enum_preset *preset);
-
- int (*vidioc_s_dv_preset) (struct file *file, void *fh,
- struct v4l2_dv_preset *preset);
- int (*vidioc_g_dv_preset) (struct file *file, void *fh,
- struct v4l2_dv_preset *preset);
- int (*vidioc_query_dv_preset) (struct file *file, void *fh,
- struct v4l2_dv_preset *qpreset);
- int (*vidioc_s_dv_timings) (struct file *file, void *fh,
- struct v4l2_dv_timings *timings);
- int (*vidioc_g_dv_timings) (struct file *file, void *fh,
- struct v4l2_dv_timings *timings);
- int (*vidioc_query_dv_timings) (struct file *file, void *fh,
- struct v4l2_dv_timings *timings);
- int (*vidioc_enum_dv_timings) (struct file *file, void *fh,
- struct v4l2_enum_dv_timings *timings);
- int (*vidioc_dv_timings_cap) (struct file *file, void *fh,
- struct v4l2_dv_timings_cap *cap);
-
- int (*vidioc_subscribe_event) (struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub);
- int (*vidioc_unsubscribe_event)(struct v4l2_fh *fh,
- const struct v4l2_event_subscription *sub);
-
/* For other private ioctls */
long (*vidioc_default) (struct file *file, void *fh,
- bool valid_prio, int cmd, void *arg);
+ int cmd, void *arg);
};
@@ -291,33 +251,49 @@ struct v4l2_ioctl_ops {
#define V4L2_DEBUG_IOCTL 0x01
#define V4L2_DEBUG_IOCTL_ARG 0x02
+/* Use this macro for non-I2C drivers. Pass the driver name as the first arg. */
+#define v4l_print_ioctl(name, cmd) \
+ do { \
+ printk(KERN_DEBUG "%s: ", name); \
+ v4l_printk_ioctl(cmd); \
+ } while (0)
+
+/* Use this macro in I2C drivers where 'client' is the struct i2c_client
+ pointer */
+#define v4l_i2c_print_ioctl(client, cmd) \
+ do { \
+ v4l_client_printk(KERN_DEBUG, client, ""); \
+ v4l_printk_ioctl(cmd); \
+ } while (0)
+
/* Video standard functions */
extern const char *v4l2_norm_to_name(v4l2_std_id id);
extern void v4l2_video_std_frame_period(int id, struct v4l2_fract *frameperiod);
extern int v4l2_video_std_construct(struct v4l2_standard *vs,
int id, const char *name);
-/* Prints the ioctl in a human-readable format. If prefix != NULL,
- then do printk(KERN_DEBUG "%s: ", prefix) first. */
-extern void v4l_printk_ioctl(const char *prefix, unsigned int cmd);
-
-/* Internal use only: get the mutex (if any) that we need to lock for the
- given command. */
-struct video_device;
-extern struct mutex *v4l2_ioctl_get_lock(struct video_device *vdev, unsigned cmd);
+/* Prints the ioctl in a human-readable format */
+extern void v4l_printk_ioctl(unsigned int cmd);
/* names for fancy debug output */
extern const char *v4l2_field_names[];
extern const char *v4l2_type_names[];
+/* Compatibility layer interface -- v4l1-compat module */
+typedef long (*v4l2_kioctl)(struct file *file,
+ unsigned int cmd, void *arg);
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+long v4l_compat_translate_ioctl(struct file *file,
+ int cmd, void *arg, v4l2_kioctl driver_ioctl);
+#else
+#define v4l_compat_translate_ioctl(file, cmd, arg, ioctl) (-EINVAL)
+#endif
+
#ifdef CONFIG_COMPAT
/* 32 Bits compatibility layer for 64 bits processors */
extern long v4l2_compat_ioctl32(struct file *file, unsigned int cmd,
unsigned long arg);
#endif
-typedef long (*v4l2_kioctl)(struct file *file,
- unsigned int cmd, void *arg);
-
/* Include support for obsoleted stuff */
extern long video_usercopy(struct file *file, unsigned int cmd,
unsigned long arg, v4l2_kioctl func);
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h
deleted file mode 100644
index 83ae07e5..00000000
--- a/include/media/v4l2-mediabus.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Media Bus API header
- *
- * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef V4L2_MEDIABUS_H
-#define V4L2_MEDIABUS_H
-
-#include <linux/v4l2-mediabus.h>
-
-/* Parallel flags */
-/*
- * Can the client run in master or in slave mode. By "Master mode" an operation
- * mode is meant, when the client (e.g., a camera sensor) is producing
- * horizontal and vertical synchronisation. In "Slave mode" the host is
- * providing these signals to the slave.
- */
-#define V4L2_MBUS_MASTER (1 << 0)
-#define V4L2_MBUS_SLAVE (1 << 1)
-/*
- * Signal polarity flags
- * Note: in BT.656 mode HSYNC, FIELD, and VSYNC are unused
- * V4L2_MBUS_[HV]SYNC* flags should be also used for specifying
- * configuration of hardware that uses [HV]REF signals
- */
-#define V4L2_MBUS_HSYNC_ACTIVE_HIGH (1 << 2)
-#define V4L2_MBUS_HSYNC_ACTIVE_LOW (1 << 3)
-#define V4L2_MBUS_VSYNC_ACTIVE_HIGH (1 << 4)
-#define V4L2_MBUS_VSYNC_ACTIVE_LOW (1 << 5)
-#define V4L2_MBUS_PCLK_SAMPLE_RISING (1 << 6)
-#define V4L2_MBUS_PCLK_SAMPLE_FALLING (1 << 7)
-#define V4L2_MBUS_DATA_ACTIVE_HIGH (1 << 8)
-#define V4L2_MBUS_DATA_ACTIVE_LOW (1 << 9)
-/* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
-#define V4L2_MBUS_FIELD_EVEN_HIGH (1 << 10)
-/* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
-#define V4L2_MBUS_FIELD_EVEN_LOW (1 << 11)
-
-/* Serial flags */
-/* How many lanes the client can use */
-#define V4L2_MBUS_CSI2_1_LANE (1 << 0)
-#define V4L2_MBUS_CSI2_2_LANE (1 << 1)
-#define V4L2_MBUS_CSI2_3_LANE (1 << 2)
-#define V4L2_MBUS_CSI2_4_LANE (1 << 3)
-/* On which channels it can send video data */
-#define V4L2_MBUS_CSI2_CHANNEL_0 (1 << 4)
-#define V4L2_MBUS_CSI2_CHANNEL_1 (1 << 5)
-#define V4L2_MBUS_CSI2_CHANNEL_2 (1 << 6)
-#define V4L2_MBUS_CSI2_CHANNEL_3 (1 << 7)
-/* Does it support only continuous or also non-continuous clock mode */
-#define V4L2_MBUS_CSI2_CONTINUOUS_CLOCK (1 << 8)
-#define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK (1 << 9)
-
-#define V4L2_MBUS_CSI2_LANES (V4L2_MBUS_CSI2_1_LANE | V4L2_MBUS_CSI2_2_LANE | \
- V4L2_MBUS_CSI2_3_LANE | V4L2_MBUS_CSI2_4_LANE)
-#define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | V4L2_MBUS_CSI2_CHANNEL_1 | \
- V4L2_MBUS_CSI2_CHANNEL_2 | V4L2_MBUS_CSI2_CHANNEL_3)
-
-/**
- * v4l2_mbus_type - media bus type
- * @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync
- * @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can
- * also be used for BT.1120
- * @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface
- */
-enum v4l2_mbus_type {
- V4L2_MBUS_PARALLEL,
- V4L2_MBUS_BT656,
- V4L2_MBUS_CSI2,
-};
-
-/**
- * v4l2_mbus_config - media bus configuration
- * @type: in: interface type
- * @flags: in / out: configuration flags, depending on @type
- */
-struct v4l2_mbus_config {
- enum v4l2_mbus_type type;
- unsigned int flags;
-};
-
-static inline void v4l2_fill_pix_format(struct v4l2_pix_format *pix_fmt,
- const struct v4l2_mbus_framefmt *mbus_fmt)
-{
- pix_fmt->width = mbus_fmt->width;
- pix_fmt->height = mbus_fmt->height;
- pix_fmt->field = mbus_fmt->field;
- pix_fmt->colorspace = mbus_fmt->colorspace;
-}
-
-static inline void v4l2_fill_mbus_format(struct v4l2_mbus_framefmt *mbus_fmt,
- const struct v4l2_pix_format *pix_fmt,
- enum v4l2_mbus_pixelcode code)
-{
- mbus_fmt->width = pix_fmt->width;
- mbus_fmt->height = pix_fmt->height;
- mbus_fmt->field = pix_fmt->field;
- mbus_fmt->colorspace = pix_fmt->colorspace;
- mbus_fmt->code = code;
-}
-
-#endif
diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h
deleted file mode 100644
index d3eef01d..00000000
--- a/include/media/v4l2-mem2mem.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * Memory-to-memory device framework for Video for Linux 2.
- *
- * Helper functions for devices that use memory buffers for both source
- * and destination.
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * Pawel Osciak, <pawel@osciak.com>
- * Marek Szyprowski, <m.szyprowski@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version
- */
-
-#ifndef _MEDIA_V4L2_MEM2MEM_H
-#define _MEDIA_V4L2_MEM2MEM_H
-
-#include <media/videobuf2-core.h>
-
-/**
- * struct v4l2_m2m_ops - mem-to-mem device driver callbacks
- * @device_run: required. Begin the actual job (transaction) inside this
- * callback.
- * The job does NOT have to end before this callback returns
- * (and it will be the usual case). When the job finishes,
- * v4l2_m2m_job_finish() has to be called.
- * @job_ready: optional. Should return 0 if the driver does not have a job
- * fully prepared to run yet (i.e. it will not be able to finish a
- * transaction without sleeping). If not provided, it will be
- * assumed that one source and one destination buffer are all
- * that is required for the driver to perform one full transaction.
- * This method may not sleep.
- * @job_abort: required. Informs the driver that it has to abort the currently
- * running transaction as soon as possible (i.e. as soon as it can
- * stop the device safely; e.g. in the next interrupt handler),
- * even if the transaction would not have been finished by then.
- * After the driver performs the necessary steps, it has to call
- * v4l2_m2m_job_finish() (as if the transaction ended normally).
- * This function does not have to (and will usually not) wait
- * until the device enters a state when it can be stopped.
- */
-struct v4l2_m2m_ops {
- void (*device_run)(void *priv);
- int (*job_ready)(void *priv);
- void (*job_abort)(void *priv);
- void (*lock)(void *priv);
- void (*unlock)(void *priv);
-};
-
-struct v4l2_m2m_dev;
-
-struct v4l2_m2m_queue_ctx {
-/* private: internal use only */
- struct vb2_queue q;
-
- /* Queue for buffers ready to be processed as soon as this
- * instance receives access to the device */
- struct list_head rdy_queue;
- spinlock_t rdy_spinlock;
- u8 num_rdy;
-};
-
-struct v4l2_m2m_ctx {
-/* private: internal use only */
- struct v4l2_m2m_dev *m2m_dev;
-
- /* Capture (output to memory) queue context */
- struct v4l2_m2m_queue_ctx cap_q_ctx;
-
- /* Output (input from memory) queue context */
- struct v4l2_m2m_queue_ctx out_q_ctx;
-
- /* For device job queue */
- struct list_head queue;
- unsigned long job_flags;
- wait_queue_head_t finished;
-
- /* Instance private data */
- void *priv;
-};
-
-struct v4l2_m2m_buffer {
- struct vb2_buffer vb;
- struct list_head list;
-};
-
-void *v4l2_m2m_get_curr_priv(struct v4l2_m2m_dev *m2m_dev);
-
-struct vb2_queue *v4l2_m2m_get_vq(struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type);
-
-void v4l2_m2m_job_finish(struct v4l2_m2m_dev *m2m_dev,
- struct v4l2_m2m_ctx *m2m_ctx);
-
-static inline void
-v4l2_m2m_buf_done(struct vb2_buffer *buf, enum vb2_buffer_state state)
-{
- vb2_buffer_done(buf, state);
-}
-
-int v4l2_m2m_reqbufs(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_requestbuffers *reqbufs);
-
-int v4l2_m2m_querybuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_buffer *buf);
-
-int v4l2_m2m_qbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_buffer *buf);
-int v4l2_m2m_dqbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_buffer *buf);
-
-int v4l2_m2m_expbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct v4l2_exportbuffer *eb);
-
-int v4l2_m2m_streamon(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type);
-int v4l2_m2m_streamoff(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- enum v4l2_buf_type type);
-
-unsigned int v4l2_m2m_poll(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct poll_table_struct *wait);
-
-int v4l2_m2m_mmap(struct file *file, struct v4l2_m2m_ctx *m2m_ctx,
- struct vm_area_struct *vma);
-
-struct v4l2_m2m_dev *v4l2_m2m_init(const struct v4l2_m2m_ops *m2m_ops);
-void v4l2_m2m_release(struct v4l2_m2m_dev *m2m_dev);
-
-struct v4l2_m2m_ctx *v4l2_m2m_ctx_init(struct v4l2_m2m_dev *m2m_dev,
- void *drv_priv,
- int (*queue_init)(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq));
-
-void v4l2_m2m_ctx_release(struct v4l2_m2m_ctx *m2m_ctx);
-
-void v4l2_m2m_buf_queue(struct v4l2_m2m_ctx *m2m_ctx, struct vb2_buffer *vb);
-
-/**
- * v4l2_m2m_num_src_bufs_ready() - return the number of source buffers ready for
- * use
- */
-static inline
-unsigned int v4l2_m2m_num_src_bufs_ready(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return m2m_ctx->out_q_ctx.num_rdy;
-}
-
-/**
- * v4l2_m2m_num_src_bufs_ready() - return the number of destination buffers
- * ready for use
- */
-static inline
-unsigned int v4l2_m2m_num_dst_bufs_ready(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return m2m_ctx->cap_q_ctx.num_rdy;
-}
-
-void *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx);
-
-/**
- * v4l2_m2m_next_src_buf() - return next source buffer from the list of ready
- * buffers
- */
-static inline void *v4l2_m2m_next_src_buf(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return v4l2_m2m_next_buf(&m2m_ctx->out_q_ctx);
-}
-
-/**
- * v4l2_m2m_next_dst_buf() - return next destination buffer from the list of
- * ready buffers
- */
-static inline void *v4l2_m2m_next_dst_buf(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return v4l2_m2m_next_buf(&m2m_ctx->cap_q_ctx);
-}
-
-/**
- * v4l2_m2m_get_src_vq() - return vb2_queue for source buffers
- */
-static inline
-struct vb2_queue *v4l2_m2m_get_src_vq(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return &m2m_ctx->out_q_ctx.q;
-}
-
-/**
- * v4l2_m2m_get_dst_vq() - return vb2_queue for destination buffers
- */
-static inline
-struct vb2_queue *v4l2_m2m_get_dst_vq(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return &m2m_ctx->cap_q_ctx.q;
-}
-
-void *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx);
-
-/**
- * v4l2_m2m_src_buf_remove() - take off a source buffer from the list of ready
- * buffers and return it
- */
-static inline void *v4l2_m2m_src_buf_remove(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return v4l2_m2m_buf_remove(&m2m_ctx->out_q_ctx);
-}
-
-/**
- * v4l2_m2m_dst_buf_remove() - take off a destination buffer from the list of
- * ready buffers and return it
- */
-static inline void *v4l2_m2m_dst_buf_remove(struct v4l2_m2m_ctx *m2m_ctx)
-{
- return v4l2_m2m_buf_remove(&m2m_ctx->cap_q_ctx);
-}
-
-#endif /* _MEDIA_V4L2_MEM2MEM_H */
-
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h
index b137a5e1..d411345f 100644
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -21,32 +21,11 @@
#ifndef _V4L2_SUBDEV_H
#define _V4L2_SUBDEV_H
-#include <linux/types.h>
-#include <linux/v4l2-subdev.h>
-#include <media/media-entity.h>
#include <media/v4l2-common.h>
-#include <media/v4l2-dev.h>
-#include <media/v4l2-fh.h>
-#include <media/v4l2-mediabus.h>
-
-/* generic v4l2_device notify callback notification values */
-#define V4L2_SUBDEV_IR_RX_NOTIFY _IOW('v', 0, u32)
-#define V4L2_SUBDEV_IR_RX_FIFO_SERVICE_REQ 0x00000001
-#define V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED 0x00000002
-#define V4L2_SUBDEV_IR_RX_HW_FIFO_OVERRUN 0x00000004
-#define V4L2_SUBDEV_IR_RX_SW_FIFO_OVERRUN 0x00000008
-
-#define V4L2_SUBDEV_IR_TX_NOTIFY _IOW('v', 1, u32)
-#define V4L2_SUBDEV_IR_TX_FIFO_SERVICE_REQ 0x00000001
struct v4l2_device;
-struct v4l2_ctrl_handler;
-struct v4l2_event_subscription;
-struct v4l2_fh;
struct v4l2_subdev;
-struct v4l2_subdev_fh;
struct tuner_setup;
-struct v4l2_mbus_frame_desc;
/* decode_vbi_line */
struct v4l2_decode_vbi_line {
@@ -100,29 +79,11 @@ struct v4l2_decode_vbi_line {
not yet implemented) since ops provide proper type-checking.
*/
-/* Subdevice external IO pin configuration */
-#define V4L2_SUBDEV_IO_PIN_DISABLE (1 << 0) /* ENABLE assumed */
-#define V4L2_SUBDEV_IO_PIN_OUTPUT (1 << 1)
-#define V4L2_SUBDEV_IO_PIN_INPUT (1 << 2)
-#define V4L2_SUBDEV_IO_PIN_SET_VALUE (1 << 3) /* Set output value */
-#define V4L2_SUBDEV_IO_PIN_ACTIVE_LOW (1 << 4) /* ACTIVE HIGH assumed */
-
-struct v4l2_subdev_io_pin_config {
- u32 flags; /* V4L2_SUBDEV_IO_PIN_* flags for this pin's config */
- u8 pin; /* Chip external IO pin to configure */
- u8 function; /* Internal signal pad/function to route to IO pin */
- u8 value; /* Initial value for pin - e.g. GPIO output value */
- u8 strength; /* Pin drive strength */
-};
-
-/*
- s_io_pin_config: configure one or more chip I/O pins for chips that
- multiplex different internal signal pads out to IO pins. This function
- takes a pointer to an array of 'n' pin configuration entries, one for
- each pin being configured. This function could be called at times
- other than just subdevice initialization.
+/* s_config: if set, then it is always called by the v4l2_i2c_new_subdev*
+ functions after the v4l2_subdev was registered. It is used to pass
+ platform data to the subdev which can be used during initialization.
- init: initialize the sensor registers to some sort of reasonable default
+ init: initialize the sensor registors to some sort of reasonable default
values. Do not use for new drivers and should be removed in existing
drivers.
@@ -135,20 +96,11 @@ struct v4l2_subdev_io_pin_config {
s_gpio: set GPIO pins. Very simple right now, might need to be extended with
a direction argument if needed.
-
- s_power: puts subdevice in power saving mode (on == 0) or normal operation
- mode (on == 1).
-
- interrupt_service_routine: Called by the bridge chip's interrupt service
- handler, when an interrupt status has be raised due to this subdev,
- so that this subdev can handle the details. It may schedule work to be
- performed later. It must not sleep. *Called from an IRQ context*.
*/
struct v4l2_subdev_core_ops {
int (*g_chip_ident)(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip);
int (*log_status)(struct v4l2_subdev *sd);
- int (*s_io_pin_config)(struct v4l2_subdev *sd, size_t n,
- struct v4l2_subdev_io_pin_config *pincfg);
+ int (*s_config)(struct v4l2_subdev *sd, int irq, void *platform_data);
int (*init)(struct v4l2_subdev *sd, u32 val);
int (*load_fw)(struct v4l2_subdev *sd);
int (*reset)(struct v4l2_subdev *sd, u32 val);
@@ -160,45 +112,36 @@ struct v4l2_subdev_core_ops {
int (*s_ext_ctrls)(struct v4l2_subdev *sd, struct v4l2_ext_controls *ctrls);
int (*try_ext_ctrls)(struct v4l2_subdev *sd, struct v4l2_ext_controls *ctrls);
int (*querymenu)(struct v4l2_subdev *sd, struct v4l2_querymenu *qm);
- int (*g_std)(struct v4l2_subdev *sd, v4l2_std_id *norm);
int (*s_std)(struct v4l2_subdev *sd, v4l2_std_id norm);
long (*ioctl)(struct v4l2_subdev *sd, unsigned int cmd, void *arg);
#ifdef CONFIG_VIDEO_ADV_DEBUG
int (*g_register)(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg);
int (*s_register)(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg);
#endif
- int (*s_power)(struct v4l2_subdev *sd, int on);
- int (*interrupt_service_routine)(struct v4l2_subdev *sd,
- u32 status, bool *handled);
- int (*subscribe_event)(struct v4l2_subdev *sd, struct v4l2_fh *fh,
- struct v4l2_event_subscription *sub);
- int (*unsubscribe_event)(struct v4l2_subdev *sd, struct v4l2_fh *fh,
- struct v4l2_event_subscription *sub);
};
-/* s_radio: v4l device was opened in radio mode.
-
- g_frequency: freq->type must be filled in. Normally done by video_ioctl2
- or the bridge driver.
+/* s_mode: switch the tuner to a specific tuner mode. Replacement of s_radio.
- g_tuner:
- s_tuner: vt->type must be filled in. Normally done by video_ioctl2 or the
- bridge driver.
+ s_radio: v4l device was opened in Radio mode, to be replaced by s_mode.
s_type_addr: sets tuner type and its I2C addr.
s_config: sets tda9887 specific stuff, like port1, port2 and qss
+
+ s_standby: puts tuner on powersaving state, disabling it, except for i2c.
*/
struct v4l2_subdev_tuner_ops {
+ int (*s_mode)(struct v4l2_subdev *sd, enum v4l2_tuner_type);
int (*s_radio)(struct v4l2_subdev *sd);
int (*s_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq);
int (*g_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq);
int (*g_tuner)(struct v4l2_subdev *sd, struct v4l2_tuner *vt);
int (*s_tuner)(struct v4l2_subdev *sd, struct v4l2_tuner *vt);
int (*g_modulator)(struct v4l2_subdev *sd, struct v4l2_modulator *vm);
- int (*s_modulator)(struct v4l2_subdev *sd, const struct v4l2_modulator *vm);
+ int (*s_modulator)(struct v4l2_subdev *sd, struct v4l2_modulator *vm);
int (*s_type_addr)(struct v4l2_subdev *sd, struct tuner_setup *type);
int (*s_config)(struct v4l2_subdev *sd, const struct v4l2_priv_tun_config *config);
+ int (*s_standby)(struct v4l2_subdev *sd);
};
/* s_clock_freq: set the frequency (in Hz) of the audio clock output.
@@ -225,146 +168,6 @@ struct v4l2_subdev_audio_ops {
int (*s_clock_freq)(struct v4l2_subdev *sd, u32 freq);
int (*s_i2s_clock_freq)(struct v4l2_subdev *sd, u32 freq);
int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
- int (*s_stream)(struct v4l2_subdev *sd, int enable);
-};
-
-/* Indicates the @length field specifies maximum data length. */
-#define V4L2_MBUS_FRAME_DESC_FL_LEN_MAX (1U << 0)
-/* Indicates user defined data format, i.e. non standard frame format. */
-#define V4L2_MBUS_FRAME_DESC_FL_BLOB (1U << 1)
-
-/**
- * struct v4l2_mbus_frame_desc_entry - media bus frame description structure
- * @flags: V4L2_MBUS_FRAME_DESC_FL_* flags
- * @pixelcode: media bus pixel code, valid if FRAME_DESC_FL_BLOB is not set
- * @length: number of octets per frame, valid for compressed or unspecified
- * formats
- */
-struct v4l2_mbus_frame_desc_entry {
- u16 flags;
- u32 pixelcode;
- u32 length;
-};
-
-#define V4L2_FRAME_DESC_ENTRY_MAX 4
-
-/**
- * struct v4l2_mbus_frame_desc - media bus data frame description
- * @entry: frame descriptors array
- * @num_entries: number of entries in @entry array
- */
-struct v4l2_mbus_frame_desc {
- struct v4l2_mbus_frame_desc_entry entry[V4L2_FRAME_DESC_ENTRY_MAX];
- unsigned short num_entries;
-};
-
-/*
- s_std_output: set v4l2_std_id for video OUTPUT devices. This is ignored by
- video input devices.
-
- g_std_output: get current standard for video OUTPUT devices. This is ignored
- by video input devices.
-
- g_tvnorms_output: get v4l2_std_id with all standards supported by video
- OUTPUT device. This is ignored by video input devices.
-
- s_crystal_freq: sets the frequency of the crystal used to generate the
- clocks in Hz. An extra flags field allows device specific configuration
- regarding clock frequency dividers, etc. If not used, then set flags
- to 0. If the frequency is not supported, then -EINVAL is returned.
-
- g_input_status: get input status. Same as the status field in the v4l2_input
- struct.
-
- s_routing: see s_routing in audio_ops, except this version is for video
- devices.
-
- s_dv_preset: set dv (Digital Video) preset in the sub device. Similar to
- s_std()
-
- g_dv_preset: get current dv (Digital Video) preset in the sub device.
-
- query_dv_preset: query dv preset in the sub device. This is similar to
- querystd()
-
- s_dv_timings(): Set custom dv timings in the sub device. This is used
- when sub device is capable of setting detailed timing information
- in the hardware to generate/detect the video signal.
-
- g_dv_timings(): Get custom dv timings in the sub device.
-
- enum_mbus_fmt: enumerate pixel formats, provided by a video data source
-
- g_mbus_fmt: get the current pixel format, provided by a video data source
-
- try_mbus_fmt: try to set a pixel format on a video data source
-
- s_mbus_fmt: set a pixel format on a video data source
-
- g_mbus_config: get supported mediabus configurations
-
- s_mbus_config: set a certain mediabus configuration. This operation is added
- for compatibility with soc-camera drivers and should not be used by new
- software.
-
- s_rx_buffer: set a host allocated memory buffer for the subdev. The subdev
- can adjust @size to a lower value and must not write more data to the
- buffer starting at @data than the original value of @size.
- */
-struct v4l2_subdev_video_ops {
- int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
- int (*s_crystal_freq)(struct v4l2_subdev *sd, u32 freq, u32 flags);
- int (*s_std_output)(struct v4l2_subdev *sd, v4l2_std_id std);
- int (*g_std_output)(struct v4l2_subdev *sd, v4l2_std_id *std);
- int (*querystd)(struct v4l2_subdev *sd, v4l2_std_id *std);
- int (*g_tvnorms_output)(struct v4l2_subdev *sd, v4l2_std_id *std);
- int (*g_input_status)(struct v4l2_subdev *sd, u32 *status);
- int (*s_stream)(struct v4l2_subdev *sd, int enable);
- int (*cropcap)(struct v4l2_subdev *sd, struct v4l2_cropcap *cc);
- int (*g_crop)(struct v4l2_subdev *sd, struct v4l2_crop *crop);
- int (*s_crop)(struct v4l2_subdev *sd, const struct v4l2_crop *crop);
- int (*g_parm)(struct v4l2_subdev *sd, struct v4l2_streamparm *param);
- int (*s_parm)(struct v4l2_subdev *sd, struct v4l2_streamparm *param);
- int (*g_frame_interval)(struct v4l2_subdev *sd,
- struct v4l2_subdev_frame_interval *interval);
- int (*s_frame_interval)(struct v4l2_subdev *sd,
- struct v4l2_subdev_frame_interval *interval);
- int (*enum_framesizes)(struct v4l2_subdev *sd, struct v4l2_frmsizeenum *fsize);
- int (*enum_frameintervals)(struct v4l2_subdev *sd, struct v4l2_frmivalenum *fival);
- int (*enum_dv_presets) (struct v4l2_subdev *sd,
- struct v4l2_dv_enum_preset *preset);
- int (*s_dv_preset)(struct v4l2_subdev *sd,
- struct v4l2_dv_preset *preset);
- int (*g_dv_preset)(struct v4l2_subdev *sd,
- struct v4l2_dv_preset *preset);
- int (*query_dv_preset)(struct v4l2_subdev *sd,
- struct v4l2_dv_preset *preset);
- int (*s_dv_timings)(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *timings);
- int (*g_dv_timings)(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *timings);
- int (*enum_dv_timings)(struct v4l2_subdev *sd,
- struct v4l2_enum_dv_timings *timings);
- int (*query_dv_timings)(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *timings);
- int (*dv_timings_cap)(struct v4l2_subdev *sd,
- struct v4l2_dv_timings_cap *cap);
- int (*enum_mbus_fmt)(struct v4l2_subdev *sd, unsigned int index,
- enum v4l2_mbus_pixelcode *code);
- int (*enum_mbus_fsizes)(struct v4l2_subdev *sd,
- struct v4l2_frmsizeenum *fsize);
- int (*g_mbus_fmt)(struct v4l2_subdev *sd,
- struct v4l2_mbus_framefmt *fmt);
- int (*try_mbus_fmt)(struct v4l2_subdev *sd,
- struct v4l2_mbus_framefmt *fmt);
- int (*s_mbus_fmt)(struct v4l2_subdev *sd,
- struct v4l2_mbus_framefmt *fmt);
- int (*g_mbus_config)(struct v4l2_subdev *sd,
- struct v4l2_mbus_config *cfg);
- int (*s_mbus_config)(struct v4l2_subdev *sd,
- const struct v4l2_mbus_config *cfg);
- int (*s_rx_buffer)(struct v4l2_subdev *sd, void *buf,
- unsigned int *size);
};
/*
@@ -390,296 +193,104 @@ struct v4l2_subdev_video_ops {
member (to determine whether CC data from the first or second field
should be obtained).
- s_raw_fmt: setup the video encoder/decoder for raw VBI.
+ s_std_output: set v4l2_std_id for video OUTPUT devices. This is ignored by
+ video input devices.
+
+ s_crystal_freq: sets the frequency of the crystal used to generate the
+ clocks in Hz. An extra flags field allows device specific configuration
+ regarding clock frequency dividers, etc. If not used, then set flags
+ to 0. If the frequency is not supported, then -EINVAL is returned.
- g_sliced_fmt: retrieve the current sliced VBI settings.
+ g_input_status: get input status. Same as the status field in the v4l2_input
+ struct.
- s_sliced_fmt: setup the sliced VBI settings.
+ s_routing: see s_routing in audio_ops, except this version is for video
+ devices.
*/
-struct v4l2_subdev_vbi_ops {
+struct v4l2_subdev_video_ops {
+ int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
+ int (*s_crystal_freq)(struct v4l2_subdev *sd, u32 freq, u32 flags);
int (*decode_vbi_line)(struct v4l2_subdev *sd, struct v4l2_decode_vbi_line *vbi_line);
int (*s_vbi_data)(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *vbi_data);
int (*g_vbi_data)(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_data *vbi_data);
int (*g_sliced_vbi_cap)(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_cap *cap);
- int (*s_raw_fmt)(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt);
- int (*g_sliced_fmt)(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt);
- int (*s_sliced_fmt)(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt);
-};
-
-/**
- * struct v4l2_subdev_sensor_ops - v4l2-subdev sensor operations
- * @g_skip_top_lines: number of lines at the top of the image to be skipped.
- * This is needed for some sensors, which always corrupt
- * several top lines of the output image, or which send their
- * metadata in them.
- * @g_skip_frames: number of frames to skip at stream start. This is needed for
- * buggy sensors that generate faulty frames when they are
- * turned on.
- */
-struct v4l2_subdev_sensor_ops {
- int (*g_skip_top_lines)(struct v4l2_subdev *sd, u32 *lines);
- int (*g_skip_frames)(struct v4l2_subdev *sd, u32 *frames);
-};
-
-/*
- [rt]x_g_parameters: Get the current operating parameters and state of the
- the IR receiver or transmitter.
-
- [rt]x_s_parameters: Set the current operating parameters and state of the
- the IR receiver or transmitter. It is recommended to call
- [rt]x_g_parameters first to fill out the current state, and only change
- the fields that need to be changed. Upon return, the actual device
- operating parameters and state will be returned. Note that hardware
- limitations may prevent the actual settings from matching the requested
- settings - e.g. an actual carrier setting of 35,904 Hz when 36,000 Hz
- was requested. An exception is when the shutdown parameter is true.
- The last used operational parameters will be returned, but the actual
- state of the hardware be different to minimize power consumption and
- processing when shutdown is true.
-
- rx_read: Reads received codes or pulse width data.
- The semantics are similar to a non-blocking read() call.
-
- tx_write: Writes codes or pulse width data for transmission.
- The semantics are similar to a non-blocking write() call.
- */
-
-enum v4l2_subdev_ir_mode {
- V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, /* uses struct ir_raw_event records */
-};
-
-struct v4l2_subdev_ir_parameters {
- /* Either Rx or Tx */
- unsigned int bytes_per_data_element; /* of data in read or write call */
- enum v4l2_subdev_ir_mode mode;
-
- bool enable;
- bool interrupt_enable;
- bool shutdown; /* true: set hardware to low/no power, false: normal */
-
- bool modulation; /* true: uses carrier, false: baseband */
- u32 max_pulse_width; /* ns, valid only for baseband signal */
- unsigned int carrier_freq; /* Hz, valid only for modulated signal*/
- unsigned int duty_cycle; /* percent, valid only for modulated signal*/
- bool invert_level; /* invert signal level */
-
- /* Tx only */
- bool invert_carrier_sense; /* Send 0/space as a carrier burst */
-
- /* Rx only */
- u32 noise_filter_min_width; /* ns, min time of a valid pulse */
- unsigned int carrier_range_lower; /* Hz, valid only for modulated sig */
- unsigned int carrier_range_upper; /* Hz, valid only for modulated sig */
- u32 resolution; /* ns */
-};
-
-struct v4l2_subdev_ir_ops {
- /* Receiver */
- int (*rx_read)(struct v4l2_subdev *sd, u8 *buf, size_t count,
- ssize_t *num);
-
- int (*rx_g_parameters)(struct v4l2_subdev *sd,
- struct v4l2_subdev_ir_parameters *params);
- int (*rx_s_parameters)(struct v4l2_subdev *sd,
- struct v4l2_subdev_ir_parameters *params);
-
- /* Transmitter */
- int (*tx_write)(struct v4l2_subdev *sd, u8 *buf, size_t count,
- ssize_t *num);
-
- int (*tx_g_parameters)(struct v4l2_subdev *sd,
- struct v4l2_subdev_ir_parameters *params);
- int (*tx_s_parameters)(struct v4l2_subdev *sd,
- struct v4l2_subdev_ir_parameters *params);
-};
-
-/**
- * struct v4l2_subdev_pad_ops - v4l2-subdev pad level operations
- * @get_frame_desc: get the current low level media bus frame parameters.
- * @get_frame_desc: set the low level media bus frame parameters, @fd array
- * may be adjusted by the subdev driver to device capabilities.
- */
-struct v4l2_subdev_pad_ops {
- int (*enum_mbus_code)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_mbus_code_enum *code);
- int (*enum_frame_size)(struct v4l2_subdev *sd,
- struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_frame_size_enum *fse);
- int (*enum_frame_interval)(struct v4l2_subdev *sd,
- struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_frame_interval_enum *fie);
- int (*get_fmt)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_format *format);
- int (*set_fmt)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_format *format);
- int (*set_crop)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_crop *crop);
- int (*get_crop)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_crop *crop);
- int (*get_selection)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_selection *sel);
- int (*set_selection)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
- struct v4l2_subdev_selection *sel);
- int (*get_edid)(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid);
- int (*set_edid)(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid);
-#ifdef CONFIG_MEDIA_CONTROLLER
- int (*link_validate)(struct v4l2_subdev *sd, struct media_link *link,
- struct v4l2_subdev_format *source_fmt,
- struct v4l2_subdev_format *sink_fmt);
-#endif /* CONFIG_MEDIA_CONTROLLER */
- int (*get_frame_desc)(struct v4l2_subdev *sd, unsigned int pad,
- struct v4l2_mbus_frame_desc *fd);
- int (*set_frame_desc)(struct v4l2_subdev *sd, unsigned int pad,
- struct v4l2_mbus_frame_desc *fd);
+ int (*s_std_output)(struct v4l2_subdev *sd, v4l2_std_id std);
+ int (*querystd)(struct v4l2_subdev *sd, v4l2_std_id *std);
+ int (*g_input_status)(struct v4l2_subdev *sd, u32 *status);
+ int (*s_stream)(struct v4l2_subdev *sd, int enable);
+ int (*enum_fmt)(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmtdesc);
+ int (*g_fmt)(struct v4l2_subdev *sd, struct v4l2_format *fmt);
+ int (*try_fmt)(struct v4l2_subdev *sd, struct v4l2_format *fmt);
+ int (*s_fmt)(struct v4l2_subdev *sd, struct v4l2_format *fmt);
+ int (*cropcap)(struct v4l2_subdev *sd, struct v4l2_cropcap *cc);
+ int (*g_crop)(struct v4l2_subdev *sd, struct v4l2_crop *crop);
+ int (*s_crop)(struct v4l2_subdev *sd, struct v4l2_crop *crop);
+ int (*g_parm)(struct v4l2_subdev *sd, struct v4l2_streamparm *param);
+ int (*s_parm)(struct v4l2_subdev *sd, struct v4l2_streamparm *param);
+ int (*enum_framesizes)(struct v4l2_subdev *sd, struct v4l2_frmsizeenum *fsize);
+ int (*enum_frameintervals)(struct v4l2_subdev *sd, struct v4l2_frmivalenum *fival);
};
struct v4l2_subdev_ops {
- const struct v4l2_subdev_core_ops *core;
- const struct v4l2_subdev_tuner_ops *tuner;
- const struct v4l2_subdev_audio_ops *audio;
- const struct v4l2_subdev_video_ops *video;
- const struct v4l2_subdev_vbi_ops *vbi;
- const struct v4l2_subdev_ir_ops *ir;
- const struct v4l2_subdev_sensor_ops *sensor;
- const struct v4l2_subdev_pad_ops *pad;
-};
-
-/*
- * Internal ops. Never call this from drivers, only the v4l2 framework can call
- * these ops.
- *
- * registered: called when this subdev is registered. When called the v4l2_dev
- * field is set to the correct v4l2_device.
- *
- * unregistered: called when this subdev is unregistered. When called the
- * v4l2_dev field is still set to the correct v4l2_device.
- *
- * open: called when the subdev device node is opened by an application.
- *
- * close: called when the subdev device node is closed.
- */
-struct v4l2_subdev_internal_ops {
- int (*registered)(struct v4l2_subdev *sd);
- void (*unregistered)(struct v4l2_subdev *sd);
- int (*open)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh);
- int (*close)(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh);
+ const struct v4l2_subdev_core_ops *core;
+ const struct v4l2_subdev_tuner_ops *tuner;
+ const struct v4l2_subdev_audio_ops *audio;
+ const struct v4l2_subdev_video_ops *video;
};
#define V4L2_SUBDEV_NAME_SIZE 32
/* Set this flag if this subdev is a i2c device. */
-#define V4L2_SUBDEV_FL_IS_I2C (1U << 0)
-/* Set this flag if this subdev is a spi device. */
-#define V4L2_SUBDEV_FL_IS_SPI (1U << 1)
-/* Set this flag if this subdev needs a device node. */
-#define V4L2_SUBDEV_FL_HAS_DEVNODE (1U << 2)
-/* Set this flag if this subdev generates events. */
-#define V4L2_SUBDEV_FL_HAS_EVENTS (1U << 3)
+#define V4L2_SUBDEV_FL_IS_I2C (1U << 0)
/* Each instance of a subdev driver should create this struct, either
stand-alone or embedded in a larger struct.
*/
struct v4l2_subdev {
-#if defined(CONFIG_MEDIA_CONTROLLER)
- struct media_entity entity;
-#endif
struct list_head list;
struct module *owner;
u32 flags;
struct v4l2_device *v4l2_dev;
const struct v4l2_subdev_ops *ops;
- /* Never call these internal ops from within a driver! */
- const struct v4l2_subdev_internal_ops *internal_ops;
- /* The control handler of this subdev. May be NULL. */
- struct v4l2_ctrl_handler *ctrl_handler;
/* name must be unique */
char name[V4L2_SUBDEV_NAME_SIZE];
/* can be used to group similar subdevs, value is driver-specific */
u32 grp_id;
/* pointer to private data */
- void *dev_priv;
- void *host_priv;
- /* subdev device node */
- struct video_device *devnode;
-};
-
-#define media_entity_to_v4l2_subdev(ent) \
- container_of(ent, struct v4l2_subdev, entity)
-#define vdev_to_v4l2_subdev(vdev) \
- ((struct v4l2_subdev *)video_get_drvdata(vdev))
-
-/*
- * Used for storing subdev information per file handle
- */
-struct v4l2_subdev_fh {
- struct v4l2_fh vfh;
-#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
- struct {
- struct v4l2_mbus_framefmt try_fmt;
- struct v4l2_rect try_crop;
- struct v4l2_rect try_compose;
- } *pad;
-#endif
+ void *priv;
};
-#define to_v4l2_subdev_fh(fh) \
- container_of(fh, struct v4l2_subdev_fh, vfh)
-
-#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
-#define __V4L2_SUBDEV_MK_GET_TRY(rtype, fun_name, field_name) \
- static inline struct rtype * \
- v4l2_subdev_get_try_##fun_name(struct v4l2_subdev_fh *fh, \
- unsigned int pad) \
- { \
- BUG_ON(unlikely(pad >= vdev_to_v4l2_subdev( \
- fh->vfh.vdev)->entity.num_pads)); \
- return &fh->pad[pad].field_name; \
- }
-
-__V4L2_SUBDEV_MK_GET_TRY(v4l2_mbus_framefmt, format, try_fmt)
-__V4L2_SUBDEV_MK_GET_TRY(v4l2_rect, crop, try_compose)
-__V4L2_SUBDEV_MK_GET_TRY(v4l2_rect, compose, try_compose)
-#endif
-
-extern const struct v4l2_file_operations v4l2_subdev_fops;
-
static inline void v4l2_set_subdevdata(struct v4l2_subdev *sd, void *p)
{
- sd->dev_priv = p;
+ sd->priv = p;
}
static inline void *v4l2_get_subdevdata(const struct v4l2_subdev *sd)
{
- return sd->dev_priv;
+ return sd->priv;
}
-static inline void v4l2_set_subdev_hostdata(struct v4l2_subdev *sd, void *p)
+static inline void v4l2_subdev_init(struct v4l2_subdev *sd,
+ const struct v4l2_subdev_ops *ops)
{
- sd->host_priv = p;
+ INIT_LIST_HEAD(&sd->list);
+ /* ops->core MUST be set */
+ BUG_ON(!ops || !ops->core);
+ sd->ops = ops;
+ sd->v4l2_dev = NULL;
+ sd->flags = 0;
+ sd->name[0] = '\0';
+ sd->grp_id = 0;
+ sd->priv = NULL;
}
-static inline void *v4l2_get_subdev_hostdata(const struct v4l2_subdev *sd)
-{
- return sd->host_priv;
-}
-
-#ifdef CONFIG_MEDIA_CONTROLLER
-int v4l2_subdev_link_validate_default(struct v4l2_subdev *sd,
- struct media_link *link,
- struct v4l2_subdev_format *source_fmt,
- struct v4l2_subdev_format *sink_fmt);
-int v4l2_subdev_link_validate(struct media_link *link);
-#endif /* CONFIG_MEDIA_CONTROLLER */
-void v4l2_subdev_init(struct v4l2_subdev *sd,
- const struct v4l2_subdev_ops *ops);
-
/* Call an ops of a v4l2_subdev, doing the right checks against
NULL pointers.
Example: err = v4l2_subdev_call(sd, core, g_chip_ident, &chip);
*/
#define v4l2_subdev_call(sd, o, f, args...) \
- (!(sd) ? -ENODEV : (((sd)->ops->o && (sd)->ops->o->f) ? \
+ (!(sd) ? -ENODEV : (((sd) && (sd)->ops->o && (sd)->ops->o->f) ? \
(sd)->ops->o->f((sd) , ##args) : -ENOIOCTLCMD))
/* Send a notification to v4l2_device. */
diff --git a/include/media/videobuf-core.h b/include/media/videobuf-core.h
index 8c6e8259..1c5946c4 100644
--- a/include/media/videobuf-core.h
+++ b/include/media/videobuf-core.h
@@ -17,6 +17,10 @@
#define _VIDEOBUF_CORE_H
#include <linux/poll.h>
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+#define __MIN_V4L1
+#include <linux/videodev.h>
+#endif
#include <linux/videodev2.h>
#define UNSET (-1U)
@@ -50,6 +54,8 @@ struct videobuf_queue;
struct videobuf_mapping {
unsigned int count;
+ unsigned long start;
+ unsigned long end;
struct videobuf_queue *q;
};
@@ -72,6 +78,7 @@ struct videobuf_buffer {
unsigned int height;
unsigned int bytesperline; /* use only if != 0 */
unsigned long size;
+ unsigned int input;
enum v4l2_field field;
enum videobuf_state state;
struct list_head stream; /* QBUF/DQBUF list */
@@ -120,36 +127,51 @@ struct videobuf_queue_ops {
struct videobuf_qtype_ops {
u32 magic;
- struct videobuf_buffer *(*alloc_vb)(size_t size);
- void *(*vaddr) (struct videobuf_buffer *buf);
- int (*iolock) (struct videobuf_queue *q,
+ void *(*alloc) (size_t size);
+ void *(*vmalloc) (struct videobuf_buffer *buf);
+ int (*iolock) (struct videobuf_queue* q,
struct videobuf_buffer *vb,
struct v4l2_framebuffer *fbuf);
- int (*sync) (struct videobuf_queue *q,
+ int (*mmap) (struct videobuf_queue *q,
+ unsigned int *count,
+ unsigned int *size,
+ enum v4l2_memory memory);
+ int (*sync) (struct videobuf_queue* q,
struct videobuf_buffer *buf);
+ int (*video_copy_to_user)(struct videobuf_queue *q,
+ char __user *data,
+ size_t count,
+ int nonblocking);
+ int (*copy_stream) (struct videobuf_queue *q,
+ char __user *data,
+ size_t count,
+ size_t pos,
+ int vbihack,
+ int nonblocking);
+ int (*mmap_free) (struct videobuf_queue *q);
int (*mmap_mapper) (struct videobuf_queue *q,
- struct videobuf_buffer *buf,
- struct vm_area_struct *vma);
+ struct vm_area_struct *vma);
};
struct videobuf_queue {
struct mutex vb_lock;
- struct mutex *ext_lock;
spinlock_t *irqlock;
struct device *dev;
wait_queue_head_t wait; /* wait if queue is empty */
enum v4l2_buf_type type;
+ unsigned int inputs; /* for V4L2_BUF_FLAG_INPUT */
unsigned int msize;
enum v4l2_field field;
enum v4l2_field last; /* for field=V4L2_FIELD_ALTERNATE */
struct videobuf_buffer *bufs[VIDEO_MAX_FRAME];
- const struct videobuf_queue_ops *ops;
+ struct videobuf_queue_ops *ops;
struct videobuf_qtype_ops *int_ops;
unsigned int streaming:1;
unsigned int reading:1;
+ unsigned int is_mmapped:1;
/* capture via mmap() + ioctl(QBUF/DQBUF) */
struct list_head stream;
@@ -162,39 +184,25 @@ struct videobuf_queue {
void *priv_data;
};
-static inline void videobuf_queue_lock(struct videobuf_queue *q)
-{
- if (!q->ext_lock)
- mutex_lock(&q->vb_lock);
-}
-
-static inline void videobuf_queue_unlock(struct videobuf_queue *q)
-{
- if (!q->ext_lock)
- mutex_unlock(&q->vb_lock);
-}
-
-int videobuf_waiton(struct videobuf_queue *q, struct videobuf_buffer *vb,
- int non_blocking, int intr);
-int videobuf_iolock(struct videobuf_queue *q, struct videobuf_buffer *vb,
+int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr);
+int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
struct v4l2_framebuffer *fbuf);
-struct videobuf_buffer *videobuf_alloc_vb(struct videobuf_queue *q);
+void *videobuf_alloc(struct videobuf_queue* q);
/* Used on videobuf-dvb */
-void *videobuf_queue_to_vaddr(struct videobuf_queue *q,
- struct videobuf_buffer *buf);
+void *videobuf_queue_to_vmalloc (struct videobuf_queue* q,
+ struct videobuf_buffer *buf);
void videobuf_queue_core_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
+ struct videobuf_queue_ops *ops,
struct device *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
void *priv,
- struct videobuf_qtype_ops *int_ops,
- struct mutex *ext_lock);
+ struct videobuf_qtype_ops *int_ops);
int videobuf_queue_is_busy(struct videobuf_queue *q);
void videobuf_queue_cancel(struct videobuf_queue *q);
@@ -206,6 +214,10 @@ int videobuf_qbuf(struct videobuf_queue *q,
struct v4l2_buffer *b);
int videobuf_dqbuf(struct videobuf_queue *q,
struct v4l2_buffer *b, int nonblocking);
+#ifdef CONFIG_VIDEO_V4L1_COMPAT
+int videobuf_cgmbuf(struct videobuf_queue *q,
+ struct video_mbuf *mbuf, int count);
+#endif
int videobuf_streamon(struct videobuf_queue *q);
int videobuf_streamoff(struct videobuf_queue *q);
diff --git a/include/media/videobuf-dma-contig.h b/include/media/videobuf-dma-contig.h
index f473aeb8..54938668 100644
--- a/include/media/videobuf-dma-contig.h
+++ b/include/media/videobuf-dma-contig.h
@@ -17,24 +17,13 @@
#include <media/videobuf-core.h>
void videobuf_queue_dma_contig_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
+ struct videobuf_queue_ops *ops,
struct device *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
- void *priv,
- struct mutex *ext_lock);
-
-void videobuf_queue_dma_contig_init_cached(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
- struct device *dev,
- spinlock_t *irqlock,
- enum v4l2_buf_type type,
- enum v4l2_field field,
- unsigned int msize,
- void *priv,
- struct mutex *ext_lock);
+ void *priv);
dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf);
void videobuf_dma_contig_free(struct videobuf_queue *q,
diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h
index d8fb6012..70a383f7 100644
--- a/include/media/videobuf-dma-sg.h
+++ b/include/media/videobuf-dma-sg.h
@@ -24,6 +24,23 @@
/* --------------------------------------------------------------------- */
+/*
+ * Return a scatterlist for some page-aligned vmalloc()'ed memory
+ * block (NULL on errors). Memory for the scatterlist is allocated
+ * using kmalloc. The caller must free the memory.
+ */
+struct scatterlist* videobuf_vmalloc_to_sg(unsigned char *virt, int nr_pages);
+
+/*
+ * Return a scatterlist for a an array of userpages (NULL on errors).
+ * Memory for the scatterlist is allocated using kmalloc. The caller
+ * must free the memory.
+ */
+struct scatterlist* videobuf_pages_to_sg(struct page **pages, int nr_pages,
+ int offset);
+
+/* --------------------------------------------------------------------- */
+
/*
* A small set of helper functions to manage buffers (both userland
* and kernel) for DMA.
@@ -34,7 +51,7 @@
* does memory allocation too using vmalloc_32().
*
* videobuf_dma_*()
- * see Documentation/DMA-API-HOWTO.txt, these functions to
+ * see Documentation/PCI/PCI-DMA-mapping.txt, these functions to
* basically the same. The map function does also build a
* scatterlist for the buffer (and unmap frees it ...)
*
@@ -48,11 +65,10 @@ struct videobuf_dmabuf {
/* for userland buffer */
int offset;
- size_t size;
struct page **pages;
/* for kernel buffers */
- void *vaddr;
+ void *vmalloc;
/* for overlay buffers (pci-pci dma) */
dma_addr_t bus_addr;
@@ -64,23 +80,14 @@ struct videobuf_dmabuf {
int direction;
};
-struct videobuf_dma_sg_memory {
+struct videobuf_dma_sg_memory
+{
u32 magic;
/* for mmap'ed buffers */
struct videobuf_dmabuf dma;
};
-/*
- * Scatter-gather DMA buffer API.
- *
- * These functions provide a simple way to create a page list and a
- * scatter-gather list from a kernel, userspace of physical address and map the
- * memory for DMA operation.
- *
- * Despite the name, this is totally unrelated to videobuf, except that
- * videobuf-dma-sg uses the same API internally.
- */
void videobuf_dma_init(struct videobuf_dmabuf *dma);
int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction,
unsigned long data, unsigned long size);
@@ -90,21 +97,25 @@ int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction,
dma_addr_t addr, int nr_pages);
int videobuf_dma_free(struct videobuf_dmabuf *dma);
-int videobuf_dma_map(struct device *dev, struct videobuf_dmabuf *dma);
-int videobuf_dma_unmap(struct device *dev, struct videobuf_dmabuf *dma);
-struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf);
+int videobuf_dma_map(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
+int videobuf_dma_sync(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
+int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
+struct videobuf_dmabuf *videobuf_to_dma (struct videobuf_buffer *buf);
void *videobuf_sg_alloc(size_t size);
-void videobuf_queue_sg_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
+void videobuf_queue_sg_init(struct videobuf_queue* q,
+ struct videobuf_queue_ops *ops,
struct device *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
- void *priv,
- struct mutex *ext_lock);
-
-#endif /* _VIDEOBUF_DMA_SG_H */
-
+ void *priv);
+
+ /*FIXME: these variants are used only on *-alsa code, where videobuf is
+ * used without queue
+ */
+int videobuf_sg_dma_map(struct device *dev, struct videobuf_dmabuf *dma);
+int videobuf_sg_dma_unmap(struct device *dev, struct videobuf_dmabuf *dma);
+#endif
diff --git a/include/media/videobuf-vmalloc.h b/include/media/videobuf-vmalloc.h
index 486a97ef..e87222c6 100644
--- a/include/media/videobuf-vmalloc.h
+++ b/include/media/videobuf-vmalloc.h
@@ -19,28 +19,27 @@
/* --------------------------------------------------------------------- */
-struct videobuf_vmalloc_memory {
+struct videobuf_vmalloc_memory
+{
u32 magic;
- void *vaddr;
+ void *vmalloc;
- /* remap_vmalloc_range seems to need to run
- * after mmap() on some cases */
+ /* remap_vmalloc_range seems to need to run after mmap() on some cases */
struct vm_area_struct *vma;
};
-void videobuf_queue_vmalloc_init(struct videobuf_queue *q,
- const struct videobuf_queue_ops *ops,
- struct device *dev,
+void videobuf_queue_vmalloc_init(struct videobuf_queue* q,
+ struct videobuf_queue_ops *ops,
+ void *dev,
spinlock_t *irqlock,
enum v4l2_buf_type type,
enum v4l2_field field,
unsigned int msize,
- void *priv,
- struct mutex *ext_lock);
+ void *priv);
-void *videobuf_to_vmalloc(struct videobuf_buffer *buf);
+void *videobuf_to_vmalloc (struct videobuf_buffer *buf);
-void videobuf_vmalloc_free(struct videobuf_buffer *buf);
+void videobuf_vmalloc_free (struct videobuf_buffer *buf);
#endif
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h
deleted file mode 100644
index 9cfd4ee9..00000000
--- a/include/media/videobuf2-core.h
+++ /dev/null
@@ -1,499 +0,0 @@
-/*
- * videobuf2-core.h - V4L2 driver helper framework
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-#ifndef _MEDIA_VIDEOBUF2_CORE_H
-#define _MEDIA_VIDEOBUF2_CORE_H
-
-#include <linux/mm_types.h>
-#include <linux/mutex.h>
-#include <linux/poll.h>
-#include <linux/videodev2.h>
-#include <linux/dma-buf.h>
-
-struct vb2_alloc_ctx;
-struct vb2_fileio_data;
-
-/**
- * struct vb2_mem_ops - memory handling/memory allocator operations
- * @alloc: allocate video memory and, optionally, allocator private data,
- * return NULL on failure or a pointer to allocator private,
- * per-buffer data on success; the returned private structure
- * will then be passed as buf_priv argument to other ops in this
- * structure
- * @put: inform the allocator that the buffer will no longer be used;
- * usually will result in the allocator freeing the buffer (if
- * no other users of this buffer are present); the buf_priv
- * argument is the allocator private per-buffer structure
- * previously returned from the alloc callback
- * @get_userptr: acquire userspace memory for a hardware operation; used for
- * USERPTR memory types; vaddr is the address passed to the
- * videobuf layer when queuing a video buffer of USERPTR type;
- * should return an allocator private per-buffer structure
- * associated with the buffer on success, NULL on failure;
- * the returned private structure will then be passed as buf_priv
- * argument to other ops in this structure
- * @put_userptr: inform the allocator that a USERPTR buffer will no longer
- * be used
- * @attach_dmabuf: attach a shared struct dma_buf for a hardware operation;
- * used for DMABUF memory types; alloc_ctx is the alloc context
- * dbuf is the shared dma_buf; returns NULL on failure;
- * allocator private per-buffer structure on success;
- * this needs to be used for further accesses to the buffer
- * @detach_dmabuf: inform the exporter of the buffer that the current DMABUF
- * buffer is no longer used; the buf_priv argument is the
- * allocator private per-buffer structure previously returned
- * from the attach_dmabuf callback
- * @map_dmabuf: request for access to the dmabuf from allocator; the allocator
- * of dmabuf is informed that this driver is going to use the
- * dmabuf
- * @unmap_dmabuf: releases access control to the dmabuf - allocator is notified
- * that this driver is done using the dmabuf for now
- * @prepare: called every time the buffer is passed from userspace to the
- * driver, useful for cache synchronisation, optional
- * @finish: called every time the buffer is passed back from the driver
- * to the userspace, also optional
- * @vaddr: return a kernel virtual address to a given memory buffer
- * associated with the passed private structure or NULL if no
- * such mapping exists
- * @cookie: return allocator specific cookie for a given memory buffer
- * associated with the passed private structure or NULL if not
- * available
- * @num_users: return the current number of users of a memory buffer;
- * return 1 if the videobuf layer (or actually the driver using
- * it) is the only user
- * @mmap: setup a userspace mapping for a given memory buffer under
- * the provided virtual memory region
- *
- * Required ops for USERPTR types: get_userptr, put_userptr.
- * Required ops for MMAP types: alloc, put, num_users, mmap.
- * Required ops for read/write access types: alloc, put, num_users, vaddr
- * Required ops for DMABUF types: attach_dmabuf, detach_dmabuf, map_dmabuf,
- * unmap_dmabuf.
- */
-struct vb2_mem_ops {
- void *(*alloc)(void *alloc_ctx, unsigned long size);
- void (*put)(void *buf_priv);
- struct dma_buf *(*get_dmabuf)(void *buf_priv);
-
- void *(*get_userptr)(void *alloc_ctx, unsigned long vaddr,
- unsigned long size, int write);
- void (*put_userptr)(void *buf_priv);
-
- void (*prepare)(void *buf_priv);
- void (*finish)(void *buf_priv);
-
- void *(*attach_dmabuf)(void *alloc_ctx, struct dma_buf *dbuf,
- unsigned long size, int write);
- void (*detach_dmabuf)(void *buf_priv);
- int (*map_dmabuf)(void *buf_priv);
- void (*unmap_dmabuf)(void *buf_priv);
-
- void *(*vaddr)(void *buf_priv);
- void *(*cookie)(void *buf_priv);
-
- unsigned int (*num_users)(void *buf_priv);
-
- int (*mmap)(void *buf_priv, struct vm_area_struct *vma);
-};
-
-struct vb2_plane {
- void *mem_priv;
- struct dma_buf *dbuf;
- unsigned int dbuf_mapped;
-};
-
-/**
- * enum vb2_io_modes - queue access methods
- * @VB2_MMAP: driver supports MMAP with streaming API
- * @VB2_USERPTR: driver supports USERPTR with streaming API
- * @VB2_READ: driver supports read() style access
- * @VB2_WRITE: driver supports write() style access
- * @VB2_DMABUF: driver supports DMABUF with streaming API
- */
-enum vb2_io_modes {
- VB2_MMAP = (1 << 0),
- VB2_USERPTR = (1 << 1),
- VB2_READ = (1 << 2),
- VB2_WRITE = (1 << 3),
- VB2_DMABUF = (1 << 4),
-};
-
-/**
- * enum vb2_fileio_flags - flags for selecting a mode of the file io emulator,
- * by default the 'streaming' style is used by the file io emulator
- * @VB2_FILEIO_READ_ONCE: report EOF after reading the first buffer
- * @VB2_FILEIO_WRITE_IMMEDIATELY: queue buffer after each write() call
- */
-enum vb2_fileio_flags {
- VB2_FILEIO_READ_ONCE = (1 << 0),
- VB2_FILEIO_WRITE_IMMEDIATELY = (1 << 1),
-};
-
-/**
- * enum vb2_buffer_state - current video buffer state
- * @VB2_BUF_STATE_DEQUEUED: buffer under userspace control
- * @VB2_BUF_STATE_PREPARED: buffer prepared in videobuf and by the driver
- * @VB2_BUF_STATE_QUEUED: buffer queued in videobuf, but not in driver
- * @VB2_BUF_STATE_ACTIVE: buffer queued in driver and possibly used
- * in a hardware operation
- * @VB2_BUF_STATE_DONE: buffer returned from driver to videobuf, but
- * not yet dequeued to userspace
- * @VB2_BUF_STATE_ERROR: same as above, but the operation on the buffer
- * has ended with an error, which will be reported
- * to the userspace when it is dequeued
- */
-enum vb2_buffer_state {
- VB2_BUF_STATE_DEQUEUED,
- VB2_BUF_STATE_PREPARED,
- VB2_BUF_STATE_QUEUED,
- VB2_BUF_STATE_ACTIVE,
- VB2_BUF_STATE_DONE,
- VB2_BUF_STATE_ERROR,
-};
-
-struct vb2_queue;
-
-/**
- * struct vb2_buffer - represents a video buffer
- * @v4l2_buf: struct v4l2_buffer associated with this buffer; can
- * be read by the driver and relevant entries can be
- * changed by the driver in case of CAPTURE types
- * (such as timestamp)
- * @v4l2_planes: struct v4l2_planes associated with this buffer; can
- * be read by the driver and relevant entries can be
- * changed by the driver in case of CAPTURE types
- * (such as bytesused); NOTE that even for single-planar
- * types, the v4l2_planes[0] struct should be used
- * instead of v4l2_buf for filling bytesused - drivers
- * should use the vb2_set_plane_payload() function for that
- * @vb2_queue: the queue to which this driver belongs
- * @num_planes: number of planes in the buffer
- * on an internal driver queue
- * @state: current buffer state; do not change
- * @queued_entry: entry on the queued buffers list, which holds all
- * buffers queued from userspace
- * @done_entry: entry on the list that stores all buffers ready to
- * be dequeued to userspace
- * @planes: private per-plane information; do not change
- */
-struct vb2_buffer {
- struct v4l2_buffer v4l2_buf;
- struct v4l2_plane v4l2_planes[VIDEO_MAX_PLANES];
-
- struct vb2_queue *vb2_queue;
-
- unsigned int num_planes;
-
-/* Private: internal use only */
- enum vb2_buffer_state state;
-
- struct list_head queued_entry;
- struct list_head done_entry;
-
- struct vb2_plane planes[VIDEO_MAX_PLANES];
-};
-
-/**
- * struct vb2_ops - driver-specific callbacks
- *
- * @queue_setup: called from VIDIOC_REQBUFS and VIDIOC_CREATE_BUFS
- * handlers before memory allocation, or, if
- * *num_planes != 0, after the allocation to verify a
- * smaller number of buffers. Driver should return
- * the required number of buffers in *num_buffers, the
- * required number of planes per buffer in *num_planes; the
- * size of each plane should be set in the sizes[] array
- * and optional per-plane allocator specific context in the
- * alloc_ctxs[] array. When called from VIDIOC_REQBUFS,
- * fmt == NULL, the driver has to use the currently
- * configured format and *num_buffers is the total number
- * of buffers, that are being allocated. When called from
- * VIDIOC_CREATE_BUFS, fmt != NULL and it describes the
- * target frame format. In this case *num_buffers are being
- * allocated additionally to q->num_buffers.
- * @wait_prepare: release any locks taken while calling vb2 functions;
- * it is called before an ioctl needs to wait for a new
- * buffer to arrive; required to avoid a deadlock in
- * blocking access type
- * @wait_finish: reacquire all locks released in the previous callback;
- * required to continue operation after sleeping while
- * waiting for a new buffer to arrive
- * @buf_init: called once after allocating a buffer (in MMAP case)
- * or after acquiring a new USERPTR buffer; drivers may
- * perform additional buffer-related initialization;
- * initialization failure (return != 0) will prevent
- * queue setup from completing successfully; optional
- * @buf_prepare: called every time the buffer is queued from userspace
- * and from the VIDIOC_PREPARE_BUF ioctl; drivers may
- * perform any initialization required before each hardware
- * operation in this callback; if an error is returned, the
- * buffer will not be queued in driver; optional
- * @buf_finish: called before every dequeue of the buffer back to
- * userspace; drivers may perform any operations required
- * before userspace accesses the buffer; optional
- * @buf_cleanup: called once before the buffer is freed; drivers may
- * perform any additional cleanup; optional
- * @start_streaming: called once to enter 'streaming' state; the driver may
- * receive buffers with @buf_queue callback before
- * @start_streaming is called; the driver gets the number
- * of already queued buffers in count parameter; driver
- * can return an error if hardware fails or not enough
- * buffers has been queued, in such case all buffers that
- * have been already given by the @buf_queue callback are
- * invalidated.
- * @stop_streaming: called when 'streaming' state must be disabled; driver
- * should stop any DMA transactions or wait until they
- * finish and give back all buffers it got from buf_queue()
- * callback; may use vb2_wait_for_all_buffers() function
- * @buf_queue: passes buffer vb to the driver; driver may start
- * hardware operation on this buffer; driver should give
- * the buffer back by calling vb2_buffer_done() function;
- * it is allways called after calling STREAMON ioctl;
- * might be called before start_streaming callback if user
- * pre-queued buffers before calling STREAMON
- */
-struct vb2_ops {
- int (*queue_setup)(struct vb2_queue *q, const struct v4l2_format *fmt,
- unsigned int *num_buffers, unsigned int *num_planes,
- unsigned int sizes[], void *alloc_ctxs[]);
-
- void (*wait_prepare)(struct vb2_queue *q);
- void (*wait_finish)(struct vb2_queue *q);
-
- int (*buf_init)(struct vb2_buffer *vb);
- int (*buf_prepare)(struct vb2_buffer *vb);
- int (*buf_finish)(struct vb2_buffer *vb);
- void (*buf_cleanup)(struct vb2_buffer *vb);
-
- int (*start_streaming)(struct vb2_queue *q, unsigned int count);
- int (*stop_streaming)(struct vb2_queue *q);
-
- void (*buf_queue)(struct vb2_buffer *vb);
-};
-
-struct v4l2_fh;
-
-/**
- * struct vb2_queue - a videobuf queue
- *
- * @type: queue type (see V4L2_BUF_TYPE_* in linux/videodev2.h
- * @io_modes: supported io methods (see vb2_io_modes enum)
- * @io_flags: additional io flags (see vb2_fileio_flags enum)
- * @lock: pointer to a mutex that protects the vb2_queue struct. The
- * driver can set this to a mutex to let the v4l2 core serialize
- * the queuing ioctls. If the driver wants to handle locking
- * itself, then this should be set to NULL. This lock is not used
- * by the videobuf2 core API.
- * @owner: The filehandle that 'owns' the buffers, i.e. the filehandle
- * that called reqbufs, create_buffers or started fileio.
- * This field is not used by the videobuf2 core API, but it allows
- * drivers to easily associate an owner filehandle with the queue.
- * @ops: driver-specific callbacks
- * @mem_ops: memory allocator specific callbacks
- * @drv_priv: driver private data
- * @buf_struct_size: size of the driver-specific buffer structure;
- * "0" indicates the driver doesn't want to use a custom buffer
- * structure type, so sizeof(struct vb2_buffer) will is used
- *
- * @memory: current memory type used
- * @bufs: videobuf buffer structures
- * @num_buffers: number of allocated/used buffers
- * @queued_list: list of buffers currently queued from userspace
- * @queued_count: number of buffers owned by the driver
- * @done_list: list of buffers ready to be dequeued to userspace
- * @done_lock: lock to protect done_list list
- * @done_wq: waitqueue for processes waiting for buffers ready to be dequeued
- * @alloc_ctx: memory type/allocator-specific contexts for each plane
- * @streaming: current streaming state
- * @fileio: file io emulator internal data, used only if emulator is active
- */
-struct vb2_queue {
- enum v4l2_buf_type type;
- unsigned int io_modes;
- unsigned int io_flags;
- struct mutex *lock;
- struct v4l2_fh *owner;
-
- const struct vb2_ops *ops;
- const struct vb2_mem_ops *mem_ops;
- void *drv_priv;
- unsigned int buf_struct_size;
-
-/* private: internal use only */
- enum v4l2_memory memory;
- struct vb2_buffer *bufs[VIDEO_MAX_FRAME];
- unsigned int num_buffers;
-
- struct list_head queued_list;
-
- atomic_t queued_count;
- struct list_head done_list;
- spinlock_t done_lock;
- wait_queue_head_t done_wq;
-
- void *alloc_ctx[VIDEO_MAX_PLANES];
- unsigned int plane_sizes[VIDEO_MAX_PLANES];
-
- unsigned int streaming:1;
-
- struct vb2_fileio_data *fileio;
-};
-
-void *vb2_plane_vaddr(struct vb2_buffer *vb, unsigned int plane_no);
-void *vb2_plane_cookie(struct vb2_buffer *vb, unsigned int plane_no);
-
-void vb2_buffer_done(struct vb2_buffer *vb, enum vb2_buffer_state state);
-int vb2_wait_for_all_buffers(struct vb2_queue *q);
-
-int vb2_querybuf(struct vb2_queue *q, struct v4l2_buffer *b);
-int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req);
-
-int vb2_create_bufs(struct vb2_queue *q, struct v4l2_create_buffers *create);
-int vb2_prepare_buf(struct vb2_queue *q, struct v4l2_buffer *b);
-
-int __must_check vb2_queue_init(struct vb2_queue *q);
-
-void vb2_queue_release(struct vb2_queue *q);
-
-int vb2_qbuf(struct vb2_queue *q, struct v4l2_buffer *b);
-int vb2_expbuf(struct vb2_queue *q, struct v4l2_exportbuffer *eb);
-int vb2_dqbuf(struct vb2_queue *q, struct v4l2_buffer *b, bool nonblocking);
-
-int vb2_streamon(struct vb2_queue *q, enum v4l2_buf_type type);
-int vb2_streamoff(struct vb2_queue *q, enum v4l2_buf_type type);
-
-int vb2_mmap(struct vb2_queue *q, struct vm_area_struct *vma);
-#ifndef CONFIG_MMU
-unsigned long vb2_get_unmapped_area(struct vb2_queue *q,
- unsigned long addr,
- unsigned long len,
- unsigned long pgoff,
- unsigned long flags);
-#endif
-unsigned int vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait);
-size_t vb2_read(struct vb2_queue *q, char __user *data, size_t count,
- loff_t *ppos, int nonblock);
-size_t vb2_write(struct vb2_queue *q, char __user *data, size_t count,
- loff_t *ppos, int nonblock);
-
-/**
- * vb2_is_streaming() - return streaming status of the queue
- * @q: videobuf queue
- */
-static inline bool vb2_is_streaming(struct vb2_queue *q)
-{
- return q->streaming;
-}
-
-/**
- * vb2_is_busy() - return busy status of the queue
- * @q: videobuf queue
- *
- * This function checks if queue has any buffers allocated.
- */
-static inline bool vb2_is_busy(struct vb2_queue *q)
-{
- return (q->num_buffers > 0);
-}
-
-/**
- * vb2_get_drv_priv() - return driver private data associated with the queue
- * @q: videobuf queue
- */
-static inline void *vb2_get_drv_priv(struct vb2_queue *q)
-{
- return q->drv_priv;
-}
-
-/**
- * vb2_set_plane_payload() - set bytesused for the plane plane_no
- * @vb: buffer for which plane payload should be set
- * @plane_no: plane number for which payload should be set
- * @size: payload in bytes
- */
-static inline void vb2_set_plane_payload(struct vb2_buffer *vb,
- unsigned int plane_no, unsigned long size)
-{
- if (plane_no < vb->num_planes)
- vb->v4l2_planes[plane_no].bytesused = size;
-}
-
-/**
- * vb2_get_plane_payload() - get bytesused for the plane plane_no
- * @vb: buffer for which plane payload should be set
- * @plane_no: plane number for which payload should be set
- * @size: payload in bytes
- */
-static inline unsigned long vb2_get_plane_payload(struct vb2_buffer *vb,
- unsigned int plane_no)
-{
- if (plane_no < vb->num_planes)
- return vb->v4l2_planes[plane_no].bytesused;
- return 0;
-}
-
-/**
- * vb2_plane_size() - return plane size in bytes
- * @vb: buffer for which plane size should be returned
- * @plane_no: plane number for which size should be returned
- */
-static inline unsigned long
-vb2_plane_size(struct vb2_buffer *vb, unsigned int plane_no)
-{
- if (plane_no < vb->num_planes)
- return vb->v4l2_planes[plane_no].length;
- return 0;
-}
-
-/*
- * The following functions are not part of the vb2 core API, but are simple
- * helper functions that you can use in your struct v4l2_file_operations,
- * struct v4l2_ioctl_ops and struct vb2_ops. They will serialize if vb2_queue->lock
- * or video_device->lock is set, and they will set and test vb2_queue->owner
- * to check if the calling filehandle is permitted to do the queuing operation.
- */
-
-/* struct v4l2_ioctl_ops helpers */
-
-int vb2_ioctl_reqbufs(struct file *file, void *priv,
- struct v4l2_requestbuffers *p);
-int vb2_ioctl_create_bufs(struct file *file, void *priv,
- struct v4l2_create_buffers *p);
-int vb2_ioctl_prepare_buf(struct file *file, void *priv,
- struct v4l2_buffer *p);
-int vb2_ioctl_querybuf(struct file *file, void *priv, struct v4l2_buffer *p);
-int vb2_ioctl_qbuf(struct file *file, void *priv, struct v4l2_buffer *p);
-int vb2_ioctl_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p);
-int vb2_ioctl_streamon(struct file *file, void *priv, enum v4l2_buf_type i);
-int vb2_ioctl_streamoff(struct file *file, void *priv, enum v4l2_buf_type i);
-int vb2_ioctl_expbuf(struct file *file, void *priv,
- struct v4l2_exportbuffer *p);
-
-/* struct v4l2_file_operations helpers */
-
-int vb2_fop_mmap(struct file *file, struct vm_area_struct *vma);
-int vb2_fop_release(struct file *file);
-ssize_t vb2_fop_write(struct file *file, char __user *buf,
- size_t count, loff_t *ppos);
-ssize_t vb2_fop_read(struct file *file, char __user *buf,
- size_t count, loff_t *ppos);
-unsigned int vb2_fop_poll(struct file *file, poll_table *wait);
-#ifndef CONFIG_MMU
-unsigned long vb2_fop_get_unmapped_area(struct file *file, unsigned long addr,
- unsigned long len, unsigned long pgoff, unsigned long flags);
-#endif
-
-/* struct vb2_ops helpers, only use if vq->lock is non-NULL. */
-
-void vb2_ops_wait_prepare(struct vb2_queue *vq);
-void vb2_ops_wait_finish(struct vb2_queue *vq);
-
-#endif /* _MEDIA_VIDEOBUF2_CORE_H */
diff --git a/include/media/videobuf2-dma-contig.h b/include/media/videobuf2-dma-contig.h
deleted file mode 100644
index 8197f87d..00000000
--- a/include/media/videobuf2-dma-contig.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * videobuf2-dma-contig.h - DMA contig memory allocator for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#ifndef _MEDIA_VIDEOBUF2_DMA_CONTIG_H
-#define _MEDIA_VIDEOBUF2_DMA_CONTIG_H
-
-#include <media/videobuf2-core.h>
-#include <linux/dma-mapping.h>
-
-static inline dma_addr_t
-vb2_dma_contig_plane_dma_addr(struct vb2_buffer *vb, unsigned int plane_no)
-{
- dma_addr_t *addr = vb2_plane_cookie(vb, plane_no);
-
- return *addr;
-}
-
-void *vb2_dma_contig_init_ctx(struct device *dev);
-void vb2_dma_contig_cleanup_ctx(void *alloc_ctx);
-
-extern const struct vb2_mem_ops vb2_dma_contig_memops;
-
-#endif
diff --git a/include/media/videobuf2-dma-sg.h b/include/media/videobuf2-dma-sg.h
deleted file mode 100644
index 0038526b..00000000
--- a/include/media/videobuf2-dma-sg.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * videobuf2-dma-sg.h - DMA scatter/gather memory allocator for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#ifndef _MEDIA_VIDEOBUF2_DMA_SG_H
-#define _MEDIA_VIDEOBUF2_DMA_SG_H
-
-#include <media/videobuf2-core.h>
-
-struct vb2_dma_sg_desc {
- unsigned long size;
- unsigned int num_pages;
- struct scatterlist *sglist;
-};
-
-static inline struct vb2_dma_sg_desc *vb2_dma_sg_plane_desc(
- struct vb2_buffer *vb, unsigned int plane_no)
-{
- return (struct vb2_dma_sg_desc *)vb2_plane_cookie(vb, plane_no);
-}
-
-extern const struct vb2_mem_ops vb2_dma_sg_memops;
-
-#endif
diff --git a/include/media/videobuf2-memops.h b/include/media/videobuf2-memops.h
deleted file mode 100644
index f05444ca..00000000
--- a/include/media/videobuf2-memops.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * videobuf2-memops.h - generic memory handling routines for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- * Marek Szyprowski <m.szyprowski@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#ifndef _MEDIA_VIDEOBUF2_MEMOPS_H
-#define _MEDIA_VIDEOBUF2_MEMOPS_H
-
-#include <media/videobuf2-core.h>
-
-/**
- * vb2_vmarea_handler - common vma refcount tracking handler
- * @refcount: pointer to refcount entry in the buffer
- * @put: callback to function that decreases buffer refcount
- * @arg: argument for @put callback
- */
-struct vb2_vmarea_handler {
- atomic_t *refcount;
- void (*put)(void *arg);
- void *arg;
-};
-
-extern const struct vm_operations_struct vb2_common_vm_ops;
-
-int vb2_get_contig_userptr(unsigned long vaddr, unsigned long size,
- struct vm_area_struct **res_vma, dma_addr_t *res_pa);
-
-struct vm_area_struct *vb2_get_vma(struct vm_area_struct *vma);
-void vb2_put_vma(struct vm_area_struct *vma);
-
-
-#endif
diff --git a/include/media/videobuf2-vmalloc.h b/include/media/videobuf2-vmalloc.h
deleted file mode 100644
index 93a76b43..00000000
--- a/include/media/videobuf2-vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * videobuf2-vmalloc.h - vmalloc memory allocator for videobuf2
- *
- * Copyright (C) 2010 Samsung Electronics
- *
- * Author: Pawel Osciak <pawel@osciak.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation.
- */
-
-#ifndef _MEDIA_VIDEOBUF2_VMALLOC_H
-#define _MEDIA_VIDEOBUF2_VMALLOC_H
-
-#include <media/videobuf2-core.h>
-
-extern const struct vb2_mem_ops vb2_vmalloc_memops;
-
-#endif
diff --git a/include/net/irda/irlmp.h b/include/net/irda/irlmp.h
index f132924c..f7410914 100644
--- a/include/net/irda/irlmp.h
+++ b/include/net/irda/irlmp.h
@@ -256,8 +256,7 @@ static inline __u32 irlmp_get_daddr(const struct lsap_cb *self)
return (self && self->lap) ? self->lap->daddr : 0;
}
-const char *irlmp_reason_str(LM_REASON reason);
-
+extern const char *irlmp_reasons[];
extern int sysctl_discovery_timeout;
extern int sysctl_discovery_slots;
extern int sysctl_discovery;
diff --git a/include/net/iucv/af_iucv.h b/include/net/iucv/af_iucv.h
index 714cc9a5..cc7c1973 100644
--- a/include/net/iucv/af_iucv.h
+++ b/include/net/iucv/af_iucv.h
@@ -130,14 +130,6 @@ struct iucv_sock {
enum iucv_tx_notify n);
};
-struct iucv_skb_cb {
- u32 class; /* target class of message */
- u32 tag; /* tag associated with message */
- u32 offset; /* offset for skb receival */
-};
-
-#define IUCV_SKB_CB(__skb) ((struct iucv_skb_cb *)&((__skb)->cb[0]))
-
/* iucv socket options (SOL_IUCV) */
#define SO_IPRMDATA_MSG 0x0080 /* send/recv IPRM_DATA msgs */
#define SO_MSGLIMIT 0x1000 /* get/set IUCV MSGLIMIT */
diff --git a/include/net/scm.h b/include/net/scm.h
index b1170810..975cca01 100644
--- a/include/net/scm.h
+++ b/include/net/scm.h
@@ -56,8 +56,8 @@ static __inline__ void scm_set_cred(struct scm_cookie *scm,
scm->pid = get_pid(pid);
scm->cred = cred ? get_cred(cred) : NULL;
scm->creds.pid = pid_vnr(pid);
- scm->creds.uid = cred ? cred->uid : INVALID_UID;
- scm->creds.gid = cred ? cred->gid : INVALID_GID;
+ scm->creds.uid = cred ? cred->euid : INVALID_UID;
+ scm->creds.gid = cred ? cred->egid : INVALID_GID;
}
static __inline__ void scm_destroy_cred(struct scm_cookie *scm)
diff --git a/include/trace/events/block.h b/include/trace/events/block.h
index 9c146735..99617265 100644
--- a/include/trace/events/block.h
+++ b/include/trace/events/block.h
@@ -257,7 +257,6 @@ TRACE_EVENT(block_bio_bounce,
/**
* block_bio_complete - completed all work on the block operation
- * @q: queue holding the block operation
* @bio: block operation completed
* @error: io error value
*
@@ -266,9 +265,9 @@ TRACE_EVENT(block_bio_bounce,
*/
TRACE_EVENT(block_bio_complete,
- TP_PROTO(struct request_queue *q, struct bio *bio, int error),
+ TP_PROTO(struct bio *bio, int error),
- TP_ARGS(q, bio, error),
+ TP_ARGS(bio, error),
TP_STRUCT__entry(
__field( dev_t, dev )
@@ -279,7 +278,8 @@ TRACE_EVENT(block_bio_complete,
),
TP_fast_assign(
- __entry->dev = bio->bi_bdev->bd_dev;
+ __entry->dev = bio->bi_bdev ?
+ bio->bi_bdev->bd_dev : 0;
__entry->sector = bio->bi_sector;
__entry->nr_sector = bio->bi_size >> 9;
__entry->error = error;
diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h
index e5586caf..5a8671e8 100644
--- a/include/trace/events/sched.h
+++ b/include/trace/events/sched.h
@@ -147,7 +147,7 @@ TRACE_EVENT(sched_switch,
__print_flags(__entry->prev_state & (TASK_STATE_MAX-1), "|",
{ 1, "S"} , { 2, "D" }, { 4, "T" }, { 8, "t" },
{ 16, "Z" }, { 32, "X" }, { 64, "x" },
- { 128, "K" }, { 256, "W" }, { 512, "P" }) : "R",
+ { 128, "W" }) : "R",
__entry->prev_state & TASK_STATE_MAX ? "+" : "",
__entry->next_comm, __entry->next_pid, __entry->next_prio)
);
diff --git a/include/uapi/linux/davinci_vpfe_user.h b/include/uapi/linux/davinci_vpfe_user.h
new file mode 100644
index 00000000..7b7e7b26
--- /dev/null
+++ b/include/uapi/linux/davinci_vpfe_user.h
@@ -0,0 +1,1290 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Contributors:
+ * Manjunath Hadli <manjunath.hadli@ti.com>
+ * Prabhakar Lad <prabhakar.lad@ti.com>
+ */
+
+#ifndef _DAVINCI_VPFE_USER_H
+#define _DAVINCI_VPFE_USER_H
+
+#include <linux/types.h>
+#include <linux/videodev2.h>
+
+/*
+ * Private IOCTL
+ *
+ * VIDIOC_VPFE_ISIF_S_RAW_PARAMS: Set raw params in isif
+ * VIDIOC_VPFE_ISIF_G_RAW_PARAMS: Get raw params from isif
+ * VIDIOC_VPFE_PRV_S_CONFIG: Set ipipe engine configuration
+ * VIDIOC_VPFE_PRV_G_CONFIG: Get ipipe engine configuration
+ * VIDIOC_VPFE_RSZ_S_CONFIG: Set resizer engine configuration
+ * VIDIOC_VPFE_RSZ_G_CONFIG: Get resizer engine configuration
+ */
+
+#define VIDIOC_VPFE_ISIF_S_RAW_PARAMS \
+ _IOW('V', BASE_VIDIOC_PRIVATE + 1, struct vpfe_isif_raw_config)
+#define VIDIOC_VPFE_ISIF_G_RAW_PARAMS \
+ _IOR('V', BASE_VIDIOC_PRIVATE + 2, struct vpfe_isif_raw_config)
+#define VIDIOC_VPFE_IPIPE_S_CONFIG \
+ _IOWR('P', BASE_VIDIOC_PRIVATE + 3, struct vpfe_ipipe_config)
+#define VIDIOC_VPFE_IPIPE_G_CONFIG \
+ _IOWR('P', BASE_VIDIOC_PRIVATE + 4, struct vpfe_ipipe_config)
+#define VIDIOC_VPFE_RSZ_S_CONFIG \
+ _IOWR('R', BASE_VIDIOC_PRIVATE + 5, struct vpfe_rsz_config)
+#define VIDIOC_VPFE_RSZ_G_CONFIG \
+ _IOWR('R', BASE_VIDIOC_PRIVATE + 6, struct vpfe_rsz_config)
+
+/*
+ * Private Control's for ISIF
+ */
+#define VPFE_ISIF_CID_CRGAIN (V4L2_CID_USER_BASE | 0xa001)
+#define VPFE_ISIF_CID_CGRGAIN (V4L2_CID_USER_BASE | 0xa002)
+#define VPFE_ISIF_CID_CGBGAIN (V4L2_CID_USER_BASE | 0xa003)
+#define VPFE_ISIF_CID_CBGAIN (V4L2_CID_USER_BASE | 0xa004)
+#define VPFE_ISIF_CID_GAIN_OFFSET (V4L2_CID_USER_BASE | 0xa005)
+
+/*
+ * Private Control's for ISIF and IPIPEIF
+ */
+#define VPFE_CID_DPCM_PREDICTOR (V4L2_CID_USER_BASE | 0xa006)
+
+/************************************************************************
+ * Vertical Defect Correction parameters
+ ***********************************************************************/
+
+/**
+ * vertical defect correction methods
+ */
+enum vpfe_isif_vdfc_corr_mode {
+ /* Defect level subtraction. Just fed through if saturating */
+ VPFE_ISIF_VDFC_NORMAL,
+ /**
+ * Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2
+ * if data saturating
+ */
+ VPFE_ISIF_VDFC_HORZ_INTERPOL_IF_SAT,
+ /* Horizontal interpolation (((i-2)+(i+2))/2) */
+ VPFE_ISIF_VDFC_HORZ_INTERPOL
+};
+
+/**
+ * Max Size of the Vertical Defect Correction table
+ */
+#define VPFE_ISIF_VDFC_TABLE_SIZE 8
+
+/**
+ * Values used for shifting up the vdfc defect level
+ */
+enum vpfe_isif_vdfc_shift {
+ /* No Shift */
+ VPFE_ISIF_VDFC_NO_SHIFT,
+ /* Shift by 1 bit */
+ VPFE_ISIF_VDFC_SHIFT_1,
+ /* Shift by 2 bit */
+ VPFE_ISIF_VDFC_SHIFT_2,
+ /* Shift by 3 bit */
+ VPFE_ISIF_VDFC_SHIFT_3,
+ /* Shift by 4 bit */
+ VPFE_ISIF_VDFC_SHIFT_4
+};
+
+/**
+ * Defect Correction (DFC) table entry
+ */
+struct vpfe_isif_vdfc_entry {
+ /* vertical position of defect */
+ unsigned short pos_vert;
+ /* horizontal position of defect */
+ unsigned short pos_horz;
+ /**
+ * Defect level of Vertical line defect position. This is subtracted
+ * from the data at the defect position
+ */
+ unsigned char level_at_pos;
+ /**
+ * Defect level of the pixels upper than the vertical line defect.
+ * This is subtracted from the data
+ */
+ unsigned char level_up_pixels;
+ /**
+ * Defect level of the pixels lower than the vertical line defect.
+ * This is subtracted from the data
+ */
+ unsigned char level_low_pixels;
+};
+
+/**
+ * Structure for Defect Correction (DFC) parameter
+ */
+struct vpfe_isif_dfc {
+ /* enable vertical defect correction */
+ unsigned char en;
+ /* Correction methods */
+ enum vpfe_isif_vdfc_corr_mode corr_mode;
+ /**
+ * 0 - whole line corrected, 1 - not
+ * pixels upper than the defect
+ */
+ unsigned char corr_whole_line;
+ /**
+ * defect level shift value. level_at_pos, level_upper_pos,
+ * and level_lower_pos can be shifted up by this value
+ */
+ enum vpfe_isif_vdfc_shift def_level_shift;
+ /* defect saturation level */
+ unsigned short def_sat_level;
+ /* number of vertical defects. Max is VPFE_ISIF_VDFC_TABLE_SIZE */
+ short num_vdefects;
+ /* VDFC table ptr */
+ struct vpfe_isif_vdfc_entry table[VPFE_ISIF_VDFC_TABLE_SIZE];
+};
+
+/************************************************************************
+* Digital/Black clamp or DC Subtract parameters
+************************************************************************/
+/**
+ * Horizontal Black Clamp modes
+ */
+enum vpfe_isif_horz_bc_mode {
+ /**
+ * Horizontal clamp disabled. Only vertical clamp
+ * value is subtracted
+ */
+ VPFE_ISIF_HORZ_BC_DISABLE,
+ /**
+ * Horizontal clamp value is calculated and subtracted
+ * from image data along with vertical clamp value
+ */
+ VPFE_ISIF_HORZ_BC_CLAMP_CALC_ENABLED,
+ /**
+ * Horizontal clamp value calculated from previous image
+ * is subtracted from image data along with vertical clamp
+ * value. How the horizontal clamp value for the first image
+ * is calculated in this case ???
+ */
+ VPFE_ISIF_HORZ_BC_CLAMP_NOT_UPDATED
+};
+
+/**
+ * Base window selection for Horizontal Black Clamp calculations
+ */
+enum vpfe_isif_horz_bc_base_win_sel {
+ /* Select Most left window for bc calculation */
+ VPFE_ISIF_SEL_MOST_LEFT_WIN,
+
+ /* Select Most right window for bc calculation */
+ VPFE_ISIF_SEL_MOST_RIGHT_WIN,
+};
+
+/* Size of window in horizontal direction for horizontal bc */
+enum vpfe_isif_horz_bc_sz_h {
+ VPFE_ISIF_HORZ_BC_SZ_H_2PIXELS,
+ VPFE_ISIF_HORZ_BC_SZ_H_4PIXELS,
+ VPFE_ISIF_HORZ_BC_SZ_H_8PIXELS,
+ VPFE_ISIF_HORZ_BC_SZ_H_16PIXELS
+};
+
+/* Size of window in vertcal direction for vertical bc */
+enum vpfe_isif_horz_bc_sz_v {
+ VPFE_ISIF_HORZ_BC_SZ_H_32PIXELS,
+ VPFE_ISIF_HORZ_BC_SZ_H_64PIXELS,
+ VPFE_ISIF_HORZ_BC_SZ_H_128PIXELS,
+ VPFE_ISIF_HORZ_BC_SZ_H_256PIXELS
+};
+
+/**
+ * Structure for Horizontal Black Clamp config params
+ */
+struct vpfe_isif_horz_bclamp {
+ /* horizontal clamp mode */
+ enum vpfe_isif_horz_bc_mode mode;
+ /**
+ * pixel value limit enable.
+ * 0 - limit disabled
+ * 1 - pixel value limited to 1023
+ */
+ unsigned char clamp_pix_limit;
+ /**
+ * Select most left or right window for clamp val
+ * calculation
+ */
+ enum vpfe_isif_horz_bc_base_win_sel base_win_sel_calc;
+ /* Window count per color for calculation. range 1-32 */
+ unsigned char win_count_calc;
+ /* Window start position - horizontal for calculation. 0 - 8191 */
+ unsigned short win_start_h_calc;
+ /* Window start position - vertical for calculation 0 - 8191 */
+ unsigned short win_start_v_calc;
+ /* Width of the sample window in pixels for calculation */
+ enum vpfe_isif_horz_bc_sz_h win_h_sz_calc;
+ /* Height of the sample window in pixels for calculation */
+ enum vpfe_isif_horz_bc_sz_v win_v_sz_calc;
+};
+
+/**
+ * Black Clamp vertical reset values
+ */
+enum vpfe_isif_vert_bc_reset_val_sel {
+ /* Reset value used is the clamp value calculated */
+ VPFE_ISIF_VERT_BC_USE_HORZ_CLAMP_VAL,
+ /* Reset value used is reset_clamp_val configured */
+ VPFE_ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL,
+ /* No update, previous image value is used */
+ VPFE_ISIF_VERT_BC_NO_UPDATE
+};
+
+enum vpfe_isif_vert_bc_sz_h {
+ VPFE_ISIF_VERT_BC_SZ_H_2PIXELS,
+ VPFE_ISIF_VERT_BC_SZ_H_4PIXELS,
+ VPFE_ISIF_VERT_BC_SZ_H_8PIXELS,
+ VPFE_ISIF_VERT_BC_SZ_H_16PIXELS,
+ VPFE_ISIF_VERT_BC_SZ_H_32PIXELS,
+ VPFE_ISIF_VERT_BC_SZ_H_64PIXELS
+};
+
+/**
+ * Structure for Vertical Black Clamp configuration params
+ */
+struct vpfe_isif_vert_bclamp {
+ /* Reset value selection for vertical clamp calculation */
+ enum vpfe_isif_vert_bc_reset_val_sel reset_val_sel;
+ /* U12 value if reset_sel = ISIF_BC_VERT_USE_CONFIG_CLAMP_VAL */
+ unsigned short reset_clamp_val;
+ /**
+ * U8Q8. Line average coefficient used in vertical clamp
+ * calculation
+ */
+ unsigned char line_ave_coef;
+ /* Width in pixels of the optical black region used for calculation. */
+ enum vpfe_isif_vert_bc_sz_h ob_h_sz_calc;
+ /* Height of the optical black region for calculation */
+ unsigned short ob_v_sz_calc;
+ /* Optical black region start position - horizontal. 0 - 8191 */
+ unsigned short ob_start_h;
+ /* Optical black region start position - vertical 0 - 8191 */
+ unsigned short ob_start_v;
+};
+
+/**
+ * Structure for Black Clamp configuration params
+ */
+struct vpfe_isif_black_clamp {
+ /**
+ * this offset value is added irrespective of the clamp
+ * enable status. S13
+ */
+ unsigned short dc_offset;
+ /**
+ * Enable black/digital clamp value to be subtracted
+ * from the image data
+ */
+ unsigned char en;
+ /**
+ * black clamp mode. same/separate clamp for 4 colors
+ * 0 - disable - same clamp value for all colors
+ * 1 - clamp value calculated separately for all colors
+ */
+ unsigned char bc_mode_color;
+ /* Vertical start position for bc subtraction */
+ unsigned short vert_start_sub;
+ /* Black clamp for horizontal direction */
+ struct vpfe_isif_horz_bclamp horz;
+ /* Black clamp for vertical direction */
+ struct vpfe_isif_vert_bclamp vert;
+};
+
+/*************************************************************************
+** Color Space Conversion (CSC)
+*************************************************************************/
+/**
+ * Number of Coefficient values used for CSC
+ */
+#define VPFE_ISIF_CSC_NUM_COEFF 16
+
+struct float_8_bit {
+ /* 8 bit integer part */
+ __u8 integer;
+ /* 8 bit decimal part */
+ __u8 decimal;
+};
+
+struct float_16_bit {
+ /* 16 bit integer part */
+ __u16 integer;
+ /* 16 bit decimal part */
+ __u16 decimal;
+};
+
+/*************************************************************************
+** Color Space Conversion parameters
+*************************************************************************/
+/**
+ * Structure used for CSC config params
+ */
+struct vpfe_isif_color_space_conv {
+ /* Enable color space conversion */
+ unsigned char en;
+ /**
+ * csc coefficient table. S8Q5, M00 at index 0, M01 at index 1, and
+ * so forth
+ */
+ struct float_8_bit coeff[VPFE_ISIF_CSC_NUM_COEFF];
+};
+
+enum vpfe_isif_datasft {
+ /* No Shift */
+ VPFE_ISIF_NO_SHIFT,
+ /* 1 bit Shift */
+ VPFE_ISIF_1BIT_SHIFT,
+ /* 2 bit Shift */
+ VPFE_ISIF_2BIT_SHIFT,
+ /* 3 bit Shift */
+ VPFE_ISIF_3BIT_SHIFT,
+ /* 4 bit Shift */
+ VPFE_ISIF_4BIT_SHIFT,
+ /* 5 bit Shift */
+ VPFE_ISIF_5BIT_SHIFT,
+ /* 6 bit Shift */
+ VPFE_ISIF_6BIT_SHIFT
+};
+
+#define VPFE_ISIF_LINEAR_TAB_SIZE 192
+/*************************************************************************
+** Linearization parameters
+*************************************************************************/
+/**
+ * Structure for Sensor data linearization
+ */
+struct vpfe_isif_linearize {
+ /* Enable or Disable linearization of data */
+ unsigned char en;
+ /* Shift value applied */
+ enum vpfe_isif_datasft corr_shft;
+ /* scale factor applied U11Q10 */
+ struct float_16_bit scale_fact;
+ /* Size of the linear table */
+ unsigned short table[VPFE_ISIF_LINEAR_TAB_SIZE];
+};
+
+/*************************************************************************
+** ISIF Raw configuration parameters
+*************************************************************************/
+enum vpfe_isif_fmt_mode {
+ VPFE_ISIF_SPLIT,
+ VPFE_ISIF_COMBINE
+};
+
+enum vpfe_isif_lnum {
+ VPFE_ISIF_1LINE,
+ VPFE_ISIF_2LINES,
+ VPFE_ISIF_3LINES,
+ VPFE_ISIF_4LINES
+};
+
+enum vpfe_isif_line {
+ VPFE_ISIF_1STLINE,
+ VPFE_ISIF_2NDLINE,
+ VPFE_ISIF_3RDLINE,
+ VPFE_ISIF_4THLINE
+};
+
+struct vpfe_isif_fmtplen {
+ /**
+ * number of program entries for SET0, range 1 - 16
+ * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
+ * ISIF_COMBINE
+ */
+ unsigned short plen0;
+ /**
+ * number of program entries for SET1, range 1 - 16
+ * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
+ * ISIF_COMBINE
+ */
+ unsigned short plen1;
+ /**
+ * number of program entries for SET2, range 1 - 16
+ * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
+ * ISIF_COMBINE
+ */
+ unsigned short plen2;
+ /**
+ * number of program entries for SET3, range 1 - 16
+ * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
+ * ISIF_COMBINE
+ */
+ unsigned short plen3;
+};
+
+struct vpfe_isif_fmt_cfg {
+ /* Split or combine or line alternate */
+ enum vpfe_isif_fmt_mode fmtmode;
+ /* enable or disable line alternating mode */
+ unsigned char ln_alter_en;
+ /* Split/combine line number */
+ enum vpfe_isif_lnum lnum;
+ /* Address increment Range 1 - 16 */
+ unsigned int addrinc;
+};
+
+struct vpfe_isif_fmt_addr_ptr {
+ /* Initial address */
+ unsigned int init_addr;
+ /* output line number */
+ enum vpfe_isif_line out_line;
+};
+
+struct vpfe_isif_fmtpgm_ap {
+ /* program address pointer */
+ unsigned char pgm_aptr;
+ /* program address increment or decrement */
+ unsigned char pgmupdt;
+};
+
+struct vpfe_isif_data_formatter {
+ /* Enable/Disable data formatter */
+ unsigned char en;
+ /* data formatter configuration */
+ struct vpfe_isif_fmt_cfg cfg;
+ /* Formatter program entries length */
+ struct vpfe_isif_fmtplen plen;
+ /* first pixel in a line fed to formatter */
+ unsigned short fmtrlen;
+ /* HD interval for output line. Only valid when split line */
+ unsigned short fmthcnt;
+ /* formatter address pointers */
+ struct vpfe_isif_fmt_addr_ptr fmtaddr_ptr[16];
+ /* program enable/disable */
+ unsigned char pgm_en[32];
+ /* program address pointers */
+ struct vpfe_isif_fmtpgm_ap fmtpgm_ap[32];
+};
+
+struct vpfe_isif_df_csc {
+ /* Color Space Conversion configuration, 0 - csc, 1 - df */
+ unsigned int df_or_csc;
+ /* csc configuration valid if df_or_csc is 0 */
+ struct vpfe_isif_color_space_conv csc;
+ /* data formatter configuration valid if df_or_csc is 1 */
+ struct vpfe_isif_data_formatter df;
+ /* start pixel in a line at the input */
+ unsigned int start_pix;
+ /* number of pixels in input line */
+ unsigned int num_pixels;
+ /* start line at the input */
+ unsigned int start_line;
+ /* number of lines at the input */
+ unsigned int num_lines;
+};
+
+struct vpfe_isif_gain_offsets_adj {
+ /* Enable or Disable Gain adjustment for SDRAM data */
+ unsigned char gain_sdram_en;
+ /* Enable or Disable Gain adjustment for IPIPE data */
+ unsigned char gain_ipipe_en;
+ /* Enable or Disable Gain adjustment for H3A data */
+ unsigned char gain_h3a_en;
+ /* Enable or Disable Gain adjustment for SDRAM data */
+ unsigned char offset_sdram_en;
+ /* Enable or Disable Gain adjustment for IPIPE data */
+ unsigned char offset_ipipe_en;
+ /* Enable or Disable Gain adjustment for H3A data */
+ unsigned char offset_h3a_en;
+};
+
+struct vpfe_isif_cul {
+ /* Horizontal Cull pattern for odd lines */
+ unsigned char hcpat_odd;
+ /* Horizontal Cull pattern for even lines */
+ unsigned char hcpat_even;
+ /* Vertical Cull pattern */
+ unsigned char vcpat;
+ /* Enable or disable lpf. Apply when cull is enabled */
+ unsigned char en_lpf;
+};
+
+/* all the stuff in this struct will be provided by userland */
+struct vpfe_isif_raw_config {
+ /* Linearization parameters for image sensor data input */
+ struct vpfe_isif_linearize linearize;
+ /* Data formatter or CSC */
+ struct vpfe_isif_df_csc df_csc;
+ /* Defect Pixel Correction (DFC) confguration */
+ struct vpfe_isif_dfc dfc;
+ /* Black/Digital Clamp configuration */
+ struct vpfe_isif_black_clamp bclamp;
+ /* Gain, offset adjustments */
+ struct vpfe_isif_gain_offsets_adj gain_offset;
+ /* Culling */
+ struct vpfe_isif_cul culling;
+ /* horizontal offset for Gain/LSC/DFC */
+ unsigned short horz_offset;
+ /* vertical offset for Gain/LSC/DFC */
+ unsigned short vert_offset;
+};
+
+/**********************************************************************
+ IPIPE API Structures
+**********************************************************************/
+
+/* IPIPE module configurations */
+
+/* IPIPE input configuration */
+#define VPFE_IPIPE_INPUT_CONFIG (1 << 0)
+/* LUT based Defect Pixel Correction */
+#define VPFE_IPIPE_LUTDPC (1 << 1)
+/* On the fly (OTF) Defect Pixel Correction */
+#define VPFE_IPIPE_OTFDPC (1 << 2)
+/* Noise Filter - 1 */
+#define VPFE_IPIPE_NF1 (1 << 3)
+/* Noise Filter - 2 */
+#define VPFE_IPIPE_NF2 (1 << 4)
+/* White Balance. Also a control ID */
+#define VPFE_IPIPE_WB (1 << 5)
+/* 1st RGB to RBG Blend module */
+#define VPFE_IPIPE_RGB2RGB_1 (1 << 6)
+/* 2nd RGB to RBG Blend module */
+#define VPFE_IPIPE_RGB2RGB_2 (1 << 7)
+/* Gamma Correction */
+#define VPFE_IPIPE_GAMMA (1 << 8)
+/* 3D LUT color conversion */
+#define VPFE_IPIPE_3D_LUT (1 << 9)
+/* RGB to YCbCr module */
+#define VPFE_IPIPE_RGB2YUV (1 << 10)
+/* YUV 422 conversion module */
+#define VPFE_IPIPE_YUV422_CONV (1 << 11)
+/* Edge Enhancement */
+#define VPFE_IPIPE_YEE (1 << 12)
+/* Green Imbalance Correction */
+#define VPFE_IPIPE_GIC (1 << 13)
+/* CFA Interpolation */
+#define VPFE_IPIPE_CFA (1 << 14)
+/* Chroma Artifact Reduction */
+#define VPFE_IPIPE_CAR (1 << 15)
+/* Chroma Gain Suppression */
+#define VPFE_IPIPE_CGS (1 << 16)
+/* Global brightness and contrast control */
+#define VPFE_IPIPE_GBCE (1 << 17)
+
+#define VPFE_IPIPE_MAX_MODULES 18
+
+struct ipipe_float_u16 {
+ unsigned short integer;
+ unsigned short decimal;
+};
+
+struct ipipe_float_s16 {
+ short integer;
+ unsigned short decimal;
+};
+
+struct ipipe_float_u8 {
+ unsigned char integer;
+ unsigned char decimal;
+};
+
+/* Copy method selection for vertical correction
+ * Used when ipipe_dfc_corr_meth is IPIPE_DPC_CTORB_AFTER_HINT
+ */
+enum vpfe_ipipe_dpc_corr_meth {
+ /* replace by black or white dot specified by repl_white */
+ VPFE_IPIPE_DPC_REPL_BY_DOT = 0,
+ /* Copy from left */
+ VPFE_IPIPE_DPC_CL = 1,
+ /* Copy from right */
+ VPFE_IPIPE_DPC_CR = 2,
+ /* Horizontal interpolation */
+ VPFE_IPIPE_DPC_H_INTP = 3,
+ /* Vertical interpolation */
+ VPFE_IPIPE_DPC_V_INTP = 4,
+ /* Copy from top */
+ VPFE_IPIPE_DPC_CT = 5,
+ /* Copy from bottom */
+ VPFE_IPIPE_DPC_CB = 6,
+ /* 2D interpolation */
+ VPFE_IPIPE_DPC_2D_INTP = 7,
+};
+
+struct vpfe_ipipe_lutdpc_entry {
+ /* Horizontal position */
+ unsigned short horz_pos;
+ /* vertical position */
+ unsigned short vert_pos;
+ enum vpfe_ipipe_dpc_corr_meth method;
+};
+
+#define VPFE_IPIPE_MAX_SIZE_DPC 256
+
+/* Structure for configuring DPC module */
+struct vpfe_ipipe_lutdpc {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* 0 - replace with black dot, 1 - white dot when correction
+ * method is IPIPE_DFC_REPL_BY_DOT=0,
+ */
+ unsigned char repl_white;
+ /* number of entries in the correction table. Currently only
+ * support up-to 256 entries. infinite mode is not supported
+ */
+ unsigned short dpc_size;
+ struct vpfe_ipipe_lutdpc_entry table[VPFE_IPIPE_MAX_SIZE_DPC];
+};
+
+enum vpfe_ipipe_otfdpc_det_meth {
+ VPFE_IPIPE_DPC_OTF_MIN_MAX,
+ VPFE_IPIPE_DPC_OTF_MIN_MAX2
+};
+
+struct vpfe_ipipe_otfdpc_thr {
+ unsigned short r;
+ unsigned short gr;
+ unsigned short gb;
+ unsigned short b;
+};
+
+enum vpfe_ipipe_otfdpc_alg {
+ VPFE_IPIPE_OTFDPC_2_0,
+ VPFE_IPIPE_OTFDPC_3_0
+};
+
+struct vpfe_ipipe_otfdpc_2_0_cfg {
+ /* defect detection threshold for MIN_MAX2 method (DPC 2.0 alg) */
+ struct vpfe_ipipe_otfdpc_thr det_thr;
+ /* defect correction threshold for MIN_MAX2 method (DPC 2.0 alg) or
+ * maximum value for MIN_MAX method
+ */
+ struct vpfe_ipipe_otfdpc_thr corr_thr;
+};
+
+struct vpfe_ipipe_otfdpc_3_0_cfg {
+ /* DPC3.0 activity adj shf. activity = (max2-min2) >> (6 -shf)
+ */
+ unsigned char act_adj_shf;
+ /* DPC3.0 detection threshold, THR */
+ unsigned short det_thr;
+ /* DPC3.0 detection threshold slope, SLP */
+ unsigned short det_slp;
+ /* DPC3.0 detection threshold min, MIN */
+ unsigned short det_thr_min;
+ /* DPC3.0 detection threshold max, MAX */
+ unsigned short det_thr_max;
+ /* DPC3.0 correction threshold, THR */
+ unsigned short corr_thr;
+ /* DPC3.0 correction threshold slope, SLP */
+ unsigned short corr_slp;
+ /* DPC3.0 correction threshold min, MIN */
+ unsigned short corr_thr_min;
+ /* DPC3.0 correction threshold max, MAX */
+ unsigned short corr_thr_max;
+};
+
+struct vpfe_ipipe_otfdpc {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* defect detection method */
+ enum vpfe_ipipe_otfdpc_det_meth det_method;
+ /* Algorithm used. Applicable only when IPIPE_DPC_OTF_MIN_MAX2 is
+ * used
+ */
+ enum vpfe_ipipe_otfdpc_alg alg;
+ union {
+ /* if alg is IPIPE_OTFDPC_2_0 */
+ struct vpfe_ipipe_otfdpc_2_0_cfg dpc_2_0;
+ /* if alg is IPIPE_OTFDPC_3_0 */
+ struct vpfe_ipipe_otfdpc_3_0_cfg dpc_3_0;
+ } alg_cfg;
+};
+
+/* Threshold values table size */
+#define VPFE_IPIPE_NF_THR_TABLE_SIZE 8
+/* Intensity values table size */
+#define VPFE_IPIPE_NF_STR_TABLE_SIZE 8
+
+/* NF, sampling method for green pixels */
+enum vpfe_ipipe_nf_sampl_meth {
+ /* Same as R or B */
+ VPFE_IPIPE_NF_BOX,
+ /* Diamond mode */
+ VPFE_IPIPE_NF_DIAMOND
+};
+
+/* Structure for configuring NF module */
+struct vpfe_ipipe_nf {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* Sampling method for green pixels */
+ enum vpfe_ipipe_nf_sampl_meth gr_sample_meth;
+ /* Down shift value in LUT reference address
+ */
+ unsigned char shft_val;
+ /* Spread value in NF algorithm
+ */
+ unsigned char spread_val;
+ /* Apply LSC gain to threshold. Enable this only if
+ * LSC is enabled in ISIF
+ */
+ unsigned char apply_lsc_gain;
+ /* Threshold values table */
+ unsigned short thr[VPFE_IPIPE_NF_THR_TABLE_SIZE];
+ /* intensity values table */
+ unsigned char str[VPFE_IPIPE_NF_STR_TABLE_SIZE];
+ /* Edge detection minimum threshold */
+ unsigned short edge_det_min_thr;
+ /* Edge detection maximum threshold */
+ unsigned short edge_det_max_thr;
+};
+
+enum vpfe_ipipe_gic_alg {
+ VPFE_IPIPE_GIC_ALG_CONST_GAIN,
+ VPFE_IPIPE_GIC_ALG_ADAPT_GAIN
+};
+
+enum vpfe_ipipe_gic_thr_sel {
+ VPFE_IPIPE_GIC_THR_REG,
+ VPFE_IPIPE_GIC_THR_NF
+};
+
+enum vpfe_ipipe_gic_wt_fn_type {
+ /* Use difference as index */
+ VPFE_IPIPE_GIC_WT_FN_TYP_DIF,
+ /* Use weight function as index */
+ VPFE_IPIPE_GIC_WT_FN_TYP_HP_VAL
+};
+
+/* structure for Green Imbalance Correction */
+struct vpfe_ipipe_gic {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* 0 - Constant gain , 1 - Adaptive gain algorithm */
+ enum vpfe_ipipe_gic_alg gic_alg;
+ /* GIC gain or weight. Used for Constant gain and Adaptive algorithms
+ */
+ unsigned short gain;
+ /* Threshold selection. GIC register values or NF2 thr table */
+ enum vpfe_ipipe_gic_thr_sel thr_sel;
+ /* thr1. Used when thr_sel is IPIPE_GIC_THR_REG */
+ unsigned short thr;
+ /* this value is used for thr2-thr1, thr3-thr2 or
+ * thr4-thr3 when wt_fn_type is index. Otherwise it
+ * is the
+ */
+ unsigned short slope;
+ /* Apply LSC gain to threshold. Enable this only if
+ * LSC is enabled in ISIF & thr_sel is IPIPE_GIC_THR_REG
+ */
+ unsigned char apply_lsc_gain;
+ /* Multiply Nf2 threshold by this gain. Use this when thr_sel
+ * is IPIPE_GIC_THR_NF
+ */
+ struct ipipe_float_u8 nf2_thr_gain;
+ /* Weight function uses difference as index or high pass value.
+ * Used for adaptive gain algorithm
+ */
+ enum vpfe_ipipe_gic_wt_fn_type wt_fn_type;
+};
+
+/* Structure for configuring WB module */
+struct vpfe_ipipe_wb {
+ /* Offset (S12) for R */
+ short ofst_r;
+ /* Offset (S12) for Gr */
+ short ofst_gr;
+ /* Offset (S12) for Gb */
+ short ofst_gb;
+ /* Offset (S12) for B */
+ short ofst_b;
+ /* Gain (U13Q9) for Red */
+ struct ipipe_float_u16 gain_r;
+ /* Gain (U13Q9) for Gr */
+ struct ipipe_float_u16 gain_gr;
+ /* Gain (U13Q9) for Gb */
+ struct ipipe_float_u16 gain_gb;
+ /* Gain (U13Q9) for Blue */
+ struct ipipe_float_u16 gain_b;
+};
+
+enum vpfe_ipipe_cfa_alg {
+ /* Algorithm is 2DirAC */
+ VPFE_IPIPE_CFA_ALG_2DIRAC,
+ /* Algorithm is 2DirAC + Digital Antialiasing (DAA) */
+ VPFE_IPIPE_CFA_ALG_2DIRAC_DAA,
+ /* Algorithm is DAA */
+ VPFE_IPIPE_CFA_ALG_DAA
+};
+
+/* Structure for CFA Interpolation */
+struct vpfe_ipipe_cfa {
+ /* 2DirAC or 2DirAC + DAA */
+ enum vpfe_ipipe_cfa_alg alg;
+ /* 2Dir CFA HP value Low Threshold */
+ unsigned short hpf_thr_2dir;
+ /* 2Dir CFA HP value slope */
+ unsigned short hpf_slp_2dir;
+ /* 2Dir CFA HP mix threshold */
+ unsigned short hp_mix_thr_2dir;
+ /* 2Dir CFA HP mix slope */
+ unsigned short hp_mix_slope_2dir;
+ /* 2Dir Direction threshold */
+ unsigned short dir_thr_2dir;
+ /* 2Dir Direction slope */
+ unsigned short dir_slope_2dir;
+ /* 2Dir Non Directional Weight */
+ unsigned short nd_wt_2dir;
+ /* DAA Mono Hue Fraction */
+ unsigned short hue_fract_daa;
+ /* DAA Mono Edge threshold */
+ unsigned short edge_thr_daa;
+ /* DAA Mono threshold minimum */
+ unsigned short thr_min_daa;
+ /* DAA Mono threshold slope */
+ unsigned short thr_slope_daa;
+ /* DAA Mono slope minimum */
+ unsigned short slope_min_daa;
+ /* DAA Mono slope slope */
+ unsigned short slope_slope_daa;
+ /* DAA Mono LP wight */
+ unsigned short lp_wt_daa;
+};
+
+/* Struct for configuring RGB2RGB blending module */
+struct vpfe_ipipe_rgb2rgb {
+ /* Matrix coefficient for RR S12Q8 for ID = 1 and S11Q8 for ID = 2 */
+ struct ipipe_float_s16 coef_rr;
+ /* Matrix coefficient for GR S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_gr;
+ /* Matrix coefficient for BR S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_br;
+ /* Matrix coefficient for RG S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_rg;
+ /* Matrix coefficient for GG S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_gg;
+ /* Matrix coefficient for BG S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_bg;
+ /* Matrix coefficient for RB S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_rb;
+ /* Matrix coefficient for GB S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_gb;
+ /* Matrix coefficient for BB S12Q8/S11Q8 */
+ struct ipipe_float_s16 coef_bb;
+ /* Output offset for R S13/S11 */
+ int out_ofst_r;
+ /* Output offset for G S13/S11 */
+ int out_ofst_g;
+ /* Output offset for B S13/S11 */
+ int out_ofst_b;
+};
+
+#define VPFE_IPIPE_MAX_SIZE_GAMMA 512
+
+enum vpfe_ipipe_gamma_tbl_size {
+ VPFE_IPIPE_GAMMA_TBL_SZ_64 = 64,
+ VPFE_IPIPE_GAMMA_TBL_SZ_128 = 128,
+ VPFE_IPIPE_GAMMA_TBL_SZ_256 = 256,
+ VPFE_IPIPE_GAMMA_TBL_SZ_512 = 512,
+};
+
+enum vpfe_ipipe_gamma_tbl_sel {
+ VPFE_IPIPE_GAMMA_TBL_RAM = 0,
+ VPFE_IPIPE_GAMMA_TBL_ROM = 1,
+};
+
+struct vpfe_ipipe_gamma_entry {
+ /* 10 bit slope */
+ short slope;
+ /* 10 bit offset */
+ unsigned short offset;
+};
+
+/* Structure for configuring Gamma correction module */
+struct vpfe_ipipe_gamma {
+ /* 0 - Enable Gamma correction for Red
+ * 1 - bypass Gamma correction. Data is divided by 16
+ */
+ unsigned char bypass_r;
+ /* 0 - Enable Gamma correction for Blue
+ * 1 - bypass Gamma correction. Data is divided by 16
+ */
+ unsigned char bypass_b;
+ /* 0 - Enable Gamma correction for Green
+ * 1 - bypass Gamma correction. Data is divided by 16
+ */
+ unsigned char bypass_g;
+ /* IPIPE_GAMMA_TBL_RAM or IPIPE_GAMMA_TBL_ROM */
+ enum vpfe_ipipe_gamma_tbl_sel tbl_sel;
+ /* Table size for RAM gamma table.
+ */
+ enum vpfe_ipipe_gamma_tbl_size tbl_size;
+ /* R table */
+ struct vpfe_ipipe_gamma_entry table_r[VPFE_IPIPE_MAX_SIZE_GAMMA];
+ /* Blue table */
+ struct vpfe_ipipe_gamma_entry table_b[VPFE_IPIPE_MAX_SIZE_GAMMA];
+ /* Green table */
+ struct vpfe_ipipe_gamma_entry table_g[VPFE_IPIPE_MAX_SIZE_GAMMA];
+};
+
+#define VPFE_IPIPE_MAX_SIZE_3D_LUT 729
+
+struct vpfe_ipipe_3d_lut_entry {
+ /* 10 bit entry for red */
+ unsigned short r;
+ /* 10 bit entry for green */
+ unsigned short g;
+ /* 10 bit entry for blue */
+ unsigned short b;
+};
+
+/* structure for 3D-LUT */
+struct vpfe_ipipe_3d_lut {
+ /* enable/disable 3D lut */
+ unsigned char en;
+ /* 3D - LUT table entry */
+ struct vpfe_ipipe_3d_lut_entry table[VPFE_IPIPE_MAX_SIZE_3D_LUT];
+};
+
+/* Struct for configuring rgb2ycbcr module */
+struct vpfe_ipipe_rgb2yuv {
+ /* Matrix coefficient for RY S12Q8 */
+ struct ipipe_float_s16 coef_ry;
+ /* Matrix coefficient for GY S12Q8 */
+ struct ipipe_float_s16 coef_gy;
+ /* Matrix coefficient for BY S12Q8 */
+ struct ipipe_float_s16 coef_by;
+ /* Matrix coefficient for RCb S12Q8 */
+ struct ipipe_float_s16 coef_rcb;
+ /* Matrix coefficient for GCb S12Q8 */
+ struct ipipe_float_s16 coef_gcb;
+ /* Matrix coefficient for BCb S12Q8 */
+ struct ipipe_float_s16 coef_bcb;
+ /* Matrix coefficient for RCr S12Q8 */
+ struct ipipe_float_s16 coef_rcr;
+ /* Matrix coefficient for GCr S12Q8 */
+ struct ipipe_float_s16 coef_gcr;
+ /* Matrix coefficient for BCr S12Q8 */
+ struct ipipe_float_s16 coef_bcr;
+ /* Output offset for R S11 */
+ int out_ofst_y;
+ /* Output offset for Cb S11 */
+ int out_ofst_cb;
+ /* Output offset for Cr S11 */
+ int out_ofst_cr;
+};
+
+enum vpfe_ipipe_gbce_type {
+ VPFE_IPIPE_GBCE_Y_VAL_TBL = 0,
+ VPFE_IPIPE_GBCE_GAIN_TBL = 1,
+};
+
+#define VPFE_IPIPE_MAX_SIZE_GBCE_LUT 1024
+
+/* structure for Global brightness and Contrast */
+struct vpfe_ipipe_gbce {
+ /* enable/disable GBCE */
+ unsigned char en;
+ /* Y - value table or Gain table */
+ enum vpfe_ipipe_gbce_type type;
+ /* ptr to LUT for GBCE with 1024 entries */
+ unsigned short table[VPFE_IPIPE_MAX_SIZE_GBCE_LUT];
+};
+
+/* Chrominance position. Applicable only for YCbCr input
+ * Applied after edge enhancement
+ */
+enum vpfe_chr_pos {
+ /* Co-siting, same position with luminance */
+ VPFE_IPIPE_YUV422_CHR_POS_COSITE = 0,
+ /* Centering, In the middle of luminance */
+ VPFE_IPIPE_YUV422_CHR_POS_CENTRE = 1,
+};
+
+/* Structure for configuring yuv422 conversion module */
+struct vpfe_ipipe_yuv422_conv {
+ /* Max Chrominance value */
+ unsigned char en_chrom_lpf;
+ /* 1 - enable LPF for chrminance, 0 - disable */
+ enum vpfe_chr_pos chrom_pos;
+};
+
+#define VPFE_IPIPE_MAX_SIZE_YEE_LUT 1024
+
+enum vpfe_ipipe_yee_merge_meth {
+ VPFE_IPIPE_YEE_ABS_MAX = 0,
+ VPFE_IPIPE_YEE_EE_ES = 1,
+};
+
+/* Structure for configuring YUV Edge Enhancement module */
+struct vpfe_ipipe_yee {
+ /* 1 - enable enhancement, 0 - disable */
+ unsigned char en;
+ /* enable/disable halo reduction in edge sharpner */
+ unsigned char en_halo_red;
+ /* Merge method between Edge Enhancer and Edge sharpner */
+ enum vpfe_ipipe_yee_merge_meth merge_meth;
+ /* HPF Shift length */
+ unsigned char hpf_shft;
+ /* HPF Coefficient 00, S10 */
+ short hpf_coef_00;
+ /* HPF Coefficient 01, S10 */
+ short hpf_coef_01;
+ /* HPF Coefficient 02, S10 */
+ short hpf_coef_02;
+ /* HPF Coefficient 10, S10 */
+ short hpf_coef_10;
+ /* HPF Coefficient 11, S10 */
+ short hpf_coef_11;
+ /* HPF Coefficient 12, S10 */
+ short hpf_coef_12;
+ /* HPF Coefficient 20, S10 */
+ short hpf_coef_20;
+ /* HPF Coefficient 21, S10 */
+ short hpf_coef_21;
+ /* HPF Coefficient 22, S10 */
+ short hpf_coef_22;
+ /* Lower threshold before referring to LUT */
+ unsigned short yee_thr;
+ /* Edge sharpener Gain */
+ unsigned short es_gain;
+ /* Edge sharpener lower threshold */
+ unsigned short es_thr1;
+ /* Edge sharpener upper threshold */
+ unsigned short es_thr2;
+ /* Edge sharpener gain on gradient */
+ unsigned short es_gain_grad;
+ /* Edge sharpener offset on gradient */
+ unsigned short es_ofst_grad;
+ /* Ptr to EE table. Must have 1024 entries */
+ short table[VPFE_IPIPE_MAX_SIZE_YEE_LUT];
+};
+
+enum vpfe_ipipe_car_meth {
+ /* Chromatic Gain Control */
+ VPFE_IPIPE_CAR_CHR_GAIN_CTRL = 0,
+ /* Dynamic switching between CHR_GAIN_CTRL
+ * and MED_FLTR
+ */
+ VPFE_IPIPE_CAR_DYN_SWITCH = 1,
+ /* Median Filter */
+ VPFE_IPIPE_CAR_MED_FLTR = 2,
+};
+
+enum vpfe_ipipe_car_hpf_type {
+ VPFE_IPIPE_CAR_HPF_Y = 0,
+ VPFE_IPIPE_CAR_HPF_H = 1,
+ VPFE_IPIPE_CAR_HPF_V = 2,
+ VPFE_IPIPE_CAR_HPF_2D = 3,
+ /* 2D HPF from YUV Edge Enhancement */
+ VPFE_IPIPE_CAR_HPF_2D_YEE = 4,
+};
+
+struct vpfe_ipipe_car_gain {
+ /* csup_gain */
+ unsigned char gain;
+ /* csup_shf. */
+ unsigned char shft;
+ /* gain minimum */
+ unsigned short gain_min;
+};
+
+/* Structure for Chromatic Artifact Reduction */
+struct vpfe_ipipe_car {
+ /* enable/disable */
+ unsigned char en;
+ /* Gain control or Dynamic switching */
+ enum vpfe_ipipe_car_meth meth;
+ /* Gain1 function configuration for Gain control */
+ struct vpfe_ipipe_car_gain gain1;
+ /* Gain2 function configuration for Gain control */
+ struct vpfe_ipipe_car_gain gain2;
+ /* HPF type used for CAR */
+ enum vpfe_ipipe_car_hpf_type hpf;
+ /* csup_thr: HPF threshold for Gain control */
+ unsigned char hpf_thr;
+ /* Down shift value for hpf. 2 bits */
+ unsigned char hpf_shft;
+ /* switch limit for median filter */
+ unsigned char sw0;
+ /* switch coefficient for Gain control */
+ unsigned char sw1;
+};
+
+/* structure for Chromatic Gain Suppression */
+struct vpfe_ipipe_cgs {
+ /* enable/disable */
+ unsigned char en;
+ /* gain1 bright side threshold */
+ unsigned char h_thr;
+ /* gain1 bright side slope */
+ unsigned char h_slope;
+ /* gain1 down shift value for bright side */
+ unsigned char h_shft;
+ /* gain1 bright side minimum gain */
+ unsigned char h_min;
+};
+
+/* Max pixels allowed in the input. If above this either decimation
+ * or frame division mode to be enabled
+ */
+#define VPFE_IPIPE_MAX_INPUT_WIDTH 2600
+
+struct vpfe_ipipe_input_config {
+ unsigned int vst;
+ unsigned int hst;
+};
+
+/**
+ * struct vpfe_ipipe_config - IPIPE engine configuration (user)
+ * @input_config: Pointer to structure for ipipe configuration.
+ * @flag: Specifies which ISP IPIPE functions should be enabled.
+ * @lutdpc: Pointer to luma enhancement structure.
+ * @otfdpc: Pointer to structure for defect correction.
+ * @nf1: Pointer to structure for Noise Filter.
+ * @nf2: Pointer to structure for Noise Filter.
+ * @gic: Pointer to structure for Green Imbalance.
+ * @wbal: Pointer to structure for White Balance.
+ * @cfa: Pointer to structure containing the CFA interpolation.
+ * @rgb2rgb1: Pointer to structure for RGB to RGB Blending.
+ * @rgb2rgb2: Pointer to structure for RGB to RGB Blending.
+ * @gamma: Pointer to gamma structure.
+ * @lut: Pointer to structure for 3D LUT.
+ * @rgb2yuv: Pointer to structure for RGB-YCbCr conversion.
+ * @gbce: Pointer to structure for Global Brightness,Contrast Control.
+ * @yuv422_conv: Pointer to structure for YUV 422 conversion.
+ * @yee: Pointer to structure for Edge Enhancer.
+ * @car: Pointer to structure for Chromatic Artifact Reduction.
+ * @cgs: Pointer to structure for Chromatic Gain Suppression.
+ */
+struct vpfe_ipipe_config {
+ __u32 flag;
+ struct vpfe_ipipe_input_config __user *input_config;
+ struct vpfe_ipipe_lutdpc __user *lutdpc;
+ struct vpfe_ipipe_otfdpc __user *otfdpc;
+ struct vpfe_ipipe_nf __user *nf1;
+ struct vpfe_ipipe_nf __user *nf2;
+ struct vpfe_ipipe_gic __user *gic;
+ struct vpfe_ipipe_wb __user *wbal;
+ struct vpfe_ipipe_cfa __user *cfa;
+ struct vpfe_ipipe_rgb2rgb __user *rgb2rgb1;
+ struct vpfe_ipipe_rgb2rgb __user *rgb2rgb2;
+ struct vpfe_ipipe_gamma __user *gamma;
+ struct vpfe_ipipe_3d_lut __user *lut;
+ struct vpfe_ipipe_rgb2yuv __user *rgb2yuv;
+ struct vpfe_ipipe_gbce __user *gbce;
+ struct vpfe_ipipe_yuv422_conv __user *yuv422_conv;
+ struct vpfe_ipipe_yee __user *yee;
+ struct vpfe_ipipe_car __user *car;
+ struct vpfe_ipipe_cgs __user *cgs;
+};
+
+/*******************************************************************
+** Resizer API structures
+*******************************************************************/
+/* Interpolation types used for horizontal rescale */
+enum vpfe_rsz_intp_t {
+ VPFE_RSZ_INTP_CUBIC,
+ VPFE_RSZ_INTP_LINEAR
+};
+
+/* Horizontal LPF intensity selection */
+enum vpfe_rsz_h_lpf_lse_t {
+ VPFE_RSZ_H_LPF_LSE_INTERN,
+ VPFE_RSZ_H_LPF_LSE_USER_VAL
+};
+
+enum vpfe_rsz_down_scale_ave_sz {
+ VPFE_IPIPE_DWN_SCALE_1_OVER_2,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_4,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_8,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_16,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_32,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_64,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_128,
+ VPFE_IPIPE_DWN_SCALE_1_OVER_256
+};
+
+struct vpfe_rsz_output_spec {
+ /* enable horizontal flip */
+ unsigned char h_flip;
+ /* enable vertical flip */
+ unsigned char v_flip;
+ /* line start offset for y. */
+ unsigned int vst_y;
+ /* line start offset for c. Only for 420 */
+ unsigned int vst_c;
+ /* vertical rescale interpolation type, YCbCr or Luminance */
+ enum vpfe_rsz_intp_t v_typ_y;
+ /* vertical rescale interpolation type for Chrominance */
+ enum vpfe_rsz_intp_t v_typ_c;
+ /* vertical lpf intensity - Luminance */
+ unsigned char v_lpf_int_y;
+ /* vertical lpf intensity - Chrominance */
+ unsigned char v_lpf_int_c;
+ /* horizontal rescale interpolation types, YCbCr or Luminance */
+ enum vpfe_rsz_intp_t h_typ_y;
+ /* horizontal rescale interpolation types, Chrominance */
+ enum vpfe_rsz_intp_t h_typ_c;
+ /* horizontal lpf intensity - Luminance */
+ unsigned char h_lpf_int_y;
+ /* horizontal lpf intensity - Chrominance */
+ unsigned char h_lpf_int_c;
+ /* Use down scale mode for scale down */
+ unsigned char en_down_scale;
+ /* if downscale, set the downscale more average size for horizontal
+ * direction. Used only if output width and height is less than
+ * input sizes
+ */
+ enum vpfe_rsz_down_scale_ave_sz h_dscale_ave_sz;
+ /* if downscale, set the downscale more average size for vertical
+ * direction. Used only if output width and height is less than
+ * input sizes
+ */
+ enum vpfe_rsz_down_scale_ave_sz v_dscale_ave_sz;
+ /* Y offset. If set, the offset would be added to the base address
+ */
+ unsigned int user_y_ofst;
+ /* C offset. If set, the offset would be added to the base address
+ */
+ unsigned int user_c_ofst;
+};
+
+struct vpfe_rsz_config_params {
+ unsigned int vst;
+ /* horizontal start position of the image
+ * data to IPIPE
+ */
+ unsigned int hst;
+ /* output spec of the image data coming out of resizer - 0(UYVY).
+ */
+ struct vpfe_rsz_output_spec output1;
+ /* output spec of the image data coming out of resizer - 1(UYVY).
+ */
+ struct vpfe_rsz_output_spec output2;
+ /* 0 , chroma sample at odd pixel, 1 - even pixel */
+ unsigned char chroma_sample_even;
+ unsigned char frame_div_mode_en;
+ unsigned char yuv_y_min;
+ unsigned char yuv_y_max;
+ unsigned char yuv_c_min;
+ unsigned char yuv_c_max;
+ enum vpfe_chr_pos out_chr_pos;
+ unsigned char bypass;
+};
+
+/* Structure for VIDIOC_VPFE_RSZ_[S/G]_CONFIG IOCTLs */
+struct vpfe_rsz_config {
+ struct vpfe_rsz_config_params *config;
+};
+
+#endif /* _DAVINCI_VPFE_USER_H */
diff --git a/include/uapi/linux/dm365_ipipeif_user.h b/include/uapi/linux/dm365_ipipeif_user.h
new file mode 100644
index 00000000..e2a69b59
--- /dev/null
+++ b/include/uapi/linux/dm365_ipipeif_user.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Contributors:
+ * Manjunath Hadli <manjunath.hadli@ti.com>
+ * Prabhakar Lad <prabhakar.lad@ti.com>
+ */
+
+#ifndef _DAVINCI_VPFE_DM365_IPIPEIF_USER_H
+#define _DAVINCI_VPFE_DM365_IPIPEIF_USER_H
+
+/* clockdiv for IPIPE 5.1 */
+struct ipipeif_5_1_clkdiv {
+ unsigned char m;
+ unsigned char n;
+};
+
+enum ipipeif_decimation {
+ IPIPEIF_DECIMATION_OFF,
+ IPIPEIF_DECIMATION_ON
+};
+
+/* DPC at the if for IPIPE 5.1 */
+struct ipipeif_dpc {
+ /* 0 - disable, 1 - enable */
+ unsigned char en;
+ /* threshold */
+ unsigned short thr;
+};
+
+enum ipipeif_clock {
+ IPIPEIF_PIXCEL_CLK,
+ IPIPEIF_SDRAM_CLK
+};
+
+enum ipipeif_avg_filter {
+ IPIPEIF_AVG_OFF,
+ IPIPEIF_AVG_ON
+};
+
+struct ipipeif_5_1 {
+ struct ipipeif_5_1_clkdiv clk_div;
+ /* Defect pixel correction */
+ struct ipipeif_dpc dpc;
+ /* clipped to this value */
+ unsigned short clip;
+ /* Align HSync and VSync to rsz_start */
+ unsigned char align_sync;
+ /* resizer start position */
+ unsigned int rsz_start;
+ /* DF gain enable */
+ unsigned char df_gain_en;
+ /* DF gain value */
+ unsigned short df_gain;
+ /* DF gain threshold value */
+ unsigned short df_gain_thr;
+};
+
+struct ipipeif_params {
+ enum ipipeif_clock clock_select;
+ unsigned int ppln;
+ unsigned int lpfr;
+ unsigned char rsz;
+ enum ipipeif_decimation decimation;
+ enum ipipeif_avg_filter avg_filter;
+ /* IPIPE 5.1 */
+ struct ipipeif_5_1 if_5_1;
+};
+
+/*
+ * Private IOCTL
+ * VIDIOC_VPFE_IPIPEIF_S_CONFIG: Set IPIEIF configuration
+ * VIDIOC_VPFE_IPIPEIF_G_CONFIG: Get IPIEIF configuration
+ */
+#define VIDIOC_VPFE_IPIPEIF_S_CONFIG \
+ _IOWR('I', BASE_VIDIOC_PRIVATE + 1, struct ipipeif_params)
+#define VIDIOC_VPFE_IPIPEIF_G_CONFIG \
+ _IOWR('I', BASE_VIDIOC_PRIVATE + 2, struct ipipeif_params)
+
+#endif /* _DAVINCI_VPFE_DM365_IPIPEIF_USER_H */
diff --git a/include/uapi/linux/fuse.h b/include/uapi/linux/fuse.h
index 706d035f..4c43b444 100644
--- a/include/uapi/linux/fuse.h
+++ b/include/uapi/linux/fuse.h
@@ -95,10 +95,15 @@
#ifndef _LINUX_FUSE_H
#define _LINUX_FUSE_H
-#ifdef __KERNEL__
+#ifdef __linux__
#include <linux/types.h>
#else
#include <stdint.h>
+#define __u64 uint64_t
+#define __s64 int64_t
+#define __u32 uint32_t
+#define __s32 int32_t
+#define __u16 uint16_t
#endif
/*
@@ -134,42 +139,42 @@
userspace works under 64bit kernels */
struct fuse_attr {
- uint64_t ino;
- uint64_t size;
- uint64_t blocks;
- uint64_t atime;
- uint64_t mtime;
- uint64_t ctime;
- uint32_t atimensec;
- uint32_t mtimensec;
- uint32_t ctimensec;
- uint32_t mode;
- uint32_t nlink;
- uint32_t uid;
- uint32_t gid;
- uint32_t rdev;
- uint32_t blksize;
- uint32_t padding;
+ __u64 ino;
+ __u64 size;
+ __u64 blocks;
+ __u64 atime;
+ __u64 mtime;
+ __u64 ctime;
+ __u32 atimensec;
+ __u32 mtimensec;
+ __u32 ctimensec;
+ __u32 mode;
+ __u32 nlink;
+ __u32 uid;
+ __u32 gid;
+ __u32 rdev;
+ __u32 blksize;
+ __u32 padding;
};
struct fuse_kstatfs {
- uint64_t blocks;
- uint64_t bfree;
- uint64_t bavail;
- uint64_t files;
- uint64_t ffree;
- uint32_t bsize;
- uint32_t namelen;
- uint32_t frsize;
- uint32_t padding;
- uint32_t spare[6];
+ __u64 blocks;
+ __u64 bfree;
+ __u64 bavail;
+ __u64 files;
+ __u64 ffree;
+ __u32 bsize;
+ __u32 namelen;
+ __u32 frsize;
+ __u32 padding;
+ __u32 spare[6];
};
struct fuse_file_lock {
- uint64_t start;
- uint64_t end;
- uint32_t type;
- uint32_t pid; /* tgid */
+ __u64 start;
+ __u64 end;
+ __u32 type;
+ __u32 pid; /* tgid */
};
/**
@@ -359,143 +364,143 @@ enum fuse_notify_code {
#define FUSE_COMPAT_ENTRY_OUT_SIZE 120
struct fuse_entry_out {
- uint64_t nodeid; /* Inode ID */
- uint64_t generation; /* Inode generation: nodeid:gen must
- be unique for the fs's lifetime */
- uint64_t entry_valid; /* Cache timeout for the name */
- uint64_t attr_valid; /* Cache timeout for the attributes */
- uint32_t entry_valid_nsec;
- uint32_t attr_valid_nsec;
+ __u64 nodeid; /* Inode ID */
+ __u64 generation; /* Inode generation: nodeid:gen must
+ be unique for the fs's lifetime */
+ __u64 entry_valid; /* Cache timeout for the name */
+ __u64 attr_valid; /* Cache timeout for the attributes */
+ __u32 entry_valid_nsec;
+ __u32 attr_valid_nsec;
struct fuse_attr attr;
};
struct fuse_forget_in {
- uint64_t nlookup;
+ __u64 nlookup;
};
struct fuse_forget_one {
- uint64_t nodeid;
- uint64_t nlookup;
+ __u64 nodeid;
+ __u64 nlookup;
};
struct fuse_batch_forget_in {
- uint32_t count;
- uint32_t dummy;
+ __u32 count;
+ __u32 dummy;
};
struct fuse_getattr_in {
- uint32_t getattr_flags;
- uint32_t dummy;
- uint64_t fh;
+ __u32 getattr_flags;
+ __u32 dummy;
+ __u64 fh;
};
#define FUSE_COMPAT_ATTR_OUT_SIZE 96
struct fuse_attr_out {
- uint64_t attr_valid; /* Cache timeout for the attributes */
- uint32_t attr_valid_nsec;
- uint32_t dummy;
+ __u64 attr_valid; /* Cache timeout for the attributes */
+ __u32 attr_valid_nsec;
+ __u32 dummy;
struct fuse_attr attr;
};
#define FUSE_COMPAT_MKNOD_IN_SIZE 8
struct fuse_mknod_in {
- uint32_t mode;
- uint32_t rdev;
- uint32_t umask;
- uint32_t padding;
+ __u32 mode;
+ __u32 rdev;
+ __u32 umask;
+ __u32 padding;
};
struct fuse_mkdir_in {
- uint32_t mode;
- uint32_t umask;
+ __u32 mode;
+ __u32 umask;
};
struct fuse_rename_in {
- uint64_t newdir;
+ __u64 newdir;
};
struct fuse_link_in {
- uint64_t oldnodeid;
+ __u64 oldnodeid;
};
struct fuse_setattr_in {
- uint32_t valid;
- uint32_t padding;
- uint64_t fh;
- uint64_t size;
- uint64_t lock_owner;
- uint64_t atime;
- uint64_t mtime;
- uint64_t unused2;
- uint32_t atimensec;
- uint32_t mtimensec;
- uint32_t unused3;
- uint32_t mode;
- uint32_t unused4;
- uint32_t uid;
- uint32_t gid;
- uint32_t unused5;
+ __u32 valid;
+ __u32 padding;
+ __u64 fh;
+ __u64 size;
+ __u64 lock_owner;
+ __u64 atime;
+ __u64 mtime;
+ __u64 unused2;
+ __u32 atimensec;
+ __u32 mtimensec;
+ __u32 unused3;
+ __u32 mode;
+ __u32 unused4;
+ __u32 uid;
+ __u32 gid;
+ __u32 unused5;
};
struct fuse_open_in {
- uint32_t flags;
- uint32_t unused;
+ __u32 flags;
+ __u32 unused;
};
struct fuse_create_in {
- uint32_t flags;
- uint32_t mode;
- uint32_t umask;
- uint32_t padding;
+ __u32 flags;
+ __u32 mode;
+ __u32 umask;
+ __u32 padding;
};
struct fuse_open_out {
- uint64_t fh;
- uint32_t open_flags;
- uint32_t padding;
+ __u64 fh;
+ __u32 open_flags;
+ __u32 padding;
};
struct fuse_release_in {
- uint64_t fh;
- uint32_t flags;
- uint32_t release_flags;
- uint64_t lock_owner;
+ __u64 fh;
+ __u32 flags;
+ __u32 release_flags;
+ __u64 lock_owner;
};
struct fuse_flush_in {
- uint64_t fh;
- uint32_t unused;
- uint32_t padding;
- uint64_t lock_owner;
+ __u64 fh;
+ __u32 unused;
+ __u32 padding;
+ __u64 lock_owner;
};
struct fuse_read_in {
- uint64_t fh;
- uint64_t offset;
- uint32_t size;
- uint32_t read_flags;
- uint64_t lock_owner;
- uint32_t flags;
- uint32_t padding;
+ __u64 fh;
+ __u64 offset;
+ __u32 size;
+ __u32 read_flags;
+ __u64 lock_owner;
+ __u32 flags;
+ __u32 padding;
};
#define FUSE_COMPAT_WRITE_IN_SIZE 24
struct fuse_write_in {
- uint64_t fh;
- uint64_t offset;
- uint32_t size;
- uint32_t write_flags;
- uint64_t lock_owner;
- uint32_t flags;
- uint32_t padding;
+ __u64 fh;
+ __u64 offset;
+ __u32 size;
+ __u32 write_flags;
+ __u64 lock_owner;
+ __u32 flags;
+ __u32 padding;
};
struct fuse_write_out {
- uint32_t size;
- uint32_t padding;
+ __u32 size;
+ __u32 padding;
};
#define FUSE_COMPAT_STATFS_SIZE 48
@@ -505,32 +510,32 @@ struct fuse_statfs_out {
};
struct fuse_fsync_in {
- uint64_t fh;
- uint32_t fsync_flags;
- uint32_t padding;
+ __u64 fh;
+ __u32 fsync_flags;
+ __u32 padding;
};
struct fuse_setxattr_in {
- uint32_t size;
- uint32_t flags;
+ __u32 size;
+ __u32 flags;
};
struct fuse_getxattr_in {
- uint32_t size;
- uint32_t padding;
+ __u32 size;
+ __u32 padding;
};
struct fuse_getxattr_out {
- uint32_t size;
- uint32_t padding;
+ __u32 size;
+ __u32 padding;
};
struct fuse_lk_in {
- uint64_t fh;
- uint64_t owner;
+ __u64 fh;
+ __u64 owner;
struct fuse_file_lock lk;
- uint32_t lk_flags;
- uint32_t padding;
+ __u32 lk_flags;
+ __u32 padding;
};
struct fuse_lk_out {
@@ -538,135 +543,134 @@ struct fuse_lk_out {
};
struct fuse_access_in {
- uint32_t mask;
- uint32_t padding;
+ __u32 mask;
+ __u32 padding;
};
struct fuse_init_in {
- uint32_t major;
- uint32_t minor;
- uint32_t max_readahead;
- uint32_t flags;
+ __u32 major;
+ __u32 minor;
+ __u32 max_readahead;
+ __u32 flags;
};
struct fuse_init_out {
- uint32_t major;
- uint32_t minor;
- uint32_t max_readahead;
- uint32_t flags;
- uint16_t max_background;
- uint16_t congestion_threshold;
- uint32_t max_write;
+ __u32 major;
+ __u32 minor;
+ __u32 max_readahead;
+ __u32 flags;
+ __u16 max_background;
+ __u16 congestion_threshold;
+ __u32 max_write;
};
#define CUSE_INIT_INFO_MAX 4096
struct cuse_init_in {
- uint32_t major;
- uint32_t minor;
- uint32_t unused;
- uint32_t flags;
+ __u32 major;
+ __u32 minor;
+ __u32 unused;
+ __u32 flags;
};
struct cuse_init_out {
- uint32_t major;
- uint32_t minor;
- uint32_t unused;
- uint32_t flags;
- uint32_t max_read;
- uint32_t max_write;
- uint32_t dev_major; /* chardev major */
- uint32_t dev_minor; /* chardev minor */
- uint32_t spare[10];
+ __u32 major;
+ __u32 minor;
+ __u32 unused;
+ __u32 flags;
+ __u32 max_read;
+ __u32 max_write;
+ __u32 dev_major; /* chardev major */
+ __u32 dev_minor; /* chardev minor */
+ __u32 spare[10];
};
struct fuse_interrupt_in {
- uint64_t unique;
+ __u64 unique;
};
struct fuse_bmap_in {
- uint64_t block;
- uint32_t blocksize;
- uint32_t padding;
+ __u64 block;
+ __u32 blocksize;
+ __u32 padding;
};
struct fuse_bmap_out {
- uint64_t block;
+ __u64 block;
};
struct fuse_ioctl_in {
- uint64_t fh;
- uint32_t flags;
- uint32_t cmd;
- uint64_t arg;
- uint32_t in_size;
- uint32_t out_size;
+ __u64 fh;
+ __u32 flags;
+ __u32 cmd;
+ __u64 arg;
+ __u32 in_size;
+ __u32 out_size;
};
struct fuse_ioctl_iovec {
- uint64_t base;
- uint64_t len;
+ __u64 base;
+ __u64 len;
};
struct fuse_ioctl_out {
- int32_t result;
- uint32_t flags;
- uint32_t in_iovs;
- uint32_t out_iovs;
+ __s32 result;
+ __u32 flags;
+ __u32 in_iovs;
+ __u32 out_iovs;
};
struct fuse_poll_in {
- uint64_t fh;
- uint64_t kh;
- uint32_t flags;
- uint32_t events;
+ __u64 fh;
+ __u64 kh;
+ __u32 flags;
+ __u32 events;
};
struct fuse_poll_out {
- uint32_t revents;
- uint32_t padding;
+ __u32 revents;
+ __u32 padding;
};
struct fuse_notify_poll_wakeup_out {
- uint64_t kh;
+ __u64 kh;
};
struct fuse_fallocate_in {
- uint64_t fh;
- uint64_t offset;
- uint64_t length;
- uint32_t mode;
- uint32_t padding;
+ __u64 fh;
+ __u64 offset;
+ __u64 length;
+ __u32 mode;
+ __u32 padding;
};
struct fuse_in_header {
- uint32_t len;
- uint32_t opcode;
- uint64_t unique;
- uint64_t nodeid;
- uint32_t uid;
- uint32_t gid;
- uint32_t pid;
- uint32_t padding;
+ __u32 len;
+ __u32 opcode;
+ __u64 unique;
+ __u64 nodeid;
+ __u32 uid;
+ __u32 gid;
+ __u32 pid;
+ __u32 padding;
};
struct fuse_out_header {
- uint32_t len;
- int32_t error;
- uint64_t unique;
+ __u32 len;
+ __s32 error;
+ __u64 unique;
};
struct fuse_dirent {
- uint64_t ino;
- uint64_t off;
- uint32_t namelen;
- uint32_t type;
+ __u64 ino;
+ __u64 off;
+ __u32 namelen;
+ __u32 type;
char name[];
};
#define FUSE_NAME_OFFSET offsetof(struct fuse_dirent, name)
-#define FUSE_DIRENT_ALIGN(x) \
- (((x) + sizeof(uint64_t) - 1) & ~(sizeof(uint64_t) - 1))
+#define FUSE_DIRENT_ALIGN(x) (((x) + sizeof(__u64) - 1) & ~(sizeof(__u64) - 1))
#define FUSE_DIRENT_SIZE(d) \
FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen)
@@ -681,47 +685,47 @@ struct fuse_direntplus {
FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET_DIRENTPLUS + (d)->dirent.namelen)
struct fuse_notify_inval_inode_out {
- uint64_t ino;
- int64_t off;
- int64_t len;
+ __u64 ino;
+ __s64 off;
+ __s64 len;
};
struct fuse_notify_inval_entry_out {
- uint64_t parent;
- uint32_t namelen;
- uint32_t padding;
+ __u64 parent;
+ __u32 namelen;
+ __u32 padding;
};
struct fuse_notify_delete_out {
- uint64_t parent;
- uint64_t child;
- uint32_t namelen;
- uint32_t padding;
+ __u64 parent;
+ __u64 child;
+ __u32 namelen;
+ __u32 padding;
};
struct fuse_notify_store_out {
- uint64_t nodeid;
- uint64_t offset;
- uint32_t size;
- uint32_t padding;
+ __u64 nodeid;
+ __u64 offset;
+ __u32 size;
+ __u32 padding;
};
struct fuse_notify_retrieve_out {
- uint64_t notify_unique;
- uint64_t nodeid;
- uint64_t offset;
- uint32_t size;
- uint32_t padding;
+ __u64 notify_unique;
+ __u64 nodeid;
+ __u64 offset;
+ __u32 size;
+ __u32 padding;
};
/* Matches the size of fuse_write_in */
struct fuse_notify_retrieve_in {
- uint64_t dummy1;
- uint64_t offset;
- uint32_t size;
- uint32_t dummy2;
- uint64_t dummy3;
- uint64_t dummy4;
+ __u64 dummy1;
+ __u64 offset;
+ __u32 size;
+ __u32 dummy2;
+ __u64 dummy3;
+ __u64 dummy4;
};
#endif /* _LINUX_FUSE_H */
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h
index 9ef8172e..4e0c58d2 100644
--- a/include/uapi/linux/v4l2-dv-timings.h
+++ b/include/uapi/linux/v4l2-dv-timings.h
@@ -42,6 +42,15 @@
V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CEA861, 0) \
}
+/* Note: these are the nominal timings, for HDMI links this format is typically
+ * double-clocked to meet the minimum pixelclock requirements. */
+#define V4L2_DV_BT_CEA_720X480I59_94 { \
+ .type = V4L2_DV_BT_656_1120, \
+ V4L2_INIT_BT_TIMINGS(720, 480, 1, 0, \
+ 13500000, 19, 62, 57, 4, 3, 15, 4, 3, 16, \
+ V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_HALF_LINE) \
+}
+
#define V4L2_DV_BT_CEA_720X480P59_94 { \
.type = V4L2_DV_BT_656_1120, \
V4L2_INIT_BT_TIMINGS(720, 480, 0, 0, \
@@ -49,6 +58,15 @@
V4L2_DV_BT_STD_CEA861, 0) \
}
+/* Note: these are the nominal timings, for HDMI links this format is typically
+ * double-clocked to meet the minimum pixelclock requirements. */
+#define V4L2_DV_BT_CEA_720X576I50 { \
+ .type = V4L2_DV_BT_656_1120, \
+ V4L2_INIT_BT_TIMINGS(720, 576, 1, 0, \
+ 13500000, 12, 63, 69, 2, 3, 19, 2, 3, 20, \
+ V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_HALF_LINE) \
+}
+
#define V4L2_DV_BT_CEA_720X576P50 { \
.type = V4L2_DV_BT_656_1120, \
V4L2_INIT_BT_TIMINGS(720, 576, 0, 0, \
diff --git a/include/video/davinci_osd.h b/include/video/davinci_osd.h
new file mode 100644
index 00000000..642311f4
--- /dev/null
+++ b/include/video/davinci_osd.h
@@ -0,0 +1,912 @@
+/*
+ * Header file for the TI DaVinci On-Screen Display Manager
+ *
+ * Andy Lowe (alowe@mvista.com), MontaVista Software
+ *
+ * 2007 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef _DAVINCI_OSD_H
+#define _DAVINCI_OSD_H
+
+struct davinci_osd_platform_data {
+ unsigned char invert_field;
+};
+
+/**
+ * enum davinci_disp_layer
+ * @WIN_OSD0: On-Screen Display Window 0
+ * @WIN_VID0: Video Window 0
+ * @WIN_OSD1: On-Screen Display Window 1
+ * @WIN_VID1: Video Window 1
+ *
+ * Description:
+ * An enumeration of the DaVinci display layers.
+ */
+enum davinci_disp_layer {
+ WIN_OSD0,
+ WIN_VID0,
+ WIN_OSD1,
+ WIN_VID1,
+};
+
+/**
+ * enum davinci_osd_layer
+ * @OSDWIN_OSD0: On-Screen Display Window 0
+ * @OSDWIN_OSD1: On-Screen Display Window 1
+ *
+ * Description:
+ * An enumeration of the DaVinci OSD layers.
+ */
+enum davinci_osd_layer {
+ OSDWIN_OSD0,
+ OSDWIN_OSD1,
+};
+
+/**
+ * enum davinci_pix_format
+ * @PIXFMT_1BPP: 1-bit-per-pixel bitmap
+ * @PIXFMT_2BPP: 2-bits-per-pixel bitmap
+ * @PIXFMT_4BPP: 4-bits-per-pixel bitmap
+ * @PIXFMT_8BPP: 8-bits-per-pixel bitmap
+ * @PIXFMT_RGB565: 16-bits-per-pixel RGB565
+ * @PIXFMT_YCbCrI: YUV 4:2:2
+ * @PIXFMT_RGB888: 24-bits-per-pixel RGB888
+ * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
+ * @PIXFMT_NV12: YUV 4:2:0 planar
+ * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
+ *
+ * Description:
+ * An enumeration of the DaVinci pixel formats.
+ */
+enum davinci_pix_format {
+ PIXFMT_1BPP = 0,
+ PIXFMT_2BPP,
+ PIXFMT_4BPP,
+ PIXFMT_8BPP,
+ PIXFMT_RGB565,
+ PIXFMT_YCbCrI,
+ PIXFMT_RGB888,
+ PIXFMT_YCrCbI,
+ PIXFMT_NV12,
+ PIXFMT_OSD_ATTR,
+};
+
+/**
+ * enum davinci_h_exp_ratio
+ * @H_EXP_OFF: no expansion (1/1)
+ * @H_EXP_9_OVER_8: 9/8 expansion ratio
+ * @H_EXP_3_OVER_2: 3/2 expansion ratio
+ *
+ * Description:
+ * An enumeration of the available horizontal expansion ratios.
+ */
+enum davinci_h_exp_ratio {
+ H_EXP_OFF,
+ H_EXP_9_OVER_8,
+ H_EXP_3_OVER_2,
+};
+
+/**
+ * enum davinci_v_exp_ratio
+ * @V_EXP_OFF: no expansion (1/1)
+ * @V_EXP_6_OVER_5: 6/5 expansion ratio
+ *
+ * Description:
+ * An enumeration of the available vertical expansion ratios.
+ */
+enum davinci_v_exp_ratio {
+ V_EXP_OFF,
+ V_EXP_6_OVER_5,
+};
+
+/**
+ * enum davinci_zoom_factor
+ * @ZOOM_X1: no zoom (x1)
+ * @ZOOM_X2: x2 zoom
+ * @ZOOM_X4: x4 zoom
+ *
+ * Description:
+ * An enumeration of the available zoom factors.
+ */
+enum davinci_zoom_factor {
+ ZOOM_X1,
+ ZOOM_X2,
+ ZOOM_X4,
+};
+
+/**
+ * enum davinci_clut
+ * @ROM_CLUT: ROM CLUT
+ * @RAM_CLUT: RAM CLUT
+ *
+ * Description:
+ * An enumeration of the available Color Lookup Tables (CLUTs).
+ */
+enum davinci_clut {
+ ROM_CLUT,
+ RAM_CLUT,
+};
+
+/**
+ * enum davinci_rom_clut
+ * @ROM_CLUT0: Macintosh CLUT
+ * @ROM_CLUT1: CLUT from DM270 and prior devices
+ *
+ * Description:
+ * An enumeration of the ROM Color Lookup Table (CLUT) options.
+ */
+enum davinci_rom_clut {
+ ROM_CLUT0,
+ ROM_CLUT1,
+};
+
+/**
+ * enum davinci_blending_factor
+ * @OSD_0_VID_8: OSD pixels are fully transparent
+ * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
+ * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
+ * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
+ * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
+ * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
+ * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
+ * @OSD_8_VID_0: OSD pixels are fully opaque
+ *
+ * Description:
+ * An enumeration of the DaVinci pixel blending factor options.
+ */
+enum davinci_blending_factor {
+ OSD_0_VID_8,
+ OSD_1_VID_7,
+ OSD_2_VID_6,
+ OSD_3_VID_5,
+ OSD_4_VID_4,
+ OSD_5_VID_3,
+ OSD_6_VID_2,
+ OSD_8_VID_0,
+};
+
+/**
+ * enum davinci_blink_interval
+ * @BLINK_X1: blink interval is 1 vertical refresh cycle
+ * @BLINK_X2: blink interval is 2 vertical refresh cycles
+ * @BLINK_X3: blink interval is 3 vertical refresh cycles
+ * @BLINK_X4: blink interval is 4 vertical refresh cycles
+ *
+ * Description:
+ * An enumeration of the DaVinci pixel blinking interval options.
+ */
+enum davinci_blink_interval {
+ BLINK_X1,
+ BLINK_X2,
+ BLINK_X3,
+ BLINK_X4,
+};
+
+/**
+ * enum davinci_cursor_h_width
+ * @H_WIDTH_1: horizontal line width is 1 pixel
+ * @H_WIDTH_4: horizontal line width is 4 pixels
+ * @H_WIDTH_8: horizontal line width is 8 pixels
+ * @H_WIDTH_12: horizontal line width is 12 pixels
+ * @H_WIDTH_16: horizontal line width is 16 pixels
+ * @H_WIDTH_20: horizontal line width is 20 pixels
+ * @H_WIDTH_24: horizontal line width is 24 pixels
+ * @H_WIDTH_28: horizontal line width is 28 pixels
+ */
+enum davinci_cursor_h_width {
+ H_WIDTH_1,
+ H_WIDTH_4,
+ H_WIDTH_8,
+ H_WIDTH_12,
+ H_WIDTH_16,
+ H_WIDTH_20,
+ H_WIDTH_24,
+ H_WIDTH_28,
+};
+
+/**
+ * enum davinci_cursor_v_width
+ * @V_WIDTH_1: vertical line width is 1 line
+ * @V_WIDTH_2: vertical line width is 2 lines
+ * @V_WIDTH_4: vertical line width is 4 lines
+ * @V_WIDTH_6: vertical line width is 6 lines
+ * @V_WIDTH_8: vertical line width is 8 lines
+ * @V_WIDTH_10: vertical line width is 10 lines
+ * @V_WIDTH_12: vertical line width is 12 lines
+ * @V_WIDTH_14: vertical line width is 14 lines
+ */
+enum davinci_cursor_v_width {
+ V_WIDTH_1,
+ V_WIDTH_2,
+ V_WIDTH_4,
+ V_WIDTH_6,
+ V_WIDTH_8,
+ V_WIDTH_10,
+ V_WIDTH_12,
+ V_WIDTH_14,
+};
+
+/**
+ * struct davinci_cursor_config
+ * @xsize: horizontal size in pixels
+ * @ysize: vertical size in lines
+ * @xpos: horizontal offset in pixels from the left edge of the display
+ * @ypos: vertical offset in lines from the top of the display
+ * @interlaced: Non-zero if the display is interlaced, or zero otherwise
+ * @h_width: horizontal line width
+ * @v_width: vertical line width
+ * @clut: the CLUT selector (ROM or RAM) for the cursor color
+ * @clut_index: an index into the CLUT for the cursor color
+ *
+ * Description:
+ * A structure describing the configuration parameters of the hardware
+ * rectangular cursor.
+ */
+struct davinci_cursor_config {
+ unsigned xsize;
+ unsigned ysize;
+ unsigned xpos;
+ unsigned ypos;
+ int interlaced;
+ enum davinci_cursor_h_width h_width;
+ enum davinci_cursor_v_width v_width;
+ enum davinci_clut clut;
+ unsigned char clut_index;
+};
+
+/**
+ * struct davinci_disp_callback
+ * @next: used internally by the display manager to maintain a liked list of
+ * callbacks
+ * @mask: a bitmask specifying the display manager event(s) for which the
+ * callback will be invoked
+ * @handler: the callback routine
+ * @arg: a null pointer that is passed as the second argument to the callback
+ * routine
+ */
+struct davinci_disp_callback {
+ struct davinci_disp_callback *next;
+ unsigned mask;
+ void (*handler) (unsigned event, void *arg);
+ void *arg;
+};
+
+/* display manager events */
+#define DAVINCI_DISP_END_OF_FRAME 1
+#define DAVINCI_DISP_FIRST_FIELD 2
+#define DAVINCI_DISP_SECOND_FIELD 4
+
+/**
+ * struct davinci_layer_config
+ * @pixfmt: pixel format
+ * @line_length: offset in bytes between start of each line in memory
+ * @xsize: number of horizontal pixels displayed per line
+ * @ysize: number of lines displayed
+ * @xpos: horizontal offset in pixels from the left edge of the display
+ * @ypos: vertical offset in lines from the top of the display
+ * @interlaced: Non-zero if the display is interlaced, or zero otherwise
+ *
+ * Description:
+ * A structure describing the configuration parameters of an On-Screen Display
+ * (OSD) or video layer related to how the image is stored in memory.
+ * @line_length must be a multiple of the cache line size (32 bytes).
+ */
+struct davinci_layer_config {
+ enum davinci_pix_format pixfmt;
+ unsigned line_length;
+ unsigned xsize;
+ unsigned ysize;
+ unsigned xpos;
+ unsigned ypos;
+ int interlaced;
+};
+
+
+/**
+ * struct davinci_fb_desc
+ * @cbcr_ofst: offset of the cbcr data from the beginning of the frame buffer
+ * @yd_offset: offset into the Y-plane where the layer should start displaying
+ *
+ * Description:
+ * A structure describing additional information about the frame buffers being
+ * passed to the display. This may be needed when the buffers have a
+ * non-standard layout.
+ * @yd_ofst must be 64-byte aligned.
+ */
+struct davinci_fb_desc {
+ unsigned long cbcr_ofst;
+ unsigned long yd_ofst;
+};
+
+/**
+ * davinci_disp_request_layer
+ * @layer: layer id
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Request to use an On-Screen Display (OSD) or video layer (window).
+ */
+int davinci_disp_request_layer(enum davinci_disp_layer layer);
+
+/**
+ * davinci_disp_release_layer
+ * @layer: layer id
+ *
+ * Description:
+ * Release a layer previously obtained via davinci_disp_request_layer().
+ */
+void davinci_disp_release_layer(enum davinci_disp_layer layer);
+
+/**
+ * davinci_disp_init_layer
+ * @layer: layer id
+ *
+ * Description:
+ * Initialize all parameters that are uniquely associated with the specified
+ * display layer to their default values. Parameters that are common to
+ * multiple display layers (e.g. expansion ratios) are not affected. The
+ * default state of a layer is disabled with X1 zoom. The OSD layers default
+ * to 8-bits-per-pixel bitmap format, RAM CLUT, REC601 attenuation disabled,
+ * color key blending disabled, and are fully opaque. Video layers maintain
+ * their current pixel format, either YCbCrI or YCrCbI, but will default to
+ * YCbCrI when first initialized.
+ * In general, it is not necessary for a display manager user to call this
+ * routine. The display manager calls this routine automatically for every
+ * layer at initialization time and for an individual layer when the layer is
+ * released.
+ */
+void davinci_disp_init_layer(enum davinci_disp_layer layer);
+
+/**
+ * davinci_disp_enable_layer
+ * @layer: layer id
+ * Returns: Zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Enable a video layer so that it is displayed.
+ */
+int davinci_disp_enable_layer(enum davinci_disp_layer layer, int otherwin);
+
+/**
+ * davinci_disp_disable_layer
+ * @layer: layer id
+ *
+ * Description:
+ * Disable a video layer so that it is not displayed.
+ */
+void davinci_disp_disable_layer(enum davinci_disp_layer layer);
+
+/**
+ * davinci_disp_layer_is_enabled
+ * @layer: layer id
+ * Returns: 1 if the layer is enabled, or 0 otherwise
+ *
+ * Description:
+ * Determine whether or not a video layer is enabled..
+ */
+int davinci_disp_layer_is_enabled(enum davinci_disp_layer layer);
+
+/**
+ * davinci_disp_set_layer_config
+ * @layer: layer id
+ * @lconfig: a pointer to a davinci_layer_config structure
+ * Returns: 1 if the requested configuration is rejected, or 0 otherwise.
+ * When the configuration is rejected, the value of @lconfig on
+ * exit will be the current layer configuration.
+ *
+ * Description:
+ * Configure the parameters of an On-Screen Display (OSD) or video layer
+ * related to how the image is stored in memory. On entry, the values of the
+ * members of the @lconfig struct specify the desired configuration. On exit,
+ * the values of the members of the @lconfig struct will be updated to reflect
+ * the actual configuration, which is subject to the constraints of the
+ * DaVinci OSD controller.
+ */
+int davinci_disp_set_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig);
+
+/**
+ * davinci_disp_try_layer_config
+ * @layer: layer id
+ * @lconfig: a pointer to a davinci_layer_config structure
+ * Returns: 1 if the requested configuration is rejected, or 0 otherwise.
+ * When the configuration is rejected, the value of @lconfig on
+ * exit will be the current layer configuration.
+ *
+ * Description:
+ * Evaluate the parameters of an On-Screen Display (OSD) or video layer
+ * configuration. On entry, the values of the members of the @lconfig struct
+ * specify the desired configuration. On exit, the values of the members of the
+ * @lconfig struct will be updated to reflect the closest actual configuration
+ * which could currently be set and enabled subject to the constraints of the
+ * DaVinci OSD controller. The actual layer configuration is not modified by
+ * this routine.
+ *
+ * Note that some of the constraints depend on the current configuration of
+ * other windows, so it is possible for a configuration returned by
+ * davinci_disp_try_layer_config() to fail to be set or enabled successfully
+ * if the configuration of other windows has changed.
+ */
+int davinci_disp_try_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig);
+
+/**
+ * davinci_disp_get_layer_config
+ * @layer: layer id
+ * @lconfig: a pointer to a davinci_layer_config structure
+ *
+ * Description:
+ * Get the parameters of an On-Screen Display (OSD) or video layer
+ * related to how the image is stored in memory. On exit, the values of the
+ * members of the @lconfig struct will be updated to reflect the current
+ * configuration.
+ */
+void davinci_disp_get_layer_config(enum davinci_disp_layer layer,
+ struct davinci_layer_config *lconfig);
+
+/**
+ * davinci_disp_start_layer
+ * @layer: layer id
+ * @fb_base_phys: physical base address of the framebuffer
+ *
+ * Description:
+ * Initialize the framebuffer base address \of an On-Screen Display (OSD) or
+ * video layer. Display of the layer may be either enabled or disabled on
+ * entry and will be unchanged on exit. @fb_base_phys must be cache-line
+ * (32-byte) aligned.
+ */
+void davinci_disp_start_layer(enum davinci_disp_layer layer,
+ unsigned long fb_base_phys,
+ struct davinci_fb_desc *fb_desc);
+
+/**
+ * davinci_disp_set_interpolation_filter
+ * @filter: non-zero to enable the interpolation filter, or zero to disable
+ *
+ * Description:
+ * Globally enable or disable the scaling (zoom and expansion) interpolation
+ * filter. It applies to all OSD and video windows.
+ */
+void davinci_disp_set_interpolation_filter(int filter);
+
+/**
+ * davinci_disp_get_interpolation_filter
+ * Returns: 1 if the interpolation filter is enabled, or 0 otherwise
+ *
+ * Description:
+ * Get the enabled/disabled status of the scaling (zoom and expansion)
+ * interpolation filter.
+ */
+int davinci_disp_get_interpolation_filter(void);
+
+/**
+ * davinci_disp_set_osd_expansion
+ * @h_exp: the horizontal expansion ratio
+ * @v_exp: the vertical expansion ratio
+ * Returns: zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Configure the expansion ratio for the OSD windows.
+ */
+int davinci_disp_set_osd_expansion(enum davinci_h_exp_ratio h_exp,
+ enum davinci_v_exp_ratio v_exp);
+
+/**
+ * davinci_disp_get_osd_expansion
+ * @h_exp: the horizontal expansion ratio
+ * @v_exp: the vertical expansion ratio
+ *
+ * Description:
+ * Get the expansion ratio for the OSD windows.
+ */
+void davinci_disp_get_osd_expansion(enum davinci_h_exp_ratio *h_exp,
+ enum davinci_v_exp_ratio *v_exp);
+
+/**
+ * davinci_disp_set_vid_expansion
+ * @h_exp: the horizontal expansion ratio
+ * @v_exp: the vertical expansion ratio
+ * Returns: zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Configure the expansion ratio for the video windows.
+ */
+int davinci_disp_set_vid_expansion(enum davinci_h_exp_ratio h_exp,
+ enum davinci_v_exp_ratio v_exp);
+
+/**
+ * davinci_disp_get_vid_expansion
+ * @h_exp: the horizontal expansion ratio
+ * @v_exp: the vertical expansion ratio
+ *
+ * Description:
+ * Get the expansion ratio for the video windows.
+ */
+void davinci_disp_get_vid_expansion(enum davinci_h_exp_ratio *h_exp,
+ enum davinci_v_exp_ratio *v_exp);
+
+/**
+ * davinci_disp_set_zoom
+ * @layer: layer id
+ * @h_zoom: horizontal zoom factor
+ * @v_zoom: vertical zoom factor
+ *
+ * Description:
+ * Set the horizontal and vertical zoom factors.
+ */
+void davinci_disp_set_zoom(enum davinci_disp_layer layer,
+ enum davinci_zoom_factor h_zoom,
+ enum davinci_zoom_factor v_zoom);
+
+/**
+ * davinci_disp_get_zoom
+ * @layer: layer id
+ * @h_zoom: horizontal zoom factor
+ * @v_zoom: vertical zoom factor
+ *
+ * Description:
+ * Get the horizontal and vertical zoom factors.
+ */
+void davinci_disp_get_zoom(enum davinci_disp_layer layer,
+ enum davinci_zoom_factor *h_zoom,
+ enum davinci_zoom_factor *v_zoom);
+
+/**
+ * davinci_disp_set_background
+ * @clut: the CLUT selector
+ * @clut_index: an index into the CLUT
+ *
+ * Description:
+ * Set the background color that is displayed in any region not covered by one
+ * of the display layers. The color is selected by specifying a Color Lookup
+ * Table (either ROM or RAM) and an index into the CLUT.
+ */
+void davinci_disp_set_background(enum davinci_clut clut,
+ unsigned char clut_index);
+
+/**
+ * davinci_disp_get_background
+ * @clut: the CLUT selector
+ * @clut_index: an index into the CLUT
+ *
+ * Description:
+ * Get the background color that is displayed in any region not covered by one
+ * of the display layers. The color is selected by specifying a Color Lookup
+ * Table (either ROM or RAM) and an index into the CLUT.
+ */
+void davinci_disp_get_background(enum davinci_clut *clut,
+ unsigned char *clut_index);
+
+/**
+ * davinci_disp_set_rom_clut
+ * @rom_clut: the ROM CLUT selector
+ *
+ * Description:
+ * Choose which of the two ROM Color Lookup Tables will be used.
+ */
+void davinci_disp_set_rom_clut(enum davinci_rom_clut rom_clut);
+
+/**
+ * davinci_disp_get_rom_clut
+ * Returns: the ROM CLUT selector
+ *
+ * Description:
+ * Query which of the two ROM Color Lookup Tables is currently selected.
+ */
+enum davinci_rom_clut davinci_disp_get_rom_clut(void);
+
+/**
+ * davinci_disp_set_clut_ycbcr
+ * @clut_index: an index into the CLUT
+ * @y: Luma (Y) value
+ * @cb: Blue Chroma (Cb) value
+ * @cr: Red Chroma (Cr) value
+ *
+ * Description:
+ * Set a YCbCr value in the Color Lookup Table (CLUT).
+ */
+void davinci_disp_set_clut_ycbcr(unsigned char clut_index, unsigned char y,
+ unsigned char cb, unsigned char cr);
+
+/**
+ * davinci_disp_set_clut_rgb
+ * @clut_index: an index into the CLUT
+ * @r: Red value
+ * @g: Green value
+ * @b: Blue value
+ *
+ * Description:
+ * Set an RGB value in the Color Lookup Table (CLUT).
+ */
+void davinci_disp_set_clut_rgb(unsigned char clut_index, unsigned char r,
+ unsigned char g, unsigned char b);
+
+/**
+ * davinci_disp_set_osd_clut
+ * @osdwin: OSD0 or OSD1 layer id
+ * @clut: the CLUT selector
+ *
+ * Description:
+ * Select whether the RAM CLUT or the ROM CLUT is to be used for an OSD window.
+ * The selection is only significant if the window is using a 1-, 2-, 4-, or
+ * 8-bit pixel format.
+ */
+void davinci_disp_set_osd_clut(enum davinci_osd_layer osdwin,
+ enum davinci_clut clut);
+
+/**
+ * davinci_disp_get_osd_clut
+ * @osdwin: OSD0 or OSD1 layer id
+ * Returns: the CLUT selector
+ *
+ * Description:
+ * Query whether the RAM CLUT or the ROM CLUT is currently selected for an OSD
+ * window. The selection is only significant if the window is using a 1-, 2-,
+ * 4-, or 8-bit pixel format.
+ */
+enum davinci_clut davinci_disp_get_osd_clut(enum davinci_osd_layer osdwin);
+
+/**
+ * davinci_disp_enable_color_key
+ * @osdwin: OSD0 or OSD1 layer id
+ * @colorkey: the transparency color key
+ *
+ * Description:
+ * Enable transparency color key blending. Any pixel in the specified OSD
+ * window which matches the color key will be transparent (or partially
+ * transparent) and allow the underlying video pixel to be displayed based on
+ * the blending factor.
+ *
+ * Interpretation of the @colorkey argument is determined by the pixel format
+ * assigned to the window. The pixel format must be specified via
+ * davinci_disp_set_layer_config() before calling this routine.
+ *
+ * %PIXFMT_1BPP pixels matching @colorkey bit 0 are blended.
+ * %PIXFMT_2BPP pixels matching @colorkey bits 1-0 are blended.
+ * %PIXFMT_4BPP pixels matching @colorkey bits 3-0 are blended.
+ * %PIXFMT_8BPP pixels matching @colorkey bits 7-0 are blended.
+ * %PIXFMT_RGB565 pixels matching @colorkey bits 15-0 are blended.
+ * %PIXFMT_YCbCrI pixels with Luma (Y) matching @colorkey bits 15-8 are blended.
+ * %PIXFMT_RGB888 pixels matching @colorkey bits 23-0 are blended.
+ * %PIXFMT_YCrCbI pixels with Luma (Y) matching @colorkey bits 15-8 are blended.
+ * Color keying is not applicable to %PIXFMT_OSD_ATTR pixels.
+ *
+ * For DM644x processors, only the four %PIXFMT_nBPP pixel formats and
+ * %PIXFMT_RGB565 are supported. The color key for the bitmap formats is fixed
+ * at zero on DM644x processors, so the value passed in the @colorkey argument
+ * is only significant for the %PIXFMT_RGB565 pixel format.
+ */
+void davinci_disp_enable_color_key(enum davinci_osd_layer osdwin,
+ unsigned colorkey);
+
+/**
+ * davinci_disp_disable_color_key
+ * @osdwin: OSD0 or OSD1 layer id
+ *
+ * Description:
+ * Disable transparency color key blending for the specified OSD layer. All
+ * pixels in the OSD window will be blended with video pixels according to the
+ * blending factor.
+ */
+void davinci_disp_disable_color_key(enum davinci_osd_layer osdwin);
+
+/**
+ * davinci_disp_set_blending_factor
+ * @osdwin: OSD0 or OSD1 layer id
+ * @blend: the blending factor
+ *
+ * Description:
+ * Set the blending factor for an OSD window. The blending factor determines
+ * the degree of opacity or transparency of OSD pixels. Transparent or
+ * partially transparent pixels allow the underlying video pixels to be
+ * displayed based on the blending factor. All OSD pixels are blended unless
+ * color keying is enabled, in which case only pixels matching the color key
+ * are blended.
+ */
+void davinci_disp_set_blending_factor(enum davinci_osd_layer osdwin,
+ enum davinci_blending_factor blend);
+
+/**
+ * davinci_disp_get_blending_factor
+ * @osdwin: OSD0 or OSD1 layer id
+ * Returns: the blending factor
+ *
+ * Description:
+ * Get the blending factor for an OSD window.
+ */
+enum davinci_blending_factor davinci_disp_get_blending_factor(enum
+ davinci_osd_layer
+ osdwin);
+
+/**
+ * davinci_disp_set_rec601_attenuation
+ * @osdwin: OSD0 or OSD1 layer id
+ * @enable: non-zero to enable REC601 attenuation, or zero to disable
+ *
+ * Description:
+ * Enable or disable REC601 attenuation of data in an OSD window.
+ */
+void davinci_disp_set_rec601_attenuation(enum davinci_osd_layer osdwin,
+ int enable);
+
+/**
+ * davinci_disp_get_rec601_attenuation
+ * @osdwin: OSD0 or OSD1 layer id
+ * Returns: 1 if REC601 attenuation is enabled, or 0 otherwise
+ *
+ * Description:
+ * Get the REC601 attenuation status for an OSD window.
+ */
+int davinci_disp_get_rec601_attenuation(enum davinci_osd_layer osdwin);
+
+/**
+ * davinci_disp_set_palette_map
+ * @osdwin: OSD0 or OSD1 layer id
+ * @pixel_value: a bitmap pixel value
+ * @clut_index: an index into the CLUT
+ *
+ * Description:
+ * A 256-entry Color Lookup Table (CLUT) is used for bitmap pixel formats.
+ * Every entry in the CLUT is used when the color depth is 8 bits. However,
+ * only a subset of the CLUT entries are needed for color depths of 1, 2,
+ * or 4 bits. Each pixel value for color depths of 1, 2, or 4 bits can be
+ * mapped to any of the 256 CLUT entries. Two CLUT entries are used for a
+ * color depth of 1 bit, four CLUT entries are used for a color depth of
+ * 2 bits, and sixteen CLUT entries are used for a color depth of 4 bits.
+ *
+ * Interpretation of the @pixel_value argument is determined by the pixel
+ * format assigned to the window. The pixel format must be specified via
+ * davinci_disp_set_layer_config() before calling this routine.
+ */
+void davinci_disp_set_palette_map(enum davinci_osd_layer osdwin,
+ unsigned char pixel_value,
+ unsigned char clut_index);
+
+/**
+ * davinci_disp_get_palette_map
+ * @osdwin: OSD0 or OSD1 layer id
+ * @pixel_value: a bitmap pixel value
+ * Returns: an index into the CLUT
+ *
+ * Description:
+ * Given a pixel value, return the corresponding clut index from the palette
+ * map.
+ *
+ * Interpretation of the @pixel_value argument is determined by the pixel
+ * format assigned to the window. The pixel format must be specified via
+ * davinci_disp_set_layer_config() before calling this routine.
+ */
+unsigned char davinci_disp_get_palette_map(enum davinci_osd_layer osdwin,
+ unsigned char pixel_value);
+
+/**
+ * davinci_disp_set_blink_attribute
+ * @enable: non-zero to enable blinking, zero to disable
+ * @blink: the blinking interval
+ *
+ * Description:
+ * Set the blinking attributes when OSD1 is configured as an attribute window.
+ * If blinking is enabled, then OSD0 pixels which have their corresponding
+ * per-pixel blinking bit set in OSD1 will blink. The blinking interval is a
+ * multiple of the vertical refresh interval.
+ */
+void davinci_disp_set_blink_attribute(int enable,
+ enum davinci_blink_interval blink);
+
+/**
+ * davinci_disp_get_blink_attribute
+ * @enable: one if blinking is enabled, or zero if disabled
+ * @blink: the blinking interval
+ *
+ * Description:
+ * Get the blinking attributes when OSD1 is configured as an attribute window.
+ * If blinking is enabled, then OSD0 pixels which have their corresponding
+ * per-pixel blinking bit set in OSD1 will blink. The blinking interval is a
+ * multiple of the vertical refresh interval.
+ */
+void davinci_disp_get_blink_attribute(int *enable,
+ enum davinci_blink_interval *blink);
+
+/**
+ * davinci_disp_cursor_enable
+ *
+ * Description:
+ * Enable display of the hardware cursor.
+ */
+void davinci_disp_cursor_enable(void);
+
+/**
+ * davinci_disp_cursor_disable
+ *
+ * Description:
+ * Disable display of the hardware cursor.
+ */
+void davinci_disp_cursor_disable(void);
+
+/**
+ * davinci_disp_cursor_is_enabled
+ * Returns: 1 if cursor is enabled, or 0 otherwise
+ *
+ * Description:
+ * Query whether or not display of the hardware cursor is enabled.
+ */
+int davinci_disp_cursor_is_enabled(void);
+
+/**
+ * davinci_disp_set_cursor_config
+ * @cursor: the cursor configuration
+ *
+ * Description:
+ * Set the configuration (color, line width, position, and size) of the hardware
+ * rectangular cursor.
+ */
+void davinci_disp_set_cursor_config(struct davinci_cursor_config *cursor);
+
+/**
+ * davinci_disp_get_cursor_config
+ * @cursor: the cursor configuration
+ *
+ * Description:
+ * Get the configuration (color, line width, position, and size) of the hardware
+ * rectangular cursor.
+ */
+void davinci_disp_get_cursor_config(struct davinci_cursor_config *cursor);
+
+/**
+ * davinci_disp_set_field_inversion
+ * @enable: non-zero to enable field signal inversion, or zero to disable
+ *
+ * Description:
+ * Enable or disable field signal inversion, which inverts the polarity of the
+ * field ID signal from the video encoder. This setting applies to all OSD and
+ * video windows. It is only significant when the display is interlaced.
+ */
+void davinci_disp_set_field_inversion(int enable);
+
+/**
+ * davinci_disp_register_callback
+ * @callback: a pointer to a davinci_disp_callback struct
+ * Returns: zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Register a callback routine for a DaVinci display manager event.
+ * @callback->handler is a pointer to the callback routine. The first argument
+ * passed to the callback routine is the display manager event bitmask
+ * indicating which event(s) occurred. The second argument passed to the
+ * callback routine is @callback->arg. @callback->mask is a bitmask specifying
+ * the events for which the caller wishes to be notified. @callback->next is
+ * used internally by the display manager and need not be initialized by the
+ * caller. Once a callback routine has been registered, the caller must not
+ * modify the @callback struct until the callback has been unregistered.
+ *
+ * The display manager events are %DAVINCI_DISP_END_OF_FRAME,
+ * %DAVINCI_DISP_FIRST_FIELD, and %DAVINCI_DISP_SECOND_FIELD.
+ */
+int davinci_disp_register_callback(struct davinci_disp_callback *callback);
+
+/**
+ * davinci_disp_unregister_callback
+ * @callback: a pointer to a davinci_disp_callback struct
+ * Returns: zero if successful, or non-zero otherwise
+ *
+ * Description:
+ * Unregister a display manager callback routine previously registered with
+ * davinci_disp_register_callback().
+ */
+int davinci_disp_unregister_callback(struct davinci_disp_callback *callback);
+
+#ifdef __KERNEL__
+void osd_write_left_margin(u32 val);
+
+void osd_write_upper_margin(u32 val);
+
+u32 osd_read_left_margin(void);
+
+u32 osd_read_upper_margin(void);
+#endif
+
+#endif
diff --git a/drivers/media/platform/davinci/vpbe_osd_regs.h b/include/video/davinci_vpbe.h
similarity index 66%
rename from drivers/media/platform/davinci/vpbe_osd_regs.h
rename to include/video/davinci_vpbe.h
index 584520f3..97423b9e 100644
--- a/drivers/media/platform/davinci/vpbe_osd_regs.h
+++ b/include/video/davinci_vpbe.h
@@ -1,9 +1,10 @@
/*
- * Copyright (C) 2006-2010 Texas Instruments Inc
+ * Copyright (C) 2006 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -14,8 +15,33 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#ifndef _VPBE_OSD_REGS_H
-#define _VPBE_OSD_REGS_H
+#ifndef _DAVINCI_VPBE_H_
+#define _DAVINCI_VPBE_H_
+
+struct davinci_venc_platform_data {
+ bool invert_field;
+};
+
+/* VPBE register base addresses */
+#define DM644X_VENC_REG_BASE 0x01C72400
+#define DM644X_OSD_REG_BASE 0x01C72600
+#define DM644X_VPBE_REG_BASE 0x01C72780
+
+#define DM355_VPSSCLK_REG_BASE 0x01C70000
+#define DM355_OSD_REG_BASE 0x01C70200
+#define DM355_VENC_REG_BASE 0x01C70400
+
+#define DM365_VENC_REG_BASE 0x01C71E00
+#define DM365_OSD_REG_BASE 0x01C71C00
+#define DM365_ISP5_REG_BASE 0x01C70000
+
+#define OSD_REG_SIZE 0x00000100
+
+/* SYS register addresses */
+#define SYS_VPSS_CLKCTL 0x01C40044
+
+#define DM3XX_VDAC_CONFIG 0x01C4002C
+#define DM355_USB_PHY_CTRL 0x01c40034
/* VPBE Global Registers */
#define VPBE_PID 0x0
@@ -46,6 +72,85 @@
#define ISP5_EVTSEL 0x1c
#define ISP5_CCDCMUX 0x20
+/* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */
+#define VENC_VMOD 0x00
+#define VENC_VIDCTL 0x04
+#define VENC_VDPRO 0x08
+#define VENC_SYNCCTL 0x0C
+#define VENC_HSPLS 0x10
+#define VENC_VSPLS 0x14
+#define VENC_HINT 0x18
+#define VENC_HSTART 0x1C
+#define VENC_HVALID 0x20
+#define VENC_VINT 0x24
+#define VENC_VSTART 0x28
+#define VENC_VVALID 0x2C
+#define VENC_HSDLY 0x30
+#define VENC_VSDLY 0x34
+#define VENC_YCCCTL 0x38
+#define VENC_RGBCTL 0x3C
+#define VENC_RGBCLP 0x40
+#define VENC_LINECTL 0x44
+#define VENC_CULLLINE 0x48
+#define VENC_LCDOUT 0x4C
+#define VENC_BRTS 0x50
+#define VENC_BRTW 0x54
+#define VENC_ACCTL 0x58
+#define VENC_PWMP 0x5C
+#define VENC_PWMW 0x60
+#define VENC_DCLKCTL 0x64
+#define VENC_DCLKPTN0 0x68
+#define VENC_DCLKPTN1 0x6C
+#define VENC_DCLKPTN2 0x70
+#define VENC_DCLKPTN3 0x74
+#define VENC_DCLKPTN0A 0x78
+#define VENC_DCLKPTN1A 0x7C
+#define VENC_DCLKPTN2A 0x80
+#define VENC_DCLKPTN3A 0x84
+#define VENC_DCLKHS 0x88
+#define VENC_DCLKHSA 0x8C
+#define VENC_DCLKHR 0x90
+#define VENC_DCLKVS 0x94
+#define VENC_DCLKVR 0x98
+#define VENC_CAPCTL 0x9C
+#define VENC_CAPDO 0xA0
+#define VENC_CAPDE 0xA4
+#define VENC_ATR0 0xA8
+#define VENC_ATR1 0xAC
+#define VENC_ATR2 0xB0
+#define VENC_VSTAT 0xB8
+#define VENC_RAMADR 0xBC
+#define VENC_RAMPORT 0xC0
+#define VENC_DACTST 0xC4
+#define VENC_YCOLVL 0xC8
+#define VENC_SCPROG 0xCC
+#define VENC_CVBS 0xDC
+#define VENC_CMPNT 0xE0
+#define VENC_ETMG0 0xE4
+#define VENC_ETMG1 0xE8
+#define VENC_ETMG2 0xEC
+#define VENC_ETMG3 0xF0
+#define VENC_DACSEL 0xF4
+#define VENC_ARGBX0 0x100
+#define VENC_ARGBX1 0x104
+#define VENC_ARGBX2 0x108
+#define VENC_ARGBX3 0x10C
+#define VENC_ARGBX4 0x110
+#define VENC_DRGBX0 0x114
+#define VENC_DRGBX1 0x118
+#define VENC_DRGBX2 0x11C
+#define VENC_DRGBX3 0x120
+#define VENC_DRGBX4 0x124
+#define VENC_VSTARTA 0x128
+#define VENC_OSDCLK0 0x12C
+#define VENC_OSDCLK1 0x130
+#define VENC_HVLDCL0 0x134
+#define VENC_HVLDCL1 0x138
+#define VENC_OSDHADV 0x13C
+#define VENC_CLKCTL 0x140
+#define VENC_GAMCTL 0x144
+#define VENC_XHINTVL 0x174
+
/* VPBE On-Screen Display Subsystem Registers (OSD) */
#define OSD_MODE 0x00
#define OSD_VIDWINMD 0x04
@@ -140,6 +245,29 @@
#define ISP5_INTSTAT_VENCINT (1 << 21)
#define ISP5_INTSTAT_OSDINT (1 << 20)
+#define VENC_VMOD_VDMD_SHIFT 12
+#define VENC_VMOD_VDMD_YCBCR16 0
+#define VENC_VMOD_VDMD_YCBCR8 1
+#define VENC_VMOD_VDMD_RGB666 2
+#define VENC_VMOD_VDMD_RGB8 3
+#define VENC_VMOD_VDMD_EPSON 4
+#define VENC_VMOD_VDMD_CASIO 5
+#define VENC_VMOD_VDMD_UDISPQVGA 6
+#define VENC_VMOD_VDMD_STNLCD 7
+#define VENC_VMOD_VIE_SHIFT 1
+#define VENC_VMOD_VDMD (7 << 12)
+#define VENC_VMOD_ITLCL (1 << 11)
+#define VENC_VMOD_ITLC (1 << 10)
+#define VENC_VMOD_NSIT (1 << 9)
+#define VENC_VMOD_HDMD (1 << 8)
+#define VENC_VMOD_TVTYP_SHIFT 6
+#define VENC_VMOD_TVTYP (3 << 6)
+#define VENC_VMOD_SLAVE (1 << 5)
+#define VENC_VMOD_VMD (1 << 4)
+#define VENC_VMOD_BLNK (1 << 3)
+#define VENC_VMOD_VIE (1 << 1)
+#define VENC_VMOD_VENC (1 << 0)
+
/* VMOD TVTYP options for HDMD=0 */
#define SDTV_NTSC 0
#define SDTV_PAL 1
@@ -149,6 +277,48 @@
#define HDTV_1080I 2
#define HDTV_720P 3
+#define VENC_VIDCTL_VCLKP (1 << 14)
+#define VENC_VIDCTL_VCLKE_SHIFT 13
+#define VENC_VIDCTL_VCLKE (1 << 13)
+#define VENC_VIDCTL_VCLKZ_SHIFT 12
+#define VENC_VIDCTL_VCLKZ (1 << 12)
+#define VENC_VIDCTL_SYDIR_SHIFT 8
+#define VENC_VIDCTL_SYDIR (1 << 8)
+#define VENC_VIDCTL_DOMD_SHIFT 4
+#define VENC_VIDCTL_DOMD (3 << 4)
+#define VENC_VIDCTL_YCDIR_SHIFT 0
+#define VENC_VIDCTL_YCDIR (1 << 0)
+
+#define VENC_VDPRO_ATYCC_SHIFT 5
+#define VENC_VDPRO_ATYCC (1 << 5)
+#define VENC_VDPRO_ATCOM_SHIFT 4
+#define VENC_VDPRO_ATCOM (1 << 4)
+#define VENC_VDPRO_DAFRQ (1 << 3)
+#define VENC_VDPRO_DAUPS (1 << 2)
+#define VENC_VDPRO_CUPS (1 << 1)
+#define VENC_VDPRO_YUPS (1 << 0)
+
+#define VENC_SYNCCTL_VPL_SHIFT 3
+#define VENC_SYNCCTL_VPL (1 << 3)
+#define VENC_SYNCCTL_HPL_SHIFT 2
+#define VENC_SYNCCTL_HPL (1 << 2)
+#define VENC_SYNCCTL_SYEV_SHIFT 1
+#define VENC_SYNCCTL_SYEV (1 << 1)
+#define VENC_SYNCCTL_SYEH_SHIFT 0
+#define VENC_SYNCCTL_SYEH (1 << 0)
+#define VENC_SYNCCTL_OVD_SHIFT 14
+#define VENC_SYNCCTL_OVD (1 << 14)
+
+#define VENC_DCLKCTL_DCKEC_SHIFT 11
+#define VENC_DCLKCTL_DCKEC (1 << 11)
+#define VENC_DCLKCTL_DCKPW_SHIFT 0
+#define VENC_DCLKCTL_DCKPW (0x3f << 0)
+
+#define VENC_VSTAT_FIDST (1 << 4)
+
+#define VENC_CMPNT_MRGB_SHIFT 14
+#define VENC_CMPNT_MRGB (1 << 14)
+
#define OSD_MODE_CS (1 << 15)
#define OSD_MODE_OVRSZ (1 << 14)
#define OSD_MODE_OHRSZ (1 << 13)
@@ -352,7 +522,7 @@
#define OSD_TRANSPVALL_RGBL (0xffff << 0)
#define OSD_TRANSPVALU_Y_SHIFT 8
-#define OSD_TRANSPVALU_Y (0xff << 8)
+#define OSD_TRANSPVALU_Y (0xff << 8)
#define OSD_TRANSPVALU_RGBU_SHIFT 0
#define OSD_TRANSPVALU_RGBU (0xff << 0)
@@ -361,4 +531,15 @@
#define OSD_TRANSPBMPIDX_BMP0_SHIFT 0
#define OSD_TRANSPBMPIDX_BMP0 0xff
+/**
+ * davinci_disp_is_second_field
+ *
+ * Returns: non-zero if true, zero otherwise
+ *
+ * Description:
+ * Check the Video Status Register (VSTAT) field FIDST to see if it's set
+ * if true then it is second field
+ */
+int davinci_disp_is_second_field(void);
+
#endif /* _DAVINCI_VPBE_H_ */
diff --git a/include/video/davincifb.h b/include/video/davincifb.h
new file mode 100644
index 00000000..81dda993
--- /dev/null
+++ b/include/video/davincifb.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2009 MontaVista Software Inc.
+ * Copyright (C) 2006 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DAVINCIFB_H
+#define DAVINCIFB_H
+
+#include <video/davinci_osd.h>
+#include <linux/fb.h>
+#include <linux/poll.h>
+#include <linux/wait.h>
+
+#define DAVINCIFB_NAME "davincifb"
+
+/* There are 4 framebuffer devices, one per window. */
+#define OSD0_FBNAME "dm_osd0_fb"
+#define OSD1_FBNAME "dm_osd1_fb"
+#define VID0_FBNAME "dm_vid0_fb"
+#define VID1_FBNAME "dm_vid1_fb"
+
+struct davincifb_platform_data {
+ bool invert_field;
+};
+
+/* Structure for each window */
+struct vpbe_dm_win_info {
+ struct fb_info *info;
+ struct vpbe_dm_info *dm;
+ enum davinci_disp_layer layer;
+ unsigned xpos;
+ unsigned ypos;
+ unsigned own_window; /* Does the framebuffer driver own this window? */
+ unsigned display_window;
+ unsigned sdram_address;
+ unsigned int pseudo_palette[16];
+};
+
+/*
+ * Structure for the driver holding information of windows,
+ * memory base addresses etc.
+ */
+struct vpbe_dm_info {
+ struct vpbe_dm_win_info win[4];
+
+ wait_queue_head_t vsync_wait;
+ unsigned int vsync_cnt;
+ int timeout;
+ struct davinci_disp_callback vsync_callback;
+
+ unsigned char ram_clut[256][3];
+ enum davinci_pix_format yc_pixfmt;
+
+ struct fb_videomode mode;
+};
+
+#endif /* ifndef DAVINCIFB__H */
diff --git a/include/video/davincifb_ioctl.h b/include/video/davincifb_ioctl.h
new file mode 100644
index 00000000..7ce3788f
--- /dev/null
+++ b/include/video/davincifb_ioctl.h
@@ -0,0 +1,175 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option)any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef DAVINCIFB_IOCTL_H
+#define DAVINCIFB_IOCTL_H
+
+/*
+ * Enumerations
+ */
+
+/* Enum for Boolean variables */
+typedef enum {
+ SET_0 = 0,
+ SET_1 = 1
+} CB_CR_ORDER, ATTRIBUTE;
+
+/* Enable/Disable enum */
+typedef enum {
+ VPBE_DISABLE = 0,
+ VPBE_ENABLE = 1
+} ATTENUATION, EXPANSION, BLINKING;
+
+/*
+ * Structures and Union Definitions
+ */
+
+typedef struct zoom_params {
+ u_int32_t window_id;
+ u_int32_t zoom_h;
+ u_int32_t zoom_v;
+} zoom_params_t;
+
+/* Structure for transparency and the blending factor for the bitmap window */
+typedef struct vpbe_bitmap_blend_params {
+ unsigned int colorkey; /* color key to be blended */
+ unsigned int enable_colorkeying; /* enable color keying */
+ unsigned int bf; /* valid range from 0 to 7 only. */
+} vpbe_bitmap_blend_params_t;
+
+/* Structure for window expansion */
+typedef struct vpbe_win_expansion {
+ EXPANSION horizontal;
+ EXPANSION vertical; /* 1: Enable 0:disable */
+} vpbe_win_expansion_t;
+
+/* Structure for OSD window blinking options */
+typedef struct vpbe_blink_option {
+ BLINKING blinking; /* 1: Enable blinking 0: Disable */
+ unsigned int interval; /* Valid only if blinking is 1 */
+} vpbe_blink_option_t;
+
+/* Structure for background color */
+typedef struct vpbe_backg_color {
+ unsigned char clut_select; /* 2: RAM CLUT 1:ROM1 CLUT 0:ROM0 CLUT */
+ unsigned char color_offset; /* index of color */
+} vpbe_backg_color_t;
+
+/* Structure for Video window configurable parameters */
+typedef struct vpbe_video_config_params {
+ CB_CR_ORDER cb_cr_order; /* Cb/Cr order in input data for a pixel. */
+ /* 0: cb cr 1: cr cb */
+ vpbe_win_expansion_t exp_info; /* HZ/VT Expansion enable disable */
+} vpbe_video_config_params_t;
+
+/*
+ * Union of structures giving the CLUT index for the 1, 2, 4 bit bitmap values
+ */
+typedef union vpbe_clut_idx {
+ struct _for_4bit_bitmap {
+ unsigned char bitmap_val_0;
+ unsigned char bitmap_val_1;
+ unsigned char bitmap_val_2;
+ unsigned char bitmap_val_3;
+ unsigned char bitmap_val_4;
+ unsigned char bitmap_val_5;
+ unsigned char bitmap_val_6;
+ unsigned char bitmap_val_7;
+ unsigned char bitmap_val_8;
+ unsigned char bitmap_val_9;
+ unsigned char bitmap_val_10;
+ unsigned char bitmap_val_11;
+ unsigned char bitmap_val_12;
+ unsigned char bitmap_val_13;
+ unsigned char bitmap_val_14;
+ unsigned char bitmap_val_15;
+ } for_4bit_bitmap;
+ struct _for_2bit_bitmap {
+ unsigned char bitmap_val_0;
+ unsigned char dummy0[4];
+ unsigned char bitmap_val_1;
+ unsigned char dummy1[4];
+ unsigned char bitmap_val_2;
+ unsigned char dummy2[4];
+ unsigned char bitmap_val_3;
+ } for_2bit_bitmap;
+ struct _for_1bit_bitmap {
+ unsigned char bitmap_val_0;
+ unsigned char dummy0[14];
+ unsigned char bitmap_val_1;
+ } for_1bit_bitmap;
+} vpbe_clut_idx_t;
+
+/* Structure for bitmap window configurable parameters */
+typedef struct vpbe_bitmap_config_params {
+ /* Only for bitmap width = 1,2,4 bits */
+ vpbe_clut_idx_t clut_idx;
+ /* Attenuation value for YUV o/p for bitmap window */
+ unsigned char attenuation_enable;
+ /* 0: ROM DM270, 1:ROM DM320, 2:RAM CLUT */
+ unsigned char clut_select;
+} vpbe_bitmap_config_params_t;
+
+/* Structure to hold window position */
+typedef struct vpbe_window_position {
+ unsigned int xpos; /* X position of the window */
+ unsigned int ypos; /* Y position of the window */
+} vpbe_window_position_t;
+
+#define RAM_CLUT_SIZE 256*3
+
+/* custom ioctl definitions */
+#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t)
+#define FBIO_SETATTRIBUTE _IOW('F', 0x21, struct fb_fillrect)
+#define FBIO_SETPOSX _IOW('F', 0x22, u_int32_t)
+#define FBIO_SETPOSY _IOW('F', 0x23, u_int32_t)
+#define FBIO_SETZOOM _IOW('F', 0x24, struct zoom_params)
+#define FBIO_ENABLE_DISABLE_WIN \
+ _IOW('F', 0x30, unsigned char)
+#define FBIO_SET_BITMAP_BLEND_FACTOR \
+ _IOW('F', 0x31, vpbe_bitmap_blend_params_t)
+#define FBIO_SET_BITMAP_WIN_RAM_CLUT \
+ _IOW('F', 0x32, unsigned char[RAM_CLUT_SIZE])
+#define FBIO_ENABLE_DISABLE_ATTRIBUTE_WIN \
+ _IOW('F', 0x33, unsigned int)
+#define FBIO_GET_BLINK_INTERVAL \
+ _IOR('F', 0x34, vpbe_blink_option_t)
+#define FBIO_SET_BLINK_INTERVAL \
+ _IOW('F', 0x35, vpbe_blink_option_t)
+#define FBIO_GET_VIDEO_CONFIG_PARAMS \
+ _IOR('F', 0x36, vpbe_video_config_params_t)
+#define FBIO_SET_VIDEO_CONFIG_PARAMS \
+ _IOW('F', 0x37, vpbe_video_config_params_t)
+#define FBIO_GET_BITMAP_CONFIG_PARAMS \
+ _IOR('F', 0x38, vpbe_bitmap_config_params_t)
+#define FBIO_SET_BITMAP_CONFIG_PARAMS \
+ _IOW('F', 0x39, vpbe_bitmap_config_params_t)
+#define FBIO_SET_BACKG_COLOR \
+ _IOW('F', 0x47, vpbe_backg_color_t)
+#define FBIO_SETPOS \
+ _IOW('F', 0x49, u_int32_t)
+#define FBIO_SET_CURSOR \
+ _IOW('F', 0x50, struct fb_cursor)
+
+/* Window ID definitions */
+#define OSD0 0
+#define VID0 1
+#define OSD1 2
+#define VID1 3
+
+#endif /* ifndef DAVINCIFB_IOCTL_H */
diff --git a/include/video/edid.h b/include/video/edid.h
index 0cb8b2a9..97857462 100644
--- a/include/video/edid.h
+++ b/include/video/edid.h
@@ -1,9 +1,15 @@
#ifndef __linux_video_edid_h__
#define __linux_video_edid_h__
-#include <uapi/video/edid.h>
+#if !defined(__KERNEL__) || defined(CONFIG_X86)
-#ifdef CONFIG_X86
+struct edid_info {
+ unsigned char dummy[128];
+};
+
+#ifdef __KERNEL__
extern struct edid_info edid_info;
+#endif /* __KERNEL__ */
+
#endif
#endif /* __linux_video_edid_h__ */
diff --git a/kernel/.gitignore b/kernel/.gitignore
index b3097bde..ab4f1090 100644
--- a/kernel/.gitignore
+++ b/kernel/.gitignore
@@ -4,4 +4,3 @@
config_data.h
config_data.gz
timeconst.h
-hz.bc
diff --git a/kernel/capability.c b/kernel/capability.c
index f6c2ce57..493d9725 100644
--- a/kernel/capability.c
+++ b/kernel/capability.c
@@ -392,30 +392,6 @@ bool ns_capable(struct user_namespace *ns, int cap)
}
EXPORT_SYMBOL(ns_capable);
-/**
- * file_ns_capable - Determine if the file's opener had a capability in effect
- * @file: The file we want to check
- * @ns: The usernamespace we want the capability in
- * @cap: The capability to be tested for
- *
- * Return true if task that opened the file had a capability in effect
- * when the file was opened.
- *
- * This does not set PF_SUPERPRIV because the caller may not
- * actually be privileged.
- */
-bool file_ns_capable(const struct file *file, struct user_namespace *ns, int cap)
-{
- if (WARN_ON_ONCE(!cap_valid(cap)))
- return false;
-
- if (security_capable(file->f_cred, ns, cap) == 0)
- return true;
-
- return false;
-}
-EXPORT_SYMBOL(file_ns_capable);
-
/**
* capable - Determine if the current task has a superior capability in effect
* @cap: The capability to be tested for
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 9fcb0944..59412d03 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -4596,7 +4596,6 @@ void perf_event_comm(struct task_struct *task)
struct perf_event_context *ctx;
int ctxn;
- rcu_read_lock();
for_each_task_context_nr(ctxn) {
ctx = task->perf_event_ctxp[ctxn];
if (!ctx)
@@ -4604,7 +4603,6 @@ void perf_event_comm(struct task_struct *task)
perf_event_enable_on_exec(ctx);
}
- rcu_read_unlock();
if (!atomic_read(&nr_comm_events))
return;
@@ -4739,8 +4737,7 @@ static void perf_event_mmap_event(struct perf_mmap_event *mmap_event)
} else {
if (arch_vma_name(mmap_event->vma)) {
name = strncpy(tmp, arch_vma_name(mmap_event->vma),
- sizeof(tmp) - 1);
- tmp[sizeof(tmp) - 1] = '\0';
+ sizeof(tmp));
goto got_name;
}
@@ -5333,7 +5330,7 @@ static void sw_perf_event_destroy(struct perf_event *event)
static int perf_swevent_init(struct perf_event *event)
{
- u64 event_id = event->attr.config;
+ int event_id = event->attr.config;
if (event->attr.type != PERF_TYPE_SOFTWARE)
return -ENOENT;
@@ -5989,7 +5986,6 @@ skip_type:
if (pmu->pmu_cpu_context)
goto got_cpu_context;
- ret = -ENOMEM;
pmu->pmu_cpu_context = alloc_percpu(struct perf_cpu_context);
if (!pmu->pmu_cpu_context)
goto free_dev;
diff --git a/kernel/events/internal.h b/kernel/events/internal.h
index eb675c4d..d56a64c9 100644
--- a/kernel/events/internal.h
+++ b/kernel/events/internal.h
@@ -16,7 +16,7 @@ struct ring_buffer {
int page_order; /* allocation order */
#endif
int nr_pages; /* nr of data pages */
- int overwrite; /* can overwrite itself */
+ int writable; /* are we writable */
atomic_t poll; /* POLL_ for wakeups */
diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c
index 97fddb09..23cb34ff 100644
--- a/kernel/events/ring_buffer.c
+++ b/kernel/events/ring_buffer.c
@@ -18,24 +18,12 @@
static bool perf_output_space(struct ring_buffer *rb, unsigned long tail,
unsigned long offset, unsigned long head)
{
- unsigned long sz = perf_data_size(rb);
- unsigned long mask = sz - 1;
+ unsigned long mask;
- /*
- * check if user-writable
- * overwrite : over-write its own tail
- * !overwrite: buffer possibly drops events.
- */
- if (rb->overwrite)
+ if (!rb->writable)
return true;
- /*
- * verify that payload is not bigger than buffer
- * otherwise masking logic may fail to detect
- * the "not enough space" condition
- */
- if ((head - offset) > sz)
- return false;
+ mask = perf_data_size(rb) - 1;
offset = (offset - tail) & mask;
head = (head - tail) & mask;
@@ -224,9 +212,7 @@ ring_buffer_init(struct ring_buffer *rb, long watermark, int flags)
rb->watermark = max_size / 2;
if (flags & RING_BUFFER_WRITABLE)
- rb->overwrite = 0;
- else
- rb->overwrite = 1;
+ rb->writable = 1;
atomic_set(&rb->refcount, 1);
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index 14be27fe..cc47812d 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -63,7 +63,6 @@
DEFINE_PER_CPU(struct hrtimer_cpu_base, hrtimer_bases) =
{
- .lock = __RAW_SPIN_LOCK_UNLOCKED(hrtimer_bases.lock),
.clock_base =
{
{
@@ -1643,6 +1642,8 @@ static void __cpuinit init_hrtimers_cpu(int cpu)
struct hrtimer_cpu_base *cpu_base = &per_cpu(hrtimer_bases, cpu);
int i;
+ raw_spin_lock_init(&cpu_base->lock);
+
for (i = 0; i < HRTIMER_MAX_CLOCK_BASES; i++) {
cpu_base->clock_base[i].cpu_base = cpu_base;
timerqueue_init_head(&cpu_base->clock_base[i].active);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index fa17855c..2bf8e0cb 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1084,10 +1084,10 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
* has. The type flags are unreliable as the
* underlying chip implementation can override them.
*/
- pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
- irq);
- ret = -EINVAL;
- goto out_mask;
+ //pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
+ // irq);
+ //ret = -EINVAL;
+ //goto out_mask;
}
if (!shared) {
diff --git a/kernel/kexec.c b/kernel/kexec.c
index ffd4e111..bddd3d7a 100644
--- a/kernel/kexec.c
+++ b/kernel/kexec.c
@@ -55,7 +55,7 @@ struct resource crashk_res = {
.flags = IORESOURCE_BUSY | IORESOURCE_MEM
};
struct resource crashk_low_res = {
- .name = "Crash kernel",
+ .name = "Crash kernel low",
.start = 0,
.end = 0,
.flags = IORESOURCE_BUSY | IORESOURCE_MEM
@@ -1368,114 +1368,35 @@ static int __init parse_crashkernel_simple(char *cmdline,
return 0;
}
-#define SUFFIX_HIGH 0
-#define SUFFIX_LOW 1
-#define SUFFIX_NULL 2
-static __initdata char *suffix_tbl[] = {
- [SUFFIX_HIGH] = ",high",
- [SUFFIX_LOW] = ",low",
- [SUFFIX_NULL] = NULL,
-};
-
/*
- * That function parses "suffix" crashkernel command lines like
- *
- * crashkernel=size,[high|low]
- *
- * It returns 0 on success and -EINVAL on failure.
+ * That function is the entry point for command line parsing and should be
+ * called from the arch-specific code.
*/
-static int __init parse_crashkernel_suffix(char *cmdline,
- unsigned long long *crash_size,
- unsigned long long *crash_base,
- const char *suffix)
-{
- char *cur = cmdline;
-
- *crash_size = memparse(cmdline, &cur);
- if (cmdline == cur) {
- pr_warn("crashkernel: memory value expected\n");
- return -EINVAL;
- }
-
- /* check with suffix */
- if (strncmp(cur, suffix, strlen(suffix))) {
- pr_warn("crashkernel: unrecognized char\n");
- return -EINVAL;
- }
- cur += strlen(suffix);
- if (*cur != ' ' && *cur != '\0') {
- pr_warn("crashkernel: unrecognized char\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static __init char *get_last_crashkernel(char *cmdline,
- const char *name,
- const char *suffix)
-{
- char *p = cmdline, *ck_cmdline = NULL;
-
- /* find crashkernel and use the last one if there are more */
- p = strstr(p, name);
- while (p) {
- char *end_p = strchr(p, ' ');
- char *q;
-
- if (!end_p)
- end_p = p + strlen(p);
-
- if (!suffix) {
- int i;
-
- /* skip the one with any known suffix */
- for (i = 0; suffix_tbl[i]; i++) {
- q = end_p - strlen(suffix_tbl[i]);
- if (!strncmp(q, suffix_tbl[i],
- strlen(suffix_tbl[i])))
- goto next;
- }
- ck_cmdline = p;
- } else {
- q = end_p - strlen(suffix);
- if (!strncmp(q, suffix, strlen(suffix)))
- ck_cmdline = p;
- }
-next:
- p = strstr(p+1, name);
- }
-
- if (!ck_cmdline)
- return NULL;
-
- return ck_cmdline;
-}
-
static int __init __parse_crashkernel(char *cmdline,
unsigned long long system_ram,
unsigned long long *crash_size,
unsigned long long *crash_base,
- const char *name,
- const char *suffix)
+ const char *name)
{
+ char *p = cmdline, *ck_cmdline = NULL;
char *first_colon, *first_space;
- char *ck_cmdline;
BUG_ON(!crash_size || !crash_base);
*crash_size = 0;
*crash_base = 0;
- ck_cmdline = get_last_crashkernel(cmdline, name, suffix);
+ /* find crashkernel and use the last one if there are more */
+ p = strstr(p, name);
+ while (p) {
+ ck_cmdline = p;
+ p = strstr(p+1, name);
+ }
if (!ck_cmdline)
return -EINVAL;
ck_cmdline += strlen(name);
- if (suffix)
- return parse_crashkernel_suffix(ck_cmdline, crash_size,
- crash_base, suffix);
/*
* if the commandline contains a ':', then that's the extended
* syntax -- if not, it must be the classic syntax
@@ -1492,26 +1413,13 @@ static int __init __parse_crashkernel(char *cmdline,
return 0;
}
-/*
- * That function is the entry point for command line parsing and should be
- * called from the arch-specific code.
- */
int __init parse_crashkernel(char *cmdline,
unsigned long long system_ram,
unsigned long long *crash_size,
unsigned long long *crash_base)
{
return __parse_crashkernel(cmdline, system_ram, crash_size, crash_base,
- "crashkernel=", NULL);
-}
-
-int __init parse_crashkernel_high(char *cmdline,
- unsigned long long system_ram,
- unsigned long long *crash_size,
- unsigned long long *crash_base)
-{
- return __parse_crashkernel(cmdline, system_ram, crash_size, crash_base,
- "crashkernel=", suffix_tbl[SUFFIX_HIGH]);
+ "crashkernel=");
}
int __init parse_crashkernel_low(char *cmdline,
@@ -1520,7 +1428,7 @@ int __init parse_crashkernel_low(char *cmdline,
unsigned long long *crash_base)
{
return __parse_crashkernel(cmdline, system_ram, crash_size, crash_base,
- "crashkernel=", suffix_tbl[SUFFIX_LOW]);
+ "crashkernel_low=");
}
static void update_vmcoreinfo_note(void)
diff --git a/kernel/kprobes.c b/kernel/kprobes.c
index 3fed7f0c..e35be53f 100644
--- a/kernel/kprobes.c
+++ b/kernel/kprobes.c
@@ -794,16 +794,16 @@ out:
}
#ifdef CONFIG_SYSCTL
+/* This should be called with kprobe_mutex locked */
static void __kprobes optimize_all_kprobes(void)
{
struct hlist_head *head;
struct kprobe *p;
unsigned int i;
- mutex_lock(&kprobe_mutex);
/* If optimization is already allowed, just return */
if (kprobes_allow_optimization)
- goto out;
+ return;
kprobes_allow_optimization = true;
for (i = 0; i < KPROBE_TABLE_SIZE; i++) {
@@ -813,22 +813,18 @@ static void __kprobes optimize_all_kprobes(void)
optimize_kprobe(p);
}
printk(KERN_INFO "Kprobes globally optimized\n");
-out:
- mutex_unlock(&kprobe_mutex);
}
+/* This should be called with kprobe_mutex locked */
static void __kprobes unoptimize_all_kprobes(void)
{
struct hlist_head *head;
struct kprobe *p;
unsigned int i;
- mutex_lock(&kprobe_mutex);
/* If optimization is already prohibited, just return */
- if (!kprobes_allow_optimization) {
- mutex_unlock(&kprobe_mutex);
+ if (!kprobes_allow_optimization)
return;
- }
kprobes_allow_optimization = false;
for (i = 0; i < KPROBE_TABLE_SIZE; i++) {
@@ -838,14 +834,11 @@ static void __kprobes unoptimize_all_kprobes(void)
unoptimize_kprobe(p, false);
}
}
- mutex_unlock(&kprobe_mutex);
-
/* Wait for unoptimizing completion */
wait_for_kprobe_optimizer();
printk(KERN_INFO "Kprobes globally unoptimized\n");
}
-static DEFINE_MUTEX(kprobe_sysctl_mutex);
int sysctl_kprobes_optimization;
int proc_kprobes_optimization_handler(struct ctl_table *table, int write,
void __user *buffer, size_t *length,
@@ -853,7 +846,7 @@ int proc_kprobes_optimization_handler(struct ctl_table *table, int write,
{
int ret;
- mutex_lock(&kprobe_sysctl_mutex);
+ mutex_lock(&kprobe_mutex);
sysctl_kprobes_optimization = kprobes_allow_optimization ? 1 : 0;
ret = proc_dointvec_minmax(table, write, buffer, length, ppos);
@@ -861,7 +854,7 @@ int proc_kprobes_optimization_handler(struct ctl_table *table, int write,
optimize_all_kprobes();
else
unoptimize_all_kprobes();
- mutex_unlock(&kprobe_sysctl_mutex);
+ mutex_unlock(&kprobe_mutex);
return ret;
}
diff --git a/kernel/kthread.c b/kernel/kthread.c
index 9eb7fed0..691dc2ef 100644
--- a/kernel/kthread.c
+++ b/kernel/kthread.c
@@ -124,12 +124,12 @@ void *kthread_data(struct task_struct *task)
static void __kthread_parkme(struct kthread *self)
{
- __set_current_state(TASK_PARKED);
+ __set_current_state(TASK_INTERRUPTIBLE);
while (test_bit(KTHREAD_SHOULD_PARK, &self->flags)) {
if (!test_and_set_bit(KTHREAD_IS_PARKED, &self->flags))
complete(&self->parked);
schedule();
- __set_current_state(TASK_PARKED);
+ __set_current_state(TASK_INTERRUPTIBLE);
}
clear_bit(KTHREAD_IS_PARKED, &self->flags);
__set_current_state(TASK_RUNNING);
@@ -256,13 +256,8 @@ struct task_struct *kthread_create_on_node(int (*threadfn)(void *data),
}
EXPORT_SYMBOL(kthread_create_on_node);
-static void __kthread_bind(struct task_struct *p, unsigned int cpu, long state)
+static void __kthread_bind(struct task_struct *p, unsigned int cpu)
{
- /* Must have done schedule() in kthread() before we set_task_cpu */
- if (!wait_task_inactive(p, state)) {
- WARN_ON(1);
- return;
- }
/* It's safe because the task is inactive. */
do_set_cpus_allowed(p, cpumask_of(cpu));
p->flags |= PF_THREAD_BOUND;
@@ -279,7 +274,12 @@ static void __kthread_bind(struct task_struct *p, unsigned int cpu, long state)
*/
void kthread_bind(struct task_struct *p, unsigned int cpu)
{
- __kthread_bind(p, cpu, TASK_UNINTERRUPTIBLE);
+ /* Must have done schedule() in kthread() before we set_task_cpu */
+ if (!wait_task_inactive(p, TASK_UNINTERRUPTIBLE)) {
+ WARN_ON(1);
+ return;
+ }
+ __kthread_bind(p, cpu);
}
EXPORT_SYMBOL(kthread_bind);
@@ -324,22 +324,6 @@ static struct kthread *task_get_live_kthread(struct task_struct *k)
return NULL;
}
-static void __kthread_unpark(struct task_struct *k, struct kthread *kthread)
-{
- clear_bit(KTHREAD_SHOULD_PARK, &kthread->flags);
- /*
- * We clear the IS_PARKED bit here as we don't wait
- * until the task has left the park code. So if we'd
- * park before that happens we'd see the IS_PARKED bit
- * which might be about to be cleared.
- */
- if (test_and_clear_bit(KTHREAD_IS_PARKED, &kthread->flags)) {
- if (test_bit(KTHREAD_IS_PER_CPU, &kthread->flags))
- __kthread_bind(k, kthread->cpu, TASK_PARKED);
- wake_up_state(k, TASK_PARKED);
- }
-}
-
/**
* kthread_unpark - unpark a thread created by kthread_create().
* @k: thread created by kthread_create().
@@ -352,8 +336,20 @@ void kthread_unpark(struct task_struct *k)
{
struct kthread *kthread = task_get_live_kthread(k);
- if (kthread)
- __kthread_unpark(k, kthread);
+ if (kthread) {
+ clear_bit(KTHREAD_SHOULD_PARK, &kthread->flags);
+ /*
+ * We clear the IS_PARKED bit here as we don't wait
+ * until the task has left the park code. So if we'd
+ * park before that happens we'd see the IS_PARKED bit
+ * which might be about to be cleared.
+ */
+ if (test_and_clear_bit(KTHREAD_IS_PARKED, &kthread->flags)) {
+ if (test_bit(KTHREAD_IS_PER_CPU, &kthread->flags))
+ __kthread_bind(k, kthread->cpu);
+ wake_up_process(k);
+ }
+ }
put_task_struct(k);
}
@@ -411,7 +407,7 @@ int kthread_stop(struct task_struct *k)
trace_sched_kthread_stop(k);
if (kthread) {
set_bit(KTHREAD_SHOULD_STOP, &kthread->flags);
- __kthread_unpark(k, kthread);
+ clear_bit(KTHREAD_SHOULD_PARK, &kthread->flags);
wake_up_process(k);
wait_for_completion(&kthread->exited);
}
diff --git a/kernel/sched/clock.c b/kernel/sched/clock.c
index c3ae1446..c685e314 100644
--- a/kernel/sched/clock.c
+++ b/kernel/sched/clock.c
@@ -176,36 +176,10 @@ static u64 sched_clock_remote(struct sched_clock_data *scd)
u64 this_clock, remote_clock;
u64 *ptr, old_val, val;
-#if BITS_PER_LONG != 64
-again:
- /*
- * Careful here: The local and the remote clock values need to
- * be read out atomic as we need to compare the values and
- * then update either the local or the remote side. So the
- * cmpxchg64 below only protects one readout.
- *
- * We must reread via sched_clock_local() in the retry case on
- * 32bit as an NMI could use sched_clock_local() via the
- * tracer and hit between the readout of
- * the low32bit and the high 32bit portion.
- */
- this_clock = sched_clock_local(my_scd);
- /*
- * We must enforce atomic readout on 32bit, otherwise the
- * update on the remote cpu can hit inbetween the readout of
- * the low32bit and the high 32bit portion.
- */
- remote_clock = cmpxchg64(&scd->clock, 0, 0);
-#else
- /*
- * On 64bit the read of [my]scd->clock is atomic versus the
- * update, so we can avoid the above 32bit dance.
- */
sched_clock_local(my_scd);
again:
this_clock = my_scd->clock;
remote_clock = scd->clock;
-#endif
/*
* Use the opportunity that we have both locks
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 67d04651..7f12624a 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -1498,10 +1498,8 @@ static void try_to_wake_up_local(struct task_struct *p)
{
struct rq *rq = task_rq(p);
- if (WARN_ON_ONCE(rq != this_rq()) ||
- WARN_ON_ONCE(p == current))
- return;
-
+ BUG_ON(rq != this_rq());
+ BUG_ON(p == current);
lockdep_assert_held(&rq->lock);
if (!raw_spin_trylock(&p->pi_lock)) {
@@ -5001,7 +4999,7 @@ static void sd_free_ctl_entry(struct ctl_table **tablep)
}
static int min_load_idx = 0;
-static int max_load_idx = CPU_LOAD_IDX_MAX-1;
+static int max_load_idx = CPU_LOAD_IDX_MAX;
static void
set_table_entry(struct ctl_table *entry,
diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c
index e93cca92..ed12cbb1 100644
--- a/kernel/sched/cputime.c
+++ b/kernel/sched/cputime.c
@@ -310,7 +310,7 @@ void thread_group_cputime(struct task_struct *tsk, struct task_cputime *times)
t = tsk;
do {
- task_cputime(t, &utime, &stime);
+ task_cputime(tsk, &utime, &stime);
times->utime += utime;
times->stime += stime;
times->sum_exec_runtime += task_sched_runtime(t);
diff --git a/kernel/signal.c b/kernel/signal.c
index 598dc06b..dd725677 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -2948,7 +2948,7 @@ do_send_specific(pid_t tgid, pid_t pid, int sig, struct siginfo *info)
static int do_tkill(pid_t tgid, pid_t pid, int sig)
{
- struct siginfo info = {};
+ struct siginfo info;
info.si_signo = sig;
info.si_errno = 0;
diff --git a/kernel/smpboot.c b/kernel/smpboot.c
index 02fc5c93..8eaed9aa 100644
--- a/kernel/smpboot.c
+++ b/kernel/smpboot.c
@@ -185,18 +185,8 @@ __smpboot_create_thread(struct smp_hotplug_thread *ht, unsigned int cpu)
}
get_task_struct(tsk);
*per_cpu_ptr(ht->store, cpu) = tsk;
- if (ht->create) {
- /*
- * Make sure that the task has actually scheduled out
- * into park position, before calling the create
- * callback. At least the migration thread callback
- * requires that the task is off the runqueue.
- */
- if (!wait_task_inactive(tsk, TASK_PARKED))
- WARN_ON(1);
- else
- ht->create(cpu);
- }
+ if (ht->create)
+ ht->create(cpu);
return 0;
}
diff --git a/kernel/sys.c b/kernel/sys.c
index 0da73cf7..39c9c4a2 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -324,6 +324,7 @@ void kernel_restart_prepare(char *cmd)
system_state = SYSTEM_RESTART;
usermodehelper_disable();
device_shutdown();
+ syscore_shutdown();
}
/**
@@ -369,7 +370,6 @@ void kernel_restart(char *cmd)
{
kernel_restart_prepare(cmd);
disable_nonboot_cpus();
- syscore_shutdown();
if (!cmd)
printk(KERN_EMERG "Restarting system.\n");
else
@@ -395,7 +395,6 @@ static void kernel_shutdown_prepare(enum system_states state)
void kernel_halt(void)
{
kernel_shutdown_prepare(SYSTEM_HALT);
- disable_nonboot_cpus();
syscore_shutdown();
printk(KERN_EMERG "System halted.\n");
kmsg_dump(KMSG_DUMP_HALT);
diff --git a/kernel/trace/blktrace.c b/kernel/trace/blktrace.c
index 5a0f781c..9e5b8c27 100644
--- a/kernel/trace/blktrace.c
+++ b/kernel/trace/blktrace.c
@@ -739,6 +739,12 @@ static void blk_add_trace_rq_complete(void *ignore,
struct request_queue *q,
struct request *rq)
{
+ struct blk_trace *bt = q->blk_trace;
+
+ /* if control ever passes through here, it's a request based driver */
+ if (unlikely(bt && !bt->rq_based))
+ bt->rq_based = true;
+
blk_add_trace_rq(q, rq, BLK_TA_COMPLETE);
}
@@ -774,10 +780,24 @@ static void blk_add_trace_bio_bounce(void *ignore,
blk_add_trace_bio(q, bio, BLK_TA_BOUNCE, 0);
}
-static void blk_add_trace_bio_complete(void *ignore,
- struct request_queue *q, struct bio *bio,
- int error)
+static void blk_add_trace_bio_complete(void *ignore, struct bio *bio, int error)
{
+ struct request_queue *q;
+ struct blk_trace *bt;
+
+ if (!bio->bi_bdev)
+ return;
+
+ q = bdev_get_queue(bio->bi_bdev);
+ bt = q->blk_trace;
+
+ /*
+ * Request based drivers will generate both rq and bio completions.
+ * Ignore bio ones.
+ */
+ if (likely(!bt) || bt->rq_based)
+ return;
+
blk_add_trace_bio(q, bio, BLK_TA_COMPLETE, error);
}
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index b3fde6d7..6893d5a2 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -66,7 +66,7 @@
static struct ftrace_ops ftrace_list_end __read_mostly = {
.func = ftrace_stub,
- .flags = FTRACE_OPS_FL_RECURSION_SAFE | FTRACE_OPS_FL_STUB,
+ .flags = FTRACE_OPS_FL_RECURSION_SAFE,
};
/* ftrace_enabled is a method to turn ftrace on or off */
@@ -694,6 +694,7 @@ int ftrace_profile_pages_init(struct ftrace_profile_stat *stat)
free_page(tmp);
}
+ free_page((unsigned long)stat->pages);
stat->pages = NULL;
stat->start = NULL;
@@ -1052,19 +1053,6 @@ static __init void ftrace_profile_debugfs(struct dentry *d_tracer)
static struct pid * const ftrace_swapper_pid = &init_struct_pid;
-loff_t
-ftrace_filter_lseek(struct file *file, loff_t offset, int whence)
-{
- loff_t ret;
-
- if (file->f_mode & FMODE_READ)
- ret = seq_lseek(file, offset, whence);
- else
- file->f_pos = ret = 1;
-
- return ret;
-}
-
#ifdef CONFIG_DYNAMIC_FTRACE
#ifndef CONFIG_FTRACE_MCOUNT_RECORD
@@ -2625,7 +2613,7 @@ static void ftrace_filter_reset(struct ftrace_hash *hash)
* routine, you can use ftrace_filter_write() for the write
* routine if @flag has FTRACE_ITER_FILTER set, or
* ftrace_notrace_write() if @flag has FTRACE_ITER_NOTRACE set.
- * ftrace_filter_lseek() should be used as the lseek routine, and
+ * ftrace_regex_lseek() should be used as the lseek routine, and
* release must call ftrace_regex_release().
*/
int
@@ -2709,6 +2697,19 @@ ftrace_notrace_open(struct inode *inode, struct file *file)
inode, file);
}
+loff_t
+ftrace_regex_lseek(struct file *file, loff_t offset, int whence)
+{
+ loff_t ret;
+
+ if (file->f_mode & FMODE_READ)
+ ret = seq_lseek(file, offset, whence);
+ else
+ file->f_pos = ret = 1;
+
+ return ret;
+}
+
static int ftrace_match(char *str, char *regex, int len, int type)
{
int matched = 0;
@@ -3440,14 +3441,14 @@ static char ftrace_filter_buf[FTRACE_FILTER_SIZE] __initdata;
static int __init set_ftrace_notrace(char *str)
{
- strlcpy(ftrace_notrace_buf, str, FTRACE_FILTER_SIZE);
+ strncpy(ftrace_notrace_buf, str, FTRACE_FILTER_SIZE);
return 1;
}
__setup("ftrace_notrace=", set_ftrace_notrace);
static int __init set_ftrace_filter(char *str)
{
- strlcpy(ftrace_filter_buf, str, FTRACE_FILTER_SIZE);
+ strncpy(ftrace_filter_buf, str, FTRACE_FILTER_SIZE);
return 1;
}
__setup("ftrace_filter=", set_ftrace_filter);
@@ -3570,7 +3571,7 @@ static const struct file_operations ftrace_filter_fops = {
.open = ftrace_filter_open,
.read = seq_read,
.write = ftrace_filter_write,
- .llseek = ftrace_filter_lseek,
+ .llseek = ftrace_regex_lseek,
.release = ftrace_regex_release,
};
@@ -3578,7 +3579,7 @@ static const struct file_operations ftrace_notrace_fops = {
.open = ftrace_notrace_open,
.read = seq_read,
.write = ftrace_notrace_write,
- .llseek = ftrace_filter_lseek,
+ .llseek = ftrace_regex_lseek,
.release = ftrace_regex_release,
};
@@ -3783,8 +3784,8 @@ static const struct file_operations ftrace_graph_fops = {
.open = ftrace_graph_open,
.read = seq_read,
.write = ftrace_graph_write,
- .llseek = ftrace_filter_lseek,
.release = ftrace_graph_release,
+ .llseek = seq_lseek,
};
#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
@@ -4130,8 +4131,7 @@ ftrace_ops_control_func(unsigned long ip, unsigned long parent_ip,
preempt_disable_notrace();
trace_recursion_set(TRACE_CONTROL_BIT);
do_for_each_ftrace_op(op, ftrace_control_list) {
- if (!(op->flags & FTRACE_OPS_FL_STUB) &&
- !ftrace_function_local_disabled(op) &&
+ if (!ftrace_function_local_disabled(op) &&
ftrace_ops_test(op, ip))
op->func(ip, parent_ip, op, regs);
} while_for_each_ftrace_op(op);
@@ -4439,7 +4439,7 @@ static const struct file_operations ftrace_pid_fops = {
.open = ftrace_pid_open,
.write = ftrace_pid_write,
.read = seq_read,
- .llseek = ftrace_filter_lseek,
+ .llseek = seq_lseek,
.release = ftrace_pid_release,
};
@@ -4555,8 +4555,12 @@ ftrace_enable_sysctl(struct ctl_table *table, int write,
ftrace_startup_sysctl();
/* we are starting ftrace again */
- if (ftrace_ops_list != &ftrace_list_end)
- update_ftrace_function();
+ if (ftrace_ops_list != &ftrace_list_end) {
+ if (ftrace_ops_list->next == &ftrace_list_end)
+ ftrace_trace_function = ftrace_ops_list->func;
+ else
+ ftrace_trace_function = ftrace_ops_list_func;
+ }
} else {
/* stopping ftrace calls (just send to ftrace_stub) */
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index 66338c4f..4f1dade5 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -132,7 +132,7 @@ static char *default_bootup_tracer;
static int __init set_cmdline_ftrace(char *str)
{
- strlcpy(bootup_tracer_buf, str, MAX_TRACER_SIZE);
+ strncpy(bootup_tracer_buf, str, MAX_TRACER_SIZE);
default_bootup_tracer = bootup_tracer_buf;
/* We are using ftrace early, expand it */
ring_buffer_expanded = 1;
@@ -162,7 +162,7 @@ static char *trace_boot_options __initdata;
static int __init set_trace_boot_options(char *str)
{
- strlcpy(trace_boot_options_buf, str, MAX_TRACER_SIZE);
+ strncpy(trace_boot_options_buf, str, MAX_TRACER_SIZE);
trace_boot_options = trace_boot_options_buf;
return 0;
}
@@ -744,11 +744,8 @@ update_max_tr_single(struct trace_array *tr, struct task_struct *tsk, int cpu)
return;
WARN_ON_ONCE(!irqs_disabled());
- if (!current_trace->allocated_snapshot) {
- /* Only the nop tracer should hit this when disabling */
- WARN_ON_ONCE(current_trace != &nop_trace);
+ if (WARN_ON_ONCE(!current_trace->allocated_snapshot))
return;
- }
arch_spin_lock(&ftrace_max_lock);
diff --git a/kernel/trace/trace_stack.c b/kernel/trace/trace_stack.c
index 83a8b5b7..42ca822f 100644
--- a/kernel/trace/trace_stack.c
+++ b/kernel/trace/trace_stack.c
@@ -322,7 +322,7 @@ static const struct file_operations stack_trace_filter_fops = {
.open = stack_trace_filter_open,
.read = seq_read,
.write = ftrace_filter_write,
- .llseek = ftrace_filter_lseek,
+ .llseek = ftrace_regex_lseek,
.release = ftrace_regex_release,
};
diff --git a/kernel/user_namespace.c b/kernel/user_namespace.c
index e134d8f3..a54f26f8 100644
--- a/kernel/user_namespace.c
+++ b/kernel/user_namespace.c
@@ -25,8 +25,7 @@
static struct kmem_cache *user_ns_cachep __read_mostly;
-static bool new_idmap_permitted(const struct file *file,
- struct user_namespace *ns, int cap_setid,
+static bool new_idmap_permitted(struct user_namespace *ns, int cap_setid,
struct uid_gid_map *map);
static void set_cred_user_ns(struct cred *cred, struct user_namespace *user_ns)
@@ -613,10 +612,10 @@ static ssize_t map_write(struct file *file, const char __user *buf,
if (map->nr_extents != 0)
goto out;
- /*
- * Adjusting namespace settings requires capabilities on the target.
+ /* Require the appropriate privilege CAP_SETUID or CAP_SETGID
+ * over the user namespace in order to set the id mapping.
*/
- if (cap_valid(cap_setid) && !file_ns_capable(file, ns, CAP_SYS_ADMIN))
+ if (cap_valid(cap_setid) && !ns_capable(ns, cap_setid))
goto out;
/* Get a buffer */
@@ -701,7 +700,7 @@ static ssize_t map_write(struct file *file, const char __user *buf,
ret = -EPERM;
/* Validate the user is allowed to use user id's mapped to. */
- if (!new_idmap_permitted(file, ns, cap_setid, &new_map))
+ if (!new_idmap_permitted(ns, cap_setid, &new_map))
goto out;
/* Map the lower ids from the parent user namespace to the
@@ -788,8 +787,7 @@ ssize_t proc_projid_map_write(struct file *file, const char __user *buf, size_t
&ns->projid_map, &ns->parent->projid_map);
}
-static bool new_idmap_permitted(const struct file *file,
- struct user_namespace *ns, int cap_setid,
+static bool new_idmap_permitted(struct user_namespace *ns, int cap_setid,
struct uid_gid_map *new_map)
{
/* Allow mapping to your own filesystem ids */
@@ -797,12 +795,12 @@ static bool new_idmap_permitted(const struct file *file,
u32 id = new_map->extent[0].lower_first;
if (cap_setid == CAP_SETUID) {
kuid_t uid = make_kuid(ns->parent, id);
- if (uid_eq(uid, file->f_cred->fsuid))
+ if (uid_eq(uid, current_fsuid()))
return true;
}
else if (cap_setid == CAP_SETGID) {
kgid_t gid = make_kgid(ns->parent, id);
- if (gid_eq(gid, file->f_cred->fsgid))
+ if (gid_eq(gid, current_fsgid()))
return true;
}
}
@@ -813,10 +811,8 @@ static bool new_idmap_permitted(const struct file *file,
/* Allow the specified ids if we have the appropriate capability
* (CAP_SETUID or CAP_SETGID) over the parent user namespace.
- * And the opener of the id file also had the approprpiate capability.
*/
- if (ns_capable(ns->parent, cap_setid) &&
- file_ns_capable(file, ns->parent, cap_setid))
+ if (ns_capable(ns->parent, cap_setid))
return true;
return false;
diff --git a/lib/Kconfig b/lib/Kconfig
index fe01d418..3958dc43 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -404,7 +404,4 @@ config OID_REGISTRY
help
Enable fast lookup object identifier registry.
-config UCS2_STRING
- tristate
-
endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 6e2cc561..d7946ff7 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -174,5 +174,3 @@ quiet_cmd_build_OID_registry = GEN $@
cmd_build_OID_registry = perl $(srctree)/$(src)/build_OID_registry $< $@
clean-files += oid_registry_data.c
-
-obj-$(CONFIG_UCS2_STRING) += ucs2_string.o
diff --git a/lib/kobject.c b/lib/kobject.c
index a6548661..e07ee1fc 100644
--- a/lib/kobject.c
+++ b/lib/kobject.c
@@ -529,13 +529,6 @@ struct kobject *kobject_get(struct kobject *kobj)
return kobj;
}
-static struct kobject *kobject_get_unless_zero(struct kobject *kobj)
-{
- if (!kref_get_unless_zero(&kobj->kref))
- kobj = NULL;
- return kobj;
-}
-
/*
* kobject_cleanup - free kobject resources.
* @kobj: object to cleanup
@@ -758,7 +751,7 @@ struct kobject *kset_find_obj(struct kset *kset, const char *name)
list_for_each_entry(k, &kset->list, entry) {
if (kobject_name(k) && !strcmp(kobject_name(k), name)) {
- ret = kobject_get_unless_zero(k);
+ ret = kobject_get(k);
break;
}
}
diff --git a/lib/swiotlb.c b/lib/swiotlb.c
index d23762e6..bfe02b8f 100644
--- a/lib/swiotlb.c
+++ b/lib/swiotlb.c
@@ -105,9 +105,9 @@ setup_io_tlb_npages(char *str)
if (!strcmp(str, "force"))
swiotlb_force = 1;
- return 0;
+ return 1;
}
-early_param("swiotlb", setup_io_tlb_npages);
+__setup("swiotlb=", setup_io_tlb_npages);
/* make io_tlb_overflow tunable too? */
unsigned long swiotlb_nr_tbl(void)
@@ -115,18 +115,6 @@ unsigned long swiotlb_nr_tbl(void)
return io_tlb_nslabs;
}
EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
-
-/* default to 64MB */
-#define IO_TLB_DEFAULT_SIZE (64UL<<20)
-unsigned long swiotlb_size_or_default(void)
-{
- unsigned long size;
-
- size = io_tlb_nslabs << IO_TLB_SHIFT;
-
- return size ? size : (IO_TLB_DEFAULT_SIZE);
-}
-
/* Note that this doesn't work with highmem page */
static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
volatile void *address)
@@ -200,7 +188,8 @@ int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
void __init
swiotlb_init(int verbose)
{
- size_t default_size = IO_TLB_DEFAULT_SIZE;
+ /* default to 64MB */
+ size_t default_size = 64UL<<20;
unsigned char *vstart;
unsigned long bytes;
diff --git a/lib/ucs2_string.c b/lib/ucs2_string.c
deleted file mode 100644
index 6f500ef2..00000000
--- a/lib/ucs2_string.c
+++ /dev/null
@@ -1,51 +0,0 @@
-#include <linux/ucs2_string.h>
-#include <linux/module.h>
-
-/* Return the number of unicode characters in data */
-unsigned long
-ucs2_strnlen(const ucs2_char_t *s, size_t maxlength)
-{
- unsigned long length = 0;
-
- while (*s++ != 0 && length < maxlength)
- length++;
- return length;
-}
-EXPORT_SYMBOL(ucs2_strnlen);
-
-unsigned long
-ucs2_strlen(const ucs2_char_t *s)
-{
- return ucs2_strnlen(s, ~0UL);
-}
-EXPORT_SYMBOL(ucs2_strlen);
-
-/*
- * Return the number of bytes is the length of this string
- * Note: this is NOT the same as the number of unicode characters
- */
-unsigned long
-ucs2_strsize(const ucs2_char_t *data, unsigned long maxlength)
-{
- return ucs2_strnlen(data, maxlength/sizeof(ucs2_char_t)) * sizeof(ucs2_char_t);
-}
-EXPORT_SYMBOL(ucs2_strsize);
-
-int
-ucs2_strncmp(const ucs2_char_t *a, const ucs2_char_t *b, size_t len)
-{
- while (1) {
- if (len == 0)
- return 0;
- if (*a < *b)
- return -1;
- if (*a > *b)
- return 1;
- if (*a == 0) /* implies *b == 0 */
- return 0;
- a++;
- b++;
- len--;
- }
-}
-EXPORT_SYMBOL(ucs2_strncmp);
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 1a12f5b9..ca9a7c6d 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -2961,17 +2961,7 @@ long follow_hugetlb_page(struct mm_struct *mm, struct vm_area_struct *vma,
break;
}
- /*
- * We need call hugetlb_fault for both hugepages under migration
- * (in which case hugetlb_fault waits for the migration,) and
- * hwpoisoned hugepages (in which case we need to prevent the
- * caller from accessing to them.) In order to do this, we use
- * here is_swap_pte instead of is_hugetlb_entry_migration and
- * is_hugetlb_entry_hwpoisoned. This is because it simply covers
- * both cases, and because we can't follow correct pages
- * directly from any kind of swap entries.
- */
- if (absent || is_swap_pte(huge_ptep_get(pte)) ||
+ if (absent ||
((flags & FOLL_WRITE) && !pte_write(huge_ptep_get(pte)))) {
int ret;
diff --git a/mm/memory.c b/mm/memory.c
index ba94dec5..45108e59 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -216,7 +216,6 @@ void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, bool fullmm)
tlb->mm = mm;
tlb->fullmm = fullmm;
- tlb->need_flush_all = 0;
tlb->start = -1UL;
tlb->end = 0;
tlb->need_flush = 0;
@@ -1748,8 +1747,10 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
pte_t *pte;
/* user gate pages are read-only */
- if (gup_flags & FOLL_WRITE)
+ if (gup_flags & FOLL_WRITE){
+ printk("get user pages error 1\r\n");
return i ? : -EFAULT;
+ }
if (pg > TASK_SIZE)
pgd = pgd_offset_k(pg);
else
@@ -1758,12 +1759,15 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
pud = pud_offset(pgd, pg);
BUG_ON(pud_none(*pud));
pmd = pmd_offset(pud, pg);
- if (pmd_none(*pmd))
+ if (pmd_none(*pmd)){
+ printk("get user pages error 2\r\n");
return i ? : -EFAULT;
+ }
VM_BUG_ON(pmd_trans_huge(*pmd));
pte = pte_offset_map(pmd, pg);
if (pte_none(*pte)) {
pte_unmap(pte);
+ printk("get user pages error 3\r\n");
return i ? : -EFAULT;
}
vma = get_gate_vma(mm);
@@ -1777,6 +1781,7 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
page = pte_page(*pte);
else {
pte_unmap(pte);
+ printk("get user pages error 4\r\n");
return i ? : -EFAULT;
}
}
@@ -1791,7 +1796,14 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
if (!vma ||
(vma->vm_flags & (VM_IO | VM_PFNMAP)) ||
!(vm_flags & vma->vm_flags))
+ {
+ //printk("VMA PTR=%x\r\n", vma);
+ //if (vma) printk("VMA->VM_FLAGS=%x\r\n", vma->vm_flags);
+ //printk("VM FLAGS=%x\r\n", vm_flags);
+
+ //printk("get user pages error 5 %d\r\n", i);
return i ? : -EFAULT;
+ }
if (is_vm_hugetlb_page(vma)) {
i = follow_hugetlb_page(mm, vma, pages, vmas,
@@ -1808,8 +1820,10 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
* If we have a pending SIGKILL, don't keep faulting
* pages and potentially allocating memory.
*/
- if (unlikely(fatal_signal_pending(current)))
+ if (unlikely(fatal_signal_pending(current))){
+ printk("get user pages error 6\r\n");
return i ? i : -ERESTARTSYS;
+ }
cond_resched();
while (!(page = follow_page_mask(vma, start,
@@ -1839,13 +1853,19 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
VM_FAULT_HWPOISON_LARGE)) {
if (i)
return i;
- else if (gup_flags & FOLL_HWPOISON)
+ else if (gup_flags & FOLL_HWPOISON){
+ printk("get user pages error 7\r\n");
return -EHWPOISON;
- else
+ }
+ else {
+ printk("get user pages error 8\r\n");
return -EFAULT;
+ }
}
- if (ret & VM_FAULT_SIGBUS)
+ if (ret & VM_FAULT_SIGBUS){
+ printk("get user pages error 9\r\n");
return i ? i : -EFAULT;
+ }
BUG();
}
@@ -2362,11 +2382,19 @@ int remap_pfn_range(struct vm_area_struct *vma, unsigned long addr,
* un-COW'ed pages by matching them up with "vma->vm_pgoff".
* See vm_normal_page() for details.
*/
+ //printk("remap_pfn_mem %x, %x, %x, %x", addr, vma->vm_start, end, vma->vm_end);
+ if (addr == vma->vm_start && end == vma->vm_end) {
+ vma->vm_pgoff = pfn;
+ //vma->vm_flags |= VM_PFN_AT_MMAP;
+ } else if (is_cow_mapping(vma->vm_flags))
+ return -EINVAL;
+/*
if (is_cow_mapping(vma->vm_flags)) {
if (addr != vma->vm_start || end != vma->vm_end)
return -EINVAL;
vma->vm_pgoff = pfn;
}
+*/
err = track_pfn_remap(vma, &prot, pfn, addr, PAGE_ALIGN(size));
if (err)
@@ -2393,53 +2421,6 @@ int remap_pfn_range(struct vm_area_struct *vma, unsigned long addr,
}
EXPORT_SYMBOL(remap_pfn_range);
-/**
- * vm_iomap_memory - remap memory to userspace
- * @vma: user vma to map to
- * @start: start of area
- * @len: size of area
- *
- * This is a simplified io_remap_pfn_range() for common driver use. The
- * driver just needs to give us the physical memory range to be mapped,
- * we'll figure out the rest from the vma information.
- *
- * NOTE! Some drivers might want to tweak vma->vm_page_prot first to get
- * whatever write-combining details or similar.
- */
-int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, unsigned long len)
-{
- unsigned long vm_len, pfn, pages;
-
- /* Check that the physical memory area passed in looks valid */
- if (start + len < start)
- return -EINVAL;
- /*
- * You *really* shouldn't map things that aren't page-aligned,
- * but we've historically allowed it because IO memory might
- * just have smaller alignment.
- */
- len += start & ~PAGE_MASK;
- pfn = start >> PAGE_SHIFT;
- pages = (len + ~PAGE_MASK) >> PAGE_SHIFT;
- if (pfn + pages < pfn)
- return -EINVAL;
-
- /* We start the mapping 'vm_pgoff' pages into the area */
- if (vma->vm_pgoff > pages)
- return -EINVAL;
- pfn += vma->vm_pgoff;
- pages -= vma->vm_pgoff;
-
- /* Can we fit all of the mapping? */
- vm_len = vma->vm_end - vma->vm_start;
- if (vm_len >> PAGE_SHIFT > pages)
- return -EINVAL;
-
- /* Ok, let it rip */
- return io_remap_pfn_range(vma, vma->vm_start, pfn, vm_len, vma->vm_page_prot);
-}
-EXPORT_SYMBOL(vm_iomap_memory);
-
static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
unsigned long addr, unsigned long end,
pte_fn_t fn, void *data)
diff --git a/mm/nommu.c b/mm/nommu.c
index e001768b..2f3ea749 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -1838,16 +1838,6 @@ int remap_pfn_range(struct vm_area_struct *vma, unsigned long addr,
}
EXPORT_SYMBOL(remap_pfn_range);
-int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, unsigned long len)
-{
- unsigned long pfn = start >> PAGE_SHIFT;
- unsigned long vm_len = vma->vm_end - vma->vm_start;
-
- pfn += vma->vm_pgoff;
- return io_remap_pfn_range(vma, vma->vm_start, pfn, vm_len, vma->vm_page_prot);
-}
-EXPORT_SYMBOL(vm_iomap_memory);
-
int remap_vmalloc_range(struct vm_area_struct *vma, void *addr,
unsigned long pgoff)
{
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 669fba39..88c5fed8 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -3188,9 +3188,9 @@ int kswapd_run(int nid)
if (IS_ERR(pgdat->kswapd)) {
/* failure at boot is fatal */
BUG_ON(system_state == SYSTEM_BOOTING);
+ pgdat->kswapd = NULL;
pr_err("Failed to start kswapd on node %d\n", nid);
ret = PTR_ERR(pgdat->kswapd);
- pgdat->kswapd = NULL;
}
return ret;
}
diff --git a/net/802/mrp.c b/net/802/mrp.c
index e085bcc7..a4cc3229 100644
--- a/net/802/mrp.c
+++ b/net/802/mrp.c
@@ -870,12 +870,8 @@ void mrp_uninit_applicant(struct net_device *dev, struct mrp_application *appl)
* all pending messages before the applicant is gone.
*/
del_timer_sync(&app->join_timer);
-
- spin_lock(&app->lock);
mrp_mad_event(app, MRP_EVENT_TX);
mrp_pdu_queue(app);
- spin_unlock(&app->lock);
-
mrp_queue_xmit(app);
dev_mc_del(dev, appl->group_address);
diff --git a/net/atm/common.c b/net/atm/common.c
index 737bef59..7b491006 100644
--- a/net/atm/common.c
+++ b/net/atm/common.c
@@ -531,8 +531,6 @@ int vcc_recvmsg(struct kiocb *iocb, struct socket *sock, struct msghdr *msg,
struct sk_buff *skb;
int copied, error = -EINVAL;
- msg->msg_namelen = 0;
-
if (sock->state != SS_CONNECTED)
return -ENOTCONN;
diff --git a/net/ax25/af_ax25.c b/net/ax25/af_ax25.c
index e277e38f..7b11f8bc 100644
--- a/net/ax25/af_ax25.c
+++ b/net/ax25/af_ax25.c
@@ -1642,7 +1642,6 @@ static int ax25_recvmsg(struct kiocb *iocb, struct socket *sock,
ax25_address src;
const unsigned char *mac = skb_mac_header(skb);
- memset(sax, 0, sizeof(struct full_sockaddr_ax25));
ax25_addr_parse(mac + 1, skb->data - mac - 1, &src, NULL,
&digi, NULL, NULL);
sax->sax25_family = AF_AX25;
diff --git a/net/batman-adv/main.c b/net/batman-adv/main.c
index fa563e49..0488d70c 100644
--- a/net/batman-adv/main.c
+++ b/net/batman-adv/main.c
@@ -169,7 +169,7 @@ void batadv_mesh_free(struct net_device *soft_iface)
atomic_set(&bat_priv->mesh_state, BATADV_MESH_INACTIVE);
}
-int batadv_is_my_mac(struct batadv_priv *bat_priv, const uint8_t *addr)
+int batadv_is_my_mac(const uint8_t *addr)
{
const struct batadv_hard_iface *hard_iface;
@@ -178,9 +178,6 @@ int batadv_is_my_mac(struct batadv_priv *bat_priv, const uint8_t *addr)
if (hard_iface->if_status != BATADV_IF_ACTIVE)
continue;
- if (hard_iface->soft_iface != bat_priv->soft_iface)
- continue;
-
if (batadv_compare_eth(hard_iface->net_dev->dev_addr, addr)) {
rcu_read_unlock();
return 1;
diff --git a/net/batman-adv/main.h b/net/batman-adv/main.h
index d40910df..ced08b93 100644
--- a/net/batman-adv/main.h
+++ b/net/batman-adv/main.h
@@ -162,7 +162,7 @@ extern struct workqueue_struct *batadv_event_workqueue;
int batadv_mesh_init(struct net_device *soft_iface);
void batadv_mesh_free(struct net_device *soft_iface);
-int batadv_is_my_mac(struct batadv_priv *bat_priv, const uint8_t *addr);
+int batadv_is_my_mac(const uint8_t *addr);
struct batadv_hard_iface *
batadv_seq_print_text_primary_if_get(struct seq_file *seq);
int batadv_batman_skb_recv(struct sk_buff *skb, struct net_device *dev,
diff --git a/net/batman-adv/routing.c b/net/batman-adv/routing.c
index 319f2906..5ee21ceb 100644
--- a/net/batman-adv/routing.c
+++ b/net/batman-adv/routing.c
@@ -402,7 +402,7 @@ int batadv_recv_icmp_packet(struct sk_buff *skb,
goto out;
/* not for me */
- if (!batadv_is_my_mac(bat_priv, ethhdr->h_dest))
+ if (!batadv_is_my_mac(ethhdr->h_dest))
goto out;
icmp_packet = (struct batadv_icmp_packet_rr *)skb->data;
@@ -416,7 +416,7 @@ int batadv_recv_icmp_packet(struct sk_buff *skb,
}
/* packet for me */
- if (batadv_is_my_mac(bat_priv, icmp_packet->dst))
+ if (batadv_is_my_mac(icmp_packet->dst))
return batadv_recv_my_icmp_packet(bat_priv, skb, hdr_size);
/* TTL exceeded */
@@ -548,8 +548,7 @@ batadv_find_ifalter_router(struct batadv_orig_node *primary_orig,
return router;
}
-static int batadv_check_unicast_packet(struct batadv_priv *bat_priv,
- struct sk_buff *skb, int hdr_size)
+static int batadv_check_unicast_packet(struct sk_buff *skb, int hdr_size)
{
struct ethhdr *ethhdr;
@@ -568,7 +567,7 @@ static int batadv_check_unicast_packet(struct batadv_priv *bat_priv,
return -1;
/* not for me */
- if (!batadv_is_my_mac(bat_priv, ethhdr->h_dest))
+ if (!batadv_is_my_mac(ethhdr->h_dest))
return -1;
return 0;
@@ -583,7 +582,7 @@ int batadv_recv_tt_query(struct sk_buff *skb, struct batadv_hard_iface *recv_if)
char tt_flag;
size_t packet_size;
- if (batadv_check_unicast_packet(bat_priv, skb, hdr_size) < 0)
+ if (batadv_check_unicast_packet(skb, hdr_size) < 0)
return NET_RX_DROP;
/* I could need to modify it */
@@ -615,7 +614,7 @@ int batadv_recv_tt_query(struct sk_buff *skb, struct batadv_hard_iface *recv_if)
case BATADV_TT_RESPONSE:
batadv_inc_counter(bat_priv, BATADV_CNT_TT_RESPONSE_RX);
- if (batadv_is_my_mac(bat_priv, tt_query->dst)) {
+ if (batadv_is_my_mac(tt_query->dst)) {
/* packet needs to be linearized to access the TT
* changes
*/
@@ -658,15 +657,14 @@ int batadv_recv_roam_adv(struct sk_buff *skb, struct batadv_hard_iface *recv_if)
struct batadv_roam_adv_packet *roam_adv_packet;
struct batadv_orig_node *orig_node;
- if (batadv_check_unicast_packet(bat_priv, skb,
- sizeof(*roam_adv_packet)) < 0)
+ if (batadv_check_unicast_packet(skb, sizeof(*roam_adv_packet)) < 0)
goto out;
batadv_inc_counter(bat_priv, BATADV_CNT_TT_ROAM_ADV_RX);
roam_adv_packet = (struct batadv_roam_adv_packet *)skb->data;
- if (!batadv_is_my_mac(bat_priv, roam_adv_packet->dst))
+ if (!batadv_is_my_mac(roam_adv_packet->dst))
return batadv_route_unicast_packet(skb, recv_if);
/* check if it is a backbone gateway. we don't accept
@@ -969,7 +967,7 @@ static int batadv_check_unicast_ttvn(struct batadv_priv *bat_priv,
* last time) the packet had an updated information or not
*/
curr_ttvn = (uint8_t)atomic_read(&bat_priv->tt.vn);
- if (!batadv_is_my_mac(bat_priv, unicast_packet->dest)) {
+ if (!batadv_is_my_mac(unicast_packet->dest)) {
orig_node = batadv_orig_hash_find(bat_priv,
unicast_packet->dest);
/* if it is not possible to find the orig_node representing the
@@ -1046,14 +1044,14 @@ int batadv_recv_unicast_packet(struct sk_buff *skb,
if (is4addr)
hdr_size = sizeof(*unicast_4addr_packet);
- if (batadv_check_unicast_packet(bat_priv, skb, hdr_size) < 0)
+ if (batadv_check_unicast_packet(skb, hdr_size) < 0)
return NET_RX_DROP;
if (!batadv_check_unicast_ttvn(bat_priv, skb))
return NET_RX_DROP;
/* packet for me */
- if (batadv_is_my_mac(bat_priv, unicast_packet->dest)) {
+ if (batadv_is_my_mac(unicast_packet->dest)) {
if (is4addr) {
batadv_dat_inc_counter(bat_priv,
unicast_4addr_packet->subtype);
@@ -1090,7 +1088,7 @@ int batadv_recv_ucast_frag_packet(struct sk_buff *skb,
struct sk_buff *new_skb = NULL;
int ret;
- if (batadv_check_unicast_packet(bat_priv, skb, hdr_size) < 0)
+ if (batadv_check_unicast_packet(skb, hdr_size) < 0)
return NET_RX_DROP;
if (!batadv_check_unicast_ttvn(bat_priv, skb))
@@ -1099,7 +1097,7 @@ int batadv_recv_ucast_frag_packet(struct sk_buff *skb,
unicast_packet = (struct batadv_unicast_frag_packet *)skb->data;
/* packet for me */
- if (batadv_is_my_mac(bat_priv, unicast_packet->dest)) {
+ if (batadv_is_my_mac(unicast_packet->dest)) {
ret = batadv_frag_reassemble_skb(skb, bat_priv, &new_skb);
if (ret == NET_RX_DROP)
@@ -1153,13 +1151,13 @@ int batadv_recv_bcast_packet(struct sk_buff *skb,
goto out;
/* ignore broadcasts sent by myself */
- if (batadv_is_my_mac(bat_priv, ethhdr->h_source))
+ if (batadv_is_my_mac(ethhdr->h_source))
goto out;
bcast_packet = (struct batadv_bcast_packet *)skb->data;
/* ignore broadcasts originated by myself */
- if (batadv_is_my_mac(bat_priv, bcast_packet->orig))
+ if (batadv_is_my_mac(bcast_packet->orig))
goto out;
if (bcast_packet->header.ttl < 2)
@@ -1245,14 +1243,14 @@ int batadv_recv_vis_packet(struct sk_buff *skb,
ethhdr = (struct ethhdr *)skb_mac_header(skb);
/* not for me */
- if (!batadv_is_my_mac(bat_priv, ethhdr->h_dest))
+ if (!batadv_is_my_mac(ethhdr->h_dest))
return NET_RX_DROP;
/* ignore own packets */
- if (batadv_is_my_mac(bat_priv, vis_packet->vis_orig))
+ if (batadv_is_my_mac(vis_packet->vis_orig))
return NET_RX_DROP;
- if (batadv_is_my_mac(bat_priv, vis_packet->sender_orig))
+ if (batadv_is_my_mac(vis_packet->sender_orig))
return NET_RX_DROP;
switch (vis_packet->vis_type) {
diff --git a/net/batman-adv/translation-table.c b/net/batman-adv/translation-table.c
index 7abee195..98a66a02 100644
--- a/net/batman-adv/translation-table.c
+++ b/net/batman-adv/translation-table.c
@@ -1953,7 +1953,7 @@ out:
bool batadv_send_tt_response(struct batadv_priv *bat_priv,
struct batadv_tt_query_packet *tt_request)
{
- if (batadv_is_my_mac(bat_priv, tt_request->dst)) {
+ if (batadv_is_my_mac(tt_request->dst)) {
/* don't answer backbone gws! */
if (batadv_bla_is_backbone_gw_orig(bat_priv, tt_request->src))
return true;
diff --git a/net/batman-adv/vis.c b/net/batman-adv/vis.c
index 6a1e646b..c053244b 100644
--- a/net/batman-adv/vis.c
+++ b/net/batman-adv/vis.c
@@ -477,7 +477,7 @@ void batadv_receive_client_update_packet(struct batadv_priv *bat_priv,
/* Are we the target for this VIS packet? */
if (vis_server == BATADV_VIS_TYPE_SERVER_SYNC &&
- batadv_is_my_mac(bat_priv, vis_packet->target_orig))
+ batadv_is_my_mac(vis_packet->target_orig))
are_target = 1;
spin_lock_bh(&bat_priv->vis.hash_lock);
@@ -496,7 +496,7 @@ void batadv_receive_client_update_packet(struct batadv_priv *bat_priv,
batadv_send_list_add(bat_priv, info);
/* ... we're not the recipient (and thus need to forward). */
- } else if (!batadv_is_my_mac(bat_priv, packet->target_orig)) {
+ } else if (!batadv_is_my_mac(packet->target_orig)) {
batadv_send_list_add(bat_priv, info);
}
diff --git a/net/bluetooth/af_bluetooth.c b/net/bluetooth/af_bluetooth.c
index 0d1b08cc..d3ee69b3 100644
--- a/net/bluetooth/af_bluetooth.c
+++ b/net/bluetooth/af_bluetooth.c
@@ -230,8 +230,6 @@ int bt_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
if (flags & (MSG_OOB))
return -EOPNOTSUPP;
- msg->msg_namelen = 0;
-
skb = skb_recv_datagram(sk, flags, noblock, &err);
if (!skb) {
if (sk->sk_shutdown & RCV_SHUTDOWN)
@@ -239,6 +237,8 @@ int bt_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
return err;
}
+ msg->msg_namelen = 0;
+
copied = skb->len;
if (len < copied) {
msg->msg_flags |= MSG_TRUNC;
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
index 7c9224bc..c23bae86 100644
--- a/net/bluetooth/rfcomm/sock.c
+++ b/net/bluetooth/rfcomm/sock.c
@@ -608,7 +608,6 @@ static int rfcomm_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
if (test_and_clear_bit(RFCOMM_DEFER_SETUP, &d->flags)) {
rfcomm_dlc_accept(d);
- msg->msg_namelen = 0;
return 0;
}
diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c
index fb6192c9..fad0302b 100644
--- a/net/bluetooth/sco.c
+++ b/net/bluetooth/sco.c
@@ -665,7 +665,6 @@ static int sco_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags)) {
hci_conn_accept(pi->conn->hcon, 0);
sk->sk_state = BT_CONFIG;
- msg->msg_namelen = 0;
release_sock(sk);
return 0;
diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c
index 459dab22..ef1b9143 100644
--- a/net/bridge/br_if.c
+++ b/net/bridge/br_if.c
@@ -67,8 +67,7 @@ void br_port_carrier_check(struct net_bridge_port *p)
struct net_device *dev = p->dev;
struct net_bridge *br = p->br;
- if (!(p->flags & BR_ADMIN_COST) &&
- netif_running(dev) && netif_oper_up(dev))
+ if (netif_running(dev) && netif_oper_up(dev))
p->path_cost = port_cost(dev);
if (!netif_running(br->dev))
diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h
index d2c043a8..3cbf5beb 100644
--- a/net/bridge/br_private.h
+++ b/net/bridge/br_private.h
@@ -156,7 +156,6 @@ struct net_bridge_port
#define BR_BPDU_GUARD 0x00000002
#define BR_ROOT_BLOCK 0x00000004
#define BR_MULTICAST_FAST_LEAVE 0x00000008
-#define BR_ADMIN_COST 0x00000010
#ifdef CONFIG_BRIDGE_IGMP_SNOOPING
u32 multicast_startup_queries_sent;
diff --git a/net/bridge/br_stp_if.c b/net/bridge/br_stp_if.c
index d45e7601..0bdb4ebd 100644
--- a/net/bridge/br_stp_if.c
+++ b/net/bridge/br_stp_if.c
@@ -288,7 +288,6 @@ int br_stp_set_path_cost(struct net_bridge_port *p, unsigned long path_cost)
path_cost > BR_MAX_PATH_COST)
return -ERANGE;
- p->flags |= BR_ADMIN_COST;
p->path_cost = path_cost;
br_configuration_update(p->br);
br_port_state_selection(p->br);
diff --git a/net/caif/caif_socket.c b/net/caif/caif_socket.c
index ff2ff3ce..095259f8 100644
--- a/net/caif/caif_socket.c
+++ b/net/caif/caif_socket.c
@@ -286,8 +286,6 @@ static int caif_seqpkt_recvmsg(struct kiocb *iocb, struct socket *sock,
if (m->msg_flags&MSG_OOB)
goto read_error;
- m->msg_namelen = 0;
-
skb = skb_recv_datagram(sk, flags, 0 , &ret);
if (!skb)
goto read_error;
diff --git a/net/can/gw.c b/net/can/gw.c
index 117814a7..2d117dc5 100644
--- a/net/can/gw.c
+++ b/net/can/gw.c
@@ -466,7 +466,7 @@ static int cgw_notifier(struct notifier_block *nb,
if (gwj->src.dev == dev || gwj->dst.dev == dev) {
hlist_del(&gwj->list);
cgw_unregister_filter(gwj);
- kmem_cache_free(cgw_cache, gwj);
+ kfree(gwj);
}
}
}
@@ -864,7 +864,7 @@ static void cgw_remove_all_jobs(void)
hlist_for_each_entry_safe(gwj, nx, &cgw_list, list) {
hlist_del(&gwj->list);
cgw_unregister_filter(gwj);
- kmem_cache_free(cgw_cache, gwj);
+ kfree(gwj);
}
}
@@ -920,7 +920,7 @@ static int cgw_remove_job(struct sk_buff *skb, struct nlmsghdr *nlh, void *arg)
hlist_del(&gwj->list);
cgw_unregister_filter(gwj);
- kmem_cache_free(cgw_cache, gwj);
+ kfree(gwj);
err = 0;
break;
}
diff --git a/net/core/dev.c b/net/core/dev.c
index b24ab0e9..eaebacd1 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -2144,13 +2144,10 @@ EXPORT_SYMBOL(netif_device_attach);
static void skb_warn_bad_offload(const struct sk_buff *skb)
{
- static const netdev_features_t null_features = 0;
+ //static const netdev_features_t null_features = 0;
struct net_device *dev = skb->dev;
const char *driver = "";
- if (!net_ratelimit())
- return;
-
if (dev && dev->dev.parent)
driver = dev_driver_string(dev->dev.parent);
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 23854b51..b65441da 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -1072,7 +1072,7 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
rcu_read_lock();
cb->seq = net->dev_base_seq;
- if (nlmsg_parse(cb->nlh, sizeof(struct ifinfomsg), tb, IFLA_MAX,
+ if (nlmsg_parse(cb->nlh, sizeof(struct rtgenmsg), tb, IFLA_MAX,
ifla_policy) >= 0) {
if (tb[IFLA_EXT_MASK])
@@ -1922,7 +1922,7 @@ static u16 rtnl_calcit(struct sk_buff *skb, struct nlmsghdr *nlh)
u32 ext_filter_mask = 0;
u16 min_ifinfo_dump_size = 0;
- if (nlmsg_parse(nlh, sizeof(struct ifinfomsg), tb, IFLA_MAX,
+ if (nlmsg_parse(nlh, sizeof(struct rtgenmsg), tb, IFLA_MAX,
ifla_policy) >= 0) {
if (tb[IFLA_EXT_MASK])
ext_filter_mask = nla_get_u32(tb[IFLA_EXT_MASK]);
diff --git a/net/ipv4/devinet.c b/net/ipv4/devinet.c
index c6287cd9..96083b7a 100644
--- a/net/ipv4/devinet.c
+++ b/net/ipv4/devinet.c
@@ -587,16 +587,13 @@ static void check_lifetime(struct work_struct *work)
{
unsigned long now, next, next_sec, next_sched;
struct in_ifaddr *ifa;
- struct hlist_node *n;
int i;
now = jiffies;
next = round_jiffies_up(now + ADDR_CHECK_FREQUENCY);
+ rcu_read_lock();
for (i = 0; i < IN4_ADDR_HSIZE; i++) {
- bool change_needed = false;
-
- rcu_read_lock();
hlist_for_each_entry_rcu(ifa, &inet_addr_lst[i], hash) {
unsigned long age;
@@ -609,7 +606,16 @@ static void check_lifetime(struct work_struct *work)
if (ifa->ifa_valid_lft != INFINITY_LIFE_TIME &&
age >= ifa->ifa_valid_lft) {
- change_needed = true;
+ struct in_ifaddr **ifap ;
+
+ rtnl_lock();
+ for (ifap = &ifa->ifa_dev->ifa_list;
+ *ifap != NULL; ifap = &ifa->ifa_next) {
+ if (*ifap == ifa)
+ inet_del_ifa(ifa->ifa_dev,
+ ifap, 1);
+ }
+ rtnl_unlock();
} else if (ifa->ifa_preferred_lft ==
INFINITY_LIFE_TIME) {
continue;
@@ -619,8 +625,10 @@ static void check_lifetime(struct work_struct *work)
next = ifa->ifa_tstamp +
ifa->ifa_valid_lft * HZ;
- if (!(ifa->ifa_flags & IFA_F_DEPRECATED))
- change_needed = true;
+ if (!(ifa->ifa_flags & IFA_F_DEPRECATED)) {
+ ifa->ifa_flags |= IFA_F_DEPRECATED;
+ rtmsg_ifa(RTM_NEWADDR, ifa, NULL, 0);
+ }
} else if (time_before(ifa->ifa_tstamp +
ifa->ifa_preferred_lft * HZ,
next)) {
@@ -628,42 +636,8 @@ static void check_lifetime(struct work_struct *work)
ifa->ifa_preferred_lft * HZ;
}
}
- rcu_read_unlock();
- if (!change_needed)
- continue;
- rtnl_lock();
- hlist_for_each_entry_safe(ifa, n, &inet_addr_lst[i], hash) {
- unsigned long age;
-
- if (ifa->ifa_flags & IFA_F_PERMANENT)
- continue;
-
- /* We try to batch several events at once. */
- age = (now - ifa->ifa_tstamp +
- ADDRCONF_TIMER_FUZZ_MINUS) / HZ;
-
- if (ifa->ifa_valid_lft != INFINITY_LIFE_TIME &&
- age >= ifa->ifa_valid_lft) {
- struct in_ifaddr **ifap;
-
- for (ifap = &ifa->ifa_dev->ifa_list;
- *ifap != NULL; ifap = &(*ifap)->ifa_next) {
- if (*ifap == ifa) {
- inet_del_ifa(ifa->ifa_dev,
- ifap, 1);
- break;
- }
- }
- } else if (ifa->ifa_preferred_lft !=
- INFINITY_LIFE_TIME &&
- age >= ifa->ifa_preferred_lft &&
- !(ifa->ifa_flags & IFA_F_DEPRECATED)) {
- ifa->ifa_flags |= IFA_F_DEPRECATED;
- rtmsg_ifa(RTM_NEWADDR, ifa, NULL, 0);
- }
- }
- rtnl_unlock();
}
+ rcu_read_unlock();
next_sec = round_jiffies_up(next);
next_sched = next;
@@ -830,8 +804,6 @@ static int inet_rtm_newaddr(struct sk_buff *skb, struct nlmsghdr *nlh, void *arg
return -EEXIST;
ifa = ifa_existing;
set_ifa_lifetime(ifa, valid_lft, prefered_lft);
- cancel_delayed_work(&check_lifetime_work);
- schedule_delayed_work(&check_lifetime_work, 0);
rtmsg_ifa(RTM_NEWADDR, ifa, nlh, NETLINK_CB(skb).portid);
blocking_notifier_call_chain(&inetaddr_chain, NETDEV_UP, ifa);
}
diff --git a/net/ipv4/esp4.c b/net/ipv4/esp4.c
index 4cfe34d4..3b4f0cd2 100644
--- a/net/ipv4/esp4.c
+++ b/net/ipv4/esp4.c
@@ -139,6 +139,8 @@ static int esp_output(struct xfrm_state *x, struct sk_buff *skb)
/* skb is pure payload to encrypt */
+ err = -ENOMEM;
+
esp = x->data;
aead = esp->aead;
alen = crypto_aead_authsize(aead);
@@ -174,10 +176,8 @@ static int esp_output(struct xfrm_state *x, struct sk_buff *skb)
}
tmp = esp_alloc_tmp(aead, nfrags + sglists, seqhilen);
- if (!tmp) {
- err = -ENOMEM;
+ if (!tmp)
goto error;
- }
seqhi = esp_tmp_seqhi(tmp);
iv = esp_tmp_iv(aead, tmp, seqhilen);
diff --git a/net/ipv4/ip_fragment.c b/net/ipv4/ip_fragment.c
index 52c273ea..a6445b84 100644
--- a/net/ipv4/ip_fragment.c
+++ b/net/ipv4/ip_fragment.c
@@ -248,7 +248,8 @@ static void ip_expire(unsigned long arg)
if (!head->dev)
goto out_rcu_unlock;
- /* skb has no dst, perform route lookup again */
+ /* skb dst is stale, drop it, and perform route lookup again */
+ skb_dst_drop(head);
iph = ip_hdr(head);
err = ip_route_input_noref(head, iph->daddr, iph->saddr,
iph->tos, head->dev);
@@ -522,16 +523,9 @@ found:
qp->q.max_size = skb->len + ihl;
if (qp->q.last_in == (INET_FRAG_FIRST_IN | INET_FRAG_LAST_IN) &&
- qp->q.meat == qp->q.len) {
- unsigned long orefdst = skb->_skb_refdst;
+ qp->q.meat == qp->q.len)
+ return ip_frag_reasm(qp, prev, dev);
- skb->_skb_refdst = 0UL;
- err = ip_frag_reasm(qp, prev, dev);
- skb->_skb_refdst = orefdst;
- return err;
- }
-
- skb_dst_drop(skb);
inet_frag_lru_move(&qp->q);
return -EINPROGRESS;
diff --git a/net/ipv4/netfilter/ipt_rpfilter.c b/net/ipv4/netfilter/ipt_rpfilter.c
index c49dcd02..c3013006 100644
--- a/net/ipv4/netfilter/ipt_rpfilter.c
+++ b/net/ipv4/netfilter/ipt_rpfilter.c
@@ -66,12 +66,6 @@ static bool rpfilter_lookup_reverse(struct flowi4 *fl4,
return dev_match;
}
-static bool rpfilter_is_local(const struct sk_buff *skb)
-{
- const struct rtable *rt = skb_rtable(skb);
- return rt && (rt->rt_flags & RTCF_LOCAL);
-}
-
static bool rpfilter_mt(const struct sk_buff *skb, struct xt_action_param *par)
{
const struct xt_rpfilter_info *info;
@@ -82,7 +76,7 @@ static bool rpfilter_mt(const struct sk_buff *skb, struct xt_action_param *par)
info = par->matchinfo;
invert = info->flags & XT_RPFILTER_INVERT;
- if (rpfilter_is_local(skb))
+ if (par->in->flags & IFF_LOOPBACK)
return true ^ invert;
iph = ip_hdr(skb);
diff --git a/net/ipv4/syncookies.c b/net/ipv4/syncookies.c
index 397e0f69..ef54377f 100644
--- a/net/ipv4/syncookies.c
+++ b/net/ipv4/syncookies.c
@@ -349,8 +349,8 @@ struct sock *cookie_v4_check(struct sock *sk, struct sk_buff *skb,
* hasn't changed since we received the original syn, but I see
* no easy way to do this.
*/
- flowi4_init_output(&fl4, sk->sk_bound_dev_if, sk->sk_mark,
- RT_CONN_FLAGS(sk), RT_SCOPE_UNIVERSE, IPPROTO_TCP,
+ flowi4_init_output(&fl4, 0, sk->sk_mark, RT_CONN_FLAGS(sk),
+ RT_SCOPE_UNIVERSE, IPPROTO_TCP,
inet_sk_flowi_flags(sk),
(opt && opt->srr) ? opt->faddr : ireq->rmt_addr,
ireq->loc_addr, th->source, th->dest);
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 13b9c08f..3bd55bad 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -113,7 +113,6 @@ int sysctl_tcp_early_retrans __read_mostly = 2;
#define FLAG_DSACKING_ACK 0x800 /* SACK blocks contained D-SACK info */
#define FLAG_NONHEAD_RETRANS_ACKED 0x1000 /* Non-head rexmitted data was ACKed */
#define FLAG_SACK_RENEGING 0x2000 /* snd_una advanced to a sacked seq */
-#define FLAG_UPDATE_TS_RECENT 0x4000 /* tcp_replace_ts_recent() */
#define FLAG_ACKED (FLAG_DATA_ACKED|FLAG_SYN_ACKED)
#define FLAG_NOT_DUP (FLAG_DATA|FLAG_WIN_UPDATE|FLAG_ACKED)
@@ -3565,27 +3564,6 @@ static void tcp_send_challenge_ack(struct sock *sk)
}
}
-static void tcp_store_ts_recent(struct tcp_sock *tp)
-{
- tp->rx_opt.ts_recent = tp->rx_opt.rcv_tsval;
- tp->rx_opt.ts_recent_stamp = get_seconds();
-}
-
-static void tcp_replace_ts_recent(struct tcp_sock *tp, u32 seq)
-{
- if (tp->rx_opt.saw_tstamp && !after(seq, tp->rcv_wup)) {
- /* PAWS bug workaround wrt. ACK frames, the PAWS discard
- * extra check below makes sure this can only happen
- * for pure ACK frames. -DaveM
- *
- * Not only, also it occurs for expired timestamps.
- */
-
- if (tcp_paws_check(&tp->rx_opt, 0))
- tcp_store_ts_recent(tp);
- }
-}
-
/* This routine deals with incoming acks, but not outgoing ones. */
static int tcp_ack(struct sock *sk, const struct sk_buff *skb, int flag)
{
@@ -3629,12 +3607,6 @@ static int tcp_ack(struct sock *sk, const struct sk_buff *skb, int flag)
prior_fackets = tp->fackets_out;
prior_in_flight = tcp_packets_in_flight(tp);
- /* ts_recent update must be made after we are sure that the packet
- * is in window.
- */
- if (flag & FLAG_UPDATE_TS_RECENT)
- tcp_replace_ts_recent(tp, TCP_SKB_CB(skb)->seq);
-
if (!(flag & FLAG_SLOWPATH) && after(ack, prior_snd_una)) {
/* Window is constant, pure forward advance.
* No more checks are required.
@@ -3955,6 +3927,27 @@ const u8 *tcp_parse_md5sig_option(const struct tcphdr *th)
EXPORT_SYMBOL(tcp_parse_md5sig_option);
#endif
+static inline void tcp_store_ts_recent(struct tcp_sock *tp)
+{
+ tp->rx_opt.ts_recent = tp->rx_opt.rcv_tsval;
+ tp->rx_opt.ts_recent_stamp = get_seconds();
+}
+
+static inline void tcp_replace_ts_recent(struct tcp_sock *tp, u32 seq)
+{
+ if (tp->rx_opt.saw_tstamp && !after(seq, tp->rcv_wup)) {
+ /* PAWS bug workaround wrt. ACK frames, the PAWS discard
+ * extra check below makes sure this can only happen
+ * for pure ACK frames. -DaveM
+ *
+ * Not only, also it occurs for expired timestamps.
+ */
+
+ if (tcp_paws_check(&tp->rx_opt, 0))
+ tcp_store_ts_recent(tp);
+ }
+}
+
/* Sorry, PAWS as specified is broken wrt. pure-ACKs -DaveM
*
* It is not fatal. If this ACK does _not_ change critical state (seqs, window)
@@ -5550,9 +5543,14 @@ slow_path:
return 0;
step5:
- if (tcp_ack(sk, skb, FLAG_SLOWPATH | FLAG_UPDATE_TS_RECENT) < 0)
+ if (tcp_ack(sk, skb, FLAG_SLOWPATH) < 0)
goto discard;
+ /* ts_recent update must be made after we are sure that the packet
+ * is in window.
+ */
+ tcp_replace_ts_recent(tp, TCP_SKB_CB(skb)->seq);
+
tcp_rcv_rtt_measure_ts(sk, skb);
/* Process urgent data. */
@@ -5988,8 +5986,7 @@ int tcp_rcv_state_process(struct sock *sk, struct sk_buff *skb,
/* step 5: check the ACK field */
if (true) {
- int acceptable = tcp_ack(sk, skb, FLAG_SLOWPATH |
- FLAG_UPDATE_TS_RECENT) > 0;
+ int acceptable = tcp_ack(sk, skb, FLAG_SLOWPATH) > 0;
switch (sk->sk_state) {
case TCP_SYN_RECV:
@@ -6140,6 +6137,11 @@ int tcp_rcv_state_process(struct sock *sk, struct sk_buff *skb,
}
}
+ /* ts_recent update must be made after we are sure that the packet
+ * is in window.
+ */
+ tcp_replace_ts_recent(tp, TCP_SKB_CB(skb)->seq);
+
/* step 6: check the URG bit */
tcp_urg(sk, skb, th);
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 509912a5..5d0b4387 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -2388,12 +2388,8 @@ int __tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb)
*/
TCP_SKB_CB(skb)->when = tcp_time_stamp;
- /* make sure skb->data is aligned on arches that require it
- * and check if ack-trimming & collapsing extended the headroom
- * beyond what csum_start can cover.
- */
- if (unlikely((NET_IP_ALIGN && ((unsigned long)skb->data & 3)) ||
- skb_headroom(skb) >= 0xFFFF)) {
+ /* make sure skb->data is aligned on arches that require it */
+ if (unlikely(NET_IP_ALIGN && ((unsigned long)skb->data & 3))) {
struct sk_buff *nskb = __pskb_copy(skb, MAX_TCP_HEADER,
GFP_ATOMIC);
return nskb ? tcp_transmit_skb(sk, nskb, 0, GFP_ATOMIC) :
@@ -2713,7 +2709,6 @@ struct sk_buff *tcp_make_synack(struct sock *sk, struct dst_entry *dst,
skb_reserve(skb, MAX_TCP_HEADER);
skb_dst_set(skb, dst);
- security_skb_owned_by(skb, sk);
mss = dst_metric_advmss(dst);
if (tp->rx_opt.user_mss && tp->rx_opt.user_mss < mss)
diff --git a/net/ipv6/netfilter/ip6t_rpfilter.c b/net/ipv6/netfilter/ip6t_rpfilter.c
index e0983f36..5060d541 100644
--- a/net/ipv6/netfilter/ip6t_rpfilter.c
+++ b/net/ipv6/netfilter/ip6t_rpfilter.c
@@ -71,12 +71,6 @@ static bool rpfilter_lookup_reverse6(const struct sk_buff *skb,
return ret;
}
-static bool rpfilter_is_local(const struct sk_buff *skb)
-{
- const struct rt6_info *rt = (const void *) skb_dst(skb);
- return rt && (rt->rt6i_flags & RTF_LOCAL);
-}
-
static bool rpfilter_mt(const struct sk_buff *skb, struct xt_action_param *par)
{
const struct xt_rpfilter_info *info = par->matchinfo;
@@ -84,7 +78,7 @@ static bool rpfilter_mt(const struct sk_buff *skb, struct xt_action_param *par)
struct ipv6hdr *iph;
bool invert = info->flags & XT_RPFILTER_INVERT;
- if (rpfilter_is_local(skb))
+ if (par->in->flags & IFF_LOOPBACK)
return true ^ invert;
iph = ipv6_hdr(skb);
diff --git a/net/ipv6/reassembly.c b/net/ipv6/reassembly.c
index 0ba10e53..196ab934 100644
--- a/net/ipv6/reassembly.c
+++ b/net/ipv6/reassembly.c
@@ -330,17 +330,9 @@ found:
}
if (fq->q.last_in == (INET_FRAG_FIRST_IN | INET_FRAG_LAST_IN) &&
- fq->q.meat == fq->q.len) {
- int res;
- unsigned long orefdst = skb->_skb_refdst;
-
- skb->_skb_refdst = 0UL;
- res = ip6_frag_reasm(fq, prev, dev);
- skb->_skb_refdst = orefdst;
- return res;
- }
+ fq->q.meat == fq->q.len)
+ return ip6_frag_reasm(fq, prev, dev);
- skb_dst_drop(skb);
inet_frag_lru_move(&fq->q);
return -1;
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index 46a5be85..f6d629fd 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -386,7 +386,6 @@ static void tcp_v6_err(struct sk_buff *skb, struct inet6_skb_parm *opt,
if (dst)
dst->ops->redirect(dst, sk, skb);
- goto out;
}
if (type == ICMPV6_PKT_TOOBIG) {
diff --git a/net/irda/af_irda.c b/net/irda/af_irda.c
index e493b339..d28e7f01 100644
--- a/net/irda/af_irda.c
+++ b/net/irda/af_irda.c
@@ -1386,8 +1386,6 @@ static int irda_recvmsg_dgram(struct kiocb *iocb, struct socket *sock,
IRDA_DEBUG(4, "%s()\n", __func__);
- msg->msg_namelen = 0;
-
skb = skb_recv_datagram(sk, flags & ~MSG_DONTWAIT,
flags & MSG_DONTWAIT, &err);
if (!skb)
diff --git a/net/irda/iriap.c b/net/irda/iriap.c
index e1b37f5a..29340a9a 100644
--- a/net/irda/iriap.c
+++ b/net/irda/iriap.c
@@ -303,8 +303,7 @@ static void iriap_disconnect_indication(void *instance, void *sap,
{
struct iriap_cb *self;
- IRDA_DEBUG(4, "%s(), reason=%s [%d]\n", __func__,
- irlmp_reason_str(reason), reason);
+ IRDA_DEBUG(4, "%s(), reason=%s\n", __func__, irlmp_reasons[reason]);
self = instance;
diff --git a/net/irda/irlmp.c b/net/irda/irlmp.c
index 1064621d..6115a44c 100644
--- a/net/irda/irlmp.c
+++ b/net/irda/irlmp.c
@@ -66,15 +66,8 @@ const char *irlmp_reasons[] = {
"LM_LAP_RESET",
"LM_INIT_DISCONNECT",
"ERROR, NOT USED",
- "UNKNOWN",
};
-const char *irlmp_reason_str(LM_REASON reason)
-{
- reason = min_t(size_t, reason, ARRAY_SIZE(irlmp_reasons) - 1);
- return irlmp_reasons[reason];
-}
-
/*
* Function irlmp_init (void)
*
@@ -754,8 +747,7 @@ void irlmp_disconnect_indication(struct lsap_cb *self, LM_REASON reason,
{
struct lsap_cb *lsap;
- IRDA_DEBUG(1, "%s(), reason=%s [%d]\n", __func__,
- irlmp_reason_str(reason), reason);
+ IRDA_DEBUG(1, "%s(), reason=%s\n", __func__, irlmp_reasons[reason]);
IRDA_ASSERT(self != NULL, return;);
IRDA_ASSERT(self->magic == LMP_LSAP_MAGIC, return;);
diff --git a/net/iucv/af_iucv.c b/net/iucv/af_iucv.c
index 206ce6db..a7d11ffe 100644
--- a/net/iucv/af_iucv.c
+++ b/net/iucv/af_iucv.c
@@ -49,6 +49,12 @@ static const u8 iprm_shutdown[8] =
#define TRGCLS_SIZE (sizeof(((struct iucv_message *)0)->class))
+/* macros to set/get socket control buffer at correct offset */
+#define CB_TAG(skb) ((skb)->cb) /* iucv message tag */
+#define CB_TAG_LEN (sizeof(((struct iucv_message *) 0)->tag))
+#define CB_TRGCLS(skb) ((skb)->cb + CB_TAG_LEN) /* iucv msg target class */
+#define CB_TRGCLS_LEN (TRGCLS_SIZE)
+
#define __iucv_sock_wait(sk, condition, timeo, ret) \
do { \
DEFINE_WAIT(__wait); \
@@ -1135,7 +1141,7 @@ static int iucv_sock_sendmsg(struct kiocb *iocb, struct socket *sock,
/* increment and save iucv message tag for msg_completion cbk */
txmsg.tag = iucv->send_tag++;
- IUCV_SKB_CB(skb)->tag = txmsg.tag;
+ memcpy(CB_TAG(skb), &txmsg.tag, CB_TAG_LEN);
if (iucv->transport == AF_IUCV_TRANS_HIPER) {
atomic_inc(&iucv->msg_sent);
@@ -1218,7 +1224,7 @@ static int iucv_fragment_skb(struct sock *sk, struct sk_buff *skb, int len)
return -ENOMEM;
/* copy target class to control buffer of new skb */
- IUCV_SKB_CB(nskb)->class = IUCV_SKB_CB(skb)->class;
+ memcpy(CB_TRGCLS(nskb), CB_TRGCLS(skb), CB_TRGCLS_LEN);
/* copy data fragment */
memcpy(nskb->data, skb->data + copied, size);
@@ -1250,7 +1256,7 @@ static void iucv_process_message(struct sock *sk, struct sk_buff *skb,
/* store msg target class in the second 4 bytes of skb ctrl buffer */
/* Note: the first 4 bytes are reserved for msg tag */
- IUCV_SKB_CB(skb)->class = msg->class;
+ memcpy(CB_TRGCLS(skb), &msg->class, CB_TRGCLS_LEN);
/* check for special IPRM messages (e.g. iucv_sock_shutdown) */
if ((msg->flags & IUCV_IPRMDATA) && len > 7) {
@@ -1286,7 +1292,6 @@ static void iucv_process_message(struct sock *sk, struct sk_buff *skb,
}
}
- IUCV_SKB_CB(skb)->offset = 0;
if (sock_queue_rcv_skb(sk, skb))
skb_queue_head(&iucv_sk(sk)->backlog_skb_q, skb);
}
@@ -1322,9 +1327,6 @@ static int iucv_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
unsigned int copied, rlen;
struct sk_buff *skb, *rskb, *cskb;
int err = 0;
- u32 offset;
-
- msg->msg_namelen = 0;
if ((sk->sk_state == IUCV_DISCONN) &&
skb_queue_empty(&iucv->backlog_skb_q) &&
@@ -1344,14 +1346,13 @@ static int iucv_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
return err;
}
- offset = IUCV_SKB_CB(skb)->offset;
- rlen = skb->len - offset; /* real length of skb */
+ rlen = skb->len; /* real length of skb */
copied = min_t(unsigned int, rlen, len);
if (!rlen)
sk->sk_shutdown = sk->sk_shutdown | RCV_SHUTDOWN;
cskb = skb;
- if (skb_copy_datagram_iovec(cskb, offset, msg->msg_iov, copied)) {
+ if (skb_copy_datagram_iovec(cskb, 0, msg->msg_iov, copied)) {
if (!(flags & MSG_PEEK))
skb_queue_head(&sk->sk_receive_queue, skb);
return -EFAULT;
@@ -1369,8 +1370,7 @@ static int iucv_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
* get the trgcls from the control buffer of the skb due to
* fragmentation of original iucv message. */
err = put_cmsg(msg, SOL_IUCV, SCM_IUCV_TRGCLS,
- sizeof(IUCV_SKB_CB(skb)->class),
- (void *)&IUCV_SKB_CB(skb)->class);
+ CB_TRGCLS_LEN, CB_TRGCLS(skb));
if (err) {
if (!(flags & MSG_PEEK))
skb_queue_head(&sk->sk_receive_queue, skb);
@@ -1382,8 +1382,9 @@ static int iucv_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
/* SOCK_STREAM: re-queue skb if it contains unreceived data */
if (sk->sk_type == SOCK_STREAM) {
- if (copied < rlen) {
- IUCV_SKB_CB(skb)->offset = offset + copied;
+ skb_pull(skb, copied);
+ if (skb->len) {
+ skb_queue_head(&sk->sk_receive_queue, skb);
goto done;
}
}
@@ -1402,7 +1403,6 @@ static int iucv_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
spin_lock_bh(&iucv->message_q.lock);
rskb = skb_dequeue(&iucv->backlog_skb_q);
while (rskb) {
- IUCV_SKB_CB(rskb)->offset = 0;
if (sock_queue_rcv_skb(sk, rskb)) {
skb_queue_head(&iucv->backlog_skb_q,
rskb);
@@ -1830,7 +1830,7 @@ static void iucv_callback_txdone(struct iucv_path *path,
spin_lock_irqsave(&list->lock, flags);
while (list_skb != (struct sk_buff *)list) {
- if (msg->tag != IUCV_SKB_CB(list_skb)->tag) {
+ if (!memcmp(&msg->tag, CB_TAG(list_skb), CB_TAG_LEN)) {
this = list_skb;
break;
}
@@ -2091,7 +2091,6 @@ static int afiucv_hs_callback_rx(struct sock *sk, struct sk_buff *skb)
skb_pull(skb, sizeof(struct af_iucv_trans_hdr));
skb_reset_transport_header(skb);
skb_reset_network_header(skb);
- IUCV_SKB_CB(skb)->offset = 0;
spin_lock(&iucv->message_q.lock);
if (skb_queue_empty(&iucv->backlog_skb_q)) {
if (sock_queue_rcv_skb(sk, skb)) {
@@ -2196,7 +2195,8 @@ static int afiucv_hs_rcv(struct sk_buff *skb, struct net_device *dev,
/* fall through and receive zero length data */
case 0:
/* plain data frame */
- IUCV_SKB_CB(skb)->class = trans_hdr->iucv_hdr.class;
+ memcpy(CB_TRGCLS(skb), &trans_hdr->iucv_hdr.class,
+ CB_TRGCLS_LEN);
err = afiucv_hs_callback_rx(sk, skb);
break;
default:
diff --git a/net/l2tp/l2tp_ip6.c b/net/l2tp/l2tp_ip6.c
index b8a60393..c74f5a91 100644
--- a/net/l2tp/l2tp_ip6.c
+++ b/net/l2tp/l2tp_ip6.c
@@ -690,7 +690,6 @@ static int l2tp_ip6_recvmsg(struct kiocb *iocb, struct sock *sk,
lsa->l2tp_addr = ipv6_hdr(skb)->saddr;
lsa->l2tp_flowinfo = 0;
lsa->l2tp_scope_id = 0;
- lsa->l2tp_conn_id = 0;
if (ipv6_addr_type(&lsa->l2tp_addr) & IPV6_ADDR_LINKLOCAL)
lsa->l2tp_scope_id = IP6CB(skb)->iif;
}
diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c
index 48aaa892..88709882 100644
--- a/net/llc/af_llc.c
+++ b/net/llc/af_llc.c
@@ -720,8 +720,6 @@ static int llc_ui_recvmsg(struct kiocb *iocb, struct socket *sock,
int target; /* Read at least this many bytes */
long timeo;
- msg->msg_namelen = 0;
-
lock_sock(sk);
copied = -ENOTCONN;
if (unlikely(sk->sk_type == SOCK_STREAM && sk->sk_state == TCP_LISTEN))
diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c
index 9ed49ad0..58150f87 100644
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
@@ -78,7 +78,7 @@ void ieee80211_recalc_txpower(struct ieee80211_sub_if_data *sdata)
ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_TXPOWER);
}
-static u32 __ieee80211_idle_off(struct ieee80211_local *local)
+u32 ieee80211_idle_off(struct ieee80211_local *local)
{
if (!(local->hw.conf.flags & IEEE80211_CONF_IDLE))
return 0;
@@ -87,7 +87,7 @@ static u32 __ieee80211_idle_off(struct ieee80211_local *local)
return IEEE80211_CONF_CHANGE_IDLE;
}
-static u32 __ieee80211_idle_on(struct ieee80211_local *local)
+static u32 ieee80211_idle_on(struct ieee80211_local *local)
{
if (local->hw.conf.flags & IEEE80211_CONF_IDLE)
return 0;
@@ -98,18 +98,16 @@ static u32 __ieee80211_idle_on(struct ieee80211_local *local)
return IEEE80211_CONF_CHANGE_IDLE;
}
-static u32 __ieee80211_recalc_idle(struct ieee80211_local *local,
- bool force_active)
+void ieee80211_recalc_idle(struct ieee80211_local *local)
{
bool working = false, scanning, active;
unsigned int led_trig_start = 0, led_trig_stop = 0;
struct ieee80211_roc_work *roc;
+ u32 change;
lockdep_assert_held(&local->mtx);
- active = force_active ||
- !list_empty(&local->chanctx_list) ||
- local->monitors;
+ active = !list_empty(&local->chanctx_list) || local->monitors;
if (!local->ops->remain_on_channel) {
list_for_each_entry(roc, &local->roc_list, list) {
@@ -134,18 +132,9 @@ static u32 __ieee80211_recalc_idle(struct ieee80211_local *local,
ieee80211_mod_tpt_led_trig(local, led_trig_start, led_trig_stop);
if (working || scanning || active)
- return __ieee80211_idle_off(local);
- return __ieee80211_idle_on(local);
-}
-
-u32 ieee80211_idle_off(struct ieee80211_local *local)
-{
- return __ieee80211_recalc_idle(local, true);
-}
-
-void ieee80211_recalc_idle(struct ieee80211_local *local)
-{
- u32 change = __ieee80211_recalc_idle(local, false);
+ change = ieee80211_idle_off(local);
+ else
+ change = ieee80211_idle_on(local);
if (change)
ieee80211_hw_config(local, change);
}
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
index 346ad4cf..82cc3031 100644
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
@@ -3964,16 +3964,8 @@ int ieee80211_mgd_auth(struct ieee80211_sub_if_data *sdata,
/* prep auth_data so we don't go into idle on disassoc */
ifmgd->auth_data = auth_data;
- if (ifmgd->associated) {
- u8 frame_buf[IEEE80211_DEAUTH_FRAME_LEN];
-
- ieee80211_set_disassoc(sdata, IEEE80211_STYPE_DEAUTH,
- WLAN_REASON_UNSPECIFIED,
- false, frame_buf);
-
- __cfg80211_send_deauth(sdata->dev, frame_buf,
- sizeof(frame_buf));
- }
+ if (ifmgd->associated)
+ ieee80211_set_disassoc(sdata, 0, 0, false, NULL);
sdata_info(sdata, "authenticate with %pM\n", req->bss->bssid);
@@ -4033,16 +4025,8 @@ int ieee80211_mgd_assoc(struct ieee80211_sub_if_data *sdata,
mutex_lock(&ifmgd->mtx);
- if (ifmgd->associated) {
- u8 frame_buf[IEEE80211_DEAUTH_FRAME_LEN];
-
- ieee80211_set_disassoc(sdata, IEEE80211_STYPE_DEAUTH,
- WLAN_REASON_UNSPECIFIED,
- false, frame_buf);
-
- __cfg80211_send_deauth(sdata->dev, frame_buf,
- sizeof(frame_buf));
- }
+ if (ifmgd->associated)
+ ieee80211_set_disassoc(sdata, 0, 0, false, NULL);
if (ifmgd->auth_data && !ifmgd->auth_data->done) {
err = -EBUSY;
diff --git a/net/netfilter/ipset/ip_set_bitmap_ipmac.c b/net/netfilter/ipset/ip_set_bitmap_ipmac.c
index d7df6ac2..0f92dc24 100644
--- a/net/netfilter/ipset/ip_set_bitmap_ipmac.c
+++ b/net/netfilter/ipset/ip_set_bitmap_ipmac.c
@@ -339,11 +339,7 @@ bitmap_ipmac_tlist(const struct ip_set *set,
nla_put_failure:
nla_nest_cancel(skb, nested);
ipset_nest_end(skb, atd);
- if (unlikely(id == first)) {
- cb->args[2] = 0;
- return -EMSGSIZE;
- }
- return 0;
+ return -EMSGSIZE;
}
static int
diff --git a/net/netfilter/ipset/ip_set_hash_ipportnet.c b/net/netfilter/ipset/ip_set_hash_ipportnet.c
index 10a30b4f..f2627226 100644
--- a/net/netfilter/ipset/ip_set_hash_ipportnet.c
+++ b/net/netfilter/ipset/ip_set_hash_ipportnet.c
@@ -104,15 +104,6 @@ hash_ipportnet4_data_flags(struct hash_ipportnet4_elem *dst, u32 flags)
dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
}
-static inline void
-hash_ipportnet4_data_reset_flags(struct hash_ipportnet4_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
-}
-
static inline int
hash_ipportnet4_data_match(const struct hash_ipportnet4_elem *elem)
{
@@ -423,15 +414,6 @@ hash_ipportnet6_data_flags(struct hash_ipportnet6_elem *dst, u32 flags)
dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
}
-static inline void
-hash_ipportnet6_data_reset_flags(struct hash_ipportnet6_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
-}
-
static inline int
hash_ipportnet6_data_match(const struct hash_ipportnet6_elem *elem)
{
diff --git a/net/netfilter/ipset/ip_set_hash_net.c b/net/netfilter/ipset/ip_set_hash_net.c
index d6a59154..4b677cf6 100644
--- a/net/netfilter/ipset/ip_set_hash_net.c
+++ b/net/netfilter/ipset/ip_set_hash_net.c
@@ -87,16 +87,7 @@ hash_net4_data_copy(struct hash_net4_elem *dst,
static inline void
hash_net4_data_flags(struct hash_net4_elem *dst, u32 flags)
{
- dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
-}
-
-static inline void
-hash_net4_data_reset_flags(struct hash_net4_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
+ dst->nomatch = flags & IPSET_FLAG_NOMATCH;
}
static inline int
@@ -317,16 +308,7 @@ hash_net6_data_copy(struct hash_net6_elem *dst,
static inline void
hash_net6_data_flags(struct hash_net6_elem *dst, u32 flags)
{
- dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
-}
-
-static inline void
-hash_net6_data_reset_flags(struct hash_net6_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
+ dst->nomatch = flags & IPSET_FLAG_NOMATCH;
}
static inline int
diff --git a/net/netfilter/ipset/ip_set_hash_netiface.c b/net/netfilter/ipset/ip_set_hash_netiface.c
index f2b0a3c3..6ba985f1 100644
--- a/net/netfilter/ipset/ip_set_hash_netiface.c
+++ b/net/netfilter/ipset/ip_set_hash_netiface.c
@@ -198,16 +198,7 @@ hash_netiface4_data_copy(struct hash_netiface4_elem *dst,
static inline void
hash_netiface4_data_flags(struct hash_netiface4_elem *dst, u32 flags)
{
- dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
-}
-
-static inline void
-hash_netiface4_data_reset_flags(struct hash_netiface4_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
+ dst->nomatch = flags & IPSET_FLAG_NOMATCH;
}
static inline int
@@ -503,7 +494,7 @@ hash_netiface6_data_copy(struct hash_netiface6_elem *dst,
static inline void
hash_netiface6_data_flags(struct hash_netiface6_elem *dst, u32 flags)
{
- dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
+ dst->nomatch = flags & IPSET_FLAG_NOMATCH;
}
static inline int
@@ -512,15 +503,6 @@ hash_netiface6_data_match(const struct hash_netiface6_elem *elem)
return elem->nomatch ? -ENOTEMPTY : 1;
}
-static inline void
-hash_netiface6_data_reset_flags(struct hash_netiface6_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
-}
-
static inline void
hash_netiface6_data_zero_out(struct hash_netiface6_elem *elem)
{
diff --git a/net/netfilter/ipset/ip_set_hash_netport.c b/net/netfilter/ipset/ip_set_hash_netport.c
index 349deb67..af20c0c5 100644
--- a/net/netfilter/ipset/ip_set_hash_netport.c
+++ b/net/netfilter/ipset/ip_set_hash_netport.c
@@ -104,15 +104,6 @@ hash_netport4_data_flags(struct hash_netport4_elem *dst, u32 flags)
dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
}
-static inline void
-hash_netport4_data_reset_flags(struct hash_netport4_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
-}
-
static inline int
hash_netport4_data_match(const struct hash_netport4_elem *elem)
{
@@ -384,15 +375,6 @@ hash_netport6_data_flags(struct hash_netport6_elem *dst, u32 flags)
dst->nomatch = !!(flags & IPSET_FLAG_NOMATCH);
}
-static inline void
-hash_netport6_data_reset_flags(struct hash_netport6_elem *dst, u32 *flags)
-{
- if (dst->nomatch) {
- *flags = IPSET_FLAG_NOMATCH;
- dst->nomatch = 0;
- }
-}
-
static inline int
hash_netport6_data_match(const struct hash_netport6_elem *elem)
{
diff --git a/net/netfilter/ipset/ip_set_list_set.c b/net/netfilter/ipset/ip_set_list_set.c
index 09c744aa..8371c2ba 100644
--- a/net/netfilter/ipset/ip_set_list_set.c
+++ b/net/netfilter/ipset/ip_set_list_set.c
@@ -174,13 +174,9 @@ list_set_add(struct list_set *map, u32 i, ip_set_id_t id,
{
const struct set_elem *e = list_set_elem(map, i);
- if (e->id != IPSET_INVALID_ID) {
- const struct set_elem *x = list_set_elem(map, map->size - 1);
-
- /* Last element replaced or pushed off */
- if (x->id != IPSET_INVALID_ID)
- ip_set_put_byindex(x->id);
- }
+ if (i == map->size - 1 && e->id != IPSET_INVALID_ID)
+ /* Last element replaced: e.g. add new,before,last */
+ ip_set_put_byindex(e->id);
if (with_timeout(map->timeout))
list_elem_tadd(map, i, id, ip_set_timeout_set(timeout));
else
diff --git a/net/netfilter/nf_conntrack_sip.c b/net/netfilter/nf_conntrack_sip.c
index e0c4373b..0e7d4233 100644
--- a/net/netfilter/nf_conntrack_sip.c
+++ b/net/netfilter/nf_conntrack_sip.c
@@ -1593,8 +1593,10 @@ static int sip_help_tcp(struct sk_buff *skb, unsigned int protoff,
end += strlen("\r\n\r\n") + clen;
msglen = origlen = end - dptr;
- if (msglen > datalen)
- return NF_ACCEPT;
+ if (msglen > datalen) {
+ nf_ct_helper_log(skb, ct, "incomplete/bad SIP message");
+ return NF_DROP;
+ }
ret = process_sip_msg(skb, ct, protoff, dataoff,
&dptr, &msglen);
diff --git a/net/netfilter/nf_nat_core.c b/net/netfilter/nf_nat_core.c
index ad24be07..8d5769c6 100644
--- a/net/netfilter/nf_nat_core.c
+++ b/net/netfilter/nf_nat_core.c
@@ -467,22 +467,33 @@ EXPORT_SYMBOL_GPL(nf_nat_packet);
struct nf_nat_proto_clean {
u8 l3proto;
u8 l4proto;
+ bool hash;
};
-/* kill conntracks with affected NAT section */
-static int nf_nat_proto_remove(struct nf_conn *i, void *data)
+/* Clear NAT section of all conntracks, in case we're loaded again. */
+static int nf_nat_proto_clean(struct nf_conn *i, void *data)
{
const struct nf_nat_proto_clean *clean = data;
struct nf_conn_nat *nat = nfct_nat(i);
if (!nat)
return 0;
-
+ if (!(i->status & IPS_SRC_NAT_DONE))
+ return 0;
if ((clean->l3proto && nf_ct_l3num(i) != clean->l3proto) ||
(clean->l4proto && nf_ct_protonum(i) != clean->l4proto))
return 0;
- return i->status & IPS_NAT_MASK ? 1 : 0;
+ if (clean->hash) {
+ spin_lock_bh(&nf_nat_lock);
+ hlist_del_rcu(&nat->bysource);
+ spin_unlock_bh(&nf_nat_lock);
+ } else {
+ memset(nat, 0, sizeof(*nat));
+ i->status &= ~(IPS_NAT_MASK | IPS_NAT_DONE_MASK |
+ IPS_SEQ_ADJUST);
+ }
+ return 0;
}
static void nf_nat_l4proto_clean(u8 l3proto, u8 l4proto)
@@ -494,8 +505,16 @@ static void nf_nat_l4proto_clean(u8 l3proto, u8 l4proto)
struct net *net;
rtnl_lock();
+ /* Step 1 - remove from bysource hash */
+ clean.hash = true;
for_each_net(net)
- nf_ct_iterate_cleanup(net, nf_nat_proto_remove, &clean);
+ nf_ct_iterate_cleanup(net, nf_nat_proto_clean, &clean);
+ synchronize_rcu();
+
+ /* Step 2 - clean NAT section */
+ clean.hash = false;
+ for_each_net(net)
+ nf_ct_iterate_cleanup(net, nf_nat_proto_clean, &clean);
rtnl_unlock();
}
@@ -507,9 +526,16 @@ static void nf_nat_l3proto_clean(u8 l3proto)
struct net *net;
rtnl_lock();
+ /* Step 1 - remove from bysource hash */
+ clean.hash = true;
+ for_each_net(net)
+ nf_ct_iterate_cleanup(net, nf_nat_proto_clean, &clean);
+ synchronize_rcu();
+ /* Step 2 - clean NAT section */
+ clean.hash = false;
for_each_net(net)
- nf_ct_iterate_cleanup(net, nf_nat_proto_remove, &clean);
+ nf_ct_iterate_cleanup(net, nf_nat_proto_clean, &clean);
rtnl_unlock();
}
@@ -747,7 +773,7 @@ static void __net_exit nf_nat_net_exit(struct net *net)
{
struct nf_nat_proto_clean clean = {};
- nf_ct_iterate_cleanup(net, &nf_nat_proto_remove, &clean);
+ nf_ct_iterate_cleanup(net, &nf_nat_proto_clean, &clean);
synchronize_rcu();
nf_ct_free_hashtable(net->ct.nat_bysource, net->ct.nat_htable_size);
}
diff --git a/net/netrom/af_netrom.c b/net/netrom/af_netrom.c
index 103bd704..d1fa1d9f 100644
--- a/net/netrom/af_netrom.c
+++ b/net/netrom/af_netrom.c
@@ -1173,7 +1173,6 @@ static int nr_recvmsg(struct kiocb *iocb, struct socket *sock,
}
if (sax != NULL) {
- memset(sax, 0, sizeof(*sax));
sax->sax25_family = AF_NETROM;
skb_copy_from_linear_data_offset(skb, 7, sax->sax25_call.ax25_call,
AX25_ADDR_LEN);
diff --git a/net/nfc/llcp/sock.c b/net/nfc/llcp/sock.c
index 6c94447e..8f025746 100644
--- a/net/nfc/llcp/sock.c
+++ b/net/nfc/llcp/sock.c
@@ -646,8 +646,6 @@ static int llcp_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
pr_debug("%p %zu\n", sk, len);
- msg->msg_namelen = 0;
-
lock_sock(sk);
if (sk->sk_state == LLCP_CLOSED &&
@@ -693,7 +691,6 @@ static int llcp_sock_recvmsg(struct kiocb *iocb, struct socket *sock,
pr_debug("Datagram socket %d %d\n", ui_cb->dsap, ui_cb->ssap);
- memset(sockaddr, 0, sizeof(*sockaddr));
sockaddr->sa_family = AF_NFC;
sockaddr->nfc_protocol = NFC_PROTO_NFC_DEP;
sockaddr->dsap = ui_cb->dsap;
diff --git a/net/openvswitch/datapath.c b/net/openvswitch/datapath.c
index 6980c3e6..a4b72470 100644
--- a/net/openvswitch/datapath.c
+++ b/net/openvswitch/datapath.c
@@ -1593,8 +1593,10 @@ struct sk_buff *ovs_vport_cmd_build_info(struct vport *vport, u32 portid,
return ERR_PTR(-ENOMEM);
retval = ovs_vport_cmd_fill_info(vport, skb, portid, seq, 0, cmd);
- BUG_ON(retval < 0);
-
+ if (retval < 0) {
+ kfree_skb(skb);
+ return ERR_PTR(retval);
+ }
return skb;
}
@@ -1724,32 +1726,24 @@ static int ovs_vport_cmd_set(struct sk_buff *skb, struct genl_info *info)
nla_get_u32(a[OVS_VPORT_ATTR_TYPE]) != vport->ops->type)
err = -EINVAL;
- reply = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
- if (!reply) {
- err = -ENOMEM;
- goto exit_unlock;
- }
-
if (!err && a[OVS_VPORT_ATTR_OPTIONS])
err = ovs_vport_set_options(vport, a[OVS_VPORT_ATTR_OPTIONS]);
if (err)
- goto exit_free;
-
+ goto exit_unlock;
if (a[OVS_VPORT_ATTR_UPCALL_PID])
vport->upcall_portid = nla_get_u32(a[OVS_VPORT_ATTR_UPCALL_PID]);
- err = ovs_vport_cmd_fill_info(vport, reply, info->snd_portid,
- info->snd_seq, 0, OVS_VPORT_CMD_NEW);
- BUG_ON(err < 0);
+ reply = ovs_vport_cmd_build_info(vport, info->snd_portid, info->snd_seq,
+ OVS_VPORT_CMD_NEW);
+ if (IS_ERR(reply)) {
+ netlink_set_err(sock_net(skb->sk)->genl_sock, 0,
+ ovs_dp_vport_multicast_group.id, PTR_ERR(reply));
+ goto exit_unlock;
+ }
genl_notify(reply, genl_info_net(info), info->snd_portid,
ovs_dp_vport_multicast_group.id, info->nlhdr, GFP_KERNEL);
- rtnl_unlock();
- return 0;
-
-exit_free:
- kfree_skb(reply);
exit_unlock:
rtnl_unlock();
return err;
diff --git a/net/openvswitch/flow.c b/net/openvswitch/flow.c
index 67a2b783..fe0e4215 100644
--- a/net/openvswitch/flow.c
+++ b/net/openvswitch/flow.c
@@ -795,9 +795,9 @@ void ovs_flow_tbl_insert(struct flow_table *table, struct sw_flow *flow)
void ovs_flow_tbl_remove(struct flow_table *table, struct sw_flow *flow)
{
- BUG_ON(table->count == 0);
hlist_del_rcu(&flow->hash_node[table->node_ver]);
table->count--;
+ BUG_ON(table->count < 0);
}
/* The size of the argument for each %OVS_KEY_ATTR_* Netlink attribute. */
diff --git a/net/rose/af_rose.c b/net/rose/af_rose.c
index 9c834745..cf68e6e4 100644
--- a/net/rose/af_rose.c
+++ b/net/rose/af_rose.c
@@ -1253,7 +1253,6 @@ static int rose_recvmsg(struct kiocb *iocb, struct socket *sock,
skb_copy_datagram_iovec(skb, 0, msg->msg_iov, copied);
if (srose != NULL) {
- memset(srose, 0, msg->msg_namelen);
srose->srose_family = AF_ROSE;
srose->srose_addr = rose->dest_addr;
srose->srose_call = rose->dest_call;
diff --git a/net/sched/cls_fw.c b/net/sched/cls_fw.c
index 9b97172d..1135d822 100644
--- a/net/sched/cls_fw.c
+++ b/net/sched/cls_fw.c
@@ -204,6 +204,7 @@ fw_change_attrs(struct net *net, struct tcf_proto *tp, struct fw_filter *f,
if (err < 0)
return err;
+ err = -EINVAL;
if (tb[TCA_FW_CLASSID]) {
f->res.classid = nla_get_u32(tb[TCA_FW_CLASSID]);
tcf_bind_filter(tp, &f->res, base);
@@ -217,7 +218,6 @@ fw_change_attrs(struct net *net, struct tcf_proto *tp, struct fw_filter *f,
}
#endif /* CONFIG_NET_CLS_IND */
- err = -EINVAL;
if (tb[TCA_FW_MASK]) {
mask = nla_get_u32(tb[TCA_FW_MASK]);
if (mask != head->mask)
diff --git a/net/sunrpc/clnt.c b/net/sunrpc/clnt.c
index d5f35f15..dcc446e7 100644
--- a/net/sunrpc/clnt.c
+++ b/net/sunrpc/clnt.c
@@ -304,8 +304,10 @@ static struct rpc_clnt * rpc_new_client(const struct rpc_create_args *args, stru
err = rpciod_up();
if (err)
goto out_no_rpciod;
-
err = -EINVAL;
+ if (!xprt)
+ goto out_no_xprt;
+
if (args->version >= program->nrvers)
goto out_err;
version = program->version[args->version];
@@ -380,9 +382,10 @@ out_no_principal:
out_no_stats:
kfree(clnt);
out_err:
+ xprt_put(xprt);
+out_no_xprt:
rpciod_down();
out_no_rpciod:
- xprt_put(xprt);
return ERR_PTR(err);
}
@@ -509,7 +512,7 @@ static struct rpc_clnt *__rpc_clone_client(struct rpc_create_args *args,
new = rpc_new_client(args, xprt);
if (IS_ERR(new)) {
err = PTR_ERR(new);
- goto out_err;
+ goto out_put;
}
atomic_inc(&clnt->cl_count);
@@ -522,6 +525,8 @@ static struct rpc_clnt *__rpc_clone_client(struct rpc_create_args *args,
new->cl_chatty = clnt->cl_chatty;
return new;
+out_put:
+ xprt_put(xprt);
out_err:
dprintk("RPC: %s: returned error %d\n", __func__, err);
return ERR_PTR(err);
diff --git a/net/tipc/socket.c b/net/tipc/socket.c
index 515ce38e..a9622b6c 100644
--- a/net/tipc/socket.c
+++ b/net/tipc/socket.c
@@ -790,7 +790,6 @@ static void set_orig_addr(struct msghdr *m, struct tipc_msg *msg)
if (addr) {
addr->family = AF_TIPC;
addr->addrtype = TIPC_ADDR_ID;
- memset(&addr->addr, 0, sizeof(addr->addr));
addr->addr.id.ref = msg_origport(msg);
addr->addr.id.node = msg_orignode(msg);
addr->addr.name.domain = 0; /* could leave uninitialized */
@@ -905,9 +904,6 @@ static int recv_msg(struct kiocb *iocb, struct socket *sock,
goto exit;
}
- /* will be updated in set_orig_addr() if needed */
- m->msg_namelen = 0;
-
timeout = sock_rcvtimeo(sk, flags & MSG_DONTWAIT);
restart:
@@ -1017,9 +1013,6 @@ static int recv_stream(struct kiocb *iocb, struct socket *sock,
goto exit;
}
- /* will be updated in set_orig_addr() if needed */
- m->msg_namelen = 0;
-
target = sock_rcvlowat(sk, flags & MSG_WAITALL, buf_len);
timeout = sock_rcvtimeo(sk, flags & MSG_DONTWAIT);
diff --git a/net/vmw_vsock/af_vsock.c b/net/vmw_vsock/af_vsock.c
index 7f93e2a4..d8079daf 100644
--- a/net/vmw_vsock/af_vsock.c
+++ b/net/vmw_vsock/af_vsock.c
@@ -1670,8 +1670,6 @@ vsock_stream_recvmsg(struct kiocb *kiocb,
vsk = vsock_sk(sk);
err = 0;
- msg->msg_namelen = 0;
-
lock_sock(sk);
if (sk->sk_state != SS_CONNECTED) {
diff --git a/net/vmw_vsock/vmci_transport.c b/net/vmw_vsock/vmci_transport.c
index 5e04d3d9..1f6508e2 100644
--- a/net/vmw_vsock/vmci_transport.c
+++ b/net/vmw_vsock/vmci_transport.c
@@ -1736,8 +1736,6 @@ static int vmci_transport_dgram_dequeue(struct kiocb *kiocb,
if (flags & MSG_OOB || flags & MSG_ERRQUEUE)
return -EOPNOTSUPP;
- msg->msg_namelen = 0;
-
/* Retrieve the head sk_buff from the socket's receive queue. */
err = 0;
skb = skb_recv_datagram(&vsk->sk, flags, noblock, &err);
@@ -1770,6 +1768,7 @@ static int vmci_transport_dgram_dequeue(struct kiocb *kiocb,
if (err)
goto out;
+ msg->msg_namelen = 0;
if (msg->msg_name) {
struct sockaddr_vm *vm_addr;
diff --git a/net/wireless/Kconfig b/net/wireless/Kconfig
index 16d08b39..fa7011e9 100644
--- a/net/wireless/Kconfig
+++ b/net/wireless/Kconfig
@@ -1,20 +1,22 @@
config WIRELESS_EXT
- bool
+ bool "Wireless extentions support"
config WEXT_CORE
- def_bool y
+ bool "Wireless extentions core support"
depends on CFG80211_WEXT || WIRELESS_EXT
+ default y
config WEXT_PROC
- def_bool y
+ bool "Wireless extention procedures"
depends on PROC_FS
depends on WEXT_CORE
+ default y
config WEXT_SPY
- bool
+ bool "Wireless spy"
config WEXT_PRIV
- bool
+ bool "Wireless priv"
config CFG80211
tristate "cfg80211 - wireless configuration API"
diff --git a/net/wireless/db.txt b/net/wireless/db.txt
index a2fc3a09..3130d4e5 100644
--- a/net/wireless/db.txt
+++ b/net/wireless/db.txt
@@ -1,17 +1,655 @@
-#
-# This file is a placeholder to prevent accidental build breakage if someone
-# enables CONFIG_CFG80211_INTERNAL_REGDB. Almost no one actually needs to
-# enable that build option.
-#
-# You should be using CRDA instead. It is even better if you use the CRDA
-# package provided by your distribution, since they will probably keep it
-# up-to-date on your behalf.
-#
-# If you _really_ intend to use CONFIG_CFG80211_INTERNAL_REGDB then you will
-# need to replace this file with one containing appropriately formatted
-# regulatory rules that cover the regulatory domains you will be using. Your
-# best option is to extract the db.txt file from the wireless-regdb git
-# repository:
-#
-# git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-regdb.git
-#
+# This is the world regulatory domain
+country 00:
+ (2402 - 2472 @ 40), (3, 20)
+ # Channel 12 - 13. No HT40 channel fits here
+ (2457 - 2482 @ 20), (3, 20), PASSIVE-SCAN, NO-IBSS
+ # Channel 14. Only JP enables this and for 802.11b only
+ (2474 - 2494 @ 20), (3, 20), PASSIVE-SCAN, NO-IBSS, NO-OFDM
+ # Channel 36 - 48
+ (5170 - 5250 @ 40), (3, 20), PASSIVE-SCAN, NO-IBSS
+ # NB: 5260 MHz - 5700 MHz requies DFS
+ # Channel 149 - 165
+ (5735 - 5835 @ 40), (3, 20), PASSIVE-SCAN, NO-IBSS
+
+
+country AE:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country AL:
+ (2402 - 2482 @ 20), (N/A, 20)
+
+country AM:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 18)
+ (5250 - 5330 @ 20), (N/A, 18), DFS
+
+country AN:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country AR:
+ (2402 - 2482 @ 20), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country AT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country AU:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 23)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country AW:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country AZ:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 18)
+ (5250 - 5330 @ 40), (N/A, 18), DFS
+
+country BA:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country BB:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 23)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country BE:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country BG:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 23)
+ (5250 - 5290 @ 40), (N/A, 23), DFS
+ (5490 - 5710 @ 40), (N/A, 30), DFS
+
+country BH:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 20), DFS
+ (5735 - 5835 @ 20), (N/A, 20)
+
+country BL:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 18)
+ (5250 - 5330 @ 40), (N/A, 18), DFS
+
+country BN:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country BO:
+ (2402 - 2482 @ 40), (N/A, 33)
+ (5735 - 5835 @ 40), (N/A, 33)
+
+country BR:
+ (2402 - 2482 @ 20), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 20), DFS
+ (5490 - 5710 @ 20), (3, 20), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country BY:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country BZ:
+ (2402 - 2482 @ 40), (N/A, 30)
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country CA:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country CH:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country CL:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5735 - 5835 @ 40), (N/A, 20)
+
+country CN:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country CO:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 23), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country CR:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 23), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country CS:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country CY:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+# Data from http://www.ctu.eu/164/download/VOR/VOR-12-08-2005-34.pdf
+# and http://www.ctu.eu/164/download/VOR/VOR-12-05-2007-6-AN.pdf
+country CZ:
+ (2400 - 2483.5 @ 40), (N/A, 100 mW)
+ (5150 - 5250 @ 40), (N/A, 200 mW), NO-OUTDOOR
+ (5250 - 5350 @ 40), (N/A, 200 mW), NO-OUTDOOR, DFS
+ (5470 - 5725 @ 40), (N/A, 1000 mW), DFS
+
+# Data from "Frequenznutzungsplan" (as published in April 2008),
+# downloaded from http://www.bundesnetzagentur.de/media/archive/13358.pdf
+# Also applicable is http://www.bundesnetzagentur.de/media/archive/5009.pdf
+# On the 5 GHz ranges TX power can be doubled if TPC is implemented.
+country DE:
+ # entries 279004 and 280006
+ (2400 - 2483.5 @ 40), (N/A, 100 mW)
+ # entries 303005, 304002 and 305002
+ (5150 - 5350 @ 40), (N/A, 100 mW), NO-OUTDOOR, DFS
+ # entries 308002, 309001 and 310003
+ (5470 - 5725 @ 40), (N/A, 500 mW), NO-OUTDOOR, DFS
+
+country DK:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country DO:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country DZ:
+ (2402 - 2482 @ 20), (N/A, 20)
+
+country EC:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 23), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country EE:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country EG:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 20), DFS
+
+country ES:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country FI:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country FR:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country GE:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 18)
+ (5250 - 5330 @ 40), (N/A, 18), DFS
+
+country GB:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country GD:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country GR:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country GL:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 20), DFS
+ (5490 - 5710 @ 20), (N/A, 27), DFS
+
+country GT:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country GU:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 23), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country HN:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country HK:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country HR:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country HT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country HU:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country ID:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country IE:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country IL:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country IN:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 20), DFS
+ (5735 - 5835 @ 20), (N/A, 20)
+
+country IS:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country IR:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country IT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country JM:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country JP:
+ (2402 - 2472 @ 40), (N/A, 20)
+ (2457 - 2482 @ 20), (N/A, 20)
+ (2474 - 2494 @ 20), (N/A, 20), NO-OFDM
+ (4910 - 4930 @ 10), (N/A, 23)
+ (4910 - 4990 @ 40), (N/A, 23)
+ (4930 - 4950 @ 10), (N/A, 23)
+ (5030 - 5045 @ 10), (N/A, 23)
+ (5030 - 5090 @ 40), (N/A, 23)
+ (5050 - 5060 @ 10), (N/A, 23)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 23), DFS
+
+country JO:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 18)
+
+country KH:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country KP:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5330 @ 40), (3, 20)
+ (5160 - 5250 @ 40), (3, 20), DFS
+ (5490 - 5630 @ 40), (3, 30), DFS
+ (5735 - 5815 @ 40), (3, 30)
+
+country KR:
+ (2402 - 2482 @ 20), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 20)
+ (5250 - 5330 @ 20), (3, 20), DFS
+ (5490 - 5630 @ 20), (3, 30), DFS
+ (5735 - 5815 @ 20), (3, 30)
+
+country KW:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+
+country KZ:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country LB:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country LI:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country LK:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 20), DFS
+ (5490 - 5710 @ 20), (3, 20), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country LT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country LU:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country LV:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country MC:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 18)
+ (5250 - 5330 @ 40), (N/A, 18), DFS
+
+country MA:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country MO:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 23)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country MK:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country MT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country MY:
+ (2402 - 2482 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 30), DFS
+ (5735 - 5835 @ 20), (N/A, 30)
+
+country MX:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country NL:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country NO:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country NP:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country NZ:
+ (2402 - 2482 @ 40), (N/A, 30)
+ (5170 - 5250 @ 20), (3, 23)
+ (5250 - 5330 @ 20), (3, 23), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country OM:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country PA:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country PE:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5735 - 5835 @ 20), (N/A, 30)
+
+country PG:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country PH:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country PK:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country PL:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country PT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country PR:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 23), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country QA:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5735 - 5835 @ 40), (N/A, 30)
+
+country RO:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country RU:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country SA:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country SE:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country SG:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5735 - 5835 @ 40), (N/A, 20)
+
+country SI:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country SK:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (N/A, 20)
+ (5250 - 5330 @ 40), (N/A, 20), DFS
+ (5490 - 5710 @ 40), (N/A, 27), DFS
+
+country SV:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 23), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country SY:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country TW:
+ (2402 - 2472 @ 40), (3, 27)
+ (5270 - 5330 @ 40), (3, 17), DFS
+ (5735 - 5815 @ 40), (3, 30)
+
+country TH:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country TT:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country TN:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 20), DFS
+
+country TR:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (N/A, 20)
+ (5250 - 5330 @ 20), (N/A, 20), DFS
+
+country UA:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country US:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5600 @ 40), (3, 20), DFS
+ (5650 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country UY:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country UZ:
+ (2402 - 2472 @ 40), (3, 27)
+ (5170 - 5250 @ 40), (3, 17)
+ (5250 - 5330 @ 40), (3, 20), DFS
+ (5490 - 5710 @ 40), (3, 20), DFS
+ (5735 - 5835 @ 40), (3, 30)
+
+country VE:
+ (2402 - 2482 @ 40), (N/A, 30)
+ (5735 - 5815 @ 20), (N/A, 23)
+
+country VN:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country YE:
+ (2402 - 2482 @ 40), (N/A, 20)
+
+country ZA:
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 20), (3, 20), DFS
+ (5490 - 5710 @ 20), (3, 20), DFS
+ (5735 - 5835 @ 20), (3, 30)
+
+country ZW:
+ (2402 - 2482 @ 40), (N/A, 20)
+
diff --git a/net/wireless/sme.c b/net/wireless/sme.c
index 482c70e7..09d994d1 100644
--- a/net/wireless/sme.c
+++ b/net/wireless/sme.c
@@ -224,7 +224,6 @@ void cfg80211_conn_work(struct work_struct *work)
rtnl_lock();
cfg80211_lock_rdev(rdev);
mutex_lock(&rdev->devlist_mtx);
- mutex_lock(&rdev->sched_scan_mtx);
list_for_each_entry(wdev, &rdev->wdev_list, list) {
wdev_lock(wdev);
@@ -249,7 +248,6 @@ void cfg80211_conn_work(struct work_struct *work)
wdev_unlock(wdev);
}
- mutex_unlock(&rdev->sched_scan_mtx);
mutex_unlock(&rdev->devlist_mtx);
cfg80211_unlock_rdev(rdev);
rtnl_unlock();
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 4de4bc48..b28cc384 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -3016,7 +3016,6 @@ sub process {
$dstat !~ /^'X'$/ && # character constants
$dstat !~ /$exceptions/ &&
$dstat !~ /^\.$Ident\s*=/ && # .foo =
- $dstat !~ /^(?:\#\s*$Ident|\#\s*$Constant)\s*$/ && # stringification #foo
$dstat !~ /^do\s*$Constant\s*while\s*$Constant;?$/ && # do {...} while (...); // do {...} while (...)
$dstat !~ /^for\s*$Constant$/ && # for (...)
$dstat !~ /^for\s*$Constant\s+(?:$Ident|-?$Constant)$/ && # for (...) bar()
diff --git a/security/capability.c b/security/capability.c
index 6783c3e6..57977508 100644
--- a/security/capability.c
+++ b/security/capability.c
@@ -737,11 +737,6 @@ static int cap_tun_dev_open(void *security)
{
return 0;
}
-
-static void cap_skb_owned_by(struct sk_buff *skb, struct sock *sk)
-{
-}
-
#endif /* CONFIG_SECURITY_NETWORK */
#ifdef CONFIG_SECURITY_NETWORK_XFRM
@@ -1076,7 +1071,6 @@ void __init security_fixup_ops(struct security_operations *ops)
set_to_cap_if_null(ops, tun_dev_open);
set_to_cap_if_null(ops, tun_dev_attach_queue);
set_to_cap_if_null(ops, tun_dev_attach);
- set_to_cap_if_null(ops, skb_owned_by);
#endif /* CONFIG_SECURITY_NETWORK */
#ifdef CONFIG_SECURITY_NETWORK_XFRM
set_to_cap_if_null(ops, xfrm_policy_alloc_security);
diff --git a/security/security.c b/security/security.c
index 03f248b8..7b88c6ae 100644
--- a/security/security.c
+++ b/security/security.c
@@ -1290,11 +1290,6 @@ int security_tun_dev_open(void *security)
}
EXPORT_SYMBOL(security_tun_dev_open);
-void security_skb_owned_by(struct sk_buff *skb, struct sock *sk)
-{
- security_ops->skb_owned_by(skb, sk);
-}
-
#endif /* CONFIG_SECURITY_NETWORK */
#ifdef CONFIG_SECURITY_NETWORK_XFRM
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index 7171a957..2fa28c88 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -51,7 +51,6 @@
#include <linux/tty.h>
#include <net/icmp.h>
#include <net/ip.h> /* for local_port_range[] */
-#include <net/sock.h>
#include <net/tcp.h> /* struct or_callable used in sock_rcv_skb */
#include <net/net_namespace.h>
#include <net/netlabel.h>
@@ -4364,11 +4363,6 @@ static void selinux_inet_conn_established(struct sock *sk, struct sk_buff *skb)
selinux_skb_peerlbl_sid(skb, family, &sksec->peer_sid);
}
-static void selinux_skb_owned_by(struct sk_buff *skb, struct sock *sk)
-{
- skb_set_owner_w(skb, sk);
-}
-
static int selinux_secmark_relabel_packet(u32 sid)
{
const struct task_security_struct *__tsec;
@@ -5670,7 +5664,6 @@ static struct security_operations selinux_ops = {
.tun_dev_attach_queue = selinux_tun_dev_attach_queue,
.tun_dev_attach = selinux_tun_dev_attach,
.tun_dev_open = selinux_tun_dev_open,
- .skb_owned_by = selinux_skb_owned_by,
#ifdef CONFIG_SECURITY_NETWORK_XFRM
.xfrm_policy_alloc_security = selinux_xfrm_policy_alloc,
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index eb560fa3..71ae86ca 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -3222,10 +3222,18 @@ EXPORT_SYMBOL_GPL(snd_pcm_lib_default_mmap);
int snd_pcm_lib_mmap_iomem(struct snd_pcm_substream *substream,
struct vm_area_struct *area)
{
- struct snd_pcm_runtime *runtime = substream->runtime;;
+ long size;
+ unsigned long offset;
area->vm_page_prot = pgprot_noncached(area->vm_page_prot);
- return vm_iomap_memory(area, runtime->dma_addr, runtime->dma_bytes);
+ area->vm_flags |= VM_IO;
+ size = area->vm_end - area->vm_start;
+ offset = area->vm_pgoff << PAGE_SHIFT;
+ if (io_remap_pfn_range(area, area->vm_start,
+ (substream->runtime->dma_addr + offset) >> PAGE_SHIFT,
+ size, area->vm_page_prot))
+ return -EAGAIN;
+ return 0;
}
EXPORT_SYMBOL(snd_pcm_lib_mmap_iomem);
diff --git a/sound/soc/codecs/cq93vc.c b/sound/soc/codecs/cq93vc.c
index 23316c88..890d02db 100644
--- a/sound/soc/codecs/cq93vc.c
+++ b/sound/soc/codecs/cq93vc.c
@@ -57,7 +57,7 @@ static inline int cq93vc_write(struct snd_soc_codec *codec, unsigned int reg,
}
static const struct snd_kcontrol_new cq93vc_snd_controls[] = {
- SOC_SINGLE("PGA Capture Volume", DAVINCI_VC_REG05, 0, 0x03, 0),
+ SOC_SINGLE("PGA Capture Volume", DAVINCI_VC_REG05, 0, 0x1f, 0), // was 0x03
SOC_SINGLE("Mono DAC Playback Volume", DAVINCI_VC_REG09, 0, 0x3f, 0),
};
@@ -163,6 +163,18 @@ static int cq93vc_probe(struct snd_soc_codec *codec)
/* Off, with power on */
cq93vc_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+ /* Turn on Automatic Level Control (VC_REG06) */
+ cq93vc_write(codec, DAVINCI_VC_REG06, 1);
+
+ /* Turn on microphone Gain (VC_REG05) */
+ cq93vc_write(codec, DAVINCI_VC_REG05, 0x1f);
+
+ /* Recording Mode Control (VC_REG04) */
+ cq93vc_write(codec, DAVINCI_VC_REG04, 0x0);
+
+
+
+
return 0;
}
diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c
index 34d0201d..b82bbf58 100644
--- a/sound/soc/codecs/wm5102.c
+++ b/sound/soc/codecs/wm5102.c
@@ -584,7 +584,7 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
- struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
+ struct arizona *arizona = dev_get_drvdata(codec->dev);
struct regmap *regmap = codec->control_data;
const struct reg_default *patch = NULL;
int i, patch_size;
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c
index f8a31ad0..134e41c8 100644
--- a/sound/soc/codecs/wm8903.c
+++ b/sound/soc/codecs/wm8903.c
@@ -1083,8 +1083,6 @@ static const struct snd_soc_dapm_route wm8903_intercon[] = {
{ "ROP", NULL, "Right Speaker PGA" },
{ "RON", NULL, "Right Speaker PGA" },
- { "Charge Pump", NULL, "CLK_DSP" },
-
{ "Left Headphone Output PGA", NULL, "Charge Pump" },
{ "Right Headphone Output PGA", NULL, "Charge Pump" },
{ "Left Line Output PGA", NULL, "Charge Pump" },
diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig
index 9e11a14d..455ab63b 100644
--- a/sound/soc/davinci/Kconfig
+++ b/sound/soc/davinci/Kconfig
@@ -44,6 +44,26 @@ config SND_DM365_VOICE_CODEC
Say Y if you want to add support for SoC On-chip voice codec
endchoice
+choice
+ prompt "Voice Codec Sampling Frequency"
+ depends on SND_DM365_VOICE_CODEC
+ default SND_DM365_VOICE_CODEC_16KHZ
+config SND_DM365_VOICE_CODEC_8KHZ
+ bool "Fs=8kHz"
+config SND_DM365_VOICE_CODEC_16KHZ
+ bool "Fs=16kHz"
+
+endchoice
+
+config SND_DM365_SHOWFREQ
+ bool "Show clocks at Linux startup (Debug feature)"
+ depends on SND_DM365_VOICE_CODEC
+ help
+ Select this item if you want to see very useful clock info at Linux startup.
+ This info printout show PLL1 and PLL2 controller configuration. You can see VoiceCodec, ARMcore, HDVICP, DDR clocks etc.
+ It is useful for first startups. If you're tired of looking at this listing then simply unmark this config item.
+
+
config SND_DM6467_SOC_EVM
tristate "SoC Audio support for DaVinci DM6467 EVM"
depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index 484b22c5..fd7c45b9 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -14,6 +14,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/i2c.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index afab81f8..576f12ef 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -17,6 +17,7 @@
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/genalloc.h>
+#include <linux/platform_data/edma.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -236,7 +237,7 @@ static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
print_buf_info(prtd->ram_channel, "i ram_channel");
pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
- if (unlikely(ch_status != DMA_COMPLETE))
+ if (unlikely(ch_status != EDMA_DMA_COMPLETE))
return;
if (snd_pcm_running(substream)) {
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index b6ef7039..fbb710c7 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -14,7 +14,7 @@
#include <linux/genalloc.h>
#include <linux/platform_data/davinci_asp.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
struct davinci_pcm_dma_params {
int channel; /* sync dma channel ID */
diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
index 5be65aae..76ea5868 100644
--- a/sound/soc/davinci/davinci-sffsdr.c
+++ b/sound/soc/davinci/davinci-sffsdr.c
@@ -17,6 +17,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -28,12 +29,14 @@
#include <asm/plat-sffsdr/sffsdr-fpga.h>
#endif
-#include <mach/edma.h>
#include "../codecs/pcm3008.h"
#include "davinci-pcm.h"
#include "davinci-i2s.h"
+#define DAVINCI_DMA_MCBSP_TX 2
+#define DAVINCI_DMA_MCBSP_RX 3
+
/*
* CLKX and CLKR are the inputs for the Sample Rate Generator.
* FSX and FSR are outputs, driven by the sample Rate Generator.
diff --git a/sound/soc/davinci/davinci-vcif.c b/sound/soc/davinci/davinci-vcif.c
index 07bde2e6..fb042089 100644
--- a/sound/soc/davinci/davinci-vcif.c
+++ b/sound/soc/davinci/davinci-vcif.c
@@ -45,6 +45,10 @@
} \
} while (0)
+#define DAVINCI_VC_INT_RERR_MASK \
+ (DAVINCI_VC_INT_RERRUDR_MASK | \
+ DAVINCI_VC_INT_RERROVF_MASK)
+
struct davinci_vcif_dev {
struct davinci_vc *davinci_vc;
struct davinci_pcm_dma_params dma_params[2];
@@ -87,6 +91,22 @@ static void davinci_vcif_stop(struct snd_pcm_substream *substream)
writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
}
+static void davinci_vcif_interrupts(struct snd_pcm_substream *substream,
+ int enable)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct davinci_vcif_dev *davinci_vcif_dev =
+ snd_soc_dai_get_drvdata(rtd->cpu_dai);
+ struct davinci_vc *davinci_vc = davinci_vcif_dev->davinci_vc;
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ writel(DAVINCI_VC_INT_RERR_MASK,
+ davinci_vc->base + DAVINCI_VC_INTCLR);
+ writel(enable ? DAVINCI_VC_INT_RERR_MASK : 0,
+ davinci_vc->base + DAVINCI_VC_INTEN);
+ }
+}
+
static int davinci_vcif_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -104,10 +124,6 @@ static int davinci_vcif_hw_params(struct snd_pcm_substream *substream,
/* General line settings */
writel(DAVINCI_VC_CTRL_MASK, davinci_vc->base + DAVINCI_VC_CTRL);
- writel(DAVINCI_VC_INT_MASK, davinci_vc->base + DAVINCI_VC_INTCLR);
-
- writel(DAVINCI_VC_INT_MASK, davinci_vc->base + DAVINCI_VC_INTEN);
-
w = readl(davinci_vc->base + DAVINCI_VC_CTRL);
/* Determine xfer data type */
@@ -149,6 +165,32 @@ static int davinci_vcif_hw_params(struct snd_pcm_substream *substream,
return 0;
}
+static irqreturn_t davinci_vcif_irq_handler(int irq, void *data)
+{
+ struct davinci_vcif_dev *davinci_vcif_dev = data;
+ struct davinci_vc *davinci_vc = davinci_vcif_dev->davinci_vc;
+ uint32_t w;
+
+ w = readl(davinci_vc->base + DAVINCI_VC_INTSTATUS);
+
+ if (w & DAVINCI_VC_INT_RERR_MASK) {
+ pr_debug("vc overflow or underflow occured, resetting fifo\n");
+
+ w = readl(davinci_vc->base + DAVINCI_VC_CTRL);
+ MOD_REG_BIT(w, DAVINCI_VC_CTRL_RFIFOCL, 1);
+ writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
+
+ w = readl(davinci_vc->base + DAVINCI_VC_CTRL);
+ MOD_REG_BIT(w, DAVINCI_VC_CTRL_RFIFOCL, 0);
+ writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
+
+ writel(DAVINCI_VC_INT_RERR_MASK,
+ davinci_vc->base + DAVINCI_VC_INTCLR);
+ }
+
+ return IRQ_HANDLED;
+}
+
static int davinci_vcif_trigger(struct snd_pcm_substream *substream, int cmd,
struct snd_soc_dai *dai)
{
@@ -159,10 +201,12 @@ static int davinci_vcif_trigger(struct snd_pcm_substream *substream, int cmd,
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
davinci_vcif_start(substream);
+ davinci_vcif_interrupts(substream, 1);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ davinci_vcif_interrupts(substream, 0);
davinci_vcif_stop(substream);
break;
default:
@@ -178,6 +222,7 @@ static int davinci_vcif_startup(struct snd_pcm_substream *substream,
struct davinci_vcif_dev *dev = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_set_dma_data(dai, substream, dev->dma_params);
+
return 0;
}
@@ -234,6 +279,13 @@ static int davinci_vcif_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, davinci_vcif_dev);
+ ret = request_irq(IRQ_MBXINT, davinci_vcif_irq_handler, 0, "vcif",
+ davinci_vcif_dev);
+ if (ret != 0) {
+ dev_err(&pdev->dev, "request_irq failed: %d\n", ret);
+ return ret;
+ }
+
ret = snd_soc_register_dai(&pdev->dev, &davinci_vcif_dai);
if (ret != 0) {
dev_err(&pdev->dev, "could not register dai\n");
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 6bbeb0bf..d7231e33 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -972,7 +972,6 @@ static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
{
struct i2s_dai *i2s;
- int ret;
i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
if (i2s == NULL)
@@ -997,18 +996,16 @@ static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
i2s->i2s_dai_drv.capture.channels_max = 2;
i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
- dev_set_drvdata(&i2s->pdev->dev, i2s);
} else { /* Create a new platform_device for Secondary */
- i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
+ i2s->pdev = platform_device_register_resndata(NULL,
+ "samsung-i2s-sec", -1, NULL, 0, NULL, 0);
if (IS_ERR(i2s->pdev))
return NULL;
-
- platform_set_drvdata(i2s->pdev, i2s);
- ret = platform_device_add(i2s->pdev);
- if (ret < 0)
- return NULL;
}
+ /* Pre-assign snd_soc_dai_set_drvdata */
+ dev_set_drvdata(&i2s->pdev->dev, i2s);
+
return i2s;
}
@@ -1110,10 +1107,6 @@ static int samsung_i2s_probe(struct platform_device *pdev)
if (samsung_dai_type == TYPE_SEC) {
sec_dai = dev_get_drvdata(&pdev->dev);
- if (!sec_dai) {
- dev_err(&pdev->dev, "Unable to get drvdata\n");
- return -EFAULT;
- }
snd_soc_register_dai(&sec_dai->pdev->dev,
&sec_dai->i2s_dai_drv);
asoc_dma_platform_register(&pdev->dev);
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c
index ed0bfb0d..b5b3db71 100644
--- a/sound/soc/soc-compress.c
+++ b/sound/soc/soc-compress.c
@@ -211,27 +211,19 @@ static int soc_compr_set_params(struct snd_compr_stream *cstream,
if (platform->driver->compr_ops && platform->driver->compr_ops->set_params) {
ret = platform->driver->compr_ops->set_params(cstream, params);
if (ret < 0)
- goto err;
+ goto out;
}
if (rtd->dai_link->compr_ops && rtd->dai_link->compr_ops->set_params) {
ret = rtd->dai_link->compr_ops->set_params(cstream);
if (ret < 0)
- goto err;
+ goto out;
}
snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_PLAYBACK,
SND_SOC_DAPM_STREAM_START);
- /* cancel any delayed stream shutdown that is pending */
- rtd->pop_wait = 0;
- mutex_unlock(&rtd->pcm_mutex);
-
- cancel_delayed_work_sync(&rtd->delayed_work);
-
- return ret;
-
-err:
+out:
mutex_unlock(&rtd->pcm_mutex);
return ret;
}
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index ff4b45a5..507d2519 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -2963,7 +2963,7 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
val = val << shift;
ret = snd_soc_update_bits_locked(codec, reg, val_mask, val);
- if (ret < 0)
+ if (ret != 0)
return ret;
if (snd_soc_volsw_is_stereo(mc)) {
diff --git a/sound/soc/tegra/tegra_pcm.c b/sound/soc/tegra/tegra_pcm.c
index 5e2c55c5..c925ab0a 100644
--- a/sound/soc/tegra/tegra_pcm.c
+++ b/sound/soc/tegra/tegra_pcm.c
@@ -43,6 +43,8 @@
static const struct snd_pcm_hardware tegra_pcm_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_INTERLEAVED,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.channels_min = 2,
@@ -125,6 +127,26 @@ static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
return 0;
}
+static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ return snd_dmaengine_pcm_trigger(substream,
+ SNDRV_PCM_TRIGGER_START);
+
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ return snd_dmaengine_pcm_trigger(substream,
+ SNDRV_PCM_TRIGGER_STOP);
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
struct vm_area_struct *vma)
{
@@ -142,7 +164,7 @@ static struct snd_pcm_ops tegra_pcm_ops = {
.ioctl = snd_pcm_lib_ioctl,
.hw_params = tegra_pcm_hw_params,
.hw_free = tegra_pcm_hw_free,
- .trigger = snd_dmaengine_pcm_trigger,
+ .trigger = tegra_pcm_trigger,
.pointer = snd_dmaengine_pcm_pointer,
.mmap = tegra_pcm_mmap,
};
diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c
index ebe91440..497d2741 100644
--- a/sound/usb/mixer_quirks.c
+++ b/sound/usb/mixer_quirks.c
@@ -509,7 +509,7 @@ static int snd_nativeinstruments_control_get(struct snd_kcontrol *kcontrol,
else
ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), bRequest,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
- 0, wIndex,
+ 0, cpu_to_le16(wIndex),
&tmp, sizeof(tmp), 1000);
up_read(&mixer->chip->shutdown_rwsem);
@@ -540,7 +540,7 @@ static int snd_nativeinstruments_control_put(struct snd_kcontrol *kcontrol,
else
ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), bRequest,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
- wValue, wIndex,
+ cpu_to_le16(wValue), cpu_to_le16(wIndex),
NULL, 0, 1000);
up_read(&mixer->chip->shutdown_rwsem);
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index 9c5ab223..5325a386 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -486,7 +486,7 @@ static int snd_usb_nativeinstruments_boot_quirk(struct usb_device *dev)
{
int ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
0xaf, USB_TYPE_VENDOR | USB_RECIP_DEVICE,
- 1, 0, NULL, 0, 1000);
+ cpu_to_le16(1), 0, NULL, 0, 1000);
if (ret < 0)
return ret;
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 321e066a..6f3214ed 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -1421,7 +1421,6 @@ int has_nehalem_turbo_ratio_limit(unsigned int family, unsigned int model)
case 0x3C: /* HSW */
case 0x3F: /* HSW */
case 0x45: /* HSW */
- case 0x46: /* HSW */
return 1;
case 0x2E: /* Nehalem-EX Xeon - Beckton */
case 0x2F: /* Westmere-EX Xeon - Eagleton */
@@ -1516,7 +1515,6 @@ void rapl_probe(unsigned int family, unsigned int model)
case 0x3C: /* HSW */
case 0x3F: /* HSW */
case 0x45: /* HSW */
- case 0x46: /* HSW */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_GFX;
break;
case 0x2D:
@@ -1756,7 +1754,6 @@ int is_snb(unsigned int family, unsigned int model)
case 0x3C: /* HSW */
case 0x3F: /* HSW */
case 0x45: /* HSW */
- case 0x46: /* HSW */
return 1;
}
return 0;
@@ -2279,7 +2276,7 @@ int main(int argc, char **argv)
cmdline(argc, argv);
if (verbose)
- fprintf(stderr, "turbostat v3.3 March 15, 2013"
+ fprintf(stderr, "turbostat v3.2 February 11, 2013"
" - Len Brown <lenb@kernel.org>\n");
turbostat_init();
View Git Blame Copy Permalink