mirror of https://github.com/OpenIPC/firmware.git
80 lines
2.8 KiB
Diff
80 lines
2.8 KiB
Diff
--- linux-4.9.37/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300
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+++ linux-4.9.y/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300
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@@ -0,0 +1,76 @@
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+/*
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+ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved.
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+ */
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+
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+#ifndef __DTS_GK7205V300_CLOCK_H
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+#define __DTS_GK7205V300_CLOCK_H
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+
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+/* clk in GK7205V300 CRG */
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+/* fixed rate clocks */
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+#define GK7205V300_FIXED_100K 1
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+#define GK7205V300_FIXED_400K 2
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+#define GK7205V300_FIXED_3M 3
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+#define GK7205V300_FIXED_6M 4
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+#define GK7205V300_FIXED_12M 5
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+#define GK7205V300_FIXED_24M 6
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+#define GK7205V300_FIXED_25M 7
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+#define GK7205V300_FIXED_50M 8
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+#define GK7205V300_FIXED_83P3M 9
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+#define GK7205V300_FIXED_90M 10
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+#define GK7205V300_FIXED_100M 11
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+#define GK7205V300_FIXED_112M 12
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+#define GK7205V300_FIXED_125M 13
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+#define GK7205V300_FIXED_148P5M 14
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+#define GK7205V300_FIXED_150M 15
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+#define GK7205V300_FIXED_200M 16
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+#define GK7205V300_FIXED_250M 17
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+#define GK7205V300_FIXED_300M 18
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+#define GK7205V300_FIXED_324M 19
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+#define GK7205V300_FIXED_342M 20
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+#define GK7205V300_FIXED_375M 21
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+#define GK7205V300_FIXED_400M 22
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+#define GK7205V300_FIXED_448M 23
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+#define GK7205V300_FIXED_500M 24
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+#define GK7205V300_FIXED_540M 25
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+#define GK7205V300_FIXED_600M 26
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+#define GK7205V300_FIXED_750M 27
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+#define GK7205V300_FIXED_1000M 28
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+#define GK7205V300_FIXED_1500M 29
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+
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+/* mux clocks */
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+#define GK7205V300_SYSAXI_CLK 30
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+#define GK7205V300_SYSAPB_CLK 31
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+#define GK7205V300_FMC_MUX 32
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+#define GK7205V300_UART_MUX 33
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+#define GK7205V300_MMC0_MUX 34
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+#define GK7205V300_MMC1_MUX 35
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+#define GK7205V300_MMC2_MUX 36
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+#define GK7205V300_ETH_MUX 37
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+#define GK7205V300_USB2_MUX 80
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+/* gate clocks */
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+#define GK7205V300_UART0_CLK 40
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+#define GK7205V300_UART1_CLK 41
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+#define GK7205V300_UART2_CLK 42
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+#define GK7205V300_FMC_CLK 43
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+#define GK7205V300_ETH0_CLK 44
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+#define GK7205V300_EDMAC_AXICLK 45
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+#define GK7205V300_EDMAC_CLK 46
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+#define GK7205V300_SPI0_CLK 48
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+#define GK7205V300_SPI1_CLK 49
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+#define GK7205V300_MMC0_CLK 50
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+#define GK7205V300_MMC1_CLK 51
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+#define GK7205V300_MMC2_CLK 52
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+#define GK7205V300_I2C0_CLK 53
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+#define GK7205V300_I2C1_CLK 54
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+#define GK7205V300_I2C2_CLK 55
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+#define GK7205V300_USB2_BUS_CLK 81
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+#define GK7205V300_USB2_REF_CLK 82
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+#define GK7205V300_USB2_UTMI_CLK 83
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+#define GK7205V300_USB2_PHY_APB_CLK 84
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+#define GK7205V300_USB2_PHY_PLL_CLK 85
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+#define GK7205V300_USB2_PHY_XO_CLK 86
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+
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+#define GK7205V300_NR_CLKS 256
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+#define GK7205V300_NR_RSTS 256
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+
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+#endif /* __DTS_GK7205V300_CLOCK_H */
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