mirror of https://github.com/OpenIPC/firmware.git
56 lines
1.5 KiB
Diff
56 lines
1.5 KiB
Diff
--- linux-4.9.37/arch/arm/mach-goke/mach-gk7202v300.c 1970-01-01 03:00:00.000000000 +0300
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+++ linux-4.9.y/arch/arm/mach-goke/mach-gk7202v300.c 2021-06-07 13:01:32.000000000 +0300
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@@ -0,0 +1,52 @@
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+/*
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+ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved.
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+ */
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+
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+#include <linux/of_address.h>
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+#include <asm/smp_scu.h>
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+
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+#include "mach-common.h"
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+
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+#ifdef CONFIG_SMP
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+
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+#define REG_CPU_SRST_CRG 0x78
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+#define CPU1_SRST_REQ BIT(2)
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+#define DBG1_SRST_REQ BIT(4)
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+
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+void bsp_set_cpu(unsigned int cpu, bool enable)
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+{
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+ struct device_node *np = NULL;
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+ unsigned int regval;
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+ void __iomem *crg_base;
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+
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+ np = of_find_compatible_node(NULL, NULL, "goke,gk7202v300-clock");
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+ if (!np) {
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+ pr_err("failed to find goke clock node\n");
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+ return;
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+ }
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+
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+ crg_base = of_iomap(np, 0);
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+ if (!crg_base) {
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+ pr_err("failed to map address\n");
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+ return;
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+ }
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+
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+ if (enable) {
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+ /* clear the slave cpu reset */
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+ regval = readl(crg_base + REG_CPU_SRST_CRG);
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+ regval &= ~CPU1_SRST_REQ;
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+ writel(regval, (crg_base + REG_CPU_SRST_CRG));
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+ } else {
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+ regval = readl(crg_base + REG_CPU_SRST_CRG);
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+ regval |= (DBG1_SRST_REQ | CPU1_SRST_REQ);
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+ writel(regval, (crg_base + REG_CPU_SRST_CRG));
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+ }
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+}
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+
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+static const struct smp_operations bsp_smp_ops __initconst = {
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+ .smp_prepare_cpus = bsp_smp_prepare_cpus,
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+ .smp_boot_secondary = bsp_boot_secondary,
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+};
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+
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+CPU_METHOD_OF_DECLARE(gk7202v300_smp, "goke,gk7202v300-smp", &bsp_smp_ops);
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+#endif /* CONFIG_SMP */
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