mirror of https://github.com/OpenIPC/firmware.git
88 lines
3.4 KiB
Diff
88 lines
3.4 KiB
Diff
diff -drupN a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
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--- a/include/linux/arm-smccc.h 2018-08-06 17:23:04.000000000 +0300
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+++ b/include/linux/arm-smccc.h 2022-06-12 05:28:14.000000000 +0300
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@@ -160,6 +160,7 @@ asmlinkage void __arm_smccc_hvc(unsigned
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#define SMCCC_SMC_INST "smc #0"
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#define SMCCC_HVC_INST "hvc #0"
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+#define SMCCC_REG(n) asm("x" # n)
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#elif defined(CONFIG_ARM)
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#include <asm/opcodes-sec.h>
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@@ -167,6 +168,7 @@ asmlinkage void __arm_smccc_hvc(unsigned
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#define SMCCC_SMC_INST __SMC(0)
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#define SMCCC_HVC_INST __HVC(0)
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+#define SMCCC_REG(n) asm("r" # n)
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#endif
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@@ -199,47 +201,47 @@ asmlinkage void __arm_smccc_hvc(unsigned
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#define __declare_arg_0(a0, res) \
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struct arm_smccc_res *___res = res; \
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- register u32 r0 asm("r0") = a0; \
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- register unsigned long r1 asm("r1"); \
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- register unsigned long r2 asm("r2"); \
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- register unsigned long r3 asm("r3")
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+ register u32 r0 SMCCC_REG(0) = a0; \
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+ register unsigned long r1 SMCCC_REG(1); \
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+ register unsigned long r2 SMCCC_REG(2); \
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+ register unsigned long r3 SMCCC_REG(3)
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#define __declare_arg_1(a0, a1, res) \
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struct arm_smccc_res *___res = res; \
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- register u32 r0 asm("r0") = a0; \
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- register typeof(a1) r1 asm("r1") = a1; \
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- register unsigned long r2 asm("r2"); \
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- register unsigned long r3 asm("r3")
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+ register u32 r0 SMCCC_REG(0) = a0; \
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+ register typeof(a1) r1 SMCCC_REG(1) = a1; \
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+ register unsigned long r2 SMCCC_REG(2); \
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+ register unsigned long r3 SMCCC_REG(3)
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#define __declare_arg_2(a0, a1, a2, res) \
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struct arm_smccc_res *___res = res; \
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- register u32 r0 asm("r0") = a0; \
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- register typeof(a1) r1 asm("r1") = a1; \
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- register typeof(a2) r2 asm("r2") = a2; \
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- register unsigned long r3 asm("r3")
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+ register u32 r0 SMCCC_REG(0) = a0; \
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+ register typeof(a1) r1 SMCCC_REG(1) = a1; \
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+ register typeof(a2) r2 SMCCC_REG(2) = a2; \
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+ register unsigned long r3 SMCCC_REG(3)
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#define __declare_arg_3(a0, a1, a2, a3, res) \
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struct arm_smccc_res *___res = res; \
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- register u32 r0 asm("r0") = a0; \
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- register typeof(a1) r1 asm("r1") = a1; \
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- register typeof(a2) r2 asm("r2") = a2; \
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- register typeof(a3) r3 asm("r3") = a3
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+ register u32 r0 SMCCC_REG(0) = a0; \
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+ register typeof(a1) r1 SMCCC_REG(1) = a1; \
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+ register typeof(a2) r2 SMCCC_REG(2) = a2; \
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+ register typeof(a3) r3 SMCCC_REG(3) = a3
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#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
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__declare_arg_3(a0, a1, a2, a3, res); \
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- register typeof(a4) r4 asm("r4") = a4
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+ register typeof(a4) r4 SMCCC_REG(4) = a4
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#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
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__declare_arg_4(a0, a1, a2, a3, a4, res); \
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- register typeof(a5) r5 asm("r5") = a5
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+ register typeof(a5) r5 SMCCC_REG(5) = a5
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#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
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__declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
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- register typeof(a6) r6 asm("r6") = a6
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+ register typeof(a6) r6 SMCCC_REG(6) = a6
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#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
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__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
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- register typeof(a7) r7 asm("r7") = a7
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+ register typeof(a7) r7 SMCCC_REG(7) = a7
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#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
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#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)
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