firmware/br-ext-chip-allwinner/board/v83x/kernel/patches/00000-drivers_devfreq_Kconf...

111 lines
3.8 KiB
Diff

diff -drupN a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
--- a/drivers/devfreq/Kconfig 2018-08-06 17:23:04.000000000 +0300
+++ b/drivers/devfreq/Kconfig 2022-06-12 05:28:14.000000000 +0300
@@ -72,6 +72,25 @@ config DEVFREQ_GOV_PASSIVE
through sysfs entries. The passive governor recommends that
devfreq device uses the OPP table to get the frequency/voltage.
+config DEVFREQ_GOV_ADAPTIVE
+ depends on ARCH_SUN50I || ARCH_SUN8IW10 || ARCH_SUN8IW11
+ tristate "Adaptive"
+ help
+ Sets the frequency according to dram master access or idle.
+
+config DEVFREQ_GOV_TEMPTRIGGER
+ depends on SUN50IW1P1_THERMAL
+ tristate "Temptrigger"
+ help
+ Sets the frequency according to temperature control.
+
+config DEVFREQ_GOV_DSM
+ depends on EVB_PLATFORM
+ depends on ARCH_SUN9IW1P1 || ARCH_SUN8IW5P1 || ARCH_SUN8IW6P1 || ARCH_SUN8IW8P1 || ARCH_SUN8IW9P1
+ bool "Dsm"
+ help
+ Sets the frequency according to dram scene management(DSM).
+
comment "DEVFREQ Drivers"
config ARM_EXYNOS_BUS_DEVFREQ
@@ -112,6 +131,80 @@ config ARM_RK3399_DMC_DEVFREQ
It sets the frequency for the memory controller and reads the usage counts
from hardware.
+config ARM_SUNXI_DRAM_DEVFREQ
+ bool "ARM Sunxi Dram DEVFREQ Driver"
+ select ARCH_HAS_OPP
+ select PM_OPP
+ depends on ARCH_SUN50I || ARCH_SUN8IW10 || ARCH_SUN8IW11
+ select DEVFREQ_GOV_ADAPTIVE
+ help
+ DRAM Frequency scaling allows you to change the clock speed of
+ DRAM on the fly. This is a nice method to save power, because
+ the lower the DRAM clock speed, the less power the DRAM consumes.
+
+ If in doubt, say N.
+
+config SUNXI_DRAM_SIMPLIFIED_DEVFREQ
+ bool "Sunxi Dram DEVFREQ Simplified Driver"
+ select ARCH_HAS_OPP
+ select PM_OPP
+ depends on !ARM_SUNXI_DRAM_DEVFREQ
+ help
+ This is a new devfreq driver for sunxi soc. The difference from the original
+ sunxi driver is that it removes some unnecessary function operations and
+ old-style APIs, and no longer pays attention to the master's access and idle
+ state interrupt. It aims to be used with strategies such as ondemand. According
+ to the access of the dram master, the software adjusts the frequency as needs.
+
+ If in doubt, say N.
+
+config DEVFREQ_DRAM_FREQ_CFS_SW
+ bool "Change dram frequency in CFS mode, need extra software operation"
+ depends on DEVFREQ_DRAM_FREQ
+ depends on ARCH_SUN8IW6P1
+ help
+ This will need extra software operation after changing dram frequency in CFS mode.
+
+ If in doubt, say N.
+
+config DEVFREQ_DRAM_FREQ_IN_VSYNC
+ bool "Change dram frequency in display vsync"
+ depends on ARM_SUNXI_DRAM_DEVFREQ
+ depends on ARCH_SUN50I || ARCH_SUN8IW10 || ARCH_SUN8IW11
+ depends on !EINK_PANEL_USED
+ help
+ This will allow dram frequency changed in display vsync.
+
+ If in doubt, say N.
+
+config DEVFREQ_DRAM_FREQ
+ bool "DRAM Frequency scaling"
+ depends on DEVFREQ_GOV_USERSPACE || DEVFREQ_GOV_VANS || DEVFREQ_GOV_DSM
+ depends on ARCH_SUN8IW6 || ARCH_SUN8IW5
+ help
+ DRAM Frequency scaling allows you to change the clock speed of
+ DRAM on the fly. This is a nice method to save power, because
+ the lower the DRAM clock speed, the less power the DRAM consumes.
+
+ If in doubt, say N.
+
+config DEVFREQ_DRAM_FREQ_BUSFREQ
+ bool "Change bus frequency with dram frequency changed when low-power music playing"
+ depends on ARM_SUNXI_DRAM_DEVFREQ || DEVFREQ_DRAM_FREQ
+ depends on ARCH_SUN50I || ARCH_SUN8IW6 || ARCH_SUN8IW5P1
+ help
+ This will allow bus frequency changed when low-power music playing.
+
+ If in doubt, say N.
+
+config DEVFREQ_DRAM_FREQ_WITH_SOFT_NOTIFY
+ bool "Use dram master notify access or idle in software"
+ depends on ARM_SUNXI_DRAM_DEVFREQ
+ depends on ARCH_SUN50I
+ help
+ This will allow dram master notify access or idle instead of hardware interrupt.
+
+ If in doubt, say N.
source "drivers/devfreq/event/Kconfig"
endif # PM_DEVFREQ