mirror of https://github.com/OpenIPC/firmware.git
79 lines
2.5 KiB
Diff
79 lines
2.5 KiB
Diff
diff -drupN a/drivers/cpufreq/sunxi-iks-cpufreq.h b/drivers/cpufreq/sunxi-iks-cpufreq.h
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--- a/drivers/cpufreq/sunxi-iks-cpufreq.h 1970-01-01 03:00:00.000000000 +0300
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+++ b/drivers/cpufreq/sunxi-iks-cpufreq.h 2022-06-12 05:28:14.000000000 +0300
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@@ -0,0 +1,74 @@
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+/*
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+ * linux/drivers/cpufreq/sunxi-iks-cpufreq.h
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+ *
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+ * Copyright(c) 2013-2015 Allwinnertech Co., Ltd.
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+ * http://www.allwinnertech.com
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+ *
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+ * Author: sunny <sunny@allwinnertech.com>
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+ *
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+ * allwinner sunxi iks cpufreq driver header file.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ */
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+
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+#ifndef CPUFREQ_SUNXI_IKS_H
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+#define CPUFREQ_SUNXI_IKS_H
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+
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+#include <linux/cpufreq.h>
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+#include <linux/device.h>
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+#include <linux/types.h>
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+
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+#define CPUFREQ_DBG(format, args...) \
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+ pr_debug("[cpu_freq] DBG: "format, ##args)
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+#define CPUFREQ_ERR(format, args...) \
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+ pr_err("[cpu_freq] ERR: "format, ##args)
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+
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+/* sun9i platform support two clusters,
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+ * cluster0 : cortex-a7,
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+ * cluster1 : cortex-a15.
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+ */
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+#define A7_CLUSTER 0
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+#define A15_CLUSTER 1
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+#define MAX_CLUSTERS 2
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+
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+
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+#ifdef CONFIG_ARCH_SUN9IW1P1
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+#define SUNXI_CPUFREQ_C0_CPUVDD "axp22_dcdc3"
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+#define SUNXI_CPUFREQ_C1_CPUVDD "axp15_dcdc1"
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+#elif defined(CONFIG_ARCH_SUN8IW6P1) || defined(CONFIG_ARCH_SUN8IW9P1) || defined(CONFIG_ARCH_SUN8IW17P1)
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+#define SUNXI_CPUFREQ_C0_CPUVDD "vdd-cpua"
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+#define SUNXI_CPUFREQ_C1_CPUVDD "vdd-cpub"
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+#endif
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+
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+/* the actual and virtual freq convert */
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+#define ACTUAL_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq << 1 : freq)
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+#define VIRT_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq >> 1 : freq)
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+
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+/* the threshold freq of cpu big little switch */
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+#define SUNXI_BL_SWITCH_THRESHOLD (600000)
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+
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+/* config the transition latency, based on ns */
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+#define SUNXI_FREQTRANS_LATENCY (2000000)
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+
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+#ifdef CONFIG_BL_SWITCHER
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+extern bool bL_switching_enabled;
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+#define is_bL_switching_enabled() bL_switching_enabled
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+#define set_switching_enabled(x) (bL_switching_enabled = (x))
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+#else
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+#define is_bL_switching_enabled() false
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+#define set_switching_enabled(x) do { } while (0)
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+#endif
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+
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+static inline int cpu_to_cluster(int cpu)
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+{
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+#ifdef CONFIG_SMP
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+ return is_bL_switching_enabled() ? MAX_CLUSTERS : topology_physical_package_id(cpu);
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+#else
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+ return 0;
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+#endif
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+}
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+
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+#endif /* CPUFREQ_SUNXI_IKS_H */
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