mirror of https://github.com/OpenIPC/firmware.git
183 lines
6.4 KiB
Diff
183 lines
6.4 KiB
Diff
diff -drupN a/drivers/clk/sunxi/clk-simple-gates.c b/drivers/clk/sunxi/clk-simple-gates.c
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--- a/drivers/clk/sunxi/clk-simple-gates.c 2018-08-06 17:23:04.000000000 +0300
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+++ b/drivers/clk/sunxi/clk-simple-gates.c 1970-01-01 03:00:00.000000000 +0300
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@@ -1,178 +0,0 @@
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-/*
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- * Copyright 2015 Maxime Ripard
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- *
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- * Maxime Ripard <maxime.ripard@free-electrons.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
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- */
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-
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-#include <linux/clk.h>
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-#include <linux/clk-provider.h>
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-#include <linux/of.h>
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-#include <linux/of_address.h>
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-#include <linux/slab.h>
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-#include <linux/spinlock.h>
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-
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-static DEFINE_SPINLOCK(gates_lock);
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-
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-static void __init sunxi_simple_gates_setup(struct device_node *node,
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- const int protected[],
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- int nprotected)
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-{
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- struct clk_onecell_data *clk_data;
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- const char *clk_parent, *clk_name;
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- struct property *prop;
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- struct resource res;
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- void __iomem *clk_reg;
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- void __iomem *reg;
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- const __be32 *p;
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- int number, i = 0, j;
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- u8 clk_bit;
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- u32 index;
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-
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- reg = of_io_request_and_map(node, 0, of_node_full_name(node));
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- if (IS_ERR(reg))
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- return;
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-
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- clk_parent = of_clk_get_parent_name(node, 0);
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-
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- clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
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- if (!clk_data)
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- goto err_unmap;
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-
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- number = of_property_count_u32_elems(node, "clock-indices");
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- of_property_read_u32_index(node, "clock-indices", number - 1, &number);
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-
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- clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
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- if (!clk_data->clks)
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- goto err_free_data;
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-
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- of_property_for_each_u32(node, "clock-indices", prop, p, index) {
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- of_property_read_string_index(node, "clock-output-names",
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- i, &clk_name);
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-
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- clk_reg = reg + 4 * (index / 32);
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- clk_bit = index % 32;
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-
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- clk_data->clks[index] = clk_register_gate(NULL, clk_name,
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- clk_parent, 0,
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- clk_reg,
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- clk_bit,
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- 0, &gates_lock);
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- i++;
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-
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- if (IS_ERR(clk_data->clks[index])) {
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- WARN_ON(true);
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- continue;
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- }
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-
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- for (j = 0; j < nprotected; j++)
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- if (protected[j] == index)
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- clk_prepare_enable(clk_data->clks[index]);
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-
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- }
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-
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- clk_data->clk_num = number + 1;
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- of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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-
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- return;
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-
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-err_free_data:
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- kfree(clk_data);
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-err_unmap:
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- iounmap(reg);
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- of_address_to_resource(node, 0, &res);
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- release_mem_region(res.start, resource_size(&res));
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-}
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-
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-static void __init sunxi_simple_gates_init(struct device_node *node)
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-{
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- sunxi_simple_gates_setup(node, NULL, 0);
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-}
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-
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-CLK_OF_DECLARE(sun4i_a10_gates, "allwinner,sun4i-a10-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun4i_a10_apb1, "allwinner,sun4i-a10-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun4i_a10_axi, "allwinner,sun4i-a10-axi-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun5i_a10s_apb0, "allwinner,sun5i-a10s-apb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun5i_a10s_apb1, "allwinner,sun5i-a10s-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun5i_a13_apb1, "allwinner,sun5i-a13-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun6i_a31_apb1, "allwinner,sun6i-a31-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun6i_a31_apb2, "allwinner,sun6i-a31-apb2-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun7i_a20_apb0, "allwinner,sun7i-a20-apb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun7i_a20_apb1, "allwinner,sun7i-a20-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun8i_a23_ahb1, "allwinner,sun8i-a23-ahb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun8i_a23_apb1, "allwinner,sun8i-a23-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun8i_a23_apb2, "allwinner,sun8i-a23-apb2-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun8i_a33_ahb1, "allwinner,sun8i-a33-ahb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun9i_a80_ahb1, "allwinner,sun9i-a80-ahb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun9i_a80_ahb2, "allwinner,sun9i-a80-ahb2-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-gates-clk",
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- sunxi_simple_gates_init);
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-CLK_OF_DECLARE(sun9i_a80_apbs, "allwinner,sun9i-a80-apbs-gates-clk",
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- sunxi_simple_gates_init);
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-
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-static const int sun4i_a10_ahb_critical_clocks[] __initconst = {
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- 14, /* ahb_sdram */
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-};
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-
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-static void __init sun4i_a10_ahb_init(struct device_node *node)
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-{
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- sunxi_simple_gates_setup(node, sun4i_a10_ahb_critical_clocks,
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- ARRAY_SIZE(sun4i_a10_ahb_critical_clocks));
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-}
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-CLK_OF_DECLARE(sun4i_a10_ahb, "allwinner,sun4i-a10-ahb-gates-clk",
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- sun4i_a10_ahb_init);
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-CLK_OF_DECLARE(sun5i_a10s_ahb, "allwinner,sun5i-a10s-ahb-gates-clk",
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- sun4i_a10_ahb_init);
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-CLK_OF_DECLARE(sun5i_a13_ahb, "allwinner,sun5i-a13-ahb-gates-clk",
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- sun4i_a10_ahb_init);
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-CLK_OF_DECLARE(sun7i_a20_ahb, "allwinner,sun7i-a20-ahb-gates-clk",
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- sun4i_a10_ahb_init);
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-
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-static const int sun4i_a10_dram_critical_clocks[] __initconst = {
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- 15, /* dram_output */
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-};
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-
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-static void __init sun4i_a10_dram_init(struct device_node *node)
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-{
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- sunxi_simple_gates_setup(node, sun4i_a10_dram_critical_clocks,
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- ARRAY_SIZE(sun4i_a10_dram_critical_clocks));
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-}
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-CLK_OF_DECLARE(sun4i_a10_dram, "allwinner,sun4i-a10-dram-gates-clk",
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- sun4i_a10_dram_init);
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