mirror of https://github.com/OpenIPC/firmware.git
164 lines
5.2 KiB
Diff
164 lines
5.2 KiB
Diff
diff -drupN a/drivers/char/sunxi-sysinfo/sunxi-smc.c b/drivers/char/sunxi-sysinfo/sunxi-smc.c
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--- a/drivers/char/sunxi-sysinfo/sunxi-smc.c 1970-01-01 03:00:00.000000000 +0300
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+++ b/drivers/char/sunxi-sysinfo/sunxi-smc.c 2022-06-12 05:28:14.000000000 +0300
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@@ -0,0 +1,159 @@
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+/*
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+ * Based on arch/arm64/kernel/chipid-sunxi.c
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+ *
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+ * Copyright (C) 2015 Allwinnertech Ltd.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+#include <linux/io.h>
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+#include <linux/kernel.h>
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+#include <linux/sunxi-smc.h>
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+#include <linux/sunxi-sid.h>
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+#include <linux/arm-smccc.h>
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+#include <linux/bitops.h>
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+
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+#ifndef OPTEE_SMC_STD_CALL_VAL
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+#define OPTEE_SMC_STD_CALL_VAL(func_num) \
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+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_32, \
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+ ARM_SMCCC_OWNER_TRUSTED_OS, (func_num))
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+#endif
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+
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+#ifndef OPTEE_SMC_FAST_CALL_VAL
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+#define OPTEE_SMC_FAST_CALL_VAL(func_num) \
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+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, \
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+ ARM_SMCCC_OWNER_TRUSTED_OS, (func_num))
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+#endif
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+/*
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+ * Function specified by SMC Calling convention.
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+ */
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+#define OPTEE_SMC_FUNCID_READ_REG 17
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+#define OPTEE_SMC_READ_REG \
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+ OPTEE_SMC_FAST_CALL_VAL(OPTEE_SMC_FUNCID_READ_REG)
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+
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+
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+#define OPTEE_SMC_FUNCID_WRITE_REG 18
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+#define OPTEE_SMC_WRITE_REG \
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+ OPTEE_SMC_FAST_CALL_VAL(OPTEE_SMC_FUNCID_WRITE_REG)
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+
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+#define OPTEE_SMC_FUNCID_COPY_ARISC_PARAS 19
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+#define OPTEE_SMC_COPY_ARISC_PARAS \
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+ OPTEE_SMC_FAST_CALL_VAL(OPTEE_SMC_FUNCID_COPY_ARISC_PARAS)
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+#define ARM_SVC_COPY_ARISC_PARAS OPTEE_SMC_COPY_ARISC_PARAS
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+
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+#define OPTEE_SMC_FUNCID_GET_TEEADDR_PARAS 20
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+#define OPTEE_SMC_GET_TEEADDR_PARAS \
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+ OPTEE_SMC_FAST_CALL_VAL(OPTEE_SMC_FUNCID_GET_TEEADDR_PARAS)
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+#define ARM_SVC_GET_TEEADDR_PARAS OPTEE_SMC_GET_TEEADDR_PARAS
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+
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+#ifdef CONFIG_ARM64
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+/*cmd to call ATF service*/
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+#define ARM_SVC_EFUSE_PROBE_SECURE_ENABLE (0xc000fe03)
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+#define ARM_SVC_READ_SEC_REG (0xC000ff05)
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+#define ARM_SVC_WRITE_SEC_REG (0xC000ff06)
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+#else
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+/*cmd to call TEE service*/
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+#define ARM_SVC_READ_SEC_REG OPTEE_SMC_READ_REG
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+#define ARM_SVC_WRITE_SEC_REG OPTEE_SMC_WRITE_REG
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+#endif
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+
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+/*interface for smc */
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+u32 sunxi_smc_readl(phys_addr_t addr)
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+{
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+#if defined(CONFIG_ARM64)
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+ return invoke_smc_fn(ARM_SVC_READ_SEC_REG, addr, 0, 0);
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+#elif defined(CONFIG_TEE)
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+ struct arm_smccc_res res;
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+ arm_smccc_smc(ARM_SVC_READ_SEC_REG, addr, 0, 0, 0, 0, 0, 0, &res);
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+ return res.a0;
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+#else
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+ void __iomem *vaddr = ioremap(addr, 4);
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+ u32 ret;
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+ ret = readl(vaddr);
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+ iounmap(vaddr);
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+ return ret;
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+#endif
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+}
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+EXPORT_SYMBOL_GPL(sunxi_smc_readl);
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+
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+int sunxi_smc_writel(u32 value, phys_addr_t addr)
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+{
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+#if defined(CONFIG_ARM64)
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+ return invoke_smc_fn(ARM_SVC_WRITE_SEC_REG, addr, value, 0);
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+#elif defined(CONFIG_TEE)
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+ struct arm_smccc_res res;
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+ arm_smccc_smc(ARM_SVC_WRITE_SEC_REG, addr, value, 0, 0, 0, 0, 0, &res);
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+ return res.a0;
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+#else
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+ void __iomem *vaddr = ioremap(addr, 4);
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+ writel(value, vaddr);
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+ iounmap(vaddr);
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+ return 0;
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+#endif
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+}
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+EXPORT_SYMBOL_GPL(sunxi_smc_writel);
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+
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+int sunxi_smc_copy_arisc_paras(phys_addr_t dest, phys_addr_t src, u32 len)
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+{
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+ struct arm_smccc_res res;
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+ arm_smccc_smc(ARM_SVC_COPY_ARISC_PARAS, dest, src, len, 0, 0, 0, 0, &res);
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+ return res.a0;
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+}
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+
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+phys_addr_t sunxi_smc_get_teeaddr_paras(phys_addr_t resumeaddr)
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+{
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+ struct arm_smccc_res res;
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+
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+ arm_smccc_smc(ARM_SVC_GET_TEEADDR_PARAS,
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+ resumeaddr, 0, 0, 0, 0, 0, 0, &res);
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+ return res.a0;
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+}
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+/*optee smc*/
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+#define ARM_SMCCC_SMC_32 0
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+#define ARM_SMCCC_SMC_64 1
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+#define ARM_SMCCC_CALL_CONV_SHIFT 30
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+
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+#define ARM_SMCCC_OWNER_MASK 0x3F
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+#define ARM_SMCCC_OWNER_SHIFT 24
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+
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+#define ARM_SMCCC_FUNC_MASK 0xFFFF
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+#define ARM_SMCCC_OWNER_TRUSTED_OS 50
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+
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+#define ARM_SMCCC_IS_FAST_CALL(smc_val) \
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+ ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
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+#define ARM_SMCCC_IS_64(smc_val) \
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+ ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
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+#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
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+#define ARM_SMCCC_OWNER_NUM(smc_val) \
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+ (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
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+
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+#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
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+ (((type) << ARM_SMCCC_TYPE_SHIFT) | \
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+ ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
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+ (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
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+ ((func_num) & ARM_SMCCC_FUNC_MASK))
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+
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+#define OPTEE_SMC_FAST_CALL_VAL(func_num) \
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+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, \
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+ ARM_SMCCC_OWNER_TRUSTED_OS, (func_num))
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+
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+#define OPTEE_SMC_FUNCID_CRYPT 16
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+#define OPTEE_SMC_CRYPT \
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+ OPTEE_SMC_FAST_CALL_VAL(OPTEE_SMC_FUNCID_CRYPT)
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+
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+#define TEESMC_RSSK_DECRYPT 5
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+int sunxi_smc_refresh_hdcp(void)
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+{
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+ return invoke_smc_fn(OPTEE_SMC_CRYPT, TEESMC_RSSK_DECRYPT, 0, 0);
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+}
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+EXPORT_SYMBOL(sunxi_smc_refresh_hdcp);
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+
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