mirror of https://github.com/OpenIPC/firmware.git
102 lines
2.7 KiB
Diff
102 lines
2.7 KiB
Diff
diff -drupN a/arch/arm/mach-sunxi/hotplug.c b/arch/arm/mach-sunxi/hotplug.c
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--- a/arch/arm/mach-sunxi/hotplug.c 1970-01-01 03:00:00.000000000 +0300
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+++ b/arch/arm/mach-sunxi/hotplug.c 2022-06-12 05:28:14.000000000 +0300
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@@ -0,0 +1,97 @@
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+/*
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+ * Sunxi platform smp source file.
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+ * It contains platform specific fucntions needed for the linux smp kernel.
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+ *
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+ * Copyright (c) Allwinner. All rights reserved.
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+ * Sugar (shuge@allwinnertech.com)
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/delay.h>
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+#include <asm/cacheflush.h>
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+#include <asm/io.h>
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+
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+#include "platsmp.h"
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+
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+static cpumask_t dead_cpus;
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+
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+int sunxi_cpu_kill(unsigned int cpu)
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+{
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+ int k, tmp_cpu = get_cpu();
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+
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+ put_cpu();
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+ pr_debug("%s: cpu%d try to kill cpu%d\n", __func__, tmp_cpu, cpu);
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+
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+ for (k = 0; k < 1000; k++) {
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+ if (cpumask_test_cpu(cpu, &dead_cpus)) {
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+ if (sunxi_is_wfi_mode(cpu)) {
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+ sunxi_disable_cpu(cpu);
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+ pr_debug("%s: cpu%d is killed!\n",
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+ __func__, cpu);
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+#ifdef CONFIG_ARM_SUNXI_CPUIDLE
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+ sunxi_idle_cpux_flag_valid(cpu, 1);
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+#endif
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+ return 1;
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+ }
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+ }
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+
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+ mdelay(1);
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+ }
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+
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+ pr_err("%s: try to kill cpu%d failed!\n", __func__, cpu);
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+ return 0;
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+}
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+
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+int sunxi_cpu_disable(unsigned int cpu)
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+{
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+ cpumask_clear_cpu(cpu, &dead_cpus);
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+ return cpu == 0 ? -EPERM : 0;
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+}
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+
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+void sunxi_cpu_die(unsigned int cpu)
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+{
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+ unsigned long actlr;
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+
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+ cpumask_set_cpu(cpu, &dead_cpus);
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+
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+#ifdef CONFIG_ARM_SUNXI_CPUIDLE
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+ sunxi_idle_cpux_flag_set(cpu, 1);
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+#endif
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+
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+ /* step1: disable the data cache */
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+ asm("mrc p15, 0, %0, c1, c0, 0" : "=r" (actlr));
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+ actlr &= ~(1<<2);
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+ asm volatile("mcr p15, 0, %0, c1, c0, 0\n" : : "r" (actlr));
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+
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+ /* step2: clean and ivalidate L1 cache */
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+ flush_cache_all();
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+
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+ /* step3: execute a CLREX instruction */
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+ asm("clrex" : : : "memory", "cc");
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+
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+ /* step4: switch cpu from SMP mode to AMP mode,
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+ * aim is to disable cache coherency
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+ */
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+ asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
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+ actlr &= ~(1<<6);
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+ asm volatile("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr));
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+
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+ /* step5: execute an ISB instruction */
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+ isb();
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+
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+ /* step6: execute a DSB instruction */
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+ dsb();
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+
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+ /* step7: execute a WFI instruction */
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+ while (1)
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+ asm("wfi" : : : "memory", "cc");
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+}
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