mirror of https://github.com/OpenIPC/firmware.git
103 lines
2.9 KiB
Diff
103 lines
2.9 KiB
Diff
diff -drupN a/drivers/clk/sunxi/clk-sun4i-pll3.c b/drivers/clk/sunxi/clk-sun4i-pll3.c
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--- a/drivers/clk/sunxi/clk-sun4i-pll3.c 2018-08-06 17:23:04.000000000 +0300
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+++ b/drivers/clk/sunxi/clk-sun4i-pll3.c 1970-01-01 03:00:00.000000000 +0300
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@@ -1,98 +0,0 @@
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-/*
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- * Copyright 2015 Maxime Ripard
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- *
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- * Maxime Ripard <maxime.ripard@free-electrons.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
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- */
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-
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-#include <linux/clk-provider.h>
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-#include <linux/of.h>
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-#include <linux/of_address.h>
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-#include <linux/slab.h>
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-#include <linux/spinlock.h>
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-
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-#define SUN4I_A10_PLL3_GATE_BIT 31
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-#define SUN4I_A10_PLL3_DIV_WIDTH 7
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-#define SUN4I_A10_PLL3_DIV_SHIFT 0
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-
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-static DEFINE_SPINLOCK(sun4i_a10_pll3_lock);
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-
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-static void __init sun4i_a10_pll3_setup(struct device_node *node)
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-{
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- const char *clk_name = node->name, *parent;
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- struct clk_multiplier *mult;
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- struct clk_gate *gate;
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- struct resource res;
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- void __iomem *reg;
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- struct clk *clk;
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- int ret;
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-
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- of_property_read_string(node, "clock-output-names", &clk_name);
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- parent = of_clk_get_parent_name(node, 0);
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-
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- reg = of_io_request_and_map(node, 0, of_node_full_name(node));
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- if (IS_ERR(reg)) {
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- pr_err("%s: Could not map the clock registers\n", clk_name);
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- return;
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- }
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-
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- gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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- if (!gate)
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- goto err_unmap;
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-
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- gate->reg = reg;
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- gate->bit_idx = SUN4I_A10_PLL3_GATE_BIT;
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- gate->lock = &sun4i_a10_pll3_lock;
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-
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- mult = kzalloc(sizeof(*mult), GFP_KERNEL);
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- if (!mult)
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- goto err_free_gate;
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-
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- mult->reg = reg;
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- mult->shift = SUN4I_A10_PLL3_DIV_SHIFT;
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- mult->width = SUN4I_A10_PLL3_DIV_WIDTH;
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- mult->lock = &sun4i_a10_pll3_lock;
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-
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- clk = clk_register_composite(NULL, clk_name,
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- &parent, 1,
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- NULL, NULL,
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- &mult->hw, &clk_multiplier_ops,
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- &gate->hw, &clk_gate_ops,
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- 0);
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- if (IS_ERR(clk)) {
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- pr_err("%s: Couldn't register the clock\n", clk_name);
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- goto err_free_mult;
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- }
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-
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- ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
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- if (ret) {
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- pr_err("%s: Couldn't register DT provider\n",
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- clk_name);
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- goto err_clk_unregister;
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- }
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-
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- return;
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-
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-err_clk_unregister:
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- clk_unregister_composite(clk);
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-err_free_mult:
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- kfree(mult);
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-err_free_gate:
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- kfree(gate);
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-err_unmap:
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- iounmap(reg);
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- of_address_to_resource(node, 0, &res);
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- release_mem_region(res.start, resource_size(&res));
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-}
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-
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-CLK_OF_DECLARE(sun4i_a10_pll3, "allwinner,sun4i-a10-pll3-clk",
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- sun4i_a10_pll3_setup);
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