mirror of https://github.com/OpenIPC/firmware.git
974 lines
27 KiB
Diff
974 lines
27 KiB
Diff
diff -drupN a/include/linux/mfd/axp2101.h b/include/linux/mfd/axp2101.h
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--- a/include/linux/mfd/axp2101.h 1970-01-01 03:00:00.000000000 +0300
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+++ b/include/linux/mfd/axp2101.h 2022-06-12 05:28:14.000000000 +0300
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@@ -0,0 +1,969 @@
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+/*
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+ * Functions and registers to access AXP20X power management chip.
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+ *
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+ * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#ifndef __LINUX_MFD_AXP20X_H
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+#define __LINUX_MFD_AXP20X_H
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+
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+#include <linux/regmap.h>
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+
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+enum {
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+ AXP152_ID = 0,
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+ AXP202_ID,
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+ AXP209_ID,
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+ AXP221_ID,
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+ AXP223_ID,
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+ AXP288_ID,
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+ AXP806_ID,
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+ AXP809_ID,
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+ AXP2101_ID,
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+ AXP15_ID,
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+ AXP1530_ID,
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+ AXP2202_ID,
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+ NR_AXP20X_VARIANTS,
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+};
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+
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+#define AXP20X_DATACACHE(m) (0x04 + (m))
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+
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+/* Power supply */
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+#define AXP152_PWR_OP_MODE 0x01
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+#define AXP152_LDO3456_DC1234_CTRL 0x12
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+#define AXP152_ALDO_OP_MODE 0x13
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+#define AXP152_LDO0_CTRL 0x15
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+#define AXP152_DCDC2_V_OUT 0x23
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+#define AXP152_DCDC2_V_SCAL 0x25
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+#define AXP152_DCDC1_V_OUT 0x26
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+#define AXP152_DCDC3_V_OUT 0x27
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+#define AXP152_ALDO12_V_OUT 0x28
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+#define AXP152_DLDO1_V_OUT 0x29
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+#define AXP152_DLDO2_V_OUT 0x2a
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+#define AXP152_DCDC4_V_OUT 0x2b
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+#define AXP152_V_OFF 0x31
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+#define AXP152_OFF_CTRL 0x32
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+#define AXP152_PEK_KEY 0x36
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+#define AXP152_DCDC_FREQ 0x37
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+#define AXP152_DCDC_MODE 0x80
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+
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+#define AXP20X_PWR_INPUT_STATUS 0x00
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+#define AXP20X_PWR_OP_MODE 0x01
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+#define AXP20X_USB_OTG_STATUS 0x02
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+#define AXP20X_PWR_OUT_CTRL 0x12
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+#define AXP20X_DCDC2_V_OUT 0x23
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+#define AXP20X_DCDC2_LDO3_V_SCAL 0x25
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+#define AXP20X_DCDC3_V_OUT 0x27
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+#define AXP20X_LDO24_V_OUT 0x28
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+#define AXP20X_LDO3_V_OUT 0x29
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+#define AXP20X_VBUS_IPSOUT_MGMT 0x30
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+#define AXP20X_V_OFF 0x31
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+#define AXP20X_OFF_CTRL 0x32
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+#define AXP20X_CHRG_CTRL1 0x33
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+#define AXP20X_CHRG_CTRL2 0x34
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+#define AXP20X_CHRG_BAK_CTRL 0x35
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+#define AXP20X_PEK_KEY 0x36
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+#define AXP20X_DCDC_FREQ 0x37
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+#define AXP20X_V_LTF_CHRG 0x38
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+#define AXP20X_V_HTF_CHRG 0x39
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+#define AXP20X_APS_WARN_L1 0x3a
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+#define AXP20X_APS_WARN_L2 0x3b
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+#define AXP20X_V_LTF_DISCHRG 0x3c
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+#define AXP20X_V_HTF_DISCHRG 0x3d
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+
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+#define AXP22X_PWR_OUT_CTRL1 0x10
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+#define AXP22X_PWR_OUT_CTRL2 0x12
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+#define AXP22X_PWR_OUT_CTRL3 0x13
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+#define AXP22X_DLDO1_V_OUT 0x15
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+#define AXP22X_DLDO2_V_OUT 0x16
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+#define AXP22X_DLDO3_V_OUT 0x17
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+#define AXP22X_DLDO4_V_OUT 0x18
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+#define AXP22X_ELDO1_V_OUT 0x19
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+#define AXP22X_ELDO2_V_OUT 0x1a
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+#define AXP22X_ELDO3_V_OUT 0x1b
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+#define AXP22X_DC5LDO_V_OUT 0x1c
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+#define AXP22X_DCDC1_V_OUT 0x21
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+#define AXP22X_DCDC2_V_OUT 0x22
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+#define AXP22X_DCDC3_V_OUT 0x23
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+#define AXP22X_DCDC4_V_OUT 0x24
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+#define AXP22X_DCDC5_V_OUT 0x25
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+#define AXP22X_DCDC23_V_RAMP_CTRL 0x27
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+#define AXP22X_ALDO1_V_OUT 0x28
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+#define AXP22X_ALDO2_V_OUT 0x29
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+#define AXP22X_ALDO3_V_OUT 0x2a
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+#define AXP22X_CHRG_CTRL3 0x35
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+
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+#define AXP806_STARTUP_SRC 0x00
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+#define AXP806_CHIP_ID 0x03
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+#define AXP806_PWR_OUT_CTRL1 0x10
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+#define AXP806_PWR_OUT_CTRL2 0x11
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+#define AXP806_DCDCA_V_CTRL 0x12
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+#define AXP806_DCDCB_V_CTRL 0x13
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+#define AXP806_DCDCC_V_CTRL 0x14
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+#define AXP806_DCDCD_V_CTRL 0x15
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+#define AXP806_DCDCE_V_CTRL 0x16
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+#define AXP806_ALDO1_V_CTRL 0x17
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+#define AXP806_ALDO2_V_CTRL 0x18
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+#define AXP806_ALDO3_V_CTRL 0x19
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+#define AXP806_DCDC_MODE_CTRL1 0x1a
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+#define AXP806_DCDC_MODE_CTRL2 0x1b
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+#define AXP806_DCDC_FREQ_CTRL 0x1c
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+#define AXP806_BLDO1_V_CTRL 0x20
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+#define AXP806_BLDO2_V_CTRL 0x21
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+#define AXP806_BLDO3_V_CTRL 0x22
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+#define AXP806_BLDO4_V_CTRL 0x23
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+#define AXP806_CLDO1_V_CTRL 0x24
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+#define AXP806_CLDO2_V_CTRL 0x25
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+#define AXP806_CLDO3_V_CTRL 0x26
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+#define AXP806_VREF_TEMP_WARN_L 0xf3
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+
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+/* Interrupt */
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+#define AXP152_IRQ1_EN 0x40
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+#define AXP152_IRQ2_EN 0x41
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+#define AXP152_IRQ3_EN 0x42
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+#define AXP152_IRQ1_STATE 0x48
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+#define AXP152_IRQ2_STATE 0x49
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+#define AXP152_IRQ3_STATE 0x4a
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+
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+#define AXP20X_IRQ1_EN 0x40
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+#define AXP20X_IRQ2_EN 0x41
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+#define AXP20X_IRQ3_EN 0x42
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+#define AXP20X_IRQ4_EN 0x43
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+#define AXP20X_IRQ5_EN 0x44
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+#define AXP20X_IRQ6_EN 0x45
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+#define AXP20X_IRQ1_STATE 0x48
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+#define AXP20X_IRQ2_STATE 0x49
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+#define AXP20X_IRQ3_STATE 0x4a
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+#define AXP20X_IRQ4_STATE 0x4b
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+#define AXP20X_IRQ5_STATE 0x4c
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+#define AXP20X_IRQ6_STATE 0x4d
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+
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+/* ADC */
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+#define AXP20X_ACIN_V_ADC_H 0x56
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+#define AXP20X_ACIN_V_ADC_L 0x57
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+#define AXP20X_ACIN_I_ADC_H 0x58
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+#define AXP20X_ACIN_I_ADC_L 0x59
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+#define AXP20X_VBUS_V_ADC_H 0x5a
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+#define AXP20X_VBUS_V_ADC_L 0x5b
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+#define AXP20X_VBUS_I_ADC_H 0x5c
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+#define AXP20X_VBUS_I_ADC_L 0x5d
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+#define AXP20X_TEMP_ADC_H 0x5e
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+#define AXP20X_TEMP_ADC_L 0x5f
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+#define AXP20X_TS_IN_H 0x62
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+#define AXP20X_TS_IN_L 0x63
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+#define AXP20X_GPIO0_V_ADC_H 0x64
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+#define AXP20X_GPIO0_V_ADC_L 0x65
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+#define AXP20X_GPIO1_V_ADC_H 0x66
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+#define AXP20X_GPIO1_V_ADC_L 0x67
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+#define AXP20X_PWR_BATT_H 0x70
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+#define AXP20X_PWR_BATT_M 0x71
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+#define AXP20X_PWR_BATT_L 0x72
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+#define AXP20X_BATT_V_H 0x78
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+#define AXP20X_BATT_V_L 0x79
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+#define AXP20X_BATT_CHRG_I_H 0x7a
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+#define AXP20X_BATT_CHRG_I_L 0x7b
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+#define AXP20X_BATT_DISCHRG_I_H 0x7c
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+#define AXP20X_BATT_DISCHRG_I_L 0x7d
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+#define AXP20X_IPSOUT_V_HIGH_H 0x7e
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+#define AXP20X_IPSOUT_V_HIGH_L 0x7f
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+
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+/* Power supply */
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+#define AXP20X_DCDC_MODE 0x80
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+#define AXP20X_ADC_EN1 0x82
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+#define AXP20X_ADC_EN2 0x83
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+#define AXP20X_ADC_RATE 0x84
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+#define AXP20X_GPIO10_IN_RANGE 0x85
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+#define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
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+#define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
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+#define AXP20X_TIMER_CTRL 0x8a
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+#define AXP20X_VBUS_MON 0x8b
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+#define AXP20X_OVER_TMP 0x8f
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+
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+#define AXP22X_PWREN_CTRL1 0x8c
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+#define AXP22X_PWREN_CTRL2 0x8d
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+
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+/* GPIO */
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+#define AXP152_GPIO0_CTRL 0x90
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+#define AXP152_GPIO1_CTRL 0x91
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+#define AXP152_GPIO2_CTRL 0x92
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+#define AXP152_GPIO3_CTRL 0x93
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+#define AXP152_LDOGPIO2_V_OUT 0x96
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+#define AXP152_GPIO_INPUT 0x97
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+#define AXP152_PWM0_FREQ_X 0x98
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+#define AXP152_PWM0_FREQ_Y 0x99
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+#define AXP152_PWM0_DUTY_CYCLE 0x9a
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+#define AXP152_PWM1_FREQ_X 0x9b
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+#define AXP152_PWM1_FREQ_Y 0x9c
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+#define AXP152_PWM1_DUTY_CYCLE 0x9d
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+
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+#define AXP20X_GPIO0_CTRL 0x90
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+#define AXP20X_LDO5_V_OUT 0x91
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+#define AXP20X_GPIO1_CTRL 0x92
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+#define AXP20X_GPIO2_CTRL 0x93
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+#define AXP20X_GPIO20_SS 0x94
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+#define AXP20X_GPIO3_CTRL 0x95
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+
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+#define AXP22X_LDO_IO0_V_OUT 0x91
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+#define AXP22X_LDO_IO1_V_OUT 0x93
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+#define AXP22X_GPIO_STATE 0x94
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+#define AXP22X_GPIO_PULL_DOWN 0x95
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+
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+/* Battery */
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+#define AXP20X_CHRG_CC_31_24 0xb0
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+#define AXP20X_CHRG_CC_23_16 0xb1
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+#define AXP20X_CHRG_CC_15_8 0xb2
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+#define AXP20X_CHRG_CC_7_0 0xb3
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+#define AXP20X_DISCHRG_CC_31_24 0xb4
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+#define AXP20X_DISCHRG_CC_23_16 0xb5
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+#define AXP20X_DISCHRG_CC_15_8 0xb6
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+#define AXP20X_DISCHRG_CC_7_0 0xb7
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+#define AXP20X_CC_CTRL 0xb8
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+#define AXP20X_FG_RES 0xb9
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+
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+/* OCV */
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+#define AXP20X_RDC_H 0xba
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+#define AXP20X_RDC_L 0xbb
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+#define AXP20X_OCV(m) (0xc0 + (m))
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+#define AXP20X_OCV_MAX 0xf
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+
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+/* AXP22X specific registers */
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+#define AXP22X_BATLOW_THRES1 0xe6
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+
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+/* AXP288 specific registers */
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+#define AXP288_PMIC_ADC_H 0x56
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+#define AXP288_PMIC_ADC_L 0x57
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+#define AXP288_ADC_TS_PIN_CTRL 0x84
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+#define AXP288_PMIC_ADC_EN 0x84
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+
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+/* Fuel Gauge */
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+#define AXP288_FG_RDC1_REG 0xba
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+#define AXP288_FG_RDC0_REG 0xbb
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+#define AXP288_FG_OCVH_REG 0xbc
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+#define AXP288_FG_OCVL_REG 0xbd
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+#define AXP288_FG_OCV_CURVE_REG 0xc0
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+#define AXP288_FG_DES_CAP1_REG 0xe0
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+#define AXP288_FG_DES_CAP0_REG 0xe1
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+#define AXP288_FG_CC_MTR1_REG 0xe2
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+#define AXP288_FG_CC_MTR0_REG 0xe3
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+#define AXP288_FG_OCV_CAP_REG 0xe4
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+#define AXP288_FG_CC_CAP_REG 0xe5
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+#define AXP288_FG_LOW_CAP_REG 0xe6
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+#define AXP288_FG_TUNE0 0xe8
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+#define AXP288_FG_TUNE1 0xe9
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+#define AXP288_FG_TUNE2 0xea
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+#define AXP288_FG_TUNE3 0xeb
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+#define AXP288_FG_TUNE4 0xec
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+#define AXP288_FG_TUNE5 0xed
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+
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+#define AXP2101_COMM_STAT0 (0x00)
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+#define AXP2101_COMM_STAT1 (0x01)
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+#define AXP2101_CHIP_ID (0x03)
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+#define AXP2101_DATA_BUFFER0 (0x04)
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+#define AXP2101_DATA_BUFFER1 (0x05)
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+#define AXP2101_DATA_BUFFER2 (0x06)
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+#define AXP2101_DATA_BUFFER3 (0x07)
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+#define AXP2101_COMM_FAULT (0x08)
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+#define AXP2101_COMM_CFG (0X10)
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+#define AXP2101_BATFET_CTRL (0X12)
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+#define AXP2101_DIE_TEMP_CFG (0X13)
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+#define AXP2101_VSYS_MIN (0x14)
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+#define AXP2101_VINDPM_CFG (0x15)
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+#define AXP2101_IIN_LIM (0x16)
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+#define AXP2101_RESET_CFG (0x17)
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+#define AXP2101_MODULE_EN (0x18)
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+#define AXP2101_WATCHDOG_CFG (0x19)
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+#define AXP2101_GAUGE_THLD (0x1A)
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+#define AXP2101_GPIO12_CTRL (0x1B)
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+#define AXP2101_GPIO34_CTRL (0x1C)
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+#define AXP2101_BUS_MODE_SEL (0x1D)
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+#define AXP2101_PWRON_STAT (0x20)
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+#define AXP2101_PWROFF_STAT (0x21)
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+#define AXP2101_PWROFF_EN (0x22)
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+#define AXP2101_DCDC_PWROFF_EN (0x23)
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+#define AXP2101_VOFF_THLD (0x24)
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+#define AXP2101_PWR_TIME_CTRL (0x25)
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+#define AXP2101_SLEEP_CFG (0x26)
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+#define AXP2101_PONLEVEL (0x27)
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+#define AXP2101_FAST_PWRON_CFG0 (0x28)
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+#define AXP2101_FAST_PWRON_CFG1 (0x29)
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+#define AXP2101_FAST_PWRON_CFG2 (0x2A)
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+#define AXP2101_FAST_PWRON_CFG3 (0x2B)
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+#define AXP2101_ADC_CH_EN0 (0x30)
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+#define AXP2101_ADC_CH_EN1 (0x31)
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+#define AXP2101_ADC_CH_EN2 (0x32)
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+#define AXP2101_ADC_CH_EN3 (0x33)
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+#define AXP2101_VBAT_H (0x34)
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+#define AXP2101_VBAT_L (0x35)
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+#define AXP2101_TS_H (0x36)
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+#define AXP2101_TS_L (0x37)
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+#define AXP2101_VBUS_H (0x38)
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+#define AXP2101_VBUS_L (0x39)
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+#define AXP2101_VSYS_H (0x3A)
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+#define AXP2101_VSYS_L (0x3B)
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+#define AXP2101_TDIE_H (0x3C)
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+#define AXP2101_TDIE_L (0x3D)
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+#define AXP2101_GPADC_H (0x3E)
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+#define AXP2101_GPADC_L (0x3F)
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+#define AXP2101_INTEN1 (0x40)
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+#define AXP2101_INTEN2 (0x41)
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+#define AXP2101_INTEN3 (0x42)
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+#define AXP2101_INTSTS1 (0x48)
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+#define AXP2101_INTSTS2 (0x49)
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+#define AXP2101_INTSTS3 (0x4A)
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+#define AXP2101_TS_CFG (0x50)
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+
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+#define AXP2101_TS_HYSHL2H (0x52)
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+#define AXP2101_TS_HYSH21 (0x53)
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+#define AXP2101_VLTF_CHG (0x54)
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+#define AXP2101_VHTF_CHG (0x55)
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+#define AXP2101_VLTF_WORK (0x56)
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+#define AXP2101_VHTF_WORK (0x57)
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+#define AXP2101_JEITA_CFG (0x58)
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+#define AXP2101_JEITA_CV_CFG (0x59)
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+#define AXP2101_JEITA_COOL (0x5A)
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+#define AXP2101_JEITA_WARM (0x5B)
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+#define AXP2101_TS_CFG_DATA_H (0x5C)
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+#define AXP2101_TS_CFG_DATA_L (0x5D)
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+#define AXP2101_CHG_CFG (0x60)
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+#define AXP2101_IPRECHG_CFG (0x61)
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+#define AXP2101_ICC_CFG (0x62)
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+#define AXP2101_ITERM_CFG (0x63)
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+#define AXP2101_CHG_V_CFG (0x64)
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+#define AXP2101_TREGU_THLD (0x65)
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+#define AXP2101_CHG_FREQ (0x66)
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+#define AXP2101_CHG_TMR_CFG (0x67)
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+#define AXP2101_BAT_DET (0x68)
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+#define AXP2101_CHGLED_CFG (0x69)
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+#define AXP2101_BTN_CHG_CFG (0x6A)
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+#define AXP2101_SW_TEST_CFG (0x7B)
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+#define AXP2101_DCDC_CFG0 (0x80)
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+#define AXP2101_DCDC_CFG1 (0x81)
|
|
+#define AXP2101_DCDC1_CFG (0x82)
|
|
+#define AXP2101_DCDC2_CFG (0x83)
|
|
+#define AXP2101_DCDC3_CFG (0x84)
|
|
+#define AXP2101_DCDC4_CFG (0x85)
|
|
+#define AXP2101_DCDC5_CFG (0x86)
|
|
+#define AXP2101_DCDC_OC_CFG (0x87)
|
|
+#define AXP2101_LDO_EN_CFG0 (0x90)
|
|
+#define AXP2101_LDO_EN_CFG1 (0x91)
|
|
+#define AXP2101_ALDO1_CFG (0x92)
|
|
+#define AXP2101_ALDO2_CFG (0x93)
|
|
+#define AXP2101_ALDO3_CFG (0x94)
|
|
+#define AXP2101_ALDO4_CFG (0x95)
|
|
+#define AXP2101_BLDO1_CFG (0x96)
|
|
+#define AXP2101_BLDO2_CFG (0x97)
|
|
+#define AXP2101_CPUSLD_CFG (0x98)
|
|
+#define AXP2101_DLDO1_CFG (0x99)
|
|
+#define AXP2101_DLDO2_CFG (0x9A)
|
|
+#define AXP2101_IP_VER (0xA0)
|
|
+#define AXP2101_BROM (0xA1)
|
|
+#define AXP2101_CONFIG (0xA2)
|
|
+#define AXP2101_TEMPERATURE (0xA3)
|
|
+#define AXP2101_SOC (0xA4)
|
|
+#define AXP2101_TIME2EMPTY_H (0xA6)
|
|
+#define AXP2101_TIME2EMPTY_L (0xA7)
|
|
+#define AXP2101_TIME2FULL_H (0xA8)
|
|
+#define AXP2101_TIME2FULL_L (0xA9)
|
|
+#define AXP2101_FW_VERSION (0xAB)
|
|
+#define AXP2101_INT0_FLAG (0xAC)
|
|
+#define AXP2101_COUTER_PERIOD (0xAD)
|
|
+#define AXP2101_BG_TRIM (0xAE)
|
|
+#define AXP2101_OSC_TRIM (0xAF)
|
|
+#define AXP2101_FG_ADDR (0xB0)
|
|
+#define AXP2101_FG_DATA_H (0xB2)
|
|
+#define AXP2101_FG_DATA_L (0xB3)
|
|
+#define AXP2101_RAM_MBIST (0xB4)
|
|
+#define AXP2101_ROM_TEST (0xB5)
|
|
+#define AXP2101_ROM_TEST_RT0 (0xB6)
|
|
+#define AXP2101_ROM_TEST_RT1 (0xB7)
|
|
+#define AXP2101_ROM_TEST_RT2 (0xB8)
|
|
+#define AXP2101_ROM_TEST_RT3 (0xB9)
|
|
+#define AXP2101_WD_CLR_DIS (0xBA)
|
|
+
|
|
+#define AXP2101_BUFFERC (0xff)
|
|
+#define AXP2101_COMM_CFG0 (0x100)
|
|
+
|
|
+/* For AXP15 */
|
|
+#define AXP15_STATUS (0x00)
|
|
+#define AXP15_MODE_CHGSTATUS (0x01)
|
|
+#define AXP15_OTG_STATUS (0x02)
|
|
+#define AXP15_IC_TYPE (0x03)
|
|
+#define AXP15_DATA_BUFFER1 (0x04)
|
|
+#define AXP15_DATA_BUFFER2 (0x05)
|
|
+#define AXP15_DATA_BUFFER3 (0x06)
|
|
+#define AXP15_DATA_BUFFER4 (0x07)
|
|
+#define AXP15_DATA_BUFFER5 (0x08)
|
|
+#define AXP15_DATA_BUFFER6 (0x09)
|
|
+#define AXP15_DATA_BUFFER7 (0x0A)
|
|
+#define AXP15_DATA_BUFFER8 (0x0B)
|
|
+#define AXP15_DATA_BUFFER9 (0x0C)
|
|
+#define AXP15_DATA_BUFFERA (0x0D)
|
|
+#define AXP15_DATA_BUFFERB (0x0E)
|
|
+#define AXP15_DATA_BUFFERC (0x0F)
|
|
+#define AXP15_LDO3456_DC1234_CTL (0x12)
|
|
+#define AXP15_LDO0OUT_VOL (0x15)
|
|
+#define AXP15_DC2OUT_VOL (0x23)
|
|
+#define AXP15_DCDC2_DVM_CTRL (0x25)
|
|
+#define AXP15_DC1OUT_VOL (0x26)
|
|
+#define AXP15_DC3OUT_VOL (0x27)
|
|
+#define AXP15_LDO34OUT_VOL (0x28)
|
|
+#define AXP15_LDO5OUT_VOL (0x29)
|
|
+#define AXP15_LDO6OUT_VOL (0x2A)
|
|
+#define AXP15_DC4OUT_VOL (0x2B)
|
|
+#define AXP15_IPS_SET (0x30)
|
|
+#define AXP15_VOFF_SET (0x31)
|
|
+#define AXP15_OFF_CTL (0x32)
|
|
+#define AXP15_CHARGE1 (0x33)
|
|
+#define AXP15_CHARGE2 (0x34)
|
|
+#define AXP15_BACKUP_CHG (0x35)
|
|
+#define AXP15_POK_SET (0x36)
|
|
+#define AXP15_DCDC_FREQSET (0x37)
|
|
+#define AXP15_VLTF_CHGSET (0x38)
|
|
+#define AXP15_VHTF_CHGSET (0x39)
|
|
+#define AXP15_APS_WARNING1 (0x3A)
|
|
+#define AXP15_APS_WARNING2 (0x3B)
|
|
+#define AXP15_TLTF_DISCHGSET (0x3C)
|
|
+#define AXP15_THTF_DISCHGSET (0x3D)
|
|
+#define AXP15_INTEN1 (0x40)
|
|
+#define AXP15_INTEN2 (0x41)
|
|
+#define AXP15_INTEN3 (0x42)
|
|
+#define AXP15_INTSTS1 (0x48)
|
|
+#define AXP15_INTSTS2 (0x49)
|
|
+#define AXP15_INTSTS3 (0x4A)
|
|
+#define AXP15_DCDC_MODESET (0x80)
|
|
+#define AXP15_ADC_EN1 (0x82)
|
|
+#define AXP15_ADC_EN2 (0x83)
|
|
+#define AXP15_ADC_SPEED (0x84)
|
|
+#define AXP15_ADC_INPUTRANGE (0x85)
|
|
+#define AXP15_ADC_IRQ_RETFSET (0x86)
|
|
+#define AXP15_ADC_IRQ_FETFSET (0x87)
|
|
+#define AXP15_TIMER_CTL (0x8A)
|
|
+#define AXP15_VBUS_DET_SRP (0x8B)
|
|
+#define AXP15_HOTOVER_CTL (0x8F)
|
|
+#define AXP15_GPIO0_CTL (0x90)
|
|
+#define AXP15_GPIO1_CTL (0x91)
|
|
+#define AXP15_GPIO2_CTL (0x92)
|
|
+#define AXP15_GPIO3_CTL (0x93)
|
|
+#define AXP15_GPIO012_SIGNAL (0x94)
|
|
+#define AXP15_GPIO0_VOL (0x96)
|
|
+#define AXP15_GPIO0123_SIGNAL (0x97)
|
|
+
|
|
+/* For AXP1530 */
|
|
+#define AXP1530_ON_INDICATE (0x00)
|
|
+#define AXP1530_OFF_INDICATE (0x01)
|
|
+#define AXP1530_IC_TYPE (0x03)
|
|
+#define AXP1530_OUTPUT_CONTROL (0x10)
|
|
+#define AXP1530_DCDC_DVM_PWM (0x12)
|
|
+#define AXP1530_DCDC1_CONRTOL (0x13)
|
|
+#define AXP1530_DCDC2_CONRTOL (0x14)
|
|
+#define AXP1530_DCDC3_CONRTOL (0x15)
|
|
+#define AXP1530_ALDO1_CONRTOL (0x16)
|
|
+#define AXP1530_DLDO1_CONRTOL (0x17)
|
|
+#define AXP1530_POWER_STATUS (0x1A)
|
|
+#define AXP1530_PWROK_SET (0x1B)
|
|
+#define AXP1530_WAKEUP_CONRTOL (0x1C)
|
|
+#define AXP1530_OUTOUT_MONITOR (0x1D)
|
|
+#define AXP1530_POK_CONRTOL (0x1E)
|
|
+#define AXP1530_IRQ_ENABLE1 (0x20)
|
|
+#define AXP1530_IRQ_STATUS1 (0x21)
|
|
+#define AXP1530_LOCK_REG71 (0x70)
|
|
+#define AXP1530_EPROM_SET (0x71)
|
|
+#define AXP1530_DCDC12_DEFAULT (0x80)
|
|
+#define AXP1530_DCDC3_A1D1_DEFAULT (0x81)
|
|
+#define AXP1530_STARTUP_SEQ (0x82)
|
|
+#define AXP1530_STARTUP_RTCLDO (0x83)
|
|
+#define AXP1530_BIAS_I2C_ADDR (0x84)
|
|
+#define AXP1530_VREF_VRPN (0x85)
|
|
+#define AXP1530_VREF_VOL (0x86)
|
|
+#define AXP1530_FREQUENCY (0x87)
|
|
+
|
|
+/* Regulators IDs */
|
|
+enum {
|
|
+ AXP152_DCDC1 = 0,
|
|
+ AXP152_DCDC2,
|
|
+ AXP152_DCDC3,
|
|
+ AXP152_DCDC4,
|
|
+ AXP152_ALDO1,
|
|
+ AXP152_ALDO2,
|
|
+ AXP152_DLDO1,
|
|
+ AXP152_DLDO2,
|
|
+ AXP152_LDO0,
|
|
+ AXP152_GPIO2_LDO,
|
|
+ AXP152_RTC13,
|
|
+ AXP152_RTC18,
|
|
+ AXP152_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP20X_LDO1 = 0,
|
|
+ AXP20X_LDO2,
|
|
+ AXP20X_LDO3,
|
|
+ AXP20X_LDO4,
|
|
+ AXP20X_LDO5,
|
|
+ AXP20X_DCDC2,
|
|
+ AXP20X_DCDC3,
|
|
+ AXP20X_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP22X_DCDC1 = 0,
|
|
+ AXP22X_DCDC2,
|
|
+ AXP22X_DCDC3,
|
|
+ AXP22X_DCDC4,
|
|
+ AXP22X_DCDC5,
|
|
+ AXP22X_DC1SW,
|
|
+ AXP22X_DC5LDO,
|
|
+ AXP22X_ALDO1,
|
|
+ AXP22X_ALDO2,
|
|
+ AXP22X_ALDO3,
|
|
+ AXP22X_ELDO1,
|
|
+ AXP22X_ELDO2,
|
|
+ AXP22X_ELDO3,
|
|
+ AXP22X_DLDO1,
|
|
+ AXP22X_DLDO2,
|
|
+ AXP22X_DLDO3,
|
|
+ AXP22X_DLDO4,
|
|
+ AXP22X_RTC_LDO,
|
|
+ AXP22X_LDO_IO0,
|
|
+ AXP22X_LDO_IO1,
|
|
+ AXP22X_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP806_DCDCA = 0,
|
|
+ AXP806_DCDCB,
|
|
+ AXP806_DCDCC,
|
|
+ AXP806_DCDCD,
|
|
+ AXP806_DCDCE,
|
|
+ AXP806_ALDO1,
|
|
+ AXP806_ALDO2,
|
|
+ AXP806_ALDO3,
|
|
+ AXP806_BLDO1,
|
|
+ AXP806_BLDO2,
|
|
+ AXP806_BLDO3,
|
|
+ AXP806_BLDO4,
|
|
+ AXP806_CLDO1,
|
|
+ AXP806_CLDO2,
|
|
+ AXP806_CLDO3,
|
|
+ AXP806_SW,
|
|
+ AXP806_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP809_DCDC1 = 0,
|
|
+ AXP809_DCDC2,
|
|
+ AXP809_DCDC3,
|
|
+ AXP809_DCDC4,
|
|
+ AXP809_DCDC5,
|
|
+ AXP809_DC1SW,
|
|
+ AXP809_DC5LDO,
|
|
+ AXP809_ALDO1,
|
|
+ AXP809_ALDO2,
|
|
+ AXP809_ALDO3,
|
|
+ AXP809_ELDO1,
|
|
+ AXP809_ELDO2,
|
|
+ AXP809_ELDO3,
|
|
+ AXP809_DLDO1,
|
|
+ AXP809_DLDO2,
|
|
+ AXP809_RTC_LDO,
|
|
+ AXP809_LDO_IO0,
|
|
+ AXP809_LDO_IO1,
|
|
+ AXP809_SW,
|
|
+ AXP809_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP2101_DCDC1 = 0,
|
|
+ AXP2101_DCDC2,
|
|
+ AXP2101_DCDC3,
|
|
+ AXP2101_DCDC4,
|
|
+ AXP2101_DCDC5,
|
|
+ AXP2101_LDO1, /* RTCLDO */
|
|
+ AXP2101_LDO2, /* RTCLDO1 */
|
|
+ AXP2101_LDO3, /* ALDO1 */
|
|
+ AXP2101_LDO4, /* ALDO2 */
|
|
+ AXP2101_LDO5, /* ALDO3 */
|
|
+ AXP2101_LDO6, /* ALDO4 */
|
|
+ AXP2101_LDO7, /* BLDO1 */
|
|
+ AXP2101_LDO8, /* BLDO2 */
|
|
+ AXP2101_LDO9, /* DLDO1 */
|
|
+ AXP2101_LDO10, /* DLDO2 */
|
|
+ AXP2101_LDO11, /* CPULDOS */
|
|
+ AXP2101_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP15_DCDC1 = 0,
|
|
+ AXP15_DCDC2,
|
|
+ AXP15_DCDC3,
|
|
+ AXP15_DCDC4,
|
|
+ AXP15_DCDC5,
|
|
+ AXP15_LDO1, /* RTCLDO */
|
|
+ AXP15_LDO2, /* RTCLDO1 */
|
|
+ AXP15_LDO3, /* ALDO1 */
|
|
+ AXP15_LDO4, /* ALDO2 */
|
|
+ AXP15_LDO5, /* ALDO3 */
|
|
+ AXP15_LDO6, /* ALDO4 */
|
|
+ AXP15_LDO7, /* BLDO1 */
|
|
+ AXP15_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP1530_DCDC1 = 0,
|
|
+ AXP1530_DCDC2,
|
|
+ AXP1530_DCDC3,
|
|
+ AXP1530_LDO1, /* RTCLDO */
|
|
+ AXP1530_LDO2, /* RTCLDO1 */
|
|
+ AXP1530_REG_ID_MAX,
|
|
+};
|
|
+
|
|
+/* IRQs */
|
|
+enum {
|
|
+ AXP152_IRQ_LDO0IN_CONNECT = 1,
|
|
+ AXP152_IRQ_LDO0IN_REMOVAL,
|
|
+ AXP152_IRQ_ALDO0IN_CONNECT,
|
|
+ AXP152_IRQ_ALDO0IN_REMOVAL,
|
|
+ AXP152_IRQ_DCDC1_V_LOW,
|
|
+ AXP152_IRQ_DCDC2_V_LOW,
|
|
+ AXP152_IRQ_DCDC3_V_LOW,
|
|
+ AXP152_IRQ_DCDC4_V_LOW,
|
|
+ AXP152_IRQ_PEK_SHORT,
|
|
+ AXP152_IRQ_PEK_LONG,
|
|
+ AXP152_IRQ_TIMER,
|
|
+ AXP152_IRQ_PEK_RIS_EDGE,
|
|
+ AXP152_IRQ_PEK_FAL_EDGE,
|
|
+ AXP152_IRQ_GPIO3_INPUT,
|
|
+ AXP152_IRQ_GPIO2_INPUT,
|
|
+ AXP152_IRQ_GPIO1_INPUT,
|
|
+ AXP152_IRQ_GPIO0_INPUT,
|
|
+};
|
|
+
|
|
+enum {
|
|
+ AXP20X_IRQ_ACIN_OVER_V = 1,
|
|
+ AXP20X_IRQ_ACIN_PLUGIN,
|
|
+ AXP20X_IRQ_ACIN_REMOVAL,
|
|
+ AXP20X_IRQ_VBUS_OVER_V,
|
|
+ AXP20X_IRQ_VBUS_PLUGIN,
|
|
+ AXP20X_IRQ_VBUS_REMOVAL,
|
|
+ AXP20X_IRQ_VBUS_V_LOW,
|
|
+ AXP20X_IRQ_BATT_PLUGIN,
|
|
+ AXP20X_IRQ_BATT_REMOVAL,
|
|
+ AXP20X_IRQ_BATT_ENT_ACT_MODE,
|
|
+ AXP20X_IRQ_BATT_EXIT_ACT_MODE,
|
|
+ AXP20X_IRQ_CHARG,
|
|
+ AXP20X_IRQ_CHARG_DONE,
|
|
+ AXP20X_IRQ_BATT_TEMP_HIGH,
|
|
+ AXP20X_IRQ_BATT_TEMP_LOW,
|
|
+ AXP20X_IRQ_DIE_TEMP_HIGH,
|
|
+ AXP20X_IRQ_CHARG_I_LOW,
|
|
+ AXP20X_IRQ_DCDC1_V_LONG,
|
|
+ AXP20X_IRQ_DCDC2_V_LONG,
|
|
+ AXP20X_IRQ_DCDC3_V_LONG,
|
|
+ AXP20X_IRQ_PEK_SHORT = 22,
|
|
+ AXP20X_IRQ_PEK_LONG,
|
|
+ AXP20X_IRQ_N_OE_PWR_ON,
|
|
+ AXP20X_IRQ_N_OE_PWR_OFF,
|
|
+ AXP20X_IRQ_VBUS_VALID,
|
|
+ AXP20X_IRQ_VBUS_NOT_VALID,
|
|
+ AXP20X_IRQ_VBUS_SESS_VALID,
|
|
+ AXP20X_IRQ_VBUS_SESS_END,
|
|
+ AXP20X_IRQ_LOW_PWR_LVL1,
|
|
+ AXP20X_IRQ_LOW_PWR_LVL2,
|
|
+ AXP20X_IRQ_TIMER,
|
|
+ AXP20X_IRQ_PEK_RIS_EDGE,
|
|
+ AXP20X_IRQ_PEK_FAL_EDGE,
|
|
+ AXP20X_IRQ_GPIO3_INPUT,
|
|
+ AXP20X_IRQ_GPIO2_INPUT,
|
|
+ AXP20X_IRQ_GPIO1_INPUT,
|
|
+ AXP20X_IRQ_GPIO0_INPUT,
|
|
+};
|
|
+
|
|
+enum axp22x_irqs {
|
|
+ AXP22X_IRQ_ACIN_OVER_V = 1,
|
|
+ AXP22X_IRQ_ACIN_PLUGIN,
|
|
+ AXP22X_IRQ_ACIN_REMOVAL,
|
|
+ AXP22X_IRQ_VBUS_OVER_V,
|
|
+ AXP22X_IRQ_VBUS_PLUGIN,
|
|
+ AXP22X_IRQ_VBUS_REMOVAL,
|
|
+ AXP22X_IRQ_VBUS_V_LOW,
|
|
+ AXP22X_IRQ_BATT_PLUGIN,
|
|
+ AXP22X_IRQ_BATT_REMOVAL,
|
|
+ AXP22X_IRQ_BATT_ENT_ACT_MODE,
|
|
+ AXP22X_IRQ_BATT_EXIT_ACT_MODE,
|
|
+ AXP22X_IRQ_CHARG,
|
|
+ AXP22X_IRQ_CHARG_DONE,
|
|
+ AXP22X_IRQ_BATT_TEMP_HIGH,
|
|
+ AXP22X_IRQ_BATT_TEMP_LOW,
|
|
+ AXP22X_IRQ_DIE_TEMP_HIGH,
|
|
+ AXP22X_IRQ_PEK_SHORT,
|
|
+ AXP22X_IRQ_PEK_LONG,
|
|
+ AXP22X_IRQ_LOW_PWR_LVL1,
|
|
+ AXP22X_IRQ_LOW_PWR_LVL2,
|
|
+ AXP22X_IRQ_TIMER,
|
|
+ AXP22X_IRQ_PEK_RIS_EDGE,
|
|
+ AXP22X_IRQ_PEK_FAL_EDGE,
|
|
+ AXP22X_IRQ_GPIO1_INPUT,
|
|
+ AXP22X_IRQ_GPIO0_INPUT,
|
|
+};
|
|
+
|
|
+enum axp288_irqs {
|
|
+ AXP288_IRQ_VBUS_FALL = 2,
|
|
+ AXP288_IRQ_VBUS_RISE,
|
|
+ AXP288_IRQ_OV,
|
|
+ AXP288_IRQ_FALLING_ALT,
|
|
+ AXP288_IRQ_RISING_ALT,
|
|
+ AXP288_IRQ_OV_ALT,
|
|
+ AXP288_IRQ_DONE = 10,
|
|
+ AXP288_IRQ_CHARGING,
|
|
+ AXP288_IRQ_SAFE_QUIT,
|
|
+ AXP288_IRQ_SAFE_ENTER,
|
|
+ AXP288_IRQ_ABSENT,
|
|
+ AXP288_IRQ_APPEND,
|
|
+ AXP288_IRQ_QWBTU,
|
|
+ AXP288_IRQ_WBTU,
|
|
+ AXP288_IRQ_QWBTO,
|
|
+ AXP288_IRQ_WBTO,
|
|
+ AXP288_IRQ_QCBTU,
|
|
+ AXP288_IRQ_CBTU,
|
|
+ AXP288_IRQ_QCBTO,
|
|
+ AXP288_IRQ_CBTO,
|
|
+ AXP288_IRQ_WL2,
|
|
+ AXP288_IRQ_WL1,
|
|
+ AXP288_IRQ_GPADC,
|
|
+ AXP288_IRQ_OT = 31,
|
|
+ AXP288_IRQ_GPIO0,
|
|
+ AXP288_IRQ_GPIO1,
|
|
+ AXP288_IRQ_POKO,
|
|
+ AXP288_IRQ_POKL,
|
|
+ AXP288_IRQ_POKS,
|
|
+ AXP288_IRQ_POKN,
|
|
+ AXP288_IRQ_POKP,
|
|
+ AXP288_IRQ_TIMER,
|
|
+ AXP288_IRQ_MV_CHNG,
|
|
+ AXP288_IRQ_BC_USB_CHNG,
|
|
+};
|
|
+
|
|
+enum axp806_irqs {
|
|
+ AXP806_IRQ_DIE_TEMP_HIGH_LV1,
|
|
+ AXP806_IRQ_DIE_TEMP_HIGH_LV2,
|
|
+ AXP806_IRQ_DCDCA_V_LOW,
|
|
+ AXP806_IRQ_DCDCB_V_LOW,
|
|
+ AXP806_IRQ_DCDCC_V_LOW,
|
|
+ AXP806_IRQ_DCDCD_V_LOW,
|
|
+ AXP806_IRQ_DCDCE_V_LOW,
|
|
+ AXP806_IRQ_PWROK_LONG,
|
|
+ AXP806_IRQ_PWROK_SHORT,
|
|
+ AXP806_IRQ_WAKEUP,
|
|
+ AXP806_IRQ_PWROK_FALL,
|
|
+ AXP806_IRQ_PWROK_RISE,
|
|
+};
|
|
+
|
|
+enum axp809_irqs {
|
|
+ AXP809_IRQ_ACIN_OVER_V = 1,
|
|
+ AXP809_IRQ_ACIN_PLUGIN,
|
|
+ AXP809_IRQ_ACIN_REMOVAL,
|
|
+ AXP809_IRQ_VBUS_OVER_V,
|
|
+ AXP809_IRQ_VBUS_PLUGIN,
|
|
+ AXP809_IRQ_VBUS_REMOVAL,
|
|
+ AXP809_IRQ_VBUS_V_LOW,
|
|
+ AXP809_IRQ_BATT_PLUGIN,
|
|
+ AXP809_IRQ_BATT_REMOVAL,
|
|
+ AXP809_IRQ_BATT_ENT_ACT_MODE,
|
|
+ AXP809_IRQ_BATT_EXIT_ACT_MODE,
|
|
+ AXP809_IRQ_CHARG,
|
|
+ AXP809_IRQ_CHARG_DONE,
|
|
+ AXP809_IRQ_BATT_CHG_TEMP_HIGH,
|
|
+ AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
|
|
+ AXP809_IRQ_BATT_CHG_TEMP_LOW,
|
|
+ AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
|
|
+ AXP809_IRQ_BATT_ACT_TEMP_HIGH,
|
|
+ AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
|
|
+ AXP809_IRQ_BATT_ACT_TEMP_LOW,
|
|
+ AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
|
|
+ AXP809_IRQ_DIE_TEMP_HIGH,
|
|
+ AXP809_IRQ_LOW_PWR_LVL1,
|
|
+ AXP809_IRQ_LOW_PWR_LVL2,
|
|
+ AXP809_IRQ_TIMER,
|
|
+ AXP809_IRQ_PEK_RIS_EDGE,
|
|
+ AXP809_IRQ_PEK_FAL_EDGE,
|
|
+ AXP809_IRQ_PEK_SHORT,
|
|
+ AXP809_IRQ_PEK_LONG,
|
|
+ AXP809_IRQ_PEK_OVER_OFF,
|
|
+ AXP809_IRQ_GPIO1_INPUT,
|
|
+ AXP809_IRQ_GPIO0_INPUT,
|
|
+};
|
|
+
|
|
+enum axp2101_irqs {
|
|
+ /* irq0 */
|
|
+ AXP2101_IRQ_BWUT,
|
|
+ AXP2101_IRQ_BWOT,
|
|
+ AXP2101_IRQ_BCUT,
|
|
+ AXP2101_IRQ_BCOT,
|
|
+ AXP2101_IRQ_NEWSOC,
|
|
+ AXP2101_IRQ_GWDT,
|
|
+ AXP2101_IRQ_SOCWL1,
|
|
+ AXP2101_IRQ_SOCWL2,
|
|
+ /* irq1 */
|
|
+ AXP2101_IRQ_PONP,
|
|
+ AXP2101_IRQ_PONN,
|
|
+ AXP2101_IRQ_PONL,
|
|
+ AXP2101_IRQ_PONS,
|
|
+ AXP2101_IRQ_BREMOV,
|
|
+ AXP2101_IRQ_BINSERT,
|
|
+ AXP2101_IRQ_VREMOV,
|
|
+ AXP2101_IRQ_VINSET,
|
|
+ /* irq2 */
|
|
+ AXP2101_IRQ_BOVP,
|
|
+ AXP2101_IRQ_CHGTE,
|
|
+ AXP2101_IRQ_DOTL1,
|
|
+ AXP2101_IRQ_CHGST,
|
|
+ AXP2101_IRQ_CHGDN,
|
|
+ AXP2101_IRQ_BOCP,
|
|
+ AXP2101_IRQ_LDOOC,
|
|
+ AXP2101_IRQ_WDEXP,
|
|
+};
|
|
+
|
|
+enum axp15_irqs {
|
|
+ /* irq0 */
|
|
+ AXP15_IRQ_ALDOIN_H2L = 2,
|
|
+ AXP15_IRQ_ALDOIN_L2H,
|
|
+ AXP15_IRQ_LDO0IN_H2L = 5,
|
|
+ AXP15_IRQ_LDO0IN_L2H,
|
|
+ /* irq1 */
|
|
+ AXP15_IRQ_PEKLO = 8,
|
|
+ AXP15_IRQ_PEKSH,
|
|
+ AXP15_IRQ_DCDC4_V_LOW,
|
|
+ AXP15_IRQ_DCDC3_V_LOW,
|
|
+ AXP15_IRQ_DCDC2_V_LOW,
|
|
+ AXP15_IRQ_DCDC1_V_LOW,
|
|
+
|
|
+ /* irq2 */
|
|
+ AXP15_IRQ_GPIO0 = 16,
|
|
+ AXP15_IRQ_GPIO1,
|
|
+ AXP15_IRQ_GPIO2,
|
|
+ AXP15_IRQ_GPIO3,
|
|
+ AXP15_IRQ_PEKFE = 21,
|
|
+ AXP15_IRQ_PEKRE,
|
|
+ AXP15_IRQ_EVENT_TIMEOUT,
|
|
+};
|
|
+
|
|
+enum axp1530_irqs {
|
|
+ /* irq0 */
|
|
+ AXP1530_IRQ_TEMP_OVER,
|
|
+ AXP1530_IRQ_DCDC2_UNDER = 2,
|
|
+ AXP1530_IRQ_DCDC3_UNDER,
|
|
+ AXP1530_IRQ_POKLIRQ_EN,
|
|
+ AXP1530_IRQ_POKSIRQ_EN,
|
|
+ AXP1530_IRQ_KEY_L2H_EN,
|
|
+ AXP1530_IRQ_KEY_H2L_EN,
|
|
+};
|
|
+
|
|
+#define AXP288_TS_ADC_H 0x58
|
|
+#define AXP288_TS_ADC_L 0x59
|
|
+#define AXP288_GP_ADC_H 0x5a
|
|
+#define AXP288_GP_ADC_L 0x5b
|
|
+
|
|
+struct axp20x_dev {
|
|
+ struct device *dev;
|
|
+ int irq;
|
|
+ struct regmap *regmap;
|
|
+ struct regmap_irq_chip_data *regmap_irqc;
|
|
+ long variant;
|
|
+ int nr_cells;
|
|
+ struct mfd_cell *cells;
|
|
+ const struct regmap_config *regmap_cfg;
|
|
+ const struct regmap_irq_chip *regmap_irq_chip;
|
|
+ void (*dts_parse)(struct axp20x_dev *);
|
|
+};
|
|
+
|
|
+#define BATTID_LEN 64
|
|
+#define OCV_CURVE_SIZE 32
|
|
+#define MAX_THERM_CURVE_SIZE 25
|
|
+#define PD_DEF_MIN_TEMP 0
|
|
+#define PD_DEF_MAX_TEMP 55
|
|
+
|
|
+struct axp20x_fg_pdata {
|
|
+ char battid[BATTID_LEN + 1];
|
|
+ int design_cap;
|
|
+ int min_volt;
|
|
+ int max_volt;
|
|
+ int max_temp;
|
|
+ int min_temp;
|
|
+ int cap1;
|
|
+ int cap0;
|
|
+ int rdc1;
|
|
+ int rdc0;
|
|
+ int ocv_curve[OCV_CURVE_SIZE];
|
|
+ int tcsz;
|
|
+ int thermistor_curve[MAX_THERM_CURVE_SIZE][2];
|
|
+};
|
|
+
|
|
+struct axp20x_chrg_pdata {
|
|
+ int max_cc;
|
|
+ int max_cv;
|
|
+ int def_cc;
|
|
+ int def_cv;
|
|
+};
|
|
+
|
|
+struct axp288_extcon_pdata {
|
|
+ /* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */
|
|
+ struct gpio_desc *gpio_mux_cntl;
|
|
+};
|
|
+
|
|
+/* generic helper function for reading 9-16 bit wide regs */
|
|
+static inline int axp20x_read_variable_width(struct regmap *regmap,
|
|
+ unsigned int reg, unsigned int width)
|
|
+{
|
|
+ unsigned int reg_val, result;
|
|
+ int err;
|
|
+
|
|
+ err = regmap_read(regmap, reg, ®_val);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ result = reg_val << (width - 8);
|
|
+
|
|
+ err = regmap_read(regmap, reg + 1, ®_val);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ result |= reg_val;
|
|
+
|
|
+ return result;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * axp20x_match_device(): Setup axp20x variant related fields
|
|
+ *
|
|
+ * @axp20x: axp20x device to setup (.dev field must be set)
|
|
+ * @dev: device associated with this axp20x device
|
|
+ *
|
|
+ * This lets the axp20x core configure the mfd cells and register maps
|
|
+ * for later use.
|
|
+ */
|
|
+int axp20x_match_device(struct axp20x_dev *axp20x);
|
|
+
|
|
+/**
|
|
+ * axp20x_device_probe(): Probe a configured axp20x device
|
|
+ *
|
|
+ * @axp20x: axp20x device to probe (must be configured)
|
|
+ *
|
|
+ * This function lets the axp20x core register the axp20x mfd devices
|
|
+ * and irqchip. The axp20x device passed in must be fully configured
|
|
+ * with axp20x_match_device, its irq set, and regmap created.
|
|
+ */
|
|
+int axp20x_device_probe(struct axp20x_dev *axp20x);
|
|
+
|
|
+/**
|
|
+ * axp20x_device_probe(): Remove a axp20x device
|
|
+ *
|
|
+ * @axp20x: axp20x device to remove
|
|
+ *
|
|
+ * This tells the axp20x core to remove the associated mfd devices
|
|
+ */
|
|
+int axp20x_device_remove(struct axp20x_dev *axp20x);
|
|
+
|
|
+#endif /* __LINUX_MFD_AXP20X_H */
|