firmware/br-ext-chip-allwinner/board/v83x/kernel/patches/00000-drivers_pci_setup-res...

63 lines
1.8 KiB
Diff

diff -drupN a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
--- a/drivers/pci/setup-res.c 2018-08-06 17:23:04.000000000 +0300
+++ b/drivers/pci/setup-res.c 2022-06-12 05:28:14.000000000 +0300
@@ -24,7 +24,12 @@
#include <linux/cache.h>
#include <linux/slab.h>
#include "pci.h"
+#include "host/pcie-designware.h"
+#ifdef CONFIG_ARCH_SUN50IW6
+#define PCIE_MEM_BASE 0x05410000
+extern void __iomem *dbi_base;
+#endif
static void pci_std_update_resource(struct pci_dev *dev, int resno)
{
struct pci_bus_region region;
@@ -303,6 +308,11 @@ int pci_assign_resource(struct pci_dev *
struct resource *res = dev->resource + resno;
resource_size_t align, size;
int ret;
+#ifdef CONFIG_ARCH_SUN50IW6
+ resource_size_t len;
+ u32 bardata, mem_base;
+ int i;
+#endif
if (res->flags & IORESOURCE_PCI_FIXED)
return 0;
@@ -317,7 +327,6 @@ int pci_assign_resource(struct pci_dev *
size = resource_size(res);
ret = _pci_assign_resource(dev, resno, size, align);
-
/*
* If we failed to assign anything, let's try the address
* where firmware left it. That at least has a chance of
@@ -340,6 +349,25 @@ int pci_assign_resource(struct pci_dev *
if (resno < PCI_BRIDGE_RESOURCES)
pci_update_resource(dev, resno);
+#ifdef CONFIG_ARCH_SUN50IW6
+ if ((res->flags & IORESOURCE_MEM) && resno < PCIE_BAR_NUM) {
+ for (i = 0; i < 6; i++) {
+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4,
+ &bardata);
+ mem_base = readl(dbi_base + PCI_MEMORY_BASE);
+ if (((bardata >> MEM_BASE_LEN) & MEM_BASE_MASK)
+ == (mem_base & MEM_BASE_MASK)) {
+ len = res->end - res->start;
+ res->start = PCIE_MEM_BASE;
+ res->end = res->start + len;
+ dev_info(&dev->dev, "REAL BAR %d: assigned \
+ %pR\n", resno, res);
+ break;
+ }
+ }
+ }
+#endif
+
return 0;
}
EXPORT_SYMBOL(pci_assign_resource);