firmware/br-ext-chip-ingenic/board/t40/kernel/patches/00000-arch_mips_mm_tlb-r4k....

32 lines
934 B
Diff

diff -drupN a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
--- a/arch/mips/mm/tlb-r4k.c 2017-10-21 18:09:07.000000000 +0300
+++ b/arch/mips/mm/tlb-r4k.c 2022-06-09 05:02:27.000000000 +0300
@@ -52,7 +52,7 @@ void local_flush_tlb_all(void)
{
unsigned long flags;
unsigned long old_ctx;
- int entry, ftlbhighset;
+ int entry;
local_irq_save(flags);
/* Save old context and create impossible VPN2 value */
@@ -65,6 +65,8 @@ void local_flush_tlb_all(void)
/* Blast 'em all away. */
if (cpu_has_tlbinv) {
+#ifndef CONFIG_MACH_XBURST2
+ int ftlbhighset;
if (current_cpu_data.tlbsizevtlb) {
write_c0_index(0);
mtc0_tlbw_hazard();
@@ -79,6 +81,9 @@ void local_flush_tlb_all(void)
mtc0_tlbw_hazard();
tlbinvf(); /* invalidate one FTLB set */
}
+#else
+ tlbinvf(); /* invalide FTLB/VTLB set */
+#endif
} else {
while (entry < current_cpu_data.tlbsize) {
/* Make sure all entries differ. */