diff -drupN a/include/linux/clk-provider.h b/include/linux/clk-provider.h
--- a/include/linux/clk-provider.h	2018-08-06 17:23:04.000000000 +0300
+++ b/include/linux/clk-provider.h	2022-06-12 05:28:14.000000000 +0300
@@ -25,7 +25,7 @@
 #define CLK_SET_PARENT_GATE	BIT(1) /* must be gated across re-parent */
 #define CLK_SET_RATE_PARENT	BIT(2) /* propagate rate change up one level */
 #define CLK_IGNORE_UNUSED	BIT(3) /* do not gate even if unused */
-				/* unused */
+#define CLK_IS_ROOT		    BIT(4) /* root clk, has no parent */
 #define CLK_IS_BASIC		BIT(5) /* Basic clk, can't do a to_clk_foo() */
 #define CLK_GET_RATE_NOCACHE	BIT(6) /* do not use the cached clk rate */
 #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
@@ -35,6 +35,15 @@
 #define CLK_IS_CRITICAL		BIT(11) /* do not gate, ever */
 /* parents need enable during gate/ungate, set rate and re-parent */
 #define CLK_OPS_PARENT_ENABLE	BIT(12)
+#define CLK_IGNORE_AUTORESET    BIT(13) /* for sunxi use */
+#define CLK_REVERT_ENABLE       BIT(14) /* for sunxi use */
+#define CLK_IGNORE_SYNCBOOT     BIT(15) /* for sunxi use */
+#define CLK_READONLY            BIT(16) /* for sunxi use */
+#define CLK_IGNORE_DISABLE      BIT(17) /* for sunxi use */
+#define CLK_RATE_FLAT_FACTORS   BIT(18) /* for sunxi use */
+#define CLK_RATE_FLAT_DELAY     BIT(19) /* for sunxi use */
+#define CLK_NO_DISABLE          BIT(20) /* for sunxi use */
+#define CLK_IGNORE_ENABLE_DISABLE BIT(21) /* for sunxi use */
 
 struct clk;
 struct clk_hw;