--- a/arch/arm/boot/dts/gk7205v300.dtsi
+++ b/arch/arm/boot/dts/gk7205v300.dtsi
@@ -139,13 +139,13 @@
 			};
 
 			dual_timer1: dual_timer@12001000 {
-				compatible = "arm,sp804", "arm,primecell";
+				compatible = "arm,sp805", "arm,primecell5";
 				/* timer2 & timer3 */
 				interrupts = <0 6 4>;
 				reg = <0x12001000 0x1000>;
 				clocks = <&clk_3m>, <&clk_3m>, <&clk_apb>;
 				clock-names = "timer10", "timer11", "apb_pclk";
-				status = "disabled";
+				status = "okay";
 			};
 
 			uart0: uart@12040000 {
--- a/arch/arm/boot/dts/gk7205v200.dtsi
+++ b/arch/arm/boot/dts/gk7205v200.dtsi
@@ -142,13 +142,13 @@
 			};
 
 			dual_timer1: dual_timer@12001000 {
-				compatible = "arm,sp804", "arm,primecell";
+				compatible = "arm,sp805", "arm,primecell5";
 				/* timer2 & timer3 */
 				interrupts = <0 6 4>;
 				reg = <0x12001000 0x1000>;
 				clocks = <&clk_3m>, <&clk_3m>, <&clk_apb>;
 				clock-names = "timer10", "timer11", "apb_pclk";
-				status = "disabled";
+				status = "okay";
 			};
 
 			uart0: uart@12040000 {
--- a/arch/arm/boot/dts/gk7202v300.dtsi
+++ b/arch/arm/boot/dts/gk7202v300.dtsi
@@ -142,13 +142,13 @@
 			};
 
 			dual_timer1: dual_timer@12001000 {
-				compatible = "arm,sp804", "arm,primecell";
+				compatible = "arm,sp805", "arm,primecell5";
 				/* timer2 & timer3 */
 				interrupts = <0 6 4>;
 				reg = <0x12001000 0x1000>;
 				clocks = <&clk_3m>, <&clk_3m>, <&clk_apb>;
 				clock-names = "timer10", "timer11", "apb_pclk";
-				status = "disabled";
+				status = "okay";
 			};
 
 			uart0: uart@12040000 {