diff -drupN a/drivers/media/rc/sunxi-gpio-ir.c b/drivers/media/rc/sunxi-gpio-ir.c
--- a/drivers/media/rc/sunxi-gpio-ir.c	1970-01-01 03:00:00.000000000 +0300
+++ b/drivers/media/rc/sunxi-gpio-ir.c	2022-06-12 05:28:14.000000000 +0300
@@ -0,0 +1,572 @@
+/*
+ * drivers/media/rc/sunxi-gpio-ir.c
+ *
+ * Copyright (c) 2013-2018 Allwinnertech Co., Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <media/rc-core.h>
+#include <linux/platform_data/media/sunxi-gpio-ir.h>
+#include <linux/pwm.h>
+#include <linux/sunxi-gpio.h>
+#include <linux/time.h>
+#include <linux/hrtimer.h>
+#include <linux/uaccess.h>
+#include <linux/completion.h>
+
+#define GPIO_IR_DRIVER_NAME	"sunxi-gpio-rc"
+#define GPIO_IR_DEVICE_NAME	"sunxi_gpio_ir"
+
+#define GPIO_IR_TIMEOUT	MS_TO_NS(12)
+#define GPIO_IR_CARRIER_FREQ 38000 /*38K*/
+#define GPIO_IR_DUTY_CYCLE 33      /*33.33%*/
+#define GPIO_IR_PERIOD (int)(1000000000UL/GPIO_IR_CARRIER_FREQ)
+
+#define TX_BUFF_LEN 512
+
+struct gpio_rc_dev {
+	struct rc_dev *rcdev;
+	struct pwm_device *pwm;
+	int gpio_rx_nr;
+	int gpio_tx_nr;
+	bool active_low;
+	bool pwm_used;
+	int	pwm_port;
+	int tx_carrier_freq;
+	int tx_duty_cycle;
+	spinlock_t tx_lock;
+	spinlock_t carr_lock;
+	struct mutex pwm_lock;
+	struct timer_list flush_timer;
+	struct hrtimer tx_hrtimer;
+	struct completion tx_completion;
+	unsigned int tx_raw_buf[512];
+	int raw_count;
+	int tx_index;
+};
+
+static void ir_send_carrier(struct gpio_rc_dev *gpio_dev, int time_us)
+{
+	int i;
+	unsigned long flags;
+	unsigned long period_ns, on_ns, off_ns;
+	unsigned long carrier_freq, carrier_num;
+	unsigned long duty_cycle;
+
+	carrier_freq = gpio_dev->tx_carrier_freq;
+	duty_cycle = gpio_dev->tx_duty_cycle;
+
+	period_ns = 1000000000UL / carrier_freq;
+
+	on_ns = period_ns * duty_cycle / 100;
+	off_ns = period_ns * (100 - duty_cycle) / 100;
+
+	carrier_num = US_TO_NS(time_us) / period_ns;
+
+	spin_lock_irqsave(&gpio_dev->carr_lock, flags);
+
+	for (i = 0; i < carrier_num; i++) {
+		gpio_set_value(gpio_dev->gpio_tx_nr, 1);
+		ndelay(on_ns);
+		gpio_set_value(gpio_dev->gpio_tx_nr, 0);
+		ndelay(off_ns);
+	}
+	gpio_set_value(gpio_dev->gpio_tx_nr, 0);
+
+	spin_unlock_irqrestore(&gpio_dev->carr_lock, flags);
+}
+
+#ifdef CONFIG_OF
+/*
+ * Translate OpenFirmware node properties into platform_data
+ */
+static int gpio_ir_get_devtree_pdata(struct device *dev,
+				  struct gpio_ir_platform_data *pdata)
+{
+	struct device_node *np = dev->of_node;
+	struct gpio_config config;
+	u32 rx_protos_type[24];
+	int num_type;
+	int gpio;
+	int pwm;
+	int ret, i;
+
+	/* probe() takes care of map_name == NULL or allowed_protos == 0 */
+	pdata->map_name = of_get_property(np, "linux,rc-map-name", NULL);
+	dev_dbg(dev, "rc-map-name: (%s)\n", pdata->map_name);
+
+	num_type = of_property_count_u32_elems(np, "linux,ir-rx-protos");
+	if (num_type > sizeof(rx_protos_type))
+		num_type = sizeof(rx_protos_type);
+
+	ret = of_property_read_u32_array(np, "linux,ir-rx-protos",
+						 rx_protos_type,
+						 num_type);
+	if (ret) {
+		dev_err(dev,
+			"failed to read linux,ir-protos-type: %d\n", ret);
+		pdata->allowed_protos = 0;
+		return ret;
+	}
+
+	for (i = 0; i < num_type; i++)
+		pdata->allowed_protos |= 1 << rx_protos_type[i];
+	dev_dbg(dev, "allowed_protos: (0x%x)\n", (u32)pdata->allowed_protos);
+
+	pdata->tx_capable = of_property_read_bool(np, "linux,tx-enable");
+	pdata->pwm_tx_used = of_property_read_bool(np, "linux,tx-pwm-mode");
+	if (pdata->pwm_tx_used) {
+		ret = of_property_read_u32(np, "linux,pwm-port", &pwm);
+		if (ret) {
+			dev_err(dev,
+				"failed to read linux,pwm-port: %d\n", ret);
+			return ret;
+		}
+		pdata->pwm_port = pwm;
+		dev_dbg(dev, "ir mode: pwm uesd, pwm port: (%d)\n", pwm);
+	} else {
+		gpio = of_get_named_gpio_flags(dev->of_node,
+				"tran-gpio", 0,
+				(enum of_gpio_flags *)&config);
+		if (gpio < 0) {
+			if (gpio != -EPROBE_DEFER)
+				dev_err(dev,
+				  "Failed to get gpio flags (%d)\n", gpio);
+			return gpio;
+		}
+		pdata->gpio_tx_nr = gpio;
+		dev_dbg(dev, "gpio tx num: (%d)\n", gpio);
+	}
+
+	gpio = of_get_named_gpio_flags(dev->of_node,
+		"recv-gpio", 0,
+		(enum of_gpio_flags *)&config);
+	if (gpio < 0) {
+		if (gpio != -EPROBE_DEFER)
+			dev_err(dev, "Failed to get gpio flags (%d)\n", gpio);
+		return gpio;
+	}
+	pdata->gpio_rx_nr = gpio;
+	dev_dbg(dev, "gpio rx num: (%d)\n", gpio);
+
+	return 0;
+}
+
+static const struct of_device_id gpio_ir_recv_of_match[] = {
+	{ .compatible = "sunxi-gpio-ir", },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, gpio_ir_recv_of_match);
+
+#else /* !CONFIG_OF */
+
+#define gpio_ir_get_devtree_pdata(dev, pdata)	(-ENOSYS)
+
+#endif
+
+static enum hrtimer_restart tx_hrtimer_hander(struct hrtimer *timer)
+{
+	struct gpio_rc_dev *gpio_dev;
+	DEFINE_IR_RAW_EVENT(ev);
+	unsigned long period_ns, on_ns, off_ns;
+	unsigned long carrier_freq;
+	unsigned long duty_cycle;
+	int j = 0;
+
+	gpio_dev = container_of(timer, struct gpio_rc_dev, tx_hrtimer);
+	if (!gpio_dev)
+		return HRTIMER_RESTART;
+
+	carrier_freq = gpio_dev->tx_carrier_freq;
+	duty_cycle = gpio_dev->tx_duty_cycle;
+
+	period_ns = 1000000000UL / carrier_freq;
+	on_ns = period_ns * duty_cycle / 100;
+	off_ns = period_ns * (100 - duty_cycle) / 100;
+
+	if (gpio_dev->tx_index >= gpio_dev->raw_count) {
+		complete(&gpio_dev->tx_completion);
+		return HRTIMER_NORESTART;
+	}
+
+	j = gpio_dev->tx_index;
+	ev.duration = *(gpio_dev->tx_raw_buf + j) & 0x00FFFFFF;
+	/*the high byte is pulse/space flag*/
+	ev.pulse = *(gpio_dev->tx_raw_buf + j) & 0xFF000000 ? true : false;
+	if (ev.pulse) {
+		/*carrier pluse*/
+		pwm_config(gpio_dev->pwm, off_ns, period_ns);
+	} else {
+		pwm_config(gpio_dev->pwm, period_ns, period_ns);
+	}
+
+	/*restart next timer*/
+	hrtimer_forward_now(&gpio_dev->tx_hrtimer,
+		ktime_set(0, ev.duration * 1000));
+	gpio_dev->tx_index++;
+
+	return HRTIMER_RESTART;
+}
+
+static void tx_timer_start(struct rc_dev *rcdev)
+{
+	struct gpio_rc_dev *gpio_dev = rcdev->priv;
+
+	hrtimer_init(&gpio_dev->tx_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+	gpio_dev->tx_hrtimer.function = tx_hrtimer_hander;
+	gpio_dev->tx_index = 0;
+	hrtimer_start(&gpio_dev->tx_hrtimer,
+		ktime_set(0, 1000*1000),
+		HRTIMER_MODE_REL);
+}
+
+/* outside interface: transmit */
+static int gpio_transmit_ir(struct rc_dev *rcdev, unsigned int *txbuf,
+				unsigned int count)
+{
+	struct gpio_rc_dev *gpio_dev = rcdev->priv;
+
+	int i = 0;
+	unsigned long flags;
+	DEFINE_IR_RAW_EVENT(ev);
+
+	dev_dbg(&rcdev->dev, "IR tX: transmit %d raw data\n", count);
+	/*gpio tx mode*/
+	if (!gpio_dev->pwm_used) {
+		spin_lock_irqsave(&gpio_dev->tx_lock, flags);
+
+		for (i = 0; i < count; i++) {
+			ev.duration = *(txbuf + i) & 0x00FFFFFF;
+			/*the high byte is pulse/space flag*/
+			ev.pulse = *(txbuf + i) & 0xFF000000 ? true : false;
+			if (ev.pulse)
+				/*carrier pluse*/
+				ir_send_carrier(gpio_dev, ev.duration);
+			else
+				udelay(ev.duration);/*ir space*/
+		}
+		spin_unlock_irqrestore(&gpio_dev->tx_lock, flags);
+	} else {
+		mutex_lock(&gpio_dev->pwm_lock);
+		memcpy(gpio_dev->tx_raw_buf,
+			txbuf,
+			count * sizeof(unsigned int));
+		gpio_dev->raw_count = count;
+		/*pwm enable*/
+		pwm_config(gpio_dev->pwm, GPIO_IR_PERIOD, GPIO_IR_PERIOD);
+		pwm_enable(gpio_dev->pwm);
+		tx_timer_start(rcdev);
+
+		/*wait for transmit completed*/
+		wait_for_completion(&gpio_dev->tx_completion);
+		dev_dbg(&rcdev->dev, "IR tX: pwm transmit one frame\n");
+
+		hrtimer_cancel(&gpio_dev->tx_hrtimer);
+		pwm_disable(gpio_dev->pwm);
+		mutex_unlock(&gpio_dev->pwm_lock);
+	}
+
+	return count;
+}
+
+/* set the tx carrier freq, guess it's in Hz... */
+static int gpio_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
+{
+	unsigned long flags;
+	struct gpio_rc_dev *gpio_dev = rcdev->priv;
+
+	dev_dbg(&rcdev->dev, "GPIO IR: carrier freq: %d\n", carrier);
+
+	spin_lock_irqsave(&gpio_dev->tx_lock, flags);
+	gpio_dev->tx_carrier_freq = carrier;
+	spin_unlock_irqrestore(&gpio_dev->tx_lock, flags);
+
+	return 0;
+}
+
+/* set the tx duty cycle by controlling the pulse width */
+static int gpio_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
+{
+	unsigned long flags;
+	struct gpio_rc_dev *gpio_dev = rcdev->priv;
+
+	dev_dbg(&rcdev->dev, "GPIO IR: duty cycle: %d\n", duty_cycle);
+
+	spin_lock_irqsave(&gpio_dev->tx_lock, flags);
+	gpio_dev->tx_duty_cycle = duty_cycle;
+	spin_unlock_irqrestore(&gpio_dev->tx_lock, flags);
+
+	return 0;
+}
+
+static irqreturn_t gpio_ir_recv_irq(int irq, void *dev_id)
+{
+	struct gpio_rc_dev *gpio_dev = dev_id;
+	int gval;
+	int rc = 0;
+	enum raw_event_type type = IR_SPACE;
+
+	gval = gpio_get_value(gpio_dev->gpio_rx_nr);
+
+	if (gval < 0)
+		goto err_get_value;
+
+	if (gpio_dev->active_low)
+		gval = !gval;
+
+	if (gval == 1)
+		type = IR_PULSE;
+
+	rc = ir_raw_event_store_edge(gpio_dev->rcdev, type);
+	if (rc < 0)
+		goto err_get_value;
+
+	mod_timer(&gpio_dev->flush_timer,
+		  jiffies + nsecs_to_jiffies(gpio_dev->rcdev->timeout));
+
+	ir_raw_event_handle(gpio_dev->rcdev);
+
+err_get_value:
+	return IRQ_HANDLED;
+}
+
+static void flush_timer(unsigned long arg)
+{
+	struct gpio_rc_dev *gpio_dev = (struct gpio_rc_dev *)arg;
+	DEFINE_IR_RAW_EVENT(ev);
+
+	ev.timeout = true;
+	ev.duration = gpio_dev->rcdev->timeout;
+	ir_raw_event_store(gpio_dev->rcdev, &ev);
+	ir_raw_event_handle(gpio_dev->rcdev);
+}
+
+static int gpio_ir_recv_probe(struct platform_device *pdev)
+{
+	struct gpio_rc_dev *gpio_dev;
+	struct rc_dev *rcdev;
+	struct gpio_ir_platform_data *pdata =
+					pdev->dev.platform_data;
+	int rc;
+
+	if (pdev->dev.of_node) {
+		struct gpio_ir_platform_data *dtpdata =
+			devm_kzalloc(&pdev->dev, sizeof(*dtpdata), GFP_KERNEL);
+		if (!dtpdata)
+			return -ENOMEM;
+
+		rc = gpio_ir_get_devtree_pdata(&pdev->dev, dtpdata);
+		if (rc)
+			return rc;
+		pdata = dtpdata;
+	}
+
+	if (!pdata)
+		return -EINVAL;
+
+	if (pdata->gpio_rx_nr < 0)
+		return -EINVAL;
+
+	gpio_dev = kzalloc(sizeof(struct gpio_rc_dev), GFP_KERNEL);
+	if (!gpio_dev)
+		return -ENOMEM;
+
+	rcdev = rc_allocate_device();
+	if (!rcdev) {
+		rc = -ENOMEM;
+		goto err_allocate_device;
+	}
+
+	rcdev->priv = gpio_dev;
+	rcdev->driver_type = RC_DRIVER_IR_RAW;
+	rcdev->input_name = GPIO_IR_DEVICE_NAME;
+	rcdev->input_phys = GPIO_IR_DEVICE_NAME "/input0";
+	rcdev->input_id.bustype = BUS_HOST;
+	rcdev->input_id.vendor = 0x0001;
+	rcdev->input_id.product = 0x0001;
+	rcdev->input_id.version = 0x0100;
+	rcdev->dev.parent = &pdev->dev;
+	rcdev->driver_name = GPIO_IR_DRIVER_NAME;
+	rcdev->min_timeout = 0;
+	rcdev->timeout = GPIO_IR_TIMEOUT;
+	rcdev->max_timeout = 10 * GPIO_IR_TIMEOUT;
+	if (pdata->allowed_protos)
+		rcdev->allowed_protocols = pdata->allowed_protos;
+	else
+		rcdev->allowed_protocols = RC_BIT_ALL;
+	rcdev->map_name = pdata->map_name ?: RC_MAP_EMPTY;
+
+	/* set up transmitter related values if needed */
+	if (pdata->tx_capable) {
+		rcdev->tx_ir = gpio_transmit_ir;
+		rcdev->s_tx_carrier = gpio_set_tx_carrier;
+		rcdev->s_tx_duty_cycle = gpio_set_tx_duty_cycle;
+	}
+
+	setup_timer(&gpio_dev->flush_timer, flush_timer,
+		    (unsigned long)gpio_dev);
+
+	rc = gpio_request(pdata->gpio_rx_nr, "gpio-ir-recv");
+	if (rc < 0)
+		goto err_gpio_request;
+
+	rc	= gpio_direction_input(pdata->gpio_rx_nr);
+	if (rc < 0)
+		goto err_gpio_direction_input;
+
+	/*the pulse always reversed*/
+	pdata->active_low = gpio_get_value(pdata->gpio_rx_nr);
+
+	if (!pdata->pwm_tx_used) {
+		rc = gpio_request(pdata->gpio_tx_nr, "gpio-ir-trans");
+		if (rc < 0)
+			goto err_gpio_direction_input;
+
+		rc  = gpio_direction_output(pdata->gpio_tx_nr, 0);
+		if (rc < 0)
+			goto err_gpio_direction_output;
+
+		gpio_dev->gpio_tx_nr = pdata->gpio_tx_nr;
+	} else {
+		gpio_dev->pwm_used = pdata->pwm_tx_used;
+		gpio_dev->pwm_port = pdata->pwm_port;
+	}
+
+	gpio_dev->rcdev = rcdev;
+	gpio_dev->gpio_rx_nr = pdata->gpio_rx_nr;
+	gpio_dev->active_low = pdata->active_low;
+	gpio_dev->tx_carrier_freq = GPIO_IR_CARRIER_FREQ;
+	gpio_dev->tx_duty_cycle = GPIO_IR_DUTY_CYCLE;
+
+	/* initialize spinlocks */
+	spin_lock_init(&gpio_dev->tx_lock);
+	spin_lock_init(&gpio_dev->carr_lock);
+	init_completion(&gpio_dev->tx_completion);
+	mutex_init(&gpio_dev->pwm_lock);
+
+	rc = rc_register_device(rcdev);
+	if (rc < 0) {
+		dev_err(&pdev->dev, "failed to register rc device\n");
+		goto err_register_rc_device;
+	}
+
+	platform_set_drvdata(pdev, gpio_dev);
+
+	rc = request_any_context_irq(gpio_to_irq(pdata->gpio_rx_nr),
+			gpio_ir_recv_irq,
+			IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+			"gpio-ir-recv-irq", gpio_dev);
+	if (rc < 0)
+		goto err_request_irq;
+
+	if (pdata->pwm_tx_used) {
+		gpio_dev->pwm = pwm_request(gpio_dev->pwm_port, "ir tx");
+		if (IS_ERR(gpio_dev->pwm)) {
+			dev_err(&pdev->dev, "Unable to request PWM for ir dev!\n");
+				goto err_request_pwm;
+		}
+	}
+
+	dev_info(&pdev->dev, "gpio ir probe succeed\n");
+	return 0;
+
+err_request_pwm:
+	free_irq(gpio_to_irq(gpio_dev->gpio_rx_nr), gpio_dev);
+err_request_irq:
+	rc_unregister_device(rcdev);
+err_register_rc_device:
+err_gpio_direction_output:
+	gpio_free(pdata->gpio_tx_nr);
+err_gpio_direction_input:
+	gpio_free(pdata->gpio_rx_nr);
+err_gpio_request:
+	rc_free_device(rcdev);
+err_allocate_device:
+	kfree(gpio_dev);
+	return rc;
+}
+
+static int gpio_ir_recv_remove(struct platform_device *pdev)
+{
+	struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+	free_irq(gpio_to_irq(gpio_dev->gpio_rx_nr), gpio_dev);
+	del_timer_sync(&gpio_dev->flush_timer);
+	rc_unregister_device(gpio_dev->rcdev);
+	gpio_free(gpio_dev->gpio_rx_nr);
+	pwm_free(gpio_dev->pwm);
+	kfree(gpio_dev);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int gpio_ir_recv_suspend(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+	if (device_may_wakeup(dev))
+		enable_irq_wake(gpio_to_irq(gpio_dev->gpio_rx_nr));
+	else
+		disable_irq(gpio_to_irq(gpio_dev->gpio_rx_nr));
+
+	return 0;
+}
+
+static int gpio_ir_recv_resume(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+	if (device_may_wakeup(dev))
+		disable_irq_wake(gpio_to_irq(gpio_dev->gpio_rx_nr));
+	else
+		enable_irq(gpio_to_irq(gpio_dev->gpio_rx_nr));
+
+	return 0;
+}
+
+static const struct dev_pm_ops gpio_ir_recv_pm_ops = {
+	.suspend        = gpio_ir_recv_suspend,
+	.resume         = gpio_ir_recv_resume,
+};
+#endif
+
+static struct platform_driver gpio_ir_recv_driver = {
+	.probe  = gpio_ir_recv_probe,
+	.remove = gpio_ir_recv_remove,
+	.driver = {
+		.name   = GPIO_IR_DRIVER_NAME,
+		.owner	= THIS_MODULE,
+		.of_match_table = gpio_ir_recv_of_match,
+#ifdef CONFIG_PM
+		.pm	= &gpio_ir_recv_pm_ops,
+#endif
+	},
+};
+module_platform_driver(gpio_ir_recv_driver);
+
+MODULE_DESCRIPTION("GPIO IR Receiver driver");
+MODULE_AUTHOR("xudong@allwinnertech.com");
+MODULE_LICENSE("GPL v2");