diff -drupN a/drivers/pinctrl/sunxi/pinctrl-sun8iw8p1.c b/drivers/pinctrl/sunxi/pinctrl-sun8iw8p1.c
--- a/drivers/pinctrl/sunxi/pinctrl-sun8iw8p1.c	1970-01-01 03:00:00.000000000 +0300
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8iw8p1.c	2022-06-12 05:28:14.000000000 +0300
@@ -0,0 +1,654 @@
+/*
+ * Allwinner sun8iw8p1 SoCs pinctrl driver.
+ *
+ * Copyright (C) 2016 czy
+ *
+ * czy <chenzunyin@allwinnertech.com>
+ *
+ * Copyright (C) 2014 Jackie Hwang
+ *
+ * Jackie Hwang <huangshr@allwinnertech.com>
+ *
+ * Copyright (C) 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * Copyright (C) 2014 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-sunxi.h"
+static const struct sunxi_desc_pin sun8iw8p1_pins[] = {
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart2"),		/* TX */
+		SUNXI_FUNCTION(0x5, "vdevice"),		/* Vdevcie for test */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart2"),		/* RX */
+		SUNXI_FUNCTION(0x5, "vdevice"),		/* Vdevcie for test */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart2"),		/* RTS */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart2"),		/* CTS */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "pwm0"),		/* PWM0 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "pwm1"),		/* PWM1 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "twi0"),		/* SCK  */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "twi0"),		/* SDK */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "twi1"),		/* SCK	*/
+		SUNXI_FUNCTION(0x3, "uart0"),		/* TX	*/
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "twi1"),		/* SDA	*/
+		SUNXI_FUNCTION(0x3, "uart0"),		/* RX	*/
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "jtag0"),		/* MS0 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "jtag0"),		/* CK0 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "jtag0"),		/* DO0 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "jtag0"),		/* DI0 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)),
+
+	/* HOLE */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* CLK */
+		SUNXI_FUNCTION(0x3, "spi0"),		/* MISO */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* CMD */
+		SUNXI_FUNCTION(0x3, "spi0"),		/* CLK */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* RST */
+		SUNXI_FUNCTION(0x3, "spi0"),		/* CS */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D0 */
+		SUNXI_FUNCTION(0x3, "spi0"),		/* MOSI */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D1 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D2 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D3 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D4 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D5 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D6 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc2"),		/* D7 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+
+	/* HOLE */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* RXD3 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* RXD2 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* RXD1 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* RXD0 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* RXCK */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* RXCTL */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* NULL */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* TXD3 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* TXD2 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* TXD1 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* TXD0 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* NULL */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VP0 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* TXCK */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VN0 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* TXCTL */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VP1 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* NULL */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VN1 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* CLKIN */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VP2 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* MDC */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VN2 */
+		SUNXI_FUNCTION(0x4, "gmac0"),		/* MDIO */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VPC */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VNC */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VP3 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC */
+		SUNXI_FUNCTION(0x3, "lvds"),		/* VN3 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+
+	/* HOLE */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* VSYNC */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* CLK */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* MCLK */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* DE */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* HSYNC */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* HSYNC */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* VSYNC */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* VSYNC */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D0 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D2 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D1 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D3 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D2 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D4 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D3 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D5 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D4 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D6 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D5 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D7 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D6 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D10 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D7 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D11 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D8 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D12 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D9 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D13 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D10 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D14 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* D11 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D15 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi0"),		/* D12 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D18 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi0"),		/* D13 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D19 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi0"),		/* D14 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D20 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi0"),		/* D15 */
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D21 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi0"),		/* FIELD */
+		SUNXI_FUNCTION(0x3, "csi0"),		/* MIPI_MCLK */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* SCK */
+		SUNXI_FUNCTION(0x3, "twi1"),		/* SCK */
+		SUNXI_FUNCTION(0x4, "uart1"),		/* TX */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "csi1"),		/* SDA */
+		SUNXI_FUNCTION(0x3, "twi1"),		/* SDA */
+		SUNXI_FUNCTION(0x4, "uart1"),		/* RX */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 23),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D22 */
+		SUNXI_FUNCTION(0x4, "uart1"),		/* RTS */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 24),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x3, "lcd0"),		/* D23 */
+		SUNXI_FUNCTION(0x4, "uart1"),		/* CTS */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+
+	/* HOLE */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc0"),		/* D1 */
+		SUNXI_FUNCTION(0x3, "jtag0"),		/* MSI */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc0"),		/* D0 */
+		SUNXI_FUNCTION(0x3, "jtag0"),		/* DI1 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc0"),		/* CLK */
+		SUNXI_FUNCTION(0x3, "uart0"),		/* TX */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc0"),		/* CMD */
+		SUNXI_FUNCTION(0x3, "jtag0"),		/* DO1 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc0"),		/* D3 */
+		SUNXI_FUNCTION(0x3, "uart0"),		/* RX */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc0"),		/* D2 */
+		SUNXI_FUNCTION(0x3, "jtag0"),		/* CK1 */
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x7, "io_disable")),
+	/* HOLE */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc1"),		/* CLK */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc1"),		/* CMD */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc1"),		/* D0 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc1"),		/* D1 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc1"),		/* D2 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "sdc1"),		/* D3 */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart1"),		/* TX */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart1"),		/* RX */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart1"),		/* RX */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "uart1"),		/* RTS */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "tdm0"),		/* SYNC */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "tdm0"),		/* BCLK */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "tdm0"),		/* DOUT */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
+		SUNXI_FUNCTION(0x0, "gpio_in"),
+		SUNXI_FUNCTION(0x1, "gpio_out"),
+		SUNXI_FUNCTION(0x2, "tdm0"),		/* DIN */
+		SUNXI_FUNCTION(0x7, "io_disable"),
+		SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)),
+};
+static const unsigned sun8iw8p1_irq_bank_base[] = {
+	SUNXI_PIO_BANK_BASE(PB_BASE, 0),
+	SUNXI_PIO_BANK_BASE(PG_BASE, 1),
+};
+static const struct sunxi_pinctrl_desc sun8iw8p1_pinctrl_data = {
+	.pins = sun8iw8p1_pins,
+	.npins = ARRAY_SIZE(sun8iw8p1_pins),
+	.pin_base = 0,
+	.irq_banks = 2,
+	.irq_bank_base = sun8iw8p1_irq_bank_base,
+};
+
+static int sun8iw8p1_pinctrl_probe(struct platform_device *pdev)
+{
+	return sunxi_pinctrl_init(pdev,
+				  &sun8iw8p1_pinctrl_data);
+}
+
+static struct of_device_id sun8iw8p1_pinctrl_match[] = {
+	{ .compatible = "allwinner,sun8iw8p1-pinctrl", },
+	{}
+};
+MODULE_DEVICE_TABLE(of, sun8iw8p1_pinctrl_match);
+
+static struct platform_driver sun8iw8p1_pinctrl_driver = {
+	.probe	= sun8iw8p1_pinctrl_probe,
+	.driver	= {
+		.name		= SUNXI_PINCTRL_NAME,
+		.owner		= THIS_MODULE,
+		.of_match_table	= sun8iw8p1_pinctrl_match,
+	},
+};
+static int __init sun8iw8p1_pio_init(void)
+{
+	int ret;
+	ret = platform_driver_register(&sun8iw8p1_pinctrl_driver);
+	if (IS_ERR_VALUE(ret)) {
+		pr_debug("register sun8iw8p1 pio controller failed\n");
+		return -EINVAL;
+	}
+	return 0;
+}
+postcore_initcall(sun8iw8p1_pio_init);
+
+MODULE_AUTHOR("czy <chenzunyin@allwinnertech.com>");
+MODULE_AUTHOR("Jackie Hwang <huangshr@allwinnertech.com>");
+MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
+MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
+MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
+MODULE_DESCRIPTION("Allwinner sun8iw8p1 PIO pinctrl driver");
+MODULE_LICENSE("GPL");