/****************************************************************************** Copyright (C), 2015-2020, XM. Co., Ltd. ****************************************************************************** File Name : xm_common_isp.h Version : Initial Draft Author : XM Isp software group Created : 2015/6/27 Description : The common data type defination Function List : History : 1.Date : 2015/6/27 Author : Lycai Modification : creat ******************************************************************************/ #ifndef __XM_COMM_ISP_H__ #define __XM_COMM_ISP_H__ #include "xm_type.h" #include "xm_errno.h" #include "xm_common.h" #include "xm_isp_debug.h" #include "Camera.h" /**************************************************************************** * MACRO DEFINITION * ****************************************************************************/ #define VREG_MAX_NUM 16 #define AE_ZONE_ROW (7) #define AE_ZONE_COLUMN (7) #define LUT_FACTOR (8) #define GAMMA_FE_LUT_SIZE ((1< u8LowStart*/ XM_U16 u16HighStop; /*8000K is recommend, u16HighStop > u8HighStart*/ XM_BOOL bGreenEnhanceEn; /*If this is enabled, Green channel will be enhanced based on the area of green plant, only take effect outdoor*/ } ISP_AWB_IN_OUT_ATTR_S; typedef struct xm_ISP_AWB_CT_LIMIT_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; XM_U16 u16HighRgLimit; /*RO, in Manual Mode, user should define the Max Rgain of High Color Temperature, u16HighRgLimit > u16LowRgLimit*/ XM_U16 u16HighBgLimit; /*RO, in Manual Mode, user should define the Min Bgain of High Color Temperature, u16HighBgLimit < u16LowBgLimit*/ XM_U16 u16LowRgLimit; /*RO, in Manual Mode, user should define the Min Rgain of Low Color Temperature*/ XM_U16 u16LowBgLimit; /*RO, in Manual Mode, user should define the Max Bgain of Low Color Temperature*/ } ISP_AWB_CT_LIMIT_ATTR_S; typedef struct xm_ISP_ADV_AWB_ATTR_S { XM_BOOL bAccuPrior; /*RW, recommend 0 for outdoor, 1 for indoor*/ XM_U8 u8Tolerance; /*RW, Range:[0x0, 0xFF], AWB adjust tolerance,for outdoor, this value should be small,recomend 4*/ XM_U16 u16CurveLLimit; /*RW, Range:[0x0, 0x100], Left limit of AWB Curve, recomend for indoor 0xE0, outdoor 0xE0*/ XM_U16 u16CurveRLimit; /*RW, Range:[0x100, 0xFFF], Right Limit of AWB Curve,recomend for indoor 0x130, outdoor 0x120*/ XM_BOOL bGainNormEn; ISP_AWB_IN_OUT_ATTR_S stInOrOut; ISP_AWB_CT_LIMIT_ATTR_S stCTLimit; } ISP_ADV_AWB_ATTR_S; typedef struct xm_ISP_AWB_LIGHTSOURCE_INFO_S { XM_U16 u16WhiteRgain; /*G/R of White points at this light source*/ XM_U16 u16WhiteBgain; /*G/B of White points at this light source*/ XM_U16 u16ExpQuant; /*shtter time * again * dgain >> 4, Not support Now*/ XM_BOOL bLightStatus; /*RW, 0: idle 1:busy */ } ISP_AWB_LIGHTSOURCE_INFO_S; typedef struct xm_ISP_AWB_ADD_LIGHTSOURCE_S { XM_BOOL bLightEnable; /*Enable special light source function*/ ISP_AWB_LIGHTSOURCE_INFO_S stLightInfo[LIGHTSOURCE_NUM]; } ISP_AWB_ADD_LIGHTSOURCE_S; typedef struct xm_ISP_WB_ZONE_STA_INFO_S { XM_U16 u16Rg; /*RO, Zoned WB output G/R, Range : [0x0, 0xFFF]*/ XM_U16 u16Bg; /*RO, Zoned WB output G/B, Range : [0x0, 0xFFF]*/ XM_U32 u32Sum; /*RO, Zoned WB output population,Range: [0x0, 0xFFFFFFFF]*/ } ISP_WB_ZONE_STA_INFO_S; typedef struct xm_ISP_WB_STA_INFO_S { XM_U16 u16WhiteLevel; /*RW, Upper limit of valid data for white region, Range: [0x0, 0xFFFF]*/ XM_U16 u16BlackLevel; /*RW, Lower limit of valid data for white region, Range: [0x0, u16WhiteLevel)*/ XM_U16 u16CbMax; /*RW, Maximum value of B/G for white region, Range: [0x0,0xFFF]*/ XM_U16 u16CbMin; /*RW, Minimum value of B/G for white region, Range: [0x0, u16CbMax)*/ XM_U16 u16CrMax; /*RW, Maximum value of R/G for white region, Range: [0x0, 0xFFF]*/ XM_U16 u16CrMin; /*RW, Minimum value of R/G for white region, Range: [0x0, u16CrMax)*/ XM_U16 u16GRgain; /*RO, Global WB output G/R, Range: [0x0, 0xFFFF]*/ XM_U16 u16GBgain; /*RO, Global WB output G/B, Range: [0x0, 0xFFFF]*/ XM_U32 u32GSum; /*RO, Global WB output population, Range: [0x0, 0xFFFF]*/ XM_U32 u32Rgain; /*RO, gain value of R channel for AWB, Range: [0x0, 0xFFF]*/ XM_U32 u32Ggain; /*RO, gain value of G channel for AWB, Range: [0x0, 0xFFF]*/ XM_U32 u32Bgain; /*RO, gain value of B channel for AWB, Range: [0x0, 0xFFF]*/ ISP_WB_ZONE_STA_INFO_S stZoneSta[AE_ZONE_ROW][AE_ZONE_COLUMN]; /*RO, Zoned WB statistics*/ } ISP_WB_STA_INFO_S; typedef struct xm_ISP_MWB_ATTR_S { XM_U16 u16Rgain; /*RW, Multiplier for R color channel, Range: [0x0, 0xFFF]*/ XM_U16 u16Ggain; /*RW, Multiplier for G color channel, Range: [0x0, 0xFFF]*/ XM_U16 u16Bgain; /*RW, Multiplier for B color channel, Range: [0x0, 0xFFF]*/ } ISP_MWB_ATTR_S; // CCM typedef struct xmISP_COLORMATRIX_AUTO_S { XM_U16 u16HighColorTemp; /*RW, Range: [u16MidColorTemp + 400, 10000]*/ XM_U16 au16HighCCM[12]; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16MidColorTemp; /*RW, the MidColorTemp should be at least 400 smaller than HighColorTemp, Range: [u16LowColorTemp + 400, u16HighColorTemp-400]*/ XM_U16 au16MidCCM[12]; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16LowColorTemp; /*RW, the LowColorTemp should be at least 400 smaller than HighColorTemp, Range: [0, u16MidColorTemp-400]*/ XM_U16 au16LowCCM[12]; /*RW, Range: [0x0, 0xFFFF]*/ } ISP_COLORMATRIX_AUTO_S; typedef struct xmISP_COLORMATRIX_MANUAL_S { XM_U16 au16CCM[12]; /*RW, Range: [0x0, 0xFFFF]*/ } ISP_COLORMATRIX_MANUAL_S; typedef struct xmISP_COLORMATRIX_ATTR_S { XM_BOOL bByPass; ISP_OP_TYPE_E enOpType; ISP_COLORMATRIX_MANUAL_S stManual; ISP_COLORMATRIX_AUTO_S stAuto; } ISP_COLORMATRIX_ATTR_S; typedef struct xm_ISP_COLORTONE_S { XM_U16 u16RedCastGain; /*RW, Range: [0x100, 0xFFFF], adjust the final red channel tone of the picture */ XM_U16 u16GreenCastGain; /*RW, Range: [0x100, 0xFFFF], adjust the final green channel tone of the picture*/ XM_U16 u16BlueCastGain; /*RW, Range: [0x100, 0xFFFF], adjust the final blue channel tone of the picture*/ }ISP_COLORTONE_S; typedef enum xm_ISP_SAT_MODE_E { SAT_MODE_NOISE = 0, // Lower Noise SAT_MODE_COLOR = 1, // Better Color SAT_MODE_BUTT } ISP_SAT_MODE_E; typedef struct xmISP_SATURATION_AUTO_S { XM_U8 au8Sat[ISP_AUTO_STENGTH_NUM]; /*RW, Range: [0, 0xFF] */ }ISP_SATURATION_AUTO_S; typedef struct xmISP_SATURATION_MANUAL_S { XM_U8 u8Saturation; }ISP_SATURATION_MANUAL_S; typedef struct xmISP_SATURATION_ATTR_S { ISP_SAT_MODE_E enSatMode; ISP_OP_TYPE_E enOpType; ISP_SATURATION_MANUAL_S stManual; ISP_SATURATION_AUTO_S stAuto; }ISP_SATURATION_ATTR_S; typedef enum xm_ISP_IRIS_TYPE_E { ISP_IRIS_DC_TYPE = 0, ISP_IRIS_P_TYPE, ISP_IRIS_TYPE_BUTT, } ISP_IRIS_TYPE_E; typedef struct xm_ISP_MI_ATTR_S { XM_BOOL bEnable; /* manual iris on/off*/ XM_U32 u32IrisHoldValue; /*RW, iris hold value, Range: [0x0, 0x3E8]*/ XM_U16 u16ApePercent; /* the percent of the iris's aperture, range is [0~100]. */ } ISP_MI_ATTR_S; typedef struct xmISP_DRC_MANUAL_ATTR_S { XM_U8 u8Strength; }ISP_DRC_MANUAL_ATTR_S; typedef struct xmISP_DRC_AUTO_ATTR_S { XM_U8 au8Sth[ISP_AUTO_STENGTH_NUM]; /*RW, Range: [0, 0xFF] */ }ISP_DRC_AUTO_ATTR_S; #define DRC_IDX_NUM (22) typedef struct xm_ISP_DRC_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; XM_U8 u8GlobalSth; ISP_DRC_MANUAL_ATTR_S stManual; ISP_DRC_AUTO_ATTR_S stAuto; XM_U16 au16ToneMappingValue[DRC_IDX_NUM]; /*RW, Range: [0x0, 0xffff] */ } ISP_DRC_ATTR_S; typedef enum xmISP_STATIC_DP_TYPE_E{ ISP_STATIC_DP_BRIGHT = 0x0, ISP_STATIC_DP_DARK, ISP_STATIC_DP_BUTT } ISP_STATIC_DP_TYPE_E; typedef struct xmISP_DYDPC_AUTO_S { XM_U8 au8Sth[ISP_AUTO_STENGTH_NUM]; /*RW, Range: [0, 0xFF] */ }ISP_DYDPC_AUTO_S; typedef struct xmISP_DYDPC_MANUAL_S { XM_U8 u8Sth; }ISP_DYDPC_MANUAL_S; typedef struct xmISP_DYDPC_ATTR_S { ISP_OP_TYPE_E enOpType; ISP_DYDPC_MANUAL_S stManual; ISP_DYDPC_AUTO_S stAuto; }ISP_DYDPC_ATTR_S; typedef struct xmISP_STDPC_ATTR_S { // StaticDpc XM_BOOL bEnableStatic; XM_BOOL bEnableDetect; ISP_STATIC_DP_TYPE_E enStaticDPType; /* Select static bright/dark defect-pixel calibration. */ ISP_TRIGGER_STATUS_E enTriggerStatus; /*R status of bad pixel trigger*/ XM_U16 u16BadPixelThreshMin; /*RW, Range: [0, 0xFFF] */ XM_U16 u16BadPixelThreshMax; /*RW, Range: [0, 0xFFF] */ XM_U16 u16BadPixelThresh; /*R Range: [0, 0xFFF] */ XM_U16 u16BadPixelCountMax; /*RW, limit of max number of bad pixel, Range: [0, 0x3FF] */ XM_U16 u16BadPixelCount; /*R DP count:[0, 0x3FF]*/ XM_U16 u16BadPixelTriggerTime; /*RW, time limit for bad pixel trigger, in frame number ,Range: [0x0, 0x640]*/ XM_U32 u32BadPixelTable[STATIC_DP_COUNT_MAX]; /*RW, Range: [0x0, 0x3FFFFF],the first 11 bits represents the X coordinate of the defect pixel, the second 11 bits represent the Y coordinate of the defect pixel*/ } ISP_STDPC_ATTR_S; typedef struct xmISP_SRAMDPC_ATTR_S { XM_U16 u16SbpcHighThr; XM_U16 u16SbpcLowThr; XM_U16 u16SbpcPixelCount; XM_U32* u16SbpcPdataaddr; } ISP_SRAMDPC_ATTR_S; typedef struct xmISP_FPN_ATTR_S { XM_U8 u8FpnBayerSel; XM_U16 u16FpnCpuAddr; XM_U32 u16FpnCpuData; } ISP_FPN_ATTR_S; typedef struct xmISP_FPN_SAINFO_S { XM_U32 fpn_enable; XM_U32 fpn_sensor_id; RECT_S fpn_stWndRect; }ISP_FPN_SAINFO_S; typedef struct xm_ISP_DIS_ATTR_S { XM_BOOL bEnable; } ISP_DIS_ATTR_S; typedef struct xm_ISP_DIS_INFO_S { XM_S8 s8Xoffset; /*RW, Range: [0x00, 0x80]*/ XM_S8 s8Yoffset; /*RW, Range: [0x80, 0xFF]*/ } ISP_DIS_INFO_S; typedef struct xm_ISP_SHADING_ATTR_S { XM_BOOL Enable; } ISP_SHADING_ATTR_S; typedef struct xm_ISP_SHADINGTAB_S { XM_U16 u16ShadingCenterR_X; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingCenterR_Y; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingCenterG_X; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingCenterG_Y; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingCenterB_X; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingCenterB_Y; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingTable_R[SHADING_TABLE_NODE_NUMBER_MAX]; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingTable_G[SHADING_TABLE_NODE_NUMBER_MAX]; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingTable_B[SHADING_TABLE_NODE_NUMBER_MAX]; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingOffCenter_R; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingOffCenter_G; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingOffCenter_B; /*RW, Range: [0x0, 0xFFFF]*/ XM_U16 u16ShadingTableNodeNumber; /*RW, Range: [0x0, SHADING_TABLE_NODE_NUMBER_MAX]*/ } ISP_SHADINGTAB_S; typedef struct xm_ISP_DENOISE_ATTR_S { XM_BOOL bEnable; XM_BOOL bManualEnable; XM_U8 u8ThreshTarget; /*RW, Noise reduction effect for high spacial frequencies Range: [0x0, u8ThreshTarget]*/ XM_U8 u8ThreshMax; /*RW, Noise reduction effect for high spacial frequencies, Range: [0x0, 0xFF] */ XM_U8 u8SnrThresh[8]; /*RW, Noise reduction target value array for different iso, Range: [0x0, 0xFF],*/ } ISP_DENOISE_ATTR_S; typedef enum xm_ISP_GAMMA_CURVE_E { ISP_GAMMA_CURVE_1_6 = 0x0, /* 1.6 Gamma curve */ ISP_GAMMA_CURVE_1_8 = 0x1, /* 1.8 Gamma curve */ ISP_GAMMA_CURVE_2_0 = 0x2, /* 2.0 Gamma curve */ ISP_GAMMA_CURVE_2_2 = 0x3, /* 2.2 Gamma curve */ ISP_GAMMA_CURVE_DEFAULT = 0x4, /* default Gamma curve */ ISP_GAMMA_CURVE_SRGB = 0x5, ISP_GAMMA_CURVE_USER_DEFINE = 0x6, /* user defined Gamma curve, Gamma Table must be correct */ ISP_GAMMA_CURVE_BUTT } ISP_GAMMA_CURVE_E; typedef struct xm_ISP_GAMMA_ATTR_S { XM_BOOL bEnable; ISP_GAMMA_CURVE_E enCurveType; XM_U16 u16Table[GAMMA_NODE_NUMBER]; } ISP_GAMMA_ATTR_S; typedef struct xm_ISP_PARA_REC_S { XM_BOOL bInit; XM_BOOL bTmCfg; XM_BOOL bAttrCfg; ISP_INPUT_TIMING_S stInputTiming; ISP_IMAGE_ATTR_S stImageAttr; XM_U32 u32ModFlag; /* Exposure */ ISP_OP_TYPE_E enExpType; ISP_AE_ATTR_S stAEAttr; ISP_ME_ATTR_S stMEAttr; /* White Balance */ ISP_OP_TYPE_E enWBType; ISP_AWB_ATTR_S stAWBAttr; ISP_MWB_ATTR_S stMWBAttr; } ISP_PARA_REC_S; /*Crosstalk Removal*/ typedef struct xm_ISP_CR_ATTR_S { XM_BOOL bEnable; XM_U8 u8Strength[8]; /*Range: [0x0, 0xFF] */ XM_U8 u8Sensitivity; /*Range: [0x0, 0xFF],this register is not recommended to change */ XM_U16 u16Threshold; /*Range: [0x0, 0xFFFF],this register is not recommended to change */ XM_U16 u16Slope; /*Range: [0x0, 0xFFFF],this register is not recommended to change */ }ISP_CR_ATTR_S; typedef struct xm_ISP_ANTIFOG_S { XM_BOOL bEnable; XM_U8 u8Strength; /*Range: [0x0, 0xFF]*/ } ISP_ANTIFOG_S; typedef struct xm_ISP_ANTI_FALSECOLOR_S { XM_BOOL bEnable; XM_U8 u8Strength; /* Range: [0x0, 0xFF], the recommended range is [0x0, 0x95], the normal * color will gradually be eroded when this register is larger than 0x95. */ } ISP_ANTI_FALSECOLOR_S; /*users query ISP state information*/ typedef struct xm_ISP_INNER_STATE_INFO_S { XM_U32 u32ExposureTime; /* RO, Range: [0x0, 0xFFFF] */ XM_U32 u32AnalogGain; /* RO,Range: [0x0, 0xFFFF] */ XM_U32 u32DigitalGain; /* RO,Range: [0x0, 0xFFFF] */ XM_U32 u32IspDGain; /* RO,Range: [0x0, 0xFFFF] */ XM_U32 u32Exposure; /* RO,Range: [0x0, 0xFFFFFFFF] */ XM_U32 u32AllGain; XM_U16 u16AE_Hist16Value[16]; /* RO, 256 bins histogram */ XM_U8 u8LumError; XM_U8 u8AveLum; /* RO, Range: [0x0, 0xFF] */ XM_BOOL bExposureIsMAX; }ISP_INNER_STATE_INFO_S; /*Demosaic Attr*/ typedef struct xm_ISP_DEMOSAIC_ATTR_S { XM_U8 u8VhSlope; /*RW,Range: [0x0, 0xFF] */ XM_U8 u8AaSlope; /*RW,Range: [0x0, 0xFF] */ XM_U8 u8VaSlope; /*RW,Range: [0x0, 0xFF] */ XM_U8 u8UuSlope; /*RW,Range: [0x0, 0xFF] */ XM_U16 u16VhThresh; /*RW,Range: [0x0, 0xFFFF] */ XM_U16 u16AaThresh; /*RW,Range: [0x0, 0xFFFF] */ XM_U16 u16VaThresh; /*RW,Range: [0x0, 0xFFFF] */ XM_U16 u16UuThresh; /*RW,Range: [0x0, 0xFFFF] */ XM_U8 u8DemosaicConfig; /*RW,Range: [0x0, 0xFF] */ XM_U8 u8LumThresh[8]; /*RW, Range:[0x0, 0xFF] */ XM_U8 u8NpOffset[8]; /*RW, Range:[0x0, 0xFF] */ }ISP_DEMOSAIC_ATTR_S; typedef struct xmISP_BLACKLVL_AUTO_S { XM_U16 au16Blc[ISP_AUTO_STENGTH_NUM]; /*RW, Range: [0, 0xFFFF] */ }ISP_BLACKLVL_AUTO_S; typedef struct xmISP_BLACKLVL_MANUAL_S { XM_U16 u16Blc; }ISP_BLACKLVL_MANUAL_S; typedef struct xmISP_BLACKLVL_ATTR_S { ISP_OP_TYPE_E enOpType; ISP_BLACKLVL_MANUAL_S stManual; ISP_BLACKLVL_AUTO_S stAuto; }ISP_BLACKLVL_ATTR_S; /*ISP debug information*/ typedef struct xm_ISP_DEBUG_INFO_S { XM_BOOL bDebugEn; /*RW, 1:enable debug, 0:disable debug*/ XM_U32 u32PhyAddr; /*RW, phy address of debug info */ XM_U32 u32Depth; /*RW, depth of debug info */ } ISP_DEBUG_INFO_S; typedef struct xm_ISP_DBG_ATTR_S { XM_U32 u32Rsv; /* need to add member */ } ISP_DBG_ATTR_S; typedef struct xm_ISP_DBG_STATUS_S { XM_U32 u32FrmNumBgn; XM_U32 u32Rsv; /* need to add member */ XM_U32 u32FrmNumEnd; } ISP_DBG_STATUS_S; typedef struct xm_ISP_VD_INFO_S { XM_U32 u32Reserved; /*RO, Range: [0x0, 0xFFFFFFFF] */ }ISP_VD_INFO_S; typedef struct xm_ISP_REG_ATTR_S { XM_U32 u32IspRegAddr; XM_U32 u32IspRegSize; XM_U32 u32IspExtRegAddr; XM_U32 u32IspExtRegSize; XM_U32 u32AeExtRegAddr; XM_U32 u32AeExtRegSize; XM_U32 u32AwbExtRegAddr; XM_U32 u32AwbExtRegSize; } ISP_REG_ATTR_S; typedef struct xmISP_EXPOSURE_ATTR_S { XM_BOOL bByPass; ISP_OP_TYPE_E enOpType; ISP_ME_ATTR_S stManual; ISP_AE_ATTR_S stAuto; } ISP_EXPOSURE_ATTR_S; typedef struct xmISP_WB_ATTR_S { XM_BOOL bByPass; ISP_OP_TYPE_E enOpType; ISP_MWB_ATTR_S stManual; ISP_AWB_ATTR_S stAuto; } ISP_WB_ATTR_S; typedef enum xmISP_STATE_E { ISP_STATE_INIT = 0, ISP_STATE_SUCCESS = 1, ISP_STATE_TIMEOUT = 2, ISP_STATE_BUTT } ISP_STATUS_E; typedef struct xmISP_AI_CALIBRATE_S { XM_BOOL bEnable; /*iris calibration on/off*/ XM_U16 u16StopValue; /*RW, the initial stop value for AI calibraiton, Range: [0x0,0x3E8]*/ XM_U16 u16CloseValue; /*RW, the drive value to close Iris, Range: [0x0,0x3E8], Recommended value: [700, 900]. A larger value means faster.*/ XM_U16 u16CalibrateTime; /*RW, frame numbers of AI calibraiton lasting time. > 600, [0x0, 0xFFF]*/ XM_U8 u8InertiaValue; /*RW, frame numbers of AI moment of inertia, Range: [0x0, 0xFF],the recommended value is between[0x3, 0xa]*/ XM_U32 u32HoldValue; /*RO, Range: [0x0, 0x3E8], iris hold value*/ ISP_STATUS_E enStatus; /*RO, status of calibraiton*/ } ISP_AI_CALIBRATE_S; typedef struct xmISP_AI_ATTR_S { XM_U32 u32HoldValue; /*RW, Range: [0x0, 0x3E8], iris hold value*/ } ISP_AI_ATTR_S; typedef struct xmISP_IRIS_ATTR_S { XM_BOOL bEnable; /* iris enable/disable */ ISP_OP_TYPE_E enOpType; ISP_IRIS_STATUS_E enIrisStatus; /*RW, status of Iris*/ ISP_AI_ATTR_S stAIAttr; ISP_MI_ATTR_S stMIAttr; } ISP_IRIS_ATTR_S; typedef struct xmISP_SHARPEN_MANUAL_ATTR_S { XM_U8 u8SharpenD; /* RW, Range:[0, 0xFF]. */ // _H XM_U8 u8SharpenUd; /* RW, Range:[0, 0xFF]. */ // _M XM_U8 u8SharpenKd; } ISP_SHARPEN_MANUAL_ATTR_S; typedef struct xmISP_SHARPEN_AUTO_ATTR_S { XM_U8 u8GlobalSth; // [0, 0xFF] XM_U8 au8SharpenD[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0, 0xFF]. */ // _H XM_U8 au8SharpenUd[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0, 0xFF]. */ // _M XM_U8 au8SharpenKd[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0, 0xFF]. */ } ISP_SHARPEN_AUTO_ATTR_S; typedef struct xmISP_SHARPEN_SCANBLE_ATTR_S { XM_U8 enScanD; }ISP_SHARPEN_SCANBLE_ATTR_S; typedef struct xmISP_SHARPEN_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_SHARPEN_SCANBLE_ATTR_S stScan; ISP_SHARPEN_MANUAL_ATTR_S stManual; ISP_SHARPEN_AUTO_ATTR_S stAuto; } ISP_SHARPEN_ATTR_S; typedef struct xmISP_SHARPENV2_MANUAL_ATTR_S { XM_U8 u8TextureThr; XM_U8 u8SharpenD; /* RW, Range:[0, 0xFF]. */ // _H XM_U8 u8SharpenUd; /* RW, Range:[0, 0xFF]. */ // _M XM_U8 u8SharpenKd; XM_U8 u8DetailThr; XM_U8 u8DetailCtrl; } ISP_SHARPENV2_MANUAL_ATTR_S; typedef struct xmISP_SHARPENV2_AUTO_ATTR_S { XM_U8 u8GlobalSth; // [0, 0xFF] XM_U8 au8TextureThr[ISP_AUTO_STENGTH_NUM]; XM_U8 au8SharpenD[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0, 0xFF]. */ // _H XM_U8 au8SharpenUd[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0, 0xFF]. */ // _M XM_U8 au8SharpenKd[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0, 0xFF]. */ XM_U8 au8DetailThr[ISP_AUTO_STENGTH_NUM]; XM_U8 au8DetailCtrl[ISP_AUTO_STENGTH_NUM]; } ISP_SHARPENV2_AUTO_ATTR_S; typedef struct xmISP_SHARPENV2_ATTR_S { XM_U8 u8AlgChoice; // 0:Use V1 1:Use V2 XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_SHARPENV2_MANUAL_ATTR_S stManual; ISP_SHARPENV2_AUTO_ATTR_S stAuto; } ISP_SHARPENV2_ATTR_S; typedef struct xmISP_2DNR_MANUAL_ATTR_S { XM_U8 u8Thresh; /* RW, Range: [0x0, 0xFF]. Noise reduction effect for high spacial frequencies. */ } ISP_2DNR_MANUAL_ATTR_S; typedef struct xmISP_2DNR_AUTO_ATTR_S { XM_U8 u8GlobalSth; // [0, 0xFF] XM_U8 au8Thresh[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0x0, 0xFF]. Noise reduction target value array for different ISO. */ } ISP_2DNR_AUTO_ATTR_S; typedef struct xmISP_YCNR_MANUAL_ATTR_S { XM_U8 u8Thresh; /* RW, Range: [0x0, 0xFF]. Noise reduction effect for high spacial frequencies. */ } ISP_YCNR_MANUAL_ATTR_S; typedef struct xmISP_YCNR_AUTO_ATTR_S { XM_U8 au8Thresh[ISP_AUTO_STENGTH_NUM]; /* RW, Range: [0x0, 0xFF]. Noise reduction target value array for different ISO. */ } ISP_YCNR_AUTO_ATTR_S; typedef struct xmISP_3DNR_MANUAL_ATTR_S { XM_U8 u8TfStrength; XM_U8 u8SfStrength; } ISP_3DNR_MANUAL_ATTR_S; typedef struct xmISP_3DNR_AUTO_ATTR_S { XM_U8 u8GlobalSth; // [0, 0xFF] XM_U8 au8TfStrength[ISP_AUTO_STENGTH_NUM]; XM_U8 au8SfStrength[ISP_AUTO_STENGTH_NUM]; } ISP_3DNR_AUTO_ATTR_S; typedef struct xmISP_2DNR_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_2DNR_MANUAL_ATTR_S stManual; ISP_2DNR_AUTO_ATTR_S stAuto; } ISP_2DNR_ATTR_S; typedef struct xmISP_YCNR_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_YCNR_MANUAL_ATTR_S stManual; ISP_YCNR_AUTO_ATTR_S stAuto; } ISP_YCNR_ATTR_S; typedef struct xmISP_3D_RGB_Y { ISP_OP_TYPE_E enOpType; XM_U16 Manual_RgbY; XM_U16 Auto_RgbY; } ISP_3DRGB_Y_RATIO; typedef struct xmISP_3DNR_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_3DNR_MANUAL_ATTR_S stManual; ISP_3DNR_AUTO_ATTR_S stAuto; ISP_3DRGB_Y_RATIO stRgbYamp; } ISP_3DNR_ATTR_S; typedef struct xmISP_NR_INFO_S { XM_U8 au8Nr[4]; } ISP_NR_INFO_S; typedef struct xmISP_3DNRV2_MANUAL_ATTR_S { #if 0 XM_U8 u8MdTh; // 动静判决阈值 v XM_U8 u8TfStrength_S; // 静止区域时域 v XM_U8 u8TfStrength_M; // 运动区域时域 XM_U8 u8SfStrength_S; // 静止区域空域 XM_U8 u8SfStrength_M; // 运动区域空域 v #else XM_U8 u8MdTh; // 动静判决阈值 XM_U8 u8TfOfst_S; // 静止区域时域增强 XM_U8 u8TfStrength; // 等同V1 XM_U8 u8SfStrength; // 等同V1 XM_U8 u8Rsv; // 保留 #endif } ISP_3DNRV2_MANUAL_ATTR_S; typedef struct xmISP_3DNRV2_AUTO_ATTR_S { #if 0 XM_U8 u8GlobalSth; // [0, 0xFF] XM_U8 au8MdTh[ISP_AUTO_STENGTH_NUM]; // 动静判决阈值 v XM_U8 au8TfStrength_S[ISP_AUTO_STENGTH_NUM]; // 静止区域时域 v XM_U8 au8TfStrength_M[ISP_AUTO_STENGTH_NUM]; // 运动区域时域 XM_U8 au8SfStrength_S[ISP_AUTO_STENGTH_NUM]; // 静止区域空域 XM_U8 au8SfStrength_M[ISP_AUTO_STENGTH_NUM]; // 运动区域空域 v #else XM_U8 u8GlobalSth; // [0, 0xFF] XM_U8 au8MdTh[ISP_AUTO_STENGTH_NUM]; // 动静判决阈值 XM_U8 au8TfOfst_S[ISP_AUTO_STENGTH_NUM]; // 静止区域时域增强 XM_U8 au8TfStrength[ISP_AUTO_STENGTH_NUM]; // 等同V1 XM_U8 au8SfStrength[ISP_AUTO_STENGTH_NUM]; // 等同V1 XM_U8 au8Rsv[ISP_AUTO_STENGTH_NUM]; // 保留 #endif } ISP_3DNRV2_AUTO_ATTR_S; typedef struct xmISP_3DNRV2_ATTR_S { XM_U8 u8AlgChoice; // 0:Use 3DNrV1 1:Use 3DNrV2 XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_3DNRV2_MANUAL_ATTR_S stManual; ISP_3DNRV2_AUTO_ATTR_S stAuto; } ISP_3DNRV2_ATTR_S; typedef union xmISP_MODULE_CTRL_U { XM_U32 u32Key; struct { XM_U32 bitBypassVideoTest : 1 ; /* [0] */ XM_U32 bitBypassDPC : 1 ; /* [1] */ XM_U32 bitBypassBlc : 1 ; /* [2] */ XM_U32 bitBypassGammaFe : 1 ; /* [3] */ XM_U32 bitBypassShading : 1 ; /* [4] */ XM_U32 bitBypassWBGain : 1 ; /* [5] */ XM_U32 bitBypassNR2D : 1 ; /* [6] */ XM_U32 bitBypassNR3D : 1 ; /* [7] */ XM_U32 bitBypassDRC : 1 ; /* [8] */ XM_U32 bitBypassColorMatrix: 1 ; /* [9] */ XM_U32 bitBypassGamma : 1 ; /* [10] */ XM_U32 bitDemoire : 1 ; /* [11] */ XM_U32 bitCC : 1 ; /* [12] */ XM_U32 bitBypassSharpen : 1 ; /* [13] */ XM_U32 bitRsv1 : 1 ; /* [14] */ XM_U32 bitRsv2 : 1 ; /* [15] */ XM_U32 bit2Rsv3 : 2 ; /* [16:17] */ XM_U32 bit2Rsv4 : 2 ; /* [18:19] */ XM_U32 bit11Rsv5 : 11; /* [20:30] */ XM_U32 bitBypassAll : 1 ; /* [31] */ }; }ISP_MODULE_CTRL_U; typedef struct xmISP_WB_INFO_S { XM_U16 u16Rgain; /*RO, AWB result of R color channel, Range: [0x0, 0xFFF]*/ XM_U16 u16Ggain; /*RO, AWB result of Gr color channel, Range: [0x0, 0xFFF]*/ XM_U16 u16Bgain; /*RO, AWB result of B color channel, Range: [0x0, 0xFFF]*/ XM_U16 u16Saturation; /*RO, Current saturation, Range:[0x0, 0xFF]*/ XM_U16 u16ColorTemp; /*RO, Detect color temperature, maybe out of color cemeprature range*/ XM_U16 au16CCM[12]; /*RO, Current color correction matrix*/ XM_U8 u8RbOfst; XM_U8 u8GmOfst; }ISP_WB_INFO_S; typedef struct xmISP_WB_INFO_S_V2 { XM_U16 u16Rgain; XM_U16 u16Ggain; XM_U16 u16Bgain; }ISP_WB_INFO_S_V2; #if 0 typedef enum xmISP_CSC_TYPE_E { ISP_CSC_TYPE_601 = 0, /* CSC Type: 601 */ ISP_CSC_TYPE_709, /* CSC Type: 709 */ ISP_CSC_TYPE_BUTT, } ISP_CSC_TYPE_E; #endif typedef struct xmISP_CSC_MANUAL_ATTR_S { XM_U8 u8LumaVal; /* Luminance: [0 ~ 100] */ XM_U8 u8ContrVal; /* Contrast: [0 ~ 100] */ XM_U8 u8HueVal; /* Hue: [0 ~ 100] */ XM_U8 u8SatuVal; /* Satuature: [0 ~ 100] */ }ISP_CSC_MANUAL_ATTR_S; typedef struct xmISP_CSC_AUTO_ATTR_S { XM_U8 au8LumaVal[ISP_AUTO_STENGTH_NUM]; /* Luminance: [0 ~ 100] */ XM_U8 au8ContrVal[ISP_AUTO_STENGTH_NUM]; /* Contrast: [0 ~ 100] */ XM_U8 au8HueVal[ISP_AUTO_STENGTH_NUM]; /* Hue: [0 ~ 100] */ XM_U8 au8SatuVal[ISP_AUTO_STENGTH_NUM]; /* Satuature: [0 ~ 100] */ }ISP_CSC_AUTO_ATTR_S; typedef struct xmISP_CSC_STATE_ATTR_S { XM_U8 u8LumaVal; /* Luminance: [0 ~ 100] */ XM_U8 u8ContrVal; /* Contrast: [0 ~ 100] */ XM_U8 u8HueVal; /* Hue: [0 ~ 100] */ XM_U8 u8SatuVal; /* Satuature: [0 ~ 100] */ }ISP_CSC_STATE_S; typedef struct xmISP_CSC_ATTR_S { // ISP_CSC_TYPE_E enCscType; /* 601 or 709 */ XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_CSC_MANUAL_ATTR_S stManual; ISP_CSC_AUTO_ATTR_S stAuto; ISP_CSC_STATE_S stState; } ISP_CSC_ATTR_S; typedef struct xmISP_CHN_ATTR_S { XM_BOOL bMode; // 0:Sensor 1: Isp XM_BOOL bMirror; /*mirror enable*/ XM_BOOL bFlip; /*flip enable*/ // XM_S32 s32SrcFrameRate; /* source frame rate */ // XM_S32 s32DstFrameRate; /* dest frame rate */ }ISP_CHN_ATTR_S; typedef struct xm_ISP_CHROMA_ATTR_S { XM_BOOL bEnable; XM_U16 u16OfstMg; XM_U16 u16OfstR; XM_U16 u16OfstYe; XM_U16 u16OfstG; XM_U16 u16OfstCy; XM_U16 u16OfstB; XM_U8 u8SthMg; XM_U8 u8SthR; XM_U8 u8SthYe; XM_U8 u8SthG; XM_U8 u8SthCy; XM_U8 u8SthB; }ISP_CHROMA_ATTR_S; typedef struct xmISP_DEFOG_MANUAL_ATTR_S { XM_U8 u8Strength; }ISP_DEFOG_MANUAL_ATTR_S; typedef struct xmISP_DEFOG_AUTO_ATTR_S { XM_U8 au8Sth[ISP_AUTO_STENGTH_NUM]; /*RW, Range: [0, 0xFF] */ }ISP_DEFOG_AUTO_ATTR_S; typedef struct xmISP_DEFOG_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_DEFOG_MANUAL_ATTR_S stManual; ISP_DEFOG_AUTO_ATTR_S stAuto; XM_U8 u8GlobalSth; XM_BOOL bUserLutEnable; /*RW,Range:[0,1],0:Auto Lut 1:User Lut*/ XM_U8 au8DefogLut[65]; }ISP_DEFOG_ATTR_S; typedef struct xmISP_DCI_MANUAL_ATTR_S { XM_U8 u8Strength; }ISP_DCI_MANUAL_ATTR_S; typedef struct xmISP_DCI_AUTO_ATTR_S { XM_U8 au8Sth[ISP_AUTO_STENGTH_NUM]; /*RW, Range: [0, 0xFF] */ }ISP_DCI_AUTO_ATTR_S; typedef struct xmISP_DCI_ATTR_S { XM_BOOL bEnable; ISP_OP_TYPE_E enOpType; ISP_DCI_MANUAL_ATTR_S stManual; ISP_DCI_AUTO_ATTR_S stAuto; }ISP_DCI_ATTR_S; //注册场中断回调函数 typedef struct xmISP_VSYNC_CALBAK_S { XM_U8 u8Mode; // 0: 处在Vsync流程最后 1:处在Vsync流程最前 XM_S32(*pfn_vsync_deal_0)(XM_VOID); XM_S32(*pfn_vsync_deal_1)(XM_VOID); XM_S32(*pfn_vsync_deal_2)(XM_VOID); XM_S32(*pfn_vsync_deal_3)(XM_VOID); }ISP_VSYNC_CALBAK_S; typedef struct xmISP_WB_BAYER_STATISTICS_S { XM_U16 u16ZoneSizeRow; XM_U16 u16ZoneSizeColumn; const XM_U16 *pau16ZoneR; const XM_U16 *pau16ZoneG; const XM_U16 *pau16ZoneB; const XM_U32 *pau32ChosenP; // 16*int (水平低位为左) const XM_U8 *pau8SatP; } ISP_WB_BAYER_STATISTICS_S; typedef struct xm_ISP_SNAP_S { XM_U8 u8Start; // 1: Start XM_U8 u8Mode; XM_U16 u16Hight; XM_U16 u16Width; XM_U16 au16StartH[3]; // L R Normal XM_U32 u32BufAddrY; XM_U32 u32BufAddrC; XM_U32 au32Rsv[2]; XM_S32 (*pfn_callback)(XM_S32); } ISP_SNAP_S; #endif /* __XM_COMM_ISP_H__ */