[MAP] path_1 = 1 #Path 1 Enable path_2 = 1 #Path 2 Enable path_3 = 0 #Path 3 Disable path_4 = 1 #Path 4 Enable path_5 = 1 #Path 5 Enable path_6 = 0 #Path 6 Disable path_7 = 0 #Path 7 Disable path_8 = 0 #Path 8 Disable [PRESET] id_0_expt_time = 10000 #10000us id_0_gain_ratio = 1000 #1x gain id_1_expt_time = 10000 #10000us id_1_gain_ratio = 1000 #1x gain id_3_expt_time = 10000 #10000us id_3_gain_ratio = 1000 #1x gain id_4_expt_time = 10000 #10000us id_4_gain_ratio = 1000 #1x gain [DIRECTION] id_0_mirror = 1 #mirror id_0_flip = 0 #no flip id_1_mirror = 1 #mirror id_1_flip = 0 #no flip id_3_mirror = 1 #mirror id_3_flip = 0 #no flip id_4_mirror = 1 #mirror id_4_flip = 0 #no flip [POWER] id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_0_rst_time = 1 #1ms id_0_stable_time = 1 #1ms id_1_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK id_1_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_1_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_1_rst_time = 1 #1ms id_1_stable_time = 1 #1ms id_3_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK id_3_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_3_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_3_rst_time = 1 #1ms id_3_stable_time = 1 #1ms id_4_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK id_4_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_4_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 id_4_rst_time = 1 #1ms id_4_stable_time = 1 #1ms [I2C] id_0_i2c_id = 1 #SEN_I2C_ID_2 id_0_i2c_addr = 0x36 #0x6C >> 1 = 0x36 id_1_i2c_id = 0 #SEN_I2C_ID_1 id_1_i2c_addr = 0x36 #0x6C >> 1 = 0x36 id_3_i2c_id = 0 #SEN_I2C_ID_1 id_3_i2c_addr = 0x36 #0x6C >> 1 = 0x36 id_4_i2c_id = 0 #SEN_I2C_ID_1 id_4_i2c_addr = 0x36 #0x6C >> 1 = 0x36