diff -drupN a/arch/arm/mach-sunxi/sunxi.h b/arch/arm/mach-sunxi/sunxi.h --- a/arch/arm/mach-sunxi/sunxi.h 1970-01-01 03:00:00.000000000 +0300 +++ b/arch/arm/mach-sunxi/sunxi.h 2022-06-12 05:28:14.000000000 +0300 @@ -0,0 +1,62 @@ +/* + * Generic definitions for Allwinner SunXi SoCs + * + * Copyright (C) 2012 Maxime Ripard + * + * Maxime Ripard + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_SUNXI_H +#define __MACH_SUNXI_H + +#if defined(CONFIG_ARCH_SUN8IW8P1) +#define SUNXI_SRAM_A1_PBASE (0x00000000) +#define SUNXI_SRAM_A1_SIZE (0x4000) +#define SUNXI_SRAM_C_PBASE (0x00004000) +#define SUNXI_SRAM_C_SIZE (0x00014000) + +#elif defined(CONFIG_ARCH_SUN8IW10P1) +#define SUNXI_SRAM_A1_PBASE (0x00000000) +#define SUNXI_SRAM_A1_SIZE (0x4000) +#define SUNXI_SRAM_C_PBASE (0x00004000) +#define SUNXI_SRAM_C_SIZE (0x9000) + +#elif defined(CONFIG_ARCH_SUN8IW11P1) +#define SUNXI_SRAM_A1_PBASE (0x00000000) +#define SUNXI_SRAM_A1_SIZE (0x4000) +#define SUNXI_SRAM_A_PBASE (0x00000000) +#define SUNXI_SRAM_A_SIZE (0xC000) + +#elif defined(CONFIG_ARCH_SUN8IW7P1) +#define SUNXI_SRAM_A1_PBASE (0x00000000) +#define SUNXI_SRAM_A1_SIZE (0x10000) +#define SUNXI_SRAM_A2_PBASE (0x40000) +#define SUNXI_SRAM_A2_SIZE (0xc000) + +#elif defined(CONFIG_ARCH_SUN8IW6P1) +#define SUNXI_SRAM_A1_PBASE (0x00000000) +#define SUNXI_SRAM_A1_SIZE (0x4000) +#define SUNXI_SRAM_A2_PBASE (0x44000) +#define SUNXI_SRAM_A2_SIZE (0x14000) +#define SUNXI_SRAM_C_SIZE (0x9000) + +#elif defined(CONFIG_ARCH_SUN50IW1P1) +#define SUNXI_SRAM_BROM_PBASE (0x00000000) +#define SUNXI_SRAM_BROM_SIZE (0x00010000) +#define SUNXI_SRAM_A1_PBASE (0x00010000) +#define SUNXI_SRAM_A1_SIZE (0x00008000) +#define SUNXI_SRAM_A2_PBASE (0x00040000) +#define SUNXI_SRAM_A2_SIZE (0x00014000) +#define SUNXI_SRAM_C_PBASE (0x00018000) +#define SUNXI_SRAM_C_SIZE (0x00028000) +#elif defined(CONFIG_ARCH_SUN8IW12P1) || defined(CONFIG_ARCH_SUN8IW15P1) \ + || defined(CONFIG_ARCH_SUN8IW18P1) +#define ARISC_MESSAGE_POOL_PBASE (0x48105000) +#define ARISC_MESSAGE_POOL_RANGE (0x1000) +#endif + +#endif /* __MACH_SUNXI_H */