Add Hisilicon and XiongMai

pull/2/head latest
Igor Zalatov 2021-04-17 19:43:55 +03:00
parent 3afbc7ef1f
commit e118e4e730
512 changed files with 1076042 additions and 0 deletions

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source "$BR2_EXTERNAL_HISILICON_PATH/linux/Config.ext.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisi_patcher/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/fwprintenv-ng/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisilicon-osdrv4/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/ipctool/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/majestic/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/libevent-mini/Config.in"

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MEM_START_ADDR=0x80000000
KERNEL_UPLOAD_ADDR=0x81000000

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MEM_START_ADDR=0x80000000
KERNEL_UPLOAD_ADDR=0x81000000

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MEM_START_ADDR=0x80000000
KERNEL_UPLOAD_ADDR=0x81000000

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MEM_START_ADDR=0x80000000
KERNEL_UPLOAD_ADDR=0x81000000

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MEM_START_ADDR=0x80000000
KERNEL_UPLOAD_ADDR=0x81000000

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#ifndef __LINUX_COMPILER_H
#error "Please don't include <linux/compiler-gcc5.h> directly, include <linux/compiler.h> instead."
#endif
#define __used __attribute__((__used__))
#define __must_check __attribute__((warn_unused_result))
#define __compiler_offsetof(a, b) __builtin_offsetof(a, b)
/* Mark functions as cold. gcc will assume any path leading to a call
to them will be unlikely. This means a lot of manual unlikely()s
are unnecessary now for any paths leading to the usual suspects
like BUG(), printk(), panic() etc. [but let's keep them for now for
older compilers]
Early snapshots of gcc 4.3 don't support this and we can't detect this
in the preprocessor, but we can live with this because they're unreleased.
Maketime probing would be overkill here.
gcc also has a __attribute__((__hot__)) to move hot functions into
a special section, but I don't see any sense in this right now in
the kernel context */
#define __cold __attribute__((__cold__))
#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
#ifndef __CHECKER__
# define __compiletime_warning(message) __attribute__((warning(message)))
# define __compiletime_error(message) __attribute__((error(message)))
#endif /* __CHECKER__ */
/*
* Mark a position in code as unreachable. This can be used to
* suppress control flow warnings after asm blocks that transfer
* control elsewhere.
*
* Early snapshots of gcc 4.5 don't support this and we can't detect
* this in the preprocessor, but we can live with this because they're
* unreleased. Really, we need to have autoconf for the kernel.
*/
#define unreachable() __builtin_unreachable()
/* Mark a function definition as prohibited from being cloned. */
#define __noclone __attribute__((__noclone__))
/*
* Tell the optimizer that something else uses this function or variable.
*/
#define __visible __attribute__((externally_visible))
/*
* GCC 'asm goto' miscompiles certain code sequences:
*
* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670
*
* Work it around via a compiler barrier quirk suggested by Jakub Jelinek.
*
* (asm goto is automatically volatile - the naming reflects this.)
*/
#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0)
#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP
#define __HAVE_BUILTIN_BSWAP32__
#define __HAVE_BUILTIN_BSWAP64__
#define __HAVE_BUILTIN_BSWAP16__
#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */

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#ifndef __LINUX_COMPILER_H
#error "Please don't include <linux/compiler-gcc5.h> directly, include <linux/compiler.h> instead."
#endif
#define __used __attribute__((__used__))
#define __must_check __attribute__((warn_unused_result))
#define __compiler_offsetof(a, b) __builtin_offsetof(a, b)
/* Mark functions as cold. gcc will assume any path leading to a call
to them will be unlikely. This means a lot of manual unlikely()s
are unnecessary now for any paths leading to the usual suspects
like BUG(), printk(), panic() etc. [but let's keep them for now for
older compilers]
Early snapshots of gcc 4.3 don't support this and we can't detect this
in the preprocessor, but we can live with this because they're unreleased.
Maketime probing would be overkill here.
gcc also has a __attribute__((__hot__)) to move hot functions into
a special section, but I don't see any sense in this right now in
the kernel context */
#define __cold __attribute__((__cold__))
#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
#ifndef __CHECKER__
# define __compiletime_warning(message) __attribute__((warning(message)))
# define __compiletime_error(message) __attribute__((error(message)))
#endif /* __CHECKER__ */
/*
* Mark a position in code as unreachable. This can be used to
* suppress control flow warnings after asm blocks that transfer
* control elsewhere.
*
* Early snapshots of gcc 4.5 don't support this and we can't detect
* this in the preprocessor, but we can live with this because they're
* unreleased. Really, we need to have autoconf for the kernel.
*/
#define unreachable() __builtin_unreachable()
/* Mark a function definition as prohibited from being cloned. */
#define __noclone __attribute__((__noclone__))
/*
* Tell the optimizer that something else uses this function or variable.
*/
#define __visible __attribute__((externally_visible))
/*
* GCC 'asm goto' miscompiles certain code sequences:
*
* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670
*
* Work it around via a compiler barrier quirk suggested by Jakub Jelinek.
*
* (asm goto is automatically volatile - the naming reflects this.)
*/
#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0)
#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP
#define __HAVE_BUILTIN_BSWAP32__
#define __HAVE_BUILTIN_BSWAP64__
#define __HAVE_BUILTIN_BSWAP16__
#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */

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MEM_START_ADDR=0x40000000
KERNEL_UPLOAD_ADDR=0x41000000

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MEM_START_ADDR=0x40000000
KERNEL_UPLOAD_ADDR=0x41000000

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--- a/scripts/dtc/dtc-lexer.lex.c_shipped 2016-08-28 13:19:20.000000000 +0300
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped 2021-04-02 00:06:02.972781070 +0300
@@ -637,7 +637,7 @@
#include "srcpos.h"
#include "dtc-parser.tab.h"
-YYLTYPE yylloc;
+extern YYLTYPE yylloc;
extern bool treesource_error;
/* CAUTION: this will stop working if we ever use yyless() or yyunput() */

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@ -0,0 +1,96 @@
--- a/drivers/mtd/spi-nor/spi-nor.c 2021-03-24 01:13:36.000000000 +0300
+++ b/drivers/mtd/spi-nor/spi-nor.c 2021-03-24 11:02:41.806251817 +0300
@@ -930,7 +930,7 @@
};
static const struct spi_nor_basic_flash_parameter winbond_params = {
- .rd_modes = SNOR_RD_MODES,
+ .rd_modes = SNOR_EON_RD_MODES,
.reads[SNOR_MIDX_SLOW] = SNOR_OP_READ(0, 0, SPINOR_OP_READ),
.reads[SNOR_MIDX_1_1_1] = SNOR_OP_READ(0, 8, SPINOR_OP_READ_FAST),
.reads[SNOR_MIDX_1_1_2] = SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_1_2),
@@ -938,7 +938,7 @@
.reads[SNOR_MIDX_1_1_4] = SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_1_4),
.reads[SNOR_MIDX_1_4_4] = SNOR_OP_READ(8, 16, SPINOR_OP_READ_1_4_4),
- .wr_modes = SNOR_WR_MODES,
+ .wr_modes = SNOR_EON_RD_MODES,
.page_programs[SNOR_MIDX_1_1_1] = SPINOR_OP_PP,
.page_programs[SNOR_MIDX_1_1_4] = SPINOR_OP_PP_1_1_4,
@@ -1041,8 +1041,9 @@
.erase_types[1] = SNOR_OP_ERASE_4K(SPINOR_OP_BE_4K),
};
+
static const struct spi_nor_basic_flash_parameter xtx_params = {
- .rd_modes = SNOR_RD_MODES,
+ .rd_modes = SNOR_EON_RD_MODES,
.reads[SNOR_MIDX_SLOW] = SNOR_OP_READ(0, 0, SPINOR_OP_READ),
.reads[SNOR_MIDX_1_1_1] = SNOR_OP_READ(0, 8, SPINOR_OP_READ_FAST),
.reads[SNOR_MIDX_1_1_2] = SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_1_2),
@@ -1050,7 +1051,7 @@
.reads[SNOR_MIDX_1_1_4] = SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_1_4),
.reads[SNOR_MIDX_1_4_4] = SNOR_OP_READ(0, 24, SPINOR_OP_READ_1_4_4),
- .wr_modes = SNOR_WR_MODES,
+ .wr_modes = SNOR_EON_WR_MODES,
.page_programs[SNOR_MIDX_1_1_1] = SPINOR_OP_PP,
.page_programs[SNOR_MIDX_1_1_4] = SPINOR_OP_PP_1_1_4,
@@ -1461,7 +1462,7 @@
{ "xt25f128b", INFO(0x0b4018, 0, 64 * 1024, 256,
SPI_NOR_QUAD_READ), PARAMS(xtx), CLK_MHZ_2X(70) },
- { "xt25f64b", INFO(0x0b4017, 0, 64 * 1024, 128,
+ { "xm_xt25f64b-s", INFO(0x0b4017, 0, 64 * 1024, 128,
SPI_NOR_QUAD_READ), PARAMS(xtx), CLK_MHZ_2X(70) },
{ },
};
@@ -2046,6 +2047,7 @@
nor->level = hisi_bp_to_level(nor, info, BP_NUM_3);
break;
case SNOR_MFR_WINBOND:
+ case SNOR_MFR_XTX:
/* BP bit convert to lock level */
if (chipsize <= _16M)
nor->level = hisi_bp_to_level(nor, info, BP_NUM_3);
@@ -2206,7 +2208,7 @@
*/
nor->erase_proto = SNOR_PROTO_1_1_1;
- dev_dbg(nor->dev,
+ dev_info(nor->dev,
"(Fast) Read: opcode=%02Xh, protocol=%03x, mode=%u, wait=%u\n",
nor->read_opcode, nor->read_proto,
read->num_mode_clocks, read->num_wait_states);
@@ -2442,8 +2444,10 @@
/* If we were instantiated by DT, use it */
if (of_property_read_bool(np, "m25p,fast-read"))
modes->rd_modes |= SNOR_MODE_1_1_1;
- else
+ else {
+ printk("@spi_nor_scan(), no \"m25p,fast-read\".\n");
modes->rd_modes &= ~SNOR_MODE_1_1_1;
+ }
} else {
/* If we weren't instantiated by DT, default to fast-read */
modes->rd_modes |= SNOR_MODE_1_1_1;
@@ -2453,6 +2457,8 @@
if (info->flags & SPI_NOR_NO_FR)
modes->rd_modes &= ~SNOR_MODE_1_1_1;
+ printk("@spi_nor_scan(), modes->rd_modes:0x%x.\n", modes->rd_modes);
+
nor->program_opcode = SPINOR_OP_PP;
/*
@@ -2494,6 +2500,8 @@
return -EINVAL;
}
+ dev_info(dev, "nor->read_opcode[3: Read; 0B: Fast Read; 3B: Dual; BB: Dual IO"
+ "; 6B: Quad; EB: Quad IO]: 0x%x.\n", nor->read_opcode);
dev_info(dev, "%s (Chipsize %lld Mbytes, Blocksize %uKiB)\n",
info->name, (long long)mtd->size >> 20, mtd->erasesize / 1024);

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VENDOR=unknown
MODEL=unknown
FAMILY=hi3516cv200
CHIP=hi3516cv200
RAM_SIZE=128M
RAM_LINUX_SIZE=64M
RAM_MPP_SIZE=64M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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VENDOR=unknown
MODEL=unknown
FAMILY=hi3516cv300
CHIP=hi3516cv300
RAM_SIZE=128M
RAM_LINUX_SIZE=64M
RAM_MPP_SIZE=64M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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VENDOR=unknown
MODEL=unknown
FAMILY=hi3516cv300
CHIP=hi3516ev100
RAM_SIZE=64M
RAM_LINUX_SIZE=48M
RAM_MPP_SIZE=16M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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@ -0,0 +1,10 @@
VENDOR=unknown
MODEL=unknown
FAMILY=hi3516ev200
CHIP=hi3516ev200
RAM_SIZE=64M
RAM_LINUX_SIZE=32M
RAM_MPP_SIZE=32M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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@ -0,0 +1,10 @@
VENDOR=unknown
MODEL=unknown
FAMILY=hi3516ev200
CHIP=hi3516ev300
RAM_SIZE=128M
RAM_LINUX_SIZE=64M
RAM_MPP_SIZE=64M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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@ -0,0 +1,10 @@
VENDOR=unknown
MODEL=unknown
FAMILY=hi3516cv200
CHIP=hi3518ev200
RAM_SIZE=64M
RAM_LINUX_SIZE=32M
RAM_MPP_SIZE=32M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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VENDOR=unknown
MODEL=unknown
FAMILY=hi3516cv200
CHIP=hi3518ev201
RAM_SIZE=32M
RAM_LINUX_SIZE=22M
RAM_MPP_SIZE=10M
ROM_SIZE=?
CMOS=unknown
UBOOT_SIZE=1024K

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BR2_arm=y
BR2_ARM_INSTRUCTIONS_THUMB=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="4.9.37"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
BR2_GCC_VERSION_7_X=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.37"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/hi3516cv200.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/patches/ $(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/overlay"

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BR2_arm=y
BR2_ARM_INSTRUCTIONS_THUMB=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="3.18.20"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_18=y
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
BR2_GCC_VERSION_7_X=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.18.20"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv300/kernel/hi3516cv300.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv300/kernel/patches/ $(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv300/kernel/overlay"

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BR2_arm=y
BR2_ARM_INSTRUCTIONS_THUMB=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="3.18.20"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_18=y
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
BR2_GCC_VERSION_7_X=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.18.20"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv300/kernel/hi3516ev100.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv300/kernel/patches/ $(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv300/kernel/overlay"

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@ -0,0 +1,69 @@
# Architecture
BR2_arm=y
BR2_cortex_a7=y
BR2_ARM_EABI=y
BR2_ARM_FPU_NEON_VFPV4=y
BR2_ARM_INSTRUCTIONS_THUMB2=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="4.9.37"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
# Toolchain
# BR2_GCC_VERSION_7_X is not set
# BR2_TOOLCHAIN_USES_UCLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_UCLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_LIBC="uclibc"
BR2_TOOLCHAIN_USES_MUSL=y
BR2_TOOLCHAIN_BUILDROOT_MUSL=y
BR2_TOOLCHAIN_BUILDROOT_LIBC="musl"
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
# Kernel
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.37"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/hi3516ev200.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/patches/ $(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/overlay"
# Filesystem
# BR2_TARGET_TZ_INFO is not set
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HISILICON_PATH)/system/skeleton"
# OpenIPC configuration
BR2_TOOLCHAIN_BUILDROOT_VENDOR="openipc"
BR2_TARGET_GENERIC_ISSUE="Welcome to OpenIPC v21.04.17.1"
BR2_TARGET_GENERIC_HOSTNAME="ipcam"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HISILICON_PATH)/system/packages/patches"
# Packages
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HISILICON_PATH)/system/packages/configs/busybox.config"
BR2_PACKAGE_DROPBEAR=y
BR2_PACKAGE_FWPRINTENV_NG=y
BR2_PACKAGE_HISILICON_OSDRV4=y
BR2_PACKAGE_IPCTOOL=y
BR2_PACKAGE_JSON_C=y
BR2_PACKAGE_LAME=y
BR2_PACKAGE_LIBEVENT_MINI=y
BR2_PACKAGE_MAJESTIC=y
BR2_PACKAGE_MINI_SNMPD=y
# Unused
# BR2_SHARED_STATIC_LIBS is not set
# BR2_PACKAGE_JPEG_TURBO is not set
# BR2_PACKAGE_MINIHTTP is not set
# BR2_PACKAGE_MXML is not set
# BR2_PACKAGE_SSHPASS is not set
# BR2_PACKAGE_RTL8188EU is not set
# Experimental
BR2_PER_PACKAGE_DIRECTORIES=y
BR2_PACKAGE_WIRELESS_TOOLS=y
BR2_PACKAGE_WPA_SUPPLICANT=y
BR2_PACKAGE_WPA_SUPPLICANT_NL80211=y

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@ -0,0 +1,83 @@
# Architecture
BR2_arm=y
BR2_cortex_a7=y
BR2_ARM_EABI=y
BR2_ARM_FPU_NEON_VFPV4=y
BR2_ARM_INSTRUCTIONS_THUMB2=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="4.9.37"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
# Toolchain
# BR2_GCC_VERSION_7_X is not set
# BR2_TOOLCHAIN_USES_UCLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_UCLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_LIBC="uclibc"
BR2_TOOLCHAIN_USES_MUSL=y
BR2_TOOLCHAIN_BUILDROOT_MUSL=y
BR2_TOOLCHAIN_BUILDROOT_LIBC="musl"
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
# Kernel
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.37"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/hi3516ev300.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/patches/ $(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/overlay"
# Filesystem
# BR2_TARGET_TZ_INFO is not set
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HISILICON_PATH)/system/skeleton"
# OpenIPC configuration
BR2_TOOLCHAIN_BUILDROOT_VENDOR="openipc"
BR2_TARGET_GENERIC_ISSUE="Welcome to OpenIPC v21.04.17.1"
BR2_TARGET_GENERIC_HOSTNAME="ipcam"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HISILICON_PATH)/system/packages/patches"
# Packages
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HISILICON_PATH)/system/packages/configs/busybox.config"
BR2_PACKAGE_DROPBEAR=y
BR2_PACKAGE_FWPRINTENV_NG=y
BR2_PACKAGE_HISILICON_OSDRV4=y
BR2_PACKAGE_IPCTOOL=y
BR2_PACKAGE_JSON_C=y
BR2_PACKAGE_LAME=y
BR2_PACKAGE_LIBEVENT_MINI=y
BR2_PACKAGE_MAJESTIC=y
BR2_PACKAGE_MINI_SNMPD=y
# For @widgetii
BR2_TOOLCHAIN_BUILDROOT_CXX=y
BR2_INSTALL_LIBSTDCPP=y
BR2_PACKAGE_HOST_GDB=y
BR2_PACKAGE_HOST_GDB_NOPYTHON=y
BR2_GDB_VERSION_9_2=y
BR2_GDB_VERSION="9.2"
BR2_PACKAGE_GDB=y
BR2_PACKAGE_GDB_SERVER=y
BR2_PACKAGE_GDB_DEBUGGER=y
BR2_PACKAGE_NCURSES=y
BR2_PACKAGE_NCURSES_ADDITIONAL_TERMINFO=""
BR2_PACKAGE_STRACE=y
# Unused
# BR2_SHARED_STATIC_LIBS is not set
# BR2_PACKAGE_JPEG_TURBO is not set
# BR2_PACKAGE_MINIHTTP is not set
# BR2_PACKAGE_MXML is not set
# BR2_PACKAGE_SSHPASS is not set
# BR2_PACKAGE_RTL8188EU is not set
# Experimental
BR2_PER_PACKAGE_DIRECTORIES=y
BR2_PACKAGE_WIRELESS_TOOLS=y
BR2_PACKAGE_WPA_SUPPLICANT=y
BR2_PACKAGE_WPA_SUPPLICANT_NL80211=y

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@ -0,0 +1,69 @@
# Architecture
BR2_arm=y
BR2_cortex_a7=y
BR2_ARM_EABI=y
BR2_ARM_FPU_NEON_VFPV4=y
BR2_ARM_INSTRUCTIONS_THUMB2=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="4.9.37"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
# Toolchain
# BR2_GCC_VERSION_7_X is not set
# BR2_TOOLCHAIN_USES_UCLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_UCLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_LIBC="uclibc"
BR2_TOOLCHAIN_USES_MUSL=y
BR2_TOOLCHAIN_BUILDROOT_MUSL=y
BR2_TOOLCHAIN_BUILDROOT_LIBC="musl"
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
# Kernel
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.37"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/hi3516ev300.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/patches/ $(BR2_EXTERNAL_HISILICON_PATH)/board/hi3516ev200/kernel/overlay"
# Filesystem
# BR2_TARGET_TZ_INFO is not set
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HISILICON_PATH)/system/skeleton"
# OpenIPC configuration
BR2_TOOLCHAIN_BUILDROOT_VENDOR="openipc"
BR2_TARGET_GENERIC_ISSUE="Welcome to OpenIPC v21.04.17.1"
BR2_TARGET_GENERIC_HOSTNAME="ipcam"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HISILICON_PATH)/system/packages/patches"
# Packages
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HISILICON_PATH)/system/packages/configs/busybox.config"
BR2_PACKAGE_DROPBEAR=y
BR2_PACKAGE_FWPRINTENV_NG=y
BR2_PACKAGE_HISILICON_OSDRV4=y
BR2_PACKAGE_IPCTOOL=y
BR2_PACKAGE_JSON_C=y
BR2_PACKAGE_LAME=y
BR2_PACKAGE_LIBEVENT_MINI=y
BR2_PACKAGE_MAJESTIC=y
BR2_PACKAGE_MINI_SNMPD=y
# Unused
# BR2_SHARED_STATIC_LIBS is not set
# BR2_PACKAGE_JPEG_TURBO is not set
# BR2_PACKAGE_MINIHTTP is not set
# BR2_PACKAGE_MXML is not set
# BR2_PACKAGE_SSHPASS is not set
# BR2_PACKAGE_RTL8188EU is not set
# Experimental
BR2_PER_PACKAGE_DIRECTORIES=y
BR2_PACKAGE_WIRELESS_TOOLS=y
BR2_PACKAGE_WPA_SUPPLICANT=y
BR2_PACKAGE_WPA_SUPPLICANT_NL80211=y

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@ -0,0 +1,19 @@
BR2_arm=y
BR2_ARM_INSTRUCTIONS_THUMB=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="4.9.37"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
BR2_GCC_VERSION_7_X=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.37"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/hi3518ev200.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/patches/ $(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/overlay"

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@ -0,0 +1,19 @@
BR2_arm=y
BR2_ARM_INSTRUCTIONS_THUMB=y
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="4.9.37"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
BR2_GCC_VERSION_7_X=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.37"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/hi3518ev201.generic.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_XZ=y
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER=y
BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST="$(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/patches/ $(BR2_EXTERNAL_HISICAM_PATH)/board/hi3516cv200/kernel/overlay"

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@ -0,0 +1,2 @@
name: HISILICON
desc: Buildroot external tree for HiSilicon based ip cameras

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@ -0,0 +1,7 @@
include $(BR2_EXTERNAL_HISILICON_PATH)/linux/linux-ext-hisi_patcher.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisi_patcher/hisi_patcher.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/fwprintenv-ng/fwprintenv-ng.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv4/hisilicon-osdrv4.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/ipctool/ipctool.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/libevent-mini/libevent-mini.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/majestic/majestic.mk

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@ -0,0 +1,14 @@
config BR2_LINUX_KERNEL_EXT_HISI_PATCHER
bool "HiSi kernel patches"
select BR2_PACKAGE_HISI_PATCHER
help
Patch Kernel for HiSilicon boards
if BR2_LINUX_KERNEL_EXT_HISI_PATCHER
config BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST
string "Patch list"
help
Space-separated list of patches to be applied
endif # BR2_LINUX_KERNEL_EXT_HISI_PATCHER

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@ -0,0 +1,11 @@
################################################################################
#
# linux_kernel_ext_hisi_patcher
#
################################################################################
LINUX_EXTENSIONS += hisi_patcher
define HISI_PATCHER_PREPARE_KERNEL
$(HISI_PATCHER_PKGDIR)/apply.sh $(@D) $(BR2_LINUX_KERNEL_EXT_HISI_PATCHER_LIST)
endef

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@ -0,0 +1,49 @@
From ab8b54cfc9d3fddba297c343a2d8dea9dbe20017 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C3=B6rg=20Krause?= <joerg.krause@embedded.rocks>
Date: Tue, 4 Aug 2015 22:13:20 +0200
Subject: [PATCH] drop configh from tools
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
We need to build u-boot tools without a board configuration for the target.
fw_env just uses config.h to define the default environment of the created
image, so it really isn't mandatory.
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
[Jörg Krause: update for version 2015.07]
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
[Romain: update for version 2017.05
after commit 9d80b49a671c9922931adcd823aab0ed319a42d1]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
[Pierre-Jean: update for version 2019.04]
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
---
tools/env/fw_env_private.h | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/tools/env/fw_env_private.h b/tools/env/fw_env_private.h
index 86be16d..3c62ac4 100644
--- a/tools/env/fw_env_private.h
+++ b/tools/env/fw_env_private.h
@@ -4,17 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-/* Pull in the current config to define the default environment */
-#include <linux/kconfig.h>
-
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__ /* get only #defines from config.h */
-#include <config.h>
-#undef __ASSEMBLY__
-#else
-#include <config.h>
-#endif
-
/*
* To build the utility with the static configuration
* comment out the next line.
--
2.9.4

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@ -0,0 +1,42 @@
From 460646b3c4c1718860915c38586ee8d2fbda38e4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C3=B6rg=20Krause?= <joerg.krause@embedded.rocks>
Date: Sun, 1 Feb 2015 21:53:47 +0100
Subject: [PATCH] tools only in no dot config targets
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Revert upstream commit c7ad5cbb1ef2c33883f0fa7d0455095004fd306d:
Makefile: drop "tools-only" from no-dot-config-targets
This indirectly pulls in a build-dependency on libssl-dev used for FIT
image support, and possibly GPL/OpenSSL licensing incompatibility
issues.
Based on Debian patch from u-boot-tools:
http://ftp.de.debian.org/debian/pool/main/u/u-boot/u-boot_2014.10+dfsg1-2.1.debian.tar.xz
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
[fabio: adapt it to 2016.09]
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 6aa08964ff..fcec83d183 100644
--- a/Makefile
+++ b/Makefile
@@ -486,7 +486,7 @@ defaultenv_h := include/generated/defaultenv_autogenerated.h
no-dot-config-targets := clean clobber mrproper distclean \
help %docs check% coccicheck \
- ubootversion backup tests check qcheck
+ ubootversion backup tests tools-only check qcheck
config-targets := 0
mixed-targets := 0
--
2.20.1

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@ -0,0 +1,36 @@
From 0552a8ffdfbb9807fcef4498011907caa5de2ace Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C3=B6rg=20Krause?= <joerg.krause@embedded.rocks>
Date: Thu, 9 Jan 2020 15:11:32 +0100
Subject: [PATCH] drop autoconf.h from tools
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
We need to build u-boot tools without a board configuration for the target.
imximage uses the DCD address from Kconfig to display this information
to the user. The default value for all i.MX platforms is 0x00910000,
except for i.MX7ULP, which has a DCD address of 0x2f010000.
The default value printed before version 2020.01 was 0x00910000.
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
---
tools/imximage.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c
index d7edd3c52f..f8d21fa06a 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -11,7 +11,6 @@
#include "imagetool.h"
#include <image.h>
#include "imximage.h"
-#include <generated/autoconf.h>
#define UNDEFINED 0xFFFFFFFF
--
2.25.0

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@ -0,0 +1,52 @@
From 664ef61e19d6261d8984493b5f22127ec2ad44fc Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Sun, 10 May 2020 23:15:32 +0200
Subject: [PATCH] tools/env/fw_env.h: remove env.h
As reported by Nicolas Carrier on the Buildroot mailing list [1],
there is a new build issue while building a program which interacts with
the u-boot environment. This program uses the headers of the ubootenv
library provided by uboot-tools.
This is an upstream change from uboot [2] adding "#include <env.h>" to
fw_env.h. Adding env.h require a board configuration to build.
But only fw_env.h header is installed in the staging directory by
uboot-tools package, but since it now include env.h the build is broken
because env.h is missing from the staging directory.
It's seems an upstream bug since env_set() is not used in fw_env tool.
Adding env.h is an error since it also include compiler.h (and others
uboot internal includes).
Nicolas removed env.h from fw_env tool and fixed it's build issue.
This problem is present since uboot v2019.10, so the uboot version
present in Buildroot 2020.02 is affected.
[1] http://lists.busybox.net/pipermail/buildroot/2020-April/280307.html
[2] https://gitlab.denx.de/u-boot/u-boot/-/commit/9fb625ce05539fe6876a59ce1dcadb76b33c6f6e
Reported-by: Nicolas Carrier <nicolas.carrier@orolia.com>
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Upstream: https://gitlab.denx.de/u-boot/u-boot/-/commit/2aca8804d8d5f84d2d661e76e8d232c5c12445b5
---
tools/env/fw_env.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h
index b60fbfc8f8..78c803c944 100644
--- a/tools/env/fw_env.h
+++ b/tools/env/fw_env.h
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <env.h>
#include <stdint.h>
/*
--
2.25.4

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@ -0,0 +1,114 @@
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 2a61a5d6f0..6398e29c38 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -484,7 +484,8 @@ int fw_printenv(int argc, char *argv[], int value_only, struct env_opts *opts)
val = fw_getenv(name);
if (!val) {
- fprintf(stderr, "## Error: \"%s\" not defined\n", name);
+ if (!value_only)
+ fprintf(stderr, "## Error: \"%s\" not defined\n", name);
rc = -1;
continue;
}
@@ -1725,6 +1726,88 @@ static int check_device_config(int dev)
return rc;
}
+#define CRC_SZ 4
+// Assume env only size of 64Kb
+#define ENV_LEN 0x10000
+
+// Detect U-Boot environment area offset
+int uboot_detect_env(void *buf, size_t len) {
+ // Jump over memory by step
+ int scan_step = ENV_LEN;
+ int res = -1;
+
+ for (int baddr = 0; baddr < len; baddr += scan_step) {
+ uint32_t expected_crc = *(int *)(buf + baddr);
+ uint32_t crc = crc32(0, buf + baddr + CRC_SZ, ENV_LEN - CRC_SZ);
+ if (crc == expected_crc) {
+ res = baddr;
+ break;
+ }
+ }
+
+ return res;
+}
+
+char *open_mtdblock(int i, int *fd, uint32_t size, int flags) {
+ char filename[PATH_MAX];
+
+ snprintf(filename, sizeof filename, "/dev/mtdblock%d", i);
+ *fd = open(filename, O_RDONLY);
+ if (*fd == -1) {
+ return NULL;
+ }
+
+ char *addr =
+ (char *)mmap(NULL, size, PROT_READ, MAP_PRIVATE | flags, *fd, 0);
+ if ((void *)addr == MAP_FAILED) {
+ close(*fd);
+ return NULL;
+ }
+
+ return addr;
+}
+
+static char dev[80];
+static void detect_env() {
+ FILE *fp;
+ char name[80];
+ int i, es, ee;
+ struct mtd_info_user mtd;
+
+ if ((fp = fopen("/proc/mtd", "r"))) {
+ bool running = true;
+ while (fgets(dev, sizeof dev, fp) && running) {
+ name[0] = 0;
+ if (sscanf(dev, "mtd%d: %x %x \"%64[^\"]\"", &i, &es, &ee, name)) {
+ snprintf(dev, sizeof dev, "/dev/mtd%d", i);
+ int devfd = open(dev, O_RDWR);
+ if (devfd < 0)
+ continue;
+
+ if (ioctl(devfd, MEMGETINFO, &mtd) >= 0) {
+ int blockfd;
+ char *addr = open_mtdblock(
+ i, &blockfd, mtd.size, MAP_POPULATE /* causes read-ahead on the file */);
+ if (!addr)
+ return;
+ int off = uboot_detect_env(addr, mtd.size);
+ close(blockfd);
+ if (off != -1) {
+ DEVNAME(0) = dev;
+ DEVOFFSET(0) = off;
+ ENVSIZE(0) = ENV_LEN;
+ DEVESIZE(0) = mtd.erasesize;
+ ENVSECTORS(0) = 1;
+ break;
+ }
+ }
+ close(devfd);
+ }
+ }
+ fclose(fp);
+ }
+}
+
static int parse_config(struct env_opts *opts)
{
int rc;
@@ -1735,9 +1818,7 @@ static int parse_config(struct env_opts *opts)
#if defined(CONFIG_FILE)
/* Fills in DEVNAME(), ENVSIZE(), DEVESIZE(). Or don't. */
if (get_config(opts->config_file)) {
- fprintf(stderr, "Cannot parse config file '%s': %m\n",
- opts->config_file);
- return -1;
+ detect_env();
}
#else
DEVNAME(0) = DEVICE1_NAME;

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@ -0,0 +1,13 @@
config BR2_PACKAGE_FWPRINTENV_NG
bool "fwprintenv-ng from u-boot tools"
default y
help
Install the fw_printenv / fw_setenv tools on the target system
The fw_printenv and fw_setenv tools from Das U-Boot
bootloader, which allows access to the U-Boot environment
from Linux.
U-Boot tools - companion tools for Das U-Boot bootloader.
http://www.denx.de/wiki/U-Boot/WebHome

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@ -0,0 +1,39 @@
################################################################################
#
# fwprintenv-ng
#
################################################################################
FWPRINTENV_NG_VERSION = 2020.04
FWPRINTENV_NG_SOURCE = u-boot-$(FWPRINTENV_NG_VERSION).tar.bz2
FWPRINTENV_NG_SITE = ftp://ftp.denx.de/pub/u-boot
FWPRINTENV_NG_LICENSE = GPL-2.0+
FWPRINTENV_NG_LICENSE_FILES = Licenses/gpl-2.0.txt
FWPRINTENV_NG_CPE_ID_VENDOR = denx
FWPRINTENV_NG_CPE_ID_PRODUCT = u-boot
FWPRINTENV_NG_INSTALL_STAGING = YES
define FWPRINTENV_NG_CONFIGURE_CMDS
mkdir -p $(@D)/include/config
touch $(@D)/include/config/auto.conf
endef
FWPRINTENV_NG_MAKE_OPTS = CROSS_COMPILE="$(TARGET_CROSS)" \
CFLAGS="$(TARGET_CFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS)" \
HOSTCFLAGS="$(HOST_CFLAGS)" \
STRIP=$(TARGET_STRIP)
define FWPRINTENV_NG_BUILD_CMDS
$(TARGET_MAKE_ENV) $(BR2_MAKE) -C $(@D) $(FWPRINTENV_NG_MAKE_OPTS) \
CROSS_BUILD_TOOLS=y tools-only
$(TARGET_MAKE_ENV) $(BR2_MAKE) -C $(@D) $(UBOOT_TOOLS_MAKE_OPTS) \
envtools no-dot-config-targets=envtools
endef
define FWPRINTENV_NG_INSTALL_TARGET_CMDS
$(INSTALL) -m 0755 -D $(@D)/tools/env/fw_printenv $(TARGET_DIR)/usr/sbin/fw_printenv
ln -sf fw_printenv $(TARGET_DIR)/usr/sbin/fw_setenv
endef
$(eval $(generic-package))

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@ -0,0 +1,3 @@
config BR2_PACKAGE_HISI_PATCHER
bool

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@ -0,0 +1,44 @@
#!/bin/bash
function log() {
echo "--- $@"
}
function apply_patch() {
DST=$1
SRC=$2
if [[ -d $SRC ]]; then
if [[ ${SRC:${#SRC}-1} != '/' ]]; then
log Apply \"$SRC\" as overlay directory
cp -r $SRC/* $DST/
else
log Apply \"$SRC\" as patches directory
for P in $SRC/*.patch; do
patch -d $DST -p1 < $P
done
fi
else
log Apply \"$SRC\" as single patch
patch -d $DST -p1 < $SRC
fi
}
function apply_patches() {
log Gonna apply "$@"
while [[ $# -ge 1 ]]; do
apply_patch $DST $1
shift
done
}
DST=$1
shift
if [ -f $DST/.hisi-patched ]; then
log Patched already
exit
fi
apply_patches $@
touch $DST/.hisi-patched

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@ -0,0 +1,13 @@
################################################################################
#
# hisi_patcher
#
################################################################################
HISI_PATCHER_VERSION = 0.1
HISI_PATCHER_INSTALL_TARGET = NO
HISI_PATCHER_INSTALL_STAGING = NO
HISI_PATCHER_SITE =
HISI_PATCHER_SOURCE =
$(eval $(generic-package))

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@ -0,0 +1,6 @@
config BR2_PACKAGE_HISILICON_OSDRV4
bool "hisilicon-osdrv4"
help
hisilicon-osdrv4 - Hisilicon kernel modules and libs
https://openipc.org

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@ -0,0 +1,291 @@
/*****************************************************************************
* Copyright 2004 - 2050, Hisilicon Tech. Co., Ltd.
* ALL RIGHTS RESERVED
* FileName: aacdec.h
* Description:
*
* History:
* Version Date Author DefectNum Description
* 0.01 2006-11-01 z40717 NULL Create this file.
*
*****************************************************************************/
/**
* \file
* \brief Describes the information about AACDEC.
*/
#ifndef _AACDEC_H
#define _AACDEC_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cpluscplus */
#endif /* __cpluscplus */
#include "hi_type.h"
/********************************Macro Definition********************************/
/** \addtogroup AACDEC */
/** @{ */ /** <!-- [AACDEC] */
#ifndef AAC_MAX_NCHANS
#define AAC_MAX_NCHANS 2
#endif
#define AAC_MAX_NSAMPS 1024
#define AAC_MAINBUF_SIZE (768 * AAC_MAX_NCHANS) /**<according to spec (13818-7 section 8.2.2, 14496-3 section 4.5.3),6144 bits = 768 bytes per SCE or CCE-I,12288 bits = 1536 bytes per CPE*/
#define AAC_NUM_PROFILES 3
#define AAC_PROFILE_MP 0
#define AAC_PROFILE_LC 1
#define AAC_PROFILE_SSR 2
#ifndef HI_SUCCESS
#define HI_SUCCESS 0
#endif
/** @} */ /** <!-- ==== Macro Definition end ==== */
/*************************** Structure Definition ****************************/
/** \addtogroup AACDEC */
/** @{ */ /** <!-- [AACDEC] */
/**Defines AACDEC error code*/
typedef enum
{
ERR_AAC_NONE = 0, /**<no decode error*/
ERR_AAC_INDATA_UNDERFLOW = -1, /**<not enough input data*/
ERR_AAC_NULL_POINTER = -2, /**<null pointer*/
ERR_AAC_INVALID_ADTS_HEADER = -3, /**<invalid adts header*/
ERR_AAC_INVALID_ADIF_HEADER = -4, /**<invalid adif header*/
ERR_AAC_INVALID_FRAME = -5, /**<invalid frame*/
ERR_AAC_MPEG4_UNSUPPORTED = -6, /**<upsupport mpeg4 format*/
ERR_AAC_CHANNEL_MAP = -7, /**<channel map error*/
ERR_AAC_SYNTAX_ELEMENT = -8, /**<element error*/
ERR_AAC_DEQUANT = -9, /**<dequant error*/
ERR_AAC_STEREO_PROCESS = -10, /**<stereo process error*/
ERR_AAC_PNS = -11, /**<pns process error*/
ERR_AAC_SHORT_BLOCK_DEINT = -12, /**<reserved*/
ERR_AAC_TNS = -13, /**<TNS process error*/
ERR_AAC_IMDCT = -14, /**<IMDCT process error*/
ERR_AAC_NCHANS_TOO_HIGH = -15, /**<unsupport mutil channel*/
ERR_AAC_SBR_INIT = -16, /**<SBR init error*/
ERR_AAC_SBR_BITSTREAM = -17, /**<SBR bitstream error*/
ERR_AAC_SBR_DATA = -18, /**<SBR data error*/
ERR_AAC_SBR_PCM_FORMAT = -19, /**<SBR pcm data error*/
ERR_AAC_SBR_NCHANS_TOO_HIGH = -20, /**<unsupport SBR multi channel*/
ERR_AAC_SBR_SINGLERATE_UNSUPPORTED = -21, /**<SBR invalid samplerate*/
ERR_AAC_RAWBLOCK_PARAMS = -22, /**<invalid RawBlock params*/
ERR_AAC_PS_INIT = -23, /**<PS init error*/
ERR_AAC_CH_MAPPING = -24,
ERR_UNKNOWN = -9999, /**<reserved*/
ERR_AAC_OUT_OF_MEMORY = 2, /*!< Heap returned NULL pointer. Output buffer is invalid. */
ERR_AAC_UNKNOWN = 5, /*!< Error condition is of unknown reason, or from a another module. Output buffer is invalid. */
ERR_AAC_TRANSPORT_SYNC_ERROR = 4097, /*!< The transport decoder had syncronisation problems. Do not exit decoding. Just feed new bitstream data. */
ERR_AAC_NOT_ENOUGH_BITS = 4098, /*!< The input buffer ran out of bits. */
ERR_AAC_TRANSPORT_FATAL_ERROR = 4099, /*!< The transport decoder occut fatal error. Reset Tranport */
ERR_AAC_INVALID_HANDLE = 8193, /*!< The handle passed to the function call was invalid (NULL). */
ERR_AAC_UNSUPPORTED_AOT = 8194, /*!< The AOT found in the configuration is not supported. */
ERR_AAC_UNSUPPORTED_FORMAT = 8195, /*!< The bitstream format is not supported. */
ERR_AAC_UNSUPPORTED_ER_FORMAT = 8196, /*!< The error resilience tool format is not supported. */
ERR_AAC_UNSUPPORTED_EPCONFIG = 8197, /*!< The error protection format is not supported. */
ERR_AAC_UNSUPPORTED_MULTILAYER = 8198, /*!< More than one layer for AAC scalable is not supported. */
ERR_AAC_UNSUPPORTED_CHANNELCONFIG = 8199, /*!< The channel configuration (either number or arrangement) is not supported. */
ERR_AAC_UNSUPPORTED_SAMPLINGRATE = 8200, /*!< The sample rate specified in the configuration is not supported. */
ERR_AAC_INVALID_SBR_CONFIG = 8201, /*!< The SBR configuration is not supported. */
ERR_AAC_SET_PARAM_FAIL = 8202, /*!< The parameter could not be set. Either the value was out of range or the parameter does not exist. */
ERR_AAC_NEED_TO_RESTART = 8203, /*!< The decoder needs to be restarted, since the requiered configuration change cannot be performed. */
ERR_AAC_TRANSPORT_ERROR = 16385, /*!< The transport decoder encountered an unexpected error. */
ERR_AAC_PARSE_ERROR = 16386, /*!< Error while parsing the bitstream. Most probably it is corrupted, or the system crashed. */
ERR_AAC_UNSUPPORTED_EXTENSION_PAYLOAD = 16387, /*!< Error while parsing the extension payload of the bitstream. The extension payload type found is not supported. */
ERR_AAC_DECODE_FRAME_ERROR = 16388, /*!< The parsed bitstream value is out of range. Most probably the bitstream is corrupt, or the system crashed. */
ERR_AAC_CRC_ERROR = 16389, /*!< The embedded CRC did not match. */
ERR_AAC_INVALID_CODE_BOOK = 16390, /*!< An invalid codebook was signalled. Most probably the bitstream is corrupt, or the system crashed. */
ERR_AAC_UNSUPPORTED_PREDICTION = 16391, /*!< Predictor found, but not supported in the AAC Low Complexity profile. Most probably the bitstream is corrupt, or has a wrong format. */
ERR_AAC_UNSUPPORTED_CCE = 16392, /*!< A CCE element was found which is not supported. Most probably the bitstream is corrupt, or has a wrong format. */
ERR_AAC_UNSUPPORTED_LFE = 16393, /*!< A LFE element was found which is not supported. Most probably the bitstream is corrupt, or has a wrong format. */
ERR_AAC_UNSUPPORTED_GAIN_CONTROL_DATA = 16394, /*!< Gain control data found but not supported. Most probably the bitstream is corrupt, or has a wrong format. */
ERR_AAC_UNSUPPORTED_SBA = 16395, /*!< SBA found, but currently not supported in the BSAC profile. */
ERR_AAC_TNS_READ_ERROR = 16396, /*!< Error while reading TNS data. Most probably the bitstream is corrupt or the system crashed. */
ERR_AAC_RVLC_ERROR = 16397, /*!< Error while decoding error resillient data. */
ERR_AAC_ANC_DATA_ERROR = 32769, /*!< Non severe error concerning the ancillary data handling. */
ERR_AAC_TOO_SMALL_ANC_BUFFER = 32770, /*!< The registered ancillary data buffer is too small to receive the parsed data. */
ERR_AAC_TOO_MANY_ANC_ELEMENTS = 32771, /*!< More than the allowed number of ancillary data elements should be written to buffer. */
} HI_AACDEC_ERR_E;
typedef struct _AACFrameInfo
{
int bitRate;
int nChans; /**<channels,range:1,2*/
int sampRateCore; /**<inner sample rate*/
int sampRateOut; /**<output samplerate*/
int bitsPerSample; /**<bitwidth ,range:16*/
int outputSamps; /**<output samples*/
int profile; /**<profile*/
int tnsUsed; /**<tns tools*/
int pnsUsed; /**<pns tools*/
} AACFrameInfo;
typedef enum
{
AACDEC_ADTS = 0,
AACDEC_LOAS = 1,
AACDEC_LATM_MCP1 = 2,
} AACDECTransportType;
typedef void* HAACDecoder;
typedef struct hiAACDEC_VERSION_S
{
HI_U8 aVersion[64];
} AACDEC_VERSION_S;
/** @} */ /** <!-- ==== Structure Definition End ==== */
/******************************* API declaration *****************************/
/** \addtogroup AACDEC */
/** @{ */ /** <!-- [AACDEC]*/
/**
\brief Get version information.
\attention \n
N/A
\param[in] pVersion : version describe struct
\retval ::HI_SUCCESS : Success
\retval ::HI_FAILURE : pVersion is NULL, return HI_FAILURE
\see \n
N/A
*/
HI_S32 HI_AACDEC_GetVersion(AACDEC_VERSION_S* pVersion);
/**
\brief create and initial decoder device.
\attention \n
N/A
\param[in] enTranType : transport type
\retval ::HAACDecoder : init success, return non-NULL handle.
\retval ::NULL : init failure, return NULL
\see \n
N/A
*/
HAACDecoder AACInitDecoder(AACDECTransportType enTranType);
/**
\brief destroy AAC-Decoder, free the memory.
\attention \n
N/A
\param[in] hAACDecoder : AAC-Decoder handle
\see \n
N/A
*/
HI_VOID AACFreeDecoder(HAACDecoder hAACDecoder);
/**
\brief set RawMode before decode Raw Format aac bitstream(Reserved API, unused now.)
\attention \n
N/A
\param[in] hAACDecoder : AAC-Decoder handle
\param[in] nChans : inout channels
\param[in] sampRate : input sampelrate
\retval ::HI_FAILURE : RESERVED API, always return HI_FAILURE.
\see \n
N/A
*/
HI_S32 AACSetRawMode(HAACDecoder hAACDecoder, HI_S32 nChans, HI_S32 sampRate);
/**
\brief look for valid AAC sync header
\attention \n
N/A
\param[in] hAACDecoder : AAC-Decoder handle
\param[in/out] ppInbufPtr : address of the pointer of start-point of the bitstream
\param[in/out] pBytesLeft : pointer to BytesLeft that indicates bitstream numbers at input buffer
\retval ::<0 : err, always return ERR_AAC_INDATA_UNDERFLOW
\retval ::other : Success, return number bytes of current frame
\see \n
N/A
*/
HI_S32 AACDecodeFindSyncHeader(HAACDecoder hAACDecoder, HI_U8** ppInbufPtr, HI_S32* pBytesLeft);
/**
\brief decoding AAC frame and output 1024(LC) OR 2048(HEAAC/eAAC/eAAC+) 16bit PCM samples per channel.
\attention \n
\param[in] hAACDecoder : AAC-Decoder handle
\param[in] ppInbufPtr : address of the pointer of start-point of the bitstream
\param[in/out] pBytesLeft : pointer to BytesLeft that indicates bitstream numbers at input buffer,indicates the left bytes
\param[in] pOutPcm : the address of the out pcm buffer,pcm data in noninterlaced fotmat: L/L/L/... R/R/R/...
\retval :: SUCCESS : Success
\retval :: ERROR_CODE : FAILURE, return error_code.
\see \n
N/A
*/
HI_S32 AACDecodeFrame(HAACDecoder hAACDecoder, HI_U8** ppInbufPtr, HI_S32* pBytesLeft, HI_S16* pOutPcm);
/**
\brief get the frame information.
\attention \n
\param[in] hAACDecoder : AAC-Decoder handle
\param[out] aacFrameInfo : frame information
\retval :: HI_SUCCESS : Success
\retval :: ERROR_CODE : FAILURE, return error_code.
\see \n
N/A
*/
HI_S32 AACGetLastFrameInfo(HAACDecoder hAACDecoder, AACFrameInfo* aacFrameInfo);
/**
\brief set eosflag.
\attention \n
\param[in] hAACDecoder : AAC-Decoder handle
\param[in] s32Eosflag : end flag
\retval :: HI_SUCCESS : Success
\retval :: ERROR_CODE : FAILURE, return error_code.
\see \n
N/A
*/
HI_S32 AACDecoderSetEosFlag(HAACDecoder hAACDecoder, HI_S32 s32Eosflag);
/**
\brief flush internal codec state (after seeking, for example)
\attention \n
\param[in] hAACDecoder : AAC-Decoder handle
\retval :: HI_SUCCESS : Success
\retval :: ERROR_CODE : FAILURE, return error_code.
\see \n
N/A
*/
HI_S32 AACFlushCodec(HAACDecoder hAACDecoder);
/**
\brief register sbrdec module
\attention \n
N/A
\param[in] pModuleHandle : pointer to WorkHandle of sbrdec module
\retval :: HI_SUCCESS : Success
\retval :: ERROR_CODE : FAILURE, return error_code.
\see \n
N/A
*/
HI_S32 AACDecoderRegisterModule(HI_VOID* pModuleHandle);
/**
\brief Get WorkHandle of sbrdec module
\attention \n
N/A
\retval :: HI_VOID * : pointer to WorkHandle of sbrdec module
\see \n
N/A
*/
HI_VOID * HI_AAC_SBRDEC_GetHandle(HI_VOID);
/** @} */ /** <!-- ==== API declaration end ==== */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cpluscplus */
#endif /* __cpluscplus */
#endif /* _AACDEC_H */

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/*****************************************************************************
* Copyright 2004 - 2018, Hisilicon Tech. Co., Ltd.
* ALL RIGHTS RESERVED
* FileName: hi_spdif.h
* Description:
*
* History:
* Version Date Author DefectNum Description
* 0.01 2006-11-01 z40717 NULL Create this file.
*
*****************************************************************************/
/**
* \file
* \brief Describes the information about AACENC.
*/
#ifndef _AACENC_H
#define _AACENC_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cpluscplus */
#endif /* __cpluscplus */
#include "hi_type.h"
/********************************Macro Definition********************************/
/** \addtogroup AACENC */
/** @{ */ /** <!-- [AACENC] */
#ifdef MONO_ONLY
#define MAX_CHANNELS 1 /**<aacenc encoder channels*/
#else
#define MAX_CHANNELS 2
#endif
#define AACENC_BLOCKSIZE 1024 /**<aacenc blocksize*/
/** @} */ /** <!-- ==== Macro Definition end ==== */
/*************************** Structure Definition ****************************/
/** \addtogroup AACENC */
/** @{ */ /** <!-- [AACENC] */
typedef enum
{
HI_AACENC_OK = 0x0000, /*!< No error happened. All fine. */
HI_AACENC_INVALID_HANDLE = 0x0020, /*!< Handle passed to function call was invalid. */
HI_AACENC_MEMORY_ERROR = 0x0021, /*!< Memory allocation failed. */
HI_AACENC_UNSUPPORTED_PARAMETER = 0x0022, /*!< Parameter not available. */
HI_AACENC_INVALID_CONFIG = 0x0023, /*!< Configuration not provided. */
HI_AACENC_INIT_ERROR = 0x0040, /*!< General initialization error. */
HI_AACENC_INIT_AAC_ERROR = 0x0041, /*!< AAC library initialization error. */
HI_AACENC_INIT_SBR_ERROR = 0x0042, /*!< SBR library initialization error. */
HI_AACENC_INIT_TP_ERROR = 0x0043, /*!< Transport library initialization error. */
HI_AACENC_INIT_META_ERROR = 0x0044, /*!< Meta data library initialization error. */
HI_AACENC_ENCODE_ERROR = 0x0060, /*!< The encoding process was interrupted by an unexpected error. */
HI_AACENC_ENCODE_EOF = 0x0080 /*!< End of file reached. */
} HI_AACENC_ERROR_E;
/**Defines AACENC quality*/
typedef enum
{
AU_QualityExcellent = 0,
AU_QualityHigh = 1,
AU_QualityMedium = 2,
AU_QualityLow = 3,
} AuQuality;
/**Defines AACENC format*/
typedef enum
{
AACLC = 0, /**<AAC-LC format*/
EAAC = 1, /**<HEAAC or AAC+ or aacPlusV1*/
EAACPLUS = 2, /**<AAC++ or aacPlusV2*/
AACLD = 3, /**<AAC LD(Low Delay)*/
AACELD = 4, /**<AAC ELD(Low Delay)*/
} AuEncoderFormat;
/**Defines AACENC container*/
typedef enum
{
AACENC_ADTS = 0,
AACENC_LOAS = 1,
AACENC_LATM_MCP1 = 2,
} AACENCTransportType;
/**Defines AACENC configuration*/
typedef struct
{
AuQuality quality;
AuEncoderFormat coderFormat;
HI_S16 bitsPerSample;
HI_S32 sampleRate; /**<audio file sample rate */
HI_S32 bitRate; /**<encoder bit rate in bits/sec */
HI_S16 nChannelsIn; /**<number of channels on input (1,2) */
HI_S16 nChannelsOut; /**<number of channels on output (1,2) */
HI_S16 bandWidth; /**<targeted audio bandwidth in Hz */
AACENCTransportType transtype;
} AACENC_CONFIG;
/**Defines AACENC version*/
typedef struct hiAACENC_VERSION_S
{
HI_U8 aVersion[64];
} AACENC_VERSION_S;
typedef HI_U32 AAC_ENCODER_S;
/** @} */ /** <!-- ==== Structure Definition End ==== */
/******************************* API declaration *****************************/
/** \addtogroup AACENC */
/** @{ */ /** <!-- [AACENC] */
/**
\brief Get version information.
\attention \n
N/A
\param[in] pVersion version describe struct
\retval ::HI_SUCCESS : Success
\retval ::HI_FAILURE : FAILURE
\see \n
N/A
*/
HI_S32 HI_AACENC_GetVersion(AACENC_VERSION_S* pVersion);
/**
\brief get reasonable default configuration.
\attention \n
N/A
\param[in] pstConfig pointer to an configuration information structure
\retval ::HI_SUCCESS : Success
\retval ::HI_FAILURE : FAILURE
\see \n
N/A
*/
HI_S32 AACInitDefaultConfig(AACENC_CONFIG* pstConfig);
/**
\brief allocate and initialize a new encoder instance.
\attention \n
N/A
\param[in] phAacPlusEnc pointer to an configuration information structure
\param[in] pstConfig pointer to an configuration information structure
\retval ::HI_SUCCESS : Success
\retval ::HI_FAILURE : FAILURE
\see \n
N/A
*/
HI_S32 AACEncoderOpen(AAC_ENCODER_S** phAacPlusEnc, AACENC_CONFIG* pstConfig);
/**
\brief allocate and initialize a new encoder instance
\attention \n
N/A
\param[in] hAacPlusEnc pointer to an configuration information structure
\param[in] ps16PcmBuf BLOCKSIZE*nChannels audio samples,interleaved
\param[in] pu8Outbuf pointer to output buffer,(must be 6144/8*MAX_CHANNELS bytes large)
\param[in] ps32NumOutBytes number of bytes in output buffer after processing
\retval ::HI_SUCCESS : Success
\retval ::HI_FAILURE : FAILURE
\see \n
N/A
*/
HI_S32 AACEncoderFrame(AAC_ENCODER_S* hAacPlusEnc, HI_S16* ps16PcmBuf,
HI_U8* pu8Outbuf, HI_S32* ps32NumOutBytes);
/**
\brief close encoder device.
\attention \n
N/A
\param[in] hAacPlusEnc pointer to an configuration information structure
\retval N/A
\see \n
N/A
*/
HI_VOID AACEncoderClose (AAC_ENCODER_S* hAacPlusEnc);
/**
\brief register sbrenc module.
\attention \n
N/A
\param[in] pModuleHandle pointer to WorkHandle of sbrenc module
\retval ::HI_SUCCESS : Success
\retval ::HI_FAILURE : FAILURE
\see \n
N/A
*/
HI_S32 AACEncoderRegisterModule(HI_VOID* pModuleHandle);
/**
\brief Get WorkHandle of sbrenc module.
\attention \n
N/A
\retval ::HI_VOID * : pointer to WorkHandle of sbrenc module
\see \n
N/A
*/
HI_VOID * HI_AAC_SBRENC_GetHandle(HI_VOID);
/** @} */ /** <!-- ==== API declaration end ==== */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cpluscplus */
#endif /* __cpluscplus */
#endif /* _AACENC_H */

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/******************************************************************************
Copyright (C), 2016-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : acodec.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/6/15
Last Modified :
Description :
Function List :
******************************************************************************/
#ifndef _ACODEC_H_
#define _ACODEC_H_
#define IOC_TYPE_ACODEC 'A'
typedef enum hiACODEC_FS_E {
ACODEC_FS_8000 = 0x1,
ACODEC_FS_11025 = 0x2,
ACODEC_FS_12000 = 0x3,
ACODEC_FS_16000 = 0x4,
ACODEC_FS_22050 = 0x5,
ACODEC_FS_24000 = 0x6,
ACODEC_FS_32000 = 0x7,
ACODEC_FS_44100 = 0x8,
ACODEC_FS_48000 = 0x9,
ACODEC_FS_64000 = 0xa,
ACODEC_FS_96000 = 0xb,
ACODEC_FS_BUTT = 0xc,
} ACODEC_FS_E;
typedef enum hiACODEC_MIXER_E {
ACODEC_MIXER_IN0 = 0x0, /* 16EV200/16EV300/18EV300 Unsupport IN0. */
ACODEC_MIXER_IN1 = 0x1,
ACODEC_MIXER_IN_D = 0x2,
ACODEC_MIXER_BUTT,
} ACODEC_MIXER_E;
typedef struct {
/* volume control, 0x00~0x7e, 0x7F:mute */
unsigned int vol_ctrl;
/* adc/dac mute control, 1:mute, 0:unmute */
unsigned int vol_ctrl_mute;
} ACODEC_VOL_CTRL;
typedef enum hiACODEC_IOCTL_E {
IOC_NR_SOFT_RESET_CTRL = 0x0,
IOC_NR_SET_INPUT_VOL,
IOC_NR_SET_OUTPUT_VOL,
IOC_NR_GET_INPUT_VOL,
IOC_NR_GET_OUTPUT_VOL,
IOC_NR_SET_I2S1_FS,
IOC_NR_SET_MIXER_MIC,
IOC_NR_SEL_DAC_CLK,
IOC_NR_SEL_ADC_CLK,
IOC_NR_SEL_ANA_MCLK,
IOC_NR_SET_GAIN_MICL,
IOC_NR_SET_GAIN_MICR,
IOC_NR_SET_DACL_VOL,
IOC_NR_SET_DACR_VOL,
IOC_NR_SET_ADCL_VOL,
IOC_NR_SET_ADCR_VOL,
IOC_NR_SET_MICL_MUTE,
IOC_NR_SET_MICR_MUTE,
IOC_NR_SET_DACL_MUTE,
IOC_NR_SET_DACR_MUTE,
IOC_NR_BOOSTL_ENABLE,
IOC_NR_BOOSTR_ENABLE,
IOC_NR_GET_GAIN_MICL,
IOC_NR_GET_GAIN_MICR,
IOC_NR_GET_DACL_VOL,
IOC_NR_GET_DACR_VOL,
IOC_NR_GET_ADCL_VOL,
IOC_NR_GET_ADCR_VOL,
IOC_NR_SET_PD_DACL,
IOC_NR_SET_PD_DACR,
IOC_NR_SET_PD_ADCL,
IOC_NR_SET_PD_ADCR,
IOC_NR_SET_PD_LINEINL,
IOC_NR_SET_PD_LINEINR,
IOC_NR_SET_DAC_DE_EMPHASIS,
IOC_NR_SET_ADC_HP_FILTER,
IOC_NR_SET_I2S1_DATAWIDTH,
} ACODEC_IOCTL_E;
/* reset the audio code to the default config */
#define ACODEC_SOFT_RESET_CTRL \
_IO(IOC_TYPE_ACODEC, IOC_NR_SOFT_RESET_CTRL)
/* ACODEC_FS_E */
#define ACODEC_SET_I2S1_FS \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_I2S1_FS, unsigned int)
/* select the micpga's input, micin linein, or differential input(ACODEC_MIXER_E) */
#define ACODEC_SET_MIXER_MIC \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_MIXER_MIC, unsigned int)
/* analog part input volume control(left channel 0~0x1f) */
#define ACODEC_SET_GAIN_MICL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_GAIN_MICL, unsigned int)
/* analog part input volume control(right channel 0~0x1f) */
#define ACODEC_SET_GAIN_MICR \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_GAIN_MICR, unsigned int)
/* Output volume control(left channel) ACODEC_VOL_CTRL */
#define ACODEC_SET_DACL_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_DACL_VOL, ACODEC_VOL_CTRL)
/* Output volume control(right channel) ACODEC_VOL_CTRL */
#define ACODEC_SET_DACR_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_DACR_VOL, ACODEC_VOL_CTRL)
/* Input volume control(left channel) ACODEC_VOL_CTRL */
#define ACODEC_SET_ADCL_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_ADCL_VOL, ACODEC_VOL_CTRL)
/* Input volume control(right channel) ACODEC_VOL_CTRL */
#define ACODEC_SET_ADCR_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_ADCR_VOL, ACODEC_VOL_CTRL)
/* Input mute control(left channel), 1:mute, 0:unmute */
#define ACODEC_SET_MICL_MUTE \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_MICL_MUTE, unsigned int)
/* Input mute control(right channel), 1:mute, 0:unmute */
#define ACODEC_SET_MICR_MUTE \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_MICR_MUTE, unsigned int)
/* Output mute control(left channel), 1:mute, 0:unmute */
#define ACODEC_SET_DACL_MUTE \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_DACL_MUTE, unsigned int)
/* Output mute control(right channel), 1:mute, 0:unmute */
#define ACODEC_SET_DACR_MUTE \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_DACR_MUTE, unsigned int)
/* Audio AD BOOST Control, 1:on, 0:off */
#define ACODEC_ENABLE_BOOSTL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_BOOSTL_ENABLE, unsigned int)
#define ACODEC_ENABLE_BOOSTR \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_BOOSTR_ENABLE, unsigned int)
#define ACODEC_GET_GAIN_MICL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_GAIN_MICL, unsigned int)
#define ACODEC_GET_GAIN_MICR \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_GAIN_MICR, unsigned int)
#define ACODEC_GET_DACL_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_DACL_VOL, ACODEC_VOL_CTRL)
#define ACODEC_GET_DACR_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_DACR_VOL, ACODEC_VOL_CTRL)
#define ACODEC_GET_ADCL_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_ADCL_VOL, ACODEC_VOL_CTRL)
#define ACODEC_GET_ADCR_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_ADCR_VOL, ACODEC_VOL_CTRL)
/* set adcl power, 0: power up, 1: power down */
#define ACODEC_SET_PD_DACL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_PD_DACL, unsigned int)
/* set adcr power, 0: power up, 1: power down */
#define ACODEC_SET_PD_DACR \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_PD_DACR, unsigned int)
/* set adcl power, 0: power up, 1: power down */
#define ACODEC_SET_PD_ADCL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_PD_ADCL, unsigned int)
/* set adcr power, 0: power up, 1: power down */
#define ACODEC_SET_PD_ADCR \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_PD_ADCR, unsigned int)
/* set adcl power, 0: power up, 1: power down */
#define ACODEC_SET_PD_LINEINL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_PD_LINEINL, unsigned int)
/* set adcr power, 0: power up, 1: power down */
#define ACODEC_SET_PD_LINEINR \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_PD_LINEINR, unsigned int)
/* Don't need to set, the driver will set a default value */
/* clock of dac and adc is reverse or obverse */
#define ACODEC_SEL_DAC_CLK \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SEL_DAC_CLK, unsigned int)
#define ACODEC_SEL_ADC_CLK \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SEL_ADC_CLK, unsigned int)
/* clock of analog part and digital part is reverse or obverse */
#define ACODEC_SEL_ANA_MCLK \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SEL_ANA_MCLK, unsigned int)
#define ACODEC_SET_DAC_DE_EMPHASIS \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_DAC_DE_EMPHASIS, unsigned int)
#define ACODEC_SET_ADC_HP_FILTER \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_ADC_HP_FILTER, unsigned int)
#define ACODEC_SET_INPUT_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_INPUT_VOL, unsigned int)
#define ACODEC_SET_OUTPUT_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_OUTPUT_VOL, unsigned int)
#define ACODEC_GET_INPUT_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_INPUT_VOL, unsigned int)
#define ACODEC_GET_OUTPUT_VOL \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_GET_OUTPUT_VOL, unsigned int)
/* Reserved ioctl cmd */
#define ACODEC_SET_I2S1_DATAWIDTH \
_IOWR(IOC_TYPE_ACODEC, IOC_NR_SET_I2S1_DATAWIDTH, unsigned int)
#endif /* End of #ifndef _ACODEC_H_ */

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/*
* Automatically generated C config: don't edit
* Busybox version:
*/
#define AUTOCONF_TIMESTAMP "2019-10-18 18:20:56 CST"
/*
* General Setup
*/
#define CONFIG_HI3516EV200 1
#define CONFIG_HI_CHIP_TYPE 0x3516E200
#define CONFIG_HI_ARCH "hi3516ev200"
#define CONFIG_HI_SUBARCH ""
#define CONFIG_HI_SUBCHIP_TYPE 0x
#define CONFIG_SUBCHIP_HI3516EV200 1
#define CONFIG_HI_SUBARCH ""
#define CONFIG_HI_SUBCHIP_TYPE 0x
#define CONFIG_UP 1
#define CONFIG_ARM_ARCH_TYPE "up"
#define CONFIG_A7 1
#define CONFIG_CPU_TYPE "a7"
#define CONFIG_VERSION_ASIC 1
#define CONFIG_HI_FPGA "n"
#define CONFIG_LINUX_OS 1
#define CONFIG_OS_TYPE "linux"
#define CONFIG_LINUX_4_9_y 1
#define CONFIG_KERNEL_VERSION "linux-4.9.y"
#define CONFIG_KERNEL_ARM_HIMIX100_LINUX 1
#define CONFIG_HI_CROSS "arm-himix100-linux-"
#define CONFIG_LIBC_TYPE "uclibc"
#define CONFIG_KERNEL_BIT "KERNEL_BIT_32"
#define CONFIG_USER_ARM_HIMIX100_LINUX 1
#define CONFIG_HI_CROSS_LIB "arm-himix100-linux-"
#define CONFIG_USER_BIT "USER_BIT_32"
#define CONFIG_RELEASE_TYPE_RELEASE 1
#define CONFIG_HI_RLS_MODE "HI_RELEASE"
#define CONFIG_CUSTOMER_VERSION_COMMON 1
#define CONFIG_CUSTOMER_VERSION "COMMON"
/*
* Media Modules Setup
*/
/*
* media base config
*/
/*
* media sys config
*/
#define CONFIG_HI_SYS_SUPPORT 1
#define CONFIG_HI_SYS_SCALE_COEF_SUPPORT 1
/*
* media vi config
*/
#define CONFIG_HI_VI_SUPPORT 1
#define CONFIG_HI_VI_BT656 1
#define CONFIG_HI_VI_MIPI 1
#define CONFIG_HI_ISP_2DOF_DIS_SUPPORT 1
#define CONFIG_HI_VI_LDCV3_SUPPORT 1
#define CONFIG_HI_VI_USERPIC_SUPPORT 1
#define CONFIG_HI_VI_COVEREX_OVERLAYEX_SUPPORT 1
#define CONFIG_HI_VI_LUMA_SUPPORT 1
#define CONFIG_HI_VI_FPN_SUPPORT 1
#define CONFIG_HI_VI_EXTCHN_SUPPORT 1
/*
* media isp config
*/
#define CONFIG_HI_ISP_SUPPORT 1
#define CONFIG_HI_ISP_AF_SUPPORT 1
#define CONFIG_HI_ISP_CR_SUPPORT 1
#define CONFIG_HI_ISP_PREGAMMA_SUPPORT 1
#define CONFIG_HI_ISP_CA_SUPPORT 1
/*
* media dis config
*/
/*
* media vpss config
*/
#define CONFIG_HI_VPSS_SUPPORT 1
#define CONFIG_HI_VPSS_3DNR 1
#define CONFIG_HI_VPSS_CHN0_BUF_WRAP 1
#define CONFIG_HI_VPSS_LUMA_STAT_SUPPORT 1
#define CONFIG_HI_VPSS_VGS_LDC_SUPPORT 1
#define CONFIG_HI_VPSS_VGS_ROTATION_SUPPORT 1
#define CONFIG_HI_VPSS_COVER_SUPPORT 1
#define CONFIG_HI_VPSS_MOSAIC_SUPPORT 1
#define CONFIG_HI_VPSS_BUFFER_REUSE_SUPPORT 1
/*
* media avs config
*/
/*
* media gdc config
*/
/*
* media vgs config
*/
#define CONFIG_HI_VGS_SUPPORT 1
#define CONFIG_HI_VGS_IVE_PRE_SUPPORT 1
#define CONFIG_HI_VGS_LUMA_STAT_SUPPORT 1
/*
* media chnl config
*/
#define CONFIG_HI_CHNL_SUPPORT 1
/*
* media venc config
*/
#define CONFIG_HI_VENC_SUPPORT 1
#define CONFIG_HI_H265E_SUPPORT 1
#define CONFIG_HI_H265E_USERDATA_SUPPORT 1
#define CONFIG_HI_H265E_INTRA_REFRESH_SUPPORT 1
#define CONFIG_HI_H264E_SUPPORT 1
#define CONFIG_HI_H264E_SVC_SUPPORT 1
#define CONFIG_HI_H264E_USERDATA_SUPPORT 1
#define CONFIG_HI_H264E_INTRA_REFRESH_SUPPORT 1
#define CONFIG_HI_JPEGE_SUPPORT 1
#define CONFIG_HI_MJPEGE_SUPPORT 1
#define CONFIG_HI_JPEGE_DCF_SUPPORT 1
#define CONFIG_HI_JPEGE_USERDATA_SUPPORT 1
#define CONFIG_HI_VENC_LOWDELAY_SUPPORT 1
#define CONFIG_HI_VENC_FRAMEBUF_RECYCLE_SUPPORT 1
#define CONFIG_HI_VENC_MPF_VGS_SUPPORT 1
#define CONFIG_HI_VENC_VGS_SUPPORT 1
#define CONFIG_HI_VENC_SMARTP_SUPPORT 1
#define CONFIG_HI_VENC_DUALP_SUPPORT 1
#define CONFIG_HI_VENC_RCNREF_SHARE_SUPPORT 1
#define CONFIG_HI_VENC_DEBREATH_SUPPORT 1
#define CONFIG_HI_VENC_SKIPREF_SUPPORT 1
#define CONFIG_HI_VENC_SCENE0_SUPPORT 1
#define CONFIG_HI_VENC_SCENE1_SUPPORT 1
#define CONFIG_HI_VENC_SCENE2_SUPPORT 1
#define CONFIG_HI_RC_AVBR_SUPPORT 1
#define CONFIG_HI_RC_QPMAP_SUPPORT 1
#define CONFIG_HI_RC_QVBR_SUPPORT 1
#define CONFIG_HI_RC_CVBR_SUPPORT 1
/*
* media vdec config
*/
#define CONFIG_VDEC_IP ""
/*
* media vo config
*/
#define CONFIG_HI_VO_SUPPORT 1
#define CONFIG_HI_VO_COVER_OSD_SUPPORT 1
#define CONFIG_HI_VO_VGS 1
#define CONFIG_HI_VO_GRAPH 1
/*
* media region config
*/
#define CONFIG_HI_REGION_SUPPORT 1
#define CONFIG_HI_RGN_DIFFPIXOSD_SUPPORT 1
/*
* media audio config
*/
#define CONFIG_HI_AUDIO_SUPPORT 1
#define CONFIG_HI_ACODEC_SUPPORT 1
#define CONFIG_HI_ACODEC_VERSION "V750"
#define CONFIG_HI_ACODEC_MAX_GAIN 56
#define CONFIG_HI_ACODEC_MIN_GAIN 0
#define CONFIG_HI_ACODEC_GAIN_STEP 3
#define CONFIG_HI_ACODEC_FAST_POWER_SUPPORT 1
#define CONFIG_HI_DOWNVQE_SUPPORT 1
#define CONFIG_HI_TALKVQE_SUPPORT 1
#define CONFIG_HI_RECORDVQE_SUPPORT 1
#define CONFIG_HI_AUDIO_STATIC_REGISTER_SUPPORT 1
#define CONFIG_HI_AUDIO_BCD_SUPPORT 1
#define CONFIG_HI_AUDIO_3518EV300_SUPPORT_BCD 1
/*
* media hdr config
*/
/*
* media mcf config
*/
/*
* Device Driver Setup
*/
/*
* drv config
*/
#define CONFIG_DRV 1
#define CONFIG_EXTDRV 1
#define CONFIG_INTERDRV 1
#define CONFIG_CIPHER 1
#define CONFIG_HIUSER 1
#define CONFIG_MIPI_RX 1
#define CONFIG_HI_WDG 1
#define CONFIG_HI_SYSCFG 1
#define CONFIG_HI_LSADC 1
/*
* Component Setup
*/
/*
* Component hdmi Config
*/
/*
* Component hifb Config
*/
#define CONFIG_HI_HIFB_SUPPORT 1
#define CONFIG_HI_HIFB_VGS 1
/*
* Component svp Config
*/
#define CONFIG_HI_SVP_IVE 1
#define CONFIG_HI_SVP_IVE_NORM_GRAD 1
#define CONFIG_HI_SVP_IVE_ST_CANDI_CORNER 1
#define CONFIG_HI_SVP_IVE_CNN_EX 1
#define CONFIG_HI_SVP_IVP 1
#define CONFIG_HI_SVP_MD 1
#define CONFIG_HI_SVP_QR 1
/*
* Component photo Config
*/
/*
* Component tde Config
*/
#define CONFIG_HI_TDE_SUPPORT 1
/*
* Component pciv Config
*/
/*
* Component avs lut Config
*/
/*
* Component pos_query Config
*/
/*
* Component tzasc Config
*/
/*
* Component motionfusion config
*/
/*
* Component pm Config
*/
#define CONFIG_HI_PM_SUPPORT 1
/*
* HISYSLINK Setup
*/
/*
* hisyslink config
*/
/*
* Debug Config
*/
#define CONFIG_HI_GDB_NO 1
#define CONFIG_HI_GDB "n"
#define CONFIG_HI_LOG_TRACE_SUPPORT 1
#define CONFIG_HI_LOG_TRACE_ALL 1
#define CONFIG_HI_LOG_TRACE_LEVEL 7
/*
* Test Config
*/

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/*
*
* Copyright (c) 2017 Hisilicon Co., Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
*/
#ifndef __HI_ADC_H__
#define __HI_ADC_H__
#define LSADC_IOCTL_BASE 'A'
typedef enum hiIOC_NR_LSADC_E
{
IOC_NR_LSADC_MODEL_SEL = 0,
IOC_NR_LSADC_CHN_ENABLE,
IOC_NR_LSADC_CHN_DISABLE,
IOC_NR_LSADC_START,
IOC_NR_LSADC_STOP,
IOC_NR_LSADC_GET_CHNVAL,
IOC_NR_LSADC_BUTT
}IOC_NR_LSADC_E;
#define LSADC_IOC_MODEL_SEL _IOWR(LSADC_IOCTL_BASE, IOC_NR_LSADC_MODEL_SEL, int)
#define LSADC_IOC_CHN_ENABLE _IOW(LSADC_IOCTL_BASE, IOC_NR_LSADC_CHN_ENABLE, int)
#define LSADC_IOC_CHN_DISABLE _IOW(LSADC_IOCTL_BASE, IOC_NR_LSADC_CHN_DISABLE, int)
#define LSADC_IOC_START _IO(LSADC_IOCTL_BASE, IOC_NR_LSADC_START)
#define LSADC_IOC_STOP _IO(LSADC_IOCTL_BASE, IOC_NR_LSADC_STOP)
#define LSADC_IOC_GET_CHNVAL _IOWR(LSADC_IOCTL_BASE, IOC_NR_LSADC_GET_CHNVAL, int)
#endif /* __HI_ADC_H__ */

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_ae_comm.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2012/12/18
Description :
History :
1.Date : 2012/12/18
Author :
Modification: Created file
******************************************************************************/
#ifndef __HI_AE_COMM_H__
#define __HI_AE_COMM_H__
#include "hi_type.h"
#include "hi_comm_isp.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#define HI_AE_LIB_NAME "hisi_ae_lib"
/************************** ae ctrl cmd **************************************/
typedef enum hiAE_CTRL_CMD_E {
AE_DEBUG_ATTR_SET,
AE_DEBUG_ATTR_GET,
AE_CTRL_BUTT,
} AE_CTRL_CMD_E;
typedef struct hiAE_DBG_ATTR_S {
HI_U32 u32MaxIntTime;
HI_U32 u32MinIntTime;
HI_U32 u32MaxAgain;
HI_U32 u32MinAgain;
HI_U32 u32MaxDgain;
HI_U32 u32MinDgain;
HI_U32 u32MaxIspDgain;
HI_U32 u32MinIspDgain;
HI_U32 u32MaxSysGain;
HI_U32 u32MinSysGain;
HI_U32 u32Compensation;
HI_U32 u32EVBias;
HI_BOOL bManualExposureEn;
HI_BOOL bManualTimeEn;
HI_BOOL bManualAgainEn;
HI_BOOL bManualDgainEn;
HI_BOOL bManualIspDgainEn;
HI_U32 u32ManualExposureLines;
HI_U32 u32ManualAgain;
HI_U32 u32ManualDgain;
HI_U32 u32ManualIspDgain;
HI_U32 au32AeWeights[AE_ZONE_ROW *AE_ZONE_COLUMN];
} AE_DBG_ATTR_S;
typedef struct hiAE_DBG_STATUS_S {
HI_U32 u32FrmNumBgn;
HI_U32 u32FullLines;
HI_U32 u32IntTime;
HI_U32 u32ShortIntTime;
HI_U32 u32MedIntTime;
HI_U32 u32LongIntTime;
HI_U32 u32Again;
HI_U32 u32Dgain;
HI_U32 u32IspDgain;
HI_U32 u32IrisFNOLin;
HI_U64 u64Exposure;
HI_U32 u32Increment;
HI_S32 s32HistError;
HI_S32 s32HistOriAverage;
HI_S32 s32LumaOffset;
HI_U32 u32Iso;
HI_U32 u32ExpRatio;
HI_U32 u32OverExpRatio;
HI_U32 u32OverExpRatioFilter;
} AE_DBG_STATUS_S;
/************************** sensor's interface to ae *********************/
/* eg: 0.35db, enAccuType=AE_ACCURACY_DB, f32Accuracy=0.35
* and the multiply of 0.35db is power(10, (0.35/20))
* eg: 1/16, 2/16, 3/16 multiplies, enAccuType=AE_ACCURACY_LINEAR, f32Accuracy=0.0625
* eg: 1,2,4,8,16 multiplies, enAccuType=AE_ACCURACY_DB, f32Accuracy=6
*/
typedef enum hiAE_ACCURACY_E {
AE_ACCURACY_DB = 0,
AE_ACCURACY_LINEAR,
AE_ACCURACY_TABLE,
AE_ACCURACY_BUTT,
} AE_ACCURACY_E;
typedef struct hiAE_ACCURACY_S {
AE_ACCURACY_E enAccuType;
float f32Accuracy;
float f32Offset;
} AE_ACCURACY_S;
typedef struct hiAE_SENSOR_DEFAULT_S {
HI_U8 au8HistThresh[HIST_THRESH_NUM];
HI_U8 u8AeCompensation;
HI_U32 u32LinesPer500ms;
HI_U32 u32FlickerFreq;
HI_FLOAT f32Fps;
HI_U32 u32HmaxTimes; /* unit is ns */
HI_U32 u32InitExposure;
HI_U32 u32InitAESpeed;
HI_U32 u32InitAETolerance;
HI_U32 u32FullLinesStd;
HI_U32 u32FullLinesMax;
HI_U32 u32FullLines;
HI_U32 u32MaxIntTime; /* RW;unit is line */
HI_U32 u32MinIntTime;
HI_U32 u32MaxIntTimeTarget;
HI_U32 u32MinIntTimeTarget;
AE_ACCURACY_S stIntTimeAccu;
HI_U32 u32MaxAgain;
HI_U32 u32MinAgain;
HI_U32 u32MaxAgainTarget;
HI_U32 u32MinAgainTarget;
AE_ACCURACY_S stAgainAccu;
HI_U32 u32MaxDgain;
HI_U32 u32MinDgain;
HI_U32 u32MaxDgainTarget;
HI_U32 u32MinDgainTarget;
AE_ACCURACY_S stDgainAccu;
HI_U32 u32MaxISPDgainTarget;
HI_U32 u32MinISPDgainTarget;
HI_U32 u32ISPDgainShift;
HI_U32 u32MaxIntTimeStep;
HI_U32 u32LFMaxShortTime;
HI_U32 u32LFMinExposure;
ISP_AE_ROUTE_S stAERouteAttr;
HI_BOOL bAERouteExValid;
ISP_AE_ROUTE_EX_S stAERouteAttrEx;
ISP_AE_ROUTE_S stAERouteSFAttr;
ISP_AE_ROUTE_EX_S stAERouteSFAttrEx;
HI_U16 u16ManRatioEnable;
HI_U32 au32Ratio[EXP_RATIO_NUM];
ISP_IRIS_TYPE_E enIrisType;
ISP_PIRIS_ATTR_S stPirisAttr;
ISP_IRIS_F_NO_E enMaxIrisFNO; /* RW; Range:[0, 10]; Format:4.0; Max F number of Piris's aperture, it's related to the specific iris */
ISP_IRIS_F_NO_E enMinIrisFNO; /* RW; Range:[0, 10]; Format:4.0; Min F number of Piris's aperture, it's related to the specific iris */
ISP_AE_STRATEGY_E enAeExpMode;
HI_U16 u16ISOCalCoef;
HI_U8 u8AERunInterval;
HI_U32 u32ExpRatioMax;
HI_U32 u32ExpRatioMin;
HI_BOOL bDiffGainSupport;
} AE_SENSOR_DEFAULT_S;
typedef struct hiAE_FSWDR_ATTR_S {
ISP_FSWDR_MODE_E enFSWDRMode;
} AE_FSWDR_ATTR_S;
typedef struct hiAE_SENSOR_EXP_FUNC_S {
HI_S32 (*pfn_cmos_get_ae_default)(VI_PIPE ViPipe, AE_SENSOR_DEFAULT_S *pstAeSnsDft);
/* the function of sensor set fps */
HI_VOID (*pfn_cmos_fps_set)(VI_PIPE ViPipe, HI_FLOAT f32Fps, AE_SENSOR_DEFAULT_S *pstAeSnsDft);
HI_VOID (*pfn_cmos_slow_framerate_set)(VI_PIPE ViPipe, HI_U32 u32FullLines, AE_SENSOR_DEFAULT_S *pstAeSnsDft);
/* while isp notify ae to update sensor regs, ae call these funcs. */
HI_VOID (*pfn_cmos_inttime_update)(VI_PIPE ViPipe, HI_U32 u32IntTime);
HI_VOID (*pfn_cmos_gains_update)(VI_PIPE ViPipe, HI_U32 u32Again, HI_U32 u32Dgain);
HI_VOID (*pfn_cmos_again_calc_table)(VI_PIPE ViPipe, HI_U32 *pu32AgainLin, HI_U32 *pu32AgainDb);
HI_VOID (*pfn_cmos_dgain_calc_table)(VI_PIPE ViPipe, HI_U32 *pu32DgainLin, HI_U32 *pu32DgainDb);
HI_VOID (*pfn_cmos_get_inttime_max)(VI_PIPE ViPipe, HI_U16 u16ManRatioEnable, HI_U32 *au32Ratio, HI_U32 *au32IntTimeMax, HI_U32 *au32IntTimeMin, HI_U32 *pu32LFMaxIntTime);
/* long frame mode set */
HI_VOID (*pfn_cmos_ae_fswdr_attr_set)(VI_PIPE ViPipe, AE_FSWDR_ATTR_S *pstAeFSWDRAttr);
} AE_SENSOR_EXP_FUNC_S;
typedef struct hiAE_SENSOR_REGISTER_S {
AE_SENSOR_EXP_FUNC_S stSnsExp;
} AE_SENSOR_REGISTER_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_af_comm.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2012/12/20
Description :
History :
1.Date : 2012/12/20
Author :
Modification: Created file
******************************************************************************/
#ifndef __HI_AF_COMM_H__
#define __HI_AF_COMM_H__
#include "hi_type.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#define HI_AF_LIB_NAME "hisi_af_lib"
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2001-2019. All rights reserved.
* Description: header of baby crying detection
* Author: Hisilicon multimedia software group
* Create: 2019-04-01
*/
#ifndef __HI_AUDIO_BCD_H__
#define __HI_AUDIO_BCD_H__
#include "hi_type.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Defines the error of Baby Crying Detection. */
#define HI_ERR_BCD_INVALID_HANDLE (hi_u32)(0xA0148100) /* Handle passed to function call was invalid. */
#define HI_ERR_BCD_MEMORY_ERROR (hi_u32)(0xA0148101) /* Memory allocation failed. */
#define HI_ERR_BCD_ILLEGAL_PARAM (hi_u32)(0xA0148102) /* Parameter not illegal. */
#define HI_ERR_BCD_NULL_PTR (hi_u32)(0xA0148103) /* Pointer is null. */
#define HI_ERR_BCD_NOT_PERM (hi_u32)(0xA0148104) /* Operation not permitted. */
typedef hi_void *bcd_handle;
typedef hi_s32 (*fn_bcd_callback)(hi_void *); /* Baby Crying Detection be noticed Function Handle type */
/* Defines the configure parameters of Baby Crying Detection. */
typedef struct {
hi_bool usr_mode; /* mode 0: auto mode 1: mannual. */
hi_bool bypass; /* value 0: enable function; value 1: bypass function. */
hi_u32 alarm_threshold; /* alarm threshold. range[0, 100] */
hi_u32 time_limit; /* alarm time limit(ms). */
hi_u32 time_limit_threshold_count; /* alarm time limit threshold count. */
hi_u32 interval_time; /* alarm interval time(ms) */
fn_bcd_callback callback; /* the callback function pointer */
} hi_bcd_config;
/* Defines the process data configure of Baby Crying Detection. */
typedef struct {
hi_s16 *data; /* the pointer to data buf. */
hi_s32 data_size; /* the size of data buf. */
} hi_bcd_process_data;
hi_s32 hi_baby_crying_detection_init(bcd_handle *bcd, hi_s32 sample_rate, const hi_bcd_config *bcd_config);
hi_s32 hi_baby_crying_detection_process(bcd_handle bcd, hi_bcd_process_data *input_data,
hi_bcd_process_data *output_data);
hi_s32 hi_baby_crying_detection_deinit(bcd_handle bcd);
#ifdef __cplusplus
}
#endif
#endif

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_awb_comm.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2012/12/19
Description :
History :
1.Date : 2012/12/19
Author :
Modification: Created file
******************************************************************************/
#ifndef __HI_AWB_COMM_H__
#define __HI_AWB_COMM_H__
#include "hi_type.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#define HI_AWB_LIB_NAME "hisi_awb_lib"
typedef struct hiAWB_DBG_ATTR_S {
HI_U16 u16WhiteLevel;
HI_U16 u16BlackLevel;
HI_U16 u16CrMax;
HI_U16 u16CrMin;
HI_U16 u16CbMax;
HI_U16 u16CbMin;
HI_U16 u16CrHigh;
HI_U16 u16CrLow;
HI_U16 u16CbHigh;
HI_U16 u16CbLow;
HI_U16 u16RawWhiteLevel;
HI_U16 u16RawBlackLevel;
HI_U16 u16RawCrMax;
HI_U16 u16RawCrMin;
HI_U16 u16RawCbMax;
HI_U16 u16RawCbMin;
HI_U16 u16RawCrHigh;
HI_U16 u16RawCrLow;
HI_U16 u16RawCbHigh;
HI_U16 u16RawCbLow;
HI_U16 u16WDRMode;
HI_U16 u16Enable;
HI_U16 u16ManualEnable;
HI_U16 u16Zone;
HI_U16 u16HighTemp;
HI_U16 u16LowTemp;
HI_U16 u16RefTemp;
HI_U16 u16RgainBase;
HI_U16 u16GgainBase;
HI_U16 u16BgainBase;
HI_S32 s32p1;
HI_S32 s32p2;
HI_S32 s32q;
HI_S32 s32a;
HI_S32 s32c;
HI_U16 u16ManSatEnable;
HI_U16 u16SatTarget;
} AWB_DBG_ATTR_S;
typedef struct hiAWB_ZONE_DBG_S {
HI_U16 u16Sum;
HI_U16 u16Rg;
HI_U16 u16Bg;
HI_U16 u16CountAll;
HI_U16 u16CountMin;
HI_U16 u16CountMax;
HI_U16 u16RawRAvg;
HI_U16 u16RawGAvg;
HI_U16 u16RawBAvg;
HI_U16 u16TK;
HI_U16 u16Weight;
HI_S16 s16Shift;
} AWB_ZONE_DBG_S;
typedef struct hiAWB_DBG_STATUS_S {
HI_U32 u32FrmNumBgn;
HI_U32 u32GlobalSum;
HI_U16 u16GlobalRgSta;
HI_U16 u16GlobalBgSta;
HI_U16 u16GlobalCountAll;
HI_U16 u16GlobalCountMin;
HI_U16 u16GlobalCountMax;
HI_U16 u16GlobalRAvg;
HI_U16 u16GlobalGAvg;
HI_U16 u16GlobalBAvg;
HI_U16 u16TK;
HI_U16 u16Rgain;
HI_U16 u16Ggain;
HI_U16 u16Bgain;
HI_U16 au16CCM[CCM_MATRIX_SIZE];
HI_U32 au32HistInfo[256];
AWB_ZONE_DBG_S astZoneDebug[AWB_ZONE_NUM];
HI_U32 u32FrmNumEnd;
} AWB_DBG_STATUS_S;
/************************** sensor's interface to awb *********************/
typedef struct hiAWB_CCM_TAB_S {
HI_U16 u16ColorTemp; /* RW; Range:[2000,10000]; Format:16.0; the current color temperature */
HI_U16 au16CCM[CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8; CCM matrixes for different color temperature */
} AWB_CCM_TAB_S;
typedef struct hiAWB_CCM_S {
HI_U16 u16CCMTabNum; /* RW; Range: [0x3, 0x7]; Format:16.0; The number of CCM matrixes */
AWB_CCM_TAB_S astCCMTab[CCM_MATRIX_NUM];
} AWB_CCM_S;
typedef struct hiAWB_AGC_TABLE_S {
HI_BOOL bValid;
HI_U8 au8Saturation[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;adjust saturation, different iso with different saturation */
} AWB_AGC_TABLE_S;
typedef struct hiAWB_SENSOR_DEFAULT_S {
HI_U16 u16WbRefTemp; /* RW;reference color temperature for WB */
HI_U16 au16GainOffset[ISP_BAYER_CHN_NUM]; /* RW; gain offset for white balance */
HI_S32 as32WbPara[AWB_CURVE_PARA_NUM]; /* RW; parameter for wb curve,p1,p2,q1,a1,b1,c1 */
HI_U16 u16GoldenRgain; /* Rgain for the golden sample */
HI_U16 u16GoldenBgain; /* Bgain for the golden sample */
HI_U16 u16SampleRgain; /* Rgain for the current sample */
HI_U16 u16SampleBgain; /* Bgain for the current sample */
AWB_AGC_TABLE_S stAgcTbl;
AWB_CCM_S stCcm;
HI_U16 u16InitRgain; /* Init WB gain */
HI_U16 u16InitGgain;
HI_U16 u16InitBgain;
HI_U8 u8AWBRunInterval; /* RW;AWB Run Interval */
HI_U16 au16InitCCM[CCM_MATRIX_SIZE];
} AWB_SENSOR_DEFAULT_S;
typedef struct hiAWB_SPEC_SENSOR_DEFAULT_S {
ISP_SPECAWB_ATTR_S stSpecAwbAttrs;
ISP_SPECAWB_CAA_CONTROl_S stCaaControl;
} AWB_SPEC_SENSOR_DEFAULT_S;
typedef struct hiAWB_SENSOR_EXP_FUNC_S {
HI_S32 (*pfn_cmos_get_awb_default)(VI_PIPE ViPipe, AWB_SENSOR_DEFAULT_S *pstAwbSnsDft);
HI_S32 (*pfn_cmos_get_awb_spec_default)(VI_PIPE ViPipe, AWB_SPEC_SENSOR_DEFAULT_S *pstAwbSpecSnsDft);
} AWB_SENSOR_EXP_FUNC_S;
typedef struct hiAWB_SENSOR_REGISTER_S {
AWB_SENSOR_EXP_FUNC_S stSnsExp;
} AWB_SENSOR_REGISTER_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif

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/*
* Copyright (c) Hisilicon Technologies Co., Ltd. 2011-2019. All rights reserved.
* Description:
* Author: Hisilicon multimedia software group
* Create: 2011/06/28
*/
#ifndef __HI_BUFFER_H__
#define __HI_BUFFER_H__
#include "hi_math.h"
#include "hi_type.h"
#include "hi_common.h"
#include "hi_comm_video.h"
#ifndef __HuaweiLite__
#ifdef __KERNEL__
#include "hi_osal.h"
#endif
#endif
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#define HI_MAXINUM_LIMIT 10000
__inline static HI_VOID COMMON_GetPicBufferConfig(HI_U32 u32Width, HI_U32 u32Height,
PIXEL_FORMAT_E enPixelFormat, DATA_BITWIDTH_E enBitWidth,
COMPRESS_MODE_E enCmpMode, HI_U32 u32Align, VB_CAL_CONFIG_S *pstCalConfig)
{
HI_U32 u32BitWidth = 0;
HI_U32 u32VBSize = 0;
HI_U32 u32HeadSize = 0;
HI_U32 u32AlignHeight;
HI_U32 u32MainStride = 0;
HI_U32 u32MainSize = 0;
HI_U32 u32HeadStride = 0;
HI_U32 u32HeadYSize = 0;
HI_U32 u32YSize = 0;
if ((u32Width > HI_MAXINUM_LIMIT) || (u32Height > HI_MAXINUM_LIMIT)) {
pstCalConfig->u32VBSize = 0;
}
/* u32Align: 0 is automatic mode, alignment size following system. Non-0 for specified alignment size */
if (u32Align == 0) {
u32Align = DEFAULT_ALIGN;
} else if (u32Align > MAX_ALIGN) {
u32Align = MAX_ALIGN;
} else {
u32Align = (ALIGN_UP(u32Align, DEFAULT_ALIGN));
}
switch (enBitWidth) {
case DATA_BITWIDTH_8: {
u32BitWidth = 8;
break;
}
case DATA_BITWIDTH_16: {
u32BitWidth = 16;
break;
}
default:
{
u32BitWidth = 0;
break;
}
}
u32AlignHeight = ALIGN_UP(u32Height, 2);
if (enCmpMode == COMPRESS_MODE_NONE) {
u32MainStride = ALIGN_UP((u32Width * u32BitWidth + 7) >> 3, u32Align);
u32YSize = u32MainStride * u32AlignHeight;
if ((PIXEL_FORMAT_YVU_SEMIPLANAR_420 == enPixelFormat) ||
(PIXEL_FORMAT_YUV_SEMIPLANAR_420 == enPixelFormat)) {
u32MainSize = (u32MainStride * u32AlignHeight * 3) >> 1;
} else if ((PIXEL_FORMAT_YVU_SEMIPLANAR_422 == enPixelFormat) ||
(PIXEL_FORMAT_YUV_SEMIPLANAR_422 == enPixelFormat)) {
u32MainSize = u32MainStride * u32AlignHeight * 2;
} else if ((enPixelFormat == PIXEL_FORMAT_YUV_400) ||
(enPixelFormat == PIXEL_FORMAT_S16C1) ||
(enPixelFormat == PIXEL_FORMAT_U16C1) ||
(enPixelFormat == PIXEL_FORMAT_S8C1) ||
(enPixelFormat == PIXEL_FORMAT_U8C1)) {
u32MainSize = u32MainStride * u32AlignHeight;
} else if ((PIXEL_FORMAT_YUYV_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_YVYU_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_UYVY_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_VYUY_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_YYUV_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_YYVU_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_UVYY_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_VUYY_PACKAGE_422 == enPixelFormat) ||
(PIXEL_FORMAT_VY1UY0_PACKAGE_422 == enPixelFormat)) {
u32MainStride = ALIGN_UP((u32Width * u32BitWidth + 7) >> 3, u32Align) * 2;
u32MainSize = u32MainStride * u32AlignHeight;
} else {
u32MainSize = u32MainStride * u32AlignHeight * 3;
}
u32VBSize = u32MainSize;
} else {
HI_U32 u32CmpRatioLuma = 1450;
HI_U32 u32CmpRatioChroma = 1800;
HI_U32 u32CSizeFor420;
u32HeadStride = 16;
u32HeadYSize = u32HeadStride * u32AlignHeight;
#ifndef __HuaweiLite__
#ifdef __KERNEL__
u32YSize = osal_div64_u64(u32Width * u32AlignHeight * 1000ULL, u32CmpRatioLuma);
#else
u32YSize = u32Width * u32AlignHeight * 1000ULL / u32CmpRatioLuma;
#endif
#else
u32YSize = u32Width * u32AlignHeight * 1000ULL / u32CmpRatioLuma;
#endif
u32YSize = ALIGN_UP(u32YSize, DEFAULT_ALIGN);
#ifndef __HuaweiLite__
#ifdef __KERNEL__
u32CSizeFor420 = osal_div64_u64(u32Width * u32AlignHeight * 1000ULL, u32CmpRatioChroma * 2);
#else
u32CSizeFor420 = (u32Width * u32AlignHeight * 1000ULL) / (u32CmpRatioChroma*2);
#endif
#else
u32CSizeFor420 = (u32Width * u32AlignHeight * 1000ULL) / (u32CmpRatioChroma*2);
#endif
u32CSizeFor420 = ALIGN_UP(u32CSizeFor420, DEFAULT_ALIGN);
if ((PIXEL_FORMAT_YVU_SEMIPLANAR_420 == enPixelFormat) ||
(PIXEL_FORMAT_YUV_SEMIPLANAR_420 == enPixelFormat)) {
u32HeadSize = u32HeadYSize + u32HeadYSize / 2;
u32MainSize = u32YSize + u32CSizeFor420;
} else if (PIXEL_FORMAT_YVU_SEMIPLANAR_422 == enPixelFormat ||
PIXEL_FORMAT_YUV_SEMIPLANAR_422 == enPixelFormat) {
u32HeadSize = u32HeadYSize * 2;
u32MainSize = u32YSize + (u32CSizeFor420 * 2);
} else if (enPixelFormat == PIXEL_FORMAT_YUV_400) {
u32HeadSize = u32HeadYSize;
u32MainSize = u32YSize;
} else {
u32HeadSize = u32HeadYSize * 3;
u32MainSize = u32YSize + (u32CSizeFor420 * 2) * 2;
}
if (u32Width <= VPSS_LINE_BUFFER) {
u32HeadSize = 64 + ALIGN_UP(u32HeadSize, u32Align);
u32VBSize = u32HeadSize + u32MainSize;
} else {
u32HeadSize = (64 + ALIGN_UP(u32HeadSize, u32Align)) * 2;
u32VBSize = u32HeadSize + u32MainSize + 2 * DEFAULT_ALIGN;
}
}
pstCalConfig->u32VBSize = u32VBSize;
pstCalConfig->u32HeadStride = u32HeadStride;
pstCalConfig->u32HeadYSize = u32HeadYSize;
pstCalConfig->u32HeadSize = u32HeadSize;
pstCalConfig->u32MainStride = u32MainStride;
pstCalConfig->u32MainYSize = u32YSize;
pstCalConfig->u32MainSize = u32MainSize;
pstCalConfig->u32ExtStride = 0;
pstCalConfig->u32ExtYSize = 0;
return;
}
__inline static HI_U32 COMMON_GetPicBufferSize(HI_U32 u32Width, HI_U32 u32Height,
PIXEL_FORMAT_E enPixelFormat, DATA_BITWIDTH_E enBitWidth, COMPRESS_MODE_E enCmpMode, HI_U32 u32Align)
{
VB_CAL_CONFIG_S stCalConfig;
COMMON_GetPicBufferConfig(u32Width, u32Height, enPixelFormat, enBitWidth, enCmpMode, u32Align, &stCalConfig);
return stCalConfig.u32VBSize;
}
__inline static HI_U32 VPSS_GetWrapBufferSize(HI_U32 u32Width, HI_U32 u32Height, HI_U32 u32BufLine,
PIXEL_FORMAT_E enPixelFormat, DATA_BITWIDTH_E enBitWidth, COMPRESS_MODE_E enCmpMode, HI_U32 u32Align)
{
VB_CAL_CONFIG_S stCalConfig;
/* u32Align: 0 is automatic mode, alignment size following system. Non-0 for specified alignment size */
if (u32Align == 0) {
u32Align = DEFAULT_ALIGN;
} else if (u32Align > MAX_ALIGN) {
u32Align = MAX_ALIGN;
} else {
u32Align = (ALIGN_UP(u32Align, DEFAULT_ALIGN));
}
if ((u32BufLine != 0) && (u32BufLine < u32Height)) {
COMMON_GetPicBufferConfig(u32Width, u32BufLine, enPixelFormat, enBitWidth, enCmpMode, u32Align, &stCalConfig);
if(enCmpMode == COMPRESS_MODE_SEG){
stCalConfig.u32HeadYSize = stCalConfig.u32HeadStride * ALIGN_UP(u32Height, 2);
if ((PIXEL_FORMAT_YVU_SEMIPLANAR_420 == enPixelFormat) || (PIXEL_FORMAT_YUV_SEMIPLANAR_420 == enPixelFormat)) {
stCalConfig.u32HeadSize = stCalConfig.u32HeadYSize + stCalConfig.u32HeadYSize / 2;
} else if (PIXEL_FORMAT_YVU_SEMIPLANAR_422 == enPixelFormat ||
PIXEL_FORMAT_YUV_SEMIPLANAR_422 == enPixelFormat) {
stCalConfig.u32HeadSize = stCalConfig.u32HeadYSize * 2;
} else if (enPixelFormat == PIXEL_FORMAT_YUV_400) {
stCalConfig.u32HeadSize = stCalConfig.u32HeadYSize;
} else {
stCalConfig.u32HeadSize = stCalConfig.u32HeadYSize * 3;
}
if (u32Width <= VPSS_LINE_BUFFER) {
stCalConfig.u32HeadSize = 64 + ALIGN_UP(stCalConfig.u32HeadSize, u32Align);
stCalConfig.u32VBSize = stCalConfig.u32HeadSize + stCalConfig.u32MainSize;
} else {
stCalConfig.u32HeadSize = (64 + ALIGN_UP(stCalConfig.u32HeadSize, u32Align)) * 2;
stCalConfig.u32VBSize = stCalConfig.u32HeadSize + stCalConfig.u32MainSize + 2 * DEFAULT_ALIGN;
}
}
} else {
COMMON_GetPicBufferConfig(u32Width, u32Height, enPixelFormat, enBitWidth, enCmpMode, u32Align, &stCalConfig);
}
return stCalConfig.u32VBSize;
}
__inline static HI_U32 VI_GetRawBufferSize(HI_U32 u32Width, HI_U32 u32Height,
PIXEL_FORMAT_E enPixelFormat, COMPRESS_MODE_E enCmpMode, HI_U32 u32Align)
{
HI_U32 u32BitWidth;
HI_U32 u32Size = 0;
HI_U32 u32Stride = 0;
HI_U32 u32CmpRatioLine = 1600;
HI_U32 u32CmpRatioFrame = 2000;
if ((u32Width > HI_MAXINUM_LIMIT) || (u32Height > HI_MAXINUM_LIMIT)) {
return 0;
}
/* u32Align: 0 is automatic mode, alignment size following system. Non-0 for specified alignment size */
if (u32Align == 0) {
u32Align = DEFAULT_ALIGN;
} else if (u32Align > MAX_ALIGN) {
u32Align = MAX_ALIGN;
} else {
u32Align = (ALIGN_UP(u32Align, DEFAULT_ALIGN));
}
switch (enPixelFormat) {
case PIXEL_FORMAT_RGB_BAYER_8BPP: {
u32BitWidth = 8;
break;
}
case PIXEL_FORMAT_RGB_BAYER_10BPP: {
u32BitWidth = 10;
break;
}
case PIXEL_FORMAT_RGB_BAYER_12BPP: {
u32BitWidth = 12;
break;
}
case PIXEL_FORMAT_RGB_BAYER_14BPP: {
u32BitWidth = 14;
break;
}
case PIXEL_FORMAT_RGB_BAYER_16BPP: {
u32BitWidth = 16;
break;
}
default:
{
u32BitWidth = 0;
break;
}
}
if (enCmpMode == COMPRESS_MODE_NONE) {
u32Stride = ALIGN_UP(ALIGN_UP(u32Width * u32BitWidth, 8) / 8, u32Align);
u32Size = u32Stride * u32Height;
} else if (enCmpMode == COMPRESS_MODE_LINE) {
HI_U32 u32Tmp;
u32Tmp = ALIGN_UP((16 + u32Width * u32BitWidth * 1000UL / u32CmpRatioLine + 8192 + 127) / 128, 2);
u32Stride = ALIGN_UP(u32Tmp * 16, u32Align);
u32Size = u32Stride * u32Height;
} else if (enCmpMode == COMPRESS_MODE_FRAME) {
u32Size = ALIGN_UP(u32Height * u32Width * u32BitWidth * 1000UL / (u32CmpRatioFrame * 8), u32Align);
}
return u32Size;
}
__inline static HI_U32 VENC_GetRefPicInfoBufferSize(PAYLOAD_TYPE_E enType, HI_U32 u32Width, HI_U32 u32Height,
HI_U32 u32Align)
{
HI_U32 u32Size;
HI_U32 u32AlignWidth, u32AlignHeight;
HI_U32 u32TmvSize, u32PmeSize, u32PmeInfoSize;
if ((u32Width > HI_MAXINUM_LIMIT) || (u32Height > HI_MAXINUM_LIMIT)) {
return 0;
}
if (enType == PT_H265) {
u32AlignWidth = ALIGN_UP(u32Width, 32) >> 5;
u32AlignHeight = ALIGN_UP(u32Height, 32) >> 5;
u32TmvSize = ALIGN_UP(u32AlignWidth * u32AlignHeight, 2) * 16;
u32PmeSize = (u32AlignWidth << 3) * (u32AlignHeight << 3);
u32AlignWidth = ALIGN_UP(u32Width, 512) >> 9;
u32AlignHeight = ALIGN_UP(u32Height, 32) >> 5;
u32PmeInfoSize = (u32AlignWidth * u32AlignHeight) << 3;
u32Size = u32TmvSize + u32PmeSize + u32PmeInfoSize;
} else if (enType == PT_H264) {
u32TmvSize = 0;
u32AlignWidth = ALIGN_UP(u32Width, 64) / 4;
u32AlignHeight = ALIGN_UP(u32Height, 16) / 4;
u32PmeSize = u32AlignWidth * u32AlignHeight;
u32AlignWidth = ALIGN_UP(u32Width, 1024) >> 10;
u32AlignHeight = ALIGN_UP(u32Height, 16) >> 4;
u32PmeInfoSize = (u32AlignWidth * u32AlignHeight) << 3;
u32Size = u32TmvSize + u32PmeSize + u32PmeInfoSize;
} else {
u32Size = 0;
}
return u32Size;
}
__inline static HI_U32 VENC_GetRefBufferSize(PAYLOAD_TYPE_E enType, HI_U32 u32Width, HI_U32 u32Height,
DATA_BITWIDTH_E enBitWidth, HI_U32 u32Align)
{
HI_U32 u32Size = 0;
HI_U32 u32AlignWidth, u32AlignHeight, u32BitWidth;
HI_U32 u32YHeaderSize, u32CHeaderSize, u32YSize, u32CSize;
if ((u32Width > HI_MAXINUM_LIMIT) || (u32Height > HI_MAXINUM_LIMIT)) {
return 0;
}
if (enBitWidth == DATA_BITWIDTH_8) {
u32BitWidth = 8;
} else {
return 0;
}
if (enType == PT_H265) {
u32AlignWidth = ALIGN_UP(u32Width, 128);
u32AlignHeight = ALIGN_UP(u32Height, 32);
u32YHeaderSize = ((u32AlignWidth >> 7) << 4) * ((u32AlignHeight >> 5) + 1);
u32CHeaderSize = u32YHeaderSize;
u32AlignWidth = ALIGN_UP(u32Width, 64);
u32AlignHeight = ALIGN_UP(u32Height, 16);
u32YSize = (u32AlignWidth * u32AlignHeight * u32BitWidth) >> 3;
u32CSize = u32YSize >> 1;
u32Size = u32YHeaderSize + u32CHeaderSize + u32YSize + u32CSize;
} else if (enType == PT_H264) {
u32AlignWidth = ALIGN_UP(u32Width, 256);
u32AlignHeight = ALIGN_UP(u32Height, 16);
u32YHeaderSize = ((u32AlignWidth >> 8) << 4) * ((u32AlignHeight >> 4) + 1);
u32CHeaderSize = u32YHeaderSize;
u32AlignWidth = ALIGN_UP(u32Width, 64);
u32AlignHeight = ALIGN_UP(u32Height, 16);
u32YSize = u32AlignWidth * u32AlignHeight;
u32CSize = u32YSize >> 1;
u32Size = u32YHeaderSize + u32CHeaderSize + u32YSize + u32CSize;
} else {
u32Size = 0;
}
return u32Size;
}
__inline static HI_U32 VENC_GetQpmapSizeStride(HI_U32 u32Width)
{
if (u32Width > HI_MAXINUM_LIMIT) {
return 0;
}
return DIV_UP(u32Width, 128) * 8;
}
__inline static HI_U32 VENC_GetQpmapSize(HI_U32 u32Width, HI_U32 u32Height)
{
HI_U32 u32Stride, u32AlignHeight;
if ((u32Width > HI_MAXINUM_LIMIT) || (u32Height > HI_MAXINUM_LIMIT)) {
return 0;
}
u32Stride = VENC_GetQpmapSizeStride(u32Width);
u32AlignHeight = DIV_UP(u32Height, 16);
return u32Stride * u32AlignHeight;
}
__inline static HI_U32 VENC_GetSkipWeightSizeStride(PAYLOAD_TYPE_E enType, HI_U32 u32Width)
{
HI_U32 u32Stride;
if (u32Width > HI_MAXINUM_LIMIT) {
return 0;
}
if (enType == PT_H265) {
u32Stride = DIV_UP(u32Width, 512) * 8;
} else if (enType == PT_H264) {
u32Stride = DIV_UP(u32Width, 256) * 8;
} else {
u32Stride = 0;
}
return u32Stride;
}
__inline static HI_U32 VENC_GetSkipWeightSize(PAYLOAD_TYPE_E enType, HI_U32 u32Width, HI_U32 u32Height)
{
HI_U32 u32Stride, u32AlignHeight;
if ((u32Width > HI_MAXINUM_LIMIT) || (u32Height > HI_MAXINUM_LIMIT)) {
return 0;
}
u32Stride = VENC_GetSkipWeightSizeStride(enType, u32Width);
if (enType == PT_H265) {
u32AlignHeight = DIV_UP(u32Height, 32);
} else if (enType == PT_H264) {
u32AlignHeight = DIV_UP(u32Height, 16);
} else {
u32AlignHeight = 0;
}
return u32Stride * u32AlignHeight;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_BUFFER_H__ */

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_3a.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2012/12/18
Description :
History :
1.Date : 2012/12/18
Author :
Modification: Created file
******************************************************************************/
#ifndef __HI_COMM_3A_H__
#define __HI_COMM_3A_H__
#include "hi_common.h"
#include "hi_comm_isp.h"
#include "hi_comm_sns.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#define IS_LINEAR_MODE(mode) ((mode) == WDR_MODE_NONE)
#define IS_WDR_MODE(mode) ((!IS_LINEAR_MODE(mode)) && ((mode) < WDR_MODE_BUTT))
#define IS_HDR_MODE(mode) (((mode) > DYNAMIC_RANGE_SDR10) && ((mode) < DYNAMIC_RANGE_BUTT))
#define IS_BUILT_IN_WDR_MODE(mode) ((mode) == WDR_MODE_BUILT_IN)
#define IS_FS_WDR_MODE(mode) ((!IS_LINEAR_MODE(mode))&& (!IS_BUILT_IN_WDR_MODE(mode)) && ((mode) < WDR_MODE_BUTT))
#define IS_2to1_WDR_MODE(mode) (((mode) == WDR_MODE_2To1_FRAME) || ((mode) == WDR_MODE_2To1_FRAME_FULL_RATE) || ((mode) == WDR_MODE_2To1_LINE) || ((mode) == WDR_MODE_QUDRA))
#define IS_3to1_WDR_MODE(mode) (((mode) == WDR_MODE_3To1_FRAME) || ((mode) == WDR_MODE_3To1_FRAME_FULL_RATE) || ((mode) == WDR_MODE_3To1_LINE))
#define IS_4to1_WDR_MODE(mode) (((mode) == WDR_MODE_4To1_FRAME) || ((mode) == WDR_MODE_4To1_FRAME_FULL_RATE) || ((mode) == WDR_MODE_4To1_LINE))
#define IS_FULL_WDR_MODE(mode) (((mode) == WDR_MODE_2To1_FRAME_FULL_RATE) || ((mode) == WDR_MODE_3To1_FRAME_FULL_RATE) || ((mode) == WDR_MODE_4To1_FRAME_FULL_RATE))
#define IS_HALF_WDR_MODE(mode) (((mode) == WDR_MODE_2To1_FRAME) || ((mode) == WDR_MODE_3To1_FRAME) || ((mode) == WDR_MODE_4To1_FRAME))
#define IS_LINE_WDR_MODE(mode) (((mode) == WDR_MODE_2To1_LINE) || ((mode) == WDR_MODE_3To1_LINE) || ((mode) == WDR_MODE_4To1_LINE) || ((mode) == WDR_MODE_QUDRA))
#define IS_STITCH_MAIN_PIPE(ViPipe,MainPipe) ((ViPipe) == (MainPipe))
#define IS_OFFLINE_MODE(mode) ((mode) == ISP_MODE_RUNNING_OFFLINE)
#define IS_ONLINE_MODE(mode) ((mode) == ISP_MODE_RUNNING_ONLINE)
#define IS_SIDEBYSIDE_MODE(mode) ((mode) == ISP_MODE_RUNNING_SIDEBYSIDE)
#define IS_STRIPING_MODE(mode) ((mode) == ISP_MODE_RUNNING_STRIPING)
#define MAX_REGISTER_ALG_LIB_NUM 2
typedef enum hiISP_ALG_MOD_E {
ISP_ALG_AE = 0,
ISP_ALG_AF,
ISP_ALG_AWB,
ISP_ALG_BLC,
ISP_ALG_FELOGLUT,
ISP_ALG_LOGLUT,
ISP_ALG_DP,
ISP_ALG_PREGAMMA,
ISP_ALG_DRC,
ISP_ALG_DEMOSAIC,
ISP_ALG_ANTIFALSECOLOR,
ISP_ALG_GAMMA,
ISP_ALG_GE,
ISP_ALG_SHARPEN,
ISP_ALG_EDGEAMRK,
ISP_ALG_FrameWDR,
ISP_ALG_FPN,
ISP_ALG_DEHAZE,
ISP_ALG_ACM,
ISP_ALG_LCAC,
ISP_ALG_GCAC,
ISP_ALG_CSC,
ISP_ALG_EXPANDER,
ISP_ALG_MCDS,
ISP_ALG_LSC,
ISP_ALG_RLSC,
ISP_ALG_FeLSC,
ISP_ALG_RC,
ISP_ALG_RGBIR,
ISP_ALG_HRS,
ISP_ALG_DG,
ISP_ALG_BAYERNR,
ISP_ALG_FLICKER,
ISP_ALG_SPLIT,
ISP_ALG_LDCI,
ISP_ALG_CA,
ISP_ALG_CLUT,
ISP_ALG_DETAIL,
ISP_ALG_BUTT,
} ISP_ALG_MOD_E;
typedef enum hiISP_CTRL_CMD_E {
ISP_WDR_MODE_SET = 8000,
ISP_PROC_WRITE,
ISP_AE_FPS_BASE_SET,
ISP_AE_BLC_SET,
ISP_AE_RC_SET,
ISP_AE_BAYER_FORMAT_SET,
ISP_AE_INIT_INFO_GET,
ISP_AWB_ISO_SET, /* set iso, change saturation when iso change */
ISP_CHANGE_IMAGE_MODE_SET,
ISP_UPDATE_INFO_GET,
ISP_FRAMEINFO_GET,
ISP_ATTACHINFO_GET,
ISP_COLORGAMUTINFO_GET,
ISP_AWB_INTTIME_SET,
ISP_BAS_MODE_SET,
ISP_PROTRIGGER_SET,
ISP_AWB_PIRIS_SET,
ISP_AWB_SNAP_MODE_SET,
ISP_AWB_ZONE_ROW_SET,
ISP_AWB_ZONE_COL_SET,
ISP_AWB_ZONE_BIN_SET,
ISP_CTRL_CMD_BUTT,
} ISP_CTRL_CMD_E;
typedef struct hiISP_CTRL_PROC_WRITE_S {
HI_CHAR *pcProcBuff;
HI_U32 u32BuffLen;
HI_U32 u32WriteLen; /* The len count should contain '\0'. */
} ISP_CTRL_PROC_WRITE_S;
typedef struct hiISP_STITCH_ATTR_S {
HI_BOOL bStitchEnable;
HI_BOOL bMainPipe;
HI_U8 u8StitchPipeNum;
HI_S8 as8StitchBindId[VI_MAX_PIPE_NUM];
} ISP_STITCH_ATTR_S;
/******************************** AE *************************************/
/* the init param of ae alg */
typedef struct hiISP_AE_PARAM_S {
SENSOR_ID SensorId;
HI_U8 u8WDRMode;
HI_U8 u8HDRMode;
HI_U16 u16BlackLevel;
HI_FLOAT f32Fps;
ISP_BAYER_FORMAT_E enBayer;
ISP_STITCH_ATTR_S stStitchAttr;
HI_S32 s32Rsv;
} ISP_AE_PARAM_S;
/* the statistics of ae alg */
typedef struct hiISP_FE_AE_STAT_1_S {
HI_U32 u32PixelCount[ISP_CHN_MAX_NUM];
HI_U32 u32PixelWeight[ISP_CHN_MAX_NUM];
HI_U32 au32HistogramMemArray[ISP_CHN_MAX_NUM][1024];
} ISP_FE_AE_STAT_1_S;
typedef struct hiISP_FE_AE_STAT_2_S {
HI_U16 u16GlobalAvgR[ISP_CHN_MAX_NUM];
HI_U16 u16GlobalAvgGr[ISP_CHN_MAX_NUM];
HI_U16 u16GlobalAvgGb[ISP_CHN_MAX_NUM];
HI_U16 u16GlobalAvgB[ISP_CHN_MAX_NUM];
} ISP_FE_AE_STAT_2_S;
typedef struct hiISP_FE_AE_STAT_3_S {
HI_U16 au16ZoneAvg[ISP_CHN_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4];
} ISP_FE_AE_STAT_3_S;
typedef struct hiISP_FE_AE_STITCH_STAT_3_S {
HI_U16 au16ZoneAvg[VI_MAX_PIPE_NUM][ISP_CHN_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4];
} ISP_FE_AE_STITCH_STAT_3_S;
typedef struct hiISP_BE_AE_STAT_1_S {
HI_U32 u32PixelCount;
HI_U32 u32PixelWeight;
HI_U32 au32HistogramMemArray[1024];
} ISP_BE_AE_STAT_1_S;
typedef struct hiISP_BE_AE_STAT_2_S {
HI_U16 u16GlobalAvgR;
HI_U16 u16GlobalAvgGr;
HI_U16 u16GlobalAvgGb;
HI_U16 u16GlobalAvgB;
} ISP_BE_AE_STAT_2_S;
typedef struct hiISP_BE_AE_STAT_3_S {
HI_U16 au16ZoneAvg[AE_ZONE_ROW][AE_ZONE_COLUMN][4];
} ISP_BE_AE_STAT_3_S;
typedef struct hiISP_BE_AE_STITCH_STAT_3_S {
HI_U16 au16ZoneAvg[VI_MAX_PIPE_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4];
} ISP_BE_AE_STITCH_STAT_3_S;
typedef struct hiISP_AE_INFO_S {
HI_U32 u32FrameCnt; /* the counting of frame */
ISP_SMART_INFO_S stSmartInfo; /* Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300 */
ISP_FE_AE_STAT_1_S *pstFEAeStat1;
ISP_FE_AE_STAT_2_S *pstFEAeStat2;
ISP_FE_AE_STAT_3_S *pstFEAeStat3;
ISP_FE_AE_STITCH_STAT_3_S *pstFEAeStiStat;
ISP_BE_AE_STAT_1_S *pstBEAeStat1;
ISP_BE_AE_STAT_2_S *pstBEAeStat2;
ISP_BE_AE_STAT_3_S *pstBEAeStat3;
ISP_BE_AE_STITCH_STAT_3_S *pstBEAeStiStat;
} ISP_AE_INFO_S;
typedef struct hiISP_AE_STAT_ATTR_S {
HI_BOOL bChange;
HI_BOOL bHistAdjust;
HI_U8 u8AEBESel;
HI_U8 u8FourPlaneMode;
HI_U8 u8HistOffsetX;
HI_U8 u8HistOffsetY;
HI_U8 u8HistSkipX;
HI_U8 u8HistSkipY;
HI_BOOL bModeUpdate;
HI_U8 u8HistMode;
HI_U8 u8AverMode;
HI_U8 u8MaxGainMode;
HI_BOOL bWightTableUpdate;
HI_U8 au8WeightTable[VI_MAX_PIPE_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN];
} ISP_AE_STAT_ATTR_S;
/* the final calculate of ae alg */
#define AE_INT_TIME_NUM (4)
typedef struct hiISP_AE_RESULT_S {
HI_U32 u32IntTime[AE_INT_TIME_NUM];
HI_U32 u32IspDgain;
HI_U32 u32Again;
HI_U32 u32Dgain;
HI_U32 u32Iso;
HI_U32 u32IspDgainSF;
HI_U32 u32AgainSF;
HI_U32 u32DgainSF;
HI_U32 u32IsoSF;
HI_U8 u8AERunInterval;
HI_BOOL bPirisValid;
HI_S32 s32PirisPos;
HI_U32 u32PirisGain;
ISP_FSWDR_MODE_E enFSWDRMode;
HI_U32 au32WDRGain[4];
HI_U32 u32HmaxTimes; /* unit is ns */
HI_U32 u32Vmax; /* unit is line */
ISP_AE_STAT_ATTR_S stStatAttr;
ISP_DCF_UPDATE_INFO_S stUpdateInfo;
} ISP_AE_RESULT_S;
typedef struct hiISP_AE_INIT_INFO_S {
HI_U32 u32IspDgain;
HI_U32 u32Iso;
} ISP_AE_INIT_INFO_S;
typedef struct hiISP_AE_EXP_FUNC_S {
HI_S32 (*pfn_ae_init)(HI_S32 s32Handle, const ISP_AE_PARAM_S *pstAeParam);
HI_S32 (*pfn_ae_run)(HI_S32 s32Handle,
const ISP_AE_INFO_S *pstAeInfo,
ISP_AE_RESULT_S *pstAeResult,
HI_S32 s32Rsv
);
HI_S32 (*pfn_ae_ctrl)(HI_S32 s32Handle, HI_U32 u32Cmd, HI_VOID *pValue);
HI_S32 (*pfn_ae_exit)(HI_S32 s32Handle);
} ISP_AE_EXP_FUNC_S;
typedef struct hiISP_AE_REGISTER_S {
ISP_AE_EXP_FUNC_S stAeExpFunc;
} ISP_AE_REGISTER_S;
/******************************** AWB *************************************/
typedef enum hiAWB_CTRL_CMD_E {
AWB_CCM_CONFIG_SET,
AWB_CCM_CONFIG_GET,
AWB_DEBUG_ATTR_SET,
AWB_DEBUG_ATTR_GET,
AWB_CTRL_BUTT,
} AWB_CTRL_CMD_E;
typedef struct hiAWB_CCM_CONFIG_S {
HI_BOOL bAWBBypassEn;
HI_BOOL bManualSatEn;
HI_BOOL bManualTempEn;
HI_U32 u32ManualSatValue;
HI_U32 u32ManualTempValue;
HI_U16 u16CCMSpeed;
HI_U16 au16HighCCM[9];
HI_U16 au16LowCCM[9];
HI_U16 u16HighColorTemp;
HI_U16 u16LowColorTemp;
} AWB_CCM_CONFIG_S;
/* the init param of awb alg */
typedef struct hiISP_AWB_PARAM_S {
SENSOR_ID SensorId;
HI_U8 u8WDRMode;
HI_U8 u8AWBZoneRow;
HI_U8 u8AWBZoneCol;
HI_U8 u8AWBZoneBin;
ISP_STITCH_ATTR_S stStitchAttr;
HI_U16 u16AWBWidth;
HI_U16 u16AWBHeight;
HI_U32 u32InitIso;
HI_S8 s8Rsv;
} ISP_AWB_PARAM_S;
/* the statistics of awb alg */
typedef struct hiISP_AWB_STAT_1_S {
HI_U16 u16MeteringAwbAvgR;
HI_U16 u16MeteringAwbAvgG;
HI_U16 u16MeteringAwbAvgB;
HI_U16 u16MeteringAwbCountAll;
} ISP_AWB_STAT_1_S;
typedef struct hiISP_AWB_STAT_2_S {
HI_U16 au16MeteringMemArrayAvgR[AWB_ZONE_NUM];
HI_U16 au16MeteringMemArrayAvgG[AWB_ZONE_NUM];
HI_U16 au16MeteringMemArrayAvgB[AWB_ZONE_NUM];
HI_U16 au16MeteringMemArrayCountAll[AWB_ZONE_NUM];
} ISP_AWB_STAT_2_S;
typedef struct hiISP_AWB_STAT_STITCH_S {
HI_U16 u16ZoneCol;
HI_U16 u16ZoneRow;
HI_U16 u16ZoneBin;
HI_U16 au16MeteringMemArrayAvgR[AWB_ZONE_STITCH_MAX];
HI_U16 au16MeteringMemArrayAvgG[AWB_ZONE_STITCH_MAX];
HI_U16 au16MeteringMemArrayAvgB[AWB_ZONE_STITCH_MAX];
HI_U16 au16MeteringMemArrayCountAll[AWB_ZONE_STITCH_MAX];
} ISP_AWB_STAT_STITCH_S;
typedef struct hiISP_AWB_STAT_RESULT_S {
HI_U16 *pau16ZoneAvgR;
HI_U16 *pau16ZoneAvgG;
HI_U16 *pau16ZoneAvgB;
HI_U16 *pau16ZoneCount;
} ISP_AWB_STAT_RESULT_S;
typedef struct hiISP_AWB_INFO_S {
HI_U32 u32FrameCnt;
ISP_AWB_STAT_1_S *pstAwbStat1;
ISP_AWB_STAT_RESULT_S stAwbStat2;
HI_U8 u8AwbGainSwitch;
HI_U8 u8AwbStatSwitch;
HI_U32 au32WDRWBGain[ISP_BAYER_CHN_NUM];
} ISP_AWB_INFO_S;
/* the statistics's attr of awb alg */
typedef struct hiISP_AWB_RAW_STAT_ATTR_S {
HI_BOOL bStatCfgUpdate;
HI_U16 u16MeteringWhiteLevelAwb;
HI_U16 u16MeteringBlackLevelAwb;
HI_U16 u16MeteringCrRefMaxAwb;
HI_U16 u16MeteringCbRefMaxAwb;
HI_U16 u16MeteringCrRefMinAwb;
HI_U16 u16MeteringCbRefMinAwb;
} ISP_AWB_RAW_STAT_ATTR_S;
/* the final calculate of awb alg */
typedef struct hiISP_AWB_RESULT_S {
HI_U32 au32WhiteBalanceGain[ISP_BAYER_CHN_NUM];
HI_U16 au16ColorMatrix[CCM_MATRIX_SIZE];
HI_U32 u32ColorTemp;
HI_U8 u8Saturation;
ISP_AWB_RAW_STAT_ATTR_S stRawStatAttr;
} ISP_AWB_RESULT_S;
typedef struct hiISP_AWB_EXP_FUNC_S {
HI_S32 (*pfn_awb_init)(HI_S32 s32Handle, const ISP_AWB_PARAM_S *pstAwbParam, ISP_AWB_RESULT_S *pstAwbResult);
HI_S32 (*pfn_awb_run)(HI_S32 s32Handle,
const ISP_AWB_INFO_S *pstAwbInfo,
ISP_AWB_RESULT_S *pstAwbResult,
HI_S32 s32Rsv);
HI_S32 (*pfn_awb_ctrl)(HI_S32 s32Handle, HI_U32 u32Cmd, HI_VOID *pValue);
HI_S32 (*pfn_awb_exit)(HI_S32 s32Handle);
} ISP_AWB_EXP_FUNC_S;
typedef struct hiISP_AWB_REGISTER_S {
ISP_AWB_EXP_FUNC_S stAwbExpFunc;
} ISP_AWB_REGISTER_S;
/******************************** AF *************************************/
/* the statistics of af alg */
typedef struct hiISP_AF_ZONE_S {
HI_U16 u16v1;
HI_U16 u16h1;
HI_U16 u16v2;
HI_U16 u16h2;
HI_U16 u16y;
HI_U16 u16HlCnt;
} ISP_AF_ZONE_S;
typedef struct hiISP_FE_AF_STAT_S {
ISP_AF_ZONE_S stZoneMetrics[WDR_CHN_MAX][AF_ZONE_ROW][AF_ZONE_COLUMN]; /* R; The zoned measure of contrast */
} ISP_FE_AF_STAT_S;
typedef struct hiISP_BE_AF_STAT_S {
ISP_AF_ZONE_S stZoneMetrics[AF_ZONE_ROW][AF_ZONE_COLUMN]; /* R; The zoned measure of contrast */
} ISP_BE_AF_STAT_S;
#define ALG_LIB_NAME_SIZE_MAX (20)
typedef struct hiALG_LIB_S {
HI_S32 s32Id;
HI_CHAR acLibName[ALG_LIB_NAME_SIZE_MAX];
} ALG_LIB_S;
typedef struct hiISP_BIND_ATTR_S {
SENSOR_ID SensorId;
ALG_LIB_S stAeLib;
ALG_LIB_S stAfLib;
ALG_LIB_S stAwbLib;
} ISP_BIND_ATTR_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* __HI_COMM_SNS_H__ */

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/******************************************************************************
Copyright (C), 2001-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_adec.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2006/12/15
Last Modified :
Description :
Function List :
History :
1.Date : 2006/12/15
Author : z50825
Modification : Created file
2.Date : 2007/5/10
Author : z50825
Modification : add err code
******************************************************************************/
#ifndef __HI_COMM_ADEC_H__
#define __HI_COMM_ADEC_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_comm_aio.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
typedef struct hiADEC_ATTR_G711_S {
HI_U32 resv;
} ADEC_ATTR_G711_S;
typedef struct hiADEC_ATTR_G726_S {
G726_BPS_E enG726bps;
} ADEC_ATTR_G726_S;
typedef struct hiADEC_ATTR_ADPCM_S {
ADPCM_TYPE_E enADPCMType;
} ADEC_ATTR_ADPCM_S;
typedef struct hiADEC_ATTR_LPCM_S {
HI_U32 resv;
} ADEC_ATTR_LPCM_S;
typedef enum hiADEC_MODE_E {
ADEC_MODE_PACK = 0, /* require input is valid dec pack(a
complete frame encode result),
e.g.the stream get from AENC is a
valid dec pack, the stream know actually
pack len from file is also a dec pack.
this mode is high-performative */
ADEC_MODE_STREAM, /* input is stream, low-performative,
if you couldn't find out whether a stream is
vaild dec pack,you could use
this mode */
ADEC_MODE_BUTT
}ADEC_MODE_E;
typedef struct hiADEC_CH_ATTR_S {
PAYLOAD_TYPE_E enType;
HI_U32 u32BufSize; /* buf size[2~MAX_AUDIO_FRAME_NUM] */
ADEC_MODE_E enMode; /* decode mode */
HI_VOID ATTRIBUTE *pValue;
}ADEC_CHN_ATTR_S;
typedef struct hiADEC_CHN_STATE_S {
HI_BOOL bEndOfStream; /* EOS flag */
HI_U32 u32BufferFrmNum; /* total number of channel buffer */
HI_U32 u32BufferFreeNum; /* free number of channel buffer */
HI_U32 u32BufferBusyNum; /* busy number of channel buffer */
} ADEC_CHN_STATE_S;
typedef struct hiADEC_DECODER_S {
PAYLOAD_TYPE_E enType;
HI_CHAR aszName[17];
HI_S32 (*pfnOpenDecoder)(HI_VOID *pDecoderAttr, HI_VOID **ppDecoder); /* struct ppDecoder is packed by user,
user malloc and free memory for this struct */
HI_S32 (*pfnDecodeFrm)(HI_VOID *pDecoder, HI_U8 **pu8Inbuf, HI_S32 *ps32LeftByte,
HI_U16 *pu16Outbuf, HI_U32 *pu32OutLen, HI_U32 *pu32Chns);
HI_S32 (*pfnGetFrmInfo)(HI_VOID *pDecoder, HI_VOID *pInfo);
HI_S32 (*pfnCloseDecoder)(HI_VOID *pDecoder);
HI_S32 (*pfnResetDecoder)(HI_VOID *pDecoder);
} ADEC_DECODER_S;
typedef enum hiEN_ADEC_ERR_CODE_E {
ADEC_ERR_DECODER_ERR = 64,
ADEC_ERR_BUF_LACK,
} EN_ADEC_ERR_CODE_E;
/* invlalid device ID */
#define HI_ERR_ADEC_INVALID_DEVID HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* invlalid channel ID */
#define HI_ERR_ADEC_INVALID_CHNID HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_ADEC_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* channel exists */
#define HI_ERR_ADEC_EXIST HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* channel unexists */
#define HI_ERR_ADEC_UNEXIST HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* using a NULL point */
#define HI_ERR_ADEC_NULL_PTR HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_ADEC_NOT_CONFIG HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_ADEC_NOT_SUPPORT HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change stati attribute */
#define HI_ERR_ADEC_NOT_PERM HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* failure caused by malloc memory */
#define HI_ERR_ADEC_NOMEM HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_ADEC_NOBUF HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_ADEC_BUF_EMPTY HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_ADEC_BUF_FULL HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* system is not ready,had not initialed or loaded */
#define HI_ERR_ADEC_SYS_NOTREADY HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* decoder internal err */
#define HI_ERR_ADEC_DECODER_ERR HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, ADEC_ERR_DECODER_ERR)
/* input buffer not enough to decode one frame */
#define HI_ERR_ADEC_BUF_LACK HI_DEF_ERR(HI_ID_ADEC, EN_ERR_LEVEL_ERROR, ADEC_ERR_BUF_LACK)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif/* End of #ifndef __HI_COMM_ADEC_H__*/

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/******************************************************************************
Copyright (C), 2001-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_aenc.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2006/12/15
Last Modified :
Description :
Function List :
History :
1.Date : 2006/12/15
Author : z50825
Modification : Created file
2.Date : 2007/5/10
Author : z50825
Modification : add err code
******************************************************************************/
#ifndef __HI_COMM_AENC_H__
#define __HI_COMM_AENC_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_comm_aio.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
typedef struct hiAENC_ATTR_G711_S {
HI_U32 resv; /* reserve item */
} AENC_ATTR_G711_S;
typedef struct hiAENC_ATTR_G726_S {
G726_BPS_E enG726bps;
} AENC_ATTR_G726_S;
typedef struct hiAENC_ATTR_ADPCM_S {
ADPCM_TYPE_E enADPCMType;
} AENC_ATTR_ADPCM_S;
typedef struct hiAENC_ATTR_LPCM_S {
HI_U32 resv; /* reserve item */
} AENC_ATTR_LPCM_S;
typedef struct hiAENC_ENCODER_S {
PAYLOAD_TYPE_E enType;
HI_U32 u32MaxFrmLen;
HI_CHAR aszName[17]; /* encoder type,be used to print proc information */
HI_S32 (*pfnOpenEncoder)(HI_VOID *pEncoderAttr, HI_VOID **ppEncoder); /* pEncoder is the handle to control the encoder */
HI_S32 (*pfnEncodeFrm)(HI_VOID *pEncoder, const AUDIO_FRAME_S *pstData,
HI_U8 *pu8Outbuf, HI_U32 *pu32OutLen);
HI_S32 (*pfnCloseEncoder)(HI_VOID *pEncoder);
} AENC_ENCODER_S;
typedef struct hiAENC_CHN_ATTR_S {
PAYLOAD_TYPE_E enType;
HI_U32 u32PtNumPerFrm;
HI_U32 u32BufSize; /* buf size [2~MAX_AUDIO_FRAME_NUM] */
HI_VOID ATTRIBUTE *pValue; /* point to attribute of definite audio encoder */
} AENC_CHN_ATTR_S;
typedef enum hiEN_AENC_ERR_CODE_E {
AENC_ERR_ENCODER_ERR = 64,
AENC_ERR_VQE_ERR = 65,
} EN_AENC_ERR_CODE_E;
/* invlalid device ID */
#define HI_ERR_AENC_INVALID_DEVID HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* invlalid channel ID */
#define HI_ERR_AENC_INVALID_CHNID HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_AENC_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* channel exists */
#define HI_ERR_AENC_EXIST HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* channel unexists */
#define HI_ERR_AENC_UNEXIST HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* using a NULL point */
#define HI_ERR_AENC_NULL_PTR HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_AENC_NOT_CONFIG HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_AENC_NOT_SUPPORT HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change static attribute */
#define HI_ERR_AENC_NOT_PERM HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* failure caused by malloc memory */
#define HI_ERR_AENC_NOMEM HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_AENC_NOBUF HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_AENC_BUF_EMPTY HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_AENC_BUF_FULL HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* system is not ready,had not initialed or loaded */
#define HI_ERR_AENC_SYS_NOTREADY HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* encoder internal err */
#define HI_ERR_AENC_ENCODER_ERR HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, AENC_ERR_ENCODER_ERR)
/* vqe internal err */
#define HI_ERR_AENC_VQE_ERR HI_DEF_ERR(HI_ID_AENC, EN_ERR_LEVEL_ERROR, AENC_ERR_VQE_ERR)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif/* End of #ifndef __HI_COMM_AENC_H__ */

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/******************************************************************************
Copyright (C), 2001-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_ai.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2009/5/5
Description :
History :
1.Date : 2009/5/5
Author : p00123320
Modification: Created file
******************************************************************************/
#ifndef __HI_COMM_AI_H__
#define __HI_COMM_AI_H__
#ifdef __cplusplus
#if __cplusplus
extern "C"{
#endif
#endif /* End of #ifdef __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef __HI_COMM_AI_H__ */

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/******************************************************************************
Copyright (C), 2001-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_aio.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2009/5/5
Description :
History :
1.Date : 2009/5/5
Author : p00123320
Modification: Created file
******************************************************************************/
#ifndef __HI_COMM_AIO_H__
#define __HI_COMM_AIO_H__
#include "hi_common.h"
#include "hi_errno.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#define MAX_AUDIO_FRAME_NUM 300 /* max count of audio frame in Buffer */
#define MAX_AUDIO_POINT_BYTES 4 /* max bytes of one sample point(now 32bit max) */
#define MAX_VOICE_POINT_NUM 480 /* max sample per frame for voice encode */
#define MAX_AUDIO_POINT_NUM 2048 /* max sample per frame for all encoder(aacplus:2048) */
#define MAX_AO_POINT_NUM 4096 /* from h3;support 4096 framelen */
#define MIN_AUDIO_POINT_NUM 80 /* min sample per frame */
#define MAX_AI_POINT_NUM 2048 /* max sample per frame for all encoder(aacplus:2048) */
/* max length of audio frame by bytes, one frame contain many sample point */
#define MAX_AUDIO_FRAME_LEN (MAX_AUDIO_POINT_BYTES*MAX_AO_POINT_NUM)
/* max length of audio stream by bytes */
#define MAX_AUDIO_STREAM_LEN MAX_AUDIO_FRAME_LEN
#define MAX_AI_USRFRM_DEPTH 30 /* max depth of user frame buf */
#define MAX_AUDIO_FILE_PATH_LEN 256
#define MAX_AUDIO_FILE_NAME_LEN 256
/* The VQE EQ Band num. */
#define VQE_EQ_BAND_NUM 10
#define VQE_DRC_SECNUM 5
#define AI_RECORDVQE_MASK_HPF 0x1
#define AI_RECORDVQE_MASK_RNR 0x2
#define AI_RECORDVQE_MASK_HDR 0x4
#define AI_RECORDVQE_MASK_DRC 0x8
#define AI_RECORDVQE_MASK_EQ 0x10
#define AI_RECORDVQE_MASK_AGC 0x20
#define AI_TALKVQE_MASK_HPF 0x1
#define AI_TALKVQE_MASK_AEC 0x2
#define AI_TALKVQE_MASK_AGC 0x8
#define AI_TALKVQE_MASK_EQ 0x10
#define AI_TALKVQE_MASK_ANR 0x20
#define AO_VQE_MASK_HPF 0x1
#define AO_VQE_MASK_ANR 0x2
#define AO_VQE_MASK_AGC 0x4
#define AO_VQE_MASK_EQ 0x8
typedef enum hiAUDIO_SAMPLE_RATE_E {
AUDIO_SAMPLE_RATE_8000 = 8000, /* 8K samplerate */
AUDIO_SAMPLE_RATE_12000 = 12000, /* 12K samplerate */
AUDIO_SAMPLE_RATE_11025 = 11025, /* 11.025K samplerate */
AUDIO_SAMPLE_RATE_16000 = 16000, /* 16K samplerate */
AUDIO_SAMPLE_RATE_22050 = 22050, /* 22.050K samplerate */
AUDIO_SAMPLE_RATE_24000 = 24000, /* 24K samplerate */
AUDIO_SAMPLE_RATE_32000 = 32000, /* 32K samplerate */
AUDIO_SAMPLE_RATE_44100 = 44100, /* 44.1K samplerate */
AUDIO_SAMPLE_RATE_48000 = 48000, /* 48K samplerate */
AUDIO_SAMPLE_RATE_64000 = 64000, /* 64K samplerate */
AUDIO_SAMPLE_RATE_96000 = 96000, /* 96K samplerate */
AUDIO_SAMPLE_RATE_BUTT,
} AUDIO_SAMPLE_RATE_E;
typedef enum hiAUDIO_BIT_WIDTH_E {
AUDIO_BIT_WIDTH_8 = 0, /* 8bit width */
AUDIO_BIT_WIDTH_16 = 1, /* 16bit width */
AUDIO_BIT_WIDTH_24 = 2, /* 24bit width */
AUDIO_BIT_WIDTH_BUTT,
} AUDIO_BIT_WIDTH_E;
typedef enum hiAIO_MODE_E {
AIO_MODE_I2S_MASTER = 0, /* AIO I2S master mode */
AIO_MODE_I2S_SLAVE, /* AIO I2S slave mode */
AIO_MODE_PCM_SLAVE_STD, /* AIO PCM slave standard mode */
AIO_MODE_PCM_SLAVE_NSTD, /* AIO PCM slave non-standard mode */
AIO_MODE_PCM_MASTER_STD, /* AIO PCM master standard mode */
AIO_MODE_PCM_MASTER_NSTD, /* AIO PCM master non-standard mode */
AIO_MODE_BUTT
} AIO_MODE_E;
typedef enum {
AIO_I2STYPE_INNERCODEC = 0, /* AIO I2S connect inner audio CODEC */
AIO_I2STYPE_INNERHDMI, /* AIO I2S connect Inner HDMI */
AIO_I2STYPE_EXTERN, /* AIO I2S connect extern hardware */
} AIO_I2STYPE_E;
typedef enum hiAIO_SOUND_MODE_E {
AUDIO_SOUND_MODE_MONO = 0, /* mono */
AUDIO_SOUND_MODE_STEREO = 1, /* stereo */
AUDIO_SOUND_MODE_BUTT
} AUDIO_SOUND_MODE_E;
/*
An example of the packing scheme for G726-32 codewords is as shown, and bit A3 is the least significant bit of the first codeword:
RTP G726-32:
0 1
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-
|B B B B|A A A A|D D D D|C C C C| ...
|0 1 2 3|0 1 2 3|0 1 2 3|0 1 2 3|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-
MEDIA G726-32:
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-
|A A A A|B B B B|C C C C|D D D D| ...
|3 2 1 0|3 2 1 0|3 2 1 0|3 2 1 0|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-
*/
typedef enum hiG726_BPS_E {
G726_16K = 0, /* G726 16kbps, see RFC3551.txt 4.5.4 G726-16 */
G726_24K, /* G726 24kbps, see RFC3551.txt 4.5.4 G726-24 */
G726_32K, /* G726 32kbps, see RFC3551.txt 4.5.4 G726-32 */
G726_40K, /* G726 40kbps, see RFC3551.txt 4.5.4 G726-40 */
MEDIA_G726_16K, /* G726 16kbps for ASF ... */
MEDIA_G726_24K, /* G726 24kbps for ASF ... */
MEDIA_G726_32K, /* G726 32kbps for ASF ... */
MEDIA_G726_40K, /* G726 40kbps for ASF ... */
G726_BUTT,
} G726_BPS_E;
typedef enum hiADPCM_TYPE_E {
/* see DVI4 diiffers in three respects from the IMA ADPCM at RFC3551.txt 4.5.1 DVI4 */
ADPCM_TYPE_DVI4 = 0, /* 32kbps ADPCM(DVI4) for RTP */
ADPCM_TYPE_IMA, /* 32kbps ADPCM(IMA),NOTICE:point num must be 161/241/321/481 */
ADPCM_TYPE_ORG_DVI4,
ADPCM_TYPE_BUTT,
} ADPCM_TYPE_E;
#define AI_EXPAND 0x01
#define AI_CUT 0x02
typedef struct hiAIO_ATTR_S {
AUDIO_SAMPLE_RATE_E enSamplerate; /* sample rate */
AUDIO_BIT_WIDTH_E enBitwidth; /* bitwidth */
AIO_MODE_E enWorkmode; /* master or slave mode */
AUDIO_SOUND_MODE_E enSoundmode; /* momo or steror */
HI_U32 u32EXFlag; /* expand 8bit to 16bit, use AI_EXPAND(only valid for AI 8bit),use AI_CUT(only valid for extern Codec for 24bit) */
HI_U32 u32FrmNum; /* frame num in buf[2,MAX_AUDIO_FRAME_NUM] */
HI_U32 u32PtNumPerFrm; /* point num per frame (80/160/240/320/480/1024/2048)
(ADPCM IMA should add 1 point, AMR only support 160) */
HI_U32 u32ChnCnt; /* channle number on FS, valid value:1/2/4/8 */
HI_U32 u32ClkSel; /* 0: AI and AO clock is separate
1: AI and AO clock is inseparate, AI use AO's clock */
AIO_I2STYPE_E enI2sType; /* i2s type */
} AIO_ATTR_S;
typedef struct hiAI_CHN_PARAM_S {
HI_U32 u32UsrFrmDepth;
} AI_CHN_PARAM_S;
typedef struct hiAUDIO_FRAME_S {
AUDIO_BIT_WIDTH_E enBitwidth; /* audio frame bitwidth */
AUDIO_SOUND_MODE_E enSoundmode; /* audio frame momo or stereo mode */
HI_U8* u64VirAddr[2];
HI_U64 u64PhyAddr[2];
HI_U64 u64TimeStamp; /* audio frame timestamp */
HI_U32 u32Seq; /* audio frame seq */
HI_U32 u32Len; /* data lenth per channel in frame */
HI_U32 u32PoolId[2];
} AUDIO_FRAME_S;
typedef struct hiAEC_FRAME_S {
AUDIO_FRAME_S stRefFrame; /* AEC reference audio frame */
HI_BOOL bValid; /* whether frame is valid */
HI_BOOL bSysBind; /* whether is sysbind */
} AEC_FRAME_S;
typedef struct hiAUDIO_FRAME_INFO_S {
AUDIO_FRAME_S *pstFrame; /* frame ptr */
HI_U32 u32Id; /* frame id */
} AUDIO_FRAME_INFO_S;
typedef struct hiAUDIO_STREAM_S {
HI_U8 ATTRIBUTE *pStream; /* the virtual address of stream */
HI_U64 ATTRIBUTE u64PhyAddr; /* the physics address of stream */
HI_U32 u32Len; /* stream lenth, by bytes */
HI_U64 u64TimeStamp; /* frame time stamp */
HI_U32 u32Seq; /* frame seq, if stream is not a valid frame,u32Seq is 0 */
} AUDIO_STREAM_S;
typedef struct hiAO_CHN_STATE_S {
HI_U32 u32ChnTotalNum; /* total number of channel buffer */
HI_U32 u32ChnFreeNum; /* free number of channel buffer */
HI_U32 u32ChnBusyNum; /* busy number of channel buffer */
} AO_CHN_STATE_S;
typedef enum hiAUDIO_TRACK_MODE_E {
AUDIO_TRACK_NORMAL = 0,
AUDIO_TRACK_BOTH_LEFT = 1,
AUDIO_TRACK_BOTH_RIGHT = 2,
AUDIO_TRACK_EXCHANGE = 3,
AUDIO_TRACK_MIX = 4,
AUDIO_TRACK_LEFT_MUTE = 5,
AUDIO_TRACK_RIGHT_MUTE = 6,
AUDIO_TRACK_BOTH_MUTE = 7,
AUDIO_TRACK_BUTT
} AUDIO_TRACK_MODE_E;
typedef enum hiAUDIO_FADE_RATE_E {
AUDIO_FADE_RATE_1 = 0,
AUDIO_FADE_RATE_2 = 1,
AUDIO_FADE_RATE_4 = 2,
AUDIO_FADE_RATE_8 = 3,
AUDIO_FADE_RATE_16 = 4,
AUDIO_FADE_RATE_32 = 5,
AUDIO_FADE_RATE_64 = 6,
AUDIO_FADE_RATE_128 = 7,
AUDIO_FADE_RATE_BUTT
} AUDIO_FADE_RATE_E;
typedef struct hiAUDIO_FADE_S {
HI_BOOL bFade;
AUDIO_FADE_RATE_E enFadeInRate;
AUDIO_FADE_RATE_E enFadeOutRate;
} AUDIO_FADE_S;
/* Defines the configure parameters of AEC. */
typedef struct hiAI_AEC_CONFIG_S {
HI_BOOL bUsrMode; /* mode 0: auto mode 1: mannual. */
HI_S8 s8CngMode; /* cozy noisy mode: 0 close, 1 open, recommend 1 */
HI_S8 s8NearAllPassEnergy; /* the far-end energy threshold for judging whether unvarnished transmission: 0 -59dBm0,
1 -49dBm0, 2 -39dBm0, recommend 1 */
HI_S8 s8NearCleanSupEnergy; /* the energy threshold for compelling reset of near-end signal: 0 12dB,
1 15dB, 2 18dB, recommend 2 */
HI_S16 s16DTHnlSortQTh; /* the threshold of judging single or double talk, recommend 16384, [0, 32767] */
HI_S16 s16EchoBandLow; /* voice processing band1,
low frequency parameter, [1, 63) for 8k, [1, 127) for 16k, recommend 10 */
HI_S16 s16EchoBandHigh; /* voice processing band1,
high frequency parameter, (s16EchoBandLow, 63] for 8k, (s16EchoBandLow, 127] for 16k, recommend 41 */
/* s16EchoBandHigh must be greater than s16EchoBandLow */
HI_S16 s16EchoBandLow2; /* voice processing band2,
low frequency parameter, [1, 63) for 8k, [1, 127) for 16k, recommend 47 */
HI_S16 s16EchoBandHigh2; /* voice processing band2,
high frequency parameter, (s16EchoBandLow2, 63] for 8k, (s16EchoBandLow2, 127] for 16k, recommend 72 */
/* s16EchoBandHigh2 must be greater than s16EchoBandLow2 */
HI_S16 s16ERLBand[6]; /* ERL protect area,
[1, 63] for 8k, [1, 127] for 16k, frequency band calculated by s16ERLBand * 62.5 */
/* besides, s16ERLBand[n+1] should be greater than s16ERLBand[n] */
HI_S16 s16ERL[7]; /* ERL protect value of ERL protect area,
the smaller its value, the more strength its protect ability,[0, 18] */
HI_S16 s16VioceProtectFreqL; /* protect area of near-end low frequency,
[1, 63) for 8k, [1, 127) for 16k, recommend 3 */
HI_S16 s16VioceProtectFreqL1; /* protect area of near-end low frequency1,
(s16VioceProtectFreqL, 63] for 8k, (s16VioceProtectFreqL, 127] for 16k, recommend 6 */
HI_S32 s32Reserved; /* s16VioceProtectFreqL1 must be greater than s16VioceProtectFreqL */
} AI_AEC_CONFIG_S;
/* Defines the configure parameters of ANR. */
typedef struct hiAUDIO_ANR_CONFIG_S {
HI_BOOL bUsrMode; /* mode 0: auto, mode 1: manual. */
HI_S16 s16NrIntensity; /* noise reduce intensity, range: [0, 25] */
HI_S16 s16NoiseDbThr; /* noise threshold, range: [30, 60] */
HI_S8 s8SpProSwitch; /* switch for music probe, range: [0:close, 1:open] */
HI_S32 s32Reserved;
} AUDIO_ANR_CONFIG_S;
/* Defines the configure parameters of AGC. */
typedef struct hiAUDIO_AGC_CONFIG_S {
HI_BOOL bUsrMode; /* mode 0: auto, mode 1: manual. */
HI_S8 s8TargetLevel; /* target voltage level, range: [-40, -1]dB */
HI_S8 s8NoiseFloor; /* noise floor, range: TalkVqe/AoVqe[-65, -20]dB, RecordVqe[-50, -20]dB */
HI_S8 s8MaxGain; /* max gain, range: [0, 30]dB */
HI_S8 s8AdjustSpeed; /* adjustable speed, range: [0, 10]dB/s */
HI_S8 s8ImproveSNR; /* switch for improving SNR, range: [0:close, 1:upper limit 3dB, 2:upper limit 6dB] */
HI_S8 s8UseHighPassFilt; /* switch for using high pass filt,
range: [0:close, 1:80Hz, 2:120Hz, 3:150:Hz, 4:300Hz: 5:500Hz] */
HI_S8 s8OutputMode; /* output mode, mute when lower than noise floor, range: [0:close, 1:open] */
HI_S16 s16NoiseSupSwitch; /* switch for noise suppression, range: [0:close, 1:open] */
HI_S32 s32Reserved;
} AUDIO_AGC_CONFIG_S;
/* Defines the configure parameters of HPF. */
typedef enum hiAUDIO_HPF_FREQ_E {
AUDIO_HPF_FREQ_80 = 80, /* 80Hz */
AUDIO_HPF_FREQ_120 = 120, /* 120Hz */
AUDIO_HPF_FREQ_150 = 150, /* 150Hz */
AUDIO_HPF_FREQ_BUTT,
} AUDIO_HPF_FREQ_E;
typedef struct hiAUDIO_HPF_CONFIG_S {
HI_BOOL bUsrMode; /* mode 0: auto mode 1: mannual. */
AUDIO_HPF_FREQ_E enHpfFreq; /* freq to be processed, value:HiFiVqe/TalkVqe/AoVqe(80Hz,120Hz,150Hz), RecordVqe(80Hz) */
} AUDIO_HPF_CONFIG_S;
typedef struct hiAI_RNR_CONFIG_S {
HI_BOOL bUsrMode; /* mode 0: auto, mode 1: mannual. */
HI_S32 s32NrMode; /* mode 0: floor noise; 1:ambient noise */
HI_S32 s32MaxNrLevel; /* max NR level range:[2,20]dB */
HI_S32 s32NoiseThresh; /* noise threshold, range:[-80, -20] */
} AI_RNR_CONFIG_S;
typedef struct hiAUDIO_EQ_CONFIG_S {
HI_S8 s8GaindB[VQE_EQ_BAND_NUM]; /* EQ band, include 100, 200, 250, 350, 500, 800, 1.2k, 2.5k, 4k, 8k in turn,
range:TalkVqe/AoVqe[-100, 20], RecordVqe[-50, 20] */
HI_S32 s32Reserved;
} AUDIO_EQ_CONFIG_S;
/* Defines the configure parameters of UPVQE work state. */
typedef enum hiVQE_WORKSTATE_E {
VQE_WORKSTATE_COMMON = 0, /* common environment, Applicable to the family of voice calls. */
VQE_WORKSTATE_MUSIC = 1, /* music environment , Applicable to the family of music environment. */
VQE_WORKSTATE_NOISY = 2, /* noisy environment , Applicable to the noisy voice calls. */
} VQE_WORKSTATE_E;
/* Defines record type */
typedef enum hiVQE_RECORD_TYPE {
VQE_RECORD_NORMAL = 0, /* <double micphone recording. */
VQE_RECORD_BUTT,
} VQE_RECORD_TYPE;
/* HDR Set CODEC GAIN Function Handle type */
typedef HI_S32 (*pFuncGainCallBack)(HI_S32 s32SetGain);
typedef struct hiAI_HDR_CONFIG_S {
HI_BOOL bUsrMode; /* mode 0: auto mode 1: mannual. */
HI_S32 s32MinGaindB; /* the minimum of MIC(AI) CODEC gain, [0, 120] */
HI_S32 s32MaxGaindB; /* the maximum of MIC(AI) CODEC gain, [0, 120] */
HI_S32 s32MicGaindB; /* the current gain of MIC(AI) CODEC,[s32MinGaindB, s32MaxGaindB] */
HI_S32 s32MicGainStepdB; /* the step size of gain adjustment, [1, 3], recommemd 2 */
pFuncGainCallBack pcallback; /* the callback function pointer of CODEC gain adjustment */
} AI_HDR_CONFIG_S;
typedef struct hiAI_DRC_CONFIG_S {
HI_BOOL bUsrMode; /* enable user mode or not,default 0: disable user mode,1: user mode. */
HI_S16 s16AttackTime; /* time of signal change from large to small (ms), range:HiFiVqe[10, 250]ms, RecordVqe[10, 126]ms */
HI_S16 s16ReleaseTime; /* time of signal change from small to large (ms), range:HiFiVqe[10, 250]ms, RecordVqe[10, 126]ms */
HI_S16 s16OldLevDb[VQE_DRC_SECNUM]; /* old curve level(dB), default[0, -472, -792, -960, -1280],range:[-1440, 0]ms,store from big to small,scale:Q4 */
HI_S16 s16NewLevDb[VQE_DRC_SECNUM]; /* new curve level(dB), default[0, -174, -410, -608, -1021],range:[-1440, 0]ms,store from big to small,scale:Q4 */
} AI_DRC_CONFIG_S;
/* Defines the configure parameters of Record VQE. */
typedef struct hiAI_RECORDVQE_CONFIG_S {
HI_U32 u32OpenMask;
HI_S32 s32WorkSampleRate; /* Sample Rate:16KHz/48KHz */
HI_S32 s32FrameSample; /* VQE frame length:80-4096 */
VQE_WORKSTATE_E enWorkstate;
HI_S32 s32InChNum;
HI_S32 s32OutChNum;
VQE_RECORD_TYPE enRecordType;
AUDIO_HPF_CONFIG_S stHpfCfg;
AI_RNR_CONFIG_S stRnrCfg;
AI_HDR_CONFIG_S stHdrCfg;
AI_DRC_CONFIG_S stDrcCfg;
AUDIO_EQ_CONFIG_S stEqCfg;
AUDIO_AGC_CONFIG_S stAgcCfg;
} AI_RECORDVQE_CONFIG_S;
/* Defines the configure parameters of Talk VQE. */
typedef struct hiAI_TALKVQE_CONFIG_S {
HI_U32 u32OpenMask;
HI_S32 s32WorkSampleRate; /* Sample Rate: 8KHz/16KHz. default: 8KHz */
HI_S32 s32FrameSample; /* VQE frame length: 80-4096 */
VQE_WORKSTATE_E enWorkstate;
AUDIO_HPF_CONFIG_S stHpfCfg;
AI_AEC_CONFIG_S stAecCfg;
AUDIO_ANR_CONFIG_S stAnrCfg;
AUDIO_AGC_CONFIG_S stAgcCfg;
AUDIO_EQ_CONFIG_S stEqCfg;
} AI_TALKVQE_CONFIG_S;
typedef struct hiAO_VQE_CONFIG_S {
HI_U32 u32OpenMask;
HI_S32 s32WorkSampleRate; /* Sample Rate: 8KHz/16KHz/48KHz. default: 8KHz */
HI_S32 s32FrameSample; /* VQE frame length: 80-4096 */
VQE_WORKSTATE_E enWorkstate;
AUDIO_HPF_CONFIG_S stHpfCfg;
AUDIO_ANR_CONFIG_S stAnrCfg;
AUDIO_AGC_CONFIG_S stAgcCfg;
AUDIO_EQ_CONFIG_S stEqCfg;
} AO_VQE_CONFIG_S;
/* Defines the module register configure of VQE. */
typedef struct hiVQE_MODULE_CONFIG_S {
HI_VOID *pHandle;
} VQE_MODULE_CONFIG_S;
typedef struct hiAUDIO_VQE_REGISTER_S {
VQE_MODULE_CONFIG_S stResModCfg;
VQE_MODULE_CONFIG_S stHpfModCfg;
VQE_MODULE_CONFIG_S stHdrModCfg;
VQE_MODULE_CONFIG_S stGainModCfg;
// Record VQE
VQE_MODULE_CONFIG_S stRecordModCfg;
// Talk VQE
VQE_MODULE_CONFIG_S stAecModCfg;
VQE_MODULE_CONFIG_S stAnrModCfg;
VQE_MODULE_CONFIG_S stAgcModCfg;
VQE_MODULE_CONFIG_S stEqModCfg;
// HiFi VQE
VQE_MODULE_CONFIG_S stRnrModCfg;
VQE_MODULE_CONFIG_S stDrcModCfg;
VQE_MODULE_CONFIG_S stPeqModCfg;
} AUDIO_VQE_REGISTER_S;
/* Defines the configure parameters of AI saving file. */
typedef struct hiAUDIO_SAVE_FILE_INFO_S {
HI_BOOL bCfg;
HI_CHAR aFilePath[MAX_AUDIO_FILE_PATH_LEN];
HI_CHAR aFileName[MAX_AUDIO_FILE_NAME_LEN];
HI_U32 u32FileSize; /* in KB */
} AUDIO_SAVE_FILE_INFO_S;
/* Defines whether the file is saving or not . */
typedef struct hiAUDIO_FILE_STATUS_S {
HI_BOOL bSaving;
} AUDIO_FILE_STATUS_S;
/* Defines audio clksel type */
typedef enum hiAUDIO_CLKSEL_E {
AUDIO_CLKSEL_BASE = 0, /* <Audio base clk. */
AUDIO_CLKSEL_SPARE, /* <Audio spare clk. */
AUDIO_CLKSEL_BUTT,
} AUDIO_CLKSEL_E;
/* Defines audio mode parameter. */
typedef struct hiAUDIO_MOD_PARAM_S {
AUDIO_CLKSEL_E enClkSel;
} AUDIO_MOD_PARAM_S;
typedef enum hiEN_AIO_ERR_CODE_E {
AIO_ERR_VQE_ERR = 65, /* vqe error */
} EN_AIO_ERR_CODE_E;
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_AIO_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_AIO, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* using a NULL point */
#define HI_ERR_AIO_NULL_PTR HI_DEF_ERR(HI_ID_AIO, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* operation is not supported by NOW */
#define HI_ERR_AIO_NOT_PERM HI_DEF_ERR(HI_ID_AIO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* vqe err */
#define HI_ERR_AIO_REGISTER_ERR HI_DEF_ERR(HI_ID_AIO, EN_ERR_LEVEL_ERROR, AIO_ERR_VQE_ERR)
/* invlalid device ID */
#define HI_ERR_AI_INVALID_DEVID HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* invlalid channel ID */
#define HI_ERR_AI_INVALID_CHNID HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_AI_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* using a NULL point */
#define HI_ERR_AI_NULL_PTR HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_AI_NOT_CONFIG HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_AI_NOT_SUPPORT HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change stati attribute */
#define HI_ERR_AI_NOT_PERM HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* the devide is not enabled */
#define HI_ERR_AI_NOT_ENABLED HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* failure caused by malloc memory */
#define HI_ERR_AI_NOMEM HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_AI_NOBUF HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_AI_BUF_EMPTY HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_AI_BUF_FULL HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* system is not ready,had not initialed or loaded */
#define HI_ERR_AI_SYS_NOTREADY HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_AI_BUSY HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/* vqe err */
#define HI_ERR_AI_VQE_ERR HI_DEF_ERR(HI_ID_AI, EN_ERR_LEVEL_ERROR, AIO_ERR_VQE_ERR)
/* invlalid device ID */
#define HI_ERR_AO_INVALID_DEVID HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* invlalid channel ID */
#define HI_ERR_AO_INVALID_CHNID HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_AO_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* using a NULL point */
#define HI_ERR_AO_NULL_PTR HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_AO_NOT_CONFIG HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_AO_NOT_SUPPORT HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change stati attribute */
#define HI_ERR_AO_NOT_PERM HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* the devide is not enabled */
#define HI_ERR_AO_NOT_ENABLED HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* failure caused by malloc memory */
#define HI_ERR_AO_NOMEM HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_AO_NOBUF HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_AO_BUF_EMPTY HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_AO_BUF_FULL HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* system is not ready,had not initialed or loaded */
#define HI_ERR_AO_SYS_NOTREADY HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_AO_BUSY HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/* vqe err */
#define HI_ERR_AO_VQE_ERR HI_DEF_ERR(HI_ID_AO, EN_ERR_LEVEL_ERROR, AIO_ERR_VQE_ERR)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef __HI_COMM_AI_H__ */

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/******************************************************************************
Copyright (C), 2001-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_ao.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2009/5/5
Description :
History :
1.Date : 2009/5/5
Author : p00123320
Modification: Created file
******************************************************************************/
#ifndef __HI_COMM_AO_H__
#define __HI_COMM_AO_H__
#ifdef __cplusplus
#if __cplusplus
extern "C"{
#endif
#endif /* End of #ifdef __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef __HI_COMM_AO_H__ */

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/******************************************************************************
Copyright (C), 2017-2018, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_dis.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/08/23
Description : hi_comm_dis.h header file
History :
******************************************************************************/
#include "hi_type.h"
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#ifndef __HI_COMM_DIS_H__
#define __HI_COMM_DIS_H__
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif
/* failure caused by malloc buffer */
#define HI_ERR_DIS_NOBUF HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
#define HI_ERR_DIS_BUF_EMPTY HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
#define HI_ERR_DIS_NULL_PTR HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_DIS_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_DIS_BUF_FULL HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
#define HI_ERR_DIS_SYS_NOTREADY HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_DIS_NOT_SUPPORT HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#define HI_ERR_DIS_NOT_PERMITTED HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_DIS_BUSY HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_DIS_INVALID_CHNID HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
#define HI_ERR_DIS_CHN_UNEXIST HI_DEF_ERR(HI_ID_DIS, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* Different mode of DIS */
typedef enum hiDIS_MODE_E {
DIS_MODE_4_DOF_GME = 0, /* Only use with GME in 4 dof */
DIS_MODE_6_DOF_GME, /* Only use with GME in 6 dof */
DIS_MODE_GYRO, /* Only use with gryo in 6 dof */
DIS_MODE_DOF_BUTT,
} DIS_MODE_E;
/* The motion level of camera */
typedef enum hiDIS_MOTION_LEVEL_E {
DIS_MOTION_LEVEL_LOW = 0, /* Low motion level */
DIS_MOTION_LEVEL_NORMAL, /* Normal motion level */
DIS_MOTION_LEVEL_HIGH, /* High motion level */
DIS_MOTION_LEVEL_BUTT
} DIS_MOTION_LEVEL_E;
/* Different product type used DIS */
typedef enum hiDIS_PDT_TYPE_E {
DIS_PDT_TYPE_IPC = 0, /* IPC product type */
DIS_PDT_TYPE_DV, /* DV product type */
DIS_PDT_TYPE_DRONE, /* DRONE product type */
DIS_PDT_TYPE_BUTT
} DIS_PDT_TYPE_E;
/* The Attribute of DIS */
typedef struct hiDIS_ATTR_S {
HI_BOOL bEnable; /* RW; DIS enable */
HI_BOOL bGdcBypass; /* RW; gdc correction process , DIS = GME&GDC correction */
HI_U32 u32MovingSubjectLevel; /* RW; Range:[0,6]; Moving Subject level */
HI_S32 s32RollingShutterCoef; /* RW; Range:[0,1000]; Rolling shutter coefficients */
HI_S32 s32Timelag; /* RW; Range:[-2000000,2000000]; Timestamp delay between Gyro and Frame PTS */
HI_U32 u32ViewAngle; /* Reserved */
HI_U32 u32HorizontalLimit; /* RW; Range:[0,1000]; Parameter to limit horizontal drift by large foreground */
HI_U32 u32VerticalLimit; /* RW; Range:[0,1000]; Parameter to limit vertical drift by large foreground */
HI_BOOL bStillCrop; /* RW; The stabilization will be not working ,but the output image still be cropped */
} DIS_ATTR_S;
/* The Config of DIS */
typedef struct hiDIS_CONFIG_S {
DIS_MODE_E enMode; /* RW; DIS Mode */
DIS_MOTION_LEVEL_E enMotionLevel; /* RW; DIS Motion level of the camera */
DIS_PDT_TYPE_E enPdtType; /* RW; DIS product type */
HI_U32 u32BufNum; /* RW; Range:[5,10]; Buf num for DIS */
HI_U32 u32CropRatio; /* RW; Range:[50,98]; Crop ratio of output image */
HI_U32 u32FrameRate; /* RW; Range: Hi3559AV100 = (0, 120] | Hi3519AV100 = (0, 120] | Hi3516CV500 = (0, 60] |
Hi3516DV300 = (0, 60] | Hi3559V200 = (0, 60] | Hi3556V200 = (0, 60] . */
HI_U32 u32GyroOutputRange; /* RW; Range:[0,200000]; The range of Gyro output in degree */
HI_U32 u32GyroDataBitWidth; /* RW; Range:[0,32]; The bits used for gyro angular velocity output */
HI_BOOL bCameraSteady; /* RW; The camera is steady or not */
HI_BOOL bScale; /* RW; Scale output image or not */
} DIS_CONFIG_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif
#endif

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2012-2018. All rights reserved.
* Description: hi_comm_gdc.h
* Author:
* Create: 2016-10-07
*/
#include "hi_type.h"
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#ifndef __HI_COMM_GDC_H__
#define __HI_COMM_GDC_H__
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
/* failure caused by malloc buffer */
#define HI_ERR_GDC_NOBUF HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
#define HI_ERR_GDC_BUF_EMPTY HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
#define HI_ERR_GDC_NULL_PTR HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_GDC_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_GDC_BUF_FULL HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
#define HI_ERR_GDC_SYS_NOTREADY HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_GDC_NOT_SUPPORT HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#define HI_ERR_GDC_NOT_PERMITTED HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_GDC_BUSY HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_GDC_INVALID_CHNID HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
#define HI_ERR_GDC_CHN_UNEXIST HI_DEF_ERR(HI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
#define FISHEYE_MAX_REGION_NUM 4
#define FISHEYE_LMFCOEF_NUM 128
#define GDC_PMFCOEF_NUM 9
typedef HI_S32 GDC_HANDLE;
typedef struct hiGDC_TASK_ATTR_S {
VIDEO_FRAME_INFO_S stImgIn; /* Input picture */
VIDEO_FRAME_INFO_S stImgOut; /* Output picture */
HI_U64 au64privateData[4]; /* RW; Private data of task */
HI_U64 reserved; /* RW; Debug information,state of current picture */
} GDC_TASK_ATTR_S;
/* Mount mode of device */
typedef enum hiFISHEYE_MOUNT_MODE_E {
FISHEYE_DESKTOP_MOUNT = 0, /* Desktop mount mode */
FISHEYE_CEILING_MOUNT = 1, /* Ceiling mount mode */
FISHEYE_WALL_MOUNT = 2, /* wall mount mode */
FISHEYE_MOUNT_MODE_BUTT
} FISHEYE_MOUNT_MODE_E;
/* View mode of client */
typedef enum hiFISHEYE_VIEW_MODE_E {
FISHEYE_VIEW_360_PANORAMA = 0, /* 360 panorama mode of gdc correction */
FISHEYE_VIEW_180_PANORAMA = 1, /* 180 panorama mode of gdc correction */
FISHEYE_VIEW_NORMAL = 2, /* normal mode of gdc correction */
FISHEYE_NO_TRANSFORMATION = 3, /* no gdc correction */
FISHEYE_VIEW_MODE_BUTT
} FISHEYE_VIEW_MODE_E;
/* Fisheye region correction attribute */
typedef struct hiFISHEYE_REGION_ATTR_S {
FISHEYE_VIEW_MODE_E enViewMode; /* RW; Range: [0, 3];gdc view mode */
HI_U32 u32InRadius; /* RW; inner radius of gdc correction region */
HI_U32 u32OutRadius; /* RW; out radius of gdc correction region */
HI_U32 u32Pan; /* RW; Range: [0, 360] */
HI_U32 u32Tilt; /* RW; Range: [0, 360] */
HI_U32 u32HorZoom; /* RW; Range: [1, 4095] */
HI_U32 u32VerZoom; /* RW; Range: [1, 4095] */
RECT_S stOutRect; /* RW; out Imge rectangle attribute */
} FISHEYE_REGION_ATTR_S;
typedef struct hiFISHEYE_REGION_ATTR_EX_S {
FISHEYE_VIEW_MODE_E enViewMode; /* RW; Range: [0, 3];gdc view mode */
HI_U32 u32InRadius; /* RW; inner radius of gdc correction region */
HI_U32 u32OutRadius; /* RW; out radius of gdc correction region */
HI_U32 u32X; /* RW; Range: [0, 4608] */
HI_U32 u32Y; /* RW; Range: [0, 3456] */
HI_U32 u32HorZoom; /* RW; Range: [1, 4095] */
HI_U32 u32VerZoom; /* RW; Range: [1, 4095] */
RECT_S stOutRect; /* RW; out Imge rectangle attribute */
} FISHEYE_REGION_ATTR_EX_S;
/* Fisheye all regions correction attribute */
typedef struct hiFISHEYE_ATTR_S {
HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */
HI_BOOL bLMF; /* RW; Range: [0, 1];whether gdc len's LMF coefficient is from user config or
from default linear config */
HI_BOOL bBgColor; /* RW; Range: [0, 1];whether use background color or not */
HI_U32 u32BgColor; /* RW; Range: [0,0xffffff];the background color RGB888 */
HI_S32 s32HorOffset; /* RW; Range: [-511, 511];the horizontal offset between image center and
physical center of len */
HI_S32 s32VerOffset; /* RW; Range: [-511, 511]; the vertical offset between image center and
physical center of len */
HI_U32 u32TrapezoidCoef; /* RW; Range: [0, 32];strength coefficient of trapezoid correction */
HI_S32 s32FanStrength; /* RW; Range: [-760, 760];strength coefficient of fan correction */
FISHEYE_MOUNT_MODE_E enMountMode; /* RW; Range: [0, 2];gdc mount mode */
HI_U32 u32RegionNum; /* RW; Range: [1, 4]; gdc correction region number */
FISHEYE_REGION_ATTR_S astFishEyeRegionAttr[FISHEYE_MAX_REGION_NUM]; /* RW; attribution of gdc correction region */
} FISHEYE_ATTR_S;
typedef struct hiFISHEYE_ATTR_EX_S {
HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */
HI_BOOL bLMF; /* RW; Range: [0, 1];whether gdc len's LMF coefficient is from user config or
from default linear config */
HI_BOOL bBgColor; /* RW; Range: [0, 1];whether use background color or not */
HI_U32 u32BgColor; /* RW; Range: [0,0xffffff];the background color RGB888 */
HI_S32 s32HorOffset; /* RW; Range: [-511, 511];the horizontal offset between image center and
physical center of len */
HI_S32 s32VerOffset; /* RW; Range: [-511, 511]; the vertical offset between image center and
physical center of len */
HI_U32 u32TrapezoidCoef; /* RW; Range: [0, 32];strength coefficient of trapezoid correction */
HI_S32 s32FanStrength; /* RW; Range: [-760, 760];strength coefficient of fan correction */
FISHEYE_MOUNT_MODE_E enMountMode; /* RW; Range: [0, 2];gdc mount mode */
HI_U32 u32RegionNum; /* RW; Range: [1, 4]; gdc correction region number */
/* RW; attribution of gdc correction region */
FISHEYE_REGION_ATTR_EX_S astFishEyeRegionAttr[FISHEYE_MAX_REGION_NUM];
} FISHEYE_ATTR_EX_S;
/* Spread correction attribute */
typedef struct hiSPREAD_ATTR_S {
HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable spread or not,
When spread on,ldc DistortionRatio range should be [0, 500] */
HI_U32 u32SpreadCoef; /* RW; Range: [0, 18];strength coefficient of spread correction */
SIZE_S stDestSize; /* RW; dest size of spread */
} SPREAD_ATTR_S;
/* Fisheye Job Config */
typedef struct hiFISHEYE_JOB_CONFIG_S {
HI_U64 u64LenMapPhyAddr; /* LMF coefficient Physic Addr */
} FISHEYE_JOB_CONFIG_S;
/* Fisheye Config */
typedef struct hiFISHEYE_CONFIG_S {
HI_U16 au16LMFCoef[FISHEYE_LMFCOEF_NUM]; /* RW; LMF coefficient of gdc len */
} FISHEYE_CONFIG_S;
/* Gdc PMF Attr */
typedef struct hiGDC_PMF_ATTR_S {
HI_S64 as64PMFCoef[GDC_PMFCOEF_NUM]; /* W; PMF coefficient of gdc */
} GDC_PMF_ATTR_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_GDC_H__ */

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/******************************************************************************
Copyright (C), 2001-2014, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_ive.h
Version : Initial Draft
Author : Hisilicon multimedia software (IVE) group
Created : 2011/05/16
Description :
1.Date : 2011/05/16
Modification: Created file
2.Date : 2013/07/01~2014/08/08
Modification: Add MPI function
******************************************************************************/
#ifndef _HI_COMM_IVE_H_
#define _HI_COMM_IVE_H_
#include "hi_type.h"
#include "hi_errno.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif
/* -----------------------------------------------*
* The fixed-point data type, will be used to *
* represent float data in hardware calculations.*
* ----------------------------------------------- */
/* --u8bit---------------------------------------- */
typedef unsigned char HI_U0Q8;
typedef unsigned char HI_U1Q7;
typedef unsigned char HI_U5Q3;
typedef unsigned char HI_U3Q5;
/* --u16bit--------------------------------------- */
typedef unsigned short HI_U0Q16;
typedef unsigned short HI_U4Q12;
typedef unsigned short HI_U6Q10;
typedef unsigned short HI_U8Q8;
typedef unsigned short HI_U9Q7;
typedef unsigned short HI_U12Q4;
typedef unsigned short HI_U14Q2;
typedef unsigned short HI_U5Q11;
typedef unsigned short HI_U1Q15;
typedef unsigned short HI_U2Q14;
typedef HI_U6Q10 HI_UFP16;
/* --s16bit--------------------------------------- */
typedef short HI_S9Q7;
typedef short HI_S14Q2;
typedef short HI_S1Q15;
/* --u32bit--------------------------------------- */
typedef unsigned int HI_U22Q10;
typedef unsigned int HI_U25Q7;
typedef unsigned int HI_U21Q11;
typedef unsigned int HI_U14Q18;
typedef unsigned int HI_U8Q24;
typedef unsigned int HI_U4Q28;
/* --s32bit--------------------------------------- */
typedef int HI_S25Q7;
typedef int HI_S16Q16;
typedef int HI_S14Q18;
typedef int HI_S20Q12;
typedef int HI_S24Q8;
/* -----------------------------------------------*
* The fixed-point data type combine with flag_bits.*
* ----------------------------------------------- */
/* 8bits unsigned integer,4bits decimal fraction,4bits flag_bits */
typedef unsigned short HI_U8Q4F4;
/* -----------------------------------------------*
* The fixed-point data type, will be used to *
* represent float data in hardware calculations. linux code style.*
* ----------------------------------------------- */
/* --u8bit---------------------------------------- */
typedef HI_U0Q8 hi_u0q8;
typedef HI_U1Q7 hi_u1q7;
typedef HI_U5Q3 hi_u5q3;
typedef HI_U3Q5 hi_u3q5;
/* --u16bit--------------------------------------- */
typedef HI_U0Q16 hi_u0q16;
typedef HI_U4Q12 hi_u4q12;
typedef HI_U6Q10 hi_u6q10;
typedef HI_U8Q8 hi_u8q8;
typedef HI_U9Q7 hi_u9q7;
typedef HI_U12Q4 hi_u12q4;
typedef HI_U14Q2 hi_u14q2;
typedef HI_U5Q11 hi_u5q11;
typedef HI_U1Q15 hi_u1q15;
typedef HI_U2Q14 hi_u2q14;
typedef HI_UFP16 hi_ufp16;
/* 8bits unsigned integer,4bits decimal fraction,4bits flag_bits */
typedef HI_U8Q4F4 hi_u8q4f4;
/* --s16bit--------------------------------------- */
typedef HI_S9Q7 hi_s9q7;
typedef HI_S14Q2 hi_s14q2;
typedef HI_S1Q15 hi_s1q15;
/* --u32bit--------------------------------------- */
typedef HI_U22Q10 hi_u22q10;
typedef HI_U25Q7 hi_u25q7;
typedef HI_U21Q11 hi_u21q11;
typedef HI_U14Q18 hi_u14q18;
typedef HI_U8Q24 hi_u8q24;
typedef HI_U4Q28 hi_u4q28;
/* --s32bit--------------------------------------- */
typedef HI_S25Q7 hi_s25q7;
typedef HI_S16Q16 hi_s16q16;
typedef HI_S14Q18 hi_s14q18;
typedef HI_S20Q12 hi_s20q12;
typedef HI_S24Q8 hi_s24q8;
/* Type of the IVE_IMAGE_S data.Aded by tanbing 2013-7-22 */
typedef enum hiIVE_IMAGE_TYPE_E {
IVE_IMAGE_TYPE_U8C1 = 0x0,
IVE_IMAGE_TYPE_S8C1 = 0x1,
IVE_IMAGE_TYPE_YUV420SP = 0x2, /* YUV420 SemiPlanar */
IVE_IMAGE_TYPE_YUV422SP = 0x3, /* YUV422 SemiPlanar */
IVE_IMAGE_TYPE_YUV420P = 0x4, /* YUV420 Planar */
IVE_IMAGE_TYPE_YUV422P = 0x5, /* YUV422 planar */
IVE_IMAGE_TYPE_S8C2_PACKAGE = 0x6,
IVE_IMAGE_TYPE_S8C2_PLANAR = 0x7,
IVE_IMAGE_TYPE_S16C1 = 0x8,
IVE_IMAGE_TYPE_U16C1 = 0x9,
IVE_IMAGE_TYPE_U8C3_PACKAGE = 0xa,
IVE_IMAGE_TYPE_U8C3_PLANAR = 0xb,
IVE_IMAGE_TYPE_S32C1 = 0xc,
IVE_IMAGE_TYPE_U32C1 = 0xd,
IVE_IMAGE_TYPE_S64C1 = 0xe,
IVE_IMAGE_TYPE_U64C1 = 0xf,
IVE_IMAGE_TYPE_BUTT
} IVE_IMAGE_TYPE_E;
/* Definition of the IVE_IMAGE_S. Added by Tan Bing, 2013-7-22. */
typedef struct hiIVE_IMAGE_S {
HI_U64 au64PhyAddr[3]; /* RW;The physical address of the image */
HI_U64 au64VirAddr[3]; /* RW;The virtual address of the image */
HI_U32 au32Stride[3]; /* RW;The stride of the image */
HI_U32 u32Width; /* RW;The width of the image */
HI_U32 u32Height; /* RW;The height of the image */
IVE_IMAGE_TYPE_E enType; /* RW;The type of the image */
} IVE_IMAGE_S;
typedef IVE_IMAGE_S IVE_SRC_IMAGE_S;
typedef IVE_IMAGE_S IVE_DST_IMAGE_S;
/*
* Definition of the IVE_MEM_INFO_S.This struct special purpose for input or ouput, such as Hist, CCL, ShiTomasi.
* Added by Chen Quanfu, 2013-7-23.
*/
typedef struct hiIVE_MEM_INFO_S {
HI_U64 u64PhyAddr; /* RW;The physical address of the memory */
HI_U64 u64VirAddr; /* RW;The virtual address of the memory */
HI_U32 u32Size; /* RW;The size of memory */
} IVE_MEM_INFO_S;
typedef IVE_MEM_INFO_S IVE_SRC_MEM_INFO_S;
typedef IVE_MEM_INFO_S IVE_DST_MEM_INFO_S;
/* Data struct ,created by Chen Quanfu 2013-07-19 */
typedef struct hiIVE_DATA_S {
HI_U64 u64PhyAddr; /* RW;The physical address of the data */
HI_U64 u64VirAddr; /* RW;The virtaul address of the data */
HI_U32 u32Stride; /* RW;The stride of 2D data by byte */
HI_U32 u32Width; /* RW;The width of 2D data by byte */
HI_U32 u32Height; /* RW;The height of 2D data by byte */
HI_U32 u32Reserved;
} IVE_DATA_S;
typedef IVE_DATA_S IVE_SRC_DATA_S;
typedef IVE_DATA_S IVE_DST_DATA_S;
/* Definition of the union of IVE_8BIT_U.Added by Tan Bing, 2013-7-22. */
typedef union hiIVE_8BIT_U {
HI_S8 s8Val;
HI_U8 u8Val;
} IVE_8BIT_U;
/* Definition of u16 point */
typedef struct hiIVE_POINT_U16_S {
HI_U16 u16X; /* RW;The X coordinate of the point */
HI_U16 u16Y; /* RW;The Y coordinate of the point */
} IVE_POINT_U16_S;
/*
* Definition of s16 point
*/
typedef struct hiIVE_POINT_S16_S {
HI_U16 s16X; /* RW;The X coordinate of the point */
HI_U16 s16Y; /* RW;The Y coordinate of the point */
} IVE_POINT_S16_S;
/*
* Float point represented by Fixed-point SQ25.7
*/
typedef struct hiIVE_POINT_S25Q7_S {
HI_S25Q7 s25q7X; /* RW;The X coordinate of the point */
HI_S25Q7 s25q7Y; /* RW;The Y coordinate of the point */
} IVE_POINT_S25Q7_S;
/*
* Point u14q2
*/
typedef struct hiIVE_POINT_U14Q2_S {
HI_U14Q2 u14q2X;
HI_U14Q2 u14q2Y;
} IVE_POINT_U14Q2_S;
/* Definition of rectangle */
typedef struct hiIVE_RECT_U16_S {
HI_U16 u16X; /* RW;The location of X axis of the rectangle */
HI_U16 u16Y; /* RW;The location of Y axis of the rectangle */
HI_U16 u16Width; /* RW;The width of the rectangle */
HI_U16 u16Height; /* RW;The height of the rectangle */
} IVE_RECT_U16_S;
typedef struct hiIVE_RECT_U32_S {
HI_U32 u32X; /* RW;The location of X axis of the rectangle */
HI_U32 u32Y; /* RW;The location of Y axis of the rectangle */
HI_U32 u32Width; /* RW;The width of the rectangle */
HI_U32 u32Height; /* RW;The height of the rectangle */
} IVE_RECT_U32_S;
typedef struct hiIVE_RECT_S24Q8_S {
HI_S24Q8 s24q8X;
HI_S24Q8 s24q8Y;
HI_U32 u32Width;
HI_U32 u32Height;
} IVE_RECT_S24Q8_S;
typedef struct hiIVE_LOOK_UP_TABLE_S {
IVE_MEM_INFO_S stTable;
HI_U16 u16ElemNum; /* RW;LUT's elements number */
HI_U8 u8TabInPreci;
HI_U8 u8TabOutNorm;
HI_S32 s32TabInLower; /* RW;LUT's original input lower limit */
HI_S32 s32TabInUpper; /* RW;LUT's original input upper limit */
} IVE_LOOK_UP_TABLE_S;
/* Blob type */
typedef enum hiIVE_BLOB_TYPE_E {
IVE_BLOB_TYPE_S32 = 0x0,
IVE_BLOB_TYPE_U8 = 0x1,
/* channel = 3 */
IVE_BLOB_TYPE_YVU420SP = 0x2,
/* channel = 3 */
IVE_BLOB_TYPE_YVU422SP = 0x3,
IVE_BLOB_TYPE_VEC_S32 = 0x4,
IVE_BLOB_TYPE_SEQ_S32 = 0x5,
IVE_BLOB_TYPE_U16 = 0x6,
IVE_BLOB_TYPE_S8 = 0x7,
IVE_BLOB_TYPE_F32 = 0x8,
IVE_BLOB_TYPE_BUTT
} IVE_BLOB_TYPE_E;
/****************************** Blob struct ******************************
In Caffe, the blob contain shape info as the following order:
Image\FeatureMap: N C H W
FC(normal vector): N C
RNN\LSTM(Recurrent) vector: T N D
The relationship of the following blob struct with Caffe blob is as follows:
Image\FeatureMap: Num Chn Height With
FC(VEC_S32): Num Width
RNN\LSTM(SEQ_S32) vector: Step Num Dim
The stride, which measuring unit is byte, is always algined by the width or
dim direction.
**************************************************************************/
typedef struct hiIVE_BLOB_S {
IVE_BLOB_TYPE_E enType; /* Blob type */
HI_U32 u32Stride; /* Stride, a line bytes num */
HI_U64 u64VirAddr; /* virtual addr */
HI_U64 u64PhyAddr; /* physical addr */
HI_U32 u32Num; /* N: frame num or sequence num,correspond to caffe blob's n */
union {
struct {
HI_U32 u32Width; /* W: frame width, correspond to caffe blob's w */
HI_U32 u32Height; /* H: frame height, correspond to caffe blob's h */
HI_U32 u32Chn; /* C: frame channel,correspond to caffe blob's c */
} stWhc;
struct {
HI_U32 u32Dim; /* D: vecotr dimension */
HI_U64 u64VirAddrStep; /* T: virtual adress of time steps array in each sequence */
} stSeq;
} unShape;
} IVE_BLOB_S;
typedef IVE_BLOB_S IVE_SRC_BLOB_S;
typedef IVE_BLOB_S IVE_DST_BLOB_S;
typedef enum hiEN_IVE_ERR_CODE_E {
ERR_IVE_SYS_TIMEOUT = 0x40, /* IVE process timeout */
ERR_IVE_QUERY_TIMEOUT = 0x41, /* IVE query timeout */
ERR_IVE_OPEN_FILE = 0x42, /* IVE open file error */
ERR_IVE_READ_FILE = 0x43, /* IVE read file error */
ERR_IVE_WRITE_FILE = 0x44, /* IVE write file error */
ERR_IVE_BUS_ERR = 0x45,
ERR_IVE_BUTT
} EN_IVE_ERR_CODE_E;
typedef enum hiEN_FD_ERR_CODE_E {
ERR_FD_SYS_TIMEOUT = 0x40, /* FD process timeout */
ERR_FD_CFG = 0x41, /* FD configuration error */
ERR_FD_FACE_NUM_OVER = 0x42, /* FD candidate face number over */
ERR_FD_OPEN_FILE = 0x43, /* FD open file error */
ERR_FD_READ_FILE = 0x44, /* FD read file error */
ERR_FD_WRITE_FILE = 0x45, /* FD write file error */
ERR_FD_BUTT
} EN_FD_ERR_CODE_E;
/************************************************IVE error code ***********************************/
/* Invalid device ID */
#define HI_ERR_IVE_INVALID_DEVID HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* Invalid channel ID */
#define HI_ERR_IVE_INVALID_CHNID HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* At least one parameter is illegal. For example, an illegal enumeration value exists. */
#define HI_ERR_IVE_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* The channel exists. */
#define HI_ERR_IVE_EXIST HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* The UN exists. */
#define HI_ERR_IVE_UNEXIST HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* A null point is used. */
#define HI_ERR_IVE_NULL_PTR HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* Try to enable or initialize the system, device, or channel before configuring attributes. */
#define HI_ERR_IVE_NOT_CONFIG HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* The operation is not supported currently. */
#define HI_ERR_IVE_NOT_SURPPORT HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* The operation, changing static attributes for example, is not permitted. */
#define HI_ERR_IVE_NOT_PERM HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* A failure caused by the malloc memory occurs. */
#define HI_ERR_IVE_NOMEM HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* A failure caused by the malloc buffer occurs. */
#define HI_ERR_IVE_NOBUF HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* The buffer is empty. */
#define HI_ERR_IVE_BUF_EMPTY HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* No buffer is provided for storing new data. */
#define HI_ERR_IVE_BUF_FULL HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* The system is not ready because it may be not initialized or loaded.
* The error code is returned when a device file fails to be opened. */
#define HI_ERR_IVE_NOTREADY HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* The source address or target address is incorrect during the operations such as calling
copy_from_user or copy_to_user. */
#define HI_ERR_IVE_BADADDR HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_BADADDR)
/* The resource is busy during the operations such as destroying a VENC channel
without deregistering it. */
#define HI_ERR_IVE_BUSY HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/* IVE process timeout: 0xA01D8040 */
#define HI_ERR_IVE_SYS_TIMEOUT HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, ERR_IVE_SYS_TIMEOUT)
/* IVE query timeout: 0xA01D8041 */
#define HI_ERR_IVE_QUERY_TIMEOUT HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, ERR_IVE_QUERY_TIMEOUT)
/* IVE open file error: 0xA01D8042 */
#define HI_ERR_IVE_OPEN_FILE HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, ERR_IVE_OPEN_FILE)
/* IVE read file error: 0xA01D8043 */
#define HI_ERR_IVE_READ_FILE HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, ERR_IVE_READ_FILE)
/* IVE read file error: 0xA01D8044 */
#define HI_ERR_IVE_WRITE_FILE HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, ERR_IVE_WRITE_FILE)
/* IVE Bus error: 0xA01D8045 */
#define HI_ERR_IVE_BUS_ERR HI_DEF_ERR(HI_ID_IVE, EN_ERR_LEVEL_ERROR, ERR_IVE_BUS_ERR)
/************************************************FD error code ***********************************/
/* Invalid device ID */
#define HI_ERR_FD_INVALID_DEVID HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* Invalid channel ID */
#define HI_ERR_FD_INVALID_CHNID HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* At least one parameter is illegal. For example, an illegal enumeration value exists. */
#define HI_ERR_FD_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* The channel exists. */
#define HI_ERR_FD_EXIST HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* The UN exists. */
#define HI_ERR_FD_UNEXIST HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* A null point is used. */
#define HI_ERR_FD_NULL_PTR HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* Try to enable or initialize the system, device, or channel before configuring attributes. */
#define HI_ERR_FD_NOT_CONFIG HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* The operation is not supported currently. */
#define HI_ERR_FD_NOT_SURPPORT HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* The operation, changing static attributes for example, is not permitted. */
#define HI_ERR_FD_NOT_PERM HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* A failure caused by the malloc memory occurs. */
#define HI_ERR_FD_NOMEM HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* A failure caused by the malloc buffer occurs. */
#define HI_ERR_FD_NOBUF HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* The buffer is empty. */
#define HI_ERR_FD_BUF_EMPTY HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* No buffer is provided for storing new data. */
#define HI_ERR_FD_BUF_FULL HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* The system is not ready because it may be not initialized or loaded.
* The error code is returned when a device file fails to be opened. */
#define HI_ERR_FD_NOTREADY HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* The source address or target address is incorrect during the operations such as calling
copy_from_user or copy_to_user. */
#define HI_ERR_FD_BADADDR HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_BADADDR)
/* The resource is busy during the operations such as destroying a VENC channel
without deregistering it. */
#define HI_ERR_FD_BUSY HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/* FD process timeout: 0xA02F8040 */
#define HI_ERR_FD_SYS_TIMEOUT HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, ERR_FD_SYS_TIMEOUT)
/* FD configuration error: 0xA02F8041 */
#define HI_ERR_FD_CFG HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, ERR_FD_CFG)
/* FD candidate face number over: 0xA02F8042 */
#define HI_ERR_FD_FACE_NUM_OVER HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, ERR_FD_FACE_NUM_OVER)
/* FD open file error: 0xA02F8043 */
#define HI_ERR_FD_OPEN_FILE HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, ERR_FD_OPEN_FILE)
/* FD read file error: 0xA02F8044 */
#define HI_ERR_FD_READ_FILE HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, ERR_FD_READ_FILE)
/* FD read file error: 0xA02F8045 */
#define HI_ERR_FD_WRITE_FILE HI_DEF_ERR(HI_ID_FD, EN_ERR_LEVEL_ERROR, ERR_FD_WRITE_FILE)
/************************************************ODT error code ***********************************/
/* ODT Invalid channel ID: 0xA0308002 */
#define HI_ERR_ODT_INVALID_CHNID HI_DEF_ERR(HI_ID_ODT, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* ODT exist: 0xA0308004 */
#define HI_ERR_ODT_EXIST HI_DEF_ERR(HI_ID_ODT, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* ODT unexist: 0xA0308005 */
#define HI_ERR_ODT_UNEXIST HI_DEF_ERR(HI_ID_ODT, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* ODT The operation, changing static attributes for example, is not permitted: 0xA0308009 */
#define HI_ERR_ODT_NOT_PERM HI_DEF_ERR(HI_ID_ODT, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* ODT the system is not ready because it may be not initialized: 0xA0308010 */
#define HI_ERR_ODT_NOTREADY HI_DEF_ERR(HI_ID_ODT, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* ODT busy: 0xA0308012 */
#define HI_ERR_ODT_BUSY HI_DEF_ERR(HI_ID_ODT, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif
#endif /* __HI_COMM_IVE_H__ */

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@ -0,0 +1,454 @@
/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2016-2017. All rights reserved.
* Description:
* Author: Hisilicon multimedia software group
* Create: 2016/11/15
*/
#ifndef __HI_COMM_RC_H__
#define __HI_COMM_RC_H__
#include "hi_defines.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
typedef HI_U32 HI_FR32;
/* rc mode */
typedef enum hiVENC_RC_MODE_E {
VENC_RC_MODE_H264CBR = 1,
VENC_RC_MODE_H264VBR,
VENC_RC_MODE_H264AVBR, /* Not support for Hi3556AV100/Hi3556V200/Hi3559V200 */
VENC_RC_MODE_H264QVBR,
VENC_RC_MODE_H264CVBR,
VENC_RC_MODE_H264FIXQP,
VENC_RC_MODE_H264QPMAP, /* Not support for Hi3556AV100/Hi3556V200/Hi3559V200 */
VENC_RC_MODE_MJPEGCBR,
VENC_RC_MODE_MJPEGVBR,
VENC_RC_MODE_MJPEGFIXQP,
VENC_RC_MODE_H265CBR,
VENC_RC_MODE_H265VBR,
VENC_RC_MODE_H265AVBR, /* Not support for Hi3556AV100/Hi3556V200/Hi3559V200 */
VENC_RC_MODE_H265QVBR,
VENC_RC_MODE_H265CVBR,
VENC_RC_MODE_H265FIXQP,
VENC_RC_MODE_H265QPMAP, /* Not support for Hi3556AV100/Hi3556V200/Hi3559V200 */
VENC_RC_MODE_BUTT,
} VENC_RC_MODE_E;
/* qpmap mode */
typedef enum hiVENC_RC_QPMAP_MODE_E {
VENC_RC_QPMAP_MODE_MEANQP = 0,
VENC_RC_QPMAP_MODE_MINQP,
VENC_RC_QPMAP_MODE_MAXQP,
VENC_RC_QPMAP_MODE_BUTT,
} VENC_RC_QPMAP_MODE_E;
/* the attribute of h264e fixqp */
typedef struct hiVENC_H264_FIXQP_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of ISLICE. */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32IQp; /* RW; Range:[0, 51]; qp of the i frame */
HI_U32 u32PQp; /* RW; Range:[0, 51]; qp of the p frame */
HI_U32 u32BQp; /* RW; Range:[0, 51]; qp of the b frame */
} VENC_H264_FIXQP_S;
/* the attribute of h264e cbr */
typedef struct hiVENC_H264_CBR_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of I Frame. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32BitRate; /* RW; Range:[2, 614400]; average bitrate */
} VENC_H264_CBR_S;
/* the attribute of h264e vbr */
typedef struct hiVENC_H264_VBR_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of ISLICE. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32MaxBitRate; /* RW; Range:[2, 614400];the max bitrate */
} VENC_H264_VBR_S;
/* the attribute of h264e cvbr */
typedef struct hiVENC_H264_CVBR_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of ISLICE. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32MaxBitRate; /* RW; Range:[2, 614400];the max bitrate */
HI_U32 u32ShortTermStatTime; /* RW; Range:[1, 120]; the long-term rate statistic time, the unit is second (s)*/
HI_U32 u32LongTermStatTime; /* RW; Range:[1, 1440]; the long-term rate statistic time, the unit is u32LongTermStatTimeUnit*/
HI_U32 u32LongTermMaxBitrate ; /* RW; Range:[2, 614400];the long-term target max bitrate, can not be larger than u32MaxBitRate,the unit is kbps */
HI_U32 u32LongTermMinBitrate ; /* RW; Range:[0, 614400];the long-term target min bitrate, can not be larger than u32LongTermMaxBitrate,the unit is kbps */
} VENC_H264_CVBR_S;
/* the attribute of h264e avbr */
typedef struct hiVENC_H264_AVBR_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of ISLICE. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32MaxBitRate; /* RW; Range:[2, 614400];the max bitrate */
} VENC_H264_AVBR_S;
/* the attribute of h264e qpmap */
typedef struct hiVENC_H264_QPMAP_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of ISLICE. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
} VENC_H264_QPMAP_S;
typedef struct hiVENC_H264_QVBR_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536];the interval of ISLICE. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32TargetBitRate; /* RW; Range:[2, 614400]; the target bitrate */
}VENC_H264_QVBR_S;
/* the attribute of h265e qpmap */
typedef struct hiVENC_H265_QPMAP_S {
HI_U32 u32Gop; /* RW; Range:[1, 65536]; the interval of ISLICE. */
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
VENC_RC_QPMAP_MODE_E enQpMapMode; /* RW; the QpMap Mode.*/
} VENC_H265_QPMAP_S;
typedef struct hiVENC_H264_CBR_S VENC_H265_CBR_S;
typedef struct hiVENC_H264_VBR_S VENC_H265_VBR_S;
typedef struct hiVENC_H264_AVBR_S VENC_H265_AVBR_S;
typedef struct hiVENC_H264_FIXQP_S VENC_H265_FIXQP_S;
typedef struct hiVENC_H264_QVBR_S VENC_H265_QVBR_S;
typedef struct hiVENC_H264_CVBR_S VENC_H265_CVBR_S;
/* the attribute of mjpege fixqp */
typedef struct hiVENC_MJPEG_FIXQP_S {
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32Qfactor; /* RW; Range:[1,99];image quality. */
} VENC_MJPEG_FIXQP_S;
/* the attribute of mjpege cbr */
typedef struct hiVENC_MJPEG_CBR_S {
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate ; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32BitRate; /* RW; Range:[2, 614400]; average bitrate */
} VENC_MJPEG_CBR_S;
/* the attribute of mjpege vbr */
typedef struct hiVENC_MJPEG_VBR_S {
HI_U32 u32StatTime; /* RW; Range:[1, 60]; the rate statistic time, the unit is senconds(s) */
HI_U32 u32SrcFrameRate; /* RW; Range:[1, 240]; the input frame rate of the venc chnnel */
HI_FR32 fr32DstFrameRate; /* RW; Range:[0.015625, 240]; the target frame rate of the venc chnnel,can not be larger than u32SrcFrameRate */
HI_U32 u32MaxBitRate; /* RW; Range:[2, 614400];the max bitrate */
}VENC_MJPEG_VBR_S;
/* the attribute of rc */
typedef struct hiVENC_RC_ATTR_S {
VENC_RC_MODE_E enRcMode; /* RW; the type of rc*/
union {
VENC_H264_CBR_S stH264Cbr;
VENC_H264_VBR_S stH264Vbr;
VENC_H264_AVBR_S stH264AVbr;
VENC_H264_QVBR_S stH264QVbr;
VENC_H264_CVBR_S stH264CVbr;
VENC_H264_FIXQP_S stH264FixQp;
VENC_H264_QPMAP_S stH264QpMap;
VENC_MJPEG_CBR_S stMjpegCbr;
VENC_MJPEG_VBR_S stMjpegVbr;
VENC_MJPEG_FIXQP_S stMjpegFixQp;
VENC_H265_CBR_S stH265Cbr;
VENC_H265_VBR_S stH265Vbr;
VENC_H265_AVBR_S stH265AVbr;
VENC_H265_QVBR_S stH265QVbr;
VENC_H265_CVBR_S stH265CVbr;
VENC_H265_FIXQP_S stH265FixQp;
VENC_H265_QPMAP_S stH265QpMap;
};
} VENC_RC_ATTR_S;
/* the super frame mode */
typedef enum hiRC_SUPERFRM_MODE_E {
SUPERFRM_NONE=0, /* sdk don't care super frame */
SUPERFRM_DISCARD, /* the super frame is discarded */
SUPERFRM_REENCODE, /* the super frame is re-encode */
SUPERFRM_BUTT
} VENC_SUPERFRM_MODE_E;
/* The param of H264e cbr */
typedef struct hiVENC_PARAM_H264_CBR_S {
HI_U32 u32MinIprop; /* RW; Range:[1, 100]; the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100]; the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_U32 u32MaxQp; /* RW; Range:[0, 51];the max QP value */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min QP value,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; max qp for i frame */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; min qp for i frame,can not be larger than u32MaxIQp */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; Range:max number of re-encode times.*/
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
} VENC_PARAM_H264_CBR_S;
/* The param of H264e vbr */
typedef struct hiVENC_PARAM_H264_VBR_S {
HI_S32 s32ChangePos; /* RW; Range:[50, 100]; Indicates the ratio of the current bit rate to the maximum
bit rate when the QP value starts to be adjusted */
HI_U32 u32MinIprop; /* RW; Range:[1, 100] ; the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100] ; the max ratio of i frame and p frame,can not be smaller than u32MinIprop*/
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; max number of re-encode times */
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp ,can not be larger than u32MaxIQp*/
} VENC_PARAM_H264_VBR_S;
/* The param of H264e avbr */
typedef struct hiVENC_PARAM_H264_AVBR_S {
HI_S32 s32ChangePos; /* RW; Range:[50, 100]; Indicates the ratio of the current bit rate to the maximum
bit rate when the QP value starts to be adjusted */
HI_U32 u32MinIprop; /* RW; Range:[1, 100] ; the min ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100] ; the max ratio of i frame and p frame */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; max number of re-encode times */
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
HI_S32 s32MinStillPercent; /* RW; Range:[5, 100]; the min percent of target bitrate for still scene */
HI_U32 u32MaxStillQP; /* RW; Range:[0, 51]; the max QP value of I frame for still scene,
can not be smaller than u32MinIQp and can not be larger than su32MaxIQp*/
HI_U32 u32MinStillPSNR; /* RW; reserved,Invalid member currently */
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp,can not be larger than u32MaxIQp */
HI_U32 u32MinQpDelta; /* RW; Range:[0, 4];Difference between FrameLevelMinQp and MinQp, FrameLevelMinQp = MinQp(or MinIQp) + MinQpDelta */
HI_U32 u32MotionSensitivity; /* RW; Range:[0, 100]; Motion Sensitivity */
} VENC_PARAM_H264_AVBR_S;
typedef struct hiVENC_PARAM_H264_QVBR_S {
HI_U32 u32MinIprop; /* RW; Range:[1, 100]; the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100] ;the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3];max number of re-encode times [0, 3]*/
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp,can not be larger than u32MaxQp*/
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp,can not be larger than u32MaxIQp */
HI_S32 s32BitPercentUL; /* RW; Range:[30, 180]; Indicate the ratio of bitrate upper limit*/
HI_S32 s32BitPercentLL; /* RW; Range:[30, 180]; Indicate the ratio of bitrate lower limit,can not be larger than s32BitPercentUL*/
HI_S32 s32PsnrFluctuateUL; /* RW; Range:[18, 40]; Reduce the target bitrate when the value of psnr approch the upper limit*/
HI_S32 s32PsnrFluctuateLL; /* RW; Range:[18, 40]; Increase the target bitrate when the value of psnr approch the lower limit,
can not be larger than s32PsnrFluctuateUL*/
} VENC_PARAM_H264_QVBR_S;
/* The param of H264e cvbr */
typedef struct hiVENC_PARAM_H264_CVBR_S {
HI_U32 u32MinIprop; /* RW; Range:[1, 100] ; the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100] ; the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; max number of re-encode times */
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp,can not be larger than u32MaxIQp */
HI_U32 u32MinQpDelta; /* RW; Range:[0, 4];Difference between FrameLevelMinQp and MinQp, FrameLevelMinQp = MinQp(or MinIQp) + MinQpDelta */
HI_U32 u32MaxQpDelta; /* RW; Range:[0, 4];Difference between FrameLevelMaxQp and MaxQp, FrameLevelMaxQp = MaxQp(or MaxIQp) - MaxQpDelta */
HI_U32 u32ExtraBitPercent; /* RW; Range:[0, 1000];the extra bits that can be allocated when the actual bitrate goes above the target bitrate*/
HI_U32 u32LongTermStatTimeUnit; /* RW; Range:[1, 1800]; the time unit of LongTermStatTime,, the unit is senconds(s)*/
} VENC_PARAM_H264_CVBR_S;
/* The param of mjpege cbr */
typedef struct hiVENC_PARAM_MJPEG_CBR_S {
HI_U32 u32MaxQfactor; /* RW; Range:[1, 99]; the max Qfactor value*/
HI_U32 u32MinQfactor; /* RW; Range:[1, 99]; the min Qfactor value ,can not be larger than u32MaxQfactor */
} VENC_PARAM_MJPEG_CBR_S;
/* The param of mjpege vbr */
typedef struct hiVENC_PARAM_MJPEG_VBR_S {
HI_S32 s32ChangePos; /* RW; Range:[50, 100]; Indicates the ratio of the current bit rate to the maximum
bit rate when the Qfactor value starts to be adjusted */
HI_U32 u32MaxQfactor; /* RW; Range:[1, 99]; max image quailty allowed */
HI_U32 u32MinQfactor; /* RW; Range:[1, 99]; min image quality allowed ,can not be larger than u32MaxQfactor*/
} VENC_PARAM_MJPEG_VBR_S;
/* The param of h265e cbr */
typedef struct hiVENC_PARAM_H265_CBR_S {
HI_U32 u32MinIprop; /* RW; Range:[1, 100]; the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100];the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_U32 u32MaxQp; /* RW; Range:[0, 51];the max QP value */
HI_U32 u32MinQp; /* RW; Range:[0, 51];the min QP value ,can not be larger than u32MaxQp*/
HI_U32 u32MaxIQp; /* RW; Range:[0, 51];max qp for i frame */
HI_U32 u32MinIQp; /* RW; Range:[0, 51];min qp for i frame,can not be larger than u32MaxIQp */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; Range:max number of re-encode times.*/
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
VENC_RC_QPMAP_MODE_E enQpMapMode; /* RW; Qpmap Mode*/
} VENC_PARAM_H265_CBR_S;
/* The param of h265e vbr */
typedef struct hiVENC_PARAM_H265_VBR_S {
HI_S32 s32ChangePos; /* RW; Range:[50, 100];Indicates the ratio of the current bit rate to the maximum bit rate when the QP value starts to be adjusted */
HI_U32 u32MinIprop; /* RW; [1, 100]the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; [1, 100]the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; Range:max number of re-encode times.*/
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp ,can not be larger than u32MaxQp*/
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp,can not be larger than u32MaxIQp */
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
VENC_RC_QPMAP_MODE_E enQpMapMode; /* RW; Qpmap Mode*/
} VENC_PARAM_H265_VBR_S;
/* The param of h265e vbr */
typedef struct hiVENC_PARAM_H265_AVBR_S {
HI_S32 s32ChangePos; /* RW; Range:[50, 100];Indicates the ratio of the current bit rate to the maximum
bit rate when the QP value starts to be adjusted */
HI_U32 u32MinIprop; /* RW; [1, 100]the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; [1, 100]the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; Range:max number of re-encode times.*/
HI_S32 s32MinStillPercent; /* RW; Range:[5, 100]; the min percent of target bitrate for still scene */
HI_U32 u32MaxStillQP; /* RW; Range:[0, 51]; the max QP value of I frame for still scene,
can not be smaller than u32MinIQp and can not be larger than su32MaxIQp*/
HI_U32 u32MinStillPSNR; /* RW; reserved */
HI_U32 u32MaxQp; /* RW; Range:[0, 51];the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51];the min P B qp,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51];the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51];the min I qp,can not be larger than u32MaxIQp */
HI_U32 u32MinQpDelta; /* RW; Range:[0, 4];Difference between FrameLevelMinQp and MinQp, FrameLevelMinQp = MinQp(or MinIQp) + MinQpDelta */
HI_U32 u32MotionSensitivity; /* RW; Range:[0, 100]; Motion Sensitivity */
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
VENC_RC_QPMAP_MODE_E enQpMapMode; /* RW; Qpmap Mode*/
} VENC_PARAM_H265_AVBR_S;
typedef struct hiVENC_PARAM_H265_QVBR_S {
HI_U32 u32MinIprop; /* RW; [1, 100];the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; [1, 100];the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_S32 s32MaxReEncodeTimes; /* RW; [0, 3]; max number of re-encode times [0, 3]*/
HI_BOOL bQpMapEn; /* RW; Range:[0, 1]; enable qpmap.*/
VENC_RC_QPMAP_MODE_E enQpMapMode; /* RW; Qpmap Mode*/
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp,can not be larger than u32MaxIQp */
HI_S32 s32BitPercentUL; /* RW; Range:[30, 180]; Indicate the ratio of bitrate upper limit*/
HI_S32 s32BitPercentLL; /* RW; Range:[30, 180]; Indicate the ratio of bitrate lower limit,can not be larger than s32BitPercentUL*/
HI_S32 s32PsnrFluctuateUL; /* RW; Range:[18, 40]; Reduce the target bitrate when the value of psnr approch the upper limit*/
HI_S32 s32PsnrFluctuateLL; /* RW; Range:[18, 40]; Increase the target bitrate when the value of psnr approch the lower limit,
can not be larger than s32PsnrFluctuateUL*/
} VENC_PARAM_H265_QVBR_S;
typedef struct hiVENC_PARAM_H265_CVBR_S {
HI_U32 u32MinIprop; /* RW; Range:[1, 100] ; the min ratio of i frame and p frame */
HI_U32 u32MaxIprop; /* RW; Range:[1, 100] ; the max ratio of i frame and p frame,can not be smaller than u32MinIprop */
HI_S32 s32MaxReEncodeTimes; /* RW; Range:[0, 3]; max number of re-encode times */
HI_BOOL bQpMapEn;
VENC_RC_QPMAP_MODE_E enQpMapMode; /* RW; Qpmap Mode*/
HI_U32 u32MaxQp; /* RW; Range:[0, 51]; the max P B qp */
HI_U32 u32MinQp; /* RW; Range:[0, 51]; the min P B qp,can not be larger than u32MaxQp */
HI_U32 u32MaxIQp; /* RW; Range:[0, 51]; the max I qp */
HI_U32 u32MinIQp; /* RW; Range:[0, 51]; the min I qp,can not be larger than u32MaxIQp */
HI_U32 u32MinQpDelta; /* RW; Range:[0, 4];Difference between FrameLevelMinQp and MinQp, FrameLevelMinQp = MinQp(or MinIQp) + MinQpDelta */
HI_U32 u32MaxQpDelta; /* RW; Range:[0, 4];Difference between FrameLevelMaxQp and MaxQp, FrameLevelMaxQp = MaxQp(or MaxIQp) - MaxQpDelta */
HI_U32 u32ExtraBitPercent; /* RW; Range:[0, 1000];the extra ratio of bitrate that can be allocated when the actual bitrate goes above the long-term target bitrate*/
HI_U32 u32LongTermStatTimeUnit; /* RW; Range:[1, 1800]; the time unit of LongTermStatTime, the unit is senconds(s)*/
} VENC_PARAM_H265_CVBR_S;
typedef struct hiVENC_SCENE_CHANGE_DETECT_S {
HI_BOOL bDetectSceneChange; /* RW; Range:[0, 1]; enable detect scene change.*/
HI_BOOL bAdaptiveInsertIDRFrame; /* RW; Range:[0, 1]; enable a daptive insertIDR frame.*/
} VENC_SCENE_CHANGE_DETECT_S;
/* The param of rc */
typedef struct hiVENC_RC_PARAM_S {
HI_U32 u32ThrdI[RC_TEXTURE_THR_SIZE]; /* RW; Range:[0, 255]; Mad threshold for controlling the macroblock-level bit rate of I frames */
HI_U32 u32ThrdP[RC_TEXTURE_THR_SIZE]; /* RW; Range:[0, 255]; Mad threshold for controlling the macroblock-level bit rate of P frames */
HI_U32 u32ThrdB[RC_TEXTURE_THR_SIZE]; /* RW; Range:[0, 255]; Mad threshold for controlling the macroblock-level bit rate of B frames */
HI_U32 u32DirectionThrd; /* RW; Range:[0, 16]; The direction for controlling the macroblock-level bit rate*/
HI_U32 u32RowQpDelta; /* RW; Range:[0, 10];the start QP value of each macroblock row relative to the start QP value */
HI_S32 s32FirstFrameStartQp; /* RW; Range:[-1, 51];Start QP value of the first frame*/
VENC_SCENE_CHANGE_DETECT_S stSceneChangeDetect;/* RW;*/
union {
VENC_PARAM_H264_CBR_S stParamH264Cbr;
VENC_PARAM_H264_VBR_S stParamH264Vbr;
VENC_PARAM_H264_AVBR_S stParamH264AVbr;
VENC_PARAM_H264_QVBR_S stParamH264QVbr;
VENC_PARAM_H264_CVBR_S stParamH264CVbr;
VENC_PARAM_H265_CBR_S stParamH265Cbr;
VENC_PARAM_H265_VBR_S stParamH265Vbr;
VENC_PARAM_H265_AVBR_S stParamH265AVbr;
VENC_PARAM_H265_QVBR_S stParamH265QVbr;
VENC_PARAM_H265_CVBR_S stParamH265CVbr;
VENC_PARAM_MJPEG_CBR_S stParamMjpegCbr;
VENC_PARAM_MJPEG_VBR_S stParamMjpegVbr;
};
} VENC_RC_PARAM_S;
/* the frame lost mode */
typedef enum hiVENC_FRAMELOST_MODE_E {
FRMLOST_NORMAL=0, /*normal mode*/
FRMLOST_PSKIP, /*pskip*/
FRMLOST_BUTT,
} VENC_FRAMELOST_MODE_E;
/* The param of the frame lost mode */
typedef struct hiVENC_FRAMELOST_S {
HI_BOOL bFrmLostOpen; /* RW; Range:[0,1];Indicates whether to discard frames to ensure stable bit rate when the instant bit rate is exceeded */
HI_U32 u32FrmLostBpsThr; /* RW; the instant bit rate threshold */
VENC_FRAMELOST_MODE_E enFrmLostMode; /* RW; frame lost strategy*/
HI_U32 u32EncFrmGaps; /* RW; Range:[0,65535]; the gap of frame lost*/
} VENC_FRAMELOST_S;
/* the rc priority */
typedef enum hiVENC_RC_PRIORITY_E {
VENC_RC_PRIORITY_BITRATE_FIRST = 1, /* bitrate first */
VENC_RC_PRIORITY_FRAMEBITS_FIRST, /* framebits first*/
VENC_RC_PRIORITY_BUTT,
} VENC_RC_PRIORITY_E;
/* the config of the superframe */
typedef struct hiVENC_SUPERFRAME_CFG_S {
VENC_SUPERFRM_MODE_E enSuperFrmMode; /* RW; Indicates the mode of processing the super frame*/
HI_U32 u32SuperIFrmBitsThr; /* RW; Range:[0, 4294967295];Indicate the threshold of the super I frame for enabling the super frame processing mode */
HI_U32 u32SuperPFrmBitsThr; /* RW; Range:[0, 4294967295];Indicate the threshold of the super P frame for enabling the super frame processing mode */
HI_U32 u32SuperBFrmBitsThr; /* RW; Range:[0, 4294967295];Indicate the threshold of the super B frame for enabling the super frame processing mode */
VENC_RC_PRIORITY_E enRcPriority; /* RW; Rc Priority*/
} VENC_SUPERFRAME_CFG_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_RC_H__ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2010-2019. All rights reserved.
* Description: hi_comm_region.h
* Author:
* Create: 2010-12-13
*/
#ifndef __HI_COMM_REGION_H__
#define __HI_COMM_REGION_H__
#include "hi_common.h"
#include "hi_comm_video.h"
#include "hi_errno.h"
#include "hi_defines.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif
#define RGN_COLOR_LUT_NUM 2
#define RGN_MAX_BMP_UPDATE_NUM 16
#define RGN_BATCHHANDLE_MAX 24
typedef HI_U32 RGN_HANDLE;
typedef HI_U32 RGN_HANDLEGROUP;
/* type of video regions */
typedef enum hiRGN_TYPE_E {
OVERLAY_RGN = 0, /* video overlay region */
COVER_RGN,
COVEREX_RGN,
OVERLAYEX_RGN,
MOSAIC_RGN,
RGN_BUTT
} RGN_TYPE_E;
typedef enum hiINVERT_COLOR_MODE_E {
LESSTHAN_LUM_THRESH = 0, /* the lum of the video is less than the lum threshold which is set by u32LumThresh */
MORETHAN_LUM_THRESH, /* the lum of the video is more than the lum threshold which is set by u32LumThresh */
INVERT_COLOR_BUTT
} INVERT_COLOR_MODE_E;
typedef struct hiOVERLAY_QP_INFO_S {
HI_BOOL bAbsQp;
HI_S32 s32Qp;
HI_BOOL bQpDisable;
} OVERLAY_QP_INFO_S;
typedef struct hiOVERLAY_INVERT_COLOR_S {
SIZE_S stInvColArea; // It must be multipe of 16 but not more than 64.
HI_U32 u32LumThresh; // The threshold to decide whether invert the OSD's color or not.
INVERT_COLOR_MODE_E enChgMod;
HI_BOOL bInvColEn; // The switch of inverting color.
} OVERLAY_INVERT_COLOR_S;
typedef enum hiATTACH_DEST_E {
ATTACH_JPEG_MAIN = 0,
ATTACH_JPEG_MPF0,
ATTACH_JPEG_MPF1,
ATTACH_JPEG_BUTT
} ATTACH_DEST_E;
typedef struct hiOVERLAY_ATTR_S {
/* bitmap pixel format,now only support ARGB1555 or ARGB4444 */
PIXEL_FORMAT_E enPixelFmt;
/* background color, pixel format depends on "enPixelFmt" */
HI_U32 u32BgColor;
/* region size,W:[2,RGN_OVERLAY_MAX_WIDTH],align:2,H:[2,RGN_OVERLAY_MAX_HEIGHT],align:2 */
SIZE_S stSize;
HI_U32 u32CanvasNum;
} OVERLAY_ATTR_S;
typedef struct hiOVERLAY_CHN_ATTR_S {
/* X:[0,OVERLAY_MAX_X_VENC],align:2,Y:[0,OVERLAY_MAX_Y_VENC],align:2 */
POINT_S stPoint;
/* background an foreground transparence when pixel format is ARGB1555
* the pixel format is ARGB1555,when the alpha bit is 1 this alpha is value!
* range:[0,128]
*/
HI_U32 u32FgAlpha;
/* background an foreground transparence when pixel format is ARGB1555
* the pixel format is ARGB1555,when the alpha bit is 0 this alpha is value!
* range:[0,128]
*/
HI_U32 u32BgAlpha;
HI_U32 u32Layer; /* OVERLAY region layer range:[0,7] */
OVERLAY_QP_INFO_S stQpInfo;
OVERLAY_INVERT_COLOR_S stInvertColor;
ATTACH_DEST_E enAttachDest;
HI_U16 u16ColorLUT[RGN_COLOR_LUT_NUM];
} OVERLAY_CHN_ATTR_S;
typedef enum hiRGN_AREA_TYPE_E {
AREA_RECT = 0,
AREA_QUAD_RANGLE,
AREA_BUTT
} RGN_AREA_TYPE_E;
typedef enum hiRGN_COORDINATE_E {
RGN_ABS_COOR = 0, /* Absolute coordinate */
RGN_RATIO_COOR /* Ratio coordinate */
} RGN_COORDINATE_E;
typedef struct hiRGN_QUADRANGLE_S {
HI_BOOL bSolid; /* whether solid or dashed quadrangle */
HI_U32 u32Thick; /* Line Width of quadrangle, valid when dashed quadrangle */
POINT_S stPoint[4]; /* points of quadrilateral */
} RGN_QUADRANGLE_S;
typedef struct hiCOVER_CHN_ATTR_S {
RGN_AREA_TYPE_E enCoverType; /* rect or arbitary quadrilateral COVER */
union {
RECT_S stRect; /* config of rect */
RGN_QUADRANGLE_S stQuadRangle; /* config of arbitary quadrilateral COVER */
};
HI_U32 u32Color;
HI_U32 u32Layer; /* COVER region layer */
RGN_COORDINATE_E enCoordinate; /* ratio coordiante or abs coordinate */
} COVER_CHN_ATTR_S;
typedef struct hiCOVEREX_CHN_ATTR_S {
RGN_AREA_TYPE_E enCoverType; /* rect or arbitary quadrilateral COVER */
union {
RECT_S stRect; /* config of rect */
RGN_QUADRANGLE_S stQuadRangle; /* config of arbitary quadrilateral COVER */
};
HI_U32 u32Color;
HI_U32 u32Layer; /* COVEREX region layer range */
} COVEREX_CHN_ATTR_S;
typedef enum hiMOSAIC_BLK_SIZE_E {
MOSAIC_BLK_SIZE_8 = 0, /* block size 8*8 of MOSAIC */
MOSAIC_BLK_SIZE_16, /* block size 16*16 of MOSAIC */
MOSAIC_BLK_SIZE_32, /* block size 32*32 of MOSAIC */
MOSAIC_BLK_SIZE_64, /* block size 64*64 of MOSAIC */
MOSAIC_BLK_SIZE_BUTT
} MOSAIC_BLK_SIZE_E;
typedef struct hiMOSAIC_CHN_ATTR_S {
RECT_S stRect; /* location of MOSAIC */
MOSAIC_BLK_SIZE_E enBlkSize; /* block size of MOSAIC */
HI_U32 u32Layer; /* MOSAIC region layer range:[0,3] */
} MOSAIC_CHN_ATTR_S;
typedef struct hiOVERLAYEX_COMM_ATTR_S {
PIXEL_FORMAT_E enPixelFmt;
/* background color, pixel format depends on "enPixelFmt" */
HI_U32 u32BgColor;
/* region size,W:[2,RGN_OVERLAY_MAX_WIDTH],align:2,H:[2,RGN_OVERLAY_MAX_HEIGHT],align:2 */
SIZE_S stSize;
HI_U32 u32CanvasNum;
} OVERLAYEX_ATTR_S;
typedef struct hiOVERLAYEX_CHN_ATTR_S {
/* X:[0,RGN_OVERLAY_MAX_X],align:2,Y:[0,RGN_OVERLAY_MAX_Y],align:2 */
POINT_S stPoint;
/* background an foreground transparence when pixel format is ARGB1555
* the pixel format is ARGB1555,when the alpha bit is 1 this alpha is value!
* range:[0,255]
*/
HI_U32 u32FgAlpha;
/* background an foreground transparence when pixel format is ARGB1555
* the pixel format is ARGB1555,when the alpha bit is 0 this alpha is value!
* range:[0,255]
*/
HI_U32 u32BgAlpha;
HI_U32 u32Layer; /* OVERLAYEX region layer range:[0,15] */
HI_U16 u16ColorLUT[RGN_COLOR_LUT_NUM];
} OVERLAYEX_CHN_ATTR_S;
typedef union hiRGN_ATTR_U {
OVERLAY_ATTR_S stOverlay; /* attribute of overlay region */
OVERLAYEX_ATTR_S stOverlayEx; /* attribute of overlayex region */
} RGN_ATTR_U;
typedef union hiRGN_CHN_ATTR_U {
OVERLAY_CHN_ATTR_S stOverlayChn; /* attribute of overlay region */
COVER_CHN_ATTR_S stCoverChn; /* attribute of cover region */
COVEREX_CHN_ATTR_S stCoverExChn; /* attribute of coverex region */
OVERLAYEX_CHN_ATTR_S stOverlayExChn; /* attribute of overlayex region */
MOSAIC_CHN_ATTR_S stMosaicChn; /* attribute of mosic region */
} RGN_CHN_ATTR_U;
/* attribute of a region */
typedef struct hiRGN_ATTR_S {
RGN_TYPE_E enType; /* region type */
RGN_ATTR_U unAttr; /* region attribute */
} RGN_ATTR_S;
/* attribute of a region */
typedef struct hiRGN_CHN_ATTR_S {
HI_BOOL bShow;
RGN_TYPE_E enType; /* region type */
RGN_CHN_ATTR_U unChnAttr; /* region attribute */
} RGN_CHN_ATTR_S;
typedef struct hiRGN_BMP_UPDATE_S {
POINT_S stPoint;
BITMAP_S stBmp;
HI_U32 u32Stride;
} RGN_BMP_UPDATE_S;
typedef struct hiRGN_BMP_UPDATE_CFG_S {
HI_U32 u32BmpCnt;
RGN_BMP_UPDATE_S astBmpUpdate[RGN_MAX_BMP_UPDATE_NUM];
} RGN_BMP_UPDATE_CFG_S;
typedef struct hiRGN_CANVAS_INFO_S {
HI_U64 u64PhyAddr;
HI_U64 u64VirtAddr;
SIZE_S stSize;
HI_U32 u32Stride;
PIXEL_FORMAT_E enPixelFmt;
} RGN_CANVAS_INFO_S;
/* PingPong buffer change when set attr, it needs to remap memory in mpi interface */
#define HI_NOTICE_RGN_BUFFER_CHANGE HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_NOTICE, HI_SUCCESS)
/* invlalid device ID */
#define HI_ERR_RGN_INVALID_DEVID HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
/* invlalid channel ID */
#define HI_ERR_RGN_INVALID_CHNID HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_RGN_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* channel exists */
#define HI_ERR_RGN_EXIST HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* UN exist */
#define HI_ERR_RGN_UNEXIST HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* using a NULL point */
#define HI_ERR_RGN_NULL_PTR HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_RGN_NOT_CONFIG HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_RGN_NOT_SUPPORT HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change stati attribute */
#define HI_ERR_RGN_NOT_PERM HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* failure caused by malloc memory */
#define HI_ERR_RGN_NOMEM HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_RGN_NOBUF HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_RGN_BUF_EMPTY HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_RGN_BUF_FULL HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* bad address, eg. used for copy_from_user & copy_to_user */
#define HI_ERR_RGN_BADADDR HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BADADDR)
/* resource is busy, eg. destroy a venc chn without unregistering it */
#define HI_ERR_RGN_BUSY HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/* System is not ready,maybe not initialed or loaded.
* Returning the error code when opening a device file failed.
*/
#define HI_ERR_RGN_NOTREADY HI_DEF_ERR(HI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_REGION_H__ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2012-2018. All rights reserved.
* Description: hi_comm_snap.h
* Author:
* Create: 2017-06-19
*/
#ifndef __HI_COMM_SNAP_H__
#define __HI_COMM_SNAP_H__
#include "hi_common.h"
#include "hi_comm_video.h"
#include "hi_comm_isp.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
typedef enum hiSNAP_TYPE_E {
SNAP_TYPE_NORMAL, /* ZSL and none-ZSL type */
SNAP_TYPE_PRO, /* Professional type support HDR, AEB, LongExposure */
SNAP_TYPE_BUTT
} SNAP_TYPE_E;
typedef struct hiSNAP_PRO_MANUAL_PARAM_S {
HI_U32 au32ManExpTime[PRO_MAX_FRAME_NUM]; /* RW; Range: [0x0, 0xFFFFFFFF];sensor exposure time (unit: us),
it's related to the specific sensor */
HI_U32 au32ManSysgain[PRO_MAX_FRAME_NUM]; /* RW; Range: [0x400, 0xFFFFFFFF];system gain (unit: times,
10bit precision), it's related to the specific
sensor and ISP Dgain range */
} SNAP_PRO_MANUAL_PARAM_S;
typedef struct hiSNAP_PRO_AUTO_PARAM_S {
HI_U16 au16ProExpStep[PRO_MAX_FRAME_NUM]; /* RW; Range:[0x0, 0xFFFF];Professional exposure step
(unit: times, 8bit precision) */
} SNAP_PRO_AUTO_PARAM_S;
typedef struct hiSNAP_PRO_PARAM_S {
OPERATION_MODE_E enOperationMode;
SNAP_PRO_AUTO_PARAM_S stAutoParam;
SNAP_PRO_MANUAL_PARAM_S stManualParam;
} SNAP_PRO_PARAM_S;
typedef struct hiSNAP_NORMAL_ATTR_S {
HI_U32 u32FrameCnt; /* RW;Set capture frame counts */
HI_U32 u32RepeatSendTimes; /* [0, 2]; When FE-BE is offline, the first raw frame that is triggered should be sent
repeatedly to the BE. */
/* ZSL struct */
HI_BOOL bZSL; /* RW;statical attrs */
HI_U32 u32FrameDepth; /* buffer depth: [1,8] */
HI_U32 u32RollbackMs; /* RW;Rollback time, unit(ms), invalid when bZSL is HI_FALSE */
HI_U32 u32Interval; /* RW;For continuous capture, select frame every u32Intercal frames */
} SNAP_NORMAL_ATTR_S;
typedef struct hiSNAP_PRO_ATTR_S {
HI_U32 u32FrameCnt; /* [1, PRO_MAX_FRAME_NUM] */
HI_U32 u32RepeatSendTimes; /* [0, 2];When FE-BE is offline, the first raw frame that is triggered should be sent
repeatedly to the BE. */
SNAP_PRO_PARAM_S stProParam;
} SNAP_PRO_ATTR_S;
typedef struct hiSNAP_USER_ATTR_S {
HI_U32 u32FrameDepth;
} SNAP_USER_ATTR_S;
typedef struct hiSNAP_ATTR_S {
SNAP_TYPE_E enSnapType;
HI_BOOL bLoadCCM; /* HI_TRUE:use CCM of SnapIspInfo, HI_FALSE: Algorithm calculate */
union {
SNAP_NORMAL_ATTR_S stNormalAttr;
SNAP_PRO_ATTR_S stProAttr;
};
} SNAP_ATTR_S;
typedef struct hiISP_PRO_BNR_PARAM_S {
HI_BOOL bEnable;
HI_U32 u32ParamNum;
ISP_NR_AUTO_ATTR_S *pastNrAttr;
} ISP_PRO_BNR_PARAM_S;
typedef struct hiISP_PRO_SHARPEN_PARAM_S {
HI_BOOL bEnable;
HI_U32 u32ParamNum;
ISP_SHARPEN_AUTO_ATTR_S *pastShpAttr;
} ISP_PRO_SHARPEN_PARAM_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_sns.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2011/01/05
Description :
History :
1.Date : 2011/01/05
Author :
Modification: Created file
******************************************************************************/
#ifndef __HI_COMM_SNS_H__
#define __HI_COMM_SNS_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_comm_isp.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
typedef struct hiISP_CMOS_BLACK_LEVEL_S {
HI_BOOL bUpdate;
HI_U16 au16BlackLevel[ISP_BAYER_CHN_NUM];
} ISP_CMOS_BLACK_LEVEL_S;
typedef struct hiISP_SNS_ATTR_INFO_S {
SENSOR_ID eSensorId;
} ISP_SNS_ATTR_INFO_S;
#define ISP_SPLIT_POINT_NUM (5)
#define ISP_EXPANDER_POINT_NUM (5)
typedef struct hiISP_CMOS_DEMOSAIC_S {
HI_BOOL bEnable;
HI_U8 au8NonDirStr[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8NonDirMFDetailEhcStr[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8NonDirHFDetailEhcStr[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8DetailSmoothRange[ISP_AUTO_ISO_STRENGTH_NUM];
} ISP_CMOS_DEMOSAIC_S;
#define WDR_MAX_FRAME (4)
typedef struct hiISP_CMOS_BAYERNR_S {
HI_BOOL bEnable;
HI_BOOL bBnrMonoSensorEn;
HI_BOOL bNrLscEnable;
HI_U8 u8BnrLscMaxGain;
HI_U16 u16BnrLscCmpStrength;
HI_U8 au8LutFineStr[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8ChromaStr[ISP_BAYER_CHN_NUM][ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8WDRFrameStr[WDR_MAX_FRAME_NUM];
HI_U8 au8FusionFrameStr[WDR_MAX_FRAME_NUM];
HI_U16 au16CoarseStr[ISP_BAYER_CHN_NUM][ISP_AUTO_ISO_STRENGTH_NUM];
HI_U16 au16LutCoringWgt[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U16 au16LutCoringRatio[HI_ISP_BAYERNR_LUT_LENGTH];
} ISP_CMOS_BAYERNR_S;
typedef struct hiISP_CMOS_NOISE_CALIBRATION_S {
HI_U16 u16CalibrationLutNum;
HI_FLOAT afCalibrationCoef[BAYER_CALIBTAION_MAX_NUM][3];
} ISP_CMOS_NOISE_CALIBRATION_S;
typedef struct hiISP_CMOS_DETAIL_S {
ISP_DE_ATTR_S stAttr;
} ISP_CMOS_DETAIL_S;
typedef struct HiISP_CMOS_SHARPEN_MANUAL_S { //
HI_U8 au8LumaWgt[ISP_SHARPEN_LUMA_NUM]; /* RW; Range: Hi3559AV100 =[0,127]|Hi3519AV100=[0,127]|Hi3516CV500 = [0, 127]|Hi3516DV300 =[0, 31]; Format:0.5;Adjust the sharpen strength according to luma. Sharpen strength will be weaker when it decrease. */
HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5;Undirectional sharpen strength for texture and detail enhancement */
HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5;Directional sharpen strength for edge enhancement */
HI_U16 u16TextureFreq; /* RW; Range: [0, 4095];Format:6.6; Texture frequency adjustment. Texture and detail will be finer when it increase */
HI_U16 u16EdgeFreq; /* RW; Range: [0, 4095];Format:6.6; Edge frequency adjustment. Edge will be narrower and thiner when it increase */
HI_U8 u8OverShoot; /* RW; Range: [0, 127]; Format:7.0;u8OvershootAmt */
HI_U8 u8UnderShoot; /* RW; Range: [0, 127]; Format:7.0;u8UndershootAmt */
HI_U8 u8ShootSupStr; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, the amplitude and width of shoot will be decrease when shootSupSt increase */
HI_U8 u8ShootSupAdj; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot suppression adjusting, adjust the edge shoot suppression strength */
HI_U8 u8DetailCtrl; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for detail and edge. When it is bigger than 128, detail sharpen strength will be stronger than edge. */
HI_U8 u8DetailCtrlThr; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, it is used to distinguish detail and edge. */
HI_U8 u8EdgeFiltStr; /* RW; Range: [0, 63]; Format:6.0;The strength of edge filtering. */
HI_U8 u8EdgeFiltMaxCap; /* RW; Range: [0, 47]; Format:6.0;The max capacity of edge filtering.*/
HI_U8 u8RGain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Red Area */
HI_U8 u8GGain; /* RW; Range: [0, 255]; Format:8.0;Sharpen Gain for Green Area */
HI_U8 u8BGain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Blue Area */
HI_U8 u8SkinGain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */
HI_U16 u16MaxSharpGain; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */
HI_U8 u8WeakDetailGain; /* RW; Range: [0, 127]; Format:7.0;Only support for Hi3516EV200; sharpen Gain for weakdetail */
} ISP_CMOS_SHARPEN_MANUAL_S;
typedef struct HiISP_CMOS_SHARPEN_AUTO_S { //
HI_U8 au8LumaWgt[ISP_SHARPEN_LUMA_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:Hi3559AV100 =[0,127]|Hi3519AV100=[0,127]|Hi3516CV500 = [0, 127]|Hi3516DV300 =[0, 31];; Format:0.5;Adjust the sharpen strength according to luma. Sharpen strength will be weaker when it decrease. */
HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:7.5;Undirectional sharpen strength for texture and detail enhancement */
HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:7.5;Directional sharpen strength for edge enhancement */
HI_U16 au16TextureFreq[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Texture frequency adjustment. Texture and detail will be finer when it increase */
HI_U16 au16EdgeFreq[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Edge frequency adjustment. Edge will be narrower and thiner when it increase */
HI_U8 au8OverShoot[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 127]; Format:7.0;u8OvershootAmt */
HI_U8 au8UnderShoot[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 127]; Format:7.0;u8UndershootAmt */
HI_U8 au8ShootSupStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, the amplitude and width of shoot will be decrease when shootSupSt increase */
HI_U8 au8ShootSupAdj[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot suppression adjusting, adjust the edge shoot suppression strength */
HI_U8 au8DetailCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for detail and edge. When it is bigger than 128, detail sharpen strength will be stronger than edge. */
HI_U8 au8DetailCtrlThr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, it is used to distinguish detail and edge. */
HI_U8 au8EdgeFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 63]; Format:6.0;The strength of edge filtering. */
HI_U8 au8EdgeFiltMaxCap[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 47]; Format:6.0;The max capacity of edge filtering.*/
HI_U8 au8RGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Red Area */
HI_U8 au8GGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0;Sharpen Gain for Green Area */
HI_U8 au8BGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Blue Area */
HI_U8 au8SkinGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 31]; Format:5.0; */
HI_U16 au16MaxSharpGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 0x7FF]; Format:8.3; */
HI_U8 au8WeakDetailGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 127]; Format:7.0;Only support for Hi3516EV200; sharpen Gain for weakdetail */
} ISP_CMOS_SHARPEN_AUTO_S;
typedef struct hiISP_CMOS_SHARPEN_S {
HI_U8 u8SkinUmin;
HI_U8 u8SkinVmin;
HI_U8 u8SkinUmax;
HI_U8 u8SkinVmax;
ISP_CMOS_SHARPEN_MANUAL_S stManual;
ISP_CMOS_SHARPEN_AUTO_S stAuto;
} ISP_CMOS_SHARPEN_S;
typedef struct hiISP_CMOS_DRC_S {
HI_BOOL bEnable;
ISP_OP_TYPE_E enOpType;
HI_U16 u16ManualStrength;
HI_U16 u16AutoStrength;
HI_U8 u8SpatialFltCoef;
HI_U8 u8RangeFltCoef;
HI_U8 u8ContrastControl;
HI_S8 s8DetailAdjustFactor;
HI_U8 u8RangeAdaMax;
HI_U8 u8FltScaleFine;
HI_U8 u8FltScaleCoarse;
HI_U8 u8GradRevMax;
HI_U8 u8GradRevThr;
HI_U8 u8BrightGainLmt;
HI_U8 u8BrightGainLmtStep;
HI_U8 u8DarkGainLmtY;
HI_U8 u8DarkGainLmtC;
HI_U8 u8PDStrength;
HI_U8 u8LocalMixingBrightMax;
HI_U8 u8LocalMixingBrightMin;
HI_U8 u8LocalMixingBrightThr;
HI_S8 s8LocalMixingBrightSlo;
HI_U8 u8LocalMixingDarkMax;
HI_U8 u8LocalMixingDarkMin;
HI_U8 u8LocalMixingDarkThr;
HI_S8 s8LocalMixingDarkSlo;
HI_U16 u16ColorCorrectionLut[33];
HI_U16 u16ToneMappingValue[200];
HI_U8 u8Asymmetry;
HI_U8 u8SecondPole;
HI_U8 u8Stretch;
HI_U8 u8Compress;
HI_U8 u8CurveSel;
HI_U16 au16Xpoint[5];
HI_U16 au16Ypoint[5];
HI_U16 au16Slope[5];
} ISP_CMOS_DRC_S;
typedef struct hiISP_CMOS_WDR_S {
HI_BOOL bFusionMode;
HI_BOOL bMotionComp;
HI_U16 u16ShortThr;
HI_U16 u16LongThr;
HI_BOOL bForceLong;
HI_U16 u16ForceLongLowThr;
HI_U16 u16ForceLongHigThr;
HI_BOOL bShortExpoChk;
HI_U16 u16ShortCheckThd;
HI_U8 au8MdThrLowGain[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8MdThrHigGain[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U16 au16FusionThr[WDR_MAX_FRAME];
HI_U8 u8MdtStillThd;
HI_U8 u8MdtLongBlend;
} ISP_CMOS_WDR_S;
typedef struct HiISP_CMOS_DEHAZE_S {
HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */
HI_BOOL bUserLutEnable; /* RW;Range:[0,1];0:Auto Lut 1:User Lut */
ISP_OP_TYPE_E enOpType;
HI_U8 u8AutoStrength;
HI_U8 u8ManualStrength;
} ISP_CMOS_DEHAZE_S;
typedef struct hiISP_CMOS_PREGAMMA_S {
HI_BOOL bEnable;
HI_U32 au32PreGamma[PREGAMMA_NODE_NUM];
} ISP_CMOS_PREGAMMA_S;
#define GAMMA_NODE_NUMBER 257 // Update NODE NUMBER
#define GAMMA_EXT_NODE_NUMBER 1025 // Update NODE NUMBER
#define GAMMA_OUTSEG_NUMBER 8 // Update NODE NUMBER
typedef struct hiISP_CMOS_GAMMA_S {
HI_U16 au16Gamma[GAMMA_EXT_NODE_NUMBER];
} ISP_CMOS_GAMMA_S;
#define RGBIR_CVTMATRIX_NUMBER 12
typedef struct hiISP_CMOS_RGBIR_S {
HI_BOOL bEnable;
HI_S16 as16CvtMatrix[RGBIR_CVTMATRIX_NUMBER];
} ISP_CMOS_RGBIR_S;
typedef struct hiISP_CMOS_SENSOR_MAX_RESOLUTION_S {
HI_U32 u32MaxWidth;
HI_U32 u32MaxHeight;
} ISP_CMOS_SENSOR_MAX_RESOLUTION_S;
typedef struct hiISP_CMOS_DPC_S {
HI_U16 au16Strength[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U16 au16BlendRatio[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 u8DpcPos; /* DPC module position. Linear Mode Range: [0, 1]; WDR Mode Range: [0].
0 for after drc, 1 for before wdr. Default:0 */
} ISP_CMOS_DPC_S;
typedef struct hiISP_LSC_CABLI_TABLE_S {
HI_U16 au16R_Gain[HI_ISP_LSC_GRID_POINTS];
HI_U16 au16Gr_Gain[HI_ISP_LSC_GRID_POINTS];
HI_U16 au16Gb_Gain[HI_ISP_LSC_GRID_POINTS];
HI_U16 au16B_Gain[HI_ISP_LSC_GRID_POINTS];
} ISP_LSC_CABLI_TABLE_S;
typedef struct hiISP_CMOS_LSC_S {
HI_U16 u16MeshStrength;
HI_U8 u8MeshScale;
ISP_LSC_CABLI_TABLE_S astLscCalibTable[2];
} ISP_CMOS_LSC_S;
typedef struct hiISP_CMOS_LCAC_MANUAL_S
{
HI_U8 u8DePurpleCrStr;
HI_U8 u8DePurpleCbStr;
}ISP_CMOS_LCAC_MANUAL_S;
typedef struct hiISP_CMOS_LCAC_AUTO_S
{
HI_U8 au8DePurpleCrStr[ISP_EXP_RATIO_STRENGTH_NUM];
HI_U8 au8DePurpleCbStr[ISP_EXP_RATIO_STRENGTH_NUM];
}ISP_CMOS_LCAC_AUTO_S;
typedef struct hiISP_CMOS_LCAC_S {
HI_BOOL bEnable;
HI_U16 u16PurpleDetRange;
HI_U16 VarThr;
ISP_OP_TYPE_E enOpMode;
ISP_CMOS_LCAC_MANUAL_S stManual;
ISP_CMOS_LCAC_AUTO_S stAuto;
} ISP_CMOS_LCAC_S;
typedef struct hiISP_CMOS_CA_S {
HI_BOOL bEnable;
HI_U16 au16YRatioLut[HI_ISP_CA_YRATIO_LUT_LENGTH]; // 1.10bit Y Ratio For UV ; Max = 2047 FW Limit
HI_S16 as16ISORatio[ISP_AUTO_ISO_STRENGTH_NUM]; // 1.10bit ISO Ratio For UV,Max = 2047 FW Limi
} ISP_CMOS_CA_S;
typedef struct hiISP_CMOS_EXPANDER_POINT_S {
HI_U16 u16X; /* RW;Range:[0x0,0x81];Format:8.0;The X point of the knee */
HI_U32 u32Y; /* RW;Range:[0x0,0x8000];Format:16.0;The Y point of the knee */
} ISP_CMOS_EXPANDER_POINT_S;
typedef struct hiISP_CMOS_EXPANDER_S {
HI_BOOL bEnable;
HI_U8 u8BitDepthIn; /* RW;Range:[0xC,0x14];Format:5.0;The Bit depth of input */
HI_U8 u8BitDepthOut; /* RW;Range:[0xC,0x14];Format:5.0;The Bit depth of output */
ISP_CMOS_EXPANDER_POINT_S astExpanderPoint[ISP_EXPANDER_POINT_NUM];
} ISP_CMOS_EXPANDER_S;
typedef struct hiISP_CMOS_GE_S {
HI_BOOL bEnable; /* RW,Range: [ 0, 1] */
HI_U8 u8Slope; /* RW,Range: [ 0, 0xE] */
HI_U8 u8SensiSlope; /* RW,Range: [ 0, 0xE] */
HI_U16 u16SensiThr; /* RW,Range: [ 0, 0x3FFF] */
HI_U16 au16Threshold[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW,Range: [ 0, 0x3FFF] */
HI_U16 au16Strength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW,Range: [ 0, 0x100] */
HI_U16 au16NpOffset[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW,Range: [0x200, 0x3FFF] */
} ISP_CMOS_GE_S;
typedef struct hiISP_CMOS_ANTIFALSECOLOR_S {
HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */
HI_U8 au8AntiFalseColorThreshold[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x20];Format:6.0;Threshold for antifalsecolor */
HI_U8 au8AntiFalseColorStrength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x1F];Format:5.0;Strength of antifalsecolor */
} ISP_CMOS_ANTIFALSECOLOR_S;
typedef struct hiISP_CMOS_LDCI_S {
HI_BOOL bEnable;
HI_U8 u8GaussLPFSigma;
HI_U8 au8HePosWgt[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8HePosSigma[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8HePosMean[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8HeNegWgt[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8HeNegSigma[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U8 au8HeNegMean[ISP_AUTO_ISO_STRENGTH_NUM];
HI_U16 au16BlcCtrl[ISP_AUTO_ISO_STRENGTH_NUM];
} ISP_CMOS_LDCI_S;
typedef struct hiISP_CMOS_SENSOR_MODE_S {
HI_U32 u32SensorID;
HI_U8 u8SensorMode;
HI_BOOL bValidDngRawFormat;
DNG_RAW_FORMAT_S stDngRawFormat;
} ISP_CMOS_SENSOR_MODE_S;
typedef struct hiISP_CMOS_DNG_COLORPARAM_S {
ISP_DNG_WBGAIN_S stWbGain1; /* the calibration White balance gain of colorcheker in A Light */
ISP_DNG_WBGAIN_S stWbGain2; /* the calibration White balance gain of colorcheker in D50 Light */
} ISP_CMOS_DNG_COLORPARAM_S;
typedef struct hiISP_CMOS_WDR_SWITCH_ATTR_S {
HI_U32 au32ExpRatio[EXP_RATIO_NUM];
} ISP_CMOS_WDR_SWITCH_ATTR_S;
typedef union hiISP_CMOS_ALG_KEY_U {
HI_U64 u64Key;
struct {
HI_U64 bit1Drc : 1 ; /* [0] */
HI_U64 bit1Demosaic : 1 ; /* [1] */
HI_U64 bit1PreGamma : 1 ; /* [2] */
HI_U64 bit1Gamma : 1 ; /* [3] */
HI_U64 bit1Sharpen : 1 ; /* [4] */
HI_U64 bit1Ldci : 1 ; /* [5] */
HI_U64 bit1Dpc : 1 ; /* [6] */
HI_U64 bit1Lsc : 1 ; /* [7] */
HI_U64 bit1Ge : 1 ; /* [8] */
HI_U64 bit1AntiFalseColor : 1 ; /* [9] */
HI_U64 bit1BayerNr : 1 ; /* [10] */
HI_U64 bit1Ca : 1 ; /* [11] */
HI_U64 bit1Expander : 1 ; /* [12] */
HI_U64 bit1Wdr : 1 ; /* [13] */
HI_U64 bit1Dehaze : 1 ; /* [14] */
HI_U64 bit1Rgbir : 1 ; /* [15] */
HI_U64 bit1Lcac : 1 ; /* [16] */
HI_U64 bit44Rsv : 47; /* [17:63] */
};
} ISP_CMOS_ALG_KEY_U;
typedef struct hiISP_CMOS_DEFAULT_S {
ISP_CMOS_ALG_KEY_U unKey;
const ISP_CMOS_DRC_S *pstDrc;
const ISP_CMOS_DEMOSAIC_S *pstDemosaic;
const ISP_CMOS_PREGAMMA_S *pstPreGamma;
const ISP_CMOS_GAMMA_S *pstGamma;
const ISP_CMOS_SHARPEN_S *pstSharpen;
// const ISP_CMOS_EDGEMARK_S *pstEdgeMark;
// const ISP_CMOS_HLC_S *pstHlc;
const ISP_CMOS_LDCI_S *pstLdci;
const ISP_CMOS_DPC_S *pstDpc;
const ISP_CMOS_LSC_S *pstLsc;
const ISP_CMOS_GE_S *pstGe;
const ISP_CMOS_ANTIFALSECOLOR_S *pstAntiFalseColor;
const ISP_CMOS_BAYERNR_S *pstBayerNr;
// const ISP_CMOS_DETAIL_S *pstDetail;
const ISP_CMOS_CA_S *pstCa;
const ISP_CMOS_EXPANDER_S *pstExpander;
const ISP_CMOS_RGBIR_S *pstRgbir;
// const ISP_CMOS_CLUT_S *pstClut;
const ISP_CMOS_WDR_S *pstWdr;
const ISP_CMOS_DEHAZE_S *pstDehaze;
const ISP_CMOS_LCAC_S *pstLcac;
ISP_CMOS_NOISE_CALIBRATION_S stNoiseCalibration;
ISP_CMOS_SENSOR_MAX_RESOLUTION_S stSensorMaxResolution;
ISP_CMOS_SENSOR_MODE_S stSensorMode;
ISP_CMOS_DNG_COLORPARAM_S stDngColorParam;
ISP_CMOS_WDR_SWITCH_ATTR_S stWdrSwitchAttr;
} ISP_CMOS_DEFAULT_S;
typedef struct hiISP_CMOS_SENSOR_IMAGE_MODE_S {
HI_U16 u16Width;
HI_U16 u16Height;
HI_FLOAT f32Fps;
HI_U8 u8SnsMode;
} ISP_CMOS_SENSOR_IMAGE_MODE_S;
typedef struct hiISP_SENSOR_EXP_FUNC_S {
HI_VOID (*pfn_cmos_sensor_init)(VI_PIPE ViPipe);
HI_VOID (*pfn_cmos_sensor_exit)(VI_PIPE ViPipe);
HI_VOID (*pfn_cmos_sensor_global_init)(VI_PIPE ViPipe);
HI_S32 (*pfn_cmos_set_image_mode)(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode);
HI_S32 (*pfn_cmos_set_wdr_mode)(VI_PIPE ViPipe, HI_U8 u8Mode);
/* the algs get data which is associated with sensor, except 3a */
HI_S32 (*pfn_cmos_get_isp_default)(VI_PIPE ViPipe, ISP_CMOS_DEFAULT_S *pstDef);
HI_S32 (*pfn_cmos_get_isp_black_level)(VI_PIPE ViPipe, ISP_CMOS_BLACK_LEVEL_S *pstBlackLevel);
HI_S32 (*pfn_cmos_get_sns_reg_info)(VI_PIPE ViPipe, ISP_SNS_REGS_INFO_S *pstSnsRegsInfo);
/* the function of sensor set pixel detect */
HI_VOID (*pfn_cmos_set_pixel_detect)(VI_PIPE ViPipe, HI_BOOL bEnable);
} ISP_SENSOR_EXP_FUNC_S;
typedef struct hiISP_SENSOR_REGISTER_S {
ISP_SENSOR_EXP_FUNC_S stSnsExp;
} ISP_SENSOR_REGISTER_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* __HI_COMM_SNS_H__ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2007-2019. All rights reserved.
* Description: chip specific configure data structure of sys
* Author: Hisilicon multimedia software group
* Create: 2007-01-30
*/
#ifndef __HI_COMM_SYS_H__
#define __HI_COMM_SYS_H__
#include "hi_type.h"
#include "hi_errno.h"
#include "hi_debug.h"
#include "hi_comm_video.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#define BIND_DEST_MAXNUM 64
#define HI_UNIQUE_ID_NUM 6
#define HI_TRACE_SYS(level, fmt, ...) \
do { \
HI_TRACE(level, HI_ID_SYS, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
} while (0)
typedef struct hiVPSS_VENC_WRAP_PARAM_S {
HI_BOOL bAllOnline;
HI_U32 u32FrameRate; /* Input frame rate of VIPROC(linear/Frame mode WDR is the sensor frame rate,
* and the line mode WDR is the frame rate after synthesis) */
HI_U32 u32FullLinesStd; /* Total height of sensor, include of VBlank */
SIZE_S stLargeStreamSize; /* VENC Large Stream Size */
SIZE_S stSmallStreamSize; /* VENC Small Stream Size */
} VPSS_VENC_WRAP_PARAM_S;
typedef struct hiMPP_SYS_CONFIG_S {
HI_U32 u32Align;
} MPP_SYS_CONFIG_S;
typedef struct hiSYS_VIRMEM_INFO_S {
HI_U64 u64PhyAddr;
HI_BOOL bCached;
} SYS_VIRMEM_INFO_S;
typedef struct hiMPP_BIND_DEST_S {
HI_U32 u32Num;
MPP_CHN_S astMppChn[BIND_DEST_MAXNUM];
} MPP_BIND_DEST_S;
typedef enum hiSCALE_RANGE_E {
SCALE_RANGE_0 = 0, /* scale range < 8/64 */
SCALE_RANGE_1, /* scale range >= 8/64 */
SCALE_RANGE_2, /* scale range >= 10/64 */
SCALE_RANGE_3, /* scale range >= 15/64 */
SCALE_RANGE_4, /* scale range >= 19/64 */
SCALE_RANGE_5, /* scale range >= 24/64 */
SCALE_RANGE_6, /* scale range >= 29/64 */
SCALE_RANGE_7, /* scale range >= 33/64 */
SCALE_RANGE_8, /* scale range >= 35/64 */
SCALE_RANGE_9, /* scale range >= 38/64 */
SCALE_RANGE_10, /* scale range >= 42/64 */
SCALE_RANGE_11, /* scale range >= 45/64 */
SCALE_RANGE_12, /* scale range >= 48/64 */
SCALE_RANGE_13, /* scale range >= 51/64 */
SCALE_RANGE_14, /* scale range >= 53/64 */
SCALE_RANGE_15, /* scale range >= 55/64 */
SCALE_RANGE_16, /* scale range >= 57/64 */
SCALE_RANGE_17, /* scale range >= 60/64 */
SCALE_RANGE_18, /* scale range > 1 */
SCALE_RANGE_BUTT,
} SCALE_RANGE_E;
typedef enum hiCOEFF_LEVEL_E {
COEFF_LEVEL_0 = 0, /* coefficient level 0 */
COEFF_LEVEL_1, /* coefficient level 1 */
COEFF_LEVEL_2, /* coefficient level 2 */
COEFF_LEVEL_3, /* coefficient level 3 */
COEFF_LEVEL_4, /* coefficient level 4 */
COEFF_LEVEL_5, /* coefficient level 5 */
COEFF_LEVEL_6, /* coefficient level 6 */
COEFF_LEVEL_7, /* coefficient level 7 */
COEFF_LEVEL_8, /* coefficient level 8 */
COEFF_LEVEL_9, /* coefficient level 9 */
COEFF_LEVEL_10, /* coefficient level 10 */
COEFF_LEVEL_11, /* coefficient level 11 */
COEFF_LEVEL_12, /* coefficient level 12 */
COEFF_LEVEL_13, /* coefficient level 13 */
COEFF_LEVEL_14, /* coefficient level 14 */
COEFF_LEVEL_15, /* coefficient level 15 */
COEFF_LEVEL_16, /* coefficient level 16 */
COEFF_LEVEL_17, /* coefficient level 17 */
COEFF_LEVEL_18, /* coefficient level 18 */
COEFF_LEVEL_BUTT,
} COEFF_LEVEL_E;
typedef struct hiSCALE_COEFF_LEVEL_S {
COEFF_LEVEL_E enHorLum; /* horizontal luminance coefficient level */
COEFF_LEVEL_E enHorChr; /* horizontal chrominance coefficient level */
COEFF_LEVEL_E enVerLum; /* vertical luminance coefficient level */
COEFF_LEVEL_E enVerChr; /* vertical chrominance coefficient level */
} SCALE_COEFF_LEVEL_S;
typedef struct hiSCALE_RANGE_S {
SCALE_RANGE_E enHorizontal;
SCALE_RANGE_E enVertical;
} SCALE_RANGE_S;
typedef struct hiSCALE_COEFF_INFO_S {
SCALE_RANGE_S stScaleRange;
SCALE_COEFF_LEVEL_S stScaleCoeffLevel;
} SCALE_COEFF_INFO_S;
typedef struct hiGPS_INFO_S {
HI_CHAR chGPSLatitudeRef; /* GPS LatitudeRef Indicates whether the latitude is north or south latitude,
* 'N'/'S', default 'N' */
HI_U32 au32GPSLatitude[3][2]; /* GPS Latitude is expressed as degrees, minutes and seconds, a typical format
* like "dd/1, mm/1, ss/1", default 0/0, 0/0, 0/0 */
HI_CHAR chGPSLongitudeRef; /* GPS LongitudeRef Indicates whether the longitude is east or west longitude,
* 'E'/'W', default 'E' */
HI_U32 au32GPSLongitude[3][2]; /* GPS Longitude is expressed as degrees, minutes and seconds, a typical format
* like "dd/1, mm/1, ss/1", default 0/0, 0/0, 0/0 */
HI_U8 u8GPSAltitudeRef; /* GPS AltitudeRef Indicates the reference altitude used, 0 - above sea level,
* 1 - below sea level default 0 */
HI_U32 au32GPSAltitude[2]; /* GPS AltitudeRef Indicates the altitude based on the reference u8GPSAltitudeRef,
* the reference unit is meters, default 0/0 */
} GPS_INFO_S;
typedef enum hiVI_VPSS_MODE_E {
VI_OFFLINE_VPSS_OFFLINE = 0,
VI_OFFLINE_VPSS_ONLINE,
VI_ONLINE_VPSS_OFFLINE,
VI_ONLINE_VPSS_ONLINE,
VI_PARALLEL_VPSS_OFFLINE,
VI_PARALLEL_VPSS_PARALLEL,
VI_VPSS_MODE_BUTT
} VI_VPSS_MODE_E;
typedef struct hiVI_VPSS_MODE_S {
VI_VPSS_MODE_E aenMode[VI_MAX_PIPE_NUM];
} VI_VPSS_MODE_S;
typedef struct hiRAW_FRAME_COMPRESS_PARAM_S {
HI_U32 u32CompRatio_10Bit; /* compression ratio of 10 bit */
HI_U32 u32CompRatio_12Bit; /* compression ratio of 12 bit */
HI_U32 u32CompRatio_14Bit; /* compression ratio of 14 bit */
} RAW_FRAME_COMPRESS_PARAM_S;
typedef struct hiHI_UNIQUE_ID_S {
HI_U32 u32Id[HI_UNIQUE_ID_NUM];
} HI_UNIQUE_ID_S;
#define HI_ERR_SYS_NULL_PTR HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_SYS_NOTREADY HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_SYS_NOT_PERM HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_SYS_NOMEM HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
#define HI_ERR_SYS_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_SYS_BUSY HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_SYS_NOT_SUPPORT HI_DEF_ERR(HI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_SYS_H__ */

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/*
* Copyright (c) Hisilicon Technologies Co., Ltd. 2012-2019. All rights reserved.
* Description:
* Author: Hisilicon multimedia software group
* Create: 2011/06/28
*/
#ifndef __HI_COMM_VB_H__
#define __HI_COMM_VB_H__
#include "hi_type.h"
#include "hi_errno.h"
#include "hi_debug.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif
#define VB_INVALID_POOLID (-1U)
#define VB_INVALID_HANDLE (-1U)
#define VB_MAX_COMM_POOLS 16
#define VB_MAX_MOD_COMM_POOLS 16
/* user ID for VB */
#define VB_MAX_USER VB_UID_BUTT
typedef enum hiVB_UID_E {
VB_UID_VI = 0,
VB_UID_VO = 1,
VB_UID_VGS = 2,
VB_UID_VENC = 3,
VB_UID_VDEC = 4,
VB_UID_H265E = 5,
VB_UID_H264E = 6,
VB_UID_JPEGE = 7,
VB_UID_H264D = 8,
VB_UID_JPEGD = 9,
VB_UID_VPSS = 10,
VB_UID_DIS = 11,
VB_UID_USER = 12,
VB_UID_PCIV = 13,
VB_UID_AI = 14,
VB_UID_AENC = 15,
VB_UID_RC = 16,
VB_UID_VFMW = 17,
VB_UID_GDC = 18,
VB_UID_AVS = 19,
VB_UID_DPU_RECT = 20,
VB_UID_DPU_MATCH = 21,
VB_UID_MCF = 22,
VB_UID_BUTT = 23,
} VB_UID_E;
/* Generall common pool use this owner id, module common pool use VB_UID as owner id */
#define POOL_OWNER_COMMON -1
/* Private pool use this owner id */
#define POOL_OWNER_PRIVATE -2
typedef HI_U32 VB_POOL;
typedef HI_U32 VB_BLK;
#define RESERVE_MMZ_NAME "window"
typedef enum hiVB_REMAP_MODE_E {
VB_REMAP_MODE_NONE = 0, /* no remap */
VB_REMAP_MODE_NOCACHE = 1, /* no cache remap */
VB_REMAP_MODE_CACHED = 2, /* cache remap, if you use this mode, you should flush cache by yourself */
VB_REMAP_MODE_BUTT
} VB_REMAP_MODE_E;
typedef struct hiVB_POOL_CONFIG_S {
HI_U64 u64BlkSize;
HI_U32 u32BlkCnt;
VB_REMAP_MODE_E enRemapMode;
HI_CHAR acMmzName[MAX_MMZ_NAME_LEN];
} VB_POOL_CONFIG_S;
typedef struct hiVB_CONFIG_S {
HI_U32 u32MaxPoolCnt;
VB_POOL_CONFIG_S astCommPool[VB_MAX_COMM_POOLS];
} VB_CONFIG_S;
typedef struct hiVB_POOL_STATUS_S {
HI_U32 bIsCommPool;
HI_U32 u32BlkCnt;
HI_U32 u32FreeBlkCnt;
} VB_POOL_STATUS_S;
#define VB_SUPPLEMENT_JPEG_MASK 0x1
#define VB_SUPPLEMENT_ISPINFO_MASK 0x2
#define VB_SUPPLEMENT_MOTION_DATA_MASK 0x4
#define VB_SUPPLEMENT_DNG_MASK 0x8
typedef struct hiVB_SUPPLEMENT_CONFIG_S {
HI_U32 u32SupplementConfig;
} VB_SUPPLEMENT_CONFIG_S;
#define HI_ERR_VB_NULL_PTR HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_VB_NOMEM HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
#define HI_ERR_VB_NOBUF HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
#define HI_ERR_VB_UNEXIST HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
#define HI_ERR_VB_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_VB_NOTREADY HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_VB_BUSY HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_VB_NOT_PERM HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_VB_SIZE_NOT_ENOUGH HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_SIZE_NOT_ENOUGH)
#define HI_ERR_VB_2MPOOLS HI_DEF_ERR(HI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_BUTT + 1)
#define HI_TRACE_VB(level, fmt, ...) \
do { \
HI_TRACE(level, HI_ID_VB, "[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
} while (0)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_VB_H_ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2016-2017. All rights reserved.
* Description:
* Author: Hisilicon multimedia software group
* Create: 2016/11/15
*/
#ifndef __HI_COMM_VENC_H__
#define __HI_COMM_VENC_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#include "hi_comm_rc.h"
#include "hi_comm_vb.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
/* invlalid channel ID */
#define HI_ERR_VENC_INVALID_CHNID HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_VENC_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* channel exists */
#define HI_ERR_VENC_EXIST HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* channel exists */
#define HI_ERR_VENC_UNEXIST HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* using a NULL point */
#define HI_ERR_VENC_NULL_PTR HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_VENC_NOT_CONFIG HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_VENC_NOT_SUPPORT HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change stati attribute */
#define HI_ERR_VENC_NOT_PERM HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* failure caused by malloc memory */
#define HI_ERR_VENC_NOMEM HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_VENC_NOBUF HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_VENC_BUF_EMPTY HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_VENC_BUF_FULL HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* system is not ready,had not initialed or loaded */
#define HI_ERR_VENC_SYS_NOTREADY HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* system is busy */
#define HI_ERR_VENC_BUSY HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/* the nalu type of H264E */
typedef enum hiH264E_NALU_TYPE_E {
H264E_NALU_BSLICE = 0, /*B SLICE types*/
H264E_NALU_PSLICE = 1, /*P SLICE types*/
H264E_NALU_ISLICE = 2, /*I SLICE types*/
H264E_NALU_IDRSLICE = 5, /*IDR SLICE types*/
H264E_NALU_SEI = 6, /*SEI types*/
H264E_NALU_SPS = 7, /*SPS types*/
H264E_NALU_PPS = 8, /*PPS types*/
H264E_NALU_BUTT
} H264E_NALU_TYPE_E;
/* the nalu type of H265E */
typedef enum hiH265E_NALU_TYPE_E {
H265E_NALU_BSLICE = 0, /*B SLICE types*/
H265E_NALU_PSLICE = 1, /*P SLICE types*/
H265E_NALU_ISLICE = 2, /*I SLICE types*/
H265E_NALU_IDRSLICE = 19, /*IDR SLICE types*/
H265E_NALU_VPS = 32, /*VPS types*/
H265E_NALU_SPS = 33, /*SPS types*/
H265E_NALU_PPS = 34, /*PPS types*/
H265E_NALU_SEI = 39, /*SEI types*/
H265E_NALU_BUTT
} H265E_NALU_TYPE_E;
/* the reference type of H264E slice */
typedef enum hiH264E_REFSLICE_TYPE_E {
H264E_REFSLICE_FOR_1X = 1, /*Reference slice for H264E_REF_MODE_1X*/
H264E_REFSLICE_FOR_2X = 2, /*Reference slice for H264E_REF_MODE_2X*/
H264E_REFSLICE_FOR_4X = 5, /*Reference slice for H264E_REF_MODE_4X*/
H264E_REFSLICE_FOR_BUTT /* slice not for reference*/
} H264E_REFSLICE_TYPE_E;
/* the pack type of JPEGE */
typedef enum hiJPEGE_PACK_TYPE_E {
JPEGE_PACK_ECS = 5, /*ECS types*/
JPEGE_PACK_APP = 6, /*APP types*/
JPEGE_PACK_VDO = 7, /*VDO types*/
JPEGE_PACK_PIC = 8, /*PIC types*/
JPEGE_PACK_DCF = 9, /*DCF types*/
JPEGE_PACK_DCF_PIC = 10, /*DCF PIC types*/
JPEGE_PACK_BUTT
} JPEGE_PACK_TYPE_E;
/* the pack type of PRORES */
typedef enum hiPRORES_PACK_TYPE_E {
PRORES_PACK_PIC = 1, /*PIC types*/
PRORES_PACK_BUTT
} PRORES_PACK_TYPE_E;
/* the data type of VENC */
typedef union hiVENC_DATA_TYPE_U {
H264E_NALU_TYPE_E enH264EType; /* R; H264E NALU types*/
JPEGE_PACK_TYPE_E enJPEGEType; /* R; JPEGE pack types*/
H265E_NALU_TYPE_E enH265EType; /* R; H264E NALU types*/
PRORES_PACK_TYPE_E enPRORESType;
} VENC_DATA_TYPE_U;
/* the pack info of VENC */
typedef struct hiVENC_PACK_INFO_S {
VENC_DATA_TYPE_U u32PackType; /* R; the pack type*/
HI_U32 u32PackOffset;
HI_U32 u32PackLength;
} VENC_PACK_INFO_S;
/* Defines a stream packet */
typedef struct hiVENC_PACK_S {
HI_U64 u64PhyAddr; /* R; the physics address of stream */
HI_U8 ATTRIBUTE* pu8Addr; /* R; the virtual address of stream */
HI_U32 ATTRIBUTE u32Len; /* R; the length of stream */
HI_U64 u64PTS; /* R; PTS */
HI_BOOL bFrameEnd; /* R; frame end */
VENC_DATA_TYPE_U DataType; /* R; the type of stream */
HI_U32 u32Offset; /* R; the offset between the Valid data and the start address */
HI_U32 u32DataNum; /* R; the stream packets num */
VENC_PACK_INFO_S stPackInfo[8]; /* R; the stream packet Information */
} VENC_PACK_S;
/* Defines the frame type and reference attributes of the H.264 frame skipping reference streams */
typedef enum hiH264E_REF_TYPE_E {
BASE_IDRSLICE = 0, /* the Idr frame at Base layer*/
BASE_PSLICE_REFTOIDR, /* the P frame at Base layer, referenced by other frames at Base layer and reference to Idr frame*/
BASE_PSLICE_REFBYBASE, /* the P frame at Base layer, referenced by other frames at Base layer*/
BASE_PSLICE_REFBYENHANCE, /* the P frame at Base layer, referenced by other frames at Enhance layer*/
ENHANCE_PSLICE_REFBYENHANCE, /* the P frame at Enhance layer, referenced by other frames at Enhance layer*/
ENHANCE_PSLICE_NOTFORREF, /* the P frame at Enhance layer ,not referenced*/
ENHANCE_PSLICE_BUTT
} H264E_REF_TYPE_E;
typedef enum hiH264E_REF_TYPE_E H265E_REF_TYPE_E;
/* Defines the features of an H.264 stream */
typedef struct hiVENC_STREAM_INFO_H264_S {
HI_U32 u32PicBytesNum; /* R; the coded picture stream byte number */
HI_U32 u32Inter16x16MbNum; /* R; the inter16x16 macroblock num */
HI_U32 u32Inter8x8MbNum; /* R; the inter8x8 macroblock num */
HI_U32 u32Intra16MbNum; /* R; the intra16x16 macroblock num */
HI_U32 u32Intra8MbNum; /* R; the intra8x8 macroblock num */
HI_U32 u32Intra4MbNum; /* R; the inter4x4 macroblock num */
H264E_REF_TYPE_E enRefType; /* R; Type of encoded frames in advanced frame skipping reference mode*/
HI_U32 u32UpdateAttrCnt; /* R; Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32StartQp; /* R; the start Qp of encoded frames*/
HI_U32 u32MeanQp; /* R; the mean Qp of encoded frames*/
HI_BOOL bPSkip;
} VENC_STREAM_INFO_H264_S;
/* Defines the features of an H.265 stream */
typedef struct hiVENC_STREAM_INFO_H265_S {
HI_U32 u32PicBytesNum; /* R; the coded picture stream byte number */
HI_U32 u32Inter64x64CuNum; /* R; the inter64x64 cu num */
HI_U32 u32Inter32x32CuNum; /* R; the inter32x32 cu num */
HI_U32 u32Inter16x16CuNum; /* R; the inter16x16 cu num */
HI_U32 u32Inter8x8CuNum; /* R; the inter8x8 cu num */
HI_U32 u32Intra32x32CuNum; /* R; the Intra32x32 cu num */
HI_U32 u32Intra16x16CuNum; /* R; the Intra16x16 cu num */
HI_U32 u32Intra8x8CuNum; /* R; the Intra8x8 cu num */
HI_U32 u32Intra4x4CuNum; /* R; the Intra4x4 cu num */
H265E_REF_TYPE_E enRefType; /* R; Type of encoded frames in advanced frame skipping reference mode*/
HI_U32 u32UpdateAttrCnt; /* R; Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32StartQp; /* R; the start Qp of encoded frames*/
HI_U32 u32MeanQp; /* R; the mean Qp of encoded frames*/
HI_BOOL bPSkip;
} VENC_STREAM_INFO_H265_S;
/* the sse info */
typedef struct hiVENC_SSE_INFO_S {
HI_BOOL bSSEEn; /* RW; Range:[0,1]; Region SSE enable */
HI_U32 u32SSEVal; /* R; Region SSE value */
} VENC_SSE_INFO_S;
/* the advance information of the h264e */
typedef struct hiVENC_STREAM_ADVANCE_INFO_H264_S {
HI_U32 u32ResidualBitNum; /* R; the residual num */
HI_U32 u32HeadBitNum; /* R; the head bit num */
HI_U32 u32MadiVal; /* R; the madi value */
HI_U32 u32MadpVal; /* R; the madp value */
HI_DOUBLE dPSNRVal; /* R; the PSNR value */
HI_U32 u32MseLcuCnt; /* R; the lcu cnt of the mse */
HI_U32 u32MseSum; /* R; the sum of the mse */
VENC_SSE_INFO_S stSSEInfo[8]; /* R; the information of the sse */
HI_U32 u32QpHstgrm[VENC_QP_HISGRM_NUM]; /* R; the Qp histogram value */
HI_U32 u32MoveScene16x16Num; /* R; the 16x16 cu num of the move scene*/
HI_U32 u32MoveSceneBits; /* R; the stream bit num of the move scene */
} VENC_STREAM_ADVANCE_INFO_H264_S;
/* the advance information of the Jpege */
typedef struct hiVENC_STREAM_ADVANCE_INFO_JPEG_S {
// HI_U32 u32Reserved;
} VENC_STREAM_ADVANCE_INFO_JPEG_S;
/* the advance information of the Prores */
typedef struct hiVENC_STREAM_ADVANCE_INFO_PRORES_S {
// HI_U32 u32Reserved;
} VENC_STREAM_ADVANCE_INFO_PRORES_S;
/* the advance information of the h265e */
typedef struct hiVENC_STREAM_ADVANCE_INFO_H265_S {
HI_U32 u32ResidualBitNum; /* R; the residual num */
HI_U32 u32HeadBitNum; /* R; the head bit num */
HI_U32 u32MadiVal; /* R; the madi value */
HI_U32 u32MadpVal; /* R; the madp value */
HI_DOUBLE dPSNRVal; /* R; the PSNR value */
HI_U32 u32MseLcuCnt; /* R; the lcu cnt of the mse */
HI_U32 u32MseSum; /* R; the sum of the mse */
VENC_SSE_INFO_S stSSEInfo[8]; /* R; the information of the sse */
HI_U32 u32QpHstgrm[VENC_QP_HISGRM_NUM]; /* R; the Qp histogram value */
HI_U32 u32MoveScene32x32Num; /* R; the 32x32 cu num of the move scene*/
HI_U32 u32MoveSceneBits; /* R; the stream bit num of the move scene */
} VENC_STREAM_ADVANCE_INFO_H265_S;
/* Defines the features of an jpege stream */
typedef struct hiVENC_STREAM_INFO_PRORES_S {
HI_U32 u32PicBytesNum;
HI_U32 u32UpdateAttrCnt;
} VENC_STREAM_INFO_PRORES_S;
/* Defines the features of an jpege stream */
typedef struct hiVENC_STREAM_INFO_JPEG_S {
HI_U32 u32PicBytesNum; /* R; the coded picture stream byte number */
HI_U32 u32UpdateAttrCnt; /* R; Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32Qfactor; /* R; image quality */
} VENC_STREAM_INFO_JPEG_S;
/* Defines the features of an stream */
typedef struct hiVENC_STREAM_S {
VENC_PACK_S ATTRIBUTE* pstPack; /* R; stream pack attribute*/
HI_U32 ATTRIBUTE u32PackCount; /* R; the pack number of one frame stream*/
HI_U32 u32Seq; /* R; the list number of stream*/
union {
VENC_STREAM_INFO_H264_S stH264Info; /* R; the stream info of h264*/
VENC_STREAM_INFO_JPEG_S stJpegInfo; /* R; the stream info of jpeg*/
VENC_STREAM_INFO_H265_S stH265Info; /* R; the stream info of h265*/
VENC_STREAM_INFO_PRORES_S stProresInfo; /* R; the stream info of prores*/
};
union {
VENC_STREAM_ADVANCE_INFO_H264_S stAdvanceH264Info; /* R; the stream info of h264*/
VENC_STREAM_ADVANCE_INFO_JPEG_S stAdvanceJpegInfo; /* R; the stream info of jpeg*/
VENC_STREAM_ADVANCE_INFO_H265_S stAdvanceH265Info; /* R; the stream info of h265*/
VENC_STREAM_ADVANCE_INFO_PRORES_S stAdvanceProresInfo; /* R; the stream info of prores*/
};
} VENC_STREAM_S;
typedef struct hiVENC_STREAM_INFO_S {
H265E_REF_TYPE_E enRefType; /* R;Type of encoded frames in advanced frame skipping reference mode*/
HI_U32 u32PicBytesNum; /* R;the coded picture stream byte number */
HI_U32 u32PicCnt; /* R;When channel attributes 'bByFrame == 1', it means count of frames.
When channel attributes 'bByFrame == 0', it means count of packets.*/
HI_U32 u32StartQp; /* R;the start Qp of encoded frames*/
HI_U32 u32MeanQp; /* R;the mean Qp of encoded frames*/
HI_BOOL bPSkip;
HI_U32 u32ResidualBitNum; /* R;residual*/
HI_U32 u32HeadBitNum; /* R;head information*/
HI_U32 u32MadiVal; /* R;madi*/
HI_U32 u32MadpVal; /* R;madp*/
HI_U32 u32MseSum; /* R;Sum of MSE value */
HI_U32 u32MseLcuCnt; /* R;Sum of LCU number */
HI_DOUBLE dPSNRVal; /* R;PSNR*/
} VENC_STREAM_INFO_S;
/* the size of array is 2,that is the maximum */
typedef struct hiVENC_MPF_CFG_S {
HI_U8 u8LargeThumbNailNum; /* RW; Range:[0,2]; the large thumbnail pic num of the MPF */
SIZE_S astLargeThumbNailSize[2]; /* RW; The resolution of large ThumbNail*/
} VENC_MPF_CFG_S;
typedef enum hiVENC_PIC_RECEIVE_MODE_E {
VENC_PIC_RECEIVE_SINGLE = 0,
VENC_PIC_RECEIVE_MULTI,
VENC_PIC_RECEIVE_BUTT
} VENC_PIC_RECEIVE_MODE_E;
/* the attribute of jpege */
typedef struct hiVENC_ATTR_JPEG_S {
HI_BOOL bSupportDCF; /*RW; Range:[0,1]; support dcf */
VENC_MPF_CFG_S stMPFCfg; /*RW; Range:[0,1]; config of Mpf*/
VENC_PIC_RECEIVE_MODE_E enReceiveMode; /*RW; Config the receive mode;Not support for Hi3559AV100*/
} VENC_ATTR_JPEG_S;
/* the attribute of mjpege */
typedef struct hiVENC_ATTR_MJPEG_S {
// reserved
} VENC_ATTR_MJPEG_S;
/* the attribute of h264e */
typedef struct hiVENC_ATTR_H264_S {
HI_BOOL bRcnRefShareBuf; /* RW; Range:[0, 1]; Whether to enable the Share Buf of Rcn and Ref .*/
//reserved
} VENC_ATTR_H264_S;
/* the attribute of h265e */
typedef struct hiVENC_ATTR_H265_S {
HI_BOOL bRcnRefShareBuf; /* RW; Range:[0, 1]; Whether to enable the Share Buf of Rcn and Ref .*/
//reserved
} VENC_ATTR_H265_S;
/* the frame rate of PRORES */
typedef enum hiPRORES_FRAMERATE {
PRORES_FR_UNKNOWN = 0,
PRORES_FR_23_976,
PRORES_FR_24,
PRORES_FR_25,
PRORES_FR_29_97,
PRORES_FR_30,
PRORES_FR_50,
PRORES_FR_59_94,
PRORES_FR_60,
PRORES_FR_100,
PRORES_FR_119_88,
PRORES_FR_120,
PRORES_FR_BUTT
} PRORES_FRAMERATE;
/* the aspect ratio of PRORES */
typedef enum hiPRORES_ASPECT_RATIO {
PRORES_ASPECT_RATIO_UNKNOWN = 0,
PRORES_ASPECT_RATIO_SQUARE,
PRORES_ASPECT_RATIO_4_3,
PRORES_ASPECT_RATIO_16_9,
PRORES_ASPECT_RATIO_BUTT
} PRORES_ASPECT_RATIO;
/* the attribute of PRORES */
typedef struct hiVENC_ATTR_PRORES_S {
HI_CHAR cIdentifier[4];
PRORES_FRAMERATE enFrameRateCode;
PRORES_ASPECT_RATIO enAspectRatio;
} VENC_ATTR_PRORES_S;
/* the attribute of the Venc */
typedef struct hiVENC_ATTR_S {
PAYLOAD_TYPE_E enType; /* RW; the type of payload*/
HI_U32 u32MaxPicWidth; /* RW; Range:[0,16384];maximum width of a picture to be encoded, in pixel*/
HI_U32 u32MaxPicHeight; /* RW; Range:[0,16384];maximum height of a picture to be encoded, in pixel*/
HI_U32 u32BufSize; /* RW; stream buffer size*/
HI_U32 u32Profile; /* RW; Range:[0,3];
H.264: 0: baseline; 1:MP; 2:HP; 3: SVC-T [0,3];
H.265: 0:MP; 1:Main 10 [0 1];
Jpege/MJpege: 0:Baseline
prores: 0:ProRes Proxy; 1:ProRes 422(LT); 2:ProRes 422; 3:ProRes 422(HQ);*/
HI_BOOL bByFrame; /* RW; Range:[0,1]; get stream mode is slice mode or frame mode*/
HI_U32 u32PicWidth; /* RW; Range:[0,16384];width of a picture to be encoded, in pixel*/
HI_U32 u32PicHeight; /* RW; Range:[0,16384];height of a picture to be encoded, in pixel*/
union {
VENC_ATTR_H264_S stAttrH264e; /* attributes of H264e */
VENC_ATTR_H265_S stAttrH265e; /* attributes of H265e */
VENC_ATTR_MJPEG_S stAttrMjpege; /* attributes of Mjpeg */
VENC_ATTR_JPEG_S stAttrJpege; /* attributes of jpeg */
VENC_ATTR_PRORES_S stAttrProres; /* attributes of prores */
};
} VENC_ATTR_S;
/* the gop mode */
typedef enum hiVENC_GOP_MODE_E {
VENC_GOPMODE_NORMALP = 0, /* NORMALP */
VENC_GOPMODE_DUALP = 1, /* DUALP; Not support for Hi3556AV100*/
VENC_GOPMODE_SMARTP = 2, /* SMARTP; Not support for Hi3556AV100 */
VENC_GOPMODE_ADVSMARTP = 3, /* ADVSMARTP ; Only used for Hi3559AV100*/
VENC_GOPMODE_BIPREDB = 4, /* BIPREDB ;Only used for Hi3559AV100/Hi3519AV100*/
VENC_GOPMODE_LOWDELAYB = 5, /* LOWDELAYB; Not support */
VENC_GOPMODE_BUTT,
} VENC_GOP_MODE_E;
/* the attribute of the normalp */
typedef struct hiVENC_GOP_NORMALP_S {
HI_S32 s32IPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and I frame */
} VENC_GOP_NORMALP_S;
/* the attribute of the dualp */
typedef struct hiVENC_GOP_DUALP_S {
HI_U32 u32SPInterval; /* RW; Range:[0, 65536]; Interval of the special P frames,1 is not supported and should be less than Gop */
HI_S32 s32SPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and special P frame */
HI_S32 s32IPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and I frame */
} VENC_GOP_DUALP_S;
/* the attribute of the smartp */
typedef struct hiVENC_GOP_SMARTP_S {
HI_U32 u32BgInterval; /* RW; Interval of the long-term reference frame, can not be less than gop*/
HI_S32 s32BgQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and Bg frame */
HI_S32 s32ViQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and virtual I frame */
} VENC_GOP_SMARTP_S;
/* the attribute of the advsmartp */
typedef struct hiVENC_GOP_ADVSMARTP_S {
HI_U32 u32BgInterval; /* RW; Interval of the long-term reference frame, can not be less than gop*/
HI_S32 s32BgQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and Bg frame */
HI_S32 s32ViQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and virtual I frame */
} VENC_GOP_ADVSMARTP_S;
/* the attribute of the bipredb */
typedef struct hiVENC_GOP_BIPREDB_S {
HI_U32 u32BFrmNum; /* RW; Range:[1,3]; Number of B frames */
HI_S32 s32BQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and B frame */
HI_S32 s32IPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and I frame */
} VENC_GOP_BIPREDB_S;
/* the attribute of the gop */
typedef struct hiVENC_GOP_ATTR_S {
VENC_GOP_MODE_E enGopMode; /* RW; Encoding GOP type */
union {
VENC_GOP_NORMALP_S stNormalP; /*attributes of normal P*/
VENC_GOP_DUALP_S stDualP; /*attributes of dual P*/
VENC_GOP_SMARTP_S stSmartP; /*attributes of Smart P*/
VENC_GOP_ADVSMARTP_S stAdvSmartP; /*attributes of AdvSmart P*/
VENC_GOP_BIPREDB_S stBipredB; /*attributes of b */
};
} VENC_GOP_ATTR_S;
/* the attribute of the venc chnl */
typedef struct hiVENC_CHN_ATTR_S {
VENC_ATTR_S stVencAttr; /*the attribute of video encoder*/
VENC_RC_ATTR_S stRcAttr; /*the attribute of rate ctrl*/
VENC_GOP_ATTR_S stGopAttr; /*the attribute of gop*/
} VENC_CHN_ATTR_S;
/* the param of receive picture */
typedef struct hiVENC_RECV_PIC_PARAM_S {
HI_S32 s32RecvPicNum; /* RW; Range:[-1, 2147483647]; Number of frames received and encoded by the encoding channel,0 is not supported*/
} VENC_RECV_PIC_PARAM_S;
/* the status of the venc chnl */
typedef struct hiVENC_CHN_STATUS_S {
HI_U32 u32LeftPics; /* R; left picture number */
HI_U32 u32LeftStreamBytes; /* R; left stream bytes*/
HI_U32 u32LeftStreamFrames; /* R; left stream frames*/
HI_U32 u32CurPacks; /* R; pack number of current frame*/
HI_U32 u32LeftRecvPics; /* R; Number of frames to be received. This member is valid after HI_MPI_VENC_StartRecvPicEx is called.*/
HI_U32 u32LeftEncPics; /* R; Number of frames to be encoded. This member is valid after HI_MPI_VENC_StartRecvPicEx is called.*/
HI_BOOL bJpegSnapEnd; /* R; the end of Snap.*/
VENC_STREAM_INFO_S stVencStrmInfo;
} VENC_CHN_STATUS_S;
/* the param of the h264e slice split */
typedef struct hiVENC_H264_SLICE_SPLIT_S {
HI_BOOL bSplitEnable; /* RW; Range:[0,1]; slice split enable, HI_TRUE:enable, HI_FALSE:diable, default value:HI_FALSE*/
HI_U32 u32MbLineNum; /* RW; the max number is (Picture height + 15)/16; this value presents the mb line number of one slice*/
} VENC_H264_SLICE_SPLIT_S;
/* the param of the h264e intra pred */
typedef struct hiVENC_H264_INTRA_PRED_S {
HI_U32 constrained_intra_pred_flag; /* RW; Range:[0,1];default: HI_FALSE, see the H.264 protocol for the meaning*/
} VENC_H264_INTRA_PRED_S;
/* the param of the h264e trans */
typedef struct hiVENC_H264_TRANS_S {
HI_U32 u32IntraTransMode; /* RW; Range:[0,2]; Conversion mode for intra-prediction,0: trans4x4, trans8x8; 1: trans4x4, 2: trans8x8 */
HI_U32 u32InterTransMode; /* RW; Range:[0,2]; Conversion mode for inter-prediction,0: trans4x4, trans8x8; 1: trans4x4, 2: trans8x8 */
HI_BOOL bScalingListValid; /* RW; Range:[0,1]; enable Scaling,default: HI_FALSE */
HI_U8 InterScalingList8X8[64]; /* RW; Range:[1,255]; A quantization table for 8x8 inter-prediction*/
HI_U8 IntraScalingList8X8[64]; /* RW; Range:[1,255]; A quantization table for 8x8 intra-prediction*/
HI_S32 chroma_qp_index_offset; /* RW; Range:[-12,12];default value: 0, see the H.264 protocol for the meaning*/
} VENC_H264_TRANS_S;
/* the param of the h264e entropy */
typedef struct hiVENC_H264_ENTROPY_S {
HI_U32 u32EntropyEncModeI; /* RW; Range:[0,1]; Entropy encoding mode for the I frame, 0:cavlc, 1:cabac */
HI_U32 u32EntropyEncModeP; /* RW; Range:[0,1]; Entropy encoding mode for the P frame, 0:cavlc, 1:cabac */
HI_U32 u32EntropyEncModeB; /* RW; Range:[0,1]; Entropy encoding mode for the B frame, 0:cavlc, 1:cabac */
HI_U32 cabac_init_idc; /* RW; Range:[0,2]; see the H.264 protocol for the meaning */
} VENC_H264_ENTROPY_S;
/* the config of the h264e poc */
typedef struct hiVENC_H264_POC_S {
HI_U32 pic_order_cnt_type; /* RW; Range:[0,2]; see the H.264 protocol for the meaning */
} VENC_H264_POC_S;
/* the param of the h264e deblocking */
typedef struct hiVENC_H264_DBLK_S {
HI_U32 disable_deblocking_filter_idc; /* RW; Range:[0,2]; see the H.264 protocol for the meaning */
HI_S32 slice_alpha_c0_offset_div2; /* RW; Range:[-6,+6]; see the H.264 protocol for the meaning */
HI_S32 slice_beta_offset_div2; /* RW; Range:[-6,+6]; see the H.264 protocol for the meaning */
} VENC_H264_DBLK_S;
/* the param of the h264e vui timing info */
typedef struct hiVENC_H264_VUI_TIME_INFO_S {
HI_U8 timing_info_present_flag; /* RW; Range:[0,1]; If 1, timing info belows will be encoded into vui.*/
HI_U8 fixed_frame_rate_flag; /* RW; Range:[0,1]; see the H.264 protocol for the meaning. */
HI_U32 num_units_in_tick; /* RW; Range:(0,4294967295]; see the H.264 protocol for the meaning */
HI_U32 time_scale; /* RW; Range:(0,4294967295]; see the H.264 protocol for the meaning */
} VENC_VUI_H264_TIME_INFO_S;
/* the param of the vui aspct ratio */
typedef struct hiVENC_VUI_ASPECT_RATIO_S {
HI_U8 aspect_ratio_info_present_flag; /* RW; Range:[0,1]; If 1, aspectratio info belows will be encoded into vui */
HI_U8 aspect_ratio_idc; /* RW; Range:[0,255]; 17~254 is reserved,see the protocol for the meaning.*/
HI_U8 overscan_info_present_flag; /* RW; Range:[0,1]; If 1, oversacan info belows will be encoded into vui.*/
HI_U8 overscan_appropriate_flag; /* RW; Range:[0,1]; see the protocol for the meaning. */
HI_U16 sar_width; /* RW; Range:(0, 65535]; see the protocol for the meaning. */
HI_U16 sar_height ; /* RW; Range:(0, 65535]; see the protocol for the meaning.
notes: sar_width and sar_height shall be relatively prime.*/
} VENC_VUI_ASPECT_RATIO_S;
/* the param of the vui video signal */
typedef struct hiVENC_VUI_VIDEO_SIGNAL_S {
HI_U8 video_signal_type_present_flag ; /* RW; Range:[0,1]; If 1, video singnal info will be encoded into vui. */
HI_U8 video_format ; /* RW; H.264e Range:[0,7], H.265e Range:[0,5]; see the protocol for the meaning. */
HI_U8 video_full_range_flag; /* RW; Range: [0,1]; see the protocol for the meaning.*/
HI_U8 colour_description_present_flag ; /* RO; Range: [0,1]; see the protocol for the meaning.*/
HI_U8 colour_primaries ; /* RO; Range: [0,255]; see the protocol for the meaning. */
HI_U8 transfer_characteristics; /* RO; Range: [0,255]; see the protocol for the meaning. */
HI_U8 matrix_coefficients; /* RO; Range:[0,255]; see the protocol for the meaning. */
} VENC_VUI_VIDEO_SIGNAL_S;
/* the param of the vui video signal */
typedef struct hiVENC_VUI_BITSTREAM_RESTRIC_S {
HI_U8 bitstream_restriction_flag ; /* RW; Range: [0,1]; see the protocol for the meaning.*/
} VENC_VUI_BITSTREAM_RESTRIC_S;
/* the param of the h264e vui */
typedef struct hiVENC_H264_VUI_S {
VENC_VUI_ASPECT_RATIO_S stVuiAspectRatio;
VENC_VUI_H264_TIME_INFO_S stVuiTimeInfo;
VENC_VUI_VIDEO_SIGNAL_S stVuiVideoSignal;
VENC_VUI_BITSTREAM_RESTRIC_S stVuiBitstreamRestric;
} VENC_H264_VUI_S;
/* the param of the h265e vui timing info */
typedef struct hiVENC_VUI_H265_TIME_INFO_S {
HI_U32 timing_info_present_flag; /* RW; Range:[0,1]; If 1, timing info belows will be encoded into vui.*/
HI_U32 num_units_in_tick; /* RW; Range:[0,4294967295]; see the H.265 protocol for the meaning. */
HI_U32 time_scale; /* RW; Range:(0,4294967295]; see the H.265 protocol for the meaning */
HI_U32 num_ticks_poc_diff_one_minus1; /* RW; Range:(0,4294967294]; see the H.265 protocol for the meaning */
} VENC_VUI_H265_TIME_INFO_S;
/* the param of the h265e vui */
typedef struct hiVENC_H265_VUI_S {
VENC_VUI_ASPECT_RATIO_S stVuiAspectRatio;
VENC_VUI_H265_TIME_INFO_S stVuiTimeInfo;
VENC_VUI_VIDEO_SIGNAL_S stVuiVideoSignal;
VENC_VUI_BITSTREAM_RESTRIC_S stVuiBitstreamRestric;
} VENC_H265_VUI_S;
/* the param of the jpege */
typedef struct hiVENC_JPEG_PARAM_S {
HI_U32 u32Qfactor; /* RW; Range:[1,99]; Qfactor value */
HI_U8 u8YQt[64]; /* RW; Range:[1, 255]; Y quantization table */
HI_U8 u8CbQt[64]; /* RW; Range:[1, 255]; Cb quantization table */
HI_U8 u8CrQt[64]; /* RW; Range:[1, 255]; Cr quantization table */
HI_U32 u32MCUPerECS; /* RW; the max MCU number is (picwidth + 15) >> 4 x (picheight +
15) >> 4 x 2]; MCU number of one ECS*/
} VENC_JPEG_PARAM_S;
/* the param of the mjpege */
typedef struct hiVENC_MJPEG_PARAM_S {
HI_U8 u8YQt[64]; /* RW; Range:[1, 255]; Y quantization table */
HI_U8 u8CbQt[64]; /* RW; Range:[1, 255]; Cb quantization table */
HI_U8 u8CrQt[64]; /* RW; Range:[1, 255]; Cr quantization table */
HI_U32 u32MCUPerECS; /* RW; the max MCU number is (picwidth + 15) >> 4 x (picheight +
15) >> 4 x 2]; MCU number of one ECS*/
} VENC_MJPEG_PARAM_S;
/* the param of the ProRes */
typedef struct hiVENC_PRORES_PARAM_S {
HI_U8 u8LumaQt[64]; /* RW; Range:[1, 255]; Luma quantization table */
HI_U8 u8ChromaQt[64]; /* RW; Range:[1, 255]; Chroma quantization table */
HI_CHAR encoder_identifier[4]; /* RW: identifies the encoder vendor or product that generated the compressed frame*/
} VENC_PRORES_PARAM_S;
/* the attribute of the roi */
typedef struct hiVENC_ROI_ATTR_S {
HI_U32 u32Index; /* RW; Range:[0, 7]; Index of an ROI. The system supports indexes ranging from 0 to 7 */
HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable this ROI */
HI_BOOL bAbsQp; /* RW; Range:[0, 1]; QP mode of an ROI.HI_FALSE: relative QP.HI_TURE: absolute QP.*/
HI_S32 s32Qp; /* RW; Range:[-51, 51]; QP value,only relative mode can QP value less than 0. */
RECT_S stRect; /* RW; Region of an ROI*/
} VENC_ROI_ATTR_S;
/* ROI struct */
typedef struct hiVENC_ROI_ATTR_EX_S {
HI_U32 u32Index; /* RW; Range:[0, 7]; Index of an ROI. The system supports indexes ranging from 0 to 7 */
HI_BOOL bEnable[3]; /* RW; Range:[0, 1]; Subscript of array 0: I Frame; 1: P/B Frame; 2: VI Frame; other params are the same. */
HI_BOOL bAbsQp[3]; /* RW; Range:[0, 1]; QP mode of an ROI.HI_FALSE: relative QP.HI_TURE: absolute QP.*/
HI_S32 s32Qp[3]; /* RW; Range:[-51, 51]; QP value,only relative mode can QP value less than 0. */
RECT_S stRect[3]; /* RW;Region of an ROI*/
}VENC_ROI_ATTR_EX_S;
/* the param of the roibg frame rate */
typedef struct hiVENC_ROIBG_FRAME_RATE_S {
HI_S32 s32SrcFrmRate; /* RW; Range:[-1, 2147483647];Source frame rate of a non-ROI,can not be configured 0*/
HI_S32 s32DstFrmRate; /* RW; Range:[-1, 2147483647];Target frame rate of a non-ROI,can not be larger than s32SrcFrmRate*/
} VENC_ROIBG_FRAME_RATE_S;
/* the param of the roibg frame rate */
typedef struct hiVENC_REF_PARAM_S {
HI_U32 u32Base; /* RW; Range:[0,4294967295]; Base layer period*/
HI_U32 u32Enhance; /* RW; Range:[0,255]; Enhance layer period*/
HI_BOOL bEnablePred; /* RW; Range:[0, 1]; Whether some frames at the base layer are referenced by other frames at the base layer. When bEnablePred is HI_FALSE, all frames at the base layer reference IDR frames.*/
} VENC_REF_PARAM_S;
/* Jpeg snap mode */
typedef enum hiVENC_JPEG_ENCODE_MODE_E {
JPEG_ENCODE_ALL = 0, /* Jpeg channel snap all the pictures when started. */
JPEG_ENCODE_SNAP = 1, /* Jpeg channel snap the flashed pictures when started. */
JPEG_ENCODE_BUTT,
} VENC_JPEG_ENCODE_MODE_E;
/* the information of the stream */
typedef struct hiVENC_STREAM_BUF_INFO_S {
HI_U64 u64PhyAddr[MAX_TILE_NUM]; /* R; Start physical address for a stream buffer */
HI_VOID ATTRIBUTE* pUserAddr[MAX_TILE_NUM]; /* R; Start virtual address for a stream buffer */
HI_U64 ATTRIBUTE u64BufSize[MAX_TILE_NUM]; /* R; Stream buffer size */
} VENC_STREAM_BUF_INFO_S;
/* the param of the h265e slice split */
typedef struct hiVENC_H265_SLICE_SPLIT_S {
HI_BOOL bSplitEnable; /* RW; Range:[0,1]; slice split enable, HI_TRUE:enable, HI_FALSE:diable, default value:HI_FALSE */
HI_U32 u32LcuLineNum; /* RW; Range:(Picture height + lcu size minus one)/lcu size;this value presents lcu line number */
} VENC_H265_SLICE_SPLIT_S;
/* the param of the h265e pu */
typedef struct hiVENC_H265_PU_S {
HI_U32 constrained_intra_pred_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
HI_U32 strong_intra_smoothing_enabled_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
} VENC_H265_PU_S;
/* the param of the h265e trans */
typedef struct hiVENC_H265_TRANS_S {
HI_S32 cb_qp_offset; /* RW; Range:[-12,12]; see the H.265 protocol for the meaning. */
HI_S32 cr_qp_offset; /* RW; Range:[-12,12]; see the H.265 protocol for the meaning. */
HI_BOOL bScalingListEnabled; /* RW; Range:[0,1]; If 1, specifies that a scaling list is used.*/
HI_BOOL bScalingListTu4Valid; /* RW; Range:[0,1]; If 1, ScalingList4X4 belows will be encoded.*/
HI_U8 InterScalingList4X4[2][16]; /* RW; Range:[1,255]; Scaling List for inter 4X4 block.*/
HI_U8 IntraScalingList4X4[2][16]; /* RW; Range:[1,255]; Scaling List for intra 4X4 block.*/
HI_BOOL bScalingListTu8Valid; /* RW; Range:[0,1]; If 1, ScalingList8X8 belows will be encoded.*/
HI_U8 InterScalingList8X8[2][64]; /* RW; Range:[1,255]; Scaling List for inter 8X8 block.*/
HI_U8 IntraScalingList8X8[2][64]; /* RW; Range:[1,255]; Scaling List for intra 8X8 block.*/
HI_BOOL bScalingListTu16Valid; /* RW; Range:[0,1]; If 1, ScalingList16X16 belows will be encoded.*/
HI_U8 InterScalingList16X16[2][64]; /* RW; Range:[1,255]; Scaling List for inter 16X16 block..*/
HI_U8 IntraScalingList16X16[2][64]; /* RW; Range:[1,255]; Scaling List for inter 16X16 block.*/
HI_BOOL bScalingListTu32Valid; /* RW; Range:[0,1]; If 1, ScalingList32X32 belows will be encoded.*/
HI_U8 InterScalingList32X32[64]; /* RW; Range:[1,255]; Scaling List for inter 32X32 block..*/
HI_U8 IntraScalingList32X32[64]; /* RW; Range:[1,255]; Scaling List for inter 32X32 block.*/
} VENC_H265_TRANS_S;
/* the param of the h265e entroy */
typedef struct hiVENC_H265_ENTROPY_S {
HI_U32 cabac_init_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
} VENC_H265_ENTROPY_S;
/* the param of the h265e deblocking */
typedef struct hiVENC_H265_DBLK_S {
HI_U32 slice_deblocking_filter_disabled_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
HI_S32 slice_beta_offset_div2; /* RW; Range:[-6,6]; see the H.265 protocol for the meaning. */
HI_S32 slice_tc_offset_div2; /* RW; Range:[-6,6]; see the H.265 protocol for the meaning. */
} VENC_H265_DBLK_S;
/* the param of the h265e sao */
typedef struct hiVENC_H265_SAO_S {
HI_U32 slice_sao_luma_flag; /*RW; Range:[0,1]; Indicates whether SAO filtering is performed on the luminance component of the current slice. */
HI_U32 slice_sao_chroma_flag; /*RW; Range:[0,1]; Indicates whether SAO filtering is performed on the chrominance component of the current slice*/
} VENC_H265_SAO_S;
/* venc mode type */
typedef enum hiVENC_INTRA_REFRESH_MODE_E {
INTRA_REFRESH_ROW = 0, /* Line mode */
INTRA_REFRESH_COLUMN, /* Column mode */
INTRA_REFRESH_BUTT
} VENC_INTRA_REFRESH_MODE_E;
/* the param of the intra refresh */
typedef struct hiVENC_INTRA_REFRESH_S {
HI_BOOL bRefreshEnable; /*RW; Range:[0,1]; intra refresh enable, HI_TRUE:enable, HI_FALSE:diable, default value:HI_FALSE*/
VENC_INTRA_REFRESH_MODE_E enIntraRefreshMode; /*RW; The mode of intra refresh*/
HI_U32 u32RefreshNum; /*RW; Number of rows/column to be refreshed during each I macroblock refresh*/
HI_U32 u32ReqIQp; /*RW; Range:[0,51]; QP value of the I frame*/
} VENC_INTRA_REFRESH_S;
/* venc mode type */
typedef enum hiVENC_MODTYPE_E {
MODTYPE_VENC = 1, /* VENC */
MODTYPE_H264E, /* H264e */
MODTYPE_H265E, /* H265e */
MODTYPE_JPEGE, /* Jpege */
MODTYPE_RC, /* Rc */
MODTYPE_BUTT
} VENC_MODTYPE_E;
/* the param of the h264e mod */
typedef struct hiVENC_MOD_H264E_S {
HI_U32 u32OneStreamBuffer; /* RW; Range:[0,1]; one stream buffer*/
HI_U32 u32H264eMiniBufMode; /* RW; Range:[0,1]; H264e MiniBufMode*/
HI_U32 u32H264ePowerSaveEn; /* RW; Range:[0,1]; H264e PowerSaveEn*/
VB_SOURCE_E enH264eVBSource; /* RW; H264e VBSource*/
HI_BOOL bQpHstgrmEn; /* RW; Range:[0,1]*/
} VENC_MOD_H264E_S;
/* the param of the h265e mod */
typedef struct hiVENC_MOD_H265E_S {
HI_U32 u32OneStreamBuffer; /* RW; Range:[0,1]; one stream buffer*/
HI_U32 u32H265eMiniBufMode; /* RW; Range:[0,1]; H265e MiniBufMode*/
HI_U32 u32H265ePowerSaveEn; /* RW; Range:[0,2]; H265e PowerSaveEn*/
VB_SOURCE_E enH265eVBSource; /* RW; H265e VBSource*/
HI_BOOL bQpHstgrmEn; /* RW; Range:[0,1]*/
} VENC_MOD_H265E_S;
/* the param of the jpege mod */
typedef struct hiVENC_MOD_JPEGE_S {
HI_U32 u32OneStreamBuffer; /* RW; Range:[0,1]; one stream buffer*/
HI_U32 u32JpegeMiniBufMode; /* RW; Range:[0,1]; Jpege MiniBufMode*/
HI_U32 u32JpegClearStreamBuf; /* RW; Range:[0,1]; JpegClearStreamBuf*/
HI_U32 u32JpegeDeringMode; /* RW; Range:[0,1]; Jpege Dering Mode */
} VENC_MOD_JPEGE_S;
typedef struct hiVENC_MOD_RC_S {
HI_U32 u32ClrStatAfterSetBr;
} VENC_MOD_RC_S;
/* the param of the venc mod */
typedef struct hiVENC_MOD_VENC_S {
HI_U32 u32VencBufferCache; /* RW; Range:[0,1]; VencBufferCache*/
HI_U32 u32FrameBufRecycle; /* RW; Range:[0,1]; FrameBufRecycle*/
} VENC_MOD_VENC_S;
/* the param of the mod */
typedef struct hiVENC_MODPARAM_S {
VENC_MODTYPE_E enVencModType; /* RW; VencModType*/
union {
VENC_MOD_VENC_S stVencModParam;
VENC_MOD_H264E_S stH264eModParam;
VENC_MOD_H265E_S stH265eModParam;
VENC_MOD_JPEGE_S stJpegeModParam;
VENC_MOD_RC_S stRcModParam;
};
} VENC_PARAM_MOD_S;
typedef enum hiVENC_FRAME_TYPE_E {
VENC_FRAME_TYPE_NONE = 1,
VENC_FRAME_TYPE_IDR,
VENC_FRAME_TYPE_BUTT
} VENC_FRAME_TYPE_E;
/* the information of the user rc*/
typedef struct hiUSER_RC_INFO_S {
HI_BOOL bQpMapValid; /* RW; Range:[0,1]; Indicates whether the QpMap mode is valid for the current frame*/
HI_BOOL bSkipWeightValid; /* RW; Range:[0,1]; Indicates whether the SkipWeight mode is valid for the current frame*/
HI_U32 u32BlkStartQp; /* RW; Range:[0,51];QP value of the first 16 x 16 block in QpMap mode */
HI_U64 u64QpMapPhyAddr; /* RW; Physical address of the QP table in QpMap mode*/
HI_U64 u64SkipWeightPhyAddr; /* RW; Physical address of the SkipWeight table in QpMap mode*/
VENC_FRAME_TYPE_E enFrameType; /* RW; Encoding frame type of the current frame */
} USER_RC_INFO_S;
/* the information of the user frame*/
typedef struct hiUSER_FRAME_INFO_S {
VIDEO_FRAME_INFO_S stUserFrame;
USER_RC_INFO_S stUserRcInfo;
} USER_FRAME_INFO_S;
/* the config of the sse*/
typedef struct hiVENC_SSE_CFG_S {
HI_U32 u32Index; /* RW; Range:[0, 7]; Index of an SSE. The system supports indexes ranging from 0 to 7 */
HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable SSE */
RECT_S stRect; /* RW; */
} VENC_SSE_CFG_S;
/* the param of the crop */
typedef struct hiVENC_CROP_INFO_S {
HI_BOOL bEnable; /* RW; Range:[0, 1]; Crop region enable */
RECT_S stRect; /* RW; Crop region, note: s32X must be multi of 16 */
} VENC_CROP_INFO_S;
/* the param of the venc frame rate */
typedef struct hiVENC_FRAME_RATE_S {
HI_S32 s32SrcFrmRate; /* RW; Range:[0, 240]; Input frame rate of a channel*/
HI_S32 s32DstFrmRate; /* RW; Range:[0, 240]; Output frame rate of a channel*/
} VENC_FRAME_RATE_S;
/* the param of the venc encode chnl */
typedef struct hiVENC_CHN_PARAM_S {
HI_BOOL bColor2Grey; /* RW; Range:[0, 1]; Whether to enable Color2Grey.*/
HI_U32 u32Priority; /* RW; Range:[0, 1]; The priority of the coding chnl.*/
HI_U32 u32MaxStrmCnt; /* RW: Range:[0,4294967295]; Maximum number of frames in a stream buffer*/
HI_U32 u32PollWakeUpFrmCnt; /* RW: Range:(0,4294967295]; the frame num needed to wake up obtaining streams */
VENC_CROP_INFO_S stCropCfg;
VENC_FRAME_RATE_S stFrameRate;
} VENC_CHN_PARAM_S;
/*the ground protect of FOREGROUND*/
typedef struct hiVENC_FOREGROUND_PROTECT_S {
HI_BOOL bForegroundCuRcEn;
HI_U32 u32ForegroundDirectionThresh; /*RW; Range:[0, 16]; The direction for controlling the macroblock-level bit rate*/
HI_U32 u32ForegroundThreshGain; /*RW; Range:[0, 15]; The gain of the thresh*/
HI_U32 u32ForegroundThreshOffset; /*RW; Range:[0, 255]; The offset of the thresh*/
HI_U32 u32ForegroundThreshP[RC_TEXTURE_THR_SIZE]; /*RW; Range:[0, 255]; Mad threshold for controlling the foreground macroblock-level bit rate of P frames */
HI_U32 u32ForegroundThreshB[RC_TEXTURE_THR_SIZE]; /*RW; Range:[0, 255]; Mad threshold for controlling the foreground macroblock-level bit rate of B frames */
} VENC_FOREGROUND_PROTECT_S;
/* the scene mode of the venc encode chnl */
typedef enum hiVENC_SCENE_MODE_E {
SCENE_0 = 0, /* RW; A scene in which the camera does not move or periodically moves continuously*/
SCENE_1 = 1, /* RW; Motion scene at high bit rate*/
SCENE_2 = 2, /* RW; It has regular continuous motion at medium bit rate and the encoding pressure is relatively large*/
SCENE_BUTT
} VENC_SCENE_MODE_E;
/* not support for Hi3559AV100/Hi3559v200/Hi3556v200 */
typedef struct hiVENC_DEBREATHEFFECT_S {
HI_BOOL bEnable; /* RW; Range:[0,1];default: 0, DeBreathEffect enable */
HI_S32 s32Strength0; /* RW; Range:[0,35];The Strength0 of DeBreathEffect.*/
HI_S32 s32Strength1; /* RW; Range:[0,35];The Strength1 of DeBreathEffect.*/
} VENC_DEBREATHEFFECT_S;
typedef struct hiVENC_CU_PREDICTION_S {
OPERATION_MODE_E enPredMode; /* RW; CU tendency configuration mode */
HI_U32 u32Intra32Cost; /* RW; Range:[0,15]; Tendency adjustment in Intra32 mode*/
HI_U32 u32Intra16Cost; /* RW; Range:[0,15]; Tendency adjustment in Intra16 mode*/
HI_U32 u32Intra8Cost; /* RW; Range:[0,15]; Tendency adjustment in Intra8 mode*/
HI_U32 u32Intra4Cost; /* RW; Range:[0,15]; Tendency adjustment in Intra4 mode*/
HI_U32 u32Inter64Cost; /* RW; Range:[0,15]; Tendency adjustment in Intra64 mode*/
HI_U32 u32Inter32Cost; /* RW; Range:[0,15]; Tendency adjustment in Inter32 mode*/
HI_U32 u32Inter16Cost; /* RW; Range:[0,15]; Tendency adjustment in Inter16 mode*/
HI_U32 u32Inter8Cost; /* RW; Range:[0,15]; Tendency adjustment in Inter8 mode*/
} VENC_CU_PREDICTION_S;
typedef struct hiVENC_SKIP_BIAS_S {
HI_BOOL bSkipBiasEn; /* RW; Range:[0,1]; Flag indicating whether the skip tendency function is enabled*/
HI_U32 u32SkipThreshGain; /* RW; Range:[0,15]; used to calculate the SAD threshold for foreground detection*/
HI_U32 u32SkipThreshOffset; /* RW; Range:[0,255]; used to calculate the SAD threshold for foreground detection*/
HI_U32 u32SkipBackgroundCost; /* RW; Range:[0,15]; Skip tendency adjustment in the background*/
HI_U32 u32SkipForegroundCost; /* RW; Range:[0,15]; Skip tendency adjustment in the foreground*/
} VENC_SKIP_BIAS_S;
typedef struct hiVENC_HIERARCHICAL_QP_S {
HI_BOOL bHierarchicalQpEn; /* RW; Range:[0,1]; Hierarchical QP enable*/
HI_S32 s32HierarchicalQpDelta[4]; /* RW; Range:[-10,10]; QP delta of the frames at each layer relative to the P-frame at layer 0*/
HI_S32 s32HierarchicalFrameNum[4]; /* RW; Range:[0,5]; Number of frames at each layer*/
} VENC_HIERARCHICAL_QP_S;
typedef struct hiVENC_CHN_POOL_S {
VB_POOL hPicVbPool; /* RW; vb pool id for pic buffer */
VB_POOL hPicInfoVbPool; /* RW; vb pool id for pic info buffer */
} VENC_CHN_POOL_S;
typedef struct hiVENC_RC_ADVPARAM_S {
HI_U32 u32ClearStatAfterSetAttr; /* RW; Range:[0,1]; Clear Stat After SetAttr enable */
} VENC_RC_ADVPARAM_S;
typedef enum hiFG_REGION_TYPE_E {
FG_REGION_PEOPLE = 0,
FG_REGION_FACE,
FG_REGION_BUTT
} FG_REGION_TYPE_E;
typedef struct {
HI_U8 u8QpmapValueI; /* RW;Range: [0, 255] */
HI_U8 u8QpmapValueP; /* RW;Range: [0, 255] */
HI_U8 u8SkipmapValue; /* RW;Range: [0, 255] */
} VENC_SVC_MAP_PARAM_S;
typedef struct {
VENC_SVC_MAP_PARAM_S stFgRegion[FG_REGION_BUTT];
VENC_SVC_MAP_PARAM_S stActivityRegion;
VENC_SVC_MAP_PARAM_S stBgRegion;
HI_BOOL bFgProtectAdaptiveEn; /* RW;Range: [0, 1] */
} VENC_SVC_PARAM_S;
typedef struct {
HI_U16 u16SceneComplexity; /* R;Range: [0, 65535], Proportional to total area of detected objects */
HI_U8 u8ObjectLevel; /* R;Range: [0, 2], Related to total number of detected objects */
} VENC_SVC_DETECT_RESULT_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_VENC_H__ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2013-2019. All rights reserved.
* Description: Common struct definition for VGS
* Author: Hisilicon multimedia software group
* Create: 2013-07-24
*/
#ifndef __HI_COMM_VGS_H__
#define __HI_COMM_VGS_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
/* failure caused by malloc buffer */
#define HI_ERR_VGS_NOBUF HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
#define HI_ERR_VGS_BUF_EMPTY HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
#define HI_ERR_VGS_NULL_PTR HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_VGS_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_VGS_BUF_FULL HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
#define HI_ERR_VGS_SYS_NOTREADY HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_VGS_NOT_SUPPORT HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#define HI_ERR_VGS_NOT_PERMITTED HI_DEF_ERR(HI_ID_VGS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define VGS_PRIVATE_DATA_LEN 6
typedef HI_S32 VGS_HANDLE;
typedef enum hiVGS_COLOR_REVERT_MODE_E {
VGS_COLOR_REVERT_NONE = 0, /* Not revert */
VGS_COLOR_REVERT_RGB, /* Revert RGB */
VGS_COLOR_REVERT_ALPHA, /* Revert alpha */
VGS_COLOR_REVERT_BOTH, /* Revert RGB and alpha */
VGS_COLOR_REVERT_BUTT
} VGS_COLOR_REVERT_MODE_E;
typedef struct hiVGS_OSD_REVERT_S {
RECT_S stSrcRect; /* OSD color revert area */
VGS_COLOR_REVERT_MODE_E enColorRevertMode; /* OSD color revert mode */
} VGS_OSD_REVERT_S;
typedef struct hiVGS_TASK_ATTR_S {
VIDEO_FRAME_INFO_S stImgIn; /* Input picture */
VIDEO_FRAME_INFO_S stImgOut; /* Output picture */
HI_U64 au64PrivateData[4]; /* RW; Private data of task */
HI_U32 reserved; /* RW; Debug information,state of current picture */
} VGS_TASK_ATTR_S;
typedef struct hiVGS_DRAW_LINE_S {
POINT_S stStartPoint; /* Line start point */
POINT_S stEndPoint; /* Line end point */
HI_U32 u32Thick; /* RW; Width of line */
HI_U32 u32Color; /* RW; Range: [0,0xFFFFFF]; Color of line */
} VGS_DRAW_LINE_S;
typedef enum hiVGS_COVER_TYPE_E {
COVER_RECT = 0, /* Retangle cover */
COVER_QUAD_RANGLE, /* Quadrangle cover */
COVER_BUTT
} VGS_COVER_TYPE_E;
typedef struct hiVGS_QUADRANGLE_COVER_S {
HI_BOOL bSolid; /* Solid or hollow cover */
HI_U32 u32Thick; /* RW; Range: [2,8]; Thick of the hollow quadrangle */
POINT_S stPoint[4]; /* Four points of the quadrangle */
} VGS_QUADRANGLE_COVER_S;
typedef struct hiVGS_ADD_COVER_S {
VGS_COVER_TYPE_E enCoverType; /* Cover type */
union {
RECT_S stDstRect; /* The rectangle area */
VGS_QUADRANGLE_COVER_S stQuadRangle; /* The quadrangle area */
};
HI_U32 u32Color; /* RW; Range: [0,0xFFFFFF]; Color of cover */
} VGS_ADD_COVER_S;
typedef struct hiVGS_ADD_OSD_S {
RECT_S stRect; /* Osd area */
HI_U32 u32BgColor; /* RW; Background color of osd, depends on pixel format of osd,
ARGB8888:[0,0xFFFFFFFF], ARGB4444:[0,0xFFFF], ARGB1555:[0,0x1FFF] */
PIXEL_FORMAT_E enPixelFmt; /* Pixel format of osd */
HI_U64 u64PhyAddr; /* RW; Physical address of osd */
HI_U32 u32Stride; /* RW; Range: [32,8192]; Stride of osd */
HI_U32 u32BgAlpha; /* RW; Range: [0,255]; Background alpha of osd */
HI_U32 u32FgAlpha; /* RW; Range: [0,255]; Foreground alpha of osd */
HI_BOOL bOsdRevert; /* RW; Enable osd color revert */
VGS_OSD_REVERT_S stOsdRevert; /* Osd color revert information */
HI_U16 u16ColorLUT[2];
} VGS_ADD_OSD_S;
typedef enum hiVGS_SCLCOEF_MODE_E {
VGS_SCLCOEF_NORMAL = 0, /* normal scale coefficient */
VGS_SCLCOEF_TAP2 = 1, /* scale coefficient of 2 tap */
VGS_SCLCOEF_TAP4 = 2, /* scale coefficient of 4 tap */
VGS_SCLCOEF_TAP6 = 3, /* scale coefficient of 6 tap */
VGS_SCLCOEF_TAP8 = 4, /* scale coefficient of 8 tap */
VGS_SCLCOEF_BUTT
} VGS_SCLCOEF_MODE_E;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_VGS_H__ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2012-2018. All rights reserved.
* Description: hi_comm_vi.h
* Author:
* Create: 2016-09-19
*/
#ifndef __HI_COMM_VI_H__
#define __HI_COMM_VI_H__
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#include "hi_comm_gdc.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#define VI_MAX_ADCHN_NUM (4UL)
#define VI_PMFCOEF_NUM (9UL)
#define VI_COMPMASK_NUM (2UL)
#define VI_PRO_MAX_FRAME_NUM (8UL)
#define VI_INVALID_FRMRATE (-1)
#define VI_CHN0 0
#define VI_CHN1 1
#define VI_CHN2 2
#define VI_CHN3 3
#define VI_INVALID_CHN (-1)
#define VI_MAX_VC_NUM 4
typedef struct hiVI_LOW_DELAY_INFO_S {
HI_BOOL bEnable; /* RW; Low delay enable. */
HI_U32 u32LineCnt; /* RW; Range: [32, 16384]; Low delay shoreline. */
} VI_LOW_DELAY_INFO_S;
/* Information of raw data cmpresss param */
typedef struct hiVI_CMP_PARAM_S {
HI_U8 au8CmpParam[VI_CMP_PARAM_SIZE];
} VI_CMP_PARAM_S;
typedef enum hi_VI_USERPIC_MODE_E {
VI_USERPIC_MODE_PIC = 0, /* YUV picture */
VI_USERPIC_MODE_BGC, /* Background picture only with a color */
VI_USERPIC_MODE_BUTT,
} VI_USERPIC_MODE_E;
typedef struct hiVI_USERPIC_BGC_S {
HI_U32 u32BgColor;
} VI_USERPIC_BGC_S;
typedef struct hiVI_USERPIC_ATTR_S {
VI_USERPIC_MODE_E enUsrPicMode; /* User picture mode */
union {
VIDEO_FRAME_INFO_S stUsrPicFrm; /* Information about a YUV picture */
VI_USERPIC_BGC_S stUsrPicBg; /* Information about a background picture only with a color */
} unUsrPic;
} VI_USERPIC_ATTR_S;
typedef enum hiEN_VI_ERR_CODE_E {
ERR_VI_FAILED_NOTENABLE = 64, /* device or channel not enable */
ERR_VI_FAILED_NOTDISABLE, /* device not disable */
ERR_VI_FAILED_CHNOTDISABLE, /* channel not disable */
ERR_VI_CFG_TIMEOUT, /* config timeout */
ERR_VI_NORM_UNMATCH, /* video norm of ADC and VIU is unmatch */
ERR_VI_INVALID_WAYID, /* invlalid way ID */
ERR_VI_INVALID_PHYCHNID, /* invalid phychn id */
ERR_VI_FAILED_NOTBIND, /* device or channel not bind */
ERR_VI_FAILED_BINDED, /* device or channel not unbind */
ERR_VI_DIS_PROCESS_FAIL /* dis process failed */
} EN_VI_ERR_CODE_E;
#define HI_ERR_VI_INVALID_PARA HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_VI_INVALID_DEVID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
#define HI_ERR_VI_INVALID_PIPEID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_PIPEID)
#define HI_ERR_VI_INVALID_STITCHGRPID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_STITCHGRPID)
#define HI_ERR_VI_INVALID_CHNID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
#define HI_ERR_VI_INVALID_NULL_PTR HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_VI_FAILED_NOTCONFIG HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
#define HI_ERR_VI_SYS_NOTREADY HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_VI_BUF_EMPTY HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
#define HI_ERR_VI_BUF_FULL HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
#define HI_ERR_VI_NOMEM HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
#define HI_ERR_VI_NOT_SUPPORT HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#define HI_ERR_VI_BUSY HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_VI_NOT_PERM HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_VI_FAILED_NOTENABLE HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTENABLE)
#define HI_ERR_VI_FAILED_NOTDISABLE HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTDISABLE)
#define HI_ERR_VI_FAILED_CHNOTDISABLE HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_CHNOTDISABLE)
#define HI_ERR_VI_CFG_TIMEOUT HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_CFG_TIMEOUT)
#define HI_ERR_VI_NORM_UNMATCH HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_NORM_UNMATCH)
#define HI_ERR_VI_INVALID_WAYID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_INVALID_WAYID)
#define HI_ERR_VI_INVALID_PHYCHNID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_INVALID_PHYCHNID)
#define HI_ERR_VI_FAILED_NOTBIND HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTBIND)
#define HI_ERR_VI_FAILED_BINDED HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_BINDED)
#define HI_ERR_VI_PIPE_EXIST HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
#define HI_ERR_VI_PIPE_UNEXIST HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* interface mode of video input */
typedef enum hiVI_INTF_MODE_E {
VI_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */
VI_MODE_BT656_PACKED_YUV, /* ITU-R BT.656 packed YUV4:2:2 */
VI_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */
VI_MODE_DIGITAL_CAMERA, /* digatal camera mode */
VI_MODE_BT1120_STANDARD, /* BT.1120 progressive mode */
VI_MODE_BT1120_INTERLEAVED, /* BT.1120 interstage mode */
VI_MODE_MIPI, /* MIPI RAW mode */
VI_MODE_MIPI_YUV420_NORMAL, /* MIPI YUV420 normal mode */
VI_MODE_MIPI_YUV420_LEGACY, /* MIPI YUV420 legacy mode */
VI_MODE_MIPI_YUV422, /* MIPI YUV422 mode */
VI_MODE_LVDS, /* LVDS mode */
VI_MODE_HISPI, /* HiSPi mode */
VI_MODE_SLVS, /* SLVS mode */
VI_MODE_BUTT
} VI_INTF_MODE_E;
/* Input mode */
typedef enum hiVI_INPUT_MODE_E {
VI_INPUT_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */
VI_INPUT_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */
VI_INPUT_MODE_DIGITAL_CAMERA, /* digatal camera mode */
VI_INPUT_MODE_INTERLEAVED, /* interstage mode */
VI_INPUT_MODE_MIPI, /* MIPI mode */
VI_INPUT_MODE_LVDS, /* LVDS mode */
VI_INPUT_MODE_HISPI, /* HiSPi mode */
VI_INPUT_MODE_SLVS, /* SLVS mode */
VI_INPUT_MODE_BUTT
} VI_INPUT_MODE_E;
/* Work mode */
typedef enum hiVI_WORK_MODE_E {
VI_WORK_MODE_1Multiplex = 0, /* 1 Multiplex mode */
VI_WORK_MODE_2Multiplex, /* 2 Multiplex mode */
VI_WORK_MODE_3Multiplex, /* 3 Multiplex mode */
VI_WORK_MODE_4Multiplex, /* 4 Multiplex mode */
VI_WORK_MODE_BUTT
} VI_WORK_MODE_E;
/* whether an input picture is interlaced or progressive */
typedef enum hiVI_SCAN_MODE_E {
VI_SCAN_INTERLACED = 0, /* interlaced mode */
VI_SCAN_PROGRESSIVE, /* progressive mode */
VI_SCAN_BUTT
} VI_SCAN_MODE_E;
/* Sequence of YUV data */
typedef enum hiVI_YUV_DATA_SEQ_E {
VI_DATA_SEQ_VUVU = 0, /* The input sequence of the second component(only contains u and v) in BT.
1120 mode is VUVU */
VI_DATA_SEQ_UVUV, /* The input sequence of the second component(only contains u and v) in BT.
1120 mode is UVUV */
VI_DATA_SEQ_UYVY, /* The input sequence of YUV is UYVY */
VI_DATA_SEQ_VYUY, /* The input sequence of YUV is VYUY */
VI_DATA_SEQ_YUYV, /* The input sequence of YUV is YUYV */
VI_DATA_SEQ_YVYU, /* The input sequence of YUV is YVYU */
VI_DATA_SEQ_BUTT
} VI_YUV_DATA_SEQ_E;
/* Clock edge mode */
typedef enum hiVI_CLK_EDGE_E {
VI_CLK_EDGE_SINGLE_UP = 0, /* single-edge mode and in rising edge */
VI_CLK_EDGE_SINGLE_DOWN, /* single-edge mode and in falling edge */
VI_CLK_EDGE_BUTT
} VI_CLK_EDGE_E;
/* Component mode */
typedef enum hiVI_COMPONENT_MODE_E {
VI_COMPONENT_MODE_SINGLE = 0, /* single component mode */
VI_COMPONENT_MODE_DOUBLE, /* double component mode */
VI_COMPONENT_MODE_BUTT
} VI_COMPONENT_MODE_E;
/* Y/C composite or separation mode */
typedef enum hiVI_COMBINE_MODE_E {
VI_COMBINE_COMPOSITE = 0, /* Composite mode */
VI_COMBINE_SEPARATE, /* Separate mode */
VI_COMBINE_BUTT
} VI_COMBINE_MODE_E;
/* Attribute of the vertical synchronization signal */
typedef enum hiVI_VSYNC_E {
VI_VSYNC_FIELD = 0, /* Field/toggle mode:a signal reversal means a new frame or a field */
VI_VSYNC_PULSE, /* Pusle/effective mode:a pusle or an effective signal means a new frame or a field */
VI_VSYNC_BUTT
} VI_VSYNC_E;
/* Polarity of the vertical synchronization signal */
typedef enum hiVI_VSYNC_NEG_E {
VI_VSYNC_NEG_HIGH = 0, /* if VIU_VSYNC_E = VIU_VSYNC_FIELD, then the vertical synchronization signal of
even field is high-level,
if VIU_VSYNC_E = VIU_VSYNC_PULSE,then the vertical synchronization
pulse is positive pulse. */
VI_VSYNC_NEG_LOW, /* if VIU_VSYNC_E = VIU_VSYNC_FIELD, then the vertical synchronization signal
of even field is low-level,
if VIU_VSYNC_E = VIU_VSYNC_PULSE,then the vertical synchronization
pulse is negative pulse. */
VI_VSYNC_NEG_BUTT
} VI_VSYNC_NEG_E;
/* Attribute of the horizontal synchronization signal */
typedef enum hiVI_HSYNC_E {
VI_HSYNC_VALID_SINGNAL = 0, /* the horizontal synchronization is valid signal mode */
VI_HSYNC_PULSE, /* the horizontal synchronization is pulse mode, a new pulse means
the beginning of a new line */
VI_HSYNC_BUTT
} VI_HSYNC_E;
/* Polarity of the horizontal synchronization signal */
typedef enum hiVI_HSYNC_NEG_E {
VI_HSYNC_NEG_HIGH = 0, /* if VI_HSYNC_E = VI_HSYNC_VALID_SINGNAL, then the valid horizontal
synchronization signal is high-level;
if VI_HSYNC_E = VI_HSYNC_PULSE,then the horizontal synchronization
pulse is positive pulse */
VI_HSYNC_NEG_LOW, /* if VI_HSYNC_E = VI_HSYNC_VALID_SINGNAL, then the valid horizontal
synchronization signal is low-level;
if VI_HSYNC_E = VI_HSYNC_PULSE, then the horizontal synchronization
pulse is negative pulse */
VI_HSYNC_NEG_BUTT
} VI_HSYNC_NEG_E;
/* Attribute of the valid vertical synchronization signal */
typedef enum hiVI_VSYNC_VALID_E {
VI_VSYNC_NORM_PULSE = 0, /* the vertical synchronization is pusle mode, a pusle means a new frame or field */
VI_VSYNC_VALID_SINGAL, /* the vertical synchronization is effective mode, a effective signal
means a new frame or field */
VI_VSYNC_VALID_BUTT
} VI_VSYNC_VALID_E;
/* Polarity of the valid vertical synchronization signal */
typedef enum hiVI_VSYNC_VALID_NEG_E {
VI_VSYNC_VALID_NEG_HIGH = 0, /* if VI_VSYNC_VALID_E = VI_VSYNC_NORM_PULSE, a positive pulse means vertical
synchronization pulse;
if VI_VSYNC_VALID_E = VI_VSYNC_VALID_SINGAL, the valid vertical synchronization
signal is high-level */
VI_VSYNC_VALID_NEG_LOW, /* if VI_VSYNC_VALID_E = VI_VSYNC_NORM_PULSE, a negative pulse
means vertical synchronization pulse;
if VI_VSYNC_VALID_E = VI_VSYNC_VALID_SINGAL, the valid vertical
synchronization signal is low-level */
VI_VSYNC_VALID_NEG_BUTT
} VI_VSYNC_VALID_NEG_E;
/* Blank information of the input timing */
typedef struct hiVI_TIMING_BLANK_S {
HI_U32 u32HsyncHfb ; /* RW;Horizontal front blanking width */
HI_U32 u32HsyncAct ; /* RW;Horizontal effetive width */
HI_U32 u32HsyncHbb ; /* RW;Horizontal back blanking width */
HI_U32 u32VsyncVfb ; /* RW;Vertical front blanking height of one frame or odd-field frame picture */
HI_U32 u32VsyncVact ; /* RW;Vertical effetive width of one frame or odd-field frame picture */
HI_U32 u32VsyncVbb ; /* RW;Vertical back blanking height of one frame or odd-field frame picture */
HI_U32 u32VsyncVbfb ; /* RW;Even-field vertical front blanking height when input mode is interlace
(invalid when progressive input mode) */
HI_U32 u32VsyncVbact ; /* RW;Even-field vertical effetive width when input mode is interlace
(invalid when progressive input mode) */
HI_U32 u32VsyncVbbb ; /* RW;Even-field vertical back blanking height when input mode is interlace
(invalid when progressive input mode) */
} VI_TIMING_BLANK_S;
/* synchronization information about the BT.601 or DC timing */
typedef struct hiVI_SYNC_CFG_S {
VI_VSYNC_E enVsync;
VI_VSYNC_NEG_E enVsyncNeg;
VI_HSYNC_E enHsync;
VI_HSYNC_NEG_E enHsyncNeg;
VI_VSYNC_VALID_E enVsyncValid;
VI_VSYNC_VALID_NEG_E enVsyncValidNeg;
VI_TIMING_BLANK_S stTimingBlank;
} VI_SYNC_CFG_S;
/* the highest bit of the BT.656 timing reference code */
typedef enum hiVI_BT656_FIXCODE_E {
VI_BT656_FIXCODE_1 = 0, /* The highest bit of the EAV/SAV data over the BT.656 protocol is always 1. */
VI_BT656_FIXCODE_0, /* The highest bit of the EAV/SAV data over the BT.656 protocol is always 0. */
VI_BT656_FIXCODE_BUTT
} VI_BT656_FIXCODE_E;
/* Polarity of the field indicator bit (F) of the BT.656 timing reference code */
typedef enum hiVI_BT656_FIELD_POLAR_E {
VI_BT656_FIELD_POLAR_STD = 0, /* the standard BT.656 mode,the first filed F=0,the second filed F=1 */
VI_BT656_FIELD_POLAR_NSTD, /* the non-standard BT.656 mode,the first filed F=1,the second filed F=0 */
VI_BT656_FIELD_POLAR_BUTT
} VI_BT656_FIELD_POLAR_E;
/* synchronization information about the BT.656 */
typedef struct hiVI_BT656_SYNC_CFG_S {
VI_BT656_FIXCODE_E enFixCode;
VI_BT656_FIELD_POLAR_E enFieldPolar;
} VI_BT656_SYNC_CFG_S;
/* Input data type */
typedef enum hiVI_DATA_TYPE_E {
VI_DATA_TYPE_YUV = 0,
VI_DATA_TYPE_RGB,
VI_DATA_TYPE_BUTT
} VI_DATA_TYPE_E;
typedef enum hiVI_REPHASE_MODE_E {
VI_REPHASE_MODE_NONE = 0,
VI_REPHASE_MODE_SKIP_1_2, /* skip 1/2 */
VI_REPHASE_MODE_SKIP_1_3, /* skip 1/3 */
VI_REPHASE_MODE_BINNING_1_2, /* binning 1/2 */
VI_REPHASE_MODE_BINNING_1_3, /* binning 1/3 */
VI_REPHASE_MODE_BUTT
} VI_REPHASE_MODE_E;
typedef struct hiVI_BAS_REPHASE_ATTR_S {
VI_REPHASE_MODE_E enHRephaseMode;
VI_REPHASE_MODE_E enVRephaseMode;
} VI_BAS_REPHASE_ATTR_S;
/* Attribute of bas scale */
typedef struct hiVI_BAS_SCALE_ATTR_S {
SIZE_S stBasSize; /* RW;bayer scale size. */
} VI_BAS_SCALE_ATTR_S;
/* Attribute of bayer scale */
typedef struct hiVI_BAS_ATTR_S {
VI_BAS_SCALE_ATTR_S stSacleAttr;
VI_BAS_REPHASE_ATTR_S stRephaseAttr;
} VI_BAS_ATTR_S;
/* Attribute of wdr */
typedef struct hiVI_WDR_ATTR_S {
WDR_MODE_E enWDRMode; /* RW; WDR mode. */
HI_U32 u32CacheLine; /* RW; WDR cache line. */
} VI_WDR_ATTR_S;
/* the extended attributes of VI device */
typedef struct hiVI_DEV_ATTR_EX_S {
VI_INPUT_MODE_E enInputMode; /* RW;Input mode */
VI_WORK_MODE_E enWorkMode; /* RW; Work mode */
VI_COMBINE_MODE_E enCombineMode; /* RW;Y/C composite or separation mode */
VI_COMPONENT_MODE_E enComponentMode; /* RW;Component mode (single-component or dual-component) */
VI_CLK_EDGE_E enClkEdge; /* RW;Clock edge mode (sampling on the rising or
falling edge) */
HI_U32 au32ComponentMask[VI_COMPMASK_NUM]; /* RW;Component mask */
VI_SCAN_MODE_E enScanMode; /* RW;Input scanning mode (progressive or interlaced) */
HI_S32 as32AdChnId[VI_MAX_ADCHN_NUM]; /* RW;AD channel ID. Typically, the default
value -1 is recommended */
VI_YUV_DATA_SEQ_E enDataSeq; /* RW;Input data sequence (only the YUV format is supported) */
VI_SYNC_CFG_S stSynCfg; /* RW;Sync timing. This member must be configured in BT.
601 mode or DC mode */
VI_BT656_SYNC_CFG_S stBT656SynCfg; /* RW;Sync timing. This member must be configured in BT.
656 mode */
VI_DATA_TYPE_E enInputDataType; /* RW;RGB: CSC-709 or CSC-601, PT YUV444 disable;
YUV: default yuv CSC coef PT YUV444 enable. */
HI_BOOL bDataReverse; /* RW;Data reverse */
SIZE_S stSize; /* RW;Input size */
VI_BAS_ATTR_S stBasAttr; /* RW;Attribute of BAS */
VI_WDR_ATTR_S stWDRAttr; /* RW;Attribute of WDR */
DATA_RATE_E enDataRate; /* RW;Data rate of Device */
} VI_DEV_ATTR_EX_S;
/* The attributes of a VI device */
typedef struct hiVI_DEV_ATTR_S {
VI_INTF_MODE_E enIntfMode; /* RW;Interface mode */
VI_WORK_MODE_E enWorkMode; /* RW;Work mode */
HI_U32 au32ComponentMask[VI_COMPMASK_NUM]; /* RW;Component mask */
VI_SCAN_MODE_E enScanMode; /* RW;Input scanning mode (progressive or interlaced) */
HI_S32 as32AdChnId[VI_MAX_ADCHN_NUM]; /* RW;AD channel ID. Typically, the default value -1
is recommended */
/* The below members must be configured in BT.601 mode or DC mode and are invalid in other modes */
VI_YUV_DATA_SEQ_E enDataSeq; /* RW;Input data sequence (only the YUV format is supported) */
VI_SYNC_CFG_S stSynCfg; /* RW;Sync timing. This member must be configured in BT.
601 mode or DC mode */
VI_DATA_TYPE_E enInputDataType; /* RW;RGB: CSC-709 or CSC-601, PT YUV444 disable; YUV: default
yuv CSC coef PT YUV444 enable. */
HI_BOOL bDataReverse; /* RW;Data reverse */
SIZE_S stSize; /* RW;Input size */
VI_BAS_ATTR_S stBasAttr; /* RW;Attribute of BAS */
VI_WDR_ATTR_S stWDRAttr; /* RW;Attribute of WDR */
DATA_RATE_E enDataRate; /* RW;Data rate of Device */
} VI_DEV_ATTR_S;
/* Information of pipe binded to device */
typedef struct hiVI_DEV_BIND_PIPE_S {
HI_U32 u32Num; /* RW;Range [1,VI_MAX_PHY_PIPE_NUM] */
VI_PIPE PipeId[VI_MAX_PHY_PIPE_NUM]; /* RW;Array of pipe ID */
} VI_DEV_BIND_PIPE_S;
/* Source of 3DNR reference frame */
typedef enum hiVI_NR_REF_SOURCE_E {
VI_NR_REF_FROM_RFR = 0, /* Reference frame from reconstruction frame */
VI_NR_REF_FROM_CHN0, /* Reference frame from CHN0's frame */
VI_NR_REF_FROM_BUTT
} VI_NR_REF_SOURCE_E;
typedef enum hiVI_PIPE_BYPASS_MODE_E {
VI_PIPE_BYPASS_NONE,
VI_PIPE_BYPASS_FE,
VI_PIPE_BYPASS_BE,
VI_PIPE_BYPASS_BUTT
} VI_PIPE_BYPASS_MODE_E;
/* The attributes of 3DNR */
typedef struct hiVI_NR_ATTR_S {
PIXEL_FORMAT_E enPixFmt; /* RW;Pixel format of reference frame */
DATA_BITWIDTH_E enBitWidth; /* RW;Bit Width of reference frame */
VI_NR_REF_SOURCE_E enNrRefSource; /* RW;Source of 3DNR reference frame */
COMPRESS_MODE_E enCompressMode; /* RW;Reference frame compress mode */
} VI_NR_ATTR_S;
/* The attributes of pipe */
typedef struct hiVI_PIPE_ATTR_S {
VI_PIPE_BYPASS_MODE_E enPipeBypassMode;
HI_BOOL bYuvSkip; /* RW;YUV skip enable */
HI_BOOL bIspBypass; /* RW;Range:[0, 1];ISP bypass enable */
HI_U32 u32MaxW; /* RW;Range:[0, 1];Range[VI_PIPE_MIN_WIDTH, VI_PIPE_MAX_WIDTH];
Maximum width */
HI_U32 u32MaxH; /* RW;Range[VI_PIPE_MIN_HEIGHT, VI_PIPE_MAX_HEIGHT];Maximum height */
PIXEL_FORMAT_E enPixFmt; /* RW;Pixel format */
COMPRESS_MODE_E enCompressMode; /* RW;Range:[0, 4];Compress mode. */
DATA_BITWIDTH_E enBitWidth; /* RW;Range:[0, 4];Bit width */
HI_BOOL bNrEn; /* RW;Range:[0, 1];3DNR enable */
VI_NR_ATTR_S stNrAttr; /* RW;Attribute of 3DNR */
HI_BOOL bSharpenEn; /* RW;Range:[0, 1];Sharpen enable */
FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */
HI_BOOL bDiscardProPic; /* RW;Range:[0, 1];when professional mode snap, whether to discard
long exposure picture in the video pipe. */
} VI_PIPE_ATTR_S;
typedef enum hiVI_STITCH_ISP_CFG_MODE_E {
VI_STITCH_ISP_CFG_NORMAL = 0,
VI_STITCH_ISP_CFG_SYNC,
VI_STITCH_ISP_CFG_BUTT
} VI_STITCH_ISP_CFG_MODE_E;
/* Information of stitch group */
typedef struct hiVI_STITCH_GRP_ATTR_S {
HI_BOOL bStitch;
VI_STITCH_ISP_CFG_MODE_E enMode;
HI_U32 u32MaxPTSGap; /* RW;MAX PTS Gap between frame of pipe,unit:us */
HI_U32 u32PipeNum; /* RW;Range [2, VI_MAX_PIPE_NUM] */
VI_PIPE PipeId[VI_MAX_PIPE_NUM]; /* RW;Array of pipe ID */
} VI_STITCH_GRP_ATTR_S;
typedef enum hiVI_PIPE_REPEAT_MODE_E {
VI_PIPE_REPEAT_NONE = 0,
VI_PIPE_REPEAT_ONCE = 1,
VI_PIPE_REPEAT_BUTT
} VI_PIPE_REPEAT_MODE_E;
typedef struct {
HI_U8 IES; /* RW; Range:[0, 255];Format 8.0;the absolute strength of image enhancement for edge */
HI_U8 IESS; /* RW; Range:[0, 255];Format 8.0;the absolute strength of image enhancement for
texture and shadow */
HI_U16 IEDZ; /* RW; Range:[0, 8192];Format 14.0;the threshold of image enhancement
for controlling noise */
} tV59aIEy;
typedef struct {
HI_U8 SBF : 2; /* RW; Range:[0, 3];Format 2.0;the band type of spatial filter, notice: SBF0, SBF1
range is [2, 3];SBF2,SBF3,SBF4 range is [0,3], where SBF4 is related to SBFk */
HI_U8 STR : 4; /* RW; Range:[0, 13];Format 4.0;the relative strength of spatial filter refer to
the previous frame */
HI_U8 STHp : 2; /* RW; Range:[0, 2];Format 2.0;Not recommended for debugging */
HI_U8 SFT : 5; /* RW; Range:[0, 31];Format 5.0;Not recommended for debugging */
HI_U8 kPro : 3; /* RW; Range:[0, 7];Format 3.0;notice: the kPro of SFy2 range is [0, 7], the kPro of
SFy3 range is [0, 4] */
HI_U16 STH[3]; /* RW; Range:[0, 999];Format 10.0;the edge-preserve threshold for spatial filter */
HI_U16 SBS[3]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of spatial filter
for the relative bright pixel */
HI_U16 SDS[3]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of spatial filter
for the relative dark pixel */
} tV59aSFy;
typedef struct {
HI_U16 MATH : 10; /* RW; Range:[0, 1023];Format 10.0;the motion detection threshold for temporal filter */
HI_U16 MATE : 4; /* RW; Range:[0, 11];Format 4.0;the motion detection index of flat area
for temporal filter */
HI_U16 MATW : 2; /* RW; Range:[0, 3];Format 2.0;the index of suppressing trailing for temporal filter */
HI_U8 MASW : 4; /* RW; Range:[0, 12];Format 4.0;the index of suppressing raindrop noise
for temporal filter */
HI_U8 MABW : 3; /* RW; Range:[0, 4];Format 3.0;the window of motion detection for temporal filter */
HI_U8 MAXN : 1; /* RW; Range:[0, 1];Format 1.0;Not recommended for debugging */
} tV59aMDy;
typedef struct {
HI_U8 TFR[4]; /* RW; Range:[0, 255];Format 8.0;the relative strength of temporal
filter for the static area */
HI_U16 TDZ : 14; /* RW; Range:[0, 999];Format 10.0;the threshold of dead-area of temporal filter */
HI_U16 TDX : 2; /* RW; Range:[0, 2];Format 2.0;Not recommended for debugging */
HI_U16 TFS : 6; /* RW; Range:[0, 63];Format 6.0;the absolute strength of temporal filter */
} tV59aTFy;
typedef struct {
HI_U16 SFC : 10; /* RW; Range:[0, 1023];Format 10.0;the strength of spatial filter for NRC0 */
HI_U16 TFC : 6; /* RW; Range:[0, 63];Format 6.0;the strength of temporal filter for NRC0 */
HI_U16 CSFS : 14; /* RW; Range:[0, 999];Format 10.0;the strength of spatial filter for NRC1 */
HI_U16 CSFk : 2; /* RW; Range:[0, 3];Format 2.0;Not recommended for debugging */
HI_U16 CTFS : 4; /* RW; Range:[0, 15];Format 4.0;the strength of temporal filter for NRC1 */
HI_U16 CIIR : 1; /* RW; Range:[0, 1];Format 1.0;the mode of spatial filter for NRC1 */
HI_U16 CTFR : 11; /* RW; Range:[0, 999];Format 10.0;the relative strength of temporal filter for NRC1 */
} tV59aNRc;
/* 3DNR Spatial Filter: SFy0,SFy1,SFy2,SFy3; Temporal Filter:TFy0,TFy1;Chroma Noise Reduction: NRC0,NRC1 */
typedef struct {
tV59aIEy IEy;
tV59aSFy SFy[5];
tV59aMDy MDy[2];
tV59aTFy TFy[2];
HI_U16 HdgType : 1; /* RW; Range:[0, 1];Format 1.0;the type of complexed mixed spatial filter whether
is SFi or SFk */
HI_U16 BriType : 1; /* RW; Range:[0, 1];Format 1.0;the mode decide SFy3 whether is SFk type or SFi type */
HI_U16 HdgMode : 2; /* RW; Range:[0, 3];Format 2.0;the mode decide complexed mixed spatial filter band
for flat area */
HI_U16 kTab2 : 1; /* RW; Range:[0, 1];Format 1.0;the parameter decide SFy2 whether or not based on the image
absolute luminance */
HI_U16 HdgWnd : 1; /* RW; Range:[0, 1];Format 1.0;the sampling window of complexed mixed spatial filter for
noise detection */
HI_U16 kTab3 : 1; /* RW; Range:[0, 1];Format 1.0;the parameter decide SFy3 whether or not based on the image
absolute luminance */
HI_U16 HdgSFR : 4; /* RW; Range:[0, 13];Format 4.0;the trend of the noise reduction of complexed mixed spatial
filter for flat area */
HI_U16 nOut : 5; /* RW; Range:[0, 27];Format 5.0;the parameter for output intermediate result of SFy3 */
HI_U8 HdgIES; /* RW; Range:[0, 255];Format 8.0;the strength of image enhancement for complexed
mixed spatial filter */
HI_U8 nRef : 1; /* RW; Range:[0, 1];Format 1.0;Not recommended for debugging */
HI_U8 IEyMode : 1; /* RW; Range:[0, 1];Format 1.0;the image enhancement mode selection. */
HI_U8 IEyEx[4]; /* RW; Range:[0, 255];Format 8.0;the image enhancement strength for different frequency. */
HI_U8 SFRi[4]; /* RW; Range:[0, 255];Format 8.0;the relative strength of SFy3 when the filter type is SFi */
HI_U8 SFRk[4]; /* RW; Range:[0, 255];Format 8.0;the relative strength of SFy3 when the filter type is SFk */
HI_U16 SBSk2[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy2 for the
relative bright pixel based on the image absolute luminance */
HI_U16 SBSk3[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy3 for the
relative bright pixel based on the image absolute luminance */
HI_U16 SDSk2[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy2 for the
relative dark pixel based on the image absolute luminance */
HI_U16 SDSk3[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy3 for the
relative dark pixel based on the image absolute luminance */
HI_U16 BriThr[16]; /* RW; Range:[0, 1024];Format 11.0;the threshold decide SFy3 choose the SFi type filter
or SFk type filter in dark and bright area */
tV59aNRc NRc;
} VI_PIPE_NRX_PARAM_V1_S;
typedef enum hiVI_NR_VERSION_E {
VI_NR_V1 = 1,
VI_NR_V2 = 2,
VI_NR_V3 = 3,
VI_NR_V4 = 4,
VI_NR_BUTT
} VI_NR_VERSION_E;
typedef struct hiNRX_PARAM_MANUAL_V1_S {
VI_PIPE_NRX_PARAM_V1_S stNRXParamV1;
} NRX_PARAM_MANUAL_V1_S;
typedef struct hiNRX_PARAM_AUTO_V1_S {
HI_U32 u32ParamNum;
HI_U32 ATTRIBUTE *pau32ISO;
VI_PIPE_NRX_PARAM_V1_S ATTRIBUTE *pastNRXParamV1;
} NRX_PARAM_AUTO_V1_S;
typedef struct hiNRX_PARAM_V1_S {
OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */
NRX_PARAM_MANUAL_V1_S stNRXManualV1; /* RW;NRX V1 param for manual */
NRX_PARAM_AUTO_V1_S stNRXAutoV1; /* RW;NRX V1 param for auto */
} NRX_PARAM_V1_S;
typedef struct {
HI_U8 IES0, IES1, IES2, IES3; /* IES0~4 ; Range: [0, 255]; The gains of edge and texture enhancement.
0~3 for different frequency response. */
HI_U16 IEDZ : 10, _rb_ : 6; /* IEDZ ; Range: [0, 999]; The threshold to control the generated artifacts. */
} tV500_VI_IEy;
typedef struct {
HI_U8 SPN6 : 3, SFR : 5; /* SPN6; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */
/* SFR ; Range: [0, 31]; The relative NR strength in the SFi and SFk filter. */
HI_U8 SBN6 : 3, PBR6 : 5; /* SBN6; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */
/* PBR6; Range: [0, 16]; The mix ratio between SPN6 and SBN6. */
HI_U16 SRT0 : 5, SRT1 : 5, JMODE : 3, DeIdx : 3; /* JMODE; Range: [0, 4]; The selection modes
for the blending of spatial filters */
/* STR0, STR1; Range: [0, 16]; The blending ratio
of different filters. (Used in serial filtering mode (SFM).) */
/* DeIdx; Range: [3, 6]; The selection number of
filters that textures and details will be added to. */
HI_U8 DeRate, SFR6[3]; /* DeRate; Range: [0, 255]; The enhancement strength
for the SFM (When DeRate > 0, the SFM will be activated) */
/* SFR6; Range: [0, 31]; The relative NR strength
for NO.6 filter. (Effective when JMODE = 4) */
HI_U8 SFS1, SFT1, SBR1; /* SFS1, SFT1, SBR1; Range: [0, 255]; The NR strength
parameters for NO.1 filter. */
HI_U8 SFS2, SFT2, SBR2; /* SFS2, SFT2, SBR2; Range: [0, 255]; The NR strength
parameters for NO.2 filter. */
HI_U8 SFS4, SFT4, SBR4; /* SFS4, SFT4, SBR4; Range: [0, 255]; The NR strength
parameters for NO.3 and NO.4 filters. */
HI_U16 STH1 : 9, SFN1 : 3, NRyEn : 1, SFN0 : 3; /* STH1~3; Range: [0, 511]; The thresholds for protection
of edges from blurring */
/* NRyEn ; Range: [0, 1]; The NR switches */
HI_U16 STH2 : 9, SFN2 : 3, BWSF4 : 1, kMode : 3; /* SFN0~3; Range: [0, 6]; Filter selection for different
image areas based on STH1~3. */
/* BWSF4 ; Range: [0, 1]; The NR window size for the
NO.3 and NO.4 filters. */
HI_U16 STH3 : 9, SFN3 : 3, TriTh : 1, _rb0_ : 3; /* KMode ; Range: [0, 3]; The denoise mode based
on image brightness. */
/* Trith ; Range: [0, 1]; The switch to choose 3 STH
threshold or 2 STH threshold */
} tV500_VI_SFy;
typedef struct {
tV500_VI_IEy IEy;
tV500_VI_SFy SFy;
} VI_PIPE_NRX_PARAM_V2_S;
typedef struct hiNRX_PARAM_MANUAL_V2_S {
VI_PIPE_NRX_PARAM_V2_S stNRXParamV2;
} NRX_PARAM_MANUAL_V2_S;
typedef struct hiNRX_PARAM_AUTO_V2_S {
HI_U32 u32ParamNum;
HI_U32 ATTRIBUTE *pau32ISO;
VI_PIPE_NRX_PARAM_V2_S ATTRIBUTE *pastNRXParamV2;
} NRX_PARAM_AUTO_V2_S;
typedef struct hiNRX_PARAM_V2_S {
OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */
NRX_PARAM_MANUAL_V2_S stNRXManualV2; /* RW;NRX V2 param for manual */
NRX_PARAM_AUTO_V2_S stNRXAutoV2; /* RW;NRX V2 param for auto */
} NRX_PARAM_V2_S;
typedef struct hiVI_PIPE_NRX_PARAM_S {
VI_NR_VERSION_E enNRVersion; /* RW;3DNR Version */
union {
NRX_PARAM_V1_S stNRXParamV1; /* RW;3DNR X param version 1 */
NRX_PARAM_V2_S stNRXParamV2; /* RW;3DNR X param version 2 */
};
} VI_PIPE_NRX_PARAM_S;
/* The attributes of channel */
typedef struct hiVI_CHN_ATTR_S {
SIZE_S stSize; /* RW;Channel out put size */
PIXEL_FORMAT_E enPixelFormat; /* RW;Pixel format */
DYNAMIC_RANGE_E enDynamicRange; /* RW;Dynamic Range */
VIDEO_FORMAT_E enVideoFormat; /* RW;Video format */
COMPRESS_MODE_E enCompressMode; /* RW;256B Segment compress or no compress. */
HI_BOOL bMirror; /* RW;Mirror enable */
HI_BOOL bFlip; /* RW;Flip enable */
HI_U32 u32Depth; /* RW;Range [0,8];Depth */
FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */
} VI_CHN_ATTR_S;
/* The status of pipe */
typedef struct hiVI_PIPE_STATUS_S {
HI_BOOL bEnable; /* RO;Whether this pipe is enabled */
HI_U32 u32IntCnt; /* RO;The video frame interrupt count */
HI_U32 u32FrameRate; /* RO;Current frame rate */
HI_U32 u32LostFrame; /* RO;Lost frame count */
HI_U32 u32VbFail; /* RO;Video buffer malloc failure */
SIZE_S stSize; /* RO;Current pipe output size */
} VI_PIPE_STATUS_S;
/* VS signal output mode */
typedef enum hiVI_VS_SIGNAL_MODE_E {
VI_VS_SIGNAL_ONCE = 0, /* output one time */
VI_VS_SIGNAL_FREQ, /* output frequently */
VI_VS_SIGNAL_MODE_BUTT
} VI_VS_SIGNAL_MODE_E;
/* The attributes of VS signal */
typedef struct hiVI_VS_SIGNAL_ATTR_S {
VI_VS_SIGNAL_MODE_E enMode; /* RW;output one time, output frequently */
HI_U32 u32StartTime; /* RW;output start time,unit: sensor pix clk. */
HI_U32 u32Duration; /* RW;output high duration, unit: sensor pix clk. */
HI_U32 u32CapFrmIndex; /* RW;VS signal will be output after trigger by which vframe,
default is 0. */
HI_U32 u32Interval; /* RW;output frequently interval, unit: frame */
} VI_VS_SIGNAL_ATTR_S;
typedef struct hiBNR_DUMP_ATTR_S {
HI_BOOL bEnable;
HI_U32 u32Depth;
} BNR_DUMP_ATTR_S;
typedef enum hiVI_EXT_CHN_SOURCE_E {
VI_EXT_CHN_SOURCE_TAIL,
VI_EXT_CHN_SOURCE_HEAD,
VI_EXT_CHN_SOURCE_BUTT
} VI_EXT_CHN_SOURCE_E;
typedef struct hiVI_EXT_CHN_ATTR_S {
VI_EXT_CHN_SOURCE_E enSource;
VI_CHN s32BindChn; /* RW;Range [VI_CHN0, VI_MAX_PHY_CHN_NUM);The channel num which extend
channel will bind to */
SIZE_S stSize; /* RW;Channel out put size */
PIXEL_FORMAT_E enPixFormat; /* RW;Pixel format */
DYNAMIC_RANGE_E enDynamicRange; /* RW;Dynamic Range */
COMPRESS_MODE_E enCompressMode; /* RW;256B Segment compress or no compress. */
HI_U32 u32Depth; /* RW;Range [0,8];Depth */
FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */
} VI_EXT_CHN_ATTR_S;
typedef enum hiVI_CROP_COORDINATE_E {
VI_CROP_RATIO_COOR = 0, /* Ratio coordinate */
VI_CROP_ABS_COOR, /* Absolute coordinate */
VI_CROP_BUTT
} VI_CROP_COORDINATE_E;
/* Information of chn crop */
typedef struct hiVI_CROP_INFO_S {
HI_BOOL bEnable; /* RW;CROP enable */
VI_CROP_COORDINATE_E enCropCoordinate; /* RW;Coordinate mode of the crop start point */
RECT_S stCropRect; /* RW;CROP rectangular */
} VI_CROP_INFO_S;
/* The attributes of LDC */
typedef struct hiVI_LDC_ATTR_S {
HI_BOOL bEnable; /* RW;Range [0,1];Whether LDC is enbale */
LDC_ATTR_S stAttr;
} VI_LDC_ATTR_S;
/* The attributes of LDCV2 */
typedef struct hiVI_LDCV2_ATTR_S {
HI_BOOL bEnable; /* RW;Whether LDC is enbale */
LDCV2_ATTR_S stAttr;
} VI_LDCV2_ATTR_S;
/* The attributes of LDCV3 */
typedef struct hiVI_LDCV3_ATTR_S {
HI_BOOL bEnable; /* RW;Whether LDC is enbale */
LDCV3_ATTR_S stAttr;
} VI_LDCV3_ATTR_S;
typedef struct hiVI_ROTATION_EX_ATTR_S {
HI_BOOL bEnable; /* RW;Range [0,1];Whether ROTATE_EX_S is enbale */
ROTATION_EX_S stRotationEx;
} VI_ROTATION_EX_ATTR_S;
/* The status of chn */
typedef struct hiVI_CHN_STATUS_S {
HI_BOOL bEnable; /* RO;Whether this channel is enabled */
HI_U32 u32FrameRate; /* RO;current frame rate */
HI_U32 u32LostFrame; /* RO;Lost frame count */
HI_U32 u32VbFail; /* RO;Video buffer malloc failure */
SIZE_S stSize; /* RO;chn output size */
} VI_CHN_STATUS_S;
typedef struct hiVI_PMF_ATTR_S {
HI_BOOL bEnable; /* RW;Whether PMF is enable */
SIZE_S stDestSize; /* RW;Target size */
HI_S64 as64PMFCoef[VI_PMFCOEF_NUM]; /* RW; Array of PMF coefficients */
} VI_PMF_ATTR_S;
typedef enum hiVI_DUMP_TYPE_E {
VI_DUMP_TYPE_RAW = 0,
VI_DUMP_TYPE_YUV = 1,
VI_DUMP_TYPE_IR = 2,
VI_DUMP_TYPE_BUTT
} VI_DUMP_TYPE_E;
typedef struct hiVI_DUMP_ATTR_S {
HI_BOOL bEnable; /* RW;Whether dump is enable */
HI_U32 u32Depth; /* RW;Range [0,8];Depth */
VI_DUMP_TYPE_E enDumpType;
} VI_DUMP_ATTR_S;
typedef enum hiVI_PIPE_FRAME_SOURCE_E {
VI_PIPE_FRAME_SOURCE_DEV = 0, /* RW;Source from dev */
VI_PIPE_FRAME_SOURCE_USER_FE, /* RW;User send to FE */
VI_PIPE_FRAME_SOURCE_USER_BE, /* RW;User send to BE */
VI_PIPE_FRAME_SOURCE_BUTT
} VI_PIPE_FRAME_SOURCE_E;
typedef struct hi_VI_RAW_INFO_S {
VIDEO_FRAME_INFO_S stVideoFrame;
ISP_CONFIG_INFO_S stIspInfo;
} VI_RAW_INFO_S;
/* module params */
typedef struct hiVI_MOD_PARAM_S {
HI_S32 s32DetectErrFrame;
HI_U32 u32DropErrFrame;
VB_SOURCE_E enViVbSource;
} VI_MOD_PARAM_S;
typedef struct hiVI_DEV_TIMING_ATTR_S {
HI_BOOL bEnable; /* RW;Range:[0,1];Whether enable VI generate timing */
HI_S32 s32FrmRate; /* RW;Range:(0,0xffffff];;Generate timing Frame rate */
} VI_DEV_TIMING_ATTR_S;
typedef struct hiVI_EARLY_INTERRUPT_S {
HI_BOOL bEnable;
HI_U32 u32LineCnt;
} VI_EARLY_INTERRUPT_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif

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@ -0,0 +1,638 @@
/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_video.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/07/15
Last Modified :
Description : The common defination
Function List :
******************************************************************************/
#ifndef __HI_COMM_VIDEO_H__
#define __HI_COMM_VIDEO_H__
#include "hi_type.h"
//#include "hi_defines.h"
#include "hi_common.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#define SRC_LENS_COEF_SEG 2
#define DST_LENS_COEF_SEG 3
#define SRC_LENS_COEF_NUM 4
#define DST_LENS_COEF_NUM 4
#define DST_LENS_COEF_SEG_POINT (DST_LENS_COEF_SEG - 1)
#define ISP_BAYER_CHN (4)
typedef enum hiOPERATION_MODE_E
{
OPERATION_MODE_AUTO = 0,
OPERATION_MODE_MANUAL = 1,
OPERATION_MODE_BUTT
} OPERATION_MODE_E;
/*Angle of rotation*/
typedef enum hiROTATION_E
{
ROTATION_0 = 0,
ROTATION_90 = 1,
ROTATION_180 = 2,
ROTATION_270 = 3,
ROTATION_BUTT
} ROTATION_E;
typedef enum hiVB_SOURCE_E
{
VB_SOURCE_COMMON = 0,
VB_SOURCE_MODULE = 1,
VB_SOURCE_PRIVATE = 2,
VB_SOURCE_USER = 3,
VB_SOURCE_BUTT
} VB_SOURCE_E;
typedef enum hiDATA_RATE_E
{
DATA_RATE_X1 = 0, /* RW; output 1 pixel per clock */
DATA_RATE_X2 = 1, /* RW; output 2 pixel per clock */
DATA_RATE_BUTT
} DATA_RATE_E;
typedef struct hiBORDER_S
{
HI_U32 u32TopWidth;
HI_U32 u32BottomWidth;
HI_U32 u32LeftWidth;
HI_U32 u32RightWidth;
HI_U32 u32Color;
} BORDER_S;
typedef struct hiPOINT_S
{
HI_S32 s32X;
HI_S32 s32Y;
} POINT_S;
typedef struct hiSIZE_S
{
HI_U32 u32Width;
HI_U32 u32Height;
} SIZE_S;
typedef struct hiRECT_S
{
HI_S32 s32X;
HI_S32 s32Y;
HI_U32 u32Width;
HI_U32 u32Height;
} RECT_S;
typedef struct hiVIDEO_REGION_INFO_S
{
HI_U32 u32RegionNum; /* W; count of the region */
RECT_S ATTRIBUTE* pstRegion; /* W; region attribute */
} VIDEO_REGION_INFO_S;
typedef struct hiCROP_INFO_S
{
HI_BOOL bEnable;
RECT_S stRect;
} CROP_INFO_S;
typedef struct hiFRAME_RATE_CTRL_S
{
HI_S32 s32SrcFrameRate; /* RW; source frame rate */
HI_S32 s32DstFrameRate; /* RW; dest frame rate */
} FRAME_RATE_CTRL_S;
typedef enum hiASPECT_RATIO_E
{
ASPECT_RATIO_NONE = 0, /* full screen */
ASPECT_RATIO_AUTO = 1, /* ratio no change, 1:1*/
ASPECT_RATIO_MANUAL = 2, /* ratio manual set */
ASPECT_RATIO_BUTT
}ASPECT_RATIO_E;
typedef struct hiASPECT_RATIO_S
{
ASPECT_RATIO_E enMode; /* aspect ratio mode: none/auto/manual */
HI_U32 u32BgColor; /* background color, RGB 888 */
RECT_S stVideoRect; /* valid in ASPECT_RATIO_MANUAL mode */
} ASPECT_RATIO_S;
/* we ONLY define picture format used, all unused will be deleted!*/
typedef enum hiPIXEL_FORMAT_E
{
PIXEL_FORMAT_RGB_444 = 0,
PIXEL_FORMAT_RGB_555,
PIXEL_FORMAT_RGB_565,
PIXEL_FORMAT_RGB_888,
PIXEL_FORMAT_BGR_444,
PIXEL_FORMAT_BGR_555,
PIXEL_FORMAT_BGR_565,
PIXEL_FORMAT_BGR_888,
PIXEL_FORMAT_ARGB_1555,
PIXEL_FORMAT_ARGB_4444,
PIXEL_FORMAT_ARGB_8565,
PIXEL_FORMAT_ARGB_8888,
PIXEL_FORMAT_ARGB_2BPP,
PIXEL_FORMAT_ABGR_1555,
PIXEL_FORMAT_ABGR_4444,
PIXEL_FORMAT_ABGR_8565,
PIXEL_FORMAT_ABGR_8888,
PIXEL_FORMAT_RGB_BAYER_8BPP,
PIXEL_FORMAT_RGB_BAYER_10BPP,
PIXEL_FORMAT_RGB_BAYER_12BPP,
PIXEL_FORMAT_RGB_BAYER_14BPP,
PIXEL_FORMAT_RGB_BAYER_16BPP,
PIXEL_FORMAT_YVU_PLANAR_422,
PIXEL_FORMAT_YVU_PLANAR_420,
PIXEL_FORMAT_YVU_PLANAR_444,
PIXEL_FORMAT_YVU_SEMIPLANAR_422,
PIXEL_FORMAT_YVU_SEMIPLANAR_420,
PIXEL_FORMAT_YVU_SEMIPLANAR_444,
PIXEL_FORMAT_YUV_SEMIPLANAR_422,
PIXEL_FORMAT_YUV_SEMIPLANAR_420,
PIXEL_FORMAT_YUV_SEMIPLANAR_444,
PIXEL_FORMAT_YUYV_PACKAGE_422,
PIXEL_FORMAT_YVYU_PACKAGE_422,
PIXEL_FORMAT_UYVY_PACKAGE_422,
PIXEL_FORMAT_VYUY_PACKAGE_422,
PIXEL_FORMAT_YYUV_PACKAGE_422,
PIXEL_FORMAT_YYVU_PACKAGE_422,
PIXEL_FORMAT_UVYY_PACKAGE_422,
PIXEL_FORMAT_VUYY_PACKAGE_422,
PIXEL_FORMAT_VY1UY0_PACKAGE_422,
PIXEL_FORMAT_YUV_400,
PIXEL_FORMAT_UV_420,
/* SVP data format */
PIXEL_FORMAT_BGR_888_PLANAR,
PIXEL_FORMAT_HSV_888_PACKAGE,
PIXEL_FORMAT_HSV_888_PLANAR,
PIXEL_FORMAT_LAB_888_PACKAGE,
PIXEL_FORMAT_LAB_888_PLANAR,
PIXEL_FORMAT_S8C1,
PIXEL_FORMAT_S8C2_PACKAGE,
PIXEL_FORMAT_S8C2_PLANAR,
PIXEL_FORMAT_S8C3_PLANAR,
PIXEL_FORMAT_S16C1,
PIXEL_FORMAT_U8C1,
PIXEL_FORMAT_U16C1,
PIXEL_FORMAT_S32C1,
PIXEL_FORMAT_U32C1,
PIXEL_FORMAT_U64C1,
PIXEL_FORMAT_S64C1,
PIXEL_FORMAT_BUTT
} PIXEL_FORMAT_E;
typedef enum hiVIDEO_FIELD_E
{
VIDEO_FIELD_TOP = 0x1, /* even field */
VIDEO_FIELD_BOTTOM = 0x2, /* odd field */
VIDEO_FIELD_INTERLACED = 0x3, /* two interlaced fields */
VIDEO_FIELD_FRAME = 0x4, /* frame */
VIDEO_FIELD_BUTT
} VIDEO_FIELD_E;
typedef enum hiVIDEO_FORMAT_E
{
VIDEO_FORMAT_LINEAR = 0, /* nature video line */
VIDEO_FORMAT_TILE_64x16, /* tile cell: 64pixel x 16line */
VIDEO_FORMAT_TILE_16x8, /* tile cell: 16pixel x 8line */
VIDEO_FORMAT_LINEAR_DISCRETE, /* The data bits are aligned in bytes */
VIDEO_FORMAT_BUTT
} VIDEO_FORMAT_E;
typedef enum hiCOMPRESS_MODE_E
{
COMPRESS_MODE_NONE = 0, /* no compress */
COMPRESS_MODE_SEG, /* compress unit is 256x1 bytes as a segment.*/
COMPRESS_MODE_TILE, /* compress unit is a tile.*/
COMPRESS_MODE_LINE, /* compress unit is the whole line. raw for VI */
COMPRESS_MODE_FRAME, /* compress unit is the whole frame. YUV for VI(3DNR), RGB for TDE(write)/VO(read) */
COMPRESS_MODE_BUTT
} COMPRESS_MODE_E;
typedef enum hiVIDEO_DISPLAY_MODE_E
{
VIDEO_DISPLAY_MODE_PREVIEW = 0x0,
VIDEO_DISPLAY_MODE_PLAYBACK = 0x1,
VIDEO_DISPLAY_MODE_BUTT
} VIDEO_DISPLAY_MODE_E;
typedef struct hiLUMA_INFO_S
{
HI_U64 u64LumaPixSum; /* Luma sum of current frame */
HI_U32 u32LumaPixAverage; /* Luma average of current frame */
HI_U64 u64PTS; /* PTS of current frame */
} LUMA_INFO_S;
#define LDCI_STAT_WND_X 24
#define LDCI_STAT_WND_Y 16
#define DCF_DRSCRIPTION_LENGTH 32
#define DCF_CAPTURE_TIME_LENGTH 20
typedef struct hiISP_DCF_CONST_INFO_S
{
HI_U8 au8ImageDescription[DCF_DRSCRIPTION_LENGTH]; /*Describes image*/
HI_U8 au8Make[DCF_DRSCRIPTION_LENGTH]; /*Shows manufacturer of digital cameras*/
HI_U8 au8Model[DCF_DRSCRIPTION_LENGTH]; /*Shows model number of digital cameras*/
HI_U8 au8Software[DCF_DRSCRIPTION_LENGTH]; /*Shows firmware (internal software of digital cameras) version number*/
HI_U8 u8LightSource; /*Light source, actually this means white balance setting. '0' means unknown, '1' daylight, '2'
fluorescent, '3' tungsten, '10' flash, '17' standard light A, '18' standard light B, '19' standard light
C, '20' D55, '21' D65, '22' D75, '255' other*/
HI_U32 u32FocalLength; /*Focal length of lens used to take image. Unit is millimeter*/
HI_U8 u8SceneType; /*Indicates the type of scene. Value '0x01' means that the image was directly photographed.*/
HI_U8 u8CustomRendered; /*Indicates the use of special processing on image data, such as rendering geared to output.
0 = Normal process 1 = Custom process */
HI_U8 u8FocalLengthIn35mmFilm; /*Indicates the equivalent focal length assuming a 35mm film camera, in mm*/
HI_U8 u8SceneCaptureType; /*Indicates the type of scene that was shot. 0 = Standard,1 = Landscape,2 = Portrait,3 = Night scene. */
HI_U8 u8GainControl; /*Indicates the degree of overall image gain adjustment. 0 = None,1 = Low gain up,2 = High gain up,3 = Low gain down,4 = High gain down. */
HI_U8 u8Contrast; /*Indicates the direction of contrast processing applied by the camera when the image was shot.
0 = Normal,1 = Soft,2 = Hard */
HI_U8 u8Saturation; /*Indicates the direction of saturation processing applied by the camera when the image was shot.
0 = Normal,1 = Low saturation,2 = High saturation*/
HI_U8 u8Sharpness; /*Indicates the direction of sharpness processing applied by the camera when the image was shot.
0 = Normal,1 = Soft,2 = Hard .*/
HI_U8 u8MeteringMode; /*Exposure metering method. '0' means unknown, '1' average, '2' center weighted average, '3'
spot, '4' multi-spot, '5' multi-segment, '6' partial, '255' other*/
} ISP_DCF_CONST_INFO_S;
typedef struct hiISP_DCF_UPDATE_INFO_S
{
HI_U32 u32ISOSpeedRatings; /*CCD sensitivity equivalent to Ag-Hr film speedrate*/
HI_U32 u32ExposureTime; /*Exposure time (reciprocal of shutter speed).*/
HI_U32 u32ExposureBiasValue; /*Exposure bias (compensation) value of taking picture*/
HI_U8 u8ExposureProgram; /*Exposure program that the camera used when image was taken. '1' means manual control, '2'
program normal, '3' aperture priority, '4' shutter priority, '5' program creative (slow program),
'6' program action(high-speed program), '7' portrait mode, '8' landscape mode*/
HI_U32 u32FNumber; /*The actual F-number (F-stop) of lens when the image was taken*/
HI_U32 u32MaxApertureValue; /*Maximum aperture value of lens.*/
HI_U8 u8ExposureMode; /*Indicates the exposure mode set when the image was shot.
0 = Auto exposure,1 = Manual exposure, 2 = Auto bracket*/
HI_U8 u8WhiteBalance; /* Indicates the white balance mode set when the image was shot.
0 = Auto white balance ,1 = Manual white balance */
} ISP_DCF_UPDATE_INFO_S;
typedef struct hiISP_DCF_INFO_S
{
ISP_DCF_CONST_INFO_S stIspDCFConstInfo;
ISP_DCF_UPDATE_INFO_S stIspDCFUpdateInfo;
} ISP_DCF_INFO_S;
typedef struct hiJPEG_DCF_S
{
HI_U8 au8CaptureTime[DCF_CAPTURE_TIME_LENGTH]; /*The date and time when the picture data was generated*/
HI_BOOL bFlash; /*whether the picture is captured when a flash lamp is on*/
HI_U32 u32DigitalZoomRatio; /*Indicates the digital zoom ratio when the image was shot.
If the numerator of the recorded value is 0, this indicates that digital zoom was not used.*/
ISP_DCF_INFO_S stIspDCFInfo;
} JPEG_DCF_S;
typedef struct hiISP_FRAME_INFO_S
{
HI_U32 u32ISO; /* ISP internal ISO : Again*Dgain*ISPgain */
HI_U32 u32ExposureTime; /* Exposure time (reciprocal of shutter speed),unit is us */
HI_U32 u32IspDgain;
HI_U32 u32Again;
HI_U32 u32Dgain;
HI_U32 au32Ratio[3];
HI_U32 u32IspNrStrength;
HI_U32 u32FNumber; /* The actual F-number (F-stop) of lens when the image was taken */
HI_U32 u32SensorID; /* which sensor is used */
HI_U32 u32SensorMode;
HI_U32 u32HmaxTimes; /* Sensor HmaxTimes,unit is ns */
HI_U32 u32Vmax; /* Sensor Vmax,unit is line */
HI_U32 u32VcNum; /* when dump wdr frame, which is long or short exposure frame. */
} ISP_FRAME_INFO_S;
#define CFACOLORPLANE (3)
#define DNG_NP_SIZE (6)
typedef struct hiDNG_RATIONAL_S
{
HI_U32 u32Numerator;/*represents the numerator of a fraction,*/
HI_U32 u32Denominator;/* the denominator. */
} DNG_RATIONAL_S;
/*
Defines the structure of DNG image dynamic infomation
*/
typedef struct hiDNG_IMAGE_DYNAMIC_INFO_S
{
HI_U32 au32BlackLevel[ISP_BAYER_CHN]; /* RO;Range: [0x0, 0xFFFF]; black level*/
DNG_RATIONAL_S astAsShotNeutral[CFACOLORPLANE]; /* specifies the selected white balance at time of capture, encoded as the coordinates of a perfectly neutral color in linear reference space values.*/
HI_DOUBLE adNoiseProfile[DNG_NP_SIZE]; /* RO;describes the amount of noise in a raw image*/
} DNG_IMAGE_DYNAMIC_INFO_S;
typedef struct hiISP_HDR_INFO_S
{
HI_U32 u32ColorTemp;
HI_U16 au16CCM[9];
HI_U8 u8Saturation;
} ISP_HDR_INFO_S;
typedef struct hiISP_ATTACH_INFO_S
{
ISP_HDR_INFO_S stIspHdr;
HI_U32 u32ISO;
HI_U32 u32InitISO;
HI_U8 u8SnsWDRMode;
} ISP_ATTACH_INFO_S;
typedef enum hiFRAME_FLAG_E
{
FRAME_FLAG_SNAP_FLASH = 0x1 << 0,
FRAME_FLAG_SNAP_CUR = 0x1 << 1,
FRAME_FLAG_SNAP_REF = 0x1 << 2,
FRAME_FLAG_SNAP_END = 0x1 << 31,
FRAME_FLAG_BUTT
} FRAME_FLAG_E;
/* RGGB=4 */
#define ISP_WB_GAIN_NUM 4
/* 3*3=9 matrix */
#define ISP_CAP_CCM_NUM 9
typedef struct hiISP_CONFIG_INFO_S
{
HI_U32 u32ISO;
HI_U32 u32IspDgain;
HI_U32 u32ExposureTime;
HI_U32 au32WhiteBalanceGain[ISP_WB_GAIN_NUM];
HI_U32 u32ColorTemperature;
HI_U16 au16CapCCM[ISP_CAP_CCM_NUM];
} ISP_CONFIG_INFO_S;
typedef struct hiVIDEO_SUPPLEMENT_S
{
HI_U64 u64JpegDCFPhyAddr;
HI_U64 u64IspInfoPhyAddr;
HI_U64 u64LowDelayPhyAddr;
HI_U64 u64MotionDataPhyAddr;
HI_U64 u64FrameDNGPhyAddr;
HI_VOID* ATTRIBUTE pJpegDCFVirAddr; /* JPEG_DCF_S, used in JPEG DCF */
HI_VOID* ATTRIBUTE pIspInfoVirAddr; /* ISP_FRAME_INFO_S, used in ISP debug, when get raw and send raw */
HI_VOID* ATTRIBUTE pLowDelayVirAddr; /* used in low delay */
HI_VOID* ATTRIBUTE pMotionDataVirAddr; /* vpss 3dnr use: gme motion data, Filter motion data, gyro data.*/
HI_VOID* ATTRIBUTE pFrameDNGVirAddr;
} VIDEO_SUPPLEMENT_S;
typedef enum hiCOLOR_GAMUT_E
{
COLOR_GAMUT_BT601 = 0,
COLOR_GAMUT_BT709,
COLOR_GAMUT_BT2020, /* Only used for Hi3559AV100 */
COLOR_GAMUT_USER,
COLOR_GAMUT_BUTT
} COLOR_GAMUT_E;
typedef struct hiISP_COLORGAMMUT_INFO_S
{
COLOR_GAMUT_E enColorGamut;
} ISP_COLORGAMMUT_INFO_S;
typedef enum hiDYNAMIC_RANGE_E
{
DYNAMIC_RANGE_SDR8 = 0,
DYNAMIC_RANGE_SDR10,
DYNAMIC_RANGE_HDR10,
DYNAMIC_RANGE_HLG,
DYNAMIC_RANGE_SLF,
DYNAMIC_RANGE_XDR,
DYNAMIC_RANGE_BUTT
} DYNAMIC_RANGE_E;
typedef enum hiDATA_BITWIDTH_E
{
DATA_BITWIDTH_8 = 0,
DATA_BITWIDTH_10,
DATA_BITWIDTH_12,
DATA_BITWIDTH_14,
DATA_BITWIDTH_16,
DATA_BITWIDTH_BUTT
} DATA_BITWIDTH_E;
typedef struct hiVIDEO_FRAME_S
{
HI_U32 u32Width;
HI_U32 u32Height;
VIDEO_FIELD_E enField;
PIXEL_FORMAT_E enPixelFormat;
VIDEO_FORMAT_E enVideoFormat;
COMPRESS_MODE_E enCompressMode;
DYNAMIC_RANGE_E enDynamicRange;
COLOR_GAMUT_E enColorGamut;
HI_U32 u32HeaderStride[3];
HI_U32 u32Stride[3];
HI_U32 u32ExtStride[3];
HI_U64 u64HeaderPhyAddr[3];
HI_U64 u64HeaderVirAddr[3];
HI_U64 u64PhyAddr[3];
HI_U64 u64VirAddr[3];
HI_U64 u64ExtPhyAddr[3];
HI_U64 u64ExtVirAddr[3];
HI_S16 s16OffsetTop; /* top offset of show area */
HI_S16 s16OffsetBottom; /* bottom offset of show area */
HI_S16 s16OffsetLeft; /* left offset of show area */
HI_S16 s16OffsetRight; /* right offset of show area */
HI_U32 u32MaxLuminance;
HI_U32 u32MinLuminance;
HI_U32 u32TimeRef;
HI_U64 u64PTS;
HI_U64 u64PrivateData;
HI_U32 u32FrameFlag; /* FRAME_FLAG_E, can be OR operation. */
VIDEO_SUPPLEMENT_S stSupplement;
} VIDEO_FRAME_S;
typedef struct hiVIDEO_FRAME_INFO_S
{
VIDEO_FRAME_S stVFrame;
HI_U32 u32PoolId;
MOD_ID_E enModId;
} VIDEO_FRAME_INFO_S;
typedef struct hiVB_CAL_CONFIG_S
{
HI_U32 u32VBSize;
HI_U32 u32HeadStride;
HI_U32 u32HeadSize;
HI_U32 u32HeadYSize;
HI_U32 u32MainStride;
HI_U32 u32MainSize;
HI_U32 u32MainYSize;
HI_U32 u32ExtStride;
HI_U32 u32ExtYSize;
}VB_CAL_CONFIG_S;
typedef struct hiBITMAP_S
{
PIXEL_FORMAT_E enPixelFormat; /* Bitmap's pixel format */
HI_U32 u32Width; /* Bitmap's width */
HI_U32 u32Height; /* Bitmap's height */
HI_VOID* ATTRIBUTE pData; /* Address of Bitmap's data */
} BITMAP_S;
typedef struct hiLDC_ATTR_S
{
HI_BOOL bAspect; /* RW;Range: [0, 1];Whether aspect ration is keep */
HI_S32 s32XRatio; /* RW; Range: [0, 100]; field angle ration of horizontal,valid when bAspect=0.*/
HI_S32 s32YRatio; /* RW; Range: [0, 100]; field angle ration of vertical,valid when bAspect=0.*/
HI_S32 s32XYRatio; /* RW; Range: [0, 100]; field angle ration of all,valid when bAspect=1.*/
HI_S32 s32CenterXOffset; /* RW; Range: [-511, 511]; horizontal offset of the image distortion center relative to image center.*/
HI_S32 s32CenterYOffset; /* RW; Range: [-511, 511]; vertical offset of the image distortion center relative to image center.*/
HI_S32 s32DistortionRatio; /* RW; Range: [-300, 500]; LDC Distortion ratio.When spread on,s32DistortionRatio range should be [0, 500]*/
} LDC_ATTR_S;
typedef struct hiLDCV2_ATTR_S
{
HI_S32 s32FocalLenX; /* RW; focal length in horizontal direction, with 2 decimal numbers */
HI_S32 s32FocalLenY; /* RW; focal length in vertical direction, with 2 decimal numbers */
HI_S32 s32CoorShiftX; /* RW; coordinate of image center, with 2 decimal numbers */
HI_S32 s32CoorShiftY; /* RW; Y coordinate of image center, with 2 decimal numbers */
HI_S32 as32SrcCaliRatio[SRC_LENS_COEF_SEG][SRC_LENS_COEF_NUM]; /* RW; lens distortion coefficients of the source image, with 5 decimal numbers */
HI_S32 s32SrcJunPt; /* RW; Junction Point of the two segments */
HI_S32 as32DstCaliRatio[DST_LENS_COEF_SEG][DST_LENS_COEF_NUM]; /* RW; lens distortion coefficients, with 5 decimal numbers */
HI_S32 as32DstJunPt[DST_LENS_COEF_SEG_POINT]; /* RW; Junction Point of the three segments */
HI_S32 s32MaxDu; /* RW; max undistorted distance before 3rd polynomial drop, with 16bits decimal */
} LDCV2_ATTR_S;
typedef enum hiLDC_VIEW_TYPE_E
{
LDC_VIEW_TYPE_ALL = 0, /* View scale all but x and y independtly, this will keep both x and y axis ,but corner maybe lost*/
LDC_VIEW_TYPE_CROP = 1, /* Not use view scale, this will lost some side and corner */
LDC_VIEW_TYPE_BUTT,
} LDC_VIEW_TYPE_E;
typedef struct hiLDCV3_ATTR_S
{
LDC_VIEW_TYPE_E enViewType; /* RW; Range: [0, 1], 0: all mode, 1: crop mode.*/
HI_S32 s32CenterXOffset; /* RW; Range: ABS(s32CenterXOffset)->[0, min(128, width*0.08)], horizontal offset of the image distortion center relative to image center.*/
HI_S32 s32CenterYOffset; /* RW; Range: ABS(s32CenterXOffset)->[0, min(128, height*0.08)], vertical offset of the image distortion center relative to image center.*/
HI_S32 s32DistortionRatio; /* RW; Range: [-300, 300], LDC Distortion ratio.*/
HI_S32 s32MinRatio; /* RW; Range: [-300, 300], to remove the black region around when performing pinchusion distortion correction with crop mode.*/
} LDCV3_ATTR_S;
typedef enum hiROTATION_VIEW_TYPE_E
{
ROTATION_VIEW_TYPE_ALL = 0, /* View all source Image,no lose*/
ROTATION_VIEW_TYPE_TYPICAL = 1, /* View from rotation Image with source size,same lose*/
ROTATION_VIEW_TYPE_INSIDE = 2, /* View with no black section,all in dest Image*/
ROTATION_VIEW_TYPE_BUTT,
} ROTATION_VIEW_TYPE_E;
typedef struct hiROTATION_EX_S
{
ROTATION_VIEW_TYPE_E enViewType; /*RW;Range: [0, 2];Rotation mode*/
HI_U32 u32Angle; /*RW;Range: [0,360];Rotation Angle:[0,360]*/
HI_S32 s32CenterXOffset; /*RW;Range: [-511, 511];Horizontal offset of the image distortion center relative to image center.*/
HI_S32 s32CenterYOffset; /*RW;Range: [-511, 511];Vertical offset of the image distortion center relative to image center.*/
SIZE_S stDestSize; /*RW;Dest size of any angle rotation*/
} ROTATION_EX_S;
typedef enum hiWDR_MODE_E
{
WDR_MODE_NONE = 0,
WDR_MODE_BUILT_IN,
WDR_MODE_QUDRA,
WDR_MODE_2To1_LINE,
WDR_MODE_2To1_FRAME,
WDR_MODE_2To1_FRAME_FULL_RATE,
WDR_MODE_3To1_LINE,
WDR_MODE_3To1_FRAME,
WDR_MODE_3To1_FRAME_FULL_RATE,
WDR_MODE_4To1_LINE,
WDR_MODE_4To1_FRAME,
WDR_MODE_4To1_FRAME_FULL_RATE,
WDR_MODE_BUTT,
} WDR_MODE_E;
typedef enum hiFRAME_INTERRUPT_TYPE_E
{
FRAME_INTERRUPT_START,
FRAME_INTERRUPT_EARLY,
FRAME_INTERRUPT_EARLY_END,
FRAME_INTERRUPT_EARLY_ONE_BUF,
FRAME_INTERRUPT_EARLY_END_ONE_BUF,
FRAME_INTERRUPT_BUTT,
} FRAME_INTERRUPT_TYPE_E;
typedef struct hiFRAME_INTERRUPT_ATTR_S
{
FRAME_INTERRUPT_TYPE_E enIntType;
HI_U32 u32EarlyLine;
} FRAME_INTERRUPT_ATTR_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* _HI_COMM_VIDEO_H_ */

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/*
* Copyright (c) Hisilicon Technologies Co., Ltd. 2012-2019. All rights reserved.
* Description: Common defination of video output
* Author: Hisilicon multimedia software group
* Create: 2016/11/09
*/
#ifndef __HI_COMM_VO_H__
#define __HI_COMM_VO_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_comm_video.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
typedef enum hiEN_VOU_ERR_CODE_E {
EN_ERR_VO_DEV_NOT_CONFIG = 0x40,
EN_ERR_VO_DEV_NOT_ENABLE = 0x41,
EN_ERR_VO_DEV_HAS_ENABLED = 0x42,
EN_ERR_VO_DEV_HAS_BINDED = 0x43,
EN_ERR_VO_DEV_NOT_BINDED = 0x44,
ERR_VO_NOT_ENABLE = 0x45,
ERR_VO_NOT_DISABLE = 0x46,
ERR_VO_NOT_CONFIG = 0x47,
ERR_VO_CHN_NOT_DISABLE = 0x48,
ERR_VO_CHN_NOT_ENABLE = 0x49,
ERR_VO_CHN_NOT_CONFIG = 0x4a,
ERR_VO_CHN_NOT_ALLOC = 0x4b,
ERR_VO_CCD_INVALID_PAT = 0x4c,
ERR_VO_CCD_INVALID_POS = 0x4d,
ERR_VO_WAIT_TIMEOUT = 0x4e,
ERR_VO_INVALID_VFRAME = 0x4f,
ERR_VO_INVALID_RECT_PARA = 0x50,
ERR_VO_SETBEGIN_ALREADY = 0x51,
ERR_VO_SETBEGIN_NOTYET = 0x52,
ERR_VO_SETEND_ALREADY = 0x53,
ERR_VO_SETEND_NOTYET = 0x54,
ERR_VO_GRP_INVALID_ID = 0x55,
ERR_VO_GRP_NOT_CREATE = 0x56,
ERR_VO_GRP_HAS_CREATED = 0x57,
ERR_VO_GRP_NOT_DESTROY = 0x58,
ERR_VO_GRP_CHN_FULL = 0x59,
ERR_VO_GRP_CHN_EMPTY = 0x5a,
ERR_VO_GRP_CHN_NOT_EMPTY = 0x5b,
ERR_VO_GRP_INVALID_SYN_MODE = 0x5c,
ERR_VO_GRP_INVALID_BASE_PTS = 0x5d,
ERR_VO_GRP_NOT_START = 0x5e,
ERR_VO_GRP_NOT_STOP = 0x5f,
ERR_VO_GRP_INVALID_FRMRATE = 0x60,
ERR_VO_GRP_CHN_HAS_REG = 0x61,
ERR_VO_GRP_CHN_NOT_REG = 0x62,
ERR_VO_GRP_CHN_NOT_UNREG = 0x63,
ERR_VO_GRP_BASE_NOT_CFG = 0x64,
ERR_GFX_NOT_DISABLE = 0x65,
ERR_GFX_NOT_BIND = 0x66,
ERR_GFX_NOT_UNBIND = 0x67,
ERR_GFX_INVALID_ID = 0x68,
ERR_VO_WBC_NOT_DISABLE = 0x69,
ERR_VO_WBC_NOT_CONFIG = 0x6a,
ERR_VO_CHN_AREA_OVERLAP = 0x6b,
EN_ERR_INVALID_WBCID = 0x6c,
EN_ERR_INVALID_LAYERID = 0x6d,
EN_ERR_VO_VIDEO_HAS_BINDED = 0x6e,
EN_ERR_VO_VIDEO_NOT_BINDED = 0x6f,
ERR_VO_WBC_HAS_BIND = 0x70,
ERR_VO_WBC_HAS_CONFIG = 0x71,
ERR_VO_WBC_NOT_BIND = 0x72,
/* new added */
ERR_VO_BUTT
} EN_VOU_ERR_CODE_E;
/* System define error code */
#define HI_ERR_VO_BUSY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_VO_NO_MEM HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
#define HI_ERR_VO_NULL_PTR HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_VO_SYS_NOTREADY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_VO_INVALID_DEVID HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
#define HI_ERR_VO_INVALID_CHNID HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
#define HI_ERR_VO_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_VO_NOT_SUPPORT HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#define HI_ERR_VO_NOT_PERMIT HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_VO_INVALID_WBCID HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_WBCID)
#define HI_ERR_VO_INVALID_LAYERID HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_LAYERID)
/* Device relative error code */
#define HI_ERR_VO_DEV_NOT_CONFIG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_NOT_CONFIG)
#define HI_ERR_VO_DEV_NOT_ENABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_NOT_ENABLE)
#define HI_ERR_VO_DEV_HAS_ENABLED HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_HAS_ENABLED)
#define HI_ERR_VO_DEV_HAS_BINDED HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_HAS_BINDED)
#define HI_ERR_VO_DEV_NOT_BINDED HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_NOT_BINDED)
/* Video layer relative error code */
#define HI_ERR_VO_VIDEO_NOT_ENABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_NOT_ENABLE)
#define HI_ERR_VO_VIDEO_NOT_DISABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_NOT_DISABLE)
#define HI_ERR_VO_VIDEO_NOT_CONFIG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_NOT_CONFIG)
#define HI_ERR_VO_VIDEO_HAS_BINDED HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_VIDEO_HAS_BINDED)
#define HI_ERR_VO_VIDEO_NOT_BINDED HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_VIDEO_NOT_BINDED)
/* WBC Relative error code */
#define HI_ERR_VO_WBC_NOT_DISABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_WBC_NOT_DISABLE)
#define HI_ERR_VO_WBC_NOT_CONFIG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_WBC_NOT_CONFIG)
#define HI_ERR_VO_WBC_HAS_CONFIG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_WBC_HAS_CONFIG)
#define HI_ERR_VO_WBC_NOT_BIND HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_WBC_NOT_BIND)
#define HI_ERR_VO_WBC_HAS_BIND HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_WBC_HAS_BIND)
/* Channel Relative error code */
#define HI_ERR_VO_CHN_NOT_DISABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CHN_NOT_DISABLE)
#define HI_ERR_VO_CHN_NOT_ENABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CHN_NOT_ENABLE)
#define HI_ERR_VO_CHN_NOT_CONFIG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CHN_NOT_CONFIG)
#define HI_ERR_VO_CHN_NOT_ALLOC HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CHN_NOT_ALLOC)
#define HI_ERR_VO_CHN_AREA_OVERLAP HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CHN_AREA_OVERLAP)
/* Cascade Relatvie error code */
#define HI_ERR_VO_INVALID_PATTERN HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CCD_INVALID_PAT)
#define HI_ERR_VO_INVALID_POSITION HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_CCD_INVALID_POS)
/* MISCellaneous error code */
#define HI_ERR_VO_WAIT_TIMEOUT HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_WAIT_TIMEOUT)
#define HI_ERR_VO_INVALID_VFRAME HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_INVALID_VFRAME)
#define HI_ERR_VO_INVALID_RECT_PARA HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_INVALID_RECT_PARA)
#define HI_ERR_VO_SETBEGIN_ALREADY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_SETBEGIN_ALREADY)
#define HI_ERR_VO_SETBEGIN_NOTYET HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_SETBEGIN_NOTYET)
#define HI_ERR_VO_SETEND_ALREADY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_SETEND_ALREADY)
#define HI_ERR_VO_SETEND_NOTYET HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_SETEND_NOTYET)
/* Synchronization group relative error code */
#define HI_ERR_VO_GRP_INVALID_ID HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_INVALID_ID)
#define HI_ERR_VO_GRP_NOT_CREATE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_NOT_CREATE)
#define HI_ERR_VO_GRP_HAS_CREATED HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_HAS_CREATED)
#define HI_ERR_VO_GRP_NOT_DESTROY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_NOT_DESTROY)
#define HI_ERR_VO_GRP_CHN_FULL HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_CHN_FULL)
#define HI_ERR_VO_GRP_CHN_EMPTY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_CHN_EMPTY)
#define HI_ERR_VO_GRP_CHN_NOT_EMPTY HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_CHN_NOT_EMPTY)
#define HI_ERR_VO_GRP_INVALID_SYN_MODE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_INVALID_SYN_MODE)
#define HI_ERR_VO_GRP_INVALID_BASE_PTS HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_INVALID_BASE_PTS)
#define HI_ERR_VO_GRP_NOT_START HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_NOT_START)
#define HI_ERR_VO_GRP_NOT_STOP HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_NOT_STOP)
#define HI_ERR_VO_GRP_INVALID_FRMRATE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_INVALID_FRMRATE)
#define HI_ERR_VO_GRP_CHN_HAS_REG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_CHN_HAS_REG)
#define HI_ERR_VO_GRP_CHN_NOT_REG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_CHN_NOT_REG)
#define HI_ERR_VO_GRP_CHN_NOT_UNREG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_CHN_NOT_UNREG)
#define HI_ERR_VO_GRP_BASE_NOT_CFG HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_VO_GRP_BASE_NOT_CFG)
/* Graphics layer relative error code */
#define HI_ERR_VO_GFX_NOT_DISABLE HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_GFX_NOT_DISABLE)
#define HI_ERR_VO_GFX_NOT_BIND HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_GFX_NOT_BIND)
#define HI_ERR_VO_GFX_NOT_UNBIND HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_GFX_NOT_UNBIND)
#define HI_ERR_VO_GFX_INVALID_ID HI_DEF_ERR(HI_ID_VO, EN_ERR_LEVEL_ERROR, ERR_GFX_INVALID_ID)
/* VO video output interface type */
#define VO_INTF_CVBS (0x01L << 0)
#define VO_INTF_YPBPR (0x01L << 1)
#define VO_INTF_VGA (0x01L << 2)
#define VO_INTF_BT656 (0x01L << 3)
#define VO_INTF_BT1120 (0x01L << 4)
#define VO_INTF_HDMI (0x01L << 5)
#define VO_INTF_LCD (0x01L << 6)
#define VO_INTF_BT656_H (0x01L << 7)
#define VO_INTF_BT656_L (0x01L << 8)
#define VO_INTF_LCD_6BIT (0x01L << 9)
#define VO_INTF_LCD_8BIT (0x01L << 10)
#define VO_INTF_LCD_16BIT (0x01L << 11)
#define VO_INTF_LCD_18BIT (0x01L << 12)
#define VO_INTF_LCD_24BIT (0x01L << 13)
#define VO_INTF_MIPI (0x01L << 14)
#define VO_INTF_MIPI_SLAVE (0x01L << 15)
typedef HI_U32 VO_INTF_TYPE_E;
typedef enum hiVO_INTF_SYNC_E {
VO_OUTPUT_PAL = 0, /* PAL standard */
VO_OUTPUT_NTSC, /* NTSC standard */
VO_OUTPUT_1080P24, /* 1920 x 1080 at 24 Hz. */
VO_OUTPUT_1080P25, /* 1920 x 1080 at 25 Hz. */
VO_OUTPUT_1080P30, /* 1920 x 1080 at 30 Hz. */
VO_OUTPUT_720P50, /* 1280 x 720 at 50 Hz. */
VO_OUTPUT_720P60, /* 1280 x 720 at 60 Hz. */
VO_OUTPUT_1080I50, /* 1920 x 1080 at 50 Hz, interlace. */
VO_OUTPUT_1080I60, /* 1920 x 1080 at 60 Hz, interlace. */
VO_OUTPUT_1080P50, /* 1920 x 1080 at 50 Hz. */
VO_OUTPUT_1080P60, /* 1920 x 1080 at 60 Hz. */
VO_OUTPUT_576P50, /* 720 x 576 at 50 Hz. */
VO_OUTPUT_480P60, /* 720 x 480 at 60 Hz. */
VO_OUTPUT_800x600_60, /* VESA 800 x 600 at 60 Hz (non-interlaced) */
VO_OUTPUT_1024x768_60, /* VESA 1024 x 768 at 60 Hz (non-interlaced) */
VO_OUTPUT_1280x1024_60, /* VESA 1280 x 1024 at 60 Hz (non-interlaced) */
VO_OUTPUT_1366x768_60, /* VESA 1366 x 768 at 60 Hz (non-interlaced) */
VO_OUTPUT_1440x900_60, /* VESA 1440 x 900 at 60 Hz (non-interlaced) CVT Compliant */
VO_OUTPUT_1280x800_60, /* 1280*800@60Hz VGA@60Hz */
VO_OUTPUT_1600x1200_60, /* VESA 1600 x 1200 at 60 Hz (non-interlaced) */
VO_OUTPUT_1680x1050_60, /* VESA 1680 x 1050 at 60 Hz (non-interlaced) */
VO_OUTPUT_1920x1200_60, /* VESA 1920 x 1600 at 60 Hz (non-interlaced) CVT (Reduced Blanking) */
VO_OUTPUT_640x480_60, /* VESA 640 x 480 at 60 Hz (non-interlaced) CVT */
VO_OUTPUT_960H_PAL, /* ITU-R BT.1302 960 x 576 at 50 Hz (interlaced) */
VO_OUTPUT_960H_NTSC, /* ITU-R BT.1302 960 x 480 at 60 Hz (interlaced) */
VO_OUTPUT_1920x2160_30, /* 1920x2160_30 */
VO_OUTPUT_2560x1440_30, /* 2560x1440_30 */
VO_OUTPUT_2560x1440_60, /* 2560x1440_60 */
VO_OUTPUT_2560x1600_60, /* 2560x1600_60 */
VO_OUTPUT_3840x2160_24, /* 3840x2160_24 */
VO_OUTPUT_3840x2160_25, /* 3840x2160_25 */
VO_OUTPUT_3840x2160_30, /* 3840x2160_30 */
VO_OUTPUT_3840x2160_50, /* 3840x2160_50 */
VO_OUTPUT_3840x2160_60, /* 3840x2160_60 */
VO_OUTPUT_4096x2160_24, /* 4096x2160_24 */
VO_OUTPUT_4096x2160_25, /* 4096x2160_25 */
VO_OUTPUT_4096x2160_30, /* 4096x2160_30 */
VO_OUTPUT_4096x2160_50, /* 4096x2160_50 */
VO_OUTPUT_4096x2160_60, /* 4096x2160_60 */
VO_OUTPUT_320x240_60, /* For ota5182 at 60 Hz (8bit) */
VO_OUTPUT_320x240_50, /* For ili9342 at 50 Hz (6bit) */
VO_OUTPUT_240x320_50, /* Hi3559AV100: For ili9341 at 50 Hz (6bit) */
/* Hi3556AV100/Hi3519AV100: For st7789 at 50Hz(6bit) */
VO_OUTPUT_240x320_60, /* For ili9341 at 60 Hz (16bit) */
VO_OUTPUT_800x600_50, /* For LCD at 50 Hz (24bit) */
VO_OUTPUT_720x1280_60, /* For MIPI DSI Tx 720 x1280 at 60 Hz */
VO_OUTPUT_1080x1920_60, /* For MIPI DSI Tx 1080x1920 at 60 Hz */
VO_OUTPUT_7680x4320_30, /* For HDMI2.1 at 30 Hz */
VO_OUTPUT_USER, /* User timing. */
VO_OUTPUT_BUTT
} VO_INTF_SYNC_E;
typedef enum hiVO_ZOOM_IN_E {
VO_ZOOM_IN_RECT = 0, /* Zoom in by rect */
VO_ZOOM_IN_RATIO, /* Zoom in by ratio */
VO_ZOOM_IN_BUTT
} VO_ZOOM_IN_E;
typedef enum hiVO_CSC_MATRIX_E {
VO_CSC_MATRIX_IDENTITY = 0, /* Identity CSC matrix. */
VO_CSC_MATRIX_BT601_TO_BT709, /* BT601 to BT709 */
VO_CSC_MATRIX_BT709_TO_BT601, /* BT709 to BT601 */
VO_CSC_MATRIX_BT601_TO_RGB_PC, /* BT601 to RGB */
VO_CSC_MATRIX_BT709_TO_RGB_PC, /* BT709 to RGB */
VO_CSC_MATRIX_RGB_TO_BT601_PC, /* RGB to BT601 FULL */
VO_CSC_MATRIX_RGB_TO_BT709_PC, /* RGB to BT709 FULL */
VO_CSC_MATRIX_RGB_TO_BT2020_PC, /* RGB to BT.2020 */
VO_CSC_MATRIX_BT2020_TO_RGB_PC, /* BT.2020 to RGB */
VO_CSC_MATRIX_RGB_TO_BT601_TV, /* RGB to BT601 LIMIT */
VO_CSC_MATRIX_RGB_TO_BT709_TV, /* RGB to BT709 LIMIT */
VO_CSC_MATRIX_BUTT
} VO_CSC_MATRIX_E;
typedef struct hiVO_CHN_ATTR_S {
HI_U32 u32Priority; /* Video out overlay pri sd */
RECT_S stRect; /* Rectangle of video output channel */
HI_BOOL bDeflicker; /* Deflicker or not sd */
} VO_CHN_ATTR_S;
typedef struct hiVO_CHN_PARAM_S {
ASPECT_RATIO_S stAspectRatio; /* RW; aspect ratio */
} VO_CHN_PARAM_S;
typedef struct hiVO_BORDER_S {
HI_BOOL bBorderEn; /* RW; Do frame or not */
BORDER_S stBorder; /* RW; frame's top, bottom, left, right width and color */
} VO_BORDER_S;
typedef struct hiVO_QUERY_STATUS_S {
HI_U32 u32ChnBufUsed; /* Channel buffer that been occupied */
} VO_QUERY_STATUS_S;
typedef struct hiVO_SYNC_INFO_S {
HI_BOOL bSynm; /* RW; sync mode(0:timing,as BT.656; 1:signal,as LCD) */
HI_BOOL bIop; /* RW; interlaced or progressive display(0:i; 1:p) */
HI_U8 u8Intfb; /* RW; interlace bit width while output */
HI_U16 u16Vact; /* RW; vertical active area */
HI_U16 u16Vbb; /* RW; vertical back blank porch */
HI_U16 u16Vfb; /* RW; vertical front blank porch */
HI_U16 u16Hact; /* RW; horizontal active area */
HI_U16 u16Hbb; /* RW; horizontal back blank porch */
HI_U16 u16Hfb; /* RW; horizontal front blank porch */
HI_U16 u16Hmid; /* RW; bottom horizontal active area */
HI_U16 u16Bvact; /* RW; bottom vertical active area */
HI_U16 u16Bvbb; /* RW; bottom vertical back blank porch */
HI_U16 u16Bvfb; /* RW; bottom vertical front blank porch */
HI_U16 u16Hpw; /* RW; horizontal pulse width */
HI_U16 u16Vpw; /* RW; vertical pulse width */
HI_BOOL bIdv; /* RW; inverse data valid of output */
HI_BOOL bIhs; /* RW; inverse horizontal synch signal */
HI_BOOL bIvs; /* RW; inverse vertical synch signal */
} VO_SYNC_INFO_S;
typedef struct hiVO_PUB_ATTR_S {
HI_U32 u32BgColor; /* RW; Background color of a device, in RGB format. */
VO_INTF_TYPE_E enIntfType; /* RW; Type of a VO interface */
VO_INTF_SYNC_E enIntfSync; /* RW; Type of a VO interface timing */
VO_SYNC_INFO_S stSyncInfo; /* RW; Information about VO interface timings */
} VO_PUB_ATTR_S;
typedef struct hiVO_WBC_ATTR_S {
SIZE_S stTargetSize; /* RW; WBC Zoom target size */
PIXEL_FORMAT_E enPixelFormat; /* RW; the pixel format of WBC output */
HI_U32 u32FrameRate; /* RW; frame rate control */
DYNAMIC_RANGE_E enDynamicRange; /* RW; Write back dynamic range type */
COMPRESS_MODE_E enCompressMode; /* RW; Write back Compressing mode */
} VO_WBC_ATTR_S;
typedef enum hiVO_WBC_MODE_E {
VO_WBC_MODE_NORMAL = 0, /* In this mode, wbc will capture frames according to dev frame rate
and wbc frame rate */
VO_WBC_MODE_DROP_REPEAT, /* In this mode, wbc will drop dev repeat frame, and capture the real frame
according to video layer's display rate and wbc frame rate */
VO_WBC_MODE_PROG_TO_INTL, /* In this mode, wbc will drop dev repeat frame which repeats more than 3 times,
and change two progressive frames to one interlace frame */
VO_WBC_MODE_BUTT,
} VO_WBC_MODE_E;
typedef enum hiVO_WBC_SOURCE_TYPE_E {
VO_WBC_SOURCE_DEV = 0x0, /* WBC source is device */
VO_WBC_SOURCE_VIDEO = 0x1, /* WBC source is video layer */
VO_WBC_SOURCE_GRAPHIC = 0x2, /* WBC source is graphic layer. Warning: not supported */
VO_WBC_SOURCE_BUTT
} VO_WBC_SOURCE_TYPE_E;
typedef struct hiVO_WBC_SOURCE_S {
VO_WBC_SOURCE_TYPE_E enSourceType; /* RW; WBC source's type */
HI_U32 u32SourceId; /* RW; WBC source's ID */
} VO_WBC_SOURCE_S;
typedef enum hiVO_PART_MODE_E {
VO_PART_MODE_SINGLE = 0, /* single partition, which use software to make multi-picture in one hardware cell */
VO_PART_MODE_MULTI = 1, /* muliti partition, each partition is a hardware cell */
VO_PART_MODE_BUTT
} VO_PART_MODE_E;
typedef struct hiVO_VIDEO_LAYER_ATTR_S {
RECT_S stDispRect; /* RW; Display resolution */
SIZE_S stImageSize; /* RW; Canvas size of the video layer */
HI_U32 u32DispFrmRt; /* RW; Display frame rate */
PIXEL_FORMAT_E enPixFormat; /* RW; Pixel format of the video layer */
HI_BOOL bDoubleFrame; /* RW; Whether to double frames */
HI_BOOL bClusterMode; /* RW; Whether to take Cluster way to use memory */
DYNAMIC_RANGE_E enDstDynamicRange; /* RW; Video Layer output dynamic range type */
} VO_VIDEO_LAYER_ATTR_S;
typedef struct hiVO_LAYER_PARAM_S {
ASPECT_RATIO_S stAspectRatio; /* RW; aspect ratio */
} VO_LAYER_PARAM_S;
typedef struct hiVO_ZOOM_RATIO_S {
HI_U32 u32XRatio; /* RW; Range: [0, 1000]; XRatio = x * 1000 / W,
x means the start point to be zoomed, W means displaying channel's width. */
HI_U32 u32YRatio; /* RW; Range: [0, 1000]; YRatio = y * 1000 / H,
y means the start point to be zoomed, H means displaying channel's height. */
HI_U32 u32WRatio; /* RW; Range: [0, 1000]; WRatio = w * 1000 / W,
w means the width to be zoomed, W means displaying channel's width. */
HI_U32 u32HRatio; /* RW; Range: [0, 1000]; HRatio = h * 1000 / H,
h means the height to be zoomed, H means displaying channel's height. */
} VO_ZOOM_RATIO_S;
typedef struct hiVO_ZOOM_ATTR_S {
VO_ZOOM_IN_E enZoomType; /* choose the type of zoom in */
union {
RECT_S stZoomRect; /* zoom in by rect */
VO_ZOOM_RATIO_S stZoomRatio; /* zoom in by ratio */
};
} VO_ZOOM_ATTR_S;
typedef struct hiVO_CSC_S {
VO_CSC_MATRIX_E enCscMatrix; /* CSC matrix */
HI_U32 u32Luma; /* RW; Range: [0, 100]; luminance, default: 50 */
HI_U32 u32Contrast; /* RW; Range: [0, 100]; contrast, default: 50 */
HI_U32 u32Hue; /* RW; Range: [0, 100]; hue, default: 50 */
HI_U32 u32Satuature; /* RW; Range: [0, 100]; satuature, default: 50 */
} VO_CSC_S;
typedef struct hiVO_REGION_INFO_S {
HI_U32 u32RegionNum; /* count of the region */
RECT_S *ATTRIBUTE pstRegion; /* region attribute */
} VO_REGION_INFO_S;
typedef struct hiVO_LAYER_BOUNDARY_S {
HI_U32 u32Width;
HI_U32 u32Color[2];
} VO_LAYER_BOUNDARY_S;
typedef struct hiVO_CHN_BOUNDARY_S {
HI_BOOL bBoundaryEn; /* do Frame or not */
HI_U32 u32ColorIndex; /* the index of Frame color,[0,1] */
} VO_CHN_BOUNDARY_S;
typedef struct hiVO_MOD_PARAM_S {
HI_BOOL bTransparentTransmit; /* RW, Range: [0, 1]; YC(Luminance and Chrominance) changes or not
when passing through VO */
HI_BOOL bExitDev;
HI_BOOL bWbcBgBlackEn;
HI_BOOL bDevClkExtEn;
HI_BOOL bSaveBufMode[VO_MAX_PHY_DEV_NUM]; /* save buff mode */
} VO_MOD_PARAM_S;
typedef enum hiVO_CLK_SOURCE_E {
VO_CLK_SOURCE_PLL,
VO_CLK_SOURCE_LCDMCLK,
VO_CLK_SOURCE_BUTT
} VO_CLK_SOURCE_E;
typedef struct hiVO_USER_INTFSYNC_PLL_S {
HI_U32 u32Fbdiv;
HI_U32 u32Frac;
HI_U32 u32Refdiv;
HI_U32 u32Postdiv1;
HI_U32 u32Postdiv2;
} VO_USER_INTFSYNC_PLL_S;
typedef struct hiVO_USER_INTFSYNC_ATTR_S {
VO_CLK_SOURCE_E enClkSource;
union {
VO_USER_INTFSYNC_PLL_S stUserSyncPll;
HI_U32 u32LcdMClkDiv;
};
} VO_USER_INTFSYNC_ATTR_S;
typedef struct hiVO_USER_INTFSYNC_INFO_S {
VO_USER_INTFSYNC_ATTR_S stUserIntfSyncAttr;
HI_U32 u32PreDiv;
HI_U32 u32DevDiv;
HI_BOOL bClkReverse;
} VO_USER_INTFSYNC_INFO_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef __HI_COMM_VO_H__ */

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@ -0,0 +1,680 @@
/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2016-2019. All rights reserved.
* Description: Vpss common interface
* Author: Hisilicon multimedia software group
* Create: 2016/09/27
*/
#ifndef __HI_COMM_VPSS_H__
#define __HI_COMM_VPSS_H__
#include "hi_type.h"
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#define VPSS_SHARPEN_GAIN_NUM (32)
#define VPSS_AUTO_ISO_STRENGTH_NUM (16)
#define VPSS_YUV_SHPLUMA_NUM (32)
#define VPSS_3DNR_MAX_AUTO_PARAM_NUM (16)
#define HI_ERR_VPSS_NULL_PTR HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_VPSS_NOTREADY HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
#define HI_ERR_VPSS_INVALID_DEVID HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID)
#define HI_ERR_VPSS_INVALID_CHNID HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
#define HI_ERR_VPSS_EXIST HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
#define HI_ERR_VPSS_UNEXIST HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
#define HI_ERR_VPSS_NOT_SUPPORT HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
#define HI_ERR_VPSS_NOT_PERM HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
#define HI_ERR_VPSS_NOMEM HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
#define HI_ERR_VPSS_NOBUF HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
#define HI_ERR_VPSS_SIZE_NOT_ENOUGH HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_SIZE_NOT_ENOUGH)
#define HI_ERR_VPSS_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_VPSS_BUSY HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
#define HI_ERR_VPSS_BUF_EMPTY HI_DEF_ERR(HI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
#define VPSS_INVALID_FRMRATE -1
#define VPSS_CHN0 0
#define VPSS_CHN1 1
#define VPSS_CHN2 2
#define VPSS_CHN3 3
#define VPSS_INVALID_CHN -1
typedef enum hiVPSS_NR_TYPE_E {
VPSS_NR_TYPE_VIDEO = 0,
VPSS_NR_TYPE_SNAP = 1,
VPSS_NR_TYPE_VIDEO_SPATIAL = 2,
VPSS_NR_TYPE_VIDEO_ENHANCE = 3,
VPSS_NR_TYPE_BUTT
} VPSS_NR_TYPE_E;
typedef enum hiNR_MOTION_MODE_E {
NR_MOTION_MODE_NORMAL = 0, /* normal */
NR_MOTION_MODE_COMPENSATE = 1, /* motion compensate */
NR_MOTION_MODE_BUTT
} NR_MOTION_MODE_E;
typedef struct hiVPSS_NR_ATTR_S {
VPSS_NR_TYPE_E enNrType;
COMPRESS_MODE_E enCompressMode; /* RW; Reference frame compress mode */
NR_MOTION_MODE_E enNrMotionMode; /* RW; NR motion compensate mode. */
} VPSS_NR_ATTR_S;
typedef struct hiVPSS_GRP_ATTR_S {
/* RW; Range: Hi3559AV100 = [64, 16384] | Hi3519AV100 = [64, 8192] | Hi3516CV500 = [64, 2304] |
Hi3516AV300 = [64, 3840] | Hi3516DV300 = [64, 2688] | Hi3556V200 = [64, 4608] | Hi3559V200 = [64, 4608] |
Hi3516EV200 = [64, 4096]; Width of source image. */
HI_U32 u32MaxW;
/* RW; Range: Hi3559AV100 = [64, 16384] | Hi3519AV100 = [64, 8192] | Hi3516CV500 = [64, 2304] |
Hi3516AV300 = [64, 3840] | Hi3516DV300 = [64, 2688] | Hi3556V200 = [64, 4608] | Hi3559V200 = [64, 4608] |
Hi3516EV200 = [64, 4096]; Height of source image. */
HI_U32 u32MaxH;
PIXEL_FORMAT_E enPixelFormat; /* RW; Pixel format of source image. */
DYNAMIC_RANGE_E enDynamicRange; /* RW; DynamicRange of source image. */
FRAME_RATE_CTRL_S stFrameRate; /* Grp frame rate contrl. */
HI_BOOL bNrEn; /* RW;Range: [0, 1]; NR enable. */
VPSS_NR_ATTR_S stNrAttr; /* RW; NR attr. */
} VPSS_GRP_ATTR_S;
typedef enum hiVPSS_CHN_MODE_E {
VPSS_CHN_MODE_USER = 0, /* User mode. */
VPSS_CHN_MODE_AUTO = 1 /* Auto mode. */
} VPSS_CHN_MODE_E;
typedef struct hiVPSS_CHN_ATTR_S {
VPSS_CHN_MODE_E enChnMode; /* RW; Vpss channel's work mode. */
/* RW; Range: Hi3559AV100 = [64, 16384] | Hi3519AV100 = [64, 8192] | Hi3516CV500 = [64, 8192] |
Hi3516AV300 = [64, 8192] | Hi3516DV300 = [64, 8192] | Hi3556V200 = [64, 8192] | Hi3559V200 = [64, 8192] |
Hi3516EV200 = [64, 4096]; Width of target image. */
HI_U32 u32Width;
/* RW; Range: Hi3559AV100 = [64, 16384] | Hi3519AV100 = [64, 8192] | Hi3516CV500 = [64, 8192] |
Hi3516AV300 = [64, 8192] | Hi3516DV300 = [64, 8192] | Hi3556V200 = [64, 8192] | Hi3559V200 = [64, 8192] |
Hi3516EV200 = [64, 4096]; Height of target image. */
HI_U32 u32Height;
VIDEO_FORMAT_E enVideoFormat; /* RW; Video format of target image. */
PIXEL_FORMAT_E enPixelFormat; /* RW; Pixel format of target image. */
DYNAMIC_RANGE_E enDynamicRange; /* RW; DynamicRange of target image. */
COMPRESS_MODE_E enCompressMode; /* RW; Compression mode of the output. */
FRAME_RATE_CTRL_S stFrameRate; /* Frame rate control info */
HI_BOOL bMirror; /* RW; Mirror enable. */
HI_BOOL bFlip; /* RW; Flip enable. */
HI_U32 u32Depth; /* RW; Range: [0, 8]; User get list depth. */
ASPECT_RATIO_S stAspectRatio; /* Aspect Ratio info. */
} VPSS_CHN_ATTR_S;
typedef enum hiVPSS_CROP_COORDINATE_E {
VPSS_CROP_RATIO_COOR = 0, /* Ratio coordinate. */
VPSS_CROP_ABS_COOR /* Absolute coordinate. */
} VPSS_CROP_COORDINATE_E;
typedef struct hiVPSS_CROP_INFO_S {
HI_BOOL bEnable; /* RW; Range: [0, 1]; CROP enable. */
VPSS_CROP_COORDINATE_E enCropCoordinate; /* RW; Range: [0, 1]; Coordinate mode of the crop start point. */
RECT_S stCropRect; /* CROP rectangular. */
} VPSS_CROP_INFO_S;
/* Only used for Hi3519AV100/Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct hiVPSS_LDC_ATTR_S {
HI_BOOL bEnable; /* RW; Range: [0, 1]; Whether LDC is enbale */
LDC_ATTR_S stAttr;
} VPSS_LDC_ATTR_S;
/* Only used for Hi3516EV200 */
typedef struct hiVPSS_LDCV3_ATTR_S {
HI_BOOL bEnable; /* RW;Whether LDC is enbale */
LDCV3_ATTR_S stAttr;
} VPSS_LDCV3_ATTR_S;
typedef struct hiVPSS_ROTATION_EX_ATTR_S {
HI_BOOL bEnable; /* Whether ROTATE_EX_S is enbale */
ROTATION_EX_S stRotationEx; /* Rotate Attribute */
} VPSS_ROTATION_EX_ATTR_S;
typedef struct hiVPSS_LOW_DELAY_INFO_S {
HI_BOOL bEnable; /* RW; Low delay enable. */
HI_U32 u32LineCnt; /* RW; Range: [16, 16384]; Low delay shoreline. */
} VPSS_LOW_DELAY_INFO_S;
typedef struct hiVPSS_EXT_CHN_ATTR_S {
/* RW; Range: [0, 3]; Channel bind to. */
VPSS_CHN s32BindChn;
/* RW; Range: Hi3559AV100 = [64, 16384] | Hi3519AV100 = [64, 8192] | Hi3516CV500 = [64, 8192] |
Hi3516AV300 = [64, 8192] | Hi3516DV300 = [64, 8192] | Hi3556V200 = [64, 8192] | Hi3559V200 = [64, 8192] |
Hi3516EV200 = [64, 4096]; Width of target image. */
HI_U32 u32Width;
/* RW; Range: Hi3559AV100 = [64, 16384] | Hi3519AV100 = [64, 8192] | Hi3516CV500 = [64, 8192] |
Hi3516AV300 = [64, 8192] | Hi3516DV300 = [64, 8192] | Hi3556V200 = [64, 8192] | Hi3559V200 = [64, 8192] |
Hi3516EV200 = [64, 4096]; Height of target image. */
HI_U32 u32Height;
/* RW; Video format of target image. */
VIDEO_FORMAT_E enVideoFormat;
/* RW; Pixel format of target image. */
PIXEL_FORMAT_E enPixelFormat;
/* RW; Dynamic range. */
DYNAMIC_RANGE_E enDynamicRange;
/* RW; Compression mode of the output. */
COMPRESS_MODE_E enCompressMode;
/* RW; Range: [0, 8]; User get list depth. */
HI_U32 u32Depth;
/* Frame rate control info */
FRAME_RATE_CTRL_S stFrameRate;
} VPSS_EXT_CHN_ATTR_S;
/* Only used for Hi3559AV100/Hi3519AV100 */
typedef struct hiVPSS_GRP_SHARPEN_MANUAL_ATTR_S {
/* RW; Range: [0, 4095]; Undirectional sharpen strength for texture and detail enhancement */
HI_U16 au16TextureStr[VPSS_SHARPEN_GAIN_NUM];
/* RW; Range: [0, 4095]; Directional sharpen strength for edge enhancement */
HI_U16 au16EdgeStr[VPSS_SHARPEN_GAIN_NUM];
/* RW; Range: [0, 4095]; Texture frequency adjustment. Texture and detail will be finer when it increase */
HI_U16 u16TextureFreq;
/* RW; Range: [0, 4095]; Edge frequency adjustment. Edge will be narrower and thiner when it increase */
HI_U16 u16EdgeFreq;
/* RW; Range: [0, 127]; u8OvershootAmt */
HI_U8 u8OverShoot;
/* RW; Range: [0, 127]; u8UndershootAmt */
HI_U8 u8UnderShoot;
/* RW; Range: [0, 255]; overshoot and undershoot suppression strength,
the amplitude and width of shoot will be decrease when shootSupSt increase */
HI_U8 u8ShootSupStr;
/* RW; Range: [0, 255]; Different sharpen strength for detail and edge.
When it is bigger than 128, detail sharpen strength will be stronger than edge. */
HI_U8 u8DetailCtrl;
} VPSS_GRP_SHARPEN_MANUAL_ATTR_S;
/* Only used for Hi3559AV100/Hi3519AV100 */
typedef struct hiVPSS_GRP_SHARPEN_AUTO_ATTR_S {
/* RW; Range: [0, 4095]; Undirectional sharpen strength for texture and detail enhancement */
HI_U16 au16TextureStr[VPSS_SHARPEN_GAIN_NUM][VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 4095]; Directional sharpen strength for edge enhancement */
HI_U16 au16EdgeStr[VPSS_SHARPEN_GAIN_NUM][VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 4095]; Texture frequency adjustment. Texture and detail will be finer when it increase */
HI_U16 au16TextureFreq[VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 4095]; Edge frequency adjustment. Edge will be narrower and thiner when it increase */
HI_U16 au16EdgeFreq[VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 127]; u8OvershootAmt */
HI_U8 au8OverShoot[VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 127]; u8UndershootAmt */
HI_U8 au8UnderShoot[VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 255]; overshoot and undershoot suppression strength,
the amplitude and width of shoot will be decrease when shootSupSt increase */
HI_U8 au8ShootSupStr[VPSS_AUTO_ISO_STRENGTH_NUM];
/* RW; Range: [0, 255]; Different sharpen strength for detail and edge.
When it is bigger than 128, detail sharpen strength will be stronger than edge. */
HI_U8 au8DetailCtrl[VPSS_AUTO_ISO_STRENGTH_NUM];
} VPSS_GRP_SHARPEN_AUTO_ATTR_S;
/* Only used for Hi3559AV100/Hi3519AV100 */
typedef struct hiVPSS_GRP_SHARPEN_ATTR_S {
/* RW; Range: [0, 1];Sharpen enable. */
HI_BOOL bEnable;
/* RW; Sharpen Operation mode. */
OPERATION_MODE_E enOpType;
/* RW; Range: [0, 127]; sharpen weight based on loacal luma */
HI_U8 au8LumaWgt[VPSS_YUV_SHPLUMA_NUM];
/* RW; Sharpen manual attribute */
VPSS_GRP_SHARPEN_MANUAL_ATTR_S stSharpenManualAttr;
/* RW; Sharpen auto attribute */
VPSS_GRP_SHARPEN_AUTO_ATTR_S stSharpenAutoAttr;
} VPSS_GRP_SHARPEN_ATTR_S;
/* Only used for Hi3519AV100 */
typedef struct {
/* IES0~4 ; Range: [0, 255]; The gains of edge and texture enhancement. 0~3 for different frequency response. */
HI_U8 IES0, IES1, IES2, IES3;
/* IEDZ ; Range: [0, 999]; The threshold to control the generated artifacts. */
HI_U16 IEDZ : 10, _rb_ : 6;
} tV56aIEy;
/* Only used for Hi3519AV100 */
typedef struct {
/* SPN6; Range: [0, 4]; The selection of filters to be mixed for NO.6 filter. */
/* SFR ; Range: [0, 31]; The relative NR strength to the SFi and SFk filter. */
HI_U8 SPN6 : 3, SFR : 5;
/* SBN6; Range: [0, 4]; The selection of filters to be mixed for NO.6 filter. */
/* PBR6; Range: [0, 16]; The mix ratio between SPN6 and SBN6. */
HI_U8 SBN6 : 3, PBR6 : 5;
/* SFS2, SFT2, SBR2; Range: [0, 255]; The NR strength parameters for NO.1 and NO.2 filters. */
HI_U8 SFS2, SFT2, SBR2;
/* SFS4, SFT4, SBR4; Range: [0, 255]; The NR strength parameters for NO.3 and NO.4 filters. */
HI_U8 SFS4, SFT4, SBR4;
/* STH1~3; Range: [0, 511]; The thresholds for protection of edges from blurring */
/* SFN0~3; Range: [0, 6]; Filter selection for different image areas based on STH1~3. */
/* NRyEn ; Range: [0, 1]; The NR switches */
HI_U16 STH1 : 9, SFN1 : 3, SFN0 : 3, NRyEn : 1;
/* BWSF4 ; Range: [0, 1]; The NR window size for the NO.3 and NO.4 filters. */
/* KMode ; Range: [0, 3]; a. Selection of SFi and SFk type filter. b.
The denoise mode based on image brightness. */
HI_U16 STH2 : 9, SFN2 : 3, BWSF4 : 1, kMode : 3;
/* tEdge ; Range: [0, 3]; NR strength control mode for the image background */
/* Trith ; Range: [0, 1]; The switch to choose 3 STH threshold or 2 STH threshold */
HI_U16 STH3 : 9, SFN3 : 3, tEdge : 2, TriTh : 1, _rb_ : 1;
} tV56aSFy;
/* Only used for Hi3519AV100 */
typedef struct {
/* MADZ; Range: [0, 999]; The blending ratio between MAI2 and MAI1 based on image statistics. */
/* MAI0~2; Range: [0, 3]; The three blending results between spatial and temporal filtering. */
HI_U16 MADZ : 10, MAI0 : 2, MAI1 : 2, MAI2 : 2;
/* MADK; Range: [0, 255]; The blending ratio between MAI2 and MAI1 based on brightness. (low limit). */
/* MABR; Range: [0, 255]; The blending ratio between MAI2 and MAI1 based on brightness. (high limit). */
HI_U8 MADK, MABR;
/* MATH; Range: [0, 999]; The theshold for motion detection. */
/* MATE; Range: [0, 8]; The motion index for smooth image area. */
/* MATW; Range: [0, 3]; The motion index for prevention of motion ghost. */
HI_U16 MATH : 10, MATE : 4, MATW : 2;
/* MASW; Range: [0, 15]; The motion index for low-frequency noises. */
/* MABW; Range: [0, 4]; The window size for motion detection. */
/* MAXN; Range: [0, 1]; Not for tunning. */
HI_U8 MASW : 4, MABW : 3, MAXN : 1, _rB_;
} tV56aMDy;
/* Only used for Hi3519AV100 */
typedef struct {
/* TFS; Range: [0, 15]; The NR strength for temporal filtering. */
/* TDZ; Range: [0, 999]; Protection of the weak texture area from temporal filtering. */
/* TDX; Range: [0, 3]; Not for tuning. */
HI_U16 TFS : 4, TDZ : 10, TDX : 2;
/* TFR[5]; Range: [0, 31]; The temoproal NR strength control for background (static) area. */
/* TSS; Range: [0, 15]; The ratio for blending spatial NR with the temproal NR results. */
/* TSI; Range: [0, 1]; The selection of blending filter for TSS. */
HI_U8 TFR[5], TSS : 4, TSI : 1, _rb_ : 2;
/* SDZ; Range: [0, 999]; The threshold of NR control for result MAI1. */
/* STR; Range: [0, 31]; The strength of NR control for result MAI1. */
/* bRef; Range: [0, 1]; The switch for temproal filtering. */
HI_U16 SDZ : 10, STR : 5, bRef : 1;
} tV56aTFy;
/* Only used for Hi3519AV100 */
typedef struct {
/* SFC; Range: [0, 255]; Spatial NR strength for the first level. */
/* TFC; Range: [0, 63]; Temporal NR strength. */
HI_U8 SFC, _rb_ : 2, TFC : 6;
/* CSFS; Range: [0, 999]; Spatial NR strength for the second level. */
/* CSFR; Range: [0, 32]; Spatial NR strength control. */
HI_U16 CSFS : 10, CSFR : 6;
/* CTFR; Range: [0, 999]; Temporal NR strength control. */
/* CTFS; Range: [0, 15]; Temporal NR filtering strength */
/* CIIR; Range: [0, 1]; Spatial NR mode for the first level. */
HI_U16 CTFR : 11, CTFS : 4, CIIR : 1;
} tV56aNRc;
/* Only used for Hi3519AV100 */
typedef struct {
tV56aIEy IEy[2];
tV56aSFy SFy[4];
tV56aMDy MDy[2];
tV56aTFy TFy[2];
tV56aNRc NRc;
/* SBSk2[32], SDSk2[32]; Range [0, 8192]; Spatial NR strength based on brightness. */
HI_U16 SBSk2[32], SDSk2[32];
/* SBSk3[32], SDSk3[32]; Range [0, 8192]; Spatial NR strength based on brightness. */
HI_U16 SBSk3[32], SDSk3[32];
} VPSS_NRX_V1_S;
/* Only used for Hi3519AV100 */
typedef struct hiVPSS_NRX_PARAM_MANUAL_V1_S {
VPSS_NRX_V1_S stNRXParam;
} VPSS_NRX_PARAM_MANUAL_V1_S;
/* Only used for Hi3519AV100 */
typedef struct hiVPSS_NRX_PARAM_AUTO_V1_S {
HI_U32 u32ParamNum;
HI_U32 *pau32ISO;
VPSS_NRX_V1_S *pastNRXParam;
} VPSS_NRX_PARAM_AUTO_V1_S;
/* Only used for Hi3519AV100 */
typedef struct hiVPSS_NRX_PARAM_V1_S {
OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */
VPSS_NRX_PARAM_MANUAL_V1_S stNRXManual; /* RW;NRX V1 param for manual video */
VPSS_NRX_PARAM_AUTO_V1_S stNRXAuto; /* RW;NRX V1 param for auto video */
} VPSS_NRX_PARAM_V1_S;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
/* IES0~4 ; Range: [0, 255]; The gains of edge and texture enhancement. 0~3 for different frequency response. */
HI_U8 IES0, IES1, IES2, IES3;
HI_U16 IEDZ : 10, _rb_ : 6; /* IEDZ ; Range: [0, 999]; The threshold to control the generated artifacts. */
} tV500_VPSS_IEy;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
/* SPN6; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */
/* SFR ; Range: [0, 31]; The relative NR strength in the SFi and SFk filter. */
/* SBN6; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */
/* PBR6; Range: [0, 16]; The mix ratio between SPN6 and SBN6. */
HI_U8 SPN6 : 3, SFR : 5;
HI_U8 SBN6 : 3, PBR6 : 5;
/* JMODE; Range: [0, 4]; The selection modes for the blending of spatial filters */
/* STR0, STR1; Range: [0, 16]; The blending ratio of different filters. (Used in serial filtering mode (SFM).) */
/* DeIdx; Range: [3, 6]; The selection number of filters that textures and details will be added to. */
HI_U16 SRT0 : 5, SRT1 : 5, JMODE : 3, DeIdx : 3;
/* DeRate; Range: [0, 255]; The enhancement strength for the SFM (When DeRate > 0, the SFM will be activated) */
/* SFR6; Range: [0, 31]; The relative NR strength for NO.6 filter. (Effective when JMODE = 4) */
HI_U8 DeRate, SFR6[3];
/* SFS1, SFT1, SBR1; Range: [0, 255]; The NR strength parameters for NO.1 filter. */
/* SFS2, SFT2, SBR2; Range: [0, 255]; The NR strength parameters for NO.2 filter. */
/* SFS4, SFT4, SBR4; Range: [0, 255]; The NR strength parameters for NO.3 and NO.4 filters. */
HI_U8 SFS1, SFT1, SBR1;
HI_U8 SFS2, SFT2, SBR2;
HI_U8 SFS4, SFT4, SBR4;
/* STH1~3; Range: [0, 511]; The thresholds for protection of edges from blurring */
/* NRyEn ; Range: [0, 1]; The NR switches */
/* SFN0~3; Range: [0, 6]; Filter selection for different image areas based on STH1~3. */
/* BWSF4 ; Range: [0, 1]; The NR window size for the NO.3 and NO.4 filters. */
/* KMode ; Range: [0, 3]; The denoise mode based on image brightness. */
/* Trith ; Range: [0, 1]; The switch to choose 3 STH threshold or 2 STH threshold */
HI_U16 STH1 : 9, SFN1 : 3, SFN0 : 3, NRyEn : 1;
HI_U16 STH2 : 9, SFN2 : 3, BWSF4 : 1, kMode : 3;
HI_U16 STH3 : 9, SFN3 : 3, TriTh : 1, _rb0_ : 3;
/* SBSk[32], SDSk[32]; Range [0, 8191]; Spatial NR strength based on brightness. */
HI_U16 SBSk[32], SDSk[32];
} tV500_VPSS_SFy;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
/* MADZ0, MADZ1; Range: [0, 511]; The blending ratio between MAI2 and MAI1 based on image statistics. */
/* MAI00~02,MAI10~12 Range: [0, 3]; The three blending results between spatial and temporal filtering. */
/* MABR0, MABR1; Range: [0, 255]; The blending ratio between MAI2 and MAI1 based on brightness. */
/* biPath; Range: [0, 1]; The switch for single path or dual path. 0: single path; 1: dual path. */
HI_U16 MADZ0 : 9, MAI00 : 2, MAI01 : 2, MAI02 : 2, biPath : 1;
HI_U16 MADZ1 : 9, MAI10 : 2, MAI11 : 2, MAI12 : 2, _rb0_ : 1;
HI_U8 MABR0, MABR1;
/* MATH0,MATH1; Range: [0, 999]; The theshold for motion detection. */
/* MATE0,MATE1; Range: [0, 8]; The motion index for smooth image area. */
/* MATW; Range: [0, 3]; The motion index for prevention of motion ghost. */
HI_U16 MATH0 : 10, MATE0 : 4, MATW : 2;
HI_U16 MATH1 : 10, MATE1 : 4, _rb1_ : 2;
/* MASW; Range: [0, 15]; The motion index for low-frequency noises. */
/* MABW0,MABW1; Range: [0, 9]; The window size for motion detection. */
HI_U8 MASW : 4, _rb2_ : 4;
HI_U8 MABW0 : 4, MABW1 : 4;
} tV500_VPSS_MDy;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
/* TFS0,TFS1; Range: [0, 15]; The NR strength for temporal filtering. */
/* TDZ0,TDZ1; Range: [0, 999]; Protection of the weak texture area from temporal filtering. */
/* TDX0,TDX1; Range: [0, 3]; Not for tuning. */
HI_U16 TFS0 : 4, TDZ0 : 10, TDX0 : 2;
HI_U16 TFS1 : 4, TDZ1 : 10, TDX1 : 2;
/* SDZ0,SDZ1; Range: [0, 999]; The threshold of NR control for result MAI1. */
/* STR0,STR1; Range: [0, 31]; The strength of NR control for result MAI1. */
/* DZMode0, DZMode1; Range: [0, 1]; The selection mode for TDZ0 and TDZ1, respectively. */
HI_U16 SDZ0 : 10, STR0 : 5, DZMode0 : 1;
HI_U16 SDZ1 : 10, STR1 : 5, DZMode1 : 1;
/* TFR0,TFR1; Range: [0, 31]; The temoproal NR strength control for background (static) area. */
/* TSS0,TSS1; Range: [0, 15]; The ratio for blending spatial NR with the temproal NR results. */
/* TSI0,TSI1; Range: [0, 1]; The selection of blending filter for TSS. */
HI_U8 TFR0[6], TSS0 : 4, TSI0 : 4;
HI_U8 TFR1[6], TSS1 : 4, TSI1 : 4;
/* tEdge; Range: [0, 3]; NR strength control mode for the updating background. */
/* RFI; Range: [0, 4]; Reference mode. (used in when NR_MOTION_MODE_COMPENSATE are selected). */
/* bRef; Range: [0, 1]; The Switch for temproal filtering. */
HI_U8 RFI : 3, tEdge : 2, bRef : 1, _rb_ : 2;
} tV500_VPSS_TFy;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
/* advMATH; Range: [0, 1]; The Switch for advanced motion dection. */
/* RFUI; Range: [0, 4]; The modes for updating reference for NRy leve 2,
(used in when NR_MOTION_MODE_COMPENSATE are selected). */
HI_U16 advMATH : 1, RFDZ : 9, _rb_ : 6;
/* RFDZ; Rnage: [0, 511]; The threshold for RFI0 and RFI1 mode 3 and 4. */
/* RFSLP; Rnage: [0, 31]; The Strength for RFI0 and RFI1 mode 3 and 4. */
HI_U8 RFUI : 3, RFSLP : 5;
} tV500_VPSS_RFs;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
tV500_VPSS_IEy IEy;
tV500_VPSS_SFy SFy;
HI_U8 NRcEn : 1, _rb_ : 7;
} tV500_VPSS_NRc;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
/* SFC; Range: [0, 255]; Spatial NR strength. */
HI_U8 SFC;
/* TFC; Range: [0, 63]; Temporal NR strength relative to Spatial NR. */
/* CTFS; Range: [0, 15]; Absolute temporal NR strength. */
HI_U16 CTFS : 4, TFC : 6, _rb_ : 6;
} tV500_VPSS_pNRc;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct {
tV500_VPSS_IEy IEy[3];
tV500_VPSS_SFy SFy[3];
tV500_VPSS_MDy MDy[2];
tV500_VPSS_RFs RFs;
tV500_VPSS_TFy TFy[2];
tV500_VPSS_pNRc pNRc;
tV500_VPSS_NRc NRc;
} VPSS_NRX_V2_S;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct hiVPSS_NRX_PARAM_MANUAL_V2_S {
VPSS_NRX_V2_S stNRXParam;
} VPSS_NRX_PARAM_MANUAL_V2_S;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct hiVPSS_NRX_PARAM_AUTO_V2_S {
HI_U32 u32ParamNum;
HI_U32 *pau32ISO;
VPSS_NRX_V2_S *pastNRXParam;
} VPSS_NRX_PARAM_AUTO_V2_S;
/* Only used for Hi3516CV500/Hi3516AV300/Hi3516DV300/Hi3556V200/Hi3559V200 */
typedef struct hiVPSS_NRX_PARAM_V2_S {
OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */
VPSS_NRX_PARAM_MANUAL_V2_S stNRXManual; /* RW;NRX V2 param for manual video */
VPSS_NRX_PARAM_AUTO_V2_S stNRXAuto; /* RW;NRX V2 param for auto video */
} VPSS_NRX_PARAM_V2_S;
/* Only used for Hi3516EV200 */
typedef struct {
/* IES0~4 ; Range: [0, 255]; The gains of edge and texture enhancement. 0~3 for different frequency response. */
HI_U8 IES0, IES1, IES2, IES3;
/* IEDZ ; Range: [0, 999]; The threshold to control the generated artifacts. */
HI_U16 IEDZ : 10, IEEn : 1, _rb_ : 5;
} tV200_VPSS_IEy;
/* Only used for Hi3516EV200 */
typedef struct {
HI_U8 SPN6 : 3, SFR : 5; /* SPN6, SBN6: [0, 5]; */
HI_U8 SBN6 : 3, PBR6 : 5; /* SFR: [0,31]; PBR6: [0,15]; */
/* JMODE; Range: [0, 4]; The selection modes for the blending of spatial filters */
/* STR0, STR1; Range: [0, 16]; The blending ratio of different filters. (Used in serial filtering mode (SFM).) */
/* DeIdx; Range: [3, 6]; The selection number of filters that textures and details will be added to. */
HI_U16 SRT0 : 5, SRT1 : 5, JMODE : 3, DeIdx : 3;
/* DeRate; Range: [0, 255]; The enhancement strength for the SFM (When DeRate > 0, the SFM will be activated) */
/* SFR6[4]; Range: [0, 31]; The relative NR strength for NO.6 filter. (Effective when JMODE = 4) */
/* SBR6[2]; Range: [0, 15]; The control of overshoot and undershoot. */
HI_U8 SFR6[4], SBR6[2], DeRate;
/* SFS1, SFT1, SBR1; Range: [0, 255]; The NR strength parameters for NO.1 filter. */
HI_U8 SFS1, SFT1, SBR1;
/* SFS2, SFT2, SBR2; Range: [0, 255]; The NR strength parameters for NO.2 filter. */
HI_U8 SFS2, SFT2, SBR2;
/* SFS4, SFT4, SBR4; Range: [0, 255]; The NR strength parameters for NO.3 and NO.4 filters. */
HI_U8 SFS4, SFT4, SBR4;
/* STH1, STH2, STHd1, STHd2; Range: [0, 511]; The thresholds for protection of edges from blurring */
/* NRyEn; Range: [0, 1]; The NR switches */
/* SFN0~2; Range: [0, 6]; Filter selection for different image areas based on STH1~3. */
/* KMode ; Range: [0, 3]; The denoise mode based on image brightness. */
/* SBSk[32], SDSk[32]; Range [0, 8191]; Spatial NR strength based on brightness. */
HI_U16 STH1 : 9, SFN1 : 3, SFN0 : 3, NRyEn : 1;
HI_U16 STHd1 : 9, _rb0_ : 7;
HI_U16 STH2 : 9, SFN2 : 3, kMode : 3, _rb1_ : 1;
HI_U16 STHd2 : 9, _rb2_ : 7;
HI_U16 SBSk[32], SDSk[32];
} tV200_VPSS_SFy;
/* Only used for Hi3516EV200 */
typedef struct {
/* TFS0,TFS1; Range: [0, 15]; The NR strength for temporal filtering. */
/* TDZ0,TDZ1; Range: [0, 999]; Protection of the weak texture area from temporal filtering. */
/* TDX0,TDX1; Range: [0, 3]; Not for tuning. */
HI_U16 TFS0 : 4, TDZ0 : 10, TDX0 : 2;
HI_U16 TFS1 : 4, TDZ1 : 10, TDX1 : 2;
/* SDZ0,SDZ1; Range: [0, 999]; The threshold of NR control for result MAI1. */
/* STR0,STR1; Range: [0, 31]; The strength of NR control for result MAI1. */
/* DZMode0, DZMode1; Range: [0, 1]; The selection mode for TDZ0 and TDZ1, respectively. */
HI_U16 SDZ0 : 10, STR0 : 5, DZMode0 : 1;
HI_U16 SDZ1 : 10, STR1 : 5, DZMode1 : 1;
/* TFR0,TFR1; Range: [0, 31]; The temoproal NR strength control for background (static) area. */
/* TSS0,TSS1; Range: [0, 15]; The ratio for blending spatial NR with the temproal NR results. */
/* TSI0,TSI1; Range: [0, 1]; The selection of blending filter for TSS. */
HI_U8 TSS0 : 4, TSI0 : 4, TFR0[6];
HI_U8 TSS1 : 4, TSI1 : 4, TFR1[6];
/* TED; Range: [0, 3]; NR strength control mode for the updating background. */
/* bRef; Range: [0, 1]; The Switch for temproal filtering. */
/* TFRS; Range: [0, 15]; Spatial filtering strength for static area. */
HI_U8 TFRS : 4, TED : 2, bRef : 1, _rb_ : 1;
} tV200_VPSS_TFy;
/* Only used for Hi3516EV200 */
typedef struct {
/* PATH0 */
/* MADZ0, MADZ1; Range: [0, 511]; The blending ratio between MAI2 and MAI1 based on image statistics. */
/* MAI00~02,MAI10~12 Range: [0, 3]; The three blending results between spatial and temporal filtering. */
HI_U16 MADZ0 : 9, MAI00 : 2, MAI01 : 2, MAI02 : 2, _rb0_ : 1;
HI_U16 MADZ1 : 9, MAI10 : 2, MAI11 : 2, MAI12 : 2, _rb1_ : 1;
/* MABR0, MABR1; Range: [0, 255]; The blending ratio between MAI2 and MAI1 based on brightness. */
HI_U8 MABR0, MABR1;
/* MATH0,MATH1, MATHd0, MATHd1; Range: [0, 999]; The theshold for motion detection. */
/* MATE0,MATE1; Range: [0, 8]; The motion index for smooth image area. */
/* MATW; Range: [0, 3]; The motion index for prevention of motion ghost. */
/* MASW; Range: [0, 15]; The motion index for low-frequency noises. */
/* MABW0,MABW1; Range: [0, 9]; The window size for motion detection. */
HI_U16 MATH0 : 10, MATE0 : 4, MATW : 2;
HI_U16 MATHd0 : 10, _rb2_ : 6;
HI_U16 MATH1 : 10, _rb3_ : 6;
HI_U16 MATHd1 : 10, _rb4_ : 6;
HI_U8 MASW : 4, MATE1 : 4;
HI_U8 MABW0 : 4, MABW1 : 4;
/* AdvMATH: Range: [0, 1]; The switch to active the advanced mode. */
/* AdvTH: Range: [0, 999]; The threshold to control the effects of the AdvMATH. */
HI_U16 AdvMATH : 1, AdvTH : 12, _rb5_ : 3;
} tV200_VPSS_MDy;
/* Only used for Hi3516EV200 */
typedef struct {
/* SFC; Range: [0, 255]; Spatial NR strength. */
/* TFC; Range: [0, 32]; Temporal NR strength relative to Spatial NR. */
HI_U8 SFC, TFC : 6, _rb0_ : 2;
/* TRC; Range: [0, 255]; Control of color bleeding in */
/* TPC; Range: [0, 32]; Type of temporal NR. */
HI_U8 TRC, TPC : 6, _rb1_ : 2;
HI_BOOL MODE;
/* PRESFC; Range: [0, 32]; The strength for chroma pre spatial filter. */
HI_U8 PRESFC : 6, _rb2_ : 2;
} tV200_VPSS_NRc;
/* Only used for Hi3516EV200 */
typedef struct {
tV200_VPSS_IEy IEy[5];
tV200_VPSS_SFy SFy[5];
tV200_VPSS_MDy MDy[2];
tV200_VPSS_TFy TFy[3];
tV200_VPSS_NRc NRc;
} VPSS_NRX_V3_S;
/* Only used for Hi3516EV200 */
typedef struct hiVPSS_NRX_PARAM_MANUAL_V3_S {
VPSS_NRX_V3_S stNRXParam;
} VPSS_NRX_PARAM_MANUAL_V3_S;
/* Only used for Hi3516EV200 */
typedef struct hiVPSS_NRX_PARAM_AUTO_V3_S {
HI_U32 u32ParamNum;
HI_U32 *pau32ISO;
VPSS_NRX_V3_S *pastNRXParam;
} VPSS_NRX_PARAM_AUTO_V3_S;
/* Only used for Hi3516EV200 */
typedef struct hiVPSS_NRX_PARAM_V3_S {
OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */
VPSS_NRX_PARAM_MANUAL_V3_S stNRXManual; /* RW;NRX V3 param for manual video */
VPSS_NRX_PARAM_AUTO_V3_S stNRXAuto; /* RW;NRX V3 param for auto video */
} VPSS_NRX_PARAM_V3_S;
/* Not support for Hi3559AV100 */
typedef enum hiVPSS_NR_VER_E {
VPSS_NR_V1 = 1,
VPSS_NR_V2 = 2,
VPSS_NR_V3 = 3,
VPSS_NR_V4 = 4,
VPSS_NR_BUTT
} VPSS_NR_VER_E;
/* Not support for Hi3559AV100 */
typedef struct hiVPSS_GRP_NRX_PARAM_S {
VPSS_NR_VER_E enNRVer;
union {
VPSS_NRX_PARAM_V1_S stNRXParam_V1; /* interface X V1 for Hi3519AV100 */
VPSS_NRX_PARAM_V2_S stNRXParam_V2; /* interface X V2 for Hi3516CV500 */
VPSS_NRX_PARAM_V3_S stNRXParam_V3; /* interface X V3 for Hi3516EV200 */
};
} VPSS_GRP_NRX_PARAM_S;
typedef struct hiVPSS_CHN_BUF_WRAP_S {
HI_BOOL bEnable;
HI_U32 u32BufLine; /* RW; Range: [128, H]; Chn buffer allocated by line. */
HI_U32 u32WrapBufferSize; /* RW; Whether to allocate buffer according to compression. */
} VPSS_CHN_BUF_WRAP_S;
typedef struct hiVPSS_PARAM_MOD_S {
HI_BOOL bOneBufForLowDelay;
HI_U32 u32VpssVbSource;
HI_U32 u32VpssSplitNodeNum;
HI_BOOL bHdrSupport;
HI_BOOL bNrQuickStart;
} VPSS_MOD_PARAM_S;
typedef enum hiVPSS_CHN_PROC_MODE_E {
VPSS_CHN_PROC_MODE_VIDEO = 0,
VPSS_CHN_PROC_MODE_SNAP = 1,
VPSS_CHN_PROC_MODE_BUTT
} VPSS_CHN_PROC_MODE_E;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_VPSS_H__ */

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_common.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/07/15
Last Modified :
Description : The common defination
Function List :
******************************************************************************/
#ifndef __HI_COMMON_H__
#define __HI_COMMON_H__
#include "autoconf.h"
#include "hi_type.h"
#include "hi_defines.h"
#ifndef __IGNORE_HWSEC__
#ifndef __KERNEL__
#include "hi_securec.h"
#endif
#ifdef __LITEOS__
#include "hi_securec.h"
#endif
#endif
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */
#ifndef VER_X
#define VER_X 1
#endif
#ifndef VER_Y
#define VER_Y 0
#endif
#ifndef VER_Z
#define VER_Z 0
#endif
#ifndef VER_P
#define VER_P 0
#endif
#ifndef VER_B
#define VER_B 0
#endif
#ifdef HI_DEBUG
#define VER_D " Debug"
#else
#define VER_D " Release"
#endif
#ifdef CONFIG_HI_LOG_TRACE_SUPPORT
#define VER_E ""
#else
#define VER_E " NoLog"
#endif
#define ATTRIBUTE __attribute__((aligned (ALIGN_NUM)))
#define COMPAT_POINTER(ptr, type)\
do {\
HI_UL ulAddr = (HI_UL)ptr;\
HI_U32 u32Addr = (HI_U32)ulAddr;\
ptr = (type)(HI_UL)u32Addr;\
} while(0)
#define __MK_VERSION(x,y,z,p,b) #x"."#y"."#z"."#p" B0"#b
#define MK_VERSION(x,y,z,p,b) __MK_VERSION(x,y,z,p,b)
#define MPP_VERSION CHIP_NAME MPP_VER_PRIX MK_VERSION(VER_X,VER_Y,VER_Z,VER_P,VER_B) VER_D VER_E
#define VERSION_NAME_MAXLEN 64
typedef struct hiMPP_VERSION_S
{
HI_CHAR aVersion[VERSION_NAME_MAXLEN];
} MPP_VERSION_S;
typedef HI_S32 AI_CHN;
typedef HI_S32 AO_CHN;
typedef HI_S32 AENC_CHN;
typedef HI_S32 ADEC_CHN;
typedef HI_S32 AUDIO_DEV;
typedef HI_S32 VI_DEV;
typedef HI_S32 VI_PIPE;
typedef HI_S32 VI_CHN;
typedef HI_S32 VI_STITCH_GRP;
typedef HI_S32 VO_DEV;
typedef HI_S32 VO_LAYER;
typedef HI_S32 VO_CHN;
typedef HI_S32 VO_WBC;
typedef HI_S32 GRAPHIC_LAYER;
typedef HI_S32 VENC_CHN;
typedef HI_S32 VDEC_CHN;
typedef HI_S32 IVE_HANDLE;
typedef HI_S32 CLS_HANDLE;
typedef HI_S32 FD_CHN;
typedef HI_S32 MD_CHN;
typedef HI_S32 ISP_DEV;
typedef HI_S32 BLK_DEV;
typedef HI_S32 SENSOR_ID;
typedef HI_S32 MIPI_DEV;
typedef HI_S32 SLAVE_DEV;
typedef HI_S32 SVP_NNIE_HANDLE;
typedef HI_S32 SVP_DSP_HANDLE;
typedef HI_S32 SVP_ALG_CHN;
typedef HI_S32 VPSS_GRP;
typedef HI_S32 VPSS_GRP_PIPE;
typedef HI_S32 VPSS_CHN;
typedef HI_S32 AVS_GRP;
typedef HI_S32 AVS_PIPE;
typedef HI_S32 AVS_CHN;
typedef HI_S32 MCF_GRP;
typedef HI_S32 MCF_PIPE;
typedef HI_S32 MCF_CHN;
#define HI_INVALID_CHN (-1)
#define HI_INVALID_WAY (-1)
#define HI_INVALID_LAYER (-1)
#define HI_INVALID_DEV (-1)
#define HI_INVALID_HANDLE (-1)
#define HI_INVALID_VALUE (-1)
#define HI_INVALID_TYPE (-1)
#define CCM_MATRIX_SIZE (9)
#define CCM_MATRIX_NUM (7)
#define CLUT_R_NUM (17)
#define CLUT_B_NUM (17)
#define CLUT_G_NUM (17)
#define HI_ISP_CLUT_COEFACMCNT (4850)
#define CUBIC_POINT_MAX (5)
typedef enum hiMOD_ID_E
{
HI_ID_CMPI = 0,
HI_ID_VB = 1,
HI_ID_SYS = 2,
HI_ID_RGN = 3,
HI_ID_CHNL = 4,
HI_ID_VDEC = 5,
HI_ID_AVS = 6,
HI_ID_VPSS = 7,
HI_ID_VENC = 8,
HI_ID_SVP = 9,
HI_ID_H264E = 10,
HI_ID_JPEGE = 11,
HI_ID_MPEG4E = 12,
HI_ID_H265E = 13,
HI_ID_JPEGD = 14,
HI_ID_VO = 15,
HI_ID_VI = 16,
HI_ID_DIS = 17,
HI_ID_VALG = 18,
HI_ID_RC = 19,
HI_ID_AIO = 20,
HI_ID_AI = 21,
HI_ID_AO = 22,
HI_ID_AENC = 23,
HI_ID_ADEC = 24,
HI_ID_VPU = 25,
HI_ID_PCIV = 26,
HI_ID_PCIVFMW = 27,
HI_ID_ISP = 28,
HI_ID_IVE = 29,
HI_ID_USER = 30,
HI_ID_DCCM = 31,
HI_ID_DCCS = 32,
HI_ID_PROC = 33,
HI_ID_LOG = 34,
HI_ID_VFMW = 35,
HI_ID_H264D = 36,
HI_ID_GDC = 37,
HI_ID_PHOTO = 38,
HI_ID_FB = 39,
HI_ID_HDMI = 40,
HI_ID_VOIE = 41,
HI_ID_TDE = 42,
HI_ID_HDR = 43,
HI_ID_PRORES = 44,
HI_ID_VGS = 45,
HI_ID_FD = 47,
HI_ID_ODT = 48, //Object detection trace
HI_ID_VQA = 49, //Video quality analysis
HI_ID_LPR = 50, //Object detection trace
HI_ID_SVP_NNIE = 51,
HI_ID_SVP_DSP = 52,
HI_ID_DPU_RECT = 53,
HI_ID_DPU_MATCH = 54,
HI_ID_MOTIONSENSOR = 55,
HI_ID_MOTIONFUSION = 56,
HI_ID_GYRODIS = 57,
HI_ID_PM = 58,
HI_ID_SVP_ALG = 59,
HI_ID_IVP = 60,
HI_ID_MCF = 61,
HI_ID_QR = 62,
HI_ID_BUTT,
} MOD_ID_E;
typedef struct hiMPP_CHN_S
{
MOD_ID_E enModId;
HI_S32 s32DevId;
HI_S32 s32ChnId;
} MPP_CHN_S;
#define MPP_MOD_VI "vi"
#define MPP_MOD_VO "vo"
#define MPP_MOD_AVS "avs"
#define MPP_MOD_HDMI "hdmi"
#define MPP_MOD_VGS "vgs"
#define MPP_MOD_GDC "gdc"
#define MPP_MOD_DIS "dis"
#define MPP_MOD_GYRODIS "gyrodis"
#define MPP_MOD_CHNL "chnl"
#define MPP_MOD_VENC "venc"
#define MPP_MOD_VPSS "vpss"
#define MPP_MOD_RGN "rgn"
#define MPP_MOD_IVE "ive"
#define MPP_MOD_FD "fd"
#define MPP_MOD_MD "md"
#define MPP_MOD_IVP "ivp"
#define MPP_MOD_SVP "svp"
#define MPP_MOD_SVP_NNIE "nnie"
#define MPP_MOD_SVP_DSP "dsp"
#define MPP_MOD_SVP_ALG "svp_alg"
#define MPP_MOD_DPU_RECT "rect"
#define MPP_MOD_DPU_MATCH "match"
#define MPP_MOD_H264E "h264e"
#define MPP_MOD_H265E "h265e"
#define MPP_MOD_JPEGE "jpege"
#define MPP_MOD_MPEG4E "mpeg4e"
#define MPP_MOD_VEDU "vedu"
#define MPP_MOD_PRORES "prores"
#define MPP_MOD_VDEC "vdec"
#define MPP_MOD_H264D "h264d"
#define MPP_MOD_JPEGD "jpegd"
#define MPP_MOD_AI "ai"
#define MPP_MOD_AO "ao"
#define MPP_MOD_AENC "aenc"
#define MPP_MOD_ADEC "adec"
#define MPP_MOD_AIO "aio"
#define MPP_MOD_ACODEC "acodec"
#define MPP_MOD_VB "vb"
#define MPP_MOD_SYS "sys"
#define MPP_MOD_CMPI "cmpi"
#define MPP_MOD_PCIV "pciv"
#define MPP_MOD_PCIVFMW "pcivfmw"
#define MPP_MOD_PROC "proc"
#define MPP_MOD_LOG "logmpp"
#define MPP_MOD_DCCM "dccm"
#define MPP_MOD_DCCS "dccs"
#define MPP_MOD_FB "fb"
#define MPP_MOD_RC "rc"
#define MPP_MOD_VOIE "voie"
#define MPP_MOD_TDE "tde"
#define MPP_MOD_ISP "isp"
#define MPP_MOD_USR "usr"
#define MPP_MOD_MCF "mcf"
#define MPP_MOD_PM "pm"
#define MPP_MOD_MFUSION "motionfusion"
/* We just coyp this value of payload type from RTP/RTSP definition */
typedef enum
{
PT_PCMU = 0,
PT_1016 = 1,
PT_G721 = 2,
PT_GSM = 3,
PT_G723 = 4,
PT_DVI4_8K = 5,
PT_DVI4_16K = 6,
PT_LPC = 7,
PT_PCMA = 8,
PT_G722 = 9,
PT_S16BE_STEREO = 10,
PT_S16BE_MONO = 11,
PT_QCELP = 12,
PT_CN = 13,
PT_MPEGAUDIO = 14,
PT_G728 = 15,
PT_DVI4_3 = 16,
PT_DVI4_4 = 17,
PT_G729 = 18,
PT_G711A = 19,
PT_G711U = 20,
PT_G726 = 21,
PT_G729A = 22,
PT_LPCM = 23,
PT_CelB = 25,
PT_JPEG = 26,
PT_CUSM = 27,
PT_NV = 28,
PT_PICW = 29,
PT_CPV = 30,
PT_H261 = 31,
PT_MPEGVIDEO = 32,
PT_MPEG2TS = 33,
PT_H263 = 34,
PT_SPEG = 35,
PT_MPEG2VIDEO = 36,
PT_AAC = 37,
PT_WMA9STD = 38,
PT_HEAAC = 39,
PT_PCM_VOICE = 40,
PT_PCM_AUDIO = 41,
PT_MP3 = 43,
PT_ADPCMA = 49,
PT_AEC = 50,
PT_X_LD = 95,
PT_H264 = 96,
PT_D_GSM_HR = 200,
PT_D_GSM_EFR = 201,
PT_D_L8 = 202,
PT_D_RED = 203,
PT_D_VDVI = 204,
PT_D_BT656 = 220,
PT_D_H263_1998 = 221,
PT_D_MP1S = 222,
PT_D_MP2P = 223,
PT_D_BMPEG = 224,
PT_MP4VIDEO = 230,
PT_MP4AUDIO = 237,
PT_VC1 = 238,
PT_JVC_ASF = 255,
PT_D_AVI = 256,
PT_DIVX3 = 257,
PT_AVS = 258,
PT_REAL8 = 259,
PT_REAL9 = 260,
PT_VP6 = 261,
PT_VP6F = 262,
PT_VP6A = 263,
PT_SORENSON = 264,
PT_H265 = 265,
PT_VP8 = 266,
PT_MVC = 267,
PT_PNG = 268,
/* add by hisilicon */
PT_AMR = 1001,
PT_MJPEG = 1002,
PT_AMRWB = 1003,
PT_PRORES = 1006,
PT_OPUS = 1007,
PT_BUTT
} PAYLOAD_TYPE_E;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */
#endif /* _HI_COMMON_H_ */

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#ifndef __HI_COMMON_CIPHER__
#define __HI_COMMON_CIPHER__
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#define HI_ERR_CIPHER_NOT_INIT (HI_S32)(0x804D0001)
#define HI_ERR_CIPHER_INVALID_HANDLE (HI_S32)(0x804D0002)
#define HI_ERR_CIPHER_INVALID_POINT (HI_S32)(0x804D0003)
#define HI_ERR_CIPHER_INVALID_PARA (HI_S32)(0x804D0004)
#define HI_ERR_CIPHER_FAILED_INIT (HI_S32)(0x804D0005)
#define HI_ERR_CIPHER_FAILED_GETHANDLE (HI_S32)(0x804D0006)
#define HI_ERR_CIPHER_FAILED_RELEASEHANDLE (HI_S32)(0x804D0007)
#define HI_ERR_CIPHER_FAILED_CONFIGAES (HI_S32)(0x804D0008)
#define HI_ERR_CIPHER_FAILED_CONFIGDES (HI_S32)(0x804D0009)
#define HI_ERR_CIPHER_FAILED_ENCRYPT (HI_S32)(0x804D000A)
#define HI_ERR_CIPHER_FAILED_DECRYPT (HI_S32)(0x804D000B)
#define HI_ERR_CIPHER_BUSY (HI_S32)(0x804D000C)
#define HI_ERR_CIPHER_NO_AVAILABLE_RNG (HI_S32)(0x804D000D)
#define HI_ERR_CIPHER_FAILED_MEM (HI_S32)(0x804D000E)
#define HI_ERR_CIPHER_UNAVAILABLE (HI_S32)(0x804D000F)
#define HI_ERR_CIPHER_OVERFLOW (HI_S32)(0x804D0010)
#define HI_ERR_CIPHER_HARD_STATUS (HI_S32)(0x804D0011)
#define HI_ERR_CIPHER_TIMEOUT (HI_S32)(0x804D0012)
#define HI_ERR_CIPHER_UNSUPPORTED (HI_S32)(0x804D0013)
#define HI_ERR_CIPHER_REGISTER_IRQ (HI_S32)(0x804D0014)
#define HI_ERR_CIPHER_ILLEGAL_UUID (HI_S32)(0x804D0015)
#define HI_ERR_CIPHER_ILLEGAL_KEY (HI_S32)(0x804D0016)
#define HI_ERR_CIPHER_INVALID_ADDR (HI_S32)(0x804D0017)
#define HI_ERR_CIPHER_INVALID_LENGTH (HI_S32)(0x804D0018)
#define HI_ERR_CIPHER_ILLEGAL_DATA (HI_S32)(0x804D0019)
#define HI_ERR_CIPHER_RSA_SIGN (HI_S32)(0x804D001A)
#define HI_ERR_CIPHER_RSA_VERIFY (HI_S32)(0x804D001B)
#define HI_ERR_CIPHER_MEMSET_S_FAILED (HI_S32)(0x804D001C)
#define HI_ERR_CIPHER_MEMCPY_S_FAILED (HI_S32)(0x804D001D)
#define HI_ERR_CIPHER_RSA_CRYPT_FAILED (HI_S32)(0x804D001E)
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __CRYP_CIPHER_H__ */

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/*
* Copyright (C) Hisilicon Technologies Co., Ltd. 2019. All rights reserved.
* Description: definition of hi_common_qr.h
* Author: Hisilicon multimedia software (SVP) group
* Create: 2019-09-02
*/
#ifndef _HI_COMMOM_QR_H_
#define _HI_COMMOM_QR_H_
#include "hi_type.h"
#include "hi_errno.h"
#ifdef __cplusplus
#if __cplusplus
extern "C"{
#endif
#endif
#define HI_QR_MAX_PAYLOAD_LEN 256
typedef enum {
HI_QR_STATE_DECODE_SUCCESS = 0x00,
HI_QR_STATE_NON_EXISTENT = 0x01,
HI_QR_STATE_DECODE_FAIL = 0x02,
HI_QR_STATE_DATA_OVERFLOW = 0x03,
HI_QR_STATE_BUTT
} hi_qr_decode_state;
#define HI_ERR_QR_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_QR, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
#define HI_ERR_QR_EXIST HI_DEF_ERR(HI_ID_QR, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
#define HI_ERR_QR_NULL_PTR HI_DEF_ERR(HI_ID_QR, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
#define HI_ERR_QR_NO_MEM HI_DEF_ERR(HI_ID_QR, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
#define HI_ERR_QR_NOT_READY HI_DEF_ERR(HI_ID_QR, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
typedef struct {
hi_qr_decode_state state;
hi_s32 version;
hi_s32 ecc_level;
hi_s32 mask;
hi_s32 data_type;
hi_s32 payload_len;
hi_u32 eci;
hi_u8 payload[HI_QR_MAX_PAYLOAD_LEN];
} hi_qr_info;
typedef struct {
hi_u64 phys_addr;
hi_u64 virt_addr;
hi_u32 mem_size;
} hi_qr_mem_info;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif
#endif /* _HI_COMMON_QR_H_ */

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_debug.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/07/15
Last Modified :
Description : all struct and maro definition for debug
Function List :
******************************************************************************/
#ifndef __HI_DEBUG_H__
#define __HI_DEBUG_H__
#ifndef __KERNEL__
#include <stdio.h>
#include <stdarg.h>
#endif
#include "hi_type.h"
#include "hi_common.h"
#ifdef __cplusplus
#if __cplusplus
extern "C"{
#endif
#endif /* __cplusplus */
#define _EX__FILE_LINE(fxx,lxx) "[File]:"fxx"\n[Line]:"#lxx"\n[Info]:"
#define EX__FILE_LINE(fxx,lxx) _EX__FILE_LINE(fxx,lxx)
#define __FILE_LINE__ EX__FILE_LINE(__FILE__, __LINE__)
#define HI_DBG_EMERG 0 /* system is unusable */
#define HI_DBG_ALERT 1 /* action must be taken immediately */
#define HI_DBG_CRIT 2 /* critical conditions */
#define HI_DBG_ERR 3 /* error conditions */
#define HI_DBG_WARN 4 /* warning conditions */
#define HI_DBG_NOTICE 5 /* normal but significant condition */
#define HI_DBG_INFO 6 /* informational */
#define HI_DBG_DEBUG 7 /* debug-level messages */
typedef struct hiLOG_LEVEL_CONF_S
{
MOD_ID_E enModId;
HI_S32 s32Level;
HI_CHAR cModName[16];
} LOG_LEVEL_CONF_S;
#ifndef __KERNEL__
/******************************************************************************
** For User Mode : HI_PRINT, HI_ASSERT, HI_TRACE
******************************************************************************/
#define HI_PRINT printf
/* #ifdef HI_DEBUG */
#ifdef CONFIG_HI_LOG_TRACE_SUPPORT
/* Using samples: HI_ASSERT(x>y); */
#define HI_ASSERT(expr) \
do{ \
if (!(expr)) { \
printf("\nASSERT at:\n" \
" >Function : %s\n" \
" >Line No. : %d\n" \
" >Condition: %s\n", \
__FUNCTION__, __LINE__, #expr);\
_exit(-1);\
} \
}while(0)
/* Using samples:
** HI_TRACE(HI_DBG_DEBUG, HI_ID_CMPI, "Test %d, %s\n", 12, "Test");
**/
#define HI_TRACE(level, enModId, fmt...) fprintf(stderr,##fmt)
#else
#define HI_ASSERT(expr)
#define HI_TRACE(level, enModId, fmt...)
#endif
#else
/******************************************************************************
** For Linux Kernel : HI_PRINT, HI_ASSERT, HI_TRACE
******************************************************************************/
//#include "hi_osal.h"
#define HI_PRINT osal_printk
extern HI_S32 HI_ChkLogLevel(HI_S32 s32Levle, MOD_ID_E enModId);
int HI_LOG(HI_S32 level, MOD_ID_E enModId,const char *fmt, ...) __attribute__((format(printf,3,4)));
/* #ifdef HI_DEBUG */
#ifdef CONFIG_HI_LOG_TRACE_SUPPORT
/* Using samples: HI_ASSERT(x>y); */
#define HI_ASSERT(expr) \
do{ \
if (!(expr)) { \
osal_panic("\nASSERT at:\n" \
" >Function : %s\n" \
" >Line No. : %d\n" \
" >Condition: %s\n", \
__FUNCTION__, __LINE__, #expr);\
} \
}while(0)
/* Using samples:
** HI_TRACE(HI_DBG_DEBUG, HI_ID_CMPI, "Test %d, %s\n", 12, "Test");
**/
#define HI_TRACE HI_LOG
#else
#define HI_ASSERT(expr)
#define HI_TRACE(level, enModId, fmt...)
#endif
#endif /* end of __KERNEL__ */
#define HI_PRINT_BLOCK(pu8Datablock, u32Length) \
{ \
HI_U32 u32ii = 0; \
HI_U8* pu8VirAddr = (HI_U8*)(pu8Datablock); \
if(HI_NULL != pu8VirAddr)\
{\
HI_PRINT("\n[Func]:%s [Line]:%d [Info]:%s\n", __FUNCTION__, __LINE__, #pu8Datablock); \
for (u32ii = 0; u32ii < (u32Length);) \
{ \
HI_PRINT(" %02X", *pu8VirAddr);\
pu8VirAddr++;\
u32ii++;\
if(0 == (u32ii % 16))HI_PRINT("\n");\
} \
HI_PRINT("\n\n");\
}\
else\
{\
HI_PRINT("\n[Func]:%s [Line]:%d [Info]:pointer(%s) is null!\n", __FUNCTION__, __LINE__, #pu8Datablock); \
}\
}
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_DEBUG_H__ */

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/*
* Copyright (c) Hisilicon Technologies Co., Ltd. 2012-2019. All rights reserved.
* Description:
* Author: Hisilicon multimedia software group
* Create: 2011/06/28
*/
#ifndef __HI_DEFINES_H__
#define __HI_DEFINES_H__
#include "autoconf.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#ifndef HICHIP
#define HICHIP CONFIG_HI_CHIP_TYPE
#endif
/* "0x3559AEF" for Hi3559AV100ES */
#define HI3559A_V100ES 0x3559AEF
#define HI3559A_V100 0x3559A100
#define HI3519A_V100 0x3519A100
#define HI3516C_V500 0x3516C500
#define HI3516E_V200 0x3516E200
#define HI3516E_V300 0x3516E300
#define HI3518E_V300 0x3518E300
#define HI3516D_V200 0x3516D200
#define HI_CHIP_TEST 0x0
#define HI35xx_Vxxx 0x35000000
#if HICHIP == HI3559A_V100ES
#define CHIP_NAME "Hi3559AV100ES"
#elif HICHIP == HI3559A_V100
#define CHIP_NAME "Hi3559AV100"
#elif HICHIP == HI3519A_V100
#define CHIP_NAME "Hi3519AV100"
#elif HICHIP == HI3516C_V500
#define CHIP_NAME "Hi3516CV500"
#elif HICHIP == HI3516E_V200
#define CHIP_NAME "Hi3516EV200"
#elif HICHIP == HI35xx_Vxxx
#error HuHu, I am an dummy chip
#else
#error HICHIP define may be error
#endif
#define MPP_VER_PRIX "_MPP_V"
#define ALIGN_NUM 4
#define LUMA_PHY_ALIGN 16
#define DEFAULT_ALIGN 8
#define MAX_ALIGN 1024
#define SEG_CMP_LENGTH 128
#define MAX_MMZ_NAME_LEN 16
#define VO_MAX_NODE_NUM 16
/* For VB */
#define VB_MAX_POOLS 512
/* For VENC */
#define VENC_MAX_NAME_LEN 16
#define VENC_MAX_CHN_NUM 16
#define VEDU_IP_NUM 1
#define H264E_MAX_WIDTH 3072
#define H264E_MAX_HEIGHT 3072
#define H264E_MIN_WIDTH 114
#define H264E_MIN_HEIGHT 114
#define H265E_MAX_WIDTH 3072
#define H265E_MAX_HEIGHT 3072
#define H265E_MIN_WIDTH 114
#define H265E_MIN_HEIGHT 114
#define JPEGE_MAX_WIDTH 8192
#define JPEGE_MAX_HEIGHT 8192
#define JPEGE_MIN_WIDTH 32
#define JPEGE_MIN_HEIGHT 32
#define JPGE_MAX_NUM 1
#define VENC_MAX_ROI_NUM 8
#define H264E_MIN_HW_INDEX 0
#define H264E_MAX_HW_INDEX 11
#define H264E_MIN_VW_INDEX 0
#define H264E_MAX_VW_INDEX 3
#define VENC_QP_HISGRM_NUM 52
#define MAX_TILE_NUM 1
#define H265E_ADAPTIVE_FRAME_TYPE 4
#define H265E_ADAPTIVE_QP_TYPE 5
#define H265E_LCU_SIZE 32
#define VENC_MIN_INPUT_FRAME_RATE 1
#define VENC_MAX_INPUT_FRAME_RATE 240
#define VENC_MAX_RECEIVE_SOURCE 4
#define VENC_PIC_RECEIVE_SOURCE0 0
#define VENC_PIC_RECEIVE_SOURCE1 1
#define VENC_PIC_RECEIVE_SOURCE2 2
#define VENC_PIC_RECEIVE_SOURCE3 3
/* For RC */
#define RC_TEXTURE_THR_SIZE 16
#define MIN_BITRATE 2
#define MAX_BITRATE 60 * 1024
#define MAX_EXTRA_BITRATE 1000 * 1024
/* For Region */
#define RGN_MIN_WIDTH 2
#define RGN_MIN_HEIGHT 2
#define RGN_COVER_MIN_X 0
#define RGN_COVER_MIN_Y 0
#define RGN_COVER_MAX_X 4094
#define RGN_COVER_MAX_Y 4094
#define RGN_COVER_MAX_WIDTH 4096
#define RGN_COVER_MAX_HEIGHT 4096
#define RGN_COVER_MIN_THICK 2
#define RGN_COVER_MAX_THICK 8
#define RGN_COVEREX_MIN_X -4096
#define RGN_COVEREX_MIN_Y -4096
#define RGN_COVEREX_MAX_X 4094
#define RGN_COVEREX_MAX_Y 4094
#define RGN_COVEREX_MAX_WIDTH 4096
#define RGN_COVEREX_MAX_HEIGHT 4096
#define RGN_COVEREX_MIN_THICK 2
#define RGN_COVEREX_MAX_THICK 14
#define RGN_OVERLAY_MIN_X 0
#define RGN_OVERLAY_MIN_Y 0
#define RGN_OVERLAY_MAX_X 4094
#define RGN_OVERLAY_MAX_Y 4094
#define RGN_OVERLAY_MAX_WIDTH 4096
#define RGN_OVERLAY_MAX_HEIGHT 4096
#define RGN_OVERLAYEX_MIN_X 0
#define RGN_OVERLAYEX_MIN_Y 0
#define RGN_OVERLAYEX_MAX_X 4094
#define RGN_OVERLAYEX_MAX_Y 4094
#define RGN_OVERLAYEX_MAX_WIDTH 4096
#define RGN_OVERLAYEX_MAX_HEIGHT 4096
#define RGN_MOSAIC_X_ALIGN 4
#define RGN_MOSAIC_Y_ALIGN 2
#define RGN_MOSAIC_WIDTH_ALIGN 4
#define RGN_MOSAIC_HEIGHT_ALIGN 2
#define RGN_MOSAIC_MIN_X 0
#define RGN_MOSAIC_MIN_Y 0
#define RGN_MOSAIC_MAX_X 4092
#define RGN_MOSAIC_MAX_Y 4094
#define RGN_MOSAIC_MIN_WIDTH 8
#define RGN_MOSAIC_MIN_HEIGHT 8
#define RGN_MOSAIC_MAX_WIDTH 4096
#define RGN_MOSAIC_MAX_HEIGHT 4096
#define RGN_ALIGN 2
#define RGN_HANDLE_MAX 128
#define RGN_MAX_BUF_NUM 6
#define COVER_MAX_NUM_VI 0
#define COVEREX_MAX_NUM_VI 16
#define OVERLAY_MAX_NUM_VI 0
#define OVERLAYEX_MAX_NUM_VI 16
#define MOSAIC_MAX_NUM_VI 0
#define OVERLAY_MAX_NUM_VENC 8
#define OVERLAYEX_MAX_NUM_VENC 8
#define COVER_MAX_NUM_VPSS 8
#define COVEREX_MAX_NUM_VPSS 8
#define OVERLAY_MAX_NUM_VPSS 0
#define OVERLAYEX_MAX_NUM_VPSS 8
#define MOSAIC_MAX_NUM_VPSS 4
#define OVERLAYEX_MAX_NUM_AVS 0
#define COVEREX_MAX_NUM_VO 1
#define OVERLAYEX_MAX_NUM_VO 1
#define OVERLAYEX_MAX_NUM_PCIV 0
#define RGN_VGS_TASK_WIDTH_MAX 4096
/*************************************/
#define VENC_MAX_SSE_NUM 8
#define HISI_MAX_SENSOR_NUM 2
/* For VI */
/* number of channle and device on video input unit of chip
* Note! VI_MAX_CHN_NUM is NOT equal to VI_MAX_DEV_NUM
* multiplied by VI_MAX_CHN_NUM, because all VI devices
* can't work at mode of 4 channles at the same time.
*/
#define VI_MAX_DEV_NUM 1
#define VI_MAX_PHY_PIPE_NUM 2
#define VI_MAX_VIR_PIPE_NUM 0
#define VI_MAX_PIPE_NUM (VI_MAX_PHY_PIPE_NUM + VI_MAX_VIR_PIPE_NUM)
#define VI_MAX_STITCH_GRP_NUM 1
#define VI_MAX_WDR_NUM 2
#define VI_MAX_PHY_CHN_NUM 1
#ifdef CONFIG_HI_VI_EXTCHN_SUPPORT
#define VI_MAX_EXT_CHN_NUM 8
#else
#define VI_MAX_EXT_CHN_NUM 0
#endif
#define VI_EXT_CHN_START VI_MAX_PHY_CHN_NUM
#define VI_MAX_CHN_NUM (VI_MAX_PHY_CHN_NUM + VI_MAX_EXT_CHN_NUM)
#define VI_MAX_EXTCHN_BIND_PER_CHN 8
#define VIPROC_IRQ_NUM 1
#define VI_MAX_WDR_FRAME_NUM 2
#define VI_MAX_NODE_NUM 2
#define VIPROC_IP_NUM 1
#define VICAP_IP_NUM 1
#define VI_MAX_SPLIT_NODE_NUM 2
#define VI_DEV_MIN_WIDTH 120
#define VI_DEV_MIN_HEIGHT 120
#define VI_DEV_MAX_WIDTH 3072
#define VI_DEV_MAX_HEIGHT 3072
#define VI_FPN_MAX_WIDTH 3072
#define VI_FPN_MAX_HEIGHT VI_DEV_MAX_HEIGHT
#define VI_PIPE_OFFLINE_MIN_WIDTH 120
#define VI_PIPE_OFFLINE_MIN_HEIGHT 120
#define VI_PIPE_OFFLINE_MAX_WIDTH 3072
#define VI_PIPE_OFFLINE_MAX_HEIGHT 3072
#define VI_PIPE_ONLINE_MIN_WIDTH 120
#define VI_PIPE_ONLINE_MIN_HEIGHT 120
#define VI_PIPE_ONLINE_MAX_WIDTH 2304
#define VI_PIPE_ONLINE_MAX_HEIGHT 3072
#define VI_PHYCHN_OFFLINE_MIN_WIDTH 120
#define VI_PHYCHN_OFFLINE_MIN_HEIGHT 120
#define VI_PHYCHN_OFFLINE_MAX_WIDTH 3072
#define VI_PHYCHN_OFFLINE_MAX_HEIGHT 3072
#define VI_PHYCHN_ONLINE_MIN_WIDTH 120
#define VI_PHYCHN_ONLINE_MIN_HEIGHT 120
#define VI_PHYCHN_ONLINE_MAX_WIDTH 2304
#define VI_PHYCHN_ONLINE_MAX_HEIGHT 3072
#define VI_EXTCHN_MIN_WIDTH 32
#define VI_EXTCHN_MIN_HEIGHT 32
#define VI_EXTCHN_MAX_WIDTH 4096
#define VI_EXTCHN_MAX_HEIGHT 4096
#define VI_PHY_CHN1_MAX_ZOOMIN 1
#define VI_PHY_CHN1_MAX_ZOOMOUT 30
#define VI_EXT_CHN_MAX_ZOOMIN 16
#define VI_EXT_CHN_MAX_ZOOMOUT 30
#define VI_CMP_PARAM_SIZE 144
#define VI_VPSS_DEFAULT_EARLINE 128
/* For DIS */
#define DIS_PYRAMID_LAYER_NUM 5
#define DIS_MAX_CHN_NUM 2
#define DIS_MAX_IMAGE_WIDTH (3840)
#define DIS_MIN_IMAGE_WIDTH (1280)
#define DIS_MAX_IMAGE_HEIGHT (2160)
#define DIS_MIN_IMAGE_HEIGHT (720)
/* For VO */
#define VO_MAX_VIRT_DEV_NUM 0 /* max virtual dev num */
#define VO_MAX_PHY_DEV_NUM 1 /* max physical dev num */
#define VO_MIN_CHN_WIDTH 32 /* channel minimal width */
#define VO_MIN_CHN_HEIGHT 32 /* channel minimal height */
#define VO_MAX_ZOOM_RATIO 1000 /* max zoom ratio, 1000 means 100% scale */
#define VO_MAX_DEV_NUM 1 /* max dev num */
#define VO_MAX_LAYER_NUM 1 /* max layer num */
#define VO_MAX_PRIORITY 1 /* max layer priority */
#define VO_MAX_CHN_NUM 1 /* max chn num */
#define VO_MAX_LAYER_IN_DEV 1 /* max layer num of each dev */
#define VO_MAX_GRAPHICS_LAYER_NUM 1
#define VO_MAX_WBC_NUM 1
#define VO_MIN_TOLERATE 1 /* min play toleration 1ms */
#define VO_MAX_TOLERATE 100000 /* max play toleration 100s */
/* For AVS */
#define AVS_MAX_GRP_NUM 32 /* max grp num */
#define AVS_PIPE_NUM 4 /* max pipe num */
#define AVS_MAX_CHN_NUM 2 /* max chn num */
#define AVS_SPLIT_NUM 2
#define AVS_SPLIT_PIPE_NUM 6
#define AVS_CUBE_MAP_SURFACE_NUM 6
#define AVS_MAX_IN_WIDTH 8192
#define AVS_MAX_IN_HEIGHT 8192
#define AVS_MIN_IN_WIDTH 1280
#define AVS_MIN_IN_HEIGHT 720
#define AVS_MAX_OUT_WIDTH 8192
#define AVS_MAX_OUT_HEIGHT 8192
#define AVS_MIN_OUT_WIDTH 256
#define AVS_MIN_OUT_HEIGHT 256
/* For AUDIO */
#define AI_DEV_MAX_NUM 1
#define AO_DEV_MIN_NUM 0
#define AO_DEV_MAX_NUM 1
#define AIO_MAX_NUM 1
#define AENC_MAX_CHN_NUM 32
#define ADEC_MAX_CHN_NUM 32
#define AI_MAX_CHN_NUM 2
#define AO_MAX_CHN_NUM 3
#define AO_SYSCHN_CHNID (AO_MAX_CHN_NUM - 1)
#define AIO_MAX_CHN_NUM ((AO_MAX_CHN_NUM > AI_MAX_CHN_NUM) ? AO_MAX_CHN_NUM : AI_MAX_CHN_NUM)
/* For VPSS */
#define VPSS_IP_NUM 1
#define VPSS0 0
#define VPSS_MAX_GRP_NUM 8
#define VPSS_MAX_GRP_PIPE_NUM 1
#define VPSS_PARALLEL_PIC_NUM 1
#define VPSS_MAX_PHY_CHN_NUM 3
#define VPSS_LOWDELAY_CHN_NUM 2
#define VPSS_MAX_EXT_CHN_NUM 4
#define VPSS_MAX_CHN_NUM (VPSS_MAX_PHY_CHN_NUM + VPSS_MAX_EXT_CHN_NUM)
#define VPSS_MIN_IMAGE_WIDTH_SBS 512
#define VPSS_MIN_IMAGE_WIDTH 64
#define VPSS_MIN_IMAGE_HEIGHT 64
#define VPSS_MAX_IMAGE_WIDTH_SLAVE 4096
#define VPSS_MAX_IN_IMAGE_WIDTH 4096
#define VPSS_MAX_IMAGE_WIDTH 4096
#define VPSS_MAX_IMAGE_HEIGHT 4096
#define VPSS_MAX_CMP_IMAGE_WIDTH 3072
#define VPSS_MAX_CMP_IMAGE_HEIGHT 3072
#define VPSS_EXTCHN_MAX_IMAGE_WIDTH 4096
#define VPSS_EXTCHN_MAX_IMAGE_HEIGHT 4096
#define VPSS_MAX_ZOOMIN 16
#define VPSS_MAX_ZOOMOUT 15
#define VPSS_EXT_CHN_MAX_ZOOMIN 16
#define VPSS_EXT_CHN_MAX_ZOOMOUT 30
#define VPSS_LINE_BUFFER 2304
/* For PCIV */
#define PCIV_MAX_CHN_NUM 16 /* max pciv channel number in each pciv device */
/* For IVS_MD */
#define MD_MAX_CHN 64
#define MD_MAX_WIDTH 1920
#define MD_MAX_HEIGHT 1080
#define MD_MIN_WIDTH 64
#define MD_MIN_HEIGHT 64
/* For RECT */
#define DPU_RECT_MAX_GRP_NUM 8
#define DPU_RECT_MAX_PIPE_NUM 2
#define DPU_RECT_MAX_CHN_NUM 2
#define DPU_RECT_IN_IMAGE_MAX_WIDTH 2048
#define DPU_RECT_IN_IMAGE_MAX_HEIGHT 2048
#define DPU_RECT_IN_IMAGE_MIN_WIDTH 128
#define DPU_RECT_IN_IMAGE_MIN_HEIGHT 64
#define DPU_RECT_OUT_IMAGE_MAX_WIDTH 1920
#define DPU_RECT_OUT_IMAGE_MAX_HEIGHT 1080
#define DPU_RECT_OUT_IMAGE_MIN_WIDTH 128
#define DPU_RECT_OUT_IMAGE_MIN_HEIGHT 64
/* For MATCH */
#define DPU_MATCH_MAX_GRP_NUM 8
#define DPU_MATCH_MAX_PIPE_NUM 2
#define DPU_MATCH_MAX_CHN_NUM 1
#define DPU_MATCH_IN_IMAGE_MAX_WIDTH 1920
#define DPU_MATCH_IN_IMAGE_MAX_HEIGHT 1080
#define DPU_MATCH_IN_IMAGE_MIN_WIDTH 128
#define DPU_MATCH_IN_IMAGE_MIN_HEIGHT 64
#define DPU_MATCH_OUT_IMAGE_MAX_WIDTH 1920
#define DPU_MATCH_OUT_IMAGE_MAX_HEIGHT 1080
#define DPU_MATCH_OUT_IMAGE_MIN_WIDTH 128
#define DPU_MATCH_OUT_IMAGE_MIN_HEIGHT 64
/* For Gdc */
#define FISHEYE_MIN_IN_IMAGE_WIDTH 1920
#define FISHEYE_MIN_IN_IMAGE_HEIGHT 1080
#define FISHEYE_MIN_OUT_IMAGE_WIDTH 640
#define FISHEYE_MIN_OUT_IMAGE_HEIGHT 360
#define LDC_MIN_IMAGE_WIDTH 640
#define LDC_MIN_IMAGE_HEIGHT 480
#define SPREAD_MIN_IMAGE_WIDTH 640
#define SPREAD_MIN_IMAGE_HEIGHT 480
#define PMF_MIN_IMAGE_WIDTH 480
#define PMF_MIN_IMAGE_HEIGHT 360
#define ROTATION_EX_MIN_IMAGE_WIDTH 640
#define ROTATION_EX_MIN_IMAGE_HEIGHT 480
/* For GDC */
#define GDC_MAX_IMAGE_WIDTH 4608
#define GDC_MAX_IMAGE_HEIGHT 4608
#define GDC_IP_NUM 1
#define GDC_FUSION_NUM 9
/* For VGS */
#define VGS_IP_NUM 1
#define VGS0 0
#define VGS1 1
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_DEFINES_H__ */

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/******************************************************************************
Copyright (C), 2016, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_errno.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/07/15
Last Modified :
Description : define the format of error code
Function List :
******************************************************************************/
#ifndef __HI_ERRNO_H__
#define __HI_ERRNO_H__
#include "hi_debug.h"
#ifdef __cplusplus
#if __cplusplus
extern "C"{
#endif
#endif /* End of #ifdef __cplusplus */
/* 1010 0000b
* VTOP use APPID from 0~31
* so, hisilicon use APPID based on 32
*/
#define HI_ERR_APPID (0x80000000L + 0x20000000L)
typedef enum hiERR_LEVEL_E
{
EN_ERR_LEVEL_DEBUG = 0, /* debug-level */
EN_ERR_LEVEL_INFO, /* informational */
EN_ERR_LEVEL_NOTICE, /* normal but significant condition */
EN_ERR_LEVEL_WARNING, /* warning conditions */
EN_ERR_LEVEL_ERROR, /* error conditions */
EN_ERR_LEVEL_CRIT, /* critical conditions */
EN_ERR_LEVEL_ALERT, /* action must be taken immediately */
EN_ERR_LEVEL_FATAL, /* just for compatibility with previous version */
EN_ERR_LEVEL_BUTT
}ERR_LEVEL_E;
/******************************************************************************
|----------------------------------------------------------------|
| 1 | APP_ID | MOD_ID | ERR_LEVEL | ERR_ID |
|----------------------------------------------------------------|
|<--><--7bits----><----8bits---><--3bits---><------13bits------->|
******************************************************************************/
#define HI_DEF_ERR( module, level, errid) \
((HI_S32)( (HI_ERR_APPID) | ((module) << 16 ) | ((level)<<13) | (errid) ))
/* NOTE! the following defined all common error code,
** all module must reserved 0~63 for their common error code
*/
typedef enum hiEN_ERR_CODE_E
{
EN_ERR_INVALID_DEVID = 1, /* invlalid device ID */
EN_ERR_INVALID_CHNID = 2, /* invlalid channel ID */
EN_ERR_ILLEGAL_PARAM = 3, /* at lease one parameter is illagal
* eg, an illegal enumeration value */
EN_ERR_EXIST = 4, /* resource exists */
EN_ERR_UNEXIST = 5, /* resource unexists */
EN_ERR_NULL_PTR = 6, /* using a NULL point */
EN_ERR_NOT_CONFIG = 7, /* try to enable or initialize system, device
** or channel, before configing attribute */
EN_ERR_NOT_SUPPORT = 8, /* operation or type is not supported by NOW */
EN_ERR_NOT_PERM = 9, /* operation is not permitted
** eg, try to change static attribute */
EN_ERR_INVALID_PIPEID = 10, /* invlalid pipe ID */
EN_ERR_INVALID_STITCHGRPID = 11, /* invlalid stitch group ID */
EN_ERR_NOMEM = 12,/* failure caused by malloc memory */
EN_ERR_NOBUF = 13,/* failure caused by malloc buffer */
EN_ERR_BUF_EMPTY = 14,/* no data in buffer */
EN_ERR_BUF_FULL = 15,/* no buffer for new data */
EN_ERR_SYS_NOTREADY = 16,/* System is not ready,maybe not initialed or
** loaded. Returning the error code when opening
** a device file failed. */
EN_ERR_BADADDR = 17,/* bad address,
** eg. used for copy_from_user & copy_to_user */
EN_ERR_BUSY = 18,/* resource is busy,
** eg. destroy a venc chn without unregister it */
EN_ERR_SIZE_NOT_ENOUGH = 19, /* buffer size is smaller than the actual size required */
EN_ERR_BUTT = 63,/* maxium code, private error code of all modules
** must be greater than it */
}EN_ERR_CODE_E;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_ERRNO_H__ */

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