Add Ingenic T31

br-ext-chip-ingenic/Config.in

@@ -1,4 +1,5 @@
 source "$BR2_EXTERNAL_INGENIC_PATH/linux/Config.ext.in"
+source "$BR2_EXTERNAL_INGENIC_PATH/package/ingenic-osdrv-t31/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/ingenic_patcher/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/aura-httpd/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/dropbear-openipc/Config.in"
@@ -14,8 +15,8 @@ source "$BR2_EXTERNAL_INGENIC_PATH/package/libogg-openipc/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/libsrt-openipc/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/libwebsockets-openipc/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/linux-firmware-openipc/Config.in"
-source "$BR2_EXTERNAL_INGENIC_PATH/package/majestic-fonts/Config.in"
-source "$BR2_EXTERNAL_INGENIC_PATH/package/majestic/Config.in"
+#source "$BR2_EXTERNAL_INGENIC_PATH/package/majestic-fonts/Config.in"
+#source "$BR2_EXTERNAL_INGENIC_PATH/package/majestic/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/mbedtls-openipc/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/microbe-web/Config.in"
 source "$BR2_EXTERNAL_INGENIC_PATH/package/motors/Config.in"

br-ext-chip-ingenic/board/t31/kernel/overlay/include/linux/compiler-gcc7.h

@@ -0,0 +1,65 @@
+#ifndef __LINUX_COMPILER_H
+#error "Please don't include <linux/compiler-gcc7.h> directly, include <linux/compiler.h> instead."
+#endif
+
+#define __used				__attribute__((__used__))
+#define __must_check			__attribute__((warn_unused_result))
+#define __compiler_offsetof(a, b)	__builtin_offsetof(a, b)
+
+/* Mark functions as cold. gcc will assume any path leading to a call
+   to them will be unlikely.  This means a lot of manual unlikely()s
+   are unnecessary now for any paths leading to the usual suspects
+   like BUG(), printk(), panic() etc. [but let's keep them for now for
+   older compilers]
+
+   Early snapshots of gcc 4.3 don't support this and we can't detect this
+   in the preprocessor, but we can live with this because they're unreleased.
+   Maketime probing would be overkill here.
+
+   gcc also has a __attribute__((__hot__)) to move hot functions into
+   a special section, but I don't see any sense in this right now in
+   the kernel context */
+#define __cold			__attribute__((__cold__))
+
+#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
+
+#ifndef __CHECKER__
+# define __compiletime_warning(message) __attribute__((warning(message)))
+# define __compiletime_error(message) __attribute__((error(message)))
+#endif /* __CHECKER__ */
+
+/*
+ * Mark a position in code as unreachable.  This can be used to
+ * suppress control flow warnings after asm blocks that transfer
+ * control elsewhere.
+ *
+ * Early snapshots of gcc 4.5 don't support this and we can't detect
+ * this in the preprocessor, but we can live with this because they're
+ * unreleased.  Really, we need to have autoconf for the kernel.
+ */
+#define unreachable() __builtin_unreachable()
+
+/* Mark a function definition as prohibited from being cloned. */
+#define __noclone	__attribute__((__noclone__))
+
+/*
+ * Tell the optimizer that something else uses this function or variable.
+ */
+#define __visible __attribute__((externally_visible))
+
+/*
+ * GCC 'asm goto' miscompiles certain code sequences:
+ *
+ *   http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670
+ *
+ * Work it around via a compiler barrier quirk suggested by Jakub Jelinek.
+ *
+ * (asm goto is automatically volatile - the naming reflects this.)
+ */
+#define asm_volatile_goto(x...)	do { asm goto(x); asm (""); } while (0)
+
+#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP
+#define __HAVE_BUILTIN_BSWAP32__
+#define __HAVE_BUILTIN_BSWAP64__
+#define __HAVE_BUILTIN_BSWAP16__
+#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */

br-ext-chip-ingenic/board/t31/kernel/patches/0004-cp1emu.patch

@@ -0,0 +1,19 @@
+--- a/arch/mips/math-emu/cp1emu.c
++++ b/arch/mips/math-emu/cp1emu.c
+@@ -874,13 +874,13 @@
+ #define SIFROMREG(si, x) ((si) = cop1_64bit(xcp) || !(x & 1) ? \
+ 			(int)ctx->fpr[x] : (int)(ctx->fpr[x & ~1] >> 32))
+ 
+-#define SITOREG(si, x)	(ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = \
++#define SITOREG(si, x)	(ctx->fpr[x & !(cop1_64bit(xcp) == 0)] = \
+ 			cop1_64bit(xcp) || !(x & 1) ? \
+ 			ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
+ 			ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
+ 
+-#define DIFROMREG(di, x) ((di) = ctx->fpr[x & ~(cop1_64bit(xcp) == 0)])
+-#define DITOREG(di, x)	(ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = (di))
++#define DIFROMREG(di, x) ((di) = ctx->fpr[x & !(cop1_64bit(xcp) == 0)])
++#define DITOREG(di, x)	(ctx->fpr[x & !(cop1_64bit(xcp) == 0)] = (di))
+ 
+ #define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
+ #define SPTOREG(sp, x)	SITOREG((sp).bits, x)

br-ext-chip-ingenic/board/t31/kernel/patches/0005-disable-i2c-clk-get.patch

@@ -0,0 +1,528 @@
+--- a/mnt/pk/Dev/dvr/openipc/openipc-t31/output/build/linux-3.10.14/arch/mips/xburst/soc-t31/common/clk/clk_cgu.c
++++ /dev/null
+@@ -1,525 +0,0 @@
+-#include <linux/spinlock.h>
+-#include <linux/io.h>
+-#include <linux/clk.h>
+-#include <linux/delay.h>
+-#include <linux/err.h>
+-#include <soc/cache.h>
+-#include <soc/cpm.h>
+-#include <soc/base.h>
+-#include <soc/extal.h>
+-#include <soc/ddr.h>
+-#include "clk.h"
+-static DEFINE_SPINLOCK(cpm_cgu_lock);
+-struct clk_selectors {
+-	unsigned int route[4];
+-};
+-enum {
+-	SELECTOR_A = 0,
+-	SELECTOR_2,
+-	SELECTOR_C,
+-	SELECTOR_3,
+-	SELECTOR_MSC_MUX,
+-	SELECTOR_F,
+-	SELECTOR_H
+-};
+-const struct clk_selectors selector[] = {
+-#define CLK(X)  CLK_ID_##X
+-/*
+- *         bit31,bit30
+- *          0   , 0       STOP
+- *          0   , 1       SCLKA
+- *          1   , 0       MPLL
+- *          1   , 1       INVALID
+- */
+-	[SELECTOR_A].route = {CLK(STOP),CLK(SCLKA),CLK(MPLL),CLK(INVALID)},
+-/*
+- *         bit31,bit30
+- *          0   , x       SCLKA
+- *          0   , x       SCLKA
+- *          1   , x       MPLL
+- *          1   , x       MPLL
+- */
+-	[SELECTOR_2].route  = {CLK(SCLKA),CLK(SCLKA),CLK(MPLL),CLK(MPLL)},
+-/*
+- *         bit31,bit30
+- *          0   , 0       EXT1
+- *          0   , 1       EXT1
+- *          1   , 0       SCLKA
+- *          1   , 1       MPLL
+- */
+-	[SELECTOR_C].route = {CLK(EXT1) ,CLK(EXT1),CLK(SCLKA),CLK(MPLL)},
+-/*
+- *         bit31,bit30
+- *          0   , 0       SCLKA
+- *          0   , 1       MPLL
+- *          1   , 0       VPLL
+- *          1   , 1       VPLL
+- */
+-	[SELECTOR_3].route = {CLK(SCLKA),CLK(MPLL),CLK(VPLL),CLK(VPLL)},
+-
+-/*
+- *         bit31,bit30
+- *          0   , 0       MSC_MUX
+- *          0   , 1       MSC_MUX
+- *          1   , 0       MSC_MUX
+- *          1   , 1       MSC_MUX
+- */
+-	[SELECTOR_MSC_MUX].route = {CLK(SCLKA),CLK(SCLKA),CLK(MPLL),CLK(MPLL)},
+-/*
+- *         bit31,bit30
+- *          0   , x       SCLKA
+- *          0   , x       SCLKA
+- *          1   , x       OTGPHY
+- *          1   , x       OTGPHY
+- */
+-	[SELECTOR_F].route = {CLK(SCLKA),CLK(SCLKA),CLK(OTGPHY),CLK(OTGPHY)},
+-	/*
+-	 *		   bit31,bit30
+-	 *			0	, 0 	  SCLKA
+-	 *			0	, 1 	  MPLL
+-	 *			1	, 0 	  VPLL
+-	 *			1	, 1 	  INVALID
+-	 */
+-	[SELECTOR_H].route = {CLK(SCLKA),CLK(MPLL),CLK(VPLL),CLK(INVALID)},
+-
+-#undef CLK
+-};
+-
+-#define IS_CGU_CLK(x) (x&CLK_FLG_CGU)
+-
+-struct cgu_clk {
+-	/* off: reg offset. ce_busy_stop: CE offset  + 1 is busy. coe : coe for div .div: div bit width */
+-	/* ext: extal/pll sel bit. sels: {select} */
+-	int off,ce_busy_stop,coe,div,sel,cache;
+-};
+-static struct cgu_clk cgu_clks[] = {
+-	[CGU_DDR] = 	{ CPM_DDRCDR, 27, 1, 4, SELECTOR_A},
+-	[CGU_VPU] = 	{ CPM_VPUCDR, 27, 1, 4, SELECTOR_H},
+-	[CGU_MACPHY] = 	{ CPM_MACCDR, 27, 1, 8, SELECTOR_H},
+-	[CGU_RSA] = 	{ CPM_RSACDR, 27, 1, 4, SELECTOR_H},
+-	[CGU_LPC] = 	{ CPM_LPCDR,  26, 1, 8, SELECTOR_H},
+-	[CGU_MSC_MUX]=	{ CPM_MSC0CDR, 27, 2, 0, SELECTOR_MSC_MUX},/*TODO:what does it mean?*/
+-	[CGU_MSC0] = 	{ CPM_MSC0CDR, 27, 2, 8, SELECTOR_H},
+-	[CGU_MSC1] = 	{ CPM_MSC1CDR, 27, 2, 8, SELECTOR_H},
+-	[CGU_I2S_SPK] = 	{ CPM_I2SSPKCDR, 29, 0, 20, SELECTOR_H}, /*TODO:check*/
+-	[CGU_I2S_MIC] = 	{ CPM_I2SMICCDR, 29, 0, 20, SELECTOR_H}, /*TODO:check*/
+-	[CGU_SSI] = 	{ CPM_SSICDR, 26, 1, 8, SELECTOR_H},
+-	[CGU_CIM] =     { CPM_CIMCDR, 27, 1, 8, SELECTOR_H},
+-	[CGU_ISP] = 	{ CPM_ISPCDR, 27, 1, 4, SELECTOR_H},
+-};
+-
+-static unsigned long cgu_get_rate(struct clk *clk)
+-{
+-	unsigned long x;
+-	unsigned long flags;
+-	int no = CLK_CGU_NO(clk->flags);
+-
+-	if (!(strcmp(clk->name, "cgu_i2s_spk")) || !(strcmp(clk->name, "cgu_i2s_mic"))) {
+-		unsigned int reg_val = 0;
+-		int m = 0, n = 0;
+-		reg_val = cpm_inl(cgu_clks[no].off) & 0xf0000000;
+-		n = reg_val & 0xfffff;
+-		m = (reg_val >> 20) & 0x1ff;
+-
+-		printk(KERN_DEBUG"%s, parent = %ld, rate = %ld, m = %d, n = %d, reg val = 0x%08x\n",
+-				__func__, clk->parent->rate, clk->rate, m, n, cpm_inl(cgu_clks[no].off));
+-		return (clk->parent->rate * m) / n;
+-	}
+-
+-	if(clk->parent == get_clk_from_id(CLK_ID_EXT1))
+-		return clk->parent->rate;
+-	if(no == CGU_MSC_MUX)
+-		return clk->parent->rate;
+-	if(cgu_clks[no].div == 0)
+-		return clk_get_rate(clk->parent);
+-	spin_lock_irqsave(&cpm_cgu_lock,flags);
+-	x = cpm_inl(cgu_clks[no].off);
+-	x &= (1 << cgu_clks[no].div) - 1;
+-	x = (x + 1) * cgu_clks[no].coe;
+-
+-	spin_unlock_irqrestore(&cpm_cgu_lock,flags);
+-	return clk->parent->rate / x;
+-}
+-static int cgu_enable(struct clk *clk,int on)
+-{
+-	int no = CLK_CGU_NO(clk->flags);
+-	int reg_val;
+-	int ce,stop,busy;
+-	int prev_on;
+-	unsigned int mask;
+-	unsigned long flags;
+-	if(no == CGU_MSC_MUX)
+-		return 0;
+-
+-	spin_lock_irqsave(&cpm_cgu_lock,flags);
+-
+-	if (!(strcmp(clk->name, "cgu_i2s_spk")) || !(strcmp(clk->name, "cgu_i2s_mic"))) {
+-		reg_val = cpm_inl(cgu_clks[no].off);
+-		reg_val |= (1 << 29);
+-		cpm_outl(reg_val,cgu_clks[no].off);
+-		printk(KERN_DEBUG"%s,%s reg val = 0x%08x\n",
+-				__func__, clk->name, cpm_inl(cgu_clks[no].off));
+-		goto cgu_enable_finish;
+-	}
+-
+-	reg_val = cpm_inl(cgu_clks[no].off);
+-	stop = cgu_clks[no].ce_busy_stop;
+-	busy = stop + 1;
+-	ce = stop + 2;
+-	prev_on = !(reg_val & (1 << stop));
+-	mask = (1 << cgu_clks[no].div) - 1;
+-	if(prev_on && on)
+-		goto cgu_enable_finish;
+-	if((!prev_on) && (!on))
+-		goto cgu_enable_finish;
+-	if(on){
+-		if(cgu_clks[no].cache && ((cgu_clks[no].cache & mask) != (reg_val & mask))) {
+-			unsigned int x = cgu_clks[no].cache;
+-			x = (x & ~(0x1 << stop)) | (0x1 << ce);
+-			cpm_outl(x,cgu_clks[no].off);
+-			while(cpm_test_bit(busy,cgu_clks[no].off)) {
+-				printk("wait stable.[%d][%s]\n",__LINE__,clk->name);
+-			}
+-			cpm_clear_bit(ce, cgu_clks[no].off);
+-			x &= (1 << cgu_clks[no].div) - 1;
+-			x = (x + 1) * cgu_clks[no].coe;
+-			clk->rate = clk->parent->rate / x;
+-			cgu_clks[no].cache = 0;
+-		} else {
+-			reg_val |= (1 << ce);
+-			reg_val &= ~(1 << stop);
+-			cpm_outl(reg_val,cgu_clks[no].off);
+-			cpm_clear_bit(ce,cgu_clks[no].off);
+-		}
+-	} else {
+-		reg_val |= (1 << ce);
+-		reg_val |= ( 1<< stop);
+-		cpm_outl(reg_val,cgu_clks[no].off);
+-		cpm_clear_bit(ce,cgu_clks[no].off);
+-	}
+-
+-cgu_enable_finish:
+-	spin_unlock_irqrestore(&cpm_cgu_lock,flags);
+-	return 0;
+-}
+-
+-static int cgu_set_rate(struct clk *clk, unsigned long rate)
+-{
+-	unsigned long x,tmp;
+-	int i,no = CLK_CGU_NO(clk->flags);
+-	int ce,stop,busy;
+-
+-	unsigned int reg_val, mask;
+-	unsigned long flags;
+-	unsigned long long m, n;
+-	unsigned long long m_mul;
+-	unsigned long long tmp_value;
+-	unsigned long long tmp_rate = (unsigned long long)rate;
+-	unsigned char sig = 0;
+-	unsigned long long max = 0xfffff;
+-	unsigned long long min = 1;
+-	/* CLK_ID_CGU_I2S could be exten clk. */
+-	//if(clk->parent == get_clk_from_id(CLK_ID_EXT1) && (clk->CLK_ID != CLK_ID_CGU_I2S))
+-	//    //return -1;
+-	//
+-	if(no == CGU_MSC_MUX)
+-		return -1;
+-	if (!(strcmp(clk->name, "cgu_i2s_spk")) || !(strcmp(clk->name, "cgu_i2s_mic"))) {
+-		for(m=1;m<=0x1ff;m++)
+-		{
+-			m_mul = clk->parent->rate * m;
+-			max = 0xfffff;
+-			min = 1;
+-			while(max >= min){
+-				n = (max + min) >> 1;
+-				tmp_value = (unsigned long long)(n*tmp_rate);
+-				if( m_mul == tmp_value )
+-				{
+-					sig = 1;
+-					break;
+-				}else if (tmp_value > m_mul)
+-					max = n - 1;
+-				else
+-					min = n + 1;
+-			}
+-			if( sig )
+-			{
+-				clk->rate = rate;
+-				break;
+-			}
+-		}
+-
+-		reg_val = cpm_inl(cgu_clks[no].off) & 0xf0000000;
+-		reg_val |= (m << 20) | (n << 0);
+-		cpm_outl(reg_val,cgu_clks[no].off);
+-		printk(KERN_DEBUG"%s, parent = %ld, rate = %ld, n = %lld, reg val = 0x%08x\n",
+-				__func__, clk->parent->rate, clk->rate, n, cpm_inl(cgu_clks[no].off));
+-		return 0;
+-	}
+-	spin_lock_irqsave(&cpm_cgu_lock,flags);
+-	mask = (1 << cgu_clks[no].div) - 1;
+-	tmp = clk->parent->rate / cgu_clks[no].coe;
+-	for (i = 1; i <= mask+1; i++) {
+-		if ((tmp / i) <= rate)
+-			break;
+-	}
+-	i--;
+-	if(i > mask)
+-		i = mask;
+-	reg_val = cpm_inl(cgu_clks[no].off);
+-	x = reg_val & ~mask;
+-	x |= i;
+-	stop = cgu_clks[no].ce_busy_stop;
+-	busy = stop + 1;
+-	ce = stop + 2;
+-	if(x & (1 << stop)) {
+-		if (cgu_clks[no].cache) {
+-			cgu_clks[no].cache &= ~mask;
+-			cgu_clks[no].cache |= i;
+-		} else {
+-			cgu_clks[no].cache = x;
+-		}
+-		clk->rate = tmp  / (i + 1);
+-	}
+-	else if((mask & reg_val) != i){
+-
+-		x = (x & ~(0x1 << stop)) | (0x1 << ce);
+-		cpm_outl(x, cgu_clks[no].off);
+-		while(cpm_test_bit(busy,cgu_clks[no].off))
+-			printk("wait stable.[%d][%s]\n",__LINE__,clk->name);
+-		x &= ~(1 << ce);
+-		cpm_outl(x, cgu_clks[no].off);
+-		cgu_clks[no].cache = 0;
+-		clk->rate = tmp  / (i + 1);
+-	}
+-	spin_unlock_irqrestore(&cpm_cgu_lock,flags);
+-	return 0;
+-}
+-
+-static struct clk * cgu_get_parent(struct clk *clk)
+-{
+-	unsigned int no,cgu,idx,pidx;
+-
+-	no = CLK_CGU_NO(clk->flags);
+-	if(!(strcmp(clk->name, "cgu_i2s_mic"))){
+-		/* the operation uses for t31, because that the bits[30~31] of 0x10000084 is readonly */
+-		cgu = *(volatile unsigned int*)(0xb0000070); // the register is i2s speaker pll.
+-	}else{
+-		cgu = cpm_inl(cgu_clks[no].off);
+-	}
+-	idx = cgu >> 30;
+-	pidx = selector[cgu_clks[no].sel].route[idx];
+-	if (pidx == CLK_ID_STOP || pidx == CLK_ID_INVALID)
+-		return NULL;
+-
+-	return get_clk_from_id(pidx);
+-}
+-
+-static int cgu_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	int i,tmp;
+-	int no = CLK_CGU_NO(clk->flags);
+-	unsigned int reg_val,cgu,mask;
+-	int ce,stop,busy;
+-	unsigned long flags;
+-	stop = cgu_clks[no].ce_busy_stop;
+-	busy = stop + 1;
+-	ce = stop + 2;
+-	mask = (1 << cgu_clks[no].div) - 1;
+-
+-	for(i = 0;i < 4;i++) {
+-		if(selector[cgu_clks[no].sel].route[i] == get_clk_id(parent)){
+-			break;
+-		}
+-	}
+-	if(i >= 4)
+-		return -EINVAL;
+-	spin_lock_irqsave(&cpm_cgu_lock,flags);
+-	cgu = cpm_inl(cgu_clks[no].off);
+-	reg_val = cgu;
+-	if(cgu_clks[no].sel == SELECTOR_2) {
+-		if(i == 0)
+-			cgu &= ~(1 << 31);
+-		else
+-			cgu |= (1 << 31);
+-	}else {
+-		cgu &= ~(3 << 30);
+-		cgu |= i << 30;
+-	}
+-
+-	tmp = parent->rate / cgu_clks[no].coe;
+-	for (i = 1; i <= mask+1; i++) {
+-		if ((tmp / i) <= clk->rate)
+-			break;
+-	}
+-	i--;
+-	mask = (1 << cgu_clks[no].div) - 1;
+-	cgu = (cgu & ~(0x1 << stop)) | (0x1 << ce);
+-	cgu = cgu & ~mask;
+-	cgu |= i;
+-
+-	if(reg_val & (1 << stop))
+-		cgu_clks[no].cache = cgu;
+-	else if((mask & reg_val) != i){
+-		cpm_outl(cgu, cgu_clks[no].off);
+-		while(cpm_test_bit(busy,cgu_clks[no].off))
+-			printk("wait stable.[%d][%s]\n",__LINE__,clk->name);
+-		cgu &= ~(1 << ce);
+-		cpm_outl(cgu, cgu_clks[no].off);
+-		cgu_clks[no].cache = 0;
+-	}
+-
+-	clk->parent = parent;
+-
+-	spin_unlock_irqrestore(&cpm_cgu_lock,flags);
+-	return 0;
+-}
+-
+-static int cgu_is_enabled(struct clk *clk) {
+-	int no = CLK_CGU_NO(clk->flags);
+-	int stop;
+-	stop = cgu_clks[no].ce_busy_stop;
+-	return !(cpm_inl(cgu_clks[no].off) & (1 << stop));
+-}
+-static struct clk_ops clk_cgu_ops = {
+-	.enable	= cgu_enable,
+-	.get_rate = cgu_get_rate,
+-	.set_rate = cgu_set_rate,
+-	.get_parent = cgu_get_parent,
+-	.set_parent = cgu_set_parent,
+-};
+-
+-#define CONVERT_DDR_RATE (50 * 1000 * 1000)
+-#define UP_DIV 1
+-#define DOWN_DIV 2
+-#define REG32(x) *(volatile unsigned int *)(x)
+-
+-#define OFF_TDR         (0x00)
+-#define OFF_LCR         (0x0C)
+-#define OFF_LSR         (0x14)
+-
+-#define LSR_TDRQ        (1 << 5)
+-#define LSR_TEMT        (1 << 6)
+-
+-#define U1_IOBASE (UART1_IOBASE + 0xa0000000)
+-#define TCSM_PCHAR(x)							\
+-	*((volatile unsigned int*)(U1_IOBASE+OFF_TDR)) = x;		\
+-	while ((*((volatile unsigned int*)(U1_IOBASE + OFF_LSR)) & (LSR_TDRQ | LSR_TEMT)) != (LSR_TDRQ | LSR_TEMT))
+-
+-static inline void serial_put_hex(unsigned int x) {
+-	int i;
+-	unsigned int d;
+-	for(i = 7;i >= 0;i--) {
+-		d = (x  >> (i * 4)) & 0xf;
+-		if(d < 10) d += '0';
+-		else d += 'A' - 10;
+-		TCSM_PCHAR(d);
+-	}
+-}
+-static int ddr_set_rate(struct clk *clk, unsigned long rate)
+-{
+-	unsigned int ddr_cgu = cpm_inl(CPM_DDRCDR);
+-	unsigned int div = ddr_cgu & 0xf;
+-	unsigned int up = 0;
+-	unsigned int ret = 0;
+-	unsigned long flags,fail;
+-	printk("aaaaaaaaaaaaaaaaa\n");
+-	if(rate > CONVERT_DDR_RATE){
+-		if(clk->rate <= CONVERT_DDR_RATE) {
+-			up = UP_DIV;
+-			div >>= 1;
+-			clk->rate = 100 * 1000 * 1000;
+-		}
+-	}else{
+-		if(clk->rate > CONVERT_DDR_RATE) {
+-			up = DOWN_DIV;
+-			div <<= 1;
+-			clk->rate = 50 * 1000 * 1000;
+-		}
+-	}
+-	printk("aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa div= %d\n",div);
+-	spin_lock_irqsave(&cpm_cgu_lock,flags);
+-	cache_prefetch(DDRCLAB1,200);
+-	fast_iob();
+-DDRCLAB1:
+-	REG32(0xb3012068) = 0;
+-
+-	ddr_cgu |= (1 << 29) | (1 << 26);
+-	ddr_cgu &= ~(1 << 24);
+-	ddr_cgu &= ~0xf;
+-	TCSM_PCHAR('1');
+-	cpm_outl(ddr_cgu,CPM_DDRCDR);
+-	TCSM_PCHAR('a');
+-	ddr_cgu |= (1 << 25);
+-	ddr_cgu |= div;
+-	TCSM_PCHAR('2');
+-	cpm_outl(ddr_cgu,CPM_DDRCDR);
+-	fail = 0;
+-	TCSM_PCHAR('3');
+-	while(cpm_inl(CPM_DDRCDR) & 1 << 28) {
+-		serial_put_hex(cpm_inl(CPM_DDRCDR));
+-		TCSM_PCHAR('\r');
+-		TCSM_PCHAR('\n');
+-	}
+-	TCSM_PCHAR('4');
+-	cpm_clear_bit(25,CPM_DDRCDR);
+-	REG32(0xb3012068) = 0xf0000100;
+-        fail = REG32(0xa0000000);
+-	if(cpm_inl(CPM_DDRCDR) & 1 << 24) {
+-		printk("fail!\n");
+-	}else
+-		printk("ok!\n");
+-
+-	//printk("REG32(0xb301206c) = %x\n",REG32(0xb301206c));
+-
+-	spin_unlock_irqrestore(&cpm_cgu_lock,flags);
+-	return ret;
+-
+-}
+-static struct clk_ops clk_ddr_ops = {
+-	.enable	= cgu_enable,
+-	.get_rate = cgu_get_rate,
+-	.set_rate = ddr_set_rate,
+-	.get_parent = cgu_get_parent,
+-	.set_parent = cgu_set_parent,
+-
+-};
+-void __init init_cgu_clk(struct clk *clk)
+-{
+-	int no;
+-	int id;
+-	//printk("REG32(0xb3012088) = %x\n",REG32(0xb3012088));
+-
+-
+-	if (clk->flags & CLK_FLG_PARENT) {
+-		id = CLK_PARENT(clk->flags);
+-		clk->parent = get_clk_from_id(id);
+-	} else {
+-		clk->parent = cgu_get_parent(clk);
+-	}
+-	no = CLK_CGU_NO(clk->flags);
+-	cgu_clks[no].cache = 0;
+-	clk->rate = cgu_get_rate(clk);
+-	if(cgu_is_enabled(clk)) {
+-		clk->flags |= CLK_FLG_ENABLE;
+-	}
+-
+-	if(no == CGU_MSC_MUX)
+-		clk->ops = NULL;
+-	else if(no == CGU_DDR){
+-		clk->ops = &clk_ddr_ops;
+-		if(ddr_readl(DDRP_PIR) & DDRP_PIR_DLLBYP){  /*TODO:zm*/
+-                    /**
+-                     * DDR request cpm to stop clk
+-                     * (0x9 << 28) DDR_CLKSTP_CFG (0x13012068)
+-                     * CPM response ddr stop clk request (1 << 26) (0x1000002c)
+-                     */
+-                    cpm_set_bit(26,CPM_DDRCDR);
+-                    REG32(0xb3012068) |= 0x9 << 28;
+-                }
+-		REG32(0xb3012088) |= 4 << 16;
+-	}
+-	else
+-		clk->ops = &clk_cgu_ops;
+-
+-}

br-ext-chip-ingenic/board/t31/kernel/patches/0011-fix-yylloc-for-modern-computers.patch

@@ -0,0 +1,11 @@
+--- a/scripts/dtc/dtc-lexer.lex.c_shipped	2015-08-07 22:08:04.000000000 +0300
++++ b/scripts/dtc/dtc-lexer.lex.c_shipped	2021-11-01 22:15:12.347053553 +0300
+@@ -637,7 +637,7 @@
+ #include "srcpos.h"
+ #include "dtc-parser.tab.h"
+ 
+-YYLTYPE yylloc;
++extern YYLTYPE yylloc;
+ 
+ /* CAUTION: this will stop working if we ever use yyless() or yyunput() */
+ #define	YY_USER_ACTION \

br-ext-chip-ingenic/board/t31/t31.config

@@ -0,0 +1,2 @@
+MEM_START_ADDR=0x?
+KERNEL_UPLOAD_ADDR=0x?

br-ext-chip-ingenic/configs/unknown_unknown_t31_openipc_defconfig

@@ -0,0 +1,102 @@
+# Architecture
+BR2_mipsel=y
+BR2_mips_xburst=y
+# BR2_MIPS_SOFT_FLOAT is not set
+BR2_MIPS_FP32_MODE_32=y
+# BR2_MIPS_FP32_MODE_XX is not set
+BR2_MIPS_NAN_LEGACY=y
+BR2_MIPS_OABI32=y
+BR2_KERNEL_HEADERS_VERSION=y
+BR2_DEFAULT_KERNEL_VERSION="3.10.14"
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_10=y
+
+# Toolchain
+BR2_PER_PACKAGE_DIRECTORIES=y
+BR2_GCC_VERSION_7_X=y
+# BR2_TOOLCHAIN_USES_UCLIBC is not set
+# BR2_TOOLCHAIN_BUILDROOT_UCLIBC is not set
+# BR2_TOOLCHAIN_BUILDROOT_LIBC="uclibc"
+BR2_EXTRA_GCC_CONFIG_OPTIONS="--with-float=hard"
+BR2_TOOLCHAIN_USES_MUSL=y
+BR2_TOOLCHAIN_BUILDROOT_MUSL=y
+BR2_TOOLCHAIN_BUILDROOT_LIBC="musl"
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_TOOLCHAIN_BUILDROOT_LOCALE=y
+BR2_TOOLCHAIN_BUILDROOT_USE_SSP=y
+
+# Kernel
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.10.14"
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_INGENIC_PATH)/board/t31/kernel/t31.generic.config"
+BR2_LINUX_KERNEL_UIMAGE=y
+BR2_LINUX_KERNEL_XZ=y
+BR2_LINUX_KERNEL_EXT_INGENIC_PATCHER=y
+BR2_LINUX_KERNEL_EXT_INGENIC_PATCHER_LIST="$(BR2_EXTERNAL_INGENIC_PATH)/board/t31/kernel/patches/ $(BR2_EXTERNAL_INGENIC_PATH)/board/t31/kernel/overlay"
+
+# Filesystem
+# BR2_TARGET_TZ_INFO is not set
+# BR2_TARGET_ROOTFS_CPIO=y
+BR2_TARGET_ROOTFS_SQUASHFS=y
+BR2_TARGET_ROOTFS_SQUASHFS4_XZ=y
+BR2_ROOTFS_OVERLAY="$(TOPDIR)/../general/overlay"
+BR2_ROOTFS_POST_BUILD_SCRIPT="$(TOPDIR)/../scripts/executing_commands_for_$(BR2_TOOLCHAIN_BUILDROOT_LIBC).sh"
+
+# OpenIPC configuration
+BR2_TOOLCHAIN_BUILDROOT_VENDOR="openipc"
+BR2_TARGET_GENERIC_ISSUE="Welcome to OpenIPC v2.2"
+BR2_TARGET_GENERIC_HOSTNAME="openipc-t31"
+BR2_GLOBAL_PATCH_DIR="$(TOPDIR)/../general/package/all-patches"
+
+# OpenIPC packages
+BR2_PACKAGE_BUSYBOX_CONFIG="$(TOPDIR)/../general/package/busybox/busybox.config"
+BR2_PACKAGE_DROPBEAR_OPENIPC=y
+# BR2_PACKAGE_FDK_AAC_OPENIPC is not set
+BR2_PACKAGE_FWPRINTENV_OPENIPC=y
+BR2_PACKAGE_INGENIC_OSDRV_T31=y
+BR2_PACKAGE_HASERL=y
+BR2_PACKAGE_HISI_GPIO=y
+BR2_PACKAGE_IPCTOOL=y
+BR2_PACKAGE_JSON_C=y
+BR2_PACKAGE_LAME_OPENIPC=y
+BR2_PACKAGE_LIBCURL_OPENIPC=y
+BR2_PACKAGE_LIBCURL_OPENIPC_CURL=y
+# BR2_PACKAGE_LIBCURL_OPENIPC_VERBOSE is not set
+# BR2_PACKAGE_LIBCURL_OPENIPC_PROXY_SUPPORT is not set
+# BR2_PACKAGE_LIBCURL_OPENIPC_COOKIES_SUPPORT is not set
+# BR2_PACKAGE_LIBCURL_OPENIPC_EXTRA_PROTOCOLS_FEATURES is not set
+BR2_PACKAGE_LIBCURL_OPENIPC_MBEDTLS=y
+BR2_PACKAGE_LIBEVENT_OPENIPC=y
+BR2_PACKAGE_LIBEVENT_OPENIPC_REMOVE_PYSCRIPT=y
+BR2_PACKAGE_LIBOGG_OPENIPC=y
+BR2_PACKAGE_LIBWEBSOCKETS_OPENIPC=y
+BR2_PACKAGE_LIBYAML=y
+BR2_PACKAGE_MAJESTIC_FONTS=y
+# BR2_PACKAGE_MAJESTIC_T31 is not set
+BR2_PACKAGE_MBEDTLS_OPENIPC=y
+# BR2_PACKAGE_MBEDTLS_OPENIPC_PROGRAMS is not set
+# BR2_PACKAGE_MBEDTLS_OPENIPC_COMPRESSION is not set
+BR2_PACKAGE_MICROBE_WEB=y
+# BR2_PACKAGE_MINI_SNMPD is not set
+BR2_PACKAGE_MOTORS=y
+BR2_PACKAGE_OPUS_OPENIPC=y
+BR2_PACKAGE_OPUS_OPENIPC_FIXED_POINT=y
+# BR2_PACKAGE_SSHPASS is not set
+BR2_PACKAGE_UACME_OPENIPC=y
+BR2_PACKAGE_VTUND_OPENIPC=y
+BR2_PACKAGE_YAML_CLI=y
+
+# WiFi
+BR2_PACKAGE_WIRELESS_TOOLS=y
+BR2_PACKAGE_WPA_SUPPLICANT=y
+BR2_PACKAGE_WPA_SUPPLICANT_CLI=y
+BR2_PACKAGE_WPA_SUPPLICANT_NL80211=y
+BR2_PACKAGE_WPA_SUPPLICANT_PASSPHRASE=y
+BR2_PACKAGE_LINUX_FIRMWARE_OPENIPC=y
+BR2_PACKAGE_LINUX_FIRMWARE_OPENIPC_MT7601U=y
+# BR2_PACKAGE_RTL8188EU is not set
+
+# WIREGUARD
+# BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
+# BR2_PACKAGE_WIREGUARD_TOOLS=y

br-ext-chip-ingenic/external.mk

@@ -1,4 +1,5 @@
 include $(BR2_EXTERNAL_INGENIC_PATH)/linux/linux-ext-ingenic_patcher.mk
+include $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/ingenic-osdrv-t31.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic_patcher/ingenic_patcher.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/aura-httpd/aura-httpd.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/dropbear-openipc/dropbear-openipc.mk
@@ -14,8 +15,8 @@ include $(BR2_EXTERNAL_INGENIC_PATH)/package/libogg-openipc/libogg-openipc.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/libsrt-openipc/libsrt-openipc.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/libwebsockets-openipc/libwebsockets-openipc.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/linux-firmware-openipc/linux-firmware-openipc.mk
-include $(BR2_EXTERNAL_INGENIC_PATH)/package/majestic/majestic.mk
-include $(BR2_EXTERNAL_INGENIC_PATH)/package/majestic-fonts/majestic-fonts.mk
+#include $(BR2_EXTERNAL_INGENIC_PATH)/package/majestic/majestic.mk
+#include $(BR2_EXTERNAL_INGENIC_PATH)/package/majestic-fonts/majestic-fonts.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/mbedtls-openipc/mbedtls-openipc.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/microbe-web/microbe-web.mk
 include $(BR2_EXTERNAL_INGENIC_PATH)/package/motors/motors.mk

br-ext-chip-ingenic/package/ingenic-osdrv-t31

@@ -0,0 +1 @@
+../../general/package/ingenic-osdrv-t31

br-ext-chip-ingenic/package/ingenic_patcher

@@ -0,0 +1 @@
+../../general/package/ingenic_patcher

building.sh

@@ -332,6 +332,13 @@ hi3536dv100() {
 
 #################################################################################
 
+ingenic-t31() {
+  soc="t31"
+  fresh && make PLATFORM=ingenic BOARD=unknown_unknown_${soc}_openipc all && rename
+}
+
+#################################################################################
+
 nt98562() {
   soc="nt98562"
   fresh && make PLATFORM=novatek BOARD=unknown_unknown_${soc}_openipc all && rename
@@ -508,6 +515,10 @@ hi3518ev200                   # testing..
 #
 #######
 #
+ingenic-t31                       # testing..
+#
+#######
+#
 # nt98562                       # OpenIPC
 # nt98566                       # OpenIPC
 #

general/package/ingenic-osdrv-t31/Config.in

@@ -0,0 +1,6 @@
+config BR2_PACKAGE_INGENIC_OSDRV_T31
+	bool "ingenic-osdrv-t31"
+	help
+	  ingenic-osdrv-t31 - Ingenic kernel modules and libs
+
+	  https://openipc.org

general/package/ingenic-osdrv-t31/files/script/S95ingenic

@@ -0,0 +1,74 @@
+#!/bin/sh
+
+DAEMON="majestic"
+PIDFILE="/var/run/$DAEMON.pid"
+
+DAEMON_ARGS="-s"
+
+# shellcheck source=/dev/null
+[ -r "/etc/default/$DAEMON" ] && . "/etc/default/$DAEMON"
+
+load_majestic() {
+	printf 'Starting %s: ' "$DAEMON"
+	[ -f /usr/bin/$DAEMON ] || echo -en "DISABLED, "
+	# shellcheck disable=SC2086 # we need the word splitting
+	start-stop-daemon -b -m -S -q -p "$PIDFILE" -x "/usr/bin/$DAEMON" \
+		-- $DAEMON_ARGS
+	status=$?
+	if [ "$status" -eq 0 ]; then
+		echo "OK"
+	else
+		echo "FAIL"
+	fi
+	return "$status"
+}
+
+# The daemon does not create a pidfile, and use "-m" to instruct start-stop-daemon to create one.
+start() {
+	logger -s -p daemon.info -t ingenic "Check MAC for Ingenic devices"
+	if [ "$(fw_printenv -n ethaddr)" = "00:00:23:34:45:66" ]; then
+		logger -s -p daemon.info -t ingenic "The eth0 interface has a lousy MAC, please change it.."
+	else
+		logger -s -p daemon.info -t ingenic "The eth0 interface has a correct MAC - $(fw_printenv -n ethaddr)"
+	fi
+	#
+	logger -s -p daemon.info -t ingenic "Loading of kernel modules and initialization of the video system has started"
+	export TZ=$(cat /etc/TZ)
+	#load_ingenic
+	#
+	#
+	#load_majestic
+}
+
+stop() {
+	printf 'Stopping %s: ' "$DAEMON"
+	[ -f /usr/bin/$DAEMON ] || echo -en "DISABLED, "
+	start-stop-daemon -K -q -p "$PIDFILE"
+	status=$?
+	if [ "$status" -eq 0 ]; then
+		rm -f "$PIDFILE"
+		echo "OK"
+	else
+		echo "FAIL"
+	fi
+	return "$status"
+}
+
+restart() {
+	stop
+	sleep 1
+	reload
+}
+
+reload() {
+	load_majestic
+}
+
+case "$1" in
+	start|stop|restart|reload)
+		"$1";;
+	*)
+		echo "Usage: $0 {start|stop|restart|reload}"
+		exit 1
+esac
+

general/package/ingenic-osdrv-t31/files/script/ircut_demo

@@ -0,0 +1,27 @@
+if [ ! -d "/sys/class/gpio/gpio49" ]
+then
+echo 49 > /sys/class/gpio/export
+fi
+if [ ! -d "/sys/class/gpio/gpio50" ]
+then
+echo 50 > /sys/class/gpio/export
+fi
+
+echo out > /sys/class/gpio/gpio49/direction
+echo out > /sys/class/gpio/gpio50/direction
+
+echo 0 > /sys/class/gpio/gpio49/active_low
+echo 0 > /sys/class/gpio/gpio50/active_low
+
+
+echo 0 > /sys/class/gpio/gpio49/value
+
+usleep 10000
+
+echo $1 > /sys/class/gpio/gpio49/value
+echo $2 > /sys/class/gpio/gpio50/value
+
+
+usleep 10000
+echo 0 > /sys/class/gpio/gpio49/value
+echo 0 > /sys/class/gpio/gpio50/value

general/package/ingenic-osdrv-t31/files/script/load_ingenic

@@ -0,0 +1,109 @@
+#!/bin/sh
+
+KMOD_PATH=/lib/modules/3.10.14__isvp_swan_1.0__/ingenic
+
+PARAMS=$(cat <<-EOF
+sensor:sc2232
+isp_param:isp_clk=100000000
+
+sensor:gc2053
+sensor_param:sensor_max_fps=25 data_interface=1
+isp_param:isp_clk=125000000
+
+sensor:sc2135
+isp_param:isp_clk=125000000
+
+sensor:imx307
+isp_param:isp_clk=125000000 ispw=1920 isph=1080 isptop=20 ispleft=12
+
+sensor:sc2335
+isp_param:isp_clk=125000000 ispw=1920 isph=1080
+
+EOF
+)
+
+echo 1 > /proc/sys/vm/overcommit_memory
+
+check_return()
+{
+	if [ $? -ne 0 ] ;then
+		echo err: $1
+		echo exit
+		exit
+	fi
+}
+
+lsmod | grep "avpu" > /dev/null
+if [ $? -ne 0 ]; then
+	insmod ${KMOD_PATH/%\//}/avpu.ko
+	check_return "insmod avpu"
+fi
+
+lsmod | grep "sinfo" > /dev/null
+if [ $? -ne 0 ] ;then
+	insmod ${KMOD_PATH/%\//}/sinfo.ko
+	check_return "insmod sinfo"
+fi
+
+echo 1 >/proc/jz/sinfo/info
+check_return "start sinfo"
+
+SENSOR_INFO=`cat /proc/jz/sinfo/info`
+check_return "get sensor type"
+
+SENSOR=${SENSOR_INFO#*:}
+ISP_PARAM="isp_clk=125000000"
+SENSOR_PARAM=
+START=0
+echo ${PARAMS} | while read str
+do
+	#echo $str
+	#ignore blank line
+	if [ "$str" = "" ];then
+		continue
+	fi
+	name=${str%:*}
+	value=${str#*:}
+	if [ ${START} = 0 ];then
+		if [ "$value" = "$SENSOR" ];then
+			START=1
+		fi
+	else
+		case ${name} in
+			"isp_param")
+				ISP_PARAM=${value}
+				;;
+			"sensor_param")
+				SENSOR_PARAM=${value}
+				;;
+			*)
+				break;
+				;;
+		esac
+	fi
+done
+
+echo --------------------
+echo "ISP_PARAM: ${ISP_PARAM}"
+echo "SENSOR: ${SENSOR}"
+echo "SENSOR_PARAM: ${SENSOR_PARAM}"
+
+lsmod | grep "tx_isp" > /dev/null
+if [ $? -ne 0 ] ;then
+	insmod ${KMOD_PATH/%\//}/tx-isp-t31.ko  ${ISP_PARAM}
+	check_return "insmod isp drv"
+fi
+
+lsmod | grep "audio" > /dev/null
+if [ $? -ne 0 ] ;then
+        insmod ${KMOD_PATH/%\//}/audio.ko
+        check_return "insmod audio"
+fi
+
+lsmod | grep ${SENSOR} > /dev/null
+if [ $? -ne 0 ] ;then
+	insmod ${KMOD_PATH/%\//}/sensor_${SENSOR}_t31.ko ${SENSOR_PARAM}
+	check_return "insmod sensor drv"
+fi
+
+

general/package/ingenic-osdrv-t31/ingenic-osdrv-t31.mk

@@ -0,0 +1,37 @@
+################################################################################
+#
+# ingenic-osdrv-t31
+#
+################################################################################
+
+INGENIC_OSDRV_T31_VERSION =
+INGENIC_OSDRV_T31_SITE =
+INGENIC_OSDRV_T31_LICENSE = MIT
+INGENIC_OSDRV_T31_LICENSE_FILES = LICENSE
+
+define INGENIC_OSDRV_T31_INSTALL_TARGET_CMDS
+	$(INSTALL) -m 755 -d $(TARGET_DIR)/etc/init.d
+	$(INSTALL) -m 755 -t $(TARGET_DIR)/etc/init.d $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/script/S95ingenic
+
+	$(INSTALL) -m 755 -d $(TARGET_DIR)/etc/sensor
+	$(INSTALL) -m 644 -t $(TARGET_DIR)/etc/sensor $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/sensor/params/*.bin
+
+	$(INSTALL) -m 755 -d $(TARGET_DIR)/lib/modules/3.10.14__isvp_swan_1.0__/ingenic
+	$(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.10.14__isvp_swan_1.0__/ingenic $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/kmod/*.ko
+
+	$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/bin
+	$(INSTALL) -m 755 -t $(TARGET_DIR)/usr/bin $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/script/load*
+	$(INSTALL) -m 755 -t $(TARGET_DIR)/usr/bin $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/script/ircut_demo
+	# $(INSTALL) -m 755 -t $(TARGET_DIR)/usr/bin $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/sample/*
+
+	# $(INSTALL) -m 755 -d $(TARGET_DIR)/usr/lib/sensors/params
+	# $(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/sensors/params $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/sensor/params/*.bin
+
+	# $(INSTALL) -m 755 -d $(TARGET_DIR)/usr/lib/sensors/params/WDR
+	# $(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/sensors/params/WDR $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/sensor/params/WDR/*.bin
+
+	$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/lib
+	$(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/ $(BR2_EXTERNAL_INGENIC_PATH)/package/ingenic-osdrv-t31/files/lib/*.so
+endef
+
+$(eval $(generic-package))

general/package/ingenic_patcher/Config.in

@@ -0,0 +1,3 @@
+
+config BR2_PACKAGE_INGENIC_PATCHER
+	bool

general/package/ingenic_patcher/apply.sh

@@ -0,0 +1,44 @@
+#!/bin/bash
+
+function log() {
+    echo "--- $@"
+}
+
+function apply_patch() {
+    DST=$1
+    SRC=$2
+
+    if [[ -d $SRC ]]; then
+        if [[ ${SRC:${#SRC}-1} != '/' ]]; then
+            log Apply \"$SRC\" as overlay directory
+            cp -r $SRC/* $DST/
+        else
+            log Apply \"$SRC\" as patches directory
+            for P in $SRC/*.patch; do
+                patch -d $DST -p1 < $P
+            done
+        fi
+    else
+        log Apply \"$SRC\" as single patch
+        patch -d $DST -p1 < $SRC
+    fi
+}
+
+function apply_patches() {
+    log Gonna apply "$@"
+    while [[ $# -ge 1 ]]; do
+        apply_patch $DST $1
+        shift
+    done
+}
+
+DST=$1
+shift
+
+if [ -f $DST/.ingenic-patched ]; then
+    log Patched already
+    exit
+fi
+
+apply_patches $@
+touch $DST/.ingenic-patched

general/package/ingenic_patcher/ingenic_patcher.mk

@@ -0,0 +1,12 @@
+################################################################################
+#
+# ingenic_patcher
+#
+################################################################################
+
+INGENIC_PATCHER_VERSION = 0.1
+INGENIC_PATCHER_INSTALL_TARGET = NO
+INGENIC_PATCHER_SITE =
+INGENIC_PATCHER_SOURCE =
+
+$(eval $(generic-package))