mirror of https://github.com/OpenIPC/firmware.git
Fix jffs2/overlayfs file overwrite for Hi3516Cv100
Dmitry Ermakov
parent
9ae979bd5c
commit
b5246d8a99
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@ -1380,11 +1380,13 @@ CONFIG_JFFS2_FS=y
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CONFIG_JFFS2_FS_DEBUG=0
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CONFIG_JFFS2_FS_WRITEBUFFER=y
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# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
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# CONFIG_JFFS2_SUMMARY is not set
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# CONFIG_JFFS2_FS_XATTR is not set
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CONFIG_JFFS2_SUMMARY=y
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CONFIG_JFFS2_FS_XATTR=y
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CONFIG_JFFS2_FS_POSIX_ACL=y
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CONFIG_JFFS2_FS_SECURITY=y
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CONFIG_JFFS2_COMPRESSION_OPTIONS=y
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CONFIG_JFFS2_ZLIB=y
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CONFIG_JFFS2_LZO=y
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# CONFIG_JFFS2_LZO is not set
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CONFIG_JFFS2_RTIME=y
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# CONFIG_JFFS2_RUBIN is not set
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# CONFIG_JFFS2_CMODE_NONE is not set
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@ -1380,11 +1380,13 @@ CONFIG_JFFS2_FS=y
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CONFIG_JFFS2_FS_DEBUG=0
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CONFIG_JFFS2_FS_WRITEBUFFER=y
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# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
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# CONFIG_JFFS2_SUMMARY is not set
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# CONFIG_JFFS2_FS_XATTR is not set
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CONFIG_JFFS2_SUMMARY=y
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CONFIG_JFFS2_FS_XATTR=y
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CONFIG_JFFS2_FS_POSIX_ACL=y
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CONFIG_JFFS2_FS_SECURITY=y
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CONFIG_JFFS2_COMPRESSION_OPTIONS=y
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CONFIG_JFFS2_ZLIB=y
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CONFIG_JFFS2_LZO=y
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# CONFIG_JFFS2_LZO is not set
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CONFIG_JFFS2_RTIME=y
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# CONFIG_JFFS2_RUBIN is not set
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# CONFIG_JFFS2_CMODE_NONE is not set
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@ -1380,11 +1380,13 @@ CONFIG_JFFS2_FS=y
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CONFIG_JFFS2_FS_DEBUG=0
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CONFIG_JFFS2_FS_WRITEBUFFER=y
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# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
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# CONFIG_JFFS2_SUMMARY is not set
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# CONFIG_JFFS2_FS_XATTR is not set
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CONFIG_JFFS2_SUMMARY=y
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CONFIG_JFFS2_FS_XATTR=y
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CONFIG_JFFS2_FS_POSIX_ACL=y
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CONFIG_JFFS2_FS_SECURITY=y
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CONFIG_JFFS2_COMPRESSION_OPTIONS=y
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CONFIG_JFFS2_ZLIB=y
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CONFIG_JFFS2_LZO=y
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# CONFIG_JFFS2_LZO is not set
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CONFIG_JFFS2_RTIME=y
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# CONFIG_JFFS2_RUBIN is not set
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# CONFIG_JFFS2_CMODE_NONE is not set
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@ -240,7 +240,7 @@ sys_config() {
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clk_cfg() {
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devmem 0x2003002c 32 0x2a # VICAP, ISP unreset & clock enable
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devmem 0x20030048 32 0x2 # VPSS unreset, code also config
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devmem 0x20030034 32 0x510 # VDP unreset & HD clock enable
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devmem 0x20030034 32 0x510 # VDP unreset & HD clock enable # XM: 0x00000043
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devmem 0x20030040 32 0x2 # VEDU unreset
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devmem 0x20030060 32 0x2 # JPEG unreset
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devmem 0x20030058 32 0x2 # TDE unreset
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@ -83,7 +83,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
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;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
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;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
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Mask_num =2 ;Component mask
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Mask_0 =0xFFC00000
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Mask_0 =0xFFC0000
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Mask_1 =0x0
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Scan_mode = 1;VI_SCAN_INTERLACED = 0
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;VI_SCAN_PROGRESSIVE,
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@ -20,46 +20,6 @@ dev_attr = 2 ;mipi_dev_attr_t = 0
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;lvds_dev_attr_t = 1
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;NULL =2
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[mipi]
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;----------only for mipi_dev---------
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data_type =-1 ;raw data type: 8/10/12/14 bit
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;RAW_DATA_8BIT = 0
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;RAW_DATA_10BIT = 1
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;RAW_DATA_12BIT = 2
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;RAW_DATA_14BIT = 3
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lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
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[lvds]
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;----------only for lvds_dev---------
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img_size_w = -1 ;oringnal sensor input image size W
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img_size_h = -1 ;oringnal sensor input image size H
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wdr_mode = -1 ;HI_WDR_MODE_NONE =0
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;HI_WDR_MODE_2F = 1
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;HI_WDR_MODE_3F = 2
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;HI_WDR_MODE_4F =3
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sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
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;LVDS_SYNC_MODE_SAV = 1
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raw_data_type = -1 ;RAW_DATA_8BIT = 0
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;RAW_DATA_10BIT = 1
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;RAW_DATA_12BIT = 2
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;RAW_DATA_14BIT = 3
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data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0
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;LVDS_ENDIAN_BIG = 1
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sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0
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;LVDS_ENDIAN_BIG = 1
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lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
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lvds_lane_num = -1 ;LVDS_LANE_NUM
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wdr_vc_num = -1 ;WDR_VC_NUM
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sync_code_num = -1 ;SYNC_CODE_NUM
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sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
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[isp_image]
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Isp_x =0
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Isp_y =0
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@ -161,103 +121,5 @@ PixFormat =19;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
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CompressMode =0 ;COMPRESS_MODE_NONE = 0
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;COMPRESS_MODE_SEG =1 ...etc
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;SrcFrameRate=-1 ;Source frame rate. -1: not controll
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;FrameRate =-1 ;Target frame rate. -1: not controll
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SrcFrameRate=30 ;Source frame rate. -1: not controll
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FrameRate =30 ;Target frame rate. -1: not controll
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[vpss_group]
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Vpss_DciEn =FALSE
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Vpss_IeEn =FALSE
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Vpss_NrEn =TRUE
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Vpss_HistEn =FALSE
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Vpss_DieMode=1 ;Define de-interlace mode
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;VPSS_DIE_MODE_AUTO = 0,
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;VPSS_DIE_MODE_NODIE = 1,
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;VPSS_DIE_MODE_DIE = 2,
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[vpss_corp]
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Crop_enable =FALSE
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Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
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;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
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Crop_X =128
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Crop_Y =128
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Crop_W =1158
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Crop_H =562
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[vpss_chn]
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Vpss_W =1280
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Vpss_H =960
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CompressMode=0 ;COMPRESS_MODE_NONE = 0
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;COMPRESS_MODE_SEG =1 ...etc
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Mirror =FALSE;Whether to mirror
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Flip =FALSE;Whether to flip
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[vb_conf]
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VbCnt=5
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#VbCnt=2
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vbTimes=15
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[venc_comm]
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venc_chn =1 ;create venc chn number;(0,2]
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BufCnt = 1 ;network meida-trans bufcnt
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[venc_0]
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PicWidth =1280
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PicHeight =720
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Profile =2
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RcMode =VENC_RC_MODE_H264CBR
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Gop =50
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StatTime =2
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ViFrmRate =30
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TargetFrmRate=30
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;----- only for VENC_RC_MODE_H264CBR ----------
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BitRate=2048
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FluctuateLevel=1
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;----- only for VENC_RC_MODE_H264VBR ----------
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MaxBitRate =10000
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MaxQp=32
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MinQp=24
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;----- only for VENC_RC_MODE_H264FIXQP ----------
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IQp=45
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PQp=40
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[venc_1]
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PicWidth =1280
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PicHeight =720
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Profile =2
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RcMode =VENC_RC_MODE_H264CBR
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Gop =50
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StatTime =2
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ViFrmRate =30
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TargetFrmRate=15
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;----- only for VENC_RC_MODE_H264CBR ----------
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BitRate=2048
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FluctuateLevel=1
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;----- only for VENC_RC_MODE_H264VBR ----------
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MaxBitRate =10000
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MaxQp=32
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MinQp=24
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;----- only for VENC_RC_MODE_H264FIXQP ----------
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IQp=40
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PQp=45
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[bind]
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ViDev =0
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ViChn =0
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VpssGrp =0
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VpssChn = 0
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VoDev =0
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VoChn =0
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ViSnapChn =0
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VpssSnapGrp=0
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VpssSnapChn=1
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VencSnapGrp=1
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VencSnapChn=3
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SrcFrameRate=-1 ;Source frame rate. -1: not controll
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FrameRate =-1 ;Target frame rate. -1: not controll
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