mirror of https://github.com/OpenIPC/firmware.git
Remove BT656 stuff
parent
43829650fb
commit
b3a38d9278
|
@ -89,11 +89,6 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
|
|||
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
|
||||
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -78,11 +78,6 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
|
|||
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
|
||||
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -78,11 +78,6 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
|
|||
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
|
||||
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -94,11 +94,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -79,11 +79,6 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
|
|||
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
|
||||
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -108,11 +108,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
|
@ -109,11 +109,6 @@ Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace
|
|||
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
|
||||
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
|
||||
|
||||
;----- only for bt656 ----------
|
||||
FixCode =0 ;BT656_FIXCODE_1 = 0,
|
||||
;BT656_FIXCODE_0
|
||||
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
|
||||
;BT656_FIELD_POLAR_NSTD
|
||||
DataPath =1 ;ISP enable or bypass
|
||||
;VI_PATH_BYPASS = 0,/* ISP bypass */
|
||||
;VI_PATH_ISP = 1,/* ISP enable */
|
||||
|
|
Loading…
Reference in New Issue