From b043ddf76b90b7ac9c01e8f19d4e9ac9f8b23bd6 Mon Sep 17 00:00:00 2001 From: Dmitry Ilyin Date: Sun, 21 Aug 2022 23:13:30 +0300 Subject: [PATCH] [ci skip] Migrate to GKIPCLinuxV100R001C00SPC030 patches --- ...00_arch-arm-boot-dts-gk7202v300.dtsi.patch | 5 +- ...00_arch-arm-boot-dts-gk7205v200.dtsi.patch | 5 +- ...00_arch-arm-boot-dts-gk7205v300.dtsi.patch | 5 +- ...00_arch-arm-boot-dts-gk7605v100.dtsi.patch | 5 +- ...dt-bindings-clock-gk7202v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v200-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7605v100-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7202v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v200-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7605v100-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7202v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v200-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7605v100-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7202v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v200-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7605v100-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7202v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v200-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7605v100-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7202v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v200-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7205v300-clock.h.patch | 79 +++++++++++++++++ ...dt-bindings-clock-gk7605v100-clock.h.patch | 79 +++++++++++++++++ .../patches/00_drivers-clk-goke-Kconfig.patch | 2 +- ..._drivers-mmc-host-sdhci-gk7202v300.c.patch | 6 +- ..._drivers-mmc-host-sdhci-gk7205v200.c.patch | 6 +- ..._drivers-mmc-host-sdhci-gk7205v300.c.patch | 14 +-- ..._drivers-mmc-host-sdhci-gk7605v100.c.patch | 14 +-- ...0_drivers-mtd-nand-gkfmc100-Makefile.patch | 21 +---- ...mtd-nand-gkfmc100-fmc_spi_nand_ids.c.patch | 88 +++++++++++++------ .../00_drivers-mtd-nand-nfc_spl_ids.c.patch | 4 +- .../00_drivers-mtd-spi-nor-spi-nor.c.patch | 51 +++++++---- ...00_drivers-net-phy-mdio-goke-femac.c.patch | 11 +-- 38 files changed, 2030 insertions(+), 103 deletions(-) create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch create mode 100644 br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7202v300.dtsi.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7202v300.dtsi.patch index 8d77f2b7..195e19aa 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7202v300.dtsi.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7202v300.dtsi.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/arch/arm/boot/dts/gk7202v300.dtsi 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/arch/arm/boot/dts/gk7202v300.dtsi 2021-06-07 13:01:32.000000000 +0300 -@@ -0,0 +1,625 @@ +@@ -0,0 +1,626 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -258,7 +258,8 @@ + }; + + femac: ethernet@10040000 { -+ compatible = "goke,femac"; ++ compatible = "goke,femac", ++ "goke,femac-v2"; + reg = <0x10040000 0x1000>,<0x10041300 0x200>; + interrupts = <0 33 4>; + clocks = <&clock GK7202V300_ETH0_CLK>; diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v200.dtsi.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v200.dtsi.patch index 08c6f384..ee134693 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v200.dtsi.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v200.dtsi.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/arch/arm/boot/dts/gk7205v200.dtsi 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/arch/arm/boot/dts/gk7205v200.dtsi 2021-06-07 13:01:32.000000000 +0300 -@@ -0,0 +1,625 @@ +@@ -0,0 +1,626 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -258,7 +258,8 @@ + }; + + femac: ethernet@10040000 { -+ compatible = "goke,femac"; ++ compatible = "goke,femac", ++ "goke,femac-v2"; + reg = <0x10040000 0x1000>,<0x10041300 0x200>; + interrupts = <0 33 4>; + clocks = <&clock GK7205V200_ETH0_CLK>; diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v300.dtsi.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v300.dtsi.patch index 16cb3baf..74c45fd9 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v300.dtsi.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7205v300.dtsi.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/arch/arm/boot/dts/gk7205v300.dtsi 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/arch/arm/boot/dts/gk7205v300.dtsi 2021-06-07 13:01:32.000000000 +0300 -@@ -0,0 +1,644 @@ +@@ -0,0 +1,645 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -255,7 +255,8 @@ + }; + + femac: ethernet@10040000 { -+ compatible = "goke,femac"; ++ compatible = "goke,femac", ++ "goke,femac-v2"; + reg = <0x10040000 0x1000>,<0x10041300 0x200>; + interrupts = <0 33 4>; + clocks = <&clock GK7205V300_ETH0_CLK>; diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7605v100.dtsi.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7605v100.dtsi.patch index 23cde51a..219463f6 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7605v100.dtsi.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-gk7605v100.dtsi.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/arch/arm/boot/dts/gk7605v100.dtsi 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/arch/arm/boot/dts/gk7605v100.dtsi 2021-06-07 13:01:32.000000000 +0300 -@@ -0,0 +1,644 @@ +@@ -0,0 +1,645 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -255,7 +255,8 @@ + }; + + femac: ethernet@10040000 { -+ compatible = "goke,femac"; ++ compatible = "goke,femac", ++ "goke,femac-v2"; + reg = <0x10040000 0x1000>,<0x10041300 0x200>; + interrupts = <0 33 4>; + clocks = <&clock GK7605V100_ETH0_CLK>; diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch new file mode 100644 index 00000000..29fe384d --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7202V300_CLOCK_H ++#define __DTS_GK7202V300_CLOCK_H ++ ++/* clk in GK7202V300 CRG */ ++/* fixed rate clocks */ ++#define GK7202V300_FIXED_100K 1 ++#define GK7202V300_FIXED_400K 2 ++#define GK7202V300_FIXED_3M 3 ++#define GK7202V300_FIXED_6M 4 ++#define GK7202V300_FIXED_12M 5 ++#define GK7202V300_FIXED_24M 6 ++#define GK7202V300_FIXED_25M 7 ++#define GK7202V300_FIXED_50M 8 ++#define GK7202V300_FIXED_83P3M 9 ++#define GK7202V300_FIXED_90M 10 ++#define GK7202V300_FIXED_100M 11 ++#define GK7202V300_FIXED_112M 12 ++#define GK7202V300_FIXED_125M 13 ++#define GK7202V300_FIXED_148P5M 14 ++#define GK7202V300_FIXED_150M 15 ++#define GK7202V300_FIXED_200M 16 ++#define GK7202V300_FIXED_250M 17 ++#define GK7202V300_FIXED_300M 18 ++#define GK7202V300_FIXED_324M 19 ++#define GK7202V300_FIXED_342M 20 ++#define GK7202V300_FIXED_375M 21 ++#define GK7202V300_FIXED_400M 22 ++#define GK7202V300_FIXED_448M 23 ++#define GK7202V300_FIXED_500M 24 ++#define GK7202V300_FIXED_540M 25 ++#define GK7202V300_FIXED_600M 26 ++#define GK7202V300_FIXED_750M 27 ++#define GK7202V300_FIXED_1000M 28 ++#define GK7202V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7202V300_SYSAXI_CLK 30 ++#define GK7202V300_SYSAPB_CLK 31 ++#define GK7202V300_FMC_MUX 32 ++#define GK7202V300_UART_MUX 33 ++#define GK7202V300_MMC0_MUX 34 ++#define GK7202V300_MMC1_MUX 35 ++#define GK7202V300_MMC2_MUX 36 ++#define GK7202V300_ETH_MUX 37 ++#define GK7202V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7202V300_UART0_CLK 40 ++#define GK7202V300_UART1_CLK 41 ++#define GK7202V300_UART2_CLK 42 ++#define GK7202V300_FMC_CLK 43 ++#define GK7202V300_ETH0_CLK 44 ++#define GK7202V300_EDMAC_AXICLK 45 ++#define GK7202V300_EDMAC_CLK 46 ++#define GK7202V300_SPI0_CLK 48 ++#define GK7202V300_SPI1_CLK 49 ++#define GK7202V300_MMC0_CLK 50 ++#define GK7202V300_MMC1_CLK 51 ++#define GK7202V300_MMC2_CLK 52 ++#define GK7202V300_I2C0_CLK 53 ++#define GK7202V300_I2C1_CLK 54 ++#define GK7202V300_I2C2_CLK 55 ++#define GK7202V300_USB2_BUS_CLK 81 ++#define GK7202V300_USB2_REF_CLK 82 ++#define GK7202V300_USB2_UTMI_CLK 83 ++#define GK7202V300_USB2_PHY_APB_CLK 84 ++#define GK7202V300_USB2_PHY_PLL_CLK 85 ++#define GK7202V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7202V300_NR_CLKS 256 ++#define GK7202V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7202V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch new file mode 100644 index 00000000..19013382 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V200_CLOCK_H ++#define __DTS_GK7205V200_CLOCK_H ++ ++/* clk in GK7205V200 CRG */ ++/* fixed rate clocks */ ++#define GK7205V200_FIXED_100K 1 ++#define GK7205V200_FIXED_400K 2 ++#define GK7205V200_FIXED_3M 3 ++#define GK7205V200_FIXED_6M 4 ++#define GK7205V200_FIXED_12M 5 ++#define GK7205V200_FIXED_24M 6 ++#define GK7205V200_FIXED_25M 7 ++#define GK7205V200_FIXED_50M 8 ++#define GK7205V200_FIXED_83P3M 9 ++#define GK7205V200_FIXED_90M 10 ++#define GK7205V200_FIXED_100M 11 ++#define GK7205V200_FIXED_112M 12 ++#define GK7205V200_FIXED_125M 13 ++#define GK7205V200_FIXED_148P5M 14 ++#define GK7205V200_FIXED_150M 15 ++#define GK7205V200_FIXED_200M 16 ++#define GK7205V200_FIXED_250M 17 ++#define GK7205V200_FIXED_300M 18 ++#define GK7205V200_FIXED_324M 19 ++#define GK7205V200_FIXED_342M 20 ++#define GK7205V200_FIXED_375M 21 ++#define GK7205V200_FIXED_400M 22 ++#define GK7205V200_FIXED_448M 23 ++#define GK7205V200_FIXED_500M 24 ++#define GK7205V200_FIXED_540M 25 ++#define GK7205V200_FIXED_600M 26 ++#define GK7205V200_FIXED_750M 27 ++#define GK7205V200_FIXED_1000M 28 ++#define GK7205V200_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V200_SYSAXI_CLK 30 ++#define GK7205V200_SYSAPB_CLK 31 ++#define GK7205V200_FMC_MUX 32 ++#define GK7205V200_UART_MUX 33 ++#define GK7205V200_MMC0_MUX 34 ++#define GK7205V200_MMC1_MUX 35 ++#define GK7205V200_MMC2_MUX 36 ++#define GK7205V200_ETH_MUX 37 ++#define GK7205V200_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V200_UART0_CLK 40 ++#define GK7205V200_UART1_CLK 41 ++#define GK7205V200_UART2_CLK 42 ++#define GK7205V200_FMC_CLK 43 ++#define GK7205V200_ETH0_CLK 44 ++#define GK7205V200_EDMAC_AXICLK 45 ++#define GK7205V200_EDMAC_CLK 46 ++#define GK7205V200_SPI0_CLK 48 ++#define GK7205V200_SPI1_CLK 49 ++#define GK7205V200_MMC0_CLK 50 ++#define GK7205V200_MMC1_CLK 51 ++#define GK7205V200_MMC2_CLK 52 ++#define GK7205V200_I2C0_CLK 53 ++#define GK7205V200_I2C1_CLK 54 ++#define GK7205V200_I2C2_CLK 55 ++#define GK7205V200_USB2_BUS_CLK 81 ++#define GK7205V200_USB2_REF_CLK 82 ++#define GK7205V200_USB2_UTMI_CLK 83 ++#define GK7205V200_USB2_PHY_APB_CLK 84 ++#define GK7205V200_USB2_PHY_PLL_CLK 85 ++#define GK7205V200_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V200_NR_CLKS 256 ++#define GK7205V200_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V200_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch new file mode 100644 index 00000000..d70777e6 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V300_CLOCK_H ++#define __DTS_GK7205V300_CLOCK_H ++ ++/* clk in GK7205V300 CRG */ ++/* fixed rate clocks */ ++#define GK7205V300_FIXED_100K 1 ++#define GK7205V300_FIXED_400K 2 ++#define GK7205V300_FIXED_3M 3 ++#define GK7205V300_FIXED_6M 4 ++#define GK7205V300_FIXED_12M 5 ++#define GK7205V300_FIXED_24M 6 ++#define GK7205V300_FIXED_25M 7 ++#define GK7205V300_FIXED_50M 8 ++#define GK7205V300_FIXED_83P3M 9 ++#define GK7205V300_FIXED_90M 10 ++#define GK7205V300_FIXED_100M 11 ++#define GK7205V300_FIXED_112M 12 ++#define GK7205V300_FIXED_125M 13 ++#define GK7205V300_FIXED_148P5M 14 ++#define GK7205V300_FIXED_150M 15 ++#define GK7205V300_FIXED_200M 16 ++#define GK7205V300_FIXED_250M 17 ++#define GK7205V300_FIXED_300M 18 ++#define GK7205V300_FIXED_324M 19 ++#define GK7205V300_FIXED_342M 20 ++#define GK7205V300_FIXED_375M 21 ++#define GK7205V300_FIXED_400M 22 ++#define GK7205V300_FIXED_448M 23 ++#define GK7205V300_FIXED_500M 24 ++#define GK7205V300_FIXED_540M 25 ++#define GK7205V300_FIXED_600M 26 ++#define GK7205V300_FIXED_750M 27 ++#define GK7205V300_FIXED_1000M 28 ++#define GK7205V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V300_SYSAXI_CLK 30 ++#define GK7205V300_SYSAPB_CLK 31 ++#define GK7205V300_FMC_MUX 32 ++#define GK7205V300_UART_MUX 33 ++#define GK7205V300_MMC0_MUX 34 ++#define GK7205V300_MMC1_MUX 35 ++#define GK7205V300_MMC2_MUX 36 ++#define GK7205V300_ETH_MUX 37 ++#define GK7205V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V300_UART0_CLK 40 ++#define GK7205V300_UART1_CLK 41 ++#define GK7205V300_UART2_CLK 42 ++#define GK7205V300_FMC_CLK 43 ++#define GK7205V300_ETH0_CLK 44 ++#define GK7205V300_EDMAC_AXICLK 45 ++#define GK7205V300_EDMAC_CLK 46 ++#define GK7205V300_SPI0_CLK 48 ++#define GK7205V300_SPI1_CLK 49 ++#define GK7205V300_MMC0_CLK 50 ++#define GK7205V300_MMC1_CLK 51 ++#define GK7205V300_MMC2_CLK 52 ++#define GK7205V300_I2C0_CLK 53 ++#define GK7205V300_I2C1_CLK 54 ++#define GK7205V300_I2C2_CLK 55 ++#define GK7205V300_USB2_BUS_CLK 81 ++#define GK7205V300_USB2_REF_CLK 82 ++#define GK7205V300_USB2_UTMI_CLK 83 ++#define GK7205V300_USB2_PHY_APB_CLK 84 ++#define GK7205V300_USB2_PHY_PLL_CLK 85 ++#define GK7205V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V300_NR_CLKS 256 ++#define GK7205V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch new file mode 100644 index 00000000..e224a9ca --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7605V100_CLOCK_H ++#define __DTS_GK7605V100_CLOCK_H ++ ++/* clk in GK7605V100 CRG */ ++/* fixed rate clocks */ ++#define GK7605V100_FIXED_100K 1 ++#define GK7605V100_FIXED_400K 2 ++#define GK7605V100_FIXED_3M 3 ++#define GK7605V100_FIXED_6M 4 ++#define GK7605V100_FIXED_12M 5 ++#define GK7605V100_FIXED_24M 6 ++#define GK7605V100_FIXED_25M 7 ++#define GK7605V100_FIXED_50M 8 ++#define GK7605V100_FIXED_83P3M 9 ++#define GK7605V100_FIXED_90M 10 ++#define GK7605V100_FIXED_100M 11 ++#define GK7605V100_FIXED_112M 12 ++#define GK7605V100_FIXED_125M 13 ++#define GK7605V100_FIXED_148P5M 14 ++#define GK7605V100_FIXED_150M 15 ++#define GK7605V100_FIXED_200M 16 ++#define GK7605V100_FIXED_250M 17 ++#define GK7605V100_FIXED_300M 18 ++#define GK7605V100_FIXED_324M 19 ++#define GK7605V100_FIXED_342M 20 ++#define GK7605V100_FIXED_375M 21 ++#define GK7605V100_FIXED_400M 22 ++#define GK7605V100_FIXED_448M 23 ++#define GK7605V100_FIXED_500M 24 ++#define GK7605V100_FIXED_540M 25 ++#define GK7605V100_FIXED_600M 26 ++#define GK7605V100_FIXED_750M 27 ++#define GK7605V100_FIXED_1000M 28 ++#define GK7605V100_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7605V100_SYSAXI_CLK 30 ++#define GK7605V100_SYSAPB_CLK 31 ++#define GK7605V100_FMC_MUX 32 ++#define GK7605V100_UART_MUX 33 ++#define GK7605V100_MMC0_MUX 34 ++#define GK7605V100_MMC1_MUX 35 ++#define GK7605V100_MMC2_MUX 36 ++#define GK7605V100_ETH_MUX 37 ++#define GK7605V100_USB2_MUX 80 ++/* gate clocks */ ++#define GK7605V100_UART0_CLK 40 ++#define GK7605V100_UART1_CLK 41 ++#define GK7605V100_UART2_CLK 42 ++#define GK7605V100_FMC_CLK 43 ++#define GK7605V100_ETH0_CLK 44 ++#define GK7605V100_EDMAC_AXICLK 45 ++#define GK7605V100_EDMAC_CLK 46 ++#define GK7605V100_SPI0_CLK 48 ++#define GK7605V100_SPI1_CLK 49 ++#define GK7605V100_MMC0_CLK 50 ++#define GK7605V100_MMC1_CLK 51 ++#define GK7605V100_MMC2_CLK 52 ++#define GK7605V100_I2C0_CLK 53 ++#define GK7605V100_I2C1_CLK 54 ++#define GK7605V100_I2C2_CLK 55 ++#define GK7605V100_USB2_BUS_CLK 81 ++#define GK7605V100_USB2_REF_CLK 82 ++#define GK7605V100_USB2_UTMI_CLK 83 ++#define GK7605V100_USB2_PHY_APB_CLK 84 ++#define GK7605V100_USB2_PHY_PLL_CLK 85 ++#define GK7605V100_USB2_PHY_XO_CLK 86 ++ ++#define GK7605V100_NR_CLKS 256 ++#define GK7605V100_NR_RSTS 256 ++ ++#endif /* __DTS_GK7605V100_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch new file mode 100644 index 00000000..c64bf353 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm64/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm64/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7202V300_CLOCK_H ++#define __DTS_GK7202V300_CLOCK_H ++ ++/* clk in GK7202V300 CRG */ ++/* fixed rate clocks */ ++#define GK7202V300_FIXED_100K 1 ++#define GK7202V300_FIXED_400K 2 ++#define GK7202V300_FIXED_3M 3 ++#define GK7202V300_FIXED_6M 4 ++#define GK7202V300_FIXED_12M 5 ++#define GK7202V300_FIXED_24M 6 ++#define GK7202V300_FIXED_25M 7 ++#define GK7202V300_FIXED_50M 8 ++#define GK7202V300_FIXED_83P3M 9 ++#define GK7202V300_FIXED_90M 10 ++#define GK7202V300_FIXED_100M 11 ++#define GK7202V300_FIXED_112M 12 ++#define GK7202V300_FIXED_125M 13 ++#define GK7202V300_FIXED_148P5M 14 ++#define GK7202V300_FIXED_150M 15 ++#define GK7202V300_FIXED_200M 16 ++#define GK7202V300_FIXED_250M 17 ++#define GK7202V300_FIXED_300M 18 ++#define GK7202V300_FIXED_324M 19 ++#define GK7202V300_FIXED_342M 20 ++#define GK7202V300_FIXED_375M 21 ++#define GK7202V300_FIXED_400M 22 ++#define GK7202V300_FIXED_448M 23 ++#define GK7202V300_FIXED_500M 24 ++#define GK7202V300_FIXED_540M 25 ++#define GK7202V300_FIXED_600M 26 ++#define GK7202V300_FIXED_750M 27 ++#define GK7202V300_FIXED_1000M 28 ++#define GK7202V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7202V300_SYSAXI_CLK 30 ++#define GK7202V300_SYSAPB_CLK 31 ++#define GK7202V300_FMC_MUX 32 ++#define GK7202V300_UART_MUX 33 ++#define GK7202V300_MMC0_MUX 34 ++#define GK7202V300_MMC1_MUX 35 ++#define GK7202V300_MMC2_MUX 36 ++#define GK7202V300_ETH_MUX 37 ++#define GK7202V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7202V300_UART0_CLK 40 ++#define GK7202V300_UART1_CLK 41 ++#define GK7202V300_UART2_CLK 42 ++#define GK7202V300_FMC_CLK 43 ++#define GK7202V300_ETH0_CLK 44 ++#define GK7202V300_EDMAC_AXICLK 45 ++#define GK7202V300_EDMAC_CLK 46 ++#define GK7202V300_SPI0_CLK 48 ++#define GK7202V300_SPI1_CLK 49 ++#define GK7202V300_MMC0_CLK 50 ++#define GK7202V300_MMC1_CLK 51 ++#define GK7202V300_MMC2_CLK 52 ++#define GK7202V300_I2C0_CLK 53 ++#define GK7202V300_I2C1_CLK 54 ++#define GK7202V300_I2C2_CLK 55 ++#define GK7202V300_USB2_BUS_CLK 81 ++#define GK7202V300_USB2_REF_CLK 82 ++#define GK7202V300_USB2_UTMI_CLK 83 ++#define GK7202V300_USB2_PHY_APB_CLK 84 ++#define GK7202V300_USB2_PHY_PLL_CLK 85 ++#define GK7202V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7202V300_NR_CLKS 256 ++#define GK7202V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7202V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch new file mode 100644 index 00000000..dba412f3 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm64/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm64/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V200_CLOCK_H ++#define __DTS_GK7205V200_CLOCK_H ++ ++/* clk in GK7205V200 CRG */ ++/* fixed rate clocks */ ++#define GK7205V200_FIXED_100K 1 ++#define GK7205V200_FIXED_400K 2 ++#define GK7205V200_FIXED_3M 3 ++#define GK7205V200_FIXED_6M 4 ++#define GK7205V200_FIXED_12M 5 ++#define GK7205V200_FIXED_24M 6 ++#define GK7205V200_FIXED_25M 7 ++#define GK7205V200_FIXED_50M 8 ++#define GK7205V200_FIXED_83P3M 9 ++#define GK7205V200_FIXED_90M 10 ++#define GK7205V200_FIXED_100M 11 ++#define GK7205V200_FIXED_112M 12 ++#define GK7205V200_FIXED_125M 13 ++#define GK7205V200_FIXED_148P5M 14 ++#define GK7205V200_FIXED_150M 15 ++#define GK7205V200_FIXED_200M 16 ++#define GK7205V200_FIXED_250M 17 ++#define GK7205V200_FIXED_300M 18 ++#define GK7205V200_FIXED_324M 19 ++#define GK7205V200_FIXED_342M 20 ++#define GK7205V200_FIXED_375M 21 ++#define GK7205V200_FIXED_400M 22 ++#define GK7205V200_FIXED_448M 23 ++#define GK7205V200_FIXED_500M 24 ++#define GK7205V200_FIXED_540M 25 ++#define GK7205V200_FIXED_600M 26 ++#define GK7205V200_FIXED_750M 27 ++#define GK7205V200_FIXED_1000M 28 ++#define GK7205V200_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V200_SYSAXI_CLK 30 ++#define GK7205V200_SYSAPB_CLK 31 ++#define GK7205V200_FMC_MUX 32 ++#define GK7205V200_UART_MUX 33 ++#define GK7205V200_MMC0_MUX 34 ++#define GK7205V200_MMC1_MUX 35 ++#define GK7205V200_MMC2_MUX 36 ++#define GK7205V200_ETH_MUX 37 ++#define GK7205V200_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V200_UART0_CLK 40 ++#define GK7205V200_UART1_CLK 41 ++#define GK7205V200_UART2_CLK 42 ++#define GK7205V200_FMC_CLK 43 ++#define GK7205V200_ETH0_CLK 44 ++#define GK7205V200_EDMAC_AXICLK 45 ++#define GK7205V200_EDMAC_CLK 46 ++#define GK7205V200_SPI0_CLK 48 ++#define GK7205V200_SPI1_CLK 49 ++#define GK7205V200_MMC0_CLK 50 ++#define GK7205V200_MMC1_CLK 51 ++#define GK7205V200_MMC2_CLK 52 ++#define GK7205V200_I2C0_CLK 53 ++#define GK7205V200_I2C1_CLK 54 ++#define GK7205V200_I2C2_CLK 55 ++#define GK7205V200_USB2_BUS_CLK 81 ++#define GK7205V200_USB2_REF_CLK 82 ++#define GK7205V200_USB2_UTMI_CLK 83 ++#define GK7205V200_USB2_PHY_APB_CLK 84 ++#define GK7205V200_USB2_PHY_PLL_CLK 85 ++#define GK7205V200_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V200_NR_CLKS 256 ++#define GK7205V200_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V200_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch new file mode 100644 index 00000000..1ba4a7c1 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm64/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm64/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V300_CLOCK_H ++#define __DTS_GK7205V300_CLOCK_H ++ ++/* clk in GK7205V300 CRG */ ++/* fixed rate clocks */ ++#define GK7205V300_FIXED_100K 1 ++#define GK7205V300_FIXED_400K 2 ++#define GK7205V300_FIXED_3M 3 ++#define GK7205V300_FIXED_6M 4 ++#define GK7205V300_FIXED_12M 5 ++#define GK7205V300_FIXED_24M 6 ++#define GK7205V300_FIXED_25M 7 ++#define GK7205V300_FIXED_50M 8 ++#define GK7205V300_FIXED_83P3M 9 ++#define GK7205V300_FIXED_90M 10 ++#define GK7205V300_FIXED_100M 11 ++#define GK7205V300_FIXED_112M 12 ++#define GK7205V300_FIXED_125M 13 ++#define GK7205V300_FIXED_148P5M 14 ++#define GK7205V300_FIXED_150M 15 ++#define GK7205V300_FIXED_200M 16 ++#define GK7205V300_FIXED_250M 17 ++#define GK7205V300_FIXED_300M 18 ++#define GK7205V300_FIXED_324M 19 ++#define GK7205V300_FIXED_342M 20 ++#define GK7205V300_FIXED_375M 21 ++#define GK7205V300_FIXED_400M 22 ++#define GK7205V300_FIXED_448M 23 ++#define GK7205V300_FIXED_500M 24 ++#define GK7205V300_FIXED_540M 25 ++#define GK7205V300_FIXED_600M 26 ++#define GK7205V300_FIXED_750M 27 ++#define GK7205V300_FIXED_1000M 28 ++#define GK7205V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V300_SYSAXI_CLK 30 ++#define GK7205V300_SYSAPB_CLK 31 ++#define GK7205V300_FMC_MUX 32 ++#define GK7205V300_UART_MUX 33 ++#define GK7205V300_MMC0_MUX 34 ++#define GK7205V300_MMC1_MUX 35 ++#define GK7205V300_MMC2_MUX 36 ++#define GK7205V300_ETH_MUX 37 ++#define GK7205V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V300_UART0_CLK 40 ++#define GK7205V300_UART1_CLK 41 ++#define GK7205V300_UART2_CLK 42 ++#define GK7205V300_FMC_CLK 43 ++#define GK7205V300_ETH0_CLK 44 ++#define GK7205V300_EDMAC_AXICLK 45 ++#define GK7205V300_EDMAC_CLK 46 ++#define GK7205V300_SPI0_CLK 48 ++#define GK7205V300_SPI1_CLK 49 ++#define GK7205V300_MMC0_CLK 50 ++#define GK7205V300_MMC1_CLK 51 ++#define GK7205V300_MMC2_CLK 52 ++#define GK7205V300_I2C0_CLK 53 ++#define GK7205V300_I2C1_CLK 54 ++#define GK7205V300_I2C2_CLK 55 ++#define GK7205V300_USB2_BUS_CLK 81 ++#define GK7205V300_USB2_REF_CLK 82 ++#define GK7205V300_USB2_UTMI_CLK 83 ++#define GK7205V300_USB2_PHY_APB_CLK 84 ++#define GK7205V300_USB2_PHY_PLL_CLK 85 ++#define GK7205V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V300_NR_CLKS 256 ++#define GK7205V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch new file mode 100644 index 00000000..458b431e --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-arm64-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/arm64/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/arm64/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7605V100_CLOCK_H ++#define __DTS_GK7605V100_CLOCK_H ++ ++/* clk in GK7605V100 CRG */ ++/* fixed rate clocks */ ++#define GK7605V100_FIXED_100K 1 ++#define GK7605V100_FIXED_400K 2 ++#define GK7605V100_FIXED_3M 3 ++#define GK7605V100_FIXED_6M 4 ++#define GK7605V100_FIXED_12M 5 ++#define GK7605V100_FIXED_24M 6 ++#define GK7605V100_FIXED_25M 7 ++#define GK7605V100_FIXED_50M 8 ++#define GK7605V100_FIXED_83P3M 9 ++#define GK7605V100_FIXED_90M 10 ++#define GK7605V100_FIXED_100M 11 ++#define GK7605V100_FIXED_112M 12 ++#define GK7605V100_FIXED_125M 13 ++#define GK7605V100_FIXED_148P5M 14 ++#define GK7605V100_FIXED_150M 15 ++#define GK7605V100_FIXED_200M 16 ++#define GK7605V100_FIXED_250M 17 ++#define GK7605V100_FIXED_300M 18 ++#define GK7605V100_FIXED_324M 19 ++#define GK7605V100_FIXED_342M 20 ++#define GK7605V100_FIXED_375M 21 ++#define GK7605V100_FIXED_400M 22 ++#define GK7605V100_FIXED_448M 23 ++#define GK7605V100_FIXED_500M 24 ++#define GK7605V100_FIXED_540M 25 ++#define GK7605V100_FIXED_600M 26 ++#define GK7605V100_FIXED_750M 27 ++#define GK7605V100_FIXED_1000M 28 ++#define GK7605V100_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7605V100_SYSAXI_CLK 30 ++#define GK7605V100_SYSAPB_CLK 31 ++#define GK7605V100_FMC_MUX 32 ++#define GK7605V100_UART_MUX 33 ++#define GK7605V100_MMC0_MUX 34 ++#define GK7605V100_MMC1_MUX 35 ++#define GK7605V100_MMC2_MUX 36 ++#define GK7605V100_ETH_MUX 37 ++#define GK7605V100_USB2_MUX 80 ++/* gate clocks */ ++#define GK7605V100_UART0_CLK 40 ++#define GK7605V100_UART1_CLK 41 ++#define GK7605V100_UART2_CLK 42 ++#define GK7605V100_FMC_CLK 43 ++#define GK7605V100_ETH0_CLK 44 ++#define GK7605V100_EDMAC_AXICLK 45 ++#define GK7605V100_EDMAC_CLK 46 ++#define GK7605V100_SPI0_CLK 48 ++#define GK7605V100_SPI1_CLK 49 ++#define GK7605V100_MMC0_CLK 50 ++#define GK7605V100_MMC1_CLK 51 ++#define GK7605V100_MMC2_CLK 52 ++#define GK7605V100_I2C0_CLK 53 ++#define GK7605V100_I2C1_CLK 54 ++#define GK7605V100_I2C2_CLK 55 ++#define GK7605V100_USB2_BUS_CLK 81 ++#define GK7605V100_USB2_REF_CLK 82 ++#define GK7605V100_USB2_UTMI_CLK 83 ++#define GK7605V100_USB2_PHY_APB_CLK 84 ++#define GK7605V100_USB2_PHY_PLL_CLK 85 ++#define GK7605V100_USB2_PHY_XO_CLK 86 ++ ++#define GK7605V100_NR_CLKS 256 ++#define GK7605V100_NR_RSTS 256 ++ ++#endif /* __DTS_GK7605V100_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch new file mode 100644 index 00000000..f8f76d4b --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/cris/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/cris/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7202V300_CLOCK_H ++#define __DTS_GK7202V300_CLOCK_H ++ ++/* clk in GK7202V300 CRG */ ++/* fixed rate clocks */ ++#define GK7202V300_FIXED_100K 1 ++#define GK7202V300_FIXED_400K 2 ++#define GK7202V300_FIXED_3M 3 ++#define GK7202V300_FIXED_6M 4 ++#define GK7202V300_FIXED_12M 5 ++#define GK7202V300_FIXED_24M 6 ++#define GK7202V300_FIXED_25M 7 ++#define GK7202V300_FIXED_50M 8 ++#define GK7202V300_FIXED_83P3M 9 ++#define GK7202V300_FIXED_90M 10 ++#define GK7202V300_FIXED_100M 11 ++#define GK7202V300_FIXED_112M 12 ++#define GK7202V300_FIXED_125M 13 ++#define GK7202V300_FIXED_148P5M 14 ++#define GK7202V300_FIXED_150M 15 ++#define GK7202V300_FIXED_200M 16 ++#define GK7202V300_FIXED_250M 17 ++#define GK7202V300_FIXED_300M 18 ++#define GK7202V300_FIXED_324M 19 ++#define GK7202V300_FIXED_342M 20 ++#define GK7202V300_FIXED_375M 21 ++#define GK7202V300_FIXED_400M 22 ++#define GK7202V300_FIXED_448M 23 ++#define GK7202V300_FIXED_500M 24 ++#define GK7202V300_FIXED_540M 25 ++#define GK7202V300_FIXED_600M 26 ++#define GK7202V300_FIXED_750M 27 ++#define GK7202V300_FIXED_1000M 28 ++#define GK7202V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7202V300_SYSAXI_CLK 30 ++#define GK7202V300_SYSAPB_CLK 31 ++#define GK7202V300_FMC_MUX 32 ++#define GK7202V300_UART_MUX 33 ++#define GK7202V300_MMC0_MUX 34 ++#define GK7202V300_MMC1_MUX 35 ++#define GK7202V300_MMC2_MUX 36 ++#define GK7202V300_ETH_MUX 37 ++#define GK7202V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7202V300_UART0_CLK 40 ++#define GK7202V300_UART1_CLK 41 ++#define GK7202V300_UART2_CLK 42 ++#define GK7202V300_FMC_CLK 43 ++#define GK7202V300_ETH0_CLK 44 ++#define GK7202V300_EDMAC_AXICLK 45 ++#define GK7202V300_EDMAC_CLK 46 ++#define GK7202V300_SPI0_CLK 48 ++#define GK7202V300_SPI1_CLK 49 ++#define GK7202V300_MMC0_CLK 50 ++#define GK7202V300_MMC1_CLK 51 ++#define GK7202V300_MMC2_CLK 52 ++#define GK7202V300_I2C0_CLK 53 ++#define GK7202V300_I2C1_CLK 54 ++#define GK7202V300_I2C2_CLK 55 ++#define GK7202V300_USB2_BUS_CLK 81 ++#define GK7202V300_USB2_REF_CLK 82 ++#define GK7202V300_USB2_UTMI_CLK 83 ++#define GK7202V300_USB2_PHY_APB_CLK 84 ++#define GK7202V300_USB2_PHY_PLL_CLK 85 ++#define GK7202V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7202V300_NR_CLKS 256 ++#define GK7202V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7202V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch new file mode 100644 index 00000000..d5827c6a --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/cris/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/cris/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V200_CLOCK_H ++#define __DTS_GK7205V200_CLOCK_H ++ ++/* clk in GK7205V200 CRG */ ++/* fixed rate clocks */ ++#define GK7205V200_FIXED_100K 1 ++#define GK7205V200_FIXED_400K 2 ++#define GK7205V200_FIXED_3M 3 ++#define GK7205V200_FIXED_6M 4 ++#define GK7205V200_FIXED_12M 5 ++#define GK7205V200_FIXED_24M 6 ++#define GK7205V200_FIXED_25M 7 ++#define GK7205V200_FIXED_50M 8 ++#define GK7205V200_FIXED_83P3M 9 ++#define GK7205V200_FIXED_90M 10 ++#define GK7205V200_FIXED_100M 11 ++#define GK7205V200_FIXED_112M 12 ++#define GK7205V200_FIXED_125M 13 ++#define GK7205V200_FIXED_148P5M 14 ++#define GK7205V200_FIXED_150M 15 ++#define GK7205V200_FIXED_200M 16 ++#define GK7205V200_FIXED_250M 17 ++#define GK7205V200_FIXED_300M 18 ++#define GK7205V200_FIXED_324M 19 ++#define GK7205V200_FIXED_342M 20 ++#define GK7205V200_FIXED_375M 21 ++#define GK7205V200_FIXED_400M 22 ++#define GK7205V200_FIXED_448M 23 ++#define GK7205V200_FIXED_500M 24 ++#define GK7205V200_FIXED_540M 25 ++#define GK7205V200_FIXED_600M 26 ++#define GK7205V200_FIXED_750M 27 ++#define GK7205V200_FIXED_1000M 28 ++#define GK7205V200_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V200_SYSAXI_CLK 30 ++#define GK7205V200_SYSAPB_CLK 31 ++#define GK7205V200_FMC_MUX 32 ++#define GK7205V200_UART_MUX 33 ++#define GK7205V200_MMC0_MUX 34 ++#define GK7205V200_MMC1_MUX 35 ++#define GK7205V200_MMC2_MUX 36 ++#define GK7205V200_ETH_MUX 37 ++#define GK7205V200_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V200_UART0_CLK 40 ++#define GK7205V200_UART1_CLK 41 ++#define GK7205V200_UART2_CLK 42 ++#define GK7205V200_FMC_CLK 43 ++#define GK7205V200_ETH0_CLK 44 ++#define GK7205V200_EDMAC_AXICLK 45 ++#define GK7205V200_EDMAC_CLK 46 ++#define GK7205V200_SPI0_CLK 48 ++#define GK7205V200_SPI1_CLK 49 ++#define GK7205V200_MMC0_CLK 50 ++#define GK7205V200_MMC1_CLK 51 ++#define GK7205V200_MMC2_CLK 52 ++#define GK7205V200_I2C0_CLK 53 ++#define GK7205V200_I2C1_CLK 54 ++#define GK7205V200_I2C2_CLK 55 ++#define GK7205V200_USB2_BUS_CLK 81 ++#define GK7205V200_USB2_REF_CLK 82 ++#define GK7205V200_USB2_UTMI_CLK 83 ++#define GK7205V200_USB2_PHY_APB_CLK 84 ++#define GK7205V200_USB2_PHY_PLL_CLK 85 ++#define GK7205V200_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V200_NR_CLKS 256 ++#define GK7205V200_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V200_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch new file mode 100644 index 00000000..c196c2d3 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/cris/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/cris/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V300_CLOCK_H ++#define __DTS_GK7205V300_CLOCK_H ++ ++/* clk in GK7205V300 CRG */ ++/* fixed rate clocks */ ++#define GK7205V300_FIXED_100K 1 ++#define GK7205V300_FIXED_400K 2 ++#define GK7205V300_FIXED_3M 3 ++#define GK7205V300_FIXED_6M 4 ++#define GK7205V300_FIXED_12M 5 ++#define GK7205V300_FIXED_24M 6 ++#define GK7205V300_FIXED_25M 7 ++#define GK7205V300_FIXED_50M 8 ++#define GK7205V300_FIXED_83P3M 9 ++#define GK7205V300_FIXED_90M 10 ++#define GK7205V300_FIXED_100M 11 ++#define GK7205V300_FIXED_112M 12 ++#define GK7205V300_FIXED_125M 13 ++#define GK7205V300_FIXED_148P5M 14 ++#define GK7205V300_FIXED_150M 15 ++#define GK7205V300_FIXED_200M 16 ++#define GK7205V300_FIXED_250M 17 ++#define GK7205V300_FIXED_300M 18 ++#define GK7205V300_FIXED_324M 19 ++#define GK7205V300_FIXED_342M 20 ++#define GK7205V300_FIXED_375M 21 ++#define GK7205V300_FIXED_400M 22 ++#define GK7205V300_FIXED_448M 23 ++#define GK7205V300_FIXED_500M 24 ++#define GK7205V300_FIXED_540M 25 ++#define GK7205V300_FIXED_600M 26 ++#define GK7205V300_FIXED_750M 27 ++#define GK7205V300_FIXED_1000M 28 ++#define GK7205V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V300_SYSAXI_CLK 30 ++#define GK7205V300_SYSAPB_CLK 31 ++#define GK7205V300_FMC_MUX 32 ++#define GK7205V300_UART_MUX 33 ++#define GK7205V300_MMC0_MUX 34 ++#define GK7205V300_MMC1_MUX 35 ++#define GK7205V300_MMC2_MUX 36 ++#define GK7205V300_ETH_MUX 37 ++#define GK7205V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V300_UART0_CLK 40 ++#define GK7205V300_UART1_CLK 41 ++#define GK7205V300_UART2_CLK 42 ++#define GK7205V300_FMC_CLK 43 ++#define GK7205V300_ETH0_CLK 44 ++#define GK7205V300_EDMAC_AXICLK 45 ++#define GK7205V300_EDMAC_CLK 46 ++#define GK7205V300_SPI0_CLK 48 ++#define GK7205V300_SPI1_CLK 49 ++#define GK7205V300_MMC0_CLK 50 ++#define GK7205V300_MMC1_CLK 51 ++#define GK7205V300_MMC2_CLK 52 ++#define GK7205V300_I2C0_CLK 53 ++#define GK7205V300_I2C1_CLK 54 ++#define GK7205V300_I2C2_CLK 55 ++#define GK7205V300_USB2_BUS_CLK 81 ++#define GK7205V300_USB2_REF_CLK 82 ++#define GK7205V300_USB2_UTMI_CLK 83 ++#define GK7205V300_USB2_PHY_APB_CLK 84 ++#define GK7205V300_USB2_PHY_PLL_CLK 85 ++#define GK7205V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V300_NR_CLKS 256 ++#define GK7205V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch new file mode 100644 index 00000000..e0da627c --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-cris-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/cris/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/cris/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7605V100_CLOCK_H ++#define __DTS_GK7605V100_CLOCK_H ++ ++/* clk in GK7605V100 CRG */ ++/* fixed rate clocks */ ++#define GK7605V100_FIXED_100K 1 ++#define GK7605V100_FIXED_400K 2 ++#define GK7605V100_FIXED_3M 3 ++#define GK7605V100_FIXED_6M 4 ++#define GK7605V100_FIXED_12M 5 ++#define GK7605V100_FIXED_24M 6 ++#define GK7605V100_FIXED_25M 7 ++#define GK7605V100_FIXED_50M 8 ++#define GK7605V100_FIXED_83P3M 9 ++#define GK7605V100_FIXED_90M 10 ++#define GK7605V100_FIXED_100M 11 ++#define GK7605V100_FIXED_112M 12 ++#define GK7605V100_FIXED_125M 13 ++#define GK7605V100_FIXED_148P5M 14 ++#define GK7605V100_FIXED_150M 15 ++#define GK7605V100_FIXED_200M 16 ++#define GK7605V100_FIXED_250M 17 ++#define GK7605V100_FIXED_300M 18 ++#define GK7605V100_FIXED_324M 19 ++#define GK7605V100_FIXED_342M 20 ++#define GK7605V100_FIXED_375M 21 ++#define GK7605V100_FIXED_400M 22 ++#define GK7605V100_FIXED_448M 23 ++#define GK7605V100_FIXED_500M 24 ++#define GK7605V100_FIXED_540M 25 ++#define GK7605V100_FIXED_600M 26 ++#define GK7605V100_FIXED_750M 27 ++#define GK7605V100_FIXED_1000M 28 ++#define GK7605V100_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7605V100_SYSAXI_CLK 30 ++#define GK7605V100_SYSAPB_CLK 31 ++#define GK7605V100_FMC_MUX 32 ++#define GK7605V100_UART_MUX 33 ++#define GK7605V100_MMC0_MUX 34 ++#define GK7605V100_MMC1_MUX 35 ++#define GK7605V100_MMC2_MUX 36 ++#define GK7605V100_ETH_MUX 37 ++#define GK7605V100_USB2_MUX 80 ++/* gate clocks */ ++#define GK7605V100_UART0_CLK 40 ++#define GK7605V100_UART1_CLK 41 ++#define GK7605V100_UART2_CLK 42 ++#define GK7605V100_FMC_CLK 43 ++#define GK7605V100_ETH0_CLK 44 ++#define GK7605V100_EDMAC_AXICLK 45 ++#define GK7605V100_EDMAC_CLK 46 ++#define GK7605V100_SPI0_CLK 48 ++#define GK7605V100_SPI1_CLK 49 ++#define GK7605V100_MMC0_CLK 50 ++#define GK7605V100_MMC1_CLK 51 ++#define GK7605V100_MMC2_CLK 52 ++#define GK7605V100_I2C0_CLK 53 ++#define GK7605V100_I2C1_CLK 54 ++#define GK7605V100_I2C2_CLK 55 ++#define GK7605V100_USB2_BUS_CLK 81 ++#define GK7605V100_USB2_REF_CLK 82 ++#define GK7605V100_USB2_UTMI_CLK 83 ++#define GK7605V100_USB2_PHY_APB_CLK 84 ++#define GK7605V100_USB2_PHY_PLL_CLK 85 ++#define GK7605V100_USB2_PHY_XO_CLK 86 ++ ++#define GK7605V100_NR_CLKS 256 ++#define GK7605V100_NR_RSTS 256 ++ ++#endif /* __DTS_GK7605V100_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch new file mode 100644 index 00000000..fee26e58 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/metag/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/metag/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7202V300_CLOCK_H ++#define __DTS_GK7202V300_CLOCK_H ++ ++/* clk in GK7202V300 CRG */ ++/* fixed rate clocks */ ++#define GK7202V300_FIXED_100K 1 ++#define GK7202V300_FIXED_400K 2 ++#define GK7202V300_FIXED_3M 3 ++#define GK7202V300_FIXED_6M 4 ++#define GK7202V300_FIXED_12M 5 ++#define GK7202V300_FIXED_24M 6 ++#define GK7202V300_FIXED_25M 7 ++#define GK7202V300_FIXED_50M 8 ++#define GK7202V300_FIXED_83P3M 9 ++#define GK7202V300_FIXED_90M 10 ++#define GK7202V300_FIXED_100M 11 ++#define GK7202V300_FIXED_112M 12 ++#define GK7202V300_FIXED_125M 13 ++#define GK7202V300_FIXED_148P5M 14 ++#define GK7202V300_FIXED_150M 15 ++#define GK7202V300_FIXED_200M 16 ++#define GK7202V300_FIXED_250M 17 ++#define GK7202V300_FIXED_300M 18 ++#define GK7202V300_FIXED_324M 19 ++#define GK7202V300_FIXED_342M 20 ++#define GK7202V300_FIXED_375M 21 ++#define GK7202V300_FIXED_400M 22 ++#define GK7202V300_FIXED_448M 23 ++#define GK7202V300_FIXED_500M 24 ++#define GK7202V300_FIXED_540M 25 ++#define GK7202V300_FIXED_600M 26 ++#define GK7202V300_FIXED_750M 27 ++#define GK7202V300_FIXED_1000M 28 ++#define GK7202V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7202V300_SYSAXI_CLK 30 ++#define GK7202V300_SYSAPB_CLK 31 ++#define GK7202V300_FMC_MUX 32 ++#define GK7202V300_UART_MUX 33 ++#define GK7202V300_MMC0_MUX 34 ++#define GK7202V300_MMC1_MUX 35 ++#define GK7202V300_MMC2_MUX 36 ++#define GK7202V300_ETH_MUX 37 ++#define GK7202V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7202V300_UART0_CLK 40 ++#define GK7202V300_UART1_CLK 41 ++#define GK7202V300_UART2_CLK 42 ++#define GK7202V300_FMC_CLK 43 ++#define GK7202V300_ETH0_CLK 44 ++#define GK7202V300_EDMAC_AXICLK 45 ++#define GK7202V300_EDMAC_CLK 46 ++#define GK7202V300_SPI0_CLK 48 ++#define GK7202V300_SPI1_CLK 49 ++#define GK7202V300_MMC0_CLK 50 ++#define GK7202V300_MMC1_CLK 51 ++#define GK7202V300_MMC2_CLK 52 ++#define GK7202V300_I2C0_CLK 53 ++#define GK7202V300_I2C1_CLK 54 ++#define GK7202V300_I2C2_CLK 55 ++#define GK7202V300_USB2_BUS_CLK 81 ++#define GK7202V300_USB2_REF_CLK 82 ++#define GK7202V300_USB2_UTMI_CLK 83 ++#define GK7202V300_USB2_PHY_APB_CLK 84 ++#define GK7202V300_USB2_PHY_PLL_CLK 85 ++#define GK7202V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7202V300_NR_CLKS 256 ++#define GK7202V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7202V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch new file mode 100644 index 00000000..a3213cf9 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/metag/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/metag/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V200_CLOCK_H ++#define __DTS_GK7205V200_CLOCK_H ++ ++/* clk in GK7205V200 CRG */ ++/* fixed rate clocks */ ++#define GK7205V200_FIXED_100K 1 ++#define GK7205V200_FIXED_400K 2 ++#define GK7205V200_FIXED_3M 3 ++#define GK7205V200_FIXED_6M 4 ++#define GK7205V200_FIXED_12M 5 ++#define GK7205V200_FIXED_24M 6 ++#define GK7205V200_FIXED_25M 7 ++#define GK7205V200_FIXED_50M 8 ++#define GK7205V200_FIXED_83P3M 9 ++#define GK7205V200_FIXED_90M 10 ++#define GK7205V200_FIXED_100M 11 ++#define GK7205V200_FIXED_112M 12 ++#define GK7205V200_FIXED_125M 13 ++#define GK7205V200_FIXED_148P5M 14 ++#define GK7205V200_FIXED_150M 15 ++#define GK7205V200_FIXED_200M 16 ++#define GK7205V200_FIXED_250M 17 ++#define GK7205V200_FIXED_300M 18 ++#define GK7205V200_FIXED_324M 19 ++#define GK7205V200_FIXED_342M 20 ++#define GK7205V200_FIXED_375M 21 ++#define GK7205V200_FIXED_400M 22 ++#define GK7205V200_FIXED_448M 23 ++#define GK7205V200_FIXED_500M 24 ++#define GK7205V200_FIXED_540M 25 ++#define GK7205V200_FIXED_600M 26 ++#define GK7205V200_FIXED_750M 27 ++#define GK7205V200_FIXED_1000M 28 ++#define GK7205V200_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V200_SYSAXI_CLK 30 ++#define GK7205V200_SYSAPB_CLK 31 ++#define GK7205V200_FMC_MUX 32 ++#define GK7205V200_UART_MUX 33 ++#define GK7205V200_MMC0_MUX 34 ++#define GK7205V200_MMC1_MUX 35 ++#define GK7205V200_MMC2_MUX 36 ++#define GK7205V200_ETH_MUX 37 ++#define GK7205V200_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V200_UART0_CLK 40 ++#define GK7205V200_UART1_CLK 41 ++#define GK7205V200_UART2_CLK 42 ++#define GK7205V200_FMC_CLK 43 ++#define GK7205V200_ETH0_CLK 44 ++#define GK7205V200_EDMAC_AXICLK 45 ++#define GK7205V200_EDMAC_CLK 46 ++#define GK7205V200_SPI0_CLK 48 ++#define GK7205V200_SPI1_CLK 49 ++#define GK7205V200_MMC0_CLK 50 ++#define GK7205V200_MMC1_CLK 51 ++#define GK7205V200_MMC2_CLK 52 ++#define GK7205V200_I2C0_CLK 53 ++#define GK7205V200_I2C1_CLK 54 ++#define GK7205V200_I2C2_CLK 55 ++#define GK7205V200_USB2_BUS_CLK 81 ++#define GK7205V200_USB2_REF_CLK 82 ++#define GK7205V200_USB2_UTMI_CLK 83 ++#define GK7205V200_USB2_PHY_APB_CLK 84 ++#define GK7205V200_USB2_PHY_PLL_CLK 85 ++#define GK7205V200_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V200_NR_CLKS 256 ++#define GK7205V200_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V200_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch new file mode 100644 index 00000000..bbe5448a --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/metag/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/metag/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V300_CLOCK_H ++#define __DTS_GK7205V300_CLOCK_H ++ ++/* clk in GK7205V300 CRG */ ++/* fixed rate clocks */ ++#define GK7205V300_FIXED_100K 1 ++#define GK7205V300_FIXED_400K 2 ++#define GK7205V300_FIXED_3M 3 ++#define GK7205V300_FIXED_6M 4 ++#define GK7205V300_FIXED_12M 5 ++#define GK7205V300_FIXED_24M 6 ++#define GK7205V300_FIXED_25M 7 ++#define GK7205V300_FIXED_50M 8 ++#define GK7205V300_FIXED_83P3M 9 ++#define GK7205V300_FIXED_90M 10 ++#define GK7205V300_FIXED_100M 11 ++#define GK7205V300_FIXED_112M 12 ++#define GK7205V300_FIXED_125M 13 ++#define GK7205V300_FIXED_148P5M 14 ++#define GK7205V300_FIXED_150M 15 ++#define GK7205V300_FIXED_200M 16 ++#define GK7205V300_FIXED_250M 17 ++#define GK7205V300_FIXED_300M 18 ++#define GK7205V300_FIXED_324M 19 ++#define GK7205V300_FIXED_342M 20 ++#define GK7205V300_FIXED_375M 21 ++#define GK7205V300_FIXED_400M 22 ++#define GK7205V300_FIXED_448M 23 ++#define GK7205V300_FIXED_500M 24 ++#define GK7205V300_FIXED_540M 25 ++#define GK7205V300_FIXED_600M 26 ++#define GK7205V300_FIXED_750M 27 ++#define GK7205V300_FIXED_1000M 28 ++#define GK7205V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V300_SYSAXI_CLK 30 ++#define GK7205V300_SYSAPB_CLK 31 ++#define GK7205V300_FMC_MUX 32 ++#define GK7205V300_UART_MUX 33 ++#define GK7205V300_MMC0_MUX 34 ++#define GK7205V300_MMC1_MUX 35 ++#define GK7205V300_MMC2_MUX 36 ++#define GK7205V300_ETH_MUX 37 ++#define GK7205V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V300_UART0_CLK 40 ++#define GK7205V300_UART1_CLK 41 ++#define GK7205V300_UART2_CLK 42 ++#define GK7205V300_FMC_CLK 43 ++#define GK7205V300_ETH0_CLK 44 ++#define GK7205V300_EDMAC_AXICLK 45 ++#define GK7205V300_EDMAC_CLK 46 ++#define GK7205V300_SPI0_CLK 48 ++#define GK7205V300_SPI1_CLK 49 ++#define GK7205V300_MMC0_CLK 50 ++#define GK7205V300_MMC1_CLK 51 ++#define GK7205V300_MMC2_CLK 52 ++#define GK7205V300_I2C0_CLK 53 ++#define GK7205V300_I2C1_CLK 54 ++#define GK7205V300_I2C2_CLK 55 ++#define GK7205V300_USB2_BUS_CLK 81 ++#define GK7205V300_USB2_REF_CLK 82 ++#define GK7205V300_USB2_UTMI_CLK 83 ++#define GK7205V300_USB2_PHY_APB_CLK 84 ++#define GK7205V300_USB2_PHY_PLL_CLK 85 ++#define GK7205V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V300_NR_CLKS 256 ++#define GK7205V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch new file mode 100644 index 00000000..db47ab1d --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-metag-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/metag/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/metag/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7605V100_CLOCK_H ++#define __DTS_GK7605V100_CLOCK_H ++ ++/* clk in GK7605V100 CRG */ ++/* fixed rate clocks */ ++#define GK7605V100_FIXED_100K 1 ++#define GK7605V100_FIXED_400K 2 ++#define GK7605V100_FIXED_3M 3 ++#define GK7605V100_FIXED_6M 4 ++#define GK7605V100_FIXED_12M 5 ++#define GK7605V100_FIXED_24M 6 ++#define GK7605V100_FIXED_25M 7 ++#define GK7605V100_FIXED_50M 8 ++#define GK7605V100_FIXED_83P3M 9 ++#define GK7605V100_FIXED_90M 10 ++#define GK7605V100_FIXED_100M 11 ++#define GK7605V100_FIXED_112M 12 ++#define GK7605V100_FIXED_125M 13 ++#define GK7605V100_FIXED_148P5M 14 ++#define GK7605V100_FIXED_150M 15 ++#define GK7605V100_FIXED_200M 16 ++#define GK7605V100_FIXED_250M 17 ++#define GK7605V100_FIXED_300M 18 ++#define GK7605V100_FIXED_324M 19 ++#define GK7605V100_FIXED_342M 20 ++#define GK7605V100_FIXED_375M 21 ++#define GK7605V100_FIXED_400M 22 ++#define GK7605V100_FIXED_448M 23 ++#define GK7605V100_FIXED_500M 24 ++#define GK7605V100_FIXED_540M 25 ++#define GK7605V100_FIXED_600M 26 ++#define GK7605V100_FIXED_750M 27 ++#define GK7605V100_FIXED_1000M 28 ++#define GK7605V100_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7605V100_SYSAXI_CLK 30 ++#define GK7605V100_SYSAPB_CLK 31 ++#define GK7605V100_FMC_MUX 32 ++#define GK7605V100_UART_MUX 33 ++#define GK7605V100_MMC0_MUX 34 ++#define GK7605V100_MMC1_MUX 35 ++#define GK7605V100_MMC2_MUX 36 ++#define GK7605V100_ETH_MUX 37 ++#define GK7605V100_USB2_MUX 80 ++/* gate clocks */ ++#define GK7605V100_UART0_CLK 40 ++#define GK7605V100_UART1_CLK 41 ++#define GK7605V100_UART2_CLK 42 ++#define GK7605V100_FMC_CLK 43 ++#define GK7605V100_ETH0_CLK 44 ++#define GK7605V100_EDMAC_AXICLK 45 ++#define GK7605V100_EDMAC_CLK 46 ++#define GK7605V100_SPI0_CLK 48 ++#define GK7605V100_SPI1_CLK 49 ++#define GK7605V100_MMC0_CLK 50 ++#define GK7605V100_MMC1_CLK 51 ++#define GK7605V100_MMC2_CLK 52 ++#define GK7605V100_I2C0_CLK 53 ++#define GK7605V100_I2C1_CLK 54 ++#define GK7605V100_I2C2_CLK 55 ++#define GK7605V100_USB2_BUS_CLK 81 ++#define GK7605V100_USB2_REF_CLK 82 ++#define GK7605V100_USB2_UTMI_CLK 83 ++#define GK7605V100_USB2_PHY_APB_CLK 84 ++#define GK7605V100_USB2_PHY_PLL_CLK 85 ++#define GK7605V100_USB2_PHY_XO_CLK 86 ++ ++#define GK7605V100_NR_CLKS 256 ++#define GK7605V100_NR_RSTS 256 ++ ++#endif /* __DTS_GK7605V100_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch new file mode 100644 index 00000000..03d1ecce --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/mips/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/mips/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7202V300_CLOCK_H ++#define __DTS_GK7202V300_CLOCK_H ++ ++/* clk in GK7202V300 CRG */ ++/* fixed rate clocks */ ++#define GK7202V300_FIXED_100K 1 ++#define GK7202V300_FIXED_400K 2 ++#define GK7202V300_FIXED_3M 3 ++#define GK7202V300_FIXED_6M 4 ++#define GK7202V300_FIXED_12M 5 ++#define GK7202V300_FIXED_24M 6 ++#define GK7202V300_FIXED_25M 7 ++#define GK7202V300_FIXED_50M 8 ++#define GK7202V300_FIXED_83P3M 9 ++#define GK7202V300_FIXED_90M 10 ++#define GK7202V300_FIXED_100M 11 ++#define GK7202V300_FIXED_112M 12 ++#define GK7202V300_FIXED_125M 13 ++#define GK7202V300_FIXED_148P5M 14 ++#define GK7202V300_FIXED_150M 15 ++#define GK7202V300_FIXED_200M 16 ++#define GK7202V300_FIXED_250M 17 ++#define GK7202V300_FIXED_300M 18 ++#define GK7202V300_FIXED_324M 19 ++#define GK7202V300_FIXED_342M 20 ++#define GK7202V300_FIXED_375M 21 ++#define GK7202V300_FIXED_400M 22 ++#define GK7202V300_FIXED_448M 23 ++#define GK7202V300_FIXED_500M 24 ++#define GK7202V300_FIXED_540M 25 ++#define GK7202V300_FIXED_600M 26 ++#define GK7202V300_FIXED_750M 27 ++#define GK7202V300_FIXED_1000M 28 ++#define GK7202V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7202V300_SYSAXI_CLK 30 ++#define GK7202V300_SYSAPB_CLK 31 ++#define GK7202V300_FMC_MUX 32 ++#define GK7202V300_UART_MUX 33 ++#define GK7202V300_MMC0_MUX 34 ++#define GK7202V300_MMC1_MUX 35 ++#define GK7202V300_MMC2_MUX 36 ++#define GK7202V300_ETH_MUX 37 ++#define GK7202V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7202V300_UART0_CLK 40 ++#define GK7202V300_UART1_CLK 41 ++#define GK7202V300_UART2_CLK 42 ++#define GK7202V300_FMC_CLK 43 ++#define GK7202V300_ETH0_CLK 44 ++#define GK7202V300_EDMAC_AXICLK 45 ++#define GK7202V300_EDMAC_CLK 46 ++#define GK7202V300_SPI0_CLK 48 ++#define GK7202V300_SPI1_CLK 49 ++#define GK7202V300_MMC0_CLK 50 ++#define GK7202V300_MMC1_CLK 51 ++#define GK7202V300_MMC2_CLK 52 ++#define GK7202V300_I2C0_CLK 53 ++#define GK7202V300_I2C1_CLK 54 ++#define GK7202V300_I2C2_CLK 55 ++#define GK7202V300_USB2_BUS_CLK 81 ++#define GK7202V300_USB2_REF_CLK 82 ++#define GK7202V300_USB2_UTMI_CLK 83 ++#define GK7202V300_USB2_PHY_APB_CLK 84 ++#define GK7202V300_USB2_PHY_PLL_CLK 85 ++#define GK7202V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7202V300_NR_CLKS 256 ++#define GK7202V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7202V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch new file mode 100644 index 00000000..e3133fd2 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/mips/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/mips/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V200_CLOCK_H ++#define __DTS_GK7205V200_CLOCK_H ++ ++/* clk in GK7205V200 CRG */ ++/* fixed rate clocks */ ++#define GK7205V200_FIXED_100K 1 ++#define GK7205V200_FIXED_400K 2 ++#define GK7205V200_FIXED_3M 3 ++#define GK7205V200_FIXED_6M 4 ++#define GK7205V200_FIXED_12M 5 ++#define GK7205V200_FIXED_24M 6 ++#define GK7205V200_FIXED_25M 7 ++#define GK7205V200_FIXED_50M 8 ++#define GK7205V200_FIXED_83P3M 9 ++#define GK7205V200_FIXED_90M 10 ++#define GK7205V200_FIXED_100M 11 ++#define GK7205V200_FIXED_112M 12 ++#define GK7205V200_FIXED_125M 13 ++#define GK7205V200_FIXED_148P5M 14 ++#define GK7205V200_FIXED_150M 15 ++#define GK7205V200_FIXED_200M 16 ++#define GK7205V200_FIXED_250M 17 ++#define GK7205V200_FIXED_300M 18 ++#define GK7205V200_FIXED_324M 19 ++#define GK7205V200_FIXED_342M 20 ++#define GK7205V200_FIXED_375M 21 ++#define GK7205V200_FIXED_400M 22 ++#define GK7205V200_FIXED_448M 23 ++#define GK7205V200_FIXED_500M 24 ++#define GK7205V200_FIXED_540M 25 ++#define GK7205V200_FIXED_600M 26 ++#define GK7205V200_FIXED_750M 27 ++#define GK7205V200_FIXED_1000M 28 ++#define GK7205V200_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V200_SYSAXI_CLK 30 ++#define GK7205V200_SYSAPB_CLK 31 ++#define GK7205V200_FMC_MUX 32 ++#define GK7205V200_UART_MUX 33 ++#define GK7205V200_MMC0_MUX 34 ++#define GK7205V200_MMC1_MUX 35 ++#define GK7205V200_MMC2_MUX 36 ++#define GK7205V200_ETH_MUX 37 ++#define GK7205V200_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V200_UART0_CLK 40 ++#define GK7205V200_UART1_CLK 41 ++#define GK7205V200_UART2_CLK 42 ++#define GK7205V200_FMC_CLK 43 ++#define GK7205V200_ETH0_CLK 44 ++#define GK7205V200_EDMAC_AXICLK 45 ++#define GK7205V200_EDMAC_CLK 46 ++#define GK7205V200_SPI0_CLK 48 ++#define GK7205V200_SPI1_CLK 49 ++#define GK7205V200_MMC0_CLK 50 ++#define GK7205V200_MMC1_CLK 51 ++#define GK7205V200_MMC2_CLK 52 ++#define GK7205V200_I2C0_CLK 53 ++#define GK7205V200_I2C1_CLK 54 ++#define GK7205V200_I2C2_CLK 55 ++#define GK7205V200_USB2_BUS_CLK 81 ++#define GK7205V200_USB2_REF_CLK 82 ++#define GK7205V200_USB2_UTMI_CLK 83 ++#define GK7205V200_USB2_PHY_APB_CLK 84 ++#define GK7205V200_USB2_PHY_PLL_CLK 85 ++#define GK7205V200_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V200_NR_CLKS 256 ++#define GK7205V200_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V200_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch new file mode 100644 index 00000000..dd258f29 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/mips/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/mips/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V300_CLOCK_H ++#define __DTS_GK7205V300_CLOCK_H ++ ++/* clk in GK7205V300 CRG */ ++/* fixed rate clocks */ ++#define GK7205V300_FIXED_100K 1 ++#define GK7205V300_FIXED_400K 2 ++#define GK7205V300_FIXED_3M 3 ++#define GK7205V300_FIXED_6M 4 ++#define GK7205V300_FIXED_12M 5 ++#define GK7205V300_FIXED_24M 6 ++#define GK7205V300_FIXED_25M 7 ++#define GK7205V300_FIXED_50M 8 ++#define GK7205V300_FIXED_83P3M 9 ++#define GK7205V300_FIXED_90M 10 ++#define GK7205V300_FIXED_100M 11 ++#define GK7205V300_FIXED_112M 12 ++#define GK7205V300_FIXED_125M 13 ++#define GK7205V300_FIXED_148P5M 14 ++#define GK7205V300_FIXED_150M 15 ++#define GK7205V300_FIXED_200M 16 ++#define GK7205V300_FIXED_250M 17 ++#define GK7205V300_FIXED_300M 18 ++#define GK7205V300_FIXED_324M 19 ++#define GK7205V300_FIXED_342M 20 ++#define GK7205V300_FIXED_375M 21 ++#define GK7205V300_FIXED_400M 22 ++#define GK7205V300_FIXED_448M 23 ++#define GK7205V300_FIXED_500M 24 ++#define GK7205V300_FIXED_540M 25 ++#define GK7205V300_FIXED_600M 26 ++#define GK7205V300_FIXED_750M 27 ++#define GK7205V300_FIXED_1000M 28 ++#define GK7205V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V300_SYSAXI_CLK 30 ++#define GK7205V300_SYSAPB_CLK 31 ++#define GK7205V300_FMC_MUX 32 ++#define GK7205V300_UART_MUX 33 ++#define GK7205V300_MMC0_MUX 34 ++#define GK7205V300_MMC1_MUX 35 ++#define GK7205V300_MMC2_MUX 36 ++#define GK7205V300_ETH_MUX 37 ++#define GK7205V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V300_UART0_CLK 40 ++#define GK7205V300_UART1_CLK 41 ++#define GK7205V300_UART2_CLK 42 ++#define GK7205V300_FMC_CLK 43 ++#define GK7205V300_ETH0_CLK 44 ++#define GK7205V300_EDMAC_AXICLK 45 ++#define GK7205V300_EDMAC_CLK 46 ++#define GK7205V300_SPI0_CLK 48 ++#define GK7205V300_SPI1_CLK 49 ++#define GK7205V300_MMC0_CLK 50 ++#define GK7205V300_MMC1_CLK 51 ++#define GK7205V300_MMC2_CLK 52 ++#define GK7205V300_I2C0_CLK 53 ++#define GK7205V300_I2C1_CLK 54 ++#define GK7205V300_I2C2_CLK 55 ++#define GK7205V300_USB2_BUS_CLK 81 ++#define GK7205V300_USB2_REF_CLK 82 ++#define GK7205V300_USB2_UTMI_CLK 83 ++#define GK7205V300_USB2_PHY_APB_CLK 84 ++#define GK7205V300_USB2_PHY_PLL_CLK 85 ++#define GK7205V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V300_NR_CLKS 256 ++#define GK7205V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch new file mode 100644 index 00000000..0459c7c3 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-mips-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/mips/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/mips/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7605V100_CLOCK_H ++#define __DTS_GK7605V100_CLOCK_H ++ ++/* clk in GK7605V100 CRG */ ++/* fixed rate clocks */ ++#define GK7605V100_FIXED_100K 1 ++#define GK7605V100_FIXED_400K 2 ++#define GK7605V100_FIXED_3M 3 ++#define GK7605V100_FIXED_6M 4 ++#define GK7605V100_FIXED_12M 5 ++#define GK7605V100_FIXED_24M 6 ++#define GK7605V100_FIXED_25M 7 ++#define GK7605V100_FIXED_50M 8 ++#define GK7605V100_FIXED_83P3M 9 ++#define GK7605V100_FIXED_90M 10 ++#define GK7605V100_FIXED_100M 11 ++#define GK7605V100_FIXED_112M 12 ++#define GK7605V100_FIXED_125M 13 ++#define GK7605V100_FIXED_148P5M 14 ++#define GK7605V100_FIXED_150M 15 ++#define GK7605V100_FIXED_200M 16 ++#define GK7605V100_FIXED_250M 17 ++#define GK7605V100_FIXED_300M 18 ++#define GK7605V100_FIXED_324M 19 ++#define GK7605V100_FIXED_342M 20 ++#define GK7605V100_FIXED_375M 21 ++#define GK7605V100_FIXED_400M 22 ++#define GK7605V100_FIXED_448M 23 ++#define GK7605V100_FIXED_500M 24 ++#define GK7605V100_FIXED_540M 25 ++#define GK7605V100_FIXED_600M 26 ++#define GK7605V100_FIXED_750M 27 ++#define GK7605V100_FIXED_1000M 28 ++#define GK7605V100_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7605V100_SYSAXI_CLK 30 ++#define GK7605V100_SYSAPB_CLK 31 ++#define GK7605V100_FMC_MUX 32 ++#define GK7605V100_UART_MUX 33 ++#define GK7605V100_MMC0_MUX 34 ++#define GK7605V100_MMC1_MUX 35 ++#define GK7605V100_MMC2_MUX 36 ++#define GK7605V100_ETH_MUX 37 ++#define GK7605V100_USB2_MUX 80 ++/* gate clocks */ ++#define GK7605V100_UART0_CLK 40 ++#define GK7605V100_UART1_CLK 41 ++#define GK7605V100_UART2_CLK 42 ++#define GK7605V100_FMC_CLK 43 ++#define GK7605V100_ETH0_CLK 44 ++#define GK7605V100_EDMAC_AXICLK 45 ++#define GK7605V100_EDMAC_CLK 46 ++#define GK7605V100_SPI0_CLK 48 ++#define GK7605V100_SPI1_CLK 49 ++#define GK7605V100_MMC0_CLK 50 ++#define GK7605V100_MMC1_CLK 51 ++#define GK7605V100_MMC2_CLK 52 ++#define GK7605V100_I2C0_CLK 53 ++#define GK7605V100_I2C1_CLK 54 ++#define GK7605V100_I2C2_CLK 55 ++#define GK7605V100_USB2_BUS_CLK 81 ++#define GK7605V100_USB2_REF_CLK 82 ++#define GK7605V100_USB2_UTMI_CLK 83 ++#define GK7605V100_USB2_PHY_APB_CLK 84 ++#define GK7605V100_USB2_PHY_PLL_CLK 85 ++#define GK7605V100_USB2_PHY_XO_CLK 86 ++ ++#define GK7605V100_NR_CLKS 256 ++#define GK7605V100_NR_RSTS 256 ++ ++#endif /* __DTS_GK7605V100_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch new file mode 100644 index 00000000..967141b1 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7202v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7202v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7202V300_CLOCK_H ++#define __DTS_GK7202V300_CLOCK_H ++ ++/* clk in GK7202V300 CRG */ ++/* fixed rate clocks */ ++#define GK7202V300_FIXED_100K 1 ++#define GK7202V300_FIXED_400K 2 ++#define GK7202V300_FIXED_3M 3 ++#define GK7202V300_FIXED_6M 4 ++#define GK7202V300_FIXED_12M 5 ++#define GK7202V300_FIXED_24M 6 ++#define GK7202V300_FIXED_25M 7 ++#define GK7202V300_FIXED_50M 8 ++#define GK7202V300_FIXED_83P3M 9 ++#define GK7202V300_FIXED_90M 10 ++#define GK7202V300_FIXED_100M 11 ++#define GK7202V300_FIXED_112M 12 ++#define GK7202V300_FIXED_125M 13 ++#define GK7202V300_FIXED_148P5M 14 ++#define GK7202V300_FIXED_150M 15 ++#define GK7202V300_FIXED_200M 16 ++#define GK7202V300_FIXED_250M 17 ++#define GK7202V300_FIXED_300M 18 ++#define GK7202V300_FIXED_324M 19 ++#define GK7202V300_FIXED_342M 20 ++#define GK7202V300_FIXED_375M 21 ++#define GK7202V300_FIXED_400M 22 ++#define GK7202V300_FIXED_448M 23 ++#define GK7202V300_FIXED_500M 24 ++#define GK7202V300_FIXED_540M 25 ++#define GK7202V300_FIXED_600M 26 ++#define GK7202V300_FIXED_750M 27 ++#define GK7202V300_FIXED_1000M 28 ++#define GK7202V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7202V300_SYSAXI_CLK 30 ++#define GK7202V300_SYSAPB_CLK 31 ++#define GK7202V300_FMC_MUX 32 ++#define GK7202V300_UART_MUX 33 ++#define GK7202V300_MMC0_MUX 34 ++#define GK7202V300_MMC1_MUX 35 ++#define GK7202V300_MMC2_MUX 36 ++#define GK7202V300_ETH_MUX 37 ++#define GK7202V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7202V300_UART0_CLK 40 ++#define GK7202V300_UART1_CLK 41 ++#define GK7202V300_UART2_CLK 42 ++#define GK7202V300_FMC_CLK 43 ++#define GK7202V300_ETH0_CLK 44 ++#define GK7202V300_EDMAC_AXICLK 45 ++#define GK7202V300_EDMAC_CLK 46 ++#define GK7202V300_SPI0_CLK 48 ++#define GK7202V300_SPI1_CLK 49 ++#define GK7202V300_MMC0_CLK 50 ++#define GK7202V300_MMC1_CLK 51 ++#define GK7202V300_MMC2_CLK 52 ++#define GK7202V300_I2C0_CLK 53 ++#define GK7202V300_I2C1_CLK 54 ++#define GK7202V300_I2C2_CLK 55 ++#define GK7202V300_USB2_BUS_CLK 81 ++#define GK7202V300_USB2_REF_CLK 82 ++#define GK7202V300_USB2_UTMI_CLK 83 ++#define GK7202V300_USB2_PHY_APB_CLK 84 ++#define GK7202V300_USB2_PHY_PLL_CLK 85 ++#define GK7202V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7202V300_NR_CLKS 256 ++#define GK7202V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7202V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch new file mode 100644 index 00000000..15151622 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v200-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7205v200-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V200_CLOCK_H ++#define __DTS_GK7205V200_CLOCK_H ++ ++/* clk in GK7205V200 CRG */ ++/* fixed rate clocks */ ++#define GK7205V200_FIXED_100K 1 ++#define GK7205V200_FIXED_400K 2 ++#define GK7205V200_FIXED_3M 3 ++#define GK7205V200_FIXED_6M 4 ++#define GK7205V200_FIXED_12M 5 ++#define GK7205V200_FIXED_24M 6 ++#define GK7205V200_FIXED_25M 7 ++#define GK7205V200_FIXED_50M 8 ++#define GK7205V200_FIXED_83P3M 9 ++#define GK7205V200_FIXED_90M 10 ++#define GK7205V200_FIXED_100M 11 ++#define GK7205V200_FIXED_112M 12 ++#define GK7205V200_FIXED_125M 13 ++#define GK7205V200_FIXED_148P5M 14 ++#define GK7205V200_FIXED_150M 15 ++#define GK7205V200_FIXED_200M 16 ++#define GK7205V200_FIXED_250M 17 ++#define GK7205V200_FIXED_300M 18 ++#define GK7205V200_FIXED_324M 19 ++#define GK7205V200_FIXED_342M 20 ++#define GK7205V200_FIXED_375M 21 ++#define GK7205V200_FIXED_400M 22 ++#define GK7205V200_FIXED_448M 23 ++#define GK7205V200_FIXED_500M 24 ++#define GK7205V200_FIXED_540M 25 ++#define GK7205V200_FIXED_600M 26 ++#define GK7205V200_FIXED_750M 27 ++#define GK7205V200_FIXED_1000M 28 ++#define GK7205V200_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V200_SYSAXI_CLK 30 ++#define GK7205V200_SYSAPB_CLK 31 ++#define GK7205V200_FMC_MUX 32 ++#define GK7205V200_UART_MUX 33 ++#define GK7205V200_MMC0_MUX 34 ++#define GK7205V200_MMC1_MUX 35 ++#define GK7205V200_MMC2_MUX 36 ++#define GK7205V200_ETH_MUX 37 ++#define GK7205V200_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V200_UART0_CLK 40 ++#define GK7205V200_UART1_CLK 41 ++#define GK7205V200_UART2_CLK 42 ++#define GK7205V200_FMC_CLK 43 ++#define GK7205V200_ETH0_CLK 44 ++#define GK7205V200_EDMAC_AXICLK 45 ++#define GK7205V200_EDMAC_CLK 46 ++#define GK7205V200_SPI0_CLK 48 ++#define GK7205V200_SPI1_CLK 49 ++#define GK7205V200_MMC0_CLK 50 ++#define GK7205V200_MMC1_CLK 51 ++#define GK7205V200_MMC2_CLK 52 ++#define GK7205V200_I2C0_CLK 53 ++#define GK7205V200_I2C1_CLK 54 ++#define GK7205V200_I2C2_CLK 55 ++#define GK7205V200_USB2_BUS_CLK 81 ++#define GK7205V200_USB2_REF_CLK 82 ++#define GK7205V200_USB2_UTMI_CLK 83 ++#define GK7205V200_USB2_PHY_APB_CLK 84 ++#define GK7205V200_USB2_PHY_PLL_CLK 85 ++#define GK7205V200_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V200_NR_CLKS 256 ++#define GK7205V200_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V200_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch new file mode 100644 index 00000000..ba23c157 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7205v300-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7205v300-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7205V300_CLOCK_H ++#define __DTS_GK7205V300_CLOCK_H ++ ++/* clk in GK7205V300 CRG */ ++/* fixed rate clocks */ ++#define GK7205V300_FIXED_100K 1 ++#define GK7205V300_FIXED_400K 2 ++#define GK7205V300_FIXED_3M 3 ++#define GK7205V300_FIXED_6M 4 ++#define GK7205V300_FIXED_12M 5 ++#define GK7205V300_FIXED_24M 6 ++#define GK7205V300_FIXED_25M 7 ++#define GK7205V300_FIXED_50M 8 ++#define GK7205V300_FIXED_83P3M 9 ++#define GK7205V300_FIXED_90M 10 ++#define GK7205V300_FIXED_100M 11 ++#define GK7205V300_FIXED_112M 12 ++#define GK7205V300_FIXED_125M 13 ++#define GK7205V300_FIXED_148P5M 14 ++#define GK7205V300_FIXED_150M 15 ++#define GK7205V300_FIXED_200M 16 ++#define GK7205V300_FIXED_250M 17 ++#define GK7205V300_FIXED_300M 18 ++#define GK7205V300_FIXED_324M 19 ++#define GK7205V300_FIXED_342M 20 ++#define GK7205V300_FIXED_375M 21 ++#define GK7205V300_FIXED_400M 22 ++#define GK7205V300_FIXED_448M 23 ++#define GK7205V300_FIXED_500M 24 ++#define GK7205V300_FIXED_540M 25 ++#define GK7205V300_FIXED_600M 26 ++#define GK7205V300_FIXED_750M 27 ++#define GK7205V300_FIXED_1000M 28 ++#define GK7205V300_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7205V300_SYSAXI_CLK 30 ++#define GK7205V300_SYSAPB_CLK 31 ++#define GK7205V300_FMC_MUX 32 ++#define GK7205V300_UART_MUX 33 ++#define GK7205V300_MMC0_MUX 34 ++#define GK7205V300_MMC1_MUX 35 ++#define GK7205V300_MMC2_MUX 36 ++#define GK7205V300_ETH_MUX 37 ++#define GK7205V300_USB2_MUX 80 ++/* gate clocks */ ++#define GK7205V300_UART0_CLK 40 ++#define GK7205V300_UART1_CLK 41 ++#define GK7205V300_UART2_CLK 42 ++#define GK7205V300_FMC_CLK 43 ++#define GK7205V300_ETH0_CLK 44 ++#define GK7205V300_EDMAC_AXICLK 45 ++#define GK7205V300_EDMAC_CLK 46 ++#define GK7205V300_SPI0_CLK 48 ++#define GK7205V300_SPI1_CLK 49 ++#define GK7205V300_MMC0_CLK 50 ++#define GK7205V300_MMC1_CLK 51 ++#define GK7205V300_MMC2_CLK 52 ++#define GK7205V300_I2C0_CLK 53 ++#define GK7205V300_I2C1_CLK 54 ++#define GK7205V300_I2C2_CLK 55 ++#define GK7205V300_USB2_BUS_CLK 81 ++#define GK7205V300_USB2_REF_CLK 82 ++#define GK7205V300_USB2_UTMI_CLK 83 ++#define GK7205V300_USB2_PHY_APB_CLK 84 ++#define GK7205V300_USB2_PHY_PLL_CLK 85 ++#define GK7205V300_USB2_PHY_XO_CLK 86 ++ ++#define GK7205V300_NR_CLKS 256 ++#define GK7205V300_NR_RSTS 256 ++ ++#endif /* __DTS_GK7205V300_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch new file mode 100644 index 00000000..10221d99 --- /dev/null +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_arch-powerpc-boot-dts-include-dt-bindings-clock-gk7605v100-clock.h.patch @@ -0,0 +1,79 @@ +--- linux-4.9.37/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 1970-01-01 03:00:00.000000000 +0300 ++++ linux-4.9.y/arch/powerpc/boot/dts/include/dt-bindings/clock/gk7605v100-clock.h 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. ++ */ ++ ++#ifndef __DTS_GK7605V100_CLOCK_H ++#define __DTS_GK7605V100_CLOCK_H ++ ++/* clk in GK7605V100 CRG */ ++/* fixed rate clocks */ ++#define GK7605V100_FIXED_100K 1 ++#define GK7605V100_FIXED_400K 2 ++#define GK7605V100_FIXED_3M 3 ++#define GK7605V100_FIXED_6M 4 ++#define GK7605V100_FIXED_12M 5 ++#define GK7605V100_FIXED_24M 6 ++#define GK7605V100_FIXED_25M 7 ++#define GK7605V100_FIXED_50M 8 ++#define GK7605V100_FIXED_83P3M 9 ++#define GK7605V100_FIXED_90M 10 ++#define GK7605V100_FIXED_100M 11 ++#define GK7605V100_FIXED_112M 12 ++#define GK7605V100_FIXED_125M 13 ++#define GK7605V100_FIXED_148P5M 14 ++#define GK7605V100_FIXED_150M 15 ++#define GK7605V100_FIXED_200M 16 ++#define GK7605V100_FIXED_250M 17 ++#define GK7605V100_FIXED_300M 18 ++#define GK7605V100_FIXED_324M 19 ++#define GK7605V100_FIXED_342M 20 ++#define GK7605V100_FIXED_375M 21 ++#define GK7605V100_FIXED_400M 22 ++#define GK7605V100_FIXED_448M 23 ++#define GK7605V100_FIXED_500M 24 ++#define GK7605V100_FIXED_540M 25 ++#define GK7605V100_FIXED_600M 26 ++#define GK7605V100_FIXED_750M 27 ++#define GK7605V100_FIXED_1000M 28 ++#define GK7605V100_FIXED_1500M 29 ++ ++/* mux clocks */ ++#define GK7605V100_SYSAXI_CLK 30 ++#define GK7605V100_SYSAPB_CLK 31 ++#define GK7605V100_FMC_MUX 32 ++#define GK7605V100_UART_MUX 33 ++#define GK7605V100_MMC0_MUX 34 ++#define GK7605V100_MMC1_MUX 35 ++#define GK7605V100_MMC2_MUX 36 ++#define GK7605V100_ETH_MUX 37 ++#define GK7605V100_USB2_MUX 80 ++/* gate clocks */ ++#define GK7605V100_UART0_CLK 40 ++#define GK7605V100_UART1_CLK 41 ++#define GK7605V100_UART2_CLK 42 ++#define GK7605V100_FMC_CLK 43 ++#define GK7605V100_ETH0_CLK 44 ++#define GK7605V100_EDMAC_AXICLK 45 ++#define GK7605V100_EDMAC_CLK 46 ++#define GK7605V100_SPI0_CLK 48 ++#define GK7605V100_SPI1_CLK 49 ++#define GK7605V100_MMC0_CLK 50 ++#define GK7605V100_MMC1_CLK 51 ++#define GK7605V100_MMC2_CLK 52 ++#define GK7605V100_I2C0_CLK 53 ++#define GK7605V100_I2C1_CLK 54 ++#define GK7605V100_I2C2_CLK 55 ++#define GK7605V100_USB2_BUS_CLK 81 ++#define GK7605V100_USB2_REF_CLK 82 ++#define GK7605V100_USB2_UTMI_CLK 83 ++#define GK7605V100_USB2_PHY_APB_CLK 84 ++#define GK7605V100_USB2_PHY_PLL_CLK 85 ++#define GK7605V100_USB2_PHY_XO_CLK 86 ++ ++#define GK7605V100_NR_CLKS 256 ++#define GK7605V100_NR_RSTS 256 ++ ++#endif /* __DTS_GK7605V100_CLOCK_H */ diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-clk-goke-Kconfig.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-clk-goke-Kconfig.patch index f5965adf..0234cea8 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-clk-goke-Kconfig.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-clk-goke-Kconfig.patch @@ -35,7 +35,7 @@ + +config RESET_GOKE + bool "Goke Reset Controller Driver" -+ depends on ARCH_GOKE || COMPILE_TEST || ARCH_GOKE ++ depends on ARCH_GOKE || COMPILE_TEST + select RESET_CONTROLLER + help + Build reset controller driver for Goke device chipsets. diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7202v300.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7202v300.c.patch index 58649069..f2dfaa36 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7202v300.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7202v300.c.patch @@ -408,11 +408,11 @@ + void *iocfg_regmap = bsp_priv->iocfg_regmap; + int i; + -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 1, 0x3); /* set drv level 3 */ -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x6); /* set drv level 6 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 0, 0x3); /* 0x3 set drv level 5 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x2); /* 0x2 set drv level 2 */ + for (i = 0; i < IO_CFG_SDIO1_DATA_LINE_COUNT; i++) + bsp_set_drv_str(iocfg_regmap, -+ io_sdio1_data_reg[i], 1, 0, 0, 0x6); /* set drv level 6 */ ++ io_sdio1_data_reg[i], 1, 0, 0, 0x2); /* 0x2 set drv level 2 */ +} + +static void bsp_set_io_config(struct sdhci_host *host) diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v200.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v200.c.patch index 9556c4a6..6264656c 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v200.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v200.c.patch @@ -408,11 +408,11 @@ + void *iocfg_regmap = bsp_priv->iocfg_regmap; + int i; + -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 1, 0x4); /* set drv level 4 */ -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x7); /* set drv level 7 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 0, 0x3); /* 0x3 set drv level 5 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x2); /* 0x2 set drv level 2 */ + for (i = 0; i < IO_CFG_SDIO1_DATA_LINE_COUNT; i++) + bsp_set_drv_str(iocfg_regmap, -+ io_sdio1_data_reg[i], 1, 0, 0, 0x7); /* set drv level 7 */ ++ io_sdio1_data_reg[i], 1, 0, 0, 0x2); /* 0x2 set drv level 2 */ +} + +static void bsp_set_io_config(struct sdhci_host *host) diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v300.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v300.c.patch index 193ab8f6..741f8e69 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v300.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7205v300.c.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/drivers/mmc/host/sdhci-gk7205v300.c 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/drivers/mmc/host/sdhci-gk7205v300.c 2021-06-07 13:01:33.000000000 +0300 -@@ -0,0 +1,508 @@ +@@ -0,0 +1,510 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -421,11 +421,13 @@ + void *iocfg_regmap = bsp_priv->iocfg_regmap; + int i; + -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 1, 0x5); /* set drv level 5 */ -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x7); /* set drv level 7 */ -+ for (i = 0; i < IO_CFG_SDIO1_DATA_LINE_COUNT; i++) -+ bsp_set_drv_str(iocfg_regmap, -+ io_sdio1_data_reg[i], 1, 0, 0, 0x7); /* set drv level 7 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 0, 0x3); /* 0x3 set drv level 5 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ ++ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[0], 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[1], 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[2], 1, 0, 0, 0x2); /* 0x2 set drv level 2 */ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[3], 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ +} + +static void bsp_set_io_config(struct sdhci_host *host) diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7605v100.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7605v100.c.patch index 4b1eaf9b..12fdca88 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7605v100.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mmc-host-sdhci-gk7605v100.c.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/drivers/mmc/host/sdhci-gk7605v100.c 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/drivers/mmc/host/sdhci-gk7605v100.c 2021-06-07 13:01:33.000000000 +0300 -@@ -0,0 +1,508 @@ +@@ -0,0 +1,510 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -421,11 +421,13 @@ + void *iocfg_regmap = bsp_priv->iocfg_regmap; + int i; + -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 1, 0x5); /* set drv level 5 */ -+ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x7); /* set drv level 7 */ -+ for (i = 0; i < IO_CFG_SDIO1_DATA_LINE_COUNT; i++) -+ bsp_set_drv_str(iocfg_regmap, -+ io_sdio1_data_reg[i], 1, 0, 0, 0x7); /* set drv level 7 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CLK, 0, 1, 0, 0x3); /* 0x3 set drv level 5 */ ++ bsp_set_drv_str(iocfg_regmap, REG_CTRL_SDIO1_CMD, 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ ++ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[0], 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[1], 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[2], 1, 0, 0, 0x2); /* 0x2 set drv level 2 */ ++ bsp_set_drv_str(iocfg_regmap, io_sdio1_data_reg[3], 1, 0, 0, 0x6); /* 0x6 set drv level 2 */ +} + +static void bsp_set_io_config(struct sdhci_host *host) diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-Makefile.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-Makefile.patch index 47a89810..700610f9 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-Makefile.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-Makefile.patch @@ -1,25 +1,6 @@ --- linux-4.9.37/drivers/mtd/nand/gkfmc100/Makefile 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/drivers/mtd/nand/gkfmc100/Makefile 2021-06-07 13:01:33.000000000 +0300 -@@ -0,0 +1,26 @@ -+# -+# The Flash Memory Controller v100 Device Driver for goke -+# -+# Copyright (c) 2016-2017 Goke Technologies Co., Ltd. -+# -+# This program is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 2 of the License, or (at your -+# option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program. If not, see . -+# -+# +@@ -0,0 +1,7 @@ + +# +# drivers/mtd/nand/gkfmc100/Makefile diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-fmc_spi_nand_ids.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-fmc_spi_nand_ids.c.patch index 6e5ded9b..bbfb79c8 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-fmc_spi_nand_ids.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-gkfmc100-fmc_spi_nand_ids.c.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/drivers/mtd/nand/gkfmc100/fmc_spi_nand_ids.c 1970-01-01 03:00:00.000000000 +0300 +++ linux-4.9.y/drivers/mtd/nand/gkfmc100/fmc_spi_nand_ids.c 2021-06-07 13:01:33.000000000 +0300 -@@ -0,0 +1,2270 @@ +@@ -0,0 +1,2300 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -590,36 +590,66 @@ + }, + .driver = &spi_driver_general, + }, ++ ++ /* GD 3.3v GD5F1GQ5UEYIGY/GD5F1GQ5UEYIGR 1Gbit */ ++ { ++ .name = "GD5F1GQ5UEYIG", ++ .id = {0xc8, 0x51}, ++ .id_len = 2, ++ .chipsize = _128M, ++ .erasesize = _128K, ++ .pagesize = _2K, ++ .oobsize = 128, ++ .badblock_pos = BBP_FIRST_PAGE, ++ .read = { ++ &READ_STD(1, INFINITE, 24), ++ &READ_FAST(1, INFINITE, 133), ++ &READ_DUAL(1, INFINITE, 133), ++ &READ_QUAD(1, INFINITE, 133), ++ 0 ++ }, ++ .write = { ++ &WRITE_STD(0, 256, 133), ++ &WRITE_QUAD(0, 256, 133), ++ 0 ++ }, ++ .erase = { ++ &ERASE_SECTOR_128K(0, _128K, 133), ++ 0 ++ }, ++ .driver = &spi_driver_general, ++ }, ++ + /* GD 3.3v GD5F2GQ5UEYIG 2Gbit */ + { -+ .name = "GD5F2GQ5UEYIG", -+ .id = {0xc8, 0x52}, -+ .id_len = 2, -+ .chipsize = _256M, -+ .erasesize = _128K, -+ .pagesize = _2K, -+ .oobsize = 128, -+ .badblock_pos = BBP_FIRST_PAGE, -+ .read = { -+ &READ_STD(1, INFINITE, 24), -+ &READ_FAST(1, INFINITE, 104), -+ &READ_DUAL(1, INFINITE, 104), -+ &READ_DUAL_ADDR(2, INFINITE, 104), -+ &READ_QUAD(1, INFINITE, 104), -+ &READ_QUAD_ADDR(4, INFINITE, 104), -+ 0 -+ }, -+ .write = { -+ &WRITE_STD(0, 256, 104), -+ &WRITE_QUAD(0, 256, 120), -+ 0 -+ }, -+ .erase = { -+ &ERASE_SECTOR_128K(0, _128K, 104), -+ 0 -+ }, -+ .driver = &spi_driver_general, -+ }, ++ .name = "GD5F2GQ5UEYIG", ++ .id = {0xc8, 0x52}, ++ .id_len = 2, ++ .chipsize = _256M, ++ .erasesize = _128K, ++ .pagesize = _2K, ++ .oobsize = 128, ++ .badblock_pos = BBP_FIRST_PAGE, ++ .read = { ++ &READ_STD(1, INFINITE, 24), ++ &READ_FAST(1, INFINITE, 104), ++ &READ_DUAL(1, INFINITE, 104), ++ &READ_DUAL_ADDR(2, INFINITE, 104), ++ &READ_QUAD(1, INFINITE, 104), ++ &READ_QUAD_ADDR(4, INFINITE, 104), ++ 0 ++ }, ++ .write = { ++ &WRITE_STD(0, 256, 104), ++ &WRITE_QUAD(0, 256, 120), ++ 0 ++ }, ++ .erase = { ++ &ERASE_SECTOR_128K(0, _128K, 104), ++ 0 ++ }, ++ .driver = &spi_driver_general, ++ }, + + /* GD 3.3v GD5F4GQ4UAYIG 4Gbit */ + { diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-nfc_spl_ids.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-nfc_spl_ids.c.patch index 27cb8198..6b0d6322 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-nfc_spl_ids.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-nand-nfc_spl_ids.c.patch @@ -936,12 +936,12 @@ +} +/*****************************************************************************/ + -+void nfc_show_info(struct mtd_info *mtd, char *goke, char *chipname) ++void nfc_show_info(struct mtd_info *mtd, char *vendor, char *chipname) +{ + /* char buf[20]; */ + struct nand_dev_t *nand_dev = &__nand_dev; + -+ /* nfc_pr_msg("Nand: %s %s ", goke, chipname); */ ++ /* nfc_pr_msg("Nand: %s %s ", vendor, chipname); */ + + if (IS_NAND_RANDOM(nand_dev)) + nfc_pr_msg("Randomizer \n"); diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-spi-nor-spi-nor.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-spi-nor-spi-nor.c.patch index 41730927..0d9d4b4a 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-spi-nor-spi-nor.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-mtd-spi-nor-spi-nor.c.patch @@ -691,7 +691,7 @@ /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, -@@ -859,68 +1323,132 @@ +@@ -859,68 +1323,136 @@ /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) }, @@ -795,6 +795,10 @@ + PARAMS(xmc), CLK_MHZ_2X(104) }, + { "xm25qh128b", INFO(0x206018, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ), + PARAMS(xmc), CLK_MHZ_2X(104) }, ++ { "xm25qh64chiq", INFO(0x204017, 0, 64 * 1024, 128, SPI_NOR_QUAD_READ), ++ PARAMS(xmc), CLK_MHZ_2X(133) }, ++ { "xm25qh128chiq", INFO(0x204018, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ), ++ PARAMS(xmc), CLK_MHZ_2X(133) }, /* PMC */ - { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, @@ -870,7 +874,17 @@ /* SST -- large erase sizes are "overlays", "sectors" are 4K */ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, -@@ -972,43 +1500,101 @@ +@@ -947,6 +1479,9 @@ + { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) }, + { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) }, + ++ { "GM25Q128ASIG", INFO(0x1C4018, 0, 64 * 1024, 256, 0) }, ++ { "NM25Q128EVB", INFO(0x522118, 0, 64 * 1024, 256, 0) }, ++ + { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, 0) }, + { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, 0) }, + { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4, 0) }, +@@ -972,43 +1507,104 @@ { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) }, { "m25px80", INFO(0x207114, 0, 64 * 1024, 16, 0) }, @@ -995,10 +1009,13 @@ + + { "ZB25VQ64A",INFO(0x5e4017, 0, 64 * 1024, 128, + SPI_NOR_QUAD_READ), PARAMS(spansion), CLK_MHZ_2X(104) }, ++ { "ZB25VQ128ASIG",INFO(0x5e4018, 0, 64 * 1024, 256, ++ SPI_NOR_QUAD_READ), PARAMS(spansion), CLK_MHZ_2X(104) }, ++ { }, }; -@@ -1024,6 +1610,11 @@ +@@ -1024,6 +1620,11 @@ return ERR_PTR(tmp); } @@ -1010,7 +1027,7 @@ for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) { info = &spi_nor_ids[tmp]; if (info->id_len) { -@@ -1036,6 +1627,36 @@ +@@ -1036,6 +1637,36 @@ return ERR_PTR(-ENODEV); } @@ -1047,7 +1064,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { -@@ -1167,14 +1788,22 @@ +@@ -1167,14 +1798,22 @@ ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_WRITE); if (ret) return ret; @@ -1070,7 +1087,7 @@ /* the size of data remaining on the first page */ page_remain = min_t(size_t, nor->page_size - page_offset, len - i); -@@ -1211,15 +1840,22 @@ +@@ -1211,15 +1850,22 @@ val = read_sr(nor); if (val < 0) return val; @@ -1095,7 +1112,7 @@ dev_err(nor->dev, "Macronix Quad bit not set\n"); return -EINVAL; } -@@ -1227,6 +1863,41 @@ +@@ -1227,6 +1873,41 @@ return 0; } @@ -1137,7 +1154,7 @@ /* * Write status Register and configuration register with 2 bytes * The first byte will be written to the status register, while the -@@ -1243,29 +1914,168 @@ +@@ -1243,29 +1924,168 @@ static int spansion_quad_enable(struct spi_nor *nor) { @@ -1313,7 +1330,7 @@ return -EINVAL; } -@@ -1277,6 +2087,7 @@ +@@ -1277,6 +2097,7 @@ int status; switch (JEDEC_MFR(info)) { @@ -1321,7 +1338,7 @@ case SNOR_MFR_MACRONIX: status = macronix_quad_enable(nor); if (status) { -@@ -1285,7 +2096,40 @@ +@@ -1285,7 +2106,40 @@ } return status; case SNOR_MFR_MICRON: @@ -1363,7 +1380,7 @@ default: status = spansion_quad_enable(nor); if (status) { -@@ -1307,8 +2151,375 @@ +@@ -1307,8 +2161,375 @@ return 0; } @@ -1740,7 +1757,7 @@ const struct flash_info *info = NULL; struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; -@@ -1320,11 +2531,19 @@ +@@ -1320,11 +2541,19 @@ if (ret) return ret; @@ -1761,7 +1778,7 @@ if (IS_ERR_OR_NULL(info)) return -ENOENT; -@@ -1351,9 +2570,15 @@ +@@ -1351,9 +2580,15 @@ info = jinfo; } } @@ -1777,7 +1794,7 @@ /* * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up * with the software protection bits set -@@ -1367,6 +2592,7 @@ +@@ -1367,6 +2602,7 @@ write_sr(nor, 0); spi_nor_wait_till_ready(nor); } @@ -1785,7 +1802,7 @@ if (!mtd->name) mtd->name = dev_name(dev); -@@ -1380,7 +2606,8 @@ +@@ -1380,7 +2616,8 @@ /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SNOR_MFR_MICRON || @@ -1795,7 +1812,7 @@ nor->flash_lock = stm_lock; nor->flash_unlock = stm_unlock; nor->flash_is_locked = stm_is_locked; -@@ -1428,92 +2655,61 @@ +@@ -1428,92 +2665,61 @@ if (np) { /* If we were instantiated by DT, use it */ if (of_property_read_bool(np, "m25p,fast-read")) @@ -1917,7 +1934,7 @@ dev_dbg(dev, "mtd .name = %s, .size = 0x%llx (%lldMiB), " -@@ -1547,6 +2743,64 @@ +@@ -1547,6 +2753,64 @@ return NULL; } diff --git a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-net-phy-mdio-goke-femac.c.patch b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-net-phy-mdio-goke-femac.c.patch index d588a0cb..51956b2d 100644 --- a/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-net-phy-mdio-goke-femac.c.patch +++ b/br-ext-chip-goke/board/gk7205v200/kernel/patches/00_drivers-net-phy-mdio-goke-femac.c.patch @@ -1,6 +1,6 @@ --- linux-4.9.37/drivers/net/phy/mdio-goke-femac.c 1970-01-01 03:00:00.000000000 +0300 -+++ linux-4.9.y/drivers/net/phy/mdio-goke-femac.c 2021-06-07 13:01:33.000000000 +0300 -@@ -0,0 +1,450 @@ ++++ linux-4.9.y/drivers/net/phy/mdio-goke-femac.c 2021-06-07 13:01:34.000000000 +0300 +@@ -0,0 +1,445 @@ +/* + * Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved. + */ @@ -24,15 +24,10 @@ +#define BIT_MASK_FEPHY_ADDR GENMASK(4, 0) +#define BIT_FEPHY_SEL BIT(5) + -+#if defined(CONFIG_ARCH_CJ104V100) -+#define BIT_OFFSET_LD_SET 0 -+#define BIT_OFFSET_LDO_SET 5 -+#define BIT_OFFSET_R_TUNING 8 -+#else +#define BIT_OFFSET_LD_SET 25 +#define BIT_OFFSET_LDO_SET 22 +#define BIT_OFFSET_R_TUNING 16 -+#endif ++ +#define MII_EXPMD 0x1d +#define MII_EXPMA 0x1e +