OpenIPC
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firmware
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Merge branch 'master' of github:OpenIPC/firmware

pull/150/head
Igor Zalatov (from Citadel PC) 2022-01-08 21:51:05 +03:00
parent d20b97f8fc 251696ea16
commit a6f6925116
54 changed files with 94 additions and 1019 deletions
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17
general/package/fwprintenv-openipc/0011-env-partition-autosearch.patch
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@ -1,5 +1,5 @@
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 2a61a5d6f0..4a15a0b1cd 100644
index 2a61a5d6f0..2edb872cc6 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -37,7 +37,11 @@
@ -130,7 +130,7 @@ index 2a61a5d6f0..4a15a0b1cd 100644
static int parse_config(struct env_opts *opts)
{
int rc;
@@ -1735,9 +1839,17 @@ static int parse_config(struct env_opts *opts)
@@ -1735,9 +1839,26 @@ static int parse_config(struct env_opts *opts)
#if defined(CONFIG_FILE)
/* Fills in DEVNAME(), ENVSIZE(), DEVESIZE(). Or don't. */
if (get_config(opts->config_file)) {
@ -143,10 +143,19 @@ index 2a61a5d6f0..4a15a0b1cd 100644
+ return -1;
+ }
+ FILE* f = fopen(opts->config_file, "wb");
+ fprintf(f, "%s\t%#llx\t%#lx\t%#lx\t%#lx\n",
+ if (f == NULL) {
+ fprintf(stderr, "Cannot open config file '%s': %m\n",
+ opts->config_file);
+ return -1;
+ }
+ if (fprintf(f, "%s\t%#llx\t%#lx\t%#lx\t%#lx\n",
+ DEVNAME(0),
+ DEVOFFSET(0),
+ ENVSIZE(0), DEVESIZE(0), ENVSECTORS(0));
+ ENVSIZE(0), DEVESIZE(0), ENVSECTORS(0)) < 0) {
+ fprintf(stderr, "Cannot write config file '%s': %m\n",
+ opts->config_file);
+ return -1;
+ }
+ fclose(f);
}
#else

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general/package/hisilicon-osdrv-hi3516cv100/files/kmod/acodec.ko
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general/package/hisilicon-osdrv-hi3516cv100/files/lib/libisp.so
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143
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/ar0130_i2c_720p.ini → general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/imx222_spi_dc_1080p.ini
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@ -1,14 +1,14 @@
[sensor]
Sensor_type =ar0130 ;sensor name
Sensor_type =imx222 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =/usr/lib/sensors/libsns_ar0130.so ;sensor lib path
DllFile = /usr/lib/sensors/libsns_imx222_spi_dc.so ;sensor lib path
[mode]
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
@ -17,26 +17,26 @@ dev_attr = 2 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = -1 ;oringnal sensor input image size W
img_size_h = -1 ;oringnal sensor input image size H
;----------only for lvds_dev---------
img_size_w = -1 ;oringnal sensor input image size W
img_size_h = -1 ;oringnal sensor input image size H
wdr_mode = -1 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = -1 ;RAW_DATA_8BIT = 0
raw_data_type = -1 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
@ -58,18 +58,23 @@ sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1280
Isp_H =720
Isp_FrameRate=25
Isp_Bayer =1 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
Isp_x =200
Isp_y =20
Isp_W =1920
Isp_H =1080
Isp_FrameRate=30
Isp_Bayer =0 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Input_mod =2 ;VI_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */
;VI_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */
;VI_MODE_DIGITAL_CAMERA, /* digital camera mode */
;VI_MODE_BT1120_STANDARD, /* BT.1120 progressive mode */
;VI_MODE_BT1120_INTERLEAVED, /* BT.1120 interstage mode */
;VI_MODE_MIPI, /* MIPI mode*/
;VI_MODE_LVDS,
;VI_MODE_HISPI
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
@ -83,7 +88,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF0000
Mask_0 =0xFFF00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
@ -96,30 +101,30 @@ Data_seq =2 ;data sequence (ONLY for YUV format)
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
VsyncNeg=1 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1280 ;Horizontal effetive width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =720 ;Vertical effetive width
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
@ -127,7 +132,7 @@ Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace,
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
@ -136,25 +141,25 @@ DataPath =1 ;ISP enable or bypass
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1280 ;
DevRect_h=720 ;
DevRect_x=200 ;
DevRect_y=20 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_X =0
CapRect_Y =0
CapRect_Width=1280
CapRect_Height=720
DestSize_Width=1280
DestSize_Height=720
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
PixFormat =19;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 18
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 19 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
@ -170,24 +175,24 @@ Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1280
Vpss_H =720
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
@ -198,15 +203,15 @@ venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1280
PicHeight =720
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
@ -223,22 +228,22 @@ PQp=40
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1280
PicHeight =720
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
@ -256,7 +261,7 @@ PQp=45
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s

163
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/jxf22_i2c_1080p.ini
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@ -1,163 +0,0 @@
[sensor]
Sensor_type =jxf22 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_jxf22.so ;sensor lib path
[mode]
input_mode =INPUT_MODE_CMOS_33V ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 2 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = -1 ;oringnal sensor input image size W
img_size_h = -1 ;oringnal sensor input image size H
wdr_mode = -1 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = -1 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0x3FF0000
Mask_1 =0x0
Scan_mode = VI_SCAN_PROGRESSIVE ;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =VI_INPUT_DATA_YUYV ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =VI_VSYNC_FIELD ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=VI_VSYNC_NEG_HIGH ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =VI_HSYNC_VALID_SINGNAL ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =VI_HSYNC_NEG_HIGH ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =VI_VSYNC_VALID_SINGAL ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =VI_VSYNC_VALID_NEG_HIGH ;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1280 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =720 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =VI_PATH_ISP ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=VI_DATA_TYPE_RGB ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll

6
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/ov9712_i2c_720p.ini → general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/ov9712_i2c_dc_720p.ini
View File

@ -5,7 +5,7 @@ Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =/usr/lib/sensors/libsns_ov9712.so ;sensor lib path
DllFile =/usr/lib/sensors/libsns_ov9712_i2c_dc.so ;sensor lib path
[mode]
@ -83,7 +83,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFC0000
Mask_0 =0xFFC00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
@ -153,7 +153,7 @@ CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
PixFormat =19;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc

3
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc1135_i2c_720p.ini → general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc1135_720p.ini
View File

@ -1,3 +1,6 @@
# Untested sensor 2021.01.25
[sensor]
Sensor_type =sc1135 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0

260
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc1145_i2c_720p.ini
View File

@ -1,260 +0,0 @@
[sensor]
Sensor_type =sc1145 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =/usr/lib/sensors/libsns_sc1145.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 2 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = -1 ;oringnal sensor input image size W
img_size_h = -1 ;oringnal sensor input image size H
wdr_mode = -1 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = -1 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1280
Isp_H =720
Isp_FrameRate=30
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode =1 ;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1280 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =720 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1280 ;
DevRect_h=720 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1280
CapRect_Height=720
DestSize_Width=1280
DestSize_Height=720
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
;SrcFrameRate=-1 ;Source frame rate. -1: not controll
;FrameRate =-1 ;Target frame rate. -1: not controll
SrcFrameRate=30 ;Source frame rate. -1: not controll
FrameRate =30 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1280
Vpss_H =720
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=5
#VbCnt=2
vbTimes=15
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1280
PicHeight =720
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=2048
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
[venc_1]
PicWidth =1280
PicHeight =720
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=15
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=2048
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

260
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc2035_i2c_1080p.ini
View File

@ -1,260 +0,0 @@
[sensor]
Sensor_type =sc2035 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =/usr/lib/sensors/libsns_sc2035.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 2 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = -1 ;oringnal sensor input image size W
img_size_h = -1 ;oringnal sensor input image size H
wdr_mode = -1 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = -1 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=30
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFC0000
Mask_1 =0x0
Scan_mode =1 ;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
;SrcFrameRate=-1 ;Source frame rate. -1: not controll
;FrameRate =-1 ;Target frame rate. -1: not controll
SrcFrameRate=30 ;Source frame rate. -1: not controll
FrameRate =30 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=5
#VbCnt=2
vbTimes=15
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=15
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=15
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

0
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc2135_i2c_1080p.ini → general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc2135_i2c_dc_1080p.ini
View File

260
general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/sc2235_i2c_dc_1080p.ini
View File

@ -1,260 +0,0 @@
[sensor]
Sensor_type =sc2235 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile =/usr/lib/sensors/libsns_sc2235.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 2 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = -1 ;oringnal sensor input image size W
img_size_h = -1 ;oringnal sensor input image size H
wdr_mode = -1 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = -1 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=30
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFF00000
Mask_1 =0x0
Scan_mode =1 ;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
;SrcFrameRate=-1 ;Source frame rate. -1: not controll
;FrameRate =-1 ;Target frame rate. -1: not controll
SrcFrameRate=30 ;Source frame rate. -1: not controll
FrameRate =30 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=5
#VbCnt=2
vbTimes=15
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=15
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=15
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -54,6 +54,7 @@ define HISILICON_OSDRV_HI3516CV100_INSTALL_TARGET_CMDS
$(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.0.8/hisilicon $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv100/files/kmod/ssp_ad9020.ko
$(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.0.8/hisilicon $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv100/files/kmod/ssp_pana.ko
$(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.0.8/hisilicon $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv100/files/kmod/ssp_sony.ko
$(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.0.8/hisilicon $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv100/files/kmod/wdt.ko
$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/bin
$(INSTALL) -m 755 -t $(TARGET_DIR)/usr/bin $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv100/files/script/load_hisilicon