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GalaxyCore GC1004 Support for Hi3518ev100 (#960)

pull/967/head
naksper 2023-08-22 13:32:04 +02:00 committed by GitHub
parent a1c3fc2d42
commit a54e650316
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general/package/hisilicon-osdrv-hi3516cv100/files/sensor/config/gc1004_i2c_dc_720p.ini 100644
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[sensor]
Sensor_type =cg1004 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_FRAME = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
;DllFile =/usr/lib/sensors/libsns_ov9712_i2c_dc.so ;sensor lib path
;DllFile =/usr/lib/sensors/libsns_himax1375.so
;DllFile =/usr/lib/sensors/libsns_ar0130_720p.so
;DllFile =/usr/lib/sensors/libsns_imx225_i2c_dc_720p.so
DllFile =/usr/lib/sensors/libsns_gc1004ok.so
;DllFile =/tmp/libsns_gc10042.so
;DllFile =/usr/lib/sensors/libsns_himax1375.so
[mode]
input_mode =0 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
;dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
;data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
;lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
;[lvds]
;----------only for lvds_dev---------
;img_size_w = -1 ;oringnal sensor input image size W
;img_size_h = -1 ;oringnal sensor input image size H
;wdr_mode = -1 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
;sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
;raw_data_type = -1 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
;data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
;sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
;lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
;lvds_lane_num = -1 ;LVDS_LANE_NUM
;wdr_vc_num = -1 ;WDR_VC_NUM
;sync_code_num = -1 ;SYNC_CODE_NUM
;sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
;sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x = 0
Isp_y = 0
Isp_W = 1280
Isp_H = 720
Isp_FrameRate= 25
Isp_Bayer = 0 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
;Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
;Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
;Clock_edge =0 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
;Mask_0 =0x3FF00000
Mask_0 =0xFFC00000
Mask_1 =0x0
Scan_mode =1 ;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =1 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1280 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =720 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
; ----- only for bt656 ----------
;FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
;FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0
;VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0
DevRect_y=0
DevRect_w=1280
DevRect_h=720
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width =1280
CapRect_Height =720
DestSize_Width =1280
DestSize_Height =720
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =19;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate = 30 ;Source frame rate. -1: not controll
FrameRate = 30 ;Target frame rate. -1: not controll
;[vpss_group]
;Vpss_DciEn =FALSE
;Vpss_IeEn =FALSE
;Vpss_NrEn =TRUE
;Vpss_HistEn =FALSE
;Vpss_DieMode=0 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
;[vpss_corp]
;Crop_enable =FALSE
;Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
;Crop_X =128
;Crop_Y =128
;Crop_W =1158
;Crop_H =562
;Crop_X =0
;Crop_Y =0
;Crop_W =1280
;Crop_H =720
;[vpss_chn]
;Vpss_W =1280
;Vpss_H =720
;CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
;Mirror =TRUE;Whether to mirror
;Flip =FALSE;Whether to flip
;[vb_conf]
;VbCnt=10
;vbTimes=20 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn = 1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth = 1280
PicHeight = 720
Profile = 2
RcMode = VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
;PicWidth =1280
;PicHeight =720
;Profile =2
;RcMode =VENC_RC_MODE_H264CBR
;Gop =50
;StatTime =2
;ViFrmRate =25
;TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
;BitRate=4096
;FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
;MaxBitRate =10000
;MaxQp=32
;MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
;IQp=40
;PQp=45
;-------- for REF_EX IsliceEnable------
;IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
;IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
;RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
;ReqIQp = 30
;-------- for REF_EX ViEnable------
;ViEnable = TRUE
;ViInterval = 50 ; 2s
;ViQpDelta = 2
;[AWB]
;AdvAWBAttr=1|8|0x30|0xFF9|0
; HI_BOOL bAccuPrior, recommended 0 for outdoor, 1 for indoor
; HI_U8 u8Tolerance, Range:[0x0, 0xFF], AWB adjust tolerance,for outdoor, this value should be small, recommended 4
; HI_U16 u16CurveLLimit, Range:[0x0, 0x100], Left limit of AWB Curve, recommended for indoor 0xE0, outdoor 0xE0
; HI_U16 u16CurveRLimit, Range:[0x100, 0xFFF], Right Limit of AWB Curve,recommended for indoor 0x130, outdoor 0x120
; HI_BOOL bGainNormEn
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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general/package/hisilicon-osdrv-hi3516cv100/files/sensor/libsns_gc1004ok.so 100644
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