From a15ab4bcf7923efcfbe90fdcea03564176b6cd85 Mon Sep 17 00:00:00 2001
From: Dmitry Ilyin <dima@doty.ru>
Date: Mon, 3 May 2021 13:27:21 +0300
Subject: [PATCH] Add WDR for 5M IMX335
---
.../files/sensor/config/WDR/5M_imx335.ini | 113 ++++++++++++++++++
.../files/sensor/config/WDR/imx335_i2c_4M.ini | 1 -
2 files changed, 113 insertions(+), 1 deletion(-)
create mode 100644 br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/5M_imx335.ini
diff --git a/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/5M_imx335.ini b/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/5M_imx335.ini
new file mode 100644
index 00000000..ce9a46e1
--- /dev/null
+++ b/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/5M_imx335.ini
@@ -0,0 +1,113 @@
+[sensor]
+Sensor_type =stSnsImx335Obj ;sensor name
+Mode = WDR_MODE_2To1_LINE
+DllFile = /usr/lib/sensors/libsns_imx335.so ;sensor lib path
+
+
+[mode]
+input_mode =0 ;INPUT_MODE_MIPI = 0
+ ;INPUT_MODE_SUBLVDS = 1
+ ;INPUT_MODE_LVDS = 2 ...etc
+raw_bitness = 10
+
+[mipi]
+;----------only for mipi_dev---------
+data_type = 2 ;raw data type: 8/10/12/14 bit
+ ;DATA_TYPE_RAW_8BIT = 0,
+ ;DATA_TYPE_RAW_10BIT,
+ ;DATA_TYPE_RAW_12BIT,
+ ;DATA_TYPE_RAW_14BIT,
+ ;DATA_TYPE_RAW_16BIT,
+ ;DATA_TYPE_YUV420_8BIT_NORMAL,
+ ;DATA_TYPE_YUV420_8BIT_LEGACY,
+ ;DATA_TYPE_YUV422_8BIT,
+lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
+
+[isp_image]
+Isp_x =0
+Isp_y =0
+Isp_W =2592
+Isp_H =1944
+Isp_FrameRate=30
+Isp_Bayer =0 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
+
+
+[vi_dev]
+Input_mod = VI_MODE_MIPI
+Work_mod = VI_WORK_MODE_1Multiplex
+Mask_num = 2
+Mask_0 = 0xFFC00000
+Mask_1 = 0x0
+Scan_mode = VI_SCAN_PROGRESSIVE
+Data_seq = VI_DATA_SEQ_YUYV
+Vsync =1 ; vertical synchronization signal
+ ;VI_VSYNC_PULSE,
+VsyncNeg=1 ;Polarity of the vertical synchronization signal
+ ;VI_VSYNC_NEG_HIGH = 0,
+ ;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
+Hsync =0 ;Attribute of the horizontal synchronization signal
+ ;VI_HSYNC_VALID_SINGNAL = 0,
+ ;VI_HSYNC_PULSE,
+HsyncNeg =0 ;Polarity of the horizontal synchronization signal
+ ;VI_HSYNC_NEG_HIGH = 0,
+ ;VI_HSYNC_NEG_LOW
+VsyncValid =1 ;Attribute of the valid vertical synchronization signal
+ ;VI_VSYNC_NORM_PULSE = 0,
+ ;VI_VSYNC_VALID_SINGAL,
+VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
+ ;VI_VSYNC_VALID_NEG_HIGH = 0,
+ ;VI_VSYNC_VALID_NEG_LOW
+Timingblank_HsyncHfb =0 ;Horizontal front blanking width
+Timingblank_HsyncAct =1280 ;Horizontal effetive width
+Timingblank_HsyncHbb =0 ;Horizontal back blanking width
+Timingblank_VsyncVfb =0 ;Vertical front blanking height
+Timingblank_VsyncVact =720 ;Vertical effetive width
+Timingblank_VsyncVbb=0 ;Vertical back blanking height
+Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
+Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
+Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
+InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
+DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
+DevRect_w=2592 ;
+DevRect_h=1944 ;
+DevRect_x=200 ;
+DevRect_y=20 ;
+
+Combine_mode =0 ;Y/C composite or separation mode
+ ;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
+ ;VI_COMBINE_SEPARATE, /*Separate mode */
+Comp_mode =0 ;Component mode (single-component or dual-component)
+ ;VI_COMP_MODE_SINGLE = 0, /*single component mode */
+ ;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
+Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
+ ;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
+ ;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
+
+;----- only for bt656 ----------
+FixCode =0 ;BT656_FIXCODE_1 = 0,
+ ;BT656_FIXCODE_0
+FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
+ ;BT656_FIELD_POLAR_NSTD
+DataPath =1 ;ISP enable or bypass
+ ;VI_PATH_BYPASS = 0,/* ISP bypass */
+ ;VI_PATH_ISP = 1,/* ISP enable */
+ ;VI_PATH_RAW = 2,/* Capture raw data, for debug */
+
+[vi_chn]
+CapRect_X =0
+CapRect_Y =0
+CapRect_Width=2592
+CapRect_Height=1944
+DestSize_Width=2592
+DestSize_Height=1944
+CapSel =2 ;Frame/field select. ONLY used in interlaced mode
+ ;VI_CAPSEL_TOP = 0, /* top field */
+ ;VI_CAPSEL_BOTTOM, /* bottom field */
+ ;VI_CAPSEL_BOTH, /* top and bottom field */
+
+PixFormat =26;PIXEL_FORMAT_YVU_SEMIPLANAR_420 = 26 ...etc
+CompressMode =0 ;COMPRESS_MODE_NONE = 0
+ ;COMPRESS_MODE_SEG =1 ...etc
+
+SrcFrameRate=-1 ;Source frame rate. -1: not controll
+FrameRate =-1 ;Target frame rate. -1: not controll
diff --git a/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/imx335_i2c_4M.ini b/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/imx335_i2c_4M.ini
index 3fcfe5d1..aae9fa88 100644
--- a/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/imx335_i2c_4M.ini
+++ b/br-ext-chip-hisilicon/package/hisilicon-osdrv4/files/sensor/config/WDR/imx335_i2c_4M.ini
@@ -8,7 +8,6 @@ DllFile = /usr/lib/sensors/libsns_imx335.so ;sensor lib path
input_mode =0 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
-
raw_bitness = 10
[mipi]