diff --git a/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/00_infinity6e_kernel_4.9.84_sdk.patch b/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/00_infinity6e_kernel_4.9.84_sdk.patch
index 785206ae..7cd75d8d 100644
--- a/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/00_infinity6e_kernel_4.9.84_sdk.patch
+++ b/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/00_infinity6e_kernel_4.9.84_sdk.patch
@@ -59,18 +59,18 @@ index 3db8c67d2c8d..0335285f3918 100644
 diff --git a/Makefile b/Makefile
 old mode 100644
 new mode 100755
-index db13b13cdcc2..28bd05e2f957
+index db13b13cdcc2..0c64f04b2429
 --- a/Makefile
 +++ b/Makefile
-@@ -4,6 +4,8 @@ SUBLEVEL = 84
- EXTRAVERSION =
- NAME = Roaring Lionus
+@@ -221,6 +221,8 @@ VPATH		:= $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD))
  
-+SSTAR_CHIP_MODEL = infinity6e
+ export srctree objtree VPATH
+ 
++SSTAR_CHIP_MODEL ?= infinity6e
 +
- # *DOCUMENTATION*
- # To see a list of typical targets execute "make help"
- # More info can be located in ./README
+ # SUBARCH tells the usermode build what the underlying arch is.  That is set
+ # first, and if a usermode build is happening, the "ARCH=um" on the command
+ # line overrides the setting of ARCH below.  If a native build is happening,
 @@ -410,6 +412,8 @@ GCC_PLUGINS_CFLAGS :=
  KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
  KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
@@ -80,7 +80,7 @@ index db13b13cdcc2..28bd05e2f957
  export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION
  export ARCH SRCARCH CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC
  export CPP AR NM STRIP OBJCOPY OBJDUMP
-@@ -802,15 +806,33 @@ KBUILD_CFLAGS   += $(call cc-option,-Werror=implicit-int)
+@@ -802,12 +806,28 @@ KBUILD_CFLAGS   += $(call cc-option,-Werror=implicit-int)
  # require functions to have arguments in prototypes, not empty 'int foo()'
  KBUILD_CFLAGS   += $(call cc-option,-Werror=strict-prototypes)
  
@@ -110,12 +110,7 @@ index db13b13cdcc2..28bd05e2f957
  # use the deterministic mode of AR if available
  KBUILD_ARFLAGS := $(call ar-option,D)
  
-+KBUILD_CFLAGS   += -Werror
-+
- include scripts/Makefile.kasan
- include scripts/Makefile.extrawarn
- include scripts/Makefile.ubsan
-@@ -1000,10 +1022,68 @@ define filechk_kernel.release
+@@ -1000,10 +1020,68 @@ define filechk_kernel.release
  	echo "$(KERNELVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))"
  endef
  
@@ -184,7 +179,7 @@ index db13b13cdcc2..28bd05e2f957
  
  # Things we need to do before we recursively start building the kernel
  # or the modules are listed in "prepare".
-@@ -1206,6 +1286,9 @@ modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) modules.builtin
+@@ -1206,6 +1284,9 @@ modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) modules.builtin
  	@$(kecho) '  Building modules, stage 2.';
  	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
  	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild
@@ -29439,10 +29434,10 @@ index 000000000000..aa4e8daf2a09
 +};
 diff --git a/arch/arm/boot/dts/infinity6e-ssc013a-s01a.dts b/arch/arm/boot/dts/infinity6e-ssc013a-s01a.dts
 new file mode 100755
-index 000000000000..7187f0f551c4
+index 000000000000..defd8df53f2c
 --- /dev/null
 +++ b/arch/arm/boot/dts/infinity6e-ssc013a-s01a.dts
-@@ -0,0 +1,158 @@
+@@ -0,0 +1,163 @@
 +/*
 + * Copyright (c) 2014 MundoReader S.L.
 + * Author: Matthias Brugger <matthias.bgg@gmail.com>
@@ -29571,6 +29566,11 @@ index 000000000000..7187f0f551c4
 +             *         5 -> PAD_GPIO12, PAD_GPIO13
 +            */
 +            i2c-padmux = <1>;
++
++            gyro@d0 {
++                compatible = "sstar,gyro";
++                reg = <0x68>;
++            };
 +        };
 +
 +        sdmmc {
@@ -29829,10 +29829,10 @@ index 000000000000..5285afdd8f9e
 +};
 diff --git a/arch/arm/boot/dts/infinity6e.dtsi b/arch/arm/boot/dts/infinity6e.dtsi
 new file mode 100755
-index 000000000000..0f5f91589661
+index 000000000000..6337859aa4b5
 --- /dev/null
 +++ b/arch/arm/boot/dts/infinity6e.dtsi
-@@ -0,0 +1,859 @@
+@@ -0,0 +1,863 @@
 +/*
 + * Copyright (c) 2014 MundoReader S.L.
 + * Author: Matthias Brugger <matthias.bgg@gmail.com>
@@ -30120,6 +30120,10 @@ index 000000000000..0f5f91589661
 +            //dmic bck mode
 +            dmic-bck-mode = <0>;    //0:4M, 1:2M
 +
++            // keep analog (adc/dac) always on
++            keep_adc_power_on = <0>;
++            keep_dac_power_on = <0>;
++
 +            status = "ok";
 +        };
 +        vif: vif {
@@ -287636,10 +287640,10 @@ index 000000000000..7247661aa6c3
 +# CONFIG_VIRTUALIZATION is not set
 diff --git a/arch/arm/configs/infinity6e_ssc012b_s01a_spinand_usbcam_defconfig b/arch/arm/configs/infinity6e_ssc012b_s01a_spinand_usbcam_defconfig
 new file mode 100644
-index 000000000000..9efa881fee7c
+index 000000000000..36d082134c6b
 --- /dev/null
 +++ b/arch/arm/configs/infinity6e_ssc012b_s01a_spinand_usbcam_defconfig
-@@ -0,0 +1,2866 @@
+@@ -0,0 +1,2879 @@
 +#
 +# Automatically generated file; DO NOT EDIT.
 +# Linux/arm 4.9.84 Kernel Configuration
@@ -287919,7 +287923,7 @@ index 000000000000..9efa881fee7c
 +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
 +CONFIG_RWSEM_SPIN_ON_OWNER=y
 +CONFIG_LOCK_SPIN_ON_OWNER=y
-+# CONFIG_FREEZER is not set
++CONFIG_FREEZER=y
 +
 +#
 +# System Type
@@ -288004,6 +288008,8 @@ index 000000000000..9efa881fee7c
 +CONFIG_ARCH_INFINITY6E=y
 +CONFIG_SS_PROFILING_TIME=y
 +CONFIG_SS_MIU_ARBITRATION=y
++CONFIG_SS_LOWPWR_STR=y
++CONFIG_SS_USB_LOWPWR_SUSPEND=y
 +# CONFIG_ARCH_MXC is not set
 +# CONFIG_ARCH_MEDIATEK is not set
 +
@@ -288114,7 +288120,7 @@ index 000000000000..9efa881fee7c
 +# CONFIG_VMSPLIT_1G is not set
 +CONFIG_PAGE_OFFSET=0xC0000000
 +CONFIG_NR_CPUS=4
-+# CONFIG_HOTPLUG_CPU is not set
++CONFIG_HOTPLUG_CPU=y
 +# CONFIG_ARM_PSCI is not set
 +CONFIG_ARCH_NR_GPIO=0
 +# CONFIG_PREEMPT_NONE is not set
@@ -288189,6 +288195,7 @@ index 000000000000..9efa881fee7c
 +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
 +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
 +CONFIG_CMDLINE=""
++# CONFIG_KEXEC is not set
 +# CONFIG_CRASH_DUMP is not set
 +CONFIG_AUTO_ZRELADDR=y
 +# CONFIG_EFI is not set
@@ -288259,15 +288266,24 @@ index 000000000000..9efa881fee7c
 +#
 +# Power management options
 +#
-+# CONFIG_SUSPEND is not set
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++# CONFIG_SUSPEND_SKIP_SYNC is not set
++CONFIG_PM_SLEEP=y
++CONFIG_PM_SLEEP_SMP=y
++# CONFIG_PM_AUTOSLEEP is not set
++CONFIG_PM_WAKELOCKS=y
++CONFIG_PM_WAKELOCKS_LIMIT=100
++CONFIG_PM_WAKELOCKS_GC=y
 +CONFIG_PM=y
 +# CONFIG_PM_DEBUG is not set
 +# CONFIG_APM_EMULATION is not set
 +CONFIG_PM_OPP=y
 +CONFIG_PM_CLK=y
-+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
++CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
++CONFIG_CPU_PM=y
 +CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+# CONFIG_ARM_CPU_SUSPEND is not set
++CONFIG_ARM_CPU_SUSPEND=y
 +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 +CONFIG_NET=y
 +
@@ -290247,6 +290263,7 @@ index 000000000000..9efa881fee7c
 +# CONFIG_RCU_EQS_DEBUG is not set
 +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
 +# CONFIG_NOTIFIER_ERROR_INJECTION is not set
 +# CONFIG_FAULT_INJECTION is not set
 +# CONFIG_LATENCYTOP is not set
@@ -293375,10 +293392,10 @@ index 000000000000..a290583cee25
 +# CONFIG_VIRTUALIZATION is not set
 diff --git a/arch/arm/configs/infinity6e_ssc012b_s01a_usbcam_defconfig b/arch/arm/configs/infinity6e_ssc012b_s01a_usbcam_defconfig
 new file mode 100644
-index 000000000000..36e191308e5a
+index 000000000000..98f040da72ac
 --- /dev/null
 +++ b/arch/arm/configs/infinity6e_ssc012b_s01a_usbcam_defconfig
-@@ -0,0 +1,2861 @@
+@@ -0,0 +1,2874 @@
 +#
 +# Automatically generated file; DO NOT EDIT.
 +# Linux/arm 4.9.84 Kernel Configuration
@@ -293658,7 +293675,7 @@ index 000000000000..36e191308e5a
 +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
 +CONFIG_RWSEM_SPIN_ON_OWNER=y
 +CONFIG_LOCK_SPIN_ON_OWNER=y
-+# CONFIG_FREEZER is not set
++CONFIG_FREEZER=y
 +
 +#
 +# System Type
@@ -293743,6 +293760,8 @@ index 000000000000..36e191308e5a
 +CONFIG_ARCH_INFINITY6E=y
 +CONFIG_SS_PROFILING_TIME=y
 +CONFIG_SS_MIU_ARBITRATION=y
++CONFIG_SS_LOWPWR_STR=y
++CONFIG_SS_USB_LOWPWR_SUSPEND=y
 +# CONFIG_ARCH_MXC is not set
 +# CONFIG_ARCH_MEDIATEK is not set
 +
@@ -293853,7 +293872,7 @@ index 000000000000..36e191308e5a
 +# CONFIG_VMSPLIT_1G is not set
 +CONFIG_PAGE_OFFSET=0xC0000000
 +CONFIG_NR_CPUS=4
-+# CONFIG_HOTPLUG_CPU is not set
++CONFIG_HOTPLUG_CPU=y
 +# CONFIG_ARM_PSCI is not set
 +CONFIG_ARCH_NR_GPIO=0
 +# CONFIG_PREEMPT_NONE is not set
@@ -293928,6 +293947,7 @@ index 000000000000..36e191308e5a
 +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
 +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
 +CONFIG_CMDLINE=""
++# CONFIG_KEXEC is not set
 +# CONFIG_CRASH_DUMP is not set
 +CONFIG_AUTO_ZRELADDR=y
 +# CONFIG_EFI is not set
@@ -293998,15 +294018,24 @@ index 000000000000..36e191308e5a
 +#
 +# Power management options
 +#
-+# CONFIG_SUSPEND is not set
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++# CONFIG_SUSPEND_SKIP_SYNC is not set
++CONFIG_PM_SLEEP=y
++CONFIG_PM_SLEEP_SMP=y
++# CONFIG_PM_AUTOSLEEP is not set
++CONFIG_PM_WAKELOCKS=y
++CONFIG_PM_WAKELOCKS_LIMIT=100
++CONFIG_PM_WAKELOCKS_GC=y
 +CONFIG_PM=y
 +# CONFIG_PM_DEBUG is not set
 +# CONFIG_APM_EMULATION is not set
 +CONFIG_PM_OPP=y
 +CONFIG_PM_CLK=y
-+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
++CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
++CONFIG_CPU_PM=y
 +CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+# CONFIG_ARM_CPU_SUSPEND is not set
++CONFIG_ARM_CPU_SUSPEND=y
 +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 +CONFIG_NET=y
 +
@@ -295981,6 +296010,7 @@ index 000000000000..36e191308e5a
 +# CONFIG_RCU_EQS_DEBUG is not set
 +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
 +# CONFIG_NOTIFIER_ERROR_INJECTION is not set
 +# CONFIG_FAULT_INJECTION is not set
 +# CONFIG_LATENCYTOP is not set
@@ -328951,10 +328981,10 @@ index 000000000000..953ecfeab5f1
 +# CONFIG_VIRTUALIZATION is not set
 diff --git a/arch/arm/configs/infinity6e_ssc013a_s01a_spinand_usbcam_defconfig b/arch/arm/configs/infinity6e_ssc013a_s01a_spinand_usbcam_defconfig
 new file mode 100644
-index 000000000000..3114e2cbc700
+index 000000000000..4b81df2a75c9
 --- /dev/null
 +++ b/arch/arm/configs/infinity6e_ssc013a_s01a_spinand_usbcam_defconfig
-@@ -0,0 +1,2866 @@
+@@ -0,0 +1,2888 @@
 +#
 +# Automatically generated file; DO NOT EDIT.
 +# Linux/arm 4.9.84 Kernel Configuration
@@ -329234,7 +329264,7 @@ index 000000000000..3114e2cbc700
 +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
 +CONFIG_RWSEM_SPIN_ON_OWNER=y
 +CONFIG_LOCK_SPIN_ON_OWNER=y
-+# CONFIG_FREEZER is not set
++CONFIG_FREEZER=y
 +
 +#
 +# System Type
@@ -329319,6 +329349,8 @@ index 000000000000..3114e2cbc700
 +CONFIG_ARCH_INFINITY6E=y
 +CONFIG_SS_PROFILING_TIME=y
 +CONFIG_SS_MIU_ARBITRATION=y
++CONFIG_SS_LOWPWR_STR=y
++CONFIG_SS_USB_LOWPWR_SUSPEND=y
 +# CONFIG_ARCH_MXC is not set
 +# CONFIG_ARCH_MEDIATEK is not set
 +
@@ -329429,7 +329461,7 @@ index 000000000000..3114e2cbc700
 +# CONFIG_VMSPLIT_1G is not set
 +CONFIG_PAGE_OFFSET=0xC0000000
 +CONFIG_NR_CPUS=4
-+# CONFIG_HOTPLUG_CPU is not set
++CONFIG_HOTPLUG_CPU=y
 +# CONFIG_ARM_PSCI is not set
 +CONFIG_ARCH_NR_GPIO=0
 +# CONFIG_PREEMPT_NONE is not set
@@ -329504,6 +329536,7 @@ index 000000000000..3114e2cbc700
 +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
 +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
 +CONFIG_CMDLINE=""
++# CONFIG_KEXEC is not set
 +# CONFIG_CRASH_DUMP is not set
 +CONFIG_AUTO_ZRELADDR=y
 +# CONFIG_EFI is not set
@@ -329574,15 +329607,24 @@ index 000000000000..3114e2cbc700
 +#
 +# Power management options
 +#
-+# CONFIG_SUSPEND is not set
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++# CONFIG_SUSPEND_SKIP_SYNC is not set
++CONFIG_PM_SLEEP=y
++CONFIG_PM_SLEEP_SMP=y
++# CONFIG_PM_AUTOSLEEP is not set
++CONFIG_PM_WAKELOCKS=y
++CONFIG_PM_WAKELOCKS_LIMIT=100
++CONFIG_PM_WAKELOCKS_GC=y
 +CONFIG_PM=y
 +# CONFIG_PM_DEBUG is not set
 +# CONFIG_APM_EMULATION is not set
 +CONFIG_PM_OPP=y
 +CONFIG_PM_CLK=y
-+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
++CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
++CONFIG_CPU_PM=y
 +CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+# CONFIG_ARM_CPU_SUSPEND is not set
++CONFIG_ARM_CPU_SUSPEND=y
 +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 +CONFIG_NET=y
 +
@@ -331221,6 +331263,7 @@ index 000000000000..3114e2cbc700
 +CONFIG_DISCONNECT_DELAY_S=1
 +# CONFIG_MSTAR_EEE is not set
 +# CONFIG_EMAC_PHY_RESTART_AN is not set
++# CONFIG_EMAC_DPHY_REINIT is not set
 +# CONFIG_MS_IRCUT is not set
 +CONFIG_MS_RTC=y
 +# CONFIG_RTC_INNER is not set
@@ -331256,6 +331299,14 @@ index 000000000000..3114e2cbc700
 +CONFIG_MS_IOPOWER=y
 +# CONFIG_SS_SWTOE is not set
 +# CONFIG_MS_EMAC_TOE is not set
++CONFIG_SS_GYRO=m
++CONFIG_SS_GYRO_TRANSFER_I2C=y
++# CONFIG_SS_GYRO_TRANSFER_SPI is not set
++CONFIG_SS_GYRO_CHIP_ICG20660=y
++# CONFIG_SS_GYRO_CHIP_ICG20330 is not set
++# CONFIG_SS_GYRO_CHIP_ICM40607 is not set
++# CONFIG_SS_GYRO_SYSFS is not set
++# CONFIG_SS_GYRO_DEBUG_ON is not set
 +
 +#
 +# Firmware Drivers
@@ -331562,6 +331613,7 @@ index 000000000000..3114e2cbc700
 +# CONFIG_RCU_EQS_DEBUG is not set
 +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
 +# CONFIG_NOTIFIER_ERROR_INJECTION is not set
 +# CONFIG_FAULT_INJECTION is not set
 +# CONFIG_LATENCYTOP is not set
@@ -334690,10 +334742,10 @@ index 000000000000..d814458e3535
 +# CONFIG_VIRTUALIZATION is not set
 diff --git a/arch/arm/configs/infinity6e_ssc013a_s01a_usbcam_defconfig b/arch/arm/configs/infinity6e_ssc013a_s01a_usbcam_defconfig
 new file mode 100644
-index 000000000000..5278f96ab816
+index 000000000000..82ffb5f0c566
 --- /dev/null
 +++ b/arch/arm/configs/infinity6e_ssc013a_s01a_usbcam_defconfig
-@@ -0,0 +1,2861 @@
+@@ -0,0 +1,2874 @@
 +#
 +# Automatically generated file; DO NOT EDIT.
 +# Linux/arm 4.9.84 Kernel Configuration
@@ -334973,7 +335025,7 @@ index 000000000000..5278f96ab816
 +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
 +CONFIG_RWSEM_SPIN_ON_OWNER=y
 +CONFIG_LOCK_SPIN_ON_OWNER=y
-+# CONFIG_FREEZER is not set
++CONFIG_FREEZER=y
 +
 +#
 +# System Type
@@ -335058,6 +335110,8 @@ index 000000000000..5278f96ab816
 +CONFIG_ARCH_INFINITY6E=y
 +CONFIG_SS_PROFILING_TIME=y
 +CONFIG_SS_MIU_ARBITRATION=y
++CONFIG_SS_LOWPWR_STR=y
++CONFIG_SS_USB_LOWPWR_SUSPEND=y
 +# CONFIG_ARCH_MXC is not set
 +# CONFIG_ARCH_MEDIATEK is not set
 +
@@ -335168,7 +335222,7 @@ index 000000000000..5278f96ab816
 +# CONFIG_VMSPLIT_1G is not set
 +CONFIG_PAGE_OFFSET=0xC0000000
 +CONFIG_NR_CPUS=4
-+# CONFIG_HOTPLUG_CPU is not set
++CONFIG_HOTPLUG_CPU=y
 +# CONFIG_ARM_PSCI is not set
 +CONFIG_ARCH_NR_GPIO=0
 +# CONFIG_PREEMPT_NONE is not set
@@ -335243,6 +335297,7 @@ index 000000000000..5278f96ab816
 +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
 +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
 +CONFIG_CMDLINE=""
++# CONFIG_KEXEC is not set
 +# CONFIG_CRASH_DUMP is not set
 +CONFIG_AUTO_ZRELADDR=y
 +# CONFIG_EFI is not set
@@ -335313,15 +335368,24 @@ index 000000000000..5278f96ab816
 +#
 +# Power management options
 +#
-+# CONFIG_SUSPEND is not set
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++# CONFIG_SUSPEND_SKIP_SYNC is not set
++CONFIG_PM_SLEEP=y
++CONFIG_PM_SLEEP_SMP=y
++# CONFIG_PM_AUTOSLEEP is not set
++CONFIG_PM_WAKELOCKS=y
++CONFIG_PM_WAKELOCKS_LIMIT=100
++CONFIG_PM_WAKELOCKS_GC=y
 +CONFIG_PM=y
 +# CONFIG_PM_DEBUG is not set
 +# CONFIG_APM_EMULATION is not set
 +CONFIG_PM_OPP=y
 +CONFIG_PM_CLK=y
-+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
++CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
++CONFIG_CPU_PM=y
 +CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+# CONFIG_ARM_CPU_SUSPEND is not set
++CONFIG_ARM_CPU_SUSPEND=y
 +CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 +CONFIG_NET=y
 +
@@ -337296,6 +337360,7 @@ index 000000000000..5278f96ab816
 +# CONFIG_RCU_EQS_DEBUG is not set
 +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
 +# CONFIG_NOTIFIER_ERROR_INJECTION is not set
 +# CONFIG_FAULT_INJECTION is not set
 +# CONFIG_LATENCYTOP is not set
@@ -351791,6 +351856,22 @@ index 27f4d96258a2..6889e7e498ad 100644
  		   strchr.o strrchr.o                                 \
  		   testchangebit.o testclearbit.o testsetbit.o        \
  		   ashldi3.o ashrdi3.o lshrdi3.o muldi3.o             \
+diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S
+index 1712f132b80d..b83fdc06286a 100644
+--- a/arch/arm/lib/csumpartialcopyuser.S
++++ b/arch/arm/lib/csumpartialcopyuser.S
+@@ -85,7 +85,11 @@
+ 		.pushsection .text.fixup,"ax"
+ 		.align	4
+ 9001:		mov	r4, #-EFAULT
++#ifdef CONFIG_CPU_SW_DOMAIN_PAN
++		ldr	r5, [sp, #9*4]		@ *err_ptr
++#else
+ 		ldr	r5, [sp, #8*4]		@ *err_ptr
++#endif
+ 		str	r4, [r5]
+ 		ldmia	sp, {r1, r2}		@ retrieve dst, len
+ 		add	r2, r2, r1
 diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
 index 64111bd4440b..79a83f82e174 100644
 --- a/arch/arm/lib/memcpy.S
@@ -367151,10 +367232,10 @@ index 000000000000..464b0fa4a07d
 \ No newline at end of file
 diff --git a/arch/arm/mach-sstar/infinity6e/Kconfig b/arch/arm/mach-sstar/infinity6e/Kconfig
 new file mode 100755
-index 000000000000..b5bb384b4d5d
+index 000000000000..cf3950c2ddfa
 --- /dev/null
 +++ b/arch/arm/mach-sstar/infinity6e/Kconfig
-@@ -0,0 +1,18 @@
+@@ -0,0 +1,35 @@
 +config ARCH_INFINITY6E
 +    bool "SoC iNfinity6E (ARCH_MULTI_V7)" if ARCH_MULTI_V7
 +    select SOC_BUS
@@ -367173,16 +367254,36 @@ index 000000000000..b5bb384b4d5d
 +config SS_MIU_ARBITRATION
 +    bool "SigmaStar MIU arbitration"
 +    default y
++
++config SS_LOWPWR_STR
++    bool "SigmaStar STR (Suspend-to-RAM) in low-power state"
++    default y
++	depends on PM_SLEEP
++    help
++      Support STR (Suspend-to-RAM) in low-power state.
++      In that state, chip top is kept alive and most engines' clock are gated.
++      Also, part of ananlog blocks are powered off to saving more power.
++
++config SS_USB_LOWPWR_SUSPEND
++    bool "Support USB suspend to low power STR, and wake up by USB resume"
++    default y if USB_DWC3_GADGET
++	depends on SS_LOWPWR_STR
++    help
++      Support USB suspend to low-power mode STR (Suspend-to-RAM).
++      In that state, system can wake up in detecting USB resume signal.
 \ No newline at end of file
 diff --git a/arch/arm/mach-sstar/infinity6e/Makefile b/arch/arm/mach-sstar/infinity6e/Makefile
 new file mode 100755
-index 000000000000..f7995e4011ef
+index 000000000000..689b8dfcdeb6
 --- /dev/null
 +++ b/arch/arm/mach-sstar/infinity6e/Makefile
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,13 @@
 +CONFIG_SSTAR_CHIP_NAME := $(subst ",,$(CONFIG_SSTAR_CHIP_NAME))
 +EXTRA_CFLAGS      +=  -Idrivers/sstar/include
 +EXTRA_CFLAGS      +=  -Idrivers/sstar/include/$(CONFIG_SSTAR_CHIP_NAME)
++ifneq ($(CONFIG_SS_USB_LOWPWR_SUSPEND),)
++EXTRA_CFLAGS      +=  -Idrivers/usb/dwc3
++endif
 +
 +obj-y += soc.o
 +obj-$(CONFIG_PM_SLEEP) += pm.o
@@ -367190,7 +367291,6 @@ index 000000000000..f7995e4011ef
 +obj-y += miu_bw.o
 +obj-$(CONFIG_SMP) += smp_platform.o smp_head.o
 +obj-$(CONFIG_SS_MIU_ARBITRATION) += miu_arb.o
-\ No newline at end of file
 diff --git a/arch/arm/mach-sstar/infinity6e/miu_arb.c b/arch/arm/mach-sstar/infinity6e/miu_arb.c
 new file mode 100755
 index 000000000000..3ec2a87be2d4
@@ -368990,10 +369090,10 @@ index 000000000000..49a60cf090ee
 +
 diff --git a/arch/arm/mach-sstar/infinity6e/pm.c b/arch/arm/mach-sstar/infinity6e/pm.c
 new file mode 100755
-index 000000000000..56e63f98f2ac
+index 000000000000..f9740f6b921b
 --- /dev/null
 +++ b/arch/arm/mach-sstar/infinity6e/pm.c
-@@ -0,0 +1,117 @@
+@@ -0,0 +1,431 @@
 +/*
 +* pm.c- Sigmastar
 +*
@@ -369019,7 +369119,15 @@ index 000000000000..56e63f98f2ac
 +#include "ms_platform.h"
 +#include <linux/delay.h>
 +#include <asm/secure_cntvoff.h>
-+
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++#include "voltage_ctrl.h"
++#include "registers.h"
++#if IS_ENABLED(CONFIG_SS_USB_LOWPWR_SUSPEND)
++#include <linux/of_platform.h>
++#include <linux/platform_device.h>
++#include "core.h"
++#endif
++#endif
 +
 +#define FIN     printk(KERN_ERR"[%s]+++\n",__FUNCTION__)
 +#define FOUT    printk(KERN_ERR"[%s]---\n",__FUNCTION__)
@@ -369036,15 +369144,289 @@ index 000000000000..56e63f98f2ac
 +    unsigned int password;
 +} suspend_keep_info;
 +
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++typedef struct {
++    u32 reg;    // register address
++    u16 mask;   // mask
++    u16 val;    // register value
++} reg_save;
++
++static reg_save clkgen[] = {
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_03, .mask = 0x0101 },  // bist_sc_vhe_gp
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_05, .mask = 0x0101 },  // bist_ipu_usb3_gp
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_31, .mask = 0x0101 },  // uart
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_32, .mask = 0x0001 },  // spi_arb
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_33, .mask = 0x1101 },  // mspi
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_34, .mask = 0x0101 },  // fuart
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_37, .mask = 0x1101 },  // miic
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_38, .mask = 0x0101 },  // spi_flash_pwm
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_42, .mask = 0x0001 },  // emac_ahb
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_43, .mask = 0x0001 },  // sd
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_44, .mask = 0x0001 },  // ecc
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_45, .mask = 0x0001 },  // sdio
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_50, .mask = 0x0101 },  // ipu
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_52, .mask = 0x0001 },  // dip
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_53, .mask = 0x0001 },  // ldc
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_54, .mask = 0x0101 },  // bt656
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_58, .mask = 0x0101 },  // cis
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_59, .mask = 0x0101 },  // cis
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_5A, .mask = 0x0101 },  // cis
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_5B, .mask = 0x0101 },  // cis
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_5C, .mask = 0x0101 },  // cis
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_60, .mask = 0x0001 },  // bdma
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_61, .mask = 0x0101 },  // aesdma_isp
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_62, .mask = 0x0101 },  // sr0
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_63, .mask = 0x0001 },  // idclk
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_64, .mask = 0x0001 },  // fclk1
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_65, .mask = 0x0101 },  // sr_mclk
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_66, .mask = 0x0001 },  // odclk
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_68, .mask = 0x0081 },  // vhe
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_69, .mask = 0x0001 },  // mfe
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_6A, .mask = 0x0181 },  // jpe_ive
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_6B, .mask = 0x0101 },  // ns
++    { .reg = BASE_REG_CLKGEN_PA + REG_ID_6C, .mask = 0x0101 },  // csi_mac
++};
++
++#define BASE_REG_AUSDM_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103400)
++#define BASE_REG_EPHY1_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x151500)
++#define BASE_REG_EPHY2_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x151600)
++#define BASE_REG_UTMI_PA    GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142100)
++#define BASE_REG_U3PHYD_PA  GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x152300)
++#define BASE_REG_U3PHYA0_PA GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x152400)
++
++static reg_save ana_blk[] = {
++    /* eth */
++    { .reg = BASE_REG_EPHY2_PA + REG_ID_78, .mask = 0x3c00 },   // [10]: PD_TX_VBGR     [11]: PD_TX_TRIMMING_DAC
++                                                                // [12]: PD_TX_LD_DIO   [13]: PD_TX_LDO
++    { .reg = BASE_REG_EPHY2_PA + REG_ID_79, .mask = 0x0F80 },
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_1F, .mask = 0x4000 },
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_5B, .mask = 0x1000 },   // [12]: PD_ADC
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_66, .mask = 0x0010 },   // [ 4]: PD_ETHPLL_REG
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_7E, .mask = 0x0100 },   // [ 0]: PD_LDO11
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_69, .mask = 0xC000 },   // [15]: TX_OFF         [14]: LPF_INOFF
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_6A, .mask = 0x0020 },   // [ 5]: PD_LPF_OP
++    { .reg = BASE_REG_EPHY2_PA + REG_ID_50, .mask = 0xB000 },   // [12]: PD_LPF_VBUF    [13]: PD_SADC
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_5D, .mask = 0x4000 },   // [14]: PD_REF
++    { .reg = BASE_REG_EPHY1_PA + REG_ID_7E, .mask = 0x0002 },   // [ 1]: PD_REG25
++    { .reg = BASE_REG_EPHY2_PA + REG_ID_44, .mask = 0x0010 },   // [ 4]: RX_OFF
++    { .reg = BASE_REG_EPHY2_PA + REG_ID_1D, .mask = 0x0003 },   // [ 0]: PD_TX_LD       [ 1]: PD_TX_IDAC
++    /* aud */
++    { .reg = BASE_REG_AUSDM_PA + REG_ID_03, .mask = 0x1FF7 },
++};
++
++static int demander_vol[VOLTAGE_DEMANDER_MAX] = {0, };
++static bool lpll_en     = false;
++static bool venpll_en   = false;
++static bool ipupll_en   = false;
++#endif
++
 +extern void sram_suspend_imi(void);
-+static void (*mstar_suspend_imi_fn)(void);
++static void (*sstar_suspend_imi_fn)(void);
 +static void __iomem *suspend_imi_vbase;
 +static suspend_keep_info *pStr_info;
 +int suspend_status = SUSPEND_WAKEUP;
 +
-+static int mstar_suspend_ready(unsigned long ret)
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++#if IS_ENABLED(CONFIG_SS_USB_LOWPWR_SUSPEND)
++
++static struct dwc3 *dwc = NULL;
++
++static void phy_pipe3_suspend(void)
 +{
-+    mstar_suspend_imi_fn = fncpy(suspend_imi_vbase, (void*)&sram_suspend_imi, 0x1000);
++    u32 tx_frq_lo = INREG16(BASE_REG_U3PHYA0_PA + (0x40 << 2));
++    u32 tx_frq_hi = INREG16(BASE_REG_U3PHYA0_PA + (0x41 << 2));
++
++    SETREG16(BASE_REG_U3PHYA0_PA + (0x30 << 2), BIT(0)); //pd_rxpll
++
++    //Synthesizer output clock 62.5Mhz(x37_6D4E)
++    CLRREG16(BASE_REG_U3PHYA0_PA + (0x44 << 2), BIT(0));
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x40 << 2), 0x6D4E);
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x41 << 2), 0x0037);
++    SETREG16(BASE_REG_U3PHYA0_PA + (0x30 << 2), BIT(0));
++    //pre-setting restore:
++    CLRREG16(BASE_REG_U3PHYA0_PA + (0x44 << 2), BIT(0));
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x40 << 2), tx_frq_lo);
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x41 << 2), tx_frq_hi);
++}
++
++static void phy_pipe3_wakeup(void)
++{
++    CLRREG16(BASE_REG_U3PHYD_PA + (0xA << 2), BIT(13)); // Force DA_PCIE_SIGDET_CAL_OFFSET value
++    // enable AFE
++    CLRREG16(BASE_REG_U3PHYD_PA + (0xD << 2), BIT(14));
++    SETREG16(BASE_REG_U3PHYD_PA + (0x3C << 2), BIT(0));
++
++    //pd_txpll, pd_rxpll.
++    CLRREG16(BASE_REG_U3PHYA0_PA + (0x20 << 2), BIT(0));
++    CLRREG16(BASE_REG_U3PHYA0_PA + (0x30 << 2), BIT(0));
++
++    //TXPLL SYN_IN/XTAL_IN OFF ...
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x10 << 2), 0x0000);
++    OUTREGMSK16(BASE_REG_U3PHYA0_PA + (0x11 << 2), 0, ~(BIT(5)));
++
++    // Enable Bandgap
++    CLRREG16(BASE_REG_U3PHYD_PA + (0x51 << 2), BIT(15));
++    CLRREG16(BASE_REG_U3PHYD_PA + (0x8 << 2), (BIT(1)|BIT(0)));
++    SETREG16(BASE_REG_U3PHYD_PA + (0x0 << 2), (BIT(1)|BIT(0)));
++}
++
++static void phy_pipe3_shutdown(void)
++{
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x10 << 2), BIT(5)|BIT(4));
++    OUTREG16(BASE_REG_U3PHYA0_PA + (0x11 << 2), BIT(15));
++
++    //pd_txpll, pd_rxpll.
++    SETREG16(BASE_REG_U3PHYA0_PA + (0x20 << 2), BIT(0));
++    SETREG16(BASE_REG_U3PHYA0_PA + (0x30 << 2), BIT(0));
++
++    SETREG16(BASE_REG_U3PHYD_PA + (0x0 << 2), (BIT(1)|BIT(0)));
++    SETREG16(BASE_REG_U3PHYD_PA + (0x8 << 2), (BIT(1)|BIT(0)));
++    CLRREG16(BASE_REG_U3PHYD_PA + (0x51 << 2), BIT(15));
++}
++
++static void phy_utmi_suspend(void)
++{
++    OUTREG16(BASE_REG_UTMI_PA + (0x4 << 2), 0x8D2F);
++    OUTREGMSK16(BASE_REG_UTMI_PA + (0x0 << 2), 0xEF05, ~(BIT(1)));
++}
++
++static void phy_utmi_wakeup(void)
++{
++    OUTREG16(BASE_REG_UTMI_PA + (0x4 << 2), 0x8D2F);
++    OUTREGMSK16(BASE_REG_UTMI_PA + (0x0 << 2), 0x1, ~(BIT(1)));
++}
++
++static void phy_utmi_shutdown(void)
++{
++    OUTREG16(BASE_REG_UTMI_PA + (0x4 << 2), BIT(7));
++    OUTREGMSK16(BASE_REG_UTMI_PA + (0x0 << 2), 0x7F05, ~(BIT(1)));
++}
++#endif
++
++static void sstar_analog_pwroff(void)
++{
++    int i, cnt = 0;
++
++    cnt = sizeof(ana_blk) / sizeof(reg_save);
++    for(i = 0; i < cnt; i++) {
++        ana_blk[i].val = INREG16(ana_blk[i].reg);
++        SETREG16(ana_blk[i].reg, ana_blk[i].mask);
++    }
++}
++
++static void sstar_analog_pwron(void)
++{
++    int i, cnt = 0;
++
++    cnt = sizeof(ana_blk) / sizeof(reg_save);
++    for(i = 0; i < cnt; i++) {
++        OUTREG16(ana_blk[i].reg, ana_blk[i].val);
++    }
++}
++
++static void sstar_enter_lowpwr(void)
++{
++    int i, cnt = 0;
++
++    // power down part of analog blocks
++    sstar_analog_pwroff();
++
++    // slow down IP to MIU clock rate
++    for(i = 0; i < 0x10; i++) {
++        SETREG16(BASE_REG_MCM_SC_GP_PA + BK_REG(i), 0xF0F0);
++    }
++    // save clock settings & gate clock
++    cnt = sizeof(clkgen) / sizeof(reg_save);
++    for(i = 0; i < cnt; i++) {
++        clkgen[i].val = INREG16(clkgen[i].reg);
++        SETREG16(clkgen[i].reg, clkgen[i].mask);
++    }
++
++#if IS_ENABLED(CONFIG_SS_USB_LOWPWR_SUSPEND)
++    if (dwc) {
++        if (dwc->gadget.speed >= USB_SPEED_SUPER) {
++            phy_utmi_shutdown();
++            phy_pipe3_suspend();
++        }
++        else {
++            phy_utmi_suspend();
++            phy_pipe3_shutdown();
++        }
++    }
++#endif
++
++    // power down pll
++    lpll_en = venpll_en = ipupll_en = false;
++    if (0 == (INREG16(BASE_REG_LPLL_PA + REG_ID_40) & 0x8000)) {
++        lpll_en = true;
++        SETREG16(BASE_REG_LPLL_PA + REG_ID_40, 0x8000);     // power down = 1b'1
++    }
++    if (0 == (INREG16(BASE_REG_VENPLL_PA + REG_ID_01) & 0x0100)) {
++        venpll_en = true;
++        SETREG16(BASE_REG_VENPLL_PA + REG_ID_01, 0x0100);   // power down = 1b'1
++    }
++    if (0x80 == (INREG16(BASE_REG_IPUPLL_PA + REG_ID_11) & 0x0180)) {
++        /* don't power up ipupll in leave low power.
++         * ipu handle ipupll in its driver already. */
++        //ipupll_en = true;
++        CLRREG16(BASE_REG_IPUPLL_PA + REG_ID_11, 0x0080);   // en clk = 1b'0
++        SETREG16(BASE_REG_IPUPLL_PA + REG_ID_11, 0x0100);   // power down = 1b'1
++    }
++    // save voltage level of each demander, force V-core to 0.85V
++    for(i = 0; i < VOLTAGE_DEMANDER_MAX; i++) {
++        demander_vol[i] = get_core_voltage_of_demander(i);
++        if (demander_vol[i] != 0) {
++            set_core_voltage(i, VOLTAGE_CORE_850);
++        }
++    }
++}
++
++static void sstar_leave_lowpwr(void)
++{
++    int i, cnt = 0;
++
++    // restore voltage level of each demander
++    for(i = 0; i < VOLTAGE_DEMANDER_MAX; i++) {
++        if (demander_vol[i] != 0) {
++            set_core_voltage(i, demander_vol[i]);
++        }
++    }
++    // power up pll
++    if (lpll_en) {
++        CLRREG16(BASE_REG_LPLL_PA + REG_ID_40, 0x8000);     // power down = 1b'0
++    }
++    if (venpll_en) {
++        CLRREG16(BASE_REG_VENPLL_PA + REG_ID_01, 0x0100);   // power down = 1b'0
++    }
++    if (ipupll_en) {
++        CLRREG16(BASE_REG_IPUPLL_PA + REG_ID_11, 0x0100);   // power down = 1b'0
++        SETREG16(BASE_REG_IPUPLL_PA + REG_ID_11, 0x0080);   // en clk = 1b'1
++    }
++
++#if IS_ENABLED(CONFIG_SS_USB_LOWPWR_SUSPEND)
++    if (dwc) {
++        phy_utmi_wakeup();
++        phy_pipe3_wakeup();
++    }
++#endif
++
++    // restore clock
++    cnt = sizeof(clkgen) / sizeof(reg_save);
++    for(i = 0; i < cnt; i++) {
++        OUTREG16(clkgen[i].reg, clkgen[i].val);
++    }
++    // restore IP to MIU clock rate
++    for(i = 0; i < 0x10; i++) {
++        CLRREG16(BASE_REG_MCM_SC_GP_PA + BK_REG(i), 0xF0F0);
++    }
++    // power up part of analog blocks
++    sstar_analog_pwron();
++}
++#endif
++
++static int sstar_suspend_ready(unsigned long ret)
++{
++    sstar_suspend_imi_fn = fncpy(suspend_imi_vbase, (void*)&sram_suspend_imi, 0x1000);
 +    suspend_status = SUSPEND_SLEEP;
 +
 +    //resume info
@@ -369053,24 +369435,56 @@ index 000000000000..56e63f98f2ac
 +        pStr_info->status = SUSPEND_SLEEP;
 +        pStr_info->password = STR_PASSWORD;
 +    }
++
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++    sstar_enter_lowpwr();
++#endif
 +    //flush cache to ensure memory is updated before self-refresh
 +    __cpuc_flush_kern_all();
 +    //flush L3 cache
 +    Chip_Flush_MIU_Pipe();
 +    //flush tlb to ensure following translation is all in tlb
 +    local_flush_tlb_all();
-+    mstar_suspend_imi_fn();
++
++    sstar_suspend_imi_fn();
++
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++    sstar_leave_lowpwr();
++#endif
 +    return 0;
 +}
 +
-+static int mstar_suspend_enter(suspend_state_t state)
++static int sstar_suspend_enter(suspend_state_t state)
 +{
++#if IS_ENABLED(CONFIG_SS_USB_LOWPWR_SUSPEND)
++    static u8 once = 0;
++
 +    //FIN;
++    if (!dwc && !once) {
++        struct device_node *dev_node;
++        struct platform_device *pdev;
++
++        once = 1; // get dwc driver data once after boot
++        dev_node = of_find_compatible_node(NULL, NULL, "snps,dwc3");
++
++        if (!dev_node)
++            return -ENODEV;
++
++        pdev = of_find_device_by_node(dev_node);
++        if (pdev)
++        {
++            dwc = platform_get_drvdata(pdev);
++            printk("dwc %px, speed: %d\n", dwc, dwc->gadget.speed);
++            of_node_put(dev_node);
++        }
++    }
++#endif
++
 +    switch (state)
 +    {
 +        case PM_SUSPEND_MEM:
 +            printk(KERN_INFO "state = PM_SUSPEND_MEM\n");
-+            cpu_suspend(0, mstar_suspend_ready);
++            cpu_suspend(0, sstar_suspend_ready);
 +            #ifdef CONFIG_SMP
 +            secure_cntvoff_init();
 +            #endif
@@ -369082,7 +369496,7 @@ index 000000000000..56e63f98f2ac
 +    return 0;
 +}
 +
-+static void mstar_suspend_wake(void)
++static void sstar_suspend_wake(void)
 +{
 +    if (pStr_info) {
 +        pStr_info->status = SUSPEND_WAKEUP;
@@ -369090,9 +369504,9 @@ index 000000000000..56e63f98f2ac
 +    }
 +}
 +
-+struct platform_suspend_ops mstar_suspend_ops = {
-+    .enter    = mstar_suspend_enter,
-+    .wake     = mstar_suspend_wake,
++struct platform_suspend_ops sstar_suspend_ops = {
++    .enter    = sstar_suspend_enter,
++    .wake     = sstar_suspend_wake,
 +    .valid    = suspend_valid_only_mem,
 +};
 +
@@ -369106,7 +369520,7 @@ index 000000000000..56e63f98f2ac
 +    strcpy(pStr_info->magic, "SIG_STR");
 +    pStr_info->resume_entry = resume_pbase;
 +
-+    suspend_set_ops(&mstar_suspend_ops);
++    suspend_set_ops(&sstar_suspend_ops);
 +
 +    printk(KERN_INFO "[%s] resume_pbase=0x%08X, suspend_imi_vbase=0x%08X\n", __func__, (unsigned int)resume_pbase, (unsigned int)suspend_imi_vbase);
 +    return 0;
@@ -370288,10 +370702,10 @@ index 000000000000..8bbee25b82d7
 +MACHINE_END
 diff --git a/arch/arm/mach-sstar/infinity6e/sram.S b/arch/arm/mach-sstar/infinity6e/sram.S
 new file mode 100755
-index 000000000000..3ad15bef7347
+index 000000000000..157fe2cc4642
 --- /dev/null
 +++ b/arch/arm/mach-sstar/infinity6e/sram.S
-@@ -0,0 +1,341 @@
+@@ -0,0 +1,463 @@
 +/*
 +* sram.S- Sigmastar
 +*
@@ -370328,124 +370742,148 @@ index 000000000000..3ad15bef7347
 +    l : For different branch naming
 +*/
 +.macro arch_usdelay t, l
-+    ldr   r8, =ARCH_us(\t)      /*delay tms*/
-+    mrrc  p15, 1, r9, r10, c14
-+    add   r9, r9, r8            /*Target tick*/
++    ldr   r8, =ARCH_us(\t)      /* delay tms */
++    mrrc  p15, 0, r9, r10, cr14
++    adds  r9, r9, r8            /* Target tick */
++    adc   r10, r10, #0x00       /* Add with carry instruction */
 +delay_retry\l:
 +    isb sy
-+    mrrc  p15, 1, r11, r12, c14
-+    cmp   r11, r9
-+    blt   delay_retry\l         /* jump to delay_retry in case r0 is bigger (N==1) */
++    mrrc  p15, 0, r11, r12, cr14
++    cmp   r12, r10              /* compare MSB part*/
++    blt   delay_retry\l         /* jump to delay_retry in case r10 is bigger (N==1) */
++    cmp   r11, r9               /* compare LSB part*/
++    blt   delay_retry\l         /* jump to delay_retry in case r9 is bigger (N==1) */
++.endm
++
++////RREG_B
++.macro  RREG_B  ret, reg
++    ldr   r7, =\reg
++    ldrb  \ret, [r7]
++.endm
++
++////RREG_W
++.macro  RREG_W  ret, reg
++    ldr   r7, =\reg
++    ldr   \ret, [r7]
++.endm
++
++////WREG_B
++.macro  WREG_B  reg, mask, val
++    ldr   r7, =\reg
++    ldr   r8, =\mask
++    ldr   r9, =\val
++    ldrb  r6, [r7]
++    bic   r6, r8
++    orr   r6, r9
++    strb  r6, [r7]
++.endm
++
++////WREG_W
++.macro  WREG_W  reg, val
++    ldr   r6, =\reg
++    ldr   r7, =\val
++    str   r7, [r6]
++.endm
++
++////MBOX
++.macro  MBOX  val
++    WREG_W  0xfd200800, \val
 +.endm
 +
 +ENTRY(sram_suspend_imi)
++    stmfd  sp!, {r0-r10, lr}
 +
++miu_mask:
++    // MBOX    0x5001
 +    // 04. LPDDR2 enter self-refresh
-+    //wriu -w   0x1012e0,0x0000
-+    //wriu -w   0x101246,0xFFFE
-+    //wriu -w   0x101266,0xFFFF
-+    //wriu -w   0x101286,0xFFFF
-+    //wriu -w   0x1012A6,0xFFFF
-+    //wriu -w   0x1011E6,0x00FE
-+    //wait 20
++    WREG_W  0xfd2025c0, 0x0000      //wriu -w   0x1012e0,0x0000
++    WREG_W  0xfd20248c, 0xFFFE      //wriu -w   0x101246,0xFFFE
++    WREG_W  0xfd2024cc, 0xFFFF      //wriu -w   0x101266,0xFFFF
++    WREG_W  0xfd20250c, 0xFFFF      //wriu -w   0x101286,0xFFFF
++    WREG_W  0xfd20254c, 0xFFFF      //wriu -w   0x1012A6,0xFFFF
++    WREG_W  0xfd2023cc, 0x00FE      //wriu -w   0x1011E6,0x00FE
++    // wait 20
++    arch_usdelay 100,__LINE__
 +
-+    ldr   r1, =0xFD000000
-+    ldr   r3, =0x101200
-+    ldr   r4, =0x101100
-+    ldr   r5, =0x101000
-+    add   r2, r1, r3, lsl #1
-+    ldr   r0, =0x0000
-+    str   r0, [r2, #0xE0 << 1]
-+    ldr   r0, =0xFFFE
-+    str   r0, [r2, #0x46 << 1]
-+    ldr   r0, =0xFFFF
-+    str   r0, [r2, #0x66 << 1]
-+    str   r0, [r2, #0x86 << 1]
-+    str   r0, [r2, #0xA6 << 1]
-+    add   r2, r1, r4, lsl #1
-+    ldr   r0, =0x00FE
-+    str   r0, [r2, #0xE6 << 1]
-+    //delay
-+    arch_usdelay 1000,__LINE__
++dram_precharge_all:
++    // MBOX    0x5002
++    // Pre-charge all then one refresh
++    WREG_W  0xfd202430, 0x0400      //wriu -w   0x101218  0x0400
++    WREG_B  0xfd202400, 0x30, 0x20  //wriu -b   0x101200  0x30 0x20
++    WREG_B  0xfd202401, 0x1e, 0x04  //wriu -b   0x101201  0x1e 0x04
++    WREG_B  0xfd202401, 0x01, 0x00  //wriu -b   0x101201  0x01 0x00
++    WREG_B  0xfd202401, 0x01, 0x01  //wriu -b   0x101201  0x01 0x01
++    WREG_B  0xfd202401, 0x01, 0x00  //wriu -b   0x101201  0x01 0x00
++    WREG_B  0xfd202401, 0x1e, 0x02  //wriu -b   0x101201  0x1e 0x02
++    WREG_B  0xfd202401, 0x01, 0x00  //wriu -b   0x101201  0x01 0x00
++    WREG_B  0xfd202401, 0x01, 0x01  //wriu -b   0x101201  0x01 0x01
++    WREG_B  0xfd202401, 0x01, 0x00  //wriu -b   0x101201  0x01 0x00
++    // delay, DO NOT REMOVE THIS DELAY!!!!
++    arch_usdelay 100,__LINE__
 +
-+    //Pre-charge all then one refresh
-+    //wriu -w   0x101218  0x0400
-+    add   r2, r1, r3, lsl #1
-+    ldr   r0, =0x0400
-+    str   r0, [r2, #0x18 << 1]
-+    //wriu -b   0x101200  0x30 0x20
-+    ldrb  r0, [r2, #0x00]
-+    and   r0, r0, #0xCF
-+    orr   r0, r0, #0x20
-+    strb  r0, [r2, #0x00]
-+    //wriu -b   0x101201  0x1e 0x04
-+    ldrb  r0, [r2, #0x01]
-+    and   r0, r0, #0xE1
-+    orr   r0, r0, #0x04
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x01 0x00
-+    ldrb  r0, [r2, #0x01]
-+    and   r0, r0, #0xFE
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x01 0x01
-+    ldrb  r0, [r2, #0x01]
-+    orr   r0, r0, #0x01
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x01 0x00
-+    ldrb  r0, [r2, #0x01]
-+    and   r0, r0, #0xFE
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x1e 0x02
-+    ldrb  r0, [r2, #0x01]
-+    and   r0, r0, #0xE1
-+    orr   r0, r0, #0x02
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x01 0x00
-+    ldrb  r0, [r2, #0x01]
-+    and   r0, r0, #0xFE
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x01 0x01
-+    ldrb  r0, [r2, #0x01]
-+    orr   r0, r0, #0x01
-+    strb  r0, [r2, #0x01]
-+    //wriu -b   0x101201  0x01 0x00
-+    ldrb  r0, [r2, #0x01]
-+    and   r0, r0, #0xFE
-+    strb  r0, [r2, #0x01]
-+    //delay, DO NOT REMOVE THIS DELAY!!!!
-+    arch_usdelay 1000,__LINE__
-+
-+    //wriu -w   0x101200  0x202e
-+    ldr   r0, =0x202e
-+    str   r0, [r2, #0x00 << 1]
-+    //wait 10
-+    //delay
-+    arch_usdelay 1000,__LINE__
++dram_enter_self_refresh:
++    // MBOX    0x5003
++    WREG_W  0xfd202400, 0x202e      //wriu -w   0x101200  0x202e
++    // wait 10
++    arch_usdelay 10,__LINE__
 +
++ana_pwr_down:
++    // MBOX    0x5004
 +    // 05. AN power down
-+    //wriu -b 0x101203 0xF0 0xF0
-+    ldrb  r0, [r2, #0x05]
-+    orr   r0, r0, #0xF0
-+    strb  r0, [r2, #0x05]
-+    //wriu -b 0x101000 0x08 0x08
-+    //wriu -b 0x101000 0x10 0x10
-+    add   r2, r1, r5, lsl #1
-+    ldrb  r0, [r2, #0x00 << 1]
-+    orr   r0, r0, #0x08
-+    strb  r0, [r2, #0x00 << 1]
-+    ldrb  r0, [r2, #0x00 << 1]
-+    orr   r0, r0, #0x10
-+    strb  r0, [r2, #0x00 << 1]
-+    //wriu -b 0x101054 0x70 0x70
-+    ldrb  r0, [r2, #0xA8]
-+    orr   r0, r0, #0x70
-+    strb  r0, [r2, #0xA8]
-+    //wriu -b 0x101008 0x3F 0x00
-+    ldrb  r0, [r2, #0x10]
-+    and   r0, r0, #0xC0
-+    strb  r0, [r2, #0x10]
++    WREG_B  0xfd202405, 0xf0, 0xf0  //wriu -b   0x101203 0xF0 0xF0
++    WREG_B  0xfd202000, 0x08, 0x08  //wriu -b   0x101000 0x08 0x08
++    WREG_B  0xfd202000, 0x10, 0x10  //wriu -b   0x101000 0x10 0x10
++    WREG_B  0xfd202001, 0x60, 0x60  //wriu -b   0x101001 0x60 0x60 // sel gpio=1
++    WREG_B  0xfd202031, 0x20, 0x20  //wriu -b   0x101019 0x20 0x20 // set gpio_dft_mode 1
++    WREG_B  0xfd202031, 0x60, 0x60  //wriu -b   0x101019 0x60 0x60 // sel gpio_dft_mode
++    // ATOP_PD
++    WREG_B  0xfd2010a8, 0x70, 0x70  //wriu -b   0x101054 0x70 0x70
++    // rx disable
++    WREG_B  0xfd202010, 0x3f, 0x00  //wriu -b   0x101008 0x3f 0x00
 +
-+     // 06. power down
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++clk_to_xtal:
++    // MBOX    0x5005
++    // ckg_mcu switch to xtal
++    WREG_B  0xfd207004, 0x10, 0x00  //wriu -b   0x103802 0x10 0x00
++    // ckg_miu switch to xtal
++    WREG_B  0xfd20705c, 0x10, 0x00  //wriu -b   0x10382e 0x10 0x00
++    // ckg_ddr_sync switch to xtal
++    WREG_B  0xfd207064, 0x0c, 0x08  //wriu -b   0x103832 0x0c 0x08
++    // ARM clock switch to xtal
++    WREG_B  0xfd2041f0, 0x01, 0x00  //wriu -b   0x1020f8 0x01 0x00
++
++pll_pwr_down:
++    // MBOX    0x5006
++    // armpll power down 0x103222 bit[8:7]
++    // bit[7] reg_mipspll_en_cpuclk = 0
++    // bit[8] reg_mipspll_pd = 1
++    WREG_B  0xfd206444, 0x80, 0x00  //wriu -b   0x103222 0x80 0x00
++    WREG_B  0xfd206445, 0x01, 0x01  //wriu -b   0x103223 0x01 0x01
++    // miupll power down 0x103102 bit[8]
++    // bit[8] reg_miu_128bus_pll_pd = 1
++    WREG_B  0xfd206205, 0x01, 0x01  //wriu -b   0x103103 0x01 0x01
++
++wait_event:
++    // MBOX    0x5007
++#if !IS_ENABLED(CONFIG_SS_USB_LOWPWR_SUSPEND)
++    // as an example: polling PAD_PM_I2CM_SCL till low
++    RREG_B  r0, 0xfd007e44
++    and     r0, r0, #0x01
++    cmp     r0, #0
++#else
++    // polling usb link state till not suspend
++    RREG_W  r0, 0xfd34470C
++    mov     r0, r0, lsr #18
++    and     r0, r0, #0x0F
++    cmp     r0, #0x03 // stil in U3/suspend state?
++    beq     wait_event
++    bl      low_pwr_resume
++#endif
++
++#else
++chip_pwr_down:
++    // 06. power down
 +    //wriu -w   0x00003408 0x01
 +    //wriu -w   0x00003400 0x20
 +    // Turn-on ISO flow
@@ -370486,7 +370924,7 @@ index 000000000000..3ad15bef7347
 +    //ldr   r0, =0x0480
 +    //str   r0, [r2, #0x52 << 1]
 +
-+    //[MUST] t2+t3+t4 > 55ms from scope measurment
++    // [MUST] t2+t3+t4 > 55ms from scope measurment
 +    // timer2 DEF:x0080 (x0080/32K=4 ms)
 +    ldr   r0, =0x0000
 +    str   r0, [r2, #0x54 << 1]
@@ -370624,16 +371062,113 @@ index 000000000000..3ad15bef7347
 +    and   r0, r0, #0x08
 +    cmp   r0, #0
 +    bne   7b
++#endif
 +
++#if IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++
++//--- [LOW POWER MODE RESUME] ---
++low_pwr_resume:
++    // MBOX    0xA001
 +    nop
 +    nop
 +    nop
 +    nop
 +
++pll_pwr_on:
++    // MBOX    0xA002
++    // miupll power on 0x103102 bit[8]
++    // bit[8] reg_miu_128bus_pll_pd = 0
++    WREG_B  0xfd206205, 0x01, 0x00  //wriu -b   0x103103 0x01 0x00
++    arch_usdelay 250,__LINE__
++    // MBOX    0xA003
++    // armpll power on 0x103222 bit[8:7]
++    // bit[8] reg_mipspll_pd = 0
++    // bit[7] reg_mipspll_en_cpuclk = 1
++    WREG_B  0xfd206445, 0x01, 0x00  //wriu -b   0x103223 0x01 0x00
++    WREG_B  0xfd206444, 0x80, 0x80  //wriu -b   0x103222 0x80 0x80
++
++clk_restore:
++    // MBOX    0xA004
++    // ckg_mcu switch to 432M
++    WREG_B  0xfd207004, 0x10, 0x10  //wriu -b   0x103802 0x10 0x10
++    // ckg_miu switch to miupll
++    WREG_B  0xfd20705c, 0x10, 0x10  //wriu -b   0x103817 0x10 0x10
++    // ckg_ddr_sync switch to 432M
++    WREG_B  0xfd207064, 0x0c, 0x00  //wriu -b   0x103819 0x0c 0x00
++    // ARM clock switch to armpll
++    WREG_B  0xfd2041f0, 0x01, 0x01  //wriu -b   0x1020f8 0x01 0x01
++
++ana_pwr_on:
++    // MBOX    0xA005
++    // AN power on
++    //Not sel gpio mode
++    WREG_B  0xfd202000, 0x08, 0x08  //wriu -b   0x101000 0x08 0x08 // gpio oenz=1
++    WREG_B  0xfd202000, 0x10, 0x00  //wriu -b   0x101000 0x10 0x00 // sel gpio=0
++    WREG_B  0xfd202001, 0x60, 0x00  //wriu -b   0x101001 0x60 0x00 // sel gpio=0
++    WREG_B  0xfd202031, 0x20, 0x20  //wriu -b   0x101019 0x20 0x20 // set gpio_dft_mode 1
++    WREG_B  0xfd202031, 0x60, 0x20  //wriu -b   0x101019 0x60 0x20 // sel gpio_dft_mode=0
++
++    arch_usdelay 100,__LINE__
++
++    // Disable OENZ
++    WREG_B  0xfd202405, 0xf0, 0x00  //wriu -b   0x101203 0xf0 0x00
++    // ATOP_PD on
++    WREG_B  0xfd2010a8, 0x70, 0x00  //wriu -b   0x101054 0x70 0x00
++    // rx enable
++    WREG_B  0xfd202010, 0x3f, 0x3f  //wriu -b   0x101008 0x3f 0x3f // DDR3
++    //-----------
++    // DQSM RST
++    //-----------
++    WREG_W  0xfd20203c, 0x0005      //wriu -w   0x10101e  0x0005
++    WREG_W  0xfd20203c, 0x000f      //wriu -w   0x10101e  0x000f
++    WREG_W  0xfd20203c, 0x0005      //wriu -w   0x10101e  0x0005
++
++dram_exit_self_refresh:
++    // MBOX    0xA006
++    //---------------------------
++    // Exit self-refresh
++    //---------------------------
++    WREG_B  0xfd202401, 0x20, 0x00  //wriu -b   0x101201  0x20 0x00 //[13]   : reg_self_refresh  = 0
++    WREG_W  0xfd2023cc, 0x00fe      //wriu -w   0x1011e6  0x00fe
++
++    //------------------------------------------
++    // Insert Refresh cmd & Trun on auto-refresh
++    //------------------------------------------
++    WREG_B  0xfd202401, 0x1e, 0x02  //wriu -b   0x101201  0x1e 0x02 //[12:9] : reg_single_cmd    = 1 (refresh)
++    WREG_B  0xfd202401, 0x01, 0x00  //wriu -b   0x101201  0x01 0x00 //[8]    : reg_single_cmd_en = 0
++    WREG_B  0xfd202401, 0x01, 0x01  //wriu -b   0x101201  0x01 0x01 //[8]    : reg_single_cmd_en = 1
++    WREG_B  0xfd202401, 0x01, 0x00  //wriu -b   0x101201  0x01 0x00 //[8]    : reg_single_cmd_en = 0
++    WREG_B  0xfd202400, 0x30, 0x00  //wriu -b   0x101200  0x30 0x00 //[05]   : reg_auto_ref_off  = 0
++                                                                    //[04]   : reg_odt           = 0
++    arch_usdelay 100,__LINE__
++
++    //---------------------------
++    // Enable ODT
++    //---------------------------
++    // WREG_B  0xfd202400, 0x10, 0x10  //wriu -b   0x101200  0x10 0x10 //[04]   : reg_odt           = 1
++    // arch_usdelay 100,__LINE__
++
++miu_unmask:
++    // MBOX    0xA007
++    //-------------------------
++    // unmask all
++    //-------------------------
++    // wriu -w 0x10121e  0x8c08 //DC : [3]for mi2ip handshake enable
++    // CLEAR above mark by jim
++    WREG_W  0xfd20243c, 0x8c08
++
++    WREG_W  0xfd20248c, 0x0000      //wriu -w   0x101246  0x0000
++    WREG_W  0xfd2024cc, 0x0000      //wriu -w   0x101266  0x0000
++    WREG_W  0xfd20250c, 0x0000      //wriu -w   0x101286  0x0000
++    WREG_W  0xfd20254c, 0x0000      //wriu -w   0x1012A6  0x0000
++    WREG_W  0xfd2023cc, 0x0000      //wriu -w   0x1011e6  0x0000
++
++    // MBOX    0xA008
++    ldmfd  sp!, {r0-r10, pc}
++#endif
 +
 +ENDPROC(sram_suspend_imi)
 +.ltorg
-\ No newline at end of file
 diff --git a/arch/arm/mach-sstar/libfdt.h b/arch/arm/mach-sstar/libfdt.h
 new file mode 100755
 index 000000000000..ea3e6df9f8ea
@@ -374961,66 +375496,115 @@ index 5e29fbd3a5a0..e0e24c8d0858 100644
 diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
 old mode 100644
 new mode 100755
-index 9b8079ca0fb4..f3c268b221f5
+index 9b8079ca0fb4..a5512531930f
 --- a/drivers/input/keyboard/gpio_keys.c
 +++ b/drivers/input/keyboard/gpio_keys.c
-@@ -33,6 +33,11 @@
+@@ -33,6 +33,14 @@
  #include <linux/of_irq.h>
  #include <linux/spinlock.h>
  
 +
 +#ifdef CONFIG_ARCH_SSTAR
-+int key_status;
++#define SSTAR_MAX_GPIO  128
++#define SSTAR_GPIO_KEY_STATE_INDEX(x) (x >> 5)
++/* bitmap to save gpio state */
++int key_status[SSTAR_MAX_GPIO/(sizeof(int)*8)] = {0};
 +#endif
 +
  struct gpio_button_data {
  	const struct gpio_keys_button *button;
  	struct input_dev *input;
-@@ -368,7 +373,26 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata)
- 			"failed to get gpio state: %d\n", state);
+@@ -357,18 +365,41 @@ static struct attribute_group gpio_keys_attr_group = {
+ 
+ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata)
+ {
+-	const struct gpio_keys_button *button = bdata->button;
+-	struct input_dev *input = bdata->input;
+-	unsigned int type = button->type ?: EV_KEY;
+-	int state;
+-
+-	state = gpiod_get_value_cansleep(bdata->gpiod);
+-	if (state < 0) {
+-		dev_err(input->dev.parent,
+-			"failed to get gpio state: %d\n", state);
++    const struct gpio_keys_button *button = bdata->button;
++    struct input_dev *input = bdata->input;
++    unsigned int type = button->type ?: EV_KEY;
++    int state;
++
++    state = gpiod_get_value_cansleep(bdata->gpiod);
++    if (state < 0) {
++        dev_err(input->dev.parent,
++                "failed to get gpio state: %d\n", state);
++        return;
++    }
++#ifdef CONFIG_ARCH_SSTAR
++    BUG_ON(button->gpio > SSTAR_MAX_GPIO);
++
++    //if(key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)]==state)
++
++    if( !(((key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] >> (button->gpio % sizeof(key_status[0]))) ^ state) & 0x1) )
++	{
++		pr_debug("false trigger, state: %d\n", state);
  		return;
  	}
-+#ifdef CONFIG_ARCH_SSTAR
-+	if(key_status==state)
-+	{
-+		pr_debug("false trigger");
-+		return;
-+	}
-+	key_status = state;
-+
-+	if(key_status)
+ 
++	if(state)
 +	{
 +		irq_set_irq_type(bdata->irq,IRQF_TRIGGER_RISING);
++		key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] |=  (1 << (button->gpio % sizeof(key_status[0])));
 +	}
 +	else
 +	{
 +		irq_set_irq_type(bdata->irq,IRQF_TRIGGER_FALLING);
-+			
++		key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] &=  ~(1 << (button->gpio % sizeof(key_status[0])));
 +	}
- 
++
 +	pr_debug("gpio_keys_gpio_report_event: code = %d state=%d\r\n", button->code, state);
 +#endif
  	if (type == EV_ABS) {
  		if (state)
  			input_event(input, type, button->code, button->value);
-@@ -529,8 +553,22 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
+@@ -389,6 +420,7 @@ static void gpio_keys_gpio_work_func(struct work_struct *work)
+ 		pm_relax(bdata->input->dev.parent);
+ }
+ 
++
+ static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id)
+ {
+ 	struct gpio_button_data *bdata = dev_id;
+@@ -476,6 +508,7 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
+ 	unsigned long irqflags;
+ 	int irq;
+ 	int error;
++	int state;
+ 
+ 	bdata->input = input;
+ 	bdata->button = button;
+@@ -529,8 +562,28 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
  		INIT_DELAYED_WORK(&bdata->work, gpio_keys_gpio_work_func);
  
  		isr = gpio_keys_gpio_isr;
 -		irqflags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
 +#ifdef CONFIG_ARCH_SSTAR
-+		key_status = gpiod_get_value_cansleep(bdata->gpiod);
-+		if (key_status < 0) {
++		state = gpiod_get_value_cansleep(bdata->gpiod);
++		if (state < 0) {
 +			dev_err(input->dev.parent,
-+				"failed to get gpio state: %d\n", key_status);
-+			return key_status;
++				"failed to get gpio state: %d\n", state);
++			return state;
++		}
+ 
++		if(state)
++		{
++			irqflags = IRQF_TRIGGER_RISING;
++			key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] |=  (1 << (button->gpio % sizeof(key_status[0])));
++		}
++		else
++		{
++			irqflags = IRQF_TRIGGER_FALLING;
++			key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] &=  ~(1 << (button->gpio % sizeof(key_status[0])));
 +		}
 +
-+		if(key_status)
-+			irqflags = IRQF_TRIGGER_RISING;
-+		else
-+			irqflags = IRQF_TRIGGER_FALLING;
- 
 +#else
 +		irqflags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
 +#endif
@@ -375610,7 +376194,7 @@ index 4510e8a37244..cb7a57a77651 100644
  		case V4L2_PIX_FMT_H264_NO_SC:	descr = "H.264 (No Start Codes)"; break;
  		case V4L2_PIX_FMT_H264_MVC:	descr = "H.264 MVC"; break;
 diff --git a/drivers/media/v4l2-core/videobuf2-core.c b/drivers/media/v4l2-core/videobuf2-core.c
-index 9ccf7f5e0e2e..1167226a0396 100644
+index 9ccf7f5e0e2e..ef9bfb33c7ae 100644
 --- a/drivers/media/v4l2-core/videobuf2-core.c
 +++ b/drivers/media/v4l2-core/videobuf2-core.c
 @@ -32,6 +32,12 @@
@@ -375664,6 +376248,23 @@ index 9ccf7f5e0e2e..1167226a0396 100644
  	}
  
  	/*
+@@ -2090,14 +2111,15 @@ unsigned int vb2_core_poll(struct vb2_queue *q, struct file *file,
+ 	if (!list_empty(&q->done_list))
+ 		vb = list_first_entry(&q->done_list, struct vb2_buffer,
+ 					done_entry);
+-	spin_unlock_irqrestore(&q->done_lock, flags);
+ 
+ 	if (vb && (vb->state == VB2_BUF_STATE_DONE
+ 			|| vb->state == VB2_BUF_STATE_ERROR)) {
++		spin_unlock_irqrestore(&q->done_lock, flags);
+ 		return (q->is_output) ?
+ 				POLLOUT | POLLWRNORM :
+ 				POLLIN | POLLRDNORM;
+ 	}
++	spin_unlock_irqrestore(&q->done_lock, flags);
+ 	return 0;
+ }
+ EXPORT_SYMBOL_GPL(vb2_core_poll);
 diff --git a/drivers/media/v4l2-core/videobuf2-memops.c b/drivers/media/v4l2-core/videobuf2-memops.c
 index 1cd322e939c7..ddb9853aa25b 100644
 --- a/drivers/media/v4l2-core/videobuf2-memops.c
@@ -376824,6 +377425,34 @@ index 85d54f37e28f..741876991886 100644
  		}
  	}
  
+diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c
+index 388e46be6ad9..c5a4be34b70a 100644
+--- a/drivers/mtd/ubi/eba.c
++++ b/drivers/mtd/ubi/eba.c
+@@ -857,7 +857,7 @@ static int try_write_vid_and_data(struct ubi_volume *vol, int lnum,
+ 				  int offset, int len)
+ {
+ 	struct ubi_device *ubi = vol->ubi;
+-	int pnum, opnum, err, vol_id = vol->vol_id;
++	int pnum, opnum, err, err2 = 0, vol_id = vol->vol_id;
+ 
+ 	pnum = ubi_wl_get_peb(ubi);
+ 	if (pnum < 0) {
+@@ -893,11 +893,11 @@ out_put:
+ 	up_read(&ubi->fm_eba_sem);
+ 
+ 	if (err && pnum >= 0)
+-		err = ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 1);
++		err2 = ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 1);
+ 	else if (!err && opnum >= 0)
+-		err = ubi_wl_put_peb(ubi, vol_id, lnum, opnum, 0);
++		err2 = ubi_wl_put_peb(ubi, vol_id, lnum, opnum, 0);
+ 
+-	return err;
++	return err ? err : err2;
+ }
+ 
+ /**
 diff --git a/drivers/net/can/usb/gs_usb.c b/drivers/net/can/usb/gs_usb.c
 index 5d5012337d9e..014b9ae3dc17 100644
 --- a/drivers/net/can/usb/gs_usb.c
@@ -377450,10 +378079,10 @@ index a534cf5be07d..8df2620d3d27 100644
 +obj-$(CONFIG_PHY_SSTAR_INFINITY6E)      += phy-infinity6e-sata.o
 diff --git a/drivers/phy/phy-infinity6e-sata.c b/drivers/phy/phy-infinity6e-sata.c
 new file mode 100755
-index 000000000000..5a09047cca55
+index 000000000000..fafca9728d73
 --- /dev/null
 +++ b/drivers/phy/phy-infinity6e-sata.c
-@@ -0,0 +1,421 @@
+@@ -0,0 +1,429 @@
 +/*
 + * Copyright (c) 2014 Linaro Ltd.
 + * Copyright (c) 2014 Hisilicon Limited.
@@ -377495,7 +378124,7 @@ index 000000000000..5a09047cca55
 +#define OUTREG16(x, y)          ms_writew((u16)(y), x)
 +
 +#define DEBUG_BUS 0
-+#define MAX_TX_VOL_OPT          9
++#define MAX_TX_VOL_OPT          17
 +
 +struct infinity6e_priv {
 +	void __iomem	*base;
@@ -377515,15 +378144,23 @@ index 000000000000..5a09047cca55
 +};
 +
 +static struct tx_voltage_settings tx_voltage_array[MAX_TX_VOL_OPT] = {
-+    {0x0B, 0x22, 0x0E, "Va0.80_Vb0.53_De_m3.5dB"}, /* Va 0.80, Vb 0.53, De-emphasis -3.5dB */
-+    {0x0D, 0x26, 0x0F, "Va0.90_Vb0.60_De_m3.5dB"}, /* Va 0.90, Vb 0.60, De-emphasis -3.5dB */
-+    {0x0F, 0x2A, 0x11, "Va1.00_Vb0.67_De_m3.5dB"}, /* Va 1.00, Vb 0.67, De-emphasis -3.5dB (recommended) */
-+    {0x0F, 0x2E, 0x13, "Va1.10_Vb0.65_De_m3.5dB"}, /* Va 1.10, Vb 0.65, De-emphasis -3.5dB (recommended, default) */
-+    {0x0F, 0x2B, 0x13, "Va1.05_Vb0.67_De_m3.9dB"}, /* Va 1.05, Vb 0.67, De-emphasis -3.9dB (recommended) */
-+    {0x0F, 0x2C, 0x15, "Va1.09_Vb0.67_De_m4.2dB"}, /* Va 1.09, Vb 0.67, De-emphasis -4.2dB (recommended) */
-+    {0x0F, 0x29, 0x13, "Va1.00_Vb0.63_De_m4.0dB"}, /* Va 1.00, Vb 0.63, De-emphasis -4.0dB */
-+    {0x0F, 0x28, 0x15, "Va1.00_Vb0.59_De_m4.6dB"}, /* Va 1.00, Vb 0.59, De-emphasis -4.6dB */
-+    {0x0F, 0x32, 0x14, "Va1.20_Vb0.60_De_m3.5dB"}, /* Va 1.20, Vb 0.60, De-emphasis -3.5dB (NOT recommended) */
++    {0x05, 0x22, 0x0E, "Va0.80_Vb0.53_De_m3.50dB"}, /* Va 0.80, Vb 0.53, De-emphasis -3.50dB */
++    {0x06, 0x26, 0x0F, "Va0.90_Vb0.60_De_m3.50dB"}, /* Va 0.90, Vb 0.60, De-emphasis -3.50dB */
++    {0x07, 0x2A, 0x11, "Va1.00_Vb0.67_De_m3.50dB"}, /* Va 1.00, Vb 0.67, De-emphasis -3.50dB (recommended) */
++    {0x07, 0x2E, 0x13, "Va1.10_Vb0.65_De_m3.50dB"}, /* Va 1.10, Vb 0.65, De-emphasis -3.50dB (recommended, default) */
++    {0x07, 0x2B, 0x13, "Va1.05_Vb0.67_De_m3.90dB"}, /* Va 1.05, Vb 0.67, De-emphasis -3.90dB (recommended) */
++    {0x07, 0x2C, 0x15, "Va1.09_Vb0.67_De_m4.20dB"}, /* Va 1.09, Vb 0.67, De-emphasis -4.20dB (recommended) */
++    {0x07, 0x29, 0x13, "Va1.00_Vb0.63_De_m4.00dB"}, /* Va 1.00, Vb 0.63, De-emphasis -4.00dB */
++    {0x07, 0x28, 0x15, "Va1.00_Vb0.59_De_m4.60dB"}, /* Va 1.00, Vb 0.59, De-emphasis -4.60dB */
++    {0x07, 0x32, 0x14, "Va1.20_Vb0.60_De_m3.50dB"}, /* Va 1.20, Vb 0.60, De-emphasis -3.50dB (AVDDL_TX_USB3 needs 0.9V) */
++    {0x07, 0x34, 0x11, "Va1.20_Vb0.85_De_m3.00dB"}, /* Va 1.20, Vb 0.85, De-emphasis -3.00dB */
++    {0x07, 0x35, 0x0F, "Va1.20_Vb0.90_De_m2.50dB"}, /* Va 1.20, Vb 0.90, De-emphasis -2.50dB */
++    {0x07, 0x2C, 0x16, "Va1.10_Vb0.67_De_m4.30dB"}, /* Va 1.10, Vb 0.67, De-emphasis -4.30dB */
++    {0x07, 0x2B, 0x18, "Va1.10_Vb0.63_De_m4.84dB"}, /* Va 1.10, Vb 0.63, De-emphasis -4.84dB */
++    {0x07, 0x2A, 0x1A, "Va1.10_Vb0.60_De_m5.26dB"}, /* Va 1.10, Vb 0.60, De-emphasis -5.26dB */
++    {0x07, 0x31, 0x16, "Va1.20_Vb0.75_De_m4.08dB"}, /* Va 1.20, Vb 0.75, De-emphasis -4.08dB */
++    {0x07, 0x30, 0x19, "Va1.20_Vb0.70_De_m4.68dB"}, /* Va 1.20, Vb 0.70, De-emphasis -4.68dB */
++    {0x07, 0x2E, 0x1C, "Va1.20_Vb0.65_De_m5.33dB"}, /* Va 1.20, Vb 0.65, De-emphasis -5.33dB */
 +};
 +static u8 m_TxVoltageIdx = 3; /* Va 1.10, Vb 0.65, De-emphasis -3.5dB (recommended, default) */
 +
@@ -377673,7 +378310,7 @@ index 000000000000..5a09047cca55
 +    SETREG16(dphy_base + 0x46*4, 0x2000); // rg_force_iext_intr_ctrl
 +
 +    CLRREG16(dphy_base + 0x26*4, 0x0E);
-+    SETREG16(dphy_base + 0x26*4, tx_voltage_array[m_TxVoltageIdx].reg_biasi);
++    SETREG16(dphy_base + 0x26*4, (tx_voltage_array[m_TxVoltageIdx].reg_biasi & 0x7) << 1);
 +
 +    CLRREG16(aphy_base0 + 0x44*4, 0x01);
 +    mdelay(1);
@@ -377706,7 +378343,7 @@ index 000000000000..5a09047cca55
 +    SETREG16(aphy_base0 + 0x44*4, 0x01); // reg_sata_phy_synth_sld[0] = 1
 +    // Diable RXPLL frequency lock detection hardware mode
 +    OUTREG16(dphy_base + 0x40*4, ((tx_voltage_array[m_TxVoltageIdx].reg_dem & 0x0F) << 12) |
-+                                  (tx_voltage_array[m_TxVoltageIdx].reg_drv << 6) | 0x19);
++                                 ((tx_voltage_array[m_TxVoltageIdx].reg_drv & 0x3F) << 6) | 0x19);
 +    OUTREG16(dphy_base + 0x41*4, ((tx_voltage_array[m_TxVoltageIdx].reg_dem & 0x30) >> 4) | 0x2188);
 +    SETREG16(dphy_base + 0xa*4, 0x1a);      // force DA_SSUSB_TX_BIASI, DA_SSUSB_IDRV_3P5DB, DA_SSUSB_IDEM_3P5DB value
 +
@@ -379237,10 +379874,10 @@ index 35cbd36f8d3b..8623b3f9bb06 100644
  	return 0;
 diff --git a/drivers/sstar/Kconfig b/drivers/sstar/Kconfig
 new file mode 100755
-index 000000000000..7f1dd4aeef7c
+index 000000000000..e2b14035aa1e
 --- /dev/null
 +++ b/drivers/sstar/Kconfig
-@@ -0,0 +1,53 @@
+@@ -0,0 +1,54 @@
 +menuconfig MSTAR_DRIVERS
 +    bool "SStar SoC platform drivers"
 +    depends on ARCH_SSTAR
@@ -379292,14 +379929,15 @@ index 000000000000..7f1dd4aeef7c
 +source "drivers/sstar/swtoe/Kconfig"
 +source "drivers/sstar/emac_toe/Kconfig"
 +source "drivers/sstar/adaptor/Kconfig"
++source "drivers/sstar/gyro/Kconfig"
 +
 +endif
 diff --git a/drivers/sstar/Makefile b/drivers/sstar/Makefile
 new file mode 100755
-index 000000000000..2f48fcee4fad
+index 000000000000..8a3b1e1fcace
 --- /dev/null
 +++ b/drivers/sstar/Makefile
-@@ -0,0 +1,56 @@
+@@ -0,0 +1,57 @@
 +obj-y += irqchip/
 +obj-y += clocksource/
 +obj-y += serial/
@@ -379356,6 +379994,7 @@ index 000000000000..2f48fcee4fad
 +obj-$(CONFIG_MS_IOPOWER) += iopower/
 +obj-y += cpu/
 +obj-$(CONFIG_USB_GADGET_SSTAR_DEVICE) += usb/gadget/udc/usb20/
++obj-$(CONFIG_SS_GYRO) += gyro/
 diff --git a/drivers/sstar/adaptor/Kconfig b/drivers/sstar/adaptor/Kconfig
 new file mode 100644
 index 000000000000..69380f7dfe25
@@ -384180,10 +384819,10 @@ index 000000000000..e390cde67af3
 +obj-y = hal_bdma.o
 diff --git a/drivers/sstar/bdma/infinity6b0/hal_bdma.c b/drivers/sstar/bdma/infinity6b0/hal_bdma.c
 new file mode 100755
-index 000000000000..f3f6f8a86f85
+index 000000000000..6f21a725b8e6
 --- /dev/null
 +++ b/drivers/sstar/bdma/infinity6b0/hal_bdma.c
-@@ -0,0 +1,447 @@
+@@ -0,0 +1,453 @@
 +/*
 +* hal_bdma.c- Sigmastar
 +*
@@ -384225,7 +384864,7 @@ index 000000000000..f3f6f8a86f85
 +volatile KeBdma_t * const g_ptKeBdma3 = (KeBdma_t *)IO_ADDRESS(BASE_REG_BDMA3_PA);
 +
 +static bool m_bBdmaFree[HAL_BDMA_CH_NUM] = {TRUE, TRUE, TRUE, TRUE};
-+static HalBdmaTxCb m_pfBdmaTxDoneCBFunc[HAL_BDMA_CH_NUM] = {NULL, NULL, NULL, NULL};
++static HalBdmaParam_t *m_ptBdmaParam[HAL_BDMA_CH_NUM] = {NULL, NULL, NULL, NULL};
 +static bool m_bBdmaInited[HAL_BDMA_CH_NUM] = {0, 0, 0, 0};
 +static CamOsTsem_t m_stBdmaSemID[HAL_BDMA_CH_NUM];
 +
@@ -384255,12 +384894,13 @@ index 000000000000..f3f6f8a86f85
 +    g_ptKeBdma0->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma0->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[0]->pfTxCbFunc) {
++        m_ptBdmaParam[0]->pfTxCbFunc(m_ptBdmaParam[0]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[0] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[0]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[0]) {
-+        m_pfBdmaTxDoneCBFunc[0](0);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -384269,12 +384909,13 @@ index 000000000000..f3f6f8a86f85
 +    g_ptKeBdma1->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma1->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[1]->pfTxCbFunc) {
++        m_ptBdmaParam[1]->pfTxCbFunc(m_ptBdmaParam[1]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[1] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[1]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[1]) {
-+        m_pfBdmaTxDoneCBFunc[1](1);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -384283,12 +384924,13 @@ index 000000000000..f3f6f8a86f85
 +    g_ptKeBdma2->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma2->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[2]->pfTxCbFunc) {
++        m_ptBdmaParam[2]->pfTxCbFunc(m_ptBdmaParam[2]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[2] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[2]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[2]) {
-+        m_pfBdmaTxDoneCBFunc[2](2);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -384297,12 +384939,13 @@ index 000000000000..f3f6f8a86f85
 +    g_ptKeBdma3->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma3->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[3]->pfTxCbFunc) {
++        m_ptBdmaParam[3]->pfTxCbFunc(m_ptBdmaParam[3]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[3] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[3]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[3]) {
-+        m_pfBdmaTxDoneCBFunc[3](3);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -384406,7 +385049,7 @@ index 000000000000..f3f6f8a86f85
 +
 +    m_bBdmaFree[u8DmaCh] = FALSE;
 +
-+    m_pfBdmaTxDoneCBFunc[u8DmaCh] = (HalBdmaTxCb)ptBdmaParam->pfTxCbFunc;
++    m_ptBdmaParam[u8DmaCh] = ptBdmaParam;
 +
 +    g_ptKeBdma->reg_ch0_busy = 0x1;
 +    g_ptKeBdma->reg_ch0_int_bdma = 0x1;
@@ -384530,6 +385173,8 @@ index 000000000000..f3f6f8a86f85
 +        (HAL_BDMA_MEM_TO_IMI == ptBdmaParam->ePathSel)) {
 +        g_ptKeBdma->reg_ch0_cmd0_low  = (U16)(ptBdmaParam->u32Pattern & 0xFFFF);
 +        g_ptKeBdma->reg_ch0_cmd0_high = (U16)(ptBdmaParam->u32Pattern >> 16);
++        g_ptKeBdma->reg_ch0_src_a0 = (U16)(0x0000);
++        g_ptKeBdma->reg_ch0_src_a1 = (U16)(0x0000);
 +    }
 +    else {
 +        g_ptKeBdma->reg_ch0_src_a0 = (U16)(_HalBdmaVA2MiuA(ptBdmaParam->pSrcAddr) & 0xFFFF);
@@ -384633,10 +385278,10 @@ index 000000000000..f3f6f8a86f85
 +}
 diff --git a/drivers/sstar/bdma/infinity6b0/hal_bdma.h b/drivers/sstar/bdma/infinity6b0/hal_bdma.h
 new file mode 100755
-index 000000000000..017f73db8b7a
+index 000000000000..07d1d5c288e6
 --- /dev/null
 +++ b/drivers/sstar/bdma/infinity6b0/hal_bdma.h
-@@ -0,0 +1,103 @@
+@@ -0,0 +1,104 @@
 +/*
 +* hal_bdma.h- Sigmastar
 +*
@@ -384716,7 +385361,7 @@ index 000000000000..017f73db8b7a
 +// Structure definition
 +/*=============================================================*/
 +
-+typedef void (* HalBdmaTxCb)(u32);
++typedef void (* HalBdmaTxCb)(void *);
 +
 +typedef struct {
 +    bool                    bIntMode;
@@ -384729,6 +385374,7 @@ index 000000000000..017f73db8b7a
 +    void                    *pSrcAddr;
 +    void                    *pDstAddr;
 +    HalBdmaTxCb             pfTxCbFunc;
++    void                    *pTxCbParm;
 +} HalBdmaParam_t;
 +
 +/*=============================================================*/
@@ -384895,11 +385541,11 @@ index 000000000000..e390cde67af3
 +
 +obj-y = hal_bdma.o
 diff --git a/drivers/sstar/bdma/infinity6e/hal_bdma.c b/drivers/sstar/bdma/infinity6e/hal_bdma.c
-new file mode 100644
-index 000000000000..fc1667d822a1
+new file mode 100755
+index 000000000000..dbf3f71b4f1d
 --- /dev/null
 +++ b/drivers/sstar/bdma/infinity6e/hal_bdma.c
-@@ -0,0 +1,758 @@
+@@ -0,0 +1,766 @@
 +/*
 +* hal_bdma.c- Sigmastar
 +*
@@ -384944,7 +385590,7 @@ index 000000000000..fc1667d822a1
 +volatile KeBdma_t * const g_ptKeBdma3 = (KeBdma_t *)IO_ADDRESS(BASE_REG_BDMA3_PA);
 +
 +static bool m_bBdmaFree[HAL_BDMA_CH_NUM] = {TRUE, TRUE, TRUE, TRUE};
-+static HalBdmaTxCb m_pfBdmaTxDoneCBFunc[HAL_BDMA_CH_NUM] = {NULL, NULL, NULL, NULL};
++static HalBdmaParam_t *m_ptBdmaParam[HAL_BDMA_CH_NUM] = {NULL, NULL, NULL, NULL};
 +static bool m_bBdmaInited[HAL_BDMA_CH_NUM] = {0, 0, 0, 0};
 +static CamOsTsem_t m_stBdmaSemID[HAL_BDMA_CH_NUM];
 +
@@ -384974,12 +385620,13 @@ index 000000000000..fc1667d822a1
 +    g_ptKeBdma0->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma0->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[0]->pfTxCbFunc) {
++        m_ptBdmaParam[0]->pfTxCbFunc(m_ptBdmaParam[0]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[0] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[0]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[0]) {
-+        m_pfBdmaTxDoneCBFunc[0](0);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -384988,12 +385635,13 @@ index 000000000000..fc1667d822a1
 +    g_ptKeBdma1->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma1->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[1]->pfTxCbFunc) {
++        m_ptBdmaParam[1]->pfTxCbFunc(m_ptBdmaParam[1]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[1] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[1]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[1]) {
-+        m_pfBdmaTxDoneCBFunc[1](1);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -385002,12 +385650,13 @@ index 000000000000..fc1667d822a1
 +    g_ptKeBdma2->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma2->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[2]->pfTxCbFunc) {
++        m_ptBdmaParam[2]->pfTxCbFunc(m_ptBdmaParam[2]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[2] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[2]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[2]) {
-+        m_pfBdmaTxDoneCBFunc[2](2);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -385016,12 +385665,13 @@ index 000000000000..fc1667d822a1
 +    g_ptKeBdma3->reg_ch0_int_bdma = 0x1;
 +    g_ptKeBdma3->reg_ch0_int_en = 0x0;
 +
++    if (NULL != m_ptBdmaParam[3]->pfTxCbFunc) {
++        m_ptBdmaParam[3]->pfTxCbFunc(m_ptBdmaParam[3]->pTxCbParm);
++    }
++
 +    m_bBdmaFree[3] = TRUE;
 +    CamOsTsemUp(&m_stBdmaSemID[3]);
 +
-+    if (NULL != m_pfBdmaTxDoneCBFunc[3]) {
-+        m_pfBdmaTxDoneCBFunc[3](3);
-+    }
 +    return IRQ_HANDLED;
 +}
 +
@@ -385215,7 +385865,7 @@ index 000000000000..fc1667d822a1
 +
 +    m_bBdmaFree[u8DmaCh] = FALSE;
 +
-+    m_pfBdmaTxDoneCBFunc[u8DmaCh] = (HalBdmaTxCb)ptBdmaParam->pfTxCbFunc;
++    m_ptBdmaParam[u8DmaCh] = ptBdmaParam;
 +
 +    g_ptKeBdma->reg_ch0_busy = 0x1;
 +    g_ptKeBdma->reg_ch0_int_bdma = 0x1;
@@ -385339,6 +385989,8 @@ index 000000000000..fc1667d822a1
 +        (HAL_BDMA_MEM_TO_IMI == ptBdmaParam->ePathSel)) {
 +        g_ptKeBdma->reg_ch0_cmd0_low  = (U16)(ptBdmaParam->u32Pattern & 0xFFFF);
 +        g_ptKeBdma->reg_ch0_cmd0_high = (U16)(ptBdmaParam->u32Pattern >> 16);
++        g_ptKeBdma->reg_ch0_src_a0 = (U16)(0x0000);
++        g_ptKeBdma->reg_ch0_src_a1 = (U16)(0x0000);
 +    }
 +    else {
 +        g_ptKeBdma->reg_ch0_src_a0 = (U16)(_HalBdmaVA2MiuA(ptBdmaParam->pSrcAddr) & 0xFFFF);
@@ -385415,7 +386067,7 @@ index 000000000000..fc1667d822a1
 +
 +    m_bBdmaFree[u8DmaCh] = FALSE;
 +
-+    m_pfBdmaTxDoneCBFunc[u8DmaCh] = (HalBdmaTxCb)ptBdmaParam->pfTxCbFunc;
++    m_ptBdmaParam[u8DmaCh] = ptBdmaParam;
 +
 +    g_ptKeBdma->reg_ch0_busy = 0x1;
 +    g_ptKeBdma->reg_ch0_int_bdma = 0x1;
@@ -385539,6 +386191,8 @@ index 000000000000..fc1667d822a1
 +        (HAL_BDMA_MEM_TO_IMI == ptBdmaParam->ePathSel)) {
 +        g_ptKeBdma->reg_ch0_cmd0_low  = (U16)(ptBdmaParam->u32Pattern & 0xFFFF);
 +        g_ptKeBdma->reg_ch0_cmd0_high = (U16)(ptBdmaParam->u32Pattern >> 16);
++        g_ptKeBdma->reg_ch0_src_a0 = (U16)(0x0000);
++        g_ptKeBdma->reg_ch0_src_a1 = (U16)(0x0000);
 +    }
 +    else {
 +        g_ptKeBdma->reg_ch0_src_a0 = (U16)(_HalBdmaVA2MiuA(ptBdmaParam->pSrcAddr) & 0xFFFF);
@@ -385659,11 +386313,11 @@ index 000000000000..fc1667d822a1
 +    return HAL_BDMA_PROC_DONE;
 +}
 diff --git a/drivers/sstar/bdma/infinity6e/hal_bdma.h b/drivers/sstar/bdma/infinity6e/hal_bdma.h
-new file mode 100644
-index 000000000000..6c99c2402d8c
+new file mode 100755
+index 000000000000..8af6008451c4
 --- /dev/null
 +++ b/drivers/sstar/bdma/infinity6e/hal_bdma.h
-@@ -0,0 +1,115 @@
+@@ -0,0 +1,116 @@
 +/*
 +* hal_bdma.h- Sigmastar
 +*
@@ -385743,7 +386397,7 @@ index 000000000000..6c99c2402d8c
 +// Structure definition
 +/*=============================================================*/
 +
-+typedef void (* HalBdmaTxCb)(u32);
++typedef void (* HalBdmaTxCb)(void *);
 +
 +typedef struct {
 +    u32                     u32SrcWidth;     ///< Width of source
@@ -385765,6 +386419,7 @@ index 000000000000..6c99c2402d8c
 +    u32                     bEnLineOfst;
 +    HalBdmaLineOfst_t      *pstLineOfst;
 +    HalBdmaTxCb             pfTxCbFunc;
++    void                    *pTxCbParm;
 +} HalBdmaParam_t;
 +
 +
@@ -391668,10 +392323,10 @@ index 000000000000..605c99f57146
 +#endif //__CAM_OS_CONDITION_H__
 diff --git a/drivers/sstar/cam_os_wrapper/pub/cam_os_util.h b/drivers/sstar/cam_os_wrapper/pub/cam_os_util.h
 new file mode 100644
-index 000000000000..42c46c665b7d
+index 000000000000..2d3c6a20e5c0
 --- /dev/null
 +++ b/drivers/sstar/cam_os_wrapper/pub/cam_os_util.h
-@@ -0,0 +1,144 @@
+@@ -0,0 +1,147 @@
 +/*
 +* cam_os_util.h - Sigmastar
 +*
@@ -391815,6 +392470,9 @@ index 000000000000..42c46c665b7d
 +#define CAM_OS_MIN(a,b) (((a)<(b))?(a):(b))
 +#define CAM_OS_MAX(a,b) (((a)>(b))?(a):(b))
 +
++#define CAM_OS_ALIGN_DOWN(val, alignment)   (((val)/(alignment))*(alignment))
++#define CAM_OS_ALIGN_UP(val, alignment)     ((((val)+(alignment)-1)/(alignment))*(alignment))
++
 +#endif //__CAM_OS_UTIL_H__
 diff --git a/drivers/sstar/cam_os_wrapper/pub/cam_os_util_bitmap.h b/drivers/sstar/cam_os_wrapper/pub/cam_os_util_bitmap.h
 new file mode 100644
@@ -394690,10 +395348,10 @@ index 000000000000..cb5e24286729
 +#endif
 diff --git a/drivers/sstar/cam_os_wrapper/src/cam_os_wrapper.c b/drivers/sstar/cam_os_wrapper/src/cam_os_wrapper.c
 new file mode 100755
-index 000000000000..ccadd11afa8c
+index 000000000000..70c9de1472f4
 --- /dev/null
 +++ b/drivers/sstar/cam_os_wrapper/src/cam_os_wrapper.c
-@@ -0,0 +1,6061 @@
+@@ -0,0 +1,6071 @@
 +/*
 +* cam_os_wrapper.c - Sigmastar
 +*
@@ -395835,37 +396493,46 @@ index 000000000000..ccadd11afa8c
 +    struct sched_param tSched = { .sched_priority = 0 };
 +    s32 nNiceVal = 0;
 +
-+    tpThreadHandle = kthread_run((CamOsThreadEntry_t *)pfnStartRoutine, pArg, (ptAttrb && ptAttrb->szName)? ptAttrb->szName : "CAMOS");
-+
-+    if(ptAttrb != NULL)
++    do
 +    {
-+        if((ptAttrb->nPriority > 0) && (ptAttrb->nPriority <= 70))
++        tpThreadHandle = kthread_run((CamOsThreadEntry_t *)pfnStartRoutine, pArg, (ptAttrb && ptAttrb->szName)? ptAttrb->szName : "CAMOS");
++        if (IS_ERR(tpThreadHandle))
 +        {
-+            if (ptAttrb->nPriority <= 50)
++            eRet = CAM_OS_FAIL;
++            *ptThread = NULL;
++            break;
++        }
++        if(ptAttrb != NULL)
++        {
++            if((ptAttrb->nPriority > 0) && (ptAttrb->nPriority <= 70))
 +            {
-+                nNiceVal = 19 - ptAttrb->nPriority * 19 / 50;
-+            }
-+            else
-+            {
-+                nNiceVal = 50 - ptAttrb->nPriority;
-+            }
++                if (ptAttrb->nPriority <= 50)
++                {
++                    nNiceVal = 19 - ptAttrb->nPriority * 19 / 50;
++                }
++                else
++                {
++                    nNiceVal = 50 - ptAttrb->nPriority;
++                }
 +
-+            set_user_nice(tpThreadHandle, nNiceVal);
-+        }
-+        else if((ptAttrb->nPriority > 70) && (ptAttrb->nPriority <= 100))
-+        {
-+            if (ptAttrb->nPriority < 95)    // nPriority 71~94 mapping to Linux PrioRT 1~94
-+                tSched.sched_priority = (ptAttrb->nPriority - 71) * 93 / 23 + 1;
-+            else                            // nPriority 95~99 mapping to Linux PrioRT 95~99
-+                tSched.sched_priority = (ptAttrb->nPriority < 100)? ptAttrb->nPriority : 99;
-+            if(sched_setscheduler(tpThreadHandle, SCHED_RR, &tSched) != 0)
++                set_user_nice(tpThreadHandle, nNiceVal);
++            }
++            else if((ptAttrb->nPriority > 70) && (ptAttrb->nPriority <= 100))
 +            {
-+                CAM_OS_WARN("set priority fail");
++                if (ptAttrb->nPriority < 95)    // nPriority 71~94 mapping to Linux PrioRT 1~94
++                    tSched.sched_priority = (ptAttrb->nPriority - 71) * 93 / 23 + 1;
++                else                            // nPriority 95~99 mapping to Linux PrioRT 95~99
++                    tSched.sched_priority = (ptAttrb->nPriority < 100)? ptAttrb->nPriority : 99;
++                if(sched_setscheduler(tpThreadHandle, SCHED_RR, &tSched) != 0)
++                {
++                    CAM_OS_WARN("set priority fail");
++                }
 +            }
 +        }
++
++        *ptThread = (CamOsThread *)tpThreadHandle;
 +    }
-+
-+    *ptThread = (CamOsThread *)tpThreadHandle;
++    while(0);
 +#endif
 +
 +    // coverity[leaked_storage]
@@ -399357,6 +400024,7 @@ index 000000000000..ccadd11afa8c
 +    }
 +
 +    nCpuBusAddr = (uintptr_t)pPhyPtr;
++    nSize       = CAM_OS_ALIGN_UP(nSize + offset_in_page(nCpuBusAddr), PAGE_SIZE);
 +
 +    sg_set_page(pSgTable->sgl, pfn_to_page(__phys_to_pfn(nCpuBusAddr)), PAGE_ALIGN(nSize), 0);
 +
@@ -399388,7 +400056,7 @@ index 000000000000..ccadd11afa8c
 +    sg_free_table(pSgTable);
 +    kfree(pSgTable);
 +
-+    return pVirtPtr;
++    return (pVirtPtr) ? pVirtPtr + offset_in_page(pPhyPtr) : pVirtPtr;
 +#endif
 +}
 +
@@ -399406,7 +400074,7 @@ index 000000000000..ccadd11afa8c
 +                __FUNCTION__, (u32)pVirtPtr, nSize, nErr, errno, strerror(errno));
 +    }
 +#elif defined(CAM_OS_LINUX_KERNEL)
-+    vunmap(pVirtPtr);
++    vunmap(pVirtPtr - offset_in_page(pVirtPtr));
 +#endif
 +}
 +
@@ -406043,10 +406711,10 @@ index 000000000000..0e7bdc9ef05e
 +#undef  HAL_CAMCLK_C
 diff --git a/drivers/sstar/camclk/drv/src/linux/drv_camclk_module.c b/drivers/sstar/camclk/drv/src/linux/drv_camclk_module.c
 new file mode 100755
-index 000000000000..abd41424e55f
+index 000000000000..6f88a918b88f
 --- /dev/null
 +++ b/drivers/sstar/camclk/drv/src/linux/drv_camclk_module.c
-@@ -0,0 +1,286 @@
+@@ -0,0 +1,289 @@
 +/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
 + All rights reserved.
 +
@@ -406264,15 +406932,18 @@ index 000000000000..abd41424e55f
 +
 +static int DrvCamClkModuleSuspend(struct platform_device *dev, pm_message_t state)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    CAMCLKDBG("[%s @ %d]\n", __FUNCTION__, __LINE__);
-+
++#endif
 +    return 0;
 +}
 +
 +static int DrvCamClkModuleResume(struct platform_device *dev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    CAMCLKDBG("[%s @ %d]\n", __FUNCTION__, __LINE__);
 +    DrvCamClkResume();
++#endif
 +    return 0;
 +}
 +/*
@@ -428513,10 +429184,10 @@ index 000000000000..8230e5e3c7a8
 +CLK_OF_DECLARE(ms_clk_complex, "sstar,complex-clock", ms_clk_complex_init);
 diff --git a/drivers/sstar/clk/ms_composite_clk.c b/drivers/sstar/clk/ms_composite_clk.c
 new file mode 100755
-index 000000000000..c75b7e6b69ba
+index 000000000000..4f528f897e57
 --- /dev/null
 +++ b/drivers/sstar/clk/ms_composite_clk.c
-@@ -0,0 +1,365 @@
+@@ -0,0 +1,369 @@
 +/*
 +* ms_composite_clk.c- Sigmastar
 +*
@@ -428665,6 +429336,7 @@ index 000000000000..c75b7e6b69ba
 +#ifdef CONFIG_PM_SLEEP
 +static int ms_clk_mux_suspend(void)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    struct ms_clk_mux *mux;
 +    //struct clk *clk;
 +
@@ -428688,12 +429360,14 @@ index 000000000000..c75b7e6b69ba
 +        }
 +    }
 +    //pr_debug("ms_clk_mux_suspend\n");
++#endif
 +
 +    return 0;
 +}
 +
 +static void ms_clk_mux_resume(void)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    struct ms_clk_mux *mux;
 +
 +    //restore auto-enable clocks in list
@@ -428715,6 +429389,7 @@ index 000000000000..c75b7e6b69ba
 +        }
 +    }
 +    //pr_debug("ms_clk_mux_resume\n");
++#endif
 +}
 +
 +struct syscore_ops ms_clk_mux_syscore_ops = {
@@ -433021,10 +433696,10 @@ index 000000000000..0c49b7fbbce7
 +module_platform_driver(ms_cpufreq_platdrv);
 diff --git a/drivers/sstar/cpufreq/infinity6b0/cpufreq.c b/drivers/sstar/cpufreq/infinity6b0/cpufreq.c
 new file mode 100755
-index 000000000000..69ddade8e3aa
+index 000000000000..e50a9feaa709
 --- /dev/null
 +++ b/drivers/sstar/cpufreq/infinity6b0/cpufreq.c
-@@ -0,0 +1,513 @@
+@@ -0,0 +1,529 @@
 +/*
 +* infinity6-cpufreq.c- Sigmastar
 +*
@@ -433456,6 +434131,18 @@ index 000000000000..69ddade8e3aa
 +
 +    return 0;
 +}
++#ifdef CONFIG_PM_SLEEP
++static int ms_cpufreq_suspend(struct cpufreq_policy *policy)
++{
++    return 0;
++}
++
++static int ms_cpufreq_resume(struct cpufreq_policy *policy)
++{
++    ms_cpufreq_target_index(policy, 0);
++    return 0;
++}
++#endif
 +
 +static struct cpufreq_driver ms_cpufreq_driver = {
 +    .verify = cpufreq_generic_frequency_table_verify,
@@ -433468,6 +434155,10 @@ index 000000000000..69ddade8e3aa
 +#endif
 +    .init   = ms_cpufreq_init,
 +    .exit   = ms_cpufreq_exit,
++#ifdef CONFIG_PM_SLEEP
++        .suspend = ms_cpufreq_suspend,
++        .resume = ms_cpufreq_resume,
++#endif
 +    .name   = "Mstar cpufreq",
 +};
 +
@@ -433540,10 +434231,10 @@ index 000000000000..69ddade8e3aa
 +module_platform_driver(ms_cpufreq_platdrv);
 diff --git a/drivers/sstar/cpufreq/infinity6e/cpufreq.c b/drivers/sstar/cpufreq/infinity6e/cpufreq.c
 new file mode 100755
-index 000000000000..29dee9f7b181
+index 000000000000..ac52cbabe423
 --- /dev/null
 +++ b/drivers/sstar/cpufreq/infinity6e/cpufreq.c
-@@ -0,0 +1,501 @@
+@@ -0,0 +1,517 @@
 +/*
 +* cpufreq.c- Sigmastar
 +*
@@ -433959,6 +434650,18 @@ index 000000000000..29dee9f7b181
 +
 +    return 0;
 +}
++#ifdef CONFIG_PM_SLEEP
++static int ms_cpufreq_suspend(struct cpufreq_policy *policy)
++{
++    return 0;
++}
++
++static int ms_cpufreq_resume(struct cpufreq_policy *policy)
++{
++    ms_cpufreq_target_index(policy, 0);
++    return 0;
++}
++#endif
 +
 +static struct cpufreq_driver ms_cpufreq_driver = {
 +    .verify = cpufreq_generic_frequency_table_verify,
@@ -433971,6 +434674,10 @@ index 000000000000..29dee9f7b181
 +#endif
 +    .init   = ms_cpufreq_init,
 +    .exit   = ms_cpufreq_exit,
++#ifdef CONFIG_PM_SLEEP
++    .suspend = ms_cpufreq_suspend,
++    .resume = ms_cpufreq_resume,
++#endif
 +    .name   = "Mstar cpufreq",
 +};
 +
@@ -449616,7 +450323,7 @@ index 000000000000..2e5374436b4d
 \ No newline at end of file
 diff --git a/drivers/sstar/crypto/mdrv_sha.c b/drivers/sstar/crypto/mdrv_sha.c
 new file mode 100755
-index 000000000000..0532d8abee6a
+index 000000000000..38066b570fb3
 --- /dev/null
 +++ b/drivers/sstar/crypto/mdrv_sha.c
 @@ -0,0 +1,375 @@
@@ -449735,7 +450442,7 @@ index 000000000000..0532d8abee6a
 +
 +
 +    SHA_DBG(" %s,#%d \n",__FUNCTION__,__LINE__);
-+ 
++
 +    HAL_SHA_Reset();
 +
 +    HAL_SHA_SelMode(1);
@@ -449785,7 +450492,7 @@ index 000000000000..0532d8abee6a
 +        HAL_SHA_SetAddress(Chip_Phys_to_MIU(ALLOC_DMEM.aesdma_phy_SHABuf_addr));
 +        HAL_SHA_SetLength(estimate_size);
 +        HAL_SHA_ManualMode(1);
-+        
++
 +        HAL_SHA_Start();
 +
 +        udelay(1);  //sha256 cost about 1~1.4us
@@ -449919,7 +450626,7 @@ index 000000000000..0532d8abee6a
 +    }
 +
 +    Chip_Flush_MIU_Pipe();
-+    HAL_SHA_SetAddress((U32)in);
++    HAL_SHA_SetAddress((u32)Chip_Phys_to_MIU((u64)(uintptr_t)in));
 +    HAL_SHA_SetLength(len);
 +    if (once)
 +    {
@@ -467352,10 +468059,10 @@ index 000000000000..b4cc49dabc65
 +#endif
 diff --git a/drivers/sstar/emac/hal/infinity6b0/mhal_emac.c b/drivers/sstar/emac/hal/infinity6b0/mhal_emac.c
 new file mode 100755
-index 000000000000..7744d425aac8
+index 000000000000..7be74ac8280e
 --- /dev/null
 +++ b/drivers/sstar/emac/hal/infinity6b0/mhal_emac.c
-@@ -0,0 +1,2655 @@
+@@ -0,0 +1,2767 @@
 +/* SigmaStar trade secret */
 +/*
 +* mhal_emac.c- Sigmastar
@@ -467535,6 +468242,7 @@ index 000000000000..7744d425aac8
 +
 +#ifdef CONFIG_EMAC_DPHY_REINIT
 +static int _MHal_EMAC_DPHY_REINIT(void* hal);
++static int _MHal_EMAC_DPHY_SPEED_UPDATE(void* hal);
 +#endif
 +//-------------------------------------------------------------------------------------------------
 +//  Local variables
@@ -468570,9 +469278,110 @@ index 000000000000..7744d425aac8
 +*/
 +
 +#ifdef CONFIG_EMAC_DPHY_REINIT
++//----------------------------------------------------------------
++// Reset digital phy when status is not good.
++// uRegVal_7E & uRegVal_A5 : check phy reset completed or not.
++// uRegVal_8x : digital phy status value.
++// uRegVal_9x : analog phy status value.
++//----------------------------------------------------------------
 +static int _MHal_EMAC_DPHY_REINIT(void* hal)
 +{
 +    mhal_emac_t* pHal = (mhal_emac_t*) hal;
++
++    int i = 0;
++    u8 uRegVal_7E;
++    u8 uRegVal_A5;
++    u8 uRegVal_8C, uRegVal_8D;
++    s16 uRegVal_8x;
++    u8 uRegVal_94, uRegVal_95;
++    u16 uRegVal_9x;
++    u8 uRegVal_04;
++    u8 cntGood = 0, cntBad = 0;
++    u8 reset_cnt = 0;
++
++    for(i=0; i<100; i++)
++    {
++        mdelay(1);
++        uRegVal_7E = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x7E); //1515 3f
++        uRegVal_7E = uRegVal_7E & 0x0F;
++        uRegVal_A5 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0xA5); //1515 52
++        uRegVal_A5 = uRegVal_A5 & 0x07;
++
++        // check phy reset completed or not
++        if(uRegVal_7E == 0x08 && uRegVal_A5 == 0x07)
++        {
++            MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x88, 0x00); //1515 44
++            MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x89, 0x60);
++
++            uRegVal_8C = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x8C); //1515 46
++            uRegVal_8D = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x8D); //1515 46
++
++            MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x88, 0x00); //1515 44
++            MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x89, 0x50);
++
++            uRegVal_8x = uRegVal_8D << 8 | uRegVal_8C;
++            if((uRegVal_8x & 0x0400) != 0)
++                uRegVal_8x = uRegVal_8x | 0xF800;
++
++            uRegVal_94 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x94); //1515 4A
++            uRegVal_95 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x95); //1515 4A
++
++            uRegVal_9x = uRegVal_95 << 8 | uRegVal_94;
++
++            //printk("[EMAC] uRegVal_8x: %d, uRegVal_9x: %d \n", uRegVal_8x, uRegVal_9x);
++
++            if((uRegVal_8x > -128 && uRegVal_8x < 128) && (uRegVal_9x > 0 && uRegVal_9x < 150))
++            {
++                cntGood++;
++                cntBad = 0;
++                if(cntGood > 5)
++                {
++                    cntBad = 0;
++                    cntGood = 0;
++                    break;
++                }
++                mdelay(1);
++            }
++            else
++            {
++                //printk("[EMAC] uRegVal_8x: %d, uRegVal_9x: %d \n", uRegVal_8x, uRegVal_9x);
++
++                // Reduce noise power threshold & tune setting of lpf_k1/ffe_error_scale
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x90, 0x00); //1515_48: 0x0000
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x91, 0x00);
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x76, 0x00); //1515_3b: 0x0800
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x77, 0x08);
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x10, 0x53); //1515_08: 0x0053
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x11, 0x00);
++
++                // if cntBad++ continuously, then dphy reset.
++                cntBad++;
++                cntGood = 0;
++                if(cntBad > 3)
++                {
++                    cntBad = 0;
++                    cntGood = 0;
++                    uRegVal_04 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04);
++                    uRegVal_04 = uRegVal_04 | 0x08;
++                    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04, uRegVal_04); //1515 02
++                    mdelay(1);
++                    uRegVal_04 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04);
++                    uRegVal_04 = uRegVal_04 & ~0x08;
++                    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04, uRegVal_04); //1515 02
++                    mdelay(100);
++                    reset_cnt++;
++                }
++                mdelay(1);
++            }
++        }
++    }
++
++    return reset_cnt;
++}
++
++static int _MHal_EMAC_DPHY_SPEED_UPDATE(void* hal)
++{
++    mhal_emac_t* pHal = (mhal_emac_t*) hal;
 +    u8 uRegVal_04;
 +
 +    uRegVal_04 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04);
@@ -468583,7 +469392,6 @@ index 000000000000..7744d425aac8
 +    uRegVal_04 = uRegVal_04 & ~0x08;
 +    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04, uRegVal_04); //1515 02
 +    mdelay(100);
-+    printk("[EMAC] EMAC_DPHY_REINIT \n");
 +    return 0;
 +}
 +#endif
@@ -468630,9 +469438,16 @@ index 000000000000..7744d425aac8
 +    printk("[%s] speed: %d , duplex: %d\n",__FUNCTION__, speed, duplex);
 +
 +#ifdef CONFIG_EMAC_DPHY_REINIT
++    if(pHal->phy_mode!=PHY_INTERFACE_MODE_RMII)
++    {
++        int reinit_cnt;
++        reinit_cnt = _MHal_EMAC_DPHY_REINIT(hal);
++        printk("[EMAC] DPHY retrain %d times \n", reinit_cnt);
++    }
++
 +    if( ((old_speed != speed)||(old_duplex != duplex)) && (pHal->phy_mode!=PHY_INTERFACE_MODE_RMII) )
 +    {
-+        _MHal_EMAC_DPHY_REINIT(hal);
++        _MHal_EMAC_DPHY_SPEED_UPDATE(hal);
 +    }
 +    old_speed = speed;
 +    old_duplex = duplex;
@@ -469734,6 +470549,10 @@ index 000000000000..7744d425aac8
 +    //set CLKsource to hv
 +    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0xC7, 0x80);
 +
++    //bit8: enable 10M HW control LED1
++    //bit9: enable invert function for LED1
++    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY0, 0xfd, 0x03);
++
 +#if 0
 +    //enable LED //16'0x0e_28[5:4]=01
 +    uRegVal = MHal_EMAC_ReadReg8(EMAC_RIU_REG_BASE, REG_BANK_PMSLEEP, 0x50);
@@ -470560,10 +471379,10 @@ index 000000000000..b4cc49dabc65
 +#endif
 diff --git a/drivers/sstar/emac/hal/infinity6e/mhal_emac.c b/drivers/sstar/emac/hal/infinity6e/mhal_emac.c
 new file mode 100755
-index 000000000000..1051f26f832a
+index 000000000000..85ecf04a17e4
 --- /dev/null
 +++ b/drivers/sstar/emac/hal/infinity6e/mhal_emac.c
-@@ -0,0 +1,2729 @@
+@@ -0,0 +1,2761 @@
 +/* SigmaStar trade secret */
 +/*
 +* mhal_emac.c- Sigmastar
@@ -471771,6 +472590,12 @@ index 000000000000..1051f26f832a
 +#endif
 +*/
 +
++//----------------------------------------------------------------
++// Reset digital phy when status is not good.
++// uRegVal_7E & uRegVal_A5 : check phy reset completed or not.
++// uRegVal_8x : digital phy status value.
++// uRegVal_9x : analog phy status value.
++//----------------------------------------------------------------
 +static int _MHal_EMAC_DPHY_REINIT(void* hal)
 +{
 +    mhal_emac_t* pHal = (mhal_emac_t*) hal;
@@ -471780,17 +472605,21 @@ index 000000000000..1051f26f832a
 +    u8 uRegVal_A5;
 +    u8 uRegVal_8C, uRegVal_8D;
 +    s16 uRegVal_8x;
++    u8 uRegVal_94, uRegVal_95;
++    u16 uRegVal_9x;
 +    u8 uRegVal_04;
 +    u8 cntGood = 0, cntBad = 0;
++    u8 reset_cnt = 0;
 +
-+    for(i=0; i<200; i++)
++    for(i=0; i<100; i++)
 +    {
-+        mdelay(15);
++        mdelay(1);
 +        uRegVal_7E = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x7E); //1515 3f
 +        uRegVal_7E = uRegVal_7E & 0x0F;
 +        uRegVal_A5 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0xA5); //1515 52
 +        uRegVal_A5 = uRegVal_A5 & 0x07;
 +
++        // check phy reset completed or not
 +        if(uRegVal_7E == 0x08 && uRegVal_A5 == 0x07)
 +        {
 +            MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x88, 0x00); //1515 44
@@ -471806,7 +472635,14 @@ index 000000000000..1051f26f832a
 +            if((uRegVal_8x & 0x0400) != 0)
 +                uRegVal_8x = uRegVal_8x | 0xF800;
 +
-+            if(uRegVal_8x > -64 && uRegVal_8x < 64)
++            uRegVal_94 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x94); //1515 4A
++            uRegVal_95 = MHal_EMAC_ReadReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x95); //1515 4A
++
++            uRegVal_9x = uRegVal_95 << 8 | uRegVal_94;
++
++            //printk("[EMAC] uRegVal_8x: %d, uRegVal_9x: %d \n", uRegVal_8x, uRegVal_9x);
++
++            if((uRegVal_8x > -128 && uRegVal_8x < 128) && (uRegVal_9x > 0 && uRegVal_9x < 150))
 +            {
 +                cntGood++;
 +                cntBad = 0;
@@ -471820,9 +472656,20 @@ index 000000000000..1051f26f832a
 +            }
 +            else
 +            {
++                //printk("[EMAC] uRegVal_8x: %d, uRegVal_9x: %d \n", uRegVal_8x, uRegVal_9x);
++
++                // Reduce noise power threshold & tune setting of lpf_k1/ffe_error_scale
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x90, 0x00); //1515_48: 0x0000
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x91, 0x00);
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x76, 0x00); //1515_3b: 0x0800
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x77, 0x08);
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x10, 0x53); //1515_08: 0x0053
++                MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x11, 0x00);
++
++                // if cntBad++ continuously, then dphy reset.
 +                cntBad++;
 +                cntGood = 0;
-+                if(cntBad > 5)
++                if(cntBad > 3)
 +                {
 +                    cntBad = 0;
 +                    cntGood = 0;
@@ -471834,13 +472681,14 @@ index 000000000000..1051f26f832a
 +                    uRegVal_04 = uRegVal_04 & ~0x08;
 +                    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x04, uRegVal_04); //1515 02
 +                    mdelay(100);
++                    reset_cnt++;
 +                }
 +                mdelay(1);
 +            }
 +        }
 +    }
 +
-+    return i;
++    return reset_cnt;
 +}
 +
 +//-------------------------------------------------------------------------------------------------
@@ -471864,16 +472712,7 @@ index 000000000000..1051f26f832a
 +            xval = xval | EMAC_SPD;
 +        }
 +
-+        //
-+        if((CamOsChipRevision()==0x1) && (pHal->phy_mode!=PHY_INTERFACE_MODE_RMII))
-+        {
-+            int reinit_cnt;
-+            reinit_cnt = _MHal_EMAC_DPHY_REINIT(hal);
-+            //printk("[EMAC] DPHY retrain %d times \n", reinit_cnt);
-+        }
-+
 +        MHal_EMAC_Set_Pipe_Line_Delay(hal, 1);
-+
 +    }
 +    else
 +    {
@@ -471888,6 +472727,14 @@ index 000000000000..1051f26f832a
 +        // PATCH for rx receive 256 byte packet only SPEED_10
 +        MHal_EMAC_Set_Pipe_Line_Delay(hal, 0);
 +    }
++
++    if(pHal->phy_mode!=PHY_INTERFACE_MODE_RMII)
++    {
++        int reinit_cnt;
++        reinit_cnt = _MHal_EMAC_DPHY_REINIT(hal);
++        //printk("[EMAC] DPHY retrain %d times \n", reinit_cnt);
++    }
++
 +    MHal_EMAC_WritReg32(hal, REG_ETH_CFG, xval );
 +}
 +
@@ -472998,6 +473845,10 @@ index 000000000000..1051f26f832a
 +    //set CLKsource to hv
 +    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0xC7, 0x80);
 +
++    //bit8: enable 10M HW control LED1
++    //bit9: enable invert function for LED1
++    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY0, 0xfd, 0x03);
++
 +    //set scale factor of LMS & LPF
 +    MHal_EMAC_WritReg8(pHal->phyRIU, REG_BANK_ALBANY1, 0x10, 0x46); //1515 08
 +
@@ -473842,10 +474693,10 @@ index 000000000000..b4cc49dabc65
 +#endif
 diff --git a/drivers/sstar/emac/mdrv_emac.c b/drivers/sstar/emac/mdrv_emac.c
 new file mode 100755
-index 000000000000..c5b383e61e66
+index 000000000000..7384a55f85ea
 --- /dev/null
 +++ b/drivers/sstar/emac/mdrv_emac.c
-@@ -0,0 +1,5413 @@
+@@ -0,0 +1,5435 @@
 +/* SigmaStar trade secret */
 +/*
 +* mdrv_emac.c- Sigmastar
@@ -475911,6 +476762,25 @@ index 000000000000..c5b383e61e66
 +            spin_unlock_irqrestore(&hemac->mutexTXQ, flags);
 +            dev_kfree_skb_any(skb);
 +        }
++        else if ((TXQ_NF_PKT_ALIGN > 0) && ((int)(skb->data) & (TXQ_NF_PKT_ALIGN - 1)))
++        {
++            char* start = kmalloc(ALIGN(EMAC_MTU,256), GFP_ATOMIC);
++            char* p = start;
++
++            if (!start)
++            {
++                ret = NETDEV_TX_BUSY;
++                goto out_unlock;
++            }
++            memcpy(p, skb->data, skb->len);
++            if (EMAC_SG_BUF_CACHE)
++                Chip_Flush_Cache_Range((size_t)start, skb->len);
++            skb_addr = VIRT2BUS(start);
++            spin_lock_irqsave(&hemac->mutexTXQ, flags);
++            skb_queue_insert(&(hemac->skb_queue_tx), (struct sk_buff*)0xFFFFFFFF, (dma_addr_t)skb_addr, skb->len, 1);
++            spin_unlock_irqrestore(&hemac->mutexTXQ, flags);
++            dev_kfree_skb_any(skb);
++        }
 +        else
 +        {
 +            {
@@ -476830,7 +477700,7 @@ index 000000000000..c5b383e61e66
 +    // rxinfo->descPhys = (dma_addr_t)mem_info.phys;
 +#endif
 +    rxinfo->desc = (struct rbf_t*)p;
-+    
++
 +    // EMAC_DBG("alloRAM_VA_BASE=0x%zx alloRAM_PA_BASE=0x%zx\n  alloRAM_SIZE=0x%zx\n", (size_t) rxinfo->desc,(size_t) rxinfo->descPhys,(size_t)rxinfo->size_desc_queue);
 +    BUG_ON(!rxinfo->desc);
 +
@@ -476864,6 +477734,7 @@ index 000000000000..c5b383e61e66
 +    rxinfo->size_desc_queue = 0;
 +}
 +
++#if 1//ndef CONFIG_SS_LOWPWR_STR
 +static void MDev_EMAC_RX_Desc_Reset(struct emac_handle *hemac)
 +{
 +    rx_desc_queue_t* rxinfo = &(hemac->rx_desc_queue);
@@ -476872,6 +477743,7 @@ index 000000000000..c5b383e61e66
 +    memset(rxinfo->desc, 0x00, rxinfo->size_desc_queue);
 +    Chip_Flush_MIU_Pipe();
 +}
++#endif
 +
 +static void MDev_EMAC_MemFree(struct emac_handle *hemac)
 +{
@@ -477820,7 +478692,7 @@ index 000000000000..c5b383e61e66
 +                int tmp;
 +                MHal_EMAC_read_phy(hemac->hal, 0, 0x142, &val);
 +                tmp = ((val >> 8) & 0x1f);
-+                
++
 +#if 0
 +                if (tmp & 0x10)
 +                {
@@ -477921,10 +478793,9 @@ index 000000000000..c5b383e61e66
 +#if (0 == MSTAR_EMAC_NAPI)
 +    spin_lock_init(&hemac->mutexRXInt);
 +#endif
-+
-+    spin_lock_irqsave(&hemac->mutexTXQ, flags);
++    //spin_lock_irqsave(&hemac->mutexTXQ, flags);
 +    skb_queue_create(&(hemac->skb_queue_tx), MHal_EMAC_TXQ_Size(hemac->hal), MHal_EMAC_TXQ_Size(hemac->hal)+ hemac->txq_num_sw);
-+    spin_unlock_irqrestore(&hemac->mutexTXQ, flags);
++    //spin_unlock_irqrestore(&hemac->mutexTXQ, flags);
 +
 +#if EMAC_FLOW_CONTROL_TX
 +    spin_lock_init(&hemac->mutexFlowTX);
@@ -478246,7 +479117,7 @@ index 000000000000..c5b383e61e66
 +static void MDev_EMAC_timer_LinkStatus(unsigned long data)
 +{
 +    int ret = 0;
-+    struct net_device* netdev = (struct net_device*)data; 
++    struct net_device* netdev = (struct net_device*)data;
 +    struct emac_handle *hemac = (struct emac_handle *) netdev_priv(netdev);
 +    static u32 bmsr, time_count = 0;
 +    unsigned long flags;
@@ -478509,7 +479380,7 @@ index 000000000000..c5b383e61e66
 +    if (!hemac->mii_bus)
 +        return;
 +    mdiobus_unregister(hemac->mii_bus);
-+    devm_mdiobus_free(hemac->dev, hemac->mii_bus);    
++    devm_mdiobus_free(hemac->dev, hemac->mii_bus);
 +}
 +
 +#endif
@@ -479025,6 +479896,7 @@ index 000000000000..c5b383e61e66
 +
 +static int mstar_emac_drv_suspend(struct platform_device *dev, pm_message_t state)
 +{
++#if 1//ndef CONFIG_SS_LOWPWR_STR
 +    // struct net_device *netdev=(struct net_device*)dev->dev.platform_data;
 +    struct net_device *netdev=(struct net_device*) platform_get_drvdata(dev);
 +    struct emac_handle *hemac;
@@ -479085,12 +479957,13 @@ index 000000000000..c5b383e61e66
 +
 +    //phy_link_adjust
 +    hemac->bEthCfg = 0;
-+
++#endif
 +    return 0;
 +}
 +
 +static int mstar_emac_drv_resume(struct platform_device *dev)
 +{
++#if 1//ndef CONFIG_SS_LOWPWR_STR
 +    // struct net_device *netdev=(struct net_device*)dev->dev.platform_data;
 +    struct net_device *netdev=(struct net_device*) platform_get_drvdata(dev);
 +    struct emac_handle *hemac;
@@ -479135,7 +480008,7 @@ index 000000000000..c5b383e61e66
 +    }
 +
 +    MDev_EMAC_set_rx_mode(netdev);
-+
++#endif
 +    return 0;
 +}
 +
@@ -479261,10 +480134,10 @@ index 000000000000..c5b383e61e66
 +MODULE_LICENSE("GPL");
 diff --git a/drivers/sstar/emac/mdrv_emac.h b/drivers/sstar/emac/mdrv_emac.h
 new file mode 100755
-index 000000000000..a3ea7e788fcd
+index 000000000000..fb569679998e
 --- /dev/null
 +++ b/drivers/sstar/emac/mdrv_emac.h
-@@ -0,0 +1,384 @@
+@@ -0,0 +1,389 @@
 +/* SigmaStar trade secret */
 +/*
 +* mdrv_emac.h- Sigmastar
@@ -479329,6 +480202,11 @@ index 000000000000..a3ea7e788fcd
 +//-------------------------------------------------------------------------------------------------
 +#define EMAC_MTU                            (1524)
 +
++//Align Non-Fragment packets into the setting bytes. It should be power of 2. (1,2,4,8,...64)
++//Set 0 to disable this and use skb_clone() instead
++//Recommanded 64 bytes is for both EMAC 16 bytes and Cache line.
++#define TXQ_NF_PKT_ALIGN (64)
++
 +//--------------------------------------------------------------------------------------------------
 +//  Constant definition
 +//--------------------------------------------------------------------------------------------------
@@ -479475,7 +480353,7 @@ index 000000000000..a3ea7e788fcd
 +typedef struct _UtilityVarsEMAC UtilityVarsEMAC;
 +#endif
 +
-+struct emac_handle 
++struct emac_handle
 +{
 +    struct net_device_stats stats;
 +
@@ -505988,10 +506866,10 @@ index 000000000000..2e8e3639e12a
 +}
 diff --git a/drivers/sstar/emmc/unify_driver/mstar_mci.c b/drivers/sstar/emmc/unify_driver/mstar_mci.c
 new file mode 100755
-index 000000000000..f655f3d52494
+index 000000000000..f70598e4c049
 --- /dev/null
 +++ b/drivers/sstar/emmc/unify_driver/mstar_mci.c
-@@ -0,0 +1,1734 @@
+@@ -0,0 +1,1739 @@
 +/*
 +* mstar_mci.c- Sigmastar
 +*
@@ -507568,11 +508446,12 @@ index 000000000000..f655f3d52494
 +static s32 mstar_mci_suspend(struct platform_device *pDev_st, pm_message_t state)
 +{
 +    /* Define Local Variables */
++    s32 ret = 0;
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    struct mmc_host *pMMCHost_st;
-+    s32 ret;
 +
 +	pMMCHost_st = platform_get_drvdata(pDev_st);
-+	ret = 0;
++#endif
 +
 +	// wait for D0 high before losing eMMC Vcc
 +	eMMC_LockFCIE((U8*)__FUNCTION__);
@@ -507584,6 +508463,7 @@ index 000000000000..f655f3d52494
 +	eMMC_PlatformDeinit();
 +	eMMC_UnlockFCIE((U8*)__FUNCTION__);
 +
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    if (pMMCHost_st)
 +    {
 +		eMMC_debug(eMMC_DEBUG_LEVEL,1,"eMMC, suspend + \n");
@@ -507591,18 +508471,20 @@ index 000000000000..f655f3d52494
 +    }
 +
 +	eMMC_debug(eMMC_DEBUG_LEVEL,1,"eMMC, suspend -, %Xh\n", ret);
++#endif
++
 +	return ret;
 +}
 +
 +static s32 mstar_mci_resume(struct platform_device *pDev_st)
 +{
++    s32 ret = 0;
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    struct mmc_host *pMMCHost_st;
-+    s32 ret;
 +    static u8 u8_IfLock=0;
 +
 +	eMMC_debug(eMMC_DEBUG_LEVEL,0,"eMMC, resume +\n");
 +	pMMCHost_st = platform_get_drvdata(pDev_st);
-+	ret = 0;
 +
 +	if(0 == (REG_FCIE(FCIE_REG16h) & BIT_EMMC_ACTIVE))
 +	{
@@ -507626,6 +508508,7 @@ index 000000000000..f655f3d52494
 +    }
 +    eMMC_debug(eMMC_DEBUG_LEVEL,0,"eMMC, resume -\n");
 +    //eMMC_debug(eMMC_DEBUG_LEVEL,1,"eMMC, resume -, %Xh\n", ret);
++#endif
 +	return ret;
 +}
 +#endif  /* End ifdef CONFIG_PM */
@@ -507805,10 +508688,10 @@ index 000000000000..63f470a48350
 +#endif
 diff --git a/drivers/sstar/emmc/unify_driver/mstar_mci_v5.c b/drivers/sstar/emmc/unify_driver/mstar_mci_v5.c
 new file mode 100755
-index 000000000000..905813f04a10
+index 000000000000..4c3a5852a6e7
 --- /dev/null
 +++ b/drivers/sstar/emmc/unify_driver/mstar_mci_v5.c
-@@ -0,0 +1,3547 @@
+@@ -0,0 +1,3553 @@
 +/*
 +* mstar_mci_v5.c- Sigmastar
 +*
@@ -511139,7 +512022,9 @@ index 000000000000..905813f04a10
 +static s32 mstar_mci_suspend(struct platform_device *pDev_st, pm_message_t state)
 +{
 +    /* Define Local Variables */
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    struct mmc_host *pMMCHost_st    = platform_get_drvdata(pDev_st);
++#endif
 +    s32 ret                         = 0;
 +
 +    eMMC_LockFCIE((U8*)__FUNCTION__);
@@ -511154,6 +512039,7 @@ index 000000000000..905813f04a10
 +    eMMC_PlatformDeinit();
 +    eMMC_UnlockFCIE((U8*)__FUNCTION__);
 +
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    if (pMMCHost_st)
 +    {
 +        eMMC_debug(eMMC_DEBUG_LEVEL,1,"eMMC, suspend + \n");
@@ -511166,14 +512052,16 @@ index 000000000000..905813f04a10
 +
 +    u16_OldPLLClkParam = 0xFFFF;
 +    u16_OldPLLDLLClkParam = 0xFFFF;
++#endif
 +
 +    return ret;
 +}
 +
 +static s32 mstar_mci_resume(struct platform_device *pDev_st)
 +{
-+    struct mmc_host *pMMCHost_st    = platform_get_drvdata(pDev_st);
 +    s32 ret                         = 0;
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
++    struct mmc_host *pMMCHost_st    = platform_get_drvdata(pDev_st);
 +    static u8 u8_IfLock             = 0;
 +
 +    if(0 == (REG_FCIE(FCIE_MIE_FUNC_CTL) & BIT_EMMC_ACTIVE))
@@ -511214,6 +512102,7 @@ index 000000000000..905813f04a10
 +    }
 +
 +    eMMC_debug(eMMC_DEBUG_LEVEL,0,"eMMC, resume -\n");
++#endif
 +
 +    return ret;
 +}
@@ -518274,10 +519163,10 @@ index 000000000000..2f6485a06b2c
 +
 diff --git a/drivers/sstar/emmc/unify_driver/src/common/eMMC_hal_v5.c b/drivers/sstar/emmc/unify_driver/src/common/eMMC_hal_v5.c
 new file mode 100755
-index 000000000000..df1ca4a30f21
+index 000000000000..8c0976ca607f
 --- /dev/null
 +++ b/drivers/sstar/emmc/unify_driver/src/common/eMMC_hal_v5.c
-@@ -0,0 +1,3786 @@
+@@ -0,0 +1,3790 @@
 +/*
 +* eMMC_hal_v5.c- Sigmastar
 +*
@@ -518887,6 +519776,10 @@ index 000000000000..df1ca4a30f21
 +
 +    REG_FCIE_W(FCIE_MIE_INT_EN, 0);
 +    REG_FCIE_W(FCIE_MIE_FUNC_CTL, BIT_MIE_FUNC_ENABLE|BIT_EMMC_ACTIVE);
++
++    //Select MIU burst 8, if set to 1, the MIU may not have time to process events.
++    REG_FCIE_SETBIT(FCIE_MMA_PRI_REG, BIT4|BIT5);
++
 +    // all cmd are 5 bytes (excluding CRC)
 +    REG_FCIE_CLRBIT(FCIE_CMD_RSP_SIZE, BIT_CMD_SIZE_MASK);
 +    REG_FCIE_SETBIT(FCIE_CMD_RSP_SIZE, (eMMC_CMD_BYTE_CNT)<< BIT_CMD_SIZE_SHIFT);
@@ -525501,10 +526394,10 @@ index 000000000000..444ee9f66750
 +
 diff --git a/drivers/sstar/flash_isp/drvDeviceInfo.c b/drivers/sstar/flash_isp/drvDeviceInfo.c
 new file mode 100755
-index 000000000000..be791cd91a7d
+index 000000000000..65f352832400
 --- /dev/null
 +++ b/drivers/sstar/flash_isp/drvDeviceInfo.c
-@@ -0,0 +1,1658 @@
+@@ -0,0 +1,1661 @@
 +/*
 +* drvDeviceInfo.c- Sigmastar
 +*
@@ -527144,6 +528037,7 @@ index 000000000000..be791cd91a7d
 +    { FLASH_IC_A25LM032,    MID_AM,     0x30,   0x16,    NULL,                                NULL,                       0x400000,    64,    SIZE_64KB,  256,    50,     BITS(5:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_FAST_MODE   }, FALSE, TRUE},
 +//    { FLASH_IC_ST25Q128,    MID_ZB,     0x40,   0x18,     _pstWriteProtectTable_ZB25Q128,     NULL,                       0x1000000,  256,    SIZE_64KB,  256,    50,     BITS(5:2, 0x0F),    ISP_DEV_ST,     ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_DUAL_AD_MODE}, TRUE,  TRUE},
 +    { FLASH_IC_ZB25Q64 ,    MID_EON,    0x70,   0x17,     _pstWriteProtectTable_ZB25Q64 ,     NULL,                       0x800000,  128,     SIZE_64KB,  256,    50,     BITS(5:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_DUAL_AD_MODE}, TRUE,  TRUE},
++    { FLASH_IC_ZB25VQ64 ,   MID_ZB,    0x40,   0x17,     _pstWriteProtectTable_ZB25Q64 ,     NULL,                       0x800000,  128,     SIZE_64KB,  256,    50,     BITS(5:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_DUAL_AD_MODE}, TRUE,  TRUE},
 +    { FLASH_IC_ZB25VQ128,    MID_ZB,     0x40,   0x18,     _pstWriteProtectTable_ZB25VQ128,     NULL,                       0x1000000,  256,    SIZE_64KB,  256,    50,     BITS(5:2, 0x0F),    ISP_DEV_ST,     ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_QUAD_MODE}, TRUE,  TRUE},
 +    { FLASH_IC_25Q128AS,    MID_25Q,    0X40,   0X18,   NULL,                                 NULL,                       0x1000000,  256,    SIZE_64KB,  256,    50,     BITS(5:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_SINGLE_MODE},  TRUE,   TRUE},
 +{ FLASH_IC_BYT_BY25Q64AS,    MID_25Q,     0X40,  0X17,   _pstWriteProtectTable_BY25Q64AS_CMP0,   NULL,                0x800000,   128,    SIZE_64KB,  256,    50,     BITS(6:2, 0x07),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_FAST_MODE   },  TRUE,  TRUE},
@@ -527156,19 +528050,21 @@ index 000000000000..be791cd91a7d
 +    { FLASH_IC_WUHAN_XM25QH256C, MID_WUHAN,	  0x40,  0x19,	 NULL,                                 NULL,                  0x2000000,    128,	  SIZE_64KB,  256,	  50,	  BITS(5:2, 0x0F),	  ISP_DEV_NEXTFLASH,	 ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_DUAL_AD_MODE}, TRUE,   TRUE},
 +    { FLASH_IC_XTX_XT25F64B,     MID_XTX,     0X40,  0X17,   _pstWriteProtectTable_XTX_XT25F64B,   NULL,                       0x800000,   128,    SIZE_64KB,  256,    50,     BITS(6:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_FAST_MODE   },  TRUE,   TRUE},
 +    { FLASH_IC_XTX_XT25F128B,    MID_XTX,     0X40,  0X18,   _pstWriteProtectTable_XTX_XT25F128B,  NULL,                       0x1000000,  256,    SIZE_64KB,  256,    50,     BITS(6:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_FAST_MODE   },  TRUE,   TRUE},
-+	{ FLASH_IC_WUHAN_XM25QH128C, MID_WUHAN,	  0x40,	 0x18,	 _pstWriteProtectTable_XM25QH128C,     NULL,                       0x1000000,  256,	   SIZE_64KB,  256,	  133,	 BITS(6:2, 0x1F),	 ISP_DEV_NEXTFLASH,	 ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_QUAD_MODE}, TRUE,   TRUE},
-+	{ FLASH_IC_NM25Q64,          MID_NM,      0X22,  0X17,   NULL,                                 NULL,                  0x800000,   128,    SIZE_64KB,  256,    50,     BITS(6:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_QUAD_MODE   },  TRUE,   TRUE},
++    { FLASH_IC_XTX_XT25F256B,    MID_XTX,     0X40,  0X19,   NULL,                                 NULL,                  0x2000000,  512,    SIZE_64KB,  256,    50,     BITS(6:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_FAST_MODE   },  TRUE,   TRUE},
++    { FLASH_IC_WUHAN_XM25QH128C, MID_WUHAN,	  0x40,	 0x18,	 _pstWriteProtectTable_XM25QH128C,     NULL,                       0x1000000,  256,	   SIZE_64KB,  256,	  133,	 BITS(6:2, 0x1F),	 ISP_DEV_NEXTFLASH,	 ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_QUAD_MODE}, TRUE,   TRUE},
++    { FLASH_IC_NM25Q64,          MID_NM,      0X22,  0X17,   NULL,                                 NULL,                  0x800000,   128,    SIZE_64KB,  256,    50,     BITS(6:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_QUAD_MODE   },  TRUE,   TRUE},
 +    { FLASH_IC_NM25Q128,         MID_NM,      0X21,  0X18,   NULL,                                 NULL,                  0x1000000,  256,    SIZE_64KB,  256,    50,     BITS(6:2, 0x0F),    ISP_DEV_PMC,    ISP_SPI_ENDIAN_LITTLE, {E_SPI_54M  , E_QUAD_MODE   },  TRUE,   TRUE},
-+	{ FLASH_IC_IS25LP064D,	MID_IS,	    0x60,	0x17,	_pstWriteProtectTable_IS25LP064D,     NULL,                       0x800000,	  128,	  SIZE_64KB,  256,	  50,	 BITS(5:2, 0x0F),	 ISP_DEV_PMC,	     ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_FAST_MODE},    TRUE,   TRUE},
-+	{ FLASH_IC_PUYA_PY25Q128HA,     MID_PY, 0x20,   0x18,   NULL,  NULL, 0x1000000,   128,    SIZE_64KB,  256,        50,    BITS(5:2, 0x0F),        ISP_DEV_PMC,        ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_FAST_MODE},    TRUE,   TRUE}
++    { FLASH_IC_IS25LP064D,	MID_IS,	    0x60,	0x17,	_pstWriteProtectTable_IS25LP064D,     NULL,                       0x800000,	  128,	  SIZE_64KB,  256,	  50,	 BITS(5:2, 0x0F),	 ISP_DEV_PMC,	     ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_FAST_MODE},    TRUE,   TRUE},
++    { FLASH_IC_PUYA_PY25Q128HA,     MID_PY, 0x20,   0x18,   NULL,  NULL, 0x1000000,   256,    SIZE_64KB,  256,        50,    BITS(5:2, 0x0F),        ISP_DEV_PMC,        ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_FAST_MODE},    TRUE,   TRUE},
++    { FLASH_IC_PUYA_PY25Q64HA,      MID_PY, 0x60,   0x17,   NULL,  NULL, 0x1000000,   128,    SIZE_64KB,  256,        50,    BITS(5:2, 0x0F),        ISP_DEV_PMC,        ISP_SPI_ENDIAN_LITTLE, {E_SPI_86M  , E_FAST_MODE},    TRUE,   TRUE}
 +};
 +
 diff --git a/drivers/sstar/flash_isp/drvDeviceInfo.h b/drivers/sstar/flash_isp/drvDeviceInfo.h
 new file mode 100755
-index 000000000000..de002b0896f9
+index 000000000000..ca259c48d5fe
 --- /dev/null
 +++ b/drivers/sstar/flash_isp/drvDeviceInfo.h
-@@ -0,0 +1,264 @@
+@@ -0,0 +1,267 @@
 +/*
 +* drvDeviceInfo.h- Sigmastar
 +*
@@ -527311,7 +528207,8 @@ index 000000000000..de002b0896f9
 +
 +//ZB
 +#define FLASH_IC_ZB25Q64        0x1002UL       // 8M
-+#define FLASH_IC_ZB25VQ128       0x1003UL       // 16M
++#define FLASH_IC_ZB25VQ128      0x1003UL       // 16M
++#define FLASH_IC_ZB25VQ64       0x1004UL       // 8M
 +
 +//Wuhan Xinxin
 +#define FLASH_IC_WUHAN_XM25QH16A    0x1200UL      // 2M
@@ -527333,6 +528230,7 @@ index 000000000000..de002b0896f9
 +#define FLASH_IC_XTX_XT25F32B       0x1301UL      // 4M
 +#define FLASH_IC_XTX_XT25F64B       0x1302UL      // 8M
 +#define FLASH_IC_XTX_XT25F128B      0x1303UL      // 16M
++#define FLASH_IC_XTX_XT25F256B      0x1304UL      // 32M
 +
 +
 +#define FLASH_IC_25Q128AS       0x1100UL       // 25q128as
@@ -527342,7 +528240,8 @@ index 000000000000..de002b0896f9
 +#define FLASH_IC_BYT_BY25Q128AS      0x1401UL      // 128M
 +
 +//PY
-+#define FLASH_IC_PUYA_PY25Q128HA      0x1500UL      // 128M
++#define FLASH_IC_PUYA_PY25Q128HA      0x1500UL      // 16MB
++#define FLASH_IC_PUYA_PY25Q64HA       0x1501UL      // 16MB
 +
 +// Flash Manufacture ID
 +#define MID_MXIC                0xC2UL
@@ -569625,10 +570524,10 @@ index 000000000000..683fe08b6efa
 +#endif // _REG_SERFLASH_H_
 diff --git a/drivers/sstar/flash_isp/mtd_serflash.c b/drivers/sstar/flash_isp/mtd_serflash.c
 new file mode 100755
-index 000000000000..dbfa755ad483
+index 000000000000..b7fd502bfff9
 --- /dev/null
 +++ b/drivers/sstar/flash_isp/mtd_serflash.c
-@@ -0,0 +1,883 @@
+@@ -0,0 +1,948 @@
 +/*
 +* mtd_serflash.c- Sigmastar
 +*
@@ -569735,10 +570634,16 @@ index 000000000000..dbfa755ad483
 +    return container_of(mtd, struct serflash, mtd);
 +}
 +
++#define FLASH_BLOCK_SIZE 0x10000
++#define FLASH_SECTOR_SIZE 0x1000
++
 +/* Erase flash fully or part of it */
 +static int serflash_erase(struct mtd_info *mtd, struct erase_info *instr)
 +{
-+
++    int ret;
++    u32 len;
++    u32 offset;
++    u32 u32ErasedSize;
 +    struct serflash *flash = mtd_to_serflash(mtd);
 +    uint64_t addr_temp, len_temp;
 +
@@ -569757,7 +570662,7 @@ index 000000000000..dbfa755ad483
 +        result = x; */
 +    addr_temp = instr->addr;
 +    len_temp = instr->len;
-+    if ((do_div(addr_temp , mtd->erasesize) != 0) ||(do_div(len_temp, mtd->erasesize) != 0))
++    if ((do_div(addr_temp , FLASH_SECTOR_SIZE) != 0) || (do_div(len_temp, FLASH_SECTOR_SIZE) != 0))
 +    {
 +        return -EINVAL;
 +    }
@@ -569786,14 +570691,73 @@ index 000000000000..dbfa755ad483
 +        mutex_unlock(&flash->lock);
 +        return -EIO;
 +    }
-+    else if (!MDrv_SERFLASH_AddressErase(instr->addr, instr->len, 1))
++    else
 +    {
-+        instr->state = MTD_ERASE_FAILED;
++        len = (u32)instr->len;
++        offset = (u32)instr->addr;
++
++        if(offset % FLASH_BLOCK_SIZE)
++        {
++            u32ErasedSize = FLASH_BLOCK_SIZE - offset%FLASH_BLOCK_SIZE;
++            if (len < u32ErasedSize)
++            {
++                u32ErasedSize = len;
++            }
++            if(MDrv_SERFLASH_SectorErase(offset, offset+u32ErasedSize-1))
++            {
++                offset += u32ErasedSize;
++                len -= u32ErasedSize;
++                ret = 0;
++            }
++            else
++            {
++                ret =  (-EINVAL);
++                goto Done;
++            }
++        }
++        if(len >= FLASH_BLOCK_SIZE)
++        {
++            u32ErasedSize = len - len%FLASH_BLOCK_SIZE;
++
++            if( MDrv_SERFLASH_AddressErase(offset, u32ErasedSize, 1))
++            {
++                offset += u32ErasedSize;
++                len -= u32ErasedSize;
++                ret = 0;
++            }
++            else
++            {
++                 ret =  (-EINVAL);
++                goto Done;
++            }
++        }
++
++        if(len)
++        {
++            u32ErasedSize = len;
++            if(MDrv_SERFLASH_SectorErase(offset, offset+u32ErasedSize-1))
++            {
++                offset += u32ErasedSize;
++                len -= u32ErasedSize;
++                ret = 0;
++            }
++            else
++            {
++                 ret =  (-EINVAL);
++                goto Done;
++            }
++        }
++
++    Done:
++        if(ret)
++        {
++            instr->state = MTD_ERASE_FAILED;
 +#ifndef CONFIG_DISABLE_WRITE_PROTECT
-+        MDrv_SERFLASH_WriteProtect(1);
++            MDrv_SERFLASH_WriteProtect(1);
 +#endif
-+        mutex_unlock(&flash->lock);
-+        return -EIO;
++            mutex_unlock(&flash->lock);
++            return -EIO;
++        }
 +    }
 +
 +#ifndef CONFIG_DISABLE_WRITE_PROTECT
@@ -613478,10 +614442,10 @@ index 000000000000..ea5b0b6eadb8
 +
 diff --git a/drivers/sstar/gpio/mdrv_gpio_io.c b/drivers/sstar/gpio/mdrv_gpio_io.c
 new file mode 100755
-index 000000000000..ec4afe52389f
+index 000000000000..896f2eac60f2
 --- /dev/null
 +++ b/drivers/sstar/gpio/mdrv_gpio_io.c
-@@ -0,0 +1,356 @@
+@@ -0,0 +1,358 @@
 +/*
 +* mdrv_gpio_io.c- Sigmastar
 +*
@@ -613767,6 +614731,7 @@ index 000000000000..ec4afe52389f
 +
 +static int camdriver_gpio_resume(struct device *dev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    int i;
 +    for (i = 0; i < GPIO_NR; i++)
 +    {
@@ -613791,6 +614756,7 @@ index 000000000000..ec4afe52389f
 +            }
 +        }
 +    }
++#endif
 +    return 0;
 +}
 +#else
@@ -615074,10 +616040,10 @@ index 000000000000..79a3d81a12d3
 +
 diff --git a/drivers/sstar/gpio_key_sample/kernel_gpio_key_patch/drivers/input/keyboard/gpio_keys.c b/drivers/sstar/gpio_key_sample/kernel_gpio_key_patch/drivers/input/keyboard/gpio_keys.c
 new file mode 100755
-index 000000000000..b4292962d65c
+index 000000000000..a5512531930f
 --- /dev/null
 +++ b/drivers/sstar/gpio_key_sample/kernel_gpio_key_patch/drivers/input/keyboard/gpio_keys.c
-@@ -0,0 +1,955 @@
+@@ -0,0 +1,964 @@
 +/*
 + * Driver for keys on GPIO lines capable of generating interrupts.
 + *
@@ -615114,10 +616080,11 @@ index 000000000000..b4292962d65c
 +#include <linux/spinlock.h>
 +
 +
-+#define SUPPORT_SW_BOTH_TRIGGER
-+
-+#ifdef SUPPORT_SW_BOTH_TRIGGER
-+int key_status;
++#ifdef CONFIG_ARCH_SSTAR
++#define SSTAR_MAX_GPIO  128
++#define SSTAR_GPIO_KEY_STATE_INDEX(x) (x >> 5)
++/* bitmap to save gpio state */
++int key_status[SSTAR_MAX_GPIO/(sizeof(int)*8)] = {0};
 +#endif
 +
 +struct gpio_button_data {
@@ -615444,40 +616411,40 @@ index 000000000000..b4292962d65c
 +
 +static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata)
 +{
-+	const struct gpio_keys_button *button = bdata->button;
-+	struct input_dev *input = bdata->input;
-+	unsigned int type = button->type ?: EV_KEY;
-+	int state;
++    const struct gpio_keys_button *button = bdata->button;
++    struct input_dev *input = bdata->input;
++    unsigned int type = button->type ?: EV_KEY;
++    int state;
 +
-+	state = gpiod_get_value_cansleep(bdata->gpiod);
-+	if (state < 0) {
-+		dev_err(input->dev.parent,
-+			"failed to get gpio state: %d\n", state);
++    state = gpiod_get_value_cansleep(bdata->gpiod);
++    if (state < 0) {
++        dev_err(input->dev.parent,
++                "failed to get gpio state: %d\n", state);
++        return;
++    }
++#ifdef CONFIG_ARCH_SSTAR
++    BUG_ON(button->gpio > SSTAR_MAX_GPIO);
++
++    //if(key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)]==state)
++
++    if( !(((key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] >> (button->gpio % sizeof(key_status[0]))) ^ state) & 0x1) )
++	{
++		pr_debug("false trigger, state: %d\n", state);
 +		return;
 +	}
-+#ifdef SUPPORT_SW_BOTH_TRIGGER
-+	if(key_status==state)
-+	{
-+		pr_info("false trigger");
-+		return;
-+	}
-+	key_status = state;
 +
-+	if(key_status)
++	if(state)
 +	{
-+		//irqflags = IRQF_TRIGGER_RISING;
 +		irq_set_irq_type(bdata->irq,IRQF_TRIGGER_RISING);
-+
-+
++		key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] |=  (1 << (button->gpio % sizeof(key_status[0])));
 +	}
 +	else
 +	{
-+			//irqflags = IRQF_TRIGGER_FALLING;
 +		irq_set_irq_type(bdata->irq,IRQF_TRIGGER_FALLING);
-+			
++		key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] &=  ~(1 << (button->gpio % sizeof(key_status[0])));
 +	}
 +
-+	pr_info("gpio_keys_gpio_report_event: code = %d state=%d\r\n", button->code, state);
++	pr_debug("gpio_keys_gpio_report_event: code = %d state=%d\r\n", button->code, state);
 +#endif
 +	if (type == EV_ABS) {
 +		if (state)
@@ -615499,6 +616466,7 @@ index 000000000000..b4292962d65c
 +		pm_relax(bdata->input->dev.parent);
 +}
 +
++
 +static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id)
 +{
 +	struct gpio_button_data *bdata = dev_id;
@@ -615586,6 +616554,7 @@ index 000000000000..b4292962d65c
 +	unsigned long irqflags;
 +	int irq;
 +	int error;
++	int state;
 +
 +	bdata->input = input;
 +	bdata->button = button;
@@ -615639,18 +616608,24 @@ index 000000000000..b4292962d65c
 +		INIT_DELAYED_WORK(&bdata->work, gpio_keys_gpio_work_func);
 +
 +		isr = gpio_keys_gpio_isr;
-+#ifdef SUPPORT_SW_BOTH_TRIGGER
-+		key_status = gpiod_get_value_cansleep(bdata->gpiod);
-+		if (key_status < 0) {
++#ifdef CONFIG_ARCH_SSTAR
++		state = gpiod_get_value_cansleep(bdata->gpiod);
++		if (state < 0) {
 +			dev_err(input->dev.parent,
-+				"failed to get gpio state: %d\n", key_status);
-+			return key_status;
++				"failed to get gpio state: %d\n", state);
++			return state;
 +		}
 +
-+		if(key_status)
++		if(state)
++		{
 +			irqflags = IRQF_TRIGGER_RISING;
++			key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] |=  (1 << (button->gpio % sizeof(key_status[0])));
++		}
 +		else
++		{
 +			irqflags = IRQF_TRIGGER_FALLING;
++			key_status[SSTAR_GPIO_KEY_STATE_INDEX(button->gpio)] &=  ~(1 << (button->gpio % sizeof(key_status[0])));
++		}
 +
 +#else
 +		irqflags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
@@ -616104,6 +617079,3004 @@ index 000000000000..cf2e495e2a9c
 +
 +    
 \ No newline at end of file
+diff --git a/drivers/sstar/gyro/Kconfig b/drivers/sstar/gyro/Kconfig
+new file mode 100755
+index 000000000000..b54ba5955f02
+--- /dev/null
++++ b/drivers/sstar/gyro/Kconfig
+@@ -0,0 +1,61 @@
++menuconfig SS_GYRO
++    tristate "SStar Gyro Driver Support"
++    default m
++    help
++        Support gyro for disalgo.
++
++if SS_GYRO
++
++choice
++    prompt "GYRO transfer choice"
++    default SS_GYRO_TRANSFER_I2C
++
++config SS_GYRO_TRANSFER_I2C
++	bool "Use I2C"
++    depends on I2C
++	help
++		Use i2c to transfer data.
++
++config SS_GYRO_TRANSFER_SPI
++	bool "Use SPI"
++    depends on SPI_MASTER
++	help
++		Use spi to transfer data.
++
++endchoice
++
++choice
++    prompt "GYRO chip choice"
++    default SS_GYRO_CHIP_ICG20660
++
++config SS_GYRO_CHIP_ICG20660
++    bool "ICG20660"
++    help
++        Use ICG20660
++
++config SS_GYRO_CHIP_ICG20330
++    bool "ICG20330"
++    help
++        Use ICG20330
++
++config SS_GYRO_CHIP_ICM40607
++    bool "ICM40607"
++    help
++        Use ICM40607
++
++endchoice
++
++config SS_GYRO_SYSFS
++    bool "Enable gyro sysfs"
++    default n
++    help
++        Enable gyro sysfs nodes for debug
++
++config SS_GYRO_DEBUG_ON
++    bool "Show debug info"
++    default n
++    help
++        Show debug info
++
++endif # SS_GYRO #
++
+diff --git a/drivers/sstar/gyro/Makefile b/drivers/sstar/gyro/Makefile
+new file mode 100755
+index 000000000000..648ee17e2c7b
+--- /dev/null
++++ b/drivers/sstar/gyro/Makefile
+@@ -0,0 +1,21 @@
++obj-$(CONFIG_SS_GYRO) += gyro.o
++# interface
++gyro-y := gyro_core.o
++gyro-$(CONFIG_SS_GYRO_SYSFS) += gyro_sysfs.o
++
++# transfer
++gyro-$(CONFIG_SS_GYRO_TRANSFER_I2C) += gyro_i2c.o
++gyro-$(CONFIG_SS_GYRO_TRANSFER_SPI) += gyro_spi.o
++
++# sensor
++gyro-$(CONFIG_SS_GYRO_CHIP_ICG20660) += gyro_sensor_icg20660.o
++gyro-$(CONFIG_SS_GYRO_CHIP_ICG20330) += gyro_sensor_icg20330.o
++gyro-$(CONFIG_SS_GYRO_CHIP_ICM40607) += gyro_sensor_icm40607.o
++
++ccflags-$(CONFIG_SS_GYRO_DEBUG_ON) := -DSS_GYRO_DEBUG_ON
++ccflags-$(CONFIG_SS_GYRO_SYSFS) += -DSS_GYRO_SYSFS
++
++gyro-y += gyro_module.o
++
++EXTRA_CFLAGS      +=  -Idrivers/sstar/include
++
+diff --git a/drivers/sstar/gyro/gyro_core.c b/drivers/sstar/gyro/gyro_core.c
+new file mode 100755
+index 000000000000..b444296d6383
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_core.c
+@@ -0,0 +1,289 @@
++/*
++ * gyro_core.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#include <linux/module.h>
++#include <linux/export.h>
++
++#include "gyro_core.h"
++
++//#define SS_GYRO_UT
++
++static struct gyro_dev *gyro_cdev;
++static atomic_t use_count;
++
++int gyro_set_sample_rate(struct gyro_arg_sample_rate arg)
++{
++    if (!gyro_cdev->sensor_ops->set_sample_rate) {
++        GYRO_ERR("gyro_set_sample_rate is not support.");
++        return -EFAULT;
++    }
++    return gyro_cdev->sensor_ops->set_sample_rate(gyro_cdev, arg);
++}
++
++int gyro_get_sample_rate(struct gyro_arg_sample_rate *arg)
++{
++    if (!gyro_cdev->sensor_ops->get_sample_rate) {
++        GYRO_ERR("gyro_get_sample_rate is not support.");
++        return -EFAULT;
++    }
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->get_sample_rate(gyro_cdev, arg);
++}
++
++int gyro_set_gyro_range(struct gyro_arg_gyro_range arg)
++{
++    if (!gyro_cdev->sensor_ops->set_gyro_range) {
++        GYRO_ERR("gyro_set_gyro_range is not support.");
++        return -EFAULT;
++    }
++    return gyro_cdev->sensor_ops->set_gyro_range(gyro_cdev, arg);
++}
++
++int gyro_set_accel_range(struct gyro_arg_accel_range arg)
++{
++    if (!gyro_cdev->sensor_ops->set_accel_range) {
++        GYRO_ERR("gyro_set_accel_range is not support.");
++        return -EFAULT;
++    }
++    return gyro_cdev->sensor_ops->set_accel_range(gyro_cdev, arg);
++}
++
++int gyro_get_gyro_range(struct gyro_arg_gyro_range *arg)
++{
++    if (!gyro_cdev->sensor_ops->get_gyro_range) {
++        GYRO_ERR("gyro_get_gyro_range is not support.");
++        return -EFAULT;
++    }
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->get_gyro_range(gyro_cdev, arg);
++}
++
++int gyro_get_gyro_sensitivity(struct gyro_arg_sensitivity *arg)
++{
++    if (!gyro_cdev->sensor_ops->get_gyro_sensitivity) {
++        GYRO_ERR("gyro_get_gyro_sensitivity is not support.");
++        return -EFAULT;
++    }
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->get_gyro_sensitivity(gyro_cdev, arg);
++}
++
++int gyro_get_accel_range(struct gyro_arg_accel_range *arg)
++{
++    if (!gyro_cdev->sensor_ops->get_accel_range) {
++        GYRO_ERR("gyro_get_accel_range is not support.");
++        return -EFAULT;
++    }
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->get_accel_range(gyro_cdev, arg);
++}
++
++int gyro_get_accel_sensitivity(struct gyro_arg_sensitivity *arg)
++{
++    if (!gyro_cdev->sensor_ops->get_accel_sensitivity) {
++        GYRO_ERR("gyro_get_accel_sensitivity is not support.");
++        return -EFAULT;
++    }
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->get_accel_sensitivity(gyro_cdev, arg);
++}
++
++int gyro_read_fifodata(u8* fifo_data, u16 fifo_cnt)
++{
++    if (!gyro_cdev->sensor_ops->read_fifo_data) {
++        GYRO_ERR("gyro_read_fifodata is not support.");
++        return -EFAULT;
++    }
++    if (NULL == fifo_data) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->read_fifo_data(gyro_cdev, fifo_data, fifo_cnt);
++}
++
++int gyro_read_fifocnt(u16 *fifo_cnt) {
++    if (!gyro_cdev->sensor_ops->read_fifo_cnt) {
++        GYRO_ERR("gyro_read_fifocnt is not support.");
++        return -EFAULT;
++    }
++    if (NULL == fifo_cnt) {
++        return -EINVAL;
++    }
++    return gyro_cdev->sensor_ops->read_fifo_cnt(gyro_cdev, fifo_cnt);
++}
++
++int gyro_reset_fifo(void) {
++    if (!gyro_cdev->sensor_ops->reset_fifo) {
++        GYRO_ERR("gyro_reset_fifo is nut support.");
++        return -EFAULT;
++    }
++    return gyro_cdev->sensor_ops->reset_fifo(gyro_cdev);
++}
++
++int gyro_read_gyro_xyz(struct gyro_arg_gyro_xyz *arg) {
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++
++    return 0;
++}
++
++int gyro_read_accel_xyz(struct gyro_arg_accel_xyz *arg) {
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++
++    return 0;
++}
++
++int gyro_read_temp(struct gyro_arg_temp *arg) {
++    if (NULL == arg) {
++        return -EINVAL;
++    }
++
++    return 0;
++}
++
++int gyro_set_dev_mode(struct gyro_arg_dev_mode dev_mode, struct gyro_arg_fifo_info *fifo_info) {
++    if (!gyro_cdev->sensor_ops->enable_fifo) {
++        GYRO_ERR("gyro_set_dev_mode is not support.");
++        return -EFAULT;
++    }
++    if (NULL == fifo_info) {
++        return -EINVAL;
++    }
++    memset(fifo_info, 0xff, sizeof(struct gyro_arg_fifo_info));
++    fifo_info->is_big_endian = 1;
++    return gyro_cdev->sensor_ops->enable_fifo(gyro_cdev, dev_mode, fifo_info);
++}
++
++int gyro_enable(void)
++{
++    int ret = 0;
++
++    if (atomic_read(&use_count) > 0) {
++        atomic_inc(&use_count);
++        return -EBUSY;
++    }
++
++    /* Init gyro device */
++    if (!gyro_cdev->sensor_ops->init) {
++        GYRO_ERR("gyro_init is not support.");
++        ret = -EFAULT;
++        goto err_init_dev;
++    }
++    ret = gyro_cdev->sensor_ops->init(gyro_cdev);
++    if (ret < 0) {
++        GYRO_ERR("gyro_device_init failed.");
++        goto err_init_dev;
++    }
++
++    atomic_inc(&use_count);
++    return 0;
++
++err_init_dev:
++    atomic_dec(&use_count);
++    return ret;
++}
++
++int gyro_disable(void)
++{
++    atomic_dec(&use_count);
++    if (atomic_read(&use_count) > 0) {
++        return 0;
++    }
++
++    /* Reset */
++    memset(&gyro_cdev->gyro_info, 0, sizeof(gyro_cdev->gyro_info));
++    return 0;
++}
++
++#ifndef SS_GYRO_UT
++static MHAL_DIS_GyroRegisterHander_t dis_register_gyro_hander = {
++    .pGyroSetSampleRate       = gyro_set_sample_rate,
++    .pGyroGetSampleRate       = gyro_get_sample_rate,
++    .pGyroSetGyroRange        = gyro_set_gyro_range,
++    .pGyroSetAccelRange       = gyro_set_accel_range,
++    .pGyroGetGyroRange        = gyro_get_gyro_range,
++    .pGyroGetAccelRange       = gyro_get_accel_range,
++    .pGyroGetGyroSensitivity  = gyro_get_gyro_sensitivity,
++    .pGyroGetAccelSensitivity = gyro_get_gyro_sensitivity,
++    .pGyroReadFifodata        = gyro_read_fifodata,
++    .pGyroReadFifocnt         = gyro_read_fifocnt,
++    .pGyroResetFifo           = gyro_reset_fifo,
++    .pGyroReadGyroXyz         = gyro_read_gyro_xyz,
++    .pGyroReadAccelXyz        = gyro_read_accel_xyz,
++    .pGyroReadTemp            = gyro_read_temp,
++    .pGyroSetDevMode          = gyro_set_dev_mode,
++    .pGyroEnable              = gyro_enable,
++    .pGyroDisable             = gyro_disable,
++};
++
++__attribute__((weak)) int MHal_DIS_RegisterGyroHanderCallback(MHAL_DIS_GyroRegisterHander_t *pHander);
++__attribute__((weak)) int MHal_DIS_UnRegisterGyroHanderCallback(void);
++#endif
++
++int gyro_core_init(struct gyro_dev *dev)
++{
++    if (!dev) {
++        GYRO_ERR("gyro_dev pointer is NULL");
++        return -EFAULT;
++    }
++
++    if (!dev->reg_ops) {
++        GYRO_ERR("reg ops is NULL");
++        return -EFAULT;
++    }
++
++    if (!dev->transfer_dev) {
++        GYRO_ERR("transfer_dev is NULL");
++        return -EFAULT;
++    }
++
++    if (!dev->sensor_ops) {
++        GYRO_ERR("sensor_ops is NULL");
++        return -EFAULT;
++    }
++
++    gyro_cdev = dev;
++
++    GYRO_DBG("gyro_core init");
++
++#ifndef SS_GYRO_UT
++    MHal_DIS_RegisterGyroHanderCallback(&dis_register_gyro_hander);
++#endif
++    return 0;
++}
++
++void gyro_core_deinit(struct gyro_dev *dev)
++{
++#ifndef SS_GYRO_UT
++    MHal_DIS_UnRegisterGyroHanderCallback();
++#endif
++    GYRO_DBG("gyro_core deinit");
++}
++
++MODULE_LICENSE("GPL");
++
+diff --git a/drivers/sstar/gyro/gyro_core.h b/drivers/sstar/gyro/gyro_core.h
+new file mode 100755
+index 000000000000..4bdf272e8b05
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_core.h
+@@ -0,0 +1,166 @@
++/*
++ * gyro_core.h - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#ifndef _GYRO_CORE_H
++#define _GYRO_CORE_H
++
++#include <linux/kernel.h>
++#include "gyro.h"
++
++#define GYRO_DEVICNAME "gyro"
++#define GYRO_DEV_COUNT 1
++
++#define GYRO_INFO(fmt, args...) \
++    do { \
++        printk(KERN_INFO "[%s]-info: " fmt "\n", GYRO_DEVICNAME, ##args); \
++    } while(0)
++
++#define GYRO_ERR(fmt, args...) \
++    do { \
++        printk(KERN_ERR "[%s]-error: " fmt " --> %s(%d)\n", GYRO_DEVICNAME, ##args, __FILE__, __LINE__); \
++    } while(0)
++
++#ifdef SS_GYRO_DEBUG_ON
++#define GYRO_DBG(fmt, args...) \
++    do { \
++        printk(KERN_INFO "[%s]-debug: " fmt " --> %s(%d)\n", GYRO_DEVICNAME, ##args, __FILE__, __LINE__); \
++    } while(0)
++#endif
++#ifndef GYRO_DBG
++#define GYRO_DBG(fmt, args...) {}
++#endif
++
++#define MAX_FRAME_CNT (8)
++
++struct gyro_info {
++    struct gyro_arg_gyro_xyz gyro_xyz;
++    struct gyro_arg_accel_xyz accel_xyz;
++    struct gyro_arg_temp temp;
++    u8 bytes_pre_data;
++    bool en_fifo;
++};
++
++struct gyro_dev;
++
++struct gyro_reg_ops {
++    int (*read_regs)(struct gyro_dev *, u8, void *, int);
++    int (*read_reg)(struct gyro_dev *, u8, u8 *);
++    int (*write_reg)(struct gyro_dev *, u8, u8);
++};
++
++struct gyro_sensor_ops {
++    /* init - Init gyro sensor 
++     *
++     * Return 0 if success.
++     */
++    int (*init)(struct gyro_dev *dev);
++
++    /* enable_fifo - enable gyro sensor fifo function
++     *
++     * @mode: device mode
++     * @fifo_info: fifo info
++     */
++    int (*enable_fifo)(struct gyro_dev *dev, struct gyro_arg_dev_mode mode, struct gyro_arg_fifo_info *fifo_info);
++
++    /* set_sample_rate - Set sample rate of gyro
++     * get_sample_rate - Get sample rate of gyro
++     *
++     * @rate : rate
++     */
++    int (*set_sample_rate)(struct gyro_dev *dev, struct gyro_arg_sample_rate rate);
++    int (*get_sample_rate)(struct gyro_dev *dev, struct gyro_arg_sample_rate *rate);
++
++    /* set_gyro_range - Set the max range of gyro sensor
++     * get_gyro_range - Get the max range of gyro sensor
++     *
++     * @range : enum of range
++     *
++     * get_gyro_sensitivity - Get sensitivity of gyro sensor that decided by gyro range
++     *
++     * @num : 
++     * @den :
++     */
++    int (*set_gyro_range)(struct gyro_dev *dev, struct gyro_arg_gyro_range range);
++    int (*get_gyro_range)(struct gyro_dev *dev, struct gyro_arg_gyro_range *range);
++    int (*get_gyro_sensitivity)(struct gyro_dev *dev, struct gyro_arg_sensitivity *sensitivity);
++
++    /* set_accel_range - Set the max range of accel sensor
++     * get_accel_range - Get the max range of accel sensor
++     * 
++     * @range : enum of range
++     *
++     * get_gyro_sensitivity - Get sensitivity of accel sensor that decided by accel range
++     *
++     * @num : 
++     * @den :
++     */
++    int (*set_accel_range)(struct gyro_dev *dev, struct gyro_arg_accel_range range);
++    int (*get_accel_range)(struct gyro_dev *dev, struct gyro_arg_accel_range *range);
++    int (*get_accel_sensitivity)(struct gyro_dev *dev, struct gyro_arg_sensitivity *sensitivity);
++
++    int (*read_fifo_cnt)(struct gyro_dev *dev, u16 *cnt);
++    int (*reset_fifo)(struct gyro_dev *dev);
++    /* read_fifodata - Read fifo data
++     *
++     * @data : the pointer of data array
++     * @cnt  : fifo count
++     */
++    int (*read_fifo_data)(struct gyro_dev *dev, u8 *data, u16 cnt);
++    //int (*read_gyro_xyz)(struct gyro_arg_gyro_xyz *arg);
++    //int (*read_accel_xyz)(struct gyro_arg_accel_xyz *arg);
++    //int (*read_temp)(struct gyro_arg_temp *arg);
++};
++
++struct gyro_dev {
++    struct gyro_info gyro_info;
++    struct device *transfer_dev;
++    struct gyro_reg_ops *reg_ops;
++    struct gyro_sensor_ops *sensor_ops;
++};
++
++int gyro_transfer_init(struct gyro_dev *dev);
++void gyro_transfer_deinit(struct gyro_dev *dev);
++
++int gyro_sysfs_init(struct gyro_dev *dev);
++void gyro_sysfs_deinit(struct gyro_dev *dev);
++
++int gyro_core_init(struct gyro_dev *dev);
++void gyro_core_deinit(struct gyro_dev *dev);
++
++int gyro_sensor_init(struct gyro_dev *dev);
++void gyro_sensor_deinit(struct gyro_dev *dev);
++
++int gyro_set_sample_rate(struct gyro_arg_sample_rate arg);
++int gyro_get_sample_rate(struct gyro_arg_sample_rate *arg);
++int gyro_set_gyro_range(struct gyro_arg_gyro_range arg);
++int gyro_set_accel_range(struct gyro_arg_accel_range arg);
++int gyro_get_gyro_range(struct gyro_arg_gyro_range *arg);
++int gyro_get_gyro_sensitivity(struct gyro_arg_sensitivity *arg);
++int gyro_get_accel_range(struct gyro_arg_accel_range *arg);
++int gyro_get_accel_sensitivity(struct gyro_arg_sensitivity *arg);
++
++int gyro_read_fifodata(u8* fifo_data, u16 fifo_cnt);
++int gyro_read_fifocnt(u16 *fifo_cnt);
++int gyro_reset_fifo(void);
++
++int gyro_read_gyro_xyz(struct gyro_arg_gyro_xyz *arg);
++int gyro_read_accel_xyz(struct gyro_arg_accel_xyz *arg);
++int gyro_read_temp(struct gyro_arg_temp *arg);
++int gyro_set_dev_mode(struct gyro_arg_dev_mode dev_mode, struct gyro_arg_fifo_info *fifo_info);
++int gyro_enable(void);
++int gyro_disable(void);
++
++#endif
+diff --git a/drivers/sstar/gyro/gyro_i2c.c b/drivers/sstar/gyro/gyro_i2c.c
+new file mode 100755
+index 000000000000..083be039b671
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_i2c.c
+@@ -0,0 +1,142 @@
++/*
++ * gyro_i2c.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#include <linux/module.h>
++#include <linux/i2c.h>
++#include "gyro_core.h"
++
++static struct gyro_dev *tmp_gyro_dev;
++
++static int gyro_i2c_read_regs(struct gyro_dev *dev, u8 reg, void *val, int len)
++{
++    struct i2c_client *client = container_of(dev->transfer_dev,
++            struct i2c_client, dev);
++    struct i2c_msg msgs[2];
++    int ret;
++
++    msgs[0].addr = client->addr;
++    msgs[0].flags = 0;
++    msgs[0].buf = &reg;
++    msgs[0].len = 1;
++
++    msgs[1].addr = client->addr;
++    msgs[1].flags = I2C_M_RD;
++    msgs[1].buf = val;
++    msgs[1].len = len;
++
++    ret = i2c_transfer(client->adapter, msgs, 2);
++
++    return ret < 0 ? ret : (ret != ARRAY_SIZE(msgs) ? -EIO : 0);
++}
++
++static int gyro_i2c_read_reg(struct gyro_dev *dev, u8 reg, u8 *val)
++{
++    return gyro_i2c_read_regs(dev, reg, val, 1);
++}
++
++static int gyro_i2c_write_reg(struct gyro_dev *dev, u8 reg, u8 val)
++{
++    struct i2c_client *client = container_of(dev->transfer_dev,
++            struct i2c_client, dev);
++    struct i2c_msg msg;
++    int ret;
++
++    u8 buf[2] = {0};
++    buf[0] = reg;
++    buf[1] = val;
++
++    msg.addr = client->addr;
++    msg.flags = 0;
++    msg.buf = buf;
++    msg.len = 2;
++    ret = i2c_transfer(client->adapter, &msg, 1);
++
++    return ret < 0 ? ret : (ret != 1 ? -EIO : 0);
++}
++
++static struct gyro_reg_ops i2c_reg_ops = {
++    .read_regs = gyro_i2c_read_regs,
++    .read_reg  = gyro_i2c_read_reg,
++    .write_reg = gyro_i2c_write_reg,
++};
++
++static int gyro_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
++{
++    tmp_gyro_dev->transfer_dev = &client->dev;
++    GYRO_DBG("gyro i2c probe");
++    return 0;
++}
++
++static int gyro_i2c_remove(struct i2c_client *client)
++{
++    tmp_gyro_dev->transfer_dev = NULL;
++    GYRO_DBG("gyro i2c remove");
++    return 0;
++}
++
++static const struct i2c_device_id gyro_i2c_id[] = {
++    { "gyro", 0 },
++    {  },
++};
++MODULE_DEVICE_TABLE(i2c, gyro_i2c_id);
++
++static const struct of_device_id gyro_i2c_of_match[] = {
++    { .compatible = "sstar,gyro" },
++    {  },
++};
++MODULE_DEVICE_TABLE(of, gyro_i2c_of_match);
++
++static struct i2c_driver gyro_i2c_driver = {
++    .probe = gyro_i2c_probe,
++    .remove = gyro_i2c_remove,
++    .driver = {
++        .owner  =   THIS_MODULE,
++        .name   =   "gyro",
++        .of_match_table = of_match_ptr(gyro_i2c_of_match),
++    },
++    .id_table = gyro_i2c_id,
++};
++
++int gyro_transfer_init(struct gyro_dev *dev)
++{
++    int ret = 0;
++    tmp_gyro_dev = dev;
++
++    ret = i2c_add_driver(&gyro_i2c_driver);
++    if (0 != ret) {
++        GYRO_ERR("Add i2c driver error.");
++        goto err_i2c_add_driver;
++    }
++
++    dev->reg_ops = &i2c_reg_ops;
++
++    GYRO_DBG("Gyro i2c init");
++    return 0;
++
++err_i2c_add_driver:
++    return ret;
++}
++
++void gyro_transfer_deinit(struct gyro_dev *dev)
++{
++    dev->reg_ops = NULL;
++    i2c_del_driver(&gyro_i2c_driver);
++    tmp_gyro_dev = NULL;
++    GYRO_DBG("Gyro i2c deinit");
++}
++
++MODULE_LICENSE("GPL");
++
+diff --git a/drivers/sstar/gyro/gyro_ioctl.c b/drivers/sstar/gyro/gyro_ioctl.c
+new file mode 100755
+index 000000000000..b284603ef545
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_ioctl.c
+@@ -0,0 +1,283 @@
++/*
++ * gyro_ioctl.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/i2c.h>
++#include <linux/export.h>
++#include <linux/of.h>
++#include <linux/printk.h>
++#include <linux/fs.h>
++#include <linux/slab.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/err.h>
++#include <linux/delay.h>
++#include <linux/irq.h>
++#include <linux/of_irq.h>
++#include <linux/gpio.h>
++#include <linux/of_gpio.h>
++#include <linux/interrupt.h>
++#include <linux/kthread.h>
++#include <linux/sched.h>
++#include <linux/wait.h>
++#include <linux/mutex.h>
++#include <linux/uaccess.h>
++
++#include <asm/string.h>
++#include "gyro.h"
++#include "gyro_core.h"
++#include "gyro_internal.h"
++
++static dev_t devid;
++static struct cdev cdev;
++static struct class *class;
++static struct device *device;
++
++static int gyro_ioctl_cmd_set_sample_rate_div(struct gyro_dev *dev, void *uarg)
++{
++    struct gyro_arg_sample_rate arg;
++    if (copy_from_user(&arg, uarg, sizeof(arg))) {
++        return -EFAULT;
++    }
++    return gyro_set_sample_rate_div(arg);
++}
++
++static int gyro_ioctl_cmd_set_gyro_range(struct gyro_dev *dev, void *uarg)
++{
++    struct gyro_arg_gyro_range arg;
++    if (copy_from_user(&arg, uarg, sizeof(arg))) {
++        return -EFAULT;
++    }
++    return gyro_set_gyro_range(arg);
++}
++
++static int gyro_ioctl_cmd_set_accel_range(struct gyro_dev *dev, void *uarg) {
++    struct gyro_arg_accel_range arg;
++    if (copy_from_user(&arg, uarg, sizeof(arg))) {
++        return -EFAULT;
++    }
++    return gyro_set_accel_range(arg);
++}
++
++static int gyro_ioctl_cmd_get_gyro_range(struct gyro_dev *dev, void *uarg) {
++    int ret = 0;
++    struct gyro_arg_gyro_range arg;
++    ret = gyro_get_gyro_range(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_get_gyro_sensitivity(struct gyro_dev *dev,
++        void *uarg)
++{
++    int ret = 0;
++    struct gyro_arg_sensitivity arg;
++    ret = gyro_get_gyro_sensitivity(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_get_accel_range(struct gyro_dev *dev, void *uarg) {
++    int ret = 0;
++    struct gyro_arg_accel_range arg;
++    ret = gyro_get_accel_range(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_get_accel_sensitivity(struct gyro_dev *dev,
++        void *uarg) {
++    int ret = 0;
++    struct gyro_arg_sensitivity arg;
++    ret = gyro_get_gyro_sensitivity(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_read_fifodata(struct gyro_dev *dev, void *uarg) {
++    int ret = 0;
++    struct gyro_arg_frame_data arg;
++    ret = gyro_read_fifodata(&arg, 1);
++    if (ret < 1) {
++        return ret == 1 ? -EFAULT : 0;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_read_gyro_xyz(struct gyro_dev *dev, void *uarg) {
++    int ret = 0;
++    struct gyro_arg_gyro_xyz arg;
++    ret = gyro_read_gyro_xyz(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_read_accel_xyz(struct gyro_dev *dev, void *uarg) {
++    int ret = 0;
++    struct gyro_arg_accel_xyz arg;
++    ret = gyro_read_accel_xyz(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_read_temp(struct gyro_dev *dev, void *uarg) {
++    int ret = 0;
++    struct gyro_arg_temp arg;
++    ret = gyro_read_temp(&arg);
++    if (ret != 0) {
++        return ret;
++    }
++    ret = copy_to_user(uarg, &arg, sizeof(arg));
++    return ret ? -EFAULT : 0;
++}
++
++static int gyro_ioctl_cmd_set_dev_mode(struct gyro_dev *dev, void *uarg) {
++    struct gyro_arg_dev_mode arg;
++    if (copy_from_user(&arg, uarg, sizeof(arg))) {
++        return -EFAULT;
++    }
++    return gyro_set_dev_mode(arg);
++}
++
++static int gyro_file_open(struct inode *pinode, struct file *pfile)
++{
++    return gyro_enable();
++}
++
++static int gyro_file_release(struct inode *pinode, struct file *pfile)
++{
++    return gyro_disable();
++}
++
++static long gyro_file_ioctl(struct file *pfile, unsigned int cmd, unsigned long arg)
++{
++    struct gyro_dev *dev = (struct gyro_dev *)pfile->private_data;
++    void *uarg = (void *)arg;
++    u8 nr = 0;
++
++    /* !!! Warnning, Don't change the order of the array @cmd_ops members!! */
++    static int (*cmd_ops[GYRO_CMD_COUNT])(struct gyro_dev *, void *) = {
++        gyro_ioctl_cmd_set_sample_rate_div,
++        gyro_ioctl_cmd_set_gyro_range,
++        gyro_ioctl_cmd_set_accel_range,
++        gyro_ioctl_cmd_get_gyro_range,
++        gyro_ioctl_cmd_get_gyro_sensitivity,
++        gyro_ioctl_cmd_get_accel_range,
++        gyro_ioctl_cmd_get_accel_sensitivity,
++        gyro_ioctl_cmd_read_fifodata,
++        gyro_ioctl_cmd_read_gyro_xyz,
++        gyro_ioctl_cmd_read_accel_xyz,
++        gyro_ioctl_cmd_read_temp,
++        gyro_ioctl_cmd_set_dev_mode,
++    };
++
++    if (_IOC_TYPE(cmd) != GYRO_MAGIC) {
++        GYRO_ERR("command type %x, need %x", _IOC_TYPE(cmd), GYRO_MAGIC);
++        return -EINVAL;
++    }
++
++    nr = _IOC_NR(cmd);
++    if ( nr >= GYRO_CMD_COUNT ) {
++        GYRO_ERR("command nr %d, need %d ~ %d", nr, 0, GYRO_CMD_COUNT-1);
++        return -EINVAL;
++    }
++
++    return cmd_ops[nr](dev, uarg);
++}
++
++static struct file_operations gyro_ops = {
++    .owner = THIS_MODULE,
++    .open = gyro_file_open,
++    .release = gyro_file_release,
++    .unlocked_ioctl = gyro_file_ioctl,
++};
++
++int gyro_cdev_init(struct gyro_dev *dev)
++{
++    int ret = 0;
++    /* alloc char device numbers */
++    ret = alloc_chrdev_region(&devid, 0, GYRO_DEV_COUNT, GYRO_DEVICNAME);
++    if (ret < 0) {
++        GYRO_ERR("alloc devid failed");
++        goto err_alloc_chrdev;
++    }
++
++    /* init cdev */
++    cdev_init(&cdev, &gyro_ops);
++    cdev.owner = THIS_MODULE;
++    ret = cdev_add(&cdev, devid, GYRO_DEV_COUNT);
++    if (ret < 0) {
++        GYRO_ERR("cdev_add failed");
++        goto err_cdev_add;
++    }
++
++    /* create device node */
++    class = class_create(THIS_MODULE, GYRO_DEVICNAME);
++    if (IS_ERR(class)) {
++        GYRO_ERR("class create failed");
++        goto err_class_create;
++    }
++    device = device_create(class, NULL, devid, NULL, GYRO_DEVICNAME);
++    if (IS_ERR(device)) {
++        GYRO_ERR("device create failed");
++        goto err_device_create;
++    }
++
++    GYRO_DBG("gyro_cdev init");
++    return 0;
++
++err_device_create:
++    class_destroy(class);
++err_class_create:
++    cdev_del(&cdev);
++err_cdev_add:
++    unregister_chrdev_region(devid, 1);
++err_alloc_chrdev:
++    return ret;
++}
++
++void gyro_cdev_deinit(struct gyro_dev *dev)
++{
++    device_destroy(class, devid);
++    class_destroy(class);
++    cdev_del(&cdev);
++    unregister_chrdev_region(devid, GYRO_DEV_COUNT);
++    GYRO_DBG("gyro_cdev deinit");
++}
++
++MODULE_LICENSE("GPL");
++
+diff --git a/drivers/sstar/gyro/gyro_module.c b/drivers/sstar/gyro/gyro_module.c
+new file mode 100755
+index 000000000000..57234de92b9f
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_module.c
+@@ -0,0 +1,94 @@
++/*
++ * gyro_module.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include "gyro_core.h"
++
++struct gyro_dev *gyro_dev;
++
++static int __init gyro_init(void)
++{
++    int ret = 0;
++    gyro_dev = kzalloc(sizeof(struct gyro_dev), GFP_KERNEL);
++    if (NULL == gyro_dev) {
++        GYRO_ERR("gyro_dev kzalloc failed");
++        ret = -ENOMEM;
++        goto err_gyro_dev_alloc;
++    }
++
++    ret = gyro_transfer_init(gyro_dev);
++    if (ret < 0) {
++        GYRO_ERR("gyro_transfer_init failed");
++        goto err_gyro_transfer_init;
++    }
++
++    ret = gyro_sensor_init(gyro_dev);
++    if (ret < 0) {
++        GYRO_ERR("gyro_sensor_init failed");
++        goto err_gyro_sensor_init;
++    }
++
++    ret = gyro_core_init(gyro_dev);
++    if (ret < 0) {
++        GYRO_ERR("gyro_core_init failed");
++        goto err_gyro_core_init;
++    }
++
++#ifdef SS_GYRO_SYSFS
++    ret = gyro_sysfs_init(gyro_dev);
++    if (ret < 0) {
++        GYRO_ERR("gyro_sysfs_init failed");
++        goto err_gyro_sysfs_init;
++    }
++#endif
++
++    return 0;
++
++#ifdef SS_GYRO_SYSFS
++err_gyro_sysfs_init:
++#endif
++    gyro_core_deinit(gyro_dev);
++err_gyro_core_init:
++    gyro_sensor_deinit(gyro_dev);
++err_gyro_sensor_init:
++    gyro_transfer_deinit(gyro_dev);
++err_gyro_transfer_init:
++    kfree(gyro_dev);
++err_gyro_dev_alloc:
++    return ret;
++}
++
++static void __exit gyro_exit(void)
++{
++#ifdef SS_GYRO_SYSFS
++    gyro_sysfs_deinit(gyro_dev);
++#endif
++    gyro_core_deinit(gyro_dev);
++    gyro_core_deinit(gyro_dev);
++    gyro_sensor_deinit(gyro_dev);
++    gyro_transfer_deinit(gyro_dev);
++    kfree(gyro_dev);
++}
++
++module_init(gyro_init);
++module_exit(gyro_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("SSTAR");
++MODULE_DESCRIPTION("Gyro sensor driver");
++
+diff --git a/drivers/sstar/gyro/gyro_sensor_icg20330.c b/drivers/sstar/gyro/gyro_sensor_icg20330.c
+new file mode 100644
+index 000000000000..18b348037283
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_sensor_icg20330.c
+@@ -0,0 +1,471 @@
++/*
++ * gyro_sensor_icg20660.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++
++#include <linux/delay.h>
++#include "gyro_core.h"
++#include "gyro.h"
++
++#define GYROSENSOR_ICG20330_INT_LEVEL_L         0x80
++#define GYROSENSOR_ICG20330_INT_LEVEL_H         0x00
++#define GYROSENSOR_ICG20330_INT_OPEN_DRAIN      0x40
++#define GYROSENSOR_ICG20330_INT_PUSH_PULL       0x00
++#define GYROSENSOR_ICG20330_LATCH_INT_EN        0x20
++#define GYROSENSOR_ICG20330_INT_READ_CLEA       0x10
++#define GYROSENSOR_ICG20330_FSYNC_INT_LEVEL_L   0x08
++#define GYROSENSOR_ICG20330_FSYNC_INT_LEVEL_H   0x00
++#define GYROSENSOR_ICG20330_FSYNC_INT_MODEN     0x04
++
++#define GYROSENSOR_ICG20330_INT_NONE            0x00
++#define GYROSENSOR_ICG20330_INT_FIFO_FULL       0x10
++#define GYROSENSOR_ICG20330_INT_GDRIVE          0x04
++#define GYROSENSOR_ICG20330_INT_DATA_READY      0x01
++
++#define GYROSENSOR_ICG20330_FIFO_RD_EN          0x40
++#define GYROSENSOR_ICG20330_SPI_INTERFACEN      0x10
++#define GYROSENSOR_ICG20330_RESET_FIFO          0x04
++
++enum {
++    GSEN_ICG20330_SELF_TEST_X_GYRO    =    0x00,
++    GSEN_ICG20330_SELF_TEST_Y_GYRO    =    0x01,
++    GSEN_ICG20330_SELF_TEST_Z_GYRO    =    0x02,
++
++    GSEN_ICG20330_XG_OFFS_TC_H        =    0x04,
++    GSEN_ICG20330_XG_OFFS_TC_L        =    0x05,
++    GSEN_ICG20330_YG_OFFS_TC_H        =    0x07,
++    GSEN_ICG20330_YG_OFFS_TC_L        =    0x08,
++    GSEN_ICG20330_ZG_OFFS_TC_H        =    0x0A,
++    GSEN_ICG20330_ZG_OFFS_TC_L        =    0x0B,
++    GSEN_ICG20330_XG_OFFS_USRH        =    0x13,
++    GSEN_ICG20330_XG_OFFS_USRL        =    0x14,
++    GSEN_ICG20330_YG_OFFS_USRH        =    0x15,
++    GSEN_ICG20330_YG_OFFS_USRL        =    0x16,
++    GSEN_ICG20330_ZG_OFFS_USRH        =    0x17,
++    GSEN_ICG20330_ZG_OFFS_USRL        =    0x18,
++    GSEN_ICG20330_SMPLRT_DIV          =    0x19,
++    GSEN_ICG20330_CONFIG              =    0x1A,
++    GSEN_ICG20330_GYRO_CONFIG         =    0x1B,
++
++  //  GSEN_ICG20660_ACCEL_CONFIG        =    0x1C,
++  //  GSEN_ICG20660_ACCEL_CONFIG2       =    0x1D,
++    GSEN_ICG20330_FIFO_EN             =    0x23,
++
++    GSEN_ICG20330_FSYNC_INT_STATUS    =    0x36,
++    GSEN_ICG20330_INT_PIN_CFG         =    0x37,
++
++    GSEN_ICG20330_INT_ENABLE          =    0x38,
++    GSEN_ICG20330_INT_STATUS          =    0x3A,
++
++  //  GSEN_ICG20660_ACCEL_XOUT_H        =    0x3B,
++  //  GSEN_ICG20660_ACCEL_XOUT_L        =    0x3C,
++  //  GSEN_ICG20660_ACCEL_YOUT_H        =    0x3D,
++  //  GSEN_ICG20660_ACCEL_YOUT_L        =    0x3E,
++  //  GSEN_ICG20660_ACCEL_ZOUT_H        =    0x3F,
++ //   GSEN_ICG20660_ACCEL_ZOUT_L        =    0x40,
++    GSEN_ICG20330_TEMP_OUT_H          =    0x41,
++    GSEN_ICG20330_TEMP_OUT_L          =    0x42,
++    GSEN_ICG20330_GYRO_XOUT_H         =    0x43,
++    GSEN_ICG20330_GYRO_XOUT_L         =    0x44,
++    GSEN_ICG20330_GYRO_YOUT_H         =    0x45,
++    GSEN_ICG20330_GYRO_YOUT_L         =    0x46,
++    GSEN_ICG20330_GYRO_ZOUT_H         =    0x47,
++    GSEN_ICG20330_GYRO_ZOUT_L         =    0x48,
++    GSEN_ICG20330_SIGNAL_PATH_RESET   =    0x68,
++  //  GSEN_ICG20660_ACCEL_INTEL_CTRL    =    0x69,
++    GSEN_ICG20330_USER_CTRL           =    0x6A,
++
++    GSEN_ICG20330_PWR_MGMT_1          =    0x6B,
++    GSEN_ICG20330_PWR_MGMT_2          =    0x6C,
++    GSEN_ICG20330_FIFO_COUNTH         =    0x72,
++    GSEN_ICG20330_FIFO_COUNTL         =    0x73,
++    GSEN_ICG20330_FIFO_R_W            =    0x74,
++    GSEN_ICG20330_WHO_AM_I            =    0x75,
++ //   GSEN_ICG20660_XA_OFFSET_H         =    0x77,
++ //   GSEN_ICG20660_XA_OFFSET_L         =    0x78,
++ //   GSEN_ICG20660_YA_OFFSET_H         =    0x7A,
++ //   GSEN_ICG20660_YA_OFFSET_L         =    0x7B,
++ //   GSEN_ICG20660_ZA_OFFSET_H         =    0x7D,
++ //   GSEN_ICG20660_ZA_OFFSET_L         =    0x7E
++};
++
++static int icg20330_init(struct gyro_dev *dev)
++{
++    int ret = 0;
++    u8 val = 0;
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_PWR_MGMT_1, 0x80);
++    if (ret < 0) {
++        return ret;
++    }
++    msleep(10);
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_PWR_MGMT_1, 0x01);
++    if (ret < 0) {
++        return ret;
++    }
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_INT_ENABLE,
++            GYROSENSOR_ICG20330_INT_DATA_READY);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_CONFIG, 0x51);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_INT_PIN_CFG, GYROSENSOR_ICG20330_FSYNC_INT_MODEN);
++    if (ret < 0) {
++        return ret;
++    }
++
++    dev->reg_ops->read_reg(dev, GSEN_ICG20330_INT_PIN_CFG, &val);
++    GYRO_INFO("val = %x", val);
++    return 0;
++}
++
++static int icg20330_enable_fifo(struct gyro_dev *dev, struct gyro_arg_dev_mode mode,
++        struct gyro_arg_fifo_info *fifo_info)
++{
++    int ret = 0;
++    u8 val = 0x00;
++    u8 offset = 0;
++    int i = 0;
++    struct __icg20330_fifo_info {
++        u8 fifo_type;
++        u8 *axis_start;
++        u8 *axis_end;
++        u8 size;
++        u8 reg_setting;
++    } info[] = {
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->ax_start   , &fifo_info->ax_end   , 2 , 0x08 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->ay_start   , &fifo_info->ay_end   , 2 , 0x08 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->az_start   , &fifo_info->az_end   , 2 , 0x08 },
++        { GYROSENSOR_TEMP_FIFO_EN                                               , &fifo_info->temp_start , &fifo_info->temp_end , 2 , 0x80 },
++        { GYROSENSOR_XG_FIFO_EN                                                 , &fifo_info->gx_start   , &fifo_info->gx_end   , 2 , 0x40 },
++        { GYROSENSOR_YG_FIFO_EN                                                 , &fifo_info->gy_start   , &fifo_info->gy_end   , 2 , 0x20 },
++        { GYROSENSOR_ZG_FIFO_EN                                                 , &fifo_info->gz_start   , &fifo_info->gz_end   , 2 , 0x10 },
++    };
++    mode.fifo_type = 0x70;
++    if (mode.fifo_mode) {
++        for (i = 0; i < sizeof(info)/sizeof(info[0]); ++i) {
++            if (mode.fifo_type & (info[i].fifo_type)) {
++                *info[i].axis_start = offset;
++                *info[i].axis_end = offset + info[i].size - 1;
++                val |= info[i].reg_setting;
++                offset += 2;
++				GYRO_INFO("%d %d %d %d %d",i,*info[i].axis_start,*info[i].axis_end,offset,val);
++            }
++        }
++        fifo_info->bytes_pre_data = offset;
++        fifo_info->max_fifo_cnt = 512;
++        fifo_info->is_big_endian = 1;
++    } else {
++        val = 0;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_FIFO_EN, val);
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20330_USER_CTRL, &val);
++    val |= GYROSENSOR_ICG20330_FIFO_RD_EN;
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20330_USER_CTRL, val);
++    return ret;
++}
++
++static int icg20330_set_sample_rate_div(struct gyro_dev *dev, enum gyro_sample_rate rate)
++{
++    u8 div = 0;
++    switch (rate) {
++        case GYROSENSOR_SAMPLE_RATE_1KHZ:
++        {
++            div = 0;
++        }
++        break;
++
++        default:
++        {
++            div = 1;
++        }
++        break;
++    }
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20330_SMPLRT_DIV, div);
++}
++static int icg20330_get_sample_rate_div(struct gyro_dev *dev, enum gyro_sample_rate *rate)
++{
++    int ret = 0;
++    u8 div = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICG20330_SMPLRT_DIV, &div);
++    switch (div) {
++        case 0:
++            *rate = GYROSENSOR_SAMPLE_RATE_1KHZ;
++            break;
++        case 1:
++            *rate = GYROSENSOR_SAMPLE_RATE_500HZ;
++            break;
++        default:
++            ret = -1;
++            break;
++    }
++    return ret;
++}
++static int icg20330_set_gyro_range(struct gyro_dev *dev, enum gyro_gyro_range range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20330_GYRO_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= ~(0x18);
++
++    switch (range) {
++        case GYROSENSOR_GYRO_RANGE_125:
++            val |= 0x10;
++            break;
++        case GYROSENSOR_GYRO_RANGE_250:
++            val |= 0x18;
++            break;
++        default:
++            val |= 0x00;
++            break;
++    }
++
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20330_GYRO_CONFIG, val);
++}
++/*static int icg20660_set_accel_range(struct gyro_dev *dev, enum gyro_accel_range range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= ~(0x18);
++
++    switch (range) {
++        case GYROSENSOR_ACCEL_RANGE_2G:
++            val |= 0x00;
++            break;
++        case GYROSENSOR_ACCEL_RANGE_4G:
++            val |= 0x08;
++            break;
++        case GYROSENSOR_ACCEL_RANGE_8G:
++            val |= 0x10;
++            break;
++        case GYROSENSOR_ACCEL_RANGE_16G:
++            val |= 0x18;
++            break;
++
++        default:
++            val |= 0x00;
++            break;
++    }
++
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, val);
++}*/
++static int icg20330_get_gyro_range(struct gyro_dev *dev, enum gyro_gyro_range *range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20330_GYRO_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0x18;
++
++    switch (val) {
++        case 0x10:
++            *range = GYROSENSOR_GYRO_RANGE_125;
++            break;
++        case 0x18:
++            *range = GYROSENSOR_GYRO_RANGE_250;
++            break;
++
++        default:
++            *range = GYROSENSOR_GYRO_RANGE_125;
++            break;
++    }
++
++    return ret;
++}
++static int icg20330_get_gyro_sensitivity(struct gyro_dev *dev, u16 *num, u16 *den)
++{
++    int ret = 0;
++    u8 val = 0;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20330_GYRO_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0x18;
++
++    switch (val) {
++        case 0x10:
++            *num = 262;
++            *den = 1;
++            break;
++        case 0x18:
++            *num = 131;
++            *den = 1;
++            break;
++        default:
++            GYRO_ERR("gyro range 0x%x", val);
++            break;
++    }
++
++    return ret;
++}
++/*
++static int icg20660_get_accel_range(struct gyro_dev *dev, enum gyro_accel_range *range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++
++    val &= 0x18;
++
++    switch (val) {
++        case 0x00:
++            *range = GYROSENSOR_ACCEL_RANGE_2G;
++            break;
++        case 0x08:
++            *range = GYROSENSOR_ACCEL_RANGE_4G;
++            break;
++        case 0x10:
++            *range = GYROSENSOR_ACCEL_RANGE_8G;
++            break;
++        case 0x18:
++            *range = GYROSENSOR_ACCEL_RANGE_16G;
++            break;
++
++        default:
++            *range = GYROSENSOR_ACCEL_RANGE_2G;
++            break;
++    }
++
++    return ret;
++}
++static int icg20660_get_accel_sensitivity(struct gyro_dev *dev, u16 *num, u16 *den)
++{
++    int ret = 0;
++    u8 val = 0;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0x18;
++
++    switch (val) {
++        case 0x00:
++            *num = 16384;
++            *den = 1;
++            break;
++        case 0x08:
++            *num = 8192;
++            *den = 1;
++            break;
++        case 0x10:
++            *num = 4096;
++            *den = 1;
++            break;
++        case 0x18:
++            *num = 2048;
++            *den = 1;
++            break;
++
++        default:
++            GYRO_ERR("accel range %d", val);
++            break;
++    }
++
++    return ret;
++}*/
++//static int icg20660_read_gyro_xyz(struct gyro_arg_gyro_xyz *arg);
++//{
++//
++//}
++//static int (*read_accel_xyz)(struct gyro_arg_accel_xyz *arg);
++//{
++//
++//}
++//static int (*read_temp)(struct gyro_arg_temp *arg);
++//{
++//
++//}
++
++static int icg20330_read_fifo_cnt(struct gyro_dev *dev, u16 *fifo_cnt)
++{
++    u8 val_h = 0;
++    u8 val_l = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICG20330_FIFO_COUNTH, &val_h);
++    dev->reg_ops->read_reg(dev, GSEN_ICG20330_FIFO_COUNTL, &val_l);
++    *fifo_cnt = (val_h << 8) + val_l;
++    return 0;
++}
++#include<linux/time.h>
++static int icg20330_read_fifo_data(struct gyro_dev *dev, u8 *fifo_data, u16 fifo_cnt)
++{
++    struct timeval time0,time1;
++	do_gettimeofday(&time0);
++    dev->reg_ops->read_regs(dev, GSEN_ICG20330_FIFO_R_W, fifo_data, fifo_cnt);
++	do_gettimeofday(&time1);
++	GYRO_INFO("fifo cnt:%d time:%ld ",fifo_cnt,(time1.tv_sec*1000000+time1.tv_usec)-(time0.tv_sec*1000000+time0.tv_usec));
++    return 0;
++}
++
++static int icg20330_reset_fifo(struct gyro_dev *dev)
++{
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20330_USER_CTRL,
++        GYROSENSOR_ICG20330_FIFO_RD_EN | GYROSENSOR_ICG20330_RESET_FIFO);
++}
++
++
++static struct gyro_sensor_ops gyro_icg20330_ops = {
++    .init                  = icg20330_init,
++    .enable_fifo           = icg20330_enable_fifo,
++    .set_sample_rate_div   = icg20330_set_sample_rate_div,
++    .get_sample_rate_div   = icg20330_get_sample_rate_div,
++
++    .set_gyro_range        = icg20330_set_gyro_range,
++ //   .set_accel_range       = icg20330_set_accel_range,
++
++    .get_gyro_range        = icg20330_get_gyro_range,
++    .get_gyro_sensitivity  = icg20330_get_gyro_sensitivity,
++
++ //   .get_accel_range       = icg20330_get_accel_range,
++ //   .get_accel_sensitivity = icg20330_get_accel_sensitivity,
++
++    .read_fifo_data        = icg20330_read_fifo_data,
++    .read_fifo_cnt         = icg20330_read_fifo_cnt,
++    .reset_fifo            = icg20330_reset_fifo,
++};
++
++int gyro_sensor_init(struct gyro_dev *dev)
++{
++    dev->sensor_ops = &gyro_icg20330_ops;
++    return 0;
++}
++
++void gyro_sensor_deinit(struct gyro_dev *dev)
++{
++    dev->sensor_ops = NULL;
++}
++
+diff --git a/drivers/sstar/gyro/gyro_sensor_icg20660.c b/drivers/sstar/gyro/gyro_sensor_icg20660.c
+new file mode 100644
+index 000000000000..8dbc2d621889
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_sensor_icg20660.c
+@@ -0,0 +1,485 @@
++/*
++ * gyro_sensor_icg20660.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++
++#include <linux/delay.h>
++#include "gyro_core.h"
++#include "gyro.h"
++
++#define GYROSENSOR_ICG20660_INT_LEVEL_L         0x80
++#define GYROSENSOR_ICG20660_INT_LEVEL_H         0x00
++#define GYROSENSOR_ICG20660_INT_OPEN_DRAIN      0x40
++#define GYROSENSOR_ICG20660_INT_PUSH_PULL       0x00
++#define GYROSENSOR_ICG20660_LATCH_INT_EN        0x20
++#define GYROSENSOR_ICG20660_INT_READ_CLEA       0x10
++#define GYROSENSOR_ICG20660_FSYNC_INT_LEVEL_L   0x08
++#define GYROSENSOR_ICG20660_FSYNC_INT_LEVEL_H   0x00
++#define GYROSENSOR_ICG20660_FSYNC_INT_MODEN     0x04
++
++#define GYROSENSOR_ICG20660_INT_NONE            0x00
++#define GYROSENSOR_ICG20660_INT_FIFO_FULL       0x10
++#define GYROSENSOR_ICG20660_INT_DATA_READY      0x01
++
++#define GYROSENSOR_ICG20660_FIFO_RD_EN          0x40
++#define GYROSENSOR_ICG20660_SPI_INTERFACEN      0x10
++#define GYROSENSOR_ICG20660_RESET_FIFO          0x04
++
++enum {
++    GSEN_ICG20660_SELF_TEST_X_GYRO    =    0x00,
++    GSEN_ICG20660_SELF_TEST_Y_GYRO    =    0x01,
++    GSEN_ICG20660_SELF_TEST_Z_GYRO    =    0x02,
++
++    GSEN_ICG20660_XG_OFFS_TC_H        =    0x04,
++    GSEN_ICG20660_XG_OFFS_TC_L        =    0x05,
++    GSEN_ICG20660_YG_OFFS_TC_H        =    0x06,
++    GSEN_ICG20660_YG_OFFS_TC_L        =    0x07,
++    GSEN_ICG20660_ZG_OFFS_TC_H        =    0x08,
++    GSEN_ICG20660_ZG_OFFS_TC_L        =    0x09,
++    GSEN_ICG20660_XG_OFFS_USRH        =    0x13,
++    GSEN_ICG20660_XG_OFFS_USRL        =    0x14,
++    GSEN_ICG20660_YG_OFFS_USRH        =    0x15,
++    GSEN_ICG20660_YG_OFFS_USRL        =    0x16,
++    GSEN_ICG20660_ZG_OFFS_USRH        =    0x17,
++    GSEN_ICG20660_ZG_OFFS_USRL        =    0x18,
++    GSEN_ICG20660_SMPLRT_DIV          =    0x19,
++    GSEN_ICG20660_CONFIG              =    0x1A,
++    GSEN_ICG20660_GYRO_CONFIG         =    0x1B,
++
++    GSEN_ICG20660_ACCEL_CONFIG        =    0x1C,
++    GSEN_ICG20660_ACCEL_CONFIG2       =    0x1D,
++    GSEN_ICG20660_FIFO_EN             =    0x23,
++
++    GSEN_ICG20660_FSYNC_INT_STATUS    =    0x36,
++    GSEN_ICG20660_INT_PIN_CFG         =    0x37,
++
++    GSEN_ICG20660_INT_ENABLE          =    0x38,
++    GSEN_ICG20660_INT_STATUS          =    0x3A,
++
++    GSEN_ICG20660_ACCEL_XOUT_H        =    0x3B,
++    GSEN_ICG20660_ACCEL_XOUT_L        =    0x3C,
++    GSEN_ICG20660_ACCEL_YOUT_H        =    0x3D,
++    GSEN_ICG20660_ACCEL_YOUT_L        =    0x3E,
++    GSEN_ICG20660_ACCEL_ZOUT_H        =    0x3F,
++    GSEN_ICG20660_ACCEL_ZOUT_L        =    0x40,
++    GSEN_ICG20660_TEMP_OUT_H          =    0x41,
++    GSEN_ICG20660_TEMP_OUT_L          =    0x42,
++    GSEN_ICG20660_GYRO_XOUT_H         =    0x43,
++    GSEN_ICG20660_GYRO_XOUT_L         =    0x44,
++    GSEN_ICG20660_GYRO_YOUT_H         =    0x45,
++    GSEN_ICG20660_GYRO_YOUT_L         =    0x46,
++    GSEN_ICG20660_GYRO_ZOUT_H         =    0x47,
++    GSEN_ICG20660_GYRO_ZOUT_L         =    0x48,
++    GSEN_ICG20660_SIGNAL_PATH_RESET   =    0x68,
++    GSEN_ICG20660_ACCEL_INTEL_CTRL    =    0x69,
++    GSEN_ICG20660_USER_CTRL           =    0x6A,
++
++    GSEN_ICG20660_PWR_MGMT_1          =    0x6B,
++    GSEN_ICG20660_PWR_MGMT_2          =    0x6C,
++    GSEN_ICG20660_FIFO_COUNTH         =    0x72,
++    GSEN_ICG20660_FIFO_COUNTL         =    0x73,
++    GSEN_ICG20660_FIFO_R_W            =    0x74,
++    GSEN_ICG20660_WHO_AM_I            =    0x75,
++    GSEN_ICG20660_XA_OFFSET_H         =    0x77,
++    GSEN_ICG20660_XA_OFFSET_L         =    0x78,
++    GSEN_ICG20660_YA_OFFSET_H         =    0x7A,
++    GSEN_ICG20660_YA_OFFSET_L         =    0x7B,
++    GSEN_ICG20660_ZA_OFFSET_H         =    0x7D,
++    GSEN_ICG20660_ZA_OFFSET_L         =    0x7E
++};
++
++static int icg20660_init(struct gyro_dev *dev)
++{
++    int ret = 0;
++    u8 val = 0;
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_PWR_MGMT_1, 0x80);
++    if (ret < 0) {
++        return ret;
++    }
++    msleep(10);
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_PWR_MGMT_1, 0x01);
++    if (ret < 0) {
++        return ret;
++    }
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_INT_ENABLE,
++            GYROSENSOR_ICG20660_INT_DATA_READY);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_CONFIG, 0x51);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_INT_PIN_CFG, GYROSENSOR_ICG20660_FSYNC_INT_MODEN);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_SMPLRT_DIV, 0);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_GYRO_CONFIG, 0x08);
++    if (ret < 0) {
++        return ret;
++    }
++
++    dev->reg_ops->read_reg(dev, GSEN_ICG20660_INT_PIN_CFG, &val);
++    GYRO_INFO("val = %x", val);
++    return 0;
++}
++
++static int icg20660_enable_fifo(struct gyro_dev *dev, struct gyro_arg_dev_mode mode,
++        struct gyro_arg_fifo_info *fifo_info)
++{
++    int ret = 0;
++    u8 val = 0x00;
++    u8 offset = 0;
++    int i = 0;
++    struct __icg20660_fifo_info {
++        u8 fifo_type;
++        u8 *axis_start;
++        u8 *axis_end;
++        u8 size;
++        u8 reg_setting;
++    } info[] = {
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->ax_start   , &fifo_info->ax_end   , 2 , 0x08 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->ay_start   , &fifo_info->ay_end   , 2 , 0x08 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->az_start   , &fifo_info->az_end   , 2 , 0x08 },
++        { GYROSENSOR_TEMP_FIFO_EN                                               , &fifo_info->temp_start , &fifo_info->temp_end , 2 , 0x80 },
++        { GYROSENSOR_XG_FIFO_EN                                                 , &fifo_info->gx_start   , &fifo_info->gx_end   , 2 , 0x40 },
++        { GYROSENSOR_YG_FIFO_EN                                                 , &fifo_info->gy_start   , &fifo_info->gy_end   , 2 , 0x20 },
++        { GYROSENSOR_ZG_FIFO_EN                                                 , &fifo_info->gz_start   , &fifo_info->gz_end   , 2 , 0x10 },
++    };
++
++    if (mode.fifo_mode) {
++        for (i = 0; i < sizeof(info)/sizeof(info[0]); ++i) {
++            if (mode.fifo_type & (info[i].fifo_type)) {
++                *info[i].axis_start = offset;
++                *info[i].axis_end = offset + info[i].size - 1;
++                val |= info[i].reg_setting;
++                offset += 2;
++            }
++        }
++        fifo_info->bytes_pre_data = offset;
++        fifo_info->max_fifo_cnt = 512;
++        fifo_info->is_big_endian = 1;
++    } else {
++        val = 0;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_FIFO_EN, val);
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_USER_CTRL, &val);
++    val |= GYROSENSOR_ICG20660_FIFO_RD_EN;
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICG20660_USER_CTRL, val);
++    return ret;
++}
++
++static int icg20660_set_sample_rate(struct gyro_dev *dev, struct gyro_arg_sample_rate rate)
++{
++    u8 div = 0;
++    switch (rate.rate) {
++        case 1000:
++        {
++            div = 0;
++        }
++        break;
++
++        default:
++        {
++            div = 1;
++        }
++        break;
++    }
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20660_SMPLRT_DIV, div);
++}
++static int icg20660_get_sample_rate(struct gyro_dev *dev, struct gyro_arg_sample_rate *rate)
++{
++    int ret = 0;
++    u8 div = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICG20660_SMPLRT_DIV, &div);
++    switch (div) {
++        case 0:
++            (*rate).rate = 1000;
++            break;
++        case 1:
++            (*rate).rate = 500;
++            break;
++        default:
++            GYRO_ERR("sample rate div is %d.", div);
++            return -1;
++    }
++    return ret;
++}
++static int icg20660_set_gyro_range(struct gyro_dev *dev, struct gyro_arg_gyro_range range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_GYRO_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= ~(0x18);
++
++    switch (range.range) {
++        case 125:
++            val |= 0x00;
++            break;
++        case 250:
++            val |= 0x08;
++            break;
++        case 500:
++            val |= 0x10;
++            break;
++
++        default:
++            GYRO_ERR("gyro range %u is not support.", range.range);
++            return -1;
++    }
++
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20660_GYRO_CONFIG, val);
++}
++static int icg20660_set_accel_range(struct gyro_dev *dev, struct gyro_arg_accel_range range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= ~(0x18);
++
++    switch (range.range) {
++        case 2:
++            val |= 0x00;
++            break;
++        case 4:
++            val |= 0x08;
++            break;
++        case 8:
++            val |= 0x10;
++            break;
++        case 16:
++            val |= 0x18;
++            break;
++
++        default:
++            GYRO_ERR("accel range %u is not support.", range.range);
++            return -1;
++    }
++
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, val);
++}
++static int icg20660_get_gyro_range(struct gyro_dev *dev, struct gyro_arg_gyro_range *range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_GYRO_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0x18;
++
++    switch (val) {
++        case 0x00:
++            (*range).range = 125;
++            break;
++        case 0x08:
++            (*range).range = 250;
++            break;
++        case 0x10:
++            (*range).range = 500;
++            break;
++
++        default:
++            GYRO_ERR("gyro range is 0x%x.", val);
++            return -1;
++    }
++
++    return ret;
++}
++static int icg20660_get_gyro_sensitivity(struct gyro_dev *dev, struct gyro_arg_sensitivity *sensitivity)
++{
++    int ret = 0;
++    u8 val = 0;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_GYRO_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0x18;
++
++    switch (val) {
++        case 0x00:
++            (*sensitivity).num = 262;
++            (*sensitivity).den = 1;
++            break;
++        case 0x08:
++            (*sensitivity).num = 131;
++            (*sensitivity).den = 1;
++            break;
++        case 0x10:
++            (*sensitivity).num = 655;
++            (*sensitivity).den = 10;
++            break;
++        default:
++            GYRO_ERR("gyro range is 0x%x", val);
++            return -1;
++    }
++
++    return ret;
++}
++static int icg20660_get_accel_range(struct gyro_dev *dev, struct gyro_arg_accel_range *range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++
++    val &= 0x18;
++
++    switch (val) {
++        case 0x00:
++            (*range).range = 2;
++            break;
++        case 0x08:
++            (*range).range = 4;
++            break;
++        case 0x10:
++            (*range).range = 8;
++            break;
++        case 0x18:
++            (*range).range = 16;
++            break;
++
++        default:
++            GYRO_ERR("accel range is 0x%x", val);
++            return -1;
++    }
++
++    return ret;
++}
++static int icg20660_get_accel_sensitivity(struct gyro_dev *dev, struct gyro_arg_sensitivity *sensitivity)
++{
++    int ret = 0;
++    u8 val = 0;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICG20660_ACCEL_CONFIG, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0x18;
++
++    switch (val) {
++        case 0x00:
++            (*sensitivity).num = 16384;
++            (*sensitivity).den = 1;
++            break;
++        case 0x08:
++            (*sensitivity).num = 8192;
++            (*sensitivity).den = 1;
++            break;
++        case 0x10:
++            (*sensitivity).num = 4096;
++            (*sensitivity).den = 1;
++            break;
++        case 0x18:
++            (*sensitivity).num = 2048;
++            (*sensitivity).den = 1;
++            break;
++
++        default:
++            GYRO_ERR("accel range is %d", val);
++            return -1;
++    }
++
++    return ret;
++}
++//static int icg20660_read_gyro_xyz(struct gyro_arg_gyro_xyz *arg);
++//{
++//
++//}
++//static int (*read_accel_xyz)(struct gyro_arg_accel_xyz *arg);
++//{
++//
++//}
++//static int (*read_temp)(struct gyro_arg_temp *arg);
++//{
++//
++//}
++
++static int icg20660_read_fifo_cnt(struct gyro_dev *dev, u16 *fifo_cnt)
++{
++    u8 val_h = 0;
++    u8 val_l = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICG20660_FIFO_COUNTH, &val_h);
++    dev->reg_ops->read_reg(dev, GSEN_ICG20660_FIFO_COUNTL, &val_l);
++    *fifo_cnt = (val_h << 8) + val_l;
++    return 0;
++}
++
++static int icg20660_read_fifo_data(struct gyro_dev *dev, u8 *fifo_data, u16 fifo_cnt)
++{
++    dev->reg_ops->read_regs(dev, GSEN_ICG20660_FIFO_R_W, fifo_data, fifo_cnt);
++    return 0;
++}
++
++static int icg20660_reset_fifo(struct gyro_dev *dev)
++{
++    return dev->reg_ops->write_reg(dev, GSEN_ICG20660_USER_CTRL,
++        GYROSENSOR_ICG20660_FIFO_RD_EN | GYROSENSOR_ICG20660_RESET_FIFO);
++}
++
++
++static struct gyro_sensor_ops gyro_icg20660_ops = {
++    .init                  = icg20660_init,
++    .enable_fifo           = icg20660_enable_fifo,
++    .set_sample_rate       = icg20660_set_sample_rate,
++    .get_sample_rate       = icg20660_get_sample_rate,
++
++    .set_gyro_range        = icg20660_set_gyro_range,
++    .set_accel_range       = icg20660_set_accel_range,
++
++    .get_gyro_range        = icg20660_get_gyro_range,
++    .get_gyro_sensitivity  = icg20660_get_gyro_sensitivity,
++
++    .get_accel_range       = icg20660_get_accel_range,
++    .get_accel_sensitivity = icg20660_get_accel_sensitivity,
++
++    .read_fifo_data        = icg20660_read_fifo_data,
++    .read_fifo_cnt         = icg20660_read_fifo_cnt,
++    .reset_fifo            = icg20660_reset_fifo,
++};
++
++int gyro_sensor_init(struct gyro_dev *dev)
++{
++    dev->sensor_ops = &gyro_icg20660_ops;
++    return 0;
++}
++
++void gyro_sensor_deinit(struct gyro_dev *dev)
++{
++    dev->sensor_ops = NULL;
++}
++
+diff --git a/drivers/sstar/gyro/gyro_sensor_icm40607.c b/drivers/sstar/gyro/gyro_sensor_icm40607.c
+new file mode 100644
+index 000000000000..71abbad57ef8
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_sensor_icm40607.c
+@@ -0,0 +1,540 @@
++/*
++ * gyro_sensor_icm40607.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++
++#include <linux/delay.h>
++#include "gyro_core.h"
++#include "gyro.h"
++
++#define GYROSENSOR_ICM40607_INT_LEVEL_L         0x80
++#define GYROSENSOR_ICM40607_INT_LEVEL_H         0x00
++#define GYROSENSOR_ICM40607_INT_OPEN_DRAIN      0x40
++#define GYROSENSOR_ICM40607_INT_PUSH_PULL       0x00
++#define GYROSENSOR_ICM40607_LATCH_INT_EN        0x20
++#define GYROSENSOR_ICM40607_INT_READ_CLEA       0x10
++#define GYROSENSOR_ICM40607_FSYNC_INT_LEVEL_L   0x08
++#define GYROSENSOR_ICM40607_FSYNC_INT_LEVEL_H   0x00
++#define GYROSENSOR_ICM40607_FSYNC_INT_MODEN     0x04
++
++#define GYROSENSOR_ICM40607_INT_NONE            0x00
++#define GYROSENSOR_ICM40607_INT_FIFO_FULL       0x10
++#define GYROSENSOR_ICM40607_INT_DATA_READY      0x01
++
++#define GYROSENSOR_ICM40607_FIFO_RD_EN          0x40
++#define GYROSENSOR_ICM40607_SPI_INTERFACEN      0x10
++#define GYROSENSOR_ICM40607_RESET_FIFO          0x04
++
++enum {
++    GSEN_ICM40607_CONFIG             = 0x11,
++    GSEN_ICM40607_SPI_SPEED          = 0x13,
++    GSEN_ICM40607_INT_CONFIG         = 0x14,
++    GSEN_ICM40607_FIFO_CONFIG        = 0x16,
++
++    GSEN_ICM40607_TEMP_OUT_H         = 0x1D,
++    GSEN_ICM40607_TEMP_OUT_L         = 0x1E,
++    GSEN_ICM40607_ACCEL_XOUT_H       = 0x1F,
++    GSEN_ICM40607_ACCEL_XOUT_L       = 0x20,
++    GSEN_ICM40607_ACCEL_YOUT_H       = 0x21,
++    GSEN_ICM40607_ACCEL_YOUT_L       = 0x22,
++    GSEN_ICM40607_ACCEL_ZOUT_H       = 0x23,
++    GSEN_ICM40607_ACCEL_ZOUT_L       = 0x24,
++    GSEN_ICM40607_GYRO_XOUT_H        = 0x25,
++    GSEN_ICM40607_GYRO_XOUT_L        = 0x26,
++    GSEN_ICM40607_GYRO_YOUT_H        = 0x27,
++    GSEN_ICM40607_GYRO_YOUT_L        = 0x28,
++    GSEN_ICM40607_GYRO_ZOUT_H        = 0x29,
++    GSEN_ICM40607_GYRO_ZOUT_L        = 0x2A,
++    GSEN_ICM40607_TMST_FSYNC_H       = 0x2B,
++    GSEN_ICM40607_TMST_FSYNC_L       = 0x2C,
++    GSEN_ICM40607_INT_STATUS         = 0x2D,
++    GSEN_ICM40607_FIFO_COUNTH        = 0x2E,
++    GSEN_ICM40607_FIFO_COUNTL        = 0x2F,
++    GSEN_ICM40607_FIFO_DATA          = 0x30,
++    GSEN_ICM40607_SIGNAL_PATH_RESET  = 0x4B,
++
++    GSEN_ICM40607_INTF_CONFIG0       = 0x4C,
++    GSEN_ICM40607_PWR_MGMT_0         = 0x4E,
++    GSEN_ICM40607_GYRO_CONFIG0       = 0x4F,
++    GSEN_ICM40607_ACCEL_CONFIG0      = 0x50,
++    GSEN_ICM40607_GYRO_CONFIG1       = 0x51,
++    GSEN_ICM40607_GYRO_ACCEL_CONFIG0 = 0x52,
++    GSEN_ICM40607_ACCEL_CONFIG1      = 0x53,
++
++    GSEN_ICM40607_TMST_CONFIG        = 0x54,
++    GSEN_ICM40607_SMD_CONFIG         = 0x57,
++    GSEN_ICM40607_FIFO_CONFIG1       = 0x5F,
++    GSEN_ICM40607_FIFO_CONFIG2       = 0x60,
++    GSEN_ICM40607_FIFO_CONFIG3       = 0x61,
++    GSEN_ICM40607_FSYNC_CONFIG       = 0x62,
++    GSEN_ICM40607_INT_CONFIG0        = 0x63,
++    GSEN_ICM40607_INT_CONFIG1        = 0x64,
++
++    GSEN_ICM40607_INT_SOURCE0        = 0x65,
++    GSEN_ICM40607_INT_SOURCE1        = 0x66,
++    GSEN_ICM40607_INT_SOURCE3        = 0x68,
++    GSEN_ICM40607_INT_SOURCE4        = 0x69,
++
++    GSEN_ICM40607_FIFO_LOST_PKT0     = 0x6C,
++    GSEN_ICM40607_FIFO_LOST_PKT1     = 0x6D,
++    GSEN_ICM40607_SELF_TEST_CONFIG   = 0x70,
++
++    GSEN_ICM40607_WHO_AM_I           = 0x75,
++    GSEN_ICM40607_REG_BANK_SEL       = 0x76,
++    GSEN_ICM40607_OFFSET_USER0       = 0x77,
++    GSEN_ICM40607_OFFSET_USER1       = 0x78,
++    GSEN_ICM40607_OFFSET_USER2       = 0x79,
++    GSEN_ICM40607_OFFSET_USER3       = 0x7A,
++    GSEN_ICM40607_OFFSET_USER4       = 0x7B,
++    GSEN_ICM40607_OFFSET_USER5       = 0x7C,
++    GSEN_ICM40607_OFFSET_USER6       = 0x7D,
++    GSEN_ICM40607_OFFSET_USER7       = 0x7E,
++    GSEN_ICM40607_OFFSET_USER8       = 0x7F,
++};
++
++static int icm40607_init(struct gyro_dev *dev)
++{
++    int ret = 0;
++
++    /* reset */
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_CONFIG, 0x01);
++    if (ret < 0) {
++        return ret;
++    }
++
++    msleep(10);
++
++    /* config pin9 function */
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_REG_BANK_SEL, 0x01);
++    ret = dev->reg_ops->write_reg(dev, 0x7b, 0x02);
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_REG_BANK_SEL, 0x00);
++    if (ret < 0) {
++        return ret;
++    }
++
++    /* power config */
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_PWR_MGMT_0, 0x1c);
++    if (ret < 0) {
++        return ret;
++    }
++
++    /* interupt */
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_INT_SOURCE0, 0x08);
++    if (ret < 0) {
++        return ret;
++    }
++
++    /* config */
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_FIFO_CONFIG, 0xc0);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_FSYNC_CONFIG, 0x10);
++    if (ret < 0) {
++        return ret;
++    }
++
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_TMST_CONFIG, 0x03);
++    if (ret < 0) {
++        return ret;
++    }
++    return 0;
++}
++
++static int icm40607_enable_fifo(struct gyro_dev *dev, struct gyro_arg_dev_mode mode,
++        struct gyro_arg_fifo_info *fifo_info)
++{
++    int ret = 0;
++    u8 val = 0x08;
++    u8 offset = 0;
++    u8 tmp = 0;
++    int i = 0;
++    struct __icg40607_fifo_info {
++        u8 fifo_type;
++        u8 *axis_start;
++        u8 *axis_end;
++        u8 size;
++        u8 reg_setting;
++    } info[] = {
++        { 0xff                                                                  , &tmp,                    &tmp                 , 1 , 0x00 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->ax_start   , &fifo_info->ax_end   , 2 , 0x01 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->ay_start   , &fifo_info->ay_end   , 2 , 0x01 },
++        { GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN , &fifo_info->az_start   , &fifo_info->az_end   , 2 , 0x01 },
++        { GYROSENSOR_XG_FIFO_EN | GYROSENSOR_YG_FIFO_EN | GYROSENSOR_ZG_FIFO_EN , &fifo_info->gx_start   , &fifo_info->gx_end   , 2 , 0x02 },
++        { GYROSENSOR_YG_FIFO_EN | GYROSENSOR_YG_FIFO_EN | GYROSENSOR_ZG_FIFO_EN , &fifo_info->gy_start   , &fifo_info->gy_end   , 2 , 0x02 },
++        { GYROSENSOR_ZG_FIFO_EN | GYROSENSOR_YG_FIFO_EN | GYROSENSOR_ZG_FIFO_EN , &fifo_info->gz_start   , &fifo_info->gz_end   , 2 , 0x02 },
++        { 0xff                                                                  , &fifo_info->temp_start , &fifo_info->temp_end , 1 , 0x00 },
++    };
++    if (mode.fifo_mode) {
++        for (i = 0; i < sizeof(info)/sizeof(info[0]); ++i) {
++            if (mode.fifo_type & (info[i].fifo_type)) {
++                *info[i].axis_start = offset;
++                *info[i].axis_end = offset + info[i].size - 1;
++                val |= info[i].reg_setting;
++                offset += info[i].size;
++            }
++        }
++        fifo_info->bytes_pre_data = offset > 8 ? 16 : offset;
++        fifo_info->max_fifo_cnt = 2048;
++        fifo_info->is_big_endian = 1;
++    } else {
++        val = 0;
++    }
++    ret = dev->reg_ops->write_reg(dev, GSEN_ICM40607_FIFO_CONFIG1, val);
++    return ret;
++}
++
++static int icm40607_set_sample_rate(struct gyro_dev *dev, struct gyro_arg_sample_rate rate)
++{
++    u8 gyro_cfg_val = 0;
++    u8 accel_cfg_val = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &gyro_cfg_val);
++    dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &accel_cfg_val);
++    gyro_cfg_val &= 0xf0;
++    accel_cfg_val &= 0xf0;
++    switch (rate.rate) {
++        case 8000:
++        {
++            gyro_cfg_val |= 0x03;
++            accel_cfg_val |= 0x03;
++        }
++        break;
++        case 4000:
++        {
++            gyro_cfg_val |= 0x04;
++            accel_cfg_val |= 0x04;
++        }
++        break;
++        case 2000:
++        {
++            gyro_cfg_val |= 0x05;
++            accel_cfg_val |= 0x05;
++        }
++        break;
++        case 1000:
++        {
++            gyro_cfg_val |= 0x06;
++            accel_cfg_val |= 0x06;
++        }
++        break;
++
++        default:
++        {
++            gyro_cfg_val |= 0x07;
++            accel_cfg_val |= 0x07;
++        }
++        break;
++    }
++    dev->reg_ops->write_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, gyro_cfg_val);
++    dev->reg_ops->write_reg(dev, GSEN_ICM40607_ACCEL_CONFIG0, accel_cfg_val);
++    return 0;
++}
++static int icm40607_get_sample_rate(struct gyro_dev *dev, struct gyro_arg_sample_rate *rate)
++{
++    u8 gyro_cfg_val = 0;
++    u8 accel_cfg_val = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &gyro_cfg_val);
++    dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &accel_cfg_val);
++    gyro_cfg_val &= 0x0f;
++    accel_cfg_val &= 0x0f;
++    if (gyro_cfg_val != accel_cfg_val) {
++        GYRO_ERR("sample rate is different.");
++        return -1;
++    }
++    switch (gyro_cfg_val) {
++        case 0x03:
++            (*rate).rate = 8000;
++            break;
++        case 0x04:
++            (*rate).rate = 4000;
++            break;
++        case 0x05:
++            (*rate).rate = 2000;
++            break;
++        case 0x06:
++            (*rate).rate = 1000;
++            break;
++        default:
++            GYRO_ERR("sample rate 0x%x", gyro_cfg_val);
++            return -1;
++    }
++    return 0;
++}
++static int icm40607_set_gyro_range(struct gyro_dev *dev, struct gyro_arg_gyro_range range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= ~(0xe0);
++
++    switch (range.range) {
++        case 250:
++            val |= 0x60;
++            break;
++        case 500:
++            val |= 0x40;
++            break;
++        case 1000:
++            val |= 0x20;
++            break;
++        case 2000:
++            val |= 0x00;
++            break;
++
++        default:
++            val |= 0x30;
++            break;
++    }
++
++    return dev->reg_ops->write_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, val);
++}
++static int icm40607_set_accel_range(struct gyro_dev *dev, struct gyro_arg_accel_range range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICM40607_ACCEL_CONFIG0, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= ~(0xe0);
++
++    switch (range.range) {
++        case 2:
++            val |= 0x60;
++            break;
++        case 4:
++            val |= 0x40;
++            break;
++        case 8:
++            val |= 0x20;
++            break;
++        case 16:
++            val |= 0x00;
++            break;
++
++        default:
++            val |= 0x00;
++            break;
++    }
++
++    return dev->reg_ops->write_reg(dev, GSEN_ICM40607_ACCEL_CONFIG1, val);
++}
++static int icm40607_get_gyro_range(struct gyro_dev *dev, struct gyro_arg_gyro_range *range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0xe0;
++
++    switch (val) {
++        case 0x00:
++            (*range).range = 2000;
++            break;
++        case 0x20:
++            (*range).range = 1000;
++            break;
++        case 0x40:
++            (*range).range = 500;
++            break;
++        case 0x60:
++            (*range).range = 250;
++            break;
++
++        default:
++            *range = GYROSENSOR_GYRO_RANGE_250;
++            break;
++    }
++
++    return ret;
++}
++static int icm40607_get_gyro_sensitivity(struct gyro_dev *dev, struct gyro_arg_sensitivity *sensitivity)
++{
++    int ret = 0;
++    u8 val = 0;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICM40607_GYRO_CONFIG0, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0xe0;
++
++    switch (val) {
++        case 0x00:
++            (*sensitivity).num = 164;
++            (*sensitivity).den = 10;
++            break;
++        case 0x20:
++            (*sensitivity).num = 328;
++            (*sensitivity).den = 10;
++            break;
++        case 0x40:
++            (*sensitivity).num = 655;
++            (*sensitivity).den = 10;
++            break;
++        case 0x60:
++            (*sensitivity).num = 131;
++            (*sensitivity).den = 1;
++            break;
++        default:
++            GYRO_ERR("gyro range 0x%x", val);
++            break;
++    }
++
++    return ret;
++}
++static int icm40607_get_accel_range(struct gyro_dev *dev, struct gyro_arg_accel_range *range)
++{
++    int ret = 0;
++    u8 val;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICM40607_ACCEL_CONFIG0, &val);
++    if (ret != 0) {
++        return ret;
++    }
++
++    val &= 0xe0;
++
++    switch (val) {
++        case 0x00:
++            (*range).range = 16;
++            break;
++        case 0x20:
++            (*range).range = 8;
++            break;
++        case 0x40:
++            (*range).range = 4;
++            break;
++        case 0x60:
++            (*range).range = 2;
++            break;
++
++        default:
++            *range = GYROSENSOR_ACCEL_RANGE_2G;
++            break;
++    }
++
++    return ret;
++}
++static int icm40607_get_accel_sensitivity(struct gyro_dev *dev, struct gyro_arg_sensitivity *sensitivity)
++{
++    int ret = 0;
++    u8 val = 0;
++
++    ret = dev->reg_ops->read_reg(dev, GSEN_ICM40607_ACCEL_CONFIG0, &val);
++    if (ret != 0) {
++        return ret;
++    }
++    val &= 0xe0;
++
++    switch (val) {
++        case 0x00:
++            (*sensitivity).num = 2048;
++            (*sensitivity).den = 1;
++            break;
++        case 0x20:
++            (*sensitivity).num = 4096;
++            (*sensitivity).den = 1;
++            break;
++        case 0x40:
++            (*sensitivity).num = 8192;
++            (*sensitivity).den = 1;
++            break;
++        case 0x60:
++            (*sensitivity).num = 16384;
++            (*sensitivity).den = 1;
++            break;
++
++        default:
++            GYRO_ERR("accel range %d", val);
++            break;
++    }
++
++    return ret;
++}
++//static int icm40607_read_gyro_xyz(struct gyro_arg_gyro_xyz *arg);
++//{
++//
++//}
++//static int (*read_accel_xyz)(struct gyro_arg_accel_xyz *arg);
++//{
++//
++//}
++//static int (*read_temp)(struct gyro_arg_temp *arg);
++//{
++//
++//}
++//
++static int icm40607_read_fifo_cnt(struct gyro_dev *dev, u16* cnt)
++{
++    u8 val_h = 0;
++    u8 val_l = 0;
++    dev->reg_ops->read_reg(dev, GSEN_ICM40607_FIFO_COUNTH, &val_h);
++    dev->reg_ops->read_reg(dev, GSEN_ICM40607_FIFO_COUNTL, &val_l);
++    *cnt = (val_h << 8) + val_l;
++    return 0;
++}
++
++static int icm40607_read_fifo_data(struct gyro_dev *dev, u8 *fifo_data, u16 fifo_cnt)
++{
++    return dev->reg_ops->read_regs(dev, GSEN_ICM40607_FIFO_DATA, fifo_data, fifo_cnt);
++}
++
++static int icm40607_reset_fifo(struct gyro_dev *dev)
++{
++    return dev->reg_ops->write_reg(dev, GSEN_ICM40607_SIGNAL_PATH_RESET, 0x02);
++}
++
++
++static struct gyro_sensor_ops gyro_icm40607_ops = {
++    .init                  = icm40607_init,
++    .enable_fifo           = icm40607_enable_fifo,
++    .set_sample_rate       = icm40607_set_sample_rate,
++    .get_sample_rate       = icm40607_get_sample_rate,
++
++    .set_gyro_range        = icm40607_set_gyro_range,
++    .set_accel_range       = icm40607_set_accel_range,
++
++    .get_gyro_range        = icm40607_get_gyro_range,
++    .get_gyro_sensitivity  = icm40607_get_gyro_sensitivity,
++
++    .get_accel_range       = icm40607_get_accel_range,
++    .get_accel_sensitivity = icm40607_get_accel_sensitivity,
++
++    .read_fifo_data        = icm40607_read_fifo_data,
++    .read_fifo_cnt         = icm40607_read_fifo_cnt,
++    .reset_fifo            = icm40607_reset_fifo,
++};
++
++int gyro_sensor_init(struct gyro_dev *dev)
++{
++    dev->sensor_ops = &gyro_icm40607_ops;
++    return 0;
++}
++
++void gyro_sensor_deinit(struct gyro_dev *dev)
++{
++    dev->sensor_ops = NULL;
++}
++
+diff --git a/drivers/sstar/gyro/gyro_spi.c b/drivers/sstar/gyro/gyro_spi.c
+new file mode 100755
+index 000000000000..19dc8b14823e
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_spi.c
+@@ -0,0 +1,150 @@
++/*
++ * gyro_spi.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/printk.h>
++#include <linux/spi/spi.h>
++#include <linux/of.h>
++#include <linux/gpio.h>
++#include "gyro_core.h"
++#include "gyro.h"
++
++int gyro_spi_read_regs(struct gyro_dev *dev, u8 reg, void *val, int len)
++{
++    struct spi_device *spi = container_of(dev->transfer_dev,
++            struct spi_device, dev);
++    struct spi_message msg;
++    u8 tx_reg = 0x80 | reg;
++    struct spi_transfer t[] = {
++        {
++            .rx_buf = NULL,
++            .tx_buf = &tx_reg,
++            .len = 1
++        }, {
++            .rx_buf = val,
++            .tx_buf = NULL,
++            .len = len
++        }
++    };
++    int ret;
++    spi_message_init(&msg);
++    spi_message_add_tail(&t[0], &msg);
++    spi_message_add_tail(&t[1], &msg);
++    ret = spi_sync(spi, &msg);
++    return ret;
++}
++
++int gyro_spi_read_reg(struct gyro_dev *dev, u8 reg, u8 *val)
++{
++    return gyro_spi_read_regs(dev, reg, val, 1);
++}
++
++int gyro_spi_write_reg(struct gyro_dev *dev, u8 reg, u8 val)
++{
++    struct spi_device *spi = container_of(dev->transfer_dev,
++            struct spi_device, dev);
++    struct spi_message msg;
++    struct spi_transfer t[] = {
++        {
++            .rx_buf = NULL,
++            .tx_buf = &reg,
++            .len = 1
++        }, {
++            .rx_buf = NULL,
++            .tx_buf = &val,
++            .len = 1
++        }
++    };
++    int ret;
++    spi_message_init(&msg);
++    spi_message_add_tail(&t[0], &msg);
++    spi_message_add_tail(&t[1], &msg);
++    ret = spi_sync(spi, &msg);
++    return ret;
++}
++
++static struct gyro_reg_ops spi_reg_ops = {
++    .read_regs = gyro_spi_read_regs,
++    .read_reg  = gyro_spi_read_reg,
++    .write_reg = gyro_spi_write_reg,
++};
++
++static int gyro_spi_probe(struct spi_device *spi)
++{
++    int ret = 0;
++    GYRO_DBG("gyro_spi probe");
++    ret = gyro_cdev_probe();
++    if (0 != ret) {
++        return ret;
++    }
++    return gyro_probe(&spi->dev, &spi_reg_ops);
++}
++
++static int gyro_spi_remove(struct spi_device *spi)
++{
++    GYRO_DBG("gyro_spi remove");
++    gyro_remove();
++    return gyro_cdev_remove();
++}
++
++static const struct spi_device_id gyro_spi_id[] = {
++    { "gyro", 0 },
++    {  },
++};
++MODULE_DEVICE_TABLE(spi, gyro_spi_id);
++
++static const struct of_device_id gyro_spi_of_match[] = {
++    { .compatible = "sstar,gyro_spi" },
++    {  },
++};
++MODULE_DEVICE_TABLE(of, gyro_spi_of_match);
++
++static struct spi_driver gyro_spi_driver = {
++    .probe = gyro_spi_probe,
++    .remove = gyro_spi_remove,
++    .driver = {
++        .owner  =   THIS_MODULE,
++        .name   =   "gyro_spi",
++        .of_match_table = of_match_ptr(gyro_spi_of_match),
++    },
++    .id_table = gyro_spi_id,
++};
++
++int gyro_spi_init(void)
++{
++    int ret = 0;
++    ret = spi_register_driver(&gyro_spi_driver);
++    if (0 != ret) {
++        GYRO_ERR("Add i2c driver error");
++        goto err_i2c_add_driver;
++    }
++    GYRO_DBG("Gyro spi init");
++    return 0;
++
++err_i2c_add_driver:
++    return ret;
++}
++
++void gyro_spi_exit(void)
++{
++    spi_unregister_driver(&gyro_spi_driver);
++    GYRO_DBG("Gyro spi exit");
++}
++
++MODULE_LICENSE("GPL");
++
+diff --git a/drivers/sstar/gyro/gyro_sysfs.c b/drivers/sstar/gyro/gyro_sysfs.c
+new file mode 100644
+index 000000000000..3415a8dadc23
+--- /dev/null
++++ b/drivers/sstar/gyro/gyro_sysfs.c
+@@ -0,0 +1,224 @@
++/*
++ * gyro_sysfs.c - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++
++#include <linux/stat.h>
++#include <linux/device.h>
++#include <linux/string.h>
++#include <linux/kthread.h>
++#include <linux/delay.h>
++#include "ms_msys.h"
++#include "gyro_core.h"
++
++#define CHECK_RESULT(result, expectation, function, fmt, ...)         \
++    do {                                                              \
++        if ((expectation) == (function)) {                            \
++            printk("[ Success ] " #fmt "\n", ##__VA_ARGS__);          \
++        } else {                                                      \
++            printk("[ Failed  ] " #fmt "\n", ##__VA_ARGS__);          \
++            result = !result;                                         \
++        }                                                             \
++    } while(0)
++
++static dev_t devid;
++static struct device *gyro_sysfs_dev;
++
++static void show_one_frame_fifo_data(u8 *data, struct gyro_arg_fifo_info fifo_info)
++{
++    struct fifo_parse {
++        char *name;
++        u8 start;
++        u8 end;
++    } fp[] = {
++        { "gx", fifo_info.gx_start, fifo_info.gx_end },
++        { "gy", fifo_info.gy_start, fifo_info.gy_end },
++        { "gz", fifo_info.gz_start, fifo_info.gz_end },
++        { "ax", fifo_info.ax_start, fifo_info.ax_end },
++        { "ay", fifo_info.ay_start, fifo_info.ay_end },
++        { "az", fifo_info.az_start, fifo_info.az_end },
++        { "te", fifo_info.gx_start, fifo_info.gx_end },
++    };
++    unsigned int i = 0;
++    unsigned char j = 0;
++    int num = 0;
++    int shift = 0;
++
++    printk(KERN_DEBUG KERN_CONT "| ");
++    for (i = 0; i < sizeof(fp)/sizeof(fp[0]); ++i) {
++        if (fp[i].start > fifo_info.bytes_pre_data || fp[i].end > fifo_info.bytes_pre_data) {
++            continue;
++        }
++        num = 0;
++        shift = fifo_info.is_big_endian ? ( fp[i].end - fp[i].start ) * 8 : 0;
++        for (j = fp[i].start; j <= fp[i].end; ++j) {
++            num |= ( (signed char)data[j] << shift );
++            shift += fifo_info.is_big_endian ? -8 : 8;
++        }
++        printk(KERN_DEBUG KERN_CONT "%4s: %6d | ", fp[i].name, num);
++    }
++    printk(KERN_DEBUG KERN_CONT "\n");
++}
++
++static void gyro_self_check(void)
++{
++    struct gyro_arg_dev_mode dev_mode;
++    struct gyro_arg_gyro_range gyro_range;
++    struct gyro_arg_accel_range accel_range;
++    struct gyro_arg_sample_rate sample_rate;
++    struct gyro_arg_fifo_info fifo_info;
++
++	bool result = true;
++    int i;
++    unsigned int test_sample_rate[] = {
++        100,
++        200,
++        500,
++        1000,
++        2000,
++        4000,
++        8000,
++        16000,
++        200,
++    };
++    unsigned int test_gyro_range[] = {
++        125,
++        250,
++        500,
++        1000,
++        2000,
++    };
++    unsigned int test_accel_range[] = {
++        2,
++        4,
++        8,
++        16
++    };
++    struct gyro_arg_dev_mode test_dev_mode[] = {
++        { 0, 0 },
++        { 1, GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN |
++             GYROSENSOR_ZG_FIFO_EN | GYROSENSOR_YG_FIFO_EN | GYROSENSOR_XG_FIFO_EN | GYROSENSOR_TEMP_FIFO_EN},
++        { 1, GYROSENSOR_ZA_FIFO_EN | GYROSENSOR_YA_FIFO_EN | GYROSENSOR_XA_FIFO_EN },
++        { 1, GYROSENSOR_ZG_FIFO_EN | GYROSENSOR_YG_FIFO_EN | GYROSENSOR_XG_FIFO_EN },
++    };
++
++    /* enable gyro */
++    CHECK_RESULT(result, 0, gyro_enable(), "gyro_enable");
++    if (!result) {
++        return;
++    }
++
++    printk("----gyro range test --------------------------------------\n");
++    for (i = 0; i < sizeof(test_gyro_range)/sizeof(test_gyro_range[0]); ++i) {
++        gyro_range.range = test_gyro_range[i];
++        CHECK_RESULT(result , 0      , gyro_set_gyro_range(gyro_range)        , "gyro_set_gyro_range (%u)"    , test_gyro_range[i] );
++        CHECK_RESULT(result , 0      , gyro_get_gyro_range(&gyro_range)       , "gyro_get_gyro_range"                              );
++        CHECK_RESULT(result , true   , gyro_range.range == test_gyro_range[i] , "read back check."                                 );
++        CHECK_RESULT(result , true   , result                                 , "result check gyro_range [%u]", test_gyro_range[i] );
++    }
++
++    printk("----accel range test --------------------------------------\n");
++    for (i = 0; i < sizeof(test_accel_range)/sizeof(test_accel_range[0]); ++i) {
++        accel_range.range = test_accel_range[i];
++        CHECK_RESULT(result , 0      , gyro_set_accel_range(accel_range)        , "gyro_set_accel_range (%u)"     , test_accel_range[i] );
++        CHECK_RESULT(result , 0      , gyro_get_accel_range(&accel_range)       , "gyro_get_accel_range"                                );
++        CHECK_RESULT(result , true   , accel_range.range == test_accel_range[i] , "read back check."                                    );
++        CHECK_RESULT(result , true   , result                                   , "result check accel_range [%u]" , test_accel_range[i] );
++    }
++
++    printk("----sample rate test --------------------------------------\n");
++    for (i = 0; i < sizeof(test_sample_rate)/sizeof(test_sample_rate[0]); ++i) {
++        sample_rate.rate = test_sample_rate[i];
++        CHECK_RESULT(result , 0    , gyro_set_sample_rate(sample_rate)       , "gyro_set_sample_rate (%u)"     , test_sample_rate[i] );
++        CHECK_RESULT(result , 0    , gyro_get_sample_rate(&sample_rate)      , "gyro_get_sample_rate"                                );
++        CHECK_RESULT(result , true , sample_rate.rate == test_sample_rate[i] , "read back check."                                    );
++        CHECK_RESULT(result , true , result                                  , "result check sample_rate [%u]" , test_sample_rate[i] );
++    }
++
++    printk("----gyro_set_dev_mode -------------------------------------\n");
++    for (i = 0; i < sizeof(test_dev_mode)/sizeof(test_dev_mode[0]); ++i) {
++        dev_mode = test_dev_mode[i];
++        CHECK_RESULT(result, 0, gyro_set_dev_mode(dev_mode, &fifo_info), "gyro_set_dev_mode (%d, 0x%x)", dev_mode.fifo_mode, dev_mode.fifo_type);
++        printk("\tgx_start, gx_end      %d, %d\n", fifo_info.gx_start, fifo_info.gx_end);
++        printk("\tgy_start, gy_end      %d, %d\n", fifo_info.gy_start, fifo_info.gy_end);
++        printk("\tgz_start, gz_end      %d, %d\n", fifo_info.gz_start, fifo_info.gz_end);
++        printk("\tax_start, ax_end      %d, %d\n", fifo_info.ax_start, fifo_info.ax_end);
++        printk("\tay_start, ay_end      %d, %d\n", fifo_info.ay_start, fifo_info.ay_end);
++        printk("\taz_start, az_end      %d, %d\n", fifo_info.az_start, fifo_info.az_end);
++        printk("\ttemp_start, temp_end  %d, %d\n", fifo_info.temp_start, fifo_info.temp_end);
++        printk("\tbytes_pre_data        %d\n", fifo_info.bytes_pre_data);
++        printk("\tis_big_endian         %d\n", fifo_info.is_big_endian);
++        printk("\tmax_fifo_cnt          %d\n", fifo_info.max_fifo_cnt);
++    }
++
++    printk("----gyro fifo test ---------------------------------------\n");
++    for (i = 0; i < 10; ++i) {
++        u8 fifo_data[2048];
++        u16 cnt = 0;
++        u16 j = 0;
++
++        msleep(30);
++        gyro_read_fifocnt(&cnt);
++        if (cnt > 2048) {
++            cnt = 2048 / fifo_info.bytes_pre_data * fifo_info.bytes_pre_data;
++        }
++        gyro_read_fifodata(fifo_data, cnt);
++        printk(KERN_DEBUG "-------------------------------------------------------------------------\n");
++        for (j = 0; j <= cnt - fifo_info.bytes_pre_data; j += fifo_info.bytes_pre_data) {
++            show_one_frame_fifo_data(&fifo_data[j], fifo_info);
++        }
++    }
++
++    gyro_disable();
++}
++
++static ssize_t gyro_sysfs_self_check_show(struct device *dev, struct device_attribute *attr,
++        char *buf)
++{
++    gyro_self_check();
++    return scnprintf(buf, PAGE_SIZE, "Show whole log in kmsg\n");
++}
++
++static DEVICE_ATTR(self_check, S_IRUGO, gyro_sysfs_self_check_show, NULL);
++
++int gyro_sysfs_init(struct gyro_dev *dev)
++{
++    int ret = 0;
++    ret = alloc_chrdev_region(&devid, 0, GYRO_DEV_COUNT, GYRO_DEVICNAME);
++    if (ret < 0) {
++        GYRO_ERR("alloc_chrdev_region for sysfs failed.");
++        goto err_alloc_chrdev_region;
++    }
++    gyro_sysfs_dev = device_create(msys_get_sysfs_class(), NULL, devid, NULL, "gyro");
++    if (IS_ERR(gyro_sysfs_dev)) {
++        GYRO_ERR("device_create for sysfs failed.");
++        goto err_device_create;
++    }
++
++    device_create_file(gyro_sysfs_dev, &dev_attr_self_check);
++    return 0;
++
++err_device_create:
++    unregister_chrdev_region(devid, GYRO_DEV_COUNT);
++err_alloc_chrdev_region:
++    return ret;
++}
++
++void gyro_sysfs_deinit(struct gyro_dev *dev)
++{
++    device_destroy(msys_get_sysfs_class(), devid);
++    unregister_chrdev_region(devid, GYRO_DEV_COUNT);
++}
++
 diff --git a/drivers/sstar/i2c/Kconfig b/drivers/sstar/i2c/Kconfig
 new file mode 100755
 index 000000000000..ff1341ae70aa
@@ -633133,7 +637106,7 @@ index 000000000000..94258202838d
 +EXTRA_CFLAGS      +=  -Idrivers/sstar/i2c
 diff --git a/drivers/sstar/i2c/infinity6b0/mhal_iic.c b/drivers/sstar/i2c/infinity6b0/mhal_iic.c
 new file mode 100755
-index 000000000000..abeaf95a3bfb
+index 000000000000..3fc576312eaf
 --- /dev/null
 +++ b/drivers/sstar/i2c/infinity6b0/mhal_iic.c
 @@ -0,0 +1,1829 @@
@@ -633693,7 +637666,7 @@ index 000000000000..abeaf95a3bfb
 +    g_u32DmaPhyAddr[u8Port] = u32MiuAddr;
 +
 +    /*Enable I2C DMA wait MIU done*/
-+    HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_RESERVED0+u16PortOffset, __BIT7|__BIT4, TRUE);
++    HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_RESERVED0+u16PortOffset, __BIT7|__BIT5|__BIT4, TRUE);
 +
 +    return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u16PortOffset, Chip_Phys_to_MIU(u32MiuAddr));
 +}
@@ -635585,7 +639558,7 @@ index 000000000000..94258202838d
 +EXTRA_CFLAGS      +=  -Idrivers/sstar/i2c
 diff --git a/drivers/sstar/i2c/infinity6e/mhal_iic.c b/drivers/sstar/i2c/infinity6e/mhal_iic.c
 new file mode 100755
-index 000000000000..5cef2d52ef3f
+index 000000000000..28d6744a8c4a
 --- /dev/null
 +++ b/drivers/sstar/i2c/infinity6e/mhal_iic.c
 @@ -0,0 +1,2266 @@
@@ -636200,7 +640173,7 @@ index 000000000000..5cef2d52ef3f
 +    g_u32DmaPhyAddr[u8Port] = u32MiuAddr;
 +
 +    /*Enable I2C DMA wait MIU done*/
-+    HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_RESERVED0+u16PortOffset, __BIT7|__BIT4, TRUE);
++    HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_RESERVED0+u16PortOffset, __BIT7|__BIT5|__BIT4, TRUE);
 +
 +    return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u16PortOffset, Chip_Phys_to_MIU(u32MiuAddr));
 +}
@@ -638481,10 +642454,10 @@ index 000000000000..fd82d13e60ee
 +#endif // _REG_IIC_H_
 diff --git a/drivers/sstar/i2c/ms_iic.c b/drivers/sstar/i2c/ms_iic.c
 new file mode 100755
-index 000000000000..86f2b189de95
+index 000000000000..797560daf683
 --- /dev/null
 +++ b/drivers/sstar/i2c/ms_iic.c
-@@ -0,0 +1,1782 @@
+@@ -0,0 +1,1791 @@
 +/*
 +* ms_iic.c- Sigmastar
 +*
@@ -639806,6 +643779,7 @@ index 000000000000..86f2b189de95
 +
 +	            if (err)
 +				{
++                        MDrv_HWI2C_Stop(u16Offset);
 +					mutex_unlock(&i2cMutex);
 +	                return err;
 +				}
@@ -640151,7 +644125,9 @@ index 000000000000..86f2b189de95
 +#ifdef CONFIG_PM_SLEEP
 +static int mstar_i2c_suspend(struct platform_device *pdev, pm_message_t state)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	struct mstar_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
++#endif
 +
 +#if defined(CONFIG_OF)
 +    int num_parents, i;
@@ -640183,17 +644159,21 @@ index 000000000000..86f2b189de95
 +    }
 +    kfree(iic_clks);
 +#endif
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	MDrv_HW_IIC_DeInit(i2c_dev->adapter.nr);
 +	i2c_lock_adapter(&i2c_dev->adapter);
 +	i2c_dev->is_suspended = true;
 +	i2c_unlock_adapter(&i2c_dev->adapter);
++#endif
 +
 +	return 0;
 +}
 +
 +static int mstar_i2c_resume(struct platform_device *pdev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	struct mstar_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
++#endif
 +
 +	//int ret;
 +#if defined(CONFIG_OF)
@@ -640224,12 +644204,14 @@ index 000000000000..86f2b189de95
 +    kfree(iic_clks);
 +#endif
 +
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	i2c_lock_adapter(&i2c_dev->adapter);
 +
 +	MDrv_HW_IIC_Init(i2c_dev->base,i2c_dev->chipbase,i2c_dev->adapter.nr,i2c_dev->clkbase, i2c_dev->i2cpadmux, i2c_dev->i2c_speed, i2c_dev->i2c_en_dma);
 +	i2c_dev->is_suspended = false;
 +
 +	i2c_unlock_adapter(&i2c_dev->adapter);
++#endif
 +
 +	return 0;
 +}
@@ -641882,10 +645864,10 @@ index 000000000000..605c99f57146
 +#endif //__CAM_OS_CONDITION_H__
 diff --git a/drivers/sstar/include/cam_os_util.h b/drivers/sstar/include/cam_os_util.h
 new file mode 100644
-index 000000000000..42c46c665b7d
+index 000000000000..2d3c6a20e5c0
 --- /dev/null
 +++ b/drivers/sstar/include/cam_os_util.h
-@@ -0,0 +1,144 @@
+@@ -0,0 +1,147 @@
 +/*
 +* cam_os_util.h - Sigmastar
 +*
@@ -642029,6 +646011,9 @@ index 000000000000..42c46c665b7d
 +#define CAM_OS_MIN(a,b) (((a)<(b))?(a):(b))
 +#define CAM_OS_MAX(a,b) (((a)>(b))?(a):(b))
 +
++#define CAM_OS_ALIGN_DOWN(val, alignment)   (((val)/(alignment))*(alignment))
++#define CAM_OS_ALIGN_UP(val, alignment)     ((((val)+(alignment)-1)/(alignment))*(alignment))
++
 +#endif //__CAM_OS_UTIL_H__
 diff --git a/drivers/sstar/include/cam_os_util_bitmap.h b/drivers/sstar/include/cam_os_util_bitmap.h
 new file mode 100644
@@ -645317,6 +649302,117 @@ index 000000000000..068b0ae4b127
 +
 +
 +#endif
+diff --git a/drivers/sstar/include/gyro.h b/drivers/sstar/include/gyro.h
+new file mode 100755
+index 000000000000..75385d2962d7
+--- /dev/null
++++ b/drivers/sstar/include/gyro.h
+@@ -0,0 +1,105 @@
++/*
++ * gyro.h - Sigmastar
++ *
++ * Copyright (c) [2019~2020] SigmaStar Technology.
++ *
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License version 2 for more details.
++ *
++ */
++#ifndef GYRO_H
++#define GYRO_H
++
++enum gyro_fifo_type {
++    GYROSENSOR_ZA_FIFO_EN        = 0x01,
++    GYROSENSOR_YA_FIFO_EN        = 0x02,
++    GYROSENSOR_XA_FIFO_EN        = 0x04,
++    GYROSENSOR_ZG_FIFO_EN        = 0x10,
++    GYROSENSOR_YG_FIFO_EN        = 0x20,
++    GYROSENSOR_XG_FIFO_EN        = 0x40,
++    GYROSENSOR_TEMP_FIFO_EN      = 0x80,
++    GYROSENSOR_FIFO_MAX_EN       = 0xFF,
++};
++
++struct gyro_arg_sample_rate {
++    unsigned int rate;
++};
++
++struct gyro_arg_gyro_range {
++    unsigned int range;
++};
++
++struct gyro_arg_accel_range {
++    unsigned int range;
++};
++
++struct gyro_arg_sensitivity {
++    unsigned short num;
++    unsigned short den;
++};
++
++struct gyro_arg_gyro_xyz {
++    short x;
++    short y;
++    short z;
++};
++
++struct gyro_arg_accel_xyz {
++    short x;
++    short y;
++    short z;
++};
++
++struct gyro_arg_temp {
++    short temp;
++};
++
++struct gyro_arg_dev_mode {
++    char fifo_mode; /* 1 or 0 */
++    unsigned char fifo_type;
++};
++
++struct gyro_arg_fifo_info {
++    unsigned char gx_start, gx_end;
++    unsigned char gy_start, gy_end;
++    unsigned char gz_start, gz_end;
++    unsigned char ax_start, ax_end;
++    unsigned char ay_start, ay_end;
++    unsigned char az_start, az_end;
++    unsigned char temp_start, temp_end;
++    unsigned char bytes_pre_data;
++    unsigned char is_big_endian;
++    unsigned short max_fifo_cnt;
++};
++
++typedef struct MHAL_DIS_GyroRegisterHander_s
++{
++    int (* pGyroSetSampleRate)(struct gyro_arg_sample_rate arg);
++    int (* pGyroGetSampleRate)(struct gyro_arg_sample_rate *arg);
++    int (* pGyroSetGyroRange)(struct gyro_arg_gyro_range arg);
++    int (* pGyroSetAccelRange)(struct gyro_arg_accel_range arg);
++    int (* pGyroGetGyroRange)(struct gyro_arg_gyro_range *arg);
++    int (* pGyroGetAccelRange)(struct gyro_arg_accel_range *arg);
++    int (* pGyroGetAccelSensitivity)(struct gyro_arg_sensitivity *arg);
++    int (* pGyroGetGyroSensitivity)(struct gyro_arg_sensitivity *arg);
++    /* fifo ops */
++    int (* pGyroReadFifodata)(u8* fifo_data, u16 fifo_cnt);
++    int (* pGyroReadFifocnt)(u16 *fifo_cnt);
++    int (* pGyroResetFifo)(void);
++
++    int (* pGyroReadGyroXyz)(struct gyro_arg_gyro_xyz *arg);
++    int (* pGyroReadAccelXyz)(struct gyro_arg_accel_xyz *arg);
++    int (* pGyroReadTemp)(struct gyro_arg_temp *arg);
++    int (* pGyroSetDevMode)(struct gyro_arg_dev_mode dev_mode, struct gyro_arg_fifo_info *fifo_info);
++    int (* pGyroEnable)(void);
++    int (* pGyroDisable)(void);
++}MHAL_DIS_GyroRegisterHander_t;
++
++#endif /* ifndef GYRO_H */
 diff --git a/drivers/sstar/include/infinity2/Kconfig b/drivers/sstar/include/infinity2/Kconfig
 new file mode 100755
 index 000000000000..c393005981c1
@@ -662519,10 +666615,10 @@ index 000000000000..3e048a2f013c
 +#endif
 diff --git a/drivers/sstar/include/infinity6e/registers.h b/drivers/sstar/include/infinity6e/registers.h
 new file mode 100755
-index 000000000000..2177d885add5
+index 000000000000..aef48b7b41fd
 --- /dev/null
 +++ b/drivers/sstar/include/infinity6e/registers.h
-@@ -0,0 +1,258 @@
+@@ -0,0 +1,261 @@
 +/*
 +* registers.h- Sigmastar
 +*
@@ -662588,40 +666684,43 @@ index 000000000000..2177d885add5
 +#define BASE_REG_RIU_PA         0x1F000000
 +#define BK_REG(reg)             ((reg) << 2)
 +
-+#define BASE_REG_PADTOP_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103C00)
-+#define BASE_REG_PMPOR_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x0600)
-+#define BASE_REG_PMSLEEP_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x0E00)
-+#define BASE_REG_PMGPIO_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x0F00)
-+#define BASE_REG_PMRTC_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1200)
-+#define BASE_REG_PMSAR_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1400)
-+#define BASE_REG_PMTOP_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1E00)
-+#define BASE_REG_EFUSE_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x2000)
-+#define BASE_REG_WDT_PA          GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x3000)
-+#define BASE_REG_DIDKEY_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x3800)
-+
-+#define BASE_REG_BDMA0_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100200)
-+#define BASE_REG_BDMA1_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100240)
-+#define BASE_REG_BDMA2_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100280)
-+#define BASE_REG_BDMA3_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1002C0)
-+#define BASE_REG_MAILBOX_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100400)
-+#define BASE_REG_INTRCTL_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100900)
-+#define BASE_REG_MOVDMA_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100B00)
-+#define BASE_REG_ATOP_PA         GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101000)
-+#define BASE_REG_MIU_PA          GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101200)
-+#define BASE_REG_OTP_PA          GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101800)
-+#define BASE_REG_CHIPTOP_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101E00)
-+#define BASE_REG_MIUPLL_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103100)
-+#define BASE_REG_CLKGEN_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103800)
-+#define BASE_REG_GPI_INT_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103D00)
-+#define BASE_REG_XTAL_ATOP_PA    GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x111B00)
-+#define BASE_REG_MCM_DIG_GP_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x113000)
-+#define BASE_REG_MCM_SC_GP_PA    GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x113200)
-+#define BASE_REG_MCM_VHE_GP_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x113400)
-+#define BASE_REG_UPLL0_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142000)
-+#define BASE_REG_UTMI0_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142100)
-+#define BASE_REG_USB0_PA         GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142300)
-+#define BASE_REG_VENPLL_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103600)
++#define BASE_REG_PADTOP_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103C00)
++#define BASE_REG_PMPOR_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x0600)
++#define BASE_REG_PMSLEEP_PA     GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x0E00)
++#define BASE_REG_PMGPIO_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x0F00)
++#define BASE_REG_PMRTC_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1200)
++#define BASE_REG_PMSAR_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1400)
++#define BASE_REG_PMTOP_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1E00)
++#define BASE_REG_EFUSE_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x2000)
++#define BASE_REG_WDT_PA         GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x3000)
++#define BASE_REG_DIDKEY_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x3800)
 +
++#define BASE_REG_BDMA0_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100200)
++#define BASE_REG_BDMA1_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100240)
++#define BASE_REG_BDMA2_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100280)
++#define BASE_REG_BDMA3_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x1002C0)
++#define BASE_REG_MAILBOX_PA     GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100400)
++#define BASE_REG_INTRCTL_PA     GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100900)
++#define BASE_REG_MOVDMA_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x100B00)
++#define BASE_REG_ATOP_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101000)
++#define BASE_REG_MIU_PA         GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101200)
++#define BASE_REG_OTP_PA         GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101800)
++#define BASE_REG_CHIPTOP_PA     GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x101E00)
++#define BASE_REG_MIUPLL_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103100)
++#define BASE_REG_LPLL_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103300)
++#define BASE_REG_IPUPLL_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103500)
++#define BASE_REG_VENPLL_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103600)
++#define BASE_REG_CLKGEN_PA      GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103800)
++#define BASE_REG_GPI_INT_PA     GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x103D00)
++#define BASE_REG_XTAL_ATOP_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x111B00)
++#define BASE_REG_MCM_DIG_GP_PA  GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x113000)
++#define BASE_REG_MCM_SC_GP_PA   GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x113200)
++#define BASE_REG_MCM_VHE_GP_PA  GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x113400)
++#define BASE_REG_UPLL0_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142000)
++#define BASE_REG_UTMI0_PA       GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142100)
++#define BASE_REG_USB0_PA        GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x142300)
++#define BASE_REG_SSUSB_PHYA0_PA GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x152400)
++#define BASE_REG_SSUSB_PHYA1_PA GET_BASE_ADDR_BY_BANK(BASE_REG_RIU_PA, 0x152500)
 +
 +#define REG_ADDR_STATUS  (BASE_REG_PMRTC_PA + REG_ID_04)
 +#define FORCE_UBOOT_BIT  BIT15
@@ -674294,10 +678393,10 @@ index 000000000000..b17de53bf671
 +#endif  //__VCORE_DEFS_H
 diff --git a/drivers/sstar/include/voltage_ctrl.h b/drivers/sstar/include/voltage_ctrl.h
 new file mode 100755
-index 000000000000..afeefd31f161
+index 000000000000..810899cfe0cc
 --- /dev/null
 +++ b/drivers/sstar/include/voltage_ctrl.h
-@@ -0,0 +1,36 @@
+@@ -0,0 +1,37 @@
 +/*
 +* voltage_ctrl.h- Sigmastar
 +*
@@ -674330,6 +678429,7 @@ index 000000000000..afeefd31f161
 +#endif
 +void set_core_voltage(VOLTAGE_DEMANDER_E demander, int mV);
 +int  get_core_voltage(void);
++int  get_core_voltage_of_demander(VOLTAGE_DEMANDER_E demander);
 +int  core_voltage_available(unsigned int **voltages, unsigned int *num);
 +int  core_voltage_pin(unsigned int **pins, unsigned int *num);
 +
@@ -674717,10 +678817,10 @@ index 000000000000..ab5cde9105f6
 +#endif
 diff --git a/drivers/sstar/ir/ms_ir.c b/drivers/sstar/ir/ms_ir.c
 new file mode 100755
-index 000000000000..c541910822d8
+index 000000000000..28b9549fcdeb
 --- /dev/null
 +++ b/drivers/sstar/ir/ms_ir.c
-@@ -0,0 +1,715 @@
+@@ -0,0 +1,719 @@
 +/*
 + * ms_ir.c
 + *
@@ -675393,9 +679493,11 @@ index 000000000000..c541910822d8
 +    ir_dbg("%s:%d enter \n",__func__, __LINE__);
 +    _mdrv_set_int_enable(0);
 +
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    #if(IR_MODE_SEL==IR_MODE_SWDECODE)
 +        _mdrv_set_sw_decode(0);
 +    #endif
++#endif
 +
 +    return 0;
 +}
@@ -675403,7 +679505,9 @@ index 000000000000..c541910822d8
 +static int mdrv_ir_resume(struct platform_device *pdev)
 +{
 +    ir_dbg("%s:%d enter \n",__func__, __LINE__);
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    _mdrv_ir_init();
++#endif
 +    _mdrv_set_int_enable(1);
 +
 +	return 0;
@@ -675573,10 +679677,10 @@ index 000000000000..90b096cec670
 +obj-$(CONFIG_MS_IRCUT)	+= ms_ircut.o
 diff --git a/drivers/sstar/ircut/ms_ircut.c b/drivers/sstar/ircut/ms_ircut.c
 new file mode 100755
-index 000000000000..a2fa31fea0d1
+index 000000000000..72ec87262f42
 --- /dev/null
 +++ b/drivers/sstar/ircut/ms_ircut.c
-@@ -0,0 +1,202 @@
+@@ -0,0 +1,206 @@
 +/*
 +* ms_ircut.c- Sigmastar
 +*
@@ -675743,17 +679847,21 @@ index 000000000000..a2fa31fea0d1
 +#ifdef CONFIG_PM
 +static int ms_ircut_suspend(struct platform_device *pdev, pm_message_t state)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	//uio_unregister_device(&ircut_info);
 +    IRCUT_DBG("ms_ircut_suspend\n");
++#endif
 +	return 0;
 +}
 +
 +static int ms_ircut_resume(struct platform_device *pdev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	//uio_unregister_device(&ircut_info);
 +    IRCUT_DBG("ms_ircut_resume\n");
 +	MDrv_GPIO_Pad_Set(mGpioNum);
 +	MDrv_GPIO_Pad_Odn(mGpioNum);
++#endif
 +	return 0;
 +}
 +#endif
@@ -678399,7 +682507,7 @@ index 000000000000..388e17922920
 +IRQCHIP_DECLARE(ms_pm_intc, "sstar,pm-intc", ms_init_pm_intc);
 diff --git a/drivers/sstar/irqchip/infinity2m/irqchip.c b/drivers/sstar/irqchip/infinity2m/irqchip.c
 new file mode 100755
-index 000000000000..e05856260678
+index 000000000000..cf578df5e816
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity2m/irqchip.c
 @@ -0,0 +1,349 @@
@@ -678469,7 +682577,7 @@ index 000000000000..e05856260678
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -678492,7 +682600,7 @@ index 000000000000..e05856260678
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -678754,7 +682862,7 @@ index 000000000000..e05856260678
 +IRQCHIP_DECLARE(ms_main_intc, "sstar,main-intc", ms_init_main_intc);
 diff --git a/drivers/sstar/irqchip/infinity3/irqchip.c b/drivers/sstar/irqchip/infinity3/irqchip.c
 new file mode 100755
-index 000000000000..96801967b1c5
+index 000000000000..31bc586a2ac1
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity3/irqchip.c
 @@ -0,0 +1,625 @@
@@ -678981,7 +683089,7 @@ index 000000000000..96801967b1c5
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -679004,7 +683112,7 @@ index 000000000000..96801967b1c5
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -679398,7 +683506,7 @@ index 000000000000..213adac5debf
 +obj-y += irqchip.o
 diff --git a/drivers/sstar/irqchip/infinity5/irqchip.c b/drivers/sstar/irqchip/infinity5/irqchip.c
 new file mode 100755
-index 000000000000..c7e17a117d09
+index 000000000000..12567ed3a67f
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity5/irqchip.c
 @@ -0,0 +1,656 @@
@@ -679638,7 +683746,7 @@ index 000000000000..c7e17a117d09
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -679661,7 +683769,7 @@ index 000000000000..c7e17a117d09
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -680755,7 +684863,7 @@ index 000000000000..02b301040a7e
 +IRQCHIP_DECLARE(ms_pm_intc, "sstar,pm-intc", ms_init_pm_intc);
 diff --git a/drivers/sstar/irqchip/infinity6/irqchip.c b/drivers/sstar/irqchip/infinity6/irqchip.c
 new file mode 100755
-index 000000000000..9ee0e4d9d90c
+index 000000000000..d0b5e42910d1
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity6/irqchip.c
 @@ -0,0 +1,341 @@
@@ -680829,7 +684937,7 @@ index 000000000000..9ee0e4d9d90c
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -680852,7 +684960,7 @@ index 000000000000..9ee0e4d9d90c
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -681773,7 +685881,7 @@ index 000000000000..7aaae27969d5
 +IRQCHIP_DECLARE(ms_pm_intc, "sstar,pm-intc", ms_init_pm_intc);
 diff --git a/drivers/sstar/irqchip/infinity6b0/irqchip.c b/drivers/sstar/irqchip/infinity6b0/irqchip.c
 new file mode 100755
-index 000000000000..9ee0e4d9d90c
+index 000000000000..d0b5e42910d1
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity6b0/irqchip.c
 @@ -0,0 +1,341 @@
@@ -681847,7 +685955,7 @@ index 000000000000..9ee0e4d9d90c
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -681870,7 +685978,7 @@ index 000000000000..9ee0e4d9d90c
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -682135,7 +686243,7 @@ index 000000000000..7d98d02768c2
 +obj-y += irq-pmsleep.o
 diff --git a/drivers/sstar/irqchip/infinity6e/irq-gpi.c b/drivers/sstar/irqchip/infinity6e/irq-gpi.c
 new file mode 100755
-index 000000000000..7d6ebde03dc6
+index 000000000000..ec1d3d7f2ce4
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity6e/irq-gpi.c
 @@ -0,0 +1,342 @@
@@ -682180,7 +686288,7 @@ index 000000000000..7d6ebde03dc6
 +#include <linux/of_irq.h>
 +#include <linux/interrupt.h>
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +/**
 + * struct ss_gpi_irq_priv - private gpi interrupt data
 + * @polarity:   fiq polarity
@@ -682405,7 +686513,7 @@ index 000000000000..7d6ebde03dc6
 +    .free       = ss_gpi_intc_domain_free,
 +};
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +static int ss_gpi_intc_suspend(void)
 +{
 +    unsigned int i, num;
@@ -682474,7 +686582,7 @@ index 000000000000..7d6ebde03dc6
 +    }
 +
 +    irq_set_chained_handler_and_data(irq, ss_handle_cascade_gpi, ss_gpi_irq_domain);
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    register_syscore_ops(&ss_gpi_intc_syscore_ops);
 +#endif
 +    return 0;
@@ -682483,7 +686591,7 @@ index 000000000000..7d6ebde03dc6
 +IRQCHIP_DECLARE(ss_gpi_intc, "sstar,gpi-intc", ss_init_gpi_intc);
 diff --git a/drivers/sstar/irqchip/infinity6e/irq-pmsleep.c b/drivers/sstar/irqchip/infinity6e/irq-pmsleep.c
 new file mode 100755
-index 000000000000..22ff84bb2c37
+index 000000000000..f108204810c9
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity6e/irq-pmsleep.c
 @@ -0,0 +1,398 @@
@@ -682539,7 +686647,7 @@ index 000000000000..22ff84bb2c37
 +#define PMGPIO_FIQ_FINAL_STATUS BIT8
 +#define PMGPIO_FIQ_RAW_STATUS   BIT9
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +#define PM_FIQ_NUM              (INT_PMSLEEP_SAR_GPIO5 - PMSLEEP_FIQ_START + 1)
 +
 +/**
@@ -682808,7 +686916,7 @@ index 000000000000..22ff84bb2c37
 +    .free       = ms_pm_intc_domain_free,
 +};
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +static int ms_pm_intc_suspend(void)
 +{
 +    unsigned int i;
@@ -682878,7 +686986,7 @@ index 000000000000..22ff84bb2c37
 +
 +    irq_set_chained_handler_and_data(irq, ms_handle_cascade_pm_irq, ms_pm_irq_domain);
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    register_syscore_ops(&ms_pm_intc_syscore_ops);
 +#endif
 +    return 0;
@@ -682887,7 +686995,7 @@ index 000000000000..22ff84bb2c37
 +IRQCHIP_DECLARE(ms_pm_intc, "sstar,pm-intc", ms_init_pm_intc);
 diff --git a/drivers/sstar/irqchip/infinity6e/irqchip.c b/drivers/sstar/irqchip/infinity6e/irqchip.c
 new file mode 100755
-index 000000000000..06e8f2192343
+index 000000000000..d0f8c4da7a9d
 --- /dev/null
 +++ b/drivers/sstar/irqchip/infinity6e/irqchip.c
 @@ -0,0 +1,389 @@
@@ -682953,7 +687061,7 @@ index 000000000000..06e8f2192343
 +/*        |_ _ _ _ _ _ _ _ _ _|                 */
 +/*                                              */
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +/**
 + * struct ms_main_irq_priv - private main interrupt data
 + * @irq_polarity:   irq polarity
@@ -682975,7 +687083,7 @@ index 000000000000..06e8f2192343
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -682998,7 +687106,7 @@ index 000000000000..06e8f2192343
 +
 +    if( ms_fiq >= 0 && ms_fiq < GIC_SPI_MS_FIQ_NR )
 +    {
-+        SETREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
++        OUTREG16( (BASE_REG_INTRCTL_PA + REG_ID_4C + (ms_fiq/16)*4 ) , (1 << (ms_fiq%16)) );
 +        INREG16(BASE_REG_MAILBOX_PA);//read a register make ensure the previous write command was compeleted
 +    }
 +    else if( ms_fiq >= GIC_SPI_MS_FIQ_NR )
@@ -683189,7 +687297,7 @@ index 000000000000..06e8f2192343
 +    .free       = ms_main_intc_domain_free,
 +};
 +
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +static int ms_irqchip_suspend(void)
 +{
 +    unsigned int i, num;
@@ -683273,7 +687381,7 @@ index 000000000000..06e8f2192343
 +        pr_err("%s: %s allocat domain fail\n", __func__, np->name);
 +        return -ENOMEM;
 +    }
-+#ifdef CONFIG_PM_SLEEP
++#if defined(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    register_syscore_ops(&ms_irq_syscore_ops);
 +#endif
 +    return 0;
@@ -683541,10 +687649,10 @@ index 000000000000..5ebabd166293
 +			   hal_ive_simulate.o
 diff --git a/drivers/sstar/ive/drv_ive.c b/drivers/sstar/ive/drv_ive.c
 new file mode 100755
-index 000000000000..96d2a1ee7100
+index 000000000000..2498f0bf1791
 --- /dev/null
 +++ b/drivers/sstar/ive/drv_ive.c
-@@ -0,0 +1,576 @@
+@@ -0,0 +1,639 @@
 +/*
 +* drv_ive.c- Sigmastar
 +*
@@ -683655,7 +687763,7 @@ index 000000000000..96d2a1ee7100
 +        IVE_MSG(IVE_MSG_DBG, "get: 0x%p, 0x%p\n", list_data, list_data->file_data);
 +        return list_data->file_data;
 +    } else {
-+        IVE_MSG(IVE_MSG_DBG, "get: 0x%p\n", list_data);
++        IVE_MSG(IVE_MSG_DBG, "list is null, get: 0x%p\n", list_data);
 +    }
 +
 +    return NULL;
@@ -683672,7 +687780,7 @@ index 000000000000..96d2a1ee7100
 + * Return:
 + *   none
 + */
-+static void drv_ive_add_request(ive_drv_handle *handle, ive_file_data *file_data)
++static int drv_ive_add_request(ive_drv_handle *handle, ive_file_data *file_data)
 +{
 +    struct platform_device *pdev = handle->pdev;
 +    ive_request_data *list_data;
@@ -683684,7 +687792,9 @@ index 000000000000..96d2a1ee7100
 +
 +    if (list_data != NULL) {
 +        list_add_tail(&list_data->list, &handle->request_list);
++        return 0;
 +    }
++    return 1;
 +}
 +
 +/*******************************************************************************************************************
@@ -684060,7 +688170,12 @@ index 000000000000..96d2a1ee7100
 +    }
 +
 +    file_data->state = IVE_FILE_STATE_IN_QUEUE;
-+    drv_ive_add_request(handle, file_data);
++    if (drv_ive_add_request(handle, file_data))
++    {
++        IVE_MSG(IVE_MSG_ERR, "Add request fail, file_data:0x%p!\n", file_data);
++        file_data->state = IVE_FILE_STATE_READY;
++        return IVE_IOC_ERROR_MEMROY_FAILURE;
++    }
 +
 +    // do nothing if hw is not ready
 +    if ((handle->dev_state != IVE_DRV_STATE_READY)
@@ -684075,7 +688190,9 @@ index 000000000000..96d2a1ee7100
 +
 +    file_data = drv_ive_get_request(handle);
 +    if (file_data == NULL) {
-+        IVE_MSG(IVE_MSG_DBG, "no more request in queue\n");
++        IVE_MSG(IVE_MSG_ERR, "no more request in queue\n");
++        file_data->state = IVE_FILE_STATE_READY;
++        handle->dev_state = IVE_DRV_STATE_READY;
 +        return IVE_IOC_ERROR_MEMROY_FAILURE;
 +    }
 +
@@ -684099,17 +688216,12 @@ index 000000000000..96d2a1ee7100
 + * Return:
 + *   IVE_IOC_ERROR
 + */
-+ive_file_data* ive_drv_post_process(ive_drv_handle *handle)
++void ive_drv_post_process(ive_drv_handle *handle)
 +{
-+    ive_file_data *previous_file_data, *next_file_data;
++    ive_file_data *next_file_data;
 +
-+    previous_file_data = drv_ive_extract_request(handle);
 +    next_file_data = drv_ive_get_request(handle);
 +
-+    if (previous_file_data != NULL) {
-+        previous_file_data->state = IVE_FILE_STATE_DONE;
-+    }
-+
 +    if (next_file_data == NULL) {
 +        IVE_MSG(IVE_MSG_DBG, "no more request in queue\n");
 +        handle->dev_state = IVE_DRV_STATE_READY;
@@ -684118,15 +688230,74 @@ index 000000000000..96d2a1ee7100
 +        next_file_data->state = IVE_FILE_STATE_PROCESSING;
 +        ive_drv_start(handle, &next_file_data->ioc_config);
 +    }
++}
++
++/*******************************************************************************************************************
++ * ive_drv_pre_process
++ *   Pre process when IVE HW done
++ *
++ * Parameters:
++ *   handle: device handle
++ *
++ * Return:
++ *   ive_file_data *
++ */
++ive_file_data* ive_drv_pre_process(ive_drv_handle *handle)
++{
++    ive_file_data *previous_file_data;
++
++    previous_file_data = drv_ive_get_request(handle);
++
++    if (previous_file_data != NULL) {
++        previous_file_data->state = IVE_FILE_STATE_DONE;
++        IVE_MSG(IVE_MSG_DBG, "previous_file_data = IVE_FILE_STATE_DONE\n");
++    }
 +
 +    return previous_file_data;
 +}
++
++/*******************************************************************************************************************
++ * ive_drv_reset
++ *   Start IVE reset
++ *
++ * Parameters:
++ *   handle: device handle
++ *
++ * Return:
++ *   void
++ */
++void ive_drv_reset(ive_drv_handle *handle)
++{
++    //struct platform_device *pdev = handle->pdev;
++
++    ive_hal_set_irq_mask(&handle->hal_handle, 0);
++
++    //Reset register
++    ive_hal_sw_reset(&handle->hal_handle);
++
++    return;
++}
++
++/*******************************************************************************************************************
++ * ive_drv_distory_process
++ *   Delete task in request list
++ *
++ * Parameters:
++ *   handle: device handle
++ *
++ * Return:
++ *   ive_file_data *
++ */
++ive_file_data* ive_drv_distory_process(ive_drv_handle *handle)
++{
++    return drv_ive_extract_request(handle);
++}
 diff --git a/drivers/sstar/ive/drv_ive.h b/drivers/sstar/ive/drv_ive.h
 new file mode 100755
-index 000000000000..f7839d7e2430
+index 000000000000..20f062e6c1be
 --- /dev/null
 +++ b/drivers/sstar/ive/drv_ive.h
-@@ -0,0 +1,33 @@
+@@ -0,0 +1,36 @@
 +/*
 +* drv_ive.h- Sigmastar
 +*
@@ -684157,7 +688328,10 @@ index 000000000000..f7839d7e2430
 +int ive_drv_init(ive_drv_handle *handle, struct platform_device *pdev, phys_addr_t base_addr0, phys_addr_t base_addr1);
 +void ive_drv_release(ive_drv_handle *handle);
 +IVE_IOC_ERROR ive_drv_process(ive_drv_handle *handle, ive_file_data *file_data);
-+ive_file_data* ive_drv_post_process(ive_drv_handle *handle);
++void ive_drv_post_process(ive_drv_handle *handle);
++ive_file_data* ive_drv_pre_process(ive_drv_handle *handle);
++void ive_drv_reset(ive_drv_handle *handle);
++ive_file_data* ive_drv_distory_process(ive_drv_handle *handle);
 +
 +#endif
 diff --git a/drivers/sstar/ive/hal_clk.c b/drivers/sstar/ive/hal_clk.c
@@ -686486,10 +690660,10 @@ index 000000000000..f71f7d011aa2
 \ No newline at end of file
 diff --git a/drivers/sstar/ive/mdrv_ive.c b/drivers/sstar/ive/mdrv_ive.c
 new file mode 100755
-index 000000000000..75014f0fdc18
+index 000000000000..93f04c84a350
 --- /dev/null
 +++ b/drivers/sstar/ive/mdrv_ive.c
-@@ -0,0 +1,846 @@
+@@ -0,0 +1,909 @@
 +/*
 +* mdrv_ive.c- Sigmastar
 +*
@@ -686779,29 +690953,55 @@ index 000000000000..75014f0fdc18
 +void mdrv_ive_drv_isr_post_proc(struct work_struct *wq)
 +{
 +    ive_dev_data  *dev_data = container_of(wq, ive_dev_data, work_queue);
-+    ive_file_data *file_data;
 +
 +    // Enter cirtical section
 +    mutex_lock(&dev_data->mutex);
 +
-+    file_data = ive_drv_post_process(&dev_data->drv_handle);
-+
 +#if !defined(CONFIG_CHIP_INFINITY2)  //Only used by I5, I6E, except infinity 2
-+    mdrv_ive_clock_dis(dev_data);
++    if (mdrv_ive_clock_en(dev_data)) {
++        IVE_MSG(IVE_MSG_ERR, "clock enable failed!\n");
++    }
 +#endif
++    // distory the previous task before start the next request
++    ive_drv_distory_process(&dev_data->drv_handle);
++
++    ive_drv_post_process(&dev_data->drv_handle);
 +
 +    // Leave critical section
 +    mutex_unlock(&dev_data->mutex);
++}
++
++//-------------------------------------------------------------------------------------------------
++// File operations
++//-------------------------------------------------------------------------------------------------
++
++void mdrv_ive_drv_isr_pre_proc(ive_dev_data  *dev_data)
++{
++    ive_file_data *file_data;
++
++    // Enter cirtical section
++    //mutex_lock(&dev_data->mutex);
++
++    file_data = ive_drv_pre_process(&dev_data->drv_handle);
++
++#if !defined(CONFIG_CHIP_INFINITY2)  //Only used by I5, I6E, except infinity 2
++    // no need to disable clk
++    if (0)
++        mdrv_ive_clock_dis(dev_data);
++#endif
++
++    // Leave critical section
++    //mutex_unlock(&dev_data->mutex);
 +
 +    if (file_data == NULL) {
 +        IVE_MSG(IVE_MSG_ERR, "isr post process get NULL of file_data!!\n");
 +        return;
 +    }
 +
-+    IVE_MSG(IVE_MSG_DBG, "post porcess 0x%p\n", &file_data->wait_queue);
++    IVE_MSG(IVE_MSG_DBG, "file_data:0x%p, post porcess 0x%p\n", file_data, &file_data->wait_queue);
 +
 +    // set ready and wake up waiting thread/process
-+    wake_up_interruptible(&file_data->wait_queue);
++    wake_up(&file_data->wait_queue);
 +}
 +
 +/*******************************************************************************************************************
@@ -686823,6 +691023,7 @@ index 000000000000..75014f0fdc18
 +    state = ive_drv_isr_handler(irq, &dev_data->drv_handle);
 +    switch(state) {
 +        case IVE_DRV_STATE_DONE:
++            mdrv_ive_drv_isr_pre_proc(dev_data);
 +            INIT_WORK(&dev_data->work_queue, mdrv_ive_drv_isr_post_proc);
 +            schedule_work(&dev_data->work_queue);
 +            return IRQ_HANDLED;
@@ -686897,7 +691098,39 @@ index 000000000000..75014f0fdc18
 +
 +    return 0;
 +}
++/*******************************************************************************************************************
++ * mdrv_ive_drv_reset_statue
++ *   reset status
++ *
++ * Parameters:
++ *   filp: pointer of file structure
++ *
++ */
++void mdrv_ive_drv_reset_statue(ive_file_data *file_data)
++{
++    ive_file_data  *previous_file_data;
++    ive_dev_data   *dev_data = file_data->dev_data;
++    ive_drv_handle *handle = &(dev_data->drv_handle);
 +
++    IVE_MSG(IVE_MSG_DBG, "Reset HW status\n");
++    mutex_lock(&dev_data->mutex);
++
++    ive_drv_reset(handle);
++
++    //Reset status
++    file_data->state = IVE_FILE_STATE_READY;
++    handle->dev_state = IVE_DRV_STATE_READY;
++
++    // distoray the previous task list from the request list
++    previous_file_data = ive_drv_distory_process(handle);
++    if (previous_file_data != file_data)
++        previous_file_data = IVE_FILE_STATE_READY;
++
++    // start the next tast list if it existed
++    ive_drv_post_process(handle);
++
++    mutex_unlock(&dev_data->mutex);
++}
 +/*******************************************************************************************************************
 + * mdrv_ive_drv_ioctl_process
 + *   IOCTL handler for IVE_IOC_PROCESS
@@ -686991,14 +691224,14 @@ index 000000000000..75014f0fdc18
 +{
 +    ive_file_data *file_data = (ive_file_data*)filp->private_data;
 +
-+    IVE_MSG(IVE_MSG_DBG, "polling 0x%p 0x%X\n", &file_data->wait_queue, file_data->state);
++    IVE_MSG(IVE_MSG_DBG, "filp: 0x%p, polling 0x%p 0x%X\n", filp, &file_data->wait_queue, file_data->state);
 +
 +    if (file_data->state == IVE_FILE_STATE_READY)
 +    {
 +        return POLLIN | POLLRDNORM;
 +    }
 +
-+    poll_wait(filp, &file_data->wait_queue, wait);
++    wait_event_timeout(file_data->wait_queue, file_data->state == IVE_FILE_STATE_DONE, msecs_to_jiffies(5000));
 +
 +    switch(file_data->state)
 +    {
@@ -687007,6 +691240,8 @@ index 000000000000..75014f0fdc18
 +            return POLLIN | POLLRDNORM;
 +
 +        default:
++            IVE_MSG(IVE_MSG_ERR, "Polling fail, start reset status. filp:0x%p\n", filp);
++            mdrv_ive_drv_reset_statue(file_data);
 +            break;
 +    }
 +
@@ -687028,7 +691263,7 @@ index 000000000000..75014f0fdc18
 +} g_ive_drv = {0, 0, 0, NULL};
 +
 +static const struct file_operations ive_fops = {
-+	.owner          = THIS_MODULE,
++    .owner          = THIS_MODULE,
 +    .open           = mdrv_ive_drv_open,
 +    .release        = mdrv_ive_drv_release,
 +    .unlocked_ioctl = mdrv_ive_drv_ioctl,
@@ -687200,10 +691435,11 @@ index 000000000000..75014f0fdc18
 + */
 +static int mdrv_ive_drv_suspend(struct platform_device *pdev, pm_message_t state)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    ive_dev_data *dev_data = dev_get_drvdata(&pdev->dev);
 +
 +    IVE_MSG(IVE_MSG_DBG, "dev_data: 0x%p\n", dev_data);
-+
++#endif
 +    return 0;
 +}
 +
@@ -687220,10 +691456,11 @@ index 000000000000..75014f0fdc18
 + */
 +static int mdrv_ive_drv_resume(struct platform_device *pdev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    ive_dev_data *dev_data = dev_get_drvdata(&pdev->dev);
 +
 +    IVE_MSG(IVE_MSG_DBG, "dev_data: 0x%p\n", dev_data);
-+
++#endif
 +    return 0;
 +}
 +
@@ -696519,10 +700756,10 @@ index 000000000000..6de740a579f0
 +#endif
 diff --git a/drivers/sstar/miu/infinity6e/mdrv_miu.c b/drivers/sstar/miu/infinity6e/mdrv_miu.c
 new file mode 100755
-index 000000000000..9d5d07fbe062
+index 000000000000..33b55896ab05
 --- /dev/null
 +++ b/drivers/sstar/miu/infinity6e/mdrv_miu.c
-@@ -0,0 +1,591 @@
+@@ -0,0 +1,592 @@
 +/*
 +* mdrv_miu.c- Sigmastar
 +*
@@ -697035,6 +701272,7 @@ index 000000000000..9d5d07fbe062
 +#ifdef CONFIG_PM_SLEEP
 +static int mstar_miu_drv_suspend(struct platform_device *dev, pm_message_t state)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    if (bMiuProtect_is_initialized)
 +    {
 +#ifdef CONFIG_MP_CMA_PATCH_DEBUG_STATIC_MIU_PROTECT
@@ -697062,7 +701300,7 @@ index 000000000000..9d5d07fbe062
 +        mmu_isr_init = 0;
 +    }
 +#endif
-+
++#endif
 +    return 0;
 +}
 +
@@ -699963,10 +704201,10 @@ index 000000000000..df0e9e44b380
 +
 diff --git a/drivers/sstar/movedma/hal_movedma.c b/drivers/sstar/movedma/hal_movedma.c
 new file mode 100755
-index 000000000000..2e58b6f4c3f8
+index 000000000000..94963e479092
 --- /dev/null
 +++ b/drivers/sstar/movedma/hal_movedma.c
-@@ -0,0 +1,291 @@
+@@ -0,0 +1,289 @@
 +/*
 +* hal_movedma.c- Sigmastar
 +*
@@ -700004,7 +704242,7 @@ index 000000000000..2e58b6f4c3f8
 +volatile KeMoveDma_t* const g_ptKeMoveDma = (KeMoveDma_t *)IO_ADDRESS(BASE_REG_MOVDMA_PA);
 +
 +static HalMoveDmaCBFunc *m_pfMdmaTxDoneCBFunc = NULL;
-+static u32 m_u32MdmaTxDoneCBArgu = 0;
++static void *m_u32MdmaTxDoneCBParm = NULL;
 +static bool m_bMdmaInited = FALSE;
 +static CamOsTsem_t  m_stMdmaSemID;
 +
@@ -700042,16 +704280,14 @@ index 000000000000..2e58b6f4c3f8
 +    intsrc = g_ptKeMoveDma->reg_dma_irq_final_status;
 +    g_ptKeMoveDma->reg_dma_irq_clr = intsrc;
 +
-+    if (intsrc & MOVEDMA_INT_MOVE0_DONE) {
-+
-+
-+        CamOsTsemUp(&m_stMdmaSemID);
-+
++    if (intsrc & MOVEDMA_INT_MOVE0_DONE)
++    {
 +        //CamOsPrintf("[MDMA] Done\r\n");
 +
 +        if (m_pfMdmaTxDoneCBFunc) {
-+            (*m_pfMdmaTxDoneCBFunc)(m_u32MdmaTxDoneCBArgu);
++            (*m_pfMdmaTxDoneCBFunc)(m_u32MdmaTxDoneCBParm);
 +        }
++        CamOsTsemUp(&m_stMdmaSemID);
 +    }
 +    else
 +    {
@@ -700127,7 +704363,7 @@ index 000000000000..2e58b6f4c3f8
 +    }
 +
 +    m_pfMdmaTxDoneCBFunc    = ptMoveDmaParam->CallBackFunc;
-+    m_u32MdmaTxDoneCBArgu   = ptMoveDmaParam->CallBackArg;
++    m_u32MdmaTxDoneCBParm   = ptMoveDmaParam->CallBackParm;
 +
 +    /* Reset DMA first */
 +    //g_ptKeMoveDma->reg_dma_mov_sw_rst = 1;
@@ -700260,7 +704496,7 @@ index 000000000000..2e58b6f4c3f8
 +
 diff --git a/drivers/sstar/movedma/hal_movedma.h b/drivers/sstar/movedma/hal_movedma.h
 new file mode 100755
-index 000000000000..7d4e807e9776
+index 000000000000..a4eb7525fcc8
 --- /dev/null
 +++ b/drivers/sstar/movedma/hal_movedma.h
 @@ -0,0 +1,108 @@
@@ -700334,7 +704570,7 @@ index 000000000000..7d4e807e9776
 +// Structure definition
 +/*=============================================================*/
 +
-+typedef void HalMoveDmaCBFunc(u32 argu);
++typedef void HalMoveDmaCBFunc(void *);
 +
 +typedef struct {
 +    u32                 u32SrcWidth;     ///< Width of source
@@ -700357,7 +704593,7 @@ index 000000000000..7d4e807e9776
 +    u32                 u32DstMiuSel;
 +    u32                 u32Count;
 +    HalMoveDmaCBFunc    *CallBackFunc;
-+    u32                 CallBackArg;
++    void                *CallBackParm;
 +    u32                 bEnLineOfst;
 +    HalMoveDmaLineOfst_t *pstLineOfst;
 +    HalMoveDmaMspi_t     *pstMspist;
@@ -704034,7 +708270,7 @@ index 000000000000..b2b54f523ff5
 +
 diff --git a/drivers/sstar/mspi/infinity6b0/hal_mspi.c b/drivers/sstar/mspi/infinity6b0/hal_mspi.c
 new file mode 100755
-index 000000000000..5d2e33fa0b44
+index 000000000000..87d1d5aeddec
 --- /dev/null
 +++ b/drivers/sstar/mspi/infinity6b0/hal_mspi.c
 @@ -0,0 +1,1063 @@
@@ -704970,7 +709206,7 @@ index 000000000000..5d2e33fa0b44
 +    tMoveDmaParam.u32DstMiuSel   = 0;
 +    tMoveDmaParam.u32Count       = (u32)u32Size;
 +    tMoveDmaParam.CallBackFunc   = NULL;
-+    tMoveDmaParam.CallBackArg    = 0;
++    tMoveDmaParam.CallBackParm   = NULL;
 +
 +    tMoveDmaMspi.u32Direction    = HAL_MOVEDMA_WR;
 +    tMoveDmaMspi.u32DeviceSelect = u8Channel;
@@ -705031,7 +709267,7 @@ index 000000000000..5d2e33fa0b44
 +    tMoveDmaParam.u32DstMiuSel   = (data_addr < ARM_MIU1_BASE_ADDR) ? (0) : (1);
 +    tMoveDmaParam.u32Count       = (u32)u32Size;
 +    tMoveDmaParam.CallBackFunc   = NULL;
-+    tMoveDmaParam.CallBackArg    = 0;
++    tMoveDmaParam.CallBackParm   = NULL;
 +
 +    tMoveDmaMspi.u32Direction    = HAL_MOVEDMA_RD;
 +    tMoveDmaMspi.u32DeviceSelect = u8Channel;
@@ -705270,7 +709506,7 @@ index 000000000000..b2b54f523ff5
 +
 diff --git a/drivers/sstar/mspi/infinity6e/hal_mspi.c b/drivers/sstar/mspi/infinity6e/hal_mspi.c
 new file mode 100755
-index 000000000000..8e21e24429b7
+index 000000000000..faf51dec19a3
 --- /dev/null
 +++ b/drivers/sstar/mspi/infinity6e/hal_mspi.c
 @@ -0,0 +1,1104 @@
@@ -706208,7 +710444,7 @@ index 000000000000..8e21e24429b7
 +    tMoveDmaParam.u32DstMiuSel   = 0;
 +    tMoveDmaParam.u32Count       = (u32)u32Size;
 +    tMoveDmaParam.CallBackFunc   = NULL;
-+    tMoveDmaParam.CallBackArg    = 0;
++    tMoveDmaParam.CallBackParm   = NULL;
 +
 +    tMoveDmaMspi.u32Direction    = HAL_MOVEDMA_WR;
 +    tMoveDmaMspi.u32DeviceSelect = u8Channel;
@@ -706269,7 +710505,7 @@ index 000000000000..8e21e24429b7
 +    tMoveDmaParam.u32DstMiuSel   = (data_addr < ARM_MIU1_BASE_ADDR) ? (0) : (1);
 +    tMoveDmaParam.u32Count       = (u32)u32Size;
 +    tMoveDmaParam.CallBackFunc   = NULL;
-+    tMoveDmaParam.CallBackArg    = 0;
++    tMoveDmaParam.CallBackParm   = NULL;
 +
 +    tMoveDmaMspi.u32Direction    = HAL_MOVEDMA_RD;
 +    tMoveDmaMspi.u32DeviceSelect = u8Channel;
@@ -710612,10 +714848,10 @@ index 000000000000..42e02577f122
 +MODULE_LICENSE("SSTAR");
 diff --git a/drivers/sstar/msys/ms_msys_dma_wrapper.c b/drivers/sstar/msys/ms_msys_dma_wrapper.c
 new file mode 100755
-index 000000000000..69f1b9ecafb0
+index 000000000000..72f73c391907
 --- /dev/null
 +++ b/drivers/sstar/msys/ms_msys_dma_wrapper.c
-@@ -0,0 +1,286 @@
+@@ -0,0 +1,304 @@
 +#include <linux/kernel.h>
 +#include <asm/uaccess.h>  /* for get_fs*/
 +#include <linux/miscdevice.h>
@@ -710637,24 +714873,23 @@ index 000000000000..69f1b9ecafb0
 +#include "cam_os_wrapper.h"
 +
 +extern struct miscdevice  sys_dev;
-+#if defined(CONFIG_MS_BDMA)
-+static CamOsTsem_t m_stBdmaDoneSem[HAL_BDMA_CH_NUM];
-+#endif
-+#if defined(CONFIG_MS_MOVE_DMA)
-+static CamOsTsem_t m_stMdmaDoneSem;
-+#endif
 +
 +#if defined(CONFIG_MS_MOVE_DMA)
-+void msys_mdma_done(u32 argu)
++void msys_mdma_done(void *Parm)
 +{
-+    CamOsTsemUp(&m_stMdmaDoneSem);
++    CamOsTsem_t *ptMdmaDoneSem = (CamOsTsem_t *)Parm;
++    CamOsTsemUp(ptMdmaDoneSem);
 +}
 +
++
 +int msys_dma_blit(MSYS_DMA_BLIT *pstMdmaCfg)
 +{
 +    HalMoveDmaParam_t       tMoveDmaParam;
 +    HalMoveDmaLineOfst_t    tMoveDmaLineOfst;
++    CamOsTsem_t             tMovedmaDoneSem;
 +
++    memset(&tMovedmaDoneSem, 0, sizeof(CamOsTsem_t));
++    CamOsTsemInit(&tMovedmaDoneSem, 0);
 +    memset(&tMoveDmaParam, 0, sizeof(HalMoveDmaParam_t));
 +    tMoveDmaParam.u32SrcAddr    = pstMdmaCfg->phyaddr_src;
 +    tMoveDmaParam.u32SrcMiuSel  = (pstMdmaCfg->phyaddr_src < ARM_MIU1_BASE_ADDR) ? (0) : (1);
@@ -710662,7 +714897,7 @@ index 000000000000..69f1b9ecafb0
 +    tMoveDmaParam.u32DstMiuSel  = (pstMdmaCfg->phyaddr_dst < ARM_MIU1_BASE_ADDR) ? (0) : (1);
 +    tMoveDmaParam.u32Count      = pstMdmaCfg->length;
 +    tMoveDmaParam.CallBackFunc  = msys_mdma_done;
-+    tMoveDmaParam.CallBackArg   = 0;
++    tMoveDmaParam.CallBackParm   = (void *)&tMovedmaDoneSem;
 +
 +
 +    if (pstMdmaCfg->lineofst_src && pstMdmaCfg->lineofst_dst)
@@ -710694,22 +714929,28 @@ index 000000000000..69f1b9ecafb0
 +        return -1;
 +    }
 +
-+    CamOsTsemDownInterruptible(&m_stMdmaDoneSem);
++    CamOsTsemDown(&tMovedmaDoneSem);
++    CamOsTsemDeinit(&tMovedmaDoneSem);
 +
 +    return 0;
 +}
 +EXPORT_SYMBOL(msys_dma_blit);
 +#endif
 +#if defined(CONFIG_MS_BDMA)
-+static void msys_bdma_done(u32 u32DmaCh)
++static void msys_bdma_done(void *Parm)
 +{
-+    CamOsTsemUp(&m_stBdmaDoneSem[u32DmaCh]);
++    CamOsTsem_t *ptBdmaDoneSem = (CamOsTsem_t *)Parm;
++    CamOsTsemUp(ptBdmaDoneSem);
 +}
 +
 +int msys_dma_fill(MSYS_DMA_FILL *pstDmaCfg)
 +{
 +    HalBdmaParam_t  tBdmaParam;
 +    u8              u8DmaCh = HAL_BDMA_CH1;
++    CamOsTsem_t     tBdmaDoneSem;
++
++    memset(&tBdmaDoneSem, 0, sizeof(CamOsTsem_t));
++    CamOsTsemInit(&tBdmaDoneSem, 0);
 +    memset(&tBdmaParam, 0, sizeof(HalBdmaParam_t));
 +    tBdmaParam.ePathSel     = (pstDmaCfg->phyaddr < ARM_MIU1_BASE_ADDR) ? (HAL_BDMA_MEM_TO_MIU0) : (HAL_BDMA_MEM_TO_MIU1);
 +    tBdmaParam.bIntMode     = 1;
@@ -710718,6 +714959,7 @@ index 000000000000..69f1b9ecafb0
 +    tBdmaParam.pSrcAddr     = (void*)0;
 +    tBdmaParam.pDstAddr     = (pstDmaCfg->phyaddr < ARM_MIU1_BASE_ADDR) ? (void *)((U32)pstDmaCfg->phyaddr) : (void *)((U32)pstDmaCfg->phyaddr - ARM_MIU1_BASE_ADDR);
 +    tBdmaParam.pfTxCbFunc   = msys_bdma_done;
++    tBdmaParam.pTxCbParm    = (void *)&tBdmaDoneSem;
 +    tBdmaParam.u32Pattern   = pstDmaCfg->pattern;
 +
 +    if (HAL_BDMA_PROC_DONE != HalBdma_Transfer(u8DmaCh, &tBdmaParam)) {
@@ -710725,8 +714967,9 @@ index 000000000000..69f1b9ecafb0
 +    }
 +
 +    if (tBdmaParam.bIntMode) {
-+        CamOsTsemDownInterruptible(&m_stBdmaDoneSem[u8DmaCh]);
++        CamOsTsemDown(&tBdmaDoneSem);
 +    }
++    CamOsTsemDeinit(&tBdmaDoneSem);
 +
 +    return 0;
 +}
@@ -710740,6 +714983,10 @@ index 000000000000..69f1b9ecafb0
 +#else
 +    u8              u8DmaCh = HAL_BDMA_CH2;
 +#endif
++    CamOsTsem_t     tBdmaDoneSem;
++
++    memset(&tBdmaDoneSem, 0, sizeof(CamOsTsem_t));
++    CamOsTsemInit(&tBdmaDoneSem, 0);
 +    memset(&tBdmaParam, 0, sizeof(HalBdmaParam_t));
 +    tBdmaParam.ePathSel     = ((U32)cfg->phyaddr_src < ARM_MIU1_BASE_ADDR) ? (HAL_BDMA_MIU0_TO_MIU0) : (HAL_BDMA_MIU1_TO_MIU0);
 +    tBdmaParam.ePathSel     = ((U32)cfg->phyaddr_dst < ARM_MIU1_BASE_ADDR) ? tBdmaParam.ePathSel : tBdmaParam.ePathSel+1;
@@ -710749,6 +714996,7 @@ index 000000000000..69f1b9ecafb0
 +    tBdmaParam.eDstAddrMode = HAL_BDMA_ADDR_INC;
 +    tBdmaParam.u32TxCount   = cfg->length;
 +    tBdmaParam.pfTxCbFunc   = msys_bdma_done;
++    tBdmaParam.pTxCbParm    = (void *)&tBdmaDoneSem;
 +    tBdmaParam.u32Pattern   = 0;
 +
 +    if (HAL_BDMA_PROC_DONE != HalBdma_Transfer(u8DmaCh, &tBdmaParam)) {
@@ -710756,8 +715004,9 @@ index 000000000000..69f1b9ecafb0
 +    }
 +
 +    if (tBdmaParam.bIntMode) {
-+        CamOsTsemDownInterruptible(&m_stBdmaDoneSem[u8DmaCh]);
++        CamOsTsemDown(&tBdmaDoneSem);
 +    }
++    CamOsTsemDeinit(&tBdmaDoneSem);
 +
 +    return 0;
 +}
@@ -710769,7 +715018,10 @@ index 000000000000..69f1b9ecafb0
 +    HalBdmaParam_t  tBdmaParam;
 +    HalBdmaLineOfst_t tBdmaLineOfst;
 +    u8              u8DmaCh = HAL_BDMA_CH1;
++    CamOsTsem_t     tBdmaDoneSem;
 +
++    memset(&tBdmaDoneSem, 0, sizeof(CamOsTsem_t));
++    CamOsTsemInit(&tBdmaDoneSem, 0);
 +    memset(&tBdmaParam, 0, sizeof(HalBdmaParam_t));
 +    memset(&tBdmaLineOfst, 0, sizeof(HalBdmaLineOfst_t));
 +    tBdmaParam.ePathSel     = (pstDmaCfg->phyaddr < ARM_MIU1_BASE_ADDR) ? (HAL_BDMA_MEM_TO_MIU0) : (HAL_BDMA_MEM_TO_MIU1);
@@ -710779,6 +715031,7 @@ index 000000000000..69f1b9ecafb0
 +    tBdmaParam.pSrcAddr     = (void*)0;
 +    tBdmaParam.pDstAddr     = (pstDmaCfg->phyaddr < ARM_MIU1_BASE_ADDR) ? (void *)((U32)pstDmaCfg->phyaddr) : (void *)((U32)pstDmaCfg->phyaddr - ARM_MIU1_BASE_ADDR);
 +    tBdmaParam.pfTxCbFunc   = msys_bdma_done;
++    tBdmaParam.pTxCbParm    = (void *)&tBdmaDoneSem;
 +    tBdmaParam.u32Pattern   = pstDmaCfg->pattern;
 +
 +    if (pstDmaCfg->lineofst_dst)
@@ -710810,8 +715063,9 @@ index 000000000000..69f1b9ecafb0
 +    }
 +
 +    if (tBdmaParam.bIntMode) {
-+        CamOsTsemDownInterruptible(&m_stBdmaDoneSem[u8DmaCh]);
++        CamOsTsemDown(&tBdmaDoneSem);
 +    }
++    CamOsTsemDeinit(&tBdmaDoneSem);
 +
 +    return 0;
 +}
@@ -710826,7 +715080,10 @@ index 000000000000..69f1b9ecafb0
 +#else
 +    u8              u8DmaCh = HAL_BDMA_CH2;
 +#endif
++    CamOsTsem_t     tBdmaDoneSem;
 +
++    memset(&tBdmaDoneSem, 0, sizeof(CamOsTsem_t));
++    CamOsTsemInit(&tBdmaDoneSem, 0);
 +    memset(&tBdmaParam, 0, sizeof(HalBdmaParam_t));
 +    memset(&tBdmaLineOfst, 0, sizeof(HalBdmaLineOfst_t));
 +    tBdmaParam.ePathSel     = ((U32)cfg->phyaddr_src < ARM_MIU1_BASE_ADDR) ? (HAL_BDMA_MIU0_TO_MIU0) : (HAL_BDMA_MIU1_TO_MIU0);
@@ -710837,6 +715094,7 @@ index 000000000000..69f1b9ecafb0
 +    tBdmaParam.eDstAddrMode = HAL_BDMA_ADDR_INC;
 +    tBdmaParam.u32TxCount   = cfg->length;
 +    tBdmaParam.pfTxCbFunc   = msys_bdma_done;
++    tBdmaParam.pTxCbParm    = (void *)&tBdmaDoneSem;
 +    tBdmaParam.u32Pattern   = 0;
 +
 +    if (cfg->lineofst_src && cfg->lineofst_dst)
@@ -710869,8 +715127,9 @@ index 000000000000..69f1b9ecafb0
 +    }
 +
 +    if (tBdmaParam.bIntMode) {
-+        CamOsTsemDownInterruptible(&m_stBdmaDoneSem[u8DmaCh]);
++        CamOsTsemDown(&tBdmaDoneSem);
 +    }
++    CamOsTsemDeinit(&tBdmaDoneSem);
 +
 +    return 0;
 +}
@@ -710883,16 +715142,11 @@ index 000000000000..69f1b9ecafb0
 +static int __init ms_msys_dma_wrapper_init(void)
 +{
 +#if defined(CONFIG_MS_MOVE_DMA)
-+    CamOsTsemInit(&m_stMdmaDoneSem, 0);
 +
 +    HalMoveDma_Initialize();
 +#endif
 +
 +#if defined(CONFIG_MS_BDMA)
-+    CamOsTsemInit(&m_stBdmaDoneSem[0], 0);
-+    CamOsTsemInit(&m_stBdmaDoneSem[1], 0);
-+    CamOsTsemInit(&m_stBdmaDoneSem[2], 0);
-+    CamOsTsemInit(&m_stBdmaDoneSem[3], 0);
 +
 +    //HalBdma_Initialize(0);
 +    HalBdma_Initialize(1);
@@ -714165,10 +718419,10 @@ index 000000000000..8156e5159cc7
 +
 diff --git a/drivers/sstar/netphy/sstar_100_phy.c b/drivers/sstar/netphy/sstar_100_phy.c
 new file mode 100755
-index 000000000000..ce70251d6582
+index 000000000000..761080718669
 --- /dev/null
 +++ b/drivers/sstar/netphy/sstar_100_phy.c
-@@ -0,0 +1,409 @@
+@@ -0,0 +1,419 @@
 +#include <linux/phy.h>
 +#include <linux/module.h>
 +#include <linux/delay.h>
@@ -714304,6 +718558,7 @@ index 000000000000..ce70251d6582
 +    u32 hcd_link_st_ok = 0;
 +    u32 phy_speed = 0;
 +    u32 detect_100m = 0;
++    u32 link_partner = 0;
 +
 +    if (0 == phydev->link)
 +    {
@@ -714317,6 +718572,8 @@ index 000000000000..ce70251d6582
 +        return 0;
 +    if (0xffff == (detect_100m = phy_read(phydev, 0x22)))
 +        return 0;
++    if (0xffff == (link_partner = phy_read(phydev, 0x05)))
++        return 0;
 +
 +    if( !(hcd_link_st_ok & 0x100) )
 +    {
@@ -714324,10 +718581,17 @@ index 000000000000..ce70251d6582
 +        return 0;
 +    }
 +
-+    if ( !(phy_speed & 0x2000) && (detect_100m & 0x20) )
++    if ( !(phy_speed & 0x2000) && (detect_100m & 0x20) ) // in 10M case, but 100M signal
 +    {
-+        NETPHY_PRINT("[%s][%d] speed change 10 -> 100\n", __FUNCTION__, __LINE__);
-+        phy_write((phydev),  MII_BMCR, 0x1200);
++        if(link_partner & 0x180) // link partner ability 100M
++        {
++            NETPHY_PRINT("[%s][%d] speed change 10 -> 100\n", __FUNCTION__, __LINE__);
++            phy_write((phydev),  MII_BMCR, 0x1200); // auto negotiation
++        }
++        else
++        {
++            // do nothing
++        }
 +    }
 +
 +    if (phy_speed & 0x2000)
@@ -742902,10 +747166,10 @@ index 000000000000..532975c0d678
 +# obj-$(CONFIG_MS_SW_I2C) += ms_gpioi2c.o mdrv_sw_iic.o
 diff --git a/drivers/sstar/padmux/mdrv_padmux.c b/drivers/sstar/padmux/mdrv_padmux.c
 new file mode 100755
-index 000000000000..e7870dfb2f5c
+index 000000000000..8ce4b838ded2
 --- /dev/null
 +++ b/drivers/sstar/padmux/mdrv_padmux.c
-@@ -0,0 +1,200 @@
+@@ -0,0 +1,204 @@
 +/*
 +* mdrv_padmux.c- Sigmastar
 +*
@@ -743051,18 +747315,22 @@ index 000000000000..e7870dfb2f5c
 +#ifdef CONFIG_PM
 +static int sstar_padmux_suspend(struct device *dev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    PAD_PRINT("%s\r\n", __FUNCTION__);
 +    if (_pPadInfo) {
 +        kfree(_pPadInfo);
 +        _pPadInfo = NULL;
 +    }
++#endif
 +    return 0;
 +}
 +
 +static int sstar_padmux_resume(struct device *dev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    PAD_PRINT("%s\r\n", __FUNCTION__);
 +    _mdrv_padmux_dts(dev->of_node);
++#endif
 +    return 0;
 +}
 +#else
@@ -751665,10 +755933,10 @@ index 000000000000..3a09b45638bd
 +#endif  //__PWM_H
 diff --git a/drivers/sstar/pwm/mdrv_pwm.c b/drivers/sstar/pwm/mdrv_pwm.c
 new file mode 100755
-index 000000000000..8461646baa20
+index 000000000000..23f232e3bbf0
 --- /dev/null
 +++ b/drivers/sstar/pwm/mdrv_pwm.c
-@@ -0,0 +1,700 @@
+@@ -0,0 +1,704 @@
 +/*
 +* mdrv_pwm.c- Sigmastar
 +*
@@ -752324,18 +756592,22 @@ index 000000000000..8461646baa20
 +
 +static int infinity_pwm_resume(struct platform_device *pdev)
 +{
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    int i = 0;
++#endif
 +    struct mstar_pwm_chip *pwm = platform_get_drvdata(pdev);
 +
 +    pr_debug("[PWM] resume\n");
 +    if (pwm && pwm->clk) {
 +        clk_prepare_enable(pwm->clk);
 +    }
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +    for(i=0; i<pwm->chip.npwm; i++)
 +    {
 +        DrvPWMInit(pwm, i);
 +        // MS_PWM_DBG("ms_pwm->pad_ctrl[%d]=%d\n", i, ms_pwm->pad_ctrl[i]);
 +    }
++#endif
 +    if (pwm->irq) {
 +        enable_irq(pwm->irq);
 +    }
@@ -779375,11 +783647,11 @@ index 000000000000..a7d93b49368b
 +    return ret;
 +}
 diff --git a/drivers/sstar/serial/ms_uart.c b/drivers/sstar/serial/ms_uart.c
-new file mode 100755
-index 000000000000..86657b846fe8
+new file mode 100644
+index 000000000000..e6ffdbfae84d
 --- /dev/null
 +++ b/drivers/sstar/serial/ms_uart.c
-@@ -0,0 +1,2848 @@
+@@ -0,0 +1,2846 @@
 +/*
 +* ms_uart.c- Sigmastar
 +*
@@ -781054,7 +785326,7 @@ index 000000000000..86657b846fe8
 +static void serial8250_backup_timeout(unsigned long data)
 +{
 +    struct ms_uart_port *up = (struct ms_uart_port *)data;
-+    u16 iir, ier = 0, lsr;
++    u16 iir, ier, lsr;
 +    unsigned long flags;
 +
 +    spin_lock_irqsave(&up->port.lock, flags);
@@ -781069,9 +785341,8 @@ index 000000000000..86657b846fe8
 +     * ia64 and parisc boxes.
 +     */
 +    lsr = INREG8(REG_LSR((&up->port)));;
-+    if ((iir & UART_IIR_NO_INT) && (ier & UART_IER_THRI) &&
-+            (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
-+            (lsr & UART_LSR_THRE)) {
++    if ((iir & UART_IIR_NO_INT) && (ier & UART_IER_THRI) && (lsr & UART_LSR_TEMT))
++    {
 +        CLRREG8(REG_DLH_IER((&up->port)), UART_IER_THRI | UART_IER_PTHRI);
 +        SETREG8(REG_DLH_IER((&up->port)), UART_IER_THRI | UART_IER_PTHRI);
 +        gu32_console_bug_thre_hits++;
@@ -781170,7 +785441,7 @@ index 000000000000..86657b846fe8
 +    ms_select_pad(p, mp->padmux, mp->pad_mode);
 +#endif
 +#if MS_UART_8250_BUG_THRE
-+    mp->bugs = UART_BUG_THRE;
++    mp->bugs = (mp->use_dma) ? 0 : UART_BUG_THRE;
 +#endif
 +    /*
 +     * [PATCH] from drivers/tty/serial/8250/8250_core.c
@@ -781240,7 +785511,6 @@ index 000000000000..86657b846fe8
 +    u16 divisor = 0;
 +    u32 baudrate = 0;
 +    u32 sctp_enable = 0;
-+
 +    //OUTREG8(REG_DLH_IER(p), 0);
 +
 +    if(p->dev)
@@ -793165,10 +797435,10 @@ index 000000000000..32653b8e9ad7
 +                     hal/$(CONFIG_SSTAR_CHIP_NAME)/mhal_spinand_chip_config.o
 diff --git a/drivers/sstar/spinand/drv/inc/mdrv_spinand_command.h b/drivers/sstar/spinand/drv/inc/mdrv_spinand_command.h
 new file mode 100755
-index 000000000000..96e342ba5a5d
+index 000000000000..ff417edc95d1
 --- /dev/null
 +++ b/drivers/sstar/spinand/drv/inc/mdrv_spinand_command.h
-@@ -0,0 +1,82 @@
+@@ -0,0 +1,94 @@
 +/*
 +* mdrv_spinand_command.h- Sigmastar
 +*
@@ -793242,6 +797512,7 @@ index 000000000000..96e342ba5a5d
 +                #define ECC_STATUS_PASS          (0x00 << 4)
 +                #define ECC_STATUS_BITFLIP       (0x01 << 4)
 +                #define ECC_STATUS_ERR           (0x02 << 4)
++                #define ECC_STATUS_3BIT          (0x07 << 4)
 +                #define SPI_NAND_STAT_OIP        (0x01 << 0)
 +#define SPI_NAND_REG_FUT                         0xD0
 +
@@ -793250,6 +797521,17 @@ index 000000000000..96e342ba5a5d
 +#define SPI_NAND_PLANE_OFFSET                    6
 +#define SPI_PLANE_ADDR_MASK                      0x40
 +
++typedef enum
++{
++    ECC_STATUS_3BIT_PASS = 0x0 << 4,
++    ECC_STATUS_3BIT_1BITFLIP = 0x1 << 4,
++    ECC_STATUS_3BIT_2BITFLIP = 0x2 << 4,
++    ECC_STATUS_3BIT_3BITFLIP = 0x3 << 4,
++    ECC_STATUS_3BIT_4BITFLIP = 0x4 << 4,
++    ECC_STATUS_3BIT_ERR = 0x7 << 4,
++} SPINAND_ECC_STATUS_3BIT;
++
++
 +#endif
 diff --git a/drivers/sstar/spinand/drv/inc/mdrv_spinand_common.h b/drivers/sstar/spinand/drv/inc/mdrv_spinand_common.h
 new file mode 100755
@@ -794791,10 +799073,10 @@ index 000000000000..d14a91930f01
 +#endif
 diff --git a/drivers/sstar/spinand/drv/mdrv_spinand_hal.c b/drivers/sstar/spinand/drv/mdrv_spinand_hal.c
 new file mode 100755
-index 000000000000..870454a3e4e8
+index 000000000000..e552e699a444
 --- /dev/null
 +++ b/drivers/sstar/spinand/drv/mdrv_spinand_hal.c
-@@ -0,0 +1,542 @@
+@@ -0,0 +1,576 @@
 +/*
 +* mdrv_spinand_hal.c- Sigmastar
 +*
@@ -795083,6 +799365,7 @@ index 000000000000..870454a3e4e8
 +    U8 u8Status;
 +    U32 u32Ret = ERR_SPINAND_SUCCESS;
 +    U16 u16ColumnAddr = 0;
++    SPI_NAND_DRIVER_t *pSpiNandDrv = (SPI_NAND_DRIVER_t*)drvSPINAND_get_DrvContext_address();
 +
 +    MS_ASSERT( MS_SPINAND_IN_INTERRUPT() == FALSE );
 +    if (FALSE == MS_SPINAND_OBTAIN_MUTEX(_s32SPINAND_Mutex, SPINAND_MUTEX_WAIT_TIME))
@@ -795132,14 +799415,30 @@ index 000000000000..870454a3e4e8
 +
 +    if (u32Ret == ERR_SPINAND_SUCCESS)
 +    {
-+        if (u8Status & ECC_STATUS_ERR)
++        if((pSpiNandDrv->tSpinandInfo.au8_ID[0] == 0xA1) &&
++           (pSpiNandDrv->tSpinandInfo.au8_ID[1] == 0xF1))
 +        {
-+            u32Ret = ERR_SPINAND_ECC_ERROR;
-+            printk("ecc error P: %lx\r\n", u32_PageIdx);
++            if ((u8Status & ECC_STATUS_3BIT) == ECC_STATUS_3BIT_ERR)
++            {
++                u32Ret = ERR_SPINAND_ECC_ERROR;
++                printk("ecc error P: 0x%lx\r\n", u32_PageIdx);
++            }
++            else if ((u8Status & ECC_STATUS_3BIT) != ECC_STATUS_3BIT_PASS)
++            {
++                u32Ret = ERR_SPINAND_ECC_BITFLIP;
++            }
 +        }
-+        else if (u8Status & ECC_STATUS_BITFLIP)
++        else
 +        {
-+            u32Ret = ERR_SPINAND_ECC_BITFLIP;
++            if (u8Status & ECC_STATUS_ERR)
++            {
++                u32Ret = ERR_SPINAND_ECC_ERROR;
++                printk("ecc error P: %lx\r\n", u32_PageIdx);
++            }
++            else if (u8Status & ECC_STATUS_BITFLIP)
++            {
++                u32Ret = ERR_SPINAND_ECC_BITFLIP;
++            }
 +        }
 +    }
 +
@@ -795163,6 +799462,7 @@ index 000000000000..870454a3e4e8
 +{
 +    U8 u8Status;
 +    U32 u32Ret = ERR_SPINAND_SUCCESS;
++    SPI_NAND_DRIVER_t *pSpiNandDrv = (SPI_NAND_DRIVER_t*)drvSPINAND_get_DrvContext_address();
 +
 +    MS_ASSERT( MS_SPINAND_IN_INTERRUPT() == FALSE );
 +    if (FALSE == MS_SPINAND_OBTAIN_MUTEX(_s32SPINAND_Mutex, SPINAND_MUTEX_WAIT_TIME))
@@ -795191,14 +799491,30 @@ index 000000000000..870454a3e4e8
 +
 +    if (u32Ret == ERR_SPINAND_SUCCESS)
 +    {
-+        if (u8Status & ECC_STATUS_ERR)
++        if ((pSpiNandDrv->tSpinandInfo.au8_ID[0] == 0xA1) &&
++            (pSpiNandDrv->tSpinandInfo.au8_ID[1] == 0xF1))
 +        {
-+            u32Ret = ERR_SPINAND_ECC_ERROR;
-+            printk("ecc error P: %lx\r\n", u32_PageIdx);
++            if ((u8Status & ECC_STATUS_3BIT) == ECC_STATUS_3BIT_ERR)
++            {
++                u32Ret = ERR_SPINAND_ECC_ERROR;
++                printk("ecc error P: 0x%lx\r\n", u32_PageIdx);
++            }
++            else if ((u8Status & ECC_STATUS_3BIT) != ECC_STATUS_3BIT_PASS)
++            {
++                u32Ret = ERR_SPINAND_ECC_BITFLIP;
++            }
 +        }
-+        else if (u8Status & ECC_STATUS_BITFLIP)
++        else
 +        {
-+            u32Ret = ERR_SPINAND_ECC_BITFLIP;
++            if (u8Status & ECC_STATUS_ERR)
++            {
++                u32Ret = ERR_SPINAND_ECC_ERROR;
++                printk("ecc error P: %lx\r\n", u32_PageIdx);
++            }
++            else if (u8Status & ECC_STATUS_BITFLIP)
++            {
++                u32Ret = ERR_SPINAND_ECC_BITFLIP;
++            }
 +        }
 +    }
 +
@@ -803894,10 +808210,10 @@ index 000000000000..10b6ba4472b8
 +#endif
 diff --git a/drivers/sstar/usb/gadget/udc/usb20/include/infinity6b0/msb250x_udc_common.h b/drivers/sstar/usb/gadget/udc/usb20/include/infinity6b0/msb250x_udc_common.h
 new file mode 100644
-index 000000000000..10b6ba4472b8
+index 000000000000..076600f5dd43
 --- /dev/null
 +++ b/drivers/sstar/usb/gadget/udc/usb20/include/infinity6b0/msb250x_udc_common.h
-@@ -0,0 +1,65 @@
+@@ -0,0 +1,73 @@
 +#ifndef MSB250X_MEMORY_H
 +#define MSB250X_MEMORY_H
 +
@@ -803929,7 +808245,9 @@ index 000000000000..10b6ba4472b8
 +            .name = ep0name,                                                        \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL),     \
++            .maxpacket_limit = 64,                                                  \
 +        },                                                                          \
++        .fifo_size = 64,                                                            \
 +        .dev = _dev,                                                                \
 +    },                                                                              \
 +    .ep[1] = {                                                                      \
@@ -803937,7 +808255,9 @@ index 000000000000..10b6ba4472b8
 +            .name = "ep1",                                                          \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL),         \
++            .maxpacket_limit = 1024,                                                \
 +        },                                                                          \
++        .fifo_size = 8192,                                                          \
 +        .dev = _dev,                                                                \
 +    },                                                                              \
 +    .ep[2] = {                                                                      \
@@ -803945,7 +808265,9 @@ index 000000000000..10b6ba4472b8
 +            .name = "ep2",                                                          \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL),         \
++            .maxpacket_limit = 1024,                                                \
 +        },                                                                          \
++        .fifo_size = 1024,                                                          \
 +        .dev = _dev,                                                                \
 +    },                                                                              \
 +    .ep[3] = {                                                                      \
@@ -803953,7 +808275,9 @@ index 000000000000..10b6ba4472b8
 +            .name = "ep3",                                                          \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL),         \
++            .maxpacket_limit = 64,                                                  \
 +        },                                                                          \
++        .fifo_size = 64,                                                            \
 +        .dev = _dev,                                                                \
 +    }
 +
@@ -803965,10 +808289,10 @@ index 000000000000..10b6ba4472b8
 +#endif
 diff --git a/drivers/sstar/usb/gadget/udc/usb20/include/infinity6e/msb250x_udc_common.h b/drivers/sstar/usb/gadget/udc/usb20/include/infinity6e/msb250x_udc_common.h
 new file mode 100755
-index 000000000000..840de2625766
+index 000000000000..4cf86abf9e56
 --- /dev/null
 +++ b/drivers/sstar/usb/gadget/udc/usb20/include/infinity6e/msb250x_udc_common.h
-@@ -0,0 +1,69 @@
+@@ -0,0 +1,77 @@
 +#ifndef MSB250X_MEMORY_H
 +#define MSB250X_MEMORY_H
 +
@@ -804004,7 +808328,9 @@ index 000000000000..840de2625766
 +            .name = ep0name,                                                        \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL),     \
++            .maxpacket_limit = 64,                                                  \
 +        },                                                                          \
++        .fifo_size = 64,                                                            \
 +        .dev = _dev,                                                                \
 +    },                                                                              \
 +    .ep[1] = {                                                                      \
@@ -804012,7 +808338,9 @@ index 000000000000..840de2625766
 +            .name = "ep1",                                                          \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL),         \
++            .maxpacket_limit = 1024,                                                \
 +        },                                                                          \
++        .fifo_size = 8192,                                                          \
 +        .dev = _dev,                                                                \
 +    },                                                                              \
 +    .ep[2] = {                                                                      \
@@ -804020,7 +808348,9 @@ index 000000000000..840de2625766
 +            .name = "ep2",                                                          \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL),         \
++            .maxpacket_limit = 1024,                                                \
 +        },                                                                          \
++        .fifo_size = 1024,                                                          \
 +        .dev = _dev,                                                                \
 +    },                                                                              \
 +    .ep[3] = {                                                                      \
@@ -804028,7 +808358,9 @@ index 000000000000..840de2625766
 +            .name = "ep3",                                                          \
 +            .ops = _ep_op,                                                          \
 +            .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL),         \
++            .maxpacket_limit = 64,                                                  \
 +        },                                                                          \
++        .fifo_size = 64,                                                            \
 +        .dev = _dev,                                                                \
 +    }
 +
@@ -804232,10 +808564,10 @@ index 000000000000..42c5c374d206
 \ No newline at end of file
 diff --git a/drivers/sstar/usb/gadget/udc/usb20/include/msb250x_udc.h b/drivers/sstar/usb/gadget/udc/usb20/include/msb250x_udc.h
 new file mode 100755
-index 000000000000..535420dc64fc
+index 000000000000..c75bfb93f649
 --- /dev/null
 +++ b/drivers/sstar/usb/gadget/udc/usb20/include/msb250x_udc.h
-@@ -0,0 +1,169 @@
+@@ -0,0 +1,170 @@
 +/* SigmaStar trade secret */
 +/*
 +* msb250x_udc.h- Sigmastar
@@ -804349,6 +808681,7 @@ index 000000000000..535420dc64fc
 +    unsigned req_pending : 1;
 +    unsigned soft_conn : 1;
 +    unsigned using_dma : 1;
++    void *zlp_buf;
 +};
 +
 +/* --------------------- container_of ops ----------------------------------*/
@@ -805307,10 +809640,10 @@ index 000000000000..09d70bf43de7
 +EXPORT_SYMBOL(msb250x_dma_isr_handler);
 diff --git a/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_ep.c b/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_ep.c
 new file mode 100755
-index 000000000000..10e71c9e03f9
+index 000000000000..0ba76ffedbd1
 --- /dev/null
 +++ b/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_ep.c
-@@ -0,0 +1,1153 @@
+@@ -0,0 +1,1184 @@
 +#include <linux/delay.h>
 +#include "msb250x_udc_reg.h"
 +#include "msb250x_udc.h"
@@ -805778,6 +810111,7 @@ index 000000000000..10e71c9e03f9
 +        return;
 +
 +    WARN_ON (!list_empty (&req->queue));
++
 +    kfree(req);
 +}
 +EXPORT_SYMBOL(msb250x_ep_free_request);
@@ -805800,14 +810134,16 @@ index 000000000000..10e71c9e03f9
 ++--------------------+---+---+-------------------------------------------------
 +*/
 +
-+int msb250x_ep_queue(struct usb_ep *_ep,
-+                     struct usb_request *_req,
-+                     gfp_t gfp_flags)
++static void msb250x_zlp_complete(struct usb_ep *ep, struct usb_request *req)
++{
++	msb250x_ep_free_request(ep, req);
++}
++
++int __msb250x_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
 +{
 +    struct msb250x_request* req = to_msb250x_req(_req);
 +    struct msb250x_ep* ep = to_msb250x_ep(_ep);
 +    struct msb250x_udc* dev = NULL;
-+    unsigned long flags;
 +
 +    if (unlikely (!_ep || (!_ep->desc && ep->ep.name != ep0name)))
 +    {
@@ -805822,21 +810158,21 @@ index 000000000000..10e71c9e03f9
 +        return -ESHUTDOWN;
 +    }
 +
-+    spin_lock_irqsave(&dev->lock, flags);//local_irq_save (flags);
-+
-+    if (unlikely(!_req || !_req->complete || !_req->buf || !list_empty(&req->queue)))
++    if (_req->length)
 +    {
-+        if (!_req)
-+            printk("%s: 1 X X X\n", __FUNCTION__);
-+        else
++        if (unlikely(!_req || !_req->complete || !_req->buf || !list_empty(&req->queue)))
 +        {
-+            printk("%s: 0 %01d %01d %01d\n",
-+                __FUNCTION__, !_req->complete,!_req->buf,
-+                !list_empty(&req->queue));
-+        }
++            if (!_req)
++                printk("%s: 1 X X X\n", __FUNCTION__);
++            else
++            {
++                printk("%s: 0 %01d %01d %01d\n",
++                    __FUNCTION__, !_req->complete,!_req->buf,
++                    !list_empty(&req->queue));
++            }
 +
-+        spin_unlock_irqrestore(&dev->lock,flags);//local_irq_restore(flags);
-+        return -EINVAL;
++            return -EINVAL;
++        }
 +    }
 +
 +    _req->status = -EINPROGRESS;
@@ -805857,10 +810193,34 @@ index 000000000000..10e71c9e03f9
 +        list_add_tail(&req->queue, &ep->queue);
 +    }
 +
-+    spin_unlock_irqrestore(&dev->lock,flags);//local_irq_restore(flags);
-+
 +    return 0;
++}
 +
++int msb250x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
++{
++    struct msb250x_ep* ep = to_msb250x_ep(_ep);
++    struct msb250x_udc* dev = NULL;
++    unsigned long flags;
++    struct usb_request *zlp_req;
++    int ret;
++
++    dev = ep->dev;
++    spin_lock_irqsave(&dev->lock, flags);
++
++    ret = __msb250x_ep_queue(_ep, _req);
++
++    if (ret == 0 && _req && _req->zero && _req->length && (_req->length % _ep->maxpacket == 0))
++    {
++        zlp_req = msb250x_ep_alloc_request(_ep, gfp_flags);
++        zlp_req->length = 0;
++        zlp_req->complete = msb250x_zlp_complete;
++        zlp_req->buf = dev->zlp_buf;
++        ret = __msb250x_ep_queue(_ep, zlp_req);
++    }
++
++    spin_unlock_irqrestore(&dev->lock,flags);
++
++    return ret;
 +}
 +EXPORT_SYMBOL(msb250x_ep_queue);
 +
@@ -806012,9 +810372,13 @@ index 000000000000..10e71c9e03f9
 +            }
 +            else
 +            {
-+                txcsr_l->bClrDataTog = 1;
++                /*txcsr_l->bClrDataTog = 1;*/
++		if (txcsr_l->bTxPktRdy)
++		{
++			txcsr_l->bFlushFIFO = 1;
++		}
 +                ms_writeb(csr, MSB250X_OTG0_EP_TXCSR1_REG(ep_num));
-+                ms_writeb(0, MSB250X_OTG0_EP_TXCSR1_REG(ep_num));
++                /*ms_writeb(0, MSB250X_OTG0_EP_TXCSR1_REG(ep_num));*/
 +
 +                if (0 == txcsr_l->bTxPktRdy)
 +                {
@@ -806466,10 +810830,10 @@ index 000000000000..10e71c9e03f9
 +
 diff --git a/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_gadget.c b/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_gadget.c
 new file mode 100755
-index 000000000000..69b96803e529
+index 000000000000..c51b76126e03
 --- /dev/null
 +++ b/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_gadget.c
-@@ -0,0 +1,325 @@
+@@ -0,0 +1,351 @@
 +/*------------------------- usb_gadget_ops ----------------------------------*/
 +#include <linux/delay.h>
 +#include <linux/dma-mapping.h>
@@ -806495,7 +810859,7 @@ index 000000000000..69b96803e529
 +    int ret = usb_gadget_map_request(gadget, req, is_in);
 +    dma_addr_t __dma = req->dma;
 +
-+    if (is_in)
++    if (is_in && req->length)
 +    {
 +        dma_sync_single_for_device(gadget->dev.parent, req->dma, req->length, DMA_TO_DEVICE);
 +    }
@@ -806572,28 +810936,54 @@ index 000000000000..69b96803e529
 +
 +struct usb_ep*
 +msb250x_gadget_match_ep(struct usb_gadget *g,
-+		                struct usb_endpoint_descriptor *desc,
-+		                struct usb_ss_ep_comp_descriptor *ep_comp)
++                        struct usb_endpoint_descriptor *desc,
++                        struct usb_ss_ep_comp_descriptor *ep_comp)
 +{
-+	struct msb250x_udc* dev = to_msb250x_udc(g);
-+	struct usb_ep* ep = NULL;
++    struct msb250x_udc* dev = to_msb250x_udc(g);
++    struct usb_ep* ep = NULL;
 +
-+	switch (usb_endpoint_type(desc))
++    int maxpacket = usb_endpoint_maxp(desc) & 0x07FF;
++    int mult = usb_endpoint_maxp_mult(desc);
++    int index, select;
++
++    if (!maxpacket)
 +    {
-+        case USB_ENDPOINT_XFER_ISOC:
-+            if (1 < usb_endpoint_maxp_mult(desc))
-+            {
-+                ep = MSB250X_HIGH_BANDWIDTH_EP(dev);
-+            }
-+            break;
-+        case USB_ENDPOINT_XFER_INT:
-+            ep = &dev->ep[3].ep;
-+            break;
-+    	default:
-+    		/* nothing */ ;
-+	}
++        switch (usb_endpoint_type(desc))
++        {
++            case USB_ENDPOINT_XFER_ISOC:
++                maxpacket = 1024;
++                break;
++            case USB_ENDPOINT_XFER_BULK:
++                maxpacket = 512;
++                break;
++            default:
++                maxpacket = 64;
++                break;
++        }
++    }
 +
-+	return ep;
++    for (index = 1, select = 1; index < MSB250X_MAX_ENDPOINTS; index++)
++    {
++        if ((maxpacket > dev->ep[index].ep.maxpacket_limit) || (maxpacket * mult > dev->ep[index].fifo_size) || dev->ep[index].ep.claimed)
++            continue;
++
++        if (dev->ep[select].ep.maxpacket_limit >= dev->ep[index].ep.maxpacket_limit)
++        {
++            select = index;
++        }
++    }
++
++    if ((maxpacket <= dev->ep[select].ep.maxpacket_limit) && (maxpacket * mult <= dev->ep[select].fifo_size) && !dev->ep[select].ep.claimed)
++    {
++        ep = &dev->ep[select].ep;
++        printk(KERN_DEBUG"<USB>[GADGET] Match EP%d(%d x %d)", select, mult, maxpacket);
++    }
++    else
++    {
++        printk("<USB_ERR>[GADGET] No Match EP(%d x %d)\n", mult, maxpacket);
++    }
++
++    return ep;
 +}
 +EXPORT_SYMBOL(msb250x_gadget_match_ep);
 +
@@ -806797,10 +811187,10 @@ index 000000000000..69b96803e529
 +
 diff --git a/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_udc.c b/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_udc.c
 new file mode 100755
-index 000000000000..612b15bc3f80
+index 000000000000..8532faeaba4c
 --- /dev/null
 +++ b/drivers/sstar/usb/gadget/udc/usb20/src/msb250x_udc.c
-@@ -0,0 +1,1588 @@
+@@ -0,0 +1,1592 @@
 +/* SigmaStar trade secret */
 +/*
 +* msb250x_udc.c- Sigmastar
@@ -807898,11 +812288,10 @@ index 000000000000..612b15bc3f80
 +        //ep->dev = dev;
 +        INIT_LIST_HEAD (&ep->queue);
 +
-+        usb_ep_set_maxpacket_limit(&ep->ep, 1024);
++        usb_ep_set_maxpacket_limit(&ep->ep, dev->ep[ep_num].ep.maxpacket_limit);
 +        ep->gadget = &dev->gadget;
 +    }
 +
-+    usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
 +    dev->gadget.ep0 = &dev->ep[0].ep;
 +    list_del_init(&dev->ep[0].ep.ep_list);
 +}
@@ -808234,7 +812623,11 @@ index 000000000000..612b15bc3f80
 +    msb250x_udc_disable(dev);
 +
 +    msb250x_udc_reinit(dev);
-+
++    dev->zlp_buf = kzalloc(512, GFP_KERNEL);
++    if (!dev->zlp_buf)
++    {
++        return -ENOMEM;
++    }
 +    /* irq setup after old hardware state is cleaned up */
 +    irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
 +
@@ -808298,6 +812691,7 @@ index 000000000000..612b15bc3f80
 +    platform_set_drvdata(pdev, NULL);
 +
 +    usb_del_gadget_udc(&dev->gadget);
++    kfree(dev->zlp_buf);
 +
 +    printk(KERN_INFO "<USB>[UDC] remove ok\n");
 +    return 0;
@@ -813748,10 +818142,10 @@ index 000000000000..6714f126928b
 +
 diff --git a/drivers/sstar/voltage/voltage_ctrl.c b/drivers/sstar/voltage/voltage_ctrl.c
 new file mode 100755
-index 000000000000..53487e2a7bc0
+index 000000000000..777fd89858fd
 --- /dev/null
 +++ b/drivers/sstar/voltage/voltage_ctrl.c
-@@ -0,0 +1,596 @@
+@@ -0,0 +1,605 @@
 +/*
 +* voltage_ctrl.c- Sigmastar
 +*
@@ -814042,6 +818436,15 @@ index 000000000000..53487e2a7bc0
 +}
 +EXPORT_SYMBOL(get_core_voltage);
 +
++int get_core_voltage_of_demander(VOLTAGE_DEMANDER_E demander)
++{
++    if (demander <= VOLTAGE_DEMANDER_MAX)
++        return _gVoltageDemanderRequestValue[demander];
++    else
++        return -EINVAL;
++}
++EXPORT_SYMBOL(get_core_voltage_of_demander);
++
 +static int core_voltage_get_gpio(void)
 +{
 +    struct device_node *np = NULL;
@@ -823728,7 +828131,7 @@ index eaf1c3b06f02..3bc641c76f11 100644
 diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
 old mode 100644
 new mode 100755
-index fea446900cad..f03632ccf42d
+index fea446900cad..8701b45ea5e0
 --- a/drivers/usb/dwc3/core.c
 +++ b/drivers/usb/dwc3/core.c
 @@ -19,6 +19,7 @@
@@ -824266,31 +828669,81 @@ index fea446900cad..f03632ccf42d
  
  	dwc3_debugfs_exit(dwc);
  	dwc3_core_exit_mode(dwc);
-@@ -1333,12 +1478,18 @@ static int dwc3_resume(struct device *dev)
+@@ -1180,6 +1325,7 @@ static int dwc3_remove(struct platform_device *pdev)
+ 	return 0;
+ }
+ 
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
+ #ifdef CONFIG_PM
+ static int dwc3_suspend_common(struct dwc3 *dwc)
+ {
+@@ -1312,11 +1458,13 @@ static int dwc3_runtime_idle(struct device *dev)
+ 	return 0;
+ }
+ #endif /* CONFIG_PM */
++#endif /* !IS_ENABLED(CONFIG_SS_LOWPWR_STR) */
+ 
+ #ifdef CONFIG_PM_SLEEP
+ static int dwc3_suspend(struct device *dev)
+ {
  	struct dwc3	*dwc = dev_get_drvdata(dev);
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
  	int		ret;
  
--	pinctrl_pm_select_default_state(dev);
--
+ 	ret = dwc3_suspend_common(dwc);
+@@ -1324,6 +1472,9 @@ static int dwc3_suspend(struct device *dev)
+ 		return ret;
+ 
+ 	pinctrl_pm_select_sleep_state(dev);
++#else
++	dwc3_gadget_suspend(dwc);
++#endif
+ 
+ 	return 0;
+ }
+@@ -1331,26 +1482,37 @@ static int dwc3_suspend(struct device *dev)
+ static int dwc3_resume(struct device *dev)
+ {
+ 	struct dwc3	*dwc = dev_get_drvdata(dev);
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
+ 	int		ret;
+ 
+ 	pinctrl_pm_select_default_state(dev);
+ 
 -	ret = dwc3_resume_common(dwc);
 -	if (ret)
 -		return ret;
 -
-+    pinctrl_pm_select_default_state(dev);
-+
-+    if (dwc->is_hibernated) {
-+        dwc3_gadget_exit_hibernation(dwc);
-+    }
-+    else
-+    {
-+        ret = dwc3_resume_common(dwc);
-+        if (ret) {
-+            return ret;
-+        }
-+    }
++	if (dwc->is_hibernated) {
++		dwc3_gadget_exit_hibernation(dwc);
++	}
++	else
++	{
++		ret = dwc3_resume_common(dwc);
++		if (ret) {
++			return ret;
++		}
++	}
  	pm_runtime_disable(dev);
  	pm_runtime_set_active(dev);
  	pm_runtime_enable(dev);
+-
++#else
++	dwc3_gadget_resume(dwc);
++#endif
+ 	return 0;
+ }
+ #endif /* CONFIG_PM_SLEEP */
+ 
+ static const struct dev_pm_ops dwc3_dev_pm_ops = {
+ 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume)
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
+ 	SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume,
+ 			dwc3_runtime_idle)
++#endif /* CONFIG_SS_LOWPWR_STR undefined */
+ };
+ 
+ #ifdef CONFIG_OF
 diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
 old mode 100644
 new mode 100755
@@ -825388,7 +829841,7 @@ index 2331469f943d..8e837cc3a4d3
 diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
 old mode 100644
 new mode 100755
-index f483c3b1e971..50be8c5ed2e0
+index f483c3b1e971..e45c4558c6c6
 --- a/drivers/usb/dwc3/gadget.c
 +++ b/drivers/usb/dwc3/gadget.c
 @@ -26,6 +26,7 @@
@@ -825928,7 +830381,8 @@ index f483c3b1e971..50be8c5ed2e0
 +	i = (dwc->gadget.speed >= USB_SPEED_SUPER) ? 0 : 1;
 +	for (; i < DWC3_ISOC_MAX_RETRIES; i++) {
 +		uf = DWC3_ALIGN_FRAME(cur_uf, dep->interval, i+1);
-+
+ 
+-	__dwc3_gadget_kick_transfer(dep, uf);
 +		ret = __dwc3_gadget_kick_transfer(dep, uf);
 +		if (ret != -EAGAIN)
 +			break;
@@ -825965,8 +830419,7 @@ index f483c3b1e971..50be8c5ed2e0
 +
 +		//dep->resource_index = 0;
 +		memset(&params, 0, sizeof(params));
- 
--	__dwc3_gadget_kick_transfer(dep, uf);
++
 +		ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
 +#endif
 +		printk(KERN_DEBUG"ISOC ep%d(%d) over max retry", dep->number, dep->resource_index);
@@ -826116,7 +830569,7 @@ index f483c3b1e971..50be8c5ed2e0
  	ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt,
  			IRQF_SHARED, "dwc3", dwc->ev_buf);
  	if (ret) {
-@@ -1786,11 +2086,98 @@ static int dwc3_gadget_stop(struct usb_gadget *g)
+@@ -1786,11 +2086,101 @@ static int dwc3_gadget_stop(struct usb_gadget *g)
  	dwc->gadget_driver	= NULL;
  	spin_unlock_irqrestore(&dwc->lock, flags);
  
@@ -826151,7 +830604,10 @@ index f483c3b1e971..50be8c5ed2e0
 +			case USB_ENDPOINT_XFER_ISOC:
 +			case USB_ENDPOINT_XFER_BULK:
 +				maxpacket = 1024;
-+			break;
++				break;
++			case USB_ENDPOINT_XFER_INT:
++				maxpacket = 64;
++				break;
 +			default:
 +				break;
 +		}
@@ -826185,7 +830641,7 @@ index f483c3b1e971..50be8c5ed2e0
 +		ep_occupied[3] = true;
 +	}
 +
-+	if (!dep && maxpacket >= 192)//ep1-2
++	if (!dep)//ep1-2
 +	{
 +		int i;
 +		for (i=1; i< 3;i++)
@@ -826216,7 +830672,7 @@ index f483c3b1e971..50be8c5ed2e0
  static const struct usb_gadget_ops dwc3_gadget_ops = {
  	.get_frame		= dwc3_gadget_get_frame,
  	.wakeup			= dwc3_gadget_wakeup,
-@@ -1798,6 +2185,7 @@ static const struct usb_gadget_ops dwc3_gadget_ops = {
+@@ -1798,6 +2188,7 @@ static const struct usb_gadget_ops dwc3_gadget_ops = {
  	.pullup			= dwc3_gadget_pullup,
  	.udc_start		= dwc3_gadget_start,
  	.udc_stop		= dwc3_gadget_stop,
@@ -826224,7 +830680,7 @@ index f483c3b1e971..50be8c5ed2e0
  };
  
  /* -------------------------------------------------------------------------- */
-@@ -1828,7 +2216,7 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
+@@ -1828,7 +2219,7 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
  		spin_lock_init(&dep->lock);
  
  		dwc3_trace(trace_dwc3_gadget, "initializing %s", dep->name);
@@ -826233,7 +830689,7 @@ index f483c3b1e971..50be8c5ed2e0
  		if (epnum == 0 || epnum == 1) {
  			usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
  			dep->endpoint.maxburst = 1;
-@@ -1848,7 +2236,51 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
+@@ -1848,7 +2239,51 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
  			if (ret)
  				return ret;
  		}
@@ -826252,7 +830708,7 @@ index f483c3b1e971..50be8c5ed2e0
 +			dep->endpoint.ops = &dwc3_gadget_ep_ops;
 +			list_add_tail(&dep->endpoint.ep_list,
 +					&dwc->gadget.ep_list);
-+
+ 
 +			ret = dwc3_alloc_trb_pool(dep);
 +			if (ret)
 +				return ret;
@@ -826276,7 +830732,7 @@ index f483c3b1e971..50be8c5ed2e0
 +			dep->endpoint.ops = &dwc3_gadget_ep_ops;
 +			list_add_tail(&dep->endpoint.ep_list,
 +					&dwc->gadget.ep_list);
- 
++
 +			ret = dwc3_alloc_trb_pool(dep);
 +			if (ret)
 +				return ret;
@@ -826285,7 +830741,7 @@ index f483c3b1e971..50be8c5ed2e0
  		if (epnum == 0 || epnum == 1) {
  			dep->endpoint.caps.type_control = true;
  		} else {
-@@ -1977,10 +2409,9 @@ static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
+@@ -1977,10 +2412,9 @@ static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
  				 * request in the pending_list.
  				 */
  				dep->flags |= DWC3_EP_MISSED_ISOC;
@@ -826298,7 +830754,7 @@ index f483c3b1e971..50be8c5ed2e0
  			}
  		} else {
  			dep->flags &= ~DWC3_EP_MISSED_ISOC;
-@@ -2051,6 +2482,15 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
+@@ -2051,6 +2485,15 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
  		if (ret && chain && (actual < length) && req->num_pending_sgs)
  			return __dwc3_gadget_kick_transfer(dep, 0);
  
@@ -826314,7 +830770,7 @@ index f483c3b1e971..50be8c5ed2e0
  		dwc3_gadget_giveback(dep, req, status);
  
  		if (ret) {
-@@ -2079,9 +2519,32 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
+@@ -2079,9 +2522,32 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
  			 * entry is added into request list.
  			 */
  			dep->flags = DWC3_EP_PENDING_REQUEST;
@@ -826347,7 +830803,7 @@ index f483c3b1e971..50be8c5ed2e0
  		}
  		return 1;
  	}
-@@ -2142,7 +2605,13 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
+@@ -2142,7 +2608,13 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
  	if (!dep->endpoint.desc)
  		return;
  
@@ -826362,7 +830818,7 @@ index f483c3b1e971..50be8c5ed2e0
  		int ret;
  
  		ret = __dwc3_gadget_kick_transfer(dep, 0);
-@@ -2182,10 +2651,30 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
+@@ -2182,10 +2654,30 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
  		break;
  	case DWC3_DEPEVT_XFERINPROGRESS:
  		dwc3_endpoint_transfer_complete(dwc, dep, event);
@@ -826393,7 +830849,7 @@ index f483c3b1e971..50be8c5ed2e0
  		} else {
  			int active;
  			int ret;
-@@ -2247,6 +2736,14 @@ static void dwc3_disconnect_gadget(struct dwc3 *dwc)
+@@ -2247,11 +2739,20 @@ static void dwc3_disconnect_gadget(struct dwc3 *dwc)
  
  static void dwc3_suspend_gadget(struct dwc3 *dwc)
  {
@@ -826408,7 +830864,13 @@ index f483c3b1e971..50be8c5ed2e0
  	if (dwc->gadget_driver && dwc->gadget_driver->suspend) {
  		spin_unlock(&dwc->lock);
  		dwc->gadget_driver->suspend(&dwc->gadget);
-@@ -2274,8 +2771,11 @@ static void dwc3_reset_gadget(struct dwc3 *dwc)
+ 		spin_lock(&dwc->lock);
+ 	}
++	usb_gadget_set_state(&dwc->gadget, USB_STATE_SUSPENDED);
+ }
+ 
+ static void dwc3_resume_gadget(struct dwc3 *dwc)
+@@ -2274,8 +2775,11 @@ static void dwc3_reset_gadget(struct dwc3 *dwc)
  		spin_lock(&dwc->lock);
  	}
  }
@@ -826421,7 +830883,7 @@ index f483c3b1e971..50be8c5ed2e0
  {
  	struct dwc3_ep *dep;
  	struct dwc3_gadget_ep_cmd_params params;
-@@ -2325,7 +2825,13 @@ static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
+@@ -2325,7 +2829,13 @@ static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
  	memset(&params, 0, sizeof(params));
  	ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
  	WARN_ON_ONCE(ret);
@@ -826436,7 +830898,7 @@ index f483c3b1e971..50be8c5ed2e0
  	dep->flags &= ~DWC3_EP_BUSY;
  
  	if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A)
-@@ -2510,6 +3016,12 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
+@@ -2510,6 +3020,12 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
  		dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
  		dwc->gadget.ep0->maxpacket = 512;
  		dwc->gadget.speed = USB_SPEED_SUPER;
@@ -826449,7 +830911,7 @@ index f483c3b1e971..50be8c5ed2e0
  		break;
  	case DWC3_DSTS_HIGHSPEED:
  		dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
-@@ -2528,6 +3040,8 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
+@@ -2528,6 +3044,8 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
  		break;
  	}
  
@@ -826458,7 +830920,15 @@ index f483c3b1e971..50be8c5ed2e0
  	/* Enable USB2 LPM Capability */
  
  	if ((dwc->revision > DWC3_REVISION_194A) &&
-@@ -2682,6 +3196,9 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
+@@ -2597,6 +3115,7 @@ static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
+ 	if (dwc->gadget_driver && dwc->gadget_driver->resume) {
+ 		spin_unlock(&dwc->lock);
+ 		dwc->gadget_driver->resume(&dwc->gadget);
++		usb_gadget_set_state(&dwc->gadget, USB_STATE_CONFIGURED);
+ 		spin_lock(&dwc->lock);
+ 	}
+ }
+@@ -2682,17 +3201,35 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
  	}
  
  	switch (next) {
@@ -826466,9 +830936,17 @@ index f483c3b1e971..50be8c5ed2e0
 +		//printk("U0\n");
 +		break;
  	case DWC3_LINK_STATE_U1:
- 		if (dwc->speed == USB_SPEED_SUPER)
- 			dwc3_suspend_gadget(dwc);
-@@ -2693,6 +3210,17 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
+-		if (dwc->speed == USB_SPEED_SUPER)
+-			dwc3_suspend_gadget(dwc);
+ 		break;
+ 	case DWC3_LINK_STATE_U2:
+ 	case DWC3_LINK_STATE_U3:
+-		dwc3_suspend_gadget(dwc);
++		if (dwc->gadget.state >= USB_STATE_CONFIGURED) {
++			dwc3_suspend_gadget(dwc);
++			printk(KERN_DEBUG"*U%d Suspend*\n", next);
++		}
+ 		break;
  	case DWC3_LINK_STATE_RESUME:
  		dwc3_resume_gadget(dwc);
  		break;
@@ -826482,11 +830960,22 @@ index f483c3b1e971..50be8c5ed2e0
 +	case DWC3_LINK_STATE_SS_DIS:
 +		phy_reset(dwc->usb3_generic_phy);
 +		printk("SS DIS\n");
++		break;
++	case DWC3_LINK_STATE_RESET:
++		printk(KERN_DEBUG"*RESET*\n");
 +		break;
  	default:
  		/* do nothing */
  		break;
-@@ -2712,10 +3240,719 @@ static void dwc3_gadget_suspend_interrupt(struct dwc3 *dwc,
+@@ -2706,16 +3243,726 @@ static void dwc3_gadget_suspend_interrupt(struct dwc3 *dwc,
+ {
+ 	enum dwc3_link_state next = evtinfo & DWC3_LINK_STATE_MASK;
+ 
+-	if (dwc->link_state != next && next == DWC3_LINK_STATE_U3)
++	if (dwc->link_state != next && next == DWC3_LINK_STATE_U3) {
+ 		dwc3_suspend_gadget(dwc);
++	}
+ 
  	dwc->link_state = next;
  }
  
@@ -827207,7 +831696,7 @@ index f483c3b1e971..50be8c5ed2e0
  
  	/**
  	 * WORKAROUND: DWC3 revison 2.20a with hibernation support
-@@ -2730,9 +3967,11 @@ static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,
+@@ -2730,9 +3977,11 @@ static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,
  	 * STAR#9000546576: Device Mode Hibernation: Issue in USB 2.0
  	 * Device Fallback from SuperSpeed
  	 */
@@ -827221,16 +831710,53 @@ index f483c3b1e971..50be8c5ed2e0
  	/* enter hibernation here */
  }
  
-@@ -2744,7 +3983,7 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
+@@ -2741,15 +3990,19 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
+ {
+ 	switch (event->type) {
+ 	case DWC3_DEVICE_EVENT_DISCONNECT:
++		printk(KERN_DEBUG"*DisConnect*\n");
  		dwc3_gadget_disconnect_interrupt(dwc);
  		break;
  	case DWC3_DEVICE_EVENT_RESET:
 -		dwc3_gadget_reset_interrupt(dwc);
++		printk(KERN_DEBUG"*Reset*\n");
 +        dwc3_gadget_reset_interrupt(dwc);
  		break;
  	case DWC3_DEVICE_EVENT_CONNECT_DONE:
++		printk(KERN_DEBUG"*ConnDone*\n");
  		dwc3_gadget_conndone_interrupt(dwc);
-@@ -2831,7 +4070,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
+ 		break;
+ 	case DWC3_DEVICE_EVENT_WAKEUP:
++		printk(KERN_DEBUG"*Wakeup*\n");
+ 		dwc3_gadget_wakeup_interrupt(dwc);
+ 		break;
+ 	case DWC3_DEVICE_EVENT_HIBER_REQ:
+@@ -2763,6 +4016,7 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
+ 		dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
+ 		break;
+ 	case DWC3_DEVICE_EVENT_EOPF:
++		printk(KERN_DEBUG"*EOPF*\n");
+ 		/* It changed to be suspend event for version 2.30a and above */
+ 		if (dwc->revision < DWC3_REVISION_230A) {
+ 			dwc3_trace(trace_dwc3_gadget, "End of Periodic Frame");
+@@ -2782,6 +4036,16 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
+ 		dwc3_trace(trace_dwc3_gadget, "Start of Periodic Frame");
+ 		break;
+ 	case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
++		/*
++		 * According to databook, a soft disconnect recover is suggested
++		 * while an erratic error occurs.
++		 */
++		dwc3_gadget_run_stop(dwc, false, false);
++		dwc3_gadget_disconnect_interrupt(dwc);
++		__dwc3_gadget_stop(dwc);
++		__dwc3_gadget_start(dwc);
++		dwc3_gadget_run_stop(dwc, true, false);
++
+ 		dwc3_trace(trace_dwc3_gadget, "Erratic Error");
+ 		break;
+ 	case DWC3_DEVICE_EVENT_CMD_CMPL:
+@@ -2831,7 +4095,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
  	while (left > 0) {
  		union dwc3_event event;
  
@@ -827239,7 +831765,7 @@ index f483c3b1e971..50be8c5ed2e0
  
  		dwc3_process_event_entry(dwc, &event);
  
-@@ -2844,21 +4083,29 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
+@@ -2844,21 +4108,29 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
  		 * boundary so I worry about that once we try to handle
  		 * that.
  		 */
@@ -827271,7 +831797,7 @@ index f483c3b1e971..50be8c5ed2e0
  	return ret;
  }
  
-@@ -2869,6 +4116,15 @@ static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
+@@ -2869,6 +4141,15 @@ static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
  	unsigned long flags;
  	irqreturn_t ret = IRQ_NONE;
  
@@ -827287,7 +831813,7 @@ index f483c3b1e971..50be8c5ed2e0
  	spin_lock_irqsave(&dwc->lock, flags);
  	ret = dwc3_process_event_buf(evt);
  	spin_unlock_irqrestore(&dwc->lock, flags);
-@@ -2879,6 +4135,7 @@ static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
+@@ -2879,6 +4160,7 @@ static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
  static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
  {
  	struct dwc3 *dwc = evt->dwc;
@@ -827295,7 +831821,7 @@ index f483c3b1e971..50be8c5ed2e0
  	u32 count;
  	u32 reg;
  
-@@ -2889,6 +4146,9 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
+@@ -2889,6 +4171,9 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
  		return IRQ_HANDLED;
  	}
  
@@ -827305,7 +831831,7 @@ index f483c3b1e971..50be8c5ed2e0
  	/*
  	 * With PCIe legacy interrupt, test shows that top-half irq handler can
  	 * be called again after HW interrupt deassertion. Check if bottom-half
-@@ -2911,6 +4171,17 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
+@@ -2911,6 +4196,17 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
  	reg |= DWC3_GEVNTSIZ_INTMASK;
  	dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
  
@@ -827323,7 +831849,7 @@ index f483c3b1e971..50be8c5ed2e0
  	return IRQ_WAKE_THREAD;
  }
  
-@@ -2996,7 +4267,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
+@@ -2996,7 +4292,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
  
  	dwc->gadget.ops			= &dwc3_gadget_ops;
  	dwc->gadget.speed		= USB_SPEED_UNKNOWN;
@@ -827332,7 +831858,7 @@ index f483c3b1e971..50be8c5ed2e0
  	dwc->gadget.name		= "dwc3-gadget";
  	dwc->gadget.is_otg		= dwc->dr_mode == USB_DR_MODE_OTG;
  
-@@ -3038,6 +4309,29 @@ int dwc3_gadget_init(struct dwc3 *dwc)
+@@ -3038,6 +4334,29 @@ int dwc3_gadget_init(struct dwc3 *dwc)
  	if (ret)
  		goto err5;
  
@@ -827362,7 +831888,7 @@ index f483c3b1e971..50be8c5ed2e0
  	ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
  	if (ret) {
  		dev_err(dwc->dev, "failed to register udc\n");
-@@ -3073,6 +4367,20 @@ err0:
+@@ -3073,6 +4392,20 @@ err0:
  
  void dwc3_gadget_exit(struct dwc3 *dwc)
  {
@@ -827383,25 +831909,65 @@ index f483c3b1e971..50be8c5ed2e0
  	usb_del_gadget_udc(&dwc->gadget);
  
  	dwc3_gadget_free_endpoints(dwc);
-@@ -3092,6 +4400,9 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
+@@ -3092,6 +4425,10 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
  
  int dwc3_gadget_suspend(struct dwc3 *dwc)
  {
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
 +	if (dwc->has_hibernation)
 +		return 0;
 +
  	if (!dwc->gadget_driver)
  		return 0;
  
-@@ -3099,6 +4410,8 @@ int dwc3_gadget_suspend(struct dwc3 *dwc)
+@@ -3099,11 +4436,22 @@ int dwc3_gadget_suspend(struct dwc3 *dwc)
  	dwc3_disconnect_gadget(dwc);
  	__dwc3_gadget_stop(dwc);
  
 +	synchronize_irq(dwc->irq_gadget);
++#else
++#ifdef CONFIG_SMP
++	synchronize_irq(dwc->irq_gadget);
++	dwc3_gadget_disable_irq(dwc);
++
++	irq_set_affinity_hint(dwc->irq_gadget, NULL);
++#endif
++#endif
 +
  	return 0;
  }
  
+ int dwc3_gadget_resume(struct dwc3 *dwc)
+ {
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
+ 	int			ret;
+ 
+ 	if (!dwc->gadget_driver)
+@@ -3124,8 +4472,19 @@ err1:
+ 
+ err0:
+ 	return ret;
++#else
++#ifdef CONFIG_SMP
++	if (cpu_online(1)) {
++		irq_set_affinity_hint(dwc->irq_gadget, cpumask_of(1));
++	}
++	dwc->link_state = dwc3_gadget_get_link_state(dwc);
++	dwc3_gadget_enable_irq(dwc);
++#endif
++	return 0;
++#endif
+ }
+ 
++#if !IS_ENABLED(CONFIG_SS_LOWPWR_STR)
+ void dwc3_gadget_process_pending_events(struct dwc3 *dwc)
+ {
+ 	if (dwc->pending_events) {
+@@ -3134,3 +4493,4 @@ void dwc3_gadget_process_pending_events(struct dwc3 *dwc)
+ 		enable_irq(dwc->irq_gadget);
+ 	}
+ }
++#endif
 diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
 index 39459b718e98..cce4915253f2 100644
 --- a/drivers/usb/dwc3/gadget.h
@@ -828418,7 +832984,7 @@ index 000000000000..6945da798676
 +MODULE_LICENSE("GPL");
 diff --git a/drivers/usb/gadget/function/f_dfu.c b/drivers/usb/gadget/function/f_dfu.c
 new file mode 100755
-index 000000000000..f24ab0fbba3c
+index 000000000000..64b0592534af
 --- /dev/null
 +++ b/drivers/usb/gadget/function/f_dfu.c
 @@ -0,0 +1,729 @@
@@ -828550,7 +833116,7 @@ index 000000000000..f24ab0fbba3c
 +	    call_usermodehelper(cur_path, cmd_argv, cmd_envp, UMH_WAIT_PROC);
 +	}
 +
-+	kernel_restart("to Uboot DFU Mode");
++	orderly_reboot();
 +}
 +
 +static int dfu_function_bind(struct usb_configuration *c, struct usb_function *f)
@@ -829290,6 +833856,734 @@ index 000000000000..d74472deba5d
 +		struct usb_request *);
 +
 +#endif /* __F_DFU_H_ */
+diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
+index b6d4b484c51a..9d05798a50db 100644
+--- a/drivers/usb/gadget/function/f_hid.c
++++ b/drivers/usb/gadget/function/f_hid.c
+@@ -1,12 +1,8 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+  * f_hid.c -- USB HID function driver
+  *
+  * Copyright (C) 2010 Fabien Chouteau <fabien.chouteau@barco.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+  */
+ 
+ #include <linux/kernel.h>
+@@ -24,6 +20,7 @@
+ #include "u_f.h"
+ #include "u_hid.h"
+ 
++
+ #define HIDG_MINORS	4
+ 
+ static int major, minors;
+@@ -31,6 +28,10 @@ static struct class *hidg_class;
+ static DEFINE_IDA(hidg_ida);
+ static DEFINE_MUTEX(hidg_ida_lock); /* protects access to hidg_ida */
+ 
++static int out_enable = 0;
++module_param(out_enable, int, S_IRUGO|S_IWUSR);
++MODULE_PARM_DESC(out_enable, "you can choose: 0(disable), 1(enable)");
++
+ /*-------------------------------------------------------------------------*/
+ /*                            HID gadget struct                            */
+ 
+@@ -44,6 +45,7 @@ struct f_hidg {
+ 	/* configuration */
+ 	unsigned char			bInterfaceSubClass;
+ 	unsigned char			bInterfaceProtocol;
++	unsigned char			protocol;
+ 	unsigned short			report_desc_length;
+ 	char				*report_desc;
+ 	unsigned short			report_length;
+@@ -76,12 +78,26 @@ static inline struct f_hidg *func_to_hidg(struct usb_function *f)
+ /*-------------------------------------------------------------------------*/
+ /*                           Static descriptors                            */
+ 
+-static struct usb_interface_descriptor hidg_interface_desc = {
+-	.bLength		= sizeof hidg_interface_desc,
++/* disable outep interface_descriptor*/
++static struct usb_interface_descriptor hidg_interface_desc_in = {
++	.bLength		= sizeof hidg_interface_desc_in,
++	.bDescriptorType	= USB_DT_INTERFACE,
++	/* .bInterfaceNumber	= DYNAMIC */
++	.bAlternateSetting	= 0,
++	.bNumEndpoints		= 1,		/* 2 */
++	.bInterfaceClass	= USB_CLASS_HID,
++	/* .bInterfaceSubClass	= DYNAMIC */
++	/* .bInterfaceProtocol	= DYNAMIC */
++	/* .iInterface		= DYNAMIC */
++};
++
++/* enable outep interface_descriptor*/
++static struct usb_interface_descriptor hidg_interface_desc_inout = {
++	.bLength		= sizeof hidg_interface_desc_inout,
+ 	.bDescriptorType	= USB_DT_INTERFACE,
+ 	/* .bInterfaceNumber	= DYNAMIC */
+ 	.bAlternateSetting	= 0,
+-	.bNumEndpoints		= 2,
++	.bNumEndpoints		= 2,		/* 2 */
+ 	.bInterfaceClass	= USB_CLASS_HID,
+ 	/* .bInterfaceSubClass	= DYNAMIC */
+ 	/* .bInterfaceProtocol	= DYNAMIC */
+@@ -98,6 +114,70 @@ static struct hid_descriptor hidg_desc = {
+ 	/*.desc[0].wDescriptorLenght	= DYNAMIC */
+ };
+ 
++/* Super-Speed Support */
++
++static struct usb_endpoint_descriptor hidg_ss_in_ep_desc = {
++	.bLength		= USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType	= USB_DT_ENDPOINT,
++	.bEndpointAddress	= USB_DIR_IN,
++	.bmAttributes		= USB_ENDPOINT_XFER_INT,
++	/*.wMaxPacketSize	= DYNAMIC */
++	.bInterval		= 4, /* FIXME: Add this field in the
++				      * HID gadget configuration?
++				      * (struct hidg_func_descriptor)
++				      */
++};
++
++static struct usb_ss_ep_comp_descriptor hidg_ss_in_comp_desc = {
++	.bLength                = sizeof(hidg_ss_in_comp_desc),
++	.bDescriptorType        = USB_DT_SS_ENDPOINT_COMP,
++
++	/* .bMaxBurst           = 0, */
++	/* .bmAttributes        = 0, */
++	/* .wBytesPerInterval   = DYNAMIC */
++};
++
++static struct usb_endpoint_descriptor hidg_ss_out_ep_desc = {
++	.bLength		= USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType	= USB_DT_ENDPOINT,
++	.bEndpointAddress	= USB_DIR_OUT,
++	.bmAttributes		= USB_ENDPOINT_XFER_INT,
++	/*.wMaxPacketSize	= DYNAMIC */
++	.bInterval		= 4, /* FIXME: Add this field in the
++				      * HID gadget configuration?
++				      * (struct hidg_func_descriptor)
++				      */
++};
++
++static struct usb_ss_ep_comp_descriptor hidg_ss_out_comp_desc = {
++	.bLength                = sizeof(hidg_ss_out_comp_desc),
++	.bDescriptorType        = USB_DT_SS_ENDPOINT_COMP,
++
++	/* .bMaxBurst           = 0, */
++	/* .bmAttributes        = 0, */
++	/* .wBytesPerInterval   = DYNAMIC */
++};
++
++static struct usb_descriptor_header *hidg_ss_descriptors_inout[] = {
++	(struct usb_descriptor_header *)&hidg_interface_desc_inout,
++	(struct usb_descriptor_header *)&hidg_desc,
++	(struct usb_descriptor_header *)&hidg_ss_in_ep_desc,
++	(struct usb_descriptor_header *)&hidg_ss_in_comp_desc,
++	(struct usb_descriptor_header *)&hidg_ss_out_ep_desc,
++	(struct usb_descriptor_header *)&hidg_ss_out_comp_desc,
++
++	NULL,
++};
++
++static struct usb_descriptor_header *hidg_ss_descriptors_in[] = {
++	(struct usb_descriptor_header *)&hidg_interface_desc_in,
++	(struct usb_descriptor_header *)&hidg_desc,
++	(struct usb_descriptor_header *)&hidg_ss_in_ep_desc,
++	(struct usb_descriptor_header *)&hidg_ss_in_comp_desc,
++
++	NULL,
++};
++
+ /* High-Speed Support */
+ 
+ static struct usb_endpoint_descriptor hidg_hs_in_ep_desc = {
+@@ -124,11 +204,20 @@ static struct usb_endpoint_descriptor hidg_hs_out_ep_desc = {
+ 				      */
+ };
+ 
+-static struct usb_descriptor_header *hidg_hs_descriptors[] = {
+-	(struct usb_descriptor_header *)&hidg_interface_desc,
++static struct usb_descriptor_header *hidg_hs_descriptors_inout[] = {
++	(struct usb_descriptor_header *)&hidg_interface_desc_inout,
+ 	(struct usb_descriptor_header *)&hidg_desc,
+ 	(struct usb_descriptor_header *)&hidg_hs_in_ep_desc,
+ 	(struct usb_descriptor_header *)&hidg_hs_out_ep_desc,
++
++	NULL,
++};
++
++static struct usb_descriptor_header *hidg_hs_descriptors_in[] = {
++	(struct usb_descriptor_header *)&hidg_interface_desc_in,
++	(struct usb_descriptor_header *)&hidg_desc,
++	(struct usb_descriptor_header *)&hidg_hs_in_ep_desc,
++
+ 	NULL,
+ };
+ 
+@@ -158,11 +247,20 @@ static struct usb_endpoint_descriptor hidg_fs_out_ep_desc = {
+ 				       */
+ };
+ 
+-static struct usb_descriptor_header *hidg_fs_descriptors[] = {
+-	(struct usb_descriptor_header *)&hidg_interface_desc,
++static struct usb_descriptor_header *hidg_fs_descriptors_inout[] = {
++	(struct usb_descriptor_header *)&hidg_interface_desc_inout,
+ 	(struct usb_descriptor_header *)&hidg_desc,
+ 	(struct usb_descriptor_header *)&hidg_fs_in_ep_desc,
+ 	(struct usb_descriptor_header *)&hidg_fs_out_ep_desc,
++
++	NULL,
++};
++
++static struct usb_descriptor_header *hidg_fs_descriptors_in[] = {
++	(struct usb_descriptor_header *)&hidg_interface_desc_in,
++	(struct usb_descriptor_header *)&hidg_desc,
++	(struct usb_descriptor_header *)&hidg_fs_in_ep_desc,
++
+ 	NULL,
+ };
+ 
+@@ -201,9 +299,6 @@ static ssize_t f_hidg_read(struct file *file, char __user *buffer,
+ 	if (!count)
+ 		return 0;
+ 
+-	if (!access_ok(VERIFY_WRITE, buffer, count))
+-		return -EFAULT;
+-
+ 	spin_lock_irqsave(&hidg->read_spinlock, flags);
+ 
+ #define READ_COND (!list_empty(&hidg->completed_out_req))
+@@ -247,12 +342,20 @@ static ssize_t f_hidg_read(struct file *file, char __user *buffer,
+ 	if (list->pos == req->actual) {
+ 		kfree(list);
+ 
+-		req->length = hidg->report_length;
+-		ret = usb_ep_queue(hidg->out_ep, req, GFP_KERNEL);
+-		if (ret < 0) {
+-			free_ep_req(hidg->out_ep, req);
+-			return ret;
++		if (out_enable)
++		{
++			req->length = hidg->report_length;
++			ret = usb_ep_queue(hidg->out_ep, req, GFP_KERNEL);
++			if (ret < 0) {
++				free_ep_req(hidg->out_ep, req);
++				return ret;
++			}
++		} else
++		{
++			kfree(req->buf);
++			usb_ep_free_request(hidg->func.config->cdev->gadget->ep0, req);
+ 		}
++
+ 	} else {
+ 		spin_lock_irqsave(&hidg->read_spinlock, flags);
+ 		list_add(&list->list, &hidg->completed_out_req);
+@@ -284,16 +387,15 @@ static ssize_t f_hidg_write(struct file *file, const char __user *buffer,
+ 			    size_t count, loff_t *offp)
+ {
+ 	struct f_hidg *hidg  = file->private_data;
++	struct usb_request *req;
+ 	unsigned long flags;
+ 	ssize_t status = -ENOMEM;
+ 
+-	if (!access_ok(VERIFY_READ, buffer, count))
+-		return -EFAULT;
+-
+ 	spin_lock_irqsave(&hidg->write_spinlock, flags);
++	usb_gadget_wakeup(hidg->func.config->cdev->gadget);
+ 
+ #define WRITE_COND (!hidg->write_pending)
+-
++try_again:
+ 	/* write queue */
+ 	while (!WRITE_COND) {
+ 		spin_unlock_irqrestore(&hidg->write_spinlock, flags);
+@@ -308,10 +410,11 @@ static ssize_t f_hidg_write(struct file *file, const char __user *buffer,
+ 	}
+ 
+ 	hidg->write_pending = 1;
++	req = hidg->req;
+ 	count  = min_t(unsigned, count, hidg->report_length);
+ 
+ 	spin_unlock_irqrestore(&hidg->write_spinlock, flags);
+-	status = copy_from_user(hidg->req->buf, buffer, count);
++	status = copy_from_user(req->buf, buffer, count);
+ 
+ 	if (status != 0) {
+ 		ERROR(hidg->func.config->cdev,
+@@ -320,13 +423,27 @@ static ssize_t f_hidg_write(struct file *file, const char __user *buffer,
+ 		goto release_write_pending;
+ 	}
+ 
+-	hidg->req->status   = 0;
+-	hidg->req->zero     = 0;
+-	hidg->req->length   = count;
+-	hidg->req->complete = f_hidg_req_complete;
+-	hidg->req->context  = hidg;
++	spin_lock_irqsave(&hidg->write_spinlock, flags);
++
++	/* when our function has been disabled by host */
++	if (!hidg->req) {
++		free_ep_req(hidg->in_ep, req);
++		/*
++		 * TODO
++		 * Should we fail with error here?
++		 */
++		goto try_again;
++	}
++
++	req->status   = 0;
++	req->zero     = 0;
++	req->length   = count;
++	req->complete = f_hidg_req_complete;
++	req->context  = hidg;
++
++	spin_unlock_irqrestore(&hidg->write_spinlock, flags);
+ 
+-	status = usb_ep_queue(hidg->in_ep, hidg->req, GFP_ATOMIC);
++	status = usb_ep_queue(hidg->in_ep, req, GFP_ATOMIC);
+ 	if (status < 0) {
+ 		ERROR(hidg->func.config->cdev,
+ 			"usb_ep_queue error on int endpoint %zd\n", status);
+@@ -352,6 +469,7 @@ static unsigned int f_hidg_poll(struct file *file, poll_table *wait)
+ 	unsigned int	ret = 0;
+ 
+ 	poll_wait(file, &hidg->read_queue, wait);
++
+ 	poll_wait(file, &hidg->write_queue, wait);
+ 
+ 	if (WRITE_COND)
+@@ -391,12 +509,27 @@ static inline struct usb_request *hidg_alloc_ep_req(struct usb_ep *ep,
+ 	return alloc_ep_req(ep, length);
+ }
+ 
+-static void hidg_set_report_complete(struct usb_ep *ep, struct usb_request *req)
++static void hidg_set_report_complete(struct usb_ep *ep, struct usb_request *sreq)
+ {
+-	struct f_hidg *hidg = (struct f_hidg *) req->context;
++	struct f_hidg *hidg = (struct f_hidg *) sreq->context;
+ 	struct usb_composite_dev *cdev = hidg->func.config->cdev;
+ 	struct f_hidg_req_list *req_list;
+ 	unsigned long flags;
++	struct usb_request * req = NULL;
++
++	if (out_enable)
++		req = sreq;
++	else
++	{
++		req = usb_ep_alloc_request(hidg->func.config->cdev->gadget->ep0, GFP_KERNEL);
++		req->buf = kmalloc(USB_COMP_EP0_BUFSIZ, GFP_KERNEL);
++
++		memcpy(req->buf, sreq->buf, sizeof(hidg->report_length));
++
++		req->actual = sreq->actual;
++		req->length = sreq->length;
++		req->status = sreq->status;
++	}
+ 
+ 	switch (req->status) {
+ 	case 0:
+@@ -443,6 +576,7 @@ static int hidg_setup(struct usb_function *f,
+ 	     __func__, ctrl->bRequestType, ctrl->bRequest, value);
+ 
+ 	switch ((ctrl->bRequestType << 8) | ctrl->bRequest) {
++
+ 	case ((USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8
+ 		  | HID_REQ_GET_REPORT):
+ 		VDBG(cdev, "get_report\n");
+@@ -457,18 +591,38 @@ static int hidg_setup(struct usb_function *f,
+ 	case ((USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8
+ 		  | HID_REQ_GET_PROTOCOL):
+ 		VDBG(cdev, "get_protocol\n");
+-		goto stall;
++		length = min_t(unsigned int, length, 1);
++		((u8 *) req->buf)[0] = hidg->protocol;
++		goto respond;
+ 		break;
+ 
+ 	case ((USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8
+ 		  | HID_REQ_SET_REPORT):
+ 		VDBG(cdev, "set_report | wLength=%d\n", ctrl->wLength);
+-		goto stall;
++
++		req->context = hidg;
++		req->complete = hidg_set_report_complete;
++		/* send an empty report */
++		length = min_t(unsigned, length, hidg->report_length);
++		memset(req->buf, 0x0, length);
++
++		goto respond;
+ 		break;
+ 
+ 	case ((USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8
+ 		  | HID_REQ_SET_PROTOCOL):
+ 		VDBG(cdev, "set_protocol\n");
++		if (value > HID_REQ_SET_PROTOCOL)
++			goto stall;
++		length = 0;
++		/*
++		 * We assume that programs implementing the Boot protocol
++		 * are also compatible with the Report Protocol
++		 */
++		if (hidg->bInterfaceSubClass == USB_INTERFACE_SUBCLASS_BOOT) {
++			hidg->protocol = value;
++			goto respond;
++		}
+ 		goto stall;
+ 		break;
+ 
+@@ -506,6 +660,17 @@ static int hidg_setup(struct usb_function *f,
+ 		}
+ 		break;
+ 
++	case ((USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8
++	| USB_REQ_GET_INTERFACE):
++		VDBG(cdev, "get_interface\n");
++
++		/* send an empty report */
++		length = min_t(unsigned, length, hidg->report_length);
++		memset(req->buf, 0x0, length);
++
++		goto respond;
++		break;
++
+ 	default:
+ 		VDBG(cdev, "Unknown request 0x%x\n",
+ 			 ctrl->bRequest);
+@@ -520,8 +685,9 @@ respond:
+ 	req->zero = 0;
+ 	req->length = length;
+ 	status = usb_ep_queue(cdev->gadget->ep0, req, GFP_ATOMIC);
+-	if (status < 0)
++	if (status < 0){
+ 		ERROR(cdev, "usb_ep_queue error on ep0 %d\n", value);
++	}
+ 	return status;
+ }
+ 
+@@ -529,24 +695,44 @@ static void hidg_disable(struct usb_function *f)
+ {
+ 	struct f_hidg *hidg = func_to_hidg(f);
+ 	struct f_hidg_req_list *list, *next;
++
+ 	unsigned long flags;
+ 
+-	usb_ep_disable(hidg->in_ep);
+-	usb_ep_disable(hidg->out_ep);
++	if(out_enable)
++		usb_ep_disable(hidg->out_ep);
+ 
+ 	spin_lock_irqsave(&hidg->read_spinlock, flags);
+ 	list_for_each_entry_safe(list, next, &hidg->completed_out_req, list) {
+-		free_ep_req(hidg->out_ep, list->req);
++		if (out_enable)
++		{
++			free_ep_req(hidg->out_ep, list->req);
++		} else
++		{
++			kfree(list->req->buf);
++			usb_ep_free_request(hidg->func.config->cdev->gadget->ep0, list->req);
++		}
+ 		list_del(&list->list);
+ 		kfree(list);
+ 	}
+ 	spin_unlock_irqrestore(&hidg->read_spinlock, flags);
++
++	usb_ep_disable(hidg->in_ep);
++	spin_lock_irqsave(&hidg->write_spinlock, flags);
++	if (!hidg->write_pending) {
++		free_ep_req(hidg->in_ep, hidg->req);
++		hidg->write_pending = 1;
++	}
++
++	hidg->req = NULL;
++	spin_unlock_irqrestore(&hidg->write_spinlock, flags);
+ }
+ 
+ static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
+ {
+ 	struct usb_composite_dev		*cdev = f->config->cdev;
+ 	struct f_hidg				*hidg = func_to_hidg(f);
++	struct usb_request			*req_in = NULL;
++	unsigned long				flags;
+ 	int i, status = 0;
+ 
+ 	VDBG(cdev, "hidg_set_alt intf:%d alt:%d\n", intf, alt);
+@@ -567,49 +753,78 @@ static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
+ 			goto fail;
+ 		}
+ 		hidg->in_ep->driver_data = hidg;
+-	}
+ 
+-
+-	if (hidg->out_ep != NULL) {
+-		/* restart endpoint */
+-		usb_ep_disable(hidg->out_ep);
+-
+-		status = config_ep_by_speed(f->config->cdev->gadget, f,
+-					    hidg->out_ep);
+-		if (status) {
+-			ERROR(cdev, "config_ep_by_speed FAILED!\n");
+-			goto fail;
+-		}
+-		status = usb_ep_enable(hidg->out_ep);
+-		if (status < 0) {
+-			ERROR(cdev, "Enable OUT endpoint FAILED!\n");
+-			goto fail;
++		req_in = hidg_alloc_ep_req(hidg->in_ep, hidg->report_length);
++		if (!req_in) {
++			status = -ENOMEM;
++			goto disable_ep_in;
+ 		}
+-		hidg->out_ep->driver_data = hidg;
++	}
+ 
+-		/*
+-		 * allocate a bunch of read buffers and queue them all at once.
+-		 */
+-		for (i = 0; i < hidg->qlen && status == 0; i++) {
+-			struct usb_request *req =
+-					hidg_alloc_ep_req(hidg->out_ep,
+-							  hidg->report_length);
+-			if (req) {
+-				req->complete = hidg_set_report_complete;
+-				req->context  = hidg;
+-				status = usb_ep_queue(hidg->out_ep, req,
+-						      GFP_ATOMIC);
+-				if (status)
+-					ERROR(cdev, "%s queue req --> %d\n",
+-						hidg->out_ep->name, status);
+-			} else {
+-				usb_ep_disable(hidg->out_ep);
+-				status = -ENOMEM;
+-				goto fail;
++	if(out_enable)
++	{
++		if (hidg->out_ep != NULL) {
++			/* restart endpoint */
++			usb_ep_disable(hidg->out_ep);
++
++			status = config_ep_by_speed(f->config->cdev->gadget, f,
++						    hidg->out_ep);
++			if (status) {
++				ERROR(cdev, "config_ep_by_speed FAILED!\n");
++				goto free_req_in;
++			}
++			status = usb_ep_enable(hidg->out_ep);
++			if (status < 0) {
++				ERROR(cdev, "Enable OUT endpoint FAILED!\n");
++				goto free_req_in;
++			}
++			hidg->out_ep->driver_data = hidg;
++
++			/*
++			 * allocate a bunch of read buffers and queue them all at once.
++			 */
++			for (i = 0; i < hidg->qlen && status == 0; i++) {
++				struct usb_request *req =
++						hidg_alloc_ep_req(hidg->out_ep,
++								  hidg->report_length);
++				if (req) {
++					req->complete = hidg_set_report_complete;
++					req->context  = hidg;
++					status = usb_ep_queue(hidg->out_ep, req,
++							      GFP_ATOMIC);
++					if (status) {
++						ERROR(cdev, "%s queue req --> %d\n",
++							hidg->out_ep->name, status);
++						free_ep_req(hidg->out_ep, req);
++					}
++				} else {
++					status = -ENOMEM;
++					goto disable_out_ep;
++				}
+ 			}
+ 		}
+ 	}
+ 
++	if (hidg->in_ep != NULL) {
++		spin_lock_irqsave(&hidg->write_spinlock, flags);
++		hidg->req = req_in;
++		hidg->write_pending = 0;
++		spin_unlock_irqrestore(&hidg->write_spinlock, flags);
++
++		wake_up(&hidg->write_queue);
++	}
++	return 0;
++
++disable_out_ep:
++	if (hidg->out_ep)
++		usb_ep_disable(hidg->out_ep);
++free_req_in:
++	if (req_in)
++		free_ep_req(hidg->in_ep, req_in);
++disable_ep_in:
++	if (hidg->in_ep)
++		usb_ep_disable(hidg->in_ep);
++
+ fail:
+ 	return status;
+ }
+@@ -638,13 +853,37 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
+ 				 ARRAY_SIZE(ct_func_string_defs));
+ 	if (IS_ERR(us))
+ 		return PTR_ERR(us);
+-	hidg_interface_desc.iInterface = us[CT_FUNC_HID_IDX].id;
++
++	if(out_enable)
++		hidg_interface_desc_inout.iInterface = us[CT_FUNC_HID_IDX].id;
++	else
++		hidg_interface_desc_in.iInterface = us[CT_FUNC_HID_IDX].id;
+ 
+ 	/* allocate instance-specific interface IDs, and patch descriptors */
+ 	status = usb_interface_id(c, f);
+ 	if (status < 0)
+ 		goto fail;
+-	hidg_interface_desc.bInterfaceNumber = status;
++
++	if(out_enable)
++		hidg_interface_desc_inout.bInterfaceNumber = status;
++	else
++		hidg_interface_desc_in.bInterfaceNumber = status;
++
++	/* pre-set endpoint attribute before config ep */
++	hidg_ss_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++	hidg_ss_in_comp_desc.wBytesPerInterval =
++				cpu_to_le16(hidg->report_length);
++	hidg_hs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++	hidg_fs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++
++	if(out_enable)
++	{
++		hidg_ss_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++		hidg_ss_out_comp_desc.wBytesPerInterval =
++					cpu_to_le16(hidg->report_length);
++		hidg_hs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++		hidg_fs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++	}
+ 
+ 	/* allocate instance-specific endpoints */
+ 	status = -ENODEV;
+@@ -653,24 +892,28 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
+ 		goto fail;
+ 	hidg->in_ep = ep;
+ 
+-	ep = usb_ep_autoconfig(c->cdev->gadget, &hidg_fs_out_ep_desc);
+-	if (!ep)
+-		goto fail;
+-	hidg->out_ep = ep;
+-
+-	/* preallocate request and buffer */
+-	status = -ENOMEM;
+-	hidg->req = alloc_ep_req(hidg->in_ep, hidg->report_length);
+-	if (!hidg->req)
+-		goto fail;
++	if(out_enable)
++	{
++		ep = usb_ep_autoconfig(c->cdev->gadget, &hidg_fs_out_ep_desc);
++		if (!ep)
++			goto fail;
++		hidg->out_ep = ep;
++	}
+ 
+ 	/* set descriptor dynamic values */
+-	hidg_interface_desc.bInterfaceSubClass = hidg->bInterfaceSubClass;
+-	hidg_interface_desc.bInterfaceProtocol = hidg->bInterfaceProtocol;
+-	hidg_hs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
+-	hidg_fs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
+-	hidg_hs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
+-	hidg_fs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
++	if(out_enable)
++	{
++		hidg_interface_desc_inout.bInterfaceSubClass = hidg->bInterfaceSubClass;
++		hidg_interface_desc_inout.bInterfaceProtocol = hidg->bInterfaceProtocol;
++	}
++	else
++	{
++		hidg_interface_desc_in.bInterfaceSubClass = hidg->bInterfaceSubClass;
++		hidg_interface_desc_in.bInterfaceProtocol = hidg->bInterfaceProtocol;
++	}
++
++	hidg->protocol = HID_REQ_SET_PROTOCOL;
++
+ 	/*
+ 	 * We can use hidg_desc struct here but we should not relay
+ 	 * that its content won't change after returning from this function.
+@@ -681,17 +924,43 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
+ 
+ 	hidg_hs_in_ep_desc.bEndpointAddress =
+ 		hidg_fs_in_ep_desc.bEndpointAddress;
+-	hidg_hs_out_ep_desc.bEndpointAddress =
+-		hidg_fs_out_ep_desc.bEndpointAddress;
+ 
+-	status = usb_assign_descriptors(f, hidg_fs_descriptors,
+-			hidg_hs_descriptors, NULL, NULL);
+-	if (status)
+-		goto fail;
++	if(out_enable)
++	{
++		hidg_hs_out_ep_desc.bEndpointAddress =
++			hidg_fs_out_ep_desc.bEndpointAddress;
++	}
++
++	hidg_ss_in_ep_desc.bEndpointAddress =
++		hidg_fs_in_ep_desc.bEndpointAddress;
++
++	if(out_enable)
++	{
++		hidg_ss_out_ep_desc.bEndpointAddress =
++			hidg_fs_out_ep_desc.bEndpointAddress;
++	}
++
++	if(out_enable)
++	{
++		status = usb_assign_descriptors(f, hidg_fs_descriptors_inout,
++				hidg_hs_descriptors_inout, hidg_ss_descriptors_inout, NULL);
++		if (status)
++			goto fail;
++	}
++	else
++	{
++		status = usb_assign_descriptors(f, hidg_fs_descriptors_in,
++						hidg_hs_descriptors_in, hidg_ss_descriptors_in, NULL);
++		if (status)
++			goto fail;
++	}
+ 
+ 	spin_lock_init(&hidg->write_spinlock);
+-	spin_lock_init(&hidg->read_spinlock);
++	hidg->write_pending = 1;
++	hidg->req = NULL;
+ 	init_waitqueue_head(&hidg->write_queue);
++
++	spin_lock_init(&hidg->read_spinlock);
+ 	init_waitqueue_head(&hidg->read_queue);
+ 	INIT_LIST_HEAD(&hidg->completed_out_req);
+ 
+@@ -954,10 +1223,6 @@ static void hidg_unbind(struct usb_configuration *c, struct usb_function *f)
+ 	device_destroy(hidg_class, MKDEV(major, hidg->minor));
+ 	cdev_del(&hidg->cdev);
+ 
+-	/* disable/free request and end point */
+-	usb_ep_disable(hidg->in_ep);
+-	free_ep_req(hidg->in_ep, hidg->req);
+-
+ 	usb_free_all_descriptors(f);
+ }
+ 
+@@ -1047,3 +1312,6 @@ void ghid_cleanup(void)
+ 	class_destroy(hidg_class);
+ 	hidg_class = NULL;
+ }
++
++
++
 diff --git a/drivers/usb/gadget/function/f_midi.c b/drivers/usb/gadget/function/f_midi.c
 index a5719f271bf0..70ac1963b598 100644
 --- a/drivers/usb/gadget/function/f_midi.c
@@ -829368,7 +834662,7 @@ index ba00cdb809d6..ec3a8f15fd44 100644
  	ss_out_desc.bEndpointAddress = fs_out_desc.bEndpointAddress;
  	ss_notify_desc.bEndpointAddress = fs_notify_desc.bEndpointAddress;
 diff --git a/drivers/usb/gadget/function/f_uac1.c b/drivers/usb/gadget/function/f_uac1.c
-index f2ac0cbc29a4..3169dc3ccab5 100644
+index f2ac0cbc29a4..1f6c607d4acd 100644
 --- a/drivers/usb/gadget/function/f_uac1.c
 +++ b/drivers/usb/gadget/function/f_uac1.c
 @@ -1,37 +1,64 @@
@@ -829451,7 +834745,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  
  /* B.3.1  Standard AC Interface Descriptor */
  static struct usb_interface_descriptor ac_interface_desc = {
-@@ -42,93 +69,147 @@ static struct usb_interface_descriptor ac_interface_desc = {
+@@ -42,93 +69,165 @@ static struct usb_interface_descriptor ac_interface_desc = {
  	.bInterfaceSubClass =	USB_SUBCLASS_AUDIOCONTROL,
  };
  
@@ -829551,15 +834845,6 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 -	.bSourceID		= INPUT_TERMINAL_ID,
 -	.bControlSize		= 2,
 -	.bmaControls[0]		= (UAC_FU_MUTE | UAC_FU_VOLUME),
--};
--
--static struct usb_audio_control mute_control = {
--	.list = LIST_HEAD_INIT(mute_control.list),
--	.name = "Mute Control",
--	.type = UAC_FU_MUTE,
--	/* Todo: add real Mute control code */
--	.set = generic_set_cmd,
--	.get = generic_get_cmd,
 +	.bDescriptorSubtype	= UAC_OUTPUT_TERMINAL,
 +	.bTerminalID		= IO_OUT_OT_ID,
 +	.wTerminalType		= cpu_to_le16(UAC_OUTPUT_TERMINAL_SPEAKER),
@@ -829567,6 +834852,18 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	.bSourceID		= USB_OUT_IT_ID,
  };
  
+-static struct usb_audio_control mute_control = {
+-	.list = LIST_HEAD_INIT(mute_control.list),
+-	.name = "Mute Control",
++static struct usb_audio_control playback_mute_control = {
++	.list = LIST_HEAD_INIT(playback_mute_control.list),
++	.name = "Playback Mute Control",
+ 	.type = UAC_FU_MUTE,
+ 	/* Todo: add real Mute control code */
+ 	.set = generic_set_cmd,
+ 	.get = generic_get_cmd,
+ };
+ 
 -static struct usb_audio_control volume_control = {
 -	.list = LIST_HEAD_INIT(volume_control.list),
 -	.name = "Volume Control",
@@ -829617,7 +834914,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	.bUnitID        = USB_IN_FU_ID,
 +	.bSourceID      = IO_IN_IT_ID,
 +	.bControlSize       = 1,
-+	.bmaControls[0]     = (UAC_FU_VOLUME),
++	.bmaControls[0]     = (UAC_FU_MUTE) | (UAC_FU_VOLUME),
 +};
 +
 +static struct uac1_output_terminal_descriptor usb_in_ot_desc = {
@@ -829630,6 +834927,15 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	.bSourceID =		USB_IN_FU_ID,
 +};
 +
++static struct usb_audio_control capture_mute_control = {
++	.list = LIST_HEAD_INIT(capture_mute_control.list),
++	.name = "Capture Mute Control",
++	.type = UAC_FU_MUTE,
++	/* Todo: add real Mute control code */
++	.set = generic_set_cmd,
++	.get = generic_get_cmd,
++};
++
 +static struct usb_audio_control capture_volume_control = {
 +	.list = LIST_HEAD_INIT(capture_volume_control.list),
 +	.name = "Capture Volume Control",
@@ -829652,7 +834958,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	.bLength =		USB_DT_INTERFACE_SIZE,
  	.bDescriptorType =	USB_DT_INTERFACE,
  	.bAlternateSetting =	0,
-@@ -137,7 +218,25 @@ static struct usb_interface_descriptor as_interface_alt_0_desc = {
+@@ -137,7 +236,25 @@ static struct usb_interface_descriptor as_interface_alt_0_desc = {
  	.bInterfaceSubClass =	USB_SUBCLASS_AUDIOSTREAMING,
  };
  
@@ -829679,7 +834985,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	.bLength =		USB_DT_INTERFACE_SIZE,
  	.bDescriptorType =	USB_DT_INTERFACE,
  	.bAlternateSetting =	1,
-@@ -147,18 +246,27 @@ static struct usb_interface_descriptor as_interface_alt_1_desc = {
+@@ -147,18 +264,27 @@ static struct usb_interface_descriptor as_interface_alt_1_desc = {
  };
  
  /* B.4.2  Class-Specific AS Interface Descriptor */
@@ -829711,7 +835017,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	.bLength =		UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(1),
  	.bDescriptorType =	USB_DT_CS_INTERFACE,
  	.bDescriptorSubtype =	UAC_FORMAT_TYPE,
-@@ -179,201 +287,274 @@ static struct usb_endpoint_descriptor as_out_ep_desc  = {
+@@ -179,201 +305,274 @@ static struct usb_endpoint_descriptor as_out_ep_desc  = {
  	.bInterval =		4,
  };
  
@@ -829740,8 +835046,9 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	.bSubframeSize =	2,
 +	.bBitResolution =	16,
 +	.bSamFreqType =		1,
-+};
-+
+ };
+ 
+-static struct usb_descriptor_header *f_audio_desc[] = {
 +/* Standard ISO IN Endpoint Descriptor */
 +static struct usb_endpoint_descriptor as_in_ep_desc  = {
 +	.bLength =		USB_DT_ENDPOINT_AUDIO_SIZE,
@@ -829756,9 +835063,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +static struct usb_ss_ep_comp_descriptor ss_as_in_ep_comp_desc = {
 +	.bLength =		USB_DT_SS_EP_COMP_SIZE,
 +	.bDescriptorType =	USB_DT_SS_ENDPOINT_COMP,
- };
- 
--static struct usb_descriptor_header *f_audio_desc[] = {
++};
++
 +/* Class-specific AS ISO IN Endpoint Descriptor */
 +static struct uac_iso_endpoint_descriptor as_iso_in_desc = {
 +	.bLength =		UAC_ISO_ENDPOINT_DESC_SIZE,
@@ -829834,8 +835140,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 -	{ },
 -};
 +	(struct usb_descriptor_header *)&io_in_it_desc,
-+	(struct usb_descriptor_header *)&usb_capture_fu_desc,
 +	(struct usb_descriptor_header *)&usb_in_ot_desc,
++	(struct usb_descriptor_header *)&usb_capture_fu_desc,
  
 -static struct usb_gadget_strings str_uac1 = {
 -	.language = 0x0409,	/* en-us */
@@ -829871,8 +835177,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	(struct usb_descriptor_header *)&usb_out_it_desc,
 +	(struct usb_descriptor_header *)&io_out_ot_desc,
 +	(struct usb_descriptor_header *)&io_in_it_desc,
-+	(struct usb_descriptor_header *)&usb_capture_fu_desc,
 +	(struct usb_descriptor_header *)&usb_in_ot_desc,
++	(struct usb_descriptor_header *)&usb_capture_fu_desc,
 +
 +	(struct usb_descriptor_header *)&as_out_interface_alt_0_desc,
 +	(struct usb_descriptor_header *)&as_out_interface_alt_1_desc,
@@ -829945,8 +835251,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 -	/* endpoints handle full and/or high speeds */
 -	struct usb_ep			*out_ep;
 +	(struct usb_descriptor_header *)&io_in_it_desc,
-+	(struct usb_descriptor_header *)&usb_capture_fu_desc,
 +	(struct usb_descriptor_header *)&usb_in_ot_desc,
++	(struct usb_descriptor_header *)&usb_capture_fu_desc,
  
 -	spinlock_t			lock;
 -	struct f_audio_buf *copy_buf;
@@ -829980,8 +835286,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	(struct usb_descriptor_header *)&usb_out_it_desc,
 +	(struct usb_descriptor_header *)&io_out_ot_desc,
 +	(struct usb_descriptor_header *)&io_in_it_desc,
-+	(struct usb_descriptor_header *)&usb_capture_fu_desc,
 +	(struct usb_descriptor_header *)&usb_in_ot_desc,
++	(struct usb_descriptor_header *)&usb_capture_fu_desc,
  
 -static void f_audio_playback_work(struct work_struct *data)
 -{
@@ -830120,7 +835426,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	default:
  		break;
  	}
-@@ -382,7 +563,7 @@ static void f_audio_complete(struct usb_ep *ep, struct usb_request *req)
+@@ -382,7 +581,7 @@ static void f_audio_complete(struct usb_ep *ep, struct usb_request *req)
  static int audio_set_intf_req(struct usb_function *f,
  		const struct usb_ctrlrequest *ctrl)
  {
@@ -830129,7 +835435,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	struct usb_composite_dev *cdev = f->config->cdev;
  	struct usb_request	*req = cdev->req;
  	u8			id = ((le16_to_cpu(ctrl->wIndex) >> 8) & 0xFF);
-@@ -396,11 +577,11 @@ static int audio_set_intf_req(struct usb_function *f,
+@@ -396,11 +595,11 @@ static int audio_set_intf_req(struct usb_function *f,
  	DBG(cdev, "bRequest 0x%x, w_value 0x%04x, len %d, entity %d\n",
  			ctrl->bRequest, w_value, len, id);
  
@@ -830143,7 +835449,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  					break;
  				}
  			}
-@@ -408,8 +589,8 @@ static int audio_set_intf_req(struct usb_function *f,
+@@ -408,8 +607,8 @@ static int audio_set_intf_req(struct usb_function *f,
  		}
  	}
  
@@ -830154,7 +835460,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	req->complete = f_audio_complete;
  
  	return len;
-@@ -418,7 +599,7 @@ static int audio_set_intf_req(struct usb_function *f,
+@@ -418,7 +617,7 @@ static int audio_set_intf_req(struct usb_function *f,
  static int audio_get_intf_req(struct usb_function *f,
  		const struct usb_ctrlrequest *ctrl)
  {
@@ -830163,7 +835469,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	struct usb_composite_dev *cdev = f->config->cdev;
  	struct usb_request	*req = cdev->req;
  	int			value = -EOPNOTSUPP;
-@@ -433,7 +614,7 @@ static int audio_get_intf_req(struct usb_function *f,
+@@ -433,7 +632,7 @@ static int audio_get_intf_req(struct usb_function *f,
  	DBG(cdev, "bRequest 0x%x, w_value 0x%04x, len %d, entity %d\n",
  			ctrl->bRequest, w_value, len, id);
  
@@ -830172,7 +835478,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  		if (cs->id == id) {
  			list_for_each_entry(con, &cs->control, list) {
  				if (con->type == con_sel && con->get) {
-@@ -445,7 +626,7 @@ static int audio_get_intf_req(struct usb_function *f,
+@@ -445,7 +644,7 @@ static int audio_get_intf_req(struct usb_function *f,
  		}
  	}
  
@@ -830181,7 +835487,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	req->complete = f_audio_complete;
  	len = min_t(size_t, sizeof(value), len);
  	memcpy(req->buf, &value, len);
-@@ -531,14 +712,6 @@ f_audio_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+@@ -531,14 +730,6 @@ f_audio_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
  	 * activation uses set_alt().
  	 */
  	switch (ctrl->bRequestType) {
@@ -830196,7 +835502,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	case USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_ENDPOINT:
  		value = audio_set_endpoint_req(f, ctrl);
  		break;
-@@ -547,6 +720,14 @@ f_audio_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+@@ -547,6 +738,14 @@ f_audio_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
  		value = audio_get_endpoint_req(f, ctrl);
  		break;
  
@@ -830211,7 +835517,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	default:
  		ERROR(cdev, "invalid control req%02x.%02x v%04x i%04x l%d\n",
  			ctrl->bRequestType, ctrl->bRequest,
-@@ -571,198 +752,331 @@ f_audio_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+@@ -571,198 +770,331 @@ f_audio_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
  
  static int f_audio_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
  {
@@ -830353,8 +835659,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 -	struct gaudio *card = &audio->card;
 -	u8 *sam_freq;
 -	int rate;
-+	struct f_uac1 *uac1 = func_to_uac1(f);
- 
+-
 -	/* Set channel numbers */
 -	input_terminal_desc.bNrChannels = u_audio_get_playback_channels(card);
 -	as_type_i_desc.bNrChannels = u_audio_get_playback_channels(card);
@@ -830363,7 +835668,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 -	rate = u_audio_get_playback_rate(card);
 -	sam_freq = as_type_i_desc.tSamFreq[0];
 -	memcpy(sam_freq, &rate, 3);
--
++	struct f_uac1 *uac1 = func_to_uac1(f);
+ 
 -	/* Todo: Set Sample bits and other parameters */
 +	uac1->as_out_alt = 0;
 +	uac1->as_in_alt = 0;
@@ -830550,7 +835856,8 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +			audio->out_ep->desc = &as_out_ep_desc;
 +			audio->out_ep->comp_desc = &ss_as_out_ep_comp_desc;
 +		}
-+
+ 
+-	status = -ENOMEM;
 +		if(ENABLE_MICROPHONE == audio_opts->audio_play_mode ||
 +		   ENABLE_MIC_AND_SPK == audio_opts->audio_play_mode )
 +		{
@@ -830600,8 +835907,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	else if(ENABLE_MIC_AND_SPK == audio_opts->audio_play_mode)
 +	{
 +		audio_iad_descriptor.bInterfaceCount = 3;
- 
--	status = -ENOMEM;
++
 +		if(gadget_is_superspeed(gadget))
 +			f_audio_ss_desc = f_audio_ss_desc_2;
 +
@@ -830683,7 +835989,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  
  static inline struct f_uac1_opts *to_f_uac1_opts(struct config_item *item)
  {
-@@ -781,9 +1095,10 @@ static struct configfs_item_operations f_uac1_item_ops = {
+@@ -781,9 +1113,10 @@ static struct configfs_item_operations f_uac1_item_ops = {
  	.release	= f_uac1_attr_release,
  };
  
@@ -830697,7 +836003,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  {									\
  	struct f_uac1_opts *opts = to_f_uac1_opts(item);		\
  	int result;							\
-@@ -795,7 +1110,8 @@ static ssize_t f_uac1_opts_##name##_show(struct config_item *item,	\
+@@ -795,7 +1128,8 @@ static ssize_t f_uac1_opts_##name##_show(struct config_item *item,	\
  	return result;							\
  }									\
  									\
@@ -830707,7 +836013,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  					  const char *page, size_t len)	\
  {									\
  	struct f_uac1_opts *opts = to_f_uac1_opts(item);		\
-@@ -822,64 +1138,26 @@ end:									\
+@@ -822,64 +1156,26 @@ end:									\
  									\
  CONFIGFS_ATTR(f_uac1_opts_, name)
  
@@ -830790,7 +836096,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	NULL,
  };
  
-@@ -894,12 +1172,6 @@ static void f_audio_free_inst(struct usb_function_instance *f)
+@@ -894,12 +1190,6 @@ static void f_audio_free_inst(struct usb_function_instance *f)
  	struct f_uac1_opts *opts;
  
  	opts = container_of(f, struct f_uac1_opts, func_inst);
@@ -830803,7 +836109,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	kfree(opts);
  }
  
-@@ -917,23 +1189,34 @@ static struct usb_function_instance *f_audio_alloc_inst(void)
+@@ -917,23 +1207,34 @@ static struct usb_function_instance *f_audio_alloc_inst(void)
  	config_group_init_type_name(&opts->func_inst.group, "",
  				    &f_uac1_func_type);
  
@@ -830846,7 +836152,7 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
  	mutex_lock(&opts->lock);
  	--opts->refcnt;
  	mutex_unlock(&opts->lock);
-@@ -941,42 +1224,119 @@ static void f_audio_free(struct usb_function *f)
+@@ -941,42 +1242,129 @@ static void f_audio_free(struct usb_function *f)
  
  static void f_audio_unbind(struct usb_configuration *c, struct usb_function *f)
  {
@@ -830871,7 +836177,11 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	{
 +		case UAC_FU_VOLUME:
 +			uac1->g_audio.volume = UAC_VOLUME_ATTR_TO_DB(value);
-+			g_audio_notify(&uac1->g_audio);
++			g_audio_notify(&uac1->g_audio, E_UAC_CONTROL_TYPE_PLAYBACK_VOLUME);
++			break;
++		case UAC_FU_MUTE:
++			uac1->g_audio.mute = value;
++			g_audio_notify(&uac1->g_audio, E_UAC_CONTROL_TYPE_PLAYBACK_MUTE);
 +			break;
 +		default:
 +			break;
@@ -830910,17 +836220,23 @@ index f2ac0cbc29a4..3169dc3ccab5 100644
 +	list_add(&playback_fu_controls.list,&uac1->cs);
 +
 +	INIT_LIST_HEAD(&capture_fu_controls.control);
++	list_add(&capture_mute_control.list,
++			 &capture_fu_controls.control);
 +	list_add(&capture_volume_control.list,
 +			 &capture_fu_controls.control);
 +
 +	INIT_LIST_HEAD(&playback_fu_controls.control);
++	list_add(&playback_mute_control.list,
++		 &playback_fu_controls.control);
 +	list_add(&playback_volume_control.list,
 +		 &playback_fu_controls.control);
 +
++	capture_mute_control.data[UAC__CUR] = 0;
 +	capture_volume_control.data[UAC__CUR] = DB_TO_UAC_VOLUME_ATTR(CAPTURE_VOLUME_CUR);
 +	capture_volume_control.data[UAC__MIN] = DB_TO_UAC_VOLUME_ATTR(CAPTURE_VOLUME_MIN);
 +	capture_volume_control.data[UAC__MAX] = DB_TO_UAC_VOLUME_ATTR(CAPTURE_VOLUME_MAX);
 +	capture_volume_control.data[UAC__RES] = DB_TO_UAC_VOLUME_ATTR(CAPTURE_VOLUME_STEP);
++	playback_mute_control.data[UAC__CUR] = 0;
 +	playback_volume_control.data[UAC__CUR] = 0xffc0;
 +	playback_volume_control.data[UAC__MIN] = 0xe3a0;
 +	playback_volume_control.data[UAC__MAX] = 0xfff0;
@@ -834164,7 +839480,7 @@ index 969cfe741380..ff0f118e0340
 diff --git a/drivers/usb/gadget/function/f_uvc.c b/drivers/usb/gadget/function/f_uvc.c
 old mode 100644
 new mode 100755
-index f8a1881609a2..01d1e6124e66
+index f8a1881609a2..56fae26b2238
 --- a/drivers/usb/gadget/function/f_uvc.c
 +++ b/drivers/usb/gadget/function/f_uvc.c
 @@ -2,7 +2,7 @@
@@ -834445,8 +839761,11 @@ index f8a1881609a2..01d1e6124e66
  	}
  }
  
-@@ -232,14 +422,17 @@ uvc_function_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+@@ -230,16 +420,20 @@ static int
+ uvc_function_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+ {
  	struct uvc_device *uvc = to_uvc(f);
++	struct f_uvc_opts *opts = fi_to_f_uvc_opts(f->fi);
  	struct v4l2_event v4l2_event;
  	struct uvc_event *uvc_event = (void *)&v4l2_event.u.data;
 +#ifdef CONFIG_SS_GADGET_UVC_MULTI_STREAM
@@ -834468,7 +839787,7 @@ index f8a1881609a2..01d1e6124e66
  		return -EINVAL;
  	}
  
-@@ -256,7 +449,26 @@ uvc_function_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+@@ -256,7 +450,57 @@ uvc_function_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
  	memset(&v4l2_event, 0, sizeof(v4l2_event));
  	v4l2_event.type = UVC_EVENT_SETUP;
  	memcpy(&uvc_event->req, ctrl, sizeof(uvc_event->req));
@@ -834491,11 +839810,42 @@ index f8a1881609a2..01d1e6124e66
 +	}
 +#else
  	v4l2_event_queue(&uvc->vdev, &v4l2_event);
++#endif
++
++	/* for bulk device, stream on/off all trigger by UVC_VS_COMMIT_CONTROL */
++#ifdef CONFIG_SS_GADGET_UVC_MULTI_STREAM
++	list_for_each_entry(stream, &uvc->streams, list) {
++		if ((le16_to_cpu(ctrl->wValue) >> 8) == UVC_VS_COMMIT_CONTROL
++				&& ctrl->bRequest == UVC_SET_CUR
++				&& (le16_to_cpu(ctrl->wIndex) & 0xff) == stream->streaming_intf
++				&& opts->bulk_streaming_ep) {
++			uvcg_info(f, "reset UVC\n");
++			if (stream->state == UVC_STATE_STREAMING)
++				uvcg_queue_cancel(&stream->video.queue, 1);
++			usb_ep_disable(stream->video.ep);
++			config_ep_by_speed(f->config->cdev->gadget,
++							&(uvc->func), stream->video.ep);
++			usb_ep_enable(stream->video.ep);
++		}
++	}
++#else
++	if ((le16_to_cpu(ctrl->wValue) >> 8) == UVC_VS_COMMIT_CONTROL
++			&& ctrl->bRequest == UVC_SET_CUR
++			&& (le16_to_cpu(ctrl->wIndex) & 0xff) == uvc->streaming_intf
++			&& opts->bulk_streaming_ep) {
++		uvcg_info(f, "reset UVC\n");
++		if (uvc->state == UVC_STATE_STREAMING)
++			uvcg_queue_cancel(&uvc->video.queue, 1);
++		usb_ep_disable(uvc->video.ep);
++		config_ep_by_speed(f->config->cdev->gadget,
++						&(uvc->func), uvc->video.ep);
++		usb_ep_enable(uvc->video.ep);
++	}
 +#endif
  
  	return 0;
  }
-@@ -272,17 +484,40 @@ static int
+@@ -272,17 +516,40 @@ static int
  uvc_function_get_alt(struct usb_function *f, unsigned interface)
  {
  	struct uvc_device *uvc = to_uvc(f);
@@ -834538,7 +839888,7 @@ index f8a1881609a2..01d1e6124e66
  static int
  uvc_function_set_alt(struct usb_function *f, unsigned interface, unsigned alt)
  {
-@@ -290,22 +525,188 @@ uvc_function_set_alt(struct usb_function *f, unsigned interface, unsigned alt)
+@@ -290,22 +557,192 @@ uvc_function_set_alt(struct usb_function *f, unsigned interface, unsigned alt)
  	struct usb_composite_dev *cdev = f->config->cdev;
  	struct v4l2_event v4l2_event;
  	struct uvc_event *uvc_event = (void *)&v4l2_event.u.data;
@@ -834557,7 +839907,9 @@ index f8a1881609a2..01d1e6124e66
 -		INFO(cdev, "reset UVC Control\n");
 -		usb_ep_disable(uvc->control_ep);
 +		uvcg_info(f, "reset UVC Control\n");
-+
+ 
+-		if (!uvc->control_ep->desc)
+-			if (config_ep_by_speed(cdev->gadget, f, uvc->control_ep))
 +		if (interrupt_ep_enable) {
 +			usb_ep_disable(uvc->control_ep);
 +
@@ -834578,9 +839930,7 @@ index f8a1881609a2..01d1e6124e66
 +				stream->state = UVC_STATE_CONNECTED;
 +			}
 +		}
- 
--		if (!uvc->control_ep->desc)
--			if (config_ep_by_speed(cdev->gadget, f, uvc->control_ep))
++
 +		return 0;
 +	}
 +
@@ -834595,6 +839945,7 @@ index f8a1881609a2..01d1e6124e66
 +
 +		if (opts->bulk_streaming_ep)
 +		{
++#if 0
 +			switch (stream->state) {
 +			case UVC_STATE_CONNECTED:
 +				if (stream->video.ep) {
@@ -834625,6 +839976,9 @@ index f8a1881609a2..01d1e6124e66
 +			default:
  				return -EINVAL;
 +			}
++#else
++			return alt ? -EINVAL : 0;
++#endif
 +		}
 +		else
 +		{
@@ -834714,7 +840068,8 @@ index f8a1881609a2..01d1e6124e66
 +	int ret;
 +	struct f_uvc_opts *opts = fi_to_f_uvc_opts(f->fi);
 +	uvcg_info(f, "%s(%u, %u)\n", __func__, interface, alt);
-+
+ 
+-		usb_ep_enable(uvc->control_ep);
 +	if (interface == uvc->control_intf) {
 +		if (alt)
 +			return -EINVAL;
@@ -834723,8 +840078,7 @@ index f8a1881609a2..01d1e6124e66
 +
 +		if (interrupt_ep_enable) {
 +			usb_ep_disable(uvc->control_ep);
- 
--		usb_ep_enable(uvc->control_ep);
++
 +			if (!uvc->control_ep->desc)
 +				if (config_ep_by_speed(cdev->gadget, f, uvc->control_ep))
 +					return -EINVAL;
@@ -834734,7 +840088,7 @@ index f8a1881609a2..01d1e6124e66
  
  		if (uvc->state == UVC_STATE_DISCONNECTED) {
  			memset(&v4l2_event, 0, sizeof(v4l2_event));
-@@ -322,68 +723,146 @@ uvc_function_set_alt(struct usb_function *f, unsigned interface, unsigned alt)
+@@ -322,68 +759,150 @@ uvc_function_set_alt(struct usb_function *f, unsigned interface, unsigned alt)
  	if (interface != uvc->streaming_intf)
  		return -EINVAL;
  
@@ -834744,6 +840098,7 @@ index f8a1881609a2..01d1e6124e66
 -	*/
 +	if (opts->bulk_streaming_ep)
 +	{
++#if 0
 +		switch (uvc->state) {
 +		case UVC_STATE_CONNECTED:
 +			if (uvc->video.ep) {
@@ -834777,6 +840132,9 @@ index f8a1881609a2..01d1e6124e66
 +		default:
 +			return -EINVAL;
 +		}
++#else
++		return alt ? -EINVAL : 0;
++#endif
 +	}
 +	else
 +	{
@@ -834914,7 +840272,7 @@ index f8a1881609a2..01d1e6124e66
  }
  
  /* --------------------------------------------------------------------------
-@@ -393,32 +872,96 @@ uvc_function_disable(struct usb_function *f)
+@@ -393,32 +912,96 @@ uvc_function_disable(struct usb_function *f)
  void
  uvc_function_connect(struct uvc_device *uvc)
  {
@@ -834923,12 +840281,12 @@ index f8a1881609a2..01d1e6124e66
 +#ifdef CONFIG_SS_GADGET_UVC_MULTI_STREAM
 +	struct uvc_streaming *stream;
 +	unsigned int n_active = 0;
- 
++
 +	if (uvc->func.config->cdev->deactivations == 0) {
 +		uvcg_info(&uvc->func, "May be other stream has connected done\n");
 +		return;
 +	}
-+
+ 
 +	if (uvc->nstreams) {
 +		list_for_each_entry(stream, &uvc->streams, list) {
 +			if (stream->active)
@@ -835015,7 +840373,7 @@ index f8a1881609a2..01d1e6124e66
  	/* TODO reference counting. */
  	uvc->vdev.v4l2_dev = &uvc->v4l2_dev;
  	uvc->vdev.fops = &uvc_v4l2_fops;
-@@ -426,11 +969,23 @@ uvc_register_video(struct uvc_device *uvc)
+@@ -426,11 +1009,23 @@ uvc_register_video(struct uvc_device *uvc)
  	uvc->vdev.release = video_device_release_empty;
  	uvc->vdev.vfl_dir = VFL_DIR_TX;
  	uvc->vdev.lock = &uvc->video.mutex;
@@ -835040,7 +840398,7 @@ index f8a1881609a2..01d1e6124e66
  }
  
  #define UVC_COPY_DESCRIPTOR(mem, dst, desc) \
-@@ -449,7 +1004,244 @@ uvc_register_video(struct uvc_device *uvc)
+@@ -449,7 +1044,244 @@ uvc_register_video(struct uvc_device *uvc)
  			mem += (*__src)->bLength; \
  		} \
  	} while (0)
@@ -835187,7 +840545,7 @@ index f8a1881609a2..01d1e6124e66
 +		uvcg_info(&uvc->func, "(%d)n_desc:%d bytes:%d control_size:%d fs_streaming_size:%d hs_streaming_size:%d ss_streaming_size:%d\n",
 +                 __LINE__, n_desc, bytes, control_size, stream->fs_streaming_size, stream->hs_streaming_size, stream->ss_streaming_size);
 +#endif
-+
+ 
 +		index++;
 +	}
 +
@@ -835198,7 +840556,7 @@ index f8a1881609a2..01d1e6124e66
 +	hdr = mem;
 +	dst = mem;
 +	mem += (n_desc + 1) * sizeof(*src);
- 
++
 +	/* Copy the descriptors. */
 +	UVC_COPY_DESCRIPTOR(mem, dst, &uvc_iad);
 +	UVC_COPY_DESCRIPTOR(mem, dst, &uvc_control_intf);
@@ -835285,7 +840643,7 @@ index f8a1881609a2..01d1e6124e66
  static struct usb_descriptor_header **
  uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
  {
-@@ -467,24 +1259,33 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
+@@ -467,24 +1299,33 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
  	unsigned int bytes;
  	void *mem;
  
@@ -835322,7 +840680,7 @@ index f8a1881609a2..01d1e6124e66
  		break;
  	}
  
-@@ -504,28 +1305,39 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
+@@ -504,28 +1345,39 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
  	 * uvc_{fs|hs}_streaming
  	 */
  
@@ -835371,7 +840729,7 @@ index f8a1881609a2..01d1e6124e66
  		streaming_size += (*src)->bLength;
  		bytes += (*src)->bLength;
  		n_desc++;
-@@ -554,12 +1366,14 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
+@@ -554,12 +1406,14 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
  	uvc_control_header->bInCollection = 1;
  	uvc_control_header->baInterfaceNr[0] = uvc->streaming_intf;
  
@@ -835391,12 +840749,13 @@ index f8a1881609a2..01d1e6124e66
  
  	uvc_streaming_header = mem;
  	UVC_COPY_DESCRIPTORS(mem, dst,
-@@ -572,7 +1386,596 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
+@@ -572,7 +1426,599 @@ uvc_copy_descriptors(struct uvc_device *uvc, enum usb_device_speed speed)
  	*dst = NULL;
  	return hdr;
  }
 +#endif
 +
++#if 0
 +int uvc_function_stop(struct usb_function *f,bool streamoff)
 +{
 +	struct uvc_device *uvc = to_uvc(f);
@@ -835493,6 +840852,7 @@ index f8a1881609a2..01d1e6124e66
 +{
 +	uvc_function_start(f,true);
 +}
++#endif
 +
 +static inline int config_streaming_desc(struct usb_interface_descriptor *intf,
 +		struct usb_endpoint_descriptor *fs_desc, struct usb_endpoint_descriptor *hs_desc,
@@ -835753,6 +841113,7 @@ index f8a1881609a2..01d1e6124e66
 +			mutex_init(&stream->video.mutex);
 +			if (opts->bulk_streaming_ep)
 +			{
++				uvc_fs_bulk_streaming_ep.wMaxPacketSize = opts->streaming_maxpacket[index - 1];
 +				ep = usb_ep_autoconfig(cdev->gadget,
 +				&uvc_fs_bulk_streaming_ep);
 +			}
@@ -835988,7 +841349,7 @@ index f8a1881609a2..01d1e6124e66
  static int
  uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
  {
-@@ -585,21 +1988,30 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
+@@ -585,21 +2031,30 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
  	struct f_uvc_opts *opts;
  	int ret = -EINVAL;
  
@@ -836027,7 +841388,7 @@ index f8a1881609a2..01d1e6124e66
  	}
  
  	/* Fill in the FS/HS/SS Video Streaming specific descriptors from the
-@@ -614,52 +2026,96 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
+@@ -614,52 +2069,96 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
  	} else if (opts->streaming_maxpacket <= 2048) {
  		max_packet_mult = 2;
  		max_packet_size = opts->streaming_maxpacket / 2;
@@ -836156,7 +841517,7 @@ index f8a1881609a2..01d1e6124e66
  
  	us = usb_gstrings_attach(cdev, uvc_function_strings,
  				 ARRAY_SIZE(uvc_en_us_strings));
-@@ -667,12 +2123,18 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
+@@ -667,12 +2166,18 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
  		ret = PTR_ERR(us);
  		goto error;
  	}
@@ -836177,7 +841538,7 @@ index f8a1881609a2..01d1e6124e66
  	/* Allocate interface IDs. */
  	if ((ret = usb_interface_id(c, f)) < 0)
  		goto error;
-@@ -682,10 +2144,23 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
+@@ -682,10 +2187,23 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
  
  	if ((ret = usb_interface_id(c, f)) < 0)
  		goto error;
@@ -836203,7 +841564,7 @@ index f8a1881609a2..01d1e6124e66
  	/* Copy descriptors */
  	f->fs_descriptors = uvc_copy_descriptors(uvc, USB_SPEED_FULL);
  	if (IS_ERR(f->fs_descriptors)) {
-@@ -723,19 +2198,19 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
+@@ -723,19 +2241,19 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f)
  	uvc->control_req->context = uvc;
  
  	if (v4l2_device_register(&cdev->gadget->dev, &uvc->v4l2_dev)) {
@@ -836226,7 +841587,7 @@ index f8a1881609a2..01d1e6124e66
  		goto error;
  	}
  
-@@ -751,6 +2226,7 @@ error:
+@@ -751,6 +2269,7 @@ error:
  	usb_free_all_descriptors(f);
  	return ret;
  }
@@ -836234,7 +841595,7 @@ index f8a1881609a2..01d1e6124e66
  
  /* --------------------------------------------------------------------------
   * USB gadget function
-@@ -845,9 +2321,10 @@ static struct usb_function_instance *uvc_alloc_inst(void)
+@@ -845,9 +2364,10 @@ static struct usb_function_instance *uvc_alloc_inst(void)
  	opts->ss_control =
  		(const struct uvc_descriptor_header * const *)ctl_cls;
  
@@ -836246,7 +841607,7 @@ index f8a1881609a2..01d1e6124e66
  	uvcg_attach_configfs(opts);
  	return &opts->func_inst;
  }
-@@ -856,7 +2333,7 @@ static void uvc_free(struct usb_function *f)
+@@ -856,7 +2376,7 @@ static void uvc_free(struct usb_function *f)
  {
  	struct uvc_device *uvc = to_uvc(f);
  	struct f_uvc_opts *opts = container_of(f->fi, struct f_uvc_opts,
@@ -836255,7 +841616,7 @@ index f8a1881609a2..01d1e6124e66
  	--opts->refcnt;
  	kfree(uvc);
  }
-@@ -865,11 +2342,28 @@ static void uvc_unbind(struct usb_configuration *c, struct usb_function *f)
+@@ -865,11 +2385,28 @@ static void uvc_unbind(struct usb_configuration *c, struct usb_function *f)
  {
  	struct usb_composite_dev *cdev = c->cdev;
  	struct uvc_device *uvc = to_uvc(f);
@@ -836287,7 +841648,7 @@ index f8a1881609a2..01d1e6124e66
  
  	usb_ep_free_request(cdev->gadget->ep0, uvc->control_req);
  	kfree(uvc->control_buf);
-@@ -887,8 +2381,12 @@ static struct usb_function *uvc_alloc(struct usb_function_instance *fi)
+@@ -887,8 +2424,12 @@ static struct usb_function *uvc_alloc(struct usb_function_instance *fi)
  	if (uvc == NULL)
  		return ERR_PTR(-ENOMEM);
  
@@ -836300,7 +841661,7 @@ index f8a1881609a2..01d1e6124e66
  	opts = fi_to_f_uvc_opts(fi);
  
  	mutex_lock(&opts->lock);
-@@ -920,11 +2418,17 @@ static struct usb_function *uvc_alloc(struct usb_function_instance *fi)
+@@ -920,11 +2461,19 @@ static struct usb_function *uvc_alloc(struct usb_function_instance *fi)
  	uvc->func.name = "uvc";
  	uvc->func.bind = uvc_function_bind;
  	uvc->func.unbind = uvc_unbind;
@@ -836310,20 +841671,22 @@ index f8a1881609a2..01d1e6124e66
  	uvc->func.disable = uvc_function_disable;
  	uvc->func.setup = uvc_function_setup;
  	uvc->func.free_func = uvc_free;
++#if 0
 +	if (opts->bulk_streaming_ep)
 +	{
 +		uvc->func.suspend = uvc_function_suspend;
 +		uvc->func.resume = uvc_function_resume;
 +	}
++#endif
  	uvc->func.bind_deactivated = true;
  
  	return &uvc->func;
 diff --git a/drivers/usb/gadget/function/u_audio.c b/drivers/usb/gadget/function/u_audio.c
 new file mode 100755
-index 000000000000..4ec86fd43d37
+index 000000000000..161b5c432045
 --- /dev/null
 +++ b/drivers/usb/gadget/function/u_audio.c
-@@ -0,0 +1,683 @@
+@@ -0,0 +1,723 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/*
 + * u_audio.c -- interface to USB gadget "ALSA sound card" utilities
@@ -836349,6 +841712,36 @@ index 000000000000..4ec86fd43d37
 +#define PRD_SIZE_MAX	PAGE_SIZE
 +#define MIN_PERIODS	4
 +
++static int snd_uac_pcm_mute_info(struct snd_kcontrol *kcontrol,
++				   struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++	uinfo->value.integer.step = 1;
++	return 0;
++}
++
++static int snd_uac_pcm_mute_get(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_value *ucontrol)
++{
++	struct g_audio *g_audio= (struct g_audio *)kcontrol->private_data;
++	int value = g_audio->mute;
++	ucontrol->value.integer.value[0] = value;
++	return 0;
++}
++
++static struct snd_kcontrol_new snd_uac_pcm_mute = {
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name = "Playback Mute Control",
++	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
++	.index = E_UAC_CONTROL_TYPE_PLAYBACK_MUTE,
++	.info = snd_uac_pcm_mute_info,
++	.get = snd_uac_pcm_mute_get,
++	.put = NULL,
++};
++
 +static int snd_uac_pcm_vol_info(struct snd_kcontrol *kcontrol,
 +				   struct snd_ctl_elem_info *uinfo)
 +{
@@ -836369,22 +841762,14 @@ index 000000000000..4ec86fd43d37
 +	return 0;
 +}
 +
-+static int snd_uac_pcm_vol_put(struct snd_kcontrol *kcontrol,
-+				  struct snd_ctl_elem_value *ucontrol)
-+{
-+	int value;
-+	value = ucontrol->value.integer.value[0];
-+	return 0;
-+}
-+
 +static struct snd_kcontrol_new snd_uac_pcm_volume = {
 +	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
-+	.name = "Capture Volume Control",
++	.name = "Playback Volume Control",
 +	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
-+	.index = 0,
++	.index = E_UAC_CONTROL_TYPE_PLAYBACK_VOLUME,
 +	.info = snd_uac_pcm_vol_info,
 +	.get = snd_uac_pcm_vol_get,
-+	.put = snd_uac_pcm_vol_put,
++	.put = NULL,
 +};
 +
 +struct uac_req {
@@ -836429,13 +841814,27 @@ index 000000000000..4ec86fd43d37
 +	unsigned int p_framesize;
 +
 +	struct snd_kcontrol *volume_ctl;
++	struct snd_kcontrol *mute_ctl;
 +};
 +
-+void g_audio_notify(struct g_audio *g_audio)
++void g_audio_notify(struct g_audio *g_audio, int index)
 +{
 +	struct snd_card *card = g_audio->uac->card;
-+	struct snd_kcontrol *ctl = g_audio->uac->volume_ctl;
-+	snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE, &ctl->id);
++	struct snd_kcontrol *ctl;
++
++	switch(index) {
++	case E_UAC_CONTROL_TYPE_PLAYBACK_MUTE:
++		ctl = g_audio->uac->mute_ctl;
++		snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE, &ctl->id);
++		break;
++	case E_UAC_CONTROL_TYPE_PLAYBACK_VOLUME:
++		ctl = g_audio->uac->volume_ctl;
++		snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE, &ctl->id);
++		break;
++	default:
++		dev_err(g_audio->uac->card->dev, "%d Error!\n", __LINE__);
++		break;
++	}
 +}
 +EXPORT_SYMBOL_GPL(g_audio_notify);
 +
@@ -836965,6 +842364,10 @@ index 000000000000..4ec86fd43d37
 +	if ((err = snd_ctl_add(card, uac->volume_ctl)) < 0)
 +		return err;
 +
++	uac->mute_ctl = snd_ctl_new1(&snd_uac_pcm_mute, g_audio);
++	if ((err = snd_ctl_add(card, uac->mute_ctl)) < 0)
++		return err;
++
 +	err = snd_card_register(card);
 +
 +	if (!err)
@@ -837009,10 +842412,10 @@ index 000000000000..4ec86fd43d37
 +MODULE_AUTHOR("Ruslan Bilovol");
 diff --git a/drivers/usb/gadget/function/u_audio.h b/drivers/usb/gadget/function/u_audio.h
 new file mode 100755
-index 000000000000..8caf63363775
+index 000000000000..05ee95b40602
 --- /dev/null
 +++ b/drivers/usb/gadget/function/u_audio.h
-@@ -0,0 +1,103 @@
+@@ -0,0 +1,109 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/*
 + * u_audio.h -- interface to USB gadget "ALSA sound card" utilities
@@ -837061,6 +842464,7 @@ index 000000000000..8caf63363775
 +
 +	struct uac_params params;
 +
++	int mute;
 +	int volume ;
 +};
 +
@@ -837094,7 +842498,7 @@ index 000000000000..8caf63363775
 + *
 + * Returns zero on success, or a negative error on failure.
 + */
-+void g_audio_notify(struct g_audio *g_audio);
++void g_audio_notify(struct g_audio *g_audio, int index);
 +int g_audio_setup(struct g_audio *g_audio, const char *pcm_name,
 +					const char *card_name);
 +void g_audio_cleanup(struct g_audio *g_audio);
@@ -837104,6 +842508,11 @@ index 000000000000..8caf63363775
 +int u_audio_start_playback(struct g_audio *g_audio);
 +void u_audio_stop_playback(struct g_audio *g_audio);
 +
++typedef enum {
++	E_UAC_CONTROL_TYPE_PLAYBACK_MUTE,
++	E_UAC_CONTROL_TYPE_PLAYBACK_VOLUME,
++	E_UAC_CONTROL_TYPE_MAX,
++} ST_UAC_ControlType_e;
 +
 +#define UAC_VOLUME_STEP		(256)
 +#define CAPTURE_VOLUME_ID 	(0)
@@ -840380,7 +845789,7 @@ index f4ccbd56f4d2..5d2f72493913
 diff --git a/drivers/usb/gadget/function/uvc_video.c b/drivers/usb/gadget/function/uvc_video.c
 old mode 100644
 new mode 100755
-index 0f01c04d7cbd..22f712d52fd8
+index 0f01c04d7cbd..cd9f4394043f
 --- a/drivers/usb/gadget/function/uvc_video.c
 +++ b/drivers/usb/gadget/function/uvc_video.c
 @@ -18,26 +18,179 @@
@@ -840394,6 +845803,8 @@ index 0f01c04d7cbd..22f712d52fd8
  #include "uvc_video.h"
 +#include "u_uvc.h"
 +
++#define UVC_HEADER_LEN 12
++
 +extern bool using_cma_buf;
  
  /* --------------------------------------------------------------------------
@@ -840405,8 +845816,6 @@ index 0f01c04d7cbd..22f712d52fd8
 +uvc_video_encode_header_sgt(struct uvc_video *video, struct uvc_buffer *buf,
 +		struct usb_request *req, int len)
 +{
-+#define UVC_HEADER_LEN 12
-+
 +	char *data = req->buf;
 +#if defined(CONFIG_UVC_STREAM_ERR_SUPPORT)
 +	struct uvc_video_queue *queue = &video->queue;
@@ -840522,7 +845931,7 @@ index 0f01c04d7cbd..22f712d52fd8
 +#endif
  
 -	if (buf->bytesused - video->queue.buf_used <= len - 2)
-+	data[0] = 12;
++	data[0] = UVC_HEADER_LEN;
 +	data[1] = UVC_STREAM_EOH | video->fid;
 +	data[2] = 0;
 +	data[3] = 0;
@@ -840536,9 +845945,9 @@ index 0f01c04d7cbd..22f712d52fd8
 +	data[11] = 0;
 +
 +#if defined(CONFIG_SS_GADGET) ||defined(CONFIG_SS_GADGET_MODULE)
-+	if ((buf->bytesused - video->queue.buf_used <= len - 12) && (buf->bFrameEnd))
++	if ((buf->bytesused - video->queue.buf_used <= len - UVC_HEADER_LEN) && (buf->bFrameEnd))
 +#else
-+	if (buf->bytesused - video->queue.buf_used <= len - 12)
++	if (buf->bytesused - video->queue.buf_used <= len - UVC_HEADER_LEN)
 +#endif
 +	{
  		data[1] |= UVC_STREAM_EOF;
@@ -840563,7 +845972,7 @@ index 0f01c04d7cbd..22f712d52fd8
 +	}
  
 -	return 2;
-+	return 12;
++	return UVC_HEADER_LEN;
  }
  
  static int
@@ -840575,7 +845984,35 @@ index 0f01c04d7cbd..22f712d52fd8
  static void
  uvc_video_encode_bulk(struct usb_request *req, struct uvc_video *video,
  		struct uvc_buffer *buf)
-@@ -88,7 +242,8 @@ uvc_video_encode_bulk(struct usb_request *req, struct uvc_video *video,
+@@ -74,21 +228,34 @@ uvc_video_encode_bulk(struct usb_request *req, struct uvc_video *video,
+ 		len -= ret;
+ 	}
+ 
++#if defined(CONFIG_SS_GADGET) || defined(CONFIG_SS_GADGET_MODULE)
++	if ((buf->bytesused - video->queue.buf_used + UVC_HEADER_LEN) <= video->max_payload_size
++			&& (buf->bytesused - video->queue.buf_used + UVC_HEADER_LEN) % video->ep->maxpacket == 0) {
++		char *data = req->buf;
++		len = buf->bytesused - video->queue.buf_used - 32;
++		ret = uvc_video_encode_data(video, buf, mem, len);
++		req->length = ret + UVC_HEADER_LEN;
++		video->payload_size = 0;
++		data[1] &= ~UVC_STREAM_EOF;
++		return;
++	}
++#endif
++
+ 	/* Process video data. */
+ 	len = min((int)(video->max_payload_size - video->payload_size), len);
+ 	ret = uvc_video_encode_data(video, buf, mem, len);
+-
+ 	video->payload_size += ret;
+ 	len -= ret;
+ 
+ 	req->length = video->req_size - len;
+-	req->zero = video->payload_size == video->max_payload_size;
++	//req->zero = video->payload_size == video->max_payload_size;
+ 
+ 	if (buf->bytesused == video->queue.buf_used) {
  		video->queue.buf_used = 0;
  		buf->state = UVC_BUF_STATE_DONE;
  		uvcg_queue_next_buffer(&video->queue, buf);
@@ -840585,7 +846022,7 @@ index 0f01c04d7cbd..22f712d52fd8
  
  		video->payload_size = 0;
  	}
-@@ -97,6 +252,7 @@ uvc_video_encode_bulk(struct usb_request *req, struct uvc_video *video,
+@@ -97,6 +264,7 @@ uvc_video_encode_bulk(struct usb_request *req, struct uvc_video *video,
  	    buf->bytesused == video->queue.buf_used)
  		video->payload_size = 0;
  }
@@ -840593,7 +846030,7 @@ index 0f01c04d7cbd..22f712d52fd8
  
  static void
  uvc_video_encode_isoc(struct usb_request *req, struct uvc_video *video,
-@@ -121,13 +277,66 @@ uvc_video_encode_isoc(struct usb_request *req, struct uvc_video *video,
+@@ -121,13 +289,66 @@ uvc_video_encode_isoc(struct usb_request *req, struct uvc_video *video,
  		video->queue.buf_used = 0;
  		buf->state = UVC_BUF_STATE_DONE;
  		uvcg_queue_next_buffer(&video->queue, buf);
@@ -840660,7 +846097,7 @@ index 0f01c04d7cbd..22f712d52fd8
  
  /*
   * I somehow feel that synchronisation won't be easy to achieve here. We have
-@@ -164,65 +373,77 @@ uvc_video_complete(struct usb_ep *ep, struct usb_request *req)
+@@ -164,65 +385,77 @@ uvc_video_complete(struct usb_ep *ep, struct usb_request *req)
  {
  	struct uvc_video *video = req->context;
  	struct uvc_video_queue *queue = &video->queue;
@@ -840767,7 +846204,7 @@ index 0f01c04d7cbd..22f712d52fd8
  			video->req_buffer[i] = NULL;
  		}
  	}
-@@ -237,18 +458,48 @@ uvc_video_alloc_requests(struct uvc_video *video)
+@@ -237,18 +470,48 @@ uvc_video_alloc_requests(struct uvc_video *video)
  {
  	unsigned int req_size;
  	unsigned int i;
@@ -840787,7 +846224,7 @@ index 0f01c04d7cbd..22f712d52fd8
 +#if defined(CONFIG_SS_GADGET) ||defined(CONFIG_SS_GADGET_MODULE)
 +	if (opts->bulk_streaming_ep)
 +	{
-+		req_size = 50 * 1024;
++		req_size = 16 * 1024;
 +		video->max_payload_size = req_size;
 +	}
 +	else
@@ -840820,7 +846257,7 @@ index 0f01c04d7cbd..22f712d52fd8
  
  		video->req[i] = usb_ep_alloc_request(video->ep, GFP_KERNEL);
  		if (video->req[i] == NULL)
-@@ -259,6 +510,18 @@ uvc_video_alloc_requests(struct uvc_video *video)
+@@ -259,6 +522,18 @@ uvc_video_alloc_requests(struct uvc_video *video)
  		video->req[i]->complete = uvc_video_complete;
  		video->req[i]->context = video;
  
@@ -840839,7 +846276,7 @@ index 0f01c04d7cbd..22f712d52fd8
  		list_add_tail(&video->req[i]->list, &video->req_free);
  	}
  
-@@ -281,11 +544,16 @@ error:
+@@ -281,11 +556,16 @@ error:
   * This function fills the available USB requests (listed in req_free) with
   * video data from the queued buffers.
   */
@@ -840857,7 +846294,7 @@ index 0f01c04d7cbd..22f712d52fd8
  	unsigned long flags;
  	int ret;
  
-@@ -300,7 +568,7 @@ int uvcg_video_pump(struct uvc_video *video)
+@@ -300,7 +580,7 @@ int uvcg_video_pump(struct uvc_video *video)
  		spin_lock_irqsave(&video->req_lock, flags);
  		if (list_empty(&video->req_free)) {
  			spin_unlock_irqrestore(&video->req_lock, flags);
@@ -840866,7 +846303,7 @@ index 0f01c04d7cbd..22f712d52fd8
  		}
  		req = list_first_entry(&video->req_free, struct usb_request,
  					list);
-@@ -311,7 +579,28 @@ int uvcg_video_pump(struct uvc_video *video)
+@@ -311,7 +591,28 @@ int uvcg_video_pump(struct uvc_video *video)
  		 * request, protected by the video queue irqlock.
  		 */
  		spin_lock_irqsave(&queue->irqlock, flags);
@@ -840896,7 +846333,7 @@ index 0f01c04d7cbd..22f712d52fd8
  		if (buf == NULL) {
  			spin_unlock_irqrestore(&queue->irqlock, flags);
  			break;
-@@ -320,21 +609,19 @@ int uvcg_video_pump(struct uvc_video *video)
+@@ -320,21 +621,19 @@ int uvcg_video_pump(struct uvc_video *video)
  		video->encode(req, video, buf);
  
  		/* Queue the USB request */
@@ -840922,7 +846359,7 @@ index 0f01c04d7cbd..22f712d52fd8
  }
  
  /*
-@@ -344,14 +631,24 @@ int uvcg_video_enable(struct uvc_video *video, int enable)
+@@ -344,14 +643,24 @@ int uvcg_video_enable(struct uvc_video *video, int enable)
  {
  	unsigned int i;
  	int ret;
@@ -840949,7 +846386,7 @@ index 0f01c04d7cbd..22f712d52fd8
  		for (i = 0; i < UVC_NUM_REQUESTS; ++i)
  			if (video->req[i])
  				usb_ep_dequeue(video->ep, video->req[i]);
-@@ -364,32 +661,60 @@ int uvcg_video_enable(struct uvc_video *video, int enable)
+@@ -364,32 +673,60 @@ int uvcg_video_enable(struct uvc_video *video, int enable)
  	if ((ret = uvcg_queue_enable(&video->queue, 1)) < 0)
  		return ret;
  
@@ -841710,6 +847147,353 @@ index 6da7316f8e87..4544b249d1a6 100644
  
  module_param_named(bDeviceClass,    gfs_dev_desc.bDeviceClass,    byte,   0644);
  MODULE_PARM_DESC(bDeviceClass, "USB Device class");
+diff --git a/drivers/usb/gadget/legacy/hid.c b/drivers/usb/gadget/legacy/hid.c
+index a71a884f79fc..7b92258df766 100644
+--- a/drivers/usb/gadget/legacy/hid.c
++++ b/drivers/usb/gadget/legacy/hid.c
+@@ -1,14 +1,10 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+  * hid.c -- HID Composite driver
+  *
+  * Based on multi.c
+  *
+  * Copyright (C) 2010 Fabien Chouteau <fabien.chouteau@barco.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+  */
+ 
+ 
+@@ -24,6 +20,168 @@
+ 
+ #include "u_hid.h"
+ 
++
++static char *hid_mode = "";
++module_param(hid_mode, charp, S_IRUGO|S_IWUSR);
++MODULE_PARM_DESC(hid_mode, "you can choose: key, mouse, composite");
++
++
++/****************************** User define ******************************/
++
++static struct hidg_func_descriptor hidg_composite_pdata[] = {
++	[0] = {
++		.subclass		= 0,
++		.protocol		= 1,
++		.report_length		= 8,
++		.report_desc_length	= 63,
++		.report_desc		= {
++			0x05, 0x01,	/* USAGE_PAGE (Generic Desktop)	          */
++			0x09, 0x06,	/* USAGE (Keyboard)                       */
++			0xa1, 0x01,	/* COLLECTION (Application)               */
++			0x05, 0x07,	/*   USAGE_PAGE (Keyboard)                */
++			0x19, 0xe0,	/*   USAGE_MINIMUM (Keyboard LeftControl) */
++			0x29, 0xe7,	/*   USAGE_MAXIMUM (Keyboard Right GUI)   */
++			0x15, 0x00,	/*   LOGICAL_MINIMUM (0)                  */
++			0x25, 0x01,	/*   LOGICAL_MAXIMUM (1)                  */
++			0x75, 0x01,	/*   REPORT_SIZE (1)                      */
++			0x95, 0x08,	/*   REPORT_COUNT (8)                     */
++			0x81, 0x02,	/*   INPUT (Data,Var,Abs)                 */
++			0x95, 0x01,	/*   REPORT_COUNT (1)                     */
++			0x75, 0x08,	/*   REPORT_SIZE (8)                      */
++			0x81, 0x03,	/*   INPUT (Cnst,Var,Abs)                 */
++			0x95, 0x05,	/*   REPORT_COUNT (5)                     */
++			0x75, 0x01,	/*   REPORT_SIZE (1)                      */
++			0x05, 0x08,	/*   USAGE_PAGE (LEDs)                    */
++			0x19, 0x01,	/*   USAGE_MINIMUM (Num Lock)             */
++			0x29, 0x05,	/*   USAGE_MAXIMUM (Kana)                 */
++			0x91, 0x02,	/*   OUTPUT (Data,Var,Abs)                */
++			0x95, 0x01,	/*   REPORT_COUNT (1)                     */
++			0x75, 0x03,	/*   REPORT_SIZE (3)                      */
++			0x91, 0x03,	/*   OUTPUT (Cnst,Var,Abs)                */
++			0x95, 0x06,	/*   REPORT_COUNT (6)                     */
++			0x75, 0x08,	/*   REPORT_SIZE (8)                      */
++			0x15, 0x00,	/*   LOGICAL_MINIMUM (0)                  */
++			0x25, 0x65,	/*   LOGICAL_MAXIMUM (101)                */
++			0x05, 0x07,	/*   USAGE_PAGE (Keyboard)                */
++			0x19, 0x00,	/*   USAGE_MINIMUM (Reserved)             */
++			0x29, 0x65,	/*   USAGE_MAXIMUM (Keyboard Application) */
++			0x81, 0x00,	/*   INPUT (Data,Ary,Abs)                 */
++			0xc0		/* END_COLLECTION                         */
++		}
++	},
++
++	[1] = {
++		.subclass		= 0,
++		.protocol		= 2,
++		.report_length		= 4,
++		.report_desc_length	= 46,
++		.report_desc		= {
++			0x05,0x01,	/*Usage Page (Generic Desktop Controls)*/
++			0x09,0x02,	/*Usage (Mouse)*/
++			0xa1,0x01,	/*Collction (Application)*/
++			0x09,0x01,	/*Usage (pointer)*/
++			0xa1,0x00,	/*Collction (Physical)*/
++			0x05,0x09,	/*Usage Page (Button)*/
++			0x19,0x01,	/*Usage Minimum(1)*/
++			0x29,0x03,	/*Usage Maximum(3) */
++			0x15,0x00,	/*Logical Minimum(1)*/
++			0x25,0x01,	/*Logical Maximum(1)*/
++			0x95,0x08,	/*Report Count(5)  */
++			0x75,0x01,	/*Report Size(1)*/
++			0x81,0x02,	/*Input(Data,Variable,Absolute,BitFiled)*/
++			0x05,0x01,	/*Usage Page (Generic Desktop Controls)*/
++			0x09,0x30,	/*Usage(x)*/
++			0x09,0x31,	/*Usage(y)*/
++			0x09,0x38,	/*Usage(Wheel)*/
++			0x15,0x81,	/*Logical Minimum(-127)*/
++			0x25,0x7f,	/*Logical Maximum(127)*/
++			0x75,0x08,	/*Report Size(8)*/
++			0x95,0x03,	/*Report Count(2)  */
++			0x81,0x06,	/*Input(Data,Variable,Relative,BitFiled)*/
++			0xc0,	/*End Collection*/
++			0xc0	/*End Collection*/
++		}
++	},
++};
++
++static struct hidg_func_descriptor hidg_key_pdata[] = {
++	[0] = {
++		.subclass		= 0,
++		.protocol		= 1,
++		.report_length		= 8,
++		.report_desc_length	= 63,
++		.report_desc		= {
++			0x05, 0x01,	/* USAGE_PAGE (Generic Desktop)	          */
++			0x09, 0x06,	/* USAGE (Keyboard)                       */
++			0xa1, 0x01,	/* COLLECTION (Application)               */
++			0x05, 0x07,	/*   USAGE_PAGE (Keyboard)                */
++			0x19, 0xe0,	/*   USAGE_MINIMUM (Keyboard LeftControl) */
++			0x29, 0xe7,	/*   USAGE_MAXIMUM (Keyboard Right GUI)   */
++			0x15, 0x00,	/*   LOGICAL_MINIMUM (0)                  */
++			0x25, 0x01,	/*   LOGICAL_MAXIMUM (1)                  */
++			0x75, 0x01,	/*   REPORT_SIZE (1)                      */
++			0x95, 0x08,	/*   REPORT_COUNT (8)                     */
++			0x81, 0x02,	/*   INPUT (Data,Var,Abs)                 */
++			0x95, 0x01,	/*   REPORT_COUNT (1)                     */
++			0x75, 0x08,	/*   REPORT_SIZE (8)                      */
++			0x81, 0x03,	/*   INPUT (Cnst,Var,Abs)                 */
++			0x95, 0x05,	/*   REPORT_COUNT (5)                     */
++			0x75, 0x01,	/*   REPORT_SIZE (1)                      */
++			0x05, 0x08,	/*   USAGE_PAGE (LEDs)                    */
++			0x19, 0x01,	/*   USAGE_MINIMUM (Num Lock)             */
++			0x29, 0x05,	/*   USAGE_MAXIMUM (Kana)                 */
++			0x91, 0x02,	/*   OUTPUT (Data,Var,Abs)                */
++			0x95, 0x01,	/*   REPORT_COUNT (1)                     */
++			0x75, 0x03,	/*   REPORT_SIZE (3)                      */
++			0x91, 0x03,	/*   OUTPUT (Cnst,Var,Abs)                */
++			0x95, 0x06,	/*   REPORT_COUNT (6)                     */
++			0x75, 0x08,	/*   REPORT_SIZE (8)                      */
++			0x15, 0x00,	/*   LOGICAL_MINIMUM (0)                  */
++			0x25, 0x65,	/*   LOGICAL_MAXIMUM (101)                */
++			0x05, 0x07,	/*   USAGE_PAGE (Keyboard)                */
++			0x19, 0x00,	/*   USAGE_MINIMUM (Reserved)             */
++			0x29, 0x65,	/*   USAGE_MAXIMUM (Keyboard Application) */
++			0x81, 0x00,	/*   INPUT (Data,Ary,Abs)                 */
++			0xc0		/* END_COLLECTION                         */
++		}
++	},
++};
++
++static struct hidg_func_descriptor hidg_mouse_pdata[] = {
++	[0] = {
++		.subclass		= 0,
++		.protocol		= 2,
++		.report_length		= 4,
++		.report_desc_length	= 46,
++		.report_desc		= {
++			0x05,0x01,	/*Usage Page (Generic Desktop Controls)*/
++			0x09,0x02,	/*Usage (Mouse)*/
++			0xa1,0x01,	/*Collction (Application)*/
++			0x09,0x01,	/*Usage (pointer)*/
++			0xa1,0x00,	/*Collction (Physical)*/
++			0x05,0x09,	/*Usage Page (Button)*/
++			0x19,0x01,	/*Usage Minimum(1)*/
++			0x29,0x03,	/*Usage Maximum(3) */
++			0x15,0x00,	/*Logical Minimum(1)*/
++			0x25,0x01,	/*Logical Maximum(1)*/
++			0x95,0x08,	/*Report Count(5)  */
++			0x75,0x01,	/*Report Size(1)*/
++			0x81,0x02,	/*Input(Data,Variable,Absolute,BitFiled)*/
++			0x05,0x01,	/*Usage Page (Generic Desktop Controls)*/
++			0x09,0x30,	/*Usage(x)*/
++			0x09,0x31,	/*Usage(y)*/
++			0x09,0x38,	/*Usage(Wheel)*/
++			0x15,0x81,	/*Logical Minimum(-127)*/
++			0x25,0x7f,	/*Logical Maximum(127)*/
++			0x75,0x08,	/*Report Size(8)*/
++			0x95,0x03,	/*Report Count(2)  */
++			0x81,0x06,	/*Input(Data,Variable,Relative,BitFiled)*/
++			0xc0,	/*End Collection*/
++			0xc0	/*End Collection*/
++		}
++	},
++};
++
+ /*-------------------------------------------------------------------------*/
+ 
+ #define HIDG_VENDOR_NUM		0x0525	/* XXX NetChip */
+@@ -87,8 +245,6 @@ static struct usb_gadget_strings *dev_strings[] = {
+ 	NULL,
+ };
+ 
+-
+-
+ /****************************** Configurations ******************************/
+ 
+ static int do_config(struct usb_configuration *c)
+@@ -127,7 +283,7 @@ static struct usb_configuration config_driver = {
+ 	.label			= "HID Gadget",
+ 	.bConfigurationValue	= 1,
+ 	/* .iConfiguration = DYNAMIC */
+-	.bmAttributes		= USB_CONFIG_ATT_SELFPOWER,
++	.bmAttributes		= USB_CONFIG_ATT_SELFPOWER | USB_CONFIG_ATT_WAKEUP ,
+ };
+ 
+ /****************************** Gadget Bind ******************************/
+@@ -160,7 +316,6 @@ static int hid_bind(struct usb_composite_dev *cdev)
+ 		hid_opts->report_desc = n->func->report_desc;
+ 	}
+ 
+-
+ 	/* Allocate string descriptor numbers ... note that string
+ 	 * contents can be overridden by the composite_dev glue.
+ 	 */
+@@ -221,6 +376,8 @@ static int hid_unbind(struct usb_composite_dev *cdev)
+ 
+ static int hidg_plat_driver_probe(struct platform_device *pdev)
+ {
++	int i, interface_num;
++
+ 	struct hidg_func_descriptor *func = dev_get_platdata(&pdev->dev);
+ 	struct hidg_func_node *entry;
+ 
+@@ -229,12 +386,25 @@ static int hidg_plat_driver_probe(struct platform_device *pdev)
+ 		return -ENODEV;
+ 	}
+ 
+-	entry = kzalloc(sizeof(*entry), GFP_KERNEL);
++	if(strcmp(hid_mode, "key")==0 || strcmp(hid_mode, "mouse")==0)
++	{
++		interface_num = 1;
++	}
++
++	if(strcmp(hid_mode, "composite")==0)
++	{
++		interface_num = 2;
++	}
++
++	entry = kzalloc(interface_num * sizeof(*entry), GFP_KERNEL);
+ 	if (!entry)
+ 		return -ENOMEM;
+ 
+-	entry->func = func;
+-	list_add_tail(&entry->node, &hidg_func_list);
++	for(i=0; i<interface_num; i++)
++	{
++		entry[i].func = &func[i];
++		list_add_tail(&entry[i].node, &hidg_func_list);
++	}
+ 
+ 	return 0;
+ }
+@@ -254,7 +424,6 @@ static int hidg_plat_driver_remove(struct platform_device *pdev)
+ 
+ /****************************** Some noise ******************************/
+ 
+-
+ static struct usb_composite_driver hidg_driver = {
+ 	.name		= "g_hid",
+ 	.dev		= &device_desc,
+@@ -271,6 +440,29 @@ static struct platform_driver hidg_plat_driver = {
+ 	},
+ };
+ 
++struct platform_device hidg_composite_device = {
++    .name           = "hidg",
++    .id             = 0,
++    .num_resources  = 0,
++    .resource       = 0,
++    .dev.platform_data = hidg_composite_pdata,
++};
++
++struct platform_device hidg_key_device = {
++    .name           = "hidg",
++    .id             = 0,
++    .num_resources  = 0,
++    .resource       = 0,
++    .dev.platform_data = hidg_key_pdata,
++};
++
++struct platform_device hidg_mouse_device = {
++    .name           = "hidg",
++    .id             = 0,
++    .num_resources  = 0,
++    .resource       = 0,
++    .dev.platform_data = hidg_mouse_pdata,
++};
+ 
+ MODULE_DESCRIPTION(DRIVER_DESC);
+ MODULE_AUTHOR("Fabien Chouteau, Peter Korsgaard");
+@@ -280,6 +472,30 @@ static int __init hidg_init(void)
+ {
+ 	int status;
+ 
++	if(strcmp(hid_mode, "composite")==0)
++	{
++		status = platform_device_register(&hidg_composite_device);
++		if (status < 0){
++			return status;
++		}
++	}
++
++	if(strcmp(hid_mode, "key")==0)
++	{
++		status = platform_device_register(&hidg_key_device);
++		if (status < 0){
++			return status;
++		}
++	}
++
++	if(strcmp(hid_mode, "mouse")==0)
++	{
++		status = platform_device_register(&hidg_mouse_device);
++		if (status < 0){
++			return status;
++		}
++	}
++
+ 	status = platform_driver_probe(&hidg_plat_driver,
+ 				hidg_plat_driver_probe);
+ 	if (status < 0)
+@@ -297,5 +513,24 @@ static void __exit hidg_cleanup(void)
+ {
+ 	usb_composite_unregister(&hidg_driver);
+ 	platform_driver_unregister(&hidg_plat_driver);
++	platform_device_unregister(&hidg_composite_device);
++
++	if(strcmp(hid_mode, "composite")==0)
++	{
++		platform_device_unregister(&hidg_composite_device);
++	}
++
++	if(strcmp(hid_mode, "key")==0)
++	{
++		platform_device_unregister(&hidg_key_device);
++	}
++
++	if(strcmp(hid_mode, "mouse")==0)
++	{
++		platform_device_unregister(&hidg_mouse_device);
++	}
++
+ }
+ module_exit(hidg_cleanup);
++
++
 diff --git a/drivers/usb/gadget/legacy/uvc_ait_xu.h b/drivers/usb/gadget/legacy/uvc_ait_xu.h
 new file mode 100755
 index 000000000000..00c84c75d6fb
@@ -841752,7 +847536,7 @@ index 000000000000..00c84c75d6fb
 diff --git a/drivers/usb/gadget/legacy/webcam.c b/drivers/usb/gadget/legacy/webcam.c
 old mode 100644
 new mode 100755
-index f9661cd627c8..4f4f5ee2f7b2
+index f9661cd627c8..98717b131c4d
 --- a/drivers/usb/gadget/legacy/webcam.c
 +++ b/drivers/usb/gadget/legacy/webcam.c
 @@ -2,7 +2,7 @@
@@ -842066,7 +847850,7 @@ index f9661cd627c8..4f4f5ee2f7b2
  	.wTerminalType		= cpu_to_le16(0x0201),
  	.bAssocTerminal		= 0,
  	.iTerminal		= 0,
-@@ -116,240 +317,1408 @@ static const struct uvc_camera_terminal_descriptor uvc_camera_terminal = {
+@@ -116,240 +317,1381 @@ static const struct uvc_camera_terminal_descriptor uvc_camera_terminal = {
  	.wObjectiveFocalLengthMax	= cpu_to_le16(0),
  	.wOcularFocalLength		= cpu_to_le16(0),
  	.bControlSize		= 3,
@@ -842120,10 +847904,8 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bSourceID		= UVC_IT_ID,
  	.wMaxMultiplier		= cpu_to_le16(16*1024),
  	.bControlSize		= 2,
--	.bmControls[0]		= 1,
--	.bmControls[1]		= 0,
-+	.bmControls[0]		= 0xFF,
-+	.bmControls[1]		= 0x7F,
+ 	.bmControls[0]		= 1,
+ 	.bmControls[1]		= 0,
 +#if (USB_VIDEO_CLASS_VERSION==0x150)
 +	.bmControls[2]		= 0,
 +#endif
@@ -842145,15 +847927,15 @@ index f9661cd627c8..4f4f5ee2f7b2
  	.iTerminal		= 0,
 -};
 +}};
- 
--DECLARE_UVC_INPUT_HEADER_DESCRIPTOR(1, 2);
++
 +DECLARE_UVC_INPUT_HEADER_DESCRIPTOR(1, 5);
 +DECLARE_UVC_FRAME_UNCOMPRESSED(3);
 +DECLARE_UVC_FRAME_FRAMEBASE(3);
 +#if (USB_VIDEO_CLASS_VERSION==0x150)
 +DECLARE_UVC_FRAME_H264(3);
 +#endif
-+
+ 
+-DECLARE_UVC_INPUT_HEADER_DESCRIPTOR(1, 2);
 +#define SUPPORT_YUY2
 +#define SUPPORT_NV12
 +#define SUPPORT_MJPG
@@ -842194,7 +847976,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bDescriptorSubType = UVC_VS_FORMAT_UNCOMPRESSED,
  	.bFormatIndex		= 1,
 -	.bNumFrameDescriptors	= 2,
-+	.bNumFrameDescriptors	= 7,
++	.bNumFrameDescriptors	= 6,
  	.guidFormat		=
 -		{ 'Y',  'U',  'Y',  '2', 0x00, 0x00, 0x10, 0x00,
 +		{ 'Y',	'U',  'Y',	'2', 0x00, 0x00, 0x10, 0x00,
@@ -842322,28 +848104,12 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bFrameIntervalType = 3,
 +	.dwFrameInterval[0] = cpu_to_le32(333333),
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
-+	.dwFrameInterval[2] = cpu_to_le32(1000000),
-+};
-+static struct UVC_FRAME_UNCOMPRESSED(3) uvc_frame_yuy2_424x240p = {
-+	.bLength		= UVC_DT_FRAME_UNCOMPRESSED_SIZE(3),
-+	.bDescriptorType	= USB_DT_CS_INTERFACE,
-+	.bDescriptorSubType = UVC_VS_FRAME_UNCOMPRESSED,
-+	.bFrameIndex		= 7,
-+	.bmCapabilities 	= 0,
-+	.wWidth 		= cpu_to_le16(424),
-+	.wHeight		= cpu_to_le16(240),
-+	.dwMinBitRate		= cpu_to_le32(424*240*2.0*8*10),
-+	.dwMaxBitRate		= cpu_to_le32(424*240*2.0*8*10),
-+	.dwMaxVideoFrameBufferSize	= cpu_to_le32(424*240*2.0),
-+	.dwDefaultFrameInterval 	= cpu_to_le32(666666),
-+	.bFrameIntervalType = 3,
-+	.dwFrameInterval[0] = cpu_to_le32(333333),
-+	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
  };
  
 -static const struct UVC_FRAME_UNCOMPRESSED(1) uvc_frame_yuv_720p = {
 -	.bLength		= UVC_DT_FRAME_UNCOMPRESSED_SIZE(1),
++
 +#define UVC_DESCRIPTOR_HEADERS_OF_YUY2_FRAME \
 +	(struct uvc_descriptor_header *) &uvc_format_yuy2, \
 +	(struct uvc_descriptor_header *) &uvc_frame_yuy2_240p, \
@@ -842351,8 +848117,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	(struct uvc_descriptor_header *) &uvc_frame_yuy2_720p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_yuy2_1080p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_yuy2_2kp, \
-+	(struct uvc_descriptor_header *) &uvc_frame_yuy2_4kp,\
-+	(struct uvc_descriptor_header *) &uvc_frame_yuy2_424x240p,
++	(struct uvc_descriptor_header *) &uvc_frame_yuy2_4kp,
 +#else
 +#define UVC_DESCRIPTOR_HEADERS_OF_YUY2_FRAME
 +#endif
@@ -842362,7 +848127,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FORMAT_UNCOMPRESSED,
 +	.bFormatIndex		= 2,
-+	.bNumFrameDescriptors	= 7,
++	.bNumFrameDescriptors	= 6,
 +	.guidFormat		=
 +		{ 'N',	'V',  '1',	'2', 0x00, 0x00, 0x10, 0x00,
 +		0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71},
@@ -842447,7 +848212,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[0] = cpu_to_le32(333333),
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
-+};
+ };
 +static struct UVC_FRAME_UNCOMPRESSED(3) uvc_frame_nv12_2kp = {
 +	.bLength		= UVC_DT_FRAME_UNCOMPRESSED_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
@@ -842482,25 +848247,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
 +};
-+static struct UVC_FRAME_UNCOMPRESSED(3) uvc_frame_nv12_424x240p = {
-+	.bLength		= UVC_DT_FRAME_UNCOMPRESSED_SIZE(3),
-+	.bDescriptorType	= USB_DT_CS_INTERFACE,
-+	.bDescriptorSubType = UVC_VS_FRAME_UNCOMPRESSED,
-+	.bFrameIndex		= 7,
-+	.bmCapabilities 	= 0,
-+	.wWidth 		= cpu_to_le16(424),
-+	.wHeight		= cpu_to_le16(240),
-+	.dwMinBitRate		= cpu_to_le32(424*240*1.5*8*10),
-+	.dwMaxBitRate		= cpu_to_le32(424*240*1.5*8*10),
-+	.dwMaxVideoFrameBufferSize	= cpu_to_le32(424*240*1.5),
-+	.dwDefaultFrameInterval 	= cpu_to_le32(666666),
-+	.bFrameIntervalType = 3,
-+	.dwFrameInterval[0] = cpu_to_le32(333333),
-+	.dwFrameInterval[1] = cpu_to_le32(666666),
-+	.dwFrameInterval[2] = cpu_to_le32(1000000),
- };
- 
--static const struct uvc_format_mjpeg uvc_format_mjpg = {
++
 +#define UVC_DESCRIPTOR_HEADERS_OF_NV12_FRAME \
 +	(struct uvc_descriptor_header *) &uvc_format_nv12, \
 +	(struct uvc_descriptor_header *) &uvc_frame_nv12_240p, \
@@ -842508,12 +848255,12 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	(struct uvc_descriptor_header *) &uvc_frame_nv12_720p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_nv12_1080p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_nv12_2kp, \
-+	(struct uvc_descriptor_header *) &uvc_frame_nv12_4kp,\
-+	(struct uvc_descriptor_header *) &uvc_frame_nv12_424x240p,
++	(struct uvc_descriptor_header *) &uvc_frame_nv12_4kp,
 +#else
 +#define UVC_DESCRIPTOR_HEADERS_OF_NV12_FRAME
 +#endif
-+
+ 
+-static const struct uvc_format_mjpeg uvc_format_mjpg = {
 +#ifdef SUPPORT_MJPG
 +static struct uvc_format_mjpeg uvc_format_mjpg = {
  	.bLength		= UVC_DT_FORMAT_MJPEG_SIZE,
@@ -842565,16 +848312,34 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
  };
--
+ 
 -static const struct UVC_FRAME_MJPEG(1) uvc_frame_mjpg_720p = {
 -	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(1),
-+static struct UVC_FRAME_MJPEG(3) uvc_frame_mjpg_480p = {
++static struct UVC_FRAME_MJPEG(3) uvc_frame_mjpg_424x240p = {
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
  	.bDescriptorType	= USB_DT_CS_INTERFACE,
 -	.bDescriptorSubType	= UVC_VS_FRAME_MJPEG,
 +	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
  	.bFrameIndex		= 2,
- 	.bmCapabilities		= 0,
++	.bmCapabilities 	= 0,
++	.wWidth 		= cpu_to_le16(424),
++	.wHeight		= cpu_to_le16(240),
++	.dwMinBitRate		= cpu_to_le32(424*240*2*8*10),
++	.dwMaxBitRate		= cpu_to_le32(424*240*2*8*10), //overflow
++	.dwMaxVideoFrameBufferSize	= cpu_to_le32(424*240*2),
++	.dwDefaultFrameInterval = cpu_to_le32(333333),
++	.bFrameIntervalType = 3,
++	.dwFrameInterval[0] = cpu_to_le32(333333),
++	.dwFrameInterval[1] = cpu_to_le32(666666),
++	.dwFrameInterval[2] = cpu_to_le32(1000000),
++};
++
++static struct UVC_FRAME_MJPEG(3) uvc_frame_mjpg_480p = {
++	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
++	.bDescriptorType	= USB_DT_CS_INTERFACE,
++	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
++	.bFrameIndex		= 3,
++	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(640),
 +	.wHeight		= cpu_to_le16(480),
 +	.dwMinBitRate		= cpu_to_le32(640*480*2*8*10),
@@ -842590,8 +848355,8 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
-+	.bFrameIndex		= 3,
-+	.bmCapabilities		= 0,
++	.bFrameIndex		= 4,
+ 	.bmCapabilities		= 0,
  	.wWidth			= cpu_to_le16(1280),
  	.wHeight		= cpu_to_le16(720),
 -	.dwMinBitRate		= cpu_to_le32(29491200),
@@ -842613,7 +848378,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
-+	.bFrameIndex		= 4,
++	.bFrameIndex		= 5,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(1920),
 +	.wHeight		= cpu_to_le16(1080),
@@ -842637,7 +848402,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 -	.bTransferCharacteristics	= 1,
 -	.bMatrixCoefficients	= 4,
 +	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
-+	.bFrameIndex		= 5,
++	.bFrameIndex		= 6,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(2560),
 +	.wHeight		= cpu_to_le16(1440),
@@ -842654,7 +848419,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
-+	.bFrameIndex		= 6,
++	.bFrameIndex		= 7,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(3840),
 +	.wHeight		= cpu_to_le16(2160),
@@ -842665,23 +848430,6 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bFrameIntervalType = 3,
 +	.dwFrameInterval[0] = cpu_to_le32(333333),
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
-+	.dwFrameInterval[2] = cpu_to_le32(1000000),
-+};
-+static struct UVC_FRAME_MJPEG(3) uvc_frame_mjpg_424x240p = {
-+	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
-+	.bDescriptorType	= USB_DT_CS_INTERFACE,
-+	.bDescriptorSubType = UVC_VS_FRAME_MJPEG,
-+	.bFrameIndex		= 7,
-+	.bmCapabilities 	= 0,
-+	.wWidth 		= cpu_to_le16(424),
-+	.wHeight		= cpu_to_le16(240),
-+	.dwMinBitRate		= cpu_to_le32(424*240*2*8*10),
-+	.dwMaxBitRate		= cpu_to_le32(424*240*2*8*10), //overflow
-+	.dwMaxVideoFrameBufferSize	= cpu_to_le32(424*240*2),
-+	.dwDefaultFrameInterval = cpu_to_le32(333333),
-+	.bFrameIntervalType = 3,
-+	.dwFrameInterval[0] = cpu_to_le32(333333),
-+	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
  };
  
@@ -842691,15 +848439,16 @@ index f9661cd627c8..4f4f5ee2f7b2
 -	(const struct uvc_descriptor_header *) &uvc_processing,
 -	(const struct uvc_descriptor_header *) &uvc_output_terminal,
 -	NULL,
++
 +#define UVC_DESCRIPTOR_HEADERS_OF_MJPG_FRAME \
 +	(struct uvc_descriptor_header *) &uvc_format_mjpg, \
 +	(struct uvc_descriptor_header *) &uvc_frame_mjpg_240p,	\
++    (struct uvc_descriptor_header *) &uvc_frame_mjpg_424x240p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_mjpg_480p,	\
 +	(struct uvc_descriptor_header *) &uvc_frame_mjpg_720p,	\
 +	(struct uvc_descriptor_header *) &uvc_frame_mjpg_1080p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_mjpg_2kp,	\
-+	(struct uvc_descriptor_header *) &uvc_frame_mjpg_4kp,	\
-+	(struct uvc_descriptor_header *) &uvc_frame_mjpg_424x240p,
++	(struct uvc_descriptor_header *) &uvc_frame_mjpg_4kp,
 +#else
 +#define UVC_DESCRIPTOR_HEADERS_OF_MJPG_FRAME
 +#endif
@@ -842831,12 +848580,40 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[0] = cpu_to_le32(333333),
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
-+};
-+static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h264_480p = {
+ };
+ 
+-static const struct uvc_descriptor_header * const uvc_ss_streaming_cls[] = {
+-	(const struct uvc_descriptor_header *) &uvc_input_header,
+-	(const struct uvc_descriptor_header *) &uvc_format_yuv,
+-	(const struct uvc_descriptor_header *) &uvc_frame_yuv_360p,
+-	(const struct uvc_descriptor_header *) &uvc_frame_yuv_720p,
+-	(const struct uvc_descriptor_header *) &uvc_format_mjpg,
+-	(const struct uvc_descriptor_header *) &uvc_frame_mjpg_360p,
+-	(const struct uvc_descriptor_header *) &uvc_frame_mjpg_720p,
+-	(const struct uvc_descriptor_header *) &uvc_color_matching,
+-	NULL,
++static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h264_424x240p = {
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
 +	.bFrameIndex		= 2,
++	.bmCapabilities 	= 0,
++	.wWidth 		= cpu_to_le16(424),
++	.wHeight		= cpu_to_le16(240),
++	.dwMinBitRate		= cpu_to_le32(424*240*2*8*10),
++	.dwMaxBitRate		= cpu_to_le32(424*240*2*8*10),
++	.dwDefaultFrameInterval = cpu_to_le32(333333),
++	.bFrameIntervalType = 3,
++	.dwFrameInterval[0] = cpu_to_le32(333333),
++	.dwFrameInterval[1] = cpu_to_le32(666666),
++	.dwFrameInterval[2] = cpu_to_le32(1000000),
+ };
+ 
++static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h264_480p = {
++	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
++	.bDescriptorType	= USB_DT_CS_INTERFACE,
++	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
++	.bFrameIndex		= 3,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(640),
 +	.wHeight		= cpu_to_le16(480),
@@ -842852,7 +848629,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 3,
++	.bFrameIndex		= 4,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(1280),
 +	.wHeight		= cpu_to_le16(720),
@@ -842868,7 +848645,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 4,
++	.bFrameIndex		= 5,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(1920),
 +	.wHeight		= cpu_to_le16(1080),
@@ -842884,7 +848661,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 5,
++	.bFrameIndex		= 6,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(2560),
 +	.wHeight		= cpu_to_le16(1440),
@@ -842900,7 +848677,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 6,
++	.bFrameIndex		= 7,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(3840),
 +	.wHeight		= cpu_to_le16(2160),
@@ -842912,43 +848689,17 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
 +};
-+static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h264_424x240p = {
-+	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
-+	.bDescriptorType	= USB_DT_CS_INTERFACE,
-+	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 7,
-+	.bmCapabilities 	= 0,
-+	.wWidth 		= cpu_to_le16(424),
-+	.wHeight		= cpu_to_le16(240),
-+	.dwMinBitRate		= cpu_to_le32(424*240*2*8*10),
-+	.dwMaxBitRate		= cpu_to_le32(424*240*2*8*10),
-+	.dwDefaultFrameInterval = cpu_to_le32(333333),
-+	.bFrameIntervalType = 3,
-+	.dwFrameInterval[0] = cpu_to_le32(333333),
-+	.dwFrameInterval[1] = cpu_to_le32(666666),
-+	.dwFrameInterval[2] = cpu_to_le32(1000000),
- };
- 
--static const struct uvc_descriptor_header * const uvc_ss_streaming_cls[] = {
--	(const struct uvc_descriptor_header *) &uvc_input_header,
--	(const struct uvc_descriptor_header *) &uvc_format_yuv,
--	(const struct uvc_descriptor_header *) &uvc_frame_yuv_360p,
--	(const struct uvc_descriptor_header *) &uvc_frame_yuv_720p,
--	(const struct uvc_descriptor_header *) &uvc_format_mjpg,
--	(const struct uvc_descriptor_header *) &uvc_frame_mjpg_360p,
--	(const struct uvc_descriptor_header *) &uvc_frame_mjpg_720p,
--	(const struct uvc_descriptor_header *) &uvc_color_matching,
--	NULL,
++
 +#endif
 +#define UVC_DESCRIPTOR_HEADERS_OF_H264_FRAME \
 +	(struct uvc_descriptor_header *) &uvc_format_h264,	  \
 +	(struct uvc_descriptor_header *) &uvc_frame_h264_240p,	\
++	(struct uvc_descriptor_header *) &uvc_frame_h264_424x240p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_h264_480p,	\
 +	(struct uvc_descriptor_header *) &uvc_frame_h264_720p,	\
 +	(struct uvc_descriptor_header *) &uvc_frame_h264_1080p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_h264_2kp,	\
-+	(struct uvc_descriptor_header *) &uvc_frame_h264_4kp,	\
-+	(struct uvc_descriptor_header *) &uvc_frame_h264_424x240p,
++	(struct uvc_descriptor_header *) &uvc_frame_h264_4kp,
 +#else
 +#define UVC_DESCRIPTOR_HEADERS_OF_H264_FRAME
 +#endif
@@ -842987,11 +848738,29 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
 +};
-+static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h265_480p = {
++
++static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h265_424x240 = {
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
 +	.bFrameIndex		= 2,
++	.bmCapabilities 	= 0,
++	.wWidth 		= cpu_to_le16(424),
++	.wHeight		= cpu_to_le16(240),
++	.dwMinBitRate		= cpu_to_le32(424*240*2*8*10),
++	.dwMaxBitRate		= cpu_to_le32(424*240*2*8*10),
++	.dwDefaultFrameInterval = cpu_to_le32(333333),
++	.bFrameIntervalType = 3,
++	.dwFrameInterval[0] = cpu_to_le32(333333),
++	.dwFrameInterval[1] = cpu_to_le32(666666),
++	.dwFrameInterval[2] = cpu_to_le32(1000000),
++};
++
++static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h265_480p = {
++	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
++	.bDescriptorType	= USB_DT_CS_INTERFACE,
++	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
++	.bFrameIndex		= 3,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(640),
 +	.wHeight		= cpu_to_le16(480),
@@ -843007,7 +848776,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 3,
++	.bFrameIndex		= 4,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(1280),
 +	.wHeight		= cpu_to_le16(720),
@@ -843023,7 +848792,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 4,
++	.bFrameIndex		= 5,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(1920),
 +	.wHeight		= cpu_to_le16(1080),
@@ -843039,7 +848808,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 5,
++	.bFrameIndex		= 6,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(2560),
 +	.wHeight		= cpu_to_le16(1440),
@@ -843055,7 +848824,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
 +	.bDescriptorType	= USB_DT_CS_INTERFACE,
 +	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 6,
++	.bFrameIndex		= 7,
 +	.bmCapabilities		= 0,
 +	.wWidth			= cpu_to_le16(3840),
 +	.wHeight		= cpu_to_le16(2160),
@@ -843067,32 +848836,17 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	.dwFrameInterval[1] = cpu_to_le32(666666),
 +	.dwFrameInterval[2] = cpu_to_le32(1000000),
 +};
-+static struct UVC_FRAME_FRAMEBASE(3) uvc_frame_h265_424x240 = {
-+	.bLength		= UVC_DT_FRAME_MJPEG_SIZE(3),
-+	.bDescriptorType	= USB_DT_CS_INTERFACE,
-+	.bDescriptorSubType = UVC_VS_FRAME_FRAME_BASED,
-+	.bFrameIndex		= 7,
-+	.bmCapabilities 	= 0,
-+	.wWidth 		= cpu_to_le16(424),
-+	.wHeight		= cpu_to_le16(240),
-+	.dwMinBitRate		= cpu_to_le32(424*240*2*8*10),
-+	.dwMaxBitRate		= cpu_to_le32(424*240*2*8*10),
-+	.dwDefaultFrameInterval = cpu_to_le32(333333),
-+	.bFrameIntervalType = 3,
-+	.dwFrameInterval[0] = cpu_to_le32(333333),
-+	.dwFrameInterval[1] = cpu_to_le32(666666),
-+	.dwFrameInterval[2] = cpu_to_le32(1000000),
- };
- 
++
++
 +#define UVC_DESCRIPTOR_HEADERS_OF_H265_FRAME \
 +	(struct uvc_descriptor_header *) &uvc_format_h265,	 \
 +	(struct uvc_descriptor_header *) &uvc_frame_h265_240p, \
++	(struct uvc_descriptor_header *) &uvc_frame_h265_424x240,  \
 +	(struct uvc_descriptor_header *) &uvc_frame_h265_480p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_h265_720p, \
 +	(struct uvc_descriptor_header *) &uvc_frame_h265_1080p,\
 +	(struct uvc_descriptor_header *) &uvc_frame_h265_2kp,  \
 +	(struct uvc_descriptor_header *) &uvc_frame_h265_4kp,  \
-+	(struct uvc_descriptor_header *) &uvc_frame_h265_424x240,  \
 +	(struct uvc_descriptor_header *) &uvc_color_matching,
 +#else
 +#define UVC_DESCRIPTOR_HEADERS_OF_H265_FRAME
@@ -843452,10 +849206,10 @@ index f9661cd627c8..4f4f5ee2f7b2
  	if (status < 0)
 -		usb_put_function(f_uvc);
 +		usb_put_function(f_rndis);
-+
-+	return status;
-+}
-+
+ 
+ 	return status;
+ }
+ 
 +static int __init rndis_bind(struct usb_composite_dev *cdev)
 +{
 +	struct f_rndis_opts	*rndis_opts = NULL;
@@ -843485,14 +849239,14 @@ index f9661cd627c8..4f4f5ee2f7b2
 +		status = PTR_ERR(fi_rndis);
 +		goto fail;
 +	}
- 
++
 +	return 0;
 +
 +fail:
 +	fi_rndis = NULL;
- 	return status;
- }
- 
++	return status;
++}
++
 +static int __exit rndis_unbind(struct usb_composite_dev *cdev)
 +{
 +	if (!IS_ERR_OR_NULL(f_rndis))
@@ -843603,7 +849357,7 @@ index f9661cd627c8..4f4f5ee2f7b2
  static struct usb_configuration webcam_config_driver = {
  	.label			= webcam_config_label,
  	.bConfigurationValue	= 1,
-@@ -358,45 +1727,57 @@ static struct usb_configuration webcam_config_driver = {
+@@ -358,45 +1700,57 @@ static struct usb_configuration webcam_config_driver = {
  	.MaxPower		= CONFIG_USB_GADGET_VBUS_DRAW,
  };
  
@@ -843617,13 +849371,17 @@ index f9661cd627c8..4f4f5ee2f7b2
 -		usb_put_function_instance(fi_uvc);
 -	return 0;
 -}
-+	int ret = 0;
- 
+-
 -static int
 -webcam_bind(struct usb_composite_dev *cdev)
 -{
 -	struct f_uvc_opts *uvc_opts;
 -	int ret;
++	int ret = 0;
+ 
+-	fi_uvc = usb_get_function_instance("uvc");
+-	if (IS_ERR(fi_uvc))
+-		return PTR_ERR(fi_uvc);
 +#if defined(CONFIG_USB_WEBCAM_RNDIS)
 +	if(rndis_function_enable)
 +	{
@@ -843633,9 +849391,7 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	}
 +#endif
  
--	fi_uvc = usb_get_function_instance("uvc");
--	if (IS_ERR(fi_uvc))
--		return PTR_ERR(fi_uvc);
+-	uvc_opts = container_of(fi_uvc, struct f_uvc_opts, func_inst);
 +#if defined(CONFIG_USB_WEBCAM_UVC)
 +	if(uvc_function_enable)
 +	{
@@ -843645,7 +849401,10 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	}
 +#endif
  
--	uvc_opts = container_of(fi_uvc, struct f_uvc_opts, func_inst);
+-	uvc_opts->streaming_interval = streaming_interval;
+-	uvc_opts->streaming_maxpacket = streaming_maxpacket;
+-	uvc_opts->streaming_maxburst = streaming_maxburst;
+-	uvc_set_trace_param(trace);
 +#if defined(CONFIG_USB_WEBCAM_UAC)
 +	if(uac_function_enable)
 +	{
@@ -843655,11 +849414,6 @@ index f9661cd627c8..4f4f5ee2f7b2
 +	}
 +#endif
  
--	uvc_opts->streaming_interval = streaming_interval;
--	uvc_opts->streaming_maxpacket = streaming_maxpacket;
--	uvc_opts->streaming_maxburst = streaming_maxburst;
--	uvc_set_trace_param(trace);
--
 -	uvc_opts->fs_control = uvc_fs_control_cls;
 -	uvc_opts->ss_control = uvc_ss_control_cls;
 -	uvc_opts->fs_streaming = uvc_fs_streaming_cls;
@@ -843689,7 +849443,7 @@ index f9661cd627c8..4f4f5ee2f7b2
  	webcam_device_descriptor.iManufacturer =
  		webcam_strings[USB_GADGET_MANUFACTURER_IDX].id;
  	webcam_device_descriptor.iProduct =
-@@ -404,20 +1785,99 @@ webcam_bind(struct usb_composite_dev *cdev)
+@@ -404,20 +1758,99 @@ webcam_bind(struct usb_composite_dev *cdev)
  	webcam_config_driver.iConfiguration =
  		webcam_strings[STRING_DESCRIPTION_IDX].id;
  
@@ -850893,6 +856647,25 @@ index e479033bd782..701fbc0edde8 100644
 +#endif
  
  #endif /* __LINUX_USB_EHCI_DEF_H */
+diff --git a/include/linux/usb/g_hid.h b/include/linux/usb/g_hid.h
+index 50f5745df28c..39a2fcdda6f5 100644
+--- a/include/linux/usb/g_hid.h
++++ b/include/linux/usb/g_hid.h
+@@ -21,12 +21,13 @@
+ #ifndef __LINUX_USB_G_HID_H
+ #define __LINUX_USB_G_HID_H
+ 
++
+ struct hidg_func_descriptor {
+ 	unsigned char		subclass;
+ 	unsigned char		protocol;
+ 	unsigned short		report_length;
+ 	unsigned short		report_desc_length;
+-	unsigned char		report_desc[];
++	unsigned char		report_desc[64];
+ };
+ 
+ #endif /* __LINUX_USB_G_HID_H */
 diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
 index e4516e9ded0f..ce4d900f1867 100644
 --- a/include/linux/usb/gadget.h
@@ -860193,7 +865966,7 @@ index 000000000000..1049a679e231
 +    fmap.close()
 diff --git a/scripts/ms_bin_option_update_int.py b/scripts/ms_bin_option_update_int.py
 new file mode 100755
-index 000000000000..a515e5e872af
+index 000000000000..a538d1903802
 --- /dev/null
 +++ b/scripts/ms_bin_option_update_int.py
 @@ -0,0 +1,23 @@
@@ -860205,13 +865978,13 @@ index 000000000000..a515e5e872af
 +
 +    name=sys.argv[2]
 +    if sys.argv[3].upper().startswith( '0X' ):
-+        value=long(sys.argv[3],16)
++        value=int(sys.argv[3],16)
 +    else:
-+        value=long(sys.argv[3])
++        value=int(sys.argv[3])
 +
 +    fmap=mmap.mmap(os.open(sys.argv[1],os.O_RDWR),0)
 +
-+    offset=fmap.find(name)
++    offset=fmap.find(name.encode())
 +#    print ('%s:%d\n' % (name,offset))
 +    if offset < 0:
 +        print ('error finding ms_bin_option:%s in %s\n' % (name,sys.argv[1]))
@@ -860222,7 +865995,7 @@ index 000000000000..a515e5e872af
 +    fmap.close()
 diff --git a/scripts/ms_builtin_dtb_update.py b/scripts/ms_builtin_dtb_update.py
 new file mode 100755
-index 000000000000..787ab98e4747
+index 000000000000..9214d9a79ad0
 --- /dev/null
 +++ b/scripts/ms_builtin_dtb_update.py
 @@ -0,0 +1,33 @@
@@ -860234,7 +866007,7 @@ index 000000000000..787ab98e4747
 +    
 +    name='#MS_DTB#'
 + 
-+    dtb_file=open(sys.argv[2])
++    dtb_file=open(sys.argv[2], 'rb')
 +    dtb_file.seek(0,os.SEEK_END)
 +    size=dtb_file.tell()
 +    dtb_file.seek(0,os.SEEK_SET)
@@ -860247,7 +866020,7 @@ index 000000000000..787ab98e4747
 +        
 +    fmap=mmap.mmap(os.open(sys.argv[1],os.O_RDWR),0)
 +
-+    offset=fmap.find(name)    
++    offset=fmap.find(name.encode())    
 +    if offset >=0:
 +        print ('offset:0x%08X' % offset)
 +        print ('  size:0x%08X' % size )
diff --git a/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/01_infinity6e_kernel_4.9.84_sdk-python3_support.patch b/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/01_infinity6e_kernel_4.9.84_sdk-python3_support.patch
deleted file mode 100644
index 9c1be9c8..00000000
--- a/br-ext-chip-sigmastar/board/infinity6e/kernel/patches/01_infinity6e_kernel_4.9.84_sdk-python3_support.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-diff --git a/scripts/ms_bin_option_update_int.py b/scripts/ms_bin_option_update_int.py
-index a515e5e872af..a538d1903802 100755
---- a/scripts/ms_bin_option_update_int.py
-+++ b/scripts/ms_bin_option_update_int.py
-@@ -6,13 +6,13 @@ if __name__ == '__main__':
- 
-     name=sys.argv[2]
-     if sys.argv[3].upper().startswith( '0X' ):
--        value=long(sys.argv[3],16)
-+        value=int(sys.argv[3],16)
-     else:
--        value=long(sys.argv[3])
-+        value=int(sys.argv[3])
- 
-     fmap=mmap.mmap(os.open(sys.argv[1],os.O_RDWR),0)
- 
--    offset=fmap.find(name)
-+    offset=fmap.find(name.encode())
- #    print ('%s:%d\n' % (name,offset))
-     if offset < 0:
-         print ('error finding ms_bin_option:%s in %s\n' % (name,sys.argv[1]))
-diff --git a/scripts/ms_builtin_dtb_update.py b/scripts/ms_builtin_dtb_update.py
-index 787ab98e4747..9214d9a79ad0 100755
---- a/scripts/ms_builtin_dtb_update.py
-+++ b/scripts/ms_builtin_dtb_update.py
-@@ -6,7 +6,7 @@ if __name__ == '__main__':
-     
-     name='#MS_DTB#'
-  
--    dtb_file=open(sys.argv[2])
-+    dtb_file=open(sys.argv[2], 'rb')
-     dtb_file.seek(0,os.SEEK_END)
-     size=dtb_file.tell()
-     dtb_file.seek(0,os.SEEK_SET)
-@@ -19,7 +19,7 @@ if __name__ == '__main__':
-         
-     fmap=mmap.mmap(os.open(sys.argv[1],os.O_RDWR),0)
- 
--    offset=fmap.find(name)    
-+    offset=fmap.find(name.encode())
-     if offset >=0:
-         print ('offset:0x%08X' % offset)
-         print ('  size:0x%08X' % size )
diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mhal.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mhal.ko
index b515de68..ca821984 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ai.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ai.ko
index 05578709..44ad9c22 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_alsa.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_alsa.ko
index f3af2100..f8dc3bce 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ao.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ao.ko
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_cipher.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_cipher.ko
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_common.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_common.ko
index 8c2d7910..8548696e 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_disp.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_disp.ko
index a172aafe..a56bf258 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_divp.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_divp.ko
index 54b4329f..32f39fbf 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_gyro.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_gyro.ko
index 6e717f13..a62a5359 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ipu.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ipu.ko
index faca33ce..07e83217 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ldc.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_ldc.ko
index 49963026..1f91cb37 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_mipitx.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_mipitx.ko
index 850c2565..ea6135b0 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_panel.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_panel.ko
index ab7cf2cc..48827561 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_rgn.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_rgn.ko
index bb814cb2..807696ae 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_sensor.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_sensor.ko
index c91e77bf..4499586e 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_shadow.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_shadow.ko
index 7fb6ef5a..bee5431b 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_sys.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_sys.ko
index 9a9b8687..e7708d5a 100644
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diff --git a/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_vdisp.ko b/general/package/sigmastar-osdrv-infinity6e/files/kmod/mi_vdisp.ko
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