diff --git a/br-ext-chip-hisilicon/board/hi3536dv100/kernel/hi3536dv100.generic.config b/br-ext-chip-hisilicon/board/hi3536dv100/kernel/hi3536dv100.generic.config
index 444f2ba4..c7d8a238 100644
--- a/br-ext-chip-hisilicon/board/hi3536dv100/kernel/hi3536dv100.generic.config
+++ b/br-ext-chip-hisilicon/board/hi3536dv100/kernel/hi3536dv100.generic.config
@@ -203,8 +203,8 @@ CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_HAVE_GCC_PLUGINS=y
 # CONFIG_GCC_PLUGINS is not set
 CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_CC_STACKPROTECTOR=y
-# CONFIG_CC_STACKPROTECTOR_NONE is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+CONFIG_CC_STACKPROTECTOR_NONE=y
 # CONFIG_CC_STACKPROTECTOR_REGULAR is not set
 # CONFIG_CC_STACKPROTECTOR_STRONG is not set
 CONFIG_HAVE_CONTEXT_TRACKING=y
@@ -2408,8 +2408,21 @@ CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 # CONFIG_LOGFS is not set
-CONFIG_CRAMFS=y
-# CONFIG_SQUASHFS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_FILE_CACHE=y
+# CONFIG_SQUASHFS_FILE_DIRECT is not set
+CONFIG_SQUASHFS_DECOMP_SINGLE=y
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
+# CONFIG_SQUASHFS_XATTR is not set
+CONFIG_SQUASHFS_ZLIB=y
+# CONFIG_SQUASHFS_LZ4 is not set
+# CONFIG_SQUASHFS_LZO is not set
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
diff --git a/br-ext-chip-hisilicon/board/hi3536dv100/kernel/patches/10_add_xm25qh128_spi_nor.patch b/br-ext-chip-hisilicon/board/hi3536dv100/kernel/patches/10_add_xm25qh128_spi_nor.patch
new file mode 100644
index 00000000..14bd1ac6
--- /dev/null
+++ b/br-ext-chip-hisilicon/board/hi3536dv100/kernel/patches/10_add_xm25qh128_spi_nor.patch
@@ -0,0 +1,48 @@
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -1021,6 +1021,23 @@
+ 	.erase_types[1]		= SNOR_OP_ERASE_4K(SPINOR_OP_BE_4K),
+ };
+ 
++static const struct spi_nor_basic_flash_parameter xmc_params = {
++	.rd_modes		= SNOR_RD_MODES,
++	.reads[SNOR_MIDX_SLOW]	= SNOR_OP_READ(0, 0, SPINOR_OP_READ),
++	.reads[SNOR_MIDX_1_1_1]	= SNOR_OP_READ(0, 8, SPINOR_OP_READ_FAST),
++	.reads[SNOR_MIDX_1_1_2]	= SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_1_2),
++	.reads[SNOR_MIDX_1_2_2]	= SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_2_2),
++	.reads[SNOR_MIDX_1_1_4]	= SNOR_OP_READ(0, 8, SPINOR_OP_READ_1_1_4),
++	.reads[SNOR_MIDX_1_4_4]	= SNOR_OP_READ(0, 24, SPINOR_OP_READ_1_4_4),
++
++	.wr_modes		= SNOR_WR_MODES,
++	.page_programs[SNOR_MIDX_1_1_1]	= SPINOR_OP_PP,
++	.page_programs[SNOR_MIDX_1_1_4]	= SPINOR_OP_PP_1_1_4,
++
++	.erase_types[0]		= SNOR_OP_ERASE_64K(SPINOR_OP_SE),
++
++};
++
+ #define PARAMS(_name) .params = &_name##_params
+ 
+ /* Used when the "_ext_id" is two bytes at most */
+@@ -1324,6 +1341,12 @@
+ 	{ "pn25f16s", INFO(0xe04015, 0, 64 * 1024,  32, 0), PARAMS(paragon) },
+ 	{ "pn25f32s", INFO(0xe04016, 0, 64 * 1024,  64, 0), PARAMS(paragon) },
+ 
++	/* XMC 3.3V */
++	{ "xm25qh128a",   INFO(0x207018, 0, 64 * 1024,   256, SPI_NOR_DUAL_READ),
++	    PARAMS(xmc) },
++	{ "xm25qh128b",   INFO(0x206018, 0, 64 * 1024,   256, SPI_NOR_DUAL_READ),
++	    PARAMS(xmc) },
++
+ 	{ },
+ };
+ 
+@@ -1493,7 +1516,7 @@
+ 		ssize_t written;
+ 
+ 		page_offset = (to + i) & (nor->page_size - 1);
+-#ifndef CONFIG_SPI_HISI_SFC 
++#ifndef CONFIG_SPI_HISI_SFC
+ 		WARN_ONCE(page_offset,
+ 			  "Writing at offset %zu into a NOR page. Writing partial pages may decrease reliability and increase wear of NOR flash.",
+ 			  page_offset);