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Add IMX385_I2C_LVDS 8CH for Hi3519v101 on Powerview board

pull/229/head
Dmitry Ermakov 2022-05-17 17:34:45 +03:00
parent bb2e7932fd
commit 3704f126bc
3 changed files with 134 additions and 13 deletions
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32
general/package/hisilicon-osdrv-hi3519v101/files/script/load_hisilicon
View File

@ -504,19 +504,6 @@ insert_sns() {
spi0_3wire_pin_mux
insmod hi_ssp_3wire.ko
;;
imx385_lvds)
tmp=0x18
devmem 0x12010040 32 0x18
devmem 0x12040190 32 0x2
devmem 0x1204018c 32 0x2
devmem 0x1204099c 32 0x120
devmem 0x12040998 32 0x120
insmod hi_ssp_sony.ko
devmem 0x12040184 32 0x1
devmem 0x12040188 32 0x1
devmem 0x12040010 32 0x2
devmem 0x12040014 32 0x2
;;
ov4689)
tmp=0x14
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
@ -535,6 +522,25 @@ insert_sns() {
devmem 0x12010040 32 0x1a # sensor0 clk_en, 27MHz
i2c0_pin_mux
;;
imx385_spi_lvds)
tmp=0x18
devmem 0x12010040 32 0x18
devmem 0x12040190 32 0x2
devmem 0x1204018c 32 0x2
devmem 0x1204099c 32 0x120
devmem 0x12040998 32 0x120
spi0_4wire_pin_mux
insmod hi_ssp_sony.ko
;;
imx385_i2c_lvds)
tmp=0x16
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M
# viu0:300M,isp0:300M, viu1:300M,isp1:300M
devmem 0x1201004c 32 0x00094421
devmem 0x12010054 32 0x0004041
devmem 0x12010040 32 0x16 # sensor0 clk_en, 74.125MHz
i2c0_pin_mux
;;
imx185 | imx385 | imx178)
tmp=0x18
# SDK config: IVE:396M, GDC:475M, VGS:500M, VEDU:600M, VPSS:300M

115
general/package/hisilicon-osdrv-hi3519v101/files/sensor/config/imx385_i2c_lvds_1080p.ini 100644
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@ -0,0 +1,115 @@
[sensor]
Sensor_type=stSnsImx385Obj
Mode=WDR_MODE_NONE
DllFile=libsns_imx385_lvds_8ch.so
[mode]
input_mode=INPUT_MODE_LVDS
raw_bitness=12
dev_attr=0
[lvds]
img_size_w=1920
img_size_h=1080
wdr_mode=HI_WDR_MODE_NONE
sync_mode=LVDS_SYNC_MODE_SAV
raw_data_type=RAW_DATA_12BIT
data_endian=LVDS_ENDIAN_BIG
sync_code_endian=LVDS_ENDIAN_BIG
lane_id=0|1|2|3|4|5|6|7|
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_5 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_6 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_7 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
[isp_image]
Isp_x=0
Isp_y=0
Isp_W=1920
Isp_H=1080
Isp_FrameRate=30
Isp_Bayer=BAYER_GBRG
[vi_dev]
Input_mod=VI_MODE_LVDS
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=1 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
FixCode=0
FieldPolar=0
DataPath=1
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0
DevRect_y=0
DevRect_w=1920
DevRect_h=1080
FullLinesStd=1125
[vi_chn]
CapRect_X=0
CapRect_Y=0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel=VI_CAPSEL_BOTH
;PixFormat=26
CompressMode=COMPRESS_MODE_NONE
SrcFrameRate=-1
FrameRate =-1

BIN
general/package/hisilicon-osdrv-hi3519v101/files/sensor/libsns_imx385_lvds.so 100644
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