Update HI3516CV300/HI3516EV100 project

pull/65/head
Igor Zalatov (from Citadel PC) 2021-11-02 20:27:05 +03:00
parent 8e1b6472d9
commit 323c1e51f5
182 changed files with 3033 additions and 22192 deletions

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@ -5,6 +5,8 @@ source "$BR2_EXTERNAL_HISILICON_PATH/package/fdk-aac-openipc/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/fwprintenv-openipc/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/gdbserver-lite/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisi_gpio/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisilicon-osdrv-hi3516cv200/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisilicon-osdrv-hi3516cv300/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisilicon-osdrv-hi3516cv500/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/hisilicon-osdrv-hi3516ev300/Config.in"
source "$BR2_EXTERNAL_HISILICON_PATH/package/ipctool/Config.in"

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@ -0,0 +1,11 @@
--- a/scripts/dtc/dtc-parser.tab.c_shipped 2015-08-07 22:08:04.000000000 +0300
+++ b/scripts/dtc/dtc-parser.tab.c_shipped 2021-11-01 22:11:46.572137821 +0300
@@ -70,7 +70,7 @@
#include "dtc.h"
#include "srcpos.h"
-YYLTYPE yylloc;
+extern YYLTYPE yylloc;
extern int yylex(void);
extern void print_error(char const *fmt, ...);

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@ -51,7 +51,7 @@ BR2_PACKAGE_DROPBEAR=y
BR2_PACKAGE_FWPRINTENV_OPENIPC=y
BR2_PACKAGE_HASERL=y
BR2_PACKAGE_HISI_GPIO=y
# BR2_PACKAGE_HISILICON_OSDRV_HI3516CV200 is not set
BR2_PACKAGE_HISILICON_OSDRV_HI3516CV200=y
BR2_PACKAGE_IPCTOOL=y
BR2_PACKAGE_JSON_C=y
BR2_PACKAGE_LAME_OPENIPC=y

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@ -50,7 +50,7 @@ BR2_PACKAGE_DROPBEAR=y
BR2_PACKAGE_FWPRINTENV_OPENIPC=y
BR2_PACKAGE_HASERL=y
BR2_PACKAGE_HISI_GPIO=y
# BR2_PACKAGE_HISILICON_OSDRV_HI3516CV300 is not set
BR2_PACKAGE_HISILICON_OSDRV_HI3516CV300=y
BR2_PACKAGE_IPCTOOL=y
BR2_PACKAGE_JSON_C=y
BR2_PACKAGE_LAME_OPENIPC=y

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@ -51,7 +51,7 @@ BR2_PACKAGE_DROPBEAR=y
BR2_PACKAGE_FWPRINTENV_OPENIPC=y
BR2_PACKAGE_HASERL=y
BR2_PACKAGE_HISI_GPIO=y
# BR2_PACKAGE_HISILICON_OSDRV_HI3516CV200 is not set
BR2_PACKAGE_HISILICON_OSDRV_HI3516CV200=y
BR2_PACKAGE_IPCTOOL=y
BR2_PACKAGE_JSON_C=y
BR2_PACKAGE_LAME_OPENIPC=y

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@ -5,6 +5,8 @@ include $(BR2_EXTERNAL_HISILICON_PATH)/package/gdbserver-lite/gdbserver-lite.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/fdk-aac-openipc/fdk-aac-openipc.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/fwprintenv-openipc/fwprintenv-openipc.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisi_gpio/hisi_gpio.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv200/hisilicon-osdrv-hi3516cv200.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/hisilicon-osdrv-hi3516cv300.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv500/hisilicon-osdrv-hi3516cv500.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516ev300/hisilicon-osdrv-hi3516ev300.mk
include $(BR2_EXTERNAL_HISILICON_PATH)/package/ipctool/ipctool.mk

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@ -0,0 +1 @@
../../general/package/hisilicon-osdrv-hi3516cv200

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@ -0,0 +1 @@
../../general/package/hisilicon-osdrv-hi3516cv300

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@ -0,0 +1,6 @@
config BR2_PACKAGE_HISILICON_OSDRV_HI3516CV200
bool "hisilicon-osdrv-hi3516cv200"
help
hisilicon-osdrv-hi3516cv200 - Hisilicon kernel modules and libs
https://openipc.org

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@ -0,0 +1,6 @@
config BR2_PACKAGE_HISILICON_OSDRV_HI3516CV300
bool "hisilicon-osdrv-hi3516cv300"
help
hisilicon-osdrv-hi3516cv300 - Hisilicon kernel modules and libs
https://openipc.org

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@ -0,0 +1,68 @@
#!/bin/sh
DAEMON="majestic"
PIDFILE="/var/run/$DAEMON.pid"
DAEMON_ARGS=""
# shellcheck source=/dev/null
[ -r "/etc/default/$DAEMON" ] && . "/etc/default/$DAEMON"
# The daemon does not create a pidfile, and use "-m" to instruct start-stop-daemon to create one.
start() {
logger -s -p daemon.info -t hisilicon "Check MAC for Xiongmai devices"
if [ "$(fw_printenv -n ethaddr)" = "00:00:23:34:45:66" ]; then
logger -s -p daemon.info -t hisilicon "The eth0 interface has a lousy MAC, let's try to change it.."
XMMAC="$(ipcinfo --xm_mac)" && [ -n "${XMMAC}" ] && fw_setenv ethaddr ${XMMAC} && ifconfig eth0 hw ether ${XMMAC} && logger -s -p daemon.info -t hisilicon "The eth0 interface have new MAC - ${XMMAC}" && reboot -f
else
logger -s -p daemon.info -t hisilicon "The eth0 interface has a correct MAC - $(fw_printenv -n ethaddr)"
fi
#
logger -s -p daemon.info -t hisilicon "Loading of kernel modules and initialization of the video system has started"
export TZ=$(cat /etc/TZ)
load_hisilicon -i
#
printf 'Starting %s: ' "$DAEMON"
[ -f /usr/bin/$DAEMON ] || echo -en "DISABLED, "
# shellcheck disable=SC2086 # we need the word splitting
start-stop-daemon -b -m -S -q -p "$PIDFILE" -x "/usr/bin/$DAEMON" \
-- $DAEMON_ARGS
status=$?
if [ "$status" -eq 0 ]; then
echo "OK"
else
echo "FAIL"
fi
return "$status"
}
stop() {
printf 'Stopping %s: ' "$DAEMON"
[ -f /usr/sbin/$DAEMON ] || echo -en "DISABLED, "
start-stop-daemon -K -q -p "$PIDFILE"
status=$?
if [ "$status" -eq 0 ]; then
rm -f "$PIDFILE"
echo "OK"
else
echo "FAIL"
fi
return "$status"
}
restart() {
stop
sleep 1
start
}
case "$1" in
start|stop|restart)
"$1";;
reload)
# Restart, since there is no true "reload" feature.
restart;;
*)
echo "Usage: $0 {start|stop|restart|reload}"
exit 1
esac

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@ -0,0 +1,85 @@
#!/bin/sh
#GPIO6_5 -> GPIO53 (6*8+5 = 53)
#GPIO6_6 -> GPIO54 (6*8+6 = 54)
#GPIO3_0 -> GPIO24 (3*8+0 = 24)
#(normal mode)
ir_cut_enable()
{
# pin_mux
echo "$gpio_0" > /sys/class/gpio/unexport;
echo "$gpio_1" > /sys/class/gpio/unexport;
echo "$gpio_0" > /sys/class/gpio/export;
echo "$gpio_1" > /sys/class/gpio/export;
# dir
echo "out" > /sys/class/gpio/gpio$gpio_0/direction;
echo "out" > /sys/class/gpio/gpio$gpio_1/direction;
# data, gpio_1: 0, gpio_0: 1 (normal mode)
echo "1" > /sys/class/gpio/gpio$gpio_0/value;
echo "0" > /sys/class/gpio/gpio$gpio_1/value;
#sleep 1s
sleep 1;
# back to original
echo "0" > /sys/class/gpio/gpio$gpio_0/value;
echo "0" > /sys/class/gpio/gpio$gpio_1/value;
}
# (ir mode)
ir_cut_disable()
{
# pin_mux
echo "$gpio_0" > /sys/class/gpio/unexport;
echo "$gpio_1" > /sys/class/gpio/unexport;
echo "$gpio_0" > /sys/class/gpio/export;
echo "$gpio_1" > /sys/class/gpio/export;
# dir
echo "out" > /sys/class/gpio/gpio$gpio_0/direction;
echo "out" > /sys/class/gpio/gpio$gpio_1/direction;
# data, gpio_1: 1, gpio_0: 0 (ir mode)
echo "0" > /sys/class/gpio/gpio$gpio_0/value;
echo "1" > /sys/class/gpio/gpio$gpio_1/value;
#sleep 1s
sleep 1;
# back to original
echo "0" > /sys/class/gpio/gpio$gpio_0/value;
echo "0" > /sys/class/gpio/gpio$gpio_1/value;
}
gpio_0=0
gpio_1=0
if [ $# -lt 2 ]; then
echo "usage : ./demo_config.sh <chip> <mode>";
echo "for example:";
echo "ir mode : ./demo_config.sh hi3516cv300 1";
else
if [ $1 = "hi3516ev100" ]; then
gpio_0=53;
gpio_1=24;
elif [ $1 = "hi3516cv300" ]; then
gpio_0=53;
gpio_1=54;
else
echo "wrong chipid: $1, please select: hi3516cv300 or hi3516ev100.";
exit;
fi
if [ $2 -eq 0 ]; then
echo "normal mode, ir_cut on"
ir_cut_enable > /dev/null;
elif [ $2 -eq 1 ]; then
echo "ir mode, ir_cut off"
ir_cut_disable > /dev/null;
else
echo "invalid mode, please slect 0 or 1."
fi
fi

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@ -0,0 +1,572 @@
#!/bin/sh
#
# This is part of OpenIPC.org project | 2020.08.01
#
# ar0237 imx290 imx307 imx323 imx385 jxf22 ov2718 ov2718_2a sc2235
# SoC detect
chipid=$(ipctool --chip_id)
# MMZ config
mem_start=0x80000000; # phy mem start
mem_total=$(awk -F '=' '$1=="totalmem"{print $2}' RS=" " /proc/cmdline | tr -d 'M')
mem_total=${mem_total:=64}
os_mem_size=$(awk -F '=' '$1=="mem"{print $2}' RS=" " /proc/cmdline | tr -d 'M')
os_mem_size=${os_mem_size:=32}
# Sensor config
SNS_TYPE=$(awk -F '=' '$1=="sensor"{print $2}' RS=" " /proc/cmdline)
SNS_TYPE=${SNS_TYPE:=ar0237_i2c_dc}
##################################################################
#if [ ${chipid} = "hi3516ev100" ]; then
# mem_total=64; # 64M, total mem
# os_mem_size=32; # 32M, os mem
# mmz_start=0x82000000; # mmz start addr, is calculated automatically
# mmz_size=32M; # 32M, mmz size, is calculated automatically
#elif [ ${chipid} = "hi3516cv300" ]; then
# mem_total=128; # 128M, total mem
# os_mem_size=40; # 40M, os mem
# mmz_start=0x82800000; # mmz start addr, is calculated automatically
# mmz_size=88M; # 88M, mmz size, is calculated automatically
#else
# echo "Wrong chip_id: ${chipid}";
# exit 1;
#fi
#
# Checker
#echo "${chipid}: ${mem_total}/${os_mem_size} | ${mem_start}/${mmz_start} | ${mmz_size}"
####################vo config#################################
#vou interface mode: default(cvbs), bt656, lcd
vou_intf_mode="default";
##################################################################
####################clk config####################################
vedu_frequency=198000000; # 198M, vedu clock frequency
vgs_frequency=297000000; # 297M, vgs clock frequency
vpss_frequency=250000000; # 250M, vpss clock frequency
ive_frequency=297000000; # 297M, ive clock frequency
##################################################################
report_error()
{
echo "******* Error: There's something wrong, please check! *****"
exit 1
}
insert_audio()
{
insmod hi3516cv300_aio.ko
insmod hi3516cv300_ai.ko
insmod hi3516cv300_ao.ko
insmod hi3516cv300_aenc.ko
insmod hi3516cv300_adec.ko
insmod hi_acodec.ko
#insmod extdrv/hi_tlv320aic31.ko
echo "insert audio"
}
remove_audio()
{
#rmmod hi_tlv320aic31.ko
rmmod hi3516cv300_adec
rmmod hi3516cv300_aenc
rmmod hi3516cv300_ao
rmmod hi3516cv300_ai
rmmod hi_acodec
rmmod hi3516cv300_aio
echo "remove audio"
}
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=37125000;
intf_mode="default"
####################sensor note#################################
#if you want to configure a new sensor, maybe you need to know the sensor parameters as follows
#(1)bus_type: i2c or ssp, write and read sensor register.
#(2)pinmux_mode: i2c_mipi/ssp_mipi/i2c_dc/ssp_dc. For example, if the bus_type is i2c and the sensor output DC sequence, the pinmux_mode would be i2c_dc.
#(3)sensor_clk_freq: sensor clock frequency, please read the datasheet about sensor.
#(4)intf_mode: if the interface mode of viu is bt1120, the value should be bt1120, else default.
#(5)viu_frequency: viu clock frequecny, you can adjust different frequency when the scene changed.
#(6)isp_div: isp clock divider. Input clock frequency is the same as viu clock frequency.
##################################################################
insert_sns()
{
case $SNS_TYPE in
ar0237)
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=27000000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
ar0237_i2c_dc)
# This was added by ZigFisher
bus_type="i2c";
pinmux_mode="i2c_dc";
sensor_clk_freq=27000000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
bt1120)
intf_mode="bt1120";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
isp_div=1; # isp div clk, freq = viu_clk_freq / div
;;
imx290)
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=37125000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
imx291_i2c_lvds|imx307_i2c_lvds)
# This was added by @widgetii
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=37125000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
imx307_i2c_mipi)
# This was added by ZigFisher
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=37125000;
intf_mode="default";
isp_div=1; # isp div clk, freq = viu_clk_freq / div
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
imx323_spi_dc)
# This was added by ZigFisher
bus_type="ssp";
pinmux_mode="ssp_dc";
sensor_clk_freq=37125000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
imx323_i2c_dc)
# This was added by ZigFisher
bus_type="i2c";
pinmux_mode="i2c_dc";
sensor_clk_freq=37125000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
imx385)
# get from hi3516cv300 profile (!!! check viu_frequency and isp_div !!!)
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=37125000;
intf_mode="default";
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
;;
jxf22)
# get from hi3516ev100 profile (!!! check viu_frequency and isp_div !!!)
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=24000000;
intf_mode="default";
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
echo "66" > /sys/class/gpio/export; # GPIO8_2
echo "out" > /sys/class/gpio/gpio66/direction;
echo "0" > /sys/class/gpio/gpio66/value;
;;
jxf22_i2c_dc)
# This was added by ZigFisher
bus_type="i2c";
pinmux_mode="i2c_dc";
sensor_clk_freq=24000000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
echo "66" > /sys/class/gpio/export; # GPIO8_2
echo "out" > /sys/class/gpio/gpio66/direction;
echo "0" > /sys/class/gpio/gpio66/value;
;;
ov2718)
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=24000000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
ov2718_2a)
bus_type="i2c";
pinmux_mode="i2c_mipi";
sensor_clk_freq=24000000;
intf_mode="default";
viu_frequency=250000000; # 250M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
;;
sc2235p_i2c_dc)
# This was added by ZigFisher
bus_type="i2c";
pinmux_mode="i2c_dc";
sensor_clk_freq=27000000;
intf_mode="default";
if [ ${chipid} = "hi3516ev100" ]; then
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
elif [ ${chipid} = "hi3516cv300" ]; then
viu_frequency=198000000; # 198M, viu clock frequency
isp_div=2; # isp div clk, freq = viu_clk_freq / div
else
echo "Wrong chip_id: ${chipid}";
exit 1;
fi
;;
*)
echo "xxxx Invalid sensor type $SNS_TYPE xxxx"
report_error;;
esac
}
insert_isp()
{
insmod hi3516cv300_isp.ko update_pos=0 proc_param=30 port_init_delay=0
}
insert_ko()
{
insert_sns
insmod sys_config.ko vi_vpss_online=$b_arg_online
# driver load
insmod hi_osal.ko mmz=anonymous,0,$mmz_start,$mmz_size anony=1 || report_error
#insmod hi3516cv300_wdt.ko
#insmod hi3516cv300_rtc.ko
insmod hi3516cv300_base.ko
insmod hi3516cv300_sys.ko vi_vpss_online=$b_arg_online sensor=$SNS_TYPE mem_total=$mem_total
insmod hi3516cv300_region.ko
insmod hi3516cv300_vgs.ko vgs_clk_frequency=$vgs_frequency
insmod hi3516cv300_viu.ko detect_err_frame=10 viu_clk_frequency=$viu_frequency isp_div=$isp_div input_mode=$intf_mode
insert_isp;
insmod hi3516cv300_vpss.ko vpss_clk_frequency=$vpss_frequency
insmod hi3516cv300_vou.ko vou_mode=$vou_intf_mode
#insmod hi3516cv300_vou.ko detectCycle=0 vou_mode=$vou_intf_mode #close dac detect
#insmod hi3516cv300_vou.ko transparentTransmit=1 vou_mode=$vou_intf_mode #enable transparentTransmit
insmod hi3516cv300_rc.ko
insmod hi3516cv300_venc.ko
insmod hi3516cv300_chnl.ko
insmod hi3516cv300_vedu.ko vedu_clk_frequency=$vedu_frequency
insmod hi3516cv300_h264e.ko
insmod hi3516cv300_h265e.ko
insmod hi3516cv300_jpege.ko
insmod hi3516cv300_ive.ko save_power=1 ive_clk_frequency=$ive_frequency
insmod hi3516cv300_sensor.ko sensor_bus_type=$bus_type sensor_clk_frequency=$sensor_clk_freq sensor_pinmux_mode=$pinmux_mode
#insmod hi_adc.ko
#insmod hi_gpio.ko
#insmod gpioi2c_ex.ko
#insmod sha_204.ko
#insmod hi_sensor_i2c.ko
#insmod hi_ssp_sony.ko
insmod hi3516cv300_pwm.ko
insmod hi_piris.ko
#insmod exfat.ko
insert_audio
insmod hi_mipi.ko
echo "==== Your input Sensor type is $SNS_TYPE ===="
}
remove_ko()
{
remove_audio
rmmod hi3516cv300_pwm
rmmod hi_piris
rmmod hi3516cv300_sensor
rmmod hi3516cv300_ive
rmmod hi3516cv300_rc
rmmod hi3516cv300_jpege
rmmod hi3516cv300_h264e
rmmod hi3516cv300_h265e
rmmod hi3516cv300_vedu
rmmod hi3516cv300_chnl
rmmod hi3516cv300_venc
rmmod hi3516cv300_vou
rmmod hi3516cv300_vpss
rmmod hi3516cv300_isp
rmmod hi3516cv300_viu
rmmod hi_mipi
rmmod hi3516cv300_vgs
rmmod hi3516cv300_region
rmmod hi3516cv300_sys
rmmod hi3516cv300_base
rmmod hi_osal
rmmod sys_config
}
load_usage()
{
echo "Usage: ./load_universal [-option] [sensor_name]"
echo "options:"
echo " -i insert modules"
echo " -r remove modules"
echo " -a remove modules first, then insert modules"
echo " -sensor sensor_name config sensor type [default: imx290]"
echo " -osmem os_mem_size config os mem size [unit: M, default: XX]"
echo " -total_mem_size config total mem size [unit: M, default: YY]"
echo " -online vi/vpss online"
echo " -h help information"
echo -e "Available sensors: ar0237 imx290 imx307 imx323 imx385 jxf22 ov2718 ov2718_2a sc2235"
echo -e "notes: osmem option can't be used when mmz zone partition is enable\n\n"
echo -e "for example online: ./load_universal -i -sensor jxf22_i2c_dc -online\n"
echo -e " offline: ./load_universal -i -sensor jxf22_i2c_dc \n"
}
calc_mmz_info()
{
mmz_start=`echo "$mem_start $os_mem_size" |
awk 'BEGIN { temp = 0; }
{
temp = $1/1024/1024 + $2;
}
END { printf("0x%x00000\n", temp); }'`
mmz_size=`echo "$mem_total $os_mem_size" |
awk 'BEGIN { temp = 0; }
{
temp = $1 - $2;
}
END { printf("%dM\n", temp); }'`
echo "mmz_start: $mmz_start, mmz_size: $mmz_size"
}
start_majestic()
{
# Use it for stopping service: killall -sigint majestic
sleep 1
export SENSOR=$SNS_TYPE
sleep 30
ntpd -n -q -p 0.openwrt.pool.ntp.org -p 1.openwrt.pool.ntp.org -p 2.openwrt.pool.ntp.org -p 3.openwrt.pool.ntp.org
majestic 2>&1 | logger -p daemon.info -t majestic &
}
######################parse arg###################################
b_arg_os_mem=0
b_arg_total_mem=0
b_arg_sensor=0
b_arg_insmod=0
b_arg_remove=0
b_arg_online=0
b_arg_restore=0
for arg in $@
do
if [ $b_arg_total_mem -eq 1 ]; then
b_arg_total_mem=0;
mem_total=$arg;
if [ -z $mem_total ]; then
echo "[error] mem_total is null"
exit;
fi
fi
if [ $b_arg_os_mem -eq 1 ] ; then
b_arg_os_mem=0;
os_mem_size=$arg;
if [ -z $os_mem_size ]; then
echo "[error] os_mem_size is null"
exit;
fi
fi
if [ $b_arg_sensor -eq 1 ] ; then
b_arg_sensor=0
SNS_TYPE=$arg;
fi
case $arg in
"-i")
b_arg_insmod=1;
;;
"-r")
b_arg_remove=1;
;;
"-a")
b_arg_insmod=1;
b_arg_remove=1;
;;
"-h")
load_usage;
;;
"-sensor")
b_arg_sensor=1;
;;
"-osmem")
b_arg_os_mem=1;
;;
"-total")
b_arg_total_mem=1;
;;
"-restore")
b_arg_restore=1;
;;
"-online")
b_arg_online=1;
;;
esac
done
#######################parse arg end########################
if [ $os_mem_size -ge $mem_total ] ; then
echo "[err] os_mem[$os_mem_size], over total_mem[$mem_total]"
exit;
fi
calc_mmz_info;
#######################Action###############################
if [ $# -lt 1 ]; then
load_usage;
exit 0;
fi
if [ $b_arg_remove -eq 1 ]; then
killall -sigint majestic
remove_ko;
fi
if [ $b_arg_insmod -eq 1 ]; then
insert_ko;
start_majestic;
fi
if [ $b_arg_restore -eq 1 ]; then
sys_restore;
fi

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@ -0,0 +1,279 @@
[sensor]
Sensor_type =ar0237 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_ar0237_i2c_dc.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2
;INPUT_MODE_HISPI = 3
;INPUT_MODE_CMOS = 4 ...etc
dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =1 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
;YUYV
Data_seq =4 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =0 ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,281 @@
[sensor]
Sensor_type =imx291 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_imx291_i2c_lvds.so ;sensor lib path
[mode]
input_mode =2 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 1 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =2 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =6 ;VI_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */
;VI_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */
;VI_MODE_DIGITAL_CAMERA, /* digital camera mode */
;VI_MODE_BT1120_STANDARD, /* BT.1120 progressive mode */
;VI_MODE_BT1120_INTERLEAVED, /* BT.1120 interstage mode */
;VI_MODE_MIPI, /* MIPI mode*/
;VI_MODE_LVDS,
;VI_MODE_HISPI
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=1 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=30 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,281 @@
[sensor]
Sensor_type =imx307 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_imx307_i2c_lvds.so ;sensor lib path
[mode]
input_mode =2 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2 ...etc
dev_attr = 1 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =2 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =6 ;VI_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */
;VI_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */
;VI_MODE_DIGITAL_CAMERA, /* digital camera mode */
;VI_MODE_BT1120_STANDARD, /* BT.1120 progressive mode */
;VI_MODE_BT1120_INTERLEAVED, /* BT.1120 interstage mode */
;VI_MODE_MIPI, /* MIPI mode*/
;VI_MODE_LVDS,
;VI_MODE_HISPI
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=1 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=30 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,279 @@
[sensor]
Sensor_type =imx307 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_imx307_i2c_mipi.so ;sensor lib path
[mode]
input_mode =0 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2
;INPUT_MODE_HISPI = 3
;INPUT_MODE_CMOS = 4 ...etc
dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =3 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =0 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =5 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
;YUYV
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =0 ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,279 @@
[sensor]
Sensor_type =imx323 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_imx323_i2c_dc.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2
;INPUT_MODE_HISPI = 3
;INPUT_MODE_CMOS = 4 ...etc
dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =0 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
;YUYV
Data_seq =4 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=200 ;
DevRect_y=20 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,279 @@
[sensor]
Sensor_type =imx323 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_imx323_spi_dc.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2
;INPUT_MODE_HISPI = 3
;INPUT_MODE_CMOS = 4 ...etc
dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =0 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
;YUYV
Data_seq =4 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=200 ;
DevRect_y=20 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,279 @@
[sensor]
Sensor_type =jxf22 ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_jxf22_i2c_dc.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2
;INPUT_MODE_HISPI = 3
;INPUT_MODE_CMOS = 4 ...etc
dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFC0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
;YUYV
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =0 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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@ -0,0 +1,279 @@
[sensor]
Sensor_type =sc2235p ;sensor name
Mode =0 ;WDR_MODE_NONE = 0
;WDR_MODE_BUILT_IN = 1
;WDR_MODE_2To1_LINE = 2
;WDR_MODE_2To1_LINE = 3
;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc
DllFile = /usr/lib/sensors/libsns_sc2235p_i2c_dc.so ;sensor lib path
[mode]
input_mode =4 ;INPUT_MODE_MIPI = 0
;INPUT_MODE_SUBLVDS = 1
;INPUT_MODE_LVDS = 2
;INPUT_MODE_HISPI = 3
;INPUT_MODE_CMOS = 4 ...etc
dev_attr = 0 ;mipi_dev_attr_t = 0
;lvds_dev_attr_t = 1
;NULL =2
[mipi]
;----------only for mipi_dev---------
data_type =-1 ;raw data type: 8/10/12/14 bit
;RAW_DATA_8BIT = 1
;RAW_DATA_10BIT = 2
;RAW_DATA_12BIT = 3
;RAW_DATA_14BIT = 4
lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable
[lvds]
;----------only for lvds_dev---------
img_size_w = 1920 ;oringnal sensor input image size W
img_size_h = 1080 ;oringnal sensor input image size H
wdr_mode = 0 ;HI_WDR_MODE_NONE =0
;HI_WDR_MODE_2F = 1
;HI_WDR_MODE_3F = 2
;HI_WDR_MODE_4F =3
sync_mode = 1 ;LVDS_SYNC_MODE_SOL = 0
;LVDS_SYNC_MODE_SAV = 1
raw_data_type = 2 ;RAW_DATA_8BIT = 0
;RAW_DATA_10BIT = 1
;RAW_DATA_12BIT = 2
;RAW_DATA_14BIT = 3
data_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
sync_code_endian = 1 ;LVDS_ENDIAN_LITTLE = 0
;LVDS_ENDIAN_BIG = 1
lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable
lvds_lane_num = -1 ;LVDS_LANE_NUM
wdr_vc_num = -1 ;WDR_VC_NUM
sync_code_num = -1 ;SYNC_CODE_NUM
sync_code_0 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_1 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_2 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_3 = 0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0|0xab0|0xb60|0x800|0x9d0
sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|
[isp_image]
Isp_x =0
Isp_y =0
Isp_W =1920
Isp_H =1080
Isp_FrameRate=25
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFC0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
;YUYV
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =0 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0 ;
DevRect_y=0 ;
DevRect_w=1920 ;
DevRect_h=1080 ;
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1920
CapRect_Height=1080
DestSize_Width=1920
DestSize_Height=1080
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22
;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc
CompressMode =0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DciEn =FALSE
Vpss_IeEn =FALSE
Vpss_NrEn =TRUE
Vpss_HistEn =FALSE
Vpss_DieMode=1 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_corp]
Crop_enable =FALSE
Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/
;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/
Crop_X =128
Crop_Y =128
Crop_W =1158
Crop_H =562
[vpss_chn]
Vpss_W =1920
Vpss_H =1080
CompressMode=0 ;COMPRESS_MODE_NONE = 0
;COMPRESS_MODE_SEG =1 ...etc
Mirror =FALSE;Whether to mirror
Flip =FALSE;Whether to flip
[vb_conf]
VbCnt=10
vbTimes=15 ;when raw=8bit vbTimes = 10
;when raw=10/12 bit vbTimes = 15
;when raw=14/16 bit vbTimes = 20
[venc_comm]
venc_chn =1 ;create venc chn number;(0,2]
BufCnt = 1 ;network meida-trans bufcnt
[venc_0]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =30
TargetFrmRate=30
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=45
PQp=40
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[venc_1]
PicWidth =1920
PicHeight =1080
Profile =2
RcMode =VENC_RC_MODE_H264CBR
Gop =50
StatTime =2
ViFrmRate =25
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=0
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=40
PQp=45
;-------- for REF_EX IsliceEnable------
IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion
IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective
RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang
ReqIQp = 30
;-------- for REF_EX ViEnable------
ViEnable = TRUE
ViInterval = 50 ; 2s
ViQpDelta = 2
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=3

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libsns_imx291_i2c_lvds.so

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################################################################################
#
# hisilicon-osdrv-hi3516cv300
#
################################################################################
HISILICON_OSDRV_HI3516CV300_VERSION =
HISILICON_OSDRV_HI3516CV300_SITE =
HISILICON_OSDRV_HI3516CV300_LICENSE = MIT
HISILICON_OSDRV_HI3516CV300_LICENSE_FILES = LICENSE
define HISILICON_OSDRV_HI3516CV300_INSTALL_TARGET_CMDS
$(INSTALL) -m 755 -d $(TARGET_DIR)/etc/init.d
$(INSTALL) -m 755 -t $(TARGET_DIR)/etc/init.d $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/script/S99hisilicon
$(INSTALL) -m 755 -d $(TARGET_DIR)/etc/sensors
$(INSTALL) -m 644 -t $(TARGET_DIR)/etc/sensors $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/sensor/config/*.ini
$(INSTALL) -m 755 -d $(TARGET_DIR)/lib/modules/3.18.20/hisilicon
$(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.18.20/hisilicon $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/kmod/*.ko
# $(INSTALL) -m 644 -t $(TARGET_DIR)/lib/modules/3.18.20/hisilicon $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/kmod/xxx.ko
$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/bin
$(INSTALL) -m 755 -t $(TARGET_DIR)/usr/bin $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/script/load_hisilicon
$(INSTALL) -m 755 -t $(TARGET_DIR)/usr/bin $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/script/ircut_demo
$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/lib/fonts
$(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/fonts $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/fonts/*.bin
$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/lib/sensors
$(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/sensors $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/sensor/*.so
$(INSTALL) -m 755 -d $(TARGET_DIR)/usr/lib
$(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/ $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/lib/*.so
# $(INSTALL) -m 644 -t $(TARGET_DIR)/usr/lib/ $(BR2_EXTERNAL_HISILICON_PATH)/package/hisilicon-osdrv-hi3516cv300/files/lib/xxx.so
endef
$(eval $(generic-package))

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@ -1,69 +0,0 @@
/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
Sigmastar Technology Corp. and be kept in strict confidence
(Sigmastar Confidential Information) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of Sigmastar Confidential
Information is unlawful and strictly prohibited. Sigmastar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
#ifndef _CUSEARLYINIT_PARA_H_
#define _CUSEARLYINIT_PARA_H_
enum {
EARLYINIT_PARAM_TYPE_MASTER,
EARLYINIT_PARAM_TYPE_CUST_ROSE
};
typedef struct
{
unsigned short u16SnrEarlyFps;
unsigned short u16SnrEarlyFlicker;
unsigned long u32SnrEarlyShutter;
unsigned long u32SnrEarlyGainX1024;
unsigned long u32SnrEarlyDGain;
unsigned long u32SnrEarlyShutterShort;
unsigned long u32SnrEarlyGainX1024Short;
unsigned long u32SnrEarlyDGainShort;
unsigned short u16SnrEarlyAwbRGain;
unsigned short u16SnrEarlyAwbGGain;
unsigned short u16SnrEarlyAwbBGain;
} __attribute__ ((packed)) MasterEarlyInitParam_t;
typedef struct
{
unsigned short u16SnrEarlyFps;
unsigned short u16SnrEarlyFlicker;
unsigned long u32SnrEarlyShutter;
unsigned long u32SnrEarlyGainX1024;
unsigned long u32SnrEarlyDGain;
unsigned long u32DeBugLevel_AWB_PERIOD;
unsigned long u32DeBugLevel_AeEarlyStageCnt;
unsigned short u16SnrEarlyAwbRGain;
unsigned short u16SnrEarlyAwbGGain;
unsigned short u16SnrEarlyAwbBGain;
} __attribute__ ((packed)) CusEarlyInitParam_t;
typedef struct
{
unsigned long u32Revision;
unsigned long u32Size;
union
{
MasterEarlyInitParam_t tMasSnrEarlyInitParam;
// Add customize early-init parameter here, if any
CusEarlyInitParam_t tCusSnrEarlyInitParam;
unsigned char u8Data[64];
} u;
} IspSensorEarlyInitParam_t;
#endif // _CUSEARLYINIT_PARA_H_

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@ -1,977 +0,0 @@
/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
Sigmastar Technology Corp. and be kept in strict confidence
(Sigmastar Confidential Information) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of Sigmastar Confidential
Information is unlawful and strictly prohibited. Sigmastar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
/*! @file drv_ms_cus_sensor.h
@brief This file contains Infinity ISP sensor driver interface.
*/
/** @defgroup group1 ISP Sensor Driver Interface
* @{
*/
#ifndef DRV_MS_CUS_SENSOR_H_
#define DRV_MS_CUS_SENSOR_H_
#ifdef __cplusplus
extern "C"
{
#endif
#include <sensor_i2c_api.h>
#define I2C_RETRYTIME (5)
#ifndef SUCCESS
#define FAIL (-1)
#define SUCCESS 0
#endif
#ifdef __cplusplus
#define EXPORT_CUS extern "C"
#else
#define EXPORT_CUS
#endif
#define CUS_MSTART_CAMSENSOR_CAP_VERSION 0x0001
//#define usleep(usec) CamOsMsSleep(usec*1000);
//#define usleep(usec) udelay(usec)
//#define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0]))
#define SENSOR_DRIVER_MODE_NOT_SUUPORT (0xFFFF)
struct __ms_cus_sensor; /**< Sensor driver handle */
//struct __ISensorAPI; /**< Sensor to ISP control interface */
/*! @brief Resolution descriptor*/
typedef struct _cus_camsensor_res{
u32 width; /**< Image crop width */
u32 height; /**< Image crop height */
u32 max_fps; /**< Max fps in this resolution */
u32 min_fps; /**< Min fps in this resolution*/
u32 crop_start_x;
u32 crop_start_y;
u32 nOutputWidth; /**< Sensor actual output width */
u32 nOutputHeight; /**< Sensor actual output height */
char strResDesc[32];
} __attribute__((packed, aligned(4))) cus_camsensor_res;
/*! @brief Resolution list*/
typedef struct _cus_camsensor_res_list
{
u32 num_res; /**< number of sensor resolution in list */
u32 ulcur_res; /**< current sensor resolution*/
cus_camsensor_res res[12]; /**< resolution list */
} __attribute__((packed, aligned(4))) cus_camsensor_res_list;
/*! @brief Select sensor type */
typedef enum {
ISP_SOC, /**< Not support */
ISP_EXT /**< sensor without built-in ISP */
} CUS_CAMSENSOR_ISPTYPE;
/*! @brief Sensor bayer raw pixel order */
typedef enum {
CUS_BAYER_RG = 0, /**< bayer data start with R channel */
CUS_BAYER_GR, /**< bayer data start with Gr channel */
CUS_BAYER_BG, /**< bayer data start with B channel */
CUS_BAYER_GB /**< bayer data start with Gb channel */
} CUS_SEN_BAYER;
typedef enum {
CUS_RGBIR_R0 = 0,
CUS_RGBIR_G0 = 1,
CUS_RGBIR_B0 = 2,
CUS_RGBIR_G1 = 3,
CUS_RGBIR_G2 = 4,
CUS_RGBIR_I0 = 5,
CUS_RGBIR_G3 = 6,
CUS_RGBIR_I1 = 7,
CUS_RGBIR_NONE = 8
} CUS_SEN_RGBIR;
/*! @brief Set sensor image mirror and flip.*/
typedef enum {
CUS_ORIT_M0F0, /**< mirror, flip unchanged */
CUS_ORIT_M1F0, /**< mirror changed, flip unchanged */
CUS_ORIT_M0F1, /**< mirror unchanged, flip changed */
CUS_ORIT_M1F1, /**< mirror and flip changed */
} CUS_CAMSENSOR_ORIT;
/*! @brief Get input source type.*/
typedef enum {
CUS_SNR_ANADEC_SRC_NO_READY, /**< input no ready */
CUS_SNR_ANADEC_SRC_PAL, /**< input type is PAL */
CUS_SNR_ANADEC_SRC_NTSC, /**< input type is NTSC */
CUS_SNR_ANADEC_SRC_HD, /**< input source type is HD */
CUS_SNR_ANADEC_SRC_FHD, /**< input source type is FHD */
CUS_SNR_ANADEC_SRC_DISCNT, /**< input disconnect */
CUS_SNR_ANADEC_SRC_MAX, /**< input num max */
}CUS_SNR_ANADEC_SRC_TYPE;
/*! @brief ISP AE event notifycation*/
typedef enum {
CUS_FRAME_INACTIVE = 0, /**< Frame end */
CUS_FRAME_ACTIVE = 1,/**< Frame start */
} CUS_CAMSENSOR_AE_STATUS_NOTIFY;
/*! @brief Sensor bayer raw (8/10 bits) to 12bits mode control */
typedef enum {
CUS_SEN_8TO12_7074, /**< Do not use*/
CUS_SEN_8TO12_7000, /**< Sensor bayer raw is 8 bits*/
CUS_SEN_8TO12_114118, /**< Do not use*/
CUS_SEN_8TO12_11400, /**< Do not use*/
CUS_SEN_10TO12_9098, /**< Do not use*/
CUS_SEN_10TO12_9000, /**< Sensor bayer raw is 10 bits*/
CUS_SEN_10TO12_1121110, /**< Do not use*/
CUS_SEN_10TO12_11200 /**< Do not use*/
} CUS_SEN_FMT_CONV_MODE;
/*! @brief Sensor input raw data precision */
typedef enum {
CUS_DATAPRECISION_8 = 0, /**< raw data precision is 8bits */
CUS_DATAPRECISION_10 = 1, /**< raw data precision is 10bits */
CUS_DATAPRECISION_16 = 2, /**< raw data precision is 16bits */
CUS_DATAPRECISION_12 = 3, /**< raw data precision is 12bits */
CUS_DATAPRECISION_14 = 4, /**< raw data precision is 14bits */
} CUS_DATAPRECISION;
/*! @brief Select sensor data intarface */
typedef enum {
CUS_SENIF_BUS_PARL = 0, /**< sensor data bus is parallel bus */
CUS_SENIF_BUS_MIPI = 1, /**< sensor data bus is mipi */
CUS_SENIF_BUS_BT601 = 2,
CUS_SENIF_BUS_BT656 = 3,
CUS_SENIF_BUS_BT1120 = 4,
} CUS_SENIF_BUS;
typedef enum {
CUS_SEN_INPUT_FORMAT_YUV422,
CUS_SEN_INPUT_FORMAT_RGB,
} CUS_SEN_INPUT_FORMAT;
/*! @brief Select pin polarity */
typedef enum {
CUS_CLK_POL_POS = 0, /**< High active */
CUS_CLK_POL_NEG /**< Low active */
} CUS_CLK_POL;
typedef enum
{
CUS_SENSOR_YUV_ORDER_CY = 0,
CUS_SENSOR_YUV_ORDER_YC = 1,
}CUS_SENSOR_YUV_ORDER;
/*! @brief Sensor master clock select */
typedef enum {
CUS_CMU_CLK_27MHZ,
CUS_CMU_CLK_21P6MHZ,
CUS_CMU_CLK_12MHZ,
CUS_CMU_CLK_5P4MHZ,
CUS_CMU_CLK_36MHZ,
CUS_CMU_CLK_54MHZ,
CUS_CMU_CLK_43P2MHZ,
CUS_CMU_CLK_61P7MHZ,
CUS_CMU_CLK_72MHZ,
CUS_CMU_CLK_48MHZ,
CUS_CMU_CLK_24MHZ,
CUS_CMU_CLK_37P125MHZ,
CUS_CMU_CLK_LPLL_DIV1,
CUS_CMU_CLK_LPLL_DIV2,
CUS_CMU_CLK_LPLL_DIV4,
CUS_CMU_CLK_LPLL_DIV8,
} CUS_MCLK_FREQ; //Depends on chip.
//Depends on chip definition.
typedef enum {
CUS_SR0_PAR_DISABLE,
CUS_SR0_PAR_MODE_1,
CUS_SR0_PAR_MODE_2,
} CUS_SR0_PAR_MODE;
//Depends on chip definition.
typedef enum {
CUS_SR0_BT656_DISABLE,
CUS_SR0_BT656_MODE_1,
CUS_SR0_BT656_MODE_2,
CUS_SR0_BT656_MODE_3,
CUS_SR0_BT656_MODE_4,
} CUS_SR0_BT656_MODE;
//Depends on chip definition.
typedef enum {
CUS_SR1_BT656_DISABLE,
CUS_SR1_BT656_MODE_1,
} CUS_SR1_BT656_MODE;
//Depends on chip definition.
typedef enum {
CUS_SR0_BT601_DISABLE,
CUS_SR0_BT601_MODE_1,
CUS_SR0_BT601_MODE_2,
CUS_SR0_BT601_MODE_3,
CUS_SR0_BT601_MODE_4,
} CUS_SR0_BT601_MODE;
//Depends on chip definition.
typedef enum {
CUS_SR0_MIPI_DISABLE,
CUS_SR0_MIPI_MODE_1,
CUS_SR0_MIPI_MODE_2,
} CUS_SR0_MIPI_MODE;
//Depends on chip definition.
typedef enum {
CUS_SR1_MIPI_DISABLE,
CUS_SR1_MIPI_MODE_1,
CUS_SR1_MIPI_MODE_2,
CUS_SR1_MIPI_MODE_3,
CUS_SR1_MIPI_MODE_4,
} CUS_SR1_MIPI_MODE;
//Depends on chip definition.
typedef enum
{
CUS_VIF_BT656_EAV_DETECT = 0,
CUS_VIF_BT656_SAV_DETECT = 1,
}CUS_VIF_BT656_CHANNEL_SELECT;
//Depends on chip definition.
typedef enum
{
CUS_VIF_BT656_VSYNC_DELAY_1LINE = 0,
CUS_VIF_BT656_VSYNC_DELAY_2LINE = 1,
CUS_VIF_BT656_VSYNC_DELAY_0LINE = 2,
CUS_VIF_BT656_VSYNC_DELAY_AUTO = 3,
}CUS_VIF_BT656_VSYNC_DELAY;
typedef enum
{
CUS_SENSOR_FUNC_DISABLE = 0,
CUS_SENSOR_FUNC_ENABLE = 1,
}CUS_SENSOR_FUNC;
typedef enum
{
CUS_SENSOR_PAD_GROUP_A = 0,
CUS_SENSOR_PAD_GROUP_B = 1,
}CUS_SENSOR_PAD_GROUP;
typedef enum
{
CUS_SENSOR_CHANNEL_MODE_REALTIME_NORMAL = 0,
CUS_SENSOR_CHANNEL_MODE_REALTIME_HDR = 1,
CUS_SENSOR_CHANNEL_MODE_RAW_STORE = 2,
CUS_SENSOR_CHANNEL_MODE_RAW_STORE_HDR = 3,
}CUS_SENSOR_CHANNEL_MODE;
typedef struct {
unsigned int gain;
unsigned int offset;
} CUS_GAIN_GAP_ARRAY;
//////////////////////////////////////
// sensor functions
//////////////////////////////////////
typedef struct {
u32 length; //header length
u32 version; //version
}CUS_CAMSENSOR_CAP;
/////////////////// ISP for SENSOR API ///////////////////
typedef enum {
CUS_INT_TASK_AE = (1<<0),
CUS_INT_TASK_AWB = (1<<1),
CUS_INT_TASK_AF = (1<<2),
CUS_INT_TASK_VS = (1<<3),
CUS_INT_TASK_VDOS = (1<<4),
} CUS_INT_TASK_TYPE;
#define MAX_RUN_ORDER 16
typedef struct {
u8 RunLength;
u8 Orders[MAX_RUN_ORDER];
u8 CurTaskType;
} CUS_INT_TASK_ORDER;
/////////////////// Shutter Info ///////////////////////
/*! @brief Report shutter information */
typedef struct {
u32 length; /**< struct size */
u32 max; /**< maximun shutter in us*/
u32 min; /**< minimum shutter in us*/
u32 step; /**< shutter in step us*/
} CUS_SHUTTER_INFO;
////////////////// CSI CLOCK ////////////////////////
/*! @brief Select MIPI clock*/
typedef enum {
CUS_CSI_CLK_DISABLE = -1, /**< Disable MIPI clock*/
CUS_CSI_CLK_108M = 0, /**< MIPI pixel rate 864Mbps (1-lane)*/
CUS_CSI_CLK_86M = 1, /**< MIPI pixel rate 344Mbps(1-lane)*/
CUS_CSI_CLK_144M = 2, /**< MIPI pixel rate 1152Mbps(1-lane)*/
CUS_CSI_CLK_172M = 3,
CUS_CSI_CLK_216M = 4,
CUS_CSI_CLK_288M = 5,
CUS_CSI_CLK_40M = 6,
CUS_CSI_CLK_24M = 7,
CUS_CSI_CLK_12M = 8,
CUS_CSI_CLK_123M = 9
}CUS_CSI_CLK;
///////////////// SENSOR PIN CONFIG/////////////////
/*! @brief Sensor pin assignment*/
typedef enum {
CUS_SR_PAD_CFG_1 = 1, /**< Pin config for MIPI 1/2 lanes*/
CUS_SR_PAD_CFG_MIPI = 1, /**< Pin config for MIPI 1/2 lanes*/
CUS_SR_PAD_CFG_2 = 2, /**< Reserved */
CUS_SR_PAD_CFG_3 = 3, /**< Reserved */
CUS_SR_PAD_CFG_10BITS = 4, /**< Pin config for parallel interface 10 bits */
CUS_SR_PAD_CFG_4 = 4, /**< Pin config for parallel interface 12 bits */
CUS_SR_PAD_CFG_12BITS = 5, /**< Pin config for parallel interface 12 bits */
CUS_SR_PAD_CFG_5 = 5, /**< Pin config for parallel interface 12 bits */
CUS_SR_PAD_CFG_6 = 6 /**< Pin config for parallel interface 12 bits */
}CUS_SR_PAD_CFG;
/*! @brief virtual channel0 hsync. mode */
typedef enum
{
PACKET_HEADER_EDGE1 = 0, /**< packet header edge */
PACKET_HEADER_EDGE2 = 1, /**< line end edge */
PACKET_HEADER_EDGE3 = 2, /**< line start edge */
PACKET_FOOTER_EDGE = 3, /**< packet footer edge */
}CUS_CSI_VC_HS_MODE;
typedef enum
{
CUS_HDR_MODE_NONE = 0,
CUS_HDR_MODE_SONY_DOL = 1,
CUS_HDR_MODE_DCG = 2,
CUS_HDR_MODE_EMBEDDED_RAW8 = 3,
CUS_HDR_MODE_EMBEDDED_RAW10 = 4,
CUS_HDR_MODE_EMBEDDED_RAW12 = 5,
CUS_HDR_MODE_EMBEDDED_RAW16 = 6, //Only for OV2718?
CUS_HDR_MODE_LI = 7,
CUS_HDR_MODE_MULTI_VC = 8,
}CUS_HDR_MODE;
typedef enum
{
// Index 0
SENSOR_DRIVER_MODE_VGA_30P_RESOLUTION, // 640*360 30P
SENSOR_DRIVER_MODE_VGA_50P_RESOLUTION, // 640*360 50P
SENSOR_DRIVER_MODE_VGA_60P_RESOLUTION, // 640*360 60P
SENSOR_DRIVER_MODE_VGA_100P_RESOLUTION, // 640*360 100P
SENSOR_DRIVER_MODE_VGA_120P_RESOLUTION, // 640*360 120P
// Index 5
SENSOR_DRIVER_MODE_HD_24P_RESOLUTION, // 1280*720 24P
SENSOR_DRIVER_MODE_HD_30P_RESOLUTION, // 1280*720 30P
SENSOR_DRIVER_MODE_HD_50P_RESOLUTION, // 1280*720 50P
SENSOR_DRIVER_MODE_HD_60P_RESOLUTION, // 1280*720 60P
SENSOR_DRIVER_MODE_HD_100P_RESOLUTION, // 1280*720 100P
// Index 10
SENSOR_DRIVER_MODE_HD_120P_RESOLUTION, // 1280*720 120P
SENSOR_DRIVER_MODE_1600x900_30P_RESOLUTION, // 1600*900 30P
SENSOR_DRIVER_MODE_FULL_HD_15P_RESOLUTION, // 1920*1080 15P
SENSOR_DRIVER_MODE_FULL_HD_24P_RESOLUTION, // 1920*1080 24P
SENSOR_DRIVER_MODE_FULL_HD_25P_RESOLUTION, // 1920*1080 25P
// Index 15
SENSOR_DRIVER_MODE_FULL_HD_30P_RESOLUTION, // 1920*1080 30P
SENSOR_DRIVER_MODE_FULL_HD_50P_RESOLUTION, // 1920*1080 50P
SENSOR_DRIVER_MODE_FULL_HD_60P_RESOLUTION, // 1920*1080 60P
SENSOR_DRIVER_MODE_SUPER_HD_30P_RESOLUTION, // 2304*1296 30P
SENSOR_DRIVER_MODE_SUPER_HD_25P_RESOLUTION, // 2304*1296 25P
// Index 20
SENSOR_DRIVER_MODE_SUPER_HD_24P_RESOLUTION, // 2304*1296 24P
SENSOR_DRIVER_MODE_1440_30P_RESOLUTION, // 2560*1440 30P
SENSOR_DRIVER_MODE_2D7K_15P_RESOLUTION, // 2704*1524 15P
SENSOR_DRIVER_MODE_2D7K_30P_RESOLUTION, // 2704*1524 30P
SENSOR_DRIVER_MODE_4K2K_15P_RESOLUTION, // 3840*2160 15P
// Index 25
SENSOR_DRIVER_MODE_4K2K_30P_RESOLUTION, // 3840*2160 30P
SENSOR_DRIVER_MODE_4TO3_VGA_30P_RESOLUTION, // 640*480 30P
SENSOR_DRIVER_MODE_4TO3_1D2M_30P_RESOLUTION, // 1280*960 30P
SENSOR_DRIVER_MODE_4TO3_1D5M_30P_RESOLUTION, // 1440*1080 30P
SENSOR_DRIVER_MODE_4TO3_3M_15P_RESOLUTION, // 2048*1536 15P
// Index 30
SENSOR_DRIVER_MODE_4TO3_3M_30P_RESOLUTION, // 2048*1536 30P
SENSOR_DRIVER_MODE_4TO3_5M_15P_RESOLUTION, // 2560*1920 15P
SENSOR_DRIVER_MODE_4TO3_5M_30P_RESOLUTION, // 2560*1920 30P
SENSOR_DRIVER_MODE_4TO3_8M_15P_RESOLUTION, // 3264*2448 15P
SENSOR_DRIVER_MODE_4TO3_8M_30P_RESOLUTION, // 3264*2448 30P
// Index 35
SENSOR_DRIVER_MODE_4TO3_10M_15P_RESOLUTION, // 3648*2736 15P
SENSOR_DRIVER_MODE_4TO3_10M_30P_RESOLUTION, // 3648*2736 30P
SENSOR_DRIVER_MODE_4TO3_12M_15P_RESOLUTION, // 4032*3024 15P
SENSOR_DRIVER_MODE_4TO3_12M_30P_RESOLUTION, // 4032*3024 30P
SENSOR_DRIVER_MODE_4TO3_14M_15P_RESOLUTION, // 4352*3264 15P
// Index 40
SENSOR_DRIVER_MODE_4TO3_14M_30P_RESOLUTION, // 4352*3264 30P
SENSOR_DRIVER_MODE_4K2K_24P_RESOLUTION,
SENSOR_DRIVER_MODE_PAL_25P_RESOLUTION,
SENSOR_DRIVER_MODE_NTSC_30P_RESOLUTION,
// For Camera Preview
SENSOR_DRIVER_MODE_BEST_CAMERA_PREVIEW_RESOLUTION,
SENSOR_DRIVER_MODE_BEST_CAMERA_CAPTURE_16TO9_RESOLUTION,
SENSOR_DRIVER_MODE_BEST_CAMERA_CAPTURE_4TO3_RESOLUTION,
SENSOR_DRIVER_MODE_FULL_HD_30P_RESOLUTION_HDR,
} CUS_SNR_RESOLUTION;
#ifdef __cplusplus
extern "C"
#endif
/**@brief ISP sensor interface control API */
typedef struct __ISensorIfAPI //isp sensor interface API
{
/**@brief Reserved */
void* pdata;
/** @brief Set sensor power down pin.
@param[in] idx Sensor pad ID.
@param[in] pol pin polarity.
@retval SUCCESS or FAIL if error occurs.
*/
int (*PowerOff)(u32 idx, CUS_CLK_POL pol);
/** @brief Set sensor power reset pin.
@param[in] idx Sensor pad ID.
@param[in] pol pin polarity.
@retval SUCCESS or FAIL if error occurs.
*/
int (*Reset)(u32 idx, CUS_CLK_POL pol);
/** @brief Configure sensor master clock.
@param[in] idx Sensor pad ID.
@param[in] bONOFF Clock ON/OFF control.
@param[in] mclk Clock frequency Hz.
@retval SUCCESS or FAIL if error occurs.
*/
int (*MCLK)(u32 idx, u8 bONOFF, CUS_MCLK_FREQ mclk);
/** @brief Query sensor master clock.
@param[in] idx Sensor pad ID.
@param[in] mclk Query if clock frequency Hz is available.
@retval SUCCESS or FAIL if error occurs.
*/
int (*QueryMCLK)(u32 idx, CUS_MCLK_FREQ mclk);
/** @brief Query MIPI lane number.
@param[in] idx Sensor pad ID.
@param[in] lane_num Query max lane number.
@retval SUCCESS or FAIL if error occurs.
*/
int (*QueryLaneNum)(u32 idx, u8 *max_lane);
#if 0
/** @brief Select pixel clock source
@remarks Parallel interface only
@param[in] handle Handle to sensor driver.
@param[in] pclk_source Clock source.
@retval SUCCESS or FAIL if error occurs.
*/
int (*PCLK)(CUS_PCLK_SOURCE pclk_source); //senect sensor
/** @brief Configure HSYNC pin polarity.
@remarks Parallel interface only
@param[in] handle Handle to sensor driver.
@param[in] pol pin polarity.
@retval SUCCESS or FAIL if error occurs.
*/
int (*HsyncPol)(CUS_CLK_POL pol);
/** @brief [parallel interface only] Configure VSYNC pin polarity.
@param[in] handle Handle to sensor driver.
@param[in] pol pin polarity.
@retval SUCCESS or FAIL if error occurs.
*/
int (*VsyncPol)(CUS_CLK_POL pol);
/** @brief Configure PCLK pin polarity.
@param[in] handle Handle to sensor driver.
@param[in] pol pin polarity.
@retval SUCCESS or FAIL if error occurs.
*/
int (*ClkPol)(CUS_CLK_POL pol);
/** @brief Configure sensor bayer raw pixel order
@param[in] handle Handle to sensor driver.
@param[in] bayer_id Select pixel order
@retval SUCCESS or FAIL if error occurs.
*/
int (*BayerFmt)(CUS_SEN_BAYER bayer_id);
/** @brief Configure sensor RGBIR (8 or 10bits) convert to 12bit bits isp input, This config will be ignore for 12/16 bits sensor bayer raw input.
@param[in] handle Handle to sensor driver.
@param[in] mode Mode select
@retval SUCCESS or FAIL if error occurs.
*/
int (*FmtConv)(CUS_SEN_FMT_CONV_MODE mode);
/** @brief Select sensor image data interface
@param[in] handle Handle to sensor driver.
@param[in] bus Sensor interface
@retval SUCCESS or FAIL if error occurs.
*/
int (*DataBus)(CUS_SENIF_BUS bus);
/** @brief Configure sensor bayer raw pixel bits
@param[in] handle Handle to sensor driver.
@param[in] prec Select pixel bits
@retval SUCCESS or FAIL if error occurs.
*/
int (*DataPrecision)(CUS_DATAPRECISION prec);
/** @brief Wait isp frame start event
@param[in] handle Handle to sensor driver.
@param[in] ms Max timeout in ms
@retval SUCCESS or FAIL if error occurs.
*/
int (*WaitVStart)(int ms);
/** @brief Wait isp frame end event
@param[in] handle Handle to sensor driver.
@param[in] ms Max timeout in ms
@retval SUCCESS or FAIL if error occurs.
*/
int (*WaitVEnd)(int ms);
/** @brief Configure 3A task order table
@param[in] handle Handle to sensor driver.
@param[in] tasks Task order table
@retval SUCCESS or FAIL if error occurs.
*/
int (*Set3ATaskOrder)(CUS_INT_TASK_ORDER tasks);
#endif
/** @brief Select sensor IO pin assignment
@param[in] idx Sensor pad ID.
@param[in] ulSnrType Interface type.
@param[in] ulSnrPadCfg Pin config.
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetIOPad)(u32 idx, CUS_SENIF_BUS ulSnrType, u32 ulSnrPadCfg);
//FOR CSI
/** @brief Set maximum mipi data rate (amount of all lans)
@remarks MIPI interface only.
@param[in] idx Sensor pad ID.
@param[in] clk Max data rate.
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetCSI_Clk)(u32 idx, CUS_CSI_CLK clk);
/** @brief Set number of MIPI lanes
@remarks MIPI interface only.
@param[in] idx Sensor pad ID.
@param[in] num_lan Number of lanes.
@param[in] bon_off Clock ON/OFF control.
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetCSI_Lane)(u32 idx, u16 num_lan, u8 bon_off);
/** @brief Enable long packet type
@remarks MIPI interface only
@param[in] idx Sensor pad ID.
@param[in] ctl_cfg0_15 Control flag bit[0:15]
@param[in] ctl_cfg16_31 Control flag bit[16:31]
@param[in] ctl_cfg32_47 Control flag bit[32:47]
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetCSI_LongPacketType)(u32 idx, u16 ctl_cfg0_15, u16 ctl_cfg16_31, u16 ctl_cfg32_47);
/** @brief Virtual channel0 hsync mode
@remarks MIPI interface only
@param[in] idx Sensor pad ID.
@param[in] mode HSYNC mode.
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetCSI_VC0HSmode)(CUS_CSI_VC_HS_MODE mode);
/** @brief Configure MIPI capture start timing
@remarks MIPI interface only
@param[in] idx Sensor pad ID.
@param[in] rx_clk_skip_ns
@param[in] rx_data_skip_ns
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetCSI_clk_data_skip)(u32 idx, u8 rx_clk_skip_ns,u8 rx_data_skip_ns);
/** @brief Configure MIPI hdr mode
@remarks MIPI interface only
@param[in] idx Sensor pad ID.
@param[in] hdr_mode HDR mode.
@param[in] bon_off Clock ON/OFF control.
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetCSI_hdr_mode)(u32 idx, CUS_HDR_MODE hdr_mode, u8 bon_off);
#if 0
/** @brief Configure sensor RGBIR raw pixel order
@param[in] handle Handle to sensor driver.
@param[in] bayer_id Select pixel order
@retval SUCCESS or FAIL if error occurs.
*/
int (*RGBIRFmt)(CUS_SEN_RGBIR RGBIR_id);
/** @brief Skip input frame
@param[in] handle Handle to sensor driver.
@param[in] number of frames to skip
@retval SUCCESS or FAIL if error occurs.
*/
int (*SetSkipFrame)(int cnt);
#endif
}ISensorIfAPI;
typedef union {
//Parallel sensor
struct {
u32 parallel_reserved; //No additional attribute.
} attr_parallel;
//MIPI sensor
struct {
u32 mipi_lane_num;
u32 mipi_data_format; //0: YUV 422 format. 1: RGB pattern.
u32 mipi_yuv_order; //YUYV or UYVY
u32 mipi_hsync_mode;
u32 mipi_sampling_delay; /** < MIPI start sampling delay */ /*bit 0~7: clk_skip_ns. bit 8~15: data_skip_ns*/
CUS_HDR_MODE mipi_hdr_mode;
u32 mipi_hdr_virtual_channel_num;
} attr_mipi;
//BT656 sensor
struct {
u32 bt656_total_ch;
u32 bt656_cur_ch;
u32 bt656_ch_det_en;
CUS_VIF_BT656_CHANNEL_SELECT bt656_ch_det_sel;
u32 bt656_bit_swap;
u32 bt656_8bit_mode;
CUS_VIF_BT656_VSYNC_DELAY bt656_vsync_delay;
u32 bt656_hsync_inv;
u32 bt656_vsync_inv;
u32 bt656_clamp_en;
} attr_bt656;
} InterfaceAttr_u;
///////////////////////////////////////////////////////
/** @brief Sensor driver interface \n
The function here are implemented by sensor driver.
*/
typedef struct __ms_cus_sensor{
short lib_idx; /**< Reserved , Do not use */
char model_id[32]; /**< Please fill the sensor modle id string here then libcamera user can read model_id by using cameraGetSensorModelID() .*/
void *sen_handle; /**< Reserved , Do not use */
void *private_data;/**< sensor driver dependent variables should store in private_data and free when release */
app_i2c_cfg i2c_cfg; /**< Sensor i2c setting */
i2c_handle_t *i2c_bus; /**< Handle to sensor i2c API. */
ISensorIfAPI sensor_if_api; /**< sensor interface API */
// ae parameters
int ae_gain_delay; /**< How many frame delay from writing AE gain to take effect*/
int ae_shutter_delay;/**< How many frame delay from writing AE shutter to take effect*/
int ae_gain_ctrl_num;
int ae_shutter_ctrl_num;
// polarity
CUS_CLK_POL reset_POLARITY; /** < Sensor REST pin polarity */
CUS_CLK_POL pwdn_POLARITY; /** < Sensor Power Down pin polarity */
CUS_CLK_POL VSYNC_POLARITY; /** < Sensor VSYNC polarity */
CUS_CLK_POL HSYNC_POLARITY; /** < Sensor HSYNC pin polarity */
CUS_CLK_POL PCLK_POLARITY; //** < Sensor Plxel Clock pin polarity */
// sensor data
CUS_CAMSENSOR_ISPTYPE isp_type; /** < Always use ISP_EXT */
CUS_SEN_BAYER bayer_id; /** < Sensor bayer raw pixel order */
CUS_SEN_RGBIR RGBIR_id; /** < Sensor bayer raw pixel order */
CUS_SENIF_BUS sif_bus; /** < Select sensor interface */
CUS_DATAPRECISION data_prec; /** < Raw data bits */
CUS_SEN_FMT_CONV_MODE data_mode; /** < Data convert mode*/
CUS_CAMSENSOR_ORIT orient; /** < Sensor mirror/flip */
u32 mclk; /** < Sensor master clock frequency */
cus_camsensor_res_list video_res_supported; /** < Resolution list */
//sensor calibration
u32 sat_mingain; /**< Minimum AE gain */
CUS_SENSOR_PAD_GROUP snr_pad_group;
u32 channel_num; //Which VIF/ISP channel is occupied.
u32 channel_mode; //real-time, RAW store, HDR...
InterfaceAttr_u interface_attr;
////////////////////////////////////////////////
// system functions
////////////////////////////////////////////////
/** @brief Sensor power on sequence, I2C must be ready after calling this function
@param[in] handle Handle to sensor driver.
@remark Following configuration need to set up at this stage \n
@ref __ISensorIfAPI::Reset Reset sensor \n
@ref __ISensorIfAPI::PowerOff Sensor power down pin \n
@ref __ISensorIfAPI::MCLK Sensor master clock \n
@ref __ISensorIfAPI::SetIOPad ISP sensor IO \n
@ref __ISensorIfAPI::SetCSI_Clk [MIPI sensor only] MIPI clock\n
@ref __ISensorIfAPI::HsyncPol Hsync polarity\n
@ref __ISensorIfAPI::VsyncPol Vsync polarity\n
@ref __ISensorIfAPI::ClkPol [Parallel sensor only] Pixel clock polarity\n
@ref __ISensorIfAPI::BayerFmt Raw data format\n
@ref __ISensorIfAPI::DataPrecision Raw data pixel bits\n
@ref __ISensorIfAPI::FmtConv Raw data to ISP pixel convert\n
@retval SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_poweron)(struct __ms_cus_sensor* handle, u32 idx);
/** @brief Sensor power off
@param[in] handle Handle to sensor driver.
@retval SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_poweroff)(struct __ms_cus_sensor* handle, u32 idx);
/** @brief Sensor initialization
@param[in] handle Handle to sensor driver.
@retval SUCCESS or FAIL if error occurs.
@remark Fill sensor initial table here, Sensor beginning to output raw images after calling this function .
*/
int (*pCus_sensor_init)(struct __ms_cus_sensor* handle);
/** @brief Release resources those allocated in cus_camsensor_init_handle()
@param[in] handle Handle to sensor driver.
@retval SUCCESS or FAIL if error occurs.
@remark Release resource allocated in \ref cus_camsensor_init_handle
*/
int (*pCus_sensor_release)(struct __ms_cus_sensor* handle);
/** @brief Enter sensor suspend mode
@param[in] handle Handle to sensor driver.
@retval SUCCESS or FAIL if error occurs.
@remark ISP call this function before enter power saving mode
*/
int (*pCus_sensor_suspend)(struct __ms_cus_sensor* handle);
/** @brief Sensor wakeup
@param[in] handle Handle to sensor driver.
@retval SUCCESS or FAIL if error occurs.
@remark ISP call this function after exit power saving mode
*/
int (*pCus_sensor_resume)(struct __ms_cus_sensor* handle);
/** @brief Enable sensor pattern mode if sensor hardward supported
@param[in] handle Handle to sensor driver.
@param[in] mode Pattern select, if 0 disable pattern mode.
@retval SUCCESS or FAIL if error occurs.
@remark This function is optional
*/
int (*pCus_sensor_SetPatternMode)(struct __ms_cus_sensor* handle,u32 mode);
// Normal
/** @brief Check sensor ID and report to ISP sensor match or not
@param[in] handle Handle to sensor driver.
@param[out] id Receive 4 bytes customer defined sensor ID.
@retval Return SUCCESS if sensor matched or Retuen FAIL if sensor mismatch.
@remark Read sensor ID through I2C
*/
int (*pCus_sensor_GetSensorID)(struct __ms_cus_sensor* handle, u32 *id);
/** @brief Get resolution list
@param[in] handle Handle to sensor driver.
@param[out] id Receive supported resolution list
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetVideoRes)(struct __ms_cus_sensor* handle, u32 res_idx, cus_camsensor_res **res);
/** @brief Get resolution list
@param[in] handle Handle to sensor driver.
@param[out] id Receive supported resolution list
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetCurVideoRes)(struct __ms_cus_sensor* handle, u32 *cur_idx, cus_camsensor_res **res);
/** @brief Select a sensor output resolution sensor list
@param[in] handle Handle to sensor driver.
@param[in] res_id Resolution id
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_SetVideoRes)(struct __ms_cus_sensor* handle, u32 res_id);
/** @brief Get sensor current mirror flip setting
@param[in] handle Handle to sensor driver.
@param[out] ori Receive Mirror/Flip setting.
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetOrien)(struct __ms_cus_sensor* handle, CUS_CAMSENSOR_ORIT *ori);
/** @brief Select a sensor mirror flip
@param[in] handle Handle to sensor driver.
@param[in] ori Mirror/Flip configuration.
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_SetOrien)(struct __ms_cus_sensor* handle, CUS_CAMSENSOR_ORIT ori);
/** @brief Get sensor capability
@param[in] handle Handle to sensor driver.
@param[out] cap Receive sensor capability
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetSensorCap)(struct __ms_cus_sensor* handle, CUS_CAMSENSOR_CAP *cap);
///////////////////////////////////////////////////////
// AE
///////////////////////////////////////////////////////
// unit: micro seconds
/** @brief AE/Frame status change notification
@param[in] handle Handle to sensor driver.
@param[in] status Current status
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_AEStatusNotify)(struct __ms_cus_sensor* handle, CUS_CAMSENSOR_AE_STATUS_NOTIFY status);
/** @brief Get sensor shutter setting in us
@param[in] handle Handle to sensor driver.
@param[out] us Receive current shutter setting
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetAEUSecs)(struct __ms_cus_sensor* handle, u32 *us);
/** @brief Set sensor shutter in us
@param[in] handle Handle to sensor driver.
@param[in] us Shutter setting in us
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_SetAEUSecs)(struct __ms_cus_sensor* handle, u32 us);
// Gain: 1x = 1024
/** @brief Get sensor current AE gain
@param[in] handle Handle to sensor driver.
@param[out] gain Receive current AE gain
@retval Return SUCCESS or FAIL if error occurs.
@remark gain: 1x = 1024
*/
int (*pCus_sensor_GetAEGain)(struct __ms_cus_sensor* handle, u32* gain);
/** @brief Set sensor AE gain
@param[in] handle Handle to sensor driver.
@param[in] gain AE gain
@retval Return SUCCESS or FAIL if error occurs.
@remark gain: 1x = 1024
*/
int (*pCus_sensor_SetAEGain)(struct __ms_cus_sensor* handle, u32 gain);
/** @brief Get supported shutter range
@param[in] handle Handle to sensor driver.
@param[out] min Receive minimum shutter which sensor can supported
@param[out] min Receive maxiimum shutter which sensor can supported
@retval Return SUCCESS or FAIL if error occurs.
@remark gain: 1x = 1024
*/
int (*pCus_sensor_GetAEMinMaxUSecs)(struct __ms_cus_sensor* handle, u32 *min, u32 *max);
/** @brief Get supported AE gain range
@param[in] handle Handle to sensor driver.
@param[out] min Receive minimum gain which sensor can supported
@param[out] min Receive maxiimum gain which sensor can supported
@retval Return SUCCESS or FAIL if error occurs.
@remark gain: 1x = 1024
*/
int (*pCus_sensor_GetAEMinMaxGain)(struct __ms_cus_sensor* handle, u32 *min, u32 *max);
// frame rate control
/** @brief Get current fps
@param[in] handle Handle to sensor driver.
@retval Return current frame rate per second
*/
int (*pCus_sensor_GetFPS)(struct __ms_cus_sensor* handle);
/** @brief Set sensor output fps
@param[in] handle Handle to sensor driver.
@param[in] fps
@retval Return SUCCESS or FAIL if fps is out of range.
*/
int (*pCus_sensor_SetFPS)(struct __ms_cus_sensor* handle, u32 fps);
//[OPTIONAL] sensor calibration
/** @brief Optional function */
int (*pCus_sensor_SetAEGain_cal)(struct __ms_cus_sensor* handle, u32);
/** @brief Optional function */
int (*pCus_sensor_setCaliData_gain_linearity)(struct __ms_cus_sensor* handle, CUS_GAIN_GAP_ARRAY* pArray ,u32 num);
//Get shutter information
/** @brief Get shutter information
@param[in] handle Handle to sensor driver.
@param[out] info return shutter information.
@retval Return current frame rate per second
*/
int (*pCus_sensor_GetShutterInfo)(struct __ms_cus_sensor* handle,CUS_SHUTTER_INFO *info);
/** @brief Get resolution list number
@param[in] handle Handle to sensor driver.
@param[out] ulres_num resolution list number
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetVideoResNum)(struct __ms_cus_sensor* handle, u32 *ulres_num);
//Get shutter information
/** @brief Sensor vendor command
@param[in] handle Handle to sensor driver.
@param[in] reserved
@param[in] param Command input
@param[out] out Command output
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_CustDefineFunction)(struct __ms_cus_sensor* handle,u32 cmd_id, void *param);
//Get Source Type
/** @brief Get Source Type
@param[in] handle Handle to sensor driver.
@param[out] psrc_type info
@retval Return SUCCESS or FAIL if error occurs.
*/
int (*pCus_sensor_GetSrcType)(struct __ms_cus_sensor* handle, CUS_SNR_ANADEC_SRC_TYPE *psrc_type);
} ms_cus_sensor;
/** @brief Sensor driver entry. ISP call this function before start using sensor driver. \n
ISP pass \ref ms_cus_sensor struct to obtain the driver information and function entries. \n
And all allocated resources here should be released at \ref __ms_cus_sensor::pCus_sensor_release.
Every sensor driver must implement this api.
@param[in] drv_handle A uninitialized \ref ms_cus_sensor struct from ISP, Sensor driver fill the driver information and function entries to drv_handle.
@retval SUCCESS or FAIL if error occurs.
*/
typedef int (*SensorInitHandle)(ms_cus_sensor* handle);
#ifdef __cplusplus
}
#endif
#endif /* DRV_MS_CUS_SENSOR_H_ */
/** @} */ // end of ISP Sensor Driver Interface

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/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
Sigmastar Technology Corp. and be kept in strict confidence
(Sigmastar Confidential Information) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of Sigmastar Confidential
Information is unlawful and strictly prohibited. Sigmastar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
/*! @file isp_i2c_api.h
@brief This file contains Infinity ISP I2C basic API.
*/
/** @defgroup group1 ISP I2C API
* @{
*/
#ifndef ISP_I2C_API_H
#define ISP_I2C_API_H
#define SENSOR_I2C_SUCCESS (0)
#define SENSOR_I2C_FAIL (-1)
#define SENSOR_I2C_NOT_SUPPORT (-2)
/*! @brief I2C API handle.*/
struct __i2c_handle_t;
/*! @brief I2C batch read/write data.*/
typedef struct _I2C_ARRAY{
u16 reg; /**< Register address.*/
u16 data; /**< Data.*/
} I2C_ARRAY;
/*! @brief I2C burst read/write data.*/
typedef struct _I2C_ARRAY_BURST{
u16 reg; /**< Register address.*/
u16 *data; /**< Data.*/
} I2C_ARRAY_BURST;
/*! @brief I2C data direction*/
typedef enum {
I2C_RW_R, /**< Data direction read.*/
I2C_RW_W,/**< Data direction write.*/
} I2C_RW;
/*! @brief Use for i2c_array_rw only */
typedef struct _I2C_CPX_ARRAY{
I2C_RW rw; /**< Data direction */
u16 reg; /**< Device register address */
u16 data; /**< Data write to device or read from device*/
}__attribute__((packed, aligned(1))) I2C_CPX_ARRAY;
/*! @brief Internal use for I2C API*/
typedef enum {
I2C_FMT_A8D8, /**< 8 bits Address, 8 bits Data */
I2C_FMT_A16D8,/**< 16 bits Address 8 bits Data */
I2C_FMT_A8D16,/**< 8 bits Address 16 bits Data */
I2C_FMT_A16D16,/**< 16 bits Address 16 bits Data */
I2C_FMT_END/**< Reserved */
} ISP_I2C_FMT;
/*! @brief ISP_I2C_MODE Internal use for I2C API*/
typedef enum {
I2C_LEGACY_MODE, /**< Do not use */
I2C_NORMAL_MODE /**< Sensor driver can only use I2C_NORMAL_MODE */
} ISP_I2C_MODE;
/*! @brief app_i2c_cfg I2C setting for sensor and bus.*/
typedef struct _app_i2c_cfg{
ISP_I2C_MODE mode; //!< I2C_NORMAL_MODE only
ISP_I2C_FMT fmt; //!< I2C data format
u32 speed; //!< I2C clock in Hz
u16 address; //!< Sensor slave address , bit[7~1] are available, bit[0] user don't care
u16 reserved;
}__attribute__((packed, aligned(1))) app_i2c_cfg;
/*! @brief The interface of I2C APIs export to user*/
typedef struct _i2c_handle_t {
int version;
void *pdata; //i2c_private_data
u32 nSensorID;
/** @brief Open isp i2c port. This function must be called before using isp I2C APIs.
Call i2c_close to close isp i2c port and allocated resource.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C initial configuration.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_open)(struct _i2c_handle_t* handle, app_i2c_cfg *cfg);
/** @brief Close isp I2C port. Call this functon to release resource which allocated form i2c_open.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C configuration mode and spped are necessary in this stage.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_close)(struct _i2c_handle_t* handle );
/** @brief Write single data to device.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C config, fmd and address are necessary in this stage.
@param[in] reg Device register address address width depend on cfg->fmt.
@param[in] data Data to write, data width depend on cfg->fmt.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_tx)(struct _i2c_handle_t* handle , app_i2c_cfg cfg, short reg, short data);
/** @brief Read single data from device.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C config, fmd and address are necessary in this stage.
@param[in] reg Device register address address width depend on cfg->fmt.
@param[out] data Data buffer for read, data width depend on cfg->fmt.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_rx)(struct _i2c_handle_t* handle, app_i2c_cfg cfg, short reg, volatile short *data);
/** @brief Batch write to device.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C config, fmd and address are necessary in this stage.
@param[in] pdata Data array.
@param[in] len Array size.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_array_tx)(struct _i2c_handle_t* handle, app_i2c_cfg cfg, I2C_ARRAY *pdata, int len);
/** @brief Burst write to device.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C config, fmd and address are necessary in this stage.
@param[in] pdata Data array.
@param[in] len Array size.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_burst_tx)(struct _i2c_handle_t* handle, app_i2c_cfg cfg, I2C_ARRAY_BURST *pdata, int len);
/** @brief Batch read from device.
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C config, fmd and address are necessary in this stage.
@param[out] pdata Data array.
@param[in] len Array size.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_array_rx)(struct _i2c_handle_t* handle, app_i2c_cfg cfg, I2C_ARRAY *pdata, int len);
/** @brief Composite batch read/write
@param[in] handle Handle to isp i2c api.
@param[in] cfg I2C config, fmd and address are necessary in this stage.
@param[in][out] pdata Data description array.
@param[in] len Array size.
@retval SENSOR_I2C_SUCCESS or SENSOR_I2C_FAIL if error occurs.
*/
int (*i2c_array_rw)(struct _i2c_handle_t* handle, app_i2c_cfg cfg, I2C_CPX_ARRAY *pdata, int len);
} i2c_handle_t;
/** @} */ // end of ISP I2C API
#endif

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/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
Sigmastar Technology Corp. and be kept in strict confidence
(<EFBFBD><EFBFBD>Sigmastar Confidential Information<EFBFBD><EFBFBD>) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of Sigmastar Confidential
Information is unlawful and strictly prohibited. Sigmastar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
/*
* mi_isp.h
*
* Created on: June 27, 2018
* Author: Jeffrey Chou
*/
#ifndef _MI_ISP_H_
#define _MI_ISP_H_
//#include <pthread.h>
#include "mi_common.h"
#include "mi_isp_datatype.h"
#include "mi_vpe_datatype.h"
#include "mi_isp_iq.h"
#ifdef __cplusplus
extern "C"
{
#endif
#define MI_ISP_OK (0)
#define MI_ISP_NOT_SUPPORT (1)
#define MI_ISP_FAILURE (-1)
#define MI_ISP_API_MAX_PARM_NUMBRE (6)
#define MI_ISP_API_ISPMID_NOT_SUPPORT (5)
/************************************* Customer 3A API ***********************************/
MI_S32 MI_ISP_AE_GetAeHwAvgStats(MI_U32 Channel, MI_ISP_AE_HW_STATISTICS_t *data);
MI_S32 MI_ISP_AWB_GetAwbHwAvgStats(MI_U32 Channel, MI_ISP_AWB_HW_STATISTICS_t *data);
MI_S32 MI_ISP_AWB_GetAwbHwAvgStatsShort(MI_U32 Channel, MI_ISP_AWB_HW_STATISTICS_t *data);
MI_S32 MI_ISP_AE_GetHisto0HwStats(MI_U32 Channel, MI_ISP_HISTO_HW_STATISTICS_t *data);
MI_S32 MI_ISP_AE_GetHisto1HwStats(MI_U32 Channel, MI_ISP_HISTO_HW_STATISTICS_t *data);
MI_S32 MI_ISP_AE_GetRgbIrHistoHwStats(MI_U32 Channel, MI_ISP_RGBIR_HISTO_HW_STATISTICS_t *data);
MI_S32 MI_ISP_CUS3A_Enable(MI_U32 Channel, Cus3AEnable_t *data);
MI_S32 MI_ISP_CUS3A_GetAeInitStatus(MI_U32 Channel, CusAEInitParam_t *data);
MI_S32 MI_ISP_CUS3A_GetAeStatus(MI_U32 Channel, CusAEInfo_t *data);
MI_S32 MI_ISP_CUS3A_SetAeParam(MI_U32 Channel, CusAEResult_t *data);
MI_S32 MI_ISP_CUS3A_GetAwbStatus(MI_U32 Channel, CusAWBInfo_t *data);
MI_S32 MI_ISP_CUS3A_SetAwbParam(MI_U32 Channel, CusAWBResult_t *data);
MI_S32 MI_ISP_CUS3A_SetAEWindowBlockNumber(MI_U32 Channel, MS_CUST_AE_WIN_BLOCK_NUM_TYPE_e *data);
MI_S32 MI_ISP_CUS3A_SetAEHistogramWindow(MI_U32 Channel, CusAEHistWin_t*data);
MI_S32 MI_ISP_CUS3A_SetAWBSampling(MI_U32 Channel, CusAWBSample_t *data);
MI_S32 MI_ISP_CUS3A_SetAECropSize(MI_U32 Channel, CusAEAWBCropSize_t *data);
MI_S32 MI_ISP_CUS3A_SetAWBCropSize(MI_U32 Channel, CusAEAWBCropSize_t *data);
MI_S32 MI_ISP_CUS3A_GetAFStats(MI_U32 Channel, CusAFStats_t *data);
MI_S32 MI_ISP_CUS3A_SetAFWindow(MI_U32 Channel, CusAFWin_t *data);
MI_S32 MI_ISP_CUS3A_GetAFWindow(MI_U32 Channel, CusAFWin_t *data);
MI_S32 MI_ISP_CUS3A_SetAFFilter(MI_U32 Channel, CusAFFilter_t *data);
MI_S32 MI_ISP_CUS3A_GetAFFilter(MI_U32 Channel, CusAFFilter_t *data);
MI_S32 MI_ISP_CUS3A_SetAFFilterSq(MI_U32 Channel, CusAFFilterSq_t *data);
MI_S32 MI_ISP_CUS3A_GetAFFilterSq(MI_U32 Channel, CusAFFilterSq_t *data);
MI_S32 MI_ISP_CUS3A_SetAFRoiMode(MI_U32 Channel, CusAFRoiMode_t *data);
MI_S32 MI_ISP_CUS3A_GetAFRoiMode(MI_U32 Channel, CusAFRoiMode_t *data);
MI_S32 MI_ISP_CUS3A_GetImageResolution(MI_U32 Channel, CusImageResolution_t *data);
MI_S32 MI_ISP_CUS3A_EnableISPOutImage(MI_U32 Channel, CusISPOutImage_t *data);
MI_S32 MI_ISP_CUS3A_GetISPOutImageCount(MI_U32 Channel, MI_U32 *data);
MI_S32 MI_ISP_CUS3A_CaptureHdrRawImage(MI_U32 Channel, CusHdrRawImage_t *data);
MI_S32 MI_ISP_GetFrameMetaInfo(MI_U32 Channel, IspFrameMetaInfo_t *data);
MI_S32 MI_ISP_ReadSensorData(MI_U32 Channel, CusSensorI2cParam_t *data);
MI_S32 MI_ISP_WriteSensorData(MI_U32 Channel, CusSensorI2cParam_t *data);
/************************************* Customer 3A API END********************************/
/************************************* Debug API ***********************************/
MI_S32 MI_ISP_SetDebugLevel_AE(MI_U32 Channel, MI_S32 *data);
MI_S32 MI_ISP_GetDebugLevel_AE(MI_U32 Channel, MI_S32 *data);
MI_S32 MI_ISP_SetDebugLevel_AWB(MI_U32 Channel, MI_S32 *data);
MI_S32 MI_ISP_GetDebugLevel_AWB(MI_U32 Channel, MI_S32 *data);
/************************************* Debug API END********************************/
MI_S32 MI_ISP_SET_ALL(int Channel, MI_U16 ApiId, MI_U32 ApiLen, MI_U8* pApiBuf);
MI_S32 MI_ISP_GET_ALL(int Channel, MI_U16 ApiId, MI_U32* ApiLen, MI_U8* pApiBuf);
MI_S32 MI_ISP_API_CmdLoadBinFile(MI_U32 Channel, char* filepath, MI_U32 user_key);
MI_S32 MI_ISP_API_CmdLoadCaliData(MI_U32 Channel, MI_ISP_CALI_ITEM_e eCaliItem, char* filepath);
typedef MI_S32 (*MI_ISP_ApiAgent_fp)(MI_VPE_IspApiHeader_t *pstData, void* pData);
/*Api agent for SigmaStar user space 3A library*/
MI_S32 MI_ISP_RegisterIspApiAgent(MI_U32 Channel, MI_ISP_ApiAgent_fp fpApiSet, MI_ISP_ApiAgent_fp fpApiGet);
#if !defined(DUAL_OS) && !defined(__RTOS__) //for pure linux
MI_S32 MI_ISP_EnableUserspace3A(MI_U32 Channel,MI_ISP_API_USERSPACE3A_ATTR_t *pAttr);
MI_S32 MI_ISP_DisableUserspace3A(MI_U32 Channel);
#else //for DualOS-Linux , RTK
inline MI_S32 MI_ISP_EnableUserspace3A(MI_U32 Channel,MI_ISP_API_USERSPACE3A_ATTR_t *pAttr) {return 0;}
inline MI_S32 MI_ISP_DisableUserspace3A(MI_U32 Channel) {return 0;}
#endif
/*Common API, get isp root path*/
MI_S32 MI_ISP_GetIspRoot(MI_U32 Channel, MI_ISP_ROOT_PATH_T *data);
#ifdef __cplusplus
} //end of extern C
#endif
#endif //_MI_ISP_H_

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@ -1,441 +0,0 @@
/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
Sigmastar Technology Corp. and be kept in strict confidence
(Sigmastar Confidential Information) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of Sigmastar Confidential
Information is unlawful and strictly prohibited. Sigmastar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
#ifndef _MI_ISP_3A_DATATYPE_H_
#define _MI_ISP_3A_DATATYPE_H_
typedef enum __attribute__ ((aligned (4)))
{
SS_FALSE = 0,
SS_TRUE = !SS_FALSE,
SS_BOOL_MAX
} MI_ISP_BOOL_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_OP_TYP_AUTO = 0,
SS_OP_TYP_MANUAL = !SS_OP_TYP_AUTO,
SS_OP_TYP_MODE_MAX
} MI_ISP_OP_TYPE_e;
/************************************* AE - Define the structure declaration - START *************************************/
typedef enum __attribute__ ((aligned (4)))
{
SS_ISP_STATE_NORMAL = 0,
SS_ISP_STATE_PAUSE = 1,
SS_ISP_STATE_MAX
} MI_ISP_SM_STATE_TYPE_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_MODE_A, // auto
SS_AE_MODE_AV, // aperture priority
SS_AE_MODE_SV,
SS_AE_MODE_TV, // shutter priority
SS_AE_MODE_M, // manual mode
SS_AE_MODE_MAX
} MI_ISP_AE_MODE_TYPE_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_WEIGHT_AVERAGE = 0,
SS_AE_WEIGHT_CENTER,
SS_AE_WEIGHT_SPOT,
SS_AE_WEIGHT_MAX
} MI_ISP_AE_WIN_WEIGHT_MODE_TYPE_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_FLICKER_TYPE_DISABLE = 0,
SS_AE_FLICKER_TYPE_60HZ = 1,
SS_AE_FLICKER_TYPE_50HZ = 2,
SS_AE_FLICKER_TYPE_AUTO = 3,
//SS_AE_FLICKER_TYPE_DETECT_60HZ = 4,
//SS_AE_FLICKER_TYPE_DETECT_50HZ = 5,
SS_AE_FLICKER_TYPE_MAX
} MI_ISP_AE_FLICKER_TYPE_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_FLICKER_TYPE_DETECT_60HZ = 0,
SS_AE_FLICKER_TYPE_DETECT_50HZ = 1,
SS_AE_FLICKER_TYPE_DETECT_MAX
} MI_ISP_AE_FLICKER_DETECT_TYPE_e;
//typedef struct MI_ISP_AE_FLICKER_INFO_TYPE_s
//{
// MI_ISP_BOOL_e bIsEffective;
// MI_ISP_AE_FLICKER_TYPE_e eFlickerType;
// MI_U16 u16Score;
//} MI_ISP_AE_FLICKER_INFO_TYPE_t;
typedef struct MI_ISP_AE_FLICKER_EX_TYPE_s
{
MI_ISP_BOOL_e bEnable; // 0 ~ 1
MI_ISP_OP_TYPE_e enOpType; // M_AUTO ~ (M_MODMAX-1)
MI_U8 u8AmpSensitivity; // 1 ~ 100
MI_U8 u8ScoreThd; // 1 ~ 100
MI_U8 uRefreshCycles; // 1 ~ 10
MI_U8 u8ValidTimesThd; // 1 ~ 10
MI_ISP_AE_FLICKER_DETECT_TYPE_e eFlickerType; // 60Hz = 0, 50Hz = 1
} MI_ISP_AE_FLICKER_EX_TYPE_t;
typedef struct MI_ISP_AE_FLICKER_EX_INFO_TYPE_s
{
MI_ISP_BOOL_e bIsEffective;
MI_ISP_AE_FLICKER_DETECT_TYPE_e eFlickerType;
MI_U16 u16Score;
} MI_ISP_AE_FLICKER_EX_INFO_TYPE_t;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_STRATEGY_BRIGHTTONE,
SS_AE_STRATEGY_DARKTONE,
SS_AE_STRATEGY_AUTO,
SS_AE_STRATEGY_MAX
} MI_ISP_AE_STRATEGY_TYPE_e;
typedef struct MI_ISP_AE_HIST_WEIGHT_Y_TYPE_s
{
MI_U32 u32LumY;
MI_U32 u32AvgY;
MI_U32 u32Hits[128];
} MI_ISP_AE_HIST_WEIGHT_Y_TYPE_t;
typedef struct MI_ISP_AE_EXPO_VALUE_TYPE_s
{
MI_U32 u32FNx10;
MI_U32 u32SensorGain;
MI_U32 u32ISPGain;
MI_U32 u32US;
} MI_ISP_AE_EXPO_VALUE_TYPE_t;
typedef struct MI_ISP_AE_EXPO_INFO_TYPE_s
{
MI_ISP_BOOL_e bIsStable;
MI_ISP_BOOL_e bIsReachBoundary;
MI_ISP_AE_EXPO_VALUE_TYPE_t stExpoValueLong;
MI_ISP_AE_EXPO_VALUE_TYPE_t stExpoValueShort;
MI_ISP_AE_HIST_WEIGHT_Y_TYPE_t stHistWeightY;
MI_U32 u32LVx10;
MI_S32 s32BV;
MI_U32 u32SceneTarget;
} MI_ISP_AE_EXPO_INFO_TYPE_t;
typedef struct MI_ISP_AE_EV_COMP_TYPE_s
{
MI_S32 s32EV;
MI_U32 u32Grad;
} MI_ISP_AE_EV_COMP_TYPE_t;
typedef struct MI_ISP_AE_INTP_LUT_TYPE_s
{
MI_U16 u16NumOfPoints;
MI_U32 u32Y[16];
MI_U32 u32X[16];
} MI_ISP_AE_INTP_LUT_TYPE_t;
typedef struct CONV_SPEED_PARAM_s
{
MI_U32 u32SpeedX[4];
MI_U32 u32SpeedY[4];
} CONV_SPEED_PARAM_t;
typedef struct CONV_THD_PARAM_s
{
MI_U32 u32InThd;
MI_U32 u32OutThd;
} CONV_THD_PARAM_t;
typedef struct MI_ISP_AE_CONV_CONDITON_TYPE_s
{
CONV_THD_PARAM_t stConvThrd;
CONV_SPEED_PARAM_t stConvSpeed;
} MI_ISP_AE_CONV_CONDITON_TYPE_t;
typedef struct MI_ISP_AE_EXPO_LIMIT_TYPE_s
{
MI_U32 u32MinShutterUS;
MI_U32 u32MaxShutterUS;
MI_U32 u32MinFNx10;
MI_U32 u32MaxFNx10;
MI_U32 u32MinSensorGain;
MI_U32 u32MinISPGain;
MI_U32 u32MaxSensorGain;
MI_U32 u32MaxISPGain;
} MI_ISP_AE_EXPO_LIMIT_TYPE_t;
typedef struct EXPO_POINT_PARAM_s
{
MI_U32 u32FNumx10;
MI_U32 u32Shutter;
MI_U32 u32TotalGain;
MI_U32 u32SensorGain;
} EXPO_POINT_PARAM_t;
typedef struct MI_ISP_AE_EXPO_TABLE_TYPE_s
{
MI_U32 u32NumPoints;
EXPO_POINT_PARAM_t stExpoTbl[16]; // LV from High to Low
} MI_ISP_AE_EXPO_TABLE_TYPE_t;
typedef struct WIN_WEIGHT_PARAM_s
{
MI_U8 u8AverageTbl[32*32];
MI_U8 u8CenterTbl[32*32];
MI_U8 u8SpotTbl[32*32];
} WIN_WEIGHT_PARAM_t;
typedef struct MI_ISP_AE_WIN_WEIGHT_TYPE_s
{
MI_ISP_AE_WIN_WEIGHT_MODE_TYPE_e eTypeID;
WIN_WEIGHT_PARAM_t stParaAPI;
} MI_ISP_AE_WIN_WEIGHT_TYPE_t;
typedef struct MI_ISP_AE_STRATEGY_TYPE_s
{
MI_ISP_AE_STRATEGY_TYPE_e eAEStrategyMode;
MI_U32 u32Weighting;
MI_ISP_AE_INTP_LUT_TYPE_t stUpperOffset;
MI_ISP_AE_INTP_LUT_TYPE_t stLowerOffset;
MI_U32 u32BrightToneStrength;
MI_U32 u32BrightToneSensitivity;
MI_U32 u32DarkToneStrength;
MI_U32 u32DarkToneSensitivity;
MI_U32 u32AutoStrength;
MI_U32 u32AutoSensitivity;
} MI_ISP_AE_STRATEGY_TYPE_t;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_STRATEGY_EX_BRIGHTTONE,
SS_AE_STRATEGY_EX_DARKTONE,
} MI_ISP_AE_STRATEGY_EX_PRIORITY_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AE_STRATEGY_EX_COUNT,
SS_AE_STRATEGY_EX_TARGET,
} MI_ISP_AE_STRATEGY_EX_MODE_e;
typedef struct MI_ISP_AE_STRATEGY_EX_TYPE_s
{
MI_ISP_BOOL_e bEnable;
MI_ISP_AE_STRATEGY_EX_MODE_e eMode;
MI_ISP_AE_STRATEGY_EX_PRIORITY_e ePriority;
MI_U16 u16BT_NodeNum;
MI_S32 u32BT_NodeBV[16];
MI_U32 u32BT_ThdY[16];
MI_U32 u32BT_Percentx10[16];
MI_U32 u32BT_TargetYx10[16];
MI_U32 u32BT_MaxOffsetDown[16];
MI_U16 u16DT_NodeNum;
MI_S32 u32DT_NodeBV[16];
MI_U32 u32DT_ThdY[16];
MI_U32 u32DT_Percentx10[16];
MI_U32 u32DT_TargetYx10[16];
MI_U32 u32DT_MaxOffsetUp[16];
} MI_ISP_AE_STRATEGY_EX_TYPE_t;
typedef struct MI_ISP_AE_STRATEGY_EX_INFO_TYPE_s
{
MI_U16 u16GMBlendRatio;
MI_U16 u16UpperLimitTargetx10;
MI_U16 u16LowerLimitTargetx10;
MI_U16 u16BTCntPcntx10;
MI_U16 u16DTCntPcntx10;
MI_U16 u16BTYx10;
MI_U16 u16DTYx10;
} MI_ISP_AE_STRATEGY_EX_INFO_TYPE_t;
typedef struct MI_ISP_AE_RGBIR_AE_TYPE_s
{
MI_ISP_BOOL_e bEnable;
MI_U16 u16MaxYWithIR;
MI_U16 u16MinISPGainCompRatio;
} MI_ISP_AE_RGBIR_AE_TYPE_t;
typedef struct MI_ISP_AE_HDR_TYPE_s
{
MI_ISP_AE_INTP_LUT_TYPE_t stAeHdrRatio;
} MI_ISP_AE_HDR_TYPE_t;
typedef struct MI_ISP_AE_STABILIZER_TYPE_s
{
MI_ISP_BOOL_e bEnable;
MI_U16 u16DiffThd;
MI_U16 u16Percent;
} MI_ISP_AE_STABILIZER_TYPE_t;
/************************************* AE - Define the structure declaration - END *************************************/
/************************************* AWB - Define the structure declaration - START *************************************/
#define MI_ISP_AWB_LV_CT_TBL_NUM (18)
#define MI_ISP_AWB_CT_TBL_NUM (10)
#define MI_ISP_AWB_WEIGHT_WIN_NUM (81)
typedef struct MI_ISP_AWB_QUERY_INFO_TYPE_s
{
MI_ISP_BOOL_e bIsStable;
MI_U16 u16Rgain;
MI_U16 u16Grgain;
MI_U16 u16Gbgain;
MI_U16 u16Bgain;
MI_U16 u16ColorTemp;
MI_U8 u8WPInd;
MI_ISP_BOOL_e bMultiLSDetected;
MI_U8 u8FirstLSInd;
MI_U8 u8SecondLSInd;
} MI_ISP_AWB_QUERY_INFO_TYPE_t;
typedef enum __attribute__ ((aligned (4)))
{
SS_AWB_MODE_AUTO,
SS_AWB_MODE_MANUAL,
SS_AWB_MODE_CTMANUAL,
SS_AWB_MODE_MAX
} MI_ISP_AWB_MODE_TYPE_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AWB_ALG_GRAYWORLD = 0,
SS_AWB_ALG_NORMAL = 1,
SS_AWB_ALG_BALANCE = 2,
SS_AWB_ALG_FOCUS = 3,
SS_AWB_ALG_MAX = 0xffffffff
} MI_ISP_AWB_ALG_TYPE_e;
typedef enum __attribute__ ((aligned (4)))
{
SS_AWB_ADV_DEFAULT = 0,
SS_AWB_ADV_ADVANCE = 1,
SS_AWB_ADV_MAX = 0xffffffff
} MI_ISP_AWB_ADV_TYPE_e;
typedef struct CT_LIMIT_PARAM_s
{
MI_U16 u16MaxRgain; //RW, Maximum RGain, Range: [0, 8191]
MI_U16 u16MinRgain; //RW, Miniimum RGain, Range: [0, 8191]
MI_U16 u16MaxBgain; //RW, Maximum BGain, Range: [0, 8191]
MI_U16 u16MinBgain; //RW, Miniimum BGain, Range: [0, 8191]
} CT_LIMIT_PARAM_t;
typedef struct CT_WEIGHT_PARAM_s
{
MI_U16 u16Weight[MI_ISP_AWB_CT_TBL_NUM]; //RW, Light CT Weight, Range: [1, 255]
} CT_WEIGHT_PARAM_t;
typedef struct CT_RATIO_PARAM_s
{
MI_U16 u16Ratio[MI_ISP_AWB_CT_TBL_NUM]; //RW, CT Prefer Ratio, Range: [1, 255]
} CT_RATIO_PARAM_t;
typedef struct AWB_ATTR_PARAM_s
{
MI_U8 u8Speed; //RW, AWB converging speed, Range: [0x1, 0x64]
MI_U8 u8ConvInThd; //RW, AWB converging threshold, Range:[0, 255], Recommended: [32]
MI_U8 u8ConvOutThd; //RW, AWB converging threshold, Range:[0, 255], Recommended: [64]
MI_ISP_AWB_ALG_TYPE_e eAlgType; //RW, AWB 0:GrayWorld, 1:Normal, 2:Balance 3,Focus
MI_ISP_AWB_ADV_TYPE_e eAdvType; //RW, AWB advance mode type
MI_U8 u8RGStrength; //RW, AWB adjust RG ratio, Range:[0, 255]
MI_U8 u8BGStrength; //RW, AWB adjust BG ratio, Range:[0, 255]
CT_LIMIT_PARAM_t stCTLimit; //RW, AWB limitation when envirnoment ct is out of boundary
CT_WEIGHT_PARAM_t stLvWeight[MI_ISP_AWB_LV_CT_TBL_NUM]; //RW, AWB Lv Ct Weight, Range: [0, 255]
CT_RATIO_PARAM_t stPreferRRatio[MI_ISP_AWB_LV_CT_TBL_NUM]; //RW, AWB prefer R gain, Range: [0, 255]
CT_RATIO_PARAM_t stPreferBRatio[MI_ISP_AWB_LV_CT_TBL_NUM]; //RW, AWB prefer B gain, Range: [0, 255]
MI_U16 u16WpWeight[MI_ISP_AWB_CT_TBL_NUM];
MI_U32 u32WeightWin[MI_ISP_AWB_WEIGHT_WIN_NUM]; //RW, AWB region gain, Range: [0, 16]
} AWB_ATTR_PARAM_t;
typedef struct MWB_ATTR_PARAM_s
{
MI_U16 u16Rgain; //RW, Multiplier for R color channel, Range: [0, 0x2000]
MI_U16 u16Grgain; //RW, Multiplier for Gr color channel, Range: [0, 0x2000]
MI_U16 u16Gbgain; //RW, Multiplier for Gb color channel, Range: [0, 0x2000]
MI_U16 u16Bgain; //RW, Multiplier for B color channel, Range: [0, 0x2000]
} MWB_ATTR_PARAM_t;
typedef struct MI_ISP_AWB_ATTR_TYPE_s
{
MI_ISP_SM_STATE_TYPE_e eState;
MI_ISP_AWB_MODE_TYPE_e eOpType;
MWB_ATTR_PARAM_t stManualParaAPI;
AWB_ATTR_PARAM_t stAutoParaAPI;
} MI_ISP_AWB_ATTR_TYPE_t;
typedef struct AWB_ATTR_EXTRA_LIGHTSOURCE_PARAM_s
{
MI_U16 u16WhiteRgain; //RW, RGain of white Point Location , Range: [256, 4095]
MI_U16 u16WhiteBgain; //RW, RGain of white Point Location , Range: [256, 4095]
MI_U8 u8AreaSize; //RW, Light Area Size , Range: [1, 32]
MI_ISP_BOOL_e bExclude; //RW, Include or exclude Uaer light Area, 0: include, 1:exclude
} AWB_ATTR_EXTRA_LIGHTSOURCE_PARAM_t;
typedef struct MI_ISP_AWB_ATTR_EX_TYPE_s
{
MI_ISP_BOOL_e bExtraLightEn;
AWB_ATTR_EXTRA_LIGHTSOURCE_PARAM_t stLightInfo[4];
} MI_ISP_AWB_ATTR_EX_TYPE_t;
typedef struct MI_ISP_AWB_MULTILS_LS_TYPE_s
{
MI_ISP_BOOL_e bEnable;
MI_U8 u8Sensitive;
MI_U8 u8CaliStrength;
MI_U16 u16CcmForLow[9];
MI_U16 u16CcmForHigh[9];
} MI_ISP_AWB_MULTILS_LS_TYPE_t;
typedef struct MI_ISP_AWB_CT_WEIGHT_TYPE_s
{
MI_U16 u16LvIndex;
CT_WEIGHT_PARAM_t stParaAPI;
} MI_ISP_AWB_CT_WEIGHT_TYPE_t;
typedef struct MI_ISP_AWB_CT_CALI_TYPE_s
{
MI_U16 u16StartIdx; //RW, Light area start index, Range: [0, u2EndIdx]
MI_U16 u16EndIdx; //RW, Light area end index, Range: [u2StartIdx, 9]
MI_U16 u16CtParams[40]; //RW, Color temperature of calibration paramters , Range: [1, 1000]
} MI_ISP_AWB_CT_CALI_TYPE_t;
typedef struct MI_ISP_AWB_CUR_CT_CALI_TYPE_s
{
MI_U16 u16CtParams[40]; //RW, Color temperature of calibration paramters , Range: [1, 1000]
} MI_ISP_AWB_CUR_CT_CALI_TYPE_t;
typedef struct MI_ISP_AWB_CT_STATISTICS_TYPE_s
{
MI_U16 u16Width; //RW, Effective range
MI_U16 u16Height; //RW, Effective range
MI_U16 u16StatisX[5760]; //RW, Color Temperature Curve Domain Statistics X, max is 64x90
MI_U16 u16StatisY[5760]; //RW, Color Temperature Curve Domain Statistics Y, max is 64x90
} MI_ISP_AWB_CT_STATISTICS_TYPE_t;
typedef struct MI_ISP_AWB_HW_STATISTICS_TYPE_s
{
MI_U8 u8AwbBuffer[34560]; // 128 * 90 * 3
} MI_ISP_AWB_HW_STATISTICS_TYPE_t;
typedef struct MI_ISP_AWB_CTMWB_PARAM_s
{
MI_U32 u32CT;
} MI_ISP_AWB_CTMWB_PARAM_t;
/************************************* AWB - Define the structure declaration - END *************************************/
#endif //_MI_ISP_3A_DATATYPE_H_

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@ -1,302 +0,0 @@
/* SigmaStar trade secret */
/* Copyright (c) [2019~2020] SigmaStar Technology.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
SigmaStar and be kept in strict confidence
(SigmaStar Confidential Information) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of SigmaStar Confidential
Information is unlawful and strictly prohibited. SigmaStar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
/*
* mi_isp_api_id.h
*
* Created on: June 27, 2018
* Author: Jeffrey Chou
*/
#ifndef _TUNINGSERVER_API_ID_H_
#define _TUNINGSERVER_API_ID_H_
#ifdef __cplusplus
extern "C"
{
#endif
#define ID_API_COMMON_BASE (0x0000)
#define ID_API_COMMON_END (0x0FFF)
#if 0
#define ID_API_ISP_BASE (0x1000)
#define ID_API_ISP_END (0x1FFF)
#define ID_API_CALIBRATION_20_BASE (0x2000)
#define ID_API_CALIBRATION_20_END (0x22FF)
#define ID_API_MAINTOOL_BASE (0x2300)
#define ID_API_MAINTOOL_END (0x25FF)
#define ID_API_PLUGIN_BASE (0x2600)
#define ID_API_PLUGIN_END (0x28FF)
#else
#define ID_API_ISP_IQ_BASE (0x1000)
#define ID_API_ISP_IQ_END (0x13FF)
#define ID_API_ISP_AE_BASE (0x1400)
#define ID_API_ISP_AE_END (0x17FF)
#define ID_API_ISP_AWB_BASE (0x1800)
#define ID_API_ISP_AWB_END (0x1BFF)
#define ID_API_ISP_AF_BASE (0x1C00)
#define ID_API_ISP_AF_END (0x1FFF)
#define ID_API_ISP_OTHER_BASE (0x2000)
#define ID_API_ISP_OTHER_END (0x23FF)
#define ID_API_CALIBRATION_20_BASE (0x2400)
#define ID_API_CALIBRATION_20_END (0x27FF)
#define ID_API_MAINTOOL_BASE (0x2800)
#define ID_API_MAINTOOL_END (0x2BFF)
#define ID_API_PLUGIN_BASE (0x2C00)
#define ID_API_PLUGIN_END (0x2DFF)
#define ID_API_CUS3A_BASE (0x2E00)
#define ID_API_CUS3A_END (0x2FFF)
#define ID_API_DEBUG_LEVEL_BASE (0x2FFF)
#define ID_API_DEBUG_LEVEL_END (0x3100)
#define ID_API_RESERVED_BASE (0x3101)
#define ID_API_RESERVED_END (0x3FFF)
#endif
#define ID_CHIP_I1 (0x6d65031B)
#define ID_CHIP_I3 (0x6d65031C)
#define ID_CHIP_I2 (0x6d65031D)
#define ID_CHIP_I5 (0x6d65031E)
#define ID_CHIP_I6 (0x6d650320)
#define ID_CHIP_I6E (0x6d650321)
#define ID_CHIP_I6B0 (0x6d650322)
#define ID_CHIP_M5 (0x6d65031F)
//================================================================
// ID Defined : Common API
//================================================================
#define ID_API_COMMON_I2C_ACCESS ( ID_API_COMMON_BASE + 32 ) //SET_API_ID_MI_ISP_WriteI2C
//#define ID_API_COMMON_QuerySensorInfo ( ID_API_COMMON_BASE + 33 ) //GET_API_ID_MI_ISP_QuerySensorInfo
#define ID_API_COMMON_MIRROR ( ID_API_COMMON_BASE + 34 )
#define ID_API_COMMON_ROTATE ( ID_API_COMMON_BASE + 35 )
#define ID_API_COMMON_SENSOR_ID ( ID_API_COMMON_BASE + 36 )
#define ID_API_COMMON_FileID ( ID_API_COMMON_BASE + 100 ) //I1 or I3 or I2 or I5 ...
#define ID_API_COMMON_CHANNEL_ID ( ID_API_COMMON_BASE + 101 )
#define ID_API_COMMON_ISPROOT ( ID_API_COMMON_BASE + 102 )
//================================================================
// ID Defined : ISP API
//================================================================
#define ID_API_ISP_IQ_VERSION_INFO ( ID_API_ISP_IQ_BASE + 1 ) // 1. 4097
#define ID_API_ISP_IQ_PARAM_INIT_STATUS ( ID_API_ISP_IQ_BASE + 2 ) // 2. 4098
#define ID_API_ISP_IQ_FAST_MODE ( ID_API_ISP_IQ_BASE + 3 ) // 3. 4099
#define ID_API_ISP_IQ_COLORTOGRAY ( ID_API_ISP_IQ_BASE + 4 ) // 4. 4100
#define ID_API_ISP_IQ_CONTRAST ( ID_API_ISP_IQ_BASE + 5 ) // 5. 4101
#define ID_API_ISP_IQ_BRIGHTNESS ( ID_API_ISP_IQ_BASE + 6 ) // 6. 4102
#define ID_API_ISP_IQ_LIGHTNESS ( ID_API_ISP_IQ_BASE + 7 ) // 7. 4103
#define ID_API_ISP_IQ_RGBGAMMA ( ID_API_ISP_IQ_BASE + 8 ) // 8. 4104
#define ID_API_ISP_IQ_YUVGAMMA ( ID_API_ISP_IQ_BASE + 9 ) // 9. 4105
#define ID_API_ISP_IQ_SATURATION ( ID_API_ISP_IQ_BASE + 10 ) // 10. 4106
#define ID_API_ISP_IQ_DEFOG ( ID_API_ISP_IQ_BASE + 11 ) // 11. 4107
#define ID_API_ISP_IQ_CCM ( ID_API_ISP_IQ_BASE + 12 ) // 12. 4108
#define ID_API_ISP_IQ_ANTI_FALSE_COLOR ( ID_API_ISP_IQ_BASE + 13 ) // 13. 4109
#define ID_API_ISP_IQ_NR3D ( ID_API_ISP_IQ_BASE + 14 ) // 14. 4110
#define ID_API_ISP_IQ_NR2D_DESPIKE ( ID_API_ISP_IQ_BASE + 15 ) // 15. 4111
#define ID_API_ISP_IQ_NR2D_LUMA ( ID_API_ISP_IQ_BASE + 16 ) // 16. 4112
#define ID_API_ISP_IQ_NR2D_CHROMA ( ID_API_ISP_IQ_BASE + 17 ) // 17. 4113
#define ID_API_ISP_IQ_SHARPNESS ( ID_API_ISP_IQ_BASE + 18 ) // 18. 4114
#define ID_API_ISP_IQ_CROSSTALK ( ID_API_ISP_IQ_BASE + 19 ) // 19. 4115
#define ID_API_ISP_IQ_BLACK_LEVEL ( ID_API_ISP_IQ_BASE + 20 ) // 20. 4116
#define ID_API_ISP_IQ_BLACK_LEVEL_P1 ( ID_API_ISP_IQ_BASE + 21 ) // 21. 4117
#define ID_API_ISP_IQ_WDR ( ID_API_ISP_IQ_BASE + 22 ) // 22. 4118
#define ID_API_ISP_IQ_DEFECT_PIXEL ( ID_API_ISP_IQ_BASE + 23 ) // 23. 4119
#define ID_API_ISP_IQ_HSV ( ID_API_ISP_IQ_BASE + 24 ) // 24. 4120
#define ID_API_ISP_IQ_RGBIR ( ID_API_ISP_IQ_BASE + 25 ) // 25. 4121
#define ID_API_ISP_IQ_FPN ( ID_API_ISP_IQ_BASE + 26 ) // 26. 4122
#define ID_API_ISP_IQ_PFC ( ID_API_ISP_IQ_BASE + 27 ) // 27. 4123
#define ID_API_ISP_IQ_DM ( ID_API_ISP_IQ_BASE + 28 ) // 28. 4124
#define ID_API_ISP_IQ_COLOR_TRANSFORM ( ID_API_ISP_IQ_BASE + 29 ) // 29. 4125
#define ID_API_ISP_IQ_HDR ( ID_API_ISP_IQ_BASE + 30 ) // 30. 4126
#define ID_API_ISP_IQ_EFFECT ( ID_API_ISP_IQ_BASE + 31 ) // 31. 4127
#define ID_API_ISP_IQ_SYS_MCNR_MEMORY ( ID_API_ISP_IQ_BASE + 32 ) // 32. 4128
#define ID_API_ISP_IQ_LSC ( ID_API_ISP_IQ_BASE + 33 ) // 33. 4129
#define ID_API_ISP_IQ_PARAM_MODE ( ID_API_ISP_IQ_BASE + 34 ) // 34. 4130
#define ID_API_ISP_IQ_LinearityLUT ( ID_API_ISP_IQ_BASE + 35 ) // 35. 4131 //Get Gamma data for CCM calibration
#define ID_API_ISP_IQ_OBCCALIB ( ID_API_ISP_IQ_BASE + 36 ) // 36. 4132 //Get OB data for Gamma or CCM calibration
#define ID_API_ISP_IQ_NR3D_P1 ( ID_API_ISP_IQ_BASE + 37 ) // 37. 4133
#define ID_API_ISP_IQ_WDR_FC_CURVE ( ID_API_ISP_IQ_BASE + 38 ) // 38. 4134
#define ID_API_ISP_IQ_R2Y ( ID_API_ISP_IQ_BASE + 39 ) // 39. 4135
#define ID_API_ISP_IQ_ALSC ( ID_API_ISP_IQ_BASE + 40 ) // 40. 4136
#define ID_API_ISP_IQ_LSC_CTRL ( ID_API_ISP_IQ_BASE + 41 ) // 41. 4137
#define ID_API_ISP_IQ_ALSC_CTRL ( ID_API_ISP_IQ_BASE + 42 ) // 42. 4138
#define ID_API_ISP_IQ_DEFECT_PIXEL_CLUSTER ( ID_API_ISP_IQ_BASE + 43 ) // 43. 4139
#define ID_API_ISP_IQ_QUERY_CCM_INFO ( ID_API_ISP_IQ_BASE + 44 ) // 44. 4140
#define ID_API_ISP_IQ_NR2D_LUMA_ADV ( ID_API_ISP_IQ_BASE + 45 ) // 45. 4141
#define ID_API_ISP_IQ_NR2D_CHROMA_ADV ( ID_API_ISP_IQ_BASE + 46 ) // 46. 4142
#define ID_API_ISP_IQ_PFC_EX ( ID_API_ISP_IQ_BASE + 47 ) // 47. 4143
#define ID_API_ISP_IQ_HDR_EX ( ID_API_ISP_IQ_BASE + 48 ) // 48. 4144
#define ID_API_ISP_IQ_SHP_EX ( ID_API_ISP_IQ_BASE + 49 ) // 49. 4145
#define ID_API_ISP_IQ_NR_3D_EX ( ID_API_ISP_IQ_BASE + 50 ) // 50. 4146
#define ID_API_ISP_IQ_DUMMY ( ID_API_ISP_IQ_BASE + 51 ) // 51. 4147
#define ID_API_ISP_IQ_DUMMY_EX ( ID_API_ISP_IQ_BASE + 52 ) // 52. 4148
#define ID_API_ISP_IQ_WDR_FC_CURVE_FULL ( ID_API_ISP_IQ_BASE + 53 ) // 53. 4149
#define ID_API_ISP_IQ_ADAPTIVE_GAMMA ( ID_API_ISP_IQ_BASE + 54 ) // 54. 4150
#define ID_API_ISP_IQ_NR2D_CHROMA_PRE ( ID_API_ISP_IQ_BASE + 55 ) // 55. 4151
#define ID_API_ISP_IQ_TEMP ( ID_API_ISP_IQ_BASE + 56 ) // 56. 4152
#define ID_API_ISP_IQ_TEMP_INFO ( ID_API_ISP_IQ_BASE + 57 ) // 57. 4153
#define ID_API_ISP_AE_HIST_WEIGHT_Y ( ID_API_ISP_AE_BASE + 1 ) // 1. 5121
#define ID_API_ISP_AE_QUERY_EXPOSURE_INFO ( ID_API_ISP_AE_BASE + 2 ) // 2. 5122
#define ID_API_ISP_AE_EV_COMP ( ID_API_ISP_AE_BASE + 3 ) // 3. 5123
#define ID_API_ISP_AE_EXPO_MODE ( ID_API_ISP_AE_BASE + 4 ) // 4. 5124
#define ID_API_ISP_AE_MANUAL_EXPO ( ID_API_ISP_AE_BASE + 5 ) // 5. 5125
#define ID_API_ISP_AE_STATE ( ID_API_ISP_AE_BASE + 6 ) // 6. 5126
#define ID_API_ISP_AE_TARGET ( ID_API_ISP_AE_BASE + 7 ) // 7. 5127
#define ID_API_ISP_AE_CONVERGE ( ID_API_ISP_AE_BASE + 8 ) // 8. 5128
#define ID_API_ISP_AE_EXPOSURE_LIMIT ( ID_API_ISP_AE_BASE + 9 ) // 9. 5129
#define ID_API_ISP_AE_PLAIN_LONG_EXPO_TABLE ( ID_API_ISP_AE_BASE + 10 ) // 10. 5130
#define ID_API_ISP_AE_PLAIN_SHORT_EXPO_TABLE ( ID_API_ISP_AE_BASE + 11 ) // 11. 5131
#define ID_API_ISP_AE_WINDOW_WGT_MODE ( ID_API_ISP_AE_BASE + 12 ) // 12. 5132
#define ID_API_ISP_AE_WINDOW_WGT ( ID_API_ISP_AE_BASE + 13 ) // 13. 5133
#define ID_API_ISP_AE_FLICKER ( ID_API_ISP_AE_BASE + 14 ) // 14. 5134
#define ID_API_ISP_AE_STRATEGY ( ID_API_ISP_AE_BASE + 15 ) // 15. 5135
#define ID_API_ISP_AE_RGBIRExposureAttr ( ID_API_ISP_AE_BASE + 16 ) // 16. 5136
#define ID_API_ISP_AE_HDR ( ID_API_ISP_AE_BASE + 17 ) // 17. 5137
#define ID_API_ISP_AE_MANUAL_EXPO_SHORT ( ID_API_ISP_AE_BASE + 18 ) // 18. 5138
#define ID_API_ISP_AE_FLICKER_EX ( ID_API_ISP_AE_BASE + 19 ) // 19. 5139
#define ID_API_ISP_AE_QUERY_FLICKER_EX_INFO ( ID_API_ISP_AE_BASE + 20 ) // 20. 5140
#define ID_API_ISP_AE_STABILIZER ( ID_API_ISP_AE_BASE + 21 ) // 21. 5141
#define ID_API_ISP_AE_STRATEGY_EX ( ID_API_ISP_AE_BASE + 22 ) // 22. 5142
#define ID_API_ISP_AE_QUERY_STRATEGY_EX_INFO ( ID_API_ISP_AE_BASE + 23 ) // 24. 5143
#define ID_API_ISP_AWB_QUERY_WHITE_BALANCE_INFO ( ID_API_ISP_AWB_BASE + 1 ) // 1. 6145
#define ID_API_ISP_AWB_ATTR ( ID_API_ISP_AWB_BASE + 2 ) // 2. 6146
#define ID_API_ISP_AWB_ATTR_EX ( ID_API_ISP_AWB_BASE + 3 ) // 3. 6147
#define ID_API_ISP_AWB_MULTI_LS_ATTR ( ID_API_ISP_AWB_BASE + 4 ) // 4. 6148
#define ID_API_ISP_AWB_CT_WEIGHT ( ID_API_ISP_AWB_BASE + 5 ) // 5. 6149
#define ID_API_ISP_AWB_CTMWB ( ID_API_ISP_AWB_BASE + 6 ) // 5. 6150
//#define ID_API_ISP_AF_QUERY_FOCUS_INFO ( ID_API_ISP_AF_BASE + 1 ) // 1. 7169
//#define ID_API_ISP_AF_WINDOW ( ID_API_ISP_AF_BASE + 2 ) // 2. 7170
//#define ID_API_ISP_AF_FILTER ( ID_API_ISP_AF_BASE + 3 ) // 3. 7171
//#define ID_API_VENC_RcParamEx ( ID_API_ISP_OTHER_BASE + 1 ) // 1. 8193 --> old ( ID_API_ISP_BASE + 35 ) //35. 4131
//#define ID_API_VI_SensorFrameRate ( ID_API_ISP_OTHER_BASE + 2 ) // 2. 8194 --> old ( ID_API_ISP_BASE + 36 ) //36. 4132
//#define ID_API_VENC_Resolution ( ID_API_ISP_OTHER_BASE + 3 ) // 3. 8195 --> old ( ID_API_ISP_BASE + 37 ) //37. 4133
//================================================================
// ID Defined : Calibration 2.0 API
//================================================================
#define ID_API_CALIBRATION_20_CaliBVAV ( ID_API_CALIBRATION_20_BASE + 1) // 1. 9217 //SET_API_ID_CALIBRATION_CaliBVAV = 61,
#define ID_API_CALIBRATION_20_Apply ( ID_API_CALIBRATION_20_BASE + 2) // 2. 9218 //SET_API_ID_CALIBRATION_ApplyBVAV = 62,
#define ID_API_CALIBRATION_20_CaliData ( ID_API_CALIBRATION_20_BASE + 3) // 3. 9219 //SET_API_ID_CALIBRATION_SetCaliData = 63,
#define ID_API_CALIBRATION_20_CaliPath ( ID_API_CALIBRATION_20_BASE + 4) // 4. 9220 //SET_API_ID_CALIBRATION_SetCaliPath = 64,
#define ID_API_CALIBRATION_20_CaliDBPath ( ID_API_CALIBRATION_20_BASE + 5) // 5. 9221 //SET_API_ID_CALIBRATION_SetCaliDBPath
#define ID_API_CALIBRATION_20_CaliInfo ( ID_API_CALIBRATION_20_BASE + 6) // 6. 9222 //GET_API_ID_CALIBRATION_GetCaliInfo
#define ID_API_CALIBRATION_20_CaliAWB ( ID_API_CALIBRATION_20_BASE + 7) // 7. 9223
#define ID_API_CALIBRATION_20_CaliOB ( ID_API_CALIBRATION_20_BASE + 8) // 8. 9224
#define ID_API_CALIBRATION_20_CaliMinGain ( ID_API_CALIBRATION_20_BASE + 9) // 9. 9225
#define ID_API_CALIBRATION_20_CaliShutterLinearity ( ID_API_CALIBRATION_20_BASE + 10) // 10. 9226
#define ID_API_CALIBRATION_20_CaliGainLinearity ( ID_API_CALIBRATION_20_BASE + 11) // 11 9227
#define ID_API_CALIBRATION_20_CaliDPC ( ID_API_CALIBRATION_20_BASE + 12) // 12. 9228
#define ID_API_CALIBRATION_20_CaliALSC ( ID_API_CALIBRATION_20_BASE + 13) // 13. 9229
#define ID_API_CALIBRATION_20_CaliFPN ( ID_API_CALIBRATION_20_BASE + 14) // 14. 9230
#define ID_API_CALIBRATION_30_ApplyAWB ( ID_API_CALIBRATION_20_BASE + 15) // 15. 9231
#define ID_API_CALIBRATION_30_ApplyOBC ( ID_API_CALIBRATION_20_BASE + 16) // 16. 9232
#define ID_API_CALIBRATION_30_ApplyMinGain ( ID_API_CALIBRATION_20_BASE + 17) // 17. 9233
#define ID_API_CALIBRATION_30_ApplyShutterLinearity ( ID_API_CALIBRATION_20_BASE + 18) // 18. 9234
#define ID_API_CALIBRATION_30_ApplyGainLinearity ( ID_API_CALIBRATION_20_BASE + 19) // 19 9235
#define ID_API_CALIBRATION_30_ApplySDC ( ID_API_CALIBRATION_20_BASE + 20) // 20. 9236
#define ID_API_CALIBRATION_30_ApplyALSC ( ID_API_CALIBRATION_20_BASE + 21) // 21. 9237
#define ID_API_CALIBRATION_30_ApplyFPN ( ID_API_CALIBRATION_20_BASE + 22) // 22. 9238
#define ID_API_CALIBRATION_30_ApplyLSC ( ID_API_CALIBRATION_20_BASE + 23) // 21. 9239
//================================================================
// ID Defined : MainTool API
//================================================================
#define ID_API_MAINTOOL_QUERY_SENSOR_INFO ( ID_API_MAINTOOL_BASE + 1 ) // 1. 10241
#define ID_API_MAINTOOL_IQ_INDEX ( ID_API_MAINTOOL_BASE + 2 ) // 2. 10242
#define ID_API_MAINTOOL_BYPASS ( ID_API_MAINTOOL_BASE + 3 ) // 3. 10243
//================================================================
// ID Defined : Plugin API
//================================================================
#define ID_API_PLUGIN_I2C_ACCESS ( ID_API_PLUGIN_BASE + 1 ) // 1. 11265 //SET_API_ID_MI_ISP_WriteI2C
#define ID_API_PLUGIN_WBCT ( ID_API_PLUGIN_BASE + 3 ) // 3. 11267 //SetWBCTCaliAttr
#define ID_API_PLUGIN_AWBCTStats ( ID_API_PLUGIN_BASE + 4 ) // 4. 11268
#define ID_API_PLUGIN_AWBHWStats ( ID_API_PLUGIN_BASE + 5 ) // 5. 11269
#define ID_API_PLUGIN_CUR_WBCT ( ID_API_PLUGIN_BASE + 6 ) // 6. 11270 //GetCurCTCaliAttr
//================================================================
// ID Defined : Cus3A API
//================================================================
#define ID_API_CUS_AE_HW_AVG_STATS ( ID_API_CUS3A_BASE + 1 ) // 1. 11777
#define ID_API_CUS_AE_HW_HISTO_0_STATS ( ID_API_CUS3A_BASE + 2 ) // 2. 11778
#define ID_API_CUS_AE_HW_HISTO_1_STATS ( ID_API_CUS3A_BASE + 3 ) // 3. 11779
#define ID_API_CUS_AE_GET_INIT_STATUS ( ID_API_CUS3A_BASE + 4 ) // 4. 11780
#define ID_API_CUS_AE_GET_CUR_STATUS ( ID_API_CUS3A_BASE + 5 ) // 5. 11781
#define ID_API_CUS_AE_SET_PARAM ( ID_API_CUS3A_BASE + 6 ) // 6. 11782
#define ID_API_CUS_AWB_HW_AVG_STATS ( ID_API_CUS3A_BASE + 7 ) // 7. 11783
#define ID_API_CUS_3A_ENABLE ( ID_API_CUS3A_BASE + 8 ) // 8. 11784
#define ID_API_CUS_AWB_GET_CUR_STATUS ( ID_API_CUS3A_BASE + 9 ) // 9. 11785
#define ID_API_CUS_AWB_SET_PARAM ( ID_API_CUS3A_BASE + 10) //10. 11786
#define ID_API_CUS_AE_WINDOW_BLOCK_NUMBER ( ID_API_CUS3A_BASE + 11 )//11. 11787
#define ID_API_CUS_AWB_SAMPLING ( ID_API_CUS3A_BASE + 12 )//12. 11788
#define ID_API_CUS_AF_STATS ( ID_API_CUS3A_BASE + 13 )//13. 11789
#define ID_API_CUS_AF_WINDOW ( ID_API_CUS3A_BASE + 14 )//14. 11790
#define ID_API_CUS_AF_FILTER ( ID_API_CUS3A_BASE + 15 )//15. 11791
#define ID_API_CUS_AF_FILTER_SQUARE ( ID_API_CUS3A_BASE + 16 )//16. 11792
#define ID_API_CUS_AF_MODE ( ID_API_CUS3A_BASE + 17 )//17. 11793
#define ID_API_CUS_AE_HISTOGRAM_WINDOW ( ID_API_CUS3A_BASE + 18 )//18. 11794
#define ID_API_CUS_GET_IMAGE_RESOLUTION ( ID_API_CUS3A_BASE + 19 )//19. 11795
#define ID_API_CUS_ENABLE_ISP_OUT_IMAGE ( ID_API_CUS3A_BASE + 20 )//20. 11796
#define ID_API_CUS_GET_ISP_OUT_IMAGE_COUNT ( ID_API_CUS3A_BASE + 21 )//21. 11797
#define ID_API_CUS_CAPTURE_HDR_RAW_IMAGE ( ID_API_CUS3A_BASE + 22 )//22. 11798
#define ID_API_CUS_FRAME_META_INFO ( ID_API_CUS3A_BASE + 23 )//23. 11799
#define ID_API_CUS_I2C_ACCESS ( ID_API_CUS3A_BASE + 24 )//24. 11800
#define ID_API_CUS_AWB_HW_AVG_STATS_SHORT ( ID_API_CUS3A_BASE + 25 ) // 25. 11801
#define ID_API_CUS_CAPTURE_RAW_IMAGE ( ID_API_CUS3A_BASE + 26 )//26. 11802
#define ID_API_CUS_CUSTOMER_AE_CTRL ( ID_API_CUS3A_BASE + 27 )//27. 11803 , Customer defined AE control only
#define ID_API_CUS_CUSTOMER_AWB_CTRL ( ID_API_CUS3A_BASE + 28 )//28. 11804 , Customer defined AWB control only
#define ID_API_CUS_CUSTOMER_AF_CTRL ( ID_API_CUS3A_BASE + 29 )//29. 11805 , Customer defined AF control only
#define ID_API_CUS_AE_HW_RGBIR_HISTO_STATS ( ID_API_CUS3A_BASE + 30 ) // 30. 11806
#ifdef ENABLE_EARLY_AE_DONE
#define ID_API_CUS_AE_DONE_RATIO ( ID_API_CUS3A_BASE + 27 )//27. 11803
#endif
#define ID_API_CUS_AE_CROP_SIZE ( ID_API_CUS3A_BASE + 31 )//34. 11807
#define ID_API_CUS_AWB_CROP_SIZE ( ID_API_CUS3A_BASE + 32 )//35. 11808
//================================================================
// ID Defined : Debug Level API
//================================================================
#define ID_API_ISP_DeBugLevel_AE ( ID_API_DEBUG_LEVEL_BASE + 1 ) // 1. 12288
#define ID_API_ISP_DeBugLevel_AWB ( ID_API_DEBUG_LEVEL_BASE + 2 ) // 2. 12289
#define ID_API_ISP_DeBugLevel_AWB_PERIOD ( ID_API_DEBUG_LEVEL_BASE + 3 ) // 3. 12290
#define ID_API_REGISTER_API_SET_CB ( ID_API_RESERVED_BASE + 1) //1. register API_SET callback
#define ID_API_REGISTER_API_GET_CB ( ID_API_RESERVED_BASE + 2) //2. register API_GET callback
#ifdef __cplusplus
} //end of extern C
#endif
#endif //_TUNINGSERVER_API_ID_H_

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@ -1,407 +0,0 @@
/* Copyright (c) 2018-2019 Sigmastar Technology Corp.
All rights reserved.
Unless otherwise stipulated in writing, any and all information contained
herein regardless in any format shall remain the sole proprietary of
Sigmastar Technology Corp. and be kept in strict confidence
(<EFBFBD><EFBFBD>Sigmastar Confidential Information<EFBFBD><EFBFBD>) by the recipient.
Any unauthorized act including without limitation unauthorized disclosure,
copying, use, reproduction, sale, distribution, modification, disassembling,
reverse engineering and compiling of the contents of Sigmastar Confidential
Information is unlawful and strictly prohibited. Sigmastar hereby reserves the
rights to any and all damages, losses, costs and expenses resulting therefrom.
*/
/*
* mi_isp_datatype.h
*
* Created on: June 27, 2018
* Author: Jeffrey Chou
*/
#ifndef _MI_ISP_DATATYPE_H_
#define _MI_ISP_DATATYPE_H_
#ifdef __cplusplus
extern "C"
{
#endif
#include "mi_common.h"
#include "mi_sys_datatype.h"
#include "mi_isp_3a_datatype.h"
#include "mi_isp_iq_datatype.h"
/************************************* AF - Define the structure declaration - START *************************************/
/************************************* AF - Define the structure declaration - END *************************************/
/************************** Cus3A ***********************/
typedef struct
{
MI_U8 uAvgR;
MI_U8 uAvgG;
MI_U8 uAvgB;
MI_U8 uAvgY;
} MI_ISP_AE_AVGS;
typedef struct
{
MI_U32 nBlkX;
MI_U32 nBlkY;
MI_ISP_AE_AVGS nAvg[128*90];
}MI_ISP_AE_HW_STATISTICS_t;
typedef struct
{
MI_U8 uAvgR;
MI_U8 uAvgG;
MI_U8 uAvgB;
} MI_ISP_AWB_AVGS;
typedef struct
{
MI_U32 nBlkX;
MI_U32 nBlkY;
MI_ISP_AWB_AVGS nAvg[128*90];
} MI_ISP_AWB_HW_STATISTICS_t;
typedef struct
{
MI_U16 nHisto[128];
} MI_ISP_HISTO_HW_STATISTICS_t;
typedef struct
{
MI_U16 nHisto[256];
} MI_ISP_RGBIR_HISTO_HW_STATISTICS_t;
typedef struct
{
MI_BOOL bAE;
MI_BOOL bAWB;
MI_BOOL bAF;
}Cus3AEnable_t;
typedef struct
{
MI_U32 Size; /**< struct size*/
char sensor_id[32]; /**< sensor module id*/
MI_U32 shutter; /**< shutter Shutter in ns*/
MI_U32 shutter_step; /**< shutter Shutter step ns*/
MI_U32 shutter_min; /**< shutter Shutter min us*/
MI_U32 shutter_max; /**< shutter Shutter max us*/
MI_U32 sensor_gain; /**< sensor_gain Sensor gain, 1X = 1024*/
MI_U32 sensor_gain_min; /**< sensor_gain_min Minimum Sensor gain, 1X = 1024*/
MI_U32 sensor_gain_max; /**< sensor_gain_max Maximum Sensor gain, 1X = 1024*/
MI_U32 isp_gain; /**< isp_gain Isp digital gain , 1X = 1024 */
MI_U32 isp_gain_max; /**< isp_gain Maximum Isp digital gain , 1X = 1024 */
MI_U32 FNx10; /**< F number * 10*/
MI_U32 fps; /**< initial frame per second*/
MI_U32 shutterHDRShort_step; /**< shutter Shutter step ns*/
MI_U32 shutterHDRShort_min; /**< shutter Shutter min us*/
MI_U32 shutterHDRShort_max; /**< shutter Shutter max us*/
MI_U32 sensor_gainHDRShort_min; /**< sensor_gain_min Minimum Sensor gain, 1X = 1024*/
MI_U32 sensor_gainHDRShort_max; /**< sensor_gain_max Maximum Sensor gain, 1X = 1024*/
/*CUS3A v1.1*/
MI_U32 AvgBlkX; /**< HW statistics average block number*/
MI_U32 AvgBlkY; /**< HW statistics average block number*/
}CusAEInitParam_t,CusAeInitParam_t;
/*! @brief ISP report to AE, hardware statistic */
typedef struct
{
MI_U32 Size; /**< struct size*/
void *hist1; /**< HW statistic histogram 1*/
void *hist2; /**< HW statistic histogram 2*/
MI_U32 AvgBlkX; /**< HW statistics average block number*/
MI_U32 AvgBlkY; /**< HW statistics average block number*/
void * avgs; /**< HW statistics average block data*/
MI_U32 Shutter; /**< Current shutter in ns*/
MI_U32 SensorGain; /**< Current Sensor gain, 1X = 1024 */
MI_U32 IspGain; /**< Current ISP gain, 1X = 1024*/
MI_U32 ShutterHDRShort; /**< Current shutter in ns*/
MI_U32 SensorGainHDRShort; /**< Current Sensor gain, 1X = 1024 */
MI_U32 IspGainHDRShort; /**< Current ISP gain, 1X = 1024*/
/*CUS3A V1.1*/
MI_U32 PreAvgY; /**< Previous frame brightness*/
MI_U8 HDRCtlMode; /**< 0 = HDR off; */
/**< 1 = Separate shutter & Separate sensor gain settings */
/**< 2 = Separate shutter & Share sensor gain settings */
/**< 3 = Share shutter & Separate sensor gain settings */
MI_U32 FNx10; /**< Aperture in FNx10*/
MI_U32 CurFPS; /**Current sensor FPS */
MI_U32 PreWeightY; /**< Previous frame brightness with ROI weight*/
} __attribute__((packed, aligned(1))) CusAEInfo_t, CusAeInput_t;
/*! @brief ISP ae algorithm result*/
typedef struct
{
MI_U32 Size; /**< struct size*/
MI_U32 Change; /**< if true, apply this result to hw register*/
MI_U32 Shutter; /**< Shutter in ns */
MI_U32 SensorGain; /**< Sensor gain, 1X = 1024 */
MI_U32 IspGain; /**< ISP gain, 1X = 1024 */
MI_U32 ShutterHdrShort; /**< Shutter in ns */
MI_U32 SensorGainHdrShort; /**< Sensor gain, 1X = 1024 */
MI_U32 IspGainHdrShort; /**< ISP gain, 1X = 1024 */
MI_U32 u4BVx16384; /**< Bv * 16384 in APEX system, EV = Av + Tv = Sv + Bv */
MI_U32 AvgY; /**< frame brightness */
MI_U32 HdrRatio; /**< hdr ratio, 1X = 1024 */
/*CUS3A V1.1*/
MI_U32 FNx10; /**< F number * 10*/
MI_U32 DebandFPS; /** Target fps when running auto debanding**/
MI_U32 WeightY; /**< frame brightness with ROI weight*/
}__attribute__((packed, aligned(1))) CusAEResult_t, CusAeOutput_t;
/*! @brief AWB HW statistics data*/
typedef struct
{
MI_U32 Size; /**< struct size*/
MI_U32 AvgBlkX;
MI_U32 AvgBlkY;
MI_U32 CurRGain;
MI_U32 CurGGain;
MI_U32 CurBGain;
void *avgs; //ISP_AWB_SAMPLE
/*CUS3A V1.1*/
MI_U8 HDRMode; /**< Noramal or HDR mode*/
void* *pAwbStatisShort; /**< Short Shutter AWB statistic data */
MI_U32 u4BVx16384; /**< From AE output, Bv * 16384 in APEX system, EV = Av + Tv = Sv + Bv */
MI_S32 WeightY; /**< frame brightness with ROI weight*/
}__attribute__((packed, aligned(1))) CusAWBInfo_t, CusAWBInput_t;
/*! @brief AWB algorithm result*/
typedef struct
{
MI_U32 Size; /**< struct size*/
MI_U32 Change; /**< if true, apply this result to hw register*/
MI_U32 R_gain; /**< AWB gain for R channel*/
MI_U32 G_gain; /**< AWB gain for G channel*/
MI_U32 B_gain; /**< AWB gain for B channel*/
MI_U32 ColorTmp; /**< Return color temperature*/
}CusAWBResult_t, CusAwbOutput_t;;
typedef enum __attribute__ ((aligned (1)))
{
SS_AE_16x24 = 0,
SS_AE_32x24,
SS_AE_64x48,
SS_AE_64x45,
SS_AE_128x80,
SS_AE_128x90,
SS_AE_32x32
} MS_CUST_AE_WIN_BLOCK_NUM_TYPE_e;
typedef struct {
MI_U16 u2Stawin_x_offset;
MI_U16 u2Stawin_x_size;
MI_U16 u2Stawin_y_offset;
MI_U16 u2Stawin_y_size;
MI_U16 u2WinIdx;
} CusAEHistWin_t;
typedef struct
{
MI_U32 SizeX;
MI_U32 SizeY;
MI_U32 IncRatio;
}CusAWBSample_t;
typedef struct
{
MI_U16 CropX; // 0~1023
MI_U16 CropY; // 0~1023
MI_U16 CropW; // 0~1023
MI_U16 CropH; // 0~1023
}CusAEAWBCropSize_t;
typedef struct
{
MI_U8 iir_1[5*16]; //[5]: iir 35bit, use 5*u8 datatype, [16]: 16wins
MI_U8 iir_2[5*16]; //[5]: iir 35bit, use 5*u8 datatype, [16]: 16wins
MI_U8 luma[4*16]; //[4]: luma 32bit, use 4*u8 datatype, [16]: 16wins
MI_U8 fir_v[5*16]; //[5]: fir 35bit, use 5*u8 datatype, [16]: 16wins
MI_U8 fir_h[5*16]; //[5]: fir 35bit, use 5*u8 datatype, [16]: 16wins
MI_U8 ysat[3*16]; //[3]: ysat 22bit, use 3*u8 datatype, [16]: 16wins
} AF_STATS_PARAM_t;
typedef struct
{
AF_STATS_PARAM_t stParaAPI[16];
} CusAFStats_t;
typedef struct AF_WINDOW_PARAM_s
{
MI_U32 u32StartX; /*range : 0~1023*/
MI_U32 u32StartY; /*range : 0~1023*/
MI_U32 u32EndX; /*range : 0~1023*/
MI_U32 u32EndY; /*range : 0~1023*/
} AF_WINDOW_PARAM_t;
typedef struct
{
MI_U8 u8WindowIndex;
AF_WINDOW_PARAM_t stParaAPI;
} CusAFWin_t;
typedef struct
{
MI_U16 u16IIR1_a0;
MI_U16 u16IIR1_a1;
MI_U16 u16IIR1_a2;
MI_U16 u16IIR1_b1;
MI_U16 u16IIR1_b2;
MI_U16 u16IIR1_1st_low_clip;
MI_U16 u16IIR1_1st_high_clip;
MI_U16 u16IIR1_2nd_low_clip;
MI_U16 u16IIR1_2nd_high_clip;
MI_U16 u16IIR2_a0;
MI_U16 u16IIR2_a1;
MI_U16 u16IIR2_a2;
MI_U16 u16IIR2_b1;
MI_U16 u16IIR2_b2;
MI_U16 u16IIR2_1st_low_clip;
MI_U16 u16IIR2_1st_high_clip;
MI_U16 u16IIR2_2nd_low_clip;
MI_U16 u16IIR2_2nd_high_clip;
MI_U16 u16IIR1_e1_en;
MI_U16 u16IIR1_e1_a0;
MI_U16 u16IIR1_e1_a1;
MI_U16 u16IIR1_e1_a2;
MI_U16 u16IIR1_e1_b1;
MI_U16 u16IIR1_e1_b2;
MI_U16 u16IIR1_e2_en;
MI_U16 u16IIR1_e2_a0;
MI_U16 u16IIR1_e2_a1;
MI_U16 u16IIR1_e2_a2;
MI_U16 u16IIR1_e2_b1;
MI_U16 u16IIR1_e2_b2;
MI_U16 u16IIR2_e1_en;
MI_U16 u16IIR2_e1_a0;
MI_U16 u16IIR2_e1_a1;
MI_U16 u16IIR2_e1_a2;
MI_U16 u16IIR2_e1_b1;
MI_U16 u16IIR2_e1_b2;
MI_U16 u16IIR2_e2_en;
MI_U16 u16IIR2_e2_a0;
MI_U16 u16IIR2_e2_a1;
MI_U16 u16IIR2_e2_a2;
MI_U16 u16IIR2_e2_b1;
MI_U16 u16IIR2_e2_b2;
} CusAFFilter_t;
typedef struct
{
MI_BOOL bSobelYSatEn;
MI_U16 u16SobelYThd;
MI_BOOL bIIRSquareAccEn;
MI_BOOL bSobelSquareAccEn;
MI_U16 u16IIR1Thd;
MI_U16 u16IIR2Thd;
MI_U16 u16SobelHThd;
MI_U16 u16SobelVThd;
MI_U8 u8AFTblX[12];
MI_U16 u16AFTblY[13];
} CusAFFilterSq_t;
typedef enum __attribute__ ((aligned (1)))
{
AF_ROI_MODE_NORMAL,
AF_ROI_MODE_MATRIX
} ISP_AF_ROI_MODE_e;
typedef struct
{
ISP_AF_ROI_MODE_e mode;
MI_U32 u32_vertical_block_number;
} CusAFRoiMode_t;
/* Raw store control */
typedef enum
{
eRawStoreNode_P0HEAD = 0, /* Control by VIF, Do not use */
eRawStoreNode_P1HEAD = 1, /* Control by VIF, Do not use */
eRawStoreNode_P0TAIL = 2,
eRawStoreNode_P1TAIL = 3,
eRawStoreNode_ISPOUT = 4,
eRawStoreNode_VDOS = 5,
eRawStoreNode_ISPOUT_BEFORE_YEE = 6,
eRawStoreNode_RGBIR_IR_ONLY = 7
}CameraRawStoreNode_e;
typedef struct
{
MI_U32 u32image_width;
MI_U32 u32image_height;
MI_U32 u32Node;
MI_U32 u32PixelDepth;
} CusImageResolution_t;
typedef struct
{
MI_U32 u32enable;
MI_U32 u32image_width;
MI_U32 u32image_height;
MI_U32 u32physical_address;
MI_U32 u32Node;
} CusISPOutImage_t;
typedef struct
{
MI_U32 u32enable;
MI_U32 u32image_width;
MI_U32 u32image_height;
MI_U32 u32physical_address;
MI_U32 u32Node;
MI_U32 u32PixelDepth;
} CusHdrRawImage_t;
typedef struct
{
MI_U64 u64Pts; /** frame PTS */
MI_U32 u32Shutter; /**< Shutter in us */
MI_U32 u32SensorGain; /**< Sensor gain, 1X = 1024 */
MI_U32 u32ColorTmp; /**< Return color temperature*/
} IspFrameMetaInfo_t;
typedef struct
{
MI_U32 u32SlaveAddr; //sensor slave address
MI_U32 u32RegLen; //sensor register length , 1 or 2 bytes
MI_U32 u32DataLen; //sensor register data length, 1 or 2 bytes
MI_U32 u32I2cSpeed; //i2c speed , 100/200/300/400 KHz
MI_U32 u32Reg; //sensor register address
MI_U32 u32Data; //sensor register data
}CusSensorI2cParam_t;
/***************************** end of Cus3A ****************************/
// COMMON API
typedef struct MI_ISP_API_CHANNEL_ID_TYPE_s
{
MI_U32 u32ChannelID;
} MI_ISP_API_CHANNEL_ID_TYPE_t;
typedef struct MI_ISP_API_USERSPACE3A_ATTR_s
{
MI_SYS_PixelFormat_e ePixelFmt;
MI_U32 eSensorBindId;
} MI_ISP_API_USERSPACE3A_ATTR_t;
typedef struct
{
MI_S8 strIspRoot[64];
} MI_ISP_ROOT_PATH_T;
#ifdef __cplusplus
} //end of extern C
#endif
#endif //_MI_ISP_DATATYPE_H_

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