Add IMX291 DC for Hi3516Dv100

pull/138/head
Dmitry Ermakov 2022-01-02 19:03:10 +03:00
parent feb80cde38
commit 0f30c4a2bc
4 changed files with 84 additions and 1 deletions

View File

@ -180,6 +180,13 @@ insert_sns() {
insmod sensor_spi.ko
;;
imx291)
devmem 0x200f0050 32 0x2 # i2c0_scl
devmem 0x200f0054 32 0x2 # i2c0_sda
devmem 0x2003002c 32 0x90005 # sensor unreset, clk 37.125MHz, VI 148MHz
;;
imx117)
devmem 0x200f0050 32 0x1 # spi0_sclk
devmem 0x200f0054 32 0x1 # spi0_sdo
@ -287,7 +294,7 @@ insert_ko() {
insert_audio
insmod hi_mipi.ko
insmod wdt.ko
#insmod wdt.ko
echo "==== Your input Sensor type is $SENSOR ===="
}

View File

@ -0,0 +1,76 @@
[sensor]
Sensor_type=imx291
Mode=WDR_MODE_NONE
DllFile=libsns_imx291_dc.so
[mode]
input_mode=INPUT_MODE_CMOS_18V
dev_attr=0
[isp_image]
Isp_FrameRate=30
Isp_Bayer=BAYER_GBRG
[vi_dev]
Input_mod=VI_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFF0000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =1 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1920 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =1080 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
DataPath=1
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
DevRect_x=0
DevRect_y=30
DevRect_w=1920
DevRect_h=1080